elismasilva/ddo-splitzip-integration

SplitZip × diffusers-dynamic-offloader — HANDOFF v2 (for the next AI agent)

You are continuing work started in a prior session. This README is the single source of truth for state. Read it fully before acting. Tag: ml-intern.

CHANGE vs v1 of this handoff: the user clarified the primary target is the vmm_fast route with the native DLL allocator (_prepare_vmm_fast_runtime → attach_model_linear_modules from the ddo-vmm-allocator submodule, native shard transport), NOT the vmm_runtime staging-pool route. The integration was redesigned accordingly (new splitzip_fast.py); the staging-pool route remains as a fallback. Do not regress to v1's wiring plan.

What this is

Lossless BF16 weight compression for DEVAIEXP/diffusers-dynamic-offloader implementing SplitZip (arXiv:2605.01708, NeurIPS 2026). Per-tensor Top-16 exponent codebook, offline calibration, coverage gate ≥0.99, payload ≈0.756× raw, bitwise-exact reconstruction.

• Paper: method §3.2, exponent stats §3.1/Table 1, ablations §4.3 (per-tensor granularity; offline NOT dynamic calibration; E4M3 expands — excluded).
• Upstream MIT Triton codec: https://github.com/Intelligent-Microsystems-Lab/SplitZip (codec_gpu.py: _dec_4bit_quad64, _fix_escapes_local_linear, ChunkLocalSplitZipGPU, ChunkLocalGPUEncoded).
• DDO state read at commit a4f82a2 (main). ddo-vmm-allocator read at gitlink 70802e1.

Route facts (verified by reading both repos)

vmm_fast / native DLL (PRIMARY). dynamic_offload.py::_prepare_vmm_fast_runtime (L1555) calls attach_model_linear_modules(...) (ddo-vmm-allocator model_arena_adapter.py ~L2130–2485) → returns (report, ModelArenaWeightStore); stored as self._vmm_fast_store. When native_transport_kwargs is non-empty, self._vmm_staging_pool = None (L1639–1647) and materialization runs inside the adapter's forward hooks (_fault_execution_unit_with_capacity_retry → fault_and_copy_if_needed ~L1235–1295): the native ring transport reads EXACTLY binding.nbytes raw bytes from the shard into the arena. Python never stages per-weight bytes and there is no mark_upload on this path. Seams:

• uploads run on a Python-owned torch.cuda.Stream (store._upload_stream);
• native.copy_from_host_async(arena_offset, source, stream=...) is the Python-visible DMA (copies exactly source.nbytes);
• wait_for_compute(ready_event) (~L1577–1597) accepts a plain torch.cuda.Event;
• _TensorBinding (~L440) has .source (may be None when file-slice backed), .file_slice, .offset; nbytes is fixed from raw numel at attach.

vmm_runtime / staging pool (FALLBACK). Python VmmModelArena; staging via PinnedStagingPool.stage_file_slice(s) callbacks; group scheduling in _schedule_vmm_execution_group (~L1850) calls arena.acquire(...) then mark_upload(group, upload_stream, pool).

Files (in THIS dataset repo, repo-relative layout)

File	Copy to in diffusers-dynamic-offloader	State
src/diffusers_dynamic_offloader/splitzip_codec.py	same path	CPU-validated; GpuSplitZipDecoder written vs upstream kernels, NOT executed
src/diffusers_dynamic_offloader/splitzip_shard_cache.py	same path	CPU-validated; v2 adds slice-key aliasing (manifest-persisted)
src/diffusers_dynamic_offloader/splitzip_fast.py	same path	NEW — vmm_fast transport wrapper; NOT executed
src/diffusers_dynamic_offloader/splitzip_staging.py	same path	fallback route; NOT executed vs native allocator
docs/developer/splitzip.md	same path	v2: both routes, invariants, checklist
tests/test_splitzip_codec.py	same path	green (exit 0, torch 2.15 CPU)

What is already verified

• Pure-PyTorch codec: bitwise round-trip, 10 cases (odd n, escape-heavy, subnormal-heavy, decode-into, cache miss, gate skip). Ratio 0.750 on weight-like data; broad-exponent data expands 1.17× (hence the gate).
• Wire format frozen and upstream-compatible: pk[n_pairs] u8, sm[n] u8, chunk_id[4·n_esc] i32 LE, local_pos[2·n_esc] u16 LE, esc_val[n_esc] u8, 4-byte-aligned offsets. An intermediate 12-bit packed format was REVERTED — never change the wire format.

Remaining work, in order

1. Vendor the upstream codec: copy codec_gpu.py (+ LICENSE, empty __init__.py) from the SplitZip repo into src/diffusers_dynamic_offloader/_splitzip_vendor/. Then diff upstream ChunkLocalSplitZipGPU field names against GpuSplitZipEncoder / GpuSplitZipDecoder usage (most likely silent breakage).
2. Wire the fast route in _prepare_vmm_fast_runtime — after report, store = attach_model_linear_modules(...) and while loader CPU tensors are alive:

   shard_cache = SplitZipShardCache(Path(cache_root))
   bind_slice_aliases(module, shard_cache)          # content key -> (shard, offset, size)
   enable_splitzip_fast_transport(store, shard_cache)  # replaces store._native_shard_transport
   

   Plus a config flag (vmm_splitzip, env DDO_VMM_SPLITZIP, DDO_SPLITZIP_CACHE_DIR) in DynamicOffloadConfig (~L2904).
3. Hardware verification (all listed in docs/developer/splitzip.md): arena-view helper resolution (_resolve_arena_view tries store.arena_view etc.; pass arena_view_fn= if it fails), binding.offset/.file_slice attribute names on _TensorBinding, whether native.copy_from_host_async requires a cuMemHostRegistered buffer (our pinned buffer is torch-pinned; register once via store._host_registry if the bridge demands it), ring-prefetch waste for compressed bindings (harmless, consider skipping), single-fault arena bytes vs raw upload, microbench decode GB/s vs PCIe HtoD, end-to-end pixel-identical denoise run.
4. Windows: fast route is unavailable by construction (no Triton; Python never stages there) — document loudly in the user guide; the staging-pool route's CPU-decode fallback still works if vmm_native_transport is off.
5. Optional polish: builder CLI, metrics into DynamicOffloadMetrics (wrapper.stats), decoder/scratch reuse across faults, config plumbing, tests for alias_slice/lookup_by_slice (pure CPU, testable now).

Known open verification points (do not silently assume)

• The exact upload_batch call pattern (observed: one binding per call) and what _NativeShardTransport methods besides upload_batch the adapter touches (wrapper delegates everything else via __getattr__).
• _TensorBinding attribute names (source, file_slice, offset) — quoted from a paged read; verify on the actual submodule before wiring.
• FP8: bfloat16-only by design. FP8-E4M3 excluded (expansion); E5M2 needs the paper's 5-bit variant (not implemented).

Reproduce the CPU validation

pip install torch --index-url https://download.pytorch.org/whl/cpu
python tests/test_splitzip_codec.py   # expects ALL CHECKS PASSED, exit 0