Renesas/Darknet53-ONNX

Darknet-53 (ONNX) – Renesas X5H

Introduction

This repository hosts Darknet-53, targeting the Renesas R-Car X5H platform for image classification inference on the NPX6 NPU. Unlike the YOLOv3/YOLO-family detector repos in this collection which use Darknet-53 purely as a detection backbone, this repo documents the standalone ImageNet classifier checkpoint.

Resolution note: the GF benchmark input resolution is 288×288, which is unusual for a classic Darknet classifier (commonly benchmarked at 256×256). This turns out to be not an anomaly: timm/darknet53.c2ns_in1k's published test-time resolution is exactly 288×288 (train resolution 256×256), so the benchmark input matches this specific checkpoint's intended test configuration.

• Model Architecture: Darknet-53 — a 53-layer convolutional backbone with residual connections, originally introduced as the YOLOv3 feature extractor and here used as a standalone ImageNet classifier
• Source Model: timm/darknet53.c2ns_in1k
• Task: Image Classification (ImageNet-1k, 1000 classes)
• Parameters: 41.6M (timm model card: Params (M): 41.6, GMACs: 9.3)
• Origin paper: "YOLOv3: An Incremental Improvement" (Redmon & Farhadi, 2018, arXiv:1804.02767)

Deployment Flow

The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time — no separate quantization step is required.

darknet53_..._optimized.onnx (FP32)
        │
        └─▶  MWMX Runtime  ──▶  INT8 auto-cast  ──▶  NPX6 NPU

Provided Artifacts

Artifact	Status	Notes
FP32 (ONNX)	✅ Published	fp32/darknet53_c2ns_in1k.onnx — auto-cast to INT8 by the MWMX toolchain at compile time (see Deployment Flow above); no separate INT8 file is shipped

Performance

Measured on Renesas R-Car X5H via the MWMX runtime (APM50 ship-performance CI pipeline).

Benchmark configuration: Single NPU · Single AI Core · Batch size: 1 · Input: 3 × 288 × 288 — matches this checkpoint's published test resolution.

Runtime	Precision	Device	Latency (ms)	Type
MWMX Runtime	INT8 (auto)	X5H · 1× NPU · 1 Core · 850 MHz	7.637812	Measured

Only the 1-AI-core slice was run for this model in the source benchmark export — the 12-core slice was skipped, so no 12-core row is reported here.

Accuracy

TBD — not yet measured/published for this repo.

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Runtime Details

MWMX Runtime

• Engine: Renesas MWMX (Middleware MX) native inference runtime
• Input format: FP32 ONNX (compiled by the MWMX toolchain)
• NPU execution precision: INT8 (auto-cast by MWMX toolchain)
• Execution target: NPX6-48K NPU on R-Car X5H

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Prerequisites

To run inference on Renesas R-Car X5H, you need:

1. Renesas R-Car X5H board with NPX6 NPU
2. Renesas MWMX Runtime
3. Hugging Face CLI to download the model

Download

hf download Renesas/Darknet53-ONNX --repo-type=model --include "fp32/*"

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Benchmark Methodology

• HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon via the MWMX runtime (metawaremx_runtime CI pipeline, "APM50" ship-performance target)
• Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)
• Slices: only the 1 AI core slice was run for this model; the 12-core slice was skipped in the source export