CenterNet-R18 (ONNX) – Renesas X5H

Introduction

This repository hosts CenterNet with a ResNet18 backbone, targeting the Renesas R-Car X5H platform for object detection inference on the NPX6 NPU.

Model Architecture: CenterNet — keypoint-based, anchor-free object detector, ResNet18 backbone
Source Model: OpenMMLab config centernet_resnet18_140e_coco (no HuggingFace mirror of these weights; see model.source in .metadata.yaml)
Task: Object Detection
Dataset: COCO (inferred from checkpoint name)
Input Resolution: 512 × 512 (inferred from crop512 in the checkpoint name)
Parameters: not published — count them from the ONNX graph (sum(numpy_helper.to_array(t).size for t in model.graph.initializer))

Deployment Flow

The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time — no separate quantization step is required.

centernet_r18_..._optimized.onnx (FP32)
        │
        └─▶  MWMX Runtime  ──▶  INT8 auto-cast  ──▶  NPX6 NPU

Provided Artifacts

Artifact	Status	Notes
FP32 (ONNX)	✅ Published	`fp32/centernet_r18_8xb16_crop512_140e_coco.onnx` — auto-cast to INT8 by the MWMX toolchain at compile time (see Deployment Flow above); no separate INT8 file is shipped

Performance

Measured on Renesas R-Car X5H via the MWMX runtime (APM80 ship-performance CI pipeline).

Benchmark configuration: Single NPU · Batch size: 1 · Input: 3 × 512 × 512 (inferred)

Runtime	Precision	Device	Latency (ms)	Type
MWMX Runtime	INT8 (auto)	X5H · 1× NPU · 1 Core · 850 MHz	11.978	Measured
MWMX Runtime	INT8 (auto)	X5H · 1× NPU · 1 Core · 850 MHz	11.989	Measured (2026-09-16)
MWMX Runtime	INT8 (auto)	X5H · 1× NPU · 12 Cores · 850 MHz	3.467	Measured

Accuracy

TBD — not yet measured/published for this repo.

Runtime Details

MWMX Runtime

Engine: Renesas MWMX (Middleware MX) native inference runtime
Input format: FP32 ONNX (compiled by the MWMX toolchain)
NPU execution precision: INT8 (auto-cast by MWMX toolchain)
Execution target: NPX6-48K NPU on R-Car X5H

Prerequisites

To run inference on Renesas R-Car X5H, you need:

Renesas R-Car X5H board with NPX6 NPU
Renesas MWMX Runtime
Hugging Face CLI to download the model

Download

hf download Renesas/CenterNet-R18-ONNX --repo-type=model --include "fp32/*"

Benchmark Methodology

HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon via the MWMX runtime (metawaremx_runtime CI pipeline, "APM80" ship-performance target)
Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)
Slices: results reported for both 1 AI core and 12 AI cores per NPU instance

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