Patent ID: 8854389

Claim:
A computing system, comprising: a first storage circuit to store a plurality of entries, said plurality of entries corresponding to a listing of a number of input pixels to fetch in correct sequence order for a particular video scaling operation on a video frame; a second storage circuit to store sets of coefficient values in correct sequence order for said particular video scaling operation on said video frame, said correct sequence order of said coefficient values being a function of a scaling factor and an output pixel; a shift register; controller logic circuitry to repeatedly perform the following to setup a next output pixel value calculation: linearly increment a prior address value for said first storage circuit to determine a next address value for said first storage circuit; fetch a next entry from said first storage circuit at said next address value; fetch a number of pixel values, said next entry used to determine said number of pixel values that are fetched; enter said fetched pixel values into said shift register; linearly increment a prior address value for said second storage circuit to determine a next address value for said second storage circuit; fetch a next set of coefficients from said second storage circuit at said next address value for said second storage circuit; arithmetic logic circuitry to repeatedly perform the following to calculate a next output pixel value: perform a mathematical operation with said shift register's contents and next set of coefficients fetched by said controller logic circuitry.