Patent ID: 7095389

Claim:
An active matrix display device comprising: a plurality of gate signal lines disposed in a predetermined direction on a substrate; a plurality of pixel element selection transistors provided for the gate signal lines, a gate of each of the transistors being connected to a corresponding gate signal line; a pixel element electrode provided for each of the pixel element selection transistors, said pixel element electrodes being disposed in a matrix configuration and connected to corresponding pixel element selection transistors; a first substrate having a plurality of storage capacitor elements thereon, the pixel element electrodes being connected to corresponding capacitance elements; a second substrate having a common electrode thereon disposed over the pixel element electrodes; a liquid crystal layer sealed between the first and second substrates; and a plurality of retaining circuits which are provided for the pixel element electrodes and hold image signals, wherein the active matrix display device operates under two operation modes, one of said two operation modes being a normal operation mode in which the image signal is applied between the pixel element electrode and the common electrode for driving the liquid crystal layer, another of said two operation modes being a memory mode in which the image signal held by the retaining circuit determines an application of a voltage to the pixel element electrode, at least a portion of one of the retaining circuits is disposed under a pixel element electrode next to the pixel element electrode corresponding to said one of the retaining circuits, and a difference in capacitance between two neighboring pixel elements, said capacitance being generated between the pixel element electrode and the storage capacitor element, between the pixel element and wiring and between the pixel element and elements of the retaining circuit, is equal to or less than one fiftieth of a sum of a capacitance generated between the display electrode and the common electrode through the liquid crystal layer and a capacitance of the storage capacitor element.