Patent ID: 8839170

Claim:
A method comprising: inputting average power consumption goals and timing delay goals for an integrated circuit chip design into a computerized device; identifying a plurality of valid temperature and voltage combinations that allow integrated circuit chips produced according to said integrated circuit chip design to operate within said average power consumption goals and said timing delay goals, using said computerized device; selecting temperature cut points from said valid temperature and voltage combinations for each of said integrated circuit chips using said computerized device; calculating a power consumption amount of each of said temperature cut points using said computerized device; adjusting said temperature cut points based on said calculating of said power consumption amount until said temperature cut points achieve said average power consumption goals; testing each of said integrated circuit chips using testing equipment operatively connected to said computerized device; recording in memory of said integrated circuit chips said temperature cut points; and calculating an average system power, using said computerized device, based on said testing and said power consumption amount of each of said temperature cut points.