Patent ID: 8049298

Claim:
An integrated circuit device, comprising: a first dielectric plug formed in a substrate so that an upper surface of the first dielectric plug is located below an upper surface of the substrate, the first dielectric plug comprising a layer of first dielectric material formed on a layer of second dielectric material; a second dielectric plug of a third dielectric material formed on the upper surface of the first dielectric plug and extending through a layer of fourth dielectric material formed overlying the upper surface of the substrate and a conductive layer formed overlying the layer of fourth dielectric material, wherein the second dielectric plug contacts a portion of the layer of fourth dielectric material and the conductive layer; a layer of fifth dielectric material overlying the conductive layer; and an other conductive layer overlying the layer of fifth dielectric material; wherein an upper surface of the fifth dielectric material is located at a depth below an upper surface of the second dielectric plug.