Patent ID: 7825433

Claim:
A semiconductor device comprising: an element isolation insulating film which is provided so as to enclose an element forming region of a semiconductor substrate whose main component is silicon and is composed of an insulating material whose main component is silicon oxide; a gate electrode which is formed at a part of a region above the element forming region via a gate insulating film; diffused layers which are formed in the semiconductor substrate so as to sandwich a channel region below the gate electrode; first semiconductor regions which are formed between the diffused layers and the element isolation insulating film, and in contact with the diffused layers, an upper surface position of a region where the first semiconductor regions are close to the element isolation insulating film being lower than a lowermost surface position of the diffused layers, the first semiconductor regions being composed of semiconductor material whose lattice constant differs from that of silicon and having the same conductivity type as that of the diffused layers; a silicon nitride film which is formed in a region where the first semiconductor regions and the element isolation insulating film are close to each other and in contact with the upper surface of the first semiconductor regions and a side surface of the element isolation insulating film; second semiconductor regions formed on top of the first semiconductor regions and in contact with a side surface of the silicon nitride film, the second semiconductor regions being composed of semiconductor material whose lattice constant differs from that of silicon and having the same conductivity type as that of the diffused layers; and a conducting film which is formed at the surface of the second semiconductor regions.