Patent ID: 8595541

Claim:
A method for clocking a plurality of data processing modules which require different average clock frequencies and for transferring data between the modules, the method comprising the steps of: providing a common clock signal to each of clock gating circuits associated with each of the modules; deleting clock pulses from the common clock signal provided to the respective clock gating circuit in dependence on one of the clock frequencies required by the respective module; applying the clock pulses to the modules between which the data is to be transferred at times consistent with data transfer; performing a handshake operation between the modules between which the data is to be transferred; and gating the handshake operation such that the data is prevented from being transferred when appropriate patterns of the clock pulses are not available, wherein the clock pulses are applied to the modules at times consistent with data sourcing and sinking capabilities of the modules between which the data is to be transferred.