Patent ID: 7843275

Claim:
Frequency synthesizer circuitry comprising: delay line circuitry having a plurality of successive stages through which a reference clock signal successively propagates, each of the stages including an output buffer that draws an amount of current indicative of a state of the reference clock signal currently in that stage; circuitry for adding the currents drawn by the output buffers and for producing an intermediate signal indicative of a result of the adding; and further output buffer ring oscillator circuitry for using fluctuations in the intermediate signal to produce a final output signal having frequency responsive to the fluctuations, wherein the further output buffer ring oscillator circuitry comprises: an AC coupling capacitor for passing an AC component of the intermediate signal; a plurality of inverters through which the AC component is passed in series; and a feedback connection including a resistor from an output of a last of the plurality of inverters to an input of a first of the plurality of inverters.