Patent ID: 8912636

Claim:
A semiconductor device, comprising: a circuit base including: a chip mounting area, first outer leads, second outer leads opposed to the first outer leads via the chip mounting area, an electric connection area provided between the first outer leads and the chip mounting area, a fixing area, provided between the first outer leads and the electric connection area, having a first area and a second area, first inner leads, connected to the first outer leads, having leading ends extending to the electric connection area, and second inner leads, connected to the second outer leads and routed from the second outer leads toward the first outer leads via the chip mounting area, having leading ends extending to the second area of the fixing area; a semiconductor chip, mounted on the chip mounting area of the circuit base, having electrode pads arranged along at least one outline side; metal wires electrically connecting the electrode pads of the semiconductor chip and the first and second inner leads; an adhesive tape affixed to portions of the first inner leads which are located in the first area of the fixing area and portions of the second inner leads which are located in the second area of the fixing area so as to fix collectively the first and second inner leads; and a resin sealing part sealing the semiconductor chip together with the metal wires, wherein the first inner leads have first depressed portions, and the second inner leads have second depressed portions.