Patent ID: 8037442

Claim:
A method for scaling an I/O-cell placement during die-size optimization, the method comprising: receiving an initial die-size for a die and an initial I/O-cell placement for a set of I/O cells, wherein the initial die-size includes an initial width and an initial height; receiving a target die-size for the die, wherein the target die-size includes a target width and a target height; determining die-size changes between the initial die-size and the target die-size, which includes determining a width change from the initial width to the target width and a height change from the initial height to the target height; identifying an available space between each pair of adjacent I/O cells in the set of I/O cells by subtracting a minimum space requirement from a distance between the pair of adjacent I/O cells; and scaling, by computer, the initial I/O-cell placement so that a total amount of shrinking or expanding of available spaces between pairs of adjacent I/O cells along a given side is substantially equal to a difference between the target die-size and the initial die-size along the given side.