Patent ID: 8294492

Claim:
An ultra-low-power transconductance device comprising: a series connection of a transistor of a first channel type and a transistor of a second channel type, the first channel type having a different polarity than the second channel type, the transistors each having a source, a drain and a gate, wherein the source of the transistor of the first channel type is coupled with the source of the transistor of the second channel type, and the drain of the transistor of the first channel type is coupled with the gate of the transistor of the second channel type, the transistor of the second channel type having a sufficient resistance between its drain and source, that a drain-source voltage drop across the transistor of the second channel type is at least 40% of a voltage drop across both transistors, wherein the transistors of the first channel type and the transistors of the second channel type are enhancement-type transistors.