Patent ID: 8115562

Claim:
An oscillation circuit, comprising: an amplifier comprising a CMOS logic inverter circuit, said amplifier having an input terminal and an output terminal; a piezoelectric oscillator and a feedback resistor interconnected in a parallel manner, a first terminal of said piezoelectric oscillator connected to said amplifier input terminal and a second terminal of said piezoelectric oscillator connected to said amplifier output terminal; and a control circuit, comprising a CMOS logic circuit, for: clamping input level of said amplifier and an output level of said amplifier, thereby halting an oscillation before an oscillation start-up signal has been received as an external input signal to said control circuit; unclamping the input and output levels at a beginning of an oscillation start-up, upon receiving said oscillation start-up signal; and supplying a pulse signal to an output terminal of said amplifier a prescribed period of time after the beginning of the oscillation start-up.