Patent ID: 8202796

Claim:
A method of forming conductive paths to electrical contacts of transistors in an integrated circuit without the need for wire bonding, comprising: placing a transparent layer on a substrate surface that is opposite the electrical contacts; masking the transparent layer with a photoresist to define via locations that are aligned with the electrical contacts; etching through the transparent layer within a region defined by the mask with a first reactive ion etch; and etching a via through a silicon carbide substrate of a transistor to each respective source, gate, and drain contact on an epitaxial layer of a transistor, in which the epitaxial layer is formed of a material other than silicon carbide, the source and drain contacts are formed from material that exhibits ohmic behavior when placed on the epitaxial layer, and the gate contact is formed of material that exhibits rectifying behavior when placed on the epitaxial layer, and wherein etching the via to the source, gate, and drain contacts comprises the steps of etching the silicon carbide substrate using an etchant that removes silicon carbide but does not remove the epitaxial layer so that the etching of the silicon carbide substrate stops at the epitaxial layer and thereafter etching the epitaxial layer using an etchant that removes the epitaxial layer but does not remove silicon carbide or the materials forming the source, gate, and drain contacts so that etching the epitaxial layer stops at the source, gate, and drain contacts.