Patent ID: 7345701

Claim:
A memory providing apparatus for an image data interpolation in an image processing system having an image sensor outputting line image data from a sensed image, comprising: a readable and writable single memory; a buffer register having a prior data area storing first line image data, which has been stored in the memory, in a unit of 2 m bits, and having a present data area storing second line image data, which is inputted in a unit of m bits, in a unit of the 2 m bits; and a memory controller providing the memory with a chip enable signal, a write enable signal, and an address indicating locations of the first and second line image data stored in the buffer register, reading and writing the first and second line image data from and on the memory, and outputting the first and second line image data and a third line image data, which is inputted from the image sensor wherein the memory comprises a 4 m bits memory cell having upper and lower areas storing in a memory cell unit of 2 m bits data, respectively, which are readable and writable by the memory controller, and wherein the memory controller controls the chip enable signal and the write enable signal to be enabled and disabled, respectively, and reads the first line image data from the memory when the chip enable signal and the write enable signal are enabled and disabled, respectively, to store the first line image data in the prior data area of the buffer register, and the memory controller controls the chip enable signal and the write enable signal to be enabled, and stores the first and second line image data, which have been stored in the buffer register, in the memory in a unit of the memory cell unit.