Patent ID: 7238988

Claim:
A semiconductor memory device, comprising: an SOI substrate including a semiconductor layer of a first conduction type formed on an insulator film; a plurality of memory cells each formed on said SOI substrate as a transistor, said transistor including diffusion layers of a second conduction type formed with the bottoms reaching said insulator film, a gate electrode formed on a gate insulator above said semiconductor layer as sandwiched between said diffusion layers, and a body region formed as a region of said semiconductor layer surrounded by said diffusion layers, said gate electrode and said insulator film and electrically separated from others to store data depending on a charge storage state; and a silicide film formed in said diffusion regions, wherein said silicide film has a thickness substantially same as that of said semiconductor layer, and wherein said silicide film has the bottom located in the vicinity of an interface between said insulator film and said semiconductor layer.