Patent ID: 7655988

Claim:
A multi-channel transistor device comprising: two active regions that are in the shape of laterally spaced mesa structures in a line on a substrate; active expanding regions extending outwardly from opposing upper portions of side surfaces of each of the two active regions, and extending laterally to connect the upper portions of the side surfaces of each of the two active regions; first and second channel bars extending in a lengthwise direction between the two active regions that face each other, wherein the first and second channel bars are defined as a portion of the active expanding regions that connect the upper portions of the side surfaces of each of the two active regions, such that a channel is provided by the first and second channel bars between the two active regions; a gate covering and surrounding an outer surface of each of the first and second channel bars; a gate dielectric layer between portions of the gate and the first and second channel bars; and a source/drain region formed in a region of each of the two active regions and the active expanding regions adjacent to the gate.