Patent ID: 8665884

Claim:
A system comprising: a plurality of nodes, at least one of the plurality of nodes configured to insert, on a per-virtual link basis, a delay value into a delay field of a frame corresponding to the respective virtual link, wherein the delay value represents latency of frames of the respective virtual link; and a switch having a plurality of ports, each port coupled to one of the plurality of nodes; wherein the switch is configured to route frames received from the plurality of nodes to one or more of the plurality of nodes; and wherein at least one of the plurality of nodes is configured to store frames received from the switch in a buffer and to update the delay value in the delay field to reflect the end-to-end system delay; wherein the at least one of the plurality of nodes configured to insert a delay value is configured to determine, on a per-virtual link basis, whether to insert a static delay value, a dynamic delay value, or a combination of static and dynamic delay values; wherein a dynamic delay value is a value that is measured by the respective at least one of the plurality of nodes, and a static delay value is a value that is configured a priori and stored in the respective at least one of the plurality of nodes; wherein the at least one node is configured to determine the delay value to be inserted based on one or more of a link ID of the corresponding frame, an Internet Protocol (IP) source address of the corresponding frame, and IP destination address of the corresponding frame, a User Datagram Protocol (UDP) source port of the corresponding frame, and a UDP destination port of the corresponding frame.