Patent ID: 8289085

Claim:
An amplifier circuit having an input port and an output port, the amplifier circuit comprising a pair of amplifying devices, each of the amplifying devices having an input and an output; an input balun having an input port coupled to the input port of the amplifier circuit and having first and second output ports coupled to respective ones of the input ports of said pair of amplifying devices and having a bypass port; an output balun having first and second input ports coupled to respective ones of the output ports of said pair of amplifying devices and having an output port coupled to the output port of the amplifier circuit; a bypass circuit coupled to the first and second output ports of said input balun and configured to selectively present first and second impedance characteristics to the first and second output ports of said input balun such that in response to the first impedance characteristic, RF signals fed to the input port of said input balun are coupled to respective ones of said first and second amplifying devices and in response to the second impedance characteristic, RF signals fed to the input port of said input balun are coupled to the bypass port of said input balun; an RF signal path coupled between the bypass port of said input balun and the output port of the amplifier circuit; and a control circuit coupled to said bypass circuit, said control circuit for receiving at least one input signal, the at least one input signal corresponding to at least one of: a feedback signal; or a coupled signal and in response to at least one signal characteristic of the at least one of the feedback signal or coupled signal having a value above a threshold value, said control circuit provides a signal having a first value to said bypass circuit switch element and in response to at least one signal characteristic of the at least one of the feedback signal or coupled signal having a value below a threshold value, said control circuit provides a signal having a second value to said bypass circuit.