Patent ID: 7710299

Claim:
A demodulating method comprising: receiving a first analog signal at a first rate; receiving a second analog signal at the first rate; multiplexing the first analog signal and the second analog signal to generate a multiplexed analog output; applying an analog-to-digital conversion (ADC) to the multiplexed analog output to generate a multiplexed digital output, the ADC being applied at a second rate, wherein the second rate is substantially equal to the first rate multiplied by a total number of input analog signals; and demultiplexing the multiplexed digital output to generate a first digital output having a first bitstream and a second digital output having a second bitstream corresponding to the first analog signal and the second analog signal, respectively; wherein applying the ADC conversion includes: determining, using a front-end, the most significant bits (MSB) of the multiplexed analog output and generating a residue; receiving, using a back-end, the residue and determining the least significant bits (LSB) of the multiplexed analog output; combining the MSB and the LSB using a digital error-correction circuit to generate the multiplexed digital output.