Patent ID: 7682847

Claim:
A method for testing different fabrication process recipes, the method comprising: fabricating at least one integrated circuit device using a control recipe on at least one wafer of a plurality of wafers; fabricating at least another integrated circuit device using another control recipe on at least another wafer of the plurality of wafers; programming each of the at least one integrated circuit device and the at least another integrated circuit device with a respective identification that specifies a corresponding wafer of the plurality of wafers used during fabrication of a corresponding integrated circuit device; and testing the at least one integrated circuit device fabricated in accordance with a control recipe and testing the at least another integrated circuit device fabricated in accordance with another control recipe other than the control recipe in a same procedure, test data generated for the at least one integrated circuit device fabricated in accordance with a control recipe associated with its respective identification and test data generated for the at least another integrated circuit device fabricated in accordance with another control recipe associated with its respective identification.