Patent ID: 7552404

Claim:
A method for designing a semiconductor integrated device, comprising the steps of: specifying a first interface circuit unit to be formed in a first circuit unit to which electric power is supplied from first power supply wiring; specifying a second interface circuit unit to be formed in a second circuit unit to which electric power is supplied from second power supply wiring, the second interface circuit unit configured to input and/or output a signal to and from the first interface circuit unit; and arranging, by using a computer, the first interface circuit unit and the second interface circuit unit closely to each other in accordance with a predetermined placement rule, wherein an arrangement of the first interface circuit unit and the second interface circuit unit determined according to the predetermined placement rule reduces a wiring resistance in an electrostatic discharge current path within the semiconductor integrated device, and wherein the arrangement according to the predetermined placement rule is independent of a configuration of other circuits within the semiconductor integrated device.