Patent ID: 6993730

Claim:
A method of verifying combinational circuits comprising: choosing a cutpoint candidate pair from a group of at least one cutpoint candidate pairs, each cutpoint candidate pair including two circuits; determining whether or not the circuits in the chosen cutpoint candidate pair are equivalent to one another; when the circuits in the chosen cutpoint candidate pair are found to be equivalent, storing a record of the equivalency of the two circuits in an equivalence data structure; and processing for replacement, the processing for replacement comprising: choosing a net within a circuit in the chosen cutpoint candidate pair; determining, using the equivalence data structure, other nets equivalent to the chosen net; selecting one of the other nets which has a closest stage number to the other circuit in the chosen cutpoint candidate pair, amongst all of the other nets; if the selected net has a closer stage number to the other circuit than does the chosen net, constructing a new sub-circuit using the equivalence data structure; and replacing the chosen net by the new sub-circuit.