Patent ID: 7190361

Claim:
An image display device comprising: a display panel having a plurality of data lines and a plurality of gate lines; a plurality of data-line driver circuits electrically connected to said data lines; a plurality of scanning-line driver circuits electrically connected to said gate lines; a memory; an interface printed circuit board; and a controller provided on said interface printed circuit board, said controller including a display mode selecting terminal; said controller being capable of varying a clock frequency supplied to said data-line driver circuits from a high-speed state to a low-speed state in accordance with an external voltage applied to said display mode selecting terminal; wherein, when said clock frequency is in the low-speed state, display data supplied to said controller from outside the image display device is temporarily stored in said memory, and subsequently transmitted to said display panel; and wherein, when said clock frequency is in the high-speed state, display data from outside the image display device is transmitted directly to said display panel.