Patent ID: 7847347

Claim:
A semiconductor device comprising: (a) a semiconductor substrate of a first conductivity type; (b) a gate trench formed in a main surface of the semiconductor substrate; (c) a gate insulating film formed over an inner wall and a bottom portion of the gate trench; (d) a gate electrode formed so as to fill the gate trench and a portion of which protrudes from the semiconductor substrate; (e) a sidewall formed over a side wall portion of the gate electrode protruding from the semiconductor substrate such that the height of an uppermost portion of the sidewall is higher than the height of an uppermost portion of the gate electrode; (f) a source region of the first conductivity type, formed so as to be adjacent to the gate electrode; (g) a first semiconductor region formed so as to be adjacent to the source region and having a second conductivity type that is different from the first conductivity type; (h) a drain region of the first conductivity type, formed in an opposite surface to the main surface of the semiconductor substrate; (i) a first metal silicide film formed over the gate electrode; and (j) a second metal silicide film formed over the source region and the first semiconductor region, wherein the source region and the first semiconductor region are electrically coupled to each other by the second metal silicide film.