Patent ID: 7209391

Claim:
A nonvolatile semiconductor memory device, comprising: a memory cell array having a plurality of memory cells; and a writing controller for writing data to said memory cell array, wherein said memory cell array stores data in a nonvolatile state with respect to each memory cell pair composed of two memory cells, the data storing being executed based on a difference in memory information between said two memory cells, said writing controller is capable of individually setting said memory information for each of said memory cells of said memory cell array, each of said memory cells of said memory cell array is a memory cell transistor having a control gate and a floating gate, said writing controller sets said memory information of said memory cell by setting a threshold voltage of said memory cell of said memory cell array, and said nonvolatile semiconductor memory device further comprising a plurality of differential sense amplifiers, each of which for amplifying an output difference of said two memory cells included in the corresponding memory cell pair for outputting, wherein said writing controller executes writing data of the same value to plural pairs of said memory cell pairs, and said nonvolatile semiconductor memory device further comprises a decision element, wherein said decision element obtains a majority logic based on outputs from differential sense amplifiers among said plurality of differential sense amplifiers, each of said differential sense amplifiers being provided in a correspondence relationship to each of said plural pairs of said memory cell pairs, thereby to decide the data written to said plural pairs of said memory cell pairs for outputting.