Patent ID: 7016490

Claim:
A high voltage isolation barrier structure, comprising: a circuit board comprising a substrate, the substrate comprising a first side and a second side, the first side having a first circuitry and a second circuitry; a capacitive structure comprising: a plurality of first electrodes disposed on the first side of the substrate; a plurality of second electrodes disposed on the second side of the substrate; a plurality of conductive vias through the substrate; and wherein the substrate intermediate the plurality of first and second electrodes functions as a dielectric material within the capacitive structure; and the plurality of first electrodes is electrically coupled to said first circuitry; and the plurality of conductive vias electrically couples the plurality of second electrodes to the second circuitry; and the circuit further comprises a substrate having a first substrate and a second substrate, and the capacitive structure comprises: a first electrode disposed on a first side of the first substrate; a second electrode disposed on a first side of the second substrate; a third electrode disposed on a second side of the first substrate and the second substrate, where the first substrate is stacked on top of the second substrate; a first conductive via through the first substrate, the third electrode, and the second substrate connecting the first electrode and the second electrode and including a high voltage isolation barrier between the first conductive via and the third electrode; a second conductive via through one of the first substrate or the second substrate connecting to the third electrode; and wherein the substrate intermediate the first, second and third electrodes functions as a dielectric material within the capacitive structure.