Patent ID: 8243815

Claim:
A graphics processing unit (GPU) comprising: a decoder configured to decode a first and a second deblocking filter acceleration instruction, the first and second deblocking filter acceleration instructions both associated with a deblocking filter used by a particular video decoder; and a video processing unit configured to receive first parameters encoded by the first deblocking filter acceleration instruction, and to determine a first memory source specified by the received first parameters as one of a plurality of memory sources located on the GPU, and to receive second parameters encoded by the second deblocking filter acceleration instruction, and to determine a second memory source specified by the received second parameters as one of the plurality of memory sources located on the GPU, wherein the video processing unit is further configured to load a first block of pixel data from the determined first memory source, and to apply the deblocking filter to the first block of pixel data, and to load a second block of pixel data from the determined second memory source, and to apply the deblocking filter to the second block of pixel data.