Patent ID: 7142176

Claim:
A method of driving a plasma display panel having a plurality of display electrodes and a plurality of address electrodes arranged orthogonally to each other between a pair of substrates defining a discharge space therebetween, adjacent display electrodes defining respective display lines therebetween by corresponding surface discharge, cells being defined at positions of intersections of the display lines and the address electrodes, a respective, single display electrode between two adjacent first and second display lines being utilized as a scan electrode at the time of producing an address discharge to select a cell to illuminate, the method comprising: forming a wall voltage of a charge state between a portion of the scan electrode on the first display line side and the display electrode adjacent to the first display line, such that a discharge is not generated during an address period, while forming a wall voltage of a charge state between a portion of the scan electrode on the second display line side and the display electrode adjacent to the second display line, so as to generate an address discharge in the second display line; forming a wall voltage of a charge state between the portion of the scan electrode on the second display line side and the display electrode adjacent to the second display line, such that a discharge is not generated during an address period, while forming a wall voltage of a charge state between the portion of the scan electrode on the first display line side and the display electrode adjacent to the first display line so as to generate an address discharge in the first display line; and generating surface discharges simultaneously in the first and second display lines, thereby to achieve progressive display.