Patent ID: 8774346

Claim:
A gate driving circuit comprising a plurality of shift registers sequentially connected and respectively supplied scan signals to a plurality of gate lines of a display device, each shift register comprising: an input unit which outputs a forward or backward input signal to a first node by an output signal from a previous or subsequent shift register of the shift register; an inverter unit which connects with the first node, generates an inverting signal for a signal of the first node, and outputs the inverting signal to a second node; an output unit which comprises a pull-up unit for activating a first clock signal by the signal of the first node and outputting the first clock signal as an output signal to corresponding gate line, and a pull-down unit for activating and outputting a pull-down output signal to corresponding gate line by a signal of the second node; and a reset unit which periodically resets the first node by a second clock signal, wherein the inverter unit is controlled by the second clock signal.