Patent ID: 7888711

Claim:
A device, comprising: a substrate including circuitry fabricated on the substrate; and a cross-point array in contact with and fabricated directly on top of the substrate, the cross-point array including a plurality of vertically stacked memory layers, each memory layer including a plurality of first cladded conductors, a plurality of second cladded conductors, and a plurality of memory devices, each memory device is positioned at an intersection of one of the plurality of first cladded conductors with one of the plurality of second cladded conductors and includes a terminal electrically coupled with its respective first cladded conductor and another terminal electrically coupled with its respective second cladded conductor, the plurality of first and second cladded conductors are electrically coupled with the circuitry in the substrate, at least a portion of the circuitry is operative to perform data operations on the cross-point array, and each memory device including a non-volatile two-terminal memory element operative to store data as a plurality of conductivity profiles, each non-volatile two-terminal memory element including a conductive metal oxide (CMO) layer having a crystallized portion that is in contact with a first electrically insulating layer having a thickness of less than approximately 50 Angstroms, the CMO layer and the first electrically insulating layer are electrically in series with each other and with the terminal and the another terminal, and the crystallized portion of the CMO layer including mobile oxygen ions.