Patent ID: 7307860

Claim:
A method for comparing data stored by a content addressable memory cell with compare data, the method comprising: isolating a first capacitively coupled data node from a first data line and isolating a second capacitively coupled data node from a second data line; coupling the compare data to the first data line and coupling complementary compare data to the second data line; coupling first and second transistors in series between the first data line and the second data line, the first transistor having a gate coupled to the first data node and the second transistor having a gate coupled to the second data node; coupling a discharge transistor between a match node and ground, the discharge transistor having a gate coupled to a node between the first and second transistors; precharging the match node to a high logic level; and discharging the match node through the discharge transistor when the compare data and the stored data have the same logic level.