Patent ID: 7876618

Claim:
A method for operating non-volatile storage, comprising: performing an operation involving a selected block of a memory device, the memory device includes at least one unselected block, the selected block and the at least one unselected block each comprise strings of series-connected non-volatile storage elements, where a drain select gate is at one end of each string, and bit lines which are common to the selected block and the at least one unselected block are in communication with active regions of the drain select gates of the selected block and the at least one unselected block, the performing includes: during a first time period, biasing the drain select gates of the selected block at a first non-zero level via a first transfer transistor which is associated with the selected block, and biasing the drain select gates of the at least one unselected block at the first non-zero level via a second transfer transistor which is associated with the at least one unselected block; and during a second time period which follows the first time period, concurrently: (a) biasing the drain select gates of the selected block via the first transfer transistor at a second non-zero level, which is higher than the first non-zero level, and (b) floating a voltage of the drain select gates of the at least one unselected block.