Patent ID: 7419901

Claim:
A method of manufacturing a semiconductor device comprising the steps of: (a) forming a first inter-layer insulating film over the main surface of a semiconductor substrate and first wiring grooves in the first inter-layer insulating film; (b) forming a first metal film over the first inter-layer insulating film including the insides of the first wiring grooves and removing the first metal film outside the first wiring grooves by chemical mechanical polishing to form first wirings including the first metal film in the insides of the first wiring grooves; (c) forming a first barrier insulating film over the first inter-layer insulating film including the top portions of the first wirings; (d) forming a second inter-layer insulating film over the first barrier insulating film and second and third wiring grooves in the second inter-layer insulating film; (e) forming a second metal film over the second inter-layer insulating film including the insides of the second and third wiring grooves, and removing the second metal film outside the second and third wiring grooves by chemical mechanical polishing to form a fuse including the second metal film in the inside of the second wiring groove and a second wiring including the second metal film in the inside of the third wiring groove; (f) forming a second barrier insulating film thicker than the first barrier insulating film over the second inter-layer insulating film including the top portions of the second wiring and the fuse; (g) forming a first insulating film over the second barrier insulating film and an uppermost layer wiring over the first insulating film; and (h) forming a first opening reaching the surface of the second barrier insulating film in the first insulating film and a surface protective film above the fuse and a second opening reaching the uppermost layer wiring in the first insulating film and the surface protective film above the uppermost layer wiring.