Patent ID: 8178881

Claim:
An array substrate for a liquid crystal display device comprising: a gate line disposed on a substrate, and a gate electrode extending from the gate line; a data line crossing the gate line, wherein the data line includes a gate insulating layer, a semiconductor layer and a data metal layer; a pixel electrode formed of a first transparent metal layer in a pixel region defined by a crossing of the gate line and the data line; a source electrode extending from the data line, and a drain electrode spaced apart from the source electrode by a predetermined distance to expose a channel; a second transparent metal layer pattern formed on the data line, the source electrode and the drain electrode, wherein the second transparent metal layer connects the drain electrode and the pixel electrode to each other; and a partition wall formed in the vicinity of the second transparent metal layer on the pixel electrode, and wherein the partition wall comprises the gate insulating layer and the semiconductor layer which are stacked in sequence.