Patent ID: 6940155

Claim:
An IC package comprising: a chip carrier; a bare chip mounted on a first surface of said chip carrier; a plurality of first bumps for connecting a plurality of chip electrodes disposed on said bare chip to a plurality of first conductive pads disposed on the first surface of said chip carrier, respectively, said plurality of first conductive pads being classified into first and second groups; a plurality of vias for connecting a plurality of second conductive pads disposed on a second surface of said chip carrier opposite to the first surface to said first conductive pads of said first group, respectively; a plurality of second bumps connected to said second conductive pads, respectively; and at least a conductive line formed with said chip carrier and connected to one of said first conductive pads of said second group, wherein the conductive line is configured to communicate with a device external to the IC package; wherein high-frequency signals processed by said bare chip being transmitted by way of said conductive line, and signals other than the high-frequency signals are transmitted by way of said plurality of second bumps.