Patent ID: RE40597

Claim:
A method of evaluating a semiconductor device including a substrate, a dielectric layer, and an SOI layer formed in this order and further including a local oxidation of silicon (LOCOS) having a birdbeak portion, by using an evaluation test element group (TEG), wherein said evaluation TEG comprises: a first electrode extending in a first direction and a second direction crossing said first direction; a second electrode spaced from the first electrode and extending in said first and second directions, wherein a first length of said second electrode in said first direction is substantially equal to a first length of said first electrode in said first direction and a second length of said second electrode in said second direction is different from a second length of said first electrode in said second direction; a third electrode spaced from said first and second electrodes and extending in said first and second directions, wherein a first length of said third electrode in said first direction is substantially equal to said first length of said first electrode and a second length of said third electrode in said second direction is substantially equal to a length of said birdbeak portion in said second direction; and a plurality of test pads electrically connected to said first, second, and third electrodes, respectively, wherein said second lengths of said first and second electrodes are larger than said length of said birdbeak portion to the extent that said length of said birdbeak portion can be disregarded, said method comprising: disposing said TEG on said SOI layer via an oxide film; and finding a capacitance of said birdbeak portion in a third direction perpendicular to said first and second directions by applying a voltage between said test pads and said substrate.