Patent ID: 7216255

Claim:
In a computing system that includes one or more processors, persistent memory configured to store information that persists through power loss of the computing system, and system memory that may be directly accessed by the one or more processors, a method for recovering from a system failure, the method comprising the following: an act of receiving a message corresponding to a particular message transaction following a message exchange pattern; an act of loading state information for the message transaction from persistent memory to system memory in response to having received the message; an act of determining from the state information whether or not the processing instance associated with the particular message transaction is in recovery mode; and an act of branching process flow depending on whether or not the processing instance is in recovery mode; wherein the act of determining from the state information whether or not the processing instance associated with the particular message transaction is in recovery mode comprises an act of determining that the processing instance is in recovery mode; wherein the act of branching process flow depending on whether or not the processing instance is in recovery mode comprises an act of executing recovery code; and wherein the act of executing of the recover code comprises the following: an act of beginning execution of the recovery code; an act of determining that further communication is needed in order to fully recover; an act of storing the state information for the processing instance back into persistent memory upon determining that further communication is needed in order to fully recover; an act of receiving a second message; an act of reloading the state information from persistent memory to system memory in response to having received the second message; an act of continuing execution of the recovery code upon reloading the state information.