Patent ID: 8773105

Claim:
A voltage regulator comprising: a master circuit configured to provide a second reference voltage based on a first reference voltage and a supply voltage; a first filter configured to provide a filtered second reference voltage based on the second reference voltage, and to reject positive spikes in the second reference voltage; a second filter configured to provide a filtered supply voltage based on the supply voltage, and to reject negative spikes in the supply voltage; and a slave circuit configured to provide a third reference voltage based on the filtered second reference voltage and the filtered supply voltage, wherein the second filter comprises a first n-channel metal-oxide-semiconductor field-effect (NMOS) transistor, wherein a gate of the first NMOS transistor is configured to receive the supply voltage, and wherein a drain of the first NMOS transistor is configured to receive the supply voltage, and a first capacitor, wherein a first terminal of the first capacitor is electrically coupled to a source of the first NMOS transistor, and wherein a second terminal of the first capacitor is electrically coupled to ground, wherein the source of the first NMOS transistor is configured to provide the filtered supply voltage.