Patent ID: 7592705

Claim:
A semiconductor integrated circuit device comprising: a semiconductor substrate; a plurality of circuits in said semiconductor substrate; two substantially parallel, laterally adjacent spaced part polysilicon lines, insulated from said substrate and interconnecting said plurality of circuits; each of said plurality of polysilicon lines having a first end and a second end and having substantially the same length between said first end and said second end with electrical signals traversing from said second end to said first end; a metal line, spaced apart from said plurality of polysilicon lines, having two segments, with each segment having a length and wherein collectively the length of said two segments is substantially the length from said first end to said second end; each segment of said metal line for electrically connecting to a different one of said two polysilicon lines; said metal line arranged from said first end to said second end, with one of the two segments having a length substantially of x = 2 ⁢ L 7 and with the other segment having the length of L−X where L is the length between said first end and said second end.