Patent ID: 8080440

Claim:
A method for manufacturing a memory device, comprising: forming a sidewall support structure having a sidewall; depositing a first electrode layer on the sidewall; forming a first electrode from the first electrode layer; depositing an insulating sidewall spacer layer over the first electrode; depositing a conductive sidewall spacer layer on the insulating sidewall spacer layer; depositing a third sidewall spacer layer on the conductive sidewall spacer layer; forming a third sidewall spacer from the third sidewall spacer layer and a second electrode from the conductive sidewall spacer layer, the second electrode having a horizontal portion underlying the third sidewall spacer; applying a dielectric fill material to form a bridge surface including a top surface of the first electrode, a top surface of the insulating sidewall spacer layer, and a top surface of the second electrode; and forming a bridge of memory material between the first electrode and the second electrode on the bridge surface across the top surface of the insulating sidewall spacer layer, the bridge comprising a patch of memory material contacting the top surface of the first electrode and the top surface of the second electrode to define an inter-electrode path between the first electrode and second electrode having a path length defined by a thickness of the insulating sidewall spacer layer.