Patent ID: 7344956

Claim:
A method for separating one or more chips from bonded wafer scale substrate structures, the method comprising: providing a first substrate comprising at least one integrated circuit chip thereon, the one integrated circuit chip comprising a cell region and a peripheral region, the peripheral region comprising a bonding pad region, the bonding pad region comprising one or more bonding pads and an antistiction region surrounding each of the one or more bonding pads; coupling a second substrate comprising at least one or more deflection devices thereon to the first substrate; exposing at least one or more bonding pads on the first substrate; coupling a transparent member overlying the second substrate while forming a cavity region to allow the one or more deflection devices to move within a portion of the cavity region to form a sandwich structure including at least a portion of the first substrate, a portion of the second substrate, and a portion of the transparent member; forming a first scribe line on a first portion of the transparent member while maintaining a vicinity of the first scribe line associated with a first portion of the first substrate free from the first scribe line; forming a second scribe line on a second portion of the transparent member and a second portion of the first substrate, the first portion of the first substrate and the second portion of the first substrate having the antistiction region formed between the first portion and the second portion; causing a portion of the transparent member to be removed via the first scribe line and the second scribe line and exposing the antistiction region and the one or more bonding pads on the first substrate.