Patent ID: 8709866

Claim:
A method of forming an integrated circuit package, comprising: forming adhesion layers over bond pad regions of a semiconductor die; forming electrically conductive inner layers over the adhesion layers, the electrically conductive inner layers comprising one or more of B, Co, Cr, Ni, P, Pt, Ta, Ti, V and W; forming electrically conductive outer layers over the inner layers; directly contacting the electrically conductive outer layers with electrically conductive balls; providing z-axis conductive material over and between the balls, the z-axis conductive material entirely surrounding exposed surfaces of the balls; utilizing electrically conductive surfaces of a piece to press the z-axis conductive material until the surfaces penetrate through the z-axis material to directly contact the balls; the z-axis conductive material being in a non-conductive form as the z-axis conductive material is formed over and between the balls; some of the z-axis conductive material being compressed when the z-axis conductive material is pressed with the electrically conductive surfaces and being transformed to a conductive form; the conductive form of the z-axis conductive material being directly adjacent the balls; and utilizing vibrational energy with a frequency of at least about one kilohertz to bond the electrically conductive outer layers to the electrically conductive balls; and utilizing vibrational energy with a frequency of at least about one kilohertz to bond the electrically conductive surfaces to the electrically conductive balls.