Patent ID: 8692596

Claim:
A method for synchronizing a system of repeating clock signals at a plurality of clock inputs on respective ends of point-to-point transmission lines of varying lengths, comprising: a. receiving a repeating master clock signal; b. generating source signals from the repeating master clock signal; c. determining whether any of the clock inputs are disabled, and if there are one or more disabled clock inputs, selecting one of the one or more disabled clock inputs and performing the following on a respective transmission line corresponding to the selected one of the disabled clock inputs: i. distributing the source signals through the respective transmission line with a transmission delay; ii. receiving reflected signals with a reflected delay from the end of the respective transmission line; iii. comparing source signals to reflected signals; iv. adjusting equally the transmission delay and the reflected delay to obtain adjusted transmission and reflected delays; v. repeating i, ii, iii, and iv until the source signals align with the reflected signals; and vi. distributing the master clock signal through the respective transmission line; and d. repeating c.