Patent ID: 8685814

Claim:
A method of manufacturing a complementary metal oxide semiconductor (CMOS) device, the method comprising: forming a first high-k gate dielectric over a first region and over a second region of a substrate; forming a first gate material over the first high-k dielectric; forming a first hard mask directly over the first gate material; forming a first photoresist directly over the first hard mask; patterning the first photoresist; removing the first hard mask, the first high-k gate dielectric and the first gate material over the second region; forming a second high-k gate dielectric over the first region and over the second region; forming a second gate material over the second high-k dielectric; forming a second hard mask directly over the second gate material; forming a second photoresist directly over the second hard mask; patterning the second photoresist; removing the second hard mask, the second high-k gate dielectric and the second gate material over the first region; forming a positive channel metal oxide semiconductor (PMOS) transistor in the first region; and forming a negative channel metal oxide semiconductor (NMOS) transistor in the second region.