Patent ID: 8703606

Claim:
A manufacturing method of a semiconductor device, comprising: forming a first interlayer insulating film above a semiconductor substrate; forming a wiring layer in the first interlayer insulating film; forming a second interlayer insulating film above the first interlayer insulating film and the wiring layer; forming a first mask layer above the second interlayer insulating film and forming a second mask layer above the first mask layer; forming a first opening portion in the second mask layer; forming a resist layer including a second opening portion above the second mask layer at a position at least partially overlapping with the first opening portion; performing a first etching in which the first mask layer is etched while using the resist layer as a mask or the resist layer and the second mask layer as masks; performing a second etching in which the first mask layer is etched in a direction parallel to a surface of the semiconductor substrate after the performing the first etching; forming connection holes in the second interlayer insulating film by etching the second interlayer insulating film while using the first mask layer and the second mask layer as masks after the performing the second etching; forming wiring trenches in the second interlayer insulating film by etching the first mask layer and the second interlayer insulating film while using the second mask layer as a mask after the forming the connection holes; and forming a conductive film in the connection holes and the wiring trenches.