Patent ID: 7154946

Claim:
An equalizer for equalizing a return-to-zero (RZ) signal received from a communication channel, comprising: (a) an equalizer core for equalizing the received signal and for updating tap values; (b) a decision corrector for detecting and correcting misplaced pulses and double pulses in the equalized signal, wherein the decision corrector: (i) comprises a zero assertion counter that generates a clock synchronized with the timing of the received signal, and (ii) corrects the equalized signal by forcing zeroes in those portions of the equalized signal that the synchronized clock indicates should be RZ zeroes; and (c) an error calculator that generates an error signal based on the outputs of the equalizer core and the decision corrector, and passes that error signal to the equalizer core, and wherein the equalizer core updates the tap values based on the error signal received from the error calculator.