Patent ID: 7577781

Claim:
A data processing system comprising: a processor bus transferring data, said processor bus operating in accordance with a first specification; a processor coupled to said processor bus; a memory bus transferring data, said memory bus operating in accordance with a second specification; a memory coupled to said memory bus; a system bus transferring data, said system bus operating in accordance with a third specification; a device coupled to said system bus; and a controller coupled to said processor bus, said memory bus, and said system bus; wherein said controller has a plurality of data transfer modes, said data transfer modes including: a first mode in which data is bidirectionally transferred between said processor and said memory by directly transferring data through said processor bus, said controller and said memory bus, a second mode in which data is bidirectionally transferred between said memory and said device by directly transferring data through said memory bus, said controller and said system bus, and a third mode in which data is bidirectionally transferred between said device and said processor by directly transferring data through said system bus, said controller and said processor bus.