Patent ID: 7463011

Claim:
A switching regulator providing a constant output signal to an external circuit offering a load, said switching regulator comprising: a first circuit containing a plurality of switches and receiving an input signal which is potentially unregulated, wherein said plurality of switches can be turned on and off with a duty cycle based on a control parameter, said first circuit providing said input signal as an intermediate signal at time durations specified by said duty cycle; an impedance network providing an output signal by averaging the signal strength of said intermediate signal; a comparator comparing the strength of said output signal with a first signal to generate an error value in each of a plurality of successive iterations, said first signal being proportionate to a desired strength of said constant output signal; a controller controlling said control parameter in each iteration based on a plurality of error values generated by said comparator, wherein said plurality of error values comprise at least a present error value generated from a present iteration and a prior error value from an immediately preceding iteration, further wherein said control parameter being controlled to cause said impedance network to generate said constant output signal and an analog to digital converter (ADC) converting said prior error value and said present error value to a first digital code and a second digital code respectively, wherein said controller processes said first digital code and said second digital code to determine said control parameter; wherein said controller is operable to: set a temporary variable to a magnitude of said second digital code if said second digital code is greater than 0, and to 0 otherwise; setting a step size proportionate to said temporary variable; incrementing said duty cycle by said step size if said second digital code is greater than or equal to said first digital code, and maintain the same value for said duty cycle otherwise; and decrement said duty cycle by said step size if said temporary variable equals 0.