Patent ID: 8871598

Claim:
A method of making a semiconductor device comprising: depositing protective layers over a non-volatile memory gate structure on a memory region of a substrate, wherein the protective layers include a first oxide layer, a nitride layer over the first oxide layer, and a second oxide layer over the nitride layer; depositing a high-k dielectric layer over the protective layers and over a logic region of the substrate; depositing a metal gate layer over the high-k dielectric layer in the memory and logic regions; depositing a first polysilicon layer over the metal gate layer in the memory and logic regions; patterning and etching the memory and logic regions to form a logic gate in the logic region to remove the protective layers in the logic region, wherein the protective layers remain in the memory region after the etching; depositing a first layer of spacer material over the memory and logic regions; removing the first layer of spacer material, the nitride layer and the second oxide layer from the memory region; and etching the first oxide layer along with the first layer of spacer material to form first spacers on the non-volatile memory gate structure and the logic gate.