Patent ID: 6961390

Claim:
A non-causal channel equalization communication system, the system comprising: a multi-threshold decision circuit having an input to accept a non-return to zero (NRZ) data stream, an input to accept threshold values, and outputs to provide bit estimates responsive to a plurality of voltage threshold levels; a non-causal circuit having inputs to accept bit estimates from the multi-threshold decision circuit, the non-causal circuit comparing a current bit estimate to bit value decisions made across a plurality of clock cycles, the non-causal circuit having an output to supply a bit value for the current bit estimate determined in response to the non-causal bit value comparisons; a threshold circuit having an input to accept bit values from the non-causal circuit, an input to accept the NRZ data stream, and outputs to supply threshold values to the multi-threshold circuit that are adjusted in response to asymmetric noise in the NRZ data stream; and, wherein the non-causal circuit includes: a future decision circuit having inputs connected to the mutli-threshold circuit outputs, the future decision circuit having outputs to supply the current, first bit, estimate and a third bit value; a present decision circuit having inputs to accept the first bit estimate, the third bit value, and a second bit value, the present decision circuit comparing the first bit estimate to both the second bit value, received prior to the first bit estimate, and the third bit value, received subsequent to the first bit estimate, the present decision circuit having an output to supply the first bit value determined in response to comparing the first bit estimates to the second and third bit values; and, a past decision circuit having an input to accept the first bit value and an output to supply the second bit value.