Patent ID: 7413961

Claim:
A method of forming a strained channel transistor structure on a substrate, comprising the steps of: forming a source stressor recess comprising a deep source recess and a source extension recess; forming a drain stressor recess comprising a deep drain recess and a drain extension recess; and subsequently forming a source stressor in said source stressor recess and a drain stressor in said drain stressor recess whereby the step of forming source and drain stressor recesses is preceded by a step of forming a sacrificial layer above portions of the substrate where respective source and drain extension stressor recesses are to be formed and whereby the step of forming each of the source and drain stressor recesses further comprises the steps of: forming a first portion of the deep stressor recess; removing said sacrificial layer; subsequently forming a second portion of the deep stressor recess; and forming the extension stressor recess.