Patent ID: 8862832

Claim:
A method for processing a request to access global memory comprising: determining, for a first processor included on a first of a plurality of boards connected by a fabric, a logical address for a global memory location in a system global memory, each of said plurality of boards including a plurality of processors and a memory, said system global memory including a plurality of global partitions, said plurality of global partitions being physically located in the memories of said plurality of boards, the memory of each of the plurality of boards being logically divided into a plurality of partitions including one of the global partitions, a shared partition accessible to all processors on said each board, and a private partition including a plurality of segments of the memory whereby each of the plurality of segments of the private partition on said each board is used exclusively by a different one of the plurality of processors on said each board, wherein each of said plurality of processors on said each board uses a different one of a plurality of memory maps having a logical address range including a first logical address range portion that maps to one of the plurality of segments of the private partition used exclusively by said each processor, a second logical address range portion that maps to the shared partition of said each board, and a third logical address range portion that maps to any of the system global memory that is used by said each processor and is located on said each board; determining a first physical address for the logical address; determining whether the first physical address is included in a first global partition of said first board; if the first physical address is included in the first global partition, performing first processing including updating a first of the plurality of memory maps for the first processor to map a window of the third logical address range portion of the first processor's logical address space to a physical memory segment located within the first global partition, said first physical address being within the physical memory segment; and if the first physical address is included in a second of the plurality of global partitions physically located on one of the plurality of boards other than said first board, performing second processing to issue the request over the fabric, said request being to perform an operation accessing the first physical address.