Patent ID: 7243332

Claim:
A method for identifying a potentially problematic area in a mask layout, the method comprising: determining a process-sensitivity model using an on-target process model and one or more off-target process models, wherein the on-target process model models a semiconductor manufacturing process under nominal process conditions, wherein the one or more off-target process models model the semiconductor manufacturing process under process conditions that are different from the nominal process conditions, and wherein the process-sensitivity model models sensitivity to variations in process conditions; determining a gradient-magnitude of the process-sensitivity model; and identifying a problem area in a mask layout by: using the gradient-magnitude of the process sensitivity model; determining a problem-indicator by convolving the gradient-magnitude of the process-sensitivity model with a multidimensional function that represents the mask layout; and comparing the value of the problem-indicator with a threshold wherein identifying the problem area allows the problem area to be corrected, thereby improving the manufacturability of the mask layout; and wherein using the gradient-magnitude of the process-sensitivity model to identify the problem area reduces the computational time required to identify the problem area.