Patent ID: 7126510

Claim:
An integrated circuit, comprising: a calibration path including a device; a signal generator, comprising an oversampled n-bit digital-to-analog converter (DAC), coupled to the calibration path and to provide the calibration path with an adjustable calibration signal; and a controller coupled to the signal generator and the calibration path, the controller is to adjust the signal generator and a parameter associated with the device in the calibration path in response to an output signal provided by the integrated circuit so as to calibrate the device in the calibration path; wherein the oversampled n-bit DAC comprises: a digital pulse width modulator (PWM) to generate a digital waveform; and the oversampled n-bit DAC provides an analog calibration signal in accordance with the digital waveform, and wherein the adjustable calibration signal derived from the analog calibration signal is a DC reference voltage.