Patent ID: 7880170

Claim:
A thin film transistor array panel, comprising: a substrate; a first insulating layer formed directly on the substrate and having a trench; a gate electrode formed on the substrate and within the trench; a gate insulating layer formed on the gate electrode, the gate insulating layer and the first insulating layer being formed of different materials; a source electrode and a drain electrode formed on the gate insulating layer; an organic semiconductor layer formed on the gate insulating layer; a passivation layer formed on the substrate with a contact hole exposing the drain electrode; a pixel electrode contacting the drain electrode through the contact hole, wherein a dielectric constant of the gate insulating layer is greater than a dielectric constant of the first insulating layer, and wherein the gate insulating layer comprises maleimide-styrene, where the maleimide-styrene is a copolymer of permutated maleimide and permutated styrene.