Patent ID: 7467261

Claim:
A dual storage apparatus including a first memory and a second memory for respectively retaining identical data, and a selector for selecting either data read from the first memory or from the second memory based on a read control signal inputted into the selector, the dual storage apparatus comprising: a request management unit, when the read control signal has been inputted, attaching an identifier for identifying the read control signal to the inputted read control signal and outputting the read control signal and the identifier; a first main memory control unit reading data from the first memory based on the read control signal outputted from the request management unit, and outputting a set of data read from the first memory with the identifier attached to the read control signal outputted from the request management unit; a first sub memory control unit receiving the read control signal outputted from the request management unit and the data read from the first memory by the first main memory control unit, and outputting the data read from the first memory with the identifier attached to the read control signal outputted from the request management unit; a second main memory control unit reading the data from the second memory based on the read control signal outputted from the request management unit, and outputting a set of data read from the second memory with the identifier attached to the read control signal outputted from the request management unit; a second sub memory control unit receiving the read control signal outputted from the request management unit and the data read from the second memory by the second main memory control unit, and outputting the data read from the second memory with the identifier attached to the read control signal outputted from the request management unit; a synchronization checking unit verifying a coincidence of the identifier outputted from the first memory control unit and the identifier outputted from the first sub memory control unit, and a coincidence of the identifier outputted from the second main memory control unit and the identifier outputted from the second sub memory control unit; and a selector control unit controlling the selector based on a result of the verification performed by the synchronization checking unit.