Patent ID: 7825043

Claim:
A method for fabricating a capacitor in a semiconductor device, the method comprising: forming a bottom electrode of the capacitor over a semiconductor substrate, the bottom electrode having a non-planar shape; forming a Zr x Al y O z dielectric layer over the bottom electrode using an atomic layer deposition (ALD) method, wherein the Zr x Al y O z dielectric layer comprises a zirconium (Zr) component, an aluminum (Al) component and an oxygen (O) component mixed in predetermined mole fractions of x, y and z, respectively, the non-planar shape of the bottom electrode providing an increased contact area between the Zr x Al y O z dielectric layer and the bottom electrode; and forming a top electrode of the capacitor over the Zr x Al y O z dielectric layer, wherein the sum of the mole fractions of x, y and z in the Zr x Al y O z dielectric layer is approximately 1, wherein a ratio of the mole fraction of the Zr component (x) to the mole fraction of the Al component (y) is in a range of approximately 1:1 to 10:1, and wherein the forming of the Zr x Al y O z dielectric layer consists of the following sequence step: supplying a Zr source gas to enable Zr to be adsorbed on the bottom electrode, supplying a first purge gas to purge out non-adsorbed parts of the Zr source gas, supplying an Al source gas to enable Al to be adsorbed onto the Zr provided on the bottom electrode, supplying a second purge gas to purge out non-adsorbed parts of the Al source gas, supplying a reaction gas to react with the Zr and Al source gases provided on the target, thereby forming the Zr x Al y O z dielectric layer, wherein the reaction gas comprises an oxide gas, and supplying a third purge gas to remove non-reacted parts of the reaction gas.