Patent ID: 7826282

Claim:
A Random Access Memory for use in a hardware emulator, comprising: an array of memory cells arranged in columns and in rows, wherein a memory cell in the array is coupled to at least one word line and at least one bit line; and a plurality of switches within the Random Access Memory, at least one of the switches coupled between two of the memory cells to allow data to be copied from one of the two memory cells to the other of the two memory cells; wherein the array of memory cells include a plurality of memory cells of a first type and a plurality of memory cells of a second type, different than the first type; further including a sense amplifier coupled to the memory cells and a multiplexer coupled to a clock signal path, the multiplexer allowing a read of a memory cell of the first type during one phase of the clock and allowing a read of a memory cell of the second type during a second phase of the clock.