Patent ID: 8093114

Claim:
A method for making a semiconductor device with at least two gate regions, the method comprising: providing a substrate region including a surface; forming a gate dielectric layer on the surface; depositing a gate layer on the gate dielectric layer; patterning the gate layer to form a gate electrode region; forming spacer regions on the sides of the gate electrode region; forming a source region and a drain region in the substrate region on either side of the gate electrode region, respectively; removing at least a part of the gate electrode region to form a first gate region, a second gate region, and a gap region between the source region and the drain region, the gap region being between the first gate region and the second gate region; depositing an insulation material in the gap region to form an insulation region; wherein: a first channel region and a second channel region are formed between the source region and the drain region; the first channel region is under the first gate region; and the second channel region is under the second gate region.