Patent ID: 8739164

Claim:
An apparatus, comprising: a processor configured to execute a plurality of speculative memory access operations in a transactional mode as a single atomic transaction, including marking data accessed by the speculative memory access operations as being speculative data, and wherein the processor comprises: a detection unit configured to determine an implicit suspend condition by detecting at least one of: a control transfer in a thread being executed by the processor and detecting the processor is executing at a specified privilege level; and a transaction suspension unit configured to suspend the transactional mode of execution in response to receiving an indication of the implicit suspend condition, wherein in response to suspension of the transactional mode, the processor is configured to suspend marking data as speculative when the data is accessed by memory operations that are executed while the transactional mode is suspended; wherein the processor is configured to detect that the single atomic transaction has failed while the single atomic transaction is suspended, and wherein the processor is configured to abort the failed single atomic transaction, including by discarding the speculative data.