Patent ID: 7417929

Claim:
A data processing device in which the data processing device performs data read processing from a recording medium in synchronization with a read clock signal reproduced based on data written in the recording medium, and performs data write processing in said recording medium in synchronization with a write clock signal; the data processing device comprising: a write interruption control part that performs the following operation: when a write interruption instruction is input, said data write processing is interrupted, and prescribed information that indicates the tail of the data written before said interruption is fetched from the write data, and, when a write restart instruction is input, said data read processing is started, the tail of the data written before said interruption is determined from the read data based on said fetched information, and said data write processing is restarted after the tail of said determined write data; and a clock signal generating means that generates said write clock signal with a phase synchronized with said read clock signal wherein said write clock signal generating means comprises: a synchronizing means that synchronizes an input reference clock signal with said read clock signal, and, when said data write processing is restarted, holds the synchronization state before said restart, wherein said write clock signal generating means contains a first multiplicative part that generates said reference clock signal by multiplying by a prescribed multiplicative ratio the clock signal reproduced based on information pre-applied to said recording medium for specifying the data recording position on said recording medium, and wherein said write clock generating means comprises: a selecting means that selects and outputs said read clock signal when said write restart instruction is input, and selects and outputs said reference clock signal synchronized with said synchronizing means when said data write processing is restarted; and a second multiplicative means that multiplies the clock signal output from said selecting means by a prescribed multiplicative ratio and generates said write clock signal.