Patent ID: 7968960

Claim:
A method, comprising: defining a device region in a semiconductor substrate and isolation regions adjacent to the device region, the device region having a channel region and the isolation regions having strain-inducing regions laterally adjacent to the channel region, wherein each isolation region includes a trench filled with an amorphous semiconductor and each trench filled with the amorphous semiconductor has a top volume of the amorphous semiconductor extending across the trench, wherein the top volumes are adjacent to the device region and are the strain-inducing regions laterally adjacent to the channel regions; and straining the channel region with a desired strain for carrier mobility enhancement, wherein straining the channel region includes adjusting the top volumes of the trenches filled with the amorphous semiconductor to provide the desired strain, and adjusting the top volumes includes implanting at least one ion type into the amorphous semiconductor with an energy resulting in a peak implant in the top volumes of the trenches filled with the amorphous semiconductor.