Patent ID: 7768856

Claim:
A system that facilitates execution of operations in a memory, comprising: a regulation component that controls a reference voltage level associated with at least one of a word-line or a bit-line based at least in part on an operating temperature slope level associated with the memory to facilitate execution of operations in the memory; a memory array associated with the memory, the memory array includes a plurality of memory cells that are each respectively associated with a corresponding word-line and bit-line; an analyzer component that receives information relating to the memory to facilitate determining an optimal temperature slope level to be the operating temperature slope level associated with at least one type of operation; a data generation component that generates data associated with at least one trim bit; and a controller component that receives the data associated with the at least one trim bit and stores such data in a storage component, reads the data associated with the at least one trim bit when the memory is powered up and stores such data in a temporary storage where such data is used to facilitate selection of the at least one trim bit, the at least one trim bit is associated with at least one of the reference voltage or a current level.