Patent ID: 7119398

Claim:
A power-up and power-down circuit for use on an integrated circuit having circuits using a first power-supply voltage and a second power-supply voltage comprising: a first I/O pad; a second I/O pad; a third I/O pad; a fourth I/O pad; a fifth I/O pad; a bandgap reference; a voltage regulator set for the first voltage, having an input coupled to the first I/O pad and to circuits in the integrated circuit that use the second voltage, an output coupled to the second I/O pad, a reference input of the internal voltage regulator coupled to the bandgap reference, a first-voltage feedback input coupled to the third I/O pad, and an enable input; logic circuitry coupled to the fourth I/O pad and configured to drive the enable input of the voltage regulator in response to logic signals from the fifth I/O pad; and a fifth I/O pad coupled to circuits in the integrated circuit that use the second voltage.