Patent ID: 6856158

Claim:
A comparator circuit for a semiconductor test system for differential signals that are output from a device under test (DUT), comprising: a first pair of comparators having a DC comparator and an AC comparator which receives a first differential signal from the DUT; a second pair of comparators having a DC comparator and an AC comparator which receives a second differential signal from the DUT; a first latch circuit for latching output signals of the first pair of comparators at timings specified by strobe signals; a second latch circuit for latching output signals of the second pair of comparators at timings specified by strobe signals; a first serial-parallel converter for converting an output signal of the first latch circuit into a parallel signal; and a second serial-parallel converter for converting an output signal of the second latch circuit into a parallel signal; wherein the comparator circuit is formed of discrete components on a dielectric substrate.