Patent ID: 8706950

Claim:
A memory system comprising: a volatile memory that stores data of a sector size; a nonvolatile semiconductor memory from which data is read out in a page size and in which data is erased in a block size twice or a larger natural number times as large as the page size; a controller that controls the nonvolatile semiconductor memory, and manages data stored in the nonvolatile semiconductor memory in a first management size which is larger than the sector size and smaller than the page size; a first table that has registered an information of first failure areas of the first management size that have occurred in the nonvolatile semiconductor memory as a first number; and a second table that has registered an information of second failure areas of the block size that have occurred in the nonvolatile semiconductor memory as a second number; wherein the controller is configured to: register the information of the first failure areas in the first table, if the controller fails to correct errors of the data of the first management size when reading out the data from the nonvolatile semiconductor memory; register the information of the second failure areas in the second table, if an erasing operation is finished by a first mode when erasing the data from the nonvolatile semiconductor memory; and switch an operation mode to a read only mode and to not start processing for a data writing request even when the controller receives the data writing request from a host apparatus when the first number becomes larger than a first value or when the second number becomes larger than a second value.