Patent ID: 7709935

Claim:
A semiconductor device package ( 10 , 100 ) comprising: a molding compound ( 18 ) forming a portion of: a first package face ( 14 ), a second package face ( 12 ) opposite the first package face ( 14 ), and package side faces ( 16 ) extending between the first and second package faces ( 14 , 12 ); a semiconductor device ( 20 ) at least partially covered by the molding compound ( 18 ), the semiconductor device ( 20 ) including a plurality of I/O pads ( 38 ); and an electrically conductive lead frame ( 22 ) comprising: a plurality of posts ( 24 ) disposed at a perimeter of the package ( 10 , 100 ), each post ( 24 ) having a first contact surface ( 26 ) disposed at the first package face ( 14 ) and a second contact surface ( 28 ) disposed at the second package face ( 12 ) and having an edge surface extended entirely from the first package face to the second package face the semiconductor device ( 20 ) being positioned in a central region defined by the plurality of posts ( 24 ), and a plurality of post extensions ( 32 ), each post extension ( 32 ) having a third contact surface ( 34 ) disposed at the second package face ( 12 ), the plurality of post extensions ( 32 ) extending from the plurality of posts ( 24 ) toward the semiconductor device ( 20 ), each of the post extensions ( 32 ) including a bond site ( 36 ) formed on a surface of the post extension ( 32 ) opposite the second package face ( 12 ), at least one of the I/O pads ( 38 ) being electrically connected to the post extension ( 32 ) at the bond site ( 36 ), wherein the molding compound ( 18 ) is coplanar with side surfaces ( 60 ) of the posts ( 24 ) at the package side faces ( 16 ), and two package side faces ( 16 ) meet to form a square corner at each of four corner regions of the package ( 10 , 100 ).