Patent ID: 8184032

Claim:
An analog-digital converter with signal folding circuits, comprising at least two folding blocks, each block comprising a series of N+1 differential circuits of rank 1 to N+1, with N integer, and a series of N+2 load circuits of rank 1 to N+2 associated with the differential circuits of each series, the differential circuits of each block being juxtaposed and linked to one another by their outputs, each differential circuit having four inputs and two outputs, the first output of a differential circuit of rank j being linked to the second output of a preceding differential circuit of rank j−1 of the series and the second output of the differential circuit considered being linked to the first output of the following differential circuit of rank j+1, a first load circuit of rank j being linked to the first output of the differential circuit considered of rank j, this load circuit being shared with the preceding differential circuit of rank j−1 of the series, and a second load circuit of rank j+1 being linked to the second output of the differential circuit concerned of rank j, this load circuit being shared with the following differential circuit of rank j+1 of the series, the load circuits of even rank having an output connected to a first common output of the series and the load circuits of odd rank having an output connected to a second common output of the series, wherein there are provided for all the blocks an additional differential circuit of rank N+2 and an additional load circuit of rank N+3 connected to the second output of the additional differential circuit, the output of the latter load circuit not being linked to a common output of the series, and in that there is furthermore provided, in the first folding block, a differential circuit of rank 0 and a load circuit of rank 0 connected to the first output of the differential circuit of rank 0, the output of the load circuit of rank 0 not being linked to a common output of the first block.