Patent ID: 7812374

Claim:
A semiconductor device comprising a first MIS transistor on a first active region of a semiconductor substrate, the first MIS transistor including: a first gate insulating film provided on the first active region; a first gate electrode provided on the first gate insulating film; a first stressor insulating film provided on an upper face and side faces facing in a gate length direction of the first gate electrode such that first stress acts on a channel of the first MIS transistor in the gate length direction; a first base insulating film provided on side faces of the first gate electrode facing in a gate width direction; and a first side wall provided between the side faces of the first gate electrode facing in the gate length direction and the first stressor insulating film, wherein the side faces of the first gate electrode facing in the gate width direction are not covered with the first stressor insulating film, the first active region is surrounded by an isolation region formed in the semiconductor substrate, an edge of the first stressor insulating film in the gate width direction is located on a part of the first gate electrode existing on the isolation region, and the first side wall does not exist between the side faces of the first gate electrode facing in the gate width direction and the first base insulating film.