Patent ID: 7194400

Claim:
A method of creating compact result data sets of simulation processing of a hardware description language (HDL) model, said method comprising: receiving a HDL model including a plurality of design entities and a plurality of count event registers, wherein each of said count event registers is associated with a respective instance of an event of interest within said HDL model, wherein said plurality of count event registers includes at least first and second count event registers for counting occurrences of a same replicated event generated within different instances of a same design entity having a same hierarchical level within the HDL model; receiving a correlation data structure indicating which of said plurality of count event registers are associated with instances of said same replicated event; performing simulation processing on said HDL model; during said simulation processing, maintaining within each of said plurality of count event registers a respective count value representing a number of times an associated event instance occurred during simulation of said HDL model; a simulation control program summing count values of said first and second count event registers in accordance with said correlation data structure to obtain an aggregate count value; and said simulation control program outputting a non-hierarchical count event data packet containing said aggregate count value.