Patent ID: 7064022

Claim:
A method for forming a semiconductor device, comprising: forming a fin structure; forming a source region at one end of the fin structure; forming a drain region at an opposite end of the fin structure; forming an insulating layer in the fin structure, source region, and drain region, the insulating layer separating the fin structure into a first fin structure and second fin structure, the source region into a first source region and a second source region, and the drain region into a first drain region and a second drain region, the first fin structure, the first source region, and the first drain region being formed on an opposite side of the insulating layer of the second fin structure, the second source region, and the second drain region; forming a gate dielectric layer on surfaces of the first and second fin structures, the first and second source regions, the first and second drain regions, and the insulating layer; removing portions of the gate dielectric layer to create covered portions and bare portions; depositing a gate material over the covered portions and bare portions; doping the first fin structure, the first source region, and the first drain region with a first material; doping the second fin structure, the second source region, and the second drain region with a second material; and selectively removing portions of the gate material to form the semiconductor device.