Patent ID: 7230554

Claim:
A communication apparatus comprising: (a) a first A/D converter for converting a first analog signal to be sent into a first n-bit digital signal composed of “0” and “1”; (b) a first encoder which is connected to the first A/D converter and then encodes all bit column patterns composed of said first n-bit digital signal, by correlating the transmission data, in which the difference between the numbers of “0” and “1” is equal to or greater than a predetermined number, with a second n-bit encoding bit column pattern, in which the difference between the numbers of “0” and “1” is increased by two each from 0 in the order of decreasing difference between the numbers of “0” and “1”, in a one-to one relationship, and adding a first flag bit to the encoded transmission data; (c) first (n+1) data buses which are connected to the first encoder and then send the second n-bit encoding bit column pattern and the first flag bit obtained by the first encoder; (d) a transmission memory connected to the first data buses; (e) second (n+1) data buses which are connected to the transmission memory and send said second n-bit encoding bit column pattern and the first flag bit; (f) a first decoder which is connected to the second data buses, then receives the second n-bit bit encoding column pattern and the first flag bit sent through the second data buses and decodes the second n-bit bit encoding column pattern, to which the first flag bit is added, to the corresponding third n-bit transmission data; (g) a first D/A converter which is connected to the first decoder and then converts said third n-bit transmission data into a second analog signal; (i) a transmitter signal processor connected to the first D/A converter; and a wireless transmitter connected to the transmitter signal processor.