Patent ID: 7258931

Claim:
A semiconductor wafer having an asymmetric edge profile (EP) extending between an inner edge profile (EP in ) and an outer edge profile (EP out ) as illustrated by FIG. 1 , which is incorporated herein; wherein t is a thickness of the semiconductor wafer, φ 1 is an angle in a range between about 30° and about 85°, R is a radius of an arc that defines EP in at a point of intersection with a top surface of the semiconductor wafer, and α is an acute angle that represents an angle of intersection between a bottom surface of the semiconductor wafer and a line that is tangent to the arc at a point on EP out ; and wherein: A 1 =R (1−cos φ 1 ); A 2 =R (1−sin α)+( t−R sin φ 1 −R cos α)cot α; B 1 =R sin φ 1 ; and B 2 =t−R sin φ 1 .