Patent ID: 7145210

Claim:
A semiconductor device comprising: a source region and a drain region formed in a semiconductor layer; at least one LDD region formed adjacent to the inside of at least one of the source region and the drain region in the semiconductor layer; a gate insulating film formed over the semiconductor layer; a main gate formed over the gate insulating film; a sub-gate formed over a part of the main gate and the gate insulating film so as to cover a part of the main gate and said at least one LDD region adjacent to the inside of the source region or the drain region; a first interlayer insulating film containing hydrogen formed over the sub-gate, the main gate, and the gate insulating film, and a second interlayer insulating film over the first interlayer insulating film containing hydrogen; wherein a contact hole is formed in the first interlayer insulating film containing hydrogen and the second interlayer insulating film; wherein a wiring is formed on parts of the second interlayer insulating film and inside the contact hole; and wherein the wiring is in contact with a sidewall of the sub-gate and on a part of the main gate.