Patent ID: 8605813

Claim:
A transmitter which transmits a signal by a DSTBC scheme, comprising: a first symbol mapping unit which maps a first bit stream divided from an input bit stream into a value on an IQ plane; a second symbol mapping unit which maps a second bit stream divided from the input bit stream into a value on the IQ plane; and a DSTBC encoder which performs DSTBC encoding for the mapping result in the first symbol mapping unit and the mapping result in the second symbol mapping unit, wherein the DSTBC encoder includes a differential encoding unit which performs differential encoding for the mapping result in the first symbol mapping unit and the mapping result in the second symbol mapping unit, an initial value setting unit which sets the initial values of the differential encoding unit, and an STBC encoding unit which performs STBC encoding for the differential encoding result in the differential encoding unit, wherein the first symbol mapping unit performs mapping using one of Formula 4 and Formula 5, wherein the second symbol mapping unit performs mapping using the other of Formula 4 and Formula 5, wherein the differential encoding unit performs differential encoding using Formula 1, and wherein the initial value setting unit uses, as a combination of two initial values S −2 and S −1 in Formula 1, any combination in which the phase difference of two initial values is nπ/2 (n is an integer) among a combination of a value given by Formula 6 and a value given by Formula 8, a combination of a value given by Formula 7 and a value given by Formula 7, and a combination of a value given by Formula 8 and a value given by Formula 6, [ Expression ⁢ ⁢ ⁢ 1 ] [ S 2 ⁢ t S 2 ⁢ t + 1 ] = [ S 2 ⁢ t - 2 - S 2 ⁢ t - 1 * S 2 ⁢ t - 1 s 2 ⁢ t - 2 * ] ⁡ [ X 2 ⁢ t X 2 ⁢ t + 1 ] ( Formula ⁢ ⁢ 1 ) [Expression 2] X 2t =½(1 +j ) when input bits correspond to the first pattern, X 2t =½(−1 +j ) when input bits correspond to the second pattern, X 2t =½(−1 −j ) when input bits correspond to the third pattern, and X 2t =½(1 j ) when input bits correspond to the fourth pattern, (Formula 4) [Expression 3] X 2t+1 =1/√2 when input bits correspond to the first pattern, X 2t+1 j 1/√2 when input bits correspond to the second pattern, X 2t+1 =−1/√2 when input bits correspond to the third pattern, and X 2t+1=− j 1/√2 when input bits correspond to the fourth pattern, (Formula 5) [Expression 4] S =sin(π/8) e j(2k+1)π8 (Formula 6) [Expression 5] S =sin(π/4) e jkπ/4 (Formula 7) [Expression 6] S =sin(3π/8) e j(2k+1)π/8 (Formula 8) where X represents the mapping result, S represents the differential encoding result, t represents a time series number which varies every two bits, and k represents an integer from 0 to 7.