Patent ID: 8710894

Claim:
A circuit arrangement comprising: a load transistor having a control connection and a first and second load connection, the second load connection defining a circuit output configured to be coupled to an external load; a driver circuit coupled at an input to a source of a drive signal and at an output to the control connection of the load transistor, wherein the driver circuit is configured to output the drive signal; a voltage limiting circuit connected between the first load connection and the control connection of the load transistor, the voltage limiting circuit configured to limit a load path voltage of the load transistor to a predetermined clamping voltage; a switch connected between the voltage limiting circuit and the control connection of the load transistor, the switch being closed to connect the voltage limiting circuit to the control connection, the switch being opened to disconnect the voltage limiting circuit from the control connection, the switch being configured to open in response to receiving a deactivation signal; a measurement circuit coupled to the second load connection and configured to measure one of a load current through the load transistor and the drive signal, and to output a measurement signal representing a level of at least one of the load current and the drive signal; and a deactivation signal generating circuit having an output connected to the switch and an input coupled to receive the measurement signal, the deactivation signal generating circuit being configured to compare the received measurement signal to at least one threshold and to output the deactivation signal based on the comparison; wherein the load transistor undergoes transition to an avalanche mode when the voltage limiting circuit is deactivated and an overvoltage of the load transistor reaches an avalanche voltage.