Patent ID: 6960843

Claim:
A system for operating in parallel a plurality of non-break power units inserted separately between (i) a bypass power source and a plurality of input power sources and (ii) a parallel bus, each of said non-break power units comprising: an inverter inserted between an input power source and the parallel bus; and an AC switch inserted between the bypass power source and the parallel bus; each of said non-break power units having: an inverter power supply mode in which power is supplied from the input power source to the parallel bus by way of said inverter with said AC switch open; and a bypass power supply mode in which, when operation of said inverter stops, said AC switch is closed to enable the AC power to be supplied directly to said parallel bus from said bypass power source by way of said AC switch, each of said non-break power units further comprising: a sequence control circuit for generating an output signal corresponding to an inverter power supply signal; a switching element for outputting the inverter power supply signal based on the output signal of said sequence control circuit; and a switch driving circuit for generating a driving signal for said AC switch in response to the inverter power supply signal, wherein output terminals of said switching elements incorporated in said plurality of non-break power units, respectively, are connected in parallel with one another, and said switch driving circuit incorporated in each of said non-break power units generates the driving signal for the associated AC switch based on a composite signal generated by synthesizing the inverter power supply signals in said non-break power units.