Patent ID: 8612505

Claim:
A method comprising: during a first stage of a Fast Fourier Transform (FFT) operation: reading a plurality of first input values from a plurality of first memory banks of a first memory based on the reading of the plurality of first input values occurring during the first stage of the FFT operation, the plurality of first input values being read by a device, performing, using the plurality of first input values, a first calculation of the FFT operation to obtain a plurality of first output values, the first calculation being performed by the device, and writing the plurality of first output values to a plurality of second memory banks of a second memory based on the writing of the plurality of first output values occurring during the first stage of the FFT operation, the second memory being different from the first memory, the plurality of first output values being written by the device, and a quantity of first input values of the plurality of first input values, a quantity of first memory banks of the plurality of first memory banks, a quantity of first output values, and a quantity of second memory banks of the plurality of second memory banks each comprising a particular quantity; and during a second stage of the FFT operation: determining data, the data including: a value of a counter during the second stage of the FFT operation, a stage value associated with the second stage, and a quantity of second input values of a plurality of second inputs values, and determining the data being performed by the device, performing, based on the stage value and the quantity of second input values, one or more shift operations and one or more addition operations on the value of the counter, during the second stage, to determine an address, the one or more shift operations and the one or more addition operations being performed by the device, reading, based on the address, the plurality of second input values from the plurality of second memory banks based on the reading of the plurality of second input values occurring during the second stage of the FFT operation, the plurality of second input values being read by the device, performing, using the plurality of second input values, a second calculation of the FFT operation to determine a plurality of second output values, the second calculation being performed by the device, and writing the plurality of second output values to the plurality of first memory banks based on the writing of the plurality of second output values occurring during the second stage of the FFT operation, the plurality of second output values being written by the device, and a quantity of second input values of the plurality of second input values and a quantity of second output values of the plurality of second output values each comprising the particular quantity.