Patent ID: 7444544

Claim:
A method of protecting a microprocessor core from soft errors, comprising: receiving a cache write request; if a write filter cache is not full, storing write data associated with the cache write request into a write filter cache without storing into main cache memory; and if the write filter cache is full, initiating a new microprocessor state checkpoint request, the step of initiating a new microproccssor state check point request comprising at least: comparing data stored in the write filter cache for a plurality of threads of redundant threading; rolling back to current checkpoint if the data among the plurality of threads are not the same; committing the data to main cache memory if the data among the plurality of threads are the same, including at least marking the data in the write filter cache and transferring the marked data to the main cache memory on demand when new data is written to the write filter cache; generating a new checkpoint as a current checkpoint if the data among the plurality of threads are the same; flushing the data from the write filter cache; and resuming execution from the current checkpoint; receiving a cache read request; searching the write filter cache and the main cache memory in parallel; sending data associated with the cache read request to a requestor if the data is found in one of the write filter cache and the main cache memory; sending data found in the write filter cache if the data is found in both the write filter cache and the main cache memory; and forwarding a cache miss request if the data associated with the cache read request is not found in either the write filter cache or the main cache memory.