Patent ID: 8923072

Claim:
A non-volatile memory device comprising: a semiconductor substrate including a plurality of active regions extending in a first direction and a pair of first pillars protruding from each active region, of the plurality active regions; a pair of drain selection lines extend in a second direction intersecting with the first direction, wherein each drain selection line of the pair of drain selection lines surrounds each first pillar of the pair of first pillars; a pair of second pillars, wherein each second pillar, of the pair of second pillars, is disposed over a corresponding first pillar of the pair of the first pillars, and is formed of a semiconductor material; a plurality of word lines and a source selection line extend in the second direction and form a stack that surrounds the pair of second pillars and stacked along a length of the pair of second pillars; a source line formed over and connected with the pair of second pillars, the source line extending in the second direction; drain contacts formed over each active region, of the plurality of active regions, at both sides of the pair of drain selection lines except between each drain selection line of the pair of drain selection lines; and a bitline formed over and connected with the drain contacts, the bit lines extending in the first direction.