Patent ID: 7523238

Claim:
A method for reducing simultaneous switching noise, comprising: reading values of a first state of a first set of bits of a first word; projecting value of a corresponding second state of each of the first set of bits; determining a score representative of at least a plurality of binary transitions, each binary transition from the first state to the corresponding second state; if the score indicates that more than half of the first states of the plurality of binary transitions differ from the corresponding second states, invert the values of the second states and set a designator; if the score does not indicate that more than half of the first states of the plurality of binary transitions differ from the corresponding second states, reset the designator; write the second states to a plurality of bits corresponding to the plurality of binary transitions; and if the designator is set, write the designator to a bit associated with the plurality of bits corresponding to the plurality of binary transitions.