Patent ID: 7670931

Claim:
A method for fabricating a semiconductor structure, the method comprising the steps of: providing a semiconductor device formed on and within a front surface of a semiconductor substrate, the semiconductor device comprising a channel region; forming a plurality of dielectric layers overlying the semiconductor device, wherein the plurality of dielectric layers comprises conductive connections that are in electrical communication with the semiconductor device; applying a photoresist to a back surface of the semiconductor substrate, after the steps of providing and forming; patterning the photoresist to expose a portion of the back surface of the semiconductor substrate; etching the substrate so that the substrate has a first thickness underlying the semiconductor device and a second thickness underlying another portion of the semiconductor substrate that is different than the first thickness; removing the photoresist from the semiconductor substrate; and forming a backside stress layer on the back surface of the semiconductor substrate, wherein the backside stress layer is configured to apply to the channel region of the semiconductor device a uniaxial compressive or tensile stress that, with stresses applied by the plurality of dielectric layers, results in an overall stress exerted on the channel region to achieve a predetermined overall strain of the channel region.