Patent ID: 8094055

Claim:
A digital-to-analog converter circuit, comprising: a reference scaling circuit coupled to receive a first reference current, the reference scaling circuit coupled to generate a second reference current in response to the first reference current; a first plurality of binary-weighted current sources coupled to a summing node, wherein a current of a first one of the first plurality of binary-weighted current sources is proportional to the first reference current, wherein a current of a second one of the first plurality of binary-weighted current sources is substantially equal to twice the current of the first one of the first plurality of binary-weighted current sources; and a second plurality of binary-weighted current sources coupled to the summing node, wherein a current of a first one of the second plurality of binary-weighted current sources is proportional to the second reference current, wherein a current of a second one of the second plurality of binary-weighted current sources is substantially equal to twice the current of the first one of the second plurality of binary-weighted current sources.