Patent ID: 8115297

Claim:
A structure of a semiconductor device package, comprising: a first substrate with a die metal pad and an opening hole area, a first wiring circuit on a top surface of said first substrate and a second wiring circuit on a bottom surface of said first substrate; a die disposed on said die metal pad and said opening hole area; a second substrate with a die opening window for receiving said die, a third wiring circuit on top surface of said second substrate and a fourth wiring circuit on bottom surface of said second substrate; a metal layer embedded into said opening hole area of said first substrate and contacted between the backside of said die and said second wiring circuit of said first substrate; and an adhesive material filled into the gap between back side of said die and top surface of said first substrate except said opening hole area; and between the side wall of said die and the side wall of said die opening window and the bottom side of said second substrate.