Patent ID: 8513071

Claim:
A method of fabricating a thin-film transistor (TFT) substrate, the method comprising: forming a gate electrode on a pixel region of a substrate; forming a gate insulating film on the gate electrode; forming a semiconductor layer on the gate insulating film to overlap the gate electrode; forming a source electrode and a spaced apart drain electrode both to overlap the semiconductor layer and thus define a channel region in the semiconductor layer where not overlapped by the source and drain electrodes; and forming a data insulating film on the source electrode and the drain electrode; and patterning the data insulating film such that a bottommost part of a drain contact hole formed through the data insulating film by patterning overlaps part of the channel region and the drain electrode, wherein the bottommost part of the drain contact hole that overlaps the part of the channel region does not overlap the drain electrode; and and forming a conductor extending to the bottommost part of the drain contact hole and making electrical contact with a sidewall part of the drain electrode that is exposed by the drain contact hole.