Patent ID: 8213779

Claim:
A video receiver system implemented in a computing environment, the video receiver system comprising: a switch operable to engage or disengage trick mode processing of an input video elementary stream, the input video elementary stream including initial buffer fullness values in entry point headers, the initial buffer fullness values defining levels of fullness of a decoder buffer when the decoder buffer stores encoded video information for the input video elementary stream; a video elementary stream decoder module operable to decode the input video elementary stream or a decoder-compliant trick mode elementary stream; and one or more trick mode processing modules operable to modify the input video elementary stream to enable a trick mode effect, wherein the one or more trick mode processing modules are operable to produce the decoder-compliant trick mode elementary stream for input to the video elementary stream decoder module, and wherein the one or more trick mode processing modules include a buffer adjustment module operable to adjust, at the video receiver system, the initial buffer fullness values in the entry point headers of the input video elementary stream to produce adjusted buffer fullness values in entry point headers signaled as part of the trick mode elementary stream, the adjusted buffer fullness values defining levels of fullness of the decoder buffer when the decoder buffer stores encoded video information for the trick mode elementary stream, the adjusted buffer fullness values having been adjusted to regulate timing of decoding of the trick mode elementary stream instead of the input video elementary stream.