Patent ID: 8005180

Claim:
A data decision apparatus comprising: a variable delay device ( 32 ) for relatively shifting phases of a waveform-shaped data signal and a clock; and a decision device ( 31 ) for reading a bit state of said data signal from said waveform-shaped data signal at one of level transition timings of said clock to output as a decided data signal while receiving said waveform-shaped data signal and said clock relatively phase shifted by said variable delay device, and in which said data decision apparatus further comprises: a delay device ( 34 ) for delaying in units of bits said decided data signal outputted from said decision device; a first phase detector ( 35 ) for outputting a voltage corresponding to a phase difference between said waveform-shaped data signal and said decided data signal outputted from said decision device; a second phase detector ( 36 ) for outputting a voltage corresponding to a phase difference between said decided data signal outputted from said decision device and a data signal outputted from said delay device; a third phase detector ( 37 ) for outputting a base voltage with respect to said voltage outputted from said first phase detector; and a phase controller ( 38 ) for controlling a phase shift amount of said variable delay device to equalize said voltage outputted from said first phase detector to a center voltage between said voltage outputted from said second phase detector and said base voltage.