Patent ID: 8547728

Claim:
A non-volatile memory device, comprising: a transistor, comprising: a gate dielectric layer disposed on a well; a gate electrode disposed on the gate dielectric layer; and a first source/drain and a second source/drain formed in the well and disposed at opposing sides of the gate electrode; and a variable and reversible resistive element, comprising: to a transition metal oxide layer for resistance change; a dielectric layer formed on the first source/drain; and at least one conductive plug module disposed on the transition metal oxide layer, comprising: a metal plug vertically disposed over the first source/drain; and a barrier layer surrounding the metal plug and electrically connected with the transition metal oxide layer, wherein the transition metal oxide layer is made by reacting a portion of the dielectric layer being directly below the metal plug with a portion of the barrier layer touching the portion of the dielectric layer, and thereby a remaining portion of the dielectric layer remains on the first source/drain after the transition metal oxide layer is formed.