Patent ID: 7755565

Claim:
A dual type flat panel display device comprising: a first flat panel display device panel; and a second flat panel display device panel; wherein the first and second flat panel display device panels each comprises: a pixel area comprising: a plurality of scan lines arranged in a first direction, a plurality of data lines arranged in a second direction perpendicular to the first direction, and pixel electrodes disposed in an area formed by the plurality of data lines and the plurality of scan lines crossing the data lines; and a plurality of pixel transistors; a non-pixel area comprising: a plurality of on/off switching devices at inputs of the scan lines or the data lines, the plurality of on/off switching devices disposed between the inputs of the scan lines or the data lines on the pixel electrodes and n common wiring lines output from one gate driver or one data driver, respectively, wherein the common wiring lines are connected to source electrodes of the on/off switching devices and drain electrodes of the on/off switching devices are directly connected to gate electrodes or source electrodes of 2 n pixel transistors, and the on/off switching devices are respectively connected to the plurality of scan lines or the plurality of data lines, and an n th scan line of the first flat panel display device panel is connected with an n th scan line of the second flat panel display device panel by an n th common wiring line via a respective one of the plurality of on/off switching devices, where n is a natural number, and is at least the same or the larger of the number of the scan lines of the first flat panel display device panel and the number of the scan lines of the second flat panel display device panel, wherein distances of the common wiring lines between the gate driver or data driver and the source electrodes of the on/off switching devices is greater than distances of the common wiring lines between the drain electrode of the on/off switching devices and the gate or source electrodes of the pixel transistors.