Patent ID: 7518688

Claim:
A forming method of a liquid crystal display (LCD) device, the method comprising: (a) setting a plurality of sub-pixel units; (b) setting a first liquid crystal layer, one or more first upper plate electrodes, one or more first lower plate electrodes, one or more first conductive layers, and a first dielectric layer between the one or more first lower plate electrodes and the one or more first conductive layers in a first sub-pixel unit, positioning the first liquid crystal layer between the first upper plate electrode and the first lower plate electrode, positioning the first conductive layers on one side of the first lower plate electrodes, electrically connecting the first conductive layers and the one or more first lower plate electrodes with one port of a first thin-film transistor (TFT), wherein the first sub-pixel unit has no floating electrode between the first liquid crystal layer and the one or more first conductive layers, and possesses a predetermined voltage-transmittance characteristic curve (V-T curve); (c) setting a second liquid crystal layer, one or more second upper plate electrodes, one or more second lower plate electrodes, one or more second conductive layers, and a second dielectric layer between the one or more second lower plate electrodes and the one or more second conductive layers in a second sub-pixel unit, positioning the second liquid crystal layer between the second upper plate electrodes and the second lower plate electrodes, floating the one or more second lower plate electrodes, positioning the second conductive layers on one side of the second lower plate electrodes, electrically connecting the second conductive layers with one port of a second TFT, and positioning the second dielectric layer between the second conductive layers and the second lower plate electrodes; and (d) utilizing the one or more second conductive layers, the second dielectric layer, and the one or more second lower plate electrodes to form a second couple capacitor, and adjusting the capacitance of the second couple capacitor to control the voltage on the second lower plate electrodes, causing the second sub-pixel unit to possess substantially the predetermined V-T curve.