Patent ID: 7986371

Claim:
A video signal processing device, comprising: a plurality of imaging devices configured to output mutually asynchronous interlace video signals, each interlace video signal comprising a video signal of an odd-numbered field and a video signal of an even-numbered field; input buffers configured to temporarily store field by field the interlace video signals outputted from the respective imaging devices; and an output image generating device configured to generate field by field video signals of output target images from the interlace video signals stored in the input buffers, wherein the output image generating device is configured to generate each of the video signals of the output target images when all latest video signals to be components thereof are stored in the input buffers, wherein the latest video signals to be components of each of the video signals of the output target images include the video signal of the odd-numbered field and the video signal of the even-numbered field stored in the input buffers, wherein the output image generating device is configured to change how to generate the video signals of the output target images according to whether a latest video signal stored in the input buffer is the video signal for the odd-numbered field or the video signal for the even-numbered field, and wherein, when generating a video signal of an output target image of an even-numbered field from a video signal of an odd-numbered field stored in the input buffer, the output image generating device is configured to shift an image of the video signal of the odd-numbered field of the input buffer upward by one line of a field to generate the video signal of the output target image.