Patent ID: 6869860

Claim:
A method of forming an integrated circuit containing a set of thermally sensitive circuit elements having a thermal budget associated therewith and a set of isolation trenches comprising the steps of: providing a silicon substrate; forming at least one circuit element having a thermal budget prior to forming the isolation structure; etching said set of trenches having an aspect ratio of at least four in said silicon substrate; filling said set of trenches with a spin on trench dielectric material containing silazane; heating said substrate at a temperature of less than about 450 deg C.; converting the stress in said trench dielectric material from tensile stress to compressive stress by heating in an ambient containing H2O at a temperature between about 450 deg C. and about 900 deg C.; annealing said substrate by heating in an ambient containing O2 at a temperature above 800 deg C. until Si—N bonds at the bottom of said trench are substantially converted to Si—O bonds, in which the time of the stress conversion step and the time of the anneal step are related such that the thermal budget of the thermally sensitive component is not exceeded; and said step of stress conversion and said step of annealing are related such that the resulting material has compressive stress in the range of 0.1 to 2 Gdynes/cm2, whereby the operation of transistors adjacent to said set of trenches is not affected and has a WERR of less than about 2; and completing said integrated circuit.