Patent ID: 7179737

Claim:
A method of manufacturing a semiconductor device comprising the steps of: (a) forming a metal interconnection over a semiconductor substrate; (b) forming a semiconductor layer over the metal interconnection in a state in contact with the metal interconnection; (c) depositing an insulation film over the semiconductor substrate so as to cover the metal interconnection and the semiconductor layer; (d) forming an interconnection opening reaching the semiconductor layer in the insulation film; (e) depositing a metal film over the insulation film including the interconnection opening; (f) applying a heat treatment to the semiconductor substrate, thereby forming a suicide layer in self-alignment with the interconnection at the contact boundary between the semiconductor layer in the interconnection opening and the metal film; (g) removing the unreacted metal film after the step (f); and (h) forming an n-type or p-type semiconductor layer in the interconnection opening after the step (g) in a state in contact with the silicide layer.