Patent ID: 7219418

Claim:
A method of forming a probe card for the testing of a semiconductor device, comprising: disposing a plurality of conductive traces adjacent at least one of the first surface and the second surface of a substrate; forming a plurality of probe elements in electrical communication with the plurality of conductive traces, a first one of the plurality of probe elements supplying a test signal, and at least a second one of the plurality of probe elements receiving a test signal; and forming a plurality of fuse elements on the substrate in respective electrical communication with some of the plurality of conductive traces, at least some of the plurality of fuse elements disposed immediately adjacent the at least one of the first surface and the second surface of the substrate, the forming including forming at least some of the plurality of fuse elements comprising at least two types of fuses of an active fuse element, a passive fuse element, a self-resetting fuse element, a repairable fuse element, and a replaceable fuse element, each fuse element of the plurality of fuse elements for limiting the current level thereof to one of an absolute maximum current level for the probe card without substantial damage thereto and an absolute current level for use in the testing of a semiconductor device without substantial damage thereto.