Patent ID: 7616488

Claim:
A sense circuit, comprising: a wire pair including a source line being a bit line that is connected to a source diffusion region of a memory cell and a drain line being a bit line that is connected to a drain diffusion region of the memory cell, wherein the source line and the drain line are configured so that a stray capacitance of the source line and a stray capacitance of the drain line are substantially equal to each other; a differential amplifier for differentially amplifying a voltage on the source line and a voltage on the drain line; a first precharge circuit for precharging the source line to a first voltage potential; and a second precharge circuit for precharging the drain line to a second voltage potential, wherein: the differential amplifier is configured so as to perform a differential amplification operation after the precharge of the source line and that of the drain line are released; two each of the wire pairs, the differential amplifiers, the first precharge circuits and the second precharge circuits are provided, one for reference memory cells and another for read-out memory cells from which data is read out; a voltage of an output of the differential amplifier for read-out memory cells and a voltage of an output of the differential amplifier for reference memory cells are differentially amplified.