Patent ID: 6881617

Claim:
A manufacturing method for a semiconductor device characterized by comprising: a step of forming an element isolation region and a gate insulating film on a semiconductor substrate; a step of forming a polycrystalline silicon film, for subsequently forming a gate electrode on the element isolation region and the gate insulating film; a step of forming an insulating film on the polycrystalline silicon film; a step of patterning the insulating film so as to open a region other than a region subsequently serving as a PMOS; a step of changing the region of the polycrystalline silicon film corresponding to an insulating film opening into an N-type region by heat treatment in a diffusion furnace in an N-type impurity atmosphere; a step of removing the insulating film patterned; and a step of doping a P-type impurity into an entire surface of the polycrystalline silicon film through an ion implantation.