Patent ID: 8373208

Claim:
A semiconductor power device comprising: a semiconductor substrate including a super junction structure disposed near a top surface of said semiconductor substrate wherein said super junction structure comprising a plurality of laterally stacked layers of alternating conductivity types of a first and second conductivity types extending laterally from a source column to a drain column wherein said source column and drain column are of a first conductivity type and extend downward through said super-junction structure; and a gate column of a second conductivity type extending downward through said super junction structure for applying a voltage on the super junction structure to control a current transmitted laterally through said super junction structure between said source and said drain columns; the semiconductor substrate further comprises a bottom semiconductor layer of a first conductivity type, wherein said drain column extends downwardly to connect to said bottom semiconductor layer; the semiconductor substrate further comprises an intermediate semiconductor layer of a second conductivity type disposed under said super junction structure and on top of said bottom semiconductor layer; and the gate column extends downwardly into the intermediate semiconductor layer to constitute a built-in gate-drain avalanche clamp diode from a combination of the bottom semiconductor layer through the intermediate semiconductor layer to the gate column.