Patent ID: 8120058

Claim:
A semiconductor device comprising: a gate structure present atop a channel portion of a semiconductor on insulator (SOI) layer of a semiconductor on insulator (SOI) substrate having a first conductivity; a source region of a second conductivity present at a first end of the channel portion; and a drain region of the second conductivity present at a second end of the channel portion and including a doped region of the first conductivity, in which the doped region of the first conductivity is separated from the channel region by a remaining portion of the drain region that is of the second conductivity, wherein a bipolar transistor region is present integrated with the drain region of the semiconductor device, in which the bipolar transistor region is comprised of an emitter provided by the doped region of the first conductivity, a base provided by the remaining portion of the drain that is of the second conductivity, and a collector provided by the channel of the first conductivity, wherein the collector is electrically isolated by a buried dielectric layer of the SOI substrate and a trench isolation region extending from an upper surface of the SOI layer to the buried dielectric layer at a perimeter of the source region and the drain region.