Patent ID: 7646096

Claim:
A semiconductor device, comprising: a semiconductor substrate; a multilayer structure in an upper portion of said semiconductor substrate, in which an aluminum contained metal film, an antireflection film, and an etching adjustment film are sequentially stacked; an insulating interlayer on said multilayer structure; and a conductive plug, which penetrates said insulating interlayer and said etching adjustment film, wherein an end surface of the conductive plug contacts and is embedded in a TiN layer of said antireflection film, wherein said etching adjustment film is formed from SiON whose etching rate is slower than that of the insulating interlayer and is higher than that of TiN to an etching gas which includes a fluorocarbon compound expressed by a general formula of C x F y (X is a real number of 4 or more and Y is a positive real number), said etching adjustment film is configured to delay an etching rate, and an etching selectivity between the insulating interlayer and the etching adjustment film is about 15.