Patent ID: 7132868

Claim:
A semiconductor device comprising: at least one semiconductor switching element; a drive controller configured to supply a control signal to the semiconductor switching element based on an input signal and having at least two delay inserting circuits in cascade; and a characteristic compensation circuit configured to set a desired total delay time based on a characteristic compensation input signal; said total delay time being the total of a transfer delay time of said drive controller supplying said control signal and a delay time of said semiconductor switching element; each of said delay inserting circuits comprising a signal line, an input current source supplying a current to the signal line and a plurality of capacitors connected in parallel between the signal line and a ground, each of said plurality of capacitors being controlled by the characteristic compensation circuit to thereby set the desired total delay time, the signal line of one delay inserting circuit being distinct from the signal line of another delay inserting circuit; and said capacitors are selectively connected between the signal line and the ground.