Patent ID: 8660506

Claim:
A residual signal generating circuit comprising: a capacitive DA converter to generate a first difference signal with respect to an input signal based on a criterion voltage, the criterion voltage being indicative of an input range of the input signal; a reference voltage generating circuit to divide the criterion voltage to obtain at least one partial voltage signal; a residual signal generating section to generate 2 N −1 (N is an integer equal to or greater than 2) first residual signal according to a difference between the first difference signal and 2 N−1 −1 first reference signal, the 2 N−1 −first reference signal being 2 N−1 −1 partial voltage signal among said at least one partial voltage signal generated by the reference voltage generating circuit; a comparator to compare the 2 N −1 first residual signal with a fixed voltage to obtain 2 N −1 first comparison signal each indicative of a logical value; and a decoder configured to decode the 2 N −1 first comparison signal to obtain first data of N bits.