Patent ID: 7653888

Claim:
A method comprising: identifying a first test structure in a library; the first test structure having a first device under test (DUT) which matches at least one device in an integrated circuit (IC) design; and modifying by microprocessor, the integrated circuit design to include the first test structure; wherein the first test structure is used to test the IC during manufacturing to monitor the health of a manufacturing line and adjust at least one manufacturing apparatus or at least one process; the test structure further comprising a logic controller having a decoder which activates the DUT; a decode level translator which provides a required gate voltage to the DUT; at least one supply/protect/isolation (SPI) circuit which comprises a supply circuit which provides a source voltage to the DUT; an isolation circuit which controls the supply circuit to isolate the DUT during test; and a protect circuit which protects the supply circuit from leakage current when the test structure is inactive; and an SPI control circuit which enables or disables the SPI circuit.