Patent ID: 8031098

Claim:
A digital-to-analog converter (DAC) circuit comprising: a first digital-to-analog converter (DAC) unit having a first input terminal coupled to receive a first signal related to a digital input signal and an output terminal coupled to provide an analog output signal; a second DAC unit having a first input terminal coupled to receive a second signal related to the digital input signal and an output terminal coupled to provide an analog output signal, the analog output signals from the first and second DAC units being summed at a summing node; and a first latch and a second latch connected in series, the first latch coupled to latch the digital input signal based on a first clock signal and to generate the first signal, the first latch providing the first signal to the first DAC unit and to the second latch, the second latch coupled to latch the first signal based on a second clock signal and to generate the second signal, the second latch providing the second signal to the second DAC unit, the first and second clock signals being non-overlapping clock signals, wherein the first DAC unit is enabled during a first half of a conversion clock cycle and is reset during a second half of the conversion clock cycle and the second DAC unit is reset during the first half of the conversion clock cycle and is enabled during the second half of the conversion clock cycle, the summed analog output signal from the first and second DAC units over a conversion clock cycle being an analog output signal of the DAC circuit based on the digital input signal.