Patent ID: 7383371

Claim:
A physical layer circuit for data transfer using a Universal Serial Bus (USB), the physical layer circuit comprising: a VBUS detection circuit which monitors a voltage of a VBUS line of USB, and makes a VBUS detection signal active when the voltage of the VBUS line has exceeded a predetermined voltage; a receiver circuit which receives first and second signals which are differential signals and performs reception processing using the first and second signals; and a reception control circuit which outputs a first enable signal to the receiver circuit, the reception control circuit making the first enable signal inactive and disables the receiver circuit when the VBUS detection signal is inactive, the reception control circuit receiving a second enable signal set by a processing section, the reception control circuit disabling the receiver circuit when the second enable signal is active but the VBUS detection signal is inactive, and the reception control circuit making the first enable signal active and enables the receiver circuit when the second enable signal and the VBUS detection signal are active.