Patent ID: 8065564

Claim:
A redundant control apparatus comprising: a first processing unit configured to execute a control program to input data; a second processing unit configured to execute the control program to the input data in parallel with the first processing unit; an input/output unit configured to generate the input data, and to receive one of two output data executed by the first processing unit and the second processing unit; and a channel selection unit configured to send the input data from the input/output unit to the first processing unit and the second processing unit in parallel, and to send the one to the input/output unit by selecting the one from the two output data; wherein the first processing unit and the second processing unit respectively comprise a program memory configured to store the control program; a control cycle synchronization unit configured to generate a clock signal at a rate quicker than a control cycle previously set, and to generate a control cycle signal using the clock signal at the control cycle, the control cycle signal being mutually sent between the first processing unit and the second processing unit; a processor configured to execute the control program in response to the clock signal and the control cycle signal; a data memory configured to store operation data including the input data, intermediate data being executed and output data executed by the processor; and a diagnostics unit configured to diagnose the operation data every control cycle; wherein the diagnostics unit comprises a summary information conversion unit configured to generate a summary information by compressing the operation data with a hash function; a summary information storage unit configured to store the summary information; a comparison unit configured to compare the summary information with the other summary information of the other processing unit, to decide whether the summary information matches the other summary information, and to output a decision signal to the channel selection unit; and a channel failure detection unit configured to diagnose a failure of each unit in the processing unit except for diagnostics of the summary information.