Patent ID: 7389368

Claim:
In a system comprising a first processor and one or more other processors, a method for applying one or more interrupt signals to the one or more other processors, the method comprising: (a) generating, in the first processor, a data word having two or more data bits, wherein each data bit has either a first bit value or a second bit value; (b) transmitting the data word from a data port of the first processor to a signal unit external to the first processor and the one or more other processors; (c) converting, in the signal unit, the data word into two or more interrupt signals by analyzing the bit value of each of two or more data bits in the data word, wherein each analyzed data bit in the data word having a specified bit value corresponds to a different interrupt signal; and (d) transmitting each interrupt signal from the signal unit to an interrupt port of an other processor, wherein the signal unit detects a transition in each analyzed data bit of the data word over time to determine when to generate a corresponding interrupt signal.