Patent ID: 8736314

Claim:
An integrated circuit comprising: an input terminal receiving an electrical power supply for the integrated circuit, the electrical power supply providing electrical power not adapted to convey data; integrated circuitry including multiple transistors implementing a function of the integrated circuit, wherein the integrated circuitry is adapted to communicate electrical signals conveying data externally from the integrated circuit via one or more input/output signal lines; multiple power-gating transistors connected in parallel between the input terminal and an effective power terminal of the integrated circuitry for controlling an internal voltage source delivering power to the integrated circuitry that is not adapted to convey data according to a sleep/wake signal used for power conservation, wherein the power-gating transistors provide power for the integrated circuitry when in the wake state, and wherein the effective power terminal comprises a common connection of multiple non-gate transistor terminals of the integrated circuitry; and a transistor-aging detector generating a signal reflecting an aging of the power-gating transistors, the signal controlling the power-gating transistors to compensate for a decrease in power-gating transistor current flow as a function of transistor control voltage as the power-gating transistors age.