Patent ID: 8171279

Claim:
A multiprocessor system comprising: a first processor configured to perform a first predetermined task; a second processor configured to perform a second predetermined task; a multiport semiconductor memory device coupled to the first processor and the second processor, the multiport semiconductor memory device including at least one shared memory area, the multiport semiconductor memory device configured to provide access to the at least one shared memory area by the first processor and the second processor; and a non-volatile memory device coupled directly to the first processor via a first dedicated bus and coupled directly to the second processor via a second dedicated bus separate from the first dedicated bus, the non-volatile memory device storing a first boot code associated with the first processor and a second boot code associated with the second processor, wherein the multiprocessor system is configured to provide the first processor direct access to the non-volatile memory device via the first dedicated bus during a boot operation, and indirect access to the non-volatile memory device via the shared memory area otherwise.