Patent ID: 7533247

Claim:
A method comprising: identifying a first sequence of instructions operations by an execution core and caching a frame signature, wherein the frame signature is a unique identifier of the first sequence of operations; counting occurrences of the first sequence of operations and caching the count with the frame signature; if the count reaches a threshold, building a frame at the next occurrence of the sequence of operations, wherein the frame includes a second sequence of operations; storing the frame in a frame cache including two distinct arrays, wherein: a first array includes the frame signature and a second array pointer wherein the second array pointer points to a storage location of the second sequence of operations, and the second array includes two arrays including: a data linkage array providing links from line ends of second operation sequence lines in a data array to a start of a next line of the second operation sequence, and the data array including the second sequence of operations stored in a plurality of lines; detecting a subsequent need to execute the first sequence of operations; and executing the second sequence of operations from the frame cache instead of the first sequence of operations.