Patent ID: 7788535

Claim:
Data processing system, comprising: at least one processing unit (PU) for processing an application; and a debugger means (DM) for debugging the processing of the at least one processing unit (PU) based on a plurality of breakpoints, the debugger means (DM) comprising: a first breakpoint register (BAR) for storing a base address for one of the plurality of breakpoints, wherein the debugging means (DM) initiates the debugging of the processing of the at least one processing units (PU) based on the address stored in the base address register (BAR), a second breakpoint register (OR) for storing an offset from a base address for a breakpoint, logic arithmetic unit (LAU) for repetitively detecting a breakpoint condition based on the base address stored in the first breakpoint register (BAR) and the offset stored in the second breakpoint register (OR) and for updating the base address stored in the first breakpoint register (BAR) accordingly.