Patent ID: 8288853

Claim:
A three-dimensional package, comprising: a first unit, comprising: a first semiconductor body, having a first surface and a second surface, the first surface having at least one first pad and a first protection layer exposing the first pad; at least one first hole, penetrating the first semiconductor body; a first isolation layer, disposed on the side wall of the first hole; a first conductive layer, covering the first pad, a part of the first protection layer, and the first isolation layer, wherein the lower end of the first conductive layer extends to below the second surface of the first semiconductor body; and a first solder, disposed in the first hole and electrically connected to the first pad via the first conductive layer; and a second unit, stacked on the first unit, the second unit comprising: a second semiconductor body, having a first surface and a second surface, the first surface having at least one second pad and a second protection layer exposing the second pad; at least one second hole, penetrating the second semiconductor body; a second isolation layer, disposed on the side wall of the second hole; and a second conductive layer, covering the second pad, a part of the second protection layer, and the second isolation layer, wherein the lower end of the second conductive layer extends to below the second surface of the second semiconductor body and contacts the upper end of the first solder.