Patent ID: 8395153

Claim:
A semiconductor device comprising: a first gate electrode layer; a first insulating film over the first gate electrode layer; an oxide semiconductor layer over the first insulating film; a connection layer over the first insulating film; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a second insulating film over the first insulating film, the oxide semiconductor layer, the source electrode layer, the drain electrode layer, and the connection layer; a second gate electrode layer over the second insulating film; and a first gate wiring, a second gate wiring, and a source wiring over the second insulating film, wherein the source wiring is electrically connected to the source electrode layer, wherein the first gate wiring is electrically connected to the first gate electrode layer, wherein the first gate wiring is electrically connected to the second gate wiring through the connection layer, and wherein the connection layer overlaps the source wiring.