Patent ID: 7777252

Claim:
A transistor comprising: a first layer; a second layer stacked on a top surface of the first layer; and an electrode formed at a top surface side of the second layer; wherein the first layer comprises a first III-V nitride semiconductor, the second layer comprises a second III-V nitride semiconductor, a band gap of the second III-V nitride semiconductor is wider than a band gap of the first III-V nitride semiconductor, and the first layer has an N face at a junction between the first layer and the second layer, and the second layer has a Ga face at the junction, wherein an electric field generated by piezoelectric polarization in the second layer has a direction opposite to a direction of an electric field generated by spontaneous polarization in the second layer, wherein opposite directions of the electric field generated by piezoelectric polarization in the second layer and the electric field generated by spontaneous polarization in the second layer allow for suppression of electrons between the first layer and the second layer when voltage is not applied to the electrode.