Patent ID: 7972907

Claim:
A method of making a semiconductor device, the method comprising: forming a plurality of circuit elements, wherein the plurality of circuit elements are arranged in tiles; forming a first set of lower routing tracks which extend in a first direction over a first circuit element; forming a second set of lower routing tracks which extend in a second direction over a second circuit element, the second direction being perpendicular to the first direction; connecting the first circuit element to at least one routing track in said first set of lower metal routing tracks; connecting the second circuit element to at least one routing track in said second set of lower routing tracks; and forming, at substantially the same time: a first set of upper routing tracks which extend in said second direction and cross over the first set of lower routing tracks; a second set of upper routing tracks which extend in said first direction and cross over the second set of lower routing tracks; and a plurality of vias in a via layer which connect some of the upper routing tracks to some of the lower routing tracks, such that the first and second circuit elements are electrically connected to one another by upper and lower routing tracks.