Patent ID: 8716857

Claim:
A semiconductor device, comprising: a substrate; and a metal wiring layer carried on the substrate, the metal wiring layer is provided in a patterned area which extends in a first direction and in a second direction, transverse to the first direction, the patterned area comprises a central area, a left-side lateral area on a left side of the central area, and a right-side lateral area on a right side of the central area, the metal wiring layer comprises active lines which extend uninterrupted through the left-side and right-side lateral areas, adjacent to the central area, the central area comprises four quadrants relative to a reference point, a portion of the metal wiring layer in each quadrant comprises a broken loop, each broken loop comprises a broken end in the central area, a portion of the metal wiring layer in the central area comprises a broken cross, the broken cross is symmetric with respect to a first axis which passes through the reference point and which is in the first direction, and with respect to a second axis which passes through the reference point and which is in the second direction, the broken cross comprises separated metal wire portions which extend in the first direction, and separated metal wire portions which extend in the second direction, the metal wiring layer is excluded from a cut out area, and the cut out area is contained within the central area and extends from the reference point outward to overlap missing portions of the broken ends in the quadrants and to overlap missing portions of the broken cross which are between the reference point and the broken ends.