Patent ID: 8527844

Claim:
A phase synchronization apparatus comprising: a sampling section configured to carry out discrete sampling processing at a sampling period T p on an analog base band signal representing data received from an apparatus other than the phase synchronization apparatus; a phase-error detection section configured to detect phase errors which are phase differences between phases of N received signals and phases of M inferred received signals, the phases of N received signals being obtained as a result of said discrete sampling processing and the phases of M inferred received symbols having a symbol period T s where N is an integer at least equal to 2 whereas M is an integer neither smaller than 0 nor greater than said integer N; a first computation section configured to find a phase-error correction value m P,k and a frequency-error correction value m I,k for a time k, the phase-error correction value m P,k being proportional to a sum of phase errors of said N received signals and the frequency-error correction value m I,k being proportional to a sum of phase errors through the time k; a second computation section configured to find a phase offset Φ k+i representing a correction quantity for the phase of each of said N received signals (where i is an integer at least equal to 1 but not greater than said integer N) by adding said frequency-error correction value m I,k found by said first computation section to a ratio μ(≡T s /T p ) in order to produce a sum (m I,k +μ), multiplying said integer i by said sum (m I,k +μ) in order to produce a product i·(m I,k +μ), adding a phase offset Φ k to said phase-error correction value m P,k found by said first computation section in order to produce a sum (Φ k +m P,k ), adding said sum (Φ k +m P,k ) to said product i·(m I,k +μ) in order to produce a sum {Φ k +m P,k +i·(m I,k +μ)}, subtracting said integer i from said sum {Φ k +m P,k +i·(m I,k +μ)} in order to produce a difference {Φ k +m P,k +i·(m I,k +μ)−i}, dividing said difference {Φ k +m P,k +i·(m I,k +μ)−i} by said sum (m I,k +μ) in order to produce a remainder [{Φ k +m P,k +i·(m I,k +μ)−i} mod (m I,k +μ)], and taking said remainder [{Φ k +m P,k +i·(m I,k +μ)−i} mod (m I,k +μ)] as said phase offset Φ k+i ; and an interpolation section configured to find M received symbols from said N received signals at each of times N·T p in a batch operation by carrying out interpolation processing on the basis of said phase offset Φ k+i found by said second computation section.