Patent ID: 8488060

Claim:
An image signal processing apparatus for converting an interlace signal which creates a frame image by alternately displaying an odd field and an even field on a single screen into a progressive signal, the apparatus comprising: a line memory for storing the interlace signal; a writing/reading portion for writing/reading the interlace signal into/from the line memory; a first signal generation portion for generating a first prescribed signal; a second signal generation portion for generating a second prescribed signal; a selector for selectively outputting the interlace signal from the line memory, the first prescribed signal from the first signal generation portion, or the second prescribed signal from the second signal generation portion; and a controller for controlling signal selection by the selector, wherein the controller controls the selector such that, when the odd field of the interlace signal is being read from the line memory, the interlace signal is outputted from the line memory to odd lines of a progressive signal to be converted and the first prescribed signal from the first signal generation portion and the second prescribed signal from the second generation portion are outputted to even lines of the progressive signal alternatively every pixel, and when the even field of the interlace signal is being read from the line memory, the interlace signal is outputted from the line memory to even lines of the progressive signal and the first prescribed signal and the second prescribed signal are outputted to odd lines of the progressive signal alternatively every pixel.