Patent ID: 7872354

Claim:
A high voltage-resistant semiconductor device comprising: a plurality of metal-oxide-semiconductor transistors on a silicon substrate, each of the plurality of transistors including (a) a gate insulating film having a thickness greater than about 350 Å, (b) at least one gate electrode over the gate insulating film, and (c) at least one contact formed over the at least one gate electrode; wherein a respective area ratio, Sc/Sg, is associated with each of the plurality of transistors, where Sc is a total opening area of the at least one contact formed on the at least one gate electrode of the respective transistor when viewed from a gate electrode side of the respective transistor, and where Sg is a contact area between the at least one gate electrode and the gate insulating film of the respective transistor; and wherein at least two of the plurality of transistors are associated with different area ratios.