Patent ID: 8713292

Claim:
Apparatus for processing data comprising: data processing circuitry configured to execute data processing operations specified by program instructions; and instruction decoder circuitry configured to decode program instructions to generate control signals for controlling said data processing circuitry to execute said data processing operations specified by said program instructions; wherein said instruction decoder circuitry and said data processing circuitry are configured to decode and to execute a sequence of program instructions to evaluate a data processing function; said sequence of program instructions includes an intermediate value generating instruction, decoding of said intermediate value generating instruction by said instruction decoding circuitry, and execution of said intermediate value generating instruction by said data processing circuitry generating an intermediate value including an intermediate data value and an embedded opcode value; said sequence of program instructions includes, after said intermediate value generating instruction, an intermediate value consuming instruction for consuming said intermediate value; and said instruction decoder circuitry and said data processing circuitry are configured to operate in dependence upon said embedded opcode value to follow one of a first execution path and a second execution path: (i) said first execution path comprising completing evaluation of said data processing function using said intermediate value consuming instruction; and (ii) said second execution path comprising substituting a substitute instruction in place of said intermediate value consuming instruction and executing said substitute instruction to evaluate said data processing function instead of said sequence of program instructions.