Patent ID: 7192871

Claim:
A method of fabricating a semiconductor device, comprising the steps of: depositing on a first insulation film having a line formed therein a second insulation film and a third insulation film deposited in layers; providing said second and third insulation films with an upper hole reaching said line or said line and said first insulation film; wet-etching an interior of said upper hole to form in said line a lower hole larger in diameter than said upper hole; depositing an upper conductive film covering an inner wall surface of said upper hole and only a bottom of said lower hole; physically etching said upper conductive film present at said bottom of said lower hole to provide a lower conductive film on an inner wall surface of said lower hole; and depositing a conductive film containing copper and filling said upper and lower holes, wherein the step of physically etching includes physically etching said upper conductive film and said line present at said bottom of said lower hole.