Patent ID: 7042275

Claim:
A booster circuit comprising: a boosting section including one or a plurality of serially-connected boosting cells for boosting an input voltage in response to a clock signal and outputting the boosted voltage, each of the boosting cells including a charge transfer transistor, and a plurality of boosting capacitors connected in parallel; a boosted voltage detector for detecting the boosted voltage output from the boosting section and, when the detected boosted voltaae is lower than or equal to a given voltage value, outputting a detection signal; a clock generator for outputting the clock signal in response to the detection signal, wherein the boosting section includes a connection switching circuit for switching connections to the plurality of boosting capacitors based on a control signal; a boosted voltage detection control section for detecting the output voltage from the boosting section and outputting the control signal; and a power supply voltage detection control section for detecting a power supply voltage and controlling the output of the boosted voltage detection control section.