Patent ID: 7442603

Claim:
A method for manufacturing a resistor random access memory, comprising: providing a substrate body having a top surface; depositing a first conductive layer overlying the top surface of the substrate body; forming a layer of lower programmable resistive memory material overlying the conductive layer; forming a high selectivity layer overlying the layer of lower programmable resistive memory material, the high selectivity layer having a higher selectivity than the layer of lower programmable resistive memory material; forming a silicon nitride layer overlying the high selectivity layer; forming a pillar by etching sides of the first conductive layer, the layer of lower programmable resistive memory material, the high selectivity layer and the silicon nitride layer, thereby resulting in the pillar having a conductive segment, a lower programming resistive memory material segment overlying the conductive segment, a high selectivity segment overlying the lower programmable resistive memory material segment, and a silicon nitride segment overlying the high selectivity segment; and isotropically etching the high selectivity segment to reduce the length of the high selectivity segment by approximately the equal distance on each side, thereby creating a kernel member comprising the high selectivity material having a first void on the left side of the high selectivity segment and a second void on the right side of the high selectivity segment; wherein the high selectivity layer is selected from a material that can be etched without damaging the silicon nitride segment and the lower programmable resistive memory material segment.