Patent ID: 6998712

Claim:
A semiconductor device comprising: a semiconductor chip provided with a circuit formation portion comprising a plurality of wiring insulating films stacked on top of each other in layers on a semiconductor substrate, and a multi-layer interconnection formed in said plurality of wiring insulating films, wherein at least two wiring trenches are formed upwardly or downwardly through said plurality of wiring insulating films along a periphery of said semiconductor chip in such a manner as to surround a specified region on said semiconductor substrate, said at least two wiring trenches including an outer wiring trench surrounding an inner wiring trench, wherein in each of said wiring trenches, a seal ring is formed by a conductive layer buried via a first conductive layer diffusion preventing film, each seal ring being connected to a diffusion region formed in said semiconductor substrate, wherein at least one of said wiring insulating films comprises a low dielectric constant film comprising methyl-silsesquioxane or hydrogen-silsesquioxane, and wherein at least one second conductive layer diffusion preventing film is formed between a lower one and an upper one of said wiring insulating films, each second conductive layer diffusion preventing film being connected with a corresponding one of said first conductive layer diffusion preventing films.