Patent ID: 7478186

Claim:
A method for handling interrupts between a direct memory access (DMA) controller and an interrupt controller, the method comprising the steps of: receiving at least one DMA interrupt from a DMA controller at an interrupt coalescing unit; designating the at least one DMA interrupt received at the interrupt coalescing unit as either a delayable interrupt or a non-delayable interrupt; and if the at least one DMA interrupt received is a delayable interrupt, coalescing the at least one delayable interrupt at the interrupt coalescing unit, incrementing an event counter and starting a timer counter; determining if a coalescing condition has been satisfied and if the coalescing condition has been satisfied, transmitting an interrupt request from the interrupt coalescing unit to the interrupt controller, resetting the event counter to zero and resetting the timer counter to zero, wherein the coalescing condition is satisfied if the timer counter indicates that a programmable period of time has transpired since a first of the one or more delayable interrupts was received or a count of the event counter has exceeded a programmed value; or, if the at least one DMA interrupt received is a non-delayable interrupt, transmitting the interrupt request from the interrupt coalescing unit to the interrupt controller regardless of the satisfaction of the coalescing condition.