Patent ID: 7640392

Claim:
A method of controlling one or more SDRAM modules, comprising: performing one or more synchronous read cycles to a SDRAM module to access DRAM array temperature data not stored in a DRAM array of the SDRAM module; performing one or more synchronous read cycles to the SDRAM module to access DRAM array data stored in the DRAM array of the SDRAM module; generating control information associated with each of the one or more read cycles of the DRAM array temperature data not stored in the DRAM array and of the DRAM array data stored in the DRAM array, the generated control information including a non-DRAM indicator associated with each read cycle of the DRAM array temperature data not stored in the DRAM array and a requesting master device identifier associated with each read cycle of the DRAM array data stored in the DRAM array; buffering the generated control information in a control buffer; buffering read DRAM array temperature data together with read DRAM array data in a data buffer; and identifying the DRAM array temperature data buffered in the data buffer in response to the non-DRAM indicator of the generated control information buffered in the control buffer.