Patent ID: 7399672

Claim:
A method of forming a memory device, the method comprising: forming a device isolation layer in a semiconductor substrate including a cell array region and a resistor region, the device isolation layer extending into the resistor region and defining an active region in the semiconductor substrate; forming a first conductive layer on the device isolation layer in the resistor region; exposing the semiconductor substrate in the cell array region; forming a cell insulation layer on a portion of the semiconductor substrate including the exposed cell array region, the active region and the device isolation layer in the resistor region; forming a second conductive layer on the cell insulation layer in the portion of the semiconductor substrate including the cell array region, the active region and the device isolation layer in the resistor region; etching the second conductive layer to form a cell gate electrode in the cell array region and to concurrently remove the second conductive layer from the resistor region; and etching the first conductive layer in the resistor region to form a resistor.