Patent ID: 7763483

Claim:
A method of manufacturing an array substrate for a liquid crystal display device, comprising: forming a gate line, a gate pad and a gate electrode on a substrate through a first mask process; forming a data line, a data pad, a source electrode, a drain electrode and an active layer on the substrate including the gate line, the gate pad and the gate electrode through a second mask process, wherein the data line crosses the gate line to define a pixel region, the source electrode is extended from the data line, the drain electrode is spaced apart from the source electrode, and the active layer is disposed between the gate electrode and the source and drain electrodes; forming an inorganic insulating layer on an entire surface of the substrate including the data line, the source electrode and the drain electrode; forming a passivation layer on the inorganic insulating layer through a third mask process, the passivation layer being etched to expose the substrate in the pixel region, a part of the drain electrode, the gate pad and the data pad, wherein the inorganic insulating layer is patterned by using the passivation layer as an etching mask, thereby forming an inorganic insulating pattern having the same shape as the passivation layer; and forming a pixel electrode, a gate pad terminal and a data pad terminal by depositing a transparent conductive material on an entire surface of the substrate including the passivation layer, the pixel electrode directly contacting the exposed part of the drain electrode, the gate pad terminal directly contacting the gate pad, and the data pad terminal directly contacting the data pad, wherein the passivation layer is cured before forming the pixel electrode, whereby the passivation layer has reversely tapered sides having an angle smaller than 90 degrees.