Patent ID: 7598557

Claim:
A semiconductor device comprising: a transistor including a gate electrode formed over a semiconductor substrate with a gate insulation film formed therebetween, and a source/drain diffused layer formed in the semiconductor substrate on both sides of the gate electrode; a first insulation film formed over the semiconductor substrate and the transistor; a first conductor plug buried in first contact hole formed down to the source/drain diffused layer; a capacitor formed over the first insulation film and including a lower electrode, a dielectric film formed over the lower electrode and an upper electrode formed over the dielectric film; a first hydrogen diffusion preventing film formed over the first insulation film, covering the capacitor, for preventing the diffusion of hydrogen; a second insulation film formed over the first hydrogen diffusion preventing film, a surface of the second insulation film being planarized, the second insulation film being contacted with the first hydrogen diffusion preventing film; a second hydrogen diffusion preventing film formed over an entire top surface of the second insulation film, for preventing the diffusion of hydrogen, the second hydrogen diffusion preventing film being contacted with the second insulation film; a second conductor plug buried in a second contact hole formed down to the lower electrode or the upper electrode; a third conductor plug buried in a third contact hole formed down to the first conductor plug; and an interconnection formed over the second hydrogen diffusion preventing film and connected to the second conductor plug or the third conductor plug.