Patent ID: 8723590

Claim:
A power switch current estimator, comprising: a solid state power switch connected to a control terminal, an input current power terminal, an output current power terminal, and at least one sense wire terminal, wherein one or more parasitic elements define an electrical pathway between the at least one sense wire terminal and a corresponding power terminal; a driver unit connected to the control terminal and the at least one sense wire terminal and configured to selectively turn the solid state power switch on and off; and a current estimator configured to generate an estimated level of current circulating through the solid state power switch in real time in response to one or more switching events, wherein the estimated level of current is based on values of at least one of the one or more parasitic elements such that the estimated level of current substantially corresponds to an actual level of the current circulating through the solid state power switch, and wherein the current estimator comprises a summer configured to determine a weighted average of measured and integrated voltage and current signals with predefined weighting factors based on the values of the one or more of the parasitic elements.