Patent ID: 7754598

Claim:
A method for manufacturing a coreless packaging substrate comprising the following steps: providing a core board; forming a metal adhesive layer on the surface of the core board; forming a patterned first solder mask layer on the surface of the metal adhesive layer, wherein the first solder mask layer has a plurality of first openings; forming a metal pillar in each of the first openings, and forming a metal layer on the surface of the metal pillar and part of the surface of the first solder mask layer; forming a circuit built-up structure on the surfaces of the metal layer and the first solder mask layer, wherein the metal layer is embedded in the circuit built-up structure; forming a patterned second solder mask layer on the circuit built-up structure, wherein the second solder mask layer has a plurality of second openings exposing circuits of the circuit built-up structure, and the exposed circuits serve as second conductive pads; and removing the core board and the metal adhesive layer to expose the metal pillar serving as first conductive pads.