Patent ID: 7332819

Claim:
A stacked die assembly, comprising: at least two semiconductor dies situated on a substrate in a stacked arrangement; the substrate comprising a first surface having terminal pads located thereon, and a second surface; a first die comprising a first surface having bond pads located thereon, a second surface situated on the first surface of the substrate, and bonding elements connecting the bond pads to the terminal pads on the substrate; and a second die comprising a first surface, a second surface, and a perimeter; the first surface having bond pads located thereon; the second surface situated on the first surface of the first die and comprising a non-beveled recessed edge portion along the perimeter of the die with the bond pads on the first die positioned within the recessed edge portion; the non-beveled recessed edge portion having a height sufficient for clearance of the bonding elements extending from the bond pads of the first die.