Patent ID: 8692353

Claim:
A semiconductor structure comprising: at least two gate structures on a substrate, a recess being between the gate structures and extending in an isolation material of an isolation region in the substrate, the recess being defined by opposing sidewalls of the gate structures and opposing sidewalls of the isolation material, each of the opposing sidewalls of the isolation material having an edge adjoining an edge of a respective one of the opposing sidewalls of the gate structures, the recess being defined by a depth in a vertical direction, the depth being from a top surface of at least one of the gate structures to a surface of the isolation material below a top surface of the substrate; a filler material in the recess, the filler material having a first thickness in the vertical direction; and an inter-layer dielectric layer in the recess and over the filler material, the inter-layer dielectric layer having a second thickness in the vertical direction below the top surface of the at least one of the gate structures, the first thickness being greater than the second thickness.