Patent ID: 7205617

Claim:
A semiconductor device comprising a semiconductor substrate; a plurality of gate electrodes constituting p-channel field effect transistors formed in and on said semiconductor substrate; and a plurality of spatially arranged active regions formed with areas intersected by portions of said gate electrodes, respectively, to constitute said p-channel field effect transistors together with said plurality of gate electrodes, wherein: said plurality of gate electrodes include a first gate electrode and a second gate electrode having a longitudinal direction the same as a longitudinal direction of said first gate electrode, and said first and second gate electrodes are juxtaposed; said plurality of active regions include a first active region including an area intersected by a portion of said first gate electrode and a second active region including an area intersected by a portion of said second gate electrode; and a trench is formed between said first and second active regions along said longitudinal direction of said first and second electrodes, and formed along with said first and second active regions in a traverse direction of said longitudinal direction, a width of said trench formed in the traverse direction of said longitudinal direction being wider than that of said trench formed along said longitudinal direction, wherein the width of said trench formed between said first and second active regions in said longitudinal direction of said first and second electrodes is 0.25 μm or narrower.