Patent ID: 7622373

Claim:
A method for fabricating a dual-bit memory device comprising a first dual-bit memory cell and a second dual-bit memory cell, the method comprising the steps of: forming a first gate stack of the first dual-bit memory cell and a second gate stack of the second dual-bit memory cell overlying a substrate, wherein the first gate stack and the second gate stack are each designed to store at least two bits of information; forming an oxide region at a first depth within the substrate and between the first and second gate stacks, wherein the oxide region is formed in a region within the substrate that underlies both the first and second gate stacks and that is shared by the first and second gate stack; forming an impurity doped region at a second depth within the substrate and between the first and second gate stacks to produce a shared bit line that is shared by both of the first and second gate stacks, and wherein the impurity doped region extends to and directly contacts the oxide region to prevent electrons from migrating between the first and second gate stacks, and wherein the first depth is lower than the second depth.