Patent ID: 8006030

Claim:
A memory controller for controlling access to a flash memory having a physical block including a plurality of pages, each of the pages having a data area for storing data and a redundant area for storing data management information, the memory controller comprising: a page write unit for writing data in the data areas and writing information for correcting an error of the data and status information indicating that the data has been written as the data management information in the redundant areas sequentially from the first page of all erased pages of the physical block; a binary search unit for reading the redundant areas of the pages through a binary search on addresses of the pages of the physical block using a means for identifying the next address of the page to read based on whether the status information in the redundant areas of the pages indicate that the data have been written or not to temporarily identify an address of the page when the binary search is finished as a last valid page; and a last valid data identification unit for reading the data from the data areas and the data management information from the redundant areas of the last valid page temporarily identified by the binary search unit and a page adjacent to the temporarily identified last valid page to finally identify the last valid page and make a judgment as to whether an error page resulting from power-down during the operation of the page write unit exists or not based on the results of checking the temporarily identified last valid page and the page adjacent to the temporarily identified last valid page as to whether or not an uncorrectable error has occurred and whether or not the data has been written in the data area.