Patent ID: 7126943

Claim:
A method for interfacing a parallel connection, the parallel connection transmitting high bit-rate signals for a short distance, the method comprising: receiving a synchronous N-bits input data flow, the N-bits input data flow being at a first input frequency; inserting said input data flow into parallel packets, the parallel packets having a given length; and outputting said packets having a given length at a second output frequency onto a M-wires parallel connection, said method further comprising: defining an elementary packet comprising M lines and B+1 columns, with B being an integer; defining a parallel packet by employing an integer number of said elementary packets, said number of elementary packets being chosen in order to maintain a constant phase relationship between the input frequency and the output frequency according to a number of parity lines in the elementary packet and to a code factor onto the parallel connection; inserting the input data flow into said parallel packet; and sending said parallel packet with the input data flow inserted therein into said parallel connection.