Patent ID: 7602874

Claim:
A method, in a data processing device, for determining a timebase value for use in performing time based operations, comprising: generating a fixed frequency clock signal, wherein the fixed frequency clock signal drivers a first circuit portion within the data processing device; generating a scalable frequency core clock signal, wherein the scalable frequency core clock signal drives a second circuit portion coupled to the first circuit portion; accumulating, by the first circuit portion, a sum of ticks of one of an internal timebase counter or a sampled external timebase signal based on the fixed frequency clock signal, wherein the internal timebase counter is part of a first circuit portion that comprises a timebase signal input pin and an edge detect circuit element that detects an edge of a timebase input signal received via the timebase signal input pin and wherein the edge detect circuit element generates a tick in response to detecting a rising edge of the timebase input signal; adding the accumulated sum of ticks to a previously stored timebase value based on the scalable frequency core clock signal to generate an updated timebase value; and outputting the updated timebase value for use by a microprocessor to perform time based operations, wherein accumulating a sum of ticks comprises using a timebase accumulator that is driven by the fixed frequency clock signal and accumulates the sum of ticks; and wherein the timebase accumulator comprises an edge detect circuit element that detects an edge of a reset signal sent from the second circuit portion based on the scalable frequency core clock signal; and wherein the accumulated sum of ticks is added to the stored timebase value in response to detecting the edge of the reset signal.