Patent ID: 7001806

Claim:
A method for generating a semiconductor structure, comprising: a buried first semiconductor layer of a first doping type; a second semiconductor layer of the first doping type on the buried semiconductor layer, which is less doped than the buried first semiconductor layer; a semiconductor area of a second doping type on the second semiconductor layer, so that a pn junction is formed between the semiconductor area and the second semiconductor layer; and a recess present below the semiconductor area in the buried first semiconductor layer, which contains a further semiconductor area of the first doping type, which lies deeper in the substrate than the buried first semiconductor layer, such that the breakdown voltage across the pn junction is higher than if the recess were not provided the method comprising, providing the buried first semiconductor layer with the recess formed therein, performing an implantation for introducing a doping of the first doping type into the recess to generate the further semiconductor area of the first doping type, which lies deeper in the substrate than the buried first layer; generating the second semiconductor layer on the buried first semiconductor layer, which is less doped than the buried first semiconductor layer, prior to or after performing the implantation; and generating the semiconductor area of the second doping type on the second semiconductor layer in order to form the pn junction.