Patent ID: 8368125

Claim:
An electronic device comprising: a conductive channel defining a crystal structure, the conductive channel having a channel length, an alignment of the channel length relative to the crystal structure and a channel thickness t C ; and a dielectric film in contact with a surface of the channel, the dielectric film having a film thickness t G , wherein a ratio t G /t C is greater than or equal to 0.1, the dielectric film comprises a material that exerts one of a compressive or a tensile force on the contacted surface of the conductive channel, and, when a voltage is applied across the channel the compressive or tensile force and the alignment of the channel length increase electrical mobility of carriers along the channel length wherein the electronic device comprises a transistor, the dielectric film comprises a gate stack having at least a gate dielectric, and the conductive channel comprises nanowire having a thickness t C less than or equal to about 20 nanometers, and wherein the transistor comprises one of an n-FET and a p-FET, and the channel length is substantially aligned with one of a <100> Miller index of the crystal structure and <110> Miller index of the crystal structure.