Patent ID: 7771541

Claim:
A method to process a circuit assembly, comprising: placing a wafer with the circuit assembly in a process chamber; and exposing the wafer to a plasma state that is generated with a mixture of Argon (Ar) and Oxygen (O 2 ) in a range of about 80% Ar and about 20% O 2 to about 95% Ar and about 5% O 2 by volume, for a period of time sufficient to remove substantially all of a graphitic/fluorinated polymer layer and at least some of a tin residue, where exposing occurs at a gas pressure in a range of about 10 mTorr to about 500 mTorr, at a plasma power in a range of about 100 W to about 1000 W, and where the period of time is in a range of about 1 minute to about 30 minutes, where the wafer comprises a semiconductor wafer upon which are mounted solder balls; and repeating the exposing the wafer to the plasma state that is generated with the mixture of Ar and O 2 until a sufficient amount of the tin residue is removed.