Patent ID: 7522680

Claim:
An apparatus for asymmetric maximum likelihood detection, the apparatus comprising: a coefficient module comprising hardware circuits and configured to calculate a plurality of coefficients optimized for an asymmetric waveform; an initialization module comprising hardware circuits and configured to initialize j plus one (j+1) path memories pm each configured as a string of binary values; a metrics module comprising hardware circuits and: a plurality of branch metric modules each comprising hardware circuits and: a computation module comprising hardware circuits and configured to calculate j plus one (j+1) first specified likelihood functions m(n) as m k−1 (n)+2μ n/r y k −μ n/r 2 and j plus one (j+1) second specified likelihood functions m(n+1) as m k−1 (n+1)+2μ n/r y k −μ n/r 2 for each specified value of n from zero (0) to j, wherein k minus one (k−1) refers to the time slice immediately prior to the current time slice, m (k−1) (n) is the first specified branch metric m (k−1) (n+1) is the second specified branch metric for the prior time slice k for each specified value of n from zero (0) to j, r is a specified coefficient identifier, y k is a digital input value of a current time slice of a read channel analog value, and μ n/r , and μ n+1/r are coefficients corresponding to m(n) and m(n+1); and a selection module comprising hardware circuits and that calculates j plus one (j+1) third specified branch metrics referred to as m k (q) where q is a specified integer from zero (0) to j as the maximum of the first and second specified likelihood functions; a plurality of path metrics modules comprising hardware circuits and configured to calculate j plus one (j+1) third specified path memories pm k (q) for each q where q is the specified integer from zero (0) to j as the first specified path memory for the prior time slice pm (k−1) (n) shifted one bit if the first specified likelihood function is greater than the second specified likelihood function else as the second path memory for the prior time slice pm (k−1) (n+1) shifted one bit if the first likelihood function is less than the second likelihood function for each path memory pm (k−1) (n) for each specified value of n; and a results module comprising hardware circuits and configured to identify a data output value from at least one path memory.