Patent ID: 7280111

Claim:
A method, comprising: providing a hardware rendering device having on-chip register storage; communicating at least one instruction from a host computing system to said hardware rendering device, wherein said host computing system has a main memory and having stored thereon a 3-D API, and wherein said at least one instruction has at least one graphics data argument formatted for the register storage of said hardware rendering device; receiving at least one instruction with said hardware rendering device; processing with the hardware rendering device processes said at least one graphics data argument incident to the performance of said at least one instruction without accessing the main memory of the host computing system and said hardware rendering device outputs the result of the processing, wherein said at least one instruction is an instruction with at least one floating point number argument and said hardware rendering device outputs the fractional portion of said at least one floating point number; and outputting with said hardware rendering device four fractional portions of corresponding four floating point number arguments.