Patent ID: 7904665

Claim:
A multiprocessor system, comprising: multiple cells respectively including a processor, a cache memory and a main memory; and a network for connecting the multiple cells, wherein a third cell stores, in the cache memory, a latest version of target data in a main memory of a second cell, wherein a first cell issues a read request for said target data to said second cell, wherein said second cell issues a snoop request to said third cell in response to said read request, wherein said third cell directly transmits said latest version of target data to said first cell in response to said snoop request and transmits a reply write back to said second cell, wherein said first cell issues a request write back to a same address as that of said target data in said second cell, wherein said second cell discards said reply write back if said reply write back from said third cell is received from said first cell after said request write back, wherein said second cell determines whether said second cell receives said reply write back from said third cell after receiving said request write back from said first cell or not, and said second cell discards said received reply write back if said second cell receives said reply write back after receiving said request write back, wherein each of the cells further comprises a directory, wherein the first cell allows the request write back to include directory update information for coherency between a status of the cache in the first cell and a directory of the second cell, wherein, if the second cell receives the reply write back after the request write back, the second cell discards the reply write back and updates a status of the directory based on the directory update information, wherein each of the cells further comprises a snoop management table, wherein the read request includes a request cell information showing a request issuing source and an address information showing a read target address, and wherein the request cell information and the address information are registered in the snoop management table in response to the read request, wherein each of the cells further comprises a write back detection circuit, wherein the snoop management table includes the registered request cell information and a detection flag corresponding to the address information, and wherein the write back detection circuit of the second cell detects the request write back for a same address as the read target address indicated by the registered address information, and if the request write back is detected, the detection flag is validated.