Patent ID: 7773023

Claim:
A successive approximation type A-to-D converter for converting an analog value to a digital value, comprising: a cyclic D-to-A converter; a comparator for comparing the analog value with an output value of the D-to-A converter; and memory means for sequentially storing an output value of the comparator and supplying the stored value to the D-to-A converter in a reverse order wherein the memory means is structured such that a plurality of flip-flops are connected in a ring shape through selectors for selectively outputting one of one or more inputs, an output value of a first flip-flop is supplied to each selector as one of inputs, an H-level logic value is supplied to a selector located on an input side of the first flip-flop as one of inputs, and an output value of the comparator is supplied to a selector located on an input side of a second flip-flop as one of inputs, and an output value of the first flip-flop is supplied to the D-to-A converter.