Patent ID: 8140766

Claim:
In a data processing system having a cache hierarchy with at least one cache, a method comprising: initiating an eviction of a data region from a region coherence array (RCA), wherein lines from the evicted data region still reside in one or more caches of a processor and the RCA is a set-associative array that is separate from the one or more caches of the processor; determining a line count pertaining to the data region; in response to the eviction of the data region from the RCA and the data region having a non-zero line count, adding the line count to a corresponding count value within a Region Victim Hash (RVH), wherein said count value is indexed by an address of the data region; resolving via the RVH an external snoop request for a data region indexed with a non-zero count; receiving the external snoop request for the region indexed by the corresponding region address; in response to the RVH count indexed by the requested region address being non-zero or the requested region being present in the RCA with non-zero line-count, issuing a snoop response that indicates that the requested region is present in the cache hierarchy; and in response to the RVH count indexed by the requested region address being zero and the requested region not being present in the RCA, generating a snoop response that indicates that the requested region is not present in the cache hierarchy; wherein an entry within the RVH optionally contains an NZ-bit to indicate whether the count is non-zero, and one or more parity bits, wherein the NZ-bit enables fast access on external snoops.