Patent ID: 7958202

Claim:
A data processing system comprising: a plurality of processors, including a first processor and a second processor; one or more input interfaces for providing input transaction data streams to the data processing system; one or more output interfaces for outputting output transaction data streams; a first series of transaction processing units, including a first transaction processing unit configured to operate on the first processor and a second transaction processing unit configured to operate on the second processor, the first series further configured to process an input transaction data stream received at the one or more input interfaces into an output transaction data stream by way of a series of intermediate processing steps, each step carried out at a respective one of the first series of transaction data processing units, and each step generating respective intermediate transaction processing data; and one or more memory units communicatively interconnecting pairs of the transaction processing units, including at least a pair consisting of the first transaction processing unit and the second transaction processing unit, the one or more memory units further being configured to store the respective intermediate transaction processing data, and to communicate the respective intermediate transaction processing data between the interconnected pairs of the transaction data processing units as the series of intermediate processing steps is carried out, wherein the first series is further configured to add an input weighting factor to the input transaction data stream, determine an output weighting factor associated the output transaction data stream, and compare the input and output weighting factors with one another to establish whether or not an error has occurred during processing of the input transaction data stream.