Patent ID: 7555574

Claim:
A switch having one or more switching modules that are capable of maintaining data throughput, comprising: one or more ports for receiving a plurality of inbound packets and for transmitting a plurality of outbound packets; a physical layer device coupled to the one or more ports for receiving the plurality of inbound packets; a media independent interface coupled to the physical layer device for receiving the plurality of inbound packets from the physical layer device; a media access controller coupled to the media independent interface for receiving the output of the media independent interface and for processing the output of the media independent interface to increase bit width, wherein the media access controller comprises: a management control element coupled to the media independent interface for receiving the output of the media independent interface and for stripping off control bits; a receive function element coupled to the management control element for receiving the output of the management control element and for increasing the bit width of the output from the management control element, wherein the receive function element comprises a first and second gate element blocks, the first and second gate element blocks receiving the plurality of inbound packets, and wherein said first and second gate element blocks sample said plurality of inbound packets on the leading and trailing edge of the clock, respectively, to generate more than one plurality of instances of data, and wherein said first and second gate element blocks output more than one plurality of instances of data and a third gate element block outputs the increased bit width data wherein said third gate element block combines said more than one plurality of instances of data in accordance with a second rising edge of the clock; a receive control element coupled to the receive function element for receiving the increased bit width data from the receive function element and for transmitting the increased bit width data to a packet switching controller; a transmit control element coupled to the packet switching controller for receiving the output of the packet switching controller; and a transmit function element for receiving the output of the transmit control element and for operating on the output of the transmit control element; and the packet switching controller coupled to the media access controller for receiving the increased bit width data from the media access controller and for transmitting the increased bit width data; wherein the receive function element further comprises a logic block coupled to the third gate element block for generating statistics, performing data alignment, and performing cyclical redundancy checks on data output by the third gate element block.