Patent ID: 7148117

Claim:
A method for forming an STI structure comprising: forming a buffer oxide layer on a silicon substrate; implanting ions into the substrate; removing the buffer oxide layer; depositing a gate oxide layer, a polysilicon layer and a nitride layer; forming a photoresist pattern on the nitride layer; performing an etching process of the nitride layer, polysilicon layer, gate oxide layer, and the substrate using the photoresist pattern as an etching mask to form the trench for the STI structure; forming a liner oxide layer inside the trench; filling the trench with an insulating layer; performing a CMP process using the nitride layer as an etching stop layer to planarize the insulating layer and the liner oxide layer; performing a recessing process to etch the planarized insulating layer and the liner oxide layer in the trench to a predetermined depth; forming a second photoresist pattern on the nitride layer; and performing an etching process using the second photoresist pattern as a mask pattern to form the gate electrodes.