Patent ID: 7760846

Claim:
A shift register, comprising: a plurality of shift register units connected in cascade, wherein at least one of the plurality of shift register units comprises: an output terminal; a first switch element, comprising: a control terminal, coupled to a first clock signal; a first terminal, coupled to a first node; and a second terminal, coupled to an output terminal of a shift register unit at previous stage; a second switch element, comprising: a control terminal, coupled to the first clock signal; a first terminal, coupled to a second node; and a second terminal, coupled to a first voltage source; a third switch element, comprising: a control terminal, coupled to a second clock signal; a first terminal, coupled to a second voltage source; and a second terminal, coupled to the second node; a fourth switch element, comprising: a control terminal, coupled to an output terminal of a shift register unit at next stage; a first terminal, coupled to the second voltage source; and a second terminal, coupled to the first node; a fifth switch element, comprising: a control terminal, coupled to the first node; a first terminal, coupled to the output terminal; and a second terminal, coupled to a third clock signal; and a sixth switch element, comprising: a control terminal, coupled to the second node; a first terminal, coupled to the second voltage source; and a second terminal, coupled to the output terminal.