Patent ID: 7221041

Claim:
A multi-chips module package, comprising: a lead frame having a plurality of first leads, second leads and chip pads connecting to the first leads, wherein an upper surface of the first leads, an upper surface of the second leads, and an upper surface of the chip pads are in a common horizontal plane, and each chip pad has a recess which is recessed downward into the upper surface of the chip pad for accommodating a bump; a first chip having a first active surface, a first back surface opposite to the first active surface, a plurality of bump-bonding pads formed on the first active surface and that are opposing the chip pads and a plurality of bumps attached to the bump-bonding pads, the first chip disposed above the lead frame and attached to the lead frame through the bumps connecting to the chip pads, wherein the area of the first chip is larger than the total area of the chip pads; a second chip having a second active surface, a second back surface opposite to the second active surface, a plurality of wire-bonding pads formed on the second active surface, the second chip disposed over the first chip; a plurality of wires connecting the wire-bonding pads and the second leads; and an encapsulation covering the first chip, the second chip, and the lead frame, wherein portions of the first leads and portions of the second leads are exposed out of the encapsulation, and a plurality of tie bars connecting the first leads and the chip pads.