Patent ID: 7365273

Claim:
A circuit board assembly comprising: a low-temperature co-fired ceramic substrate comprising a top layer, a bottom layer and at least one intermediate layer, each of said layers bonded directly to any adjacent layers, and conductor lines carried on at least one of said intermediate layers internally within said substrate, said bottom layer defining a first, outer surface of said substrate; a heat sink having an upper surface bonded to the first, outer surface of said substrate, said substrate and heat sink cooperating to define a closed cavity therebetween, said cavity extending from the upper surface of said heat sink, through the bottom layer of said substrate, and terminating at an intermediate layer of said substrate, exposing conductor lines carried on said intermediate layer; a surface-mount circuit device enclosed within said cavity, said circuit device defining an active surface facing said intermediate layer and including solder bumps in-circuit with said exposed conductor lines, said circuit device defining a passive surface bonded to said heat sink to provide a thermal path from the device to the heat sink; underfill material which, in combination with said circuit device, entirely fills said closed cavity; a second closed cavity defined by said substrate and heat sink and extending through the bottom layer of the substrate, the second cavity exposing conductor lines carried on an intermediate layer; and a passive electronic component mounted within the second cavity so as to be received entirely within the second cavity, the passive electronic component being electrically connected to the exposed conductor lines within the second cavity.