Patent ID: 8183115

Claim:
A method of manufacturing a semiconductor device comprising the steps of: (a) preparing a substrate that includes: a semiconductor substrate having a first region in which a first MISFET is formed and a second region in which a second MISFET is formed, an insulating layer formed on the semiconductor substrate and a semiconductor layer formed on the insulating layer; (b) removing the semiconductor layer and the insulating layer in the second region to expose the semiconductor substrate in the second region; (c) forming a first gate electrode and a first gate insulator on the semiconductor layer in the first region with the first gate insulator interposed between the first gate electrode and the semiconductor layer; (d) forming a second gate electrode and a second gate insulator on the semiconductor substrate in the second region with the second gate insulator interposed between the second gate electrode and the semiconductor substrate; (e) after steps (c) and (d), forming second extension regions of the second MISFET in the semiconductor substrate of the second region; (f) after step (e), forming first sidewall spacers over side walls of the first gate electrode and over side walls of the second gate electrode; (g) after step (f), forming first elevated layers over the semiconductor layer of the first region and over the side walls of the first gate electrode via the first sidewall spacers; (h) after step (f), forming second elevated layers over the semiconductor substrate of the second region and over the side walls of the second gate electrode via the first sidewall spacers; (i) after step (h), removing the first sidewall spacers; (j) after step (i), forming first extension regions of the first MISFET in the semiconductor layer of the first region; (k) after step (j), forming second sidewall spacers over the side walls of the first gate electrode and over the side walls of the second gate electrode; wherein a thickness of the first elevated layers is greater than a thickness of the second elevated layers.