Patent ID: 7750750

Claim:
An apparatus, comprising: a phase locked loop (PLL) that includes: a phase frequency detector (PFD) that generates a charge pump control signal based on a phase difference between a reference signal and a feedback signal; a charge pump that, based on the charge pump control signal, generates a voltage controlled oscillator (VCO) control signal; a filter that filters the VCO control signal; a VCO that generates an up-converted feedback signal based on the filtered VCO control signal and a first limited modulation point that is within a truncated range between ±90°; and a divider that divides down the up-converted feedback signal, based on a second limited modulation point that is within the truncated range between ±90°, thereby generating the feedback signal; and a balanced up-converter mixer/modulator that processes the up-converted feedback signal thereby generating an output radio frequency (RF) signal having a selected magnitude; and wherein: the VCO and the divider operate cooperatively to set a phase of the feedback signal; and the PLL and the balanced up-converter mixer/modulator operate cooperatively to set a phase of the output RF signal.