Patent ID: 7161571

Claim:
A TFT display controller comprising: a frame buffer operational to store TFT display data supplied from outside; a timing controller; a pixel pipe line (PPL) operational in response to signals generated by the timing controller to fetch and convert the TFT display data to a desired TFT display format; and TFT display source/gate driver controls operational in response to signals generated by the timing controller to control representation of the TFT display data, wherein all of the frame buffer, timing controller, pixel pipe line and TFT display source/gate driver controls are incorporated onto a single die, and wherein the PPL outputs fixed data independent from the TFT display data to the source/gate driver controls in response to signals generated by the timing controller; wherein the timing controller switches the output of the TFT display data of the converted format from the PPL and the output of the fixed data in a constant cycle and a constant ratio time.