Patent ID: 7979038

Claim:
A PLL modulation circuit comprising: a PLL section that includes a voltage controlled oscillator, a first divider that divides an output signal of the voltage controlled oscillator, a phase comparator that compares a phase of an output signal of the first divider with a phase of a reference signal, and a loop filter that smoothes an output signal of the phase comparator; a first modulation signal input section that inputs a first modulation signal to the first divider or the phase comparator as a first input location of the PLL section; a second modulation signal input section that performs DA conversion of a digital modulation signal with a DA converter and generates an analog second modulation signal, and inputs that analog second modulation signal to the voltage controlled oscillator as a second input location of the PLL section; a second divider that divides the output signal of the voltage controlled oscillator; and a control section that generates a center frequency control signal, a gain control signal, and a division ratio control signal for the second divider based on an input channel selection signal and control voltage, supplies the center frequency control signal to the first divider, supplies the gain control signal to the DA converter, and supplies the division ratio control signal to the second divider.