Patent ID: 8489780

Claim:
A non-volatile memory device, comprising: a plurality of input/output (I/O) signal pins for coupling to a bus and to receive a communications sequence comprising I/O signals from a bus; a control signal pin for coupling to the bus and to receive a control signal from the bus; and circuitry to: transition the non-volatile memory device from a non-operational sleep mode to an operational mode upon assertion of the control signal, the non-volatile memory device to further include a powered-off mode; determine whether the communications sequence identifies the non-volatile memory device; in response to determining the communications sequence does not identify the first non-volatile memory device, return the non-volatile memory device to the non-operational sleep mode upon deassertion of the signal on the control pin; and in response to determining the communications sequence does identify the first non-volatile memory device, remain in the operational mode and perform an operation indicated by the communications sequence.