Patent ID: 7321451

Claim:
A data converting circuit which receives 8 bit input data and converts the 8 bit input data into 10 bit output data, comprising: a group select circuit which receives the 8 bit input data, compares the 8 bit input data with boundary information stored in advance, and in accordance with a result of the comparison, selects the 8 bit input data as one of a plurality of groups and outputs a group select signal; a first multiplexer which receives the group select signal from the group select circuit and outputs most significant 2 bit data corresponding to most significant 2 bits of the 10 bit output data; an output data table which stores in advance a least significant 8 bit data group corresponding to least significant 8 bits of the 10 bit output data; and a second multiplexer which receives the 8 bit input data and selectively outputs a least significant 8 bit data group stored in the output data table and corresponding to the least significant 8 bits of the 10 bit output data.