Patent ID: 7945884

Claim:
A method of routing differential trace pairs on an electrical backplane, comprising: using a processor for: identifying and storing the identities of backplane pin pairs at a first and second plurality of backplane card slots that will connect to differential trace pairs, each of the plurality of first card slots comprising at least one connector block having a pinout capable of accepting a first type of circuit card and each of the plurality of second card slots comprising at least one connector block have a pinout capable of accepting a second type of circuit card; selecting and storing logical pairings of differential traces to connect pin pairs on the connector blocks of the first card slots to pin pairs on the connector blocks of the second card slots, such that each first card slot connects to each second card slot via at least one of the differential trace pairs; and assigning and storing designated pin pairs to each logical pairing of differential traces, with routing priority and designated pin pair selection priority given to the logical pairings of differential traces with the longest routing distances, the assignment resulting in different pin pair assignments for at least two of the first card slots and resulting in different pin pair assignments for at least two of the second card slots.