Patent ID: 8106805

Claim:
An apparatus for receiving a first analog signal, a first digital code, a control code, and generating a second analog signal, and a second digital code, the apparatus comprising: a sub-ADC (analog-digital converter) for converting the first analog signal into an intermediate digital code under a perturbation by the control code; a sub-DAC (digital-analog converter) for converting the intermediate digital code into an intermediate analog signal; an analog summing circuit for subtracting the intermediate analog signal from the first analog signal to generate a residual analog signal; an amplifier for amplifying the residual analog signal by an inter-stage gain factor to generate the second analog signal; a digital summing circuit for generating the second digital code by performing a weighted sum on the intermediate digital code and the first digital code in accordance with a weighting factor; and an adaptation circuit for receiving the second digital code and the control code and generating the weighting factor in accordance with a correlation between the control code and the second digital code.