Patent ID: 8154322

Claim:
An apparatus comprising: an input node; an output node; an explicit capacitor block having a first terminal coupled to the output node; a first switch operatively coupled to the output node, the first switch being capable of switching at least one of high or low in response to conditions at the input node; and an inverter or buffer circuit having an output capacitively coupled to the output node via the explicit capacitor block, wherein the output of the inverter or buffer circuit is configured to switch high and low in response to the conditions at the input node, wherein the output of the inverter or buffer circuit is substantially in phase with the output of the first switch, wherein the inverter or buffer circuit comprises an inverter or buffer having a first input and a first output, wherein the first input is electrically coupled to the input node, and wherein the first output is electrically coupled to the explicit capacitor block, and wherein the inverter or buffer circuit further comprises a buffer or inverter having a second input and a second output, wherein the second input is electrically coupled to the input node, and wherein the second output is configured to provide a signal to the first switch.