Patent ID: 8631292

Claim:
A flip-flop circuit, comprising: a master latch having an input and an output; a slave latch having an input coupled to the output of the master latch; and a feedback latch having an input coupled to the output of the slave latch and an output coupled to the input of the master latch; a master/slave gate between the input coupled between the master latch and the slave latch having an input coupled to the output of the master latch and an output coupled to the input of the slave latch; a slave gate coupled between the slave latch and the feedback latch having an input coupled to the output of the slave latch and an output coupled to the input of the feedback latch; and a master gate coupled between the feedback latch and the master latch having an input coupled to the output of the feedback latch and an output coupled to the input of the master latch.