Patent ID: 7285974

Claim:
A large scale integrated circuit, comprising: an outer input terminal for receiving a signal; an input buffer for adjusting a level of the signal; an input side selector for receiving the signal from the input buffer and outputting the signal through a first output side thereof in a normal operation mode and through a second output side thereof in a test operation mode; a logic circuit for performing a specific logic process on the signal from the first output side of the input side selector; a bypass circuit for receiving the signal from the second output side of the input side selector and transferring the signal; an output side selector for selecting the signal from the logic circuit in the normal operation mode and the signal from the bypass circuit in the test operation mode, and outputting the signal; an output buffer for receiving the signal from the output side selector, and amplifying and outputting the signal; and an outer output terminal for receiving the signal from the output buffer and outputting the signal.