Patent ID: 8804430

Claim:
A method of operating non-volatile storage having a plurality of NAND strings each having a plurality of non-volatile storage elements above a channel region, a first select transistor at a first end of the NAND string, and a second select transistor at a second end of the NAND string, the NAND strings being associated with a plurality of word lines, the first select transistor of each of the NAND strings having a first diffusion region on the side of the first select transistor that is furthest from the non-volatile storage elements of the respective NAND string, the second select transistor of each of the NAND strings having a second diffusion region on the side of the second select transistor that is furthest from the non-volatile storage elements of the respective NAND string the method comprising: applying a voltage to the first diffusion region of at least one of the first select transistors, the magnitude of the voltage applied to the first diffusion region depends on the location of a selected word line on the plurality of NAND strings; and applying a program voltage to the selected word line while applying the voltage to the first diffusion region.