Patent ID: 7323754

Claim:
A semiconductor device comprising: an isolation region formed extending from a surface of a semiconductor substrate to a first depth position; first and second wells of a first conductivity type formed in said semiconductor substrate; a first transistor formed in said first well, said first transistor including a gate insulating film having a first thickness, source/drain regions of a second conductivity type opposite to the first conductivity type, and a gate electrode; and a second transistor formed in said second well, said second transistor including a gate insulating film having a second thickness thinner than the first thickness, source/drain regions of the second conductivity type, and a gate electrode; wherein said first well has only a first impurity concentration distribution having a maximum value at a depth position equal to or deeper than said first depth position, and said second well has a second impurity concentration distribution superposing an impurity concentration distribution same as said first impurity concentration distribution of said first well with an impurity concentration distribution having a maximum value at a second depth position shallower than said first depth position, said second impurity concentration distribution having the maximum value also at said second depth.