Patent ID: 8405126

Claim:
A semiconductor device comprising: a substrate; a semiconductor layer stack including a first nitride semiconductor layer which is formed on the substrate, and a second nitride semiconductor layer which is formed on the first nitride semiconductor layer, and has larger band gap than the first nitride semiconductor layer; a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor layer stack, and are spaced from each other; a first control layer formed between the first ohmic electrode and the second ohmic electrode; and a first gate electrode formed on the first control layer, wherein the first control layer is formed with a p-type nitride semiconductor layer stack, and the p-type nitride semiconductor layer stack includes a lower layer which is in contact with the second nitride semiconductor layer, an intermediate layer which is formed on the lower layer, and has lower impurity concentration than the lower layer, and an upper layer which is formed on the intermediate layer, and has higher impurity concentration than the intermediate layer.