Patent ID: 8145890

Claim:
A microprocessor, comprising: a memory, configured to store instructions of a non-user program to implement a user program instruction of the user-visible instruction set of the microprocessor, the non-user program including a conditional branch instruction; a first fetch unit, configured to fetch instructions of the user program that includes the instruction that is implemented by the non-user program; an instruction decoder, configured to decode the user program instructions and to save a state in response to decoding the user program instruction that is implemented by the non-user program; an execution unit, configured to execute the user program instructions fetched by the first fetch unit, and configured to execute instructions of the non-user program other than the conditional branch instruction; and a second fetch unit, configured to fetch the non-user program instructions from the memory, and configured to resolve the conditional branch instruction based on the saved state without sending the conditional branch instruction to the execution unit to resolve the conditional branch instruction.