Patent ID: 7675103

Claim:
A spin transistor, comprising: a semiconductor substrate part having a lower cladding layer, a channel layer, and an upper cladding layer sequentially stacked therein; a ferromagnetic source and drain spaced from each other on the substrate part; and a gate formed on the substrate part to control spins of electrons passing through the channel layer, wherein the lower cladding layer comprises a first lower cladding layer and a second lower cladding layer formed under the first lower cladding layer and having a higher band gap than that of the first lower cladding layer, wherein the upper cladding layer comprises a first upper cladding layer and a second upper cladding layer formed on the first upper cladding layer and having a higher band gap than that of the first upper cladding layer, and wherein the source and the drain are buried in an upper surface of the substrate part and extend downwardly to or under the first upper cladding layer.