Patent ID: 7839006

Claim:
A semiconductor device, comprising: a semiconductor substrate having a scribe lane and a chip area in which a plurality of metal lines are formed; a dielectric film formed on the semiconductor substrate; a first conductive film formed on the dielectric film in the chip area; an alignment mark formed on the dielectric film in the scribe lane; a first passivation film formed on an entire surface of the semiconductor substrate including the first conductive film in the chip area and the alignment mark in the scribe lane sequentially; a second passivation film formed on the semiconductor substrate in the chip area excluding the scribe lane and the first conductive film; a second conductive film formed on the second passivation film and electrically connected with the first conductive film through the first passivation film and the second passivation film in the chip area; and a third passivation film formed on the semiconductor substrate in the chip area excluding the scribe lane and the second conductive film, wherein the first passivation film and the second passivation film have different etch selectivity.