Patent ID: 7060193

Claim:
A method for creation of layers of dielectric, comprising: providing a substrate, said substrate having been provided with semiconductor devices; depositing a stack of layers over a layer of interconnect metal, said stack of layers comprising: (i) a lower layer of etch stop material; and (ii) a first upper layer of dielectric having a first dielectric constant; patterning said stack of layers, creating an opening through said first upper layer of dielectric and said lower layer of etch stop material; creating in one plane a patterned first upper layer of dielectric having said first dielectric constant and a patterned second upper layer of dielectric having a second dielectric constant by filling said opening created through said first upper layer of dielectric and said lower layer of etch stop material with a second upper layer of dielectric having said second dielectric constant, said patterned first upper layer of dielectric being in direct contact with said second upper layer of dielectric; and creating a first component in or over said second upper layer of dielectric, said component being connected with said semiconductor devices provided over said substrate.