Patent ID: 6856522

Claim:
A power mosfet gate voltage clamping circuit comprising, a first capacitor having first and second terminals with said first terminal of said first capacitor connected to a drain terminal of said power mosfet, inverting switch means having a control terminal, a first output terminal, and a second output terminal with said control terminal of said inverting switch means connected to said second terminal of said first capacitor, said first output terminal of said inverting switch means coupled to a gate terminal of said power mosfet, and with said second output terminal of said inverting switch means coupled to a source terminal of said power mosfet, whereby an increase of drain to source voltage during a turn off transition of said power mosfet results in a current in said first capacitor resulting in the turn on of said inverting switch means and the clamping of the gate voltage of said power mosfet thereby preventing the turn on of said power mosfet during said turn off transition due to the current in an intrinsic gate drain capacitance of said power mosfet.