Patent ID: 7214572

Claim:
A method of manufacturing a semiconductor memory device having a SRAM in which a memory cell comprises a pair of transmission transistors and a flip-flop circuit containing a pair of driver transistors and a pair of load transistors, which comprises the steps of: forming, on a semiconductor substrate, active regions to form respective source regions and drain regions of said driver transistors, said load transistors and said transmission transistors; forming, on said semiconductor substrate, a first conductive film; and thereafter patterning this first conductive film to form a first conductive film interconnection that is to serve as an interconnection to constitute respective gate electrodes of said driver transistors, said load transistors and said transmission transistors; forming, on said semiconductor substrate, a first insulating film; and thereafter forming, in this first insulating film, an inlaid interconnection as one of a pair of local interconnections cross-coupling a pair of input/output terminals in said flip-flop circuit; and forming, on said first insulating film, a second insulating film, and thereafter forming a second conductive film and, then, patterning this second conductive film to form a second conductive film interconnection as the other one of said pair of local interconnections.