Patent ID: 8463042

Claim:
Process for pattern processing, exhibiting the following steps: a) discretizing of an input pattern, b) generation of a number n of discrete variants of the discretized input pattern in accordance with established rules, c) input of each of the n discrete input-pattern variants into a memory element and, in each memory element, mapping of the entered input-pattern variant to a respectively assigned output symbol from a finite set of discrete symbols in accordance with an associative assignment rule, and d) selection of one of the output symbols by way of selected symbol relating to the input pattern from n generated output symbols in accordance with an established selection rule, wherein the associative assignment rule in step c) is learned by feedback of the selected symbol as a reference symbol at a symbol input (set) of the memory element; in which the pattern processing is executed as a multi-stage process, wherein selected symbols of a first process stage serve as input patterns of a second process stage, and in which the generation of a number n of discrete variants of the discretized input pattern in process step b) of the second process stage is effected by mixing output symbols of the first stage.