Patent ID: 6924864

Claim:
An array substrate for use in an IPS-LCD device, comprising: a substrate; gate and common lines on the substrate in a first direction; a gate insulation layer on the substrate to cover the gate and common lines; a data line on the gate insulation layer in a second direction substantially perpendicular to the gate and common lines; a thin film transistor at a crossing of the gate and data lines, the thin film transistor including a gate electrode, an active layer, a source electrode, and a drain electrode; a passivation layer on the gate insulation layer, the passivation layer covering the thin film transistor and the data line and having first and second contact holes therethrough; a pixel electrode on the passivation layer, the pixel electrode contacting the drain electrode through the first contact hole; and a common electrode on the passivation layer, the common electrode contacting the common line through the second contact hole, wherein the common line and the drain electrode having the gate insulation layer interposed therebetween form a first storage capacitor, and wherein the pixel electrode and the gate line having the sate insulation layer and passivation layer interposed therebetween form a second storage capacitor.