Patent ID: 8619985

Claim:
A computing device implemented method to resist power analysis attacks on a computing device by executing cryptographic steps based on a defined cryptographic process, the defined cryptographic process accepting an input, generating an output, and utilizing one or more originally-defined substitution tables, the method comprising a processor of the computing device in communication with a memory for executing the steps of: a) defining n sets of random value data words r 1 ( x ) . . . rn(x), each data word having bits with defined bit locations, each set of random value data words comprising data word entries such that data words r 1 [ x ], . . . rn[ x ] correspond to entry S[ x ] in the original substitution table, b) defining a mask value, c) generating a set of split, masked tables by, for each entry S[ x ], i) masking the data word S[ x ] with corresponding data words r 1 [ x ], . . . , rn[ x ] in the set of random values to define a masked data word having bits with defined bit locations, ii) masking the mask value with a selected value r 1 [ x ] of the corresponding set of random values to define a randomized mask data word for S[ x ], having bits with defined bit locations, and iii) generating each of the entries in a split, masked table by selecting bits from the masked data word, the randomized mask data word and, where the size n of the set of random values is 2 or more, the random value data words in the set other than the selected value r 1 [ x ], whereby each selected bit used to define each split masked table entry is selected from a correspondingly defined bit-location in its original data word, each of the bits in the entry in the split masked substitution table being defined in accordance with a pre-selected pattern.