Patent ID: 7450617

Claim:
A video data stream front end processor for receiving video data input streams that use a time division multiplexing approach to combine program channel packets for multiple program channels, comprising: a plurality of synchronizers that receive video data input streams containing program channel packets and synchronize a clock rate of the video data input streams to a clock rate of said video data stream front end processor; a plurality of parsers coupled to said plurality of synchronizers that extract program channel packets for program channels of interest; and a plurality of demultiplexers that receive one or more video data input streams from said plurality of synchronizers with an output of each of said demultiplexers coupled to each of said plurality of parsers; wherein a demultiplexer within said plurality of demultiplexers transmits an accept message to a parser within said plurality of parsers when a program channel packet is received in a frame slot within a video data input stream where program channel information of interest is located.