Patent ID: 8278999

Claim:
An output buffer circuit capable of enhancing stability, comprising: an operational amplifier, comprising a positive input terminal, a negative input terminal and an output terminal reversely coupled to the negative input terminal, for generating an output voltage with a corresponding level to the output terminal according to an input voltage received by the positive input terminal; a capacitive load; an output control unit, coupled between the output terminal of the operational amplifier and the capacitive load, including an output switch for turning on or off the electrical connection between the output terminal and the capacitive load of the operational amplifier to form the signal output path, for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to form a signal output path and for adjusting impedance of the signal output path when the signal output path is formed, wherein the impedance of the signal output path is determined by conductivity of the output switch; and a control signal generation unit, coupled to the output switch for generating a control signal of the output switch to control the conductivity of the output switch, comprising: a plurality of level shifters, for individually generating a plurality of supply voltage levels according to a logic signal; and a multiplexer, coupled to the plurality of level shifters, for switching the plurality of supply voltage levels, to output as the control signal.