Patent ID: 8201991

Claim:
A frequency corrector comprising: a counter operative in response to a clock signal input at a first clock frequency for counting a number of clock pulses of the clock signal to divide the clock signal into a fraction of a natural number larger than unity to generate a signal at a second clock frequency, and for correcting a number of clock pulses of the signal at the second clock frequency in response to a correction signal to output a first frequency-divided signal; a frequency divider circuit that divides the first frequency-divided signal to output a unit time signal at a predetermined clock frequency and a second frequency-divided signal including a plurality of clock frequencies; a correction timing generator that decodes the first frequency-divided signal and the second frequency-divided signal to detect a correction timing for the first frequency-divided signal, and generates a plurality of correction timing signals different in timing from each other to output the plurality of correction timing signals; and a correction signal generator that generates the correction signal in response to the correction timing signals and correction values to provide the correction signal to said counter.