Patent ID: 8026588

Claim:
An integrated circuit die comprising: a semiconductor substrate; a dielectric layer over said semiconductor substrate; a metallization structure over said dielectric layer; a passivation layer over said dielectric layer and over said metallization structure, wherein said passivation layer comprises a nitride, wherein a first opening in said passivation layer is over a first contact point of said metallization structure, and said first contact point is at a bottom of said first opening; a polymer structure on said passivation layer, wherein said polymer structure is not vertically over said first contact point, wherein said polymer structure has a top, a first sidewall and a second sidewall opposite to said first sidewall, wherein said top is between said first and second sidewalls; and a metal layer on said top, on said first and second sidewalls and on said first contact point, wherein said metal layer comprises a first portion on said first sidewall, a second portion on said second sidewall and a third portion on said top, wherein said third portion of said metal layer has a bonding contact area vertically over said top, wherein said bonding contact area is connected to said first contact point through said first opening, wherein said first portion of said metal layer is connected to said second portion of said metal layer through said third portion of said metal layer, wherein said metal layer comprises a titanium-containing layer and a first gold layer directly on said titanium-containing layer, wherein no polymer layer is on said metal layer.