Patent ID: 7392502

Claim:
A masking and patterning process, comprising: providing a production mask having at least one optical proximity corrected (OPC-ed) verification structure and/or monitoring structure; exposing said production mask to form a first image of said at least one optical proximity corrected verification structure and/or monitoring structure on a photosensitive surface of a production or monitor wafer; printing and etching at least one verification structure and/or monitoring structure on the photosensitive surface of the production or monitor wafer surface; obtaining a second image of at least one of the verification structure and/or monitoring structure printed and etched on the test surface; processing said second image to locate optical proximity corrected verification structures and/or monitoring structures disposed on said production or monitor wafer surface; and measuring properties of at least one of said verification and/or monitoring structures using the processed second image; and wherein the verification structure and/or monitoring structure are printed and etched at a plurality of locations on the production or monitor wafer surface in cut lines or equivalent scribe lines; and wherein said step of obtaining the second image is repeated a sufficient number of times to improve the quality of acquired second images, but not such a sufficient number of times to heat the test surface to a sufficient temperature to cause test surface degradation.