Patent ID: 7064376

Claim:
An integrated circuit (IC) on a semiconductor substrate comprising: a high performance logic-circuit including a plurality of sub-micron logic transistors, at least a portion of said sub-micron logic transistors having a gate terminal with a gate oxide; and a plurality of embedded DRAM cells and peripheral DRAM circuits separate from said logic-circuit, wherein said DRAM cells include a select transistor having a select-transistor gate oxide having substantially the same thickness as said gate oxide of said portion of said sub-micron logic transistors; said DRAM cells further including a storage transistor having only a gate terminal and a drain terminal without a source terminal, wherein said drain terminal of said storage transistor is connected to a source terminal of said select-transistor, the gate oxide of the gate terminal of said storage transistors having substantially the same thickness as said gate oxide of said portion of said sub-micron logic transistors.