Patent ID: 7977203

Claim:
A method of fabricating a programmable via device over a device layer of a semiconductor chip, the method comprising the steps of: depositing a first dielectric layer over the device layer; forming a heater on a side of the first dielectric layer opposite the device layer; forming an air gap separating at least a portion of the heater from the first dielectric layer, wherein the air gap has a length that is less than a length of the heater and the air gap has a width that is greater than a width of the heater; depositing an isolation layer over the side of the first dielectric layer opposite the device layer so as to cover at least a portion of the heater; forming a first conductive via and a second conductive via each extending through at least a portion of the isolation layer and in contact with the heater; depositing a capping layer over a side of the isolation layer opposite the first dielectric layer; forming at least one programmable via extending through the capping layer and at least a portion of the isolation layer and in contact with the heater, the programmable via comprising at least one phase change material; forming a conductive cap over the programmable via; depositing a second dielectric layer over a side of the capping layer opposite the isolation layer; extending the first conductive via and the second conductive via each through the capping layer and through the second dielectric layer; and forming a third conductive via extending through the second dielectric layer and in contact with the conductive cap.