Patent ID: 8421501

Claim:
Circuitry for handling a digital signal, said circuitry comprising a high voltage input for receiving a high voltage level and a low voltage input for receiving a low voltage level, said circuitry comprising: a plurality of devices, said plurality of devices being designed to operate optimally when powered in a native voltage domain, wherein when said low voltage level is equal to a low native voltage level, a high native voltage level is lower than said high voltage level; a further input for receiving said high native voltage level; at least some of said plurality of devices of said circuitry being arranged in two sets, each set having at least one device, a first set being arranged in an upper voltage domain having an intermediate low reference voltage level as a low voltage level and said high voltage level as a high voltage level and a second set being arranged in a lower voltage domain having said high native voltage level as a high voltage level and said low voltage level as a low voltage level; wherein said intermediate low reference voltage level comprises a voltage level generated by subtracting said high native voltage level from said high voltage level, such that said devices of said first and said second set operate at or close to an optimal operating voltage difference.