Patent ID: 7756505

Claim:
A semiconductor integrated circuit comprising: a host processor; an interrupt controller that provides a notice of an interrupt request to the host processor; and a reconfigurable circuit a cell array structure and a switch control unit, wherein the cell array structure comprises a plurality of cells which perform an arithmetic processing, wherein the switch control unit controls a plurality of states of the reconfigurable circuit and includes a state transition table, and the reconfigurable circuit cooperating with the host processor, wherein the state transition table comprises a plurality of channels, wherein each of the plurality of channels has first information indicating a state of the reconfigurable circuit and second information designating whether the notice of the interrupt request is sent together with the first information to the host processor, wherein when the plurality of cells send information regarding switching a configuration of the plurality of cells, which comprises a processing function, and a transfer direction of the data to the switch control unit, the switch control unit selects one of the plurality of channels and sends information regarding the next state of the reconfigurable circuit to the plurality of cells, which is included in the selected one of the plurality of channels, and wherein when the selected one of the plurality of channels has the second information which designates that the notice of the interrupt request is sent, the reconfigurable circuit sends the notice of the interrupt request to the interrupt controller and the interrupt controller provides the notice of the interrupt request to the host processor.