Patent ID: 7629182

Claim:
A method for forming an array of magnetoresistive random access memory (MRAM) bits and associated drive or sense transistors, comprising: forming at least one drive or sense transistor having a source or drain region; forming a plurality of layers for at least one MRAM bit in direct contact with and overlying the at least one drive or sense transistor, including overlying the source or drain region, without an intervening via between the source or drain region and the plurality of layers, wherein the plurality of layers includes an electrode layer, a magnetically pinned layer, a barrier or spacer layer, and a magnetically free layer, and wherein the electrode layer is formed in direct contact with the source or drain region and has a width dimension that is at least as wide as width dimensions of the magnetically pinned layer, the barrier or spacer layer, and the magnetically free layer; etching the plurality of layers to form the at least one MRAM bit; and forming a first conductive interconnect layer above and in electrical contact with the plurality of layers for the at least one MRAM bit, with no metal layers intervening between the plurality of layers and the first conductive interconnect layer.