Patent ID: 7466030

Claim:
A semiconductor device comprising: an insulating substrate having an interconnection pattern; a solder resist; a semiconductor element, having a projecting electrode, electrically connected to the interconnection pattern via the projecting electrode; a resin provided between the semiconductor element and the substrate, said resin being an insulating resin containing at least a resin anti-repellent for adjusting wettability of the insulating resin, wherein said solder resist is provided over part of the interconnection pattern but leaves the interconnection pattern exposed in an area that is to be connected to the semiconductor element via the projecting electrode, and wherein the insulating resin containing the anti-repellant covers at least edge portions of the solder resist, and wherein the solder resist is laterally offset and spaced laterally outwardly from an outer edge of the semiconductor element when viewed from above; wherein the resin is configured so that pressing of the semiconductor element against the interconnection pattern through the resin after the resin has been provided on the substrate forms a resin fillet, the resin fillet extending no more than about half-way up a sidewall of the semiconductor element and the resin fillet sealing the projecting electrode in electrical contact with the interconnection pattern; wherein the projecting electrode is composed of metal and does not contain solder; and wherein the insulating substrate is a polyimide-based insulating tape that is freely bendable and that has a thickness within a range of 15 to 40 μm.