Patent ID: 7486727

Claim:
A communications circuit operable in at least first and second operating modes, said circuit comprising: N equalizer filter portions, each having an equalizer filter portion output, N being an integer at least equal to two; N post-equalizer processors, each having a post-equalizer processor input and a post-equalizer processor output; a combining circuit that is interconnected between said equalizer filter portion outputs and said post-equalizer processor inputs and that is configurable to: couple each of said N equalizer filter portion outputs to a corresponding one of said N post-equalizer processor inputs for said first operating mode; and couple said equalizer filter portion outputs to L post-equalizer processor inputs of L of said N post-equalizer processors that are to be used for said second operating mode, L being an integer less than N; and a control circuit that is coupled to said combining circuit and is configured to cause said combining circuit to switch between at least said first and second operating modes in response to an instruction.