Patent ID: 8692292

Claim:
A semiconductor device comprising: a substrate; a first nitride semiconductor layer which includes a plurality of nitride semiconductor layers stacked on the substrate, and has a channel region; a second semiconductor layer which is formed on the first nitride semiconductor layer, and has a conductivity type opposite a conductivity type of the channel region; a conductive layer which is in contact with the second semiconductor layer, and includes a metal layer or a high carrier concentration semiconductor layer having a carrier concentration of 1×10 18 cm −3 or higher; an insulating layer formed on the conductive layer; a gate electrode formed on the insulating layer; and a source electrode and a drain electrode formed to laterally sandwich the second semiconductor layer, wherein at least a portion of the gate electrode is formed directly above the conductive layer, and wherein the insulating layer is arranged between the gate electrode and the conductive layer so that the gate electrode and conductive layer are separated.