Patent ID: 7851234

Claim:
A method of controlling uniformity of sheet resistance of a conductive material trench, comprising the steps of: providing a first semiconductor wafer having a first structure disposed thereon; performing a first photolithography step to dispose a pattern on an upper surface of said first structure; performing a first etching step to form a first trench in the first structure; depositing a first layer of conductive material within the first trench to form a first conductive material trench; measuring a sheet resistance of the first conductive material trench; comparing the sheet resistance of the first conductive material trench to a predetermined sheet resistance value to obtain a first comparison value; providing a second semiconductor wafer having a second structure disposed thereon; and performing a second photolithography step to dispose a pattern on an upper surface of said second structure; wherein the second photolithography step comprises adjusting an extension exposure energy value for said second photolithography step based on said first comparison value according to the following formula: if Rsi/RS> 1.0, then a lithography extension exposure energy set point is increased, and if Rsi/RS< 1.0 then the lithography extension exposure energy set point is decreased; where Rsi=a measured sheet resistance, and RS=wafer mean sheet resistance.