Patent ID: 6940480

Claim:
A pixel structure on a substrate, comprising: a scan line over the substrate; a gate dielectric layer over the substrate covering the scan line; a data line over the gate dielectric layer, wherein the data line extends in a direction different from the scan line; a passivation layer over the gate dielectric layer covering the data line; a transparent pixel electrode over the passivation layer; and a double drain thin film transistor over the substrate in the middle of the pixel structure, wherein the double drain thin film transistor has a gate, a channel, a source and two drains such that the source and the data line are electrically connected, the two drains and the transparent pixel electrode are electrically connected, the channel layer is positioned over the gate dielectric layer above the gate, the source and the two drains are positioned over the channel layer and that the gate and the scan line are electrically connected.