Patent ID: 7205650

Claim:
A laminate device for use in electronic devices, comprising: a first ceramic portion comprising: one or more first ceramic layers, and one or more circuit element patterns formed on a surface of said first ceramic layer, each of said first ceramic layers comprising a dielectric material; and a second ceramic portion comprising: one or more second ceramic layers, and one or more circuit element patterns formed on a surface of said second ceramic layer, each of said second ceramic layers comprising: said dielectric material, and a plurality of particle portions formed of a magnetic material approximately uniformly dispersed within said second ceramic layer or approximately uniformly distributed on a surface of said second ceramic layer, wherein said one or more circuit element patterns provide an electronic circuit for performing a predetermined function, and said first ceramic portion is provided on said second ceramic portion to produce said laminate device, wherein one of said first ceramic layers of said first ceramic portion and one of said second ceramic layers of said second ceramic portion are directly stacked on each other, wherein at least one of said circuit element patterns formed on said surface of said first ceramic layer is a capacitor pattern, and at least one of said circuit element patterns formed on said surface of said second ceramic layer is an inductance pattern.