Patent ID: 7700388

Claim:
A method of manufacturing a pixel structure, comprising: forming a gate, at least one first auxiliary pattern and a scan line connected to the gate on a substrate within a region corresponding to a pixel; forming an insulating layer, a semiconductor layer, an ohmic contact layer, and a photoresist layer; performing a exposure and development process on the photoresist layer to form a first portion and a second portion and expose the ohmic contact layer over the scan line and the at least one first auxiliary pattern, wherein the first portion covers the ohmic contact layer above the gate and a part of the scan line and the second portion covers the other part of the ohmic contact layer that is not covered by the first portion and is not exposed; removing the exposed ohmic contact layer and semiconductor layer to expose a part of the insulating layer, and removing the second portion; removing the exposed insulating layer, the ohmic contact layer and the semiconductor layer to form a gate insulating layer and a channel layer, and removing the first portion; forming a source, a drain, at least one second auxiliary pattern, and a data line connected to the source, wherein the at least one second auxiliary pattern covers the scan line within the region corresponding to a pixel, the data line and the at least one first auxiliary pattern are connected in parallel and the at least one second auxiliary pattern and the scan line are connected in parallel; removing the ohmic contact layer between the source and the drain to complete a thin film transistor; and forming a passivation layer and a pixel electrode, the pixel electrode being electrically connected to the thin film transistor by passing through the passivation layer.