Patent ID: 7777660

Claim:
A multi-channel sampling system for producing an interleaved digital output signal, comprising: a first analog-to-digital converter (ADC), coupled to an analog input signal, for receiving a sampling clock signal and converting the analog input signal to a first digital output signal according to the sampling clock signal; a second ADC, coupled to the analog input signal, for receiving the sampling clock signal and converting the analog input signal to a second digital output signal according to the sampling clock signal; a reference clock generator, for generating a reference clock signal which defines a first order of enabling the first ADC and the second ADC; a random signal generator, for outputting control values in a random sequence; and a clock controller, coupled to the reference clock generator and the random signal generator, for modifying the reference clock signal according to the control values to generate the sampling clock signal to the first ADC and the second ADC, wherein the sampling clock signal generated by the clock controller defines a second order of enabling the first ADC and the second ADC, and the second order is different from the first order.