Patent ID: 7406134

Claim:
An integrated circuit comprising: an up-converter comprising: a first filter having N outputs, where each output provides a signal shifted in phase from one another; a second filter having N outputs, where each output provides a signal shifted in phase from one another; an oscillator providing 2 times N outputs, where the 2 times N outputs provide N pairs of quadrature signals and where each pair of the quadrature signals are shifted in phase from one another; a first plurality of mixers, each mixer receiving one of the N outputs from the first filter and one of the 2 times N outputs from the oscillator; a second plurality of mixers, each mixer receiving one of the N outputs from the second filter and one of the 2 times N outputs from the oscillator, wherein an output of each of the first plurality of mixers is combined with an output of the second plurality of mixers; and a plurality of parallel-to-serial converters, each parallel-to-serial converter receiving a bit from each of the combined outputs of the mixers and providing a serial output.