Patent ID: 8537723

Claim:
A front end radio architecture (FERA) comprising: a transmitter block having a first output terminal and a second output terminal; a power amplifier (PA) having a first input terminal coupled to the first output terminal of the transmitter block, a second input terminal coupled to the second output terminal of the transmitter block, a first output terminal, and a second output terminal, the PA comprising; a PA die having a first half amplifier cell including an output amplifier stage, wherein the first half amplifier cell is coupled to the first input terminal, and a second half amplifier cell including an output amplifier stage, wherein the second half amplifier cell is coupled to the second input terminal; and a first PA transformer and a second PA transformer each having a first winding, a second winding, and a third winding, wherein the first winding of the first PA transformer is coupled to the output amplifier stage of the first half amplifier cell, and the first winding of the second PA transformer is coupled to the output amplifier stage of the second half amplifier cell, and wherein the second winding of the first PA transformer is coupled in series with the second winding of the second PA transformer, the second winding of the first PA transformer having an end that makes up the first output terminal, and the second winding of the second PA transformer having an end that is coupled to a fixed voltage node, and wherein the third winding of the first PA transformer is coupled in series with the third winding of the second PA transformer, the third winding of the first PA transformer having an end coupled to the fixed voltage node, and the third winding of the second PA transformer having an end making up the second output terminal; a first duplexer coupled to the first output terminal of the PA; and a second duplexer coupled to the second output terminal of the PA.