Patent ID: 7284090

Claim:
A system, comprising: a memory apparatus including: an irreversibly writeable memory, and a table storage unit operable to store a block correlation table that includes block addresses of only unusable block portions in said irreversibly writeable memory and addresses of substitute block portions in said irreversibly writeable memory each associated with a specific one of the block addresses of the unusable block portions; and a host apparatus operable to obtain a logical address, to calculate a physical address in the irreversibly writeable memory from the logical address using a fixed mathematical relation, and to transmit a request to said memory apparatus for data stored at the physical address; said memory apparatus being operable to reference the block correlation table and to compare the physical address with the block addresses in the block correlation table, to reference the irreversibly writeable memory to read data stored at the physical address when the physical address does not match any of the block addresses in the block correlation table, to reference the irreversibly writeable memory to read data stored at the address of its associated substitute block portion when the physical address matches one of the block addresses in the block correlation table, and to transmit the read data to said host apparatus.