Patent ID: 7888223

Claim:
A method for fabricating a p-type channel field-effect transistor, the method comprising: (A) forming a gate structure on a substrate; (B) performing a pre-amorphization implantation process to amorphize the substrate beside two sides of the gate structure; (C) performing a pocket implantation process to form an n-type pocket region in the substrate; (D) performing a first co-implantation process to define a p-type source/drain extension region depth profile in the substrate; (E) forming a p-type source/drain extension region in the substrate beside two sides of the gate structure; (F) performing a second co-implantation process to define a p-type source/drain region depth profile in the substrate; and (G) forming a semiconductor compound layer in the substrate beside two sides of the gate structure and forming a p-type source/drain region in the semiconductor compound layer; wherein the step (G) comprises: (J) performing an epitaxy growth process to form a semiconductor compound; and (K) performing an ion implantation process to form a p-type source/drain region, wherein a sequence of performing the steps of (A) to (K) comprises performing sequentially the step (A), the step (B), the step (C), the step (D), the step (E), the step (J), the step (F) and the step (K), and wherein the first co-implantation process and the second co-implantation process comprise implanting at least a species into the substrate adjacent to two sides of the gate structure.