Patent ID: 7622963

Claim:
A comparator circuitry included within a single chip integrated circuit device, comprising: a comparator for comparing a signal received on a first input to a signal received on a second input, wherein the comparator is configurable to a plurality of response time levels between a fast response time mode to a lower power, slower response time mode; a first analog multiplexer having an output connected to the first input of the comparator; a second analog multiplexer having an output connected to the second input of the comparator; and at least one control register associated with the comparator, the first multiplexer and the second multiplexer for storing control values from a processing unit controlling operation of the integrated circuit device enabling the connection of one input of the first multiplexer and one input of the second multiplexer to the respective output of the first multiplexer and the second multiplexer and programming the response time level of the comparator.