Patent ID: 7098512

Claim:
A semiconductor device having a surface, comprising: a first well region of a first conductivity formed beneath said surface; a second well region of said first conductivity formed beneath said surface; a region of a second conductivity formed beneath said surface, wherein said region of said second conductivity is located between said first well region and said second well region; and a plurality of conductive sub-surface regions of said first conductivity each formed beneath said first and second well regions in one of a first parallel orientation and a second parallel orientation to form a sub-surface mesh structure, and wherein said sub-surface mesh structure is diagonally positioned relative to said first and second well regions such that a first plurality of conductive boundaries are formed between said first well region and said sub-surface mesh structure and a second plurality of conductive boundaries are formed between said second well region and said sub-surface mesh structure to provide a plurality of sub-surface conductive paths between said first and second well regions without isolating said region of said second conductivity.