Patent ID: 7871884

Claim:
A method for manufacturing a dynamic random access memory (DRAM), comprising: providing a substrate, wherein a patterned first mask layer is formed on the substrate, a deep trench is formed in the substrate and the patterned first mask layer exposes the deep trench; forming a deep trench capacitor in the deep trench, wherein the deep trench capacitor comprises a lower electrode, an upper electrode and a capacitor dielectric layer; forming a device isolation structure in the first mask layer and the substrate for defining an active region; removing the first mask layer on the active region for exposing the substrate; forming a semiconductor layer on the exposed part of the substrate; patterning the semiconductor layer and the substrate for forming a trench, wherein the bottom of the trench is adjacent to the upper electrode of the deep trench capacitor; forming a gate structure on the substrate, wherein the gate structure fills the trench; and forming a doped region in the substrate at a side of the gate structure.