Patent ID: 6918102

Claim:
A method of determining the position of devices in a circuit layout comprising: (a) defining a matrix having at least one row or one column of cells; (b) defining a plurality of devices in the matrix, with each device received in at least one cell; (c) establishing for each device a set of size constraints that expresses the size of the device; (d) for a plurality of devices contained completely in a column, determining the position of one of the devices in the column and establishing a constraint for each other device in the column that expresses its position with respect to the position of the one device in the column; (e) for a plurality of devices contained completely in a row, determining the position of one of the devices in the row and establishing a constraint for each other device in the row that expresses its position with respect to the position of the one device in the row; (f) establishing for each pair of adjacent devices a spacing constraint that expresses a spacing therebetween; (g) establishing, for each pair of devices requiring symmetry matching, a set of symmetry constraints with respect to a symmetry line disposed therebetween; (h) solving the constraints established in steps (c)-(g) as a set of simultaneous equations to determine a value of a variable of each constraint; and (i) generating a layout of the devices in accordance with the values determined in step (h).