Patent ID: 8334710

Claim:
A level conversion circuit that converts a potential of a logic signal and outputting a logic signal with converted potential, comprising: a first circuit block composed of semiconductor elements and including a first signal input terminal, a first voltage terminal and a second voltage terminal, which when a first high-voltage logic signal in which two logical values are expressed by a first signal potential and a second signal potential is input into the first signal input terminal, converts the first high-voltage logic signal into a first low-voltage logic signal in which the two logical values are expressed by a third signal potential that is equal to or greater than the first signal potential, and a fourth signal potential that is greater than the third signal potential and is not greater than the second signal potential; and a second circuit block composed of semiconductor elements of opposite polarity to the first circuit block and including a second signal input terminal, a third voltage terminal and a fourth voltage terminal, which when the first high-voltage logic signal is input into the second signal input terminal, converts the first high-voltage logic signal into a low-voltage second logic signal in which the two logical values are expressed by the third signal potential and the fourth signal potential; wherein the first signal input terminal and the second signal input terminal are connected to each other; the third signal potential is applied to the first voltage terminal and the third voltage terminal; the fourth signal potential is applied to the second voltage terminal and the fourth voltage terminal; and the second logic signal is output from either the first circuit block or the second circuit block, depending on the value of the third signal potential.