Patent ID: 8143865

Claim:
A method comprising: (a) generating a first error signal that is indicative of an error between an output voltage (VOUT) of a DC-to-DC converter and a reference voltage, wherein the DC-to-DC converter has a pure buck mode, a partial four-switch mode, a full-time four-switch mode and a pure boost mode; (b) generating a current sense signal indicative of a current in an inductor of the DC-to-DC converter; (c) comparing the current sense signal to the first error signal to generate a second error signal; (d) using the second error signal to generate a first switch control signal and a second switch control signal, wherein the first switch control signal determines a first switching cycle current flowing through one of the first and second switches, wherein the second switch control signal determines a second switching cycle current flowing through one of the third and fourth switches, wherein if an input voltage (VIN) of the DC-to-DC converter is substantially greater than VOUT then the first, second, third and fourth switches are controlled in (d) such that the DC-to-DC converter operates in the pure buck mode, and wherein if VIN is substantially smaller than VOUT then the first, second, third and fourth switches are controlled in (d) such that the DC-to-DC converter operates in the pure boost mode; and (e) programming the DC-to-DC converter to operate in the full-time four-switch mode rather than the partial four-switch mode when the input voltage VIN and the output voltage VOUT are approximately equal.