Patent ID: 7443148

Claim:
A buck switching regulator formed on an integrated circuit and receiving an input voltage, the buck switching regulator controlling a high-side switch and a low-side switch using a feedback control loop to drive a switch output node for generating a switching output voltage, the switch output node being coupled to an LC filter circuit external to the integrated circuit to generate a regulated output voltage having a substantially constant magnitude on an output node, the regulated output voltage being fed back to the buck switching regulator to a voltage divider for generating a feedback voltage on a feedback voltage node, the buck switching regulator comprising: an on-time control circuit for generating a first signal for controlling the high-side switch under a minimum on-time and variable off-time feedback control loop, the first signal turning off the high-side switch at the expiration of a first on-time duration or at the expiration of a maximum on-time, the first on-time duration being at least a minimum on-time and being expanded to the maximum on-time when the feedback voltage remains less than a reference voltage, and the maximum on-time comprising a first maximum on-time and a second, extended maximum on-time greater than the first maximum on-time, wherein the second, extended maximum on-time is applied when a minimum off-time was used for the high-side switch during the previous switching cycle.