Patent ID: 7933324

Claim:
A signal attenuation circuit, the circuit comprising: an antenna configured to transmit RF signals received at an input node; a resistor having a resistance, a first side and a second side, the first side being connected to the input node; a diode having an anode and a cathode, the anode being connected to the input node; a capacitor having a first side and a second side, the first side being connected to the cathode and the second side being connected to the resistor; a microcontroller connected to the second side of the resistor and the second side of the capacitor, the microcontroller being configured to generate a pulse width modulation (PWM) signal to control DC biasing of the diode through charging and discharging of the capacitor, the DC biasing of the diode setting a resistance of the diode as a function of a transmission frequency of protocol of the RF signals such that a desired output power level of RF signals transmitted from the antenna is proportional to a voltage drop set by the resistances of the resistor and the diode; and wherein the microcontroller generates the PWM signal in proportion to a power level difference between a received power level of the RF signals received at the input node and the desired output power level of the RF signals transmitted from the antenna.