Patent ID: 7009424

Claim:
A level shifter that shifts a low supply voltage input signal to a higher supply voltage output signal, the level shifter comprising: a first unit connected to a high power supply voltage source and receiving the input signal, the first unit acting as a startup circuit such that when the level shifter is powered on, the first unit discharges an output node if the input signal is a logic low; and a second unit connected to the first unit and the high power supply voltage source, and receiving the input signal, wherein the second unit shifts the input signal to the higher supply voltage output signal, and wherein the level shifter operates only at the high power supply voltage, wherein the first unit includes: a first NMOS transistor having source connected to the input signal, a bulk connected to a reference voltage, a drain connected to the second unit at the output node, and a gate; and a pair of series connected transistors, including a first series transistor and a second series transistor, wherein the first series transistor has a source and a bulk connected to the reference voltage, a drain connected to the gate of the first NMOS transistor at the control node, and a gate connected to its drain, and the second series transistor has a source connected to the control node, a bulk connected to its source, a drain connected to the second unit, and a gate connected to its drain.