Patent ID: 8865564

Claim:
A process for producing a conductive pathway between at least two connection layers of a component, the process comprising the steps of: providing a component comprising at least a first substrate and a second substrate that are arranged in a stack and are electrically insulated from one another, a first embedded connection layer that is embedded in the first substrate, at least one region devoid of material positioned between the first substrate and the second substrate, and a first insulating layer which covers the first embedded connection layer; defining a first embedded contact region of said first embedded connection layer; defining a surface contact region of a surface connection layer that is to be formed on a surface of the stack overlying said first embedded contact region; plasma etching the stack starting from said surface of the stack correlating to the defined surface contact region to produce a first interconnecting well which passes through at least the second substrate and which extends between the defined surface contact region and the first embedded contact region of said first embedded connection layer, and wherein the first interconnecting well passes through the region devoid of material and the first insulating layer.