Patent ID: 7268390

Claim:
A semiconductor device comprising: a base layer of a first conductivity type; a barrier layer of the first conductivity type formed above the base layer; a well layer of a second conductivity type formed above said barrier layer; a first trench formed from the surface of the well layer to such a depth as to reach a region in the vicinity of a junction surface between the barrier layer and the base layer; a gate electrode formed in the trench via a gate insulating film; a contact layer of the second conductivity type selectively formed in a surface portion of the well layer; a source layer of the first conductivity type selectively formed in the surface portion of the well layer so as to contact a side wall of the gate insulating film in the trench and the contact layer; and a first main electrode formed so as to contact the contact layer and the source layer, wherein the region of said barrier layer between the first trench and a second trench includes an active region for a current path, the active region having a width of 2 μm or less and being smaller than any one of a width of the first trench and a width of the second trench.