Patent ID: 7639521

Claim:
A memory device comprising: a plurality of first electrode lines arranged in parallel on a substrate; a plurality of second electrode lines arranged in parallel on the substrate transverse to the first electrode lines; a plurality of electrode plugs electrically coupled to the first electrode lines, respective ones of the electrode plugs disposed between ones of the first and second electrode lines at respective intersections thereof; and a resistive thin film material region, the resistive thin film material region having a first surface directly in contact with at least one of the electrode plugs and a second surface directly in contact with at least one of the second electrode lines, wherein the second surface has a greater area than the first surface and wherein a width of the resistive thin film material region is equal to or greater than a width of the at least one of the second electrode lines, and wherein the first electrode lines and the second electrode lines serve as word lines and bit lines, respectively, or wherein the first electrode lines and the second electrode lines serve as bit lines and word lines, respectively.