Patent ID: 8802484

Claim:
A method comprising: forming an N-well in a silicon (Si) substrate; forming a transistor or resistor in the Si substrate laterally removed from the N-well; forming an interlayer dielectric (ILD) over the Si substrate and the transistor or resistor; forming a Si-based dielectric layer on the ILD; forming a polysilicon (poly-Si) or amorphous silicon (a-Si) layer on the Si-based dielectric layer; removing a portion of the poly-Si or a-Si layer, the Si-based dielectric layer, the ILD, and the N-well, forming a trench; forming germanium (Ge) or germanium-silicon (Ge/Si) in the trench; and removing the Ge or Ge/Si, the poly-Si or a-Si layer, and the Si-based dielectric layer down to an upper surface of the ILD.