Patent ID: 7361600

Claim:
A method for operating a semiconductor manufacturing apparatus comprising a CMP (Chemical and Mechanical Polishing) section, a cleaning section, a drying section, an inspecting section, a loading section and an unloading section, said method comprising the step of selecting any of first, second and third operation modes, wherein: said first operation mode consists of a sample loading step of taking out a sample such as a wafer from a cassette at said loading section and inserting the sample into said CMP section, a CMP step of planarizing the sample at said CMP section, a cleaning step of cleaning the planarized sample at said cleaning section, a drying step of drying the cleaned sample at said drying section, an inspecting step of inspecting the dried sample at said inspecting section and a sample unloading step of moving the inspected sample into the cassette at said unloading section; said second operation mode consists of said sample loading step, said CMP step, said cleaning step, said drying step and a sample unloading step of moving the dried sample into the cassette at said unloading section; and said third operation mode consists of a sample loading step of taking out a sample such as a wafer from a cassette at said loading section and inserting the sample into said inspecting section, an inspecting step of inspecting the sample at said inspecting section and said sample unloading step.