Patent ID: 8791570

Claim:
A semiconductor device comprising: a substrate; a first interlayer insulation film formed above said substrate; a first conductor pattern formed in said first interlayer insulation film and a second conductor pattern formed in said first interlayer insulation film, said second conductor pattern being separated from said first conductor pattern in a plan view; a second interlayer insulation film formed above said first insulation film; a third conductor pattern formed in said second interlayer insulation film; an extension part formed in said second interlayer insulation film and connected to said third conductor pattern in a plan view, a width of said extension part being narrower than a width of said third conductor pattern; a first via-plug formed on said first conductor pattern and under said extension part; a branched pattern formed in said second interlayer insulation film and connected to said extension part in a plan view; and a second via-plug formed on said second conductor pattern and under said branched pattern.