Patent ID: 7577558

Claim:
A method for mapping dissimilar memory systems, comprising: providing a first memory system comprising a plurality of first memory registers, said first memory system having a first address space with a first memory depth and a first data width; providing a second memory system comprising a plurality of second memory registers and having a second address space with a second memory depth and a second data width that is less than said first data width and that is equal to a predetermined positive integer power of two, said first address space being less than said second address space; and mapping said first memory system into said second memory system by: partitioning said first address space across said first data width into a plurality of first memory portions each having a portion data width being equal to a preselected non-negative integer power of two and being less than said second data width; dividing each of said first memory portions across said first memory depth into a preselected number of uniform first memory blocks each having a block width equal to an associated portion data width, said preselected number of said first memory blocks being equal to a positive integer power of two such that each of said first memory blocks has a block depth equal to a positive integer quotient of said first data width divided by said preselected number of said first memory blocks; and disposing said first memory blocks within adjacent second memory blocks across said second address space of said second memory system, wherein said partitioning said first address space, said dividing each of said first memory portions, and said disposing said first memory blocks are implemented via a processor-based emulation system.