Patent ID: 7144757

Claim:
A method for making a vertically integratable circuit comprising the steps of: providing first and second substrates, and a first insulation layer interposed between the first and second substrates, the first substrate located on a first side of the first insulation layer and the second substrate located on a second side of the first insulation layer opposed to the first side; providing the first substrate with active circuit components along and within at least one portion thereof to define a first circuit layer; applying a second insulation layer over the first circuit layer; forming at least one first gap through the second insulation layer that extends at least a portion into the first circuit layer and is in communication with the active circuit components thereof; filling the at least one first gap with a first metalization that defines at least one first side vertical contact; thinning the second substrate to expose the second side of the first insulation layer; forming at least one second gap through the first insulation layer that extends at least into a portion of the first circuit layer, the at least one second gap generally coinciding with the at least one first side vertical contact; and applying a second metalization along the second side of the first insulation layer, at least a portion of the second metalization extending through the at least one second gap to contact the first side vertical contact and defining a second side vertical contact.