Patent ID: 8391433

Claim:
An apparatus configured to transmit a clock and data from a first module to a second module connected by a single outward line and a single return line, the apparatus comprising: a transmitter configured to transmit a data pulse on the single outward line, the transmitter comprising: a first circuit configured to assert a first edge of the data pulse on the single outward line, the first edge representing a timing edge of the clock; and a second circuit configured to assert a second edge of the data pulse on the single outward line a selectable time period after the first edge, the selectable time period representing the data, the data pulse void of any additional edge between the first edge and the second edge of the data pulse; and a receiver configured to receive a return pulse on the single return line, the receiver comprising: a third circuit configured to receive and detect a first edge and a second edge of the return pulse, the first and second edges being separated by a first time period, the first time period representing an acknowledgement.