Patent ID: 6937086

Claim:
A power switch having source, drain and gate terminals, the power switch comprising: a first field-effect transistor (FET) having a first drain coupled to the drain terminal, a first source coupled to the source terminal, and a first gate; a second FET having a second drain coupled to the drain terminal, a second source coupled to the source terminal, and a second gate, the second FET having a gate length (L G ) that is greater than or less than an L G of the first FET and having a length of a drain (L D ) that is greater than or less than an L D of the first FET; and a control circuit coupled to the gate terminal, and having a first control signal coupled to the first gate and a second control signal coupled to the second gate, the first control signal and the second control signal being separate control signals, and the first control signal having a rising edge with a different timing than a rising edge of the second control signal.