Patent ID: 8680683

Claim:
A semiconductor package comprising: an epoxy layer; a first die fixed into the epoxy layer, wherein electrical contacts are on a first side thereof and an opposing second side thereof is fixed into the epoxy layer; a second die fixed into the epoxy layer, wherein electrical contacts are on a first side thereof and the first side is fixed into the epoxy layer; an electrically conductive block fixed into the epoxy layer; a molded material encompassing the first die, the second die, and the block therein; a first via formed within the molded material from a surface thereof for accessing the conductive block; a metalized layer on the surface of the molded material electrically connecting the preselected electrical contacts of the first die to the conductive block; and a second via formed within the epoxy from a surface thereof for accessing preselected electrical contacts from the second die and for accessing the conductive block; and an electrical connection electrically connecting the preselected electrical contacts of the second die to the conductive block, thus electrically connecting the first and second dies.