Patent ID: 8247304

Claim:
A method of manufacturing a semiconductor device having a capacitor under bit line (CUB) structure, the method comprising: forming a first insulating layer on a semiconductor substrate having a cell area and a logic area, the first insulating layer comprising at least two first contact plugs in at least two respective first contact holes, each first contact plug contacting a respective first part of the semiconductor substrate in the cell area and a second contact plug in a second contact hole that contacts a second part of the semiconductor substrate in the logic area; forming a second insulating layer on the first insulating layer, the second insulating layer formed to include an opening exposing one of the two first contact plugs; forming a capacitor comprising a lower electrode disposed in the opening and contacted with the first contact plug, a dielectric material layer formed on the lower electrode and the second insulating layer in the cell area, and an upper electrode formed on the dielectric material layer; forming a third insulating layer on the capacitor and the second insulating layer; etching the second and third insulating layers to form a third contact hole in the cell area and to form a fourth contact hole in the logic area; forming third and fourth contact plugs in the third and fourth contact holes, respectively; forming a fifth contact hole in the third insulating layer and forming a fifth contact plug in the fifth contact hole that contacts the upper electrode of the capacitor; forming a fourth insulating layer on the third though fifth contact plugs, the capacitor, and the third insulting layer, wherein first through third conductive studs are disposed in the fourth insulating layer and contact the third through fifth contact plugs; and forming a fifth insulating layer on the first through third conductive studs and the fourth insulating layer, wherein a bit line contacted with the first conductive stud, and first and second wires contacted with the second and third conductive studs are at least partially disposed in the fifth insulating layer.