Patent ID: 8787073

Claim:
A signal processing circuit comprising: an arithmetic circuit; and a storage device configured to store data from the arithmetic circuit, the storage device comprising a storage element, the storage element comprising an input terminal, an output terminal, a first inverter, a second inverter, a first selection transistor, a second selection transistor, a first transistor, a second transistor, a first capacitor, and a second capacitor, wherein each of the first transistor and the second transistor comprises an oxide semiconductor layer including a channel, wherein an input terminal of the first inverter is electrically connected to the input terminal of the storage element via the first selection transistor and the second transistor, wherein of an output terminal of the first inverter is electrically connected to the output terminal of the storage element via the second selection transistor, wherein the output terminal of the first inverter is electrically connected to an input terminal of the second inverter via the first transistor, wherein an output terminal of the second inverter is electrically connected to the input terminal of the first inverter via the second transistor, wherein an electrode of the first capacitor is electrically connected to the input terminal of the second inverter, and wherein an electrode of the second capacitor is electrically connected to the input terminal of the first inverter.