Patent ID: 8462564

Claim:
A device comprising: an array of memory cells, one or more memory cells, of the array of memory cells, to be programmed based on a programming window that includes a plurality of bits; logic to: determine whether first bits, of the plurality of bits, to be programmed correspond to a majority of the plurality of bits, determine that second bits, of the plurality of bits, are to be programmed when the first bits correspond to the majority of the plurality of bits, the second bits being different from the first bits, the first bits not being programmed when the first bits correspond to the majority of the plurality of bits, and determine that a particular bit, of the plurality of bits, is to be programmed when the first bits correspond to the majority of the plurality of bits, the particular bit indicating that the second bits are to be programmed; and a voltage supply to generate a voltage for programming the one or more memory cells based on the programming window, the voltage supply including a plurality of charge pumps, a particular number of the plurality of charge pumps being activated based on a number of the second bits and the particular bit when the first bits correspond to the majority of the plurality of bits.