Patent ID: 7266134

Claim:
A transmission circuit that receives input data at a first rate and outputs data at a second rate, the transmission circuit comprising: a processor for controlling operations of the transmission circuit, the processor for accepting input data and generating corresponding first data having a plurality of bits; and a format converting circuit electrically connected to the processor for generating second data having a plurality of bits according to the first data, the format converting circuit comprising: a plurality of input units each for receiving one bit of the first data; a plurality of output units each for outputting one bit of the second data after receiving the bit; and a bit control circuit electrically connected between the input units and the output units for generating bits outputted by the output units according to bits received from the input units; the bit control circuit transmitting a bit received by an input unit to an output unit without having the bit passing through other input and output units, a number of bits between the bit received by the input unit and a most significant bit of the first data being different from a number of bits between the bit outputted by the output unit and a most significant bit of the second data; wherein the processor further controls the transmission circuit to output data sequentially according to the second data, and the bit control circuit further comprises an operating circuit electrically connected between the input units and the output units for performing a logical operation according to a predetermined law on the bits received by the input units to generate the bits transmitted by the output units.