Patent ID: 8621160

Claim:
A memory control unit of a turbo code decoder comprising: a first buffer having a plurality of storage slots, wherein the first buffer is configured to temporarily store data intended for storage in a memory bank; a buffer control operatively coupled to the first buffer, wherein the buffer control is configured to determine a number of available storage slots in the first buffer; a second buffer operatively coupled to a plurality of data sources, wherein the second buffer is configured to temporarily store data received from the data sources attempting to access the memory bank; a router operatively coupled to the buffer control and to the second buffer, wherein the router is configured to route data from the second buffer to the buffer control; and a conflict detection unit operatively coupled to the router, to the buffer control, and to the second buffer, wherein the conflict detection unit is configured to initiate a temporary halt of the second buffer when the data received from the data sources causes multiple concurrent accesses to the memory bank.