Patent ID: 7320934

Claim:
A method of forming a contact between a bitline and a local interconnect in a flash memory device, the method comprising: providing a substrate covered with a structure, the substrate including a plurality of first and second source/drain regions, and a like plurality of second source/drain regions, a plurality of local interconnects extending between and electrically connecting one each of said plurality of first source/drain regions to one each of said second source/drain regions, a plurality of wordlines separating adjacent ones of local interconnects, said structure having a planarized surface comprising top sections of said plurality of local interconnects and the top surfaces of said wordlines, said top sections of said plurality of local interconnects exposed therein; depositing a first dielectric layer above the planarized surface and said top section, said first dielectric comprising at least a bottom layer and a top layer; etching a first opening into the top layer of said first dielectric layer above a portion of said top section of the local interconnect; depositing a second dielectric layer over the first dielectric layer subsequent to said step of etching said first opening, a portion of said second dielectric filling said first opening in said first dielectric layer, wherein the second dielectric layer is provided with an etching selectivity with respect to said first dielectric layer; forming an etch mask over the second dielectric layer, the etch mask having a second opening to define a trench in said second dielectric layer representing said bitline, said second opening overlapping with said first opening; etching said second dielectric layer using said etch mask, such that said trench representing the bitline is formed, said etching step further including etching through said portion of said second dielectric layer filling said first opening to define a via in said second dielectric layer such that said top section of the local interconnect is exposed in an area where said second opening of said etch mask overlaps with said first opening; and removing said etch mask and depositing a conductive filling into said first opening of the first dielectric layer upon the top section of said local interconnect and into said via formed in said second dielectric layer for forming the contact to said local interconnect.