Patent ID: 7538430

Claim:
A semiconductor device comprising: (a) a semiconductor substrate of a substantially rectangular shape; (b) semiconductor elements formed on a main surface of said semiconductor substrate; (c) a first insulating film formed over said main surface of said semiconductor substrate to cover said semiconductor elements; (d) pad electrodes formed on said first insulating film; (e) a wiring layer formed on said first insulating film, said wiring layer being formed at a same level as said pad electrodes in a multilayer interconnection structure; (f) a second insulating film formed to cover said pad electrodes and said wiring layer, said second insulating film having openings at upper sides of said pad electrodes, respectively; and (g) bump electrodes of a substantially rectangular shape formed on said second insulating film, said bump electrodes being electrically connected to said pad electrodes via said openings of said second insulating film, respectively; wherein each of said pad electrodes is of smaller area than the corresponding bump electrode, wherein said bump electrodes are arranged at predetermined intervals in a first direction which is along a long side of said semiconductor substrate, wherein each of said bump electrodes is configured such that a long side thereof extends along a short side of said semiconductor substrate, and wherein said wiring layer is disposed directly under said bump electrodes and extends along said first direction.