Patent ID: 7295468

Claim:
A nonvolatile semiconductor memory device comprising: a memory cell which stores a plurality of data items in n-valued (n is a natural number equal to one or more) threshold voltages; a first data storage circuit which is connected to the memory cell and which stores externally inputted data of a first logic level or a second logic level; a second data storage circuit which is connected to the memory cell and which stores the data of the first logic level or second logic level read from the memory cell; and a control circuit which controls the memory cell and the first and second data storage circuits and which sets the logic level of the data stored in the second data storage circuit to the first logic level when the logic level of the externally inputted data is the second logic level, carries out a write operation of raising the threshold voltage of the memory cell when the logic level of the data stored in the first data storage circuit is the first logic level, sets the logic level of the data stored in the first data storage circuit to the second logic level when the memory cell has reached the first threshold voltage, holds the threshold voltage of the memory cell without changing the threshold voltage when the logic level of the data stored in the first data storage circuit is the second logic level, and continues writing until the logic level of the first data storage circuit has reached the second logic level, sets the logic level of the data stored in the first data storage circuit to the first logic level when the logic level of the data stored in the second data storage circuit is the second logic level, and carries out a write operation of raising the threshold voltage of the memory cell when the logic level of the data stored in the first data storage circuit is the first logic level, sets the data stored in the first data storage circuit to the second logic level when the memory cell has reached the second threshold voltage, and holds the threshold voltage of the memory cell without changing the threshold voltage when the logic level of the data stored in the first data storage circuit is the second logic level.