Patent ID: 7251698

Claim:
A computer system comprising a plurality of processor clusters and having a global memory address space associated therewith, each cluster including a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture, each cluster having a local memory address space associated therewith corresponding to a first portion of the global memory address space and including local mapping information relating each of the local nodes to a respective portion of the local memory address space, wherein the local mapping information maps the interconnection controller in each cluster to a remainder portion of the global memory address space exclusive of the first portion, and wherein the local nodes in each cluster are operable to use the local mapping information to direct transmissions relating to the remainder portion of the global memory address space to the associated interconnection controller, and wherein the interconnection controller in each cluster is operable to map locally generated memory address information received from the associated local nodes to others of the clusters, and remotely generated memory address information received from the other clusters to the local nodes using the local mapping information.