Patent ID: 8466022

Claim:
A semiconductor memory device comprising: a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate; a first electrode provided on the tunnel insulating film; an interelectrode insulating film provided on the first electrode; and a second electrode provided on the interelectrode insulating film, the interelectrode insulating film including a stacked insulating layer, a charge storage layer provided on the stacked insulating layer and having a lower barrier height than the stacked insulating layer, and a block insulating layer provided on the charge storage layer and having a higher barrier height than the charge storage layer, and the stacked insulating layer including a first insulating layer, a quantum effect layer provided on the first insulating layer and having a lower barrier height than the first insulating layer, and a second insulating layer provided on the quantum effect layer and having a higher barrier height than the quantum effect layer.