Patent ID: 7305526

Claim:
A method, comprising: generating, by an operating system, a mapping of virtual memory addresses to device memory addresses in response to a request for a mapping from a device driver for a device; setting, by the device driver, indicator bits for ranges of device memory addresses in a device accessible over an Input/Output (I/O) bus indicating whether gathering is enabled for the device memory address ranges; processing, by address translation circuitry, multiple transfer operations to transfer data to virtual memory addresses; processing, by the address translation circuitry, the mapping of virtual memory addresses to the device memory addresses to determine contiguous device memory addresses corresponding to the virtual memory addresses subject to the multiple transfer operations; determining, by the address translation circuitry, whether the indicator bits for the determined contiguous device memory addresses indicate that gathering is enabled; and generating, by the address translation circuitry, a single bus I/O transaction to transfer data to the determined contiguous device memory addresses over the I/O bus in response to determining that the indicator bits for the contiguous device memory addresses indicate that gathering is enabled, wherein the address translation circuitry generates the single bus I/O transaction to transfer data for the multiple transfer operations.