Patent ID: 8030153

Claim:
A method of forming a TMOS device in and over a semiconductor layer of a first conductivity type, comprising: forming a first doped region and a second doped region in the semiconductor layer, wherein the first doped region and the second doped region are spaced apart and are of a second conductivity type; implanting to form a third doped region in the semiconductor layer between the first and second doped regions, wherein the third doped region directly contacts the first and second regions, is of the second conductivity type, and is less heavily doped than the first and second doped regions; forming a gate stack over a portion of the first doped region, a portion of the second doped region, and the third doped region; and implanting to form a fourth doped region in an interior portion of the first doped region and a fifth doped region in an interior portion of the second doped region after forming the gate stack, wherein the fourth and fifth doped regions are of the first conductivity type.