Patent ID: 7888173

Claim:
A semiconductor device manufacturing method, comprising the steps of: preparing a semiconductor element having at least one first electrode, at least one second electrode, and a third electrode arranged so as to face the first electrode and second electrode, the first electrode and second electrode being electrically separated in a same plane by an insulating layer; arranging a first conductive bonding material on a first metal foil formed on a main face of an insulating sheet, and placing the semiconductor element on the first conductive bonding material so that the third electrode contacts the first conductive bonding material; supporting a sheet-shape second conductive bonding material by the insulating layer so as to face the first electrode and the second electrode; arranging a lower end of at least one first post electrode and a lower end of at least one second post electrode above the first electrode and second electrode respectively with the second conductive bonding material intervening therebetween, said at least one first post electrode and said at least one second post electrode being electrically connected to a wiring layer arranged on a wiring board; and melting the second conductive bonding material so as to form a first conductive bonding layer for bonding the first electrode and the first post electrode, and a second conductive bonding layer for bonding the second electrode and the second post electrode, said first and second conductive bonding layers being separated with the insulating layer, and melting the first conductive bonding material to form a third conductive bonding layer for bonding the third electrode and the first metal foil.