Patent ID: 7948038

Claim:
A non-volatile semiconductor memory device, comprising: a semiconductor substrate having first device formation regions defined by a first device isolation trench and second device formation regions defined by a second device isolation trench, the second device isolation trench having a larger width than that of the first device isolation trench; a first gate insulator film formed on said first device formation regions respectively; a floating gate formed on said first gate insulator film; a first device-isolation insulator film formed in said first device isolation trench, the first device-isolation insulator film having a first recess thereon; a second device-isolation insulator film formed in said first recess; a second gate insulator film formed over a surface of said floating gate and said first and second device-isolation insulator films; a control gate formed above said floating gate and said first and second device-isolation insulator films via said second gate insulator film; a third gate insulator film formed on said second device formation regions respectively; a first gate electrode formed on said third gate insulator film; and a third device-isolation insulator film formed in said second device isolation trench and having a second recess in a center portion thereof.