Patent ID: 8423598

Claim:
Circuit arrangement for forming a pulse-shaped signal in a reception filter for a received signal code X i of code values +1 or −1 in a carrier frequency transmission signal, wherein the received signal code has a form of a first signal code +1, +1, +1, −1, −1, −1, +1, −1, or a code derived from the first signal code by a symmetry law X i =±X N-1-i *e jπi , with i running through the integer numbers from 0 to (N/2)−1, wherein N is the total number of sub-pulses in the received signal code X i , or a code derived from the first signal code by taking the reverse order, or a code derived from the first signal code by weighting the code values with alternating mathematical sign, or a code generated by putting the first or derived signal codes in series, wherein each signal code satisfies the symmetry condition X i =±X N-1-i *e jπi , the circuit arrangement comprising: an optimal filter for sub-pulses with an A/D converter and a first shift register and a first downstream autocorrelation filter; a multiplier circuit connected at a point after the A/D converter to multiply the received signal code with an alternating mathematical sign in order to form a complementary code of the received signal code; a second shift register connected to the output of the multiplier circuit; a second downstream autocorrelation filter connected to the output of the second shift register; and an adder connected to the output of the first downstream autocorrelation filter and the second autocorrelation filter.