Patent ID: 8151051

Claim:
A method, comprising: configuring, by a processor, a first interconnect card, wherein a first controller is included in the first interconnect card; configuring a second interconnect card coupled to the first interconnect card, wherein a second controller is included in the second interconnect card; in response to a failure of the first controller included in the first interconnect card, controlling the first interconnect card via the second controller included in the second interconnect card; and in response to a failure of the second controller included in the second interconnect card, controlling the second interconnect card via the first controller included in the first interconnect card, wherein the first interconnect card includes: a capacitor and a battery to provide power and maintain the first interconnect card in an operational state, in response to a failure of external power to the first interconnect card; a daughter card that includes the first controller, wherein the daughter card is replaced to replace the first controller with a new controller, in response to the failure of the first controller and wherein the first controller is operable as a Redundant Array of Independent Disk (RAID) controller; a plurality of replaceable solid state devices, wherein in response to a failure of a replaceable solid state device, the replaceable solid state device is replaced with a new solid state device while the first interconnect card is operational; expanders to couple the first controller to the plurality of solid state devices; and Serial Access Small Computer System Interface (SAS) connections to communicate data to other devices and to components included in the first interconnect card.