Patent ID: 7489037

Claim:
A semiconductor device comprising: a semiconductor substrate having at least one bond pad; a first dielectric layer formed on the semiconductor substrate, wherein the first dielectric layer has a first opening for exposing the bond pad and a second opening at a predetermined position for redistribution; a first metallic layer formed on the first dielectric layer and in the first and second openings; a second metallic layer and a third metallic layer, which are formed on the first metallic layer at positions corresponding to the first opening and the second opening, respectively, and cover the first metallic layer at positions corresponding to sidewalls of the first and second openings, respectively, the second and third metallic layers being separate from each other; a second dielectric layer applied on the first metallic layer and the second metallic layer corresponding to the first opening, wherein the third metallic layer corresponding to the second opening is exposed from the second dielectric layer; and a solder bump formed on the third metallic layer.