Patent ID: 7442606

Claim:
A method of manufacturing a semiconductor device, the method comprising: providing a semiconductor substrate in which a floating gate pattern is formed; forming a dielectric layer over the floating gate pattern, a conductive layer for a control gate over the dielectric layer, a tungsten silicide layer over the conductive layer, a first silicon oxynitride layer over the tungsten silicide layer, a hard mask layer over the first silicon oxynitride layer, a second silicon oxynitride layer over the hard mask layer and an Organic Bottom Anti-Reflective Coating (BARC) layer over the second silicon oxynitride layer; partially etching the BARC layer, the second silicon oxynitride layer, the hard mask layer and the first silicon oxynitride layer; partially etching the tungsten silicide layer and the conductive layer for the control gate; partially etching the dielectric layer to form spacers on sides of the floating gate; and partially etching the floating gate pattern.