Patent ID: 7234122

Claim:
A method for calculating resistance of a conductor system for an integrated circuit design, the conductor system having a three-dimensional shape defined by boundary faces, said method comprising: partitioning the three-dimensional shape into a plurality of parallelepipeds, a boundary between two parallelepipeds forms an entire face for both of the two parallelepipeds; determining at least one source face and at least one sink face from among the boundary faces, a current entering the conductor system through the source face and leaving the conductor system through the sink face; setting boundary conditions with respect to the current for each of the parallelepipeds; calculating power for each of the parallelepipeds with the boundary conditions; calculating power for the conductor system based on the power and the boundary conditions of each of the parallelepipeds; and obtaining the resistance of the conductor system by minimizing dissipation of the calculated power of the conductor system.