Patent ID: 8467761

Claim:
A mobile radio device having an integrated RF receiver that tunes a radio channel from a signal spectrum that includes a plurality of radio channels, comprising: a channel tuning interface; a demodulated signal output interface, and an integrated RF receiver coupled to the channel tuning interface and the demodulated signal interface, the RF receiver comprising: a mixer coupled to receive the signal spectrum and a mixing signal as inputs and having a low-IF signal as an output, wherein the low-IF signal is within a near-baseband passband sized to fit one radio channel and the lower edge of which is spaced from DC by at least about 20 KHz; local oscillator (LO) generation circuitry coupled to receive a radio channel tuning control as an input and configured to provide an oscillation signal, the oscillation signal being dependent upon the radio channel tuning control and being used to generate the mixing signal for the mixer; quadrature generation circuitry configured to receive the mixing signal from the LO generation circuitry and to generate two phase shifted mixing signals for use by the mixer; low-IF conversion circuitry coupled to receive the low-IF signals from the mixer and configured to output digital signals, the low-IF conversion circuitry including first and second analog-to-digital converters coupled to the real and imaginary low-IF signals and configured to output real and imaginary digital signals; a digital-signal-processor (DSP) coupled to receive the digital signal from the low-IF conversion circuitry and configured to demodulate the signal modulation within the selected radio channel, to digitally tune the selected radio channel, and to output a digital signal, the DSP comprising an on-chip, general purpose, digital processor, and circuitry coupled to receive the digital signal from the DSP and configured to output the demodulated signal; wherein the mixer, the LO generation circuitry, the low-IF conversion circuitry, and the DSP including the frequency control circuitry are integrated within a single integrated circuit; wherein the integrated circuit is made using a single-chip low-power implementation process.