Patent ID: 7351616

Claim:
A method for manufacturing a semiconductor substrate characterized in comprising: a step of forming, on a semiconductor base, a plurality of laminated layered structures, each composed of a second semiconductor layer having a smaller selection ratio at etching than a first semiconductor layer, laminated on the first semiconductor layer; a step of forming a first groove that penetrates the first semiconductor layers and the second semiconductor layers and exposes the semiconductor base; a step of forming a supporting body for supporting the second semiconductor layers on the semiconductor base on side walls of the first semiconductor layers and the second semiconductor layers in the first groove; a step of forming a second groove that exposes at least a part of the first semiconductor layers with the supporting body formed on the sidewall through the second semiconductor layers; a step of selectively etching the first semiconductor layers through the second groove to form a void section in a position where the first semiconductor layers existed; and a step of completely thermally oxidizing the second semiconductor layers for at least one layer through the void section to form a dielectric layer disposed below the second semiconductor layer at an uppermost layer.