Patent ID: 7501323

Claim:
A method for making a MOSFET comprising: forming a trench in a semiconductor layer; forming a gate dielectric layer lining the trench; forming a gate conducting layer in a lower portion of the trench; forming a dielectric layer to fill an upper portion of the trench; removing portions of the semiconductor layer laterally adjacent the dielectric layer so that an upper portion thereof extends outwardly from the semiconductor layer; forming source regions in the semiconductor layer adjacent the outwardly extending dielectric layer; forming spacers laterally adjacent the outwardly extending upper portion of the dielectric layer after forming the source regions; using the spacers as a self-aligned mask for forming source/body contact regions in the semiconductor layer so that the source/body contacts regions are below the source regions; forming a source electrode on the source regions and on the dielectric layer; and forming at least one conductive via between the source electrode and the source/body contact regions.