Patent ID: 7989336

Claim:
A method of forming a plurality of conductive lines in the fabrication of integrated circuitry, comprising: forming a trench into a damascene material received over a substrate, the trench having first and second opposing trench sidewalls, the first trench sidewall being longitudinally elongated to comprise a longitudinal contour of a first sidewall of one of the plurality of conductive lines being formed, the second trench sidewall being longitudinally elongated to comprise a longitudinal contour of a first sidewall of another of the plurality of conductive lines being formed; depositing conductive material to within the trench to span between the first and the second trench sidewalls; and etching through the conductive material longitudinally along and elevationally between the first and second trench sidewalls to form the longitudinal contour of a second sidewall of the one conductive line within the trench and to form the longitudinal contour of a second sidewall of the another conductive line within the trench.