Patent ID: 7902896

Claim:
A phase mixer, comprising: a phase mixer circuit having inputs and an output, the phase mixer circuit configured to receive a plurality of input clock signals and generate an output clock signal at the output having a phase relative to the plurality of input clock signals; and an adjustment circuit coupled to the phase mixer circuit and configured to adjust a load-to-drive ratio of the phase mixer; and a phase detect circuit coupled to the inputs of the phase mixer and the adjustment circuit, the phase detect circuit configured to detect a phase difference between at least two of the plurality of input clock signals and generate a control signal to adjust the adjustment circuit, the phase detect circuit comprising: a delay line having a plurality of delay stages, the delay line configured to receive a first and second ones of the plurality of input clock signals; and a plurality of phase detect stages, each coupled to the output of a respective one of the plurality of delay stages, each phase detect stage configured to receive the first and second ones of the plurality of input clock signals and further configured to generate an active output signal in response to the output of the respective one of the plurality of delay stages leading one of the first and second input clock signals.