Patent ID: 8482061

Claim:
A semiconductor device comprising; a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type disposed on the first semiconductor region; a third semiconductor region of the first conductivity type disposed selectively on the second semiconductor region; a trench extending through the third and second semiconductor regions and into the first semiconductor region; a first electrode disposed in the trench with a first insulator film interposed between a side wall of the trench and the first electrode, the first electrode being located in a bottom portion of the trench; a control electrode disposed in the trench with a second insulator film interposed between the side wall of the trench and the control electrode, the control electrode being located above the first electrode; a second electrode in contact with the third semiconductor region; and a fourth semiconductor region of the first conductivity type covering a corner portion of the trench, the fourth semiconductor region being doped more lightly than the first semiconductor region, wherein the first electrode is positioned on a first semiconductor region side of a boundary between the first semiconductor region and the second semiconductor region, wherein the first electrode is connected electrically to the second electrode, and wherein the first insulator film is thicker than the second insulator film.