Patent ID: 8106875

Claim:
A display device, comprising, a drive substrate; a counter substrate opposed to the drive substrate; an electro-optic material sealed between the drive substrate and the counter substrate; a plurality of source lines formed on the drive substrate; a plurality of gate lines formed on the drive substrate in an orthogonal manner to the source lines; a plurality of pixel electrodes formed near intersections of the plurality of source lines and the plurality of gate lines and applying electric charge outputted to the source lines to the electro-optic material; switching elements coupled to the gate lines and switching conduction states between the source lines and the pixel electrodes; a counter electrode formed on the counter substrate and coupled to the pixel electrodes; gate dummy pixels including: gate dummy pixel electrodes provided to first end sides of the gate lines and applying the electric charge from the gate lines to the electro-optic material; and gate dummy switching elements coupling the gate lines and the gate dummy pixel electrodes and switching conduction states between the gate lines and the gate dummy pixel electrodes; source dummy pixels including: source dummy pixel electrodes provided to first end sides of the source lines and applying the electric charge from the source lines to the electro-optic material; and source dummy switching elements coupling the source lines and the source dummy pixel electrodes and switching conduction states between the source lines and the source dummy pixel electrodes; a test switch line coupled to the gate switching elements and the source dummy switching elements and transmitting a control signal for controlling switching of the conduction states to the gate dummy switching elements and the source dummy switching elements; a plurality of test gate lines respectively coupled to the gate dummy pixel electrodes that are not adjacent to each other in such a manner that the gate lines provided with the gate dummy pixel electrodes are divided into two or more phases; and a plurality of test source lines respectively coupled to the source dummy pixel electrodes that are not adjacent to each other in such a manner that the source lines provided with the source dummy pixel electrodes are divided into two or more phases.