Patent ID: 7833852

Claim:
A method for forming a semiconductor device, comprising: forming a semiconductor layer; forming a gate dielectric layer over the semiconductor layer; forming a gate structure over the gate dielectric layer; forming a high-k sidewall spacer adjacent to the gate structure, the high-k sidewall spacer having a dielectric constant greater than a dielectric constant of silicon oxynitride; using the high-k sidewall spacer to form a recess in the semiconductor layer, wherein the recess is aligned to the high-k sidewall spacer and does not undercut the high-k sidewall spacer; forming an in-situ doped epitaxial material in the recess, the epitaxial material having a natural lattice constant different from a lattice constant of the semiconductor layer to create stress in a channel region of the semiconductor device; etching the high-k sidewall spacer to form a tapered high-k sidewall spacer after forming the in-situ doped epitaxial material in the recess; forming a spacer adjacent to the tapered high-k sidewall spacer; and siliciding a portion of the in-situ doped epitaxial material and the gate structure.