Patent ID: 8521980

Claim:
A method for controlling a plurality of memory devices connected in a ring arrangement with a memory device controller such that output from a given memory device in said plurality of memory devices is received as input by one next downstream memory device in said plurality of memory devices, said memory device controller arranged so that an initial memory device in said plurality of memory devices receives output from said controller as input and a final memory device in said plurality of memory devices provides output as input to said controller, said method comprising: transmitting a read command, said read command addressing a first memory device among said plurality of memory devices; transmitting a write command followed by write data, said write command addressing a second memory device among said plurality of memory devices, said second memory device being in an upstream location relative to said first memory device; and arranging for read data to be transferred downstream from said first memory device to the memory controller while, at least substantially simultaneously, receipt of said write data at said second memory device occurs.