Patent ID: 7732313

Claim:
A method, comprising: forming a transistor having source/drain regions, sidewalls, and a polysilicon gate electrode; forming a layer of transition metal nitride in contact with said source/drain regions, said sidewalls, and said polysilicon gate electrode; forming a layer of Spin-On-Glass (“SOG”) over said source/drain regions, said sidewalls, and said polysilicon gate electrode; removing a portion of said SOG layer, wherein said removed portion is the portion of said SOG layer that extends above a top surface of said transition metal nitride layer located over said polysilicon gate electrode; removing a portion of said transition metal nitride layer that is located over said polysilicon gate electrode; forming a layer of silicidation metal over said source/drain regions, said sidewalls, and said polysilicon gate electrode; performing a first silicide anneal; removing all remaining portions of said transition metal nitride layer and all remaining portions of said SOG layer and unreacted portions of said silicidation metal layer after said step of performing said first silicide anneal; and performing a second silicide anneal to fully silicide said polysilicon gate electrode after said step of removing all remaining portions of said metal nitride layer and all remaining portions of said SOG layer and said unreacted portions of said silicidation metal layer.