Patent ID: 8566493

Claim:
An interrupt controller for providing interrupt signals to one or more units for interrupting those units, each unit capable of entering an active mode or a non-active mode, said interrupt controller comprising: interrupt logic circuitry configured to receive a request for interrupt of one of said units; activity mode logic circuitry configured to receive information regarding whether the unit is in non-active mode; and delay control logic circuitry configured to delay the requested interrupt to the unit if said received information indicates that the unit is in non-active mode; wherein at least one of: (A) the interrupt logic circuitry is configured to receive maximum delay time information that is representative of the maximum length of time the delay control logic circuitry can delay the requested interrupt to the unit, and the delay control logic circuitry is configured to delay the requested interrupt no longer than said maximum length of time, irrespective of whether the received information indicates the unit is in non-active mode; and (B) the interrupt logic circuitry is configured to receive minimum delay time information that is representative of the minimum length of time the delay control logic circuitry must delay the requested interrupt to the unit, once the received information indicates the unit is in non-active mode.