Patent ID: 8836083

Claim:
A method of forming an integrated circuit structure, comprising: forming openings in a resist material located above an intermediate material on a target material; forming a first set of spacers on sidewalls of remaining portions of the resist material; removing the remaining portions of the resist material and material underlying the remaining portions of the resist material to expose portions of the target material except for portions masked by the first set of spacers; removing the first set of spacers; exposing vertical sections of the intermediate material; and forming a second set of spacers on sidewalls of the vertical sections of the intermediate material, the second set of spacers comprised of the same material as the first set of spacers such that a first portion of the second set of spacers is separated from first neighboring spacers by a distance equal to a width of one of the second set of spacers, a second portion of the second set of spacers is separated from a second neighboring spacer by voids and the substantially vertical sections of the intermediate material, and a third portion of the second set of spacers is separated from third neighboring spacers by remaining portions of the substantially vertical sections of the intermediate material on both sides of the third portion of the second set of spacers.