Patent ID: 8389368

Claim:
A method for producing a memory device with nanoparticles, comprising at least the steps of: a) forming, in a substrate based on at least one semi-conductor, source and drain regions, and at least one first dielectric on at least one zone of the substrate arranged between the source and drain regions, said at least one zone intended to form a channel of the memory device, wherein the forming of the source and drain regions is obtained by steps including, a1) forming at least one dummy gate on the substrate, at said at least one zone intended to form the channel of the memory device, a2) implanting dopants in the substrate using the dummy gate as an implantation mask, wherein doped zones of the substrate obtained from the implanting form the source and drain regions, a3) forming spacers based on at least one dielectric material against lateral flanks of the dummy gate, a4) depositing at least one coating layer on the dummy gate, the spacers and the source and drain regions, a5) planarizing the coating layer with stoppage on the dummy gate, a6) removing the dummy gate, a7) etching at least one part of the spacers in contact with the substrate, and a8) forming hollows underneath a remaining part of the spacers, b) depositing of at least one ionic liquid that is an organic salt or mixture of organic salts in a liquid state, wherein nanoparticles of at least one electrically conductive material are suspended in the ionic liquid, said ionic liquid covering at least said first dielectric and being deposited in said hollows, c) forming, after step b), a deposition of said nanoparticles at least on said first dielectric and at zones of the substrate situated in said hollows, d) removing, after step c) the ionic liquid remaining on the first dielectric, and e) forming, after step d), at least one second dielectric and at least one control gate on at least one part of the nanoparticles deposited on the first dielectric.