Patent ID: 7211850

Claim:
A semiconductor device, comprising: a substrate; a ferroelectric capacitor formed above said substrate; an interlayer insulating film which covers said ferroelectric capacitor and through which a hole reaching an electrode of said ferroelectric capacitor is formed; a wiring formed above said interlayer insulating film and connected to said electrode through said hole, and a barrier metal film formed between said wiring and said electrode, a planar shape of said hole being any one type selected from a group consisting of: (1) a polygon with an interior angle of each angle thereof being obtuse; (2) a closed curve with a bending direction thereof being constantly inward with respect to said hole; and (3) a shape which consists of a line segment and a curve with a bending direction thereof being constantly inward with respect to said hole, an angle between a tangent of said curve and said line segment at an intersection of said line segment and said curve being obtuse, and an interior angle of an intersection of two of said line segments being obtuse; wherein the barrier metal film formed within the contact hole is formed with superior coverage to the contact hole because of the shape of the contact hole, thereby avoiding contact failure and deformation around the contact portion.