Patent ID: 7646023

Claim:
A thin film transistor (TFT) array panel comprising: a transistor structure having a gate line and a data line intersecting the gate line, including: a gate electrode formed on an insulating substrate from the gate line, a gate insulating layer formed on the gate electrode and the insulating substrate, a semiconductor layer formed directly on the gate insulating layer and overlapped with the gate electrode, a light blocking layer formed around and overlapping at least a portion of the gate electrode and wherein the light blocking layer is formed directly on the gate insulating layer, a source electrode formed from the data line and overlapping at least a portion of the semiconductor layer, and a drain electrode opposing to the source electrode with respect to the gate electrode and overlapping at least a portion of the semiconductor layer, and a pixel electrode formed on and insulated from the transistor structure and electrically connected to the drain electrode, wherein the light blocking layer is separated from the source electrode and the drain electrode.