Patent ID: 8095230

Claim:
A method for increasing overall yield in semiconductor manufacturing comprising: obtaining process variation data for a first zone of wafers or wafer lots; obtaining process variation data for a second zone of the wafers or wafer lots; obtaining process variation data for each tool of a plurality of tools relating to processing in the first zone and the second zone for wafers or wafer lots that were already processed on each tool; comparing the process variation data of the each tool to the process variation data for the first zone and the second zone of the wafers or wafer lots; selecting a tool from the plurality of tools to process the wafer or wafer lots based on whether the tool has process variation data for a same zone of the wafers or wafer lots that were already processed on the tool that is substantially similar to the process variation data of the first zone or the second zone of the wafers or wafer lots; and routing the wafers or wafer lots to the selected tool.