Patent ID: 8158468

Claim:
A method of producing a semiconductor device, comprising the steps of: (a) forming a planar semiconductor layer on a substrate and then forming a pillar-shaped first-conductive-type semiconductor layer on the planar semiconductor layer; (b) forming a second-conductive-type semiconductor layer in a portion of the planar semiconductor layer underneath the pillar-shaped first-conductive-type semiconductor layer; (c) forming a gate dielectric film in contact with the pillar-shaped first-conductive-type semiconductor layer and a gate electrode having a laminated structure comprising a metal film and an amorphous silicon or polysilicon film overlying the metal film, around the pillar-shaped first-conductive-type semiconductor layer; (d) forming a sidewall-shaped dielectric film in contact with the gate dielectric film at an interface on an upper region of a sidewall of the pillar-shaped first-conductive-type semiconductor layer and in contact with a top of the gate electrode; (e) forming a sidewall-shaped dielectric film on a sidewall of the gate electrode; (f) forming a second-conductive-type semiconductor layer in an upper portion of the pillar-shaped first-conductive-type semiconductor layer; (g) forming a metal-semiconductor compound on the second-conductive-type semiconductor layer formed in the portion of the planar semiconductor layer underneath the pillar-shaped first-conductive-type semiconductor layer; (h) forming a metal-semiconductor compound on the second-conductive-type semiconductor layer formed in the upper portion of the pillar-shaped first-conductive-type semiconductor layer; (i) forming a metal-semiconductor compound in contact with the amorphous silicon or polysilicon film of the gate electrode; (j) forming a contact on the second-conductive-type semiconductor layer formed in the portion of the planar semiconductor layer underneath the pillar-shaped first-conductive-type semiconductor layer; and (k) forming a contact on the second-conductive-type semiconductor layer formed in the upper portion of the pillar-shaped first-conductive-type semiconductor layer.