Patent ID: 7859907

Claim:
A method of operating the non-volatile semiconductor memory, the non-volatile semiconductor memory including a string of a plurality of memory cells, a selection transistor coupled to the string of the memory cells, a bit line coupled to the string of the memory cells through the selection transistor, a plurality of word lines coupled to the memory cells, respectively, a first transistor coupled between the bit line and a sense node, a first register coupled to the sense node, and a second transistor coupled between the sense node and a source of a power voltage, the method comprising: storing data in the first register; supplying a voltage corresponding to the stored data to the bit line; applying a program voltage to a selected word line among the word lines, after supplying the voltage corresponding to the stored data; electrically connecting the bit line to the source of the power voltage through the first and second transistors by applying a first control voltage to the gate of the first transistor, after applying the program voltage to the selected word line; isolating the bit line from the sense node by applying a second control voltage to the gate of the first transistor, after applying the first control voltage to the gate of the first transistor; applying a verify read voltage to a selected word line while isolating the bit line from the sense node; electrically connecting the bit line to the sense source node by applying a third control voltage to the gate of the first transistor so that a voltage on the bit line is reflected to a voltage on the sense node, after isolating the bit line from the sense node; outputting, to the outside of the non-volatile semiconductor memory, a ready signal indicating that an input of data to the non-volatile semiconductor memory is enable, while applying the program voltage to the selected word line.