Patent ID: 6842043

Claim:
A level shifter circuit, comprising: a first power terminal coupled to supply a first voltage level; a ground terminal; first and second output nodes; first and second internal nodes; a first input terminal coupled to receive a first input signal having a power high level at a second voltage level; a second input terminal coupled to receive a second input signal having a power high level at the second voltage level, the second input signal being an inverse signal to the first input signal; a first transistor coupled between the first power terminal and the first output node and having a gate terminal coupled to the second internal node; a second transistor coupled between the first output node and the first internal node and having a gate terminal coupled to the first input terminal; a third transistor coupled between the first internal node and the ground terminal and having a gate terminal coupled to the first input terminal; a fourth transistor coupled between the first output node and the ground terminal and having a gate terminal coupled to the first input terminal; a fifth transistor coupled between the first power terminal and the second output node and having a gate terminal coupled to the first internal node; a sixth transistor coupled between the second output node and the second internal node and having a gate terminal coupled to the second input terminal; a seventh transistor coupled between the second internal node and the ground terminal and having a gate terminal coupled to the second input terminal; and an eighth transistor coupled between the second output node and the ground terminal and having a gate terminal coupled to the second input terminal.