Patent ID: 8187966

Claim:
A manufacturing method for a semiconductor integrated circuit device, comprising: (a) forming a wiring trench in a first insulating film over a first main surface of a wafer; (b) forming a metal member layer in the wiring trench and over the first insulating film so as to fill the wiring trench therewith; (c) forming an embedded wiring by removing the metal member layer located outside the wiring trench by a CMP process; (d) after the step (c), applying a wet cleaning process to the first main surface side of the wafer with the embedded wiring formed therein while rotating the wafer about an axis thereof in a plane including the first main surface; and (e) after the step (d), drying the first main surface side of the wafer, wherein the wet cleaning process comprises the steps of (d1) a first chemical solution cleaning process performed by a first rotary roll brush; (d2) a second chemical solution cleaning process performed by a second rotary roll brush after the first chemical solution cleaning process; (d3) a third chemical solution cleaning process performed by a rotary pen brush after the second chemical solution cleaning process; (d4) a first rinsing process performed without a brush after the third chemical solution cleaning process; (d5) a second rinsing process performed without a brush between the second chemical solution cleaning process and the third chemical solution cleaning process; and (d6) a third rinsing process performed without a brush between the first chemical solution cleaning process and the second chemical solution cleaning process, wherein a rotation speed of the wafer about the axis thereof is from four times per minute to 16 times per minute in the steps (d1), (d2), (d4), (d5), and (d6), and wherein a rotation speed of the wafer about the axis thereof in the step (d3) is higher than the rotation speed of the wafer in the steps (d1), (d2), (d4), (d5), and (d6).