Patent ID: 7747915

Claim:
A method for using regions of a memory element that do not include memory failures, the method comprising: reading a first memory state indicator via a system interface and a graphics interface to determine that a first memory region includes a memory failure, wherein the system interface is included in a host device that further includes a host memory and a host processor, the host memory being connected to the host processor, and the system interface being connected to the host processor, and wherein the graphics interface is included in an integrated circuit that further includes a programmable graphics processor configured to process graphics commands and a graphics memory element, the graphics interface being connected to the system interface and configured to communicate with the system interface, the graphics memory element being connected to the graphics interface, and the graphics memory element having the first memory region and a second memory region, a first memory state indicator that indicates whether the first memory region includes a memory failure, and a second memory state indicator that indicates whether the second memory region includes a memory failure; reading the second memory state indicator via the system interface and the graphics interface to determine that the second memory region does not include a memory failure; and using the second memory region and not using the first memory region.