Patent ID: 7136355

Claim:
A transmission component for processing priority packet supported by using single chip's buffer structure between a transport protocol layer and a device layer of network interface card, comprising: a transmitting part that transmits at least one packet of network data from the transport protocol layer to the device layer of network interface card, having: a priority checker that gets at least one packet of network data from the transport protocol layer and checks a priority value of the packet of network data; a high priority queue that allows the packet of network data having high priority value from the priority checker to pass through; a low priority queue allowing the packet of network data having low priority value from the priority checker to pass through; a priority controller that controls the sending rate of the packet of network data having high priority value and low priority value; a tag insert structure that inserts a tag into the packet of network data having priority value; and a transmit active list that transmits the packet of network data got from the tag insert structure to the device layer of network interface card; a receiving part that receives at least one packet of network data from the device layer of network interface card, having: a receive active list that receives the packet of network data got from the device layer of network interface card; and a tag remove structure that receives the packet of network data from the receive active list and removes a tag of the packet of network data having high priority value, wherein the sending rate of the packet of network data having high priority value and low priority value in the priority controller is N:1, and N is any integer value.