Patent ID: 6977437

Claim:
A semiconductor integrated circuit device, comprising a. a semiconductor substrate having a top surface and a bottom surface, b. a first dielectric layer formed on the top surface of the semiconductor substrate, c. a metal stack formed on the surface of the first dielectric layer, the metal stack including i. a first intermetallic compound layer including titanium aluminide, ii. an metallic layer overlying the first intermetallic compound layer, iii. a second intermetallic compound layer including titanium aluminide overlying the metallic layer, and iv. a diffusion barrier layer overlying the second intermetallic compound layer, d. a second dielectric layer overlying the metal stack and a portion of the first dielectric layer, the second dielectric layer having a top surface, e. a via region in the second dielectric layer having a wall region and a bottom region, the bottom region being in contact with the second intermetallic compound layer, the via region being free of dielectric material, and f. a layer of seed layer overlying at least a portion of the wall region and the bottom region, the thickness of the seed layer being between 40 and 100 angstroms.