Patent ID: 7405108

Claim:
A method for forming a multi-chip wafer-level package, comprising: forming a plurality of different-type chips on a plurality of chip substrates, wherein each of the plurality of chip substrates is used to form only one type of chip; detaching said plurality of different-type chips form said plurality of chip substrates; forming pockets in a carrier substrate, wherein each of the pockets holds one of the different-type chips; and mounting said plurality of chips into their corresponding pockets in the carrier substrate such that a top surface of said plurality of chips is substantially co-planar with a top surface of the carrier substrate, wherein forming a plurality of different-type chips on a plurality of chip substrates comprises: forming oxide regions on a surface of the chip substrates; partially bonding a semiconductor wafer to the surface of each chip substrate such that the semiconductor wafer is bonded only to the oxide regions on the surface of the chip substrate, while the semiconductor wafer is not bonded to non-oxide regions on the surface of the chip substrate; and forming chips in regions of the semiconductor wafer not bonded to the chip substrate.