Patent ID: 7847294

Claim:
A semiconductor device comprising: a first insulating film over a substrate; a polycrystal semiconductor film over the first insulating film, wherein the polycrystal semiconductor film comprises a channel formation region, a source region and a drain region; a second insulating film over the polycrystal semiconductor film; a gate electrode over the second insulating film; third insulating films adjacent to side surfaces of the gate electrode; and side walls adjacent to side surfaces of the gate electrode with the third insulating films interposed therebetween, wherein the source region and the drain region each comprises a first silicide layer, wherein the gate electrode comprises a second silicide layer, wherein a Raman peak value of the channel formation region is 517 to 520 cm −1 , and a half width at half maximum is 2.2 to 3.0 cm −1 , and wherein a P-V value of a surface roughness of the polycrystal semiconductor film within the range of 1 μm 2 is 10 nm or less.