Patent ID: 8112604

Claim:
A method comprising: receiving a plurality of stores into a store queue, wherein each store is a result from a processor, and wherein the plurality of stores are destined for at least one memory address; determining whether a new store received at the store queue is a synchronizing operation; in response to determining that the new store is not a synchronizing operation, determining that the new store has a memory address that matches a memory address of a store that is present in the store queue; and thereafter, marking the new store as a most recent store for the memory address to form a set of marked stores, wherein each unique memory address referenced by a store in the store queue has only one marked store indicating that the only one marked store is the most recent store for a unique memory address and wherein marking the new store as the most recent store for the memory address comprises: setting a new recent load bit that, when set, indicates the most recent store; and clearing an old recent load bit for all other stores having a same unique memory address such that only one store has a recent load bit set for each unique memory address; in response to determining that the new store is a synchronizing operation, setting a new recent load bit for the synchronizing operation and clearing old recent load bits for all other stores in the store queue, such that the set of marked stores consists of only the synchronizing operation; receiving a load request in a load queue; thereafter, comparing an address in the load request against addresses for only the set of marked stores in the store queue; identifying that the address in the load request matches a matching store in the set of marked stores; thereafter, setting a hazard bit associated with the load request and encoding a location of the matching store in the load queue for the load request to form a hazard pointer, wherein the load request will not be processed when the hazard bit is set; detecting a retiring store in the plurality of stores retiring; thereafter, comparing the hazard pointer with the retiring store; identifying that the hazard pointer matches the retiring store; and thereafter, clearing the hazard bit.