Patent ID: 7348259

Claim:
A method of fabricating a semiconductor structure comprising: providing a first semiconductor substrate; forming a first structure over the first semiconductor substrate by: depositing a compositionally graded Si 1-x Ge x buffer layer on the first semiconductor substrate, wherein a Ge composition x increases to a value greater than 0.2 and a portion of the compositionally graded Si 1-x Ge x buffer layer comprises a Ge composition greater than about 20%, and depositing one or more first material layers comprising at least one of relaxed Si 1-y Ge y , strained Si 1-z Ge z , strained-Si, Ge, GaAs, III-V materials, or II-VI materials, wherein Ge compositions y and z are values selected from a range of 0 to 1; bonding the first structure to a second substrate; removing the first substrate and at least a portion of the compositionally graded Si 1-x Ge x buffer layer; removing any remaining portion of the compositionally graded Si 1-x Ge x buffer layer, thereby exposing at least one of the one or more first material layers; and smoothing a surface of the exposed at least one of the one or more first material layers.