Patent ID: 7906856

Claim:
A semiconductor device comprising: a semiconductor chip having a circuit-forming surface provided with an electrode pad; a lower insulating layer, covering the semiconductor chip, which is provided with an opening via which the electrode pad is partially exposed; a secondary wire including (i) a pad section for making an electrical connection to the electrode pad by making contact with an exposed portion of the electrode pad, (ii) a land section including an external connection terminal for making an electrical connection between the electrode pad and an external circuit provided outside of the semiconductor device, and (iii) a wiring section for making an electrical connection between the pad section and the land section; and an upper insulating layer, covering the secondary wire, which is provided with an opening via which at least the external connection terminal of the land section of the secondary wire is exposed, at least the wiring section of the secondary wire being provided on the lower insulating layer, a total thickness of insulating layers, provided in a secondary-wire-free area excluding a secondary-wire-containing area where at least the wiring section of the secondary wire is provided, which include at least the lower insulating layer being less than a total thickness of the lower insulating layer and the upper insulating layer in the secondary-wire-containing area, excluding the land section, the semiconductor chip having an edge extending further outward than an edge of the upper insulating layer in an extending direction of a surface of the semiconductor chip on which the electrode pad is provided, wherein: the lower insulating layer comprises a first lower insulating layer and a second lower insulating layer, wherein the first lower insulating layer is made of an oxide film or a nitride film, and the second lower insulating layer is made of an organic film, the semiconductor chip further includes an electronic circuit for processing an analog signal which electronic circuit is provided on the circuit-forming surface; and the lower insulating layer has a predetermined value of thickness for each specific area of the semiconductor chip such that a degree of electromagnetic interference between the secondary wire and the electronic circuit is suppressed.