Patent ID: 7312630

Claim:
An integrated circuit (“IC”) comprising: a) at least fifty configurable nodes arranged in an array, said configurable nodes comprising: i) a configurable first node; ii) a configurable second node offset by a positional relationship from the configurable first node; iii) a symmetrical subset of configurable nodes comprising a subset of configurable nodes in the array that are each offset from said configurable first node by a positional relationship that is symmetrical to the positional relationship that the configurable second node has with the configurable first node, wherein positional relationships are symmetrical when they are formed by symmetry about at least one of a vertical axis and a horizontal axis through the configurable first node; and b) a set of wire segments directly connecting said configurable first node and said configurable second node; c) said configurable first node is not directly connected to any nodes in said symmetrical subset of configurable nodes.