Patent ID: 7596039

Claim:
A data path for a memory system, comprising: a first plurality of input-output lines; a first plurality of sense amplifiers coupled to a respective one of the first plurality of input-output lines, each sense amplifier configured to sense a data state on the respective input-output line and generate an output signal in accordance with the sensed data state, at least one of the first plurality of sense amplifiers programmed to have a first output current drive setting a second plurality of input-output lines; a second plurality of sense amplifiers coupled to a respective one of the second plurality of input-output lines, each sense amplifier configured to sense a data state on the respective input-output line and generate an output signal in accordance with the sensed data state, at least one of the second plurality of sense amplifiers programmed to a second output current drive setting, the second output current drive setting different than the first output current drive setting; and a data output circuit coupled to the first and second plurality of sense amplifiers and configured to receive output signals from the same and generate output data signals for the memory system.