Patent ID: 7564389

Claim:
A discrete-time, single-amplifier, second-order, delta-sigma analog-to-digital converter, comprising: a passive integrator unit having a passive input sampling circuit and a first passive feedback sampling circuit and a first passive summing junction coupling said passive input sampling circuit and said first passive feedback sampling circuit; an active integrator unit coupled to an output of said passive integrator unit and having an active sampling circuit, a second passive feedback sampling circuit and a second passive summing junction coupling said active sampling circuit and said second passive feedback sampling circuit; a quantizer coupled to an output of said active integrator unit; a digital-to-analog converter coupled to an output of said quantizer; and a clock generator coupled to an output of said quantizer and configured to generate clock signals: concurrently to cause said passive input sampling circuit to gather samples from an input of said converter, cause said active sampling circuit to gather samples from said output of said passive integrator unit and cause said first and second passive feedback sampling circuits to gather samples from an output of said digital-to-analog converter, and thereafter concurrently to cause said passive input sampling circuit and said first passive feedback sampling circuit to transfer said samples to said first passive summing junction and cause said active sampling circuit and said second passive feedback sampling circuit to transfer said samples to said second passive summing junction.