Patent ID: 7447057

Claim:
A semiconductor integrated circuit device comprising: a plurality of memory cells storing data; a write current line arranged near said memory cells or electrically connected to said memory cells; a first constant current generating circuit providing an output current having a temperature dependence; a second constant current generating circuit providing an output current having a temperature dependence different from that of the output current of said first constant current generating circuit; a mixing circuit mixing the output currents of said first and second constant current generating circuits together to provide a composite current at a variable mixing rate; a write circuit electrically connected to said write current line, and writing data into said memory cell by passing a write current through said write current line based on the composite current provided by said mixing circuit; and a data storage circuit storing first to third set values, wherein said first constant current generating circuit further changes the value of the output current based on said first set value, said second constant current generating circuit further changes the value of the output current based on said second set value, and said mixing circuit changes said mixing rate based on said third set value.