Patent ID: 8803324

Claim:
A semiconductor device, comprising: a first interlayer insulating layer; an etch stop layer formed on the first interlayer insulating layer; contact holes formed to penetrate the etch stop layer and the first interlayer insulating layer; contact plugs formed in the respective contact holes and configured to have a top surface lower than a top surface of the etch stop layer; a second interlayer insulating layer formed over the contact plugs and the etch stop layer; line trenches formed to penetrate the second interlayer insulating layer, wherein the respective contact plugs are exposed in the line trenches; and lines formed in the trenches and coupled to the respective contact plugs, wherein a difference A between a height of the top surface of the contact plugs and the height of the top surface of the etch stop layer is determined on condition that a distance D between the contact plug and the lines adjacent to each other is a critical distance k or higher, wherein the critical distance k is a distance that does not generate a leakage current between the contact plug and the lines adjacent to each other.