Patent ID: 7573118

Claim:
A programming method of a MOS electric fuse comprising: preparing, as a fuse element, a MOS transistor which comprises a first impurity region and a second impurity region, both of a second conductivity type, formed to face with each other on an upper surface of a well of a first conductivity type on a semiconductor substrate, a gate dielectric film formed on the upper surface of the well at least between the first impurity region and the second impurity region, and a gate electrode formed through the gate dielectric film on the upper surface of the well held between the first impurity region and the second impurity region; applying, as required, a first voltage to the gate electrode and a second voltage different from the first voltage to the first impurity region, at a first timing, thereby short-circuiting the gate dielectric film only between the gate electrode and the first impurity region; and applying, as required, a third voltage to the gate electrode and a fourth voltage different from the third voltage to the second impurity region at a second timing different from the first timing, thereby short-circuiting the gate dielectric film only between the gate electrode and the second impurity region.