Patent ID: 7836165

Claim:
A network interface of a host system, comprising: a direct memory access unit; a network data transmit path to couple said host system to a network, the network data transmit path leading to the network; and circuitry to: receive and transmit network data for a host processor of the host system, the transmitting of the network data being via the network data transmit path to the network; intercept from among network data in the network data transmit path one or more packets received from said host processor; generate, based on the receiving and transmitting network data, a set of statistics metering operation of the network interface, the set of statistics including at least one selected from the group of: (1) a number of bytes received, and (2) a number of packets received; periodically initiate direct memory access transfers of the set of statistics from the network interface to a memory of the host system accessible by the host processor, wherein the circuitry to initiate the direct memory access transfers at a periodicity of a time interval value; determine configuration information from a payload of said one or more packets, wherein said circuitry to determine said configuration information from the payload of said one or more packet identifies information in the one or more packets indicating that the one or more packets are not to be transmitted over the network; wherein said configuration information comprises said time interval value; and configure said initiation of the direct memory access transfers using said configuration information.