Patent ID: 8047421

Claim:
An arrangement in an electronic package providing for electrical interconnects between a substrate and a semiconductor chip, comprising: an array of C4 solder joints, each respectively connecting a metal pad on a surface of said substrate with a symmetrical metal pad located oppositely thereof on the surface of said semiconductor chip, so as to form said interconnect, wherein at least a portion of the array of C4 solder joints has oppositely facing metal pads on said substrate and semiconductor chip which are a conformant elliptical configuration; and a remaining portion of the array of C4 solder joints are non-elliptical metal pads on said substrate and said semiconductor chip and are essentially of round or circular configurations, wherein said substrate and said semiconductor chip are each substantially rectangular, and said facing elliptical metal pads on said substrate and semiconductor chip are located proximate corner regions of said semiconductor chip; said elliptical metal pads having minor axes, respectively, generally aligned along radial directions from a center of said facing semiconductor chip towards a respectively therewith associated corner region of said semiconductor chip; the minor axes of the elliptical metal pads on said substrate and semiconductor chip extend in parallel with a relative motion vector encountered between the metal pads on said substrate and the facing metal pads on said semiconductor chip responsive to reflow and operation of said electronic package.