Patent ID: 8108619

Claim:
A cache memory, comprising: a cache array including a plurality of entries that holds a corresponding plurality of cache lines of data, each of the plurality of cache lines including multiple data granules; for each of the plurality of cache entries: a respective line coherency state field indicating a coherency state applicable to two or more data granules of an associated one of the plurality of cache lines; a respective granule coherency state fields for indicating a coherency state for any single particular granule among the multiple data granules of the associated cache line, wherein the coherency state indicated by the granule coherency state field is variable with respect to that indicated for the associated cache line by its line coherency state field; and a respective granule identifier field that, for a granule coherency state field indicating a coherency state, identifies the single particular granule for which the granule coherency state indicator indicates the coherency state.