Patent ID: 8076189

Claim:
A method of forming a semiconductor device comprising: providing a semiconductor layer; forming a control electrode over a portion of the semiconductor layer; forming recesses extending into the semiconductor layer on opposing sides of the control electrode; forming a first layer of a first semiconductor material doped with a dopant in the recesses, in each recess the dopant of the first layer forming a current electrode region of the semiconductor device the first layer having a depth of between 2 to 5 nm; and forming a second layer of a second semiconductor material in the recesses over the first layer, the second semiconductor material being different to the first semiconductor material and having a lattice spacing different to the lattice spacing of the semiconductor layer such that the second layer forms strained semiconductor regions in the recesses, wherein a junction between each current electrode region and the semiconductor layer is formed below an interface between a strained semiconductor region and the semiconductor layer.