Patent ID: 7808054

Claim:
A one time programmable (OTP) memory cell including a state memory cell and a selection transistor, comprising: a semiconductor substrate including: a lower electrode forming region having a lower electrode of the state memory cell formed therein; a diffusion layer forming region having a source and a drain of the selection transistor formed therein, wherein one of the source and the drain of the selection transistor is in electrical contact with the lower electrode; a first trench-type insulating region adjacent to the lower electrode forming region; and a second trench-type insulating region adjacent to the diffusion layer forming region; a first insulating film being in contact with the first trench-type insulating region and formed on the lower electrode; an upper electrode of the state memory cell formed on the first insulating film; a channel region extending between the source and the drain; a second insulating film being in contact with the second trench-type insulating region and formed on the channel region; and a gate electrode of the selection transistor formed on the second insulating film, wherein a shape of at least a part of an end of the lower electrode forming region in contact with the first insulating film is sharper than a shape of an end of the channel region in contact with the second insulating film such that said sharper part is closer than a remaining part of said lower electrode to said upper electrode.