Patent ID: 8653561

Claim:
A III-nitride semiconductor electronic device comprising: a substrate; a semiconductor laminate provided on a primary surface of the substrate; a first electrode in contact with the semiconductor laminate; and a second electrode provided on the semiconductor laminate, the semiconductor laminate including a channel layer and a barrier layer, the channel layer being provided on the primary surface of the substrate, and the barrier layer making a junction with the channel layer, the channel layer comprising a first III-nitride semiconductor, the first III-nitride semiconductor containing aluminum as a Group III constituent element, the barrier layer comprising a second III-nitride semiconductor, the second III-nitride semiconductor containing aluminum as a Group III constituent element, the semiconductor laminate including first, second and third regions, the first, second and third regions being arranged along the primary surface of the substrate, and the third region being located between the first region and the second region, the barrier layer including first to third portions included in the first to third regions, respectively, a concentration of impurity in the first portion being the same as a concentration of impurity in the second portion, and the first and second electrodes being provided on the first and second regions, respectively, the first electrode including either one of a drain electrode and a source electrode, the second electrode including a gate electrode, and an aluminum composition of the first III-nitride semiconductor being not less than 0.16, and a bandgap of the second III-nitride semiconductor being larger than a bandgap of the first III-nitride semiconductor, wherein a full width at half maximum of an X-ray rocking curve (XRC) for a (10-12) plane of the channel layer is less than 1000 arcsec.