Patent ID: 8519516

Claim:
A semiconductor construction, comprising: electrically conductive posts extending through a semiconductor die; the posts having upper surfaces above a backside surface of the die, and having sidewall surfaces extending between the backside surface of the die and the upper surfaces; a liner along the sidewall surfaces of the posts and along the backside surface of the die; the liner being configured to comprise substantially right angles in transitioning from regions along the sidewall surfaces of the posts to regions along the backside surface of the die; electrically conductive caps directly against the upper surfaces of the posts; the caps having rims that are along sidewall surfaces of the posts and that are spaced from the sidewall surfaces by the liner; the rims having bottom surfaces and being configured to comprise substantially right angles in transitioning from regions of the bottom surfaces to regions along the sidewall surfaces of the posts; and patterned electrically insulative material defining inset regions around the upper surfaces of the posts; and wherein the rims of the caps extend into the inset regions; the electrically insulative material having thick portions adjacent the inset regions and thin portions corresponding to the inset regions; the rims only being along portions of the inset regions so that other portions of the inset regions extend laterally outward beyond the rims; said other portions of the inset regions being between the rims and the thick portions of the electrically insulative material.