Patent ID: 7304888

Claim:
In a memory array having memory cells at intersections of first lines and second lines, each memory cell having a diode cathode end connected to a first line and a diode anode end connected to a second line, each memory cell initially occupying a high resistance state, a method of programming the memory cells comprising: applying a first voltage to at least one first line contacting the cathode end of at least one selected memory cell to be programmed to a different state; applying a second voltage to first lines not contacting the cathode end of the at least one selected memory cell; applying a third voltage to at least one second line contacting the anode end of at least one selected memory cell; and applying a fourth voltage to second lines not contacting the anode end of the at least one selected memory cell; wherein the first voltage is higher than the third voltage by an amount sufficient to program the at least one selected memory cell to a different state and the second and fourth voltages are at intermediate levels between the first and third voltages, wherein further programming of the at least one selected memory cell is performed in which the first and third voltages are subsequently changed to cause current to pass through the diode in a forward biased direction, and wherein the memory cells each include a diode in series with a state change element.