Patent ID: 7932887

Claim:
A gate driving circuit, comprising: a first stage; a second stage connected in series with the first stage; and a third stage connected in series with the first stage and the second stage, wherein the second stage comprises: a present pull-up part to pull up a level of a present gate signal of the second stage; a carry part to pull up a level of a present carry signal of the second stage; a pull-down part to discharge the present gate signal to an off-voltage in response to a next gate signal from the third stage; a pull-up driving part to turn on the present pull-up part and the carry part in response to a previous carry signal of the first stage, and to turn off the present pull-up part and the carry part in response to the next gate signal, the pull-up driving part being connected to a present Q-node connected to a control terminal of the carry part and a control terminal of the present pull-up part; a holding part to maintain a level of the present gate signal at the off-voltage; a present inverter to turn on the holding part in response to a first clock signal; and a ripple preventing capacitor comprising a first terminal directly connected to the present Q-node and a second terminal directly connected to an output terminal of a previous inverter of the first stage to prevent a ripple at the present Q-node in response to an output signal from the previous inverter.