Patent ID: 7688145

Claim:
A variable gain amplifying device that amplifies an input signal and outputs the amplified signal, comprising: a first input terminal to which a first input signal is input; a second input terminal; an inductor connected to a power supply at one end; an output terminal connected to the other end of said inductor; a first switch stage having “n” first MOS transistors having the same size and connected to said other end of said inductor at one end (“n” is an integer equal to or greater than 2); a first amplifying stage having “n” second MOS transistors having the same size, the second MOS transistors being connected to said first MOS transistors in a one-to-one correspondence, each of the second MOS transistors being connected between the ground and another end of the corresponding one of said first MOS transistors, and all the second MOS transistors being commonly connected to said first input terminal at the gate thereof; a second switch stage having “n” third MOS transistors having the same size as the first MOS transistors and connected to said other end of said inductor at one end thereof, a second amplifying stage having “n” fourth MOS transistors having the same size as said second MOS transistors, the fourth MOS transistors being connected to said third MOS transistors in a one-to-one correspondence, each of the fourth MOS transistors being connected between the ground and another end of the corresponding one of said third MOS transistors, and all the fourth MOS transistors being commonly connected to said second input terminal at the gate thereof; and a controlling circuit that controls the gain by controlling turning on and off of said first MOS transistors and said third MOS transistors so that the sum of the number of first MOS transistors turned on and the number of third MOS transistors turned on is “n” by outputting a control signal to the gates of said first MOS transistors and said third MOS transistors.