Patent ID: 7103131

Claim:
A half-rate phase detecting method, the method comprising: receiving a stream of binary data; dividing the data by two; latching the divided data with a first half-rate clock, creating a first latch output Q 1 ; latching the divided data with a second half-rate clock, the inverse of the first clock, creating a second latch output Q 2 ; latching Q 1 with the second clock, creating a third latch output Q 3 ; latching Q 2 with the first clock, creating a fourth latch output Q 4 ; performing an exclusive-OR operation on Q 1 and Q 2 to create phase signals having a first width; and, performing an exclusive-OR operation on Q 3 and Q 4 to create reference signals, corresponding to the phase signals, having a second width that is twice the first width.