Patent ID: 7398488

Claim:
A method for performing trace equivalent identification by structural isomorphism detection, the method comprising: synthesizing a first netlist into a second netlist, the second netlist including two-input AND gates, inversions, inputs, constants, and registers; constructing a third netlist from the second netlist, the third netlist being a pseudo-canonical netlist that uses calls to algorithms for constructing a netlist for gate g 1 and for constructing a netlist for gate g 2 , where g 1 and g 2 are gates in the second netlist; and performing an isomorphism check of gates g 1 and g 2 , the isomorphism check mapping gate g 1 to an inverted gate g 1 and inverting a mapped input to inverted gate g 1 , the isomorphism check mapping gate g 2 to an inverted gate g 2 and inverting a mapped input to inverted gate g 2 ; wherein an algorithm for constructing the third netlist for gate g 1 includes: identifying a high-level type gate, the high-level type gate being used to represent a local function of g 1 ; collecting input gates to be connected to inputs of the high-level type gate used to represent the local function of g 1 ; reducing the input gates collected in the collecting step by using semantics-preserving rules; updating the high-level type gate to alter the type of the high-level type gate to an updated type; creating a second gate having the updated type; connecting the reduced inputs gates collected in the collecting step to the second gate; and replacing the high-level type gate with the second gate.