Patent ID: 8677221

Claim:
A method comprising: obtaining a first voltage read of a memory cell associated with a solid state memory device, the first voltage read representing a partial voltage level compared to a steady state voltage; detecting an error resulting from the first voltage read; if the error is correctable to a specified precision, using the first voltage read to determine a state of the memory cell; if the error is not correctable to the specified precision, obtaining a second voltage read of the memory cell at a time after the first voltage read is obtained, the second voltage read representing the steady state voltage; and using the second voltage read to determine the state of the memory cell; obtaining a digital value from the first voltage read; detecting an error in the digital value; if an error is detected, determining if the error can be corrected; if the error can be corrected, correcting the error; and if the error cannot be corrected, initiating the second voltage read; wherein the error is corrected using a code from a group of error correcting codes including: Reed-Solomon code, BCR code, turbo code, Golay binary code, Goppa binary code.