Patent ID: 8638146

Claim:
A method of measuring a phase difference for use in a phase locked loop (PLL) comprising a binary phase detector (BPD), a time-to-digital converter (TDC) and a signal generator, the phase difference being that between a reference signal and a generated signal output from the signal generator, the method comprising: inputting the reference signal and the generated signal into the TDC; measuring the magnitude of the phase difference at the TDC; if the measured magnitude of the phase difference is less than a threshold value, operating the PLL according to a first operational mode in which the output of the BPD controls the signal generator; and if the measured magnitude of the phase difference is greater than the threshold value, operating the PLL according to a second operational mode in which the output of the TDC and the BPD controls the signal generator, wherein the PLL further comprises a loop filter, and the method further comprises altering the gain of the loop filter in dependence on the measured phase difference, and wherein a dynamic function unit determines the gain of the loop filter as a function of the magnitude of the measured phase difference.