Patent ID: 8264087

Claim:
A semiconductor package, comprising: a semiconductor package module comprising: a first insulation member having an insulation body and at least one fluid passage passing through the insulation body of the first insulation member, wherein the first insulation member has a first face, a second face opposite the first face, and side faces, circuit patterns formed on the first face of the first insulation member, plating layers directly contacting and covering the circuit patterns, bumps directly contacting the plating layer, connection pads formed on the second face and electrically connected to a through electrode, wherein the connection pad and the circuit pattern are electrically connected to the through electrode, bump structures disposed on the respective connection pads, semiconductor chips disposed over the first face, the semiconductor chips comprising bonding pads that directly contact the bumps such that the semiconductor chips are electrically connected to the circuit patterns respectively through the bumps and the plating layers, and a second insulation member formed on the first insulation member, the circuit patterns, and a portion of the semiconductor chips; and the through electrode passing through the second insulation member of the semiconductor package module and electrically connected to the circuit patterns, wherein the semiconductor chips are electrically connected to the connection bump structures through the connection pads, then through the through electrode, then through the circuit patterns, then through the plating layers, then through the bumps, and finally through the bonding pads of the semiconductor chips.