Patent ID: 8471333

Claim:
A semiconductor device including a trench gate type MISFET, comprising: a semiconductor substrate; a p-type drain region formed over the semiconductor substrate; an n-type channel forming region formed over the p-type drain region; a p-type source region formed over the n-type channel forming region; a first trench extending from an upper surface of the p-type source region to the p-type drain region; a gate insulating film formed over an inner wall of the first trench; a gate electrode formed over the gate insulating film and embedded in the first trench; a second trench extending from the upper surface of the p-type source region to the n-type channel forming region, a first n-type semiconductor region formed in the n-type channel forming region and formed at a bottom of the second trench; and a second n-type semiconductor region formed in a region which is deeper than the first n-type semiconductor region and which is shallower than the bottom of the first trench, wherein a depth of the first trench is deeper than a depth of the second trench, and wherein an impurity concentration of the second n-type semiconductor region is higher than an impurity concentration of the n-type channel forming region and is lower than an impurity concentration of the first n-type semiconductor region.