Patent ID: 8368049

Claim:
A method for fabricating a nanowire transistor, the method comprising steps of: providing at least one nanowire including a core portion that functions as a channel region and an insulating shell portion that covers the surface of the core portion; and forming source and drain electrodes to be connected to the nanowire and also forming a gate electrode for controlling conductivity in at least a part of the core portion of the nanowire, wherein the step of providing the nanowire includes steps of: forming a nanowire material, which is made of semiconductor single crystals including Si and which has a polygonal cross section on a plane that intersects with the longitudinal axis thereof, by a crystal growing process; and thermally oxidizing the surface of the nanowire material to form the insulating shell portion on the surface, and wherein the step of thermally oxidizing comprises thermally oxidizing the surface of the nanowire material having the polygonal cross section such that a cross section that intersects with the longitudinal axis of the core portion has a curved profile.