Patent ID: 8341641

Claim:
A task processor comprising: a processing register configured to temporarily hold data for execution of a task; an execution control circuit configured to load an instruction and an operand from a memory into the processing register, and to execute the task according to the instruction and operand in the processing register; a plurality of state registers holding state data indicating states of execution of tasks and associated with a plurality of tasks; a task switching circuit configured to control a state of execution of a task; a task selecting circuit configured to select a task based on the state data according to a predetermined condition for selection; and an interrupt circuit configured to process an interrupt request signal from an external source, wherein the execution control circuit transmits a predetermined system call signal to the task switching circuit when a first task being executed executes a predetermined system call instruction, and the task selecting circuit selects a task for execution from among tasks in a READY state indicating that the task is executable and waits for execution, and the task switching circuit: switches between tasks for execution by selecting a second task to be executed next in accordance with an output from the task selecting circuit occurring when the system call signal is received, causes the data in the processing register to be saved in a predetermined storage area, updates the state data in the state register associated with the first task from RUN to another state thereby indicating that the task is being executed, causes data associated with the second task and formerly saved in the storage area to be loaded into the processing register, and updates the state data associated with the second task from READY to RUN, and whereupon receipt of an interrupt request signal, the interrupt circuit transmits an interrupt handling instruction associated with the interrupt request signal to the task switching circuit, and the task switching circuit updates the state data of the task in accordance with the interrupt handling instruction.