Patent ID: 8395206

Claim:
A semiconductor device, comprising: a substrate, the substrate including a cell array region and a dummy pattern region completely surrounding lateral sides of the cell array region; a cell structure, the cell structure including a plurality of cell active pillars extending in a vertical direction from the cell array region of the substrate and including cell gate patterns and cell gate interlayer insulating patterns alternately stacked on the substrate, the cell gate patterns and the cell gate interlayer insulating patterns having sides facing the cell active pillars; and a damp-proof structure within the dummy pattern region on the substrate, the damp-proof structure being a continuous structure, and the continuous structure having lateral sides forming a closed-curve shape that completely encloses lateral sides of the cell structure therein, wherein the lateral sides of the continuous structure and the lateral sides of the cell structure have a step-like shape extending from the substrate to uppermost surfaces of the damp-proof structure and the cell structure, respectively, the uppermost surfaces of the damp-proof structure and the cell structure being at a same height with respect to the substrate.