Patent ID: 6961266

Claim:
A method of reading a multi-level flash memory using a sensing circuit that includes a comparator, a voltage regulating block, a reference current supply unit, a sense amplifier driving determining circuit, a register array, and a counter, the method comprising: a first initialization step of setting to store a fourth data in a plurality of registers, apply a first read voltage to word lines, and output a first data to the counter; a first read step of sequentially comparing a first reference current of the reference current supply unit with a drain current of a plurality of memory cells in the comparator, and then storing a first data at a corresponding register to define a first memory cell when a threshold voltage is lower than the reference cell, and maintaining the fourth data stored in the register to complete a read operation of the first memory cell when the threshold voltage is lower than the reference cell; a second initialization step of setting to apply a second read voltage to the word lines, and to allow the counter to output a second data; a second read step of sequentially comparing a second reference current of the reference current supply unit with a drain current of the plurality of memory cells in the comparator only when the first memory cell is not read, and then storing the second data at a corresponding register to define a second memory cell when the threshold voltage is lower than the reference cell, and maintaining the fourth data stored in the register to complete the read operation of the second memory cell when the threshold voltage in lower than the reference cell; a third initialization step of setting to apply a third read voltage to the word lines, and to allow the counter to output a third data; and a third read step of sequentially comparing a third reference current of the reference current supply unit with a drain current of the plurality of memory cells in the comparator only when one of the first and second memory cells is not read, and then storing the third data at a corresponding register to define a third memory cell when the threshold voltage is lower than the reference cell, and maintaining the fourth data stored in the register to complete the read operation of the third and fourth memory cells when the threshold voltage is lower than the reference cell.