Patent ID: 7253530

Claim:
A method for producing chip stacks, comprising the steps of: providing a first semiconductor chip with first contact areas in a metal layer covered with an electrically insulating layer; producing at least two plated-through holes to at least two of said first contact areas, respectively, and first interconnects are respectively connected to the at least two plated-through holes; providing a second semiconductor chip with a second contact area in a metal layer covered with an electrically insulating layer; producing a plated-through hole to the second contact area with a second interconnect connected to the plated-through hole; producing a third interconnect to be bridged on a top side of the first semiconductor chip which has the first interconnect; applying an insulation layer covering the first and third interconnects of the first semiconductor chip, which insulation layer is provided with openings on respective top sides of the first interconnects to be connected; applying at least one fourth interconnect, which contacts the first interconnects to be connected, in the relevant openings of the insulation layer; arranging the first semiconductor chip and the second semiconductor chip to be opposite one another such that the first and second interconnects lie on top of one another; and permanently electrically conductively connecting the first and second interconnects to one another by means of diffusion soldering using a solder layer applied to at least one of the first and second interconnects that are respectively to be connected to one another.