Patent ID: 7969025

Claim:
An electric power semiconductor device comprising: first and second circuit patterns formed on main surfaces of first and second insulating substrates, respectively; first and second semiconductor chips mounted on the first and second circuit patterns, respectively; first, second and third electrode terminals which are laminated from an upper position to a lower position in this order, and disposed between the first and second insulating substrates; a first bonding wire for connecting between the first semiconductor chip and the first electrode terminal; a second bonding wire for connecting between the second semiconductor chip and the second electrode terminal; a first connecting conductor for connecting between the second electrode terminal and the first circuit pattern; and a second connecting conductor for connecting between the third electrode terminal and the second circuit pattern, wherein the first connecting conductor is formed of a first extending portion which is a part of the second electrode terminal and is extended from a part of the second electrode terminal, and the second connecting conductor is formed of a second extending portion which is a part of the third electrode terminal and is extended from a part of the third electrode terminal, wherein the first extending portion of the second electrode terminal is provided under the first bonding wire with a distance in a vertical direction from the first bonding wire, and wherein one end portion of the first extending portion is connected to the first circuit pattern by a solder, and one end portion of the second extending portion is connected to the second circuit pattern by a solder.