Patent ID: 7791199

Claim:
A method of making microelectronic packages comprising: providing a silicon wafer including a first surface having bond pads and a second surface opposite the first surface; providing a silicon packaging layer having a top surface, a bottom surface and an adhesive layer overlying the bottom surface of silicon packaging layer, and abutting said adhesive layer against the first surface of said silicon wafer for attaching said silicon packaging layer to said silicon wafer; after the abutting step, forming openings in said silicon packaging layer and said adhesive layer for exposing said bond pads on said silicon wafer; after the forming openings step, selectively electrophoreticaily depositing a compliant layer covering the top surface and surfaces of said silicon packaging layer within said openings while leaving the bond pads exposed, wherein said electrophoretically deposited compliant layer at least partially protects said microelectronic packages from alpha particles.