Patent ID: 7075143

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate; a channel formation region defined at a surface region of said semiconductor substrate including a high concentration channel region HR for producing a higher electron injection efficiency; a first source-drain region formed at a surface region of said semiconductor substrate at one side of said channel formation region; a second source-drain region formed at a surface region of said semiconductor substrate at another side of said channel formation region; a gate insulating film including a bottom insulating film, a charge storing film, and a top insulating film successively formed on at least said channel formation region, and a gate electrode formed on said top insulating film, wherein said bottom insulating film comprises a plurality of layers including a silicon oxynitride film directly under said charge storing film and a silicon dioxide layer adjacent said silicon oxynitride film; wherein said memory device comprises a read voltage application circuit for applying a read-drain voltage between said first and second source-drain regions, where the source-drain region at a side of a local portion of said charge storing film at one of said first and second source-drain regions functions as a source, and other source-drain region functions as a drain, when reading a bit of data corresponding to charges injected and stored at the local portion of said charge storing film at one of said first and second source-drain regions.