Patent ID: 7921404

Claim:
A computer-implemented method for processing constraints rules defined in a previously developed first PCB design comprising a first constraints output file, to facilitate the development of a second PCB design comprising a second constraints output file, the second design substantially identical topology to the first design, the second constraints output file comprising constraints for signals with identical attributes, the method comprising: using a computer system to compare a boards file of the first design with a net list file of the second design to identify respective differences between the first design and the second design, and; on determination of differences: using a computer system to generate a file attributes change report; storing data from the file attributes change report into an attributes change file; and using a computer system to process the first design constraints output file, the second design constraints output file, and the attribute change file to map constraints associated with changed attributes, to generate with the computer system a revised constraints output file for the second design, the revised second constraints output file comprising constraints for at least some signals with changed attributes.