Patent ID: 6919272

Claim:
A method of patterning a metal layer in a semiconductor die, said method comprising steps of: forming a mask on said metal layer of said semiconductor die, said mask defining an open region and a dense region of said semiconductor die; etching said metal layer at a first etch rate to form a first plurality of metal segments in said open region and etching said metal layer at a second etch rate to form a second plurality of metal segments in said dense region, wherein said etching is performed by using an etch inhibitor selected from the group consisting of N2 and CHF3, and wherein said etching is performed without undercutting said second plurality of metal segments; increasing an amount of said etch inhibitor such that said first etch rate is approximately equal to said second etch rate; performing a plurality of strip/passivate cycles to remove a polymer formed on respective sidewalls of said second plurality of metal segments.