Patent ID: 8478926

Claim:
A computer system, comprising: at least one compute node; a bus exchanger; at least one co-processor card; a public buffer card; and a co-processing task management apparatus, wherein the public buffer card provides temporary storage for data transmission between each compute node of the at least one compute node and each co-processor card of the at least one co-processor card, the public buffer card and the at least one co-processor card are interconnected through the bus exchanger, each respective compute node of the at least one compute node is configured to send a co-processing request message that carries address information of to-be-processed data, and the to-be-processed data is data on which processing is requested by the respective compute node, and the co-processing task management apparatus is configured to, for each respective compute node of the at least one compute node: receive the co-processing request message sent by the respective compute node, according to the address information which is of the to-be-processed data and carried in the co-processing request message sent by the respective compute node, obtain the to-be-processed data, and store the to-be-processed data in the public buffer card, and allocate the to-be-processed data stored in the public buffer card to an idle co-processor card of the at least one co-processor card for processing.