Patent ID: 7871893

Claim:
A method of forming a trench isolation structure on a hybrid-orientation (HOT) wafer, said method comprising: forming said hybrid-orientation (HOT) wafer comprising: a silicon-on-insulator (SOI) stack on a semiconductor substrate, said SOI stack comprising: an insulator layer on said semiconductor substrate; and a first semiconductor layer on said insulator layer; a second semiconductor layer on said semiconductor substrate and positioned laterally adjacent said SOI stack, wherein top surfaces of said first semiconductor layer and said second semiconductor layer are approximately level; and a sidewall spacer on said semiconductor substrate positioned laterally between and in contact with both said SOI stack and said second semiconductor layer such that said first semiconductor layer is isolated from said second semiconductor layer, wherein said sidewall spacer and said insulator layer comprise different dielectric materials; forming a mask layer on said HOT wafer; forming a first trench through said mask layer such that said first trench is above said sidewall spacer and extends laterally over portions of both said SOI stack and said second semiconductor layer; performing multiple etch processes in order to form a second trench aligned below said first trench such that said second trench is between said second semiconductor layer and said SOI stack, wherein said performing of said multiple etch processes comprises performing a non-selective etch process to remove said sidewall spacer, to extend said second trench to said semiconductor substrate and to ensure that said second trench has an essentially homogeneous planar bottom surface, wherein said non-selective etch process comprises a non-selective reactive ion etch (RIE) process capable of anisotropically etching said first semiconductor layer, said second semiconductor layer, said insulator layer, and said sidewall spacer at a same rate; and filling said second trench with an isolation material.