Patent ID: 8278737

Claim:
A semiconductor wafer, comprising: a semiconductor substrate; a plurality of dies formed on the semiconductor substrate, the plurality of dies being separated from one another by a first region extending along a first direction and a second region extending along a second direction different from the first direction; a dummy metal structure formed within a third region that includes a region defined by an intersection of the first region and the second region; a plurality of metal interconnection layers formed over the substrate, wherein each of the plurality of metal interconnection layers is disposed within one of a plurality of dielectric layers and wherein a dielectric constant of at least one of the plurality of dielectric layers is less than about 2.6; and wherein the dummy metal structure includes a first dummy metal structure formed in the at least one of dielectric layers having a dielectric constant less than about 2.6 and a second dummy metal structure in the one of dielectric layers having a dielectric constant greater than about 2.6.