Patent ID: 8477058

Claim:
A successive approximation ADC (SAR ADC), comprising: a first digital to analog converter (DAC) comprising a first capacitor array and a plurality of first switches, wherein the capacitors of the first capacitor array are one-to-one corresponding to the first switches; SAR control logic configured to control to enter into a sequence of comparison phases sequentially; a comparator, coupled to the first DAC, configured to output a first comparison result based on a first comparison voltage of the first DAC and a second comparison voltage; and a first multiplexer, coupled between the comparator and the SAR control logic, configured to select one of the first switches, based on the currently comparison phase entered by the SAR control logic, to be switched directly according to the first comparison result; wherein the first multiplexer comprises a plurality of latch circuits which are one-to-one corresponding to the first switches.