Patent ID: 7738547

Claim:
An improved high-speed adaptive equalizer device comprising: one or more controllable analog filters comprising: one or more data signal inputs for receiving one or more data signals; one or more control signal inputs for receiving one or more control signals; and one or more outputs for carrying filtered data signal output signals; and one or more error generators for assessing the performance of one or more of said controllable analog filters according to one or more error functions coupled to one or more of said analog filters comprising: one or more inputs for receiving one or more of said filtered data signal output signals from said controllable analog filter; one or more outputs for carrying error generator output data signals; and one or more processing modules for processing said error generator output data signals creating processed data signals; wherein one or more of said processing modules comprise one or more error acquisition blocks for applying one or more acquisition filters to one or more of said error generator output data signals thereby creating one or more processed signals coupled to one or more of said error generators comprising: one or more inputs for receiving said error generator output data signals; and one or more outputs for carrying processed data signals.