Patent ID: 8487670

Claim:
A frequency divider comprising: a first Injection-locked Ring Oscillator (ILRO) comprising: a first cross-coupled transistor pair including a first N-channel transistor and a second N-channel transistor, wherein a drain of the first N-channel transistor is a first output node, wherein a drain of the second N-channel transistor is a second output node, wherein a gate of the first N-channel transistor is coupled to the second output node, and wherein a gate of the second N-channel transistor is coupled to the first output node; a first capacitor having a first lead coupled to a source of the first N-channel transistor and a second lead coupled to a source of the second N-channel transistor and configured to increase a first output signal voltage swing at the first and second output nodes; a first current injection circuit comprising: a third N-channel transistor having a source, a drain, and a gate, wherein the drain of the third N-channel transistor is coupled to the source of the first N-channel transistor, wherein the gate of the third N-channel transistor is coupled to the first input node of the first current injection circuit; and a fourth N-channel transistor having a source, a drain, and a gate, wherein the drain of the fourth N-channel transistor is coupled to the source of the second N-channel transistor, and wherein the gate of the fourth N-channel transistor is coupled to the first input node of the first current injection circuit; a first load resistor having a first lead and a second lead, wherein the first lead of the first load resistor is coupled to the first output node; and a second load resistor having a first lead and a second lead, wherein the first lead of the second load resistor is coupled to the second output node, and wherein the second lead of the first load resistor and the second lead of the second load resistor are coupled to a supply voltage node, wherein the first ILRO is configured to drive a first output signal at the first output node from a first voltage state to a second voltage state based on only one input signal being applied to the first ILRO, wherein the one input signal is applied to the first input node.