Patent ID: 7180946

Claim:
A circuit for filtering a set of original data to remove blocking artifacts in the set of original data, said circuit comprising: a first processing stage , corresponding to a first sub-step of a discrete transformation, for transform processing the original data to form odd intermediate transformed data, and a first set of processing stages, corresponding to a set of substeps of the discrete transformation, for processing the odd intermediate transformed data to form odd transformed data; a correction unit for cancelling out certain of the odd transformed data other than those which are to be set to zero, said correction unit thereby forming odd corrected transformed data; and a second set of processing stages, corresponding to a set of sub-steps of an inverse discrete transformation (IDCT 2 ), for processing the odd corrected transformed data to form intermediate filtered data, and a last processing stage, corresponding to a last sub-step of the inverse discrete transformation, for processing the original data and the intermediate filtered data to form a filtered set of data, wherein the circuit corrects blocking artifacts in a frequency domain.