Patent ID: 8482362

Claim:
A combiner/divider circuit comprising: first, second, third, fourth and fifth transmission lines each including a signal conductor and a signal-return conductor; the signal conductor at a first end of the first transmission line forming a first unbalanced signal terminal forming a sum port and the signal conductors at first ends of the second and third transmission lines forming a first pair of component signal terminals, and the signal conductors at first ends of the fourth and fifth transmission lines forming a second pair of component signal terminals; the signal conductor at a second end of the first transmission line being connected in a connection region to the signal conductors at second ends of the fourth and fifth transmission lines; the signal conductors at second ends of the second and third transmission lines being connected in the connection region to the signal-return conductors at the second ends of the fourth and fifth transmission lines, respectively; the signal-return conductor at the second end of the first transmission line being directly connected to the signal-return conductors at the second ends of the second and third transmission lines; and the second ends of the first, second, and third transmission lines extending in a first common direction into the connection region.