Patent ID: 7574319

Claim:
An apparatus for a test and measurement instrument, the instrument comprising: a plurality of processors, including a first processor and a last processor; a plurality of memory controllers, wherein each processor is connected to its own memory controller; memory, wherein each memory controller is connected to its own memory; a plurality of high-speed interconnects, wherein the processors are connected by the high-speed interconnects in a circular arrangement with each processor being directly connected to the processors immediately adjacent on either side; a bridge, wherein at least the first and last processors are connected to the bridge; a system bus, wherein the bridge is connected to the system bus; an acquisition module having a signal bus interface and acquisition memory, wherein the system bus is connected to the acquisition module and has its own acquisition hardware, and wherein the acquisition hardware comprises a direct memory access machine that can transfer data to any portion of the memory; and a signal source, wherein the signal source is connected to the signal bus interface.