Patent ID: 6919168

Claim:
A method of pattern etching a noble metal layer to form an electrode in a RAM capacitor, comprising the steps of: a) providing a substrate supporting a series of layers consisting essentially of a barrier layer on said substrate, a noble metal layer on said barrier layer, a protective layer directly overlying said noble metal layer, a mask layer directly overlying said protective layer, and a patterned resist layer on said mask layer, wherein said protective layer and said mask layer consist essentially of inorganic materials; b) pattern etching said mask layer using a plasma generated from an etchant gas to expose a portion of said protective layer; c) removing said patterned resist layer from said mask layer; d) pattern etching said protective layer to expose a portion of said noble metal layer; e) heating said noble metal layer to a temperature ranging from about 150° C. to about 500° C.; f) pattern etching said noble metal layer using a plasma generated from an etchant gas consisting essentially of a halogen containing gas, and a gas selected from the group consisting of a noble gas, nitrogen, and mixtures thereof; g) removing said mask layer from said protective layer; and h) pattern etching said barrier layer using a plasma generated from an etchant gas, to expose a portion of said substrate.