Patent ID: 8546230

Claim:
A method of forming a transistor, said method comprising: forming, in a semiconductor substrate, a trench isolation region positioned laterally adjacent to a collector region; forming at least one mask layer on a top surface of said substrate above said trench isolation region and said collector region; forming an opening in said at least one mask layer above a center portion of said collector region; and forming an intrinsic base layer such that said intrinsic base layer comprises: a first section above said center portion of said collector region; and a second section above said at least one mask layer such that said at least one mask layer separates said second section from an edge portion of said collector region and said trench; wherein said semiconductor substrate comprising monocrystalline silicon substrate and said forming of said intrinsic base layer comprising performing a non-selective epitaxial semiconductor deposition process such that said first section comprises monocrystalline semiconductor material and said second section comprises a polycrystalline semiconductor material.