Patent ID: 7514297

Claim:
A method for forming a multiple die integrated circuit package comprising the steps of: providing an insulator layer having a first surface and a second opposing surface; providing a first leadframe having a plurality of leads at least partially overlying said first surface; providing a second leadframe having a plurality of leads at least partially overlying said second surface; coupling a first integrated circuit die to at least one lead of said first leadframe; coupling a second integrated circuit die to at least one lead of said second leadframe; applying heat to select locations on least one of the first and second leadframes, said step of applying heat forming one or more through hole vias in said insulating layer at the select locations and electrically connecting at least one lead of said first leadframe to a corresponding lead of said second leadframe through the one or more through hole vias in said insulator; whereby the first and second integrated circuit dies are electrically coupled to one another.