Patent ID: 7289000

Claim:
A method for testing a card that drives a print engine, the method comprising: providing the card that drives a print engine; providing a print engine emulator coupled to the card, the print engine emulator adapted to generate a clock signal for application to the card to emulate signals from the print engine, the print engine emulator operating to generate the clock signal by: selecting a desired clock frequency for a clock output signal, the clock frequency corresponding to a printer speed and resolution of the print engine to be emulated; selecting a reference frequency of a reference clock signal, and selecting at least one multiplier, and selecting an output divider, wherein the reference clock signal, the at least one multiplier and the output divider are used by a phase lock loop (PLL) in generating a PLL output signal having a PLL output frequency; applying the reference clock signal to the PLL, wherein the PLL uses the at least one multiplier and the output divider to generate the PLL output signal, wherein the PLL output frequency of the PLL output signal is higher than the desired clock frequency of the clock output signal; applying the PLL output signal to a counter of a programmable logic chip to generate the clock output signal with the desired clock frequency; and applying the clock output signal to the card to emulate signals provided by the print engine.