Patent ID: 7979262

Claim:
A computer implemented method for verifying circuit design connectivity or functionality, comprising: using a processor configured for: defining a discrete property associated with a value of an operating parameter of the circuit design, wherein the discrete property indicates the digital or analog nature of a net that corresponds to the operating parameter, and the discrete property is used to identify at least one of multiple different supply sensitivities or at least one of multiple different supply voltages in the circuit design; associating the discrete property with respective one or more first digital nets of the circuit design so that the respective one or more first digital nets are associated with respective one or more values, domains, or sensitivities of the discrete property; verifying the connectivity or the functionality between two or more components of the circuit design based at least in part on whether the discrete property associated with a first net or one of the two or more components of the first net is compatible with that of a second net or another of the two or more components of the second net while eliminating a need for simulation; resolving one or more incompatible discrete disciplines by propagating the discrete discipline up and down a plurality of hierarchies for one or more undetermined nets or components to acquire the discrete discipline or one or more other discrete disciplines; and using a display apparatus configured for displaying a result of the act of verifying the connectivity or the functionality or using a computer readable storage medium or a computer storage device configured for storing the result.