Patent ID: 7558339

Claim:
A detector for extracting from a modulated signal binary data frequency-modulated on a carrier signal, the detector comprising: an axes generator capable of producing, from the modulated signal, M pairs of logic signals, M being a whole number greater than or equal to 1, the logic signals of the same pair being in quadrature and each pair being phase-shifted with respect to the other pairs by a phase shift dependent on M; and a Zero-Crossing Demodulator (ZCD) including: M zero-crossing detectors, each detector being an asynchronous logic circuit capable of producing, in relation to a first logic signal and a second logic signal of a pair of logic signals, first pulses when: the first logic signal is in the first logic state and the second logic signal passes from the first logic state to the second logic state, or the second logic signal is in the first logic state and the first logic signal passes from the second logic state to the first logic state, and capable of producing second pulses when: the first logic signal is in a first logic state and the second logic signal passes from a second logic state to the first logic state, or the second logic signal is in the first logic state and the first logic signal passes from the first logic state to the second logic state; an up-counter/down-counter having first, second and third values, the up-counter/down-counter, when it has the second value, passing to the first value in response to a first pulse, and passing to the third value in response to a second pulse; and a binary decoder generating one piece of binary data at each pulse, the binary data assuming a first state when the up-counter/down-counter has the first value and assuming a second state when the up-counter/down-counter has the third value, the state of the binary data not being modified when the up-counter/down-counter passes from the first value to the second value or from the third value to the second value.