Patent ID: 6853033

Claim:
A power metal oxide semiconductor field effect transistor (MOSFET), comprising: a source region; a drain region; a gate; a body region; a drift region extending between said bad region and said drain region, to at least partially guide current from said drain region to said source region; a dielectric wall formed of an insulator, said dielectric wall having opposing sides, one of its opposing sides extending in contact with said drift region, and an opposite one of its opposing sides connected to a low-resistance conducting region, isolated from said drain region by portion of said dielectric wall so that a voltage across said dielectric wall between its opposing sides exerts an electric field into said drift region to redistribute free carriers in said drift region and thereby affect the electrical field distribution in said drift region to increase the breakdown voltage of a reverse biased semiconductor junction between said drift region and said body region; wherein said dielectric wall is formed having a thickness tox, so that the relationship N d ≈[(ε si ·E 0 2 ·ε ox 4/3 )/(2·q 7/3 )] 3/7 ·[t ox ·w] −4/7 is satisfied, where N d is the concentration of dopant in said drift region, 2w is a width of said drift region, ε ox is the dielectric constant for said dielectric wall, ε si is the dielectric constant for said drift region, E 0 is the electric field avalanche value for said drift region and q is the electron charge.