Patent ID: 7125780

Claim:
A method for manufacturing a dielectric isolation type semiconductor device in which a semiconductor substrate and an active layer are bonded to each other through a main dielectric layer, and a supplementary dielectric layer comprising a porous oxide film is formed in said semiconductor substrate in a state contacting with said main dielectric layer, with a power device being formed on said active layer, said method comprising: a step of forming a p + diffusion area and an n + diffusion area on a principal plane of said semiconductor substrate; a step of forming an n + buried diffusion area at a location under said p + diffusion area in such a manner that said buried n + diffusion area is in contact with said p + diffusion area and overlaps with a lower portion of an outer periphery of said n + diffusion area in a manner apart therefrom; a step of making said p + diffusion area porous to a depth up to said n + buried diffusion area; a step of oxidizing the principal plane side of said semiconductor substrate and said area that has been made porous; a step of bonding said semiconductor substrate and an active layer side silicon substrate to each other; a step of polishing said active layer side silicon substrate to form said active layer; and a step of forming said power device on said active layer.