Patent ID: 7788624

Claim:
A computer-implemented method of balancing logic resource usage in a circuit design for a programmable integrated circuit, the method comprising: determining that an assignment of circuit elements of the circuit design to a first type of logic resource of the programmable integrated circuit is unbalanced when compared to an assignment of circuit elements of the circuit design to an alternate type of logic resource of the programmable integrated circuit; defining a plurality of variables for circuit elements of the circuit design assigned to the first type of logic resource and the alternate type of logic resource, wherein the plurality of variables comprises a plurality of binary variables, wherein each binary variable indicates whether the associated circuit element is to be re-assigned to the first type of logic resource or the alternate type of logic resource; defining a plurality of constraints specifying relationships among selected ones of the plurality of variables; obtaining values for the plurality of variables according to the plurality of constraints by minimizing a function that depends upon a sum of the plurality of binary variables; re-assigning, by a computer, circuit elements of the circuit design to the first type of logic resource or the alternate type of logic resource according to the values determined for the plurality of binary variables; and outputting the circuit design specifying the re-assigned circuit elements.