Patent ID: 7124639

Claim:
A high temperature pressure transducer, comprising: a wafer of semiconductor material having a given surface area, and having positioned on a top surface of said wafer a plurality of pressure sensitive elements located within an active area, said active area capable of deflecting upon application of a force thereto, an opposite surface of said wafer including indented regions of a sufficient area to form said active area due to the thinning of said wafer at said indented regions; a plurality of contact terminals each coupled to an associated pressure sensitive element and extending towards the periphery of said wafer and located on the thicker portion of said wafer remote from said active area; a frame located on said top surface of said wafer and surrounding said active area, said frame opening bounding said pressure sensitive elements within said active area; an insulating wafer of a larger area than said semiconductor wafer, said insulating wafer having a plurality of through apertures each near the periphery of said insulating wafer and each associated with a contact terminal of said semiconductor wafer, said semiconductor wafer positioned on said top surface of said insulating wafer to enable access to said through apertures on said top surface, said wafers forming a composite structure; a high temperature header having contact regions, each region positioned to accommodate an associated through aperture when said composite structure is mounted on said header and means for mounting said composite structure on said header; a plurality of high temperature wires, each connected to an associated contact on said semiconductor wafer at one end and directed through said through aperture and connected to said header contact region at said other end; and an insulating cover member having a central opening corresponding to said frame opening, said cover member bonded to said frame about the periphery of said central opening and bonded about the peripheral edge to said insulating wafer to hermetically seal said semiconductor wafer to said insulating wafer.