Patent ID: 7603601

Claim:
An apparatus for enabling special modes within a digital device, comprising: N-storage elements having N-outputs, a clock input and a serial data input; the N-storage elements are adapted to accumulate N-bits of serial data during N-clocks, wherein the N-outputs being representative of the accumulated N-bits of serial data; a special mode key match comparator coupled to the N-outputs of the N-storage elements; the special mode key match comparator has at least one special mode key match data pattern for at least one special mode of a digital device; and the special mode key match comparator compares the accumulated N-bits of serial data with the at least one special mode key match data pattern, and if the accumulated N-bits of serial data match a one of the at least one special mode key match data pattern then the special mode key match comparator outputs a special mode code representative of the at least one special mode and a special mode active to the digital device.