Patent ID: 8299351

Claim:
A mono-crystalline silicon III-V semiconductor device comprising: a Si (111) substrate comprising a single crystal of silicon with a (111) orientation for a major top surface; a coincidence-site lattice (CSL) layer grown over the major top surface of the Si (111) substrate, the CSL layer being a III-V epitaxial layer; wherein the III-V epitaxial layer is a GaAs epitaxial layer or a InP epitaxial layer; wherein the CSL layer is a continuation of the single crystal of silicon in a III-V compound material, and wherein the CSL layer has the (111) orientation; a tunnel diode layer, grown over the CSL layer, the tunnel diode layer having a p+ doped layer and a n+ doped layer that are sufficiently thin and highly doped to enable reverse-biased current to flow vertically through the tunnel diode layer without damage to the device; a top cell layer, grown over the tunnel diode layer, having an n-doped layer and a p-doped layer, forming a light-absorbing p-n diode that generates current when exposed to light of an upper bandgap energy; and a diffusion layer in the Si (111) substrate under the CSL layer, the diffusion layer having an opposite doping polarity as a doping polarity of the Si (111) substrate, the diffusion layer and the Si (111) substrate forming a substrate light-absorbing p-n diode that generates current when exposed to light of a lower bandgap energy; wherein the upper bandgap energy is greater than the lower bandgap energy; wherein current is generated in both the top cell layer and in the Si (111) substrate when light is absorbed, whereby the CSL layer and the Si (111) substrate both have the (111) orientation.