Patent ID: 7629654

Claim:
A semiconductor device comprising: a substrate having a region of a first conductivity type and a first substrate impurity concentration; a first well having the first conductivity type, wherein the first well includes a first well contact region; a second well having a second conductivity type opposite the first conductivity type; a first transistor comprising a drain region and a source region disposed within the first well; a buried layer of the first conductivity type and having a buried layer impurity concentration greater than the first substrate impurity concentration, said buried layer disposed within the substrate below the first well and extending continuously beneath the drain and source regions of the first transistor, and extending continuously beneath a portion of both the first and second wells; and a conductive region disposed between the buried layer and one of the first well contact region and a substrate surface terminal within the first well, said conductive region having a smaller lateral extent than that of the first well, and providing a higher conductance between the buried layer and said one of the first well contact region and the substrate surface terminal than a conductance otherwise provided by the first well and the substrate region in the absence of said conductive region.