Patent ID: 7282441

Claim:
Method of forming an interconnect structure on a wafer having at least a first interconnect level and a second interconnect level formed atop the first wiring level; the first interconnect level comprising a first interlevel dielectric layer (ILD), and a first conductor embedded in a first opening of the first ILD; the second interconnect level comprising a second interlevel dielectric layer (ILD), and a second opening extending to the first conductor; a passivation layer on the surface of the first ILD, covering the first conductor; wherein the second opening is formed using photoresist, photolithography, and fluorine-based etching, stopping on the passivation layer; the method comprising: after etching the second opening, and before removing residual photoresist, subjecting the wafer to a de-fluorination process comprising low power density, relatively high pressure and negligible ion current to wafer surface; performing the de-fluorination process using an oxygen-based plasma comprising oxygen (O 2 ) and at least one gas selected from the group consisting of CO and CO 2 ; performing the de-fluorination process in a plasma chamber, the plasma chamber being capable of producing radio frequency (RF) power at a source frequency and a bias frequency; and in the de-fluorination process, using substantially only source frequency, and negligible bias frequency.