Patent ID: 7224227

Claim:
A circuit for offset cancellation, comprising: a first bias current source that is arranged to provide a first bias current; and a second bias current source, including: a ΔVBE measurement circuit, including: a p-type transistor including a base and an emitter; an n-type transistor including a base and an emitter; a current mirror circuit that is arranged such that an emitter current of the p-type transistor and an emitter current of the n-type transistor are substantially equal; and a resistor that is arranged such that a voltage across the resistor is substantially equal to a difference between a base-emitter voltage of the p-type transistor and a base-emitter voltage of the n-type transistor; and a sampling transistor that is arranged to provide a sampled current such that the sampled current is approximately equal to K*I 0 , where I 0 represents a current associated with the resistor, K is approximately equal to IN*R 0 /(k*T/q), IN represents the first bias current, R 0 represents a resistance of the resistor, k represents Boltzmann's constant, T represents absolute temperature, and where q represents the charge of an electron.