Patent ID: 8139653

Claim:
A galvanic isolator comprising: a transmitting section and a receiving section, the transmitting section comprising: a frame input circuit that receives an input data frame comprising a plurality of input binary bits; a data encoder that receives the input binary bits from the frame input circuit and encodes the input binary bits to generate an encoded data frame comprising a sequence of encoded binary bits in which two successive encoded binary bits represent each input binary bit, the successive encoded binary bits representing a 1 being 01 or 10 and the successive encoded binary bits representing a 0 being 00 or 11, wherein the sequences are chosen to maximize the number of transitions between successive bits having opposite values in the encoded data frame; and a data transmitter that transmits the encoded data frame across an isolation gap that electrically isolates the transmitting section and the receiving section; and the receiving section comprising: a data receiver that recovers the encoded data frame transmitted by the data transmitter; and a data decoder that examines successive pairs of recovered encoded data bits and generates a recovered output data bit from each of the successive pair of encoded data bits, the data decoder further comprising a first flipflop and a second flipflop, the first flipflop being connected to the second flipflop by at least one XOR gate and a one-shot, where the second flipflop directly receives an output of the at least one XOR gate and an output of the one-shot at its inputs; and wherein the data transmitter comprises one element of a split circuit element and the data receiver comprises a second element of the split circuit element, and wherein the split circuit element comprises a transformer having a primary coil in the transmitting section and a secondary coil in the data receiving section.