Patent ID: 7159311

Claim:
A method for forming an array of contact structures for providing electrical connection to an integrated circuit package, the method comprising: providing a dielectric substrate having a substantially planar first surface; forming a cavity-shaped nest within the dielectric substrate, the cavity-shaped nest configured to receive the integrated circuit package at least partially therein, the cavity-shaped nest having a nest perimeter on the first surface of the substrate; forming a plurality of depressions into the dielectric substrate, each depression having an end adjacent to the perimeter of the cavity-shaped nest and providing an unobstructed opening to the cavity-shaped nest, each of the plurality of depressions having an inside surface defined thereon, and a depression perimeter at least partially defined by the first surface of the substrate, wherein the nest perimeter and the depression perimeter intersect at at least one location; and forming a plurality of conductive layers, each of the plurality of conductive layers being formed over at least a portion of the inside surface of at least one of the plurality of depressions, the plurality of depressions being sized and spaced such that each conductive layer of the plurality of conductive layers can be removably and electrically engaged with a lead of an array of electrical leads of the integrated circuit package.