Patent ID: 8250293

Claim:
A method of operating an integrated circuit comprising a plurality of resistance changing memory cells grouped into physical memory units, the method comprising: monitoring writing access numbers assigned to the physical memory units, each writing access number reflecting a number of writing accesses to the physical memory unit to which the writing access number is assigned, if the value of a writing access number assigned to a first physical memory unit exceeds a writing access threshold value, a data exchange process is carried out during which data stored within the first physical memory unit is exchanged with data content of a second physical memory unit having a writing access number of a lower value, wherein the writing access number of a physical memory unit is increased by one each time a writing access to the physical memory unit is performed; and wherein a switching number is assigned to each physical memory unit, wherein the switching numbers of the first physical memory unit and of the second physical memory unit are respectively increased by one each time the data stored within the first physical memory unit is exchanged with the data stored within the second physical memory unit.