Patent ID: 8293632

Claim:
A manufacturing method of a semiconductor device, said semiconductor device including a first MISFET serving as one of an n-channel MISFET and a p-channel MISFET in a first region of a semiconductor substrate, and a second MISFET serving as the other of the n-channel MISFET and the p-channel MISFET in a second region of the semiconductor substrate, said manufacturing method comprising the steps of: (a) forming a first insulating film containing Hf for a gate insulating film of each of the first and second MISFETs, in the first region and the second region of the semiconductor substrate; (b) forming a first metal nitride film over the first insulating film formed in the first region and the second region; (c) removing the first metal nitride film in the first region, while leaving the first metal nitride film in the second region; (d) after the step (c), forming a first metal-containing film containing a first metal element to be introduced into the gate insulating film of the first MISFET, over the first insulating film in the first region and over the first metal nitride film in the second region so as to reduce a threshold of the first MISFET; (e) causing the first insulating film in the first region to react with the first metal-containing film by heat treatment; (f) after the step (e), removing an unreacted part of the first metal-containing film not reacting in the step (e); (g) after the step (f), removing the first metal nitride film; (h) after the step (g), forming a metal film over the first insulating film in the first region and the second region; and (i) forming a first gate electrode for the first MISFET in the first region, and a second gate electrode for the second MISFET in the second region by patterning the metal film.