Patent ID: 8759909

Claim:
An insulated gate field effect transistor, comprising: a semiconductor containing substrate having a first surface; a cavity formed in the substrate and having a sidewall extending to a first depth from the first surface; a dielectric liner in the cavity; a gate conductor within the dielectric liner, at least filling the cavity and extending a first distance above the first surface; one or more body regions within the substrate, extending to a second depth from the first surface and laterally proximate to but separated from the gate conductor in part by a first portion of the dielectric liner of a first lateral thickness; and one or more source regions within the body region extending from the first surface and having a lower extremity at a third depth less than the second depth below the first surface, wherein the source regions are separated from the gate conductor by a second portion of the dielectric liner of a lateral second thickness at least in part greater than the first lateral thickness, and wherein the dielectric liner includes a dielectric protrusion extending laterally into the gate conductor away from the body region and to a fourth depth below the first surface.