Patent ID: 7411231

Claim:
A junction field-effect transistor (JFET), comprising: a bottom gate layer doped to have a first polarity; a source region doped to have a second polarity opposite that of said bottom gate layer recessed into the top surface of said bottom gate layer; a drain region of said second polarity recessed into the top surface of said bottom gate layer and spaced apart from said source region; a channel layer of said second polarity recessed into the top surface of said bottom gate layer between said source and drain regions; a top gate layer of said first polarity recessed into the top surface of said channel layer between said source and drain regions; an implant of said second polarity implanted such that said implant contacts and extends said drain and/or source region toward said source and/or drain region, respectively, such that said implant reduces the magnitude of the electric field that would otherwise arise at the junction of said drain and/or source region and said channel layer for a given drain and/or source voltage, respectively.