Patent ID: 7019590

Claim:
A differential load circuit for a differential amplifier, the load circuit comprising: a first transistor and a second transistor that are configured such that: a gate terminal of the first transistor and a gate terminal of the second transistor are coupled together; a drain of the second transistor is arranged to receive a first half of a differential signal, and is coupled to the gate terminals of the first and the second transistors; a third transistor and a fourth transistor that are configured such that: a gate terminal of the third transistor and a gate terminal of the fourth transistor are coupled together; a drain of the third transistor is coupled to the gate terminals of the third and the fourth transistors and to the drain of the first transistor; and a drain of the fourth transistor is coupled to the drain of the second transistor; and a first, a second, a third, and a fourth resistors, wherein a terminal of each of the resistors is coupled together, and wherein another terminal of each of the resistors is coupled to a source terminal of each of the first, second, third, and fourth transistors.