Patent ID: 8479200

Claim:
A system of virtual processing, comprising: a computer processor; and a virtual machine monitor executable by the computer processor, the system configured to perform a method comprising: running a virtual processor ( 1 ), which when the virtual processor ( 1 ) encounters an instruction that is not implemented in a physical processor (A) results in an exception that is intercepted by the virtual machine monitor, the virtual processor ( 1 ) is mapped to the physical processor (A), the virtual processor ( 1 ) is one of a plurality of virtual processors, the physical processor (A) is one of a plurality of non-identical physical processors, each of the plurality of non-identical physical processors implementing a subset of an instruction set architecture, at least some of the non-identical physical processors implementing subsets which are different from one another; unmapping the virtual processor ( 1 ) from the physical processor (A) responsive to intercepting the exception; generating a list of other of the physical processors that could execute the instruction; determine if one of the other of the physical processors in the list is currently idle; and when one of the other of the physical processors in the list is determined to be currently idle, mapping the virtual processor ( 1 ) to a physical processor (B) which is the one of the other of the physical processors in the list that was determined to be currently idle.