Patent ID: 7948027

Claim:
An embedded bit line structure, comprising: a substrate comprising an insulator layer having an original top surface and a semiconductor layer on the original top surface of the insulator layer, wherein the substrate comprises an active area; a trench surrounding the active area and down through the semiconductor layer and into the insulator layer; a bit line disposed within a lower portion of the trench along one side of the active area, wherein the bit line comprises a first portion and a second portion, the first portion is located within the insulator layer and below the original top surface of the insulator layer, the second portion is disposed on the first portion to electrically connect the semiconductor layer of the active area; an insulator liner disposed on the first portion of the bit line and between the second portion of the bit line and the semiconductor layer of the substrate opposite the active area for isolation; and a shallow trench isolation disposed within the trench to surround the active area for isolation.