Patent ID: 8824591

Claim:
A digital radio frequency transmit system, comprising: a digital signal processing unit, the digital signal processing unit including at least: a digital upconvertor for performing carrier aggregation of multiple complex baseband channels, and a bitstream generator for encoding an aggregated signal into a digital pulse stream; a digital predriver communicatively coupled with the digital signal processing unit, the digital predriver configured for receiving the digital pulse stream from the bitstream generator and providing an output to a switch-mode power amplifier; a master phase-locked-loop (PLL) located in the digital predriver, the master PLL configured for providing: a bitstream frequency F bitstream for clocking control within the digital predriver; and a reference signal F chip — ref for synchronizing clocking control between the digital predriver and the digital signal processing unit; and a local phase-locked-loop (PLL) located in the digital signal processing unit, the local PLL configured for receiving the reference signal F chip — ref from the master PLL and providing clocking control within the digital signal processing unit at least partially based on the reference signal F chip — ref received.