Patent ID: 8909967

Claim:
A method of performing secure computation, comprising: executing a program on a processor, the program having particular processing requirements and particular memory access requirements; obfuscating computational activity on the program by exercising computational circuits of the processor in a uniform manner across different instructions in the program, even when the different instructions do not operationally require the computational circuits to be exercised uniformly; and obfuscating memory access patterns for activity in the program by exercising memory interface circuits on a regular basis, even when exercising the memory interface circuits is not required each time to advance the program, wherein processor presents to outside observers uniform power consumption and uniform memory access patterns regardless of the particular processing and memory access requirements of the program, and wherein the processor has an instruction set architecture (ISA) and a program counter pointing to an instruction of the ISA in the program, and wherein obfuscating computational activity in the program includes, for each one of multiple instructions in the ISA: testing whether the one of multiple instructions matches the instruction of the ISA pointed to by the program counter; updating a program state of the program when the one of multiple instructions matches the instruction of the ISA pointed to by the program counter; and activating the circuits of the processor to simulate updating the program state of the program when the one of multiple instructions does not match the instruction of the ISA pointed to by the program counter.