Patent ID: 7944255

Claim:
A CMOS bias circuit comprising: a starter circuit including a starter current supply part which outputs a starter current to a first terminal, and a starter current stop control part which controls output stop of the starter current; and a started circuit part which is supplied with the starter current via the first terminal and which increases or decreases an internal current in accordance with the starter current and generates at the first terminal a voltage depending upon the internal current, wherein the starter current supply part includes a first MOS transistor connected at a drain thereof to the first terminal, and a first current supply circuit which is connected at a first end thereof to a source of the first MOS transistor and which outputs a first current, and a gate bias of the first MOS transistor increases or decreases depending upon a starter current stop control current, the starter current stop control part supplies the starter current stop control current obtained from the internal current of the started circuit by using an approximate current mirror to a node between the source of the first MOS transistor and the first current supply circuit, and if the starter current is zero and the internal current has a value which is at least a first current value, then the internal current increases up to a second current value and settles, whereas if the starter current is zero and the internal current has a value which is less than the first current value, then the internal current settles with a current value which is less than the second current value.