Patent ID: 7925839

Claim:
A method for performing memory operations in a computing system, comprising: transitioning a cache line associated with a memory location from a conventional MESI coherency protocol to one of a plurality of transactional coherency states associated with a Transaction operating state of a processor; performing updates to the cache line associated with the memory location, the updates to the cache line not being visible to other processors in the computing system; identifying the cache line with a transaction coherency state according to the update performed; receiving an event causing an abort of the cache line update; transitioning to an Abort operating state in response to the event; discarding any changes made to the cache line; transitioning the cache line associated with the memory location from one of a plurality of transactional coherency states associated with the Transaction operating state to the conventional MESI coherency protocol; restoring the cache line to contents stored therein prior to any updates.