Patent ID: 7800173

Claim:
A vertical MISFET device comprising: a semiconductor layer having a first type of conductivity and a first level of doping; at least a first body region and a second body region, housed in the semiconductor layer and having a second type of conductivity, opposite to the first type of conductivity; an enriched region, arranged in the semiconductor layer between the first body region and the second body region, the enriched region having the first type of conductivity and a second level of doping, higher than the first level of doping; a gate electrode extending over the enriched region, over part of the first body region, and over part of the second body region; and a dielectric gate structure, arranged between the gate electrode and the semiconductor layer, the dielectric gate structure having a larger thickness on the enriched region and a smaller thickness on the first body region and the second body region; wherein the dielectric gate structure comprises a thick dielectric gate region, and in that the gate electrode has a smaller thickness on the thick dielectric gate region and a greater thickness outside the thick dielectric gate region.