Patent ID: 7977800

Claim:
A semiconductor device comprising: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate located on the sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate; and a first contact plug connected to the first silicon-germanium layer, wherein the gate interconnect and the first source/drain region are connected via a local interconnect structure including the first silicon-germanium layer, the local interconnect structure is composed of the first silicon-germanium layer, the first silicon-germanium layer being formed to extend over the top surfaces of the first source/drain region and the gate interconnect, and the gate interconnect is lower in height than the gate electrode.