Patent ID: 8385034

Claim:
An electrostatic discharge protection circuit, suitable for an integrated circuit system, the integrated system comprising a first power terminal, a second power terminal, an internal circuit and a reset signal wiring connected with the internal circuit, the electrostatic discharge protection circuit comprising: a first transistor having a first gate, a first electrode and a second electrode, the first gate being coupled to the first power terminal, and the first electrode being connected to the second power terminal; a second transistor having a second gate, a third electrode and a fourth electrode, the second gate being connected to the second electrode, the third electrode being connected the first power terminal, and the fourth electrode being connected to the reset signal wiring; a first resistor-capacitor (RC) circuit having a first resistor coupled to the first power terminal and a first capacitor coupled to the second power terminal; wherein a node is coupled between the first resistor and the first capacitor, and the node is coupled between the second gate and the second electrode; and a second resistor-capacitor (RC) circuit having a second capacitor coupled to the first power terminal and a second resistor coupled to the second power terminal, wherein the first gate is coupled between the second resistor and the second capacitor; wherein when an electrostatic discharge condition occurs to the integrated circuit system, the first transistor and the second transistor are switched on, such that a level of the reset signal wiring is equalized to a level of the first power terminal via the second transistor.