Patent ID: 7911252

Claim:
A clock signal generation apparatus comprising: a clock signal generation circuit configured to generate a plurality of clock signals, each of the plurality of clock signals having a certain phase difference with respect to a phase of a reference clock; and a self-test circuit configured to measure a phase difference of one pair of clock signals, among the plurality of clock signals, which have adjacent phases, wherein the self-test circuit comprises: a clock selection circuit configured to select the pair of clock signals among the plurality of clock signals; a phase detection circuit configured to generate a phase difference pulse signal having a pulse width corresponding to the phase difference of the selected pair of clock signals; a test signal generation circuit configured to generate a test signal having a frequency which is proportional to the pulse width of the phase difference pulse signal, and is lower than the phase difference pulse signal; and a counter circuit configured to count the pulse number of the test signal generated within a reference period.