Patent ID: 6847340

Claim:
An uniformly emitting pixel structure for an active matrix display panel comprising: a data generator region on the first side of said display panel having a plurality of data capacitors wherein said data capacitor having two ends and one end of said data capacitor is connected to every emitting pixel of said display panel; a select generator on the second side of said display panel connecting to said every emitting pixel of said display panel; a TW line connecting to said every emitting pixel; a plurality of emitting pixels in the middle of said display panel, wherein said emitting pixel comprising: a first transistor having a gate, a source and a drain, where said gate is connected to said select generator, where said drain is connected to said data generator region; a storage capacitor having a first terminal and a second terminal, where said source of said first transistor is connected to said first terminal of said capacitor, where said second terminal of said capacitor is connected to a Vdd line or a common electrode; a second transistor of PMOS transistor having a gate, a source and a drain, where said gate of said second transistor is connected to said source of said first transistor, where said gate of said second transistor is connected to said first terminal of said storage capacitor, where said source of said second transistor is connected to said Vdd line, where said source of said second transistor is connected to said second terminal of said storage capacitor; a third transistor having a gate, a source and a drain, where said gate of said third transistor is connected to said TW line, where said drain of said third transistor is connected to said data capacitor in said data generator region, where said source of said third transistor is connected to said drain of said second transistor; a light element in said every emitting pixel, where said source of said third transistor and said drain of said second transistor are connected to said light element; and a collecting transistor positioning on the third side of said display panel having a source, a drain and a gate, wherein said light element on said every pixel are connected to said source of said collecting transistor, said gate of said collecting transistor is connected to a control device OC.