Patent ID: 7061087

Claim:
A multi-package module comprising a plurality of stacked packages including an upper package and a lower package, each package comprising: a board having located on one side thereof a chip installation area and a bump pad area; at least one chip disposed in the chip installation area; and a plurality of first bump pads formed in the bump pad area electrically connected to the chip, wherein the respective packages are electrically connected by connecting bump pads of the upper package to bump pads of the lower package, the chip installation area of the upper and lower packages being laterally offset from each other, wherein a plurality of second bump pads are formed on a second side of the board, and a plurality of via holes through which the second bump pads are electrically connected to redistribution patterns, and wherein the second bump pads are formed on the second side of the board in the space corresponding to the chip installation area on the first side of the board.