Patent ID: 7805594

Claim:
A multithread processor which carries out a plurality of threads in parallel through the use of one or more arithmetic units, comprising: a plurality of register windows each provided for each of said threads and made to store data to be used for instruction processing in said arithmetic unit; a work register made to mutually transfer said data with respect to said plurality of register windows and said arithmetic unit, the work register being shared by the plurality of register windows and occupied by one of the plurality of threads at a time; and a multithread control unit for controlling data transfer among said plurality of register windows, said work register and said arithmetic unit on the basis of an execution thread identifier for identifying said thread to be executed in said arithmetic unit, wherein said multithread control unit carries out register data update at the completion of an instruction in said arithmetic unit with respect to said work register and said register window corresponding to said thread related to the instruction completion, and when switching said thread that is an object of processing in said arithmetic unit, said multithread control unit controls the data transfer without transferring, from the work register to the register window, data on a thread before the switching so that the updated data is transferred from said register window corresponding to said thread, which becomes an object of execution after the switching, to said work register.