Patent ID: 8639919

Claim:
A microprocessor, comprising: debug logic; programmable debug configuration storage elements whose values configure the debug logic; a flag, alterable prior to the microprocessor being reset; and reset microcode, which the microprocessor is configured to execute in response to being reset and prior to fetching and executing user program instructions, the reset microcode being configured to: determine whether the flag has a first predetermined value or a second predetermined value; write values into the programmable debug configuration storage elements to configure the debug logic, if the flag has the first predetermined value; and refrain from writing values into the programmable debug configuration storage elements, if the flag has the second predetermined value; wherein the microprocessor is conditionally configured, based upon the value of the flag, to set up and enable the debug logic during a subsequent reset of the microprocessor before subsequently fetching and executing user instructions; and wherein the debug logic is configured to conditionally invoke debug microcode based on the values of the programmable debug configuration storage elements and detection of a debug-triggering event.