Patent ID: 7973303

Claim:
A nitride semiconductor device comprising: n-type and p-type nitride semiconductor layers; an active layer disposed between the n-type and p-type nitride semiconductor layers, the active layer having a lamination of quantum barrier layers and quantum well layers alternated with each other; a thermal stress control layer disposed between the n-type nitride semiconductor layer and the active layer, and formed of a material having a smaller thermal expansion coefficient than the n-type and p-type nitride semiconductor layers; and a lattice stress control layer disposed between the thermal stress control layer and the active layer, and including a first layer and a second layer, wherein the first layer is formed of a material having a band gap energy which is less than that of the thermal stress control layer and greater than that of the quantum well layer, and has a pit in a top surface thereof, and the second layer is formed of a different material from the first layer, and is disposed between the first layer and the active layer, filling the pit.