Patent ID: 7151401

Claim:
A semiconductor apparatus including a MOS-type device, comprising: a first switch configured to supply a gate current during a first turn-on operation for turning on said MOS-type device; a second switch configured to discharge a gate capacitance by a discharge current during a turn-off operation for turning off said MOS-type device; a third switch configured to increase said gate current; first timer configured to turn on said third switch in conjunction with the turn-on of said first switch, and then configured to turn off said third switch after a first predetermined time from said turn-on of said third switch; a fourth switch configured to increase the discharge current during said turn-off operation; and second timer configured to turn on said fourth switch in conjunction with the turn-on of said second switch, and then configured to turn off said fourth switch after a second predetermined time from said turn-on of said fourth switch, wherein said first and third switches are connected in series.