Patent ID: 7103343

Claim:
A transceiver, comprising: a first mixer having an input for receiving a reception signal and an output for tapping a first intermediate frequency signal; a first phase locked loop for receiving a first mixer clock and connected to said first mixer; an analog/digital converter connected to said output of said mixer for receiving a first converter clock; a reference generator for generating a reference clock, the reference clock being an integral multiple of the first mixer clock, and the first converter clock being an integral multiple of the reference clock; a second mixer having an input for receiving a second intermediate frequency signal and an output for tapping a transmission signal; a second phase locked loop for receiving a second mixer clock and connected to said second mixer; and a digital/analog converter connected to said input of said second mixer for receiving a second converter clock, the reference clock being an integral multiple of the second mixer clock, and the second converter clock being an integral multiple of the reference clock.