Patent ID: 8099648

Claim:
A physical interface formed as a first integrated circuit (“IC”) on a first substrate portion to detect transmission errors in data exchanged with a second IC formed on a second substrate portion, the physical interface comprising: a plurality of input ports and output ports, including a first subset of input ports configured to receive in-bound encoded data bits and a first subset of output ports configured to transmit in-bound decoded data bits to the second IC; and one or more error recovery modules coupled between the plurality of input ports and output ports; wherein a first error recovery module of the one or more error recovery modules is coupled between at least one of the first subset of input ports and at least one of the first subset of output ports, the first error recovery module including a physical layer (“PHY”) decoder configured to detect errors in the in-bound encoded data bits and to initiate an action to correct the errors, the PHY decoder being an N+m bit/N bit decoder, where m is a integer of 1 or more.