Patent ID: 7994020

Claim:
A method of manufacturing a semiconductor device structure, the method comprising: providing a substrate comprising a bulk semiconductor material, a first conductive fin structure formed from the bulk semiconductor material, and a second conductive fin structure formed from the bulk semiconductor material, the first conductive fin structure and the second conductive fin structure being separated by a gap; forming spacers in the gap and adjacent the first conductive fin structure and the second conductive fin structure, wherein the spacers are formed from an oxide material, and wherein forming the spacers fills in spaces between adjacent fins in each of the first and second conductive fin structures with the oxide material; etching the bulk semiconductor material, using the spacers as an etch mask, to form an isolation trench in the bulk semiconductor material; forming a dielectric material in the isolation trench, over the spacers, over the first conductive fin structure, over the second conductive fin structure, and over the oxide material in the spaces between adjacent fins in each of the first and second conductive fin structures; and etching a portion of the dielectric material, a portion of the spacers, and a portion of the oxide material in the spaces between adjacent fins in each of the first and second conductive fin structures to expose an upper section of the first conductive fin structure and an upper section of the second conductive fin structure, while preserving the dielectric material in the isolation trench and preserving some of the oxide material in the spaces between and at the base of the adjacent fins in each conductive fin structure.