Patent ID: 7060546

Claim:
A method of forming a MOSFET semiconductor device, comprising: providing a semiconductor substrate, said substrate comprising a buried insulating layer, a thin silicon layer overlying the buried insulating layer and a hard polish-stop layer overlying the thin silicon layer; forming an isolation area surrounding and defining an active area of the MOSFET device; selectively etching away the polish-stop layer to expose source/drain areas of the thin silicon layer; implanting the exposed source/drain areas of the thin silicon layer to form source/drain junctions; forming sidewall spacers surrounding the source/drain areas along vertical side walls of the isolation material and polish-stop layer between the source/drain areas; depositing doped silicon to elevate the source/drain junctions; forming source/drain silicide conductors on top of the elevated source/drain junctions; forming protective caps over the source/drain silicide conductors; removing the polish-stop layer between the source/drain areas to form a gate opening; forming a channel in the thin silicon layer; forming a thin gate dielectric in the gate opening; and forming a gate conductor in the gate opening over the gate dielectric.