Patent ID: 7042064

Claim:
An integrated circuit comprising: a substrate having a plurality of isolation islands; a layer of oxide formed and patterned on a surface of the substrate; a layer of dielectric formed overlaying the layer of oxide and exposed surface areas of the substrate, the layer of dielectric having a dielectric constant that is higher than the dielectric constant of the layer of oxide; and at least one capacitor formed in one of the isolated island in the substrate, each capacitor using the layer of dielectric as a capacitor dielectric, each capacitor dielectric is positioned between a top plate and a bottom plate of an associated capacitor; at least one transistor formed in another of the isolation islands in the substrate, each transistor including: a base region formed adjacent the surface of the substrate; an emitter formed in the base region adjacent the surface of the substrate; a collector contact formed adjacent a surface of the substrate; and wherein portions of the layer of oxide and layer dielectric covering the base region of the at least one transistor has a contact opening that extends to the base region.