Patent ID: 8652914

Claim:
A method for forming a semiconductor device, the method comprising the steps of: providing a transistor comprising a source/drain region, within a substrate, and having a portion of the source/drain region raised over the substrate, an extension region within the substrate adjoining the source/drain region and extending toward a gate on the substrate, and a dielectric spacer against the gate wherein the dielectric spacer covers at least part of the extension region; forming a silicide intermix layer over the source/drain region, on a sidewall of the raised portion of the source/drain region, and over a portion of the extension region which is not covered by the dielectric spacer; depositing dielectric material over the silicide intermix layer on top of the source/drain region; creating a contact opening through the dielectric material, wherein the contact opening extends at least as far as the silicide intermix layer over the source/drain region; and forming a silicide contact at the bottom of the contact opening.