Patent ID: 7428171

Claim:
A non-volatile memory, comprising: an array of memory storage units; a plurality of sense amplifiers for sensing a group of memory storage units in parallel; each of said plurality of sense amplifiers having properties dependent on operating environment and a set of control signals; and a reference circuit having elements with properties representative of said plurality of sense amplifiers and sharing a common operating environment with said plurality of sense amplifiers, said reference circuit, responsive to said elements operating in the operating environment, generating said set of control signals such that said plurality of sense amplifiers are controlled to have its properties substantially insensitive to the operating environment and each sense amplifier further comprising: a discriminator coupled to receive a conduction current of an associated memory cell, said discriminator discriminating whether the conduction current is higher or lower than a predetermined demarcation current value; a latch being set to register the associated memory cell in response to said discriminator identifying a conduction current higher than said predetermined demarcation current value; and an inhibitor responsive to said latch being set to turn off the conduction current of the associated memory cell.