Patent ID: 7151015

Claim:
A method of manufacturing a semiconductor device comprising steps of: forming a semiconductor layer on an insulating surface; forming an insulating film on said semiconductor layer; forming a first electrode comprising a laminate structure of a first conductive layer with a first width and a second conductive layer on said insulating film; adding first impurity elements to said semiconductor layer using said first electrode as a mask to form a high concentration impurity region; etching said second conductive layer to form a second electrode comprising a laminate structure of said first conductive layer with said first width and said second conductive layer with a second width; adding second impurity elements to said semiconductor layer using said second conductive layer as a mask to form a low concentration impurity region; and after forming the low concentration impurity region, etching said first conductive layer to form a third electrode comprising a laminate structure of said first conductive layer with a third width and said second conductive layer with said second width.