Patent ID: 7415684

Claim:
A method for facilitating structural coverage of a design during a design verification process, comprising: receiving a hardware description of the design, wherein the hardware description of the design contains one or more module instances and a set of structural coverage targets for a set of structures in the design; extracting a control flow, the set of structural coverage targets, and a set of structural coverage metrics for the hardware description; creating a shadow module which has the same control flow as the design and which contains a set of parallel structures that correspond to the set of structural coverage targets in the control flow of the hardware description; generating a set of cross-module references that link the set of parallel structures with signals from the set of structures; and applying a formal verification tool to the design, the shadow module, and the set of cross-module references to achieve a desired structural coverage; building a formal model and a simulation model for the design; and manipulating a set of inputs to the hardware description of the design to exercise code areas specified by a set of structural coverage tests.