Patent ID: 8736268

Claim:
A device ( 1 ) that is compatible with nuclear magnetic resonance (NMR) and configured for real-time correction of variable set-point signals of gradient coils of a spectrometry, or imagery device, by nuclear magnetic resonance, based on factors, or coefficients of correction, or coeffecients of compensation that are provided, comprising: an input of the device that receives original digital set-point signals; an output of the device connected to a gradient coil of one of i) a nuclear magnetic resonance spectrometry device, and ii) a nuclear magnetic resonance imagery device, wherein the output of the device delivers, to the gradient coils, set-point signals that have been modified as part of a correction cycle, in order to compensate for the effects, limitations, disruptions, interference, and negative effects subsequently encountered during processing, transmission, transformation, and/or application of said set-point signals; and at least one circuit ( 1 ′) connected between said input of the device and said output of the device, with said at least one circuit being a micro-programmed structure composed of plural subassemblies ( 3 , 4 , 5 , 6 , 6 ′, 7 , 7 ′), that are operationally different from one another and work with digital components; these plural sub-assemblies comprising: a micro-sequencer ( 3 ) forming a counter, a memory ( 4 ) configured for storing micro-instructions, a processing unit ( 5 ) combined with at least one working memory ( 6 , 6 ′) and two Integrating arithmetic calculation modules ( 7 , 7 ′); wherein said processing unit ( 5 ) modifies data of the received original digital set-point signals in a correction cycle by taking into account the factors, or coefficients of correction, or coefficients of compensation that are provided, in accordance with the micro-instructions that are addressed by the micro-sequencer ( 3 ) in the storage memory ( 4 ) , and that form an arithmetic correction algorithm that controls the operation of the operationally different plural sub-assemblies ( 3 , 4 , 5 , 6 , 6 ′, 7 , 7 ′), that constitute the at least one circuit ( 1 ′) , and are programmed based on the correction to be implemented, wherein the at least one working memory ( 6 , 6 ′) stores: i) correction coefficients that are used by the arithmetic correction algorithm; and ii) an output datum/output data of at least one corrected set-point signal, and wherein the two integrating arithmetic calculation modules ( 7 , 7 ′) provide the correction of the original digital set-point signals in real-time based on a convolution operation using the correction coefficients and the stored output datum/output data of the working memory from at least one prior correction cycle of the digital set-point signals.