Patent ID: 7709907

Claim:
An integrated circuit comprising: a substrate; a first oxide layer extending into the substrate and having openings to surface regions of the substrate; devices formed in the substrate regions; one of the devices being an insulated gate field effect transistor having a source region, drain region, and corresponding active gate, the source and drain regions being spaced in one of the substrate regions and self-aligned with the active gate of the transistor; the active gate including: a first gate portion extending over the substrate region between the corresponding source and drain regions; and a pair of second gate portions, the second gate portions each being electrically connected to each other only by the first gate portion and each extending transverse to the first gate portion, the pair of second gate portions extending from the first oxide layer overlapping an entire edge of the opening which is transverse to the first gate portion as well as two opposing edges of the opening which are parallel to the first gate portion onto adjacent edges of the substrate region; wherein lateral edges of the source and drain regions parallel to the second gate portion are spaced from the first oxide layer and an edge of the source region parallel to the first gate portion touches the first oxide layer; and including a second oxide layer juxtaposed from the second gate portion and extending from the first oxide layer onto the adjacent edge of the substrate region and only to the lateral edge of the source and drain regions.