Patent ID: 7144490

Claim:
A method for selective electroplating of a semiconductor input/output (I/O) pad, the method comprising: forming a titanium-tungsten (TiW) layer over a passivation layer on a semiconductor substrate, said TiW layer further extending into an opening formed in said passivation layer for exposing the I/O pad, such that said TiW layer covers sidewalls of said opening and a top surface of the I/O pad; forming a seed layer over said TiW layer; selectively etching portions of said seed layer, down to the top of said TiW layer, such that remaining seed layer material correspond to a desired location of interconnect metallurgy for the I/O pad; and electroplating at least one metal layer over said remaining seed layer material, and thereby encapsulating exposed outer sidewalls thereof with respect to said TiW layer, using said TiW layer as a conductive electroplating medium, wherein said electroplating is implemented without a photoresist present during the electroplating step.