Patent ID: 7136274

Claim:
An embedded multilayer printed circuit, comprising: a first ground plane ( 105 ) of a multilayer printed circuit board; a co-planar capacitor ( 110 ), a first distributed inductor ( 125 ), and a first capacitive plate ( 135 ) embedded within an inner layer of the embedded multilayer printed circuit, wherein the first capacitive plate is a plate of a first vertical capacitor ( 250 or 270 ); and a first node ( 111 ) formed by a connection of a first terminal of the co-planar capacitor, a first terminal of the first distributed inductor, and the first capacitive plate, wherein a second terminal ( 145 ) of one of the co-planar capacitor and the first distributed inductor is connected to the first ground plane, and wherein the first node of the embedded multilayer printed circuit is coupled to one or more other layers of the multilayer printed circuit board by a first reactance.