Patent ID: 8921949

Claim:
A MOS P-N junction diode, comprising: a semiconductor substrate; a mask layer formed on the semiconductor substrate, wherein a surface of the mask layer is partially exposed; a guard ring layer formed in the semiconductor substrate by an ion implantation process and a thermal drive-in process, wherein a first side of the guard ring layer is connected with the mask layer; a gate oxide layer formed on a part of the semiconductor substrate; a polysilicon structure formed on the gate oxide layer; a central conductive layer formed in the semiconductor substrate by another ion implantation process, wherein a part of the central conductive layer is connected with a second side of the guard ring layer, and the central conductive layer is separated from the gate oxide layer; a silicon nitride layer formed on a part of the surface of the central conductive layer, and located at bilateral sides of the polysilicon structure, wherein the silicon nitride layer is protruded over the polysilicon structure; a metal diffusion layer formed within the guard ring layer and the central conductive layer by diffusion; a channel region formed in the semiconductor substrate by a further ion implantation process, wherein the channel region is located beside the central conductive layer and disposed under the gate oxide layer; and a metallic sputtering layer formed on the mask layer, the polysilicon structure, the guard ring layer, the central conductive layer and the silicon nitride layer.