Patent ID: 7277803

Claim:
A computer program embodied on a computer readable medium carrying one or more sequences of instructions to facilitate determining a number of transitions that would occur in a sequential scan test of an integrated circuit using a digital processing system, said integrated circuit comprises a plurality of scan elements which would be connected as a scan chain during said sequential scan test, wherein execution of said one or more sequences of instructions by one or more processors contained in said digital processing system causes said one or more processors to perform the actions of: receiving an input vector; and computing a respective first count representing a number of transitions that would occur at each of said scan elements in said scan chain if said input vector is scanned-in to said scan chain, wherein said computing is performed by examining only said input vector; receiving an expected output vector corresponding to evaluation of said integrated circuit after said first input vector is scanned-in; and calculating a respective second count representing a number of transitions that would occur in each of said scan elements in said scan chain if said expected output vector is scanned out, wherein said calculating is performed by examining only said expected output vector, wherein said expected output vector is comprised in said plurality of output vectors.