Patent ID: 7636021

Claim:
A network communication device, the device comprising: a phase lock loop for generating a clock signal used to transmit or recover information communicated from or to the device, wherein the phase lock loop includes a voltage controlled oscillator for generating the clock signal, the voltage controlled oscillator comprising, a transistor having collector, emitter and base terminals; a first feedback capacitor coupled between the emitter and base terminals; a second feedback capacitor coupled to the emitter terminal; a RF choke inductor coupled in series with a resistor to the emitter terminal; series tuned resonator circuitry coupled to the base terminal, the series tuned resonator circuitry having a first resonant frequency fs; and parallel tuned resonator circuitry coupled to the base terminal, the parallel tuned resonator circuitry having a second resonant frequency fp; a tuning network coupled between the series tuned resonator circuitry and the parallel tuned resonator circuitry, said tuning network including a first inductor in series with a first capacitor and having a third resonating frequency fs′, and wherein fs and fp are different resonating frequencies and fs, fp, and fs′ are selected such that the oscillation frequency of the oscillator substantially coincides with the maximum slope of the oscillator phase characteristic curve.