Patent ID: 7964455

Claim:
A method for manufacturing a semiconductor device, comprising: providing a semiconductor substrate of a first conductivity-type and having a major surface; forming a gate insulating layer on the major surface; defining a first area, in which a conductive pattern to be formed, on the major surface; forming a first impurity region of a second conductivity-type on the major surface and located on both sides adjacent to the first area and on a part of the first area, the first impurity region having a relatively low concentration; forming the conductive pattern on the gate insulating layer of the first area; forming a second impurity region of the second conductivity-type in both sides of the first impurity region in which the first impurity region is not covered with the conductive pattern, the second impurity region having a relatively high concentration; and forming a slit in the conductive pattern located over the first impurity region.