Patent ID: 8886885

Claim:
An apparatus, comprising: a plurality of flash modules, wherein each of the flash modules comprises a cache memory; a flash memory; and a flash controller in communication with the cache memory and the flash memory; wherein the flash controller of a first flash module of the plurality of flash modules is configured to operate the cache memories of the plurality of flash modules together as a global cache, wherein the global cache is usable, as cache memory, by each of the plurality of flash modules; wherein the flash controller of a second flash module of the plurality of flash modules is configured to operate the second flash module as a directory controller for each of the flash memories of the plurality of flash modules, and wherein the second flash module, operating as the directory controller, is configured to (i) receive a message requesting data to be read from or written to a selected flash memory of the plurality of flash modules and (ii) identify, based on the message, the selected flash memory.