Patent ID: 7069494

Claim:
A method of checking for errors in an ECC protected mechanism of a data processing system, comprising the steps of: applying data with a number of bits N to an error correction code (ECC) matrix to yield an error detection syndrome, the ECC matrix having a plurality of rows and columns wherein a given column corresponds to a respective one of the data bits; and resolving the error detection syndrome to detect at least one error in data as read from a location of the data processing system; using the error detecting syndrome to yield corrected data; inverting the corrected data as it is written back to the location of the data processing system; and setting an inversion bit to indicate that the data as currently stored is inverted, wherein the inversion bit is part of the data, one of the columns in the ECC matrix corresponds to the inversion bit, and each bit in the column of the ECC matrix which corresponds to the inversion bit is set.