Patent ID: 8553184

Claim:
A method of manufacturing an array substrate, comprising: Step 1.00, depositing a transparent conductive film and a gate metal film on a substrate, and forming a pixel electrode, a gate electrode, and a gate line with a first patterning process, wherein the gate metal film over the pixel electrode is removed in the first patterning process; Step 2.00, depositing, successively, a gate insulating film, a semiconductor film, and a doped semiconductor film on the substrate after step 1.00, and forming a semiconductor layer and a doped semiconductor layer with a second patterning process; Step 3.00, depositing a source/drain metal film on the substrate after step 2.00, and forming a data line, a source electrode, and a drain electrode with a third patterning process, the source electrode being electrically connected with the data line, and the drain electrode being electrically connected with the pixel electrode; and Step 4.00, forming a planarization film on the substrate after step 3.00, depositing a reflective layer film on the planarization film and forming a reflective layer with a fourth patterning process, the reflective layer being disposed in a reflective region in a pixel region defined by crossing of the gate line and the data line, wherein, in the Step 3.00, when forming the data line, the source electrode and the drain electrode, a reflective structure is formed in the reflective region, wherein, the reflective structure is formed below the reflective layer through the planarization film, and wherein, the reflective layer is electrically isolated from the drain electrode.