Patent ID: 7471154

Claim:
A method for amplifying an input signal while minimizing gain expansion, the amplifier comprising at least a first section and a second section, the method comprising: during a high power condition: providing a bias signal from a bias node of the first section and the second section; providing an input signal to the first section and the second section; amplifying the input signal with the first section and the second section to create an amplified signal; providing the amplified signal on an output; during a cutback power condition: providing the bias signal from the bias node to only one of the first section or the second section, wherein a portion of the bias signal flows through a resistor interconnecting the first section and the second section to the section which is not otherwise provided the bias signal; providing an input signal to the first section and the second section; amplifying the input signal with either the first section or the second section to create an amplified signal; and providing the amplified signal on the output.