Patent ID: 7623792

Claim:
A clock extracting method of extracting a clock synchronized with a signal light train, comprising: a signal light processing step performed using an optical switch, of arranging bit intervals of said signal light train having the bit intervals shorter than a switching time of said optical switch, at uneven periods, to make a first bit interval between a predetermined signal light and a first adjacent signal light before said predetermined signal light and a second bit interval between said predetermined signal light and a second adjacent signal light following said predetermined signal light to be longer than the switching time of said optical switch; an optical switch processing step of selectively demultiplexing said predetermined signal light from said signal light train processed by said signal light processing step using said optical switch, to generate a signal light at a bit rate lower than that of said signal light train; and an electric clock extracting step of electrically extracting a clock synchronized with said signal light train from the signal light converted into an electrical signal by a photoelectric converter.