Patent ID: 7679930

Claim:
A multilayered printed circuit board comprising: a first surface layer that includes a semiconductor integrated circuit; a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided; a main power supply wiring layer that is provided in a layer between the first and second surface layers; a ground layer that is provided in a layer between the first and second surface layers; a first power-supply via hole that extends from the first surface layer to the second surface layer and that is not electrically connected to the main power supply wiring layer; a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via hole; a second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer; a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via hole to the second power-supply via hole; and a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer, wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor.