Patent ID: 7208836

Claim:
Integrated circuitry comprising: a semiconductive substrate; an electrically insulative borophosphosilicate glass (BPSG) layer over the semiconductive substrate; a series of first conductive polysilicon lines directly on and in contact with the BPSG layer, the first series conductive lines having individual pairs of respective sidewalls; electrically insulative oxide material on and in contact with respective first series conductive lines, a top of the insulative oxide material over at least some of the first series conductive lines defining a first plane; a plurality of insulative oxide sidewall spacer pairs, individual spacer pairs being on respective sidewall pairs of individual first series conductive lines, having respective spacer tops that are coplanar with the first plane, and being connected with the electrically insulative oxide material; individual first series conductive lines being effectively insulated by the BPSG layer, the respective sidewall spacer pairs, and the respective insulative oxide material; and a series of second conductive aluminum-containing lines having respective line tops at least some of which define a second plane that is coplanar with said first plane, the series of second conductive lines being directly on and in contact with the BPSG layer and the first series conductive lines providing cross-talk shielding for the second series conductive lines.