Patent ID: 7069458

Claim:
A data interface, comprising: a phase generator coupled to generate a plurality of time delay pulses; a phase selector adapted to select one of the plurality of time delay pulses to adjust a clock signal to sample each of a plurality of data signals having dissimilar transition times between transitions of the clock signal, wherein the phase selector comprises a control signal generator adapted to provide a control signal to the phase generator to select the one of the plurality of time delay pulses; a latch coupled to receive a clock transition adjusted by the select one of the plurality of time delay pulses; a second phase generator coupled to generate a second plurality of time delay pulses; a second control signal generator coupled to modify a number of the second plurality of time delay pulses and a time difference between neighboring second plurality of time delay pulses output from the second phase generator; and a plurality of data output pins coupled to receive the plurality of data signals from the latch.