Patent ID: 7808093

Claim:
A stacked semiconductor device comprising: an upper semiconductor device and a lower semiconductor device, wherein said lower semiconductor device comprises: a wiring board having wiring of a prescribed pattern on a first surface and a second surface that is the surface opposite said first surface; at least one semiconductor chip mounted on said first surface of said wiring board, and electrically connected to said wiring of said wiring board by way of a connection means; an encapsulant composed of insulating plastic formed on said first surface of said wiring board and that further covers said semiconductor chip and said connection means; and a plurality of linking interconnects, a portion of each of which is connected to said wiring of said first surface of said wiring board and another portion of each of which is positioned on a surface of said encapsulant, wherein the upper semiconductor device includes a plurality of upper electrodes; and wherein the another portion of the linking interconnects is electrically connected with a respective one of the upper electrodes.