Patent ID: 7986009

Claim:
A method of operating an integrated circuit arrangement, the method comprising: biasing a reference operating potential line to a basic potential; and biasing a positive operating potential line to a more positive potential in comparison with the basic potential; wherein the integrated circuit arrangement includes a capacitor connected between the operating potential lines, said capacitor including the following regions: a basic doping region doped in accordance with a basic doping with a basic doping type and including a region with a maximum dopant concentration; at least one connection region doped in accordance with a connection doping with the basic doping type, the maximum dopant concentration of said connection region being higher than the maximum dopant concentration in the basic doping region, wherein said connection region adjoins the basic doping region; an electrode region arranged at a distance from the basic doping region; and a dielectric arranged between the electrode region and the basic doping region; in which either given an n-type basic doping type the connection region is electrically conductively connected to the positive operating potential line and the electrode region is electrically conductively connected to the reference operating potential line, or in which case given a p-type basic doping type the connection region is electrically conductively connected to the reference operating potential line and the electrode region is electrically conductively connected to the positive operating potential line.