Patent ID: 7071982

Claim:
A CMOS image system comprising: a photodiode (PD) array with a plurality of CMOS pixel sensors having an unfired state and a fired state; a control logic device that associates a time with the firing of CMOS pixel sensors that achieve the fired state, the time corresponding to the brightness of the illumination received by the respective CMOS pixel sensor; and a serial readout device that forms a shift register based on a the fired state configuration of a row of the PD pixel array, the shift register loads addresses corresponding to the CMOS pixel sensors based on the fired state configuration of a row and shifts the addresses serially out of the serial readout device, the loaded addresses being based on a combination of an absolute address coding technique and a relative address coding technique, such that the addresses of CMOS pixel sensors in a row having a logic configuration of a “010” state are loaded into the shift register based on absolute address coding where the addresses of fired CMOS pixel sensors are loaded into the shift register and the CMOS pixel sensors in a row having other configurations are loaded into the shift register based on relative address coding where the addresses of CMOS pixel sensors having transient logic states are loaded into the shift register, a distinguish bit being provided in the address to determine if a bit employs one of absolute address coding and relative address coding.