Patent ID: 8386863

Claim:
A scanning-capable latch device comprising: a plurality of main latch circuits that are allocated respectively to a plurality of data signals; and a slave latch circuit that scans the plurality of main latch circuits, wherein each of the main latch circuits includes a data input terminal for corresponding data signals, a data output terminal for corresponding data signals, a scanning input terminal for receiving scanning data, a scanning output terminal for outputting a scanning result, and a clock signal terminal for receiving a clock signal that controls timing of inputting scanning data into the corresponding main latch circuit, the main latch circuits are connected in series and, except a last-stage main latch circuit from among the main latch circuits, a scanning output from each main latch circuit becomes a scanning input for subsequent main latch circuit, while a scanning output from the last-stage main latch circuit becomes a scanning input for the slave latch circuit, and the slave latch circuit includes a scanning input terminal for receiving the scanning input from the last-stage main latch circuit, a clock signal terminal for receiving a clock signal that controls signal input timing for the scanning input terminal, and a scanning result output terminal for outputting latch content of the slave latch circuit as a scanning result.