Patent ID: 7323375

Claim:
A method of forming a FinFET, comprising the steps of: patterning a semiconductor substrate to define a fin-shaped semiconductor active region therein surrounded by a trench; filling at least a portion of the trench with a first electrically insulating region; covering at least an upper portion of the fin-shaped semiconductor active region and the first electrically insulating region with a sacrificial layer; selectively etching back the sacrificial layer to define sacrificial spacers on sidewalls of the fin-shaped semiconductor active region and expose a portion of the first electrically insulating region; forming a second electrically insulating region on the exposed portion of the first electrically insulating region; removing the sacrificial spacers by selectively etching the sacrificial spacers using the second electrically insulating region as an etching mask; and forming an insulated gate electrode on the sidewalls of the fin-shaped semiconductor active region.