Patent ID: 8607246

Claim:
A multiprocessing system comprising: a plurality of slave processor cores configured to execute tasks that are at least partially identified by positions in a matrix; a dependency pattern memory; a master processor core configured to execute a program that includes instructions that define the tasks, the matrix and a task dependency pattern applicable to each of a plurality of the tasks, the master processor core being configured to cause the task dependency pattern to be stored in the dependency pattern memory; and a hardware task scheduler coupled to the master processing core, the slave processor cores and the dependency pattern memory, the hardware task scheduler being configured to assign tasks that are ready for execution to the slave processor cores, the hardware task scheduler being configured to compute positions of the tasks that are ready for execution at run-time from information about further positions for which tasks have been completed and the task dependency pattern applied to those further positions, wherein the hardware task scheduler is configured to receive identifications of positions of tasks that have been completed and to use an inverse of vectors of the task dependency pattern applied to the further positions of tasks that have been completed in response to reception of the identification to generate candidate tasks and to identify the tasks that are ready for execution by screening the candidate tasks based on the task dependency pattern.