Patent ID: 6897482

Claim:
A transistor having a source electrode and a drain electrode formed side by side with a predetermined interval secured in between on a semiconductor layer formed so as to perspectively overlap a gate electrode, characterized by an edge of the drain electrode that faces the source electrode having corners rounded so as to describe a convex curved line, an edge of the source electrode that faces the drain electrode being formed so as to describe a concave curved line corresponding to the edge of the drain electrode describing the convex curved line, an edge of the source electrode that does not face the drain electrode being formed so as to describe a convex curved line along the edge of the source electrode that faces the drain electrode so that the source electrode has a substantially uniform width, the semiconductor layer protruding out of the gate electrode to form a portion that overlaps the source electrode and a portion that overlaps the drain electrode, with the protruding portion that overlaps the source electrode and the protruding portion that overlaps the drain electrode separated from each other by the gate electrode so as to be independent of each other, a portion of the semiconductor layer that overlaps the gate electrode and that faces the edge of the source electrode that does not face the drain electrode being partially cut off along a profile of the source electrode.