Patent ID: 6984580

Claim:
A method of manufacturing a semiconductor wafer comprising: forming a front-end structure over a semiconductor substrate; forming a single damascene back-end structure metal layer over said front-end structure; and forming a dual damascene back-end structure over said single damascene back-end structure metal layer, said dual damascene back-end structure comprising: forming a via etch stop layer over said single damascene back-end structure metal layer; forming a dielectric layer over said via etch stop layer; forming a cap layer over said dielectric layer; forming a non-photoactive layer over said cap layer; forming a photoresist layer over said non-photoactive layer; patterning said photoresist layer; etching via holes; removing said photoresist layer and said non-photoactive layer; forming a dual damascene pattern liner over said cap layer and within said via holes; forming a non-photoactive layer over said dual damascene pattern liner; forming a photoresist layer over said non-photoactive layer patterning said photoresist layer; and etching trench spaces.