Patent ID: 7218559

Claim:
A memory device, comprising: a plurality of memory mounting members each having at least one of storage means for storing data and redundant storage means for storing data to be stored to a defective point of the storage means, the plurality of memory mounting members being stacked in a direction of a thickness thereof, wherein, when a memory space of the defective point of the storage means is not allocated to redundant storage means of a memory mounting member having the defective point, the memory space of the defective points is allocated to redundant storage means of another of the memory mounting members, wherein the plurality of memory mounting members comprises a first memory mounting member having the storage means but not having the redundant storage means, and a second memory mounting member having the redundant storage means but not having the storage means, the second memory mounting member further has means for allocating the memory space of the defective point of the storage means included in the first memory mounting member to redundant storage means of the second memory mounting member, and controlling data write and read to and from the storage means of the first memory mounting member and the redundant storage means of the second memory mounting member, the plurality of memory mounting members each include one of the first memory mounting member and one of the second memory mounting member, wherein the first memory mounting member has chip selecting means for previously making a setting to select the first memory mounting member, and the means for controlling allocates memory sections divided correspondingly to the respective ones of the chip selecting means to the storage means of the first memory mounting member selected by the chip selecting means.