Patent ID: 7948801

Claim:
A nonvolatile memory device comprising: a trimming cell array configured to store trimming data respectively associated with a plurality of operating modes for the nonvolatile memory device; a trimming cell sense amplifier configured to sense the trimming data stored in the trimming cell array; a trimming cell latch configured to store sensed trimming data; a plurality of trimming circuits, each performing a trimming operation related to one operating mode of the plurality of operating modes in response to a trimming control signal derived from trimming data associated with the one operating mode; a single temporary trimming control logic unit configured to receive externally provided control data and configured to control operation of a single summation circuit, wherein the single summation circuit is configured to control the operation of each one of the plurality of trimming circuits by respectively and selectively varying the trimming control signal provided to each one of the plurality of trimming circuits in response to the externally provided control data.