Patent ID: 7544553

Claim:
A method for forming a semiconductor device, the method comprising: forming a gate dielectric over a semiconductor body; forming a silicon gate layer over the gate dielectric; forming a sacrificial layer over the silicon gate layer, wherein forming the sacrificial layer comprises depositing a titanium nitride layer; patterning the silicon gate layer and the sacrificial layer to form a gate structure, the gate structure including a silicon gate of a first thickness and an overlying sacrificial gate of a second thickness that is greater than the first thickness; forming a first sidewall spacer adjacent a sidewall of the gate structure, wherein forming the first sidewall spacer comprises forming a silicon oxide sidewall spacer adjacent a sidewall of the gate structure; forming a second sidewall spacer adjacent the first sidewall spacer, wherein forming the second sidewall spacer comprises forming a silicon nitride sidewall spacer adjacent the silicon oxide sidewall spacer; doping the semiconductor body to form a source region and a drain region that are self-aligned to the first and second sidewall spacers; after forming the source and drain regions, removing the sacrificial layer selectively to expose portions of the first sidewall spacer and the silicon gate, wherein selectively removing the sacrificial layer does not remove any portion of the first sidewall spacer; forming a metal layer over the source region, the drain region and the silicon gate; and reacting the metal layer with the source region, the drain region and the silicon gate to form a silicided source contact, a silicided drain contact and a fully silicided gate.