Patent ID: 7154189

Claim:
A semiconductor device comprising: a semiconductor chip mounted on a first surface of a substrate, the substrate having wiring formed on the first surface, so that a circuit formation surface of the semiconductor chip faces the first surface of the substrate and that an electrode provided on the circuit formation surface is connected with the wiring; a filling lower layer in the space between the semiconductor chip and the first surface of the substrate; a sealing resin layer formed on the first surface of the substrate to cover the semiconductor chip and also be flush with a surface of the semiconductor chip opposite to the circuit formation surface; a first external connection terminal formed on a surface of the sealing resin layer or the semiconductor chip opposite to the circuit formation surface; and a second external connection terminal formed on a second surface of the substrate, wherein the first external connection terminal and the second external connection terminal are located in the same region when viewed from a position above the first surface of the substrate.