Patent ID: 7576006

Claim:
A method of forming a layer of material at least on or within a copper portion of a partially fabricated semiconductor device having an exposed pattern of copper lines in a dielectric, the method comprising: (a) contacting the partially fabricated semiconductor device with a metal-containing or a boron-containing precursor in a first chemical vapor deposition (CVD) process station to deposit a layer of metal or boron at least on or within the copper portion of the partially fabricated semiconductor device; (b) treating the partially fabricated semiconductor device formed after (a) with a pinning reagent selected from the group consisting of NH 3 , N 2 , a gas from the family of methyl-substituted amines, a hydrocarbon, and H 2 , in a plasma, wherein the treating modifies the layer of metal or boron deposited in (a); (c) depositing a layer of dielectric material onto an exposed surface of the partially fabricated semiconductor device obtained after (b), in a second chemical vapor deposition process station, wherein the first chemical vapor deposition process station and the second chemical vapor deposition process stations reside within one CVD process tool.