Patent ID: 7292548

Claim:
An apparatus for performing a cell search on signals received from a plurality of Node Bs, wherein one frame of said signal includes a predetermined number of slots having a predetermined chip length, and each of the Node Bs transmits a primary synchronization channel at a beginning part of each slot by a predetermined chip length, a secondary synchronization channel overlapping with the primary synchronization channel while maintaining orthogonality with the primary synchronization channel, and a common pilot channel scrambled with a unique scrambling code, a period of the scrambling code being identical to a length of one frame, the apparatus comprising: a reference counter, adapted to manage timing for the Node Bs, said timing being obtained by performing a first-step cell search on primary synchronization channel signals transmitted from the Node Bs; a frame boundary index storage, adapted to store frame boundary indexes representing frame boundaries for the Node Bs, said frame boundaries being obtained by performing second-step cell search on secondary synchronization channel signals received from the Node Bs; and a multisearch controller, adapted to compare, upon receiving a third-step cell search start command, frame boundary timing of each of the frame boundary indexes to a current timing from the reference counter; perform a third-step cell search on hypotheses corresponding to the frame boundary indexes at a next slot boundary following the current timing by using scrambling codes in a Node B code group obtained by the second-step cell search; and provide a third-step cell search complete information after completing the third-step cell search on hypotheses corresponding to the frame boundary indexes.