Patent ID: 8836314

Claim:
A reference current source circuit comprising a reference voltage generating module, a voltage buffer connected to said reference voltage generating module, an equivalent resistor connected to said voltage buffer, a filter capacitor connected to said voltage buffer, a current mirror module connected to said voltage buffer and a reference current outputting terminal connected to said current mirror module, wherein said voltage buffer comprises an operational amplifier and a first FET connected to said operational amplifier; said current mirror module comprises a second FET and a third FET connected to said second FET; said equivalent resistor comprises an oscillator, a fourth FET connected to said oscillator, a fifth FET connected to said oscillator and a capacitor connected to said fourth FET and said fifth FET; a charging and discharging capacitor is provided in said oscillator; said oscillator is for generating a clock signal whose frequency is only related to said charging and discharging capacitor to control charging and discharging of said capacitor of said equivalent resistance; said reference current outputting terminal is for outputting a reference current related to a capacitance ratio of said capacitor to said charging and discharging capacitor.