Patent ID: 7065481

Claim:
A method for debugging an electronic system having instrumentation circuitry included therein, the electronic system being coupled to at least one logic analyzer, wherein the electronic system is described with a HDL, said method comprising: (a) activating certain design visibility, design patching or design control aspects of the instrumentation circuitry available for examining or modifying the electronic system via the instrumentation circuitry; (b) determining configuration information based on the certain design visibility, design patching or design control aspects that are activated; (c) configuring the instrumentation circuitry in accordance with the configuration information; (d) configuring the instrumentation circuitry to interoperate with the at least one logic analyzer; (e) receiving debug data from the configured instrumentation circuitry operating within the electronic system product; (f) translating the debug data into HDL-related debug information; and (g) relating the HDL-related debug information to the HDL description.