Patent ID: 8138615

Claim:
A semiconductor integrated circuit comprising: an integrated power transistor formed on a semiconductor substrate; an interlayer insulation film formed on the power transistor; at least one or more of first metal patterns which include a first metal layer formed immediately above the power transistor in the interlayer insulation film and function as a first electrode of the power transistor; at least one or more of second metal patterns which include the first metal layer and function as a second electrode of the power transistor; a plurality of first busses which include a second metal layer formed immediately above the first metal layer in the interlayer insulation film and are electrically connected to a corresponding first metal pattern among at least one or more of first metal patterns, each of said plurality of first busses are separated from each other by another interlayer insulation film; a single second bus which includes the second metal layer and is electrically connected to the at least one or more of second metal patterns; and contact pads formed on each of said plurality of first busses and on the single second bus.