Patent ID: 8163381

Claim:
A multi-layer chip carrier comprising a dielectric substrate having a surface, a first electrically conductive layer adheringly disposed upon at least a portion of the surface of the dielectric substrate, and an asymmetric film having a first film surface and a second film surface, said first film surface and said second film surface parallel to one another and separated by an interior, the film comprising a thermoset resin composition with one or more fillers dispersed therewithin, the one or more fillers having a total concentration of 15% to 75% by weight based on the total combined weight of the thermoset resin composition and fillers when cured, excluding solvents and volatiles, wherein in the interior the concentration of the one or more fillers exhibits a continuous gradient, each of the fillers having an average particle size in the range of 0.01 to 5 μm; the first surface being in conforming contact with the first electrically conductive layer, and the second surface being in adhering contact with a second electrically conductive layer disposed thereon.