Patent ID: 7509612

Claim:
A method of designing a standard cell type semiconductor chip, comprising: preparing a plurality of types of first standard cells and a plurality of types of second standard cells having the same function as the first standard cells and having a layout which is changed to improve yield; generating a priority order list to be used upon replacing said plurality of types of first standard cells; performing automatic placement by using said plurality of types of first standard cells; and selecting a certain type of a first standard cell from said plurality of types of first standard cells according to a priority order in the generated list, and replacing the selected type of a first standard cell with a corresponding type of a second standard cell, wherein the priority order list is generated that said plurality of types of first standard cells are replaced with corresponding types of second standard cells in descending order of a value obtained by (an average number of defects in a standard cell reduced by a single replacement)/(a standard cell area increased by a single replacement).