Patent ID: 6858510

Claim:
A method of forming a bi-directional transient voltage suppression device comprising: providing a p-type semiconductor substrate; epitaxially depositing a lower semiconductor layer of p-type conductivity; epitaxially depositing a middle semiconductor layer of n-type conductivity over said lower layer, said lower layer and said middle layer forming a lower p−n junction; epitaxially depositing an upper semiconductor layer of p-type conductivity over said middle layer, said middle layer and said upper layer forming an upper p−n junction; heating said substrate, said lower epitaxial layer, said middle epitaxial layer and said upper epitaxial layer; etching a mesa trench, said mesa trench extending through said upper layer, through said middle layer and through at least a portion of said lower layer, and said mesa trench defining an active area for said device; and thermally growing an oxide layer on at least those portions of the walls of the mesa trench that correspond to said upper and lower junctions, such that the distance between said upper and lower junctions is increased at said walls, wherein an integral of the net doping concentration of the middle layer taken over the distance between the upper and lower junctions is such that breakdown, when it occurs, is punch through breakdown, rather than avalanche breakdown.