Patent ID: 8222679

Claim:
A semiconductor device comprising an integrated circuit on a semiconductor substrate comprising a Hall effect sensor (HALL) in a first active region and a lateral high-voltage MOS transistor (NDMOS, PDEMOS) in a second active region, wherein the Hall effect sensor comprises a first doped region of a first conductivity type, in the following referred to as drift zone, in the semiconductor substrate; first and second doped contact regions of the first conductivity type, connected with the drift zone for generating a majority charge carrier current in the drift zone upon application of an operating voltage between the doped contact regions; a second doped region of a second conductivity type inverse to the first conductivity type, which second doped region is positioned above the drift zone in a depth direction (z) pointing to an interior of the substrate, wherein the second doped region has a dopant concentration of 10 15 to 5×10 17 cm −3 ; a third doped region of the second conductivity type positioned below the drift zone in the depth direction (z) with a first distance (a) from the second doped region and being overlapped with the second doped region in the first lateral direction; wherein the first distance (a) and the lateral extensions of the second and third doped regions are selected such that upon application of the operating voltage across the doped contact regions the majority charge carrier current between the first and second doped contact regions flows in a first lateral direction (x) through a current flow plane of the drift zone positioned between the second and the third doped regions in the depth direction (z); and sensor contacts having a second distance from each other in a second lateral direction (y) perpendicular to the first lateral direction (x) and connected with the drift zone and positioned and configured such that upon application of the operating voltage across the doped control contact regions a Hall voltage can be tapped at the sensor contact, which is generated in the presence of a magnetic field component oriented perpendicularly to the current flow plane; and wherein the lateral high-voltage MOS transistor in addition to a doped source region and a doped drain region comprises a MOS transistor drift zone of the first conductivity type, which has the same dopant profile in the semiconductor substrate as the first doped region of the Hall effect sensor; an upper RESURF zone of the second conductivity type adjacent to the MOS transistor drift zone in the depth direction (z) and having the same dopant profile in the depth direction (z) as the second doped region of the Hall effect sensor; and a lower RESURF zone of the second conductivity type adjacent to the MOS transistor drift zone wherein the lower RESURF zone has the first distance (a) from the upper RESURF zone in the depth direction (z) and has the same dopant profile in the depth direction (z) as the third doped region of the Hall effect sensor.