Patent ID: 7436235

Claim:
A digital clock modulator for providing a smoothly modulated clock period to reduce emitted-electro-magnetic radiation (EMR) comprising: a plurality of delay elements coupled in series, and receiving as an input an unmodulated clock signal; at least one multiplexer receiving inputs from unequally spaced taps between said plurality of delay elements; the taps being spaced further apart from each other in a middle of said plurality of delay elements, and being spaced closer together at respective ends of said plurality of delay elements; a control block providing selection inputs to said at least one multiplexer, and receiving the unmodulated clock signal from said plurality of delay elements; and said plurality of delay elements including a last delay element providing the unmodulated clock signal to said control block, said last delay element having a predetermined delay for ensuring that said plurality of delay elements and related signal paths are in a same stable state before control to said at least one multiplexer changes.