Patent ID: 6974746

Claim:
A manufacturing method of a nonvolatile semiconductor memory device, comprising: making element isolation/insulation films that partition element-forming regions in a semiconductor substrate; stacking a first gate electrode material film and a second gate insulating film on said semiconductor substrate via a first gate insulating film; etching said second gate insulating film and the underlying first gate electrode material film to make slits that separate said first gate electrode material film above said element isolation/insulation films; forming an insulating film on side surfaces of said first gate electrode material film, and thereafter stacking a second gate electrode material film; sequentially etching said second gate electrode material film, said second gate insulating film, and said first gate electrode material film to pattern said first gate electrode material film into floating gates and said second gate electrode material film into control gates; and making source and drain diffusion layers in self alignment with said control gates; wherein said first gate electrode material film is a multi-layered film including a first conductive film stacked before formation of said element isolation/insulation films and a second conductive film stacked after formation of said element isolation/insulation films.