Patent ID: 8691653

Claim:
A manufacturing process of a semiconductor structure, the process comprising: providing a substrate having a first conductive type; forming a first well having a second conductive type in the substrate; forming a doped region having the second conductive type in the first well, the doped region has a first net dopant concentration; forming a second well having the second conductive type in the doped region, the second well is connected to a side of the doped region, wherein the second well has a second net dopant concentration smaller than the first net dopant concentration; and forming a field oxide on top of the second well, wherein the field oxide has an edge aligned with the side of the doped region without overlapping to each other in a plan view; wherein the step of forming the second well having the second conductive type comprises implanting dopants having the first conductive type into a part of the doped region, so that the second net dopant concentration is smaller than the first net dopant concentration.