Patent ID: 8419884

Claim:
A method for manufacturing a multilayer wiring substrate comprising: a first step of preparing a first resin layer in a cured state including a conductive pattern and in which a first via hole including a bottom made of the conductive pattern is formed; a second step of preparing a second resin layer in an uncured state in which a second via hole is formed at a position corresponding to the first via hole to penetrate the second resin layer; a third step of laminating the first resin layer and the second resin layer so that the first via hole and the second via hole communicate with each other; a fourth step of simultaneously filling a conductive paste in the first via hole and the second via hole; a fifth step of performing pressure bonding of a metal foil to the second resin layer in which the second via hole is filled with the conductive paste so that the metal foil is brought into contact with the conductive paste; a sixth step of curing the second resin layer and the conductive paste after the fifth step; and a seventh step of patterning the metal foil to form a wiring pattern electrically connected to the conductive paste which is cured in the second via hole.