Patent ID: 8645811

Claim:
A method of selectively enabling error checking in an information handling system (IHS) that includes a memory controller and a system memory, comprising: receiving, at the memory controller, data segmentation information that is based upon the use of data in the IHS and that indicates that data that is associated with a first memory portion in the system memory that supports error checking should be subject to error checking during transmission between the memory controller and the first memory portion of the system memory, while data associated with a second memory portion in the system memory that supports error checking should be free of error checking during transmission between the memory controller and the second memory portion of the system memory; receiving, at the memory controller, a memory access request directed to one of the first memory portion and the second memory portion; transmitting data between the memory controller and the system memory in response to the memory access request; and selectively performing an error checking technique on the transmitted data based on the data segmentation information, wherein the selectively performing includes performing the error checking technique if the memory access request is directed to the first memory portion, and wherein the selectively performing includes transmitting the data without performing the error checking technique if the memory access request is directed to the second memory portion.