Patent ID: 8296346

Claim:
A channel-select decimation filter for operating in multiple bandwidth modes, the channel-select decimation filter comprises: a first low pass filter stage including a plurality of cascaded integrators, a select number of the plurality of cascaded integrators selected to form a first programmable delay module, the first low pass filter stage operable to filter input signals to produce first low pass filtered signals; a second low pass filter stage including a plurality of cascaded differentiators, a second select number of the plurality of cascaded integrators selected to form a second programmable delay module, the second low pass filter stage operable to filter first stage signal derived from the first low pass filtered signals to produce channel-selected signals; and a down-sampling module for decimating the channel-selected signals to produce down-sampled channel-selected signals; wherein the first programmable delay module and the second programmable delay module are programmed to implement a select bandwidth mode of the multiple bandwidth modes.