Patent ID: 7791896

Claim:
A circuit board comprising: power reference layers; and a capacitor provided between the power reference layers, wherein the capacitor has at least a first dimension and a second dimension that is larger than the first dimension, wherein the capacitor is positioned such that the first dimension defines a distance between the power reference layers, and wherein the capacitor comprises: plural conductive plates sandwiching plural dielectric layers; and a first conductive electrode electrically connected to a first subset of the plural conductive plates and facing a first of the power reference layers; and a second conductive electrode electrically connected to a second subset of the plural conductive plates and facing a second of the power reference layers, wherein the first conductive electrode and second conductive electrode extend in a direction that is generally parallel to the power reference layers, and wherein the conductive plates are generally parallel to the first and second conductive electrodes, wherein the first conductive electrode is attached to one of the plural conductive plates, and wherein the second conductive electrode is attached to another of the plural conductive plates, wherein a surface of the first conductive electrode is contacted to one of the power reference layers, and a surface of the second conductive electrode is contacted to another one of the power reference layers.