Patent ID: 7503039

Claim:
A compiler apparatus that optimizes execution of a target program to be compiled using a multi-core processor in which a plurality of processor cores are provided, of which each can perform arithmetic processing independently of and in parallel with other processor cores on a microprocessor chip, the compiler apparatus comprising: a memory that stores the target program; a recording component that records the number of execution cores that is the number of processor cores for executing the target program among the processor cores included in the multi-core processor; a path detecting component that accesses the memory according to an operation of the processor in the compiler apparatus to detect, in the target program, dominant paths that are execution paths showing a flow of process by a first task and a second task, which maximizes an amount of a task switching time between a case where the second task is continuously executed by the same processor core in comparison with a case where the second task is executed by the processor core different from that of the first task, among execution paths showing a flow of process by a plurality of tasks of which each is an instruction group corresponding to a part of a process of the target program, according to the operation of the processor in the complier apparatus, the second task being selected from a plurality of second tasks dependent on a processing result of the first task; a cluster generating component that generates, according to the operation of the processor in the compiler apparatus, at least one task to be in parallel or in succession executed by the multi-core processor by selecting the dominant paths not more than the number of execution cores as a cluster on the basis of the number of execution cores recorded on the recording component and stores the result in the memory; a time computing component that accesses the memory according to the operation of the processor in the compiler apparatus to compute runtime for which the cluster is executed by the processor cores corresponding to the number of cores with respect to one or each of a plurality of cores necessary to execute the cluster, the number of cores being less than or equal to the number of execution cores, stores every cluster in the memory according to the operation of the processor; and stores the result in the memory; and a core number selecting component that accesses the memory according to the operation of the processor in the compiler apparatus to select the number of processor cores to be assigned for the purpose of the execution of each cluster in order to reduce the runtime of the target program on the basis of the runtime stored in the memory according to the operation of the processor in the compiler apparatus and stores the result in the memory.