Patent ID: 8203173

Claim:
A semiconductor integrated circuit, comprising: a substrate; a basic logic cell placed on said substrate and configured to function as a part of a logic circuit; and a dummy cell placed on said substrate and configured to function other than as a part of a logic circuit, wherein said basic logic cell includes a diffusion layer formed in said substrate, and a distance from said diffusion layer to a boundary between said basic logic cell and another cell, similar to said basic logic cell that includes the diffusion layer, located adjacent to said basic logic cell is equal to a first distance, wherein said dummy cell includes a dummy diffusion layer that comprises a diffusion layer formed in said substrate, and a distance from said dummy diffusion layer to a boundary between said dummy cell and said another cell, which is located adjacent to said dummy cell, is equal to said first distance, wherein said basic logic cell further includes a gate electrode, and a distance from said gate electrode to the boundary between said basic logic cell and another cell adjacent to said basic logic cell is equal to a second distance, and wherein said dummy cell further includes a dummy gate electrode, and a distance from said dummy gate electrode to the boundary between said dummy cell and said another cell, which is located adjacent to said dummy cell, is equal to said second distance.