Patent ID: 7516341

Claim:
A power-saving circuitry of CPU, wherein an operating voltage of the CPU is adjusted based on a voltage identification code, and one bit code of the voltage identification code is outputted via an identification code switching circuitry, and the power-saving circuitry comprises: a first switching transistor having a first source/drain electrode, a second source/drain electrode, and a gate electrode, wherein the first source/drain electrode of the first switching transistor is grounded, the second source/drain electrode of the first switching transistor is electrically coupled to a DC power, and the gate electrode of the first switching transistor is electrically coupled to the CPU, and when the CPU is under a normal operation mode, the first switching transistor is turned on, and when the CPU is under a power-saving mode, the first switching transistor is turned off; a diode having an anode electrically coupled to the second source/drain electrode of the switching transistor; and a second switching transistor having a first source/drain electrode, a second source/drain electrode, and a gate electrode, wherein the first source/drain electrode of the second switching transistor is electrically coupled to the cathode of the diode, the second source/drain electrode of the second switching transistor is electrically coupled to an output terminal of the identification code switching circuitry for determining a state of the voltage identification code, and the gate electrode of the second switching transistor is electrically coupled to a control terminal of the identification code switching circuitry for receiving a selection signal to turn on either the second switching transistor or the identification code switching circuitry, wherein the identification code switching circuitry comprises: a third switching transistor having a first source/drain electrode, a second source/drain electrode, and a gate electrode, wherein the gate electrode of the third switching transistor is electrically coupled to the control terminal of the identification code switching circuitry for receiving the selection signal, the first source/drain electrode of the third switching transistor receives one bit code of the voltage identification code, and the second source/drain electrode of the third switching transistor is electrically coupled to the output terminal of the identification code switching circuitry; and a resistor electrically coupled between the first source/drain electrode and the second source/drain electrode of the third switching transistor.