Patent ID: 7609125

Claim:
An integrated circuit package configured to reduce cross-talk and maintain constant impedance in first and second differential signal conductor pairs incorporated therein, comprising: (a) a substrate; (b) a first ground plane disposed below the substrate; (c) a second ground plane disposed above the substrate; (d) respective pairs of first and second differential signal conductors disposed within the substrate and substantially in a first plane; and (e) a third pair of victim conductors disposed within the substrate and substantially in the first plane, the third pair of victim conductors further being disposed between the first and second pairs of differential signal conductors; (f) at least first and second ground traces disposed in the substrate and substantially in the first plane, the first and second ground traces being disposed, respectively, between the first pair of differential signal conductors and the third pair of victim conductors, and between the second pair of differential signal conductors and the third pair of victim conductors, wherein the first and second ground traces are electrically connected to the first and second ground planes, and further wherein the widths of the first and second ground traces are varied along their respective routes within the substrate to maintain constant impedance in the first and second pairs of differential signal conductors.