Patent ID: 7262100

Claim:
A method of manufacturing a semiconductor device having a MOS gate side surface structure, the method including the steps of: forming a masking insulator film on the surface of a semiconductor substrate of one conductivity type; forming a trench in the semiconductor substrate using the masking insulator film as a mask; forming a substrate insulator film on the surface of the semiconductor substrate, including the trench; depositing a polycrystalline semiconductor layer to a thickness more than the depth of the trench; smoothing the surface of the polycrystalline semiconductor layer by grinding the surface of the polycrystalline semiconductor layer until the surface of one of the masking insulator film or the substrate insulator film becomes exposed; forming a gate insulator film on the surface of the semiconductor substrate; removing all insulator films layered at the position of the masking insulator film to expose the surface of the semiconductor substrate; depositing a semiconductor layer of the one conductivity type on the exposed semiconductor substrate and the gate insulator film so that the semiconductor layer contacts the surface of the exposed semiconductor substrate; forming a base region of the other conductivity type and an emitter region of the one conductivity type in the deposited semiconductor layer, the base region being formed adjacent to a region of the deposited semiconductor layer in contact with the semiconductor substrate, the region being provided as a buffer region of the one conductivity type, and the emitter region being formed adjacent to the base region on the side opposite to the buffer region; and forming an emitter electrode covering the buffer region with an interlayer insulator film between and in contact with both the base region of the other conductivity type and the emitter region.