Patent ID: 7669033

Claim:
A system for pretranslating input/output buffers addresses in environments with multiple page sizes, the system comprising: means for determining a pretranslation page size for an input/output buffer under an operating system that supports more than one memory page size, wherein: the buffer further comprises a quantity of memory organized in pages having virtual page frame numbers and having at least one memory page size; and means for determining a pretranslation page size further comprises means for selecting as the pretranslation page size a smallest page size from among the page sizes of the cages of memory in the buffer; means for identifying pretranslation page frame numbers for the buffer in dependence upon the pretranslation page size, including means for identifying pretranslation page frame numbers for the buffer that arc located inside a memory page; means for pretranslating the pretranslation page frame numbers to physical page numbers; means for storing the physical page numbers in association with the pretranslation page size; and means for accessing the buffer, including means for translating a virtual memory address in the buffer to a physical memory address in dependence upon the physical page numbers stored in association with the pretranslation page size, and means for accessing the physical memory of the buffer at the physical memory address.