Patent ID: 7676664

Claim:
A multiprocessing system, comprising: a multithreading microprocessor, comprising: a first and a second plurality of thread contexts (TCs), each having a program counter and a general purpose register set; a first shared privileged resource, shared by said first plurality of TCs rather than being replicated for each of said first plurality of TCs, and privileged to be managed only by operating system-privileged threads rather than by user-privileged threads; and a second shared privileged resource, shared by said second plurality of TCs rather than being replicated for each of said second plurality of TCs, and privileged to be managed only by said operating system-privileged threads rather than by said user-privileged threads; and a multiprocessor operating system (OS), said OS comprising a data structure having an entry for each TC of said first and said second plurality of TCs, each said entry configured to store a first item of information describing capabilities of at least one hardware resource shared by said first and said second plurality of TCs and a second item of information associated with a corresponding one of said first and said second plurality of TCs such that a value of said first item of said data structure corresponding to one of said first and said second plurality of TCs is the same as a value of said first item of said data structure corresponding to each other of said first and said second plurality of TCs while a value of said second item of said data structure corresponding to said one of said first and said second plurality of TCs is different from a value of said second item of said data structure corresponding to said each other of said first and said second plurality of TCs, said OS configured to manage said first and said second shared privileged resources, and to schedule execution of both said operating system-privileged threads and said user-privileged threads on said first and said second plurality of TCs.