Patent ID: 8472551

Claim:
An apparatus for data encoding, comprising: (a) means for transmitting a first signal in a first polarity and a first phase between two of a first, second, and third conductors, leaving a remaining conductor un-driven; (b) means for transmitting a second signal in a second polarity and a second phase between two of said first, second, and third conductors, leaving the remaining conductor un-driven, wherein the first polarity is different from the second polarity or the first phase is different than the second phase or the first polarity and the first phase are different from the second polarity and the second phase; wherein the wherein step (a) defines a first data encoding state; wherein step (b) defines a second data encoding state, wherein the first data encoding state is different from the second encoding state; wherein an occurrence of steps (a) and (b) defines a state transition in a data encoding state diagram, said state transition representing a logic data encoding and allows up to 2.3219 bits of data, comprising log 2 (5)=ln(5)/ln(2), encoded in a single state transition; (c) means for collecting one or more state transitions between the encoding states; and (d) means for mapping a group of data bits based on the collected state transitions.