Patent ID: 7795135

Claim:
A method for manufacturing a layer arrangement, comprising: forming an electrically conductive layer on a substrate, the electrically conductive layer comprising an upper end section; patterning the electrically conductive layer to form a patterned electrically conductive layer; forming a sacrificial layer on a part of the patterned electrically conductive layer, the sacrificial layer having a first thickness; forming an electrically insulating layer on the electrically conductive layer and on the sacrificial layer, the electrically insulating layer having a second thickness and a thickness variation range; patterning the electrically insulating layer to expose a surface area of the sacrificial layer; removing an exposed area of the sacrificial layer to expose the patterned electrically conductive layer; and covering the patterned electrically conductive layer with a pattern of electrically conductive material; wherein the first thickness is at least as large as the thickness variation range of the electrically insulating layer.