Patent ID: 8212359

Claim:
A semiconductor integrated circuit device comprising: a semiconductor substrate including a semiconductor substrate main body and a plurality of wirings laminated sequentially on the semiconductor substrate main body with insulating films therebetween; a passivation film disposed on a surface of the semiconductor substrate main body on which the wirings are disposed, the passivation film including a surface having an opening at which at least a portion of an uppermost of the wirings is exposed; an electrode arranged to cover the uppermost of the wirings exposed at the opening of the passivation film and a periphery of the opening of the passivation film and which includes an extension portion disposed on a portion of the periphery of the opening in the surface of the passivation film; and a dielectric layer arranged to cover at least the electrode; wherein an adhesive resin is filled in a concave portion on a side of the surface of the passivation film, and surfaces of the dielectric layer and the adhesive resin are included in the same plane.