Patent ID: 8735240

Claim:
A method, comprising: forming a gate dielectric layer on a semiconductor region of a semiconductor device, said gate dielectric layer comprising a high-k dielectric material; forming a diffusion layer above said gate dielectric layer, said diffusion layer comprising a metal species; performing a first heat treatment so as to diffuse a portion of said metal species into said gate dielectric layer; removing said diffusion layer so as to expose said gate dielectric layer; performing a second heat treatment on said exposed gate dielectric layer; forming at least one metal-containing electrode material layer above said gate dielectric layer; performing a third heat treatment on said at least one metal-containing electrode material layer; after performing said third heat treatment, forming at least one layer of a further electrode material above said at least one metal-containing electrode material layer; and forming a gate electrode structure of a transistor on the basis of said at last one layer of said further electrode material, said at least one metal-containing electrode material layer, and said gate dielectric layer.