Patent ID: RE42387

Claim:
A method of compensating the non-linearity of a sigma-delta analog-to-digital converter with a quantizer having N quantizing levels, and including a digital-to-analog converter in a feedback loop, comprising: a normal operation phase in which a plurality of digital values corresponding to a plurality of quantizing levels are modified by correction values C i , where i is a positive integer from 1 to N−2; and a calibration phase in which the correction values C i are calculated from values of the output of the quantizer of the sigma-delta analog-to-digital converter processed digitally with the digital-to-analog converter retained in the feedback loop of the sigma-delta analog-to-digital converter and after converting the multibit sigma-delta analog-to-digital converter into a sigma-delta analog-to-digital converter with three quantizing levels; wherein during the calibration phase the multibit sigma-delta analog-to-digital converter is converted into a sigma-delta analog-to-digital converter with three quantizing levels X m , X M , and X i , where i is from 1 to N−2; wherein, during a period P 1 i of the calibration phase, a predetermined value is delivered to the input of the sigma-delta analog-to-digital converter and the values from the output of the quantizer of the sigma-delta analog-to-digital converter are processed digitally; wherein the calibration phase is executed N−2 times, retaining the levels X m and X M , and taking successively for the level X i , the N−2 levels other than the levels X m and X M ; and wherein the correction values C i of the N−2 levels other than X m and X M are calculated using a sum of the processed values, the N−2 correction values C i being adapted to modify the N−2 levels other than X m and X M during the normal operation phase.