Patent ID: 8852969

Claim:
A wafer-level method of fabricating an opto-electronic component package, the method comprising: providing a semiconductor wafer having a first surface on a first side and a second surface on a second side opposite the first side; etching vias in the first surface of the semiconductor wafer, the vias extending partially through the semiconductor wafer; providing metallization on the first surface of the semiconductor wafer and surfaces in the vias and structuring the metallization to define a thermal pad for heat transfer away from the opto-electronic component and to define anode and cathode contact pads on the first surface electrically connected to metallization in the vias; attaching a carrier wafer on the first side of the semiconductor wafer; thinning the semiconductor wafer from the second side to expose the metallization in the vias; on the second surface of the semiconductor wafer, providing metallization and structuring the metallization to define a die attach pad and to define additional anode and cathode pads for the opto-electronic component, wherein the additional anode and cathode pads are electrically connected to metallization in the vias; mounting the opto-electronic component on the die attach pad; and forming a protective cover over the opto-electronic component, wherein the protective cover is transparent to a wavelength of light emitted by or received by the opto-electronic component.