Patent ID: 8778759

Claim:
A method of forming a semiconductor structure comprising: forming, on a semiconductor substrate, a stack of layers containing at least, from bottom to top, a first interfacial dielectric layer, a high dielectric constant dielectric layer including a dielectric metal oxide having a dielectric constant greater than 7.9, a second interfacial dielectric layer, a semiconductor material layer, a scavenging-metal-containing layer including at least one scavenging metal, wherein said at least one scavenging metal in said scavenging-metal containing layer is in an elemental form or in a metallic non-metal-element-containing compound including said at least one scavenging metal, at least one elemental metal selected from one of Ti and Ta, and at least one non-metal element; patterning said stack of layers to form a gate stack; and annealing said gate stack, wherein at least one of said first interfacial dielectric layer and said second interfacial dielectric layer is thinned by outdiffusion of oxygen through said semiconductor material layer into said scavenging-metal-containing layer.