Patent ID: 8331069

Claim:
A structure for protecting an integrated circuit against electrostatic discharges, comprising an assembly of identical cells, each of which is connected to a terminal forming a pad of the circuit, a first supply rail or a second supply rail, the cells forming between any two of said terminals an assembly of four alternated layers of different conductivity types wherein: the cells are arranged in a matrix; the cells of consecutive parallel diagonals are interconnected; the consecutive diagonals of interconnected cells are connected to terminals forming, in the following order: the first supply rail ( 5 , VDD), a first pad ( 3 ), and the second supply rail ( 7 , VSS); and the cells are formed in a layer of a first conductivity type of a first doping level, each cell comprising a well of a second conductivity type of a second doping level, containing on its surface side neighboring regions of doping levels greater than the first and second levels and of opposite conductivity types, in contact with a metallization connected to said terminal, wherein: contact regions of the first conductivity type and of a doping level greater than the first level are arranged on the upper surface side of said layer and are capable of receiving a turn-on signal; and the contact regions are connected to the output of a turn-on circuit capable of providing a control signal in case of an overvoltage between any two of said terminals, wherein the turn-on circuit comprises: an overvoltage detector capable of providing a high output signal when the integrated circuit is supplied; a first inverter having its input (A) connected to the output of the detector; a second inverter having its input (B) connected to the output of the first inverter, the output (C) of the second inverter forming the output of the turn-on circuit; at least one first diode forward-connected between the output (C) of the second inverter and the first supply rail; and a thyristor forward-connected between the output (C) of the second inverter and a pad of the circuit, the anode and cathode gates of the thyristor being respectively connected to the output (C) of the second inverter and to the second supply rail.