Patent ID: 8072239

Claim:
An electronic circuit, comprising: a configurable circuit element configurable for a plurality of data operations, each data operation corresponding to a context of a plurality of contexts; a plurality of data inputs; a plurality of data outputs; a memory to store, for each context of the plurality of contexts, a plurality of configuration bits, a run status bit, a plurality of context chaining bits designating a lead context and a next context, and a plurality of bits designating at least one data input and at least one data output; an element controller coupled to the configurable circuit element and to the memory, the element controller to allow execution of a data operation when the context run status is enabled, the context-designated data input has input data and the context-designated data output has a status to accept output data, the element controller further to sequence execution of a plurality of data operations in an order determined by the plurality of context chaining bits; and a second circuit coupled to the memory, the second circuit to enable the run status for each context of the plurality of contexts.