Patent ID: 7408961

Claim:
A high speed Internet Protocol communications system for serially transporting digital data between communications hardware comprising: a chassis for receiving plural boards, the chassis comprising a backplane which includes a control data bus and a serial data bus communicatively linking the plural boards together; the plural boards comprising an input board for receiving an incoming parallel data stream and transmitting a differential serial data stream to the serial data bus, the input board including a serializer for converting the received parallel data stream into the differential serial data stream and a transmitter for transmitting the differential serial data stream to the serial data bus; the differential serial data stream comprising encoded video data packets, each of the data packets comprising a header having a target media accelerated processor identifier; and the plural boards further comprising at least one other board with a serial data receiver and a deserializer, the serial data receiver receiving the differential serial data stream from the serial data bus, and the deserializer converting the received differential serial data stream into an output data stream in accordance with control signals received via the control data bus.