Patent ID: 7573085

Claim:
A semiconductor structure, comprising: a semiconductor substrate including a top substrate surface, wherein a reference direction is perpendicular to the top substrate surface; and a hard mask layer being on the top substrate surface and including a hard mask layer opening, wherein a portion of the top substrate surface is exposed to a surrounding ambient through the hard mask layer opening, wherein the hard mask layer comprises (i) a pad oxide layer on the top substrate surface, (ii) a nitride layer on the pad oxide layer, (iii) a BSG (borosilicate glass) layer on top of the nitride layer, and (iv) and ARC (anti-reflective coating) layer on top of the BSG layer, such that the nitride layer is sandwiched between the BSG layer and the pad oxide layer, and such that the BSG layer is sandwiched between the ARC layer and the nitride layer, wherein a pad oxide side wall surface of the pad oxide layer is exposed to the surrounding ambient through the hard mask layer opening, wherein a nitride side wall surface of the nitride layer is exposed to the surrounding ambient through the hard mask layer opening, wherein a BSG side wall surface of the BSG layer is exposed to the surrounding ambient through the hard mask layer opening, wherein an ARC side wall surface of the ARC layer is exposed to the surrounding ambient through the hard mask layer opening, wherein the BSG side wall surface and the ARC side wall surface constitute a top side wall surface, and wherein there exist two separate points A and B on nitride side wall surface and two separate points C and D on the top side wall surface such that (i) the four points A, B, C, and D are coplanar, (ii) a plane going through the four points A, B, C, and D is parallel to the reference direction, (iii) both the line segments AB and CD are perpendicular to the reference direction, and (iv) the line segments AB is longer than the line segments CD.