Patent ID: 7421630

Claim:
A content addressable memory device, comprising: two or more sets of content addressable memory cells, each set of memory cells being associated with and connected to a match line that provides a match signal when items of data stored in the set of memory cells match a data item stored in a comparand register of the device; a first circuit, the first circuit for connecting the match line of a set of memory cells being tested to a priority encoder and for disconnecting match lines of other sets of memory cells from the priority encoder; a second circuit, the second circuit for storing items of data matching the data item stored in the comparand register in the set of memory cells being tested; and a third circuit, the third circuit for receiving output signals from the connected match line and determining whether the output signals indicate that the set of memory cells being tested has items of stored data that match the data item stored in a comparand register; wherein the test on the memory cells comprises comparing results of a search of the memory cells with expected results.