Patent ID: 7757199

Claim:
A tangible computer readable medium encoded with a computer program, the program when executed by a computer causes the computer to execute: expressing, with a logic description library that deals logic signals, an input and an output response of a differential input circuit, which receives analog differential input signals and outputs a high level output signal when a first input signal is higher than a second input signal and outputs a low level output signal when the first input signal is lower than the second input signal, so that the differential input signal is simulated by a logic simulator; issuing a low level as the output expectation value when both of the received analog differential input signals are at a low level; issuing a low level as the output expectation value when the first input signal is at the low level and the second input signal is at a high level; issuing a high level as the output expectation value when the first input signal is at the high level and the second input signal is at the low level; issuing a high level as the output expectation value when the first input signal is at the high level and the second input signal is at the high level; issuing an undefined state as the output expectation value when the first input signal is in an undefined state and the second input signal is at the low level; issuing an undefined state as the output expectation value when the first input signal is in the undefined state and the second input signal is at the high level; issuing an undefined state as the output expectation value when the first input signal is at the low level and the second input signal is in the undefined state; issuing an undefined state as the output expectation value when the first input signal is at the high level and the second input signal is in the undefined state; issuing an undefined state as the output expectation value when the first input signal is in the undefined state and the second input signal is in the undefined state; and simulating the logic description library with the logic simulator.