Patent ID: RE40007

Claim:
A method to pattern a polysilicon layer in the manufacture of an integrated circuit device comprising: providing a polysilicon layer overlying a semiconductor substrate; providing a hard mask layer overlying said polysilicon layer; providing a resist layer overlying said hard mask layer; patterning said resist layer to form a resist mask that exposes a part of said hard mask layer; patterning said polysilicon layer wherein said patterning is performed sequentially in a dry plasma etch chamber and wherein said patterning comprises: etching said hard mask layer exposed by said resist mask to form a hard mask that exposes a part of said polysilicon layer; thereafter stripping away said resist mask; thereafter cleaning away polymer residue from said hard mask wherein said cleaning away comprises a chemistry containing CF 4 gas; and thereafter etching said polysilicon layer exposed by said hard mask; and stripping away said hard mask to complete the patterning of said polysilicon layer in the manufacture of the integrated circuit device.