Patent ID: 8284890

Claim:
A shift register, comprising: a plurality of individually connected shift register units, each shift register unit comprising a switching unit, a pre-charging unit, a pulse signal output unit, a low level voltage signal control unit, a first clock pulse signal input, a second clock pulse signal input, a first starting signal input, a second starting signal input, a reference node, and an output; wherein the first and the second clock pulse signal inputs respectively receive a first clock signal and a second clock signal, the first clock signal and the second clock signal having reverse clock pulses during each clock cycle; the switching unit receives at least one external starting signal and a high level signal, when the at least one external starting signal is high level, the switching unit is turned on and outputs the high level signal to the pre-charging unit; when the second clock signal is high level, the pre-charging unit receives the high level signal output by the switching unit and charges, when the first clock signal is high level, the pre-charging unit discharges; the pulse signal output unit receives the first clock signal via the first clock pulse signal input, and outputs the first clock signal to the output after the pre-charging unit charges and before the pre-charging unit finishes discharging; and the low level voltage signal control unit receives the first clock signal and the second clock signal, after the pre-charging unit finishes discharging, the low level voltage signal control unit pulls down a voltage level on the output at low level when the second clock signal are high level; wherein the first starting signal input of one of the shift register units is connected to an external circuit to receive a first starting pulse signal, the second starting signal input of the shift register unit is connected to a reference node of the following shift register unit, and the reference node of the shift register unit is connected to the first starting signal input of the following shift register unit.