Patent ID: 7405682

Claim:
A delta-sigma analog-digital converter ( 10 ) for the conversion of an analog input signal (Vin) into a digital output signal (Vout), comprising: an analog filter ( 20 ) for the filtering of the analog input signal, a quantiser ( 30 ) clocked by a clock signal (CLK), which comprises at least one comparator ( 34 ) and quantises the filtered analog signal outputted by the analog filter ( 20 ) for the generation of the digital output signal, a feedback arrangement ( 40 ) with at least one digital-analog converter (DAC 1 , DAC 2 , DAC 3 ), which supplies to the analog filter ( 20 ) at least one analog feedback signal on the basis of the digital output signal (Vout), and a calibration device ( 32 ) linked with the quantiser ( 30 ), which is designed at a predetermined point in time to determine an offset error of the comparator ( 34 ) and subsequently to compensate for this.