Patent ID: 6853164

Claim:
A circuit comprising an operational amplifier (op amp) connected such that voltage levels at input terminals of the on amp are unbalanced and an output voltage of the op amp is always high during a start-up period, the on amp using no start-up circuit, wherein the op amp comprises: a first transistor coupled to an input voltage line (VIN) and a bias current line; a second transistor coupled to the input voltage line (VIN), the bias current line and an output line; a third transistor coupled to the first transistor and a negative input line; a fourth transistor coupled to a positive input line and the first transistor, the gate width of the third transistor being about 8% larger than the gate width of the fourth transistor to introduce a negative offset in the op amp; a fifth transistor coupled to the third transistor and a common voltage line; a sixth transistor coupled to the fourth transistor, the fifth transistor and the common voltage line; and a seventh transistor coupled to the output line, the fourth transistor and the common voltage line.