Patent ID: 8146150

Claim:
A method for security in a multi-CPU computer system, comprising: providing a plurality of nodes, each node including: a trusted platform module, at least one CPU, and a node controller; establishing one of the plurality of nodes as a primary node; and broadcasting a security command from the primary node to the trusted platform module within each of the plurality of nodes, wherein the security command is associated with secret data stored at a secured register address within a first sub-range of secured register addresses, wherein registers within the first sub-range of secured register addresses are protected from improper access by hardware adapted to perform a privilege check, and registers within a second sub-range of secured register addresses can only be accessed: (i) by processor hardware, and (ii) by an Authenticated Code Module (ACM) authorized by the processor hardware, and (iii) by a Virtual Machine Monitor (VMM) authorized by both the processor hardware and the ACM, and (iv) an Operating System (OS) authorized by all of the processor hardware, the ACM, and the VMM.