Patent ID: 7817565

Claim:
A data integrity checking system in a frame-switched on-board network, comprising: at least first and second asynchronous transmitter terminals, the second asynchronous transmitter terminal ( 202 ) being charged with monitoring the first asynchronous transmitter terminal ( 201 ), and at least first and second receiving terminals, the second receiving terminal ( 204 ) being in charge of monitoring the first receiving terminal ( 203 ); a first multicast virtual link (VL 1 ) connecting the first asynchronous transmitter terminal ( 201 ) to said first and second receiving terminals ( 203 , 204 ), to transmit data from said first asynchronous transmitter terminal to said first and second receiving terminals; a second virtual link (VL 3 ) connecting the first receiving terminal ( 203 ) to the second asynchronous transmitter terminal ( 202 ), to transmit to the second asynchronous transmitter terminal the data that the first receiving terminal received from the first asynchronous transmitter terminal, said second virtual link not passing through any switches (SW 1 ) that are common to the branches of the first virtual link; and a third virtual link (VL 2 ) connecting the second transmitter terminal to the first receiving terminal to send to the first receiving terminal the result of a data integrity check of the data received by the first receiving terminal.