Patent ID: 7814396

Claim:
An apparatus for checking an error recognition functionality of a memory circuit, wherein the memory circuit comprises a memory that stores a datum and a check value circuit that executes the error recognition functionality, wherein the memory provides the datum to the check value circuit, and wherein the check value circuit checks the datum provided thereto for errors and, if an error is present, outputs an error signal, comprising: a monitor that is coupled to the check value circuit, influences the check value circuit to act faulty, the memory to provide a substitute datum at an address different from an address from where the datum is to be read, or the datum provided to the check value circuit to experience a bit modification so that the check value circuit discovers an error in a check in a case of correct execution of the error recognition functionality, and the monitor outputs an alarm signal indicating incorrect execution of the error recognition functionality, if the check value circuit does not output an error signal to the monitor upon the influence.