Patent ID: 7804927

Claim:
A method for locking a synthesised output signal of a digital waveform synthesiser in a phase relationship with an externally generated input signal, the digital waveform synthesiser comprising a direct digital frequency synthesiser responsive to a frequency control digital word applied thereto for producing the synthesised output signal, the method comprising: applying an initial value of a frequency control digital word to the direct digital synthesiser, and sequentially applying progressively altered values of the frequency control digital word to the direct digital synthesiser until the synthesised output signal is substantially in the phase relationship with the input signal, wherein each subsequent value of the frequency control digital word is derived from the current value of the frequency control digital word by altering the current value of the frequency control digital word by an amount, the value of which is constant until the synthesised output signal has transitioned from one of a first state with the period of the synthesised output signal being greater than 1/H times the period of the input signal and a second state with the period of the synthesised output signal being less than 1/H times the period of the input signal to the other of the first and second states, where H is a whole number, and on the synthesised output signal having transitioned from the one of the first and second states to the other of the first and second states, each subsequent value of the frequency control digital word is derived from the current value of the frequency control digital word by altering the current value of the frequency control digital word by an amount the value of which is less than the absolute value of the immediately previous amount by which the value of the frequency control digital word was altered.