Patent ID: 7440518

Claim:
A phase-locked loop circuit comprising: a voltage controlled oscillator (VCO) generating oscillator signals (u VCO ) with frequencies dependent on input signals (u cp ) applied to said voltage controlled oscillator (VCO); a frequency modulator receiving the oscillator signals (u VCO ) from the voltage controlled oscillator (VCO) and generating frequency modulated signals (u DIV ); a phase detector (PD) providing phase difference signals (u PD ) on the basis of the phase difference between said frequency modulated signals (u DIV ) and further signals; a linear range detector (LRD) detecting whether said phase detector is in a linear range by analysis of said frequency modulated signals (u DIV ) and said further signals and generating linear range signals (u con0 , u con1 ); wherein a controller (DRC) receiving said linear range signals (u con0 , u con1 ) controls the frequency of said frequency modulated signals (u DIV ) by a frequency adjustment so that said phase detector gets back into said linear range after a change in the frequency of the frequency modulated signals (u DIV ) to a desired frequency.