Patent ID: 7405979

Claim:
A method of programming for a nonvolatile memory, which comprises a plurality of word lines, each of which is coupled with memory cells, and is adapted to perform an erase operation and a program operation, wherein in the erase operation, plural memory cells coupled to a selected word line move into an erase state by supplying a first voltage, wherein in the program operation, a first plurality of said memory cells coupled to the selected word line are in the erase state and a second plurality of said memory cells coupled to the selected word line are in a corresponding state in accordance with first data before performing the program operation, wherein the method comprises the steps of: inputting second data to be programmed to the first plurality of memory cells coupled to the selected word line, supplying the erase voltage to plural memory cells coupled to the selected word line, and programming the second data to the first plurality of memory cells coupled to the selected word line, the second plurality of memory cells coupled to the selected word line remaining in the corresponding state in accordance with the first data before performing the program operation, wherein the time of supplying the erase voltage in the program operation is shorter than the time of supplying the erase voltage in the erase operation.