Patent ID: 7289557

Claim:
An apparatus comprising: a circuit including a discrete-time FIR (Finite Impulse Response) filter comprising n multiplier units to implement a filter response [ h (t)] i , i=0, 1, . . . , n−1, where t is a time index, the FIR filter to filter a discrete-time sequence of input voltages x(t) to provide a sequence of filtered output voltages z(t) where z ⁡ ( t ) = ∑ i = 0 n - 1 ⁢ [ h _ ⁡ ( t ) ] i ⁢ ⁢ x ⁡ ( t - i ) ; and a data generator coupled to the discrete-time FIR filter, the data generator to provide a discrete-time sequence of desired voltages d(t), t=1, 2, . . . , T; wherein for t=1, 2, . . . , T, the filter response satisfies an update relationship [ h (t+1)] i =[ h (t)] i +μ[sgn{d(t)}−sgn{z(t)−Kd(t)}]sgn{x(t−i)}, i=0, 1, . . . , n−1, where μ and K are scalars and sgn{ } denotes sign.