Patent ID: 8407707

Claim:
A method of assigning tasks to a plurality of queues of a processing core of a network processor having a plurality of processing cores and a shared memory comprising a plurality of addressable memory arrays, the processing cores coupled to at least one unidirectional ring bus, the method comprising: sending, by a source one of the plurality of processing cores, a task over the at least one unidirectional ring bus to an adjacent processing core coupled to the ring bus, the task having a corresponding one or more destination processing cores and a corresponding flow identifier; iteratively: checking, by the adjacent processing core, whether the processing core is a destination processing core for the task and, if not, passing the task unchanged to a next adjacent processing core coupled to the ring bus, thereby passing the task from the source processing core to each corresponding destination processing core on the ring bus; receiving, by the corresponding one or more destination processing cores, the task; determining, by the destination processing core, (i) if another task having the same flow identifier as the received task exists in any of the plurality of queues, and (ii) a logical address in the shared memory of data corresponding to the task; computing, by the destination processing core, a hash value based on at least a part of the logical address; assigning, if the another task with the same flow identifier exists, the received task to the queue containing a task with the same flow identifier; assigning, if the another task with the same flow identifier does not exist in the plurality of queues, the received task to the queue with the fewest number of tasks therein; selecting, by the destination processing core, one of the plurality of addressable memory arrays in which to store the assigned queue based on the hash value; writing, by the source processing core, the received task to the assigned queue in the selected addressable memory array; and executing the received task by the destination processing core.