Patent ID: 7511340

Claim:
A semiconductor device comprising: a plurality of gate strictures on a semiconductor substrate in which a plurality of active regions are defined, wherein each of the gate structures comprises a gate oxide film pattern, a gate pattern and a hard mask pattern sequentially stacked on the semiconductor substrate; a first spacer on each sidewall of the gate structures; a plurality of first contact pads on the substrate between adjacent gate structures, the first contact pads having heights lower than the heights of the gate structures; a plurality of second spacers, wherein at least one second spacer is provided between adjacent ones of the first contact pads; and a plurality of second contact pads, each of the plurality of second contact pads on a respective one of the first contact pads to form a plurality of contact pad stacks, wherein the height of each contact pad stack is greater than or equal to the height of each of the plurality of gate structures.