Patent ID: 8407571

Claim:
A method for processing a received signal using a multiple-step trellis, said method comprising the steps of: computing three add-compare-select decisions for a given state; determining a selection signal for each of three paths through a multiple-step trellis into said given state, wherein a first of said three paths is a winning path for each single-step-trellis period of a multiple-step-trellis cycle, a second of said three paths is a winning path for a first single-step-trellis period and is a losing path for a second single-step-trellis period of a multiple-step-trellis cycle and a third of said three paths is a losing path for a first single-step-trellis period and is a winning path for a second single-step-trellis period of a multiple-step-trellis cycle, wherein each selection signal is based on two of said three add-compare-selection decisions, wherein each of said paths has one or more corresponding survivor bits, and wherein, for each of said paths, one or more of said one or more corresponding survivor bits are selected by said corresponding selection signal; and determining a reliability value for at least one bit decision, wherein at least one of said steps of said method is performed by at least one hardware device.