Patent ID: 8692246

Claim:
A leakage measurement structure for through silicon vias comprising: a silicon on insulator (SOI) substrate comprising a semiconductor base, an insulating layer and a silicon on insulator (SOI) layer; a plurality of through silicon vias in the SOI substrate; and a leakage measurement structure located in the SOI layer comprising: a substrate contact for each through silicon via extending between the SOI layer and the semiconductor base; a sensing circuit for each through silicon via to provide an output indicative of current leakage from each of the through silicon vias, the sensing circuit for each through silicon via directly connected to the substrate contact for each through silicon via and directly connected to each through silicon via such that each through silicon via has its own corresponding substrate contact and sensing circuit to which it is connected; a built-in self test (BIST) engine connected to the sensing circuit for each through silicon via to step through testing of the plurality of through silicon vias; and a memory element coupled to the BIST engine to receive the output from each of the sensing circuits.