Patent ID: 7309633

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first gate electrode on a first impurity doped region of a second conductivity type in a semiconductor substrate of a first conductivity type; forming a second gate electrode on a second impurity doped region of the first conductivity type in the semiconductor substrate; forming a first insulation film on the first and second gate electrodes and the first and second impurity doped regions; introducing an element, which varies an etching rate of the first insulation film, only into the first insulation film formed on the second impurity doped region and the second gate electrode; processing the first insulation film by anisotropic etching to form a first sidewall insulation film on either side of the first gate electrode and a second sidewall insulation film on either side of the second gate electrode, the second sidewall insulation film having a thickness different from that of the first sidewall insulation film; forming a third impurity doped region of the first conductivity type in the first impurity doped region by ion implantation using the first gate electrode and the first sidewall insulation films as a mask; and forming a fourth impurity doped region of the second conductivity type in the second impurity doped region by ion implantation using the second gate electrode and the second sidewall insulation films as a mask.