Patent ID: 8887015

Claim:
A method of designing a semiconductor device including a scan flip-flop circuit that can switch between scanning operation and capturing operation, the method causing an arithmetic processor to execute the steps of: analyzing a probability that an output value of the scan flip-flop circuit after the capturing operation becomes a given logical state; and structuring a scan chain for a plurality of scan flip-flop circuits having the same degree of probability that the output value after the capturing operation becomes the given logical state, on the basis of a result of the analyzing step, wherein the method causes the arithmetic processor to execute a fixed value masking function addition step of adding a maskable mask control logic to a logical value higher in the probability provided to the scan flip-flop circuit included in each scan chain after the capturing operation, on the basis of information on the probability that each scan flip-flop circuit configuring the scan chain becomes the given logical state after the scan chain structuring step has been executed by the arithmetic processor.