Patent ID: 8765613

Claim:
A method of forming a semiconductor structure comprising: forming a shallow trench isolation structure comprising silicon oxide within a semiconductor material portion in a semiconductor substrate; forming a gate stack on said semiconductor material portion; forming a silicon nitride layer on said gate stack, said semiconductor material portion, and said shallow trench isolation structure; and anisotropically etching said silicon nitride layer to form a silicon nitride spacer laterally surrounding said gate stack, wherein a top surface of said shallow trench isolation structure and a top surface of said semiconductor material portion are physically exposed and subsequently recessed during said anisotropic etching, and a first recess distance by which a top surface of said semiconductor material portion is recessed after physical exposure of said top surface of said semiconductor material portion is less than a second recess distance by which a top surface of said shallow trench isolation structure is recessed after said physical exposure of said top surface of said semiconductor material portion, and is less than a third recess distance by which a top surface of said silicon nitride spacer is recessed after said physical exposure of said top surface of said semiconductor material portion.