Patent ID: 8710667

Claim:
A semiconductor device, comprising: a semiconductor substrate; a first layer disposed above the semiconductor substrate and forming a plurality of first interconnect blocks, each of the first interconnect blocks including a first interconnect with a first potential, the first interconnect extending in at least two or more directions, and a second interconnect with a second potential different from the first potential, the second interconnect extending in at least two or more directions; and a second layer disposed above or under the first layer, the second layer including a third interconnect which connects to the first interconnect of each of two or more adjacent first interconnect blocks, and a fourth interconnect which connects to the second interconnect of each of two or more adjacent first interconnect blocks, wherein: the second layer forms a plurality of second interconnect blocks in each of which the third interconnect and the fourth interconnect are arranged, an arrangement of the first interconnect and the second interconnect in one first interconnect block is different from an arrangement of the first interconnect and the second interconnect in another first interconnect block, and the first interconnect in one first inter connect block is arranged in parallel to and adjacent to the second interconnect in an adjacent first interconnect block which is adjacent to the one first interconnect block.