Patent ID: 6884709

Claim:
A method of manufacturing a multilayer wiring substrate, comprising: preparing a member in which a plurality of bumps are formed on one of principal surfaces of a mold and other member in which other mold is laminated on one of principal surfaces of an insulating film for interlayer insulation and bump corresponding holes are formed on the other mold so as to correspond to the bumps; facing the insulating film of the other member toward the surface of the member formed with the bumps on the side on which the bumps are formed so as to align the bump corresponding holes and the corresponding bumps with each other in position; pressing the two molds so as to make the insulating film be penetrated with the bumps; and removing the two molds and then laminating wiring film forming metal foils on both the surfaces of the insulating film to integrate the insulating film, the bumps, and the two wiring film forming metal foils.