Patent ID: 8907580

Claim:
A circuit for flicker suppression in a Light Emitting Diode (LED) comprising: a latch, the latch having a first state set with a trailing edge of Pulse Width Modulated Dimming (PWMD) pulse, and a second state set delayed with respect to the PWMD trailing edge; and a trigger circuit coupled to the latch, the trigger circuit sending a signal to the latch to change to the second state when a decision point occurs during a time following a duty limit D max of a gate of a LED driver circuit, wherein the trigger circuit comprises: a plurality of logic gates, wherein the plurality of logic gates provides the signal to the latch to change to the second state when a decision point occurs during a time following a duty limit Dmax of a gate of a LED driver circuit; and a delay circuit coupled to at last one of the plurality of logic gates.