Patent ID: 8383323

Claim:
A method of selectively hard masking a semiconductor wafer, the method comprising: coating a surface of the wafer with a first resist; baking the wafer to sufficiently drive out solvents in the first resist; transferring reticles to the wafer by exposing the first resist to a radiation source through a mask at a first position using a first process; transferring a section of the reticles to an edge of the wafer, that was unexposed to the radiation source during the first process, by exposing the unexposed edge of the wafer having the first resist disposed thereon to the radiation source through the mask at a positional offset of the first position; removing areas of the first resist; hard baking the first resist to the wafer; exposing the wafer to a high hot plate at a higher temperature than hard baking the first resist after the wafer has been cooled down to dehydrate the wafer; coating the first resist with a second resist, wherein the second resist forms a layer on the wafer and a first portion of the layer comprising the second resist is in contact with and above at least a portion of the first resist and a second portion of the layer comprising the second resist is in contact with the surface of the wafer; baking the wafer to sufficiently drive out solvents in the second resist; exposing the second resist to the radiation source without leveling over areas of the wafer that include a portion of the layer comprising the second resist above the first resist using a second process that is different from the first process to create a patterning resist portion in the layer comprising the second resist; and hard baking the second resist to the wafer to create a hard masking resist portion at the edge of the wafer that was unexposed by the exposure to the radiation source.