Patent ID: 8268690

Claim:
A method of forming a semiconductor device, comprising: forming an isolation layer on a substrate, the isolation layer defining an active region; forming a gate trench at an upper portion of the active region of the substrate; forming a gate insulation layer on an inner wall of the gate trench; forming a gate structure on the gate insulation layer to fill the gate trench, the gate structure having a width smaller than a width of the gate trench and having a recess at a first portion thereof; forming a gate spacer on sidewalls of the gate structure; and implanting impurities into upper portions of the active region to form first and second impurity regions adjacent to the gate structure, the first impurity region being closer to the recess than the second impurity region, wherein the gate trench is formed to have a reduced width near the recess in a second direction perpendicular to the first direction.