Patent ID: 6861326

Claim:
A method of forming semiconductor circuitry, comprising: providing a substrate comprising a first monocrystalline material, an insulative layer over the first monocrystalline material, and a second monocrystalline material over the insulative layer and spaced from the first monocrystalline material by at least the insulative layer; the second monocrystalline material consisting essentially of a first element; forming a mask to cover a first portion of the second monocrystalline material while leaving a second portion uncovered; removing at least some of the uncovered portion to form a recess; after forming the recess, forming an insulative material spacer along a sidewall of the recess; after forming the insulative material spacer, entirely filling the recess with a semiconductive material comprising at least 1 atomic percent of an element other than the first element, the semiconductive material consisting essentially of Si and Ge, with the Ge being present to an atomic concentration of from about 1% to about 20%, the semiconductive material being formed along the insulative material spacer; chemical-mechanical polishing the semiconductive material to form a planarized surface which extends across the semiconductive material and mask; after the chemical-mechanical polishing, exposing the semiconductive material to a laser to anneal the Si and Ge of the semiconductive material; removing the mask after the anneal; after removing the mask, forming a first semiconductor circuit component over the first portion of the second monocrystalline material; and forming a second semiconductor circuit component over the semiconductive material.