Patent ID: 7656181

Claim:
A test apparatus that tests a semiconductor device by providing a signal to the semiconductor device, receiving the signal back from the semiconductor device via a transmission line as a feedback signal, and analyzing the feedback signal as a test signal, the test apparatus comprising: an eye mask generator generating an eye mask formed of upper and lower portions by using two sine wave signals of different respective phases; an error detector receiving the eye mask from the eye mask generator, comparing the test signal with the upper and lower portions of the eye mask, and outputting an error detection signal based on a logic operation performed on the signals derived from the comparison results; and an error signal output unit receiving the error detection signal from the error detector and generating an error signal in response to the error detection signal, wherein the eye mask generator includes: a sine wave generator generating the two sine waves in synchronization with one or more clock signals; and a limiter circuit receiving the two sine waves, and generating the eye mask by limiting selected respective amplitudes of the two sine waves to a constant level during a partial period of the sine waves to respectively form the upper and lower portions of the eye mask.