Patent ID: 7305008

Claim:
A local area network, comprising: a) a data bus having a multiple of eight parallel data lines; b) a clock bus; c) a plurality of bus ports coupled to said data bus and said clock bus, each bus part including a transceiver coupled to each of said data lines, an input buffer coupled to said transceivers, an output buffer coupled to said transceivers, and a hardware interface coupled to said buffers, wherein at least two bus ports have different hardware interfaces and wherein data is transferred on the data bus in a repeating, variable length frame, said frame being defined by a plurality of clock cycles, at least one of which is reserved for bidding for access to transmit on the data bus, following the bidding cycle, at least one cycle is reserved for transmission of message length, at least one cycle is reserved for transmission of destination address, and at least one cycle is reserved for the port having the destination address to assert a busy signal on the data bus.