Patent ID: 7161181

Claim:
A thin film transistor device manufacturing method comprising the steps of: forming a semiconductor film in a thin film transistor forming region on a substrate; forming sequentially a first insulating film, a first conductive film, and a second conductive film on an overall upper surface of the substrate; forming a resist film in a display electrode forming region and a gate electrode forming region on the second conductive film; forming a display electrode and a gate electrode having a terrace structure by applying an isotropic etching to the second conductive film and by applying an anisotropic etching to the first conductive film while using the resist film as a mask; removing the resist film on the display electrode forming region to leave the resist film on the gate electrode forming region; removing the second conductive film remaining on the display electrode; removing the resist film from the gate electrode forming region; forming source/drain regions by introducing an impurity into the semiconductor film; forming a second interlayer insulating film on the overall upper surface of the substrate; patterning the second interlayer insulating film to expose the display electrode and to form contact holes that reach the semiconductor film from a surface of the second interlayer insulating film; forming a third conductive film on the overall upper surface of the substrate; and forming a wiring, which connects electrically the semiconductor film and the display electrode, by patterning the third conductive film.