Patent ID: 7626221

Claim:
Magnetoresistive random access memory on a semi-conducting substrate, comprising: a planar matrix of cells arranged in rows and columns, the rows and columns being substantially orthogonal to each other, each cell designed to store an information bit, each cell of a column comprising a magnetic tunnel junction, each magnetic tunnel junction comprising: a first terminal connected to a line conductor, the line conductor connecting a plurality of cells in a same row; a second terminal, the first and second terminals disposed on opposite sides of the magnetic tunnel junction, so that current flows through the magnetic tunnel junction to pass from the first terminal to the second terminal; a first and a second transistor each equipped with a gate, a first electrode and a second electrode; and the gate of the first transistor being connected to a first gate conductor and the gate of the second transistor being connected to a second gate conductor; wherein the first electrode of the first transistor and the first electrode of the second transistor are connected to the second terminal, and the second electrodes of the first and second transistor are connected to a first and a second adjacent column conductor, respectively, each adjacent column conductor extending to and connecting a plurality of cells in a same column, the first electrode of the first transistor and the first electrode of the second transistor are the same electrode.