Patent ID: 7969136

Claim:
A semiconductor device, comprising: a bias voltage generator for generating a bias voltage; a first reference voltage generator for generating a first reference voltage in response to the bias voltage; a first band gap circuit for dividing a voltage at a second reference voltage output node to produce first and second band gap voltages having a property relative to temperature variations; a first comparator for receiving the first reference voltage and comparing the first band gap voltage with the second band gap voltage; and a first driver for pull-up driving the second reference voltage output node in response to an output signal of the first comparator, wherein the first reference voltage generator includes: a second band gap circuit for dividing a voltage at a first reference voltage output node to produce a third band gap voltage having a negative property and a fourth band gap voltage having a positive property relative to the temperature variations; a second comparator for receiving the bias voltage as a bias input and comparing the third band gap voltage with the fourth band gap voltage: and a second driver for pull-up driving the first reference voltage output node in response to an output signal of the second comparator, wherein the second driver is provided with a PMOS transistor for controlling a connection of a power supply voltage terminal and the first reference voltage output node coupled to its source and drain, respectively, in response to the output signal of the second comparator applied via its gate.