Patent ID: 8552802

Claim:
An amplifying circuit for amplifying an input signal input from an input terminal and outputting the signal from an output terminal, the circuit comprising: a first transistor, a second transistor, a third transistor and a fourth transistor provided to an input stage; and a first bias circuit, wherein the input signal is input into a control terminal of the first transistor and a control terminal of the second transistor, a first terminal of the first transistor is connected to a first terminal of the third transistor, a first terminal of the second transistor is connected to a first terminal of the fourth transistor, a second terminal of the first transistor is connected to a first potential, a second terminal of the second transistor is connected to a second potential that is equal to or different from the first potential, a second terminal of the third transistor is connected to a third potential, a second terminal of the fourth transistor is connected to a fourth potential, the first bias circuit is connected between a control terminal of the third transistor and a control terminal of the fourth transistor.