Patent ID: 8076710

Claim:
A semiconductor device comprising: a semiconductor substrate; device isolation insulating films formed in the semiconductor substrate and extending in a row direction; a tunnel insulating film formed over the semiconductor device between the device isolation insulating films; a plurality of floating gates formed in a matrix form over the tunnel insulating film; an intermediate insulating film formed over the floating gates; and a plurality of strip-shaped control gates that are respectively formed over the intermediate insulating films and that respectively extend in a column direction, the control gate collectively covering the plurality of the floating gates aligned in a single column, wherein a residue of the intermediate insulating film is formed to linearly extend over the device isolation insulating film or over the tunnel insulating film in a region between the control gates adjacent in the row direction, and a portion of the residue is located out of a slanting surface of the device isolation insulating film, and wherein the residue extends to bend toward an inner side in the column direction of the device isolation insulating film in a plan view, and the portion of the residue is formed over a top surface of the device isolation insulating film.