Patent ID: 7808264

Claim:
An integrated circuit comprising: A. a substrate of semiconductor material having a rectangular shape with two sets of opposed sides; B. functional core logic circuitry formed on the substrate, the logic circuitry having inputs and outputs; C. functional pad sites formed on the substrate and coupled to the inputs and outputs of the logic circuitry by input and output buffers, the pad sites being arranged at the margin of each side; D. conductive leads formed on the substrate, each lead having two opposite ends, one end being formed adjacent a pad site on one side of the substrate and the other end being formed adjacent a pad site on the opposite side of the substrate, there being a lead for each pair of pad sites on opposite sides of the substrate, the conductive leads being isolated from the logic circuitry and the ends of each lead being selectively connected to the adjacent pad site; and E. a mode pad site formed on the substrate, the mode pad site being unconnected to the logic circuitry and receiving a signal for selectively connecting the leads to the pad sites.