Patent ID: 7570191

Claim:
A method comprising: estimating an error in a residue amplifier in a first stage of a plurality of stages in an analog to digital converter (ADC), wherein said estimating comprising: dividing an output signal of said first stage by a desired gain of the residue amplifier of the first stage using an attenuator to generate a modified output signal; adding a digital to analog converter (DAC) value to said modified output signal to generate a reconstructed input signal; and subtracting said reconstructed input signal from an input signal to the first stage for calculating a difference value between a desired output and an actual output, wherein said difference value includes said error; providing the error estimated to a second stage of said plurality of stages through an error amplifier after multiplying the error with said desired gain; and eliminating the error in said residue amplifier by adding the error to a residue value input to said second stage.