Patent ID: 8149202

Claim:
A flat display, comprising: a clock generator providing a clock signal, said clock signal comprising at least a first cycle waveform and a second cycle waveform immediately following said first cycle waveform; and a clock modulator modulating said clock signal, wherein said first cycle waveform is modulated as a first modulated cycle waveform made up of a first positive modulated cycle waveform and a first negative modulated cycle waveform, and said second cycle waveform is modulated as a second modulated cycle waveform made up of a second positive modulated cycle waveform and a second negative modulated cycle waveform, and durations of said first modulated cycle waveform, said second modulated cycle waveform, said first cycle waveform and said second cycle waveform are equal, wherein said first positive modulated cycle waveform and said first negative modulated cycle waveform within same said first modulated cycle waveform have a first duration difference, and said second positive modulated cycle waveform and said second negative modulated cycle waveform within same said second modulated cycle waveform have a second duration difference different from said first duration difference.