Patent ID: 7885121

Claim:
A resistance change memory device comprising: a cell array having a plurality of word lines disposed in parallel, a plurality of bit lines disposed to cross the word lines and a resistance change type of memory cells disposed at the cross-points of the word lines and the bit lines, the resistance value of the memory cell being reversibly settable; a word line driver circuit configured to apply a selecting drive voltage to one selected in the word lines; and a bit line driver circuit configured to drive multiple bit lines in such a manner that a set mode, a reset mode and a mask mode are set simultaneously for multiple memory cells selected by the selected word line, the set mode being for changing a selected memory cell from a first resistance value state into a second resistance value state, the reset mode being for changing a selected memory cell from the second resistance value state into the first resistance value state, and the mask mode being for keeping a memory cell in the present resistance value state wherein; the bit line driver circuit is configured to supply to the bit lines a set-use pulse voltage for the set mode, a reset-use pulse voltage for the reset mode and a mask-use voltage for the mask mode alternatively, and wherein the multiple memory cells are set in the set mode, the reset mode and the mask mode in accordance with the differences between the selecting drive voltage applied to the selected word line and the set-use pulse voltage, the reset-use pulse voltage and the mask-use voltage applied to the bit lines, respectively.