Patent ID: 7507597

Claim:
A method of fabricating a CMOS image sensor comprising: forming a gate electrode with a gate insulating layer interposed at a transistor region of a semiconductor substrate having an active region defined by a photodiode region and a transistor region; forming a first impurity region of a first conductive type at the transistor region of a first side of the gate electrode; forming a first sidewall of a first insulating layer and a second sidewall of a second insulating layer at the first and a second side of the gate electrode; forming a second impurity region of the first conductive type at the transistor region of the first side of the gate electrode; applying a photoresist layer on the semiconductor substrate, and patterning the photoresist layer to cover the transistor region through an exposing and developing process; forming a third impurity region of a second conductive type at the photodiode region using the patterned photoresist as a mask; selectively removing a portion of the first sidewall between the second sidewall and the gate electrode at a predetermined thickness using the patterned photoresist layer as a mask; covering the gate electrode by reflowing the patterned photoresist layer at a predetermined temperature; selectively removing the second sidewall using the reflowed photoresist layer as a mask; and forming a fourth impurity region of the first conductive type at the second side of the gate electrode.