Patent ID: 8809944

Claim:
A semiconductor device comprising: a source region and a drain region, both of which are of a first conductivity type and formed in a substrate; a channel region of a second conductivity type formed in the substrate and arranged, in a plane view, in a first direction between the source region and the drain region; a trench formed in the substrate between the source region and the drain region and having a side surface of the trench extending in the first direction between the source region and the drain region; a gate insulating film formed in the trench; a gate electrode formed in the trench through the gate insulating film such that a portion of the channel region sideward, in a second direction crossing and being in a same plane as the first direction, from the side surface of the trench, in the first direction both the source region and the drain region and is arranged between the source region and the drain region; and a buried region of the second conductivity type formed directly below the trench, directly below the source region and directly below the drain region such that the buried region contacts a bottom portion of the trench and device isolation regions, and that a dopant concentration of the second conductivity type of the buried region is higher than a dopant concentration of the second conductivity type of the portion of the channel region sideward from the side surface of the trench.