Patent ID: 8633736

Claim:
A driver circuit having a limited slew rate, the driver circuit comprising: a current generator having an input port, an output port and reference port; an output transistor, wherein the output port of the current generator is coupled to the gate of the output transistor; wherein the current generator is configured to control a first current flowing through the output port based on an input voltage appearing at the input port, wherein the current generator is configured to limit the absolute value of the first current to be less than or equal to a maximum that is determined by a reference current provided at the reference port, wherein the current generator includes: a transistor A; a first chain of transistors; and a second chain of transistors; wherein the first chain and the second chain are coupled in parallel between a drive voltage and round, wherein a first transistor of the first chain is coupled to form a current mirror with a first transistor of the second chain, wherein the transistor A is configured to form a current mirror with a last transistor of the first chain, wherein the transistor A is also configured to form a current mirror with a last transistor of the second chain, wherein the reference current is provided to the drain of the transistor A, wherein the input port is coupled to the gates of second and third transistors in the second chain, wherein the second and third transistors of the second chain are coupled to a common node in drain-to-drain fashion, wherein the common node is coupled to the output port.