Patent ID: 7879662

Claim:
A method of manufacturing a thin film transistor (TFT) substrate, comprising: forming a first conductive pattern group including a gate line and a gate electrode on a substrate as a first conductive layer; forming a gate insulating layer on the first conductive pattern group; forming a semiconductor layer and an ohmic contact layer on the gate insulating layer; forming a second conductive pattern group including a source electrode, a drain electrode and a data line, wherein the source and drain electrodes are formed of a second conductive layer, which is formed on the ohmic contact layer and contains aluminum nitride and nickel nitride, and of a third conductive layer, which is formed on the second conductive layer and contains aluminum and nickel, and wherein the data line is connected to the source electrode, intersects the gate line and is insulated by the gate insulating layer; forming a protection layer on the gate insulating layer on which the second conductive pattern group has been formed, wherein the protection layer includes a pixel contact hole exposing the drain electrode; and forming a third conductive pattern group on the protection layer, wherein the third conductive pattern group includes a pixel electrode connected to the drain electrode through the pixel contact hole.