Patent ID: 8013398

Claim:
A semiconductor device comprising: a semiconductor substrate, a first pMISFET formed on the semiconductor substrate and having a first Si channel formed on a surface of the semiconductor substrate, and first SiGe layers, which apply first compression strain to the first Si channel, embedded in the surface of the semiconductor substrate to sandwich the first Si channel, a second pMISFET formed on the semiconductor substrate to be electrically isolated from the first pMISFET and having a second Si channel formed on a surface of the semiconductor substrate, and second SiGe layers, which apply second compression strain different from the first compression strain to the second Si channel, embedded in the surface of the semiconductor substrate to sandwich the second Si channel, and an nMISFET formed on the semiconductor substrate to be electrically isolated from the first pMISFET and the second pMISFET and having a third Si channel formed on a surface of the semiconductor substrate.