Patent ID: 8217455

Claim:
A device structure formed using an SOI substrate with a device layer, a bulk wafer, and an insulating layer separating the device layer from the bulk wafer, the device structure comprising: an annular isolation structure filled with a dielectric material, the annular isolation structure having an inner peripheral sidewall extending from a top surface of the device layer to the insulating layer; a body region of the device layer, the body region disposed inside the inner peripheral sidewall of the annular isolation structure; a device in the body region; and an annular conductive interconnect extending through the body region and the insulating layer to physically connect the body region with the bulk wafer, the annular conductive interconnect disposed peripherally inside the inner peripheral sidewall of the isolation structure so that a portion of the body region is disposed laterally between the conductive interconnect and the inner peripheral sidewall of the annular isolation structure.