Patent ID: 8269661

Claim:
An apparatus comprising: a logic circuit that includes: a decoder that receives a control word and that generates a plurality of control signals from the control word; and a plurality of predrivers that are each coupled to the decoder so as to receive at least one of the control signals; and a plurality of three-state digital-to-analog converter (DAC) switches, wherein each three-state DAC is coupled to at least one of the predrivers, wherein each of the plurality of three-state DAC switches includes: a current source; a first transistor that is coupled to the current source and an associated predriver, wherein the associated predriver controls the first transistor; a second transistor that is coupled to the current source and the associated predriver, wherein the associated predriver controls the second transistor; and a third transistor that is coupled between the current source and ground and that is coupled to the associated predriver, wherein the associated predriver controls the third transistor.