Patent ID: 7414908

Claim:
A magnetic memory device comprising a first power supply and a second power supply, and further comprising: a) a word line; b) a pair of bit lines; c) a magnetic memory cell, said magnetic memory cell connected to the word line and to the pair of bit lines, and further comprising a magnetic resistor element connected between said pair of bit lines and the second power supply, and an access transistor having a control terminal connected to said word lines, the access transistor being connected in series to said magnetic resistor element; and d) an amplifier circuit, i) said amplifier circuit connected to said pair of bit lines for sensing the current in said magnetic memory cell, ii) said amplifier circuit comprising a first inverter including an output terminal connected to a first output node, iii) an input terminal connected to a second output node, iv) the first power terminal connected to a first power supply, and a second power terminal connected to said pair of bit lines, v) a second inverter including an output terminal connected to the second output node, vi) an input terminal connected to the first output node, vii) a first power terminal connected to the first power supply, and a second power terminal connected to the other of said pair of bit lines; viii) power-off means for shutting off the power supply to said amplifier circuit during standby, said power-off means including a switching element connected between the first power supply and the first power terminal of said first inverter; ix) a first switching element connected between the second output node and the first or second power supply; and x) a second switching element connected between the first output node and the first or second power supply; said magnetic memory device further comprising a bit switch connected between said amplifier circuit and said bit line pair and turned on in response to a column select signal from a column decoder.