Patent ID: 7982536

Claim:
A single-ended class-D amplifier with dual feedback loop scheme comprising: an output terminal connected to an inverter to form two pseudo differential output terminals that output a differential signal; a gain adjusting circuit; two comparators; an oscillator outputting an oscillation signal; a logic circuit connected to the two comparators; an output driver connected to the logic circuit; and a second-order integrator comprising: a first differential amplifier having a non-inverting input, an inverting input, a non-inverting output and an inverting output, wherein the non-inverting input and the inverting input are connected to the gain adjusting circuit; two first RC circuits, wherein one of the first RC circuits is connected between one of the pseudo differential output terminals and the non-inverting input of the first differential amplifier, while the other first RC circuit is connected between the other differential output terminal and the inverting input of the first differential amplifier; wherein the two first RC circuits cooperate with the first differential amplifier to form two first-order integrating circuits; a second differential amplifier having a non-inverting input, an inverting input, a non-inverting output and an inverting output, wherein the non-inverting input of the second differential amplifier is connected to the non-inverting output of the first differential amplifier, and the inverting input of the second differential amplifier is connected to the inverting output of the first differential amplifier; and two second RC circuits, wherein one of the second RC circuits is connected between one of the pseudo differential output terminals and the non-inverting input of the second differential amplifier, while the other second RC circuit is connected between the other differential output terminal and the inverting input of the second differential amplifier; wherein the two second RC circuits cooperate with the second differential amplifier to form two second-order integrating circuits.