Patent ID: 8810483

Claim:
A method applied on an active matrix display, the active matrix display including a matrix of pixel elements wherein a pixel element includes at least one switching transistor, at least one nonlinear element, and at least one capacitive element, the method comprising: creating multiple enabled pixel elements positioned in a plurality of rows from non-enabled pixel elements, wherein the creating comprises driving a semiconductor channel of the at least one switching transistor in an enabled pixel element into a conducting state, wherein an enabled pixel element maintains a semiconductor channel of the at least one switching transistor in the enabled pixel element at a conducting state, and wherein a non-enabled pixel element maintains a semiconductor channel of the at least one switching transistor in the non-enabled pixel element at a non-conducting state; selecting a plurality of pixel elements from the multiple enabled pixel elements in the plurality of rows to create a plurality of selected pixel elements while keeping remaining pixel elements of the multiple enabled pixel elements as non-selected pixel elements and keeping pixel elements other than the multiple enabled pixel elements as non-enabled pixel elements, wherein the selecting comprises driving the at least one nonlinear element in a selected pixel element into a conducting state while maintaining a semiconductor channel of the at least one switching transistor in the selected pixel element at a conducting state, and wherein a non-selected pixel element maintains the at least one nonlinear element thereof at a non-conducting state; charging the at least one capacitive element in a selected pixel element; wherein said charging the at least one capacitive element in a selected pixel element comprises applying a predetermined voltage to a column conducting line that is electrically connected to the at least one nonlinear element in the selected pixel element; and wherein the nonlinear element in the pixel element comprises a supplementary resistor serially connected to one of a PN diode and a PIN diode.