Patent ID: 7570725

Claim:
An apparatus that is operated from a system clock to provide an output clock with a resolution that exceeds a resolution associated with the system clock, comprising: a numerically controlled oscillator circuit that is arranged to provide an accumulation signal that is determined by successive accumulation of a control value in response to an edge transition in the system clock, wherein the control value is greater than one; a predictive multi-phase clock generator circuit that is arranged to provide multiple clock phase signals, wherein each of the multiple clock phase signals is determined by sub-accumulation of a divided version of the control value according to a respective scaling factor, and wherein a resolution associated with each of the multiple clock phase signals corresponds to the resolution of the system clock divided by N, where N is a multiplication factor; and an edge detector circuit that is arranged to evaluate the multiple clock phase signals to provide edge detection signals, wherein the edge detection signals each identify an edge transition between two adjacent clock phases from multiple clock phases.