Patent ID: 7009586

Claim:
A method for driving a plasma display panel for achieving an n-bit gradation display, comprising: dividing each field of each line into n subfields (n is a positive integer) of a least 2; dividing a first H period (H is a horizontal scan period) of each of the subfields into n equal regions; setting an address period in one of the regions of each of the subfields, the regions in which the address periods are set being different from one another in time order; and setting a time length of each sustain pulse applied in a sustain period which is subsequent to the region where the address period is set, to be 1/n times or k/n (k is an integer of 2 or more) times that of the H period, wherein a priming period which is precedent to the address period is set in the region in which the address period is set in each of the subfields.