Patent ID: 7478222

Claim:
A data processing method comprising: providing a first set of cells, the first set including (a) an input cell, (b) an output cell, and (c) a series of at least one interior cell providing an acyclic data processing path from the input cell to the output cell; providing a second set of cells, the second set including (a) an input cell, (b) an output cell, and (c) a series of at least one interior cell providing an acyclic data processing path from the input cell to the output cell; providing memory capable of presenting configuration instructions to a plurality of cells in response to a configuration code; presenting first data to the input cells; presenting a first configuration code to memory associated with the input cells; advancing the first data in tandem through ranks of the sets of cells as first processed data; and advancing the configuration code to memory associated with a rank of the sets of cells in tandem with the first processed data advancing to the rank; wherein the interior cell of the first set of cells receives two signals from an upstream adjacent cell within the first set of cells and one signal from an upstream cell in the second set of cells; and wherein the interior cell of the second set of cells receives at least two signals from an upstream adjacent cell within the second set of cells and one signal from an upstream cell in the first set of cells.