Patent ID: 8559244

Claim:
A non-volatile storage device comprising: a memory array section arrayed with a plurality of non-volatile memory cells for electronically writable data storage; a plurality of bit lines that are connected to respective memory cells and have voltage levels that change according to the data stored in the memory cells; a supply section that supplies a voltage of a reference level to act as a comparator reference when determining data stored in the memory cells; a comparator section that compares the voltage level of the bit line connected to the memory cell subject to reading against the reference level supplied by the supply section; a charging section that, in preparation for comparison by the comparator section, charges the bit line connected to the memory cell subject to reading to the voltage of the reference level supplied by the supply section; and an amplification section that respectively amplifies an electrical signal of the bit line connected to the memory cell subject to reading and a reference signal at the reference level supplied by the supply section, wherein the charging section charges the bit line connected to the memory cell to the voltage level prior to amplification, after amplification, or any combination thereof, by the amplification section.