Patent ID: 6965256

Claim:
An output stage for a current mode circuit, comprising: a first reference transistor for receiving an input current I in comprised of a DC bias component I DC1 and a signal component I sig ; a first sourcing current mirror for producing a mirror of the input current I in at a first output node; a first sinking current mirror for producing a mirror of the input current I in at a second output node, the polarity of current produced by the first sinking current mirror being opposite to the polarity of current produced by the first sourcing current mirror; a second reference transistor for receiving a complementary input current −I in comprised of a DC bias component I DC2 and a signal component −I sig ; a second sourcing current mirror for producing a mirror of the complementary input current −I in at the second output node; and a second sinking current mirror for producing a mirror of the complementary input current −I in at the first output node, the polarity of current produced by the second sinking current mirror being opposite to the polarity of current produced by the second sourcing current mirror.