Patent ID: 7619924

Claim:
A device for reading out memory information storable in a memory, wherein by the memory, in a hold phase, a leakage current, and in a readout phase, a readout current dependent on the memory information is providable, comprising: a capacitance comprising a first terminal connected to an output of the memory so as to receive a quantity derived from the leakage current and the readout current, wherein a leakage voltage corresponds to a voltage dropping at the capacitance at the end of the hold phase, and a readout voltage corresponds to a voltage dropping at the capacitance at the end of the readout phase; and a comparison circuit comprising a first input connectable to the terminal of the capacitance so as to acquire a first voltage corresponding to the leakage voltage, comprising a second input connectable to the terminal of the capacitance so as to acquire a second voltage corresponding to the reading voltage, and comprising an output configured to output a readout value corresponding to the memory information, dependent on a comparison of the first voltage with the second voltage.