Patent ID: 7812893

Claim:
An active matrix substrate comprising: a scanning signal line; a data signal line; a drain lead-out wiring; a thin film transistor including a gate electrode connected to the scanning signal line, a source electrode connected to the data signal line, and a drain electrode connected to the drain lead-out wiring; a pixel electrode; a storage capacitor upper electrode connected to the drain lead-out wiring and the pixel electrode; an insulating film; and a storage capacitor wiring overlapping with the storage capacitor upper electrode through the insulating film; wherein the storage capacitor wiring includes an extending portion that includes a first region overlapping with the drain lead-out wiring with the insulating film therebetween and a second region that does not overlap with the drain lead-out wiring; and the extending portion is arranged such that the extending portion can be cut at the second region to separate the second region into a first portion connected to the storage capacitor wiring and a second portion not connected to the storage capacitor wiring to isolate a short-circuited portion from the storage capacitor wiring.