Patent ID: 6847105

Claim:
A stacked semiconductor assembly, comprising: a first semiconductor die including an active surface and a backside, said active surface including a plurality of bond pads and at least one redistribution bond pad circuit thereon, said plurality of bond pads electrically connected to integrated circuitry of said first semiconductor die, said at least one redistribution bond pad circuit electrically isolated from said integrated circuitry of said first semiconductor die and including a plurality of redistribution bond pads; a second semiconductor die including an active surface, a backside, and a plurality of bond pads on said active surface thereof, said active surface of said second semiconductor die facing said active surface of said first semiconductor die; and at least one electrical connector extending between at least one bond pad of said plurality of bond pads on said active surface of said second semiconductor die and at least one redistribution bond pad of said plurality of redistribution bond pads on said first semiconductor die.