Patent ID: 7662714

Claim:
A method for forming a semiconductor device, the method comprising: forming a lower metal line layer on top of and in direct contact with a semiconductor substrate; forming an etch stop layer of at least one of SiN, SiC, SiCN, and SiCO, on top of and in direct contact with the lower metal line layer; forming an interlayer dielectric layer on top of and in direct contact with the etch stop layer; forming a plasma layer on top of and in direct contact with the interlayer dielectric layer by treating the surface of the interlayer dielectric layer with plasma at a temperature of 30° C. to 400° C., wherein forming the plasma layer comprises treating the surface of the interlayer dielectric layer with plasma using O 2 gas; forming a photoresist pattern on top of and in direct contact with the plasma layer; removing the plasma layer and the interlayer dielectric layer using the photoresist pattern as a mask to form a via hole exposing the etch stop layer; removing the etch stop layer externally exposing the lower metal line layer; forming a metal material on the plasma layer and in the via hole; forming a first antidiffusion layer on the metal material; removing the first antidiffusion layer, the metal material, and the plasma layer by a CMP process until the interlayer dielectric layer is exposed to form a via contact in the via hole; and forming a second antidiffusion layer over the interlayer dielectric layer and via contact following the CMP process.