Patent ID: 7888724

Claim:
A semiconductor memory device having capacitors, comprising: an elongated active region disposed in a semiconductor substrate and including first and second terminal end portions disposed at opposite ends of the active region; a pair of first landing pads disposed respectively in the first and second terminal end portions of the active region; a second landing pad disposed between the pair of the first landing pads; a pair of lower electrodes of the capacitors disposed respectively over the pair of the first landing pads; and a pair of buried plugs disposed between the pair of the first landing pads and the pair of lower electrodes; wherein vertical centerlines of the pair of buried plugs are horizontally offset from vertical centerlines of the pair of first landing pads along directions parallel to a surface of the substrate and all horizontal cross sections of the pair of buried plugs incompletely intersect all horizontal cross sections of the pair of first landing pads along the directions when viewed from above, and vertical centerlines of the pair of lower electrodes are horizontally offset from the vertical centerlines of the pair of buried plugs along the directions parallel to the surface of the substrate and all horizontal cross sections of the pair of lower electrodes incompletely intersect all horizontal cross sections of the pair of buried plugs along the directions when viewed from above.