Patent ID: 7469398

Claim:
A method for defining valid placement of intellectual property (IP) blocks within a platform application specific integrated circuit comprising the steps of: (A) reading IP recorded information for an intellectual property (IP) block to be placed on a platform application specific integrated circuit, wherein said IP recorded information comprises information regarding a tolerance to variation in one or more parameters of said intellectual property (IP) block, said information regarding said tolerance to variation comprising values defining an amount of variation from an ideal placement with which the IP block still meets a performance specification; (B) extracting device data for said platform application specific integrated circuit; (C) determining one or more valid placement locations on said platform application specific integrated circuit for said intellectual property (IP) block based upon (i) the values defining the amount of variation from the ideal placement with which the IP block still meets the performance specification included in the IP recorded information and (ii) the device data; and (D) displaying a representation of said intellectual property (IP) block overlaid at each of said one or more valid placement location on a floorplan of said platform application specific integrated circuit.