Patent ID: 7834466

Claim:
A structure, comprising: a semiconductor die, wherein the semiconductor die includes an arrangement of die pads on a surface of the semiconductor die comprising; a first row of die pads consisting of a first group of four die pads running in a first direction; a second row of die pads adjacent to the first row consisting of a second group of four die pads running in the first direction, wherein the second row begins at a first offset in the first direction from where the first row begins; a third row of die pads adjacent to the second row comprising a third group of four die pads running in the first direction, wherein the third row begins at a second offset in the first direction from where the second row begins; and a fourth row of die pads adjacent to the third row of die pads comprising a fourth group of four die pads running in the first direction, wherein the fourth row begins at a third offset in the first direction from where the third row begins and the fourth row further comprises an additional die pad; a fifth row of die pads comprising a group of two die pads, wherein the fifth row begins at a fourth offset in the first direction from where the fourth row begins, wherein: the die pads in the first, second, third, fourth, and fifth groups have their centers a first distance apart; the first, second, third, and fourth offsets are equal to the first distance; and the first, second, third, fourth, and fifth rows have centerlines, wherein the centerlines are the first distance apart.