Patent ID: 7424069

Claim:
A reference timing signal apparatus for providing a timing output signal, the reference timing signal apparatus comprising: an oscillator for generating an oscillation output signal in response to a control component of an input control signal, the oscillator having aging and temperature characteristics resulting in variation in oscillation frequency; a difference detector for detecting a difference between the oscillation output signal and an input reference timing signal when the input reference timing signal is available, thereby providing a difference signal; a processor for varying the control component of the input control signal applied to the oscillator in accordance with the difference detected by the difference detector and a frequency dependent element relating to the oscillator, the frequency dependent element being provided in accordance with a characteristic model that is updateable in accordance with the difference signal provided by the difference detector when the input reference timing signal is available, a frequency of the oscillation output signal generated by the oscillator being controlled in accordance with the varied control component of the input control signal, wherein the processor includes: a first pre-processing filter for filtering the difference signal to provide a first filtered output signal; a first processing unit for updating a first parameter of a first characteristic model relating to the aging characteristic of the oscillator in response to the first filtered output signal; a second pre-processing filter for filtering a combined input signal of the difference signal and the first filtered output signal to provide a second filtered output signal; a second processing unit for updating a second parameter of a second characteristic mode relating to the temperature characteristic of the oscillator in response to the second filtered output signal, thereby providing a second processed output signal; and a signal combining unit for combining the first and second processed output signals to provide a combined processed signal; and a difference processing unit for causing the difference to be offset before being applied to the processor and for compensating the offset of the processor output.