Patent ID: 8436659

Claim:
An electronic comparator circuit comprising: a first transistor having a first terminal, a second terminal, and a control terminal, wherein the control terminal of the first transistor is configured to receive an input voltage; a second transistor having a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second transistor is coupled to the first terminal of the first transistor; a reference generator circuit, wherein the reference generator circuit has (i) an input that is coupled to the control terminal of the first transistor, and wherein the input of the reference generator circuit is configured to receive the input voltage, and (ii) an output that is coupled to the control terminal of the second transistor, wherein the input voltage transitions from a first voltage level to a second voltage level, such that (i) the first voltage level and the second voltage level respectively form a minimum value and a maximum value of the input voltage, (ii) the first voltage level is lower than a threshold voltage, (iii) the second voltage level is higher than the threshold voltage, wherein a voltage difference between the first voltage level and the second voltage level is greater than a safe range of the first transistor between the control terminal and the first terminal, wherein in response to the input voltage being higher than the threshold voltage, the reference generator circuit generates a first reference voltage at the control terminal of the second transistor, wherein the first reference voltage is selected such that a difference between (i) the first reference voltage and (ii) the first voltage level is substantially equal to half of a difference between (i) the first voltage level and (ii) the second voltage level, and wherein in response to the input voltage being lower than the threshold voltage, the reference generator circuit generates a second reference voltage, which is lower than the first reference voltage, at the control terminal of the second transistor, wherein the second reference voltage is selected such that a difference between (i) the second reference voltage and the (ii) first voltage level is substantially less than half of the difference between (i) the first voltage level and (ii) the second voltage level.