Patent ID: 8153462

Claim:
A method of manufacturing a liquid crystal display device, comprising: forming a gate line and a gate electrode on a substrate, the gate electrode in a switching region of the substrate; forming a gate insulating layer on the gate line and the gate electrode; forming an intrinsic amorphous silicon layer, an impurity-doped amorphous silicon layer and a copper group material layer which are sequentially located on the gate insulating layer, the copper group material being one of copper and copper alloy; forming first and second photoresist patterns on the copper group material layer, wherein the first photoresist pattern corresponds to the switching region and includes first to third portions, wherein the third portion is between the first and second portions and has a thickness less than a thickness of the second photoresist pattern and the first and second portions, and wherein the second photoresist pattern corresponds to a data region of the substrate; patterning the copper group material layer using the first and second photoresist patterns to form a source-drain pattern below the first photoresist pattern and a data line below the second photoresist pattern; ashing the first and second photoresist patterns to remove the third portion, whereby a copper oxide film is formed at portions of the data line and the source-drain pattern exposed between the ashed first and second photoresist patterns and between the ashed first and second portions; deoxidizing or removing the copper oxide film; performing a plasma treatment to change the exposed portions of the data line and the source-drain pattern into a copper compound after deoxidizing or removing the copper oxide film; removing the copper compound using a copper compound removing solution to form source and drain electrodes below the ashed first and second portions, respectively, wherein the copper compound removing solution substantially has no reaction with the copper group material; dry-etching a portion of an ohmic contact layer between the source and drain electrodes using the source and drain electrodes as an etching mask, the ohmic contact layer formed by patterning the impurity-doped amorphous silicon layer; and forming a pixel electrode connected to the drain electrode.