Patent ID: 7935568

Claim:
A method of fabricating a microelectronic unit, the method comprising: assembling a front face of a semiconductor chip with a cover element through a standoff structure disposed along the perimeter of the front face of the semiconductor chip to form a unit, the semiconductor chip including a rear face remote from the front face of the semiconductor chip, the unit having an exterior major surface parallel to the front face of the semiconductor chip and which includes at least a portion of the rear face of the semiconductor chip, the semiconductor chip including a plurality of semiconductor devices, a first insulative layer overlying the front face of the semiconductor chip, and a plurality of conductive features overlying the first insulative layer and being conductively connected to the plurality of semiconductor devices, the semiconductor chip including a plurality of transverse surfaces that extend from the exterior major surface of the unit and which coincide with a plurality of sloped edges of the semiconductor chip that extend from the perimeter of the rear face of the semiconductor chip toward the first insulative layer; electrodepositing a second insulative layer onto the plurality of sloped edges of the semiconductor chip and at least a portion of the exterior major surface; and forming a plurality of conductive traces onto the second insulative layer along portions of the plurality of sloped edges of the semiconductor chip and the exterior major surface, the plurality of conductive traces being connected to the end portions of the at least some of the plurality of conductive features.