Patent ID: 7456094

Claim:
A method for manufacturing a semiconductor device comprising the steps of: providing a substrate comprising a lateral field effect transistor comprising a drain region and a source region arranged in said substrate, depositing a first insulating layer on top of said substrate, forming at least one window structure in said first insulating layer on top of said drain and source region, respectively, depositing a barrier metal layer within said window structures, depositing a second insulating layer on top of said substrate, forming vias within said second insulating layer on top of said barrier metal layer, filling said vias with metal, planarizing the surface, depositing a runner structure over said vias on said surface, and forming either a substrate via within said source area reaching from the top of said substrate to the bottom of said substrate before depositing said barrier metal layer or a sinker reaching from a surface of the substrate located at the source barrier metal layer to the bottom of the substrate.