Patent ID: 8618586

Claim:
A semiconductor device comprising: a first logic element; a second logic element; a third logic element; a first transistor comprising a first terminal, a second terminal, and a gate; a second transistor comprising a first terminal, a second terminal, and a gate; a third transistor comprising a first terminal, a second terminal, and a gate; a fourth transistor comprising a first terminal, a second terminal, and a gate; a fifth transistor comprising a first terminal, a second terminal, and a gate; and a capacitor, wherein: an input terminal of the first logic element is electrically connected to the second terminal of the first transistor and the first terminal of the second transistor, an output terminal of the first logic element is electrically connected to an input terminal of the second logic element and the first terminal of the third transistor, an output terminal of the second logic element is electrically connected to the second terminal of the second transistor, the second terminal of the third transistor is electrically connected to the first terminal of the fifth transistor, the second terminal of the fifth transistor is electrically connected to an output terminal of the third logic element, an input terminal of the third logic element is electrically connected to the second terminal of the fourth transistor and the capacitor, the first terminal of the fourth transistor is electrically connected to the first terminal of the first transistor, and a channel formation region of the fourth transistor comprises an oxide semiconductor comprising at least In and Zn.