Patent ID: 7871881

Claim:
A method for fabrication of a monolithically integrated SOI substrate capacitor, comprising the steps of: forming a trench filled with insulating material in a monocrystalline layer of silicon arranged on top of a layer of an insulating material, wherein said trench reaches down to said layer of insulating material, and surrounds a region of said monocrystalline layer of silicon, doping said region of said monocrystalline layer of silicon, forming a layer region of an insulating material on top of a portion of said region of said monocrystalline layer of silicon, forming a layer region of doped silicon on top of said layer region of insulating material, and forming an outside sidewall spacer of an insulating material on top of said region of said monocrystalline layer of silicon, said outside sidewall spacer surrounding said layer region of doped silicon to provide an isolation between said layer region of doped silicon and exposed portions of said region of said monocrystalline layer of silicon, wherein said region of said monocrystalline layer of silicon, said layer region of an insulating material, and said layer region of doped silicon constitute a lower electrode, a dielectric, and an upper electrode of said monolithically integrated SOI substrate capacitor.