Patent ID: 7015528

Claim:
A semiconductor device comprising: a semiconductor substrate assembly comprising: a semiconductor wafer; at least first and second doped areas in the wafer; a first contact pad electrically coupled to the first doped area and a second contact pad electrically coupled to the second doped area; a digit line contact plug portion comprising a lower surface and an upper surface wherein the upper surface is further away from the semiconductor substrate than the lower surface, and the lower surface contacts the first contact pad; a capacitor storage node comprising a lower surface and an upper surface wherein the upper surface of the storage node is further away from the semiconductor substrate than the lower surface of the storage node and is at least as far away from the semiconductor substrate as the upper surface of the digit line contact plug portion; and a dielectric layer interposed between the digit line contact plug portion and the capacitor storage node, and which contacts both the digit line contact plug portion and the capacitor storage node.