Patent ID: 8114732

Claim:
A method for forming a non-volatile memory structure, the method comprising: providing a semiconductor substrate including a surface region; forming a gate dielectric layer overlying the surface region; forming a polysilicon gate structure overlying the gate dielectric layer; forming an undercut region underneath the polysilicon gate structure in a portion of the gate dielectric layer; subjecting the polysilicon gate structure to an oxidizing environment to cause formation of a first silicon oxide layer overlying a periphery of the polysilicon gate structure; forming an aluminum oxide material overlying the polysilicon gate structure filling the undercut region, the aluminum oxide material being formed by depositing a first aluminum oxide layer overlying the first silicon oxide layer, depositing a nanocrystalline silicon material overlying the first aluminum oxide layer and depositing a second aluminum oxide layer overlying the nanocrystalline silicon material; subjecting the aluminum oxide material to a selective etching process while maintaining the aluminum oxide material in an insert region in a portion of the undercut region; and forming a sidewall spacer structure overlying a side region of the polysilicon gate structure.