Patent ID: 7075337

Claim:
A single event upset immune device, comprising: a first keeper circuit including a first precharge node adapted to receive a first precharge signal, a first output node, and a first control node, the first keeper circuit operable to develop a first data output signal on the output node responsive to the precharge signal applied to the first precharge node and operable during a precharge mode to maintain the precharge node at a first voltage level responsive to a first control signal applied to the control node, and the first keeper circuit further operable during an evaluation mode to drive the precharge node to either the first voltage level or a second voltage level responsive to a data input signal; and, a second keeper circuit including a second precharge node adapted to receive a second precharge signal, a second output node coupled to the first control node, and a second control node coupled to the first output node, the second keeper circuit operable to develop a second data output signal on the second output node responsive to the second precharge signal, the second data output signal being applied as the first control signal to the first control node, and the second keeper operable during the precharge mode to maintain the second precharge node at the first voltage level responsive to the first data output signal on the first output node, and the second keeper circuit further operable during the evaluation mode to drive the second precharge node to the same first or second voltage level as the first precharge node responsive to a second data input signal.