Patent ID: 7632754

Claim:
A method comprising: forming an interlayer insulation film over a semiconductor substrate; forming a trench exposing at least a portion of the semiconductor substrate by using a selective etching process; and forming a diffusion barrier layer over the interlayer film and an inside wall of the trench by using a plasma enhanced atomic layer deposition process in which a high frequency power generator is set to a specific frequency, and 50 to 150 sccm of H 2 gas and 20 to 100 sccm of NH 3 gas are injected as a reaction gas, wherein the plasma enhanced atomic layer deposition process is performed with a base pressure in a chamber maintained at 1×10 −8 to 3×10 −7 torr, and wherein the plasma enhanced atomic layer deposition process further includes an Ar purging step, wherein a vacuum purging step is started immediately after the Ar purging step is terminated.