Patent ID: 7629221

Claim:
A method for forming a capacitor of semiconductor device, the method comprising the steps of: forming a mold insulating layer on an insulating interlayer provided with a storage node plug, wherein the storage node plug consists of polysilicon and wherein the polysilicon storage plug is formed, on its upper surface, with a metal silicide layer; etching the mold insulating layer to form a hole through which the storage node plug is exposed; forming a metal storage electrode with an interposed WN layer on a hole surface including the exposed storage node plug; removing the mold insulating layer; and forming a dielectric layer and a plate electrode in order on the metal storage electrode, wherein the metal storage electrode with the interposed WN layer has a laminate structure of a first TiN layer, a WN layer and a second TiN layer and wherein the first and second TiN layers are formed by a Chemical Vapor Deposition (CVD) process or an Atomic Layer Deposition ALD) process.