Patent ID: 7853914

Claim:
A method of processing a high fanout signal defined by a source coupled to a plurality of load pins within a circuit design for a target device, the method comprising: determining, via a computer, a plurality of windows encompassing load pins of a high fanout signal of a placed circuit design according to a location of each of the load pins of the high fanout signal on the target device; wherein each of the plurality of windows includes a respective subset of the plurality of load pins of the high fanout signal, and one or more of the subsets includes two or more of the load pins; replicating, via the computer, a source of the high fanout signal resulting in a plurality of sources, wherein each window is associated with one of the plurality of sources of the high fanout signal; via the computer, for each source of the high fanout signal, connecting the source to the load pins of the window associated with the source; and placing the source within the window associated with the source; and outputting the placed circuit design.