Patent ID: 7409328

Claim:
A method of simulating a circuit, comprising: representing the circuit as a hierarchically arranged set of branches, including a root branch and a plurality of other branches logically organized in a graph; the hierarchically arranged set of branches including a first branch that includes one or more driver leaf circuits and a second branch that includes one or more receiver leaf circuits; wherein the first branch and second branch are interconnected in the graph through a third branch at a higher hierarchical level in the graph than the first and second branches; simulating operation of the one or more driver leaf circuits and the one or more receiver leaf circuits, together by using a port connectivity interface, without simulating operation of the third branch to determine a first set of changes in signal conditions shared by the one or more driver leaf circuits and the one or more receiver leaf circuits, wherein the port connectivity interface facilitates communications of dynamic information between the one or more driver leaf circuits and the one or more receiver leaf circuits, and wherein dynamic hierarchical data structures of the one or more driver leaf circuits and the one or more receiver leaf circuits are maintained; and storing simulation results of the one or more driver leaf circuits and the one or more receiver leaf circuits in a memory device.