Patent ID: 8209475

Claim:
A write timeout control method for a flash memory, wherein the flash memory comprises a plurality of data blocks and a plurality of spare blocks, the data blocks comprise a plurality of mother blocks, and the write timeout control method comprises the steps of: receiving a write command and a corresponding starting logical block address from a host; determining an update mode according to a target mother block which is linked to the starting logical block address; determining whether a pre-clean operation is performed on a first mother block, wherein the first mother block is configured as a block to be cleaned; performing a post-clean operation on the first mother block during a first time period when the pre-clean operation is performed on the first mother block; re-configuring the first mother block as a spare block; performing a programming process to write data on the target mother block which is linked to the starting logical block address according to the update mode, wherein the process corresponds to the write command; determining whether the number of the mother blocks exceeds a first threshold; and performing the pre-clean operation on a second mother block during a second time period when the number of the mother blocks exceeds the first threshold, wherein the second mother block is configured as the block to be cleaned.