Patent ID: 8624217

Claim:
An integrated electronic apparatus, having a substantially planar surface, the apparatus comprising: a first conductive electrode region having a length greater than its width and an axis aligned with the length, wherein the first conductive electrode region is a plated trench wall of a first trench aligned parallel to the length, and wherein the width is about 5 nanometers; a second conductive electrode region having an edge oriented at an angle to the axis of the first conductive electrode region, wherein the second conductive electrode region is in a second trench perpendicular to the first trench; an insulator region providing a lateral separation distance between an end of the first conductive electrode region and the edge of the second conductive electrode region, the insulator region comprising at least part of an insulator film and the lateral separation distance is based on the thickness of the insulator film, wherein the thickness of the insulator film ranges from 3 to 20 nanometers, and wherein the insulator film is in the second trench underneath the second conductive electrode region; and a layer of a patterned storage material that at least partially covers the first conductive electrode region and the second conductive electrode region.