Patent ID: 7116539

Claim:
A driver circuit, comprising: a CMOS stage having an input and an output, and a first path terminal and a second path terminal; a first switch coupled between a positive reference and the first path terminal, the first switch operating responsive to a first control signal to selectively block exposure of the CMOS stage to the positive reference; a second switch coupled between a negative reference and the second path terminal, the second switch operating responsive to a second control signal to selectively block exposure of the CMOS stage to the negative reference; a third switch coupled between the first path terminal and ground and operating responsive to the first control signal to selectively protect the CMOS stage during transient operation; a fourth switch coupled between the second path terminal and ground and operating responsive to the second control signal to selectively protect the CMOS stage during transient operation; a first current source coupled between the positive reference and the CMOS stage output; and a second current source coupled between the negative reference and the CMOS stage output.