Patent ID: 7358144

Claim:
A method for fabricating a semiconductor device, the method comprising: (a) forming a device isolation structure in a semiconductor substrate having a pad insulating film to define a storage node contact region, wherein the device isolation structure includes a stacked structure of a first oxide film, a nitride film, and a second oxide film; (b) etching a portion of the device isolation structure to define a bit line contact region and expose the semiconductor substrate; (c) etching the nitride film exposed in the bit line contact region to form an under-cut space for a gate channel in the device isolation structure which is adjacent to the bit line contact region; (d) forming a Selective Epitaxial Growth (“SEG”) layer using the exposed semiconductor substrate as a seed layer, wherein the SEG layer fills the bit line contact region and the under-cut space; (e) removing the second oxide film of the device isolation structure to define a recess, the recess defining a gate region; (f) forming a gate insulating film within the recess; (g) forming a gate conductive layer over the gate insulating film, the gate conductive layer substantially filling the recess; (h) providing a patterned hard mask layer over the gate conductive layer; and (i) patterning the gate conductive layer using the patterned hard mask layer to form a gate structure.