Patent ID: 7265400

Claim:
A semiconductor device comprising: an element isolation region formed in a semiconductor substrate to electrically isolate an element region where an element is to be formed; a gate insulating film formed on the semiconductor substrate in the element region; a gate electrode formed on the gate insulating film; source/drain regions formed to be separated from each other in a surface region of the semiconductor substrate, the source/drain regions sandwiching a channel region formed below the gate insulating film; gate sidewall films formed on two side surfaces of the gate electrode; and silicide films formed on the source/drain regions so as to be separated from the element isolation region in a section parallel to a channel length direction, wherein the silicide films extend from the gate sidewall film in the channel length direction and a channel width direction toward the element isolation region, the silicide films do not contact the element isolation region on the source/drain regions in the section parallel to the channel length direction, and the silicide films contact the element isolation region in a section parallel to the channel width direction.