Patent ID: 7190293

Claim:
A sigma-delta analog-to-digital converter arrangement comprising: first translating sigma-delta analog-to-digital converter for receiving an analog signal for translation from an input bandwidth and input frequency to a reduced bandwidth frequency band with a first phase shift and conversion to a first digital signal; first mixer reverse frequency translating a processed first digital signal; second translating sigma-delta analog-to-digital converter for receiving the analog signal for translation from an input bandwidth and input frequency to a reduced bandwidth frequency band with a second phase shift and conversion to a second digital signal; second mixer reverse frequency translating a processed second digital signal; and a summer for summing reverse frequency translated processed digital signals to produce a digital output signal at the input bandwidth and input frequency wherein the first and second translating sigma-delta analog-to-digital converters comprise switched capacitors arranged to use switching sequences that produce reduced third and fifth harmonics in the digital output signal.