Patent ID: 8427457

Claim:
A phase-calibration circuit for calibrating a target circuit, comprising: a pattern generator, for generating a clock pattern and a data pattern for the target circuit; a phase adjuster, for receiving a first clock and a first data output from the target circuit, and adjusting a phase relationship between the first clock and the first data according to a control data, so as to output a second clock and a second data; a rotate register unit, for providing the control data to the phase adjuster and changing the control data according to a predetermined timing; a detector unit, coupled to the phase adjuster, for detecting a phase relationship between the second clock and the second data to output a detection result; and an optimization unit, coupled to the detector unit and the rotate register unit, for recording the control data output from the rotate register unit according the detection result to select one of the control data as a calibration control data, and controlling the rotate register unit to output the calibration control data to the phase adjuster.