Patent ID: 7531381

Claim:
A method for fabricating a quad flat no-lead package structure, comprising: providing a wafer; forming a plurality of metal blocks on the wafer, wherein the step of forming the metal blocks comprises: forming a metal layer on the wafer; forming an etching stop layer between the metal layer and the wafer; and patterning the metal layer to form the metal blocks, wherein the step of patterning the metal layer comprises: forming a patterned photoresist layer on the metal layer; etching the metal layer to form the metal blocks using the patterned photoresist layer as a mask; and removing the patterned photoresist layer; forming an interconnect layer covering the metal blocks, wherein the interconnect layer includes a plurality of vias connecting to the metal blocks and a plurality of contact pads on a top surface of the interconnect layer, wherein the contact pads are electrically connected to the metal blocks through the vias; disposing at least a chip on the interconnect layer, wherein the chip includes a plurality of bonding pads corresponding to the contact pads; and removing the wafer to expose bottom surfaces of the metal blocks.