Patent ID: 7816194

Claim:
A method of manufacturing a thin film transistor (TFT), comprising: providing an insulation substrate; forming a first metal layer on the insulation substrate and defining a gate and a storage capacitance electrode by a first photolithographic etching process; forming a gate insulation layer, an active layer, and an ohmic contact layer sequentially on the insulation substrate having the first metal layer, and subsequently defining an island semiconductor structure by a second photolithographic etching process and etching a part of the gate insulation layer exposed out of the island semiconductor at the same time, wherein a thickness of the gate insulation layer exposed out of the island semiconductor is reduced to ⅓˜⅔ of a thickness of the gate insulation layer covered by the island semiconductor; forming a second metal layer on the insulation substrate having the island semiconductor, defining a source and a drain by a third photolithographic etching process, and applying the second metal layer as a mask for etching the ohmic contact layer so as to form a thin film transistor back channel region; forming a passivation layer on the insulation substrate having the source and the drain, defining a first contact hole by a fourth photolithographic etching process to expose a part of the drain; and forming a transparent conductive layer on the insulation substrate having the contact hole, defining a pixel electrode by a fifth photolithographic etching process for the pixel electrode to cover on the storage capacitance electrode and for the pixel electrode and the drain to electrically connect via the first contact hole.