Patent ID: 7936007

Claim:
A field effect transistor comprising: a semiconductor region of a first conductivity type having an upper surface and a lower surface, the lower surface of the semiconductor region extending over and abutting a substrate; well regions of a second conductivity type disposed within the semiconductor region; source regions of the first conductivity type disposed in the well regions; a gate electrode extending over each well region and overlapping a corresponding one of the source regions, each gate electrode being insulated from the underlying well region by a gate dielectric; at least one LDD region of the first conductivity type disposed in the semiconductor region between every two adjacent well regions such that the at least one LDD region is in contact with the two adjacent well regions between which it is disposed; and a sinker region disposed in the semiconductor region directly underneath the at least one LDD region such that the at least one LDD region and the sinker region are positioned along a vertical orientation between the upper and lower surfaces of the semiconductor region, the sinker region having a higher dopant concentration than the at least one LDD region, wherein a portion of the sinker region extends laterally in the semiconductor region underneath the gate electrode and beyond an edge of the gate electrode.