Patent ID: 8331161

Claim:
A semiconductor memory device, comprising: a plurality of data output pads to be electrically connected to corresponding package pins in a packaging process; and a swap controller connected between the plurality of data output pads and a plurality of output lines that output memory-related unique information in a specific operation mode, the swap controller configured to control a swap according to preset swap program information when a swap is needed to match the data output pads to the package pins, wherein the swap controller includes: a multiplexing unit having a plurality of multiplexers for every byte, each of the multiplexers connected to every predetermined number of the plurality of output lines, and swap correction units configured to generate multiplexing selection signals according to the preset swap program information and to apply the multiplexing selection signals to the plurality of multiplexers to control the swap among the data output pads, the preset swap program information allowing a bit swap within one byte or a byte swap.