Patent ID: 8110923

Claim:
A manufacturing method of a semiconductor device, comprising: preparing a semiconductor substrate having an integrated circuit; providing a plurality of connection pads on the semiconductor substrate; forming a dielectric film having a plurality of first contact holes, through which the connection pads are exposed, on the semiconductor substrate and the connection pads; forming connection wires having a predetermined pattern on the dielectric film such that the first contact holes are filled with the connection wires and the connection wires are electrically connected to the connection pads; forming a surface resin layer to cover the connection wires, the surface resin layer having a plurality of second contact holes, through which surfaces of the connection wires are partially exposed, in a region corresponding to a perimeter of the semiconductor substrate; and forming a metal film over at least bottoms of the second contact holes, and simultaneously forming a display unit having a plurality of first through holes to represent identification information in a region corresponding to a center area of the semiconductor substrate on the surface resin layer.