Patent ID: 7078820

Claim:
A semiconductor apparatus comprising: a semiconductor chip having a circuit pattern disposed thereon; a plurality of solder bumps formed on said semiconductor chip and connecting to said circuit pattern, said solder bumps forming spaces therebetween; a resin film disposed on said semiconductor chip and directly contacting said solder bumps, said resin film being disposed in the spaces between solder bumps such that upper surfaces of said solder bumps protrude from said resin layer; wherein said upper surfaces of said solder bumps are cleaned of impurities; a eutectic solder layer disposed on said cleaned upper surfaces of said solder bumps; a mounting board; a plurality of lands formed on said mounting board and aligned opposite said solder bumps; and a precoated solder layer disposed on said lands; wherein said eutectic solder layer of said solder bumps and said precoated solder layer join said upper surfaces of said solder bumps to said lands of said mounting board such that a stacked structure is obtained; wherein a gap is formed between said resin layer and said mounting board of said stacked structure.