Patent ID: 8604534

Claim:
A semiconductor storage device comprising: a charge storage layer formed above a semiconductor substrate with a first insulating film disposed therebetween; a control gate formed above the charge storage layer with a second insulating film disposed therebetween, the control gate including a nickel silicide region; and an insulating film filling a space between adjacent stacked gates of memory cells, each of the stacked gates including the charge storage layer, the second insulating film, and the control gate to configure the memory cells, wherein a side surface of the control gate expands outwardly to have an expanded shape in at least a partial region thereof, and a height of the control gate from a portion at which the side surface thereof starts to expand outwardly to a top of the control gate is greater than a maximum width of the control gate in a region above the portion at which the side surface starts to expand outwardly, and a cavity is formed in each insulating film and a position of an upper end of the cavity is set lower than a position in which the side surface of the control gate starts to expand outwardly.