Patent ID: 8281064

Claim:
A memory system comprising: a nonvolatile memory; and a memory controller that is configured to logically combine data to be written to the nonvolatile memory with a random pattern to generate encoded data and to program the encoded data in the nonvolatile memory, the memory controller comprising: a select code generator that is configured to generate a select code based on a reference value, the reference value being associated with a block in the nonvolatile memory into which the encoded data is programmed; a buffer memory; a plurality of random pattern generators; and a selector that is configured to select an output of one of the random pattern generators as the random pattern responsive to the select code; wherein the memory controller is further configured to change the reference value when the block in the nonvolatile memory that is associated therewith is accessed; and wherein the memory controller is further configured to manage the reference value in the buffer memory, periodically store the reference value managed in the buffer memory to the nonvolatile memory, read the reference value from the nonvolatile memory after a sudden power off, and to compensate the read reference value after the sudden power off.