Patent ID: 7809920

Claim:
An information processor comprising: a first memory circuit; a second memory circuit whose memory capacity is smaller than that of the first memory circuit; an address memory circuit; and a first controller circuit, wherein the address memory circuit stores a first address group and a second address group which are addresses of the first memory circuit and a plurality of pointing addresses which are addresses of the second memory circuit and are provided in accordance with a plurality of addresses included in the first address group and the second address group, wherein the first controller circuit accesses the second memory circuit by use of a corresponding pointing address among the plurality of pointing addresses when an input address for accessing the first memory circuit is included in one or both of the first address group and the second address group, wherein the first address group is formed of cache addresses to the first memory circuit, and wherein the second address group is formed of addresses for defect repair which repair addresses of defects of the first memory circuit.