Patent ID: RE38932

Claim:
A digital demodulator comprising: phase difference data output means for comparing a phase-modulated input signal with a clock signal which is not in synchronization with the carrier wave component of the input signal, and outputting phase difference data which corresponds to the phase difference between the input signal and the clock signal; delaying means for delaying the phase difference data outputted from said phase difference data output means by a predetermined period of time; compensation value hold means for holding a compensation value which corresponds to a phase shift caused by the frequency difference between the carrier wave component and the clock signal; delay detection means for detecting a delay of the phase difference data outputted from said phase difference data output means differential detection means for performing a differential detection using the phase difference data outputted from said phase difference data output means, the compensation value held by said compensation value hold means, and the phase difference data delayed by said delaying means by the predetermined period of time; and demodulation means for demodulating the input signal based on the result of the delay differential detection , ; and addition means and subtraction means perform addition and subtraction, respectively, in accordance with a second clock signal which is in synchronization with information symbol periods.