Patent ID: 8295394

Claim:
A performance monitor for generating a digital error signal based upon an RF input signal and an amplified RF output signal, comprising: a first analog-to-digital converter operable to digitize an in-phase (I) and a quadrature-phase (Q) version of the RF input signal responsive to a first clock signal to provide a first digital I signal and a first digital Q signal; a second analog-to-digital converter operable to digitize an in-phase (I) and a quadrature-phase version of the amplified RF output signal responsive to a second clock signal to provide a second digital I signal and a second digital Q signal; a first adaptive delay filter to delay the first digital I signal and the first digital Q signal to provide a first delayed complex signal according to a first delay; a second adaptive delay filter to delay the second digital I signal and the second digital Q signal to provide a second delayed complex signal according to a second delay; a complex gain matching adder operable to add a complex gain-matching factor to a selected one of the delayed complex signals to provide a gain-matched complex signal; and an adder to add the gain-matched complex signal to a remaining one of the first and second delayed complex signals to provide the digital error signal.