Patent ID: 7249244

Claim:
A processing system comprising: a calculation unit ( 13 ), compriseing at least one port; a storage device, the storage device comprises several banks of registers ( 21 , 22 ), wherein a bank of registers stores words of P/N bits, a data item to be communicated being comprised in one or more words, P and N being integer numbers, N being greater than or equal to 2 and P being a multiple of N; a system for switching between the storage device and the calculation unit, the switching system comprises at least one switching device ( 24 ) associated with each bank of registers and also comprising a common switching device ( 27 ) by means of which the port of the calculation unit can communicate with several registers; the calculation unit is able to communicate with at least two banks of registers by means of the associated switching devices; wherein, at a first time, the calculation unit communicates with i registers for reading or writing a data item of iP/N bits, i being a first integer between 1 and N, and at a second different time, the calculation unit communicates with i registers for reading or writing a data item of iP/N bits, i being a second different integer between 1 and N.