Patent ID: 8044694

Claim:
A semiconductor integrated circuit, comprising: a first inverter circuit which logically inverts a supplied signal and outputs a first inverted signal; a second inverter circuit which logically inverts the first inverted signal output from the first inverter circuit and outputs a second inverted signal; a pass-through/latch selector circuit which electrically connects an output end of the second inverter circuit and an input end of the first inverter circuit with each other at a time of latching, and which electrically shuts off the output end of the second inverter circuit and the input end of the first inverter circuit from each other at a time of pass-through; a capacitive element which includes a first end and a second end, which increases a charge capacity at an output end of the first inverter circuit when the first end is connected to the output end of the first inverter circuit, and which increases a charge capacity at the output end of the second inverter circuit when the second end is connected to the output end of the second inverter circuit; and a malfunction-preventing selector circuit which electrically connects the first end and the second end respectively to the output end of the first inverter circuit and the output end of the second inverter circuit at the time of latching, and which connects the first end and the second end with each other so that voltages at the first and second ends are equalized at the time of pass-through.