Patent ID: 7518188

Claim:
A p-channel MOS transistor, comprising: a monocrystalline silicon substrate; a gate electrode formed on said monocrystalline silicon substrate in correspondence to a channel region therein via a gate insulation film, said gate electrode carrying sidewall insulation films on respective sidewall surfaces thereof; and monocrystalline source and drain regions of p-type formed in said monocrystalline substrate at respective outer sides of said sidewall insulation films, each of said source and drain regions enclosing a polycrystal region of p-type SiGe mixed crystal, said polycrystal region of SiGe mixed crystal accumulating therein a compressive stress, wherein said polycrystal regions of p-type SiGe mixed crystal in said source and drain regions apply a compressive stress to said channel region, said polycrystal regions being formed at respective outer sides of said sidewall insulation films, each of said source and drain regions enclosing said polycrystal region of p-type SiGe mixed crystal being monocrystalline.