Patent ID: 8045573

Claim:
A method of transmitting data within an integrated circuit, said method comprising the steps of: generating a transaction at a master device; dividing said transaction into a plurality of transmission packets; serially transmitting said plurality of transmission packets; serially receiving said plurality of transmission packets; combining said plurality of transmission packets to reform said transaction; and processing said transaction within a slave device; wherein said step of processing within said slave device is dependent upon at least a part of a multi-bit portion of said transaction; said step of dividing allocates bits within said transaction to transmission packets in accordance with a priority ordering with higher priority bits being allocated to transmission packets transmitted before transmission packets containing lower priority bits; bits within said multi-bit portion required by said slave device to commence said step of processing have a higher priority and are allocated to one or more transmission packets to be serially transmitted before one or more transmission packets carrying lower priority bits of said multi-bit portion; and said processing within said slave device responsive to said transaction commences after said transmission packets carrying said higher priority bits of said multi-bit portion have been received at said slave device and before said transmission packets carrying said lower priority bits of said multi-bit portion have been received at said slave device.