Patent ID: 7687361

Claim:
A method of fabricating a transistor in a memory device having a semiconductor substrate, the method comprising the steps of: forming an active area by etching the semiconductor substrate such that two trenches are formed on both sides of the active area and the active area protrudes from the substrate; forming a field oxide layer in each trench to fill the trenches; forming a first recess by etching a portion of the field oxide layer on one side of the active area while leaving unrecessed portions of the field oxide layer from which the active area does not protrude, and forming a second recess by etching a portion of the field oxide layer on the other side of the active area opposite to the one side while leaving unrecessed portions of the field oxide layer from which the active area does not protrude, wherein the first and second recesses are elongated in a common line between the unrecessed portions of the field oxide layer on both sides of the active area and wherein the first and second recesses expose predetermined side portions of the active area; forming a gate insulation layer on the upper surface of the active area and the exposed side portions of the active area; and forming a gate electrode on the field oxide layer along the first and second recesses and on the active area such that the gate electrode crosses a portion of the active area and a portion of the field oxide layer while overlapping a channel area of the active area.