Patent ID: 7639066

Claim:
A method of operating an electrical circuit comprised of a first metal oxide silicon (MOS) n type field effect transistor (NFET) or p type field effect transistor (PFET) and a second MOS NFET or PFET of the same conductivity type as the first NFET or PFET, wherein the drain of the first NFET or PFET is directly connected to the source of the second NFET or PFET, comprising: supplying the gate and source of the first NFET or PFET with respective voltages such that the first NFET or PFET is switched off; and controlling the gate voltage of the second NFET or PFET to be at a level which results in a main leakage current in the first NFET or PFET which causes the drain voltage of the first NFET or PFET to be at a value in relation to a value of a supplied voltage to the gate of the first NFET or PFET, which suppresses GIDL in the first NFET or PFET.