Patent ID: 7023048

Claim:
A nonvolatile semiconductor memory device comprising a memory cell, the memory cell comprising: a first conductivity type well in a silicon substrate; a second conductivity type semiconductor region having at least a pair of a first semiconductor region and a second semiconductor region, the second conductivity type semiconductor region being formed in the first conductivity type well; a first gate insulating layer formed in the silicon substrate in such a manner as to at least cover a gap between the pair of the first and the second semiconductor region; a first gate formed on the first gate insulating layer; a second insulating layer formed to cover the first gate; a second gate formed on the second insulating layer; a third gate formed alongside the first gate in the silicon substrate with being insulated from the first gate and the second gate with the third insulating layer and a multilayer of at least the second insulating layer and a fourth insulating layer; and a fifth insulating layer formed between the first gate and another first gate in a direction intersecting a direction in which the first gate and the third gate are aligned: wherein: one of surfaces of the first gate, which faces the second gate with the second insulating layer being formed therebetween, has a dented shape as viewed in sections which are perpendicular to the silicon substrate, one of the sections being taken in a direction extending from the first gate to the third gate and the other section being taken in a direction extending from the first gate to the fifth insulating layer.