Patent ID: 7968400

Claim:
A method of forming a N channel MOSFET (NMOS) comprising the steps of: a) growing a P − epitaxial layer on a P + substrate; b) forming a source and a drain in said epitaxial layer and located on opposite sides of a gate oxide layer lying on said epitaxial layer; c) forming a gate on said gate oxide layer; and d) after a single masking operation forming: a first N type upper buffer layer extending from under said source laterally to a position between a first edge of said gate closest to said source at a top surface of said epitaxial layer and a middle of said gate; a second N type upper buffer layer extending from under said drain laterally to a position between a second edge of said gate closest to said drain at said top surface of said epitaxial layer and said middle of said gate; a first P type lower bulk layer extending from under said first N type buffer layer laterally to a position under said gate at said top surface of said epitaxial layer which is closer to said drain than to said source; and a second P type lower bulk layer extending from under said second N type buffer layer laterally to a position under said gate at said top surface of said epitaxial layer which is closer to said source than to said drain, said first and second P type bulk layers overlying each other in a region under said gate.