Patent ID: 8916924

Claim:
A semiconductor device, comprising: a plurality of protruding strips vertically formed on a substrate, wherein each protruding strip is a multilayer structure, comprising a plurality of conductive layers and a plurality of insulating layers alternately stacked on an insulation surface of the substrate; a plurality of charging trapping layers formed outsides of the protruding strips, and lined between the adjacent protruding strips; a plurality of conductive layers formed outsides of the charge trapping layers and lined between the adjacent charging trapping layers; a plurality of patterned hard mask layers, formed on sidewalls of the conductive layers and lined between the adjacent conductive layers, wherein the patterned hard mask layers are separated from the charging trapping layers by the conductive layers; and a dielectric layer, positioned between the conductive layers and between the protruding strips, and the dielectric layer filling spaces between the patterned hard mask layers.