Patent ID: 8649228

Claim:
An output driver, comprising: a first pull-up circuit that pulls an output node up to a supply voltage in N successive intervals in response to N pull-up control signals having different phases; a first pull-down circuit that pulls the output node down to a ground voltage in M successive intervals in response to M pull-down control signals having different phases; a first group of delay units for delaying the N pull-up control signals; a second group of delay units for delaying the M pull-down control signals; a second pull-up circuit pulling-up the output node to the supply voltage in N successive intervals in response to the delayed N pull-up control signals having different phases; and a second pull-down circuit pulling-down the output node to the ground voltage in M successive intervals in response to the delayed M pull-down control signals having different phases, wherein N=2 and the N pull-up control signals have a phase difference of 90°, or M=2 and the M pull-down control signals have a phase difference of 90°.