Patent ID: 8368422

Claim:
A testing circuit comprising: a plurality of off-chip drivers (OCD), each off-chip driver comprising: a pull-up driver coupled to a power supply; a pull-down driver coupled between the pull-up driver and ground; and a through-silicon via (TSV), coupled between the pull-up driver and the pull-down driver; a plurality of pre-drivers, each pre-driver of the plurality of pre-drivers respectively coupled to one of the plurality of off-chip drivers; an IREF test pad coupled to the plurality of pre-drivers; a plurality of input buffers (IB), each of the plurality of input buffers comprising a positive input and a negative input, wherein the positive input of each of the plurality of input buffers is respectively coupled to one of the plurality of off-chip drivers through the through-silicon via of each respective off-chip driver; a VREF test pad coupled to the negative input of each of the plurality of input buffers; and a scan out test pad, coupled to the plurality of input buffers.