Patent ID: 7895419

Claim:
A computer method comprising: fetching a rotate then operate instruction in a program, the rotate then operate instruction defined for a computer architecture, the rotate then operate instruction comprising an opcode field, a first register field (R 2 ), a second register field (R 1 ), an I3 field comprising a T bit and a starting bit position, an I4 field comprising an ending bit position and an I5 field comprising a rotate amount, wherein the first register field specifies one of a plurality of general registers, wherein the second register field specifies one of the plurality of general registers; executing the rotate then operate instruction comprising: obtaining a first operand from a first register specified by the first register field; rotating the first operand by a rotate amount to produce a rotated value wherein the rotation effectively shifts bits towards a higher order position and effectively shifts bits out of the high order bit position into the low order bit position; selecting a n bit portion of the rotated value, wherein the n bit portion of the rotated value begins at a bit position specified by the I3 field and ends at a bit position specified by the I4 field; obtaining a second operand from a second register specified by the second register field; performing a Boolean operation between the selected n bit portion of the rotated value, and corresponding n bits of the second operand, wherein the corresponding n bits of the second operand begin at the bit position of the second operand specified by the I3 field and end at the bit position of the second operand specified by the I4 field, the Boolean operation producing an n bit result portion corresponding to the selected n bit portion, the Boolean operation specified by the rotate then operate instruction; responsive to the T bit being 0, saving the n bit result portion in an n bit second operand portion of the second operand in the second register, the n bit second operand portion corresponding to bit positions of the selected portion, wherein all other bits of the second register other than the n bit second operand portion are unchanged in the second register by the saving operation; and responsive to the selected portion of the rotated value being zero setting a condition code indicating the selected portion of the rotated value is zero; and responsive to the selected portion of the rotated value being other than zero setting a condition code indicating the selected portion of the rotated value is not zero; continuing to a next instruction for execution.