Patent ID: 7449389

Claim:
A method for fabricating a semiconductor comprising: defining a first component region and a second component region in a semiconductor body; forming a first epitaxial layer through the first component region and the second component region; forming a second epitaxial layer over the first epitaxial layer, including configuring the physical dimensions of a first active zone of the first component region independent of a second active zone of the second component region via the first epitaxial layer and the second epitaxial layer; forming a radio-frequency transistor in the first component region; forming a varactor in the second component region, defining the first active zone to be a collector zone of the radio-frequency transistor; and defining the second active zone to be a cathode zone of the varactor; determining a collector width of the radio-frequency transistor by a thickness of the second epitaxial layer; and determining a cathode width of the varactor by the first epitaxial layer and the second epitaxial layer.