Patent ID: 8842787

Claim:
A receiver comprising: a converter circuit configured to: receive an analog signal corresponding to a selected channel; select a sample clock frequency from a plurality of different sample clock frequencies, the plurality of different sample clock frequencies being integer divisions of a master clock signal; determine whether a sample clock signal, generated with the selected sample clock frequency, has overtones outside of a predetermined bandwidth that includes a frequency of the selected channel; in response to the sample clock signal having overtones outside of the predetermined bandwidth, convert the analog signal to a digital signal at a conversion rate based on the sample clock signal; and in response to the sample clock signal having overtones inside of the predetermined bandwidth, select another sample clock frequency from the plurality of different sample clock frequencies and convert the analog signal to the digital signal at a conversion rate based on the another sample clock signal, the another sample clock signal generated with the another sample clock frequency, where the conversion rate based on the sample clock signal is the same as the conversion rate based on the another sample clock frequency.