Patent ID: 7927899

Claim:
A method of fabricating a liquid crystal display panel comprising the step of: forming a gate line and data line on a thin film transistor array substrate in such a manner as to cross each other; forming a gate insulating film between the gate line and the data line on the thin film transistor array substrate; forming a thin film transistor adjacent to the crossing of the gate line and the data line on the thin film transistor array substrate, the thin film transistor having a source, drain and gate electrodes; forming a pixel electrode connected to the thin film transistor on the thin film transistor array substrate; forming a protective film for protecting the thin film transistor on the thin film transistor array substrate; forming a pad connected to one of the gate line and the data line in a pad area of the thin film transistor array substrate; forming a transparent electrode pattern on the data line, source electrode and drain electrode of the thin film transistor array substrate; joining a color filter array substrate to the thin film transistor array substrate so that the color filter substrate does not overlap the pad area of the thin film transistor array substrate; and etching at least one of the gate insulating film and protective film in the pad area using the color filter array substrate as a mask; forming a first conductive pattern group, including a gate electrode, the gate line and a gate pad electrode, on the thin film transistor array substrate; forming a gate insulating film on the thin film transistor array substrate having the first conductive pattern group; forming a second conductive pattern group, including the data line with the source and drain electrode integral to the data line and a lower data pad electrode, and a semiconductor pattern on the gate insulating film such that both the second conductive pattern group and the semiconductor pattern have the same pattern; forming a third conductive pattern group, including a transparent electrode pattern and the pixel electrode, on the thin film transistor array substrate having the second conductive pattern group and the semiconductor pattern; and forming a protective film over thin film transistor array substrate having the third conductive pattern group, selectively exposing the gate pad electrode by exposing the gate insulating film and the protective film.