Patent ID: 7646717

Claim:
A packet scheduling device, comprising: a plurality of queues, each queue including at least one packet to be transmitted onto a link; a processor, coupled to the plurality of queues; and a plurality of programming instructions stored on a computer-readable storage medium, wherein the plurality of programming instructions, if executed by the processor, enable the processor to update a credit or deficit value corresponding to each queue in response to transmission of the at least one packet from each queue, by for each queue having a corresponding credit value, when the packet length is greater than the credit value, subtracting the credit value from the packet length and replacing the credit value with the result, and when the packet length is smaller than the credit value, subtracting the packet length from the credit value and replacing the credit value with the result; and for each queue having a corresponding deficit value, adding the deficit value to the packet length and replacing the deficit value with the result.