Patent ID: 7738072

Claim:
A LCD array substrate, comprising: at least a first conductive line on a substrate, wherein the first conductive line has at least a crossing region; at least two second conductive lines on the substrate, wherein the second conductive lines are separately located at two sides of the crossing region and perpendicular to the first conductive line, and the first conductive line and the second conductive lines define a plurality of pixel areas; at least a signal dielectric layer on the second conductive lines and on the crossing region, wherein the signal dielectric layer on the second conductive lines has a first opening to expose the second conductive lines, and the signal dielectric layer is not disposed on the pixel areas; at least two third conductive lines covering the first conductive line at the two side of the crossing region to form a scan line; at least a fourth conductive line covering the signal dielectric layer and the first opening to form a data line, wherein the third conductive lines don't electrically connect with the fourth conductive line; at least a transistor, wherein a source electrode of the transistor electrically connects with the fourth conductive line, a gate electrode of the transistor electrically connects with the first conductive line; and at least a pixel electrode, wherein the pixel electrode electrically connects with a drain electrode of the transistor.