Patent ID: 8212331

Claim:
A method for fabricating a backside through-wafer via in a processed wafer, said processed wafer including a substrate, at least one interlayer dielectric layer situated over said substrate, and at least one interconnect metal segment situated over said at least one interlayer dielectric layer, said method comprising steps of: forming a through-wafer via opening through said substrate from a backside of said substrate; extending said through-wafer via opening through said at least one interlayer dielectric layer after said at least one interlayer dielectric layer has been formed and stopping on a bottom surface of said at least one interconnect metal segment; forming a metal layer conformally in said through-wafer via opening, said metal layer not completely filling said through-wafer via opening; wherein said metal layer in said through-wafer via opening forms an electrical connection to said substrate, and wherein said metal layer is in electrical contact with said at least one interconnect metal segment; and wherein said metal layer is in electrical contact with a bond pad, said bond pad capable of being in electrical contact with at least one device not formed in said substrate.