Patent ID: 8655634

Claim:
A computer system, comprising: at least one processing unit; memory operably associated with the at least one processing unit; a modeling system for modeling a load effect of a load channel connected component (CCC) in a transistor network that is storable in memory and executable by the at least one processing unit, the modeling system comprising: an analysis system that determines allowable logical state and transition functions for nets in a load CCC for a transition or state of a driving CCC for which a load condition is being determined; a trace system that traverses paths in the load CCC from a set of input terminals; and an element replacement system that replaces circuit elements in the load CCC to create a modeled CCC, wherein a circuit element replacement is based on a type of circuit element encountered along a trace, and state and transition functions of nets connected to an encountered circuit element, wherein the element replacement system: causes field effect transistors (FETs) that remain off during a transition to be replaced by a capacitor; causes FETs that remain on during a transition to be replaced by an RC circuit; and causes FETs that switch during a transition to be kept intact.