Patent ID: 7050063

Claim:
A computer graphics processor system having the capability of mapping texture onto a three dimensional object in a scene being displayed, the system comprising: a texture address calculator for generating texel addresses for a list of primitives being processed; a texture main memory containing an array of texels, each texel having an address and one of N identifiers; a texture cache memory having addresses partitioned into N banks, each bank containing texels transferred from said main memory that have the corresponding identifier; a texture cache controller for determining and requesting the necessary transfer of texels from said texture main memory addresses to said texture cache memory addresses, said cache controller transferring texture data at the main memory access granularity; and a texture cache arbiter for scheduling and controlling the actual transfer of texels from said texture main memory into the texture cache memory and controlling the outputting of texels for each pixel to a interpolating filter from the cache memory, said cache arbiter coupled between said controller and said texture cache memory for determining which texels in the cache memory can be overwritten when new texels are determined to be transferred to said cache memory by said cache controller, said texture cache arbiter transfers said texels from said texture main memory into the cache memory according to a look-ahead algorithm to hide read and write access clock cycles between sequential pixels, wherein the system further includes a span based polygon rasterization scheme so neighboring pixels of a primitive will be processed sequentially.