Patent ID: 7243257

Claim:
A computer system in which a plurality of computers, each including a plurality of processors, are connected to each other, said computer system comprising: a system controller in each said computer for, at a time of a failure within the computer system, disconnecting its own computer from another computer in which said failure has occurred, without informing said its own processors of such failure, wherein said system controller includes an inter-computer read failure detector, and wherein the inter-computer read failure detector comprises: an inter-computer read register registering an identification of an inter-computer read issued by the system controller for any of the computers; an inter-computer read timer measuring an elapse of a pre-specified period of time from when an inter-computer read is issued; a dummy data reply generator for, after a timeout condition upon the elapse of the pre-determined period of time, generating a pre-defined fixed value for the computer issuing an inter-computer read for use as a temporary reply to the read; and a dummy reply timeout setting register for registering a time elapsed before the temporary reply to the read is returned.