Patent ID: 7444727

Claim:
A method for forming embedded capacitors on a printed circuit board, the method comprising: providing a printed circuit board having one or more first electrodes situated on a major surface thereof, a first dielectric layer overlying at least one or more of the first electrodes, one or more second electrodes overlying the first dielectric layer, a second dielectric layer overlying at least one or more of the second electrodes, and one or more third electrodes overlying the second dielectric layer; and abrasively delineating the second dielectric layer and first dielectric layer in one step to define those portions of the first and second dielectric layers that will remain to form multilayer capacitive structures; whereby a first capacitor is formed by a combination of at least one of the first electrodes, the first dielectric layer, and at least one of the second electrodes, and whereby a second capacitor is formed by a combination of at least one of the second electrodes, the second dielectric layer, and at least one of the third electrodes.