Patent ID: 7354817

Claim:
A manufacturing method of a semiconductor device, comprising the steps of: forming a dummy gate electrode on a surface of a semiconductor substrate so as to correspond to a channel region; forming a source region and a drain region by introducing an impurity element of a first conductivity type into said semiconductor substrate using said dummy gate electrode as a mask; forming an insulating film on the surface of said semiconductor substrate so as to cover said dummy gate electrode; polishing said insulating film until said dummy gate is exposed; removing said dummy gate electrode and forming an opening in said insulating film; forming a sidewall film on a sidewall surface of said opening; and forming a punch-through stopper region extending in a direction perpendicular to the surface of said semiconductor substrate by performing ion implantation of an impurity element of a second conductivity type into said semiconductor substrate at least twice with different acceleration voltages using said insulating film and said sidewall film as a mask, wherein the step of forming said punch-through stopper region is performed later than the step of forming said source region and said drain region, wherein, in the semiconductor substrate, a well of the second conductivity type is formed at a distance from the surface of the semiconductor substrate, the source region and the drain region are formed above said well of the second conductivity type at a distance from said well of the second conductivity type in the step of forming the source region and the drain region, and the step of forming the punch-through stopper region is performed such that a bottom of the punch-through stopper region reaches in the vicinity of said well of the second conductivity type.