Patent ID: 7953994

Claim:
A configurable power control module for controlling power dissipation in an architecture comprising: a read only memory (ROM) module for storing a plurality of minimum leakage vectors (MLVs) corresponding to a plurality of peripherals; a main control unit operatively coupled to said ROM module for placing of the plurality of peripherals into a lowest leakage state based on one of a boot-up mode and a normal run mode; a control finite state machine (FSM) module operatively coupled to said main control unit for maintaining operations of said main control unit during said boot-up mode and said normal run mode; a programmable control register bank operatively coupled to said main control unit for controlling the functionality of the power control module through a user programmable instruction; a MLV chain shift unit operatively coupled with said programmable control register bank for shifting one of the plurality of MLVs into a corresponding peripheral; a scan chain logic unit operatively coupled to said MLV chain shift unit for scanning one or more of a Scan In signal, a Scan Enable signal, and a Scan Clock signal; a device peripheral operatively coupled to said scan chain logic unit for interfacing with the plurality of peripherals; and peripheral gating, clock and reset signal generation unit operatively coupled to said device peripheral for generating gating signals from primary inputs of the plurality of peripherals.