Patent ID: 6859074

Claim:
An input/output (I/O) circuit, comprising: an I/O pad; a pull-down transistor device having a first protective transistor, said pull-down transistor device coupled to said I/O pad; a pull-up transistor device having a second protective transistor, said pull-up transistor device coupled to said I/O pad; a first switch coupled to said first protective transistor, said first switch being responsive to a first supply voltage, a second supply voltage, and a reference voltage; a second switch coupled to said second protective transistor, said second switch being responsive to said first supply voltage and said reference voltage; a first self-bias circuit coupled to said first switch wherein said first self-bias circuit uses a voltage at said I/O pad to bias said first protective transistor when both of said first and second supply voltages are powered off; and a second self-bias circuit coupled to said second switch wherein said second self-bias circuit uses said voltage at said I/O pad and an output of said first self bias circuit, to bias said second protective transistor when said first supply voltage is powered off.