Patent ID: 8013968

Claim:
An array substrate for an in-plane switching mode liquid crystal display device, comprising: a gate line on a substrate; a gate insulating layer on the gate line; first and second data lines on the gate insulating layer and crossing the gate line to define a pixel region; a first extending portion on the gate insulating layer and extending from the second data line; a thin film transistor connected to the gate line and the first data line; a passivation layer on the first and second data lines and the thin film transistor, the passivation layer having a first contact hole exposing a drain electrode of the thin film transistor; a first pattern in the pixel region on the passivation layer, the first pattern connected to the drain electrode through the first contact hole and overlapping the first extending portion; a plurality of first electrodes extending from the first pattern, the plurality of first electrodes parallel to the first and second data lines; a second pattern in the pixel region on the passivation layer and parallel to gate line, the second pattern electrically connected to the second data line; and a plurality of second electrodes extending from the second pattern and alternating with the plurality of first electrodes by a first distance between adjacent first and second electrodes, wherein one of the plurality of first electrodes is spaced apart from the second data line by a distance equal to the first distance or more than the first distance and less than double the first distance, and another of the plurality of first electrodes or one of the plurality of second electrodes is spaced apart from the first data line by a second distance narrower than the first distance.