Patent ID: 7045426

Claim:
A method of manufacturing a power MOSFET, comprising: epitaxially growing a drift layer of a first conductivity type on a first conductivity type semiconductor substrate used as a drain layer, said drift layer being doped with impurities having a concentration distribution increasing up to said semiconductor substrate; epitaxially growing a base layer of a second conductivity type on said drift layer; forming a source region of the first conductivity type on said base layer; forming a trench penetrating said source region and said base layer to reach at said drift layer; and forming a trenched gate structure including a gate insulating film and a gate electrode, said gate insulating film having a thin portion facing said base layer and a thick portion facing said drift layer and having a bottom portion reaching into the drain layer, wherein said growing the drift layer comprises: forming a first epitaxial layer of the first conductivity type on said semiconductor substrate with a first impurity concentration; forming a second epitaxial layer of the first conductivity type on said first epitaxial layer with a second impurity concentration lower than the first impurity concentration of said first epitaxial layer; and heat treating said first and second epitaxial layers for smoothing the first and second impurity concentrations.