Patent ID: 6879492

Claim:
An electronic structure, comprising: an internally circuitized substrate having a metallic plane on a first surface of the substrate; and a redistribution structure having N dielectric layers denoted as dielectric layers 1 , 2 , . . . , N, N metal planes denoted as metal planes 1 , 2 , . . . , N, and a microvia structure through the N dielectric layers, wherein N is at least 2, wherein dielectric layer 1 is on the first surface of the substrate and on the metallic plane, wherein metal plane J is on dielectric layer J for J=1, 2, . . . , N, wherein dielectric layer I is on dielectric layer I- 1 and on metal plane I- 1 for I=2, . . . , N, and wherein the microvia structure electrically couples metal plane N to the metallic plane, wherein the microvia structure includes at least one microvia, and wherein each microvia of the at least one microvia is a blind via having an outer wall surface and an end surface with an electrically conductive plating on the outer wall surface and on the end surface such that the electrically conductive plating includes a continuous distribution of electrically conductive material on the outer wall surface along an entire perimeter of the blind via, wherein the N dielectric layers each include a dielectric material having a stiffness of at least about 700,000 psi.