Patent ID: 8483297

Claim:
A system comprising: a fast Fourier transform (FFT) module in which an FFT is implemented; an FFT buffer coupled to the FFT module; a rotation and combination module coupled to the FFT buffer; wherein, in processing an input data signal that is larger than the FFT module, a first portion of the input data signal is transformed by the FFT module and stored in a first portion of the FFT buffer; a second portion of the input data signal is transformed by the FFT module and stored in a second portion of the FFT buffer; the rotation and combination module processes value stored in the first portion of the FFT buffer and the second portion of the FFT buffer to generate domain data; and; a signal controller coupled to the FFT module, the signal controller having a FFT state and a parallel state; wherein, in processing an input data signal being one of a plurality of types of OFDM signal, when the input data signal is larger than the FFT implemented in the FFT module, the signal controller is in the FFT state; when the input data signal is smaller than the FFT implemented in the FFT module, the signal controller is in the parallel state, the input data signal being processed through a plurality of multiplier modules of the FFT module.