Patent ID: 8307053

Claim:
A system comprising: a shared memory maintaining a plurality of code partitions, the code partitions together implementing a feature set for packet processing, each code partition implementing a particular packet processing operation; a plurality of processors each comprising a processor core and an instruction memory loaded with at least one of the code partitions from the shared memory, each processor's processor core configured to: execute at least one loaded code partition; and generate a migration request for transferring packet processing operations from the at least one loaded code partition to another code partition; and a context manager configured to: receive the migration request from the at least one of the loaded code partitions executing within the processor core, wherein the migration request comprises packet context information and identifies a target code partition; attempt to identify an available one of the processors having the target code partition loaded; determine that none of the plurality of processors have the target code partition loaded; reassign one of the plurality of processors to load the target code partition; and communicate the packet context information to the reassigned processor.