Patent ID: 8324634

Claim:
A semiconductor device, comprising: a substrate; a conductive layer deposited on the substrate, the conductive layer being patterned to include a first pattern and a second pattern, the first and second patterns including a major surface and a plurality of grids defined in the major surface, the first pattern including a plurality of first lines between adjacent grids and a connecting portion, the second pattern including at least two first patterns, each of the at least two first patterns being separated by a second line, the connecting portion is being connected to an electrode and adjacent to the second line, wherein the first lines have a different width than the second lines; and an epitaxial layer deposited on the conductive layer, the epitaxial layer including a first layer, an active layer deposited on the first layer, and a second layer deposited on the active layer and covering the grids and the first lines and the second lines between the adjacent grids.