Patent ID: 7424654

Claim:
A method for simultaneously providing a test data block to multiple integrated circuit devices under test, the method comprising: providing a tester, external to the multiple integrated circuit devices, including a tester database; a tester controller in communication with the tester database; a direct memory access (DMA) card including a multi-site mode register, a pin group select register, and a pass/fail register, in communication with the tester controller; a plurality of pin cards in communication with the DMA card via a common bus; and means for communication between the plurality of pin cards and the multiple devices under test; selecting a multi-site testing mode and populating the multi-site mode register with selected testing mode data; populating a pin group select register with pin group selection data thereby selecting a pin card group in communication with a group of devices under test; activating an input/output buffer in the activated pin cards providing the test data block to the activated buffers; and testing the multiple integrated circuit devices under test.