Patent ID: 8037216

Claim:
A DMA transfer control device comprising: a setting register group configured to set transfer information; a number-of-transfers register to which the number of transfers to be performed is set, and which updates a value thereof every time a DMA transfer is completed; a transfer control unit; a secondary setting register group configured to set other transfer information different from the transfer information; and a specified ordinal-number-of-transfer register, wherein every time a DMA transfer is initiated, either a value of the setting register group or a value of the secondary setting register group is selected for each of the transfer information in accordance with a result of an arithmetic operation between a value of the number-of-transfers register and a value of the specified ordinal-number-of-transfer register, and inputted to the transfer control unit, a plurality of values of the secondary setting register group] are input to the transfer control unit before the number-of-transfers register is updated N times, where the N is the number of transfers to be performed, and after the plurality of values of the secondary setting register group are input to the transfer control unit, a value of the setting register group is input to the transfer control unit before the number-of-transfer register is updated N times.