Patent ID: 7179727

Claim:
A method of forming a lattice-tuning semiconductor substrate, comprising: (a) defining parallel strips ( 12 ) of a Si surface by spaced parallel isolating means ( 2 ; 11 ) provided along opposite edges of the strips; (b) selectively growing a first SiGe layer ( 13 ) on the strips ( 12 ) and not on the isolating means ( 2 ; 11 ) between the strips, such that first dislocations ( 14 ) extend across the first SiGe layer ( 13 ) between the isolating means ( 2 ; 11 ) to relieve the strain in the first SiGe layer ( 13 ) in directions transverse to the isolating means ( 2 ; 11 ); and (c) growing a second SiGe layer ( 13 a ) on top of the first SiGe layer ( 13 ) to overgrow the isolating means ( 2 ; 11 ) such that second dislocations ( 15 ) form within the second SiGe layer ( 13 a ) above the isolating means ( 2 ; 11 ) to relieve the strain in the second SiGe layer ( 13 a ) in directions transverse to the first dislocations ( 14 ).