Patent ID: 6895464

Claim:
An apparatus comprising: a) a processor; b) a memory coupled to the processor; c) a flash memory management system residing in the memory and being executed by the processor, the flash memory management system including: a free block mechanism for locating free blocks of flash memory for writing, the free block mechanism including a free block list of flash memory blocks, and further including a free block list window defining a subset plurality of the flash memory blocks in the free block list, the free block mechanism searching the subset plurality of flash memory blocks in the free block list for a flash memory block having a lowest erase count of flash memory blocks in the subset plurality of flash memory blocks in the free block list; a disk maintenance mechanism for locating blocks of flash memory for cleaning, the disk maintenance mechanism including a block list of flash memory blocks, and further including a block list window defining a subset plurality of flash memory blocks in the block list, the disk maintenance mechanism evaluating the subset plurality of flash memory blocks in the block list to determine if any flash memory blocks in the subset plurality of flash memory blocks in the block list are candidates for cleaning.