Patent ID: 8239794

Claim:
A system for determining leakage current of an electronic circuit comprising multiple devices interconnected by multiple nets, said multiple nets comprising driven nets and non-driven nets, said system comprising: an analyzer analyzing a layout of said electronic circuit in order to: identify said driven nets and said non-driven nets of said electronic circuit; identify all driven net-bounded partitions of said electronic circuit, based on said driven nets and said non-driven nets; and identify all possible states that can leak for all of said driven net-bounded partitions, wherein said driven nets comprise any of said nets that are driven to a supply voltage, with no threshold voltage drop, in all states of said electronic circuit, wherein each driven net-bounded partition comprises a set of said devices, wherein said devices are in a same driven net-bounded partition, if there is an interconnection between them that does not include a driven net, and wherein at least one of said driven net-bounded partitions comprises multiple field effect transistors that are not configured as a complete logic gate; and a processor in communication with said analyzer and estimating said leakage current of said electronic circuit by performing the following: determining, for each state of each driven net-bounded partition, a leakage current of said driven net-bounded partition and a probability that said state of said driven net-bounded partition will occur during operation of said electronic circuit; multiplying, for each state of each driven net-bounded partition, said leakage current of said driven net-bounded partition by said probability; and aggregating all results of said multiplying.