Patent ID: 8542528

Claim:
A semiconductor device comprising: a memory cell comprising a first transistor including an oxide semiconductor and a second transistor including a material other than the oxide semiconductor; a driver circuit configured to drive the memory cell; and a potential generating circuit configured to generate potentials supplied to the driver circuit, wherein the driver circuit comprises: a data buffer configured to hold a first data to be written into the memory cell; a writing circuit configured to write a second data with one potential of the potentials into the memory cell in accordance with the first data; a reading circuit configured to read the second data written into the memory cell; and a verifying circuit configured to verify whether the second data agrees with the first data or not, wherein the one potential is a write potential for the memory cell where the second data agrees with the first data, and wherein the write potential is changed to another potential of the potentials, for the memory cell where the second data does not agree with the first data.