Patent ID: 6946331

Claim:
A method for manufacturing a semiconductor device, comprising: forming a plurality of fuse elements on a semiconductor wafer substrate; forming at least one dielectric layer over said plurality of fuse elements with a plurality of openings over respective fuse elements; forming a layer of etching barrier resin in an opening corresponding to a location of at least one fuse element not to be selectively disconnected, wherein said step of forming said layer of etching barrier resin further comprises discharging droplets of a raw etching barrier resin material of an amount smaller for an area in vicinity of a periphery, than other portions, of said opening; and implementing dry and/or wet etching steps using said layer of etching barrier resin as a mask such that said at least one fuse element not to be selectively disconnected is not etched, and wherein said at least one fuse element selected to be disconnected is at least partially etched.