Patent ID: 7638426

Claim:
A method of manufacturing a semiconductor device, comprising: forming an insulating layer above a substrate; forming a first photosensitive layer; exposing and developing the first photosensitive layer to form a first photosensitive layer pattern exposing a plurality of predetermined regions of the insulating layer; forming a plurality of first trenches each having a first sidewall with a first slope by etching the insulating layer using the first photosensitive layer pattern as a mask; forming a second photosensitive layer pattern by exposing and developing the first photosensitive layer pattern; forming a plurality of dual trenches by forming a second trench in each of the first trenches and aligned with the first trenches by etching the insulating layer using the second photosensitive layer pattern as a mask, each second trench having a second sidewall with a second slope that is smaller than the first slope of the first sidewall; forming a copper layer on the insulating layer such that the plurality of dual trenches are filled thereby; and chemical mechanical polishing the copper layer.