Patent ID: 7582931

Claim:
A gate electrode of a transistor comprising: an interface between a polysilicon conformal layer on an inner wall of a trench in a substrate to provide a recess surrounded by the polysilicon conformal layer and a tungsten layer in the recess, wherein the polysilicon conformal layer extends upwardly from a surface of the substrate to have a protrusion and the protrusion has a vertical outer sidewall adjacent the surface of the substrate; a gate insulating layer in the trench between the polysilicon conformal layer and the inner walls of the trench; a thermal oxidation layer on the outer sidewall of the protrusion and the gate insulating layer at an edge of the opening of the trench; and a capping layer extending across the trench and covering the interface; wherein the capping layer is in direct contact with top surfaces of the polysilicon conformal layer and the tungsten layer without any intervening layers.