Patent ID: 7528473

Claim:
An electronic circuit including a first semiconductor device and a second semiconductor device on a mounting substrate, wherein the first semiconductor device includes external terminals of a plurality of bits, the second semiconductor device includes external terminals of a plurality of bits, a semiconductor chip having a plurality of connecting electrodes, and assembling lines which connect the external terminals of a plurality of bits and the plurality of connecting electrodes of the semiconductor chip of the second semiconductor device, the mounting substrate includes a plurality of mounting substrate lines which are connected in common with external terminals of a plurality of bits of the first semiconductor device and external terminals of a plurality of bits of the second semiconductor device for every bit, the mounting substrate lines have lengths thereof from the external terminals of the first semiconductor device to the external terminals of the second semiconductor device made unequal for respective bits, the assembling lines of the second semiconductor device have made lengths thereof unequal for respective bits, and the unequal lengths of the mounting substrate lines have a relationship which offsets the unequal lengths of the assembling lines.