Patent ID: 7634587

Claim:
An apparatus that includes an I/O descriptor cache that is accessible over a PCI bus, comprising: an I/O descriptor cache that stores descriptors that describe data to be transferred during corresponding I/O operations on a PCI bus internal to a computer system; one or more I/O controllers configured to control one or more I/O devices and to access I/O descriptors stored in the I/O descriptor cache without having to access a main memory, thereby conserving I/O bandwidth and power; wherein copies of descriptors stored in the descriptor cache are not present in a main memory; and wherein the I/O descriptor cache is located within one of the one or more I/O controllers, wherein the I/O controller can use the descriptor cache, wherein the I/O controller also functions as a PCI device that provides access to the descriptor cache to other devices via the PCI bus, and wherein the I/O controller is a Universal Serial Bus (USB) Host Controller.