Patent ID: 7657696

Claim:
A method for automatically detecting a plurality of parameters of a NAND-Flash memory, comprising the steps of: (A) transferring a plurality of first addresses from a controller to said NAND-Flash memory; (B) waiting during a first window of time to determine if a status signal transitions from a first state to a second state in response to said first addresses, said status signal being generated by said NAND-Flash memory, said first window starting upon transferring a last of said first addresses; (C) changing an address representation of an address parameter of said parameters of said NAND-Flash memory from a default number to a first number in response to and after said status signal transitions during said first window, said first number matching a total number of said first addresses that were transmitted while said address representation was said default number; (D) transferring a read command to said NAND-Flash memory in response to and after both (i) said address representation changes from said default number to said first number and (ii) said status signal transitions from said second state to said first state; (E) waiting during a second window of time to determine if said status signal transitions from said first state to said second state in response to said read command, said second window starting upon transferring said read command; and (F) changing a page size representation of a page size parameter of said parameters from another default number to a second number in response to and after said status signal transitions during said second window.