Patent ID: 7465662

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: forming a first interlayer insulating film; forming a first etching stopper film on said first interlayer insulating film; forming a conductive layer on said first etching stopper film; forming a second etching stopper film to cover said first etching stopper film, an upper surface of said conductive layer and both side surfaces of said conductive layer; forming a second interlayer insulating film on said second etching stopper film; forming a hole penetrating said second interlayer insulating film in a direction of thickness and reaching said conductive layer; and forming an interconnection in said hole; wherein said step of forming a hole includes the steps of etching said second interlayer insulating film under a first etching condition, and etching said second etching stopper film under a second etching condition different from said first etching condition.