Patent ID: 8838878

Claim:
A method of operating a controller for controlling the programming of a NAND memory chip, wherein said NAND memory chip has a plurality of blocks with each block having a plurality of groups of storage, wherein the amount of storage in each block is the minimum erasable unit, wherein said method comprising: storing a plurality of groups of data in a plurality of blocks of a temporary storage, wherein at least two of the groups of data in one of the plurality of blocks of the temporary storage are to be stored in different blocks of the plurality of blocks of said NAND memory chip, and wherein at least two of the groups of data in different ones of the plurality of blocks of the temporary storage are to be stored in the same block of the plurality of blocks of said NAND memory chip; indexing, in an index table, each of the groups of data in the blocks of temporary storage to a group of storage in the block in the NAND memory chip where it is to be stored; identifying all of the plurality of groups of data stored in the temporary storage which are to be stored in the same block of the plurality of blocks of said NAND memory chip; writing all the identified a plurality of the groups of data from the temporary storage along with data stored in the same block into an erased block of the NAND memory chip different from the same block of the NAND memory chip; deleting the groups of data from the temporary storage that were written to the erased block; and deleting, from the index table, the index for the groups of data deleted from the temporary storage.