Patent ID: 7078346

Claim:
A method for forming conducting structures separated by gaps on a substrate comprising: providing a substrate and a wiring line layer above the substrate; forming a first antireflective coating on the wiring line layer; forming a second antireflective coating on the first antireflective coating, wherein the first antirefiective coating and the second antireflective coating are formed from different materials, wherein said second antireflective coating is configured to protect the wiring line layer from damage in a plasma processing environment and is exposed to accelerated ions during a dielectric deposition process; etching through a portion of the first antireflective coating, a portion of the second antireflective coating, and a portion of the wiring line layer to form wiring lines separated by gaps; and performing a dielectric deposition process including at least depositing a dielectric material within the gaps between the wiring lines, wherein a portion of the second antireflective coating is etched during the dielectric deposition process by said accelerated ions.