Patent ID: 7323769

Claim:
An integrated circuit package comprising: a plurality of leads each having a first face and a second face opposite to said first face; a thermal dissipating structure having a first face and a second face opposite to said first face, wherein said second face of said thermal dissipating structure is orthogonally offset from said second face of said leads, such that said second face of said thermal dissipating structure and said second face of said leads are not coplanar; an integrated circuit chip substantially laterally disposed between said plurality of leads and having a first face and a second face opposite to said first face, whereby said first face of said integrated circuit chip is proximate to said second face of said thermal dissipating structure and is coupled to said second face of said thermal dissipating structure; a plurality of wires linking said plurality of leads to said integrated circuit chip, each comprising: a first end electrically conductively joined to said first face of said integrated circuit chip, and a second end electrically conductively joined to said first face of one of said plurality of leads; an annular element substantially laterally disposed between said integrated circuit chip and said plurality of leads such that said annular element substantially encircles said integrated circuit chip; and at least one secondary wire linking said integrated circuit chip to said annular element, each wire comprising: a first end electrically conductively joined to said first face of said integrated circuit chip, and a second end electrically conductively joined to said first face of said annular element.