Patent ID: 8471331

Claim:
A semiconductor device comprising: a semiconductor substrate of first conductivity type; a first semiconductor layer of the first conductivity type configured as a body contact layer overlying the semiconductor substrate; a second semiconductor layer of the first conductivity type configured as a body layer overlying the body contact layer; a trench structure formed within the first and second semiconductor layers and a portion of the semiconductor substrate, wherein the trench structure includes: a trench; a metal contact adjacent a floor portion of the trench and adjacent the semiconductor substrate; a source contact within the trench and adjacent the metal contact and adjacent the first semiconductor layer; a gate electrode within the trench and insulated from the first and second semiconductor layers by a gate dielectric layer, wherein the gate electrode is configured to form a channel within the second semiconductor layer; and a first dielectric region insulating the gate electrode from the source contact; and a first doped region of a second conductivity type opposite to the first conductivity type within the first semiconductor layer adjacent the source contact, wherein the first doped region abuts the semiconductor substrate, and wherein the metal contact electrically shorts the source contact, the first doped region and the semiconductor substrate.