Patent ID: 7611950

Claim:
A method for forming shallow trench isolation in a semiconductor device, comprising the steps of: (a) forming a pad oxide and a pad nitride on a semiconductor substrate in successive order; (b) forming a photoresist pattern on the pad nitride by a photolithography process; (c) forming a trench in the substrate by etching the pad nitride, the pad oxide and the substrate using the photoresist pattern as an etching mask, and removing the photoresist pattern; (d) removing a portion of the pad oxide to expose top corners of the trench by selectively wet etching the pad oxide using the pad nitride as an etching mask; and (e) rounding the exposed portion of the top corners of the trench by a wet chemical etch process using standard cleaning 1 (SC-1) solution without an oxidizing process, wherein an entirety of a lateral edge of the pad nitride layer defined along the trench has a sharp profile.