Patent ID: 7888966

Claim:
An interface circuit for a first device to electronically connect with a second device, where electronic signals transferred between the first and second devices are of a first voltage range and the core operating voltage of the first device is of a different, second range, the interface circuit comprising: a plurality of input/output cells, each having a pad for the transfer of signals between the first and second device and each having one or more level shifting circuits to convert signals between the first and second voltage ranges, the plurality of input/output cells including: a first input/output cell, whereby the first device receives via the respective pad a clock signal of the first voltage range from the second device when operatively connected to the second device for the transfer of data thereto, level shifts the clock signal to the second voltage range, and supplies the level shifted clock signal to core processing circuitry of the first device; and one or more second input/output cells, each connected to receive a corresponding pair of first and second data signals of the second voltage range from the core processing circuitry of the first device, level shift the pair of data signals to the first voltage range, and supply the level shifted data signals to the second device when operatively connected thereto, wherein each second input/output cell includes: a multiplexing circuit connected to receive the corresponding pair of level shifted data signals and connected to the first input/output cell to receive the non-level shifted clock signal therefrom, wherein the multiplexing circuit generates a double data rate signal formed from the combined corresponding pair of level shifted data signals using the clock signal as a select signal, the multiplexing circuit further connected to supply the double data rate signal to the output pad of the second input/output cell.