Patent ID: 7569476

Claim:
A method of manufacturing a semiconductor integrated circuit device, comprising steps of: (a) forming a first insulating film over a semiconductor substrate; (b) forming a first wiring in said first insulating film; (c) forming a second insulating film over said first wiring; (d) forming a third insulating film over said second insulating film; (e) forming a hole by etching said second and third insulating films, said hole being extended to said first wiring; (f) etching a surface of said first wiring; (g) forming a first conductive film over the bottom and sidewalls of said hole, said first conductive film having a function of a barrier film to a copper film; and (h) forming a second conductive film over said first conductive film such that said second conductive film is embedded in said hole, said second conductive film being formed of a copper film or a film of a copper alloy and is formed of different material from that of said first conductive film, wherein a thickness of said first conductive film at the center of the bottom of said hole is smaller than a surface amount of said etching in said step (f), wherein a width of said second conductive film formed under said surface of said first wiring is smaller than a width of said second conductive film formed over said surface of said first wiring, wherein said width of said second conductive film is decreasing continuously toward the bottom of said hole from the surface of said second insulating film, and wherein a rate of decrease in said second conductive film formed under said surface of said first wiring is larger than a rate of decrease in said second conductive film formed over said surface of said first wiring.