Patent ID: 7389364

Claim:
A memory module, comprising: a plurality of memory devices; and a memory hub, comprising: a link interface for receiving memory requests for access to at least one of the memory devices; at least one memory device interface, each of the at least one memory device interface having a memory controller and coupled to a respective number of the memory devices and coupling memory requests to the respective number of the memory devices for access to at least one of the memory devices, one of the at least one memory device interface operable to at least provide and receive signals specific to the respective number of the memory devices; a switch for selectively coupling the link interface and the memory device interface; an I/O register operable to store status information indicative of completion of a DMA operation and error status of the DMA operation; and a direct memory access (DMA) engine coupled through the switch to the memory device interface, the DMA engine operable to generate memory requests for accessing at least one of the memory devices to perform DMA operations and further operable to program status information in the I/O register upon completion of the DMA operations.