Patent ID: 7521740

Claim:
A semiconductor device comprising: a gate electrode and a gate insulating layer produced on a part of the surface of a substrate of a first semiconductor material having a given melting point, and surrounded by an insulating spacer in a plane parallel to the surface of the substrate, the gate insulating layer being disposed between the substrate and the gate electrode, and a source region and a drain region situated under the surface of the substrate at the level of two opposite sides of the gate electrode, respectively, each region containing electrical carriers of the same given type, with respective first concentrations, and each region comprising a portion of a second semiconductor material disposed on the substrate below the level of the gate insulating layer in a direction perpendicular to the surface of the substrate, each portion of second material extending at least partially between the substrate and the spacer, under at least a portion of the spacer and substantially as far as a limit coming in line, in said perpendicular direction, with one side of the gate electrode, said portions of second material being doped with doping elements in order to create electrical carriers of said given type with second concentrations less than said first concentrations, and said portions of second material having a melting point lower than the melting point of the first material.