Patent ID: 7786769

Claim:
An apparatus comprising a semiconductor die having an on die signal detect circuit and core circuitry, wherein an output of the on die signal detect circuit is coupled to an input of the core circuitry, wherein the on die signal detect circuit includes at least one input port to receive an input signal, wherein the semiconductor die consumes substantially no power when the core circuitry is in a sleep mode; and an off die resistor coupled to an off die power supply and between the output of the on die signal detect circuit and the input of the core circuitry, wherein when the core circuitry is in sleep mode substantially no current flows through the resister and an input voltage provided to the input of the core circuitry is a voltage from the off die power supply, and wherein when the on die signal detect circuit receives the input signal having sufficient amplitude the output of the on die signal detect circuit enables current to flow through the resister and reduces the input voltage provided to the input of the core circuitry and the reduced input voltage causes the core circuitry to wake from the sleep mode.