Patent ID: 7651904

Claim:
A method of manufacturing a non-volatile memory device comprising: forming a tunnel dielectric layer on a semiconductor substrate; subjecting the semiconductor substrate having the tunnel dielectric layer to a deposition chamber; injecting a first reactant into the deposition chamber to form chemically adsorbed islands of the first reactant on the tunnel dielectric layer; removing a reaction residue in the deposition chamber using a method selected from the group consisting of a method of exhausting the deposition chamber, a method of injecting an inert gas into the deposition chamber, a method of carrying out both the exhaustion and the injection, and a method of sequentially carrying out the exhaustion and the injection at least one time, and a combination thereof; repeating the step of injecting the first reactant and removing the reaction residue a plurality of times to form a desired size of nanocrystals on the tunnel dielectric layer; removing the semiconductor substrate having the desired size of nanocrystals out of the deposition chamber; forming a control gate dielectric layer on the semiconductor substrate having the nanocrystals; and forming a control gate electrode on the semiconductor substrate having the control gate dielectric layer.