Patent ID: 7805113

Claim:
A transceiver circuit comprising: a first signal path between an output of a Local Oscillator (LO) and a first input of a first mixer, the LO to generate a signal at a LO frequency; a second signal path between the output of the LO and a first input of a second mixer; a third signal path between a first circuit node and a second input of the first mixer, the first circuit node to divide an incoming signal having a desired Radio Frequency (RF) signal; a fourth signal path between the first circuit node and a second input of the second mixer; a fifth signal path between an output of the first mixer and a converter circuit; a sixth signal path between an output of the second mixer and the converter circuit, the converter circuit to generate an Intermediate Frequency (IF) output based upon input arriving on the fifth signal path and the sixth signal path; a selectable inverter configured to provide agility to the transceiver circuit, the selectable inverter disposed in a signal path selected from the group consisting of the first, second, third, fourth, fifth, and sixth signal paths; wherein the transceiver circuit is configured to negotiate a master/slave relationship with a remote transmitter to determine an output of the selectable inverter; and wherein the transceiver circuit is configured to synchronize communications in a transmit mode and a receive mode using the LO, wherein the LO maintains a same LO frequency when in the transmit mode and the receive mode.