Patent ID: 8824392

Claim:
An apparatus, comprising: a processor; and memory including computer program code, said memory and said computer program code configured to, with said processor, cause said apparatus to perform at least the following: arrange a number of sub-channels in a sequence according to an index configured to be allocated to at least one of a first user equipment, a second user equipment and a third user equipment; receive first segment information from said first user equipment partitioning said number of sub-channels into a first user equipment-first user-defined segment and a first user equipment-second user-defined segment; receive first segment information from said second user equipment partitioning said number of sub-channels into a second user equipment-first user-defined segment and a second user equipment-second user-defined segment; receive first segment information from said third user equipment partitioning said number of sub-channels into a third user equipment-first user-defined segment and a third user equipment-second user-defined segment; and allocate sub-channels dependent on said first user equipment-first user-defined segment to said first user equipment when said first segment information therefrom is lower than said first segment information from said second user equipment and said first segment information from said third user equipment, wherein the first segment information from the first user equipment, the first segment information from the second user equipment, and the first segment information from the third user equipment each comprises one or more markers that partition the number of sub-channels into consecutive segments according to a preference of the first user equipment, the second user equipment, and the third user equipment, respectively.