Patent ID: 7813541

Claim:
A method for inspecting a wafer including a multiplicity of dies, the method comprising in wafer inspection system, implementing the following steps: aligning a plurality of images of the wafer, said plurality of images corresponding to a current image of the wafer, and generating from the aligned images of the wafer a reference image, said reference image having pixel values which are a median of pixel values of the plurality of aligned images at each pixel location within the aligned images; generating a difference image according to a comparison of said current image of the wafer and said reference image; sub-dividing the difference image into a plurality of sub-images each containing pixel locations corresponding to pixel locations within the reference image that fall within a range of gray level values; and for each respective sub-image, identifying a maximum difference pixel having a difference value larger than all other pixels in a respective sub-image, and generating therefrom a respective small current image for each respective sub-image; determining, by comparing respective ones of the small current images with small reference images that include those pixels in the reference image which correspond in location to pixels included in the respective small current images, locations of possible defects in the wafer, the locations of possible defects identified by alarm pixels determined during the comparison; filtering the alarm pixels to retain only those with relatively high difference values as compared to difference values of non-alarm pixels in each respective sub-image of the difference image to identify at least one defect candidate within each sub-image.