Patent ID: 8076184

Claim:
A method of making a semiconductor device, comprising: providing a base substrate having first and second opposing surfaces; forming a plurality of cavities and base leads between the cavities in the first surface of the base substrate, wherein the cavities create multiple rows of the base leads including a first set of base leads and a second set of base leads; mounting a first semiconductor die between the first set of the base leads and on the second set of the base leads including a concave capture pad formed in the second set of base leads; stacking a second semiconductor die over the first semiconductor die; depositing an encapsulant over the first semiconductor die, second semiconductor die, and base substrate such that the first set of base leads provide vertical interconnect through the encapsulant around the first semiconductor die; removing a portion of the second surface of the base substrate to separate the base leads; and forming an interconnect structure over the encapsulant and base leads, the interconnect structure being electrically connected to the base leads and second semiconductor die.