Patent ID: 8183161

Claim:
A method of etching a gate stack on a substrate, said gate stack including a silicon dioxide layer, a hafnium containing layer including HfO 2 and a poly-crystalline silicon layer, the method comprising: disposing said substrate having said gate stack, said gate stack including said silicon dioxide layer, said hafnium containing layer including HfO 2 and said poly-crystalline silicon layer in a plasma processing system, wherein a mask layer defining a pattern therein overlies said gate stack; elevating the temperature of said substrate above approximately 30 degrees C.; introducing a process composition comprising BCl 3 and an additive gas to said plasma processing system, the additive gas comprising an oxygen-containing gas, a nitrogen containing gas, or a hydrocarbon gas characterized by C x H y , wherein x and y are integers greater than or equal to unity, or a combination of two or more thereof; adjusting the flow rates of BCl 3 and the additive gas to a predetermined level for achieving an etch selectivity between said hafnium containing layer and said poly-crystalline silicon layer on the substrate of greater than or equal to approximately 10-to-1, and at the same predetermined level achieving an etch selectivity between said hafnium containing layer and said SiO 2 layer on the substrate of greater than or equal to approximately 10-to-1; forming a plasma from said process composition in said plasma processing system; and exposing said substrate to said plasma in order to etch said pattern into said hafnium containing layer while simultaneously suppressing etching of the poly-crystalline silicon layer and the silicon dioxide layer.