Patent ID: 8598684

Claim:
A semiconductor device, comprising: a semiconductor substrate; an element formed to the semiconductor substrate; a through hole formed to penetrate the semiconductor substrate; an insulating layer formed on both surface sides of the semiconductor substrate and an inner surface of the through hole; a penetrating electrode formed in the through hole; a contact hole formed in the insulating layer, and reaching a connection portion of the element; a barrier metal pattern layer formed on both surface sides of the semiconductor substrate, and covering the penetrating electrode, the barrier metal pattern layer being in direct contact with the penetrating electrode, wherein the barrier metal pattern layer is formed of any one of a titanium layer/a titanium nitride layer stacked in order from a bottom, an aluminum layer, and an aluminum alloy layer, and no barrier metal pattern layer exists on the element; a first wiring layer formed at least on an upper surface side of the semiconductor substrate, and connected to the barrier metal pattern layer, wherein the first wiring layer includes a first seed layer directly formed on the barrier metal pattern layer and a first conductive layer directly formed on the first seed layer; and a second wiring layer formed at least on the upper surface side of the semiconductor substrate, wherein the second wiring layer includes a second seed layer being in direct contact with the connection portion of the element in the contact hole and a second conductive layer directly formed on the second seed layer.