Patent ID: 8063450

Claim:
A semiconductor device comprising at least two vertical nanowire wrap insulating gate field effect transistors, wherein: each of the transistors comprises a massive nanowire, which comprises a channel of the transistor; the nanowire transistors are grouped into at least a first and a second individually addressable set; each of the transistors comprises a gate stack comprising a gate contact enclosing a portion of the nanowire and a dielectric layer between the gate contact and the nanowire; each of the transistors of the first set comprises a first gate stack having a first dielectric layer and exhibiting a first work function, and a nanowire of a first diameter and with a first doping level, giving a first threshold voltage; and each of the transistors of the second set comprises a second gate stack having a second dielectric layer and exhibiting a second work function, and a nanowire of a second diameter and with a second doping level, giving a second threshold voltage that differs from the first threshold voltage, wherein at least one of the following is satisfied: 1) the first and the second dielectric layer differ in thickness or in permittivity; 2) the first work function is different from the second work function; 3) the first diameter is different from the second diameter; or 4) the first doping level is different from the second doping level.