Patent ID: 7838879

Claim:
An array substrate comprising: a substrate; a thin film transistor including a gate electrode formed on the substrate, a gate insulation layer formed on the gate electrode, a semiconductor layer formed on the gate insulation layer, and a data electrode formed on the semiconductor layer; a passivation layer formed on the thin film transistor; an organic insulation layer that is formed on the passivation layer; a pixel electrode that is formed on the passivation layer and is electrically connected to the data electrode through a contact hole formed at the passivation layer; and a storage capacitor including a first storage capacitor electrode that is spaced apart from the gate electrode of the thin film transistor and a first portion of the pixel electrode, wherein a distance between the first storage capacitor electrode and the first portion of the pixel electrode is smaller than a thickness of the gate insulating layer, and wherein the gate insulation layer directly contacts the passivation layer on a region adjacent to the first storage capacitor electrode.