Patent ID: 8194468

Claim:
A non-volatile memory (NVM) cell, comprising: a floating gate configured to store charge; at least one Band-To-Band-Tunneling (BTBT) device coupled to the floating gate and having a first node, the BTBT device adding charge to the floating gate through BTBT; a read transistor coupled to the floating gate and having at least a second node; a read select switch coupled between the second node of the read-transistor and a bit line node, the read select switch causing current from the read transistor to reach the bit line responsive to activating of the read select switch when the read transistor is active; and a program select switch coupled between the first node of the BTBT device and a program select line, the program select switch causing current from the BTBT device to reach the program select line responsive to activating of the program select switch when the BTBT device is active.