Patent ID: 7767522

Claim:
A manufacturing method of a semiconductor device, comprising the steps of: (a) forming a first gate electrode over the main surface of a semiconductor substrate via a first insulating film; (b) forming, over the main surface of the semiconductor substrate and sidewall of the first gate electrode, a second insulating film having therein a charge accumulator portion; (c) forming, over the second insulating film, a second gate electrode adjacent to the first gate electrode via the second insulating film, wherein the second gate electrode is formed with a height smaller than that of the first gate electrode; (d) after the step (c), forming a third insulating film over the main surface of the semiconductor substrate to cover the first and second gate electrodes; (e) after the step (d), etching back the third insulating film to leave the third insulating film over the upper portion and sidewall of the second gate electrode and over the sidewall of the first gate electrode, and then removing the third insulating film of the other region; (f) after the step (e), forming a metal film over the main surface of the semiconductor substrate to cover the first and second gate electrodes and the third insulating film; and (g) after the step (f), reacting the first gate electrode with the metal film to form the metal silicide film over the upper surface of the first gate electrode, wherein the third insulating film formed over the upper portion of the second gate electrode is kept during the steps (f) and (g).