Patent ID: 7271478

Claim:
A printed circuit board, comprising: a plurality of first lands arranged to correspond to a plurality of first bumps on an integrated circuit device having a first side and a second side facing each other when the integrated circuit device is mounted on the printed circuit board, the plurality of first bumps being arranged along the first side of the integrated circuit device, the plurality of first lands being used for individually inputting or outputting an electrical signal with respect to the integrated circuit device via the plurality of first bumps when the integrated circuit device is mounted on the printed circuit board; a first wiring pattern connected to the plurality of first lands; a plurality of second lands arranged to correspond to a plurality of second bumps arranged along the second side of the integrated circuit device when the integrated circuit device is mounted on the printed circuit board, the plurality of second lands being less than the plurality of first lands in number, the plurality of second lands being used for individually inputting or outputting the electrical signal with respect to the integrated circuit device via the plurality of second bumps when the integrated circuit device is mounted on the printed circuit board; a second wiring pattern connected to the plurality of second lands; and an at least one third land disposed to correspond to an at least one third bump on the integrated circuit device when the integrated circuit device is mounted on the printed circuit board, the at least one third bump being disposed one of in a row formed by the plurality of second bumps and closer to the row formed by the plurality of second bumps than a row formed by the plurality of first bumps on the integrated circuit device, the at least one third land having an area larger than each one of the plurality of first lands, the at least one third land not being used for inputting and outputting the electrical signal with respect to the integrated circuit device via the at least one third bump when the integrated circuit device is mounted on the printed circuit board.