Patent ID: 8178442

Claim:
A method in the fabrication of a semiconductor device having a first area, and a second area disposed laterally of the first area, the method comprising: forming, on a substrate which provides the first and second areas, a first mask pattern that includes at least one topographic feature in the second area; forming a mold mask pattern including a plurality of first topographic features in the first area, wherein each of the first topographic features has opposite sidewalls and an upper surface; forming first spacers which cover the side walls of each of the first topographic features of the mold mask pattern in the first area; and transcribing the pattern of the first spacers to a layer disposed thereunder in the first area to thereby form a pattern having a plurality of first transcribed topographic features, and simultaneously transcribing the pattern of the at least one topographic feature of the first mask pattern to a layer disposed under the first mask pattern in the second area to thereby form at least one second transcribed topographic feature, wherein the width, in a direction parallel to the major surface of the substrate, of each of the first transcribed topographic features is less than the width of the second transcribed topographic feature.