Patent ID: 6995059

Claim:
A method of manufacturing a semiconductor device having capacitors thereon, comprising the steps of: forming first and second capacitor electrodes supported by a semiconductor substrate, each said capacitor electrode having a portion extending vertically relative to said substrate, said first and second capacitor electrodes being electrically isolated from each other; forming a first dielectric layer extending over at least a portion of both of said first and second capacitor electrodes, said first dielectric layer extending over at least an uppermost portion of each of said first and second capacitor electrodes; forming a conductive layer extending over said first dielectric layer and above said first and second capacitor electrodes; selectively removing selected portions of said conductive layer to expose a first portion of said first dielectric layer relatively proximate said substrate, and to expose second and third portions of said first dielectric layer relatively remote from said substrate, and to electrically isolate sections of said conductive layer to form a third capacitor electrode in contact with a portion of said first dielectric layer proximate said first capacitor electrode, and a fourth capacitor electrode in contact with a portion of said first dielectric layer proximate said second capacitor electrode, said third and fourth capacitor electrodes forming cell electrodes of respective first and second capacitors and being electrically isolated from one another; forming a second dielectric layer over said exposed portions of said first dielectric layer and over said third and fourth capacitor electrodes; and further comprising forming a bit line elevationally below the first, second, third and fourth capacitor electrodes and elevationally below the first and second dielectric layers.