Patent ID: 7602205

Claim:
A method of conducting an electromagnetic test of an electronic device under test (DUT), the method comprising: incorporating the DUT into a circuit comprising: a controlled current source, with the controlled current source having an output current connected in series with the DUT; and a voltage limiter connected in parallel with the DUT, the voltage limiter characterized in that: when the output current is such that the voltage across the DUT (Vdut) without the voltage limiter in place, would exceed a particular maximum voltage Vmax, at least a portion of the output current flows through the voltage limiter, so as to limit Vdut to be less than or equal to Vmax; and when the output current is such that Vdut is less than or equal to Vmax, current does not flow through the voltage limiter, and wherein the voltage limiter is characterized by a transition region surrounding Vmax for the DUT such that, as the voltage for the DUT approaches and passes Vmax, the portion of the output current flowing through the voltage limiter gradually increases to cause the output current through the DUT to correspondingly gradually decrease.