Patent ID: 7525841

Claim:
A method of programming a non-volatile NAND architecture memory string, comprising: applying a program voltage to a selected word line coupled to a non-volatile memory cell of the NAND architecture memory string that is selected for programming; applying a cutoff voltage to a first set of one or more source-side word lines, wherein the first set of source-side word lines are between the selected word line and a source line; applying an elevated pass voltage to a second set of one or more source-side word lines between the first set source-side word lines and the source line, wherein the elevated pass voltage is higher in potential than a first pass voltage applied to a drain-side word line of the string, wherein the drain-side word line is between the selected word line and a bit line; and applying a second pass voltage to a third set of one or more source-side word lines between the second set of source-side word lines and the source line, wherein the first pass voltage is greater than the second pass voltage.