Patent ID: 8913658

Claim:
A system comprising: a user interface to receive one or more input parameters; a bit-rate controller to regulate a bit-rate of an output bit-stream, the bit-rate controller comprising, multiple bit-rate modules configured to determine a bit-estimate and a quantization parameter; and a control module configured to calculate a convergence period based on the received one or more input parameters and a frame rate, wherein the control module selects a bit rate module based on the convergence period; and an encoder for generating the output bit-stream using the quantization parameter determined by the bit rate module, wherein the received input parameter is one or more of a maximum instantaneous bit-rate, a minimum instantaneous bit-rate, a minimum quality, a maximum quality, a target bit-rate, and a reaction speed, wherein the convergence period is calculated by using a reaction speed and the frame rate and wherein the convergence period comprises a frame length.