Patent ID: 7669158

Claim:
A method operating in a computer system for modifying cells to address overlap regions in an integrated circuit design having a hierarchal structure, the method comprising: using the computer system to traverse through nodes of the hierarchal structure of the integrated circuit design, wherein the nodes represents cells of the integrated circuit design; analyzing children nodes of a parent node for cell overlap; locating an overlap region of first and second cells, wherein the first and second cells are in at least two of the children nodes; extracting information of the overlap region; creating a copy of the overlap region; making a reference to the copy of the overlap region in the parent node and the children nodes containing the overlap region, wherein the reference comprises a location of the overlapping region in the integrated circuit design and an origin of the overlapping region in the hierarchical structure; finding candidate cells for template core designation, wherein the step of finding candidate cells is applied to modified cells, which are produced during the steps of extracting information of the overlap regions and collecting information of the overlap regions; and tagging the candidate cells.