Patent ID: 8633066

Claim:
A manufacturing method for a thin film transistor, comprising at least a process of forming an active layer, a source electrode and a drain electrode, wherein the process of forming the active layer, the source electrode and the drain electrode comprises: forming sequentially an active layer film and a source/drain metal film; applying a layer of photoresist on the source/drain metal film; exposing and developing the photoresist by using a double-tone mask so as to form a photoresist pattern including a photoresist-completely-remained region, a photoresist-partially-remained region, and a photoresist-completely-removed region; performing a first wet etch in which the source/drain metal film corresponding to the photoresist-completely-removed region is over-etched so that edges of the source/drain metal film are recessed inside edges of the photoresist pattern; performing a first dry etch in which the active layer film exposed by the photoresist is etched; thinning the photoresist by a thickness corresponding to the thickness of the photoresist-partially-remained region through an ashing process, so as to remove the photoresist in the photoresist-partially-remained region, outer edges of the photoresist in the photoresist-completely-remained region being aligned with or close to edges of the source/drain metal film after the ashing process; performing a second dry etch in which the source/drain metal film corresponding to the photoresist-partially-remained region is etched and the active layer exposed outside the source/drain metal film is simultaneously etched; performing a third dry etch in which a part of the active layer film corresponding to the photoresist-partially-remained region is etched; and removing the remained photoresist.