Patent ID: 7474128

Claim:
A transient voltage detecting circuit for an electronic system having a first power supply, a second power supply, a third power supply, a fourth power supply, a fifth power supply, and a sixth power supply, said circuit comprising: a first device comprising a first first-type MOS transistor, coupled to the first power supply, and a first second-type MOS transistor, coupled between the first first-type MOS transistor and the fifth power supply and also coupled via a gate thereof to the third power supply; the first device also providing a first output terminal between the first first-type MOS transistor and the first second-type MOS transistor; a second device comprising a second first-type MOS transistor, coupled to the second power supply and coupled via a gate thereof to the first output terminal, a third first-type MOS transistor, coupled in parallel with the second first-type MOS transistor, and a second second-type MOS transistor, coupled between the second first-type MOS transistor and the sixth power supply and coupled via a gate thereof to the fourth power supply, the first first-type MOS transistor being coupled via a gate thereof to a first node formed between the second first-type MOS transistor and the second second-type MOS transistor; and a resetting device, having an output coupled to a gate of the third first-type MOS transistor, for outputting a reset signal to turn on the third first-type MOS transistor such that the voltage at the first node is at a first logic state and the voltages at the first output terminal is latched at a second logic state; wherein once a negative transient voltage occurs at the third power supply, the voltage at the first node changes to the second logic state so that the voltage at the first output terminal changes to the first logic state; wherein once a positive transient voltage occurs at the fourth power supply, the voltage at the first node changes to the second logic state so that the voltage at the first output terminal changes to the first logic state; wherein once the positive transient voltage occurs at the first power supply, the first first-type MOS transistor is turned on so that the first output terminal changes to the first logic state; and wherein once the negative transient voltage occurs at the second power supply, the first first-type MOS transistor is turned on so that the first output terminal changes to the first logic state.