Patent ID: 7680965

Claim:
A data processing system comprising a processing unit on which a control program runs, a plurality of operating systems (OS's) configured to run under control of said control program, a Peripheral Component Interchange (PCI) bus coupled to the processing unit, and a channel adaptor for data transmission/reception, wherein: the channel adaptor is coupled to the PCI bus on a PCI bus side of the channel adapter, and the channel adapter includes only one connecting port on an input/output (I/O) side of the channel adapter; an input/output process is executed between each OS and said channel adaptor by using input/output process control data specifying input/output (I/O) data, the input/output process control data being provided via a Queue Pair having a Queue Pair identifier and including a Send Queue, Receive Queue and Complete Queue; configuration information is provided, exclusively defining the Queue Pair identifier of said Queue Pair of said input/output process control data which is usable exclusively by each respective OS; said channel adaptor can process a plurality of input/output process control data; and each OS uses said input/output process control data corresponding to a unique usable Queue Pair identifier and defined in said configuration information, and thereby a plurality of OS's control input/output process control data having different Queue Pair identifiers relative to said channel adaptor to execute the input/output process without sharing said input/output process control data for said channel adaptor by different OS's.