Patent ID: 7424552

Claim:
A computer system comprising: at least one dense logic device; a controller coupling said at least one dense logic device to a control block and a memory bus; one or more memory module slots coupled to said memory bus; an adapter port associated with a subset of said one or more memory module slots, said adapter port including associated memory resources, wherein said control block provides control information to said adapter port and wherein said adapter port shares access control to said memory resources with said controller such that when said controller is in control of said memory resources said adapter port is barred from accessing said memory resources and when said adapter port is in control of said memory resources said controller is disconnected from said memory resources and wherein said controller is disconnected from said memory resources said adapter port monitors said control block for control information; and at least one direct execution logic element coupled to said adapter port, said memory resources being substantially equally accessible by said at least one dense logic device and said at least one direct execution logic element.