Patent ID: 7451277

Claim:
A method of data processing in a cache coherent data processing system including at least first and second coherency domains, said method comprising: in a first cache memory within said first coherency domain of said data processing system, setting a coherency state field associated with a storage location and an address tag to a first data-invalid coherency state that indicates that said address tag is valid and that said storage location does not contain valid data; and in response to snooping an exclusive access operation, said exclusive access opertion specifying a target address matching said address tag and indicating a relative domain location of a requestor that initiated said exclusive access operation, said first cache memory updating said coherency state field from said first data-invalid coherency state to a second data-invalid coherency state that indicates that said address tag is valid, that said storage location does not contain valid data, and whether a target memory block associated with said address tag is cached within said first coherency domain upon successful completion of said exclusive access operation based upon said relative domain location of said requestor; wherein: said exclusive access operation comprises a first exclusive access operation; said setting comprises setting said coherency state field to said first data-invalid coherency state in response to a second exclusive access operation initiated by a second cache memory of said data processing system; and said first cache memory predicting, by reference to said coherency state field, a scope of broadcast transmission of a data access request targeting said memory block.