Patent ID: 8386881

Claim:
A storage device comprising: a nonvolatile semiconductor memory configured to store a plurality of detecting codes to respectively detect errors in a plurality of data items, a plurality of first correcting codes to respectively correct errors in a plurality of first data blocks each of which comprises one of the data items and a corresponding detecting code, a second correcting code to correct errors in a second data block which comprises the first data blocks, and the second data block; a first corrector configured to correct errors in the first data blocks using the first correcting codes; a detector configured to detect, using the detecting codes, errors in the data items corrected by the first corrector, respectively, and generate first error information representing presence/absence of an error in each of the corrected data items; and a second corrector configured to correct errors in, of the corrected data items, a number of data items containing errors using the first error information and the second correcting code.