Patent ID: 7683426

Claim:
A lateral DMOS device formed in a semiconductor substrate of a first conductivity type, the substrate not comprising an epitaxial layer, the device comprising: a source region of the second conductivity type formed adjacent the surface of the substrate; a drain region of the second conductivity type located adjacent the surface of the substrate, the drain region being spaced apart from the source region; a drift region of a second conductivity type located adjacent the surface of the substrate and the drain region, the drift region being spaced apart from the source region, a channel region of the first conductivity type being located between the drift region and the source region; a gate dielectric layer and a gate overlying the channel region; and a diode clamp comprising a deep region of the first conductivity type, the deep region having a doping concentration greater than a doping concentration of the substrate, the entire deep region being located directly below the drain region, a PN junction between the drain region and the deep region being completely submerged in the substrate, wherein the deep region of the first conductivity type comprises a vertical series of contiguous dopant regions having different doping concentrations, respectively, and wherein within the deep region a doping concentration of a dopant region deeper in the substrate is greater than a doping concentration of a dopant region shallower in the substrate.