Patent ID: 7445942

Claim:
A process for providing effective magnetic shielding for a segmented MRAM array, having a top surface, comprising: providing, as part of said MRAM array, a number of bit slice segments each of which contains a number of bit lines; further providing, as part of said MRAM array, a number of word lines, each such word line being independently addressable whereby it can interact with one and only one of said bit slice segments at any given time; depositing a first dielectric layer on said array top surface; then depositing a layer of soft magnetic material on said first dielectric layer; patterning said soft magnetic layer to form a plurality of segmented shields each of which fully covers and overlaps one of said bit slice segments, said segmented shields being spaced a distance apart from one another; providing each segmented shield with two ends and depositing at each of said ends a biasing pad of magnetic material capable of applying a longitudinal magnetic bias, said biasing pad overlapping its associated segmented shield without overlapping any part of its associated bit slice segment; then depositing a second dielectric layer to fully cover all exposed surfaces; by means of a magnetic anneal, establishing said longitudinal bias, whereby each segmented shield becomes a single magnetic domain; and depositing a master magnetic shield layer over said second dielectric layer.