Patent ID: 7971354

Claim:
A method for manufacturing a multilayer printed wiring board, comprising: forming a plurality of openings through a film adhered onto an upper surface of a build-up layer formed on a core substrate and a conductor pattern formed on the upper surface of the build-up layer; plating the plurality of openings such that a plurality of conductor posts, which are of substantially a uniform thickness, is formed in the plurality of openings, respectively, on the conductor pattern on the upper surface of the build-up layer; forming a plurality of resist layers on top surfaces of the conductor posts, respectively; removing the film from the upper surface of the build-up layer such that the conductive posts are exposed; immersing the conductive posts in an etching solution for a sufficient duration such that the conductor posts are shaped to have constricted portions, respectively; removing the resist layers from the top surfaces of the conductive posts; forming a low elastic modulus layer of substantially a same height as heights of the conductor posts on the upper surface of the build-up layer; and forming mounting electrodes on the top surfaces of the conductor posts, respectively.