Patent ID: 7890892

Claim:
A system comprising: a non-transitory computer readable medium storing a design structure for a memory system; and a machine for manufacturing said memory system, said machine comprising instructions and executing said instructions so as to retrieve said design structure and produce said memory system based on said design structure such that said memory system comprises: a plurality of memory cells; a plurality of bit lines, each of said memory cells being coupled between two of said bit lines; and a plurality of isolation devices coupled to said bit lines and configured to establish a plurality of different current pathways through said bit lines and said memory cells, each of said different current pathways comprising a first segment of a first bit line, a second segment of a second bit line different from said first bit line and a memory cell connected in series between said first segment and said second segment, said first segment having a first resistance and said second segment having a second resistance such that a total resistance of each of said current different current pathways is approximately equal for all memory cell locations within said memory system.