Patent ID: 7986761

Claim:
A shift register for providing a plurality of low level shift register signals, the shift register comprising: a plurality of shift register units connected in series, each shift register unit comprising a first inversion circuit, a second inversion circuit, and a third inversion circuit; the first inversion circuit being configured for providing a second output signal according to a clock signal from an external circuit and a first output signal from the third inversion circuit, the first inversion circuit comprising a first transistor and a second transistor, the source of the first transistor being coupled to a high level voltage, the drain of the first transistor being coupled to the drain of the second transistor, the gate of the first transistor being coupled to the third inversion circuit, the source of the second transistor being coupled to a low level voltage, the gate of the second transistor being coupled to the external circuit to receive the clock signal, and the drain of the first transistor being configured for providing the second output signal; the second inversion circuit being configured for providing a control signal according to a first output signal from a previous adjacent one of the shift register units and a second output signal from the previous adjacent shift register unit, except in the case of a first one of the shift register units, wherein the second inversion circuit is configured for providing a control signal according to a first external output signal and a second external output signal from the external circuit; the third inversion circuit being configured for providing the first output signal and a shift register signal according to the control signal, the second output signal and an inverse clock signal from the external circuit; wherein the two first inversion circuits of adjacent shift register units respectively receive the clock signal and the inverse clock signal, the two third inversion circuits of adjacent shift register units respectively receive the clock signal and the inverse clock signal, and the first shift register unit receives a start signal from the external circuit to start the shift register.