Patent ID: 7965712

Claim:
A method for enabling network elements (NEs) operating at a bit rate R 1 which is a bit rate of substantially 40 Gb/s to communicate with NEs operating at a bit rate R 2 which is a bit rate of substantially 100 Gb/s, where a ratio of R 2 to R 1 is represented by a ratio M:N, M and N are positive integers, and M:N=5:2, the method comprising: providing a number M×K of the NEs operating at a bit rate R 1 , each of the M×K NEs comprising a communication interface communicating at the bit rate R 1 , where K is a positive integer; providing a number N×K of transceivers operating at the bit rate R 2 , each of the N×K transceivers comprising an M:N electrical interface which enables translation between bit rates whose ratio is represented by the ratio M:N; bypassing the communication interfaces of the M×K NEs by interconnecting electrical lanes of the M×K NEs with the M:N electrical interfaces of the N×K transceivers; and using at least one of the N×K transceivers for communicating data between at least one of the M×K NEs interconnected with the at least one of the N×K transceivers and at least one of the NEs operating at the bit rate R 2 .