Patent ID: 7851261

Claim:
A method for assembling an electronic package, comprising: mounting a first semiconductor chip on a chip mounting area on an upper surface of a substrate; providing a continuous strip of material laminated between a base carrier tape and a cover tape; removing the base carrier tape from the continuous strip of material; separating a portion of the continuous strip of material to form a spacer block with first and second mounting faces lying in approximately parallel planes and having a rounded outline, wherein the spacer block is cut or stamped from the continuous strip; mounting the first mounting face of the spacer block on the first semiconductor chip by simultaneously applying pressure and heat; removing the cover tape from the second mounting face of the spacer block; mounting a second semiconductor chip on the second mounting face of the spacer block by simultaneously applying pressure and heat; encapsulating the first and second semiconductor chips and the spacer block in mold material by placing a plurality of packages in a mold and injecting the mold material into the mold from one side of the mold such that the mold material flows around the spacer block in an essentially non-turbulent fashion; and curing the mold material.