Patent ID: 6930031

Claim:
A bumping process, comprising: providing a wafer having a plurality of bonding pads and a passivation layer having a plurality openings thereon, wherein the bonding pads are exposed out of the openings of the passivation layer; forming an under-bump-metallurgy layer on the wafer and covering the bonding pads; forming a first photoresist layer over the wafer to cover the bonding pads and the passivation layer; forming a second photoresist layer on the first photoresist layer, wherein the first photoresist layer has exposure/development characteristics different from that of the second photoresist layer; performing a single exposure process to the first and second photoresist layers to form a plurality of first openings in the first photoresist layer and a plurality of second openings in the second photoresist layer simultaneously, wherein a plurality of stair-shaped openings are formed from the first openings and the second openings and expose the under-bump-metallurgy layer; filling a solder material into the stair-shaped openings to form a plurality of solder posts; and removing the first photoresist layer and the second photoresist layer.