Patent ID: 7428717

Claim:
A system noise management suite for an assembly, the assembly including an integrated circuit design to be coupled to a circuit board design, the system comprising: a first module configured to determine at least one type of bounce voltage for the assembly; a second module configured to identify decoupling capacitances for the assembly to reduce power distribution system noise; a third module configured to estimate jitter caused by the integrated circuit design; a user interface coupled to the first module, the second module, and the third module for input of information for the first module, the second module, and the third module; the first module, the second module, and the third module coupled for communication with one another for having a calculation result performed in one of the first module, the second module, and the third module used in another one of the first module, the second module, and the third module respectively for determination of the at least one type of bounce voltage, identification of the decoupling capacitances, and estimation of the jitter; the user interface, the first module, the second module, and the third module collectively including at least two sub-modules and a system engine; and each of the sub-modules being linked to the system engine.