Patent ID: 7049528

Claim:
A method of producing a semiconductor chip mounting wiring board including an insulating resin substrate having a wiring pattern formed on one side thereof a wiring pattern, a first conductive bump formed on the wiring pattern to mount a semiconductor chip to be disposed nearly in the center of the insulating resin substrate, a viahole formed from a conductive material filled in an opening leading from the other side of the insulating resin substrate to the wiring pattern, and a second conductive bump provided on the viahole, the method comprising at least the following six steps of: (a) attaching a light-transparent resin layer on the other side of the insulating resin substrate having a copper foil attached on the one side thereof, irradiating the other side of the insulating resin substrate with a laser beam from above the resin layer to form an opening leading to the copper foil, and cleaning the opening inside by removing the remaining resin; (b) applying an electrolytic plating to the insulating resin substrate covered with a protective layer to fill an electrolytic plating metal in the opening in order to form a filled viahole; (c) coating the insulating resin substrate processed in the above step (b) with a further electrolytic plating metal to form the second conductive bump from the electrolytic plating metal just above the filled viahole; (d) separating the protective layer and resin layer from the insulating resin substrate, then attaching a protective layer to the other side of the insulating resin substrate, and forming nearly in the center on the one side of the insulating resin substrate a plating photoresist layer having an opening corresponding to the position of a terminal of the semiconductor chip to be mounted; (e) applying an electrolytic plating to the insulating resin substrate processed in the step (d) above to fill an electrolytic plating metal in the opening in order to form the first conductive bump corresponding to the position of the terminal of the semiconductor chip to be mounted; and (f) removing the plating photoresist layer, then forming an etching photoresist layer corresponding to a predetermined wiring pattern extending from the first conductive bump toward the periphery of the insulating resin layer, and removing, by etching, a copper foil portion where the etching photoresist layer is not formed to form the predetermined wiring pattern.