Patent ID: 7923728

Claim:
A thin film transistor (TFT) array panel comprising: an insulation substrate having a display area for displaying an image and a peripheral area outside the display area; a plurality of gate lines formed in the display area and in a portion of the peripheral area; a plurality of first dummy wiring lines insulated from the gate lines and formed in the peripheral area; a gate insulating layer formed on the gate lines and the first dummy wiring lines, and having at least one contact hole exposing at least one portion of a first dummy wiring line; and a plurality of data lines formed on the gate insulating layer, insulated from the plurality of gate lines, crossing the plurality of gate lines, and respectively including a data fan-out unit, wherein a data line is connected with the at least one portion of the first dummy wiring line through the at least one contact hole when the image is displayed, and wherein the data fan-out unit overlaps the first dummy wiring line.