Patent ID: 7260016

Claim:
A non-volatile semiconductor memory device comprising: a memory cell array, having plural memory cells arranged in a matrix form at the respective cross points of plural word lines and plural bit lines; a word line selector, selecting one or two word lines from the plural word lines; a first group writing unit, respectively connected to even-numbered bit lines and carrying out a program operation and a program verify operation to writing data into memory cells of a first group connected to even-numbered bit lines; a second group writing unit, respectively connected to odd-numbered bit lines and carrying out a program operation and a program verify operation to writing data into memory cells of a second group connected to odd-numbered bit lines; a controller, setting a first word line to a selective state, the first group writing unit to an operative state, and the second group writing unit to a halting state, and carrying out a writing operation of a first page connected to the first word line, setting a second word line to a selective state, the second group writing unit to an operative state, and the first group writing unit to a halting state, and carrying out a writing operation of a second page connected to the second word line, and setting the first and second word lines to a selective state, the first and second group writing units to an operative state, and carrying out a program verify operation of the first and second page.