Patent ID: 6970125

Claim:
An analog-to-digital converter with a pipeline architecture for converting an analog input signal into a digital output signal with a predefined resolution, the converter comprising a plurality of stages, each stage having means for converting an analog local signal into a digital local signal with a local resolution lower than said predefined resolution, means for determining an analog residue indicative of a quantization error of the means for converting, and means for amplifying the analog residue by an inter-stage gain corresponding to the local resolution to generate the analog local signal for a next stage; and means for combining the digital local signals of all the stages into the digital output signal, weighting each digital local signal according to a digital weight depending on the corresponding inter-stage gain, the means for combining includes, for at least one of the stages, means for dynamically estimating a digital correction signal indicative of an analog error of the corresponding inter-stage gain, and means for controlling the digital weight according to the digital correction signal.