Patent ID: 7626429

Claim:
A driving circuit for driving an output stage comprising a high side NMOS and a low side NMOS, wherein the driving circuit comprises: a diode comprising an anode and a cathode, wherein the anode is electrically connected to a first voltage source; a first PMOS and a second PMOS, the sources of which are connected to the cathode anode of the diode; a third PMOS comprising a drain, a source and a gate, wherein the source is electrically connected to the gate of the second PMOS, the drain is electrically connected to the drain of the first PMOS and the gate of the high side NMOS; a fourth PMOS comprising a drain, a source and a gate, wherein the source is electrically connected to the gate of the first PMOS and the drain is electrically connected to the drain of the second PMOS; a first NMOS comprising a drain, a source and a gate, wherein the drain is electrically connected to the drain of the fourth PMOS, the source is coupled to a second voltage source, the gate is electrically connected to a first input; and a second NMOS, comprising a drain, a source and a gate, wherein the drain is electrically connected to the drain of the third PMOS, the source is coupled to the second voltage source and the gate is connected to a second input.