Patent ID: 6972381

Claim:
A semiconductor device, comprising: a semiconductor chip having electrodes; a substrate having an interconnect pattern formed thereon and electrically connected to the electrodes, the substrate having a protective layer formed thereon and covering a part of the interconnect pattern, the substrate having through holes covered by the interconnect pattern, the substrate having a first region on which the semiconductor chip is mounted and a second region which surrounds the first region, a part of the interconnect pattern in the second region exposed from the protective layer; an adhesive disposed on a surface of the substrate at least in a part of the first and second regions; and external electrodes provided on a surface of the substrate opposing the adhesive, in the through holes, and on the interconnect pattern, the part of the interconnect pattern in the second region which is exposed from the protective layer is entirely covered with the adhesive, the adhesive being cured in both the first and second regions and the adhesive being cured by the external electrodes.