Patent ID: 8635378

Claim:
An integrated circuit comprising: a plurality of tiles, each tile comprising a processor; a switch including switching circuitry to forward data over data paths from other tiles to the processor and to switches of other tiles according to execution of a switch instruction that causes coupling of an input port to each of multiple output ports of the switch; a switch instruction fetch unit configured to fetch switch instructions for the switch in a first mode, with input data arriving at the switch in successive cycles forwarded according to different switch instructions fetched by the switch instruction fetch unit during the successive cycles; and a multiplexer configured to selectively couple an input port and output port for forwarding data from the input port to the output port in a first mode in successive cycles according to switch instructions fetched by the switch instruction fetch unit and in a second mode, the multiplexer is configured to forward input data arriving at the switch in successive cycles according to single instruction circuitry that establishes a single coupling, with power to the switch instruction fetch unit turned off during the successive cycles during the second mode.