Patent ID: 6958249

Claim:
A method for monitoring electron charge effect occurring during semiconductor processing, comprising: providing a substrate, a layer of n-type conductivity having been created in said substrate; creating a pattern of Local Oxidation of Silicon (LOCOS) regions in said substrate, said pattern of LOCOS being interspersed with exposed regions of said substrate; etching said exposed regions of said substrate using said pattern of LOCOS regions as a hard mask, creating a pattern of elevated LOCOS regions, creating trenches having inside surfaces in said substrate; creating a layer of interlayer oxide over said pattern of LOCOS regions and said inside surfaces of said trenches created in said substrate; depositing a layer of polysilicon over said layer of interlayer oxide; patterning said layer of polysilicon, said patterned layer of polysilicon comprising at least one contact point over said substrate, completing creation of a electron charge monitoring device having a surface; providing a semiconductor processing tool, said semiconductor processing tool being designated as being a tool being evaluated for electron charge effect of a process being performed by said tool; positioning said substrate comprising said electron charge monitoring device inside said processing tool in a location and a position being occupied by a substrate being processed by said tool; establishing processing conditions of a process as these processing conditions apply for said process and said tool; exposing said electron charge monitoring device to said established processing conditions for a period of time; terminating said processing conditions; removing said electron charge monitoring device from said semiconductor processing tool; and measuring a voltage required to induce a FN tunneling based current between the at least one contact point of said patterned layer of polysilicon and said substrate.