Patent ID: 7893499

Claim:
An integrated circuit containing an MOS transistor, said integrated circuit comprising: a semiconductor substrate; a drift region formed in said substrate, said drift region having a first conductivity type, such that said drift region extends to a top surface of said substrate; an isolation dielectric layer formed at said top surface of said substrate over said drift region; a gate trench formed in said substrate, such that said gate trench abuts said isolation dielectric layer; a body well formed in said substrate adjacent to said drift region, such that said body well overlaps a first portion of a bottom surface of said gate trench, and such that said body well has an opposite conductivity type from said drift region; a gate dielectric layer formed on exposed surfaces of said substrate in said gate trench; a gate formed on said gate dielectric layer in said gate trench; and a source diffused region formed in said body well, such that said source diffused region abuts said gate dielectric layer in said gate trench and overlaps a second portion of said bottom surface of said gate trench, said second portion of said bottom surface of said gate trench being within said first portion of said bottom surface of said gate trench, and such that said source diffused region has a same conductivity type as said drift region.