Patent ID: 7402474

Claim:
A method of manufacturing a semiconductor device wherein a semiconductor layer is prepared and wherein a first MOS transistor and a second MOS transistor having a gate oxide film thinner than that of the first MOS transistor are formed in a plurality of element formation regions partitioned by an isolation region formed in the semiconductor layer, the method comprising the steps of: selectively forming a first insulator film on a surface of the semiconductor layer in a formation region of the first MOS transistor; subsequently forming a second insulator film on a surface of the semiconductor layer in formation regions of the first and second MOS transistors; forming a first silicon film and a silicon nitride film on a top surface of the second insulator film, wherein the first silicon film and the silicon nitride film include an opening in a region where a field oxide film is to be formed; forming the field oxide film in the semiconductor layer using the first silicon film and silicon nitride film as a mask and then removing the silicon nitride film; selectively forming a second silicon film on a top surface of the first silicon film so as to form gate electrodes of the first MOS transistor and the second MOS transistor; and ion-implanting impurities from above the semiconductor layer so as to form a drain region and a source region in the semiconductor layer.