Patent ID: 7829425

Claim:
A method comprising: fabricating a semiconductor wafer including a plurality of dice, each of the die including power circuitry; fabricating a plurality of inductors directly onto the plurality of dice on the wafer, each of the inductors in electrical contact with the power circuitry on each of the die respectively, wherein fabricating the plurality of inductors includes forming a plurality of magnetic core inductor members on an interconnect dielectric layer formed over each die on the wafer respectively, wherein forming the plurality of magnetic core inductor members further comprises forming a plurality of rectangular shaped members of NiFe or NiFeCo patterned on the wafer surface, and wherein forming the plurality of rectangular shaped members of NiFe or NiFeCo patterned on the wafer surface further comprises: forming a photoresist layer over a titanium layer, patterning the photoresist layer to form rectangular shaped molds in the photoresist layer, and filling the molds with NiFe or NiFeCo to form the plurality of rectangular shaped members, wherein filling the molds further comprises: stripping the titanium layer within the molds; applying a negative potential to the wafer; and electroplating the wafer in a NiFe or NiFeCo electroplate bath, and forming a plurality of inductor coils over the plurality of magnetic core inductor members over each die on the wafer respectively; and fabricating a plated magnetic layer over the plurality of inductors respectively.