Patent ID: 7570044

Claim:
A signal detecting circuit comprising: a first signal input terminal and a second signal input terminal; a first amplifier which has a first input terminal and a second input terminal and a first output terminal and a second output terminal, and which amplifies the signals inputted from said first input terminal and said second input terminal respectively and outputs the amplified signals from said first output terminal and said second output terminal; a switch unit which connects the first input terminal of said first amplifier to said first signal input terminal, and said second input terminal to said second signal input terminal in a first period; and connects the second input terminal of said first amplifier to said first signal input terminal, and the first input terminal to said second signal input terminal in a second period; a first capacitor, one end of which is connected to said first output terminal; a second capacitor, one end of which is connected to said second output terminal; a first switch, one end of which is connected to the other end of said second capacitor, and which is off in said first period, and which is on in said second period; a second amplifier which has an inverting input terminal connected to the other end of said first capacitor, a non-inverting input terminal connected to the other end of said first switch, and a comparison result outputting terminal, and which compares the signals inputted from said inverting input terminal and said non-inverting input terminal respectively and outputs a comparison result from said comparison result outputting terminal; a second switch which is connected to between said comparison result outputting terminal and said inverting input terminal, and which is on in said first period, and which is off in said second period; a third switch, one end of which is connected to the other end of said second capacitor and one end of said first switch; and which is on in said first period, and which is off in said second period; a fourth switch, one end of which is connected to the other end of said first switch and the non-inverting input terminal of said second amplifier; and which is on in said first period, and which is off in said second period; a threshold voltage source which is connected to between the other end of said third switch and the other end of said fourth switch; and a reference voltage source which is connected to either one of the other end of said third switch and the other end of said fourth switch.