Patent ID: 8654541

Claim:
A three-dimensional power electronics package comprising: a metalized substrate assembly comprising: an insulating dielectric substrate comprising a first power via and a second power via fully extending through a thickness of the insulating dielectric substrate; a first conductive layer on a first surface of the insulating dielectric substrate, the first conductive layer comprising a first conductive region associated with a first voltage potential, and a second conductive region associated with a second voltage potential; and a second conductive layer on a second surface of the insulating dielectric substrate, the second conductive layer comprising a third conductive region associated with the first voltage potential, and a fourth conductive region associated with the second voltage potential, wherein the first power via electrically couples the first conductive region with the third conductive region, and the second power via electrically couples the second conductive region with the fourth conductive region; a first power electronics device electrically coupled to the first conductive layer such that the first power electronics device is positioned in a first plane; and a second power electronics device electrically coupled to the second conductive layer such that the second power electronics device is positioned in a second plane that is parallel to the first plane.