Patent ID: 7688392

Claim:
A pixel structure, including a scan line; a gate, electrically connected to the scan line, wherein the gate has a first opening; a first dielectric layer, covering the scan line and the gate; a channel layer, disposed on the first dielectric layer over the gate and exposed by the first opening; a source and a drain, disposed on the channel layer, wherein a part of the drain is located over the first opening; a data line, disposed on the first dielectric layer and electrically connected to the source; a second dielectric layer, covering the source, the drain and the data line; a pixel electrode, disposed on the second dielectric layer and electrically connected to the drain; and an extension line, electrically connected between the data line and the source, wherein a third opening is entirely enclosed by the extension line, a portion of the data line spanning over the scan line, and the source when the portion of the data line is not broken, and the extension line does not span over the scan line.