Patent ID: 7042892

Claim:
A buffered interface system for interfacing a continuous stream of serial TDM data to a network processor coupled to a parallel data bus, the interface system comprising: an input port for receiving at least one stream of serial TDM data, each data stream comprising a continuous series of time-domain multiplexed time slots synchronized to a common frame pulse signal, each time slot corresponding to a respective virtual channel for carrying digital voice content; a receive component coupled to the input port for buffering and assembling received TDM data so as to form bytes of parallel data; and a parallel bus interface coupled to the receive component for transferring said bytes of parallel data from the interface system to a network processor via a connected parallel data bus wherein: the receive component includes a serial-to-parallel converter for converting each time slot of the serial data stream into a corresponding byte of data, the receive component further includes a receive memory for storing said data bytes; the receive memory is organized so as to define at least two logical receive memory banks, and each of the receive memory banks is selectively configurable as either an active memory bank available for storing a series of said data bytes as provided by the serial-to-parallel converter, or as a non-active memory bank available for transferring previously stored data bytes to the parallel bus interface.