Patent ID: 7576491

Claim:
A plasma display panel, comprising: a first substrate; a second substrate facing the first substrate; a plurality of address electrodes on the second substrate, the address electrodes extending in a first direction; a plurality of other electrodes on the first substrate, the other electrodes extending in a second direction different than the first direction; a plurality of barrier ribs on the second substrate to form a plurality of discharge cells, the plurality of barrier ribs extending in the first direction a sealing layer located between the first substrate and the second substrate, the sealing layer extending in the second direction, wherein the sealing layer has a thermal expansion coefficient of approximately 65×10 −7 ˜80×10 −7 /° C.; at least one of a buffer layer or a dielectric layer formed between the first substrate and the sealing layer, wherein the at least one of the buffer layer or the dielectric layer has the following composition: PbO at a ratio of 45% to 55%, B 2 O 3 at a ratio of 10% to 20% and SiO 2 at a ratio of 15%–25%; and a protective film formed on the at least one of the buffer layer or the dielectric layer, wherein the at least on of the buffer layer or the dielectric layer has a thermal expansion coefficient different from the thermal expansion coefficient of the sealing layer.