Patent ID: 7137082

Claim:
A method of designing an integrated circuit comprising: a. generating a plurality of sequences of basic Boolean elements respectively defined by a plurality of truth tables; b. generating a respective plurality of substituted circuits not definable by a sequence of basic Boolean elements, including a first substitute circuit, wherein the sequence of basic Boolean elements and the respective substitute circuit are defined by a same truth table; c. storing the plurality of sequences of basic Boolean elements in a library; d. storing the plurality of substitute circuits in the library in a relationship corresponding to their respective sequence of basic Boolean elements; e. programming a processing path within the integrated circuit according to the first substitute circuit comprising substitute inputs and a substitute output, wherein the truth table representing the first substitute circuit is identical to the truth table representing a first sequence of basic Boolean elements representing the processing path, and wherein the first substitute circuit is not definable by a sequence of basic Boolean elements; f. reducing the first sequence of basic Boolean elements into at least one intermediate equivalent circuit; and g. generating the first substituted circuit.