Patent ID: 8194150

Claim:
A moving image processing apparatus, comprising: a low-speed clock generation source configured to generate a low-speed clock signal of a first frequency; a high-speed clock generation source configured to generate a high-speed clock signal of a second frequency which is higher than the first frequency; an image data source configured to output progressive-type image data; a PI converter configured to convert the progressive-type image data output from the image data source into interlaced-type image data forming a field and to output the interlaced-type image data; and an arithmetic part configured to process the interlaced-type image output from the PI converter by use of only one of a pair of fields each formed by the interlaced-type image output from the PI converter, wherein the high-speed clock generation source supplies the high-speed clock signal to the image data source and the PI converter; and the low-speed clock generation source supplies the low-speed clock signal to the arithmetic part and the processed interlaced-type image data are output from the moving image processing apparatus at the first frequency.