Patent ID: 8692248

Claim:
An integrated circuit die comprising: A. input and output circuit pads; B. core circuits having core input leads and core output leads coupled with the input and output circuit pads; C. test circuitry having: i. a core input lead; ii. a first circuit pad lead connected with a first circuit pad; iii. a second circuit pad lead connected with a second circuit pad; iii. a tristate output buffer having an input connected with the core input lead, an output connected with the first circuit pad lead, and a control input; iv. compare circuitry having a first input connected with the core input lead, a second input connected with the first circuit pad lead, a third input coupled with the second circuit pad lead, a scan input, a scan output, and a scan control input; and D. multiplex circuitry having inputs connected to core output leads of the core circuits, a core select input, and a selected core output connected to the core input lead of the compare circuitry.