Patent ID: 6888762

Claim:
A computer having an input device, an output device, a storage device, and a processor comprising: a memory device having a memory array having memory cells and having a circuit connected to the processor comprising: a plurality of complementary pairs of digit lines; a row line coupled to the plurality of complementary pairs of digit lines; a plurality of memory cells, at least one of the plurality of memory cells being connected to at least one of the plurality of complementary pairs of digit lines; and a plurality of current-limiting circuits, at least one of the plurality of current-limiting circuits being connected to the at least one of the plurality of memory cells and the at least one of the plurality of complementary pairs of digit lines for utilizing current feedback for limiting a current flow through the plurality of complementary pairs of digit lines during shorting of the at least one of the plurality of complementary pairs of digit lines, each of the plurality of current-limiting circuits comprising a long length, depletion mode transistor having its gate connected to the plurality of complementary pairs of digit lines.