Patent ID: 8922020

Claim:
An integrated circuit pattern comprising: a set of lines of material over a substrate, the lines of material defining a pattern of lines having X direction portions and Y direction portions, the lengths of the X direction portions being substantially longer than the lengths of the Y direction portions; the X direction portions having a first pitch and the Y direction portions having a second pitch, each of the second pitches being larger than the first pitch; the X direction portions being parallel and the Y direction portions being parallel; the Y direction portions comprising end regions; the Y end regions of the direction portions comprising main line portions and offset portions, the offset portions comprising offset elements spaced apart from and electrically connected to the main line portions, the offset portions defining contact areas; and said offset portions comprise a continuous loop offset portion contacting the main line portion and located to one side of the main line portion, the offset portion and the main line portion completely surrounding an open central region.