Patent ID: 7876123

Claim:
An input/output (I/O) cell comprising: a predriver circuit configured to generate a first driver control signal and a second driver control signal in response to a drive control signal, a on-die termination control signal, a slew control signal, and a data output signal, wherein said predriver circuit comprises a binary programmable predriver comprising (i) a plurality of first drivers, each first driver comprising a programmable binary weighted cascode ngate driver, and (ii) a plurality of second drivers, each second driver comprising a programmable binary weighted cascode pgate driver; an output driver circuit comprising (i) a plurality of driver-capable segments configured to provide a binary weighted drive network and (ii) a plurality of on-die termination (ODT) capable segments configured to provide a binary weighted termination network, wherein said output driver circuit is configured (i) to drive an input/output pad in a first mode and (ii) provide on-die termination of said input/output pad in a second mode in response to said first driver control signal and said second driver control signal.