Patent ID: 8713509

Claim:
A computer-implemented method performed by a computer having a processor and a memory device, the method comprising: obtaining a circuit design, the circuit design is responsive to input signals, the circuit design defines connections between combinational elements, memory elements, and input signals; determining a clock gating function with respect to a memory element of the circuit design by automatically approximating the circuit design with respect to the memory element, thereby determining an approximated circuit design, and by determining the clock gating function based on the approximated circuit design, by using a computer, wherein the approximated circuit design is functionally non-equivalent to the circuit design due to omitted combinatorial logic; modifying the circuit design to introduce a synthesized combinational logic based on the clock gating function, wherein the modified circuit design is configured to perform clock gating of the memory element based on clock gating opportunities identified by the clock gating function; and modifying the clock gating function by introducing combinational function removed from the approximated circuit design and simplifying the clock gating function.