Patent ID: 7908535

Claim:
An apparatus comprising: a scan chain having a plurality of scan latches that are coupled to one another, wherein each of the scan latches is controlled by one of a first latch control signal and a second latch control signal; input logic including: an input latch that is control by a first scan clock signal and that receives a scan input signal; and a first multiplexer having a first input terminal, a second input terminal, a selection terminal, and an output terminal, wherein the first input terminal of the first multiplexer receives the scan input signal, and wherein the second terminal of the first multiplexer is coupled to the input latch, and wherein the selection terminal of the first multiplexer receives a master control signal, and wherein the output terminal of the first multiplexer is coupled to the scan chain; output logic including: an output latch that is control by a second scan clock signal and that is coupled to the scan chain; and a second multiplexer having a first input terminal, a second input terminal, a selection terminal, and an output terminal, wherein the first input terminal of the second multiplexer is coupled to the scan chain, and wherein the second terminal of the second multiplexer is coupled to the output latch, and wherein the selection terminal of the second multiplexer receives the master control signal; a scan clock generator that generates the first and second scan clock signals and that is coupled to the input and output latches; and an odd/even generator that generates the first latch control signal and the second latch control signal, wherein the odd/even generator includes: a third multiplexer having a first input terminal, a second input terminal, a selection terminal, and an output terminal, wherein each of the first and second input terminals of the third multiplexer is coupled to the scan clock generator, and wherein the selection terminal of the third multiplexer receives the master control signal, and wherein the output terminal of the third multiplexer is coupled to a first set of scan latches from the scan chain; and a fourth multiplexer having a first input terminal, a second input terminal, a selection terminal, and an output terminal, wherein each of the first and second input terminals of the fourth multiplexer is coupled to the scan clock generator, and wherein the selection terminal of the fourth multiplexer receives the master control signal, and wherein the output terminal of the fourth multiplexer is coupled to a second set of scan latches from the scan chain.