Patent ID: 8643090

Claim:
A semiconductor device, comprising: a substrate including a first well region, and a second well region spaced apart from the first well region by an active region; a first source/drain region disposed within the first well region; a second source/drain region disposed within the second well region; the active region electrically coupled between the first source/drain region and the second source/drain region; wherein the active region comprises a region of lower doping concentration disposed between the first well region and the second well region, wherein the region of lower doping concentration has a concentration lower than a doping concentration of each of the first well region and the second well region; a trench disposed between the second source/drain region and at least a portion of the active region; a first isolation layer disposed over a bottom and sidewalls of the trench; electrically conductive material disposed in the trench, wherein the electrically conductive material is disposed over the first isolation layer; a second isolation layer disposed over the active region; and a gate region disposed over the second isolation layer; wherein the electrically conductive material is coupled to an electrical contact.