Patent ID: 6975168

Claim:
A drive circuit outputting to an output node a potential corresponding to an input potential, comprising: a first sub-drive circuit including: a first transistor of a first conductivity type connected between a first power supply potential line and a first node; a second transistor of the first conductivity type having a gate and a first electrode connected to a gate of said first transistor, and a second electrode connected to a second node; a third transistor connected in series with said second transistor between second and third power supply potentials lines; and a first differential amplifier for regulating a gate potential of said third transistor to match a potential at said second node with said input potential; a second sub-drive circuit including: a fourth transistor of a second conductivity type connected between a fourth power supply potential line different from said first power supply potential and a third node; a fifth transistor of a second conductivity type having a gate and a first electrode connected to a gate of said fourth transistor, and a second electrode connected to a fourth node; a sixth transistor connected in series with said fifth transistor between said second and third power supply potential lines; and a second differential amplifier for regulating a gate potential of said sixth transistor to match a potential at said fourth node with said input potential; a first offset compensation circuit for eliminating an offset voltage of said first sub-drive circuit and connecting said first node to said output node; and a second offset compensation circuit for eliminating an offset voltage of said second sub-drive circuit and connecting said third node to said output node.