Patent ID: 7332764

Claim:
A metal-insulator-metal (MIM) capacitor, comprising: an interlayer insulating layer on a semiconductor substrate; a lower metal interconnection and a lower metal electrode in the interlayer insulating layer and spaced apart from each other; a first capping layer on the lower metal interconnection and a second capping layer on the lower metal electrode; a monolithic intermetal dielectric layer covering the lower metal interconnection, the lower metal electrode, the first and second capping layers, and the interlayer insulating layer; a via hole and an upper metal interconnection groove both disposed in the monolithic intermetal dielectric layer, wherein: the via hole penetrates a lower surface of the monolithic intermetal dielectric layer to expose the first capping layer on the lower metal interconnection, and the upper metal interconnection groove penetrates an upper surface of the monolithic intermetal dielectric layer and crosses over the via hole, such that an interface of the upper metal interconnection groove with the via hole is within the monolithic intermetal dielectric layer; at least one capacitor trench region extending through the monolithic intermetal dielectric layer, the at least one capacitor trench region exposing the second capping layer on the lower metal electrode; an upper metal interconnection filling the upper metal interconnection groove, the upper metal interconnection being electrically connected to the lower metal interconnection through the via hole; a dielectric layer covering inner surfaces of the at least one capacitor trench region; and an upper metal electrode surrounded by the dielectric layer to fill the at least one capacitor trench region.