Patent ID: 8729874

Claim:
A low power voltage regulator comprising: a first diode-connected transistor of a first polarity type in series with a second diode-connected transistor of a second polarity type coupled between an output node and ground; a first bias current having a value for biasing the first and second diode-connected transistors in a sub-threshold mode of operation: and a buffer amplifier comprising an input transistor having a gate forming an input of the buffer amplifier coupled to the output node, a drain, and a source forming an output of the buffer amplifier for providing the regulated output voltage, a feedback transistor having a gate coupled to the drain of the input transistor, a source for coupling to a power supply voltage, and a drain coupled to the source of the input transistor, a second bias current coupled to the drain of the input transistor, and a third bias current coupled to the source of the input transistor.