Patent ID: 8452022

Claim:
A digital filter circuit for producing a noise reduction signal for reducing noise based on a noise signal outputted from a microphone which collects the noise, comprising: an analog/digital conversion section configured to convert the noise signal into a digital noise signal; a first digital filter section configured to decimate the digital noise signal to generate a decimated digital noise signal; an arithmetic operation processing section configured to produce a digital noise reduction signal based on the decimated digital noise signal; a second digital filter section configured to interpolate the digital noise reduction signal to generate an interpolated digital noise reduction signal; and a digital/analog conversion section configured to convert the interpolated digital noise reduction signal into an analog signal, wherein said first digital filter section and/or said second digital filter section are configured to obtain a predetermined attenuation amount within a predetermined range in a proximity of a sampling frequency around the sampling frequency, the sampling frequency is a frequency higher than twice an audible range, the predetermined range in the proximity of the sampling frequency is within a range from −4 kHz to +4 kHz around the sampling frequency, and said predetermined attenuation amount is more than −60 dB.