Patent ID: 8278165

Claim:
A method for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate having pFET and nFET regions, each having active areas and shallow trench isolation; forming a hardmask layer overlying the semiconductor substrate; providing a photoresist layer over the hardmask layer; patterning the phoresist layer; removing an exposed portion of the hardmask layer from one of the pFET region and nFET region with the patterned photoresist acting as an etch mask to define a masked region and an unmasked region; forming an epitaxial silicon layer on the active area in the unmasked region; forming a protective oxide layer overlying the epitaxial silicon layer; removing the hardmask layer from the masked region with the protective oxide layer protecting the epitaxial silicon layer during such removal step; and removing the protective oxide layer from the epitaxial silicon layer.