Patent ID: 6890826

Claim:
A method of making a bipolar junction transistor, comprising: depositing a dielectric layer on a partially-processed semiconductor wafer having a collector region, a base region within the collector region so as to define a base-collector junction, and an emitter region within the base region, the dielectric layer having two openings defined by a single masking step, a first opening being formed above the emitter region and the second opening being formed above the base-collector junction; depositing polysilicon where the openings are formed; selectively doping the polysilicon in the areas of the openings to create respective doped areas of polysilicon; patterning and etching the doped polysilicon to leave a polysilicon emitter contact and an integrated polysilicon base contact/field plate within the respective openings; and depositing respective metal contacts on the emitter contact and integrated base contact/field plate.