Patent ID: 7657680

Claim:
An integrated circuit comprising: a plurality of external device interfaces for coupling the integrated circuit to a plurality of external devices, each external device interface supporting a communication protocol and each external device interface configured to couple more than one external device to the integrated circuit; a configurable control mechanism for controlling the selection of a designated one of the plurality of external device interfaces so as to facilitate communication between the integrated circuit and an external device using the communication protocol supported by the selected device interface, wherein the configurable control mechanism receives or accesses configuration data and communication data from other components of the integrated circuit; and a selection mechanism configured through the reception of one or more selection signals from the configurable control mechanism to select the designated one of the plurality of external device interfaces and to deactivate non-selected external device interfaces and further configured to receive communication data from the plurality of external device interfaces and to provide the received communication data to the configurable control mechanism; wherein the selection mechanism includes: a plurality of registers containing inactive default setting data; a plurality of multiplexers, each multiplexer having a selection node coupled to the control mechanism, a first input node coupled to the control mechanism, a second input node coupled to one of the plurality of registers, and an output node coupled to one of the plurality of external device interfaces; wherein each multiplexer is configured to provide data from the configurable control mechanism to the one of the plurality of external device interfaces connected to the output node of each multiplexer when the first input node of each multiplexer is selected by the selection node; and wherein each multiplexer is configured to provide the inactive default setting data from the plurality of registers connected to second input node of each multiplexer to the one of the plurality of external device interfaces connected to the output node of each multiplexer when the second input node of each multiplexer is selected by the selection node.