Patent ID: 8680521

Claim:
A semiconductor device comprising a transistor, the transistor comprising: a gate electrode layer; a gate insulating layer adjacent to the gate electrode layer; and an oxide semiconductor layer adjacent to the gate electrode layer with the gate insulating layer therebetween, wherein a channel length formed in the oxide semiconductor layer is 0.2 μm to 3.0 μm, wherein a thickness of the oxide semiconductor layer is 15 nm to 30 nm, wherein a thickness of the gate insulating layer is 20 nm to 50 nm, wherein the oxide semiconductor layer includes a region in which a concentration of hydrogen is 5×10 19 /cm 3 or less, and wherein an off current per micrometer in a channel width is 100 aA/μm or less when a drain voltage of 1 V to 10 V is applied.