Patent ID: 7751219

Claim:
A multiport CAM, comprising: an I/O driver including an input port (DATAIN [ 0 : m]) to receive a search request for a data at a user specified address; a write/search bit line decoder and driver circuit including a write enable signal port is coupled to the I/O driver; a CAM device coupled to the write/search bit line decoder and driver circuit; a priority encoder coupled to the CAM device to receive match signals and output hit/miss signals upon receiving the search request for the data at a user specified address in the CAM device via the input port of the I/O driver in a given clock cycle; and a control circuit coupled between the priority encoder and the write/search bit line decoder and driver circuit to receive the hit/miss signals and to output a write enable signal upon detecting a miss signal and wherein the write/search bit line decoder and driver circuit to receive the write enable signal via the write enable signal port and write the data to the CAM device at a user specified address using the associated read/write bit line and read/write bit complement line in the same given clock cycle, wherein the control circuit further comprises a valid bit clear control circuit and associated Valid Bit Reset (RST) command port and a VA address-to-clear port for performing a valid bit clear upon receiving a user specified address via the RST command port and the VA address-to-clear port, respectively, in the same given clock cycle.