Patent ID: 8677305

Claim:
A method comprising: determining, within a sector in a clock network design, a plurality of initial sink locations for connection of output terminal points of sector buffers, wherein the sector comprises a plurality of loads; balancing, by a computer, the plurality of loads across the plurality of initial sink locations based, at least in part, on magnitude of the loads and delays of paths between the loads and the plurality of initial sink locations, wherein said balancing the plurality of loads across the plurality of initial sink locations yields clusters of loads from the plurality of loads; wherein said balancing the plurality of loads across the plurality of initial sink locations based, at least in part, on magnitude of the loads and delays of paths between the loads and the plurality of initial sink locations comprises: for each of the initial sink locations, selecting an unassociated load of the plurality of loads based on a magnitude of the unassociated load of the plurality of loads and a sum of magnitudes of associated loads of the plurality of loads for each of the other sink locations, and based on delays of paths from unassociated loads of the plurality of loads to the initial sink location, wherein the unassociated load of the plurality of loads are loads not associated with the plurality of initial sink locations and the associated loads of the plurality of loads are associated with the other sink locations of the plurality of sink locations; and for each of the clusters of loads, determining a center sink location that is at least approximately at a center of the cluster of loads; and indicating a final sink location based on the center sink location, wherein the final sink location is a connection for an output terminal point of a sector buffer that drives a clock signal to the loads of the cluster of loads.