Patent ID: 8193006

Claim:
A method for repairing a chip, comprising: providing a first chip, wherein the first chip comprises a first circuit block with a first function, a second circuit block with a second function, and a signal path electrically connected to the first circuit block and the second circuit block, the first circuit block comprises a first power terminal and a first signal terminal, the second circuit block comprises a second signal terminal, and the signal path connects the first signal terminal and the second signal terminal; obtaining a first verification result by verifying a function of the first chip; providing a second chip, wherein the second chip comprises a third circuit block with the first function, and the third circuit block comprises a third power terminal and a third signal terminal; obtaining a second verification result by verifying a function of the second chip; disabling the first circuit block if the first verification result shows that the first circuit block of the first chip is defective; electrically connecting the third circuit block to the signal path to replace the first circuit block and provide the first function if the first verification result shows that the second circuit block of the first chip is functional and the second verification result shows that the third circuit block of the second chip is functional; stacking the first chip and the second chip; and disposing a first hardwired switch of the first chip and a third hardwired switch of the second chip correspondingly according to the first verification result and the second verification result, wherein the first hardwired switch is connected to the first power terminal, the third hardwired switch is connected to the third power terminal and electrically connected to the first hardwired switch, such that a power-supply bonding pad is connected to the third power terminal of the second chip and disconnected to the first power terminal of the first chip.