Patent ID: 7474556

Claim:
A phase-change random access memory device, comprising: a plurality of memory blocks, each memory block including a plurality of phase-change memory cells; a main word line arranged in common with the plurality of memory blocks; a plurality of local word lines arranged corresponding to the plurality of memory blocks, respectively; and a plurality of section word line drivers, each section word line driver being connected between the main word line and at least one respective local word line of a corresponding memory block and adapted to adjust a voltage level of the at least one respective local word line in response to a voltage applied to the main word line and block information of the corresponding memory block, wherein the plurality of section word line drivers include at least one first section word line driver and at least one second section word line driver, wherein the at least one first section word line driver includes at least one pull-down device pulling-down the voltage level of at least one respective local word line in response to voltages applied to the main word line and first block information, while not including a pull-up device, and wherein the at least one second section word line driver includes at least one pull-up device pulling-up the voltage level of at least one respective local word line in response to the voltages applied to the main word line and at least one pull-down device pulling-down the voltage level of at least one respective local word line in response to the voltages applied to the main word line and second block information, the second block information being different from the first block information.