Patent ID: 8354714

Claim:
A SOI MOS device having body tied to source (BTS) structure comprises: a semiconductor substrate; a buried oxide layer (BOX) formed on the semiconductor substrate; an active region formed on the buried oxide layer, including a gate region, a body region formed under the gate region, an N-type source region and an N-type drain region which are located on the two opposite ends of the body region, and an insulation spacer formed surrounding the gate region; and an shallow trench isolation region formed surrounding the active region; wherein the N-type source region comprises: two heavily doped N-type regions; a heavily doped P-type region formed between the two heavily doped N-type regions; a silicide formed on, which is also contact to, the two heavily doped N-type regions and the heavily doped P-type region; a shallow N-type region which is contact to the silicide; the heavily doped P-type region is contact to all of the two heavily doped N-type regions, the shallow trench isolation region, the body region and the silicide thereon.