Patent ID: 7084671

Claim:
A sense amplifier, comprising: an input stage having a pair of balanced isolation devices, each of the pair of balanced isolation devices having an input connected to receive a separate one of a pair of differential input signals, each of the pair of balanced isolation devices having a gate connected to receive a common bias voltage; and a sense stage having a pair of sense nodes connected to receive respective output signals from the pair of balanced isolation devices of the input stage, the sense stage being further configured to amplify a voltage of the received output signal having the higher voltage, wherein the sense stage includes a pair of booster circuits, each of the pair of booster circuits being configured to assist in a low-to-high state transition of a separate one of the pair of sense nodes during a sensing operation, wherein each of the pair of booster circuits includes, a NAND device connected to receive an equalization control signal as a first input and a state of the sense node to which the booster circuit is connected as a second input, a PMOS device having an input connected to a supply voltage and an output connected to the sense node to which the booster circuit is connected, the PMOS device having a gate connected to receive an output of the NAND device.