Patent ID: 7786908

Claim:
A successive approximation type A/D (analog to digital) converter comprising: a main capacitance array connected with a common connection node; a correction capacitance array; a voltage comparator configured to detect a voltage of said common connection node; a successive approximation register in which a value is set based on an output of said voltage comparator; a first control circuit configured to change a voltage applied to capacitance elements of said main capacitance array and said correction capacitance array based on a value set in said successive approximation register; a second control circuit configured to respond to a control signal to connect said main capacitance array to an input voltage signal or a first predetermined voltage, and said correction capacitance array to said common connection node or a second predetermined voltage, a connection switch provided between said main capacitance array and said correction capacitance array to selectively connect said correction capacitance array to said main capacitance array in response to a switch control signal, wherein said connection switch disconnects said main capacitance array from said correction capacitance array during a sampling period; an upper limit voltage supply line on which an upper limit reference voltage is supplied; a lower limit voltage supply line on which a lower limit reference voltage is supplied; a reference voltage switch; a correction switch group; and an input signal supply line on which said input analog voltage signal is supplied, wherein said reference voltage switch connects said correction capacitance array to said upper limit voltage supply line during the sampling period, and wherein said correction switch group connects said correction capacitance array to said lower limit voltage supply line during the sampling period.