Patent ID: 8892944

Claim:
A method for handling a failed processor of a multiprocessor information handling system, the multiprocessor information handling system comprising at least two processors interconnected by processor interconnects for facilitating transactions of the processors, the at least two processors comprising a first processor and a second processor, the first processor being set as a default boot processor in response to a boot-up operation of the multiprocessor information handling system, and the system further comprising a first processor socket for accommodating the first processor and a second processor socket for accommodating the second processor, the method comprising: detecting and receiving, via a baseboard management controller, health information of the at least two processors; providing a multiplexer operative to switch between the at least two processors, the multiplexer being coupled to the baseboard management controller and respectively to the at least two processors; and in response to the health information indicating the first processor has failed, setting, via a processor ID controller, the second processor as the default boot processor and enabling, via the baseboard management controller, the multiplexer to switch to the second processor, wherein the processor ID controller comprises a processor socket ID controller for setting either the first processor received in the first processor socket as the default boot processor or the second processor received in the second processor socket as the default boot processor.