Patent ID: 8427456

Claim:
A flat display device, comprising: a display panel which is driven by a horizontal driver and a vertical driver, and provided with a display face with an aspect ratio of 9:16, the display face being divided into four sub-display regions in a horizontal direction; a memory circuit which substantially includes four unit memories respectively storing unit data corresponding to the sub-display regions; a plurality of registers which supplies signals read from the memory circuit to the horizontal driver; and a memory control circuit which transfers the data in the unit memories to the registers, the memory control circuit being controlled by one of a wide display selection signal and a 3:4 display selection signal, wherein, under the control of the memory control circuit, a full region-display state of the display panel is set if the wide display selection signal is set, and a non-full region-display state of the display panel where at least a portion of one of the four sub-display regions is not used to display an image is set if the 3:4 display selection signal is set, the memory control circuit divides one line of a digital video signal into three unit data elements when the digital video signal is a 3:4 digital video signal and the 3:4 display selection signal is set; writes the three unit data elements in three of the four unit memories and reads the unit data in the three unit memories; outputs write and read addresses corresponding to the sub-display regions, the write and read addresses each having a high-order address and a low-order address, the high-level address selecting an arbitrary unit memory of the four unit memories, the low-order address designating an address of the selected unit memory; and thereby sets the display panel to one of a left-sided display, a centered display, or a right-sided display according to the selection of the high-order address, and controls a data write or read direction in adjacent sub-display regions to be a laterally inverted direction according to the selection of the low-order address.