Patent ID: 8618599

Claim:
A method of manufacturing a semiconductor device, the method comprising: providing a semiconductor layer of a first conductivity type; forming a semiconductor layer of a second conductivity type on the semiconductor layer of the first conductivity type; forming one or more insulator layers on the semiconductor layer of the second conductivity type; etching a plurality of trenches in the semiconductor layer of the second conductivity type, thereby forming a portion of a plurality of CC trenches and a CG trench; forming an oxide layer in the plurality of trenches and on the semiconductor layer of the second conductivity type; forming a masking layer on a portion of the one or more insulating layers; forming a gate oxide layer in the CG trench; forming polysilicon gate material in the CG trench; forming a second insulator layer, thereby filling a portion of the CC trenches; forming a second material, thereby filling a second portion of the CC trenches; forming a third insulator layer, thereby filling a remainder of the CC trenches; forming one or more device regions; forming a source metal layer; wherein the semiconductor layer of the second conductivity type comprises a multi-layer structure including an n-type material layer on the semiconductor layer of the first conductivity type and a p-type material layer on the n-type material layer; wherein the second material comprises aluminum fluoride; and wherein the second material further comprises an insulating layer.