Patent ID: 7262651

Claim:
An input buffer circuit configured to receive two differential input signals, the circuit comprising: a current source part connected between a power source voltage terminal and a current source node; a current sink part connected between a current sink node and a ground terminal; a first inverter configured to receive the first one of the two differential input signals and to output the inverted first differential input signal at a first output node; a second inverter configured to receive the second differential input signal and to output the inverted second differential input signal at a second output node; a first diode connected between the power source voltage terminal and the first output node; a second diode connected between the first output node and the ground terminal; a third diode connected between the power source voltage terminal and the second output node; a fourth diode connected between the second output node and the ground terminal; wherein the first inverter is operatively connected between the current source node and the current sink node; and wherein the second inverter is operatively connected between the current source node and the current sink node.