Patent ID: 7871870

Claim:
A method for fabricating an electronic device, comprising: (a) providing a nanowire having a semiconductor inner portion, an insulating shell layer surrounding the core, and a conductive layer surrounding the insulating shell layer; (b) removing the conductive layer from the nanowire except for a first portion of the conductive layer at least partially encircling the nanowire at a first location along the length of the nanowire and at least a second portion of the conductive layer along a length of the nanowire on a side opposite from the removing; (c) positioning a dielectric material on the nanowire; (d) removing the dielectric material and the insulating shell layer from the nanowire at a second location and a third location along the length of the nanowire, wherein the second location and the third location are on opposite respective sides of the first location along the length of the nanowire, wherein at least one of the second location and the third location overlaps with the second portion of the conductive layer along the length of the nanowire; and (e) forming a source contact on the second location and a drain contact on the third location.