Patent ID: 7209398

Claim:
A semiconductor memory device comprising: a main cell array which includes a plurality of memory cell arrays, the memory cell arrays having ferroelectric cells arranged at intersections between word lines and bit lines; a redundancy cell array which is arranged independently of the main cell array and shared by said plurality of memory cell arrays, the redundancy cell array having spare ferroelectric cells arranged at intersections between spare word lines and redundancy bit lines, the spare ferroelectric cells connected to the redundancy bit line being smaller in number than the ferroelectric cells connected to the bit line in memory cell arrays in the main cell array; a correction capacitance which is connected to the redundancy bit line to make a capacitance of the redundancy bit line equivalent to that of the bit line; and switching circuits which are arranged in correspondence with the memory cell arrays and configured to, when a replaced ferroelectric cell in the main cell array is selected, select a corresponding spare ferroelectric cell in place of the replaced ferroelectric cell; an address buffer circuit to which an address signal is input; a redundancy fuse circuit which receives an output signal from the address buffer circuit, the redundancy fuse circuit storing an address of a defective cell in the main cell array; a row decoder/PL control circuit which receives the output signal from the address buffer circuit and an output signal from a control circuit and selectively drives the word lines and a plate line in the main cell array; and a RD row decoder/RDPL control circuit which receives the output signal from the redundancy fuse circuit and an output signal from the row decoder/PL control circuit and selectively drives the spare word lines and a spare plate line in the redundancy cell array, wherein when the address of the defective cell, which is stored in the redundancy fuse circuit, is selected, the switching circuits select the spare ferroelectric cells.