Patent ID: 7368937

Claim:
An input termination circuit, comprising: a pull up circuit that is configured to terminate an input signal to a power voltage level responsive to the input signal being at a “low” level, the pull up circui t comprising: a first comparator circuit configured to be enabled responsive to a termination control signal and configured to compare a reference voltage and the input signal; and a pull up transistor having controlled terminals coupled to a power voltage and a terminal to which the input signal is applied and a controlling terminal coupled to an output of the first comparator circuit; and a pull down circuit that is configured to terminate the input signal to a ground voltage level responsive to the input signal being at a “high” level the pull down circuit comprising: a second comparator circuit configured to be enabled responsive to the termination control signal and configured to compare a reference voltage and the input signal; and a pull down transistor having controlled terminals coupled to a ground voltage and a terminal to which the input signal is applied and a controlling terminal coupled to an output of the second comparator circuit.