Patent ID: 8309960

Claim:
A display device comprising a plurality of thin-film transistors formed on a substrate on which a display area is formed, wherein at least one of the plurality of thin-film transistors comprising: a gate electrode; an interlayer insulating film formed on the gate electrode and having an opening formed in an area where the gate electrode is formed in plan view; a gate insulating film formed to cover the interlayer insulating film; an island-like laminate formed by sequentially laminating a semiconductor film and a heavily-doped semiconductor film, wherein the island-like laminate is formed so as to be across the opening of the interlayer insulating film and is formed in the area where the gate electrode is formed in plan view; and a pair of electrodes arranged on an upper surface of the interlayer insulating film with the opening interposed therebetween, wherein each of the pair of electrodes is formed to partly overlap the heavily-doped semiconductor film and to partly overlap the gate electrode such that the interlayer insulating film is interposed between a part of each of the pair of electrodes and the gate electrode, when viewed in the plan view, and wherein a thickness of the interlayer insulating film is greater than a thickness of the gate insulating film to thereby decrease parasitic capacitance between a gate signal line coupled to the gate electrode and a drain signal line coupled to one of the pair of electrodes.