Patent ID: 8463983

Claim:
A solid state storage device, comprising: a plurality of blocks configured as storage memory for a solid state storage device, each block comprising a plurality of data pages; and a controller comprising integrated circuits configured to operate the solid state storage device; wherein a free block of the plurality of blocks is assigned an integer number being a marker level by the controller; wherein, for a particular data page of the plurality of data pages, each particular data page is written to a block of the plurality of blocks with the marker level corresponding to a level of dynamicity calculated by the controller for that particular data page; wherein the marker level of the block indicates the dynamicity, being the frequency of being updated, of all data pages stored on that block; and wherein the data pages of a same dynamicity are placed together; wherein, when a valid data page is to be relocated from an occupied block to a new block, the controller is configured to: denote a previous marker level for the valid data page as r and a new marker level for the valid data page as r′; determine that the valid data page is stored in the new block corresponding to the new marker level r′=r−1 when r>0, where 0 is a highest static level; and determine that the valid data page is stored in the new block corresponding to the new marker level r′=0 in any case when r>0 is not true.