Patent ID: 7839965

Claim:
A clock generator for a transmitter in a transceiver adapted to communicate data over a serial data link, the transceiver including a clock data recovery circuit adapted to recover a receive clock and to output a reference clock signal derived from the recovered receive clock, the clock generator comprising: a local clock adapted to output a local clock signal; a frequency difference detector adapted to i) receive the local clock signal and the reference clock signal output from the clock data recovery circuit and ii) provide a fractional frequency difference signal based on a frequency difference between the local clock signal and the reference clock signal, wherein the reference clock signal is a fraction of the recovered receive clock; and a fractional-N frequency synthesizer adapted to generate i) an integer multiple of the local clock signal, ii) a fractional multiple of the local clock signal based on the fractional frequency difference signal and iii) combine the integer multiple and the fractional multiple to provide a transmit clock signal having a same frequency as the recovered receive clock signal.