Patent ID: 7352242

Claim:
A programmable gain amplifier circuit, comprising: a differential amplifier that includes an inverting input terminal, a non-inverting input terminal, and an output terminal, wherein the inverting input terminal is coupled to a feedback node, the non-inverting input is arranged to receive an input signal, and wherein the output terminal is coupled to an output node; a first gain setting feedback circuit that includes a first terminal that is coupled to the output node, a second terminal that is coupled to a first intermediate node, and a third terminal that is coupled to a circuit ground, wherein the first gain setting feedback circuit has an associated first gain value (G 1 ); a second gain setting feedback circuit that includes a first terminal that is coupled to the output node, a second terminal that is coupled to a second intermediate node, and a third terminal that is coupled to the circuit ground, wherein the second gain setting feedback circuit has an associated second gain value (G 2 ) that is different from and independent from the first gain value (G 1 ); and a trim adjustment circuit that includes a first terminal that is coupled to the first intermediate node, a second terminal that is coupled to the second intermediate node, and a third terminal that is coupled to the feedback node, wherein the trim adjustment circuit is arranged to adjust a gain trim associated with the programmable gain amplifier in response to a multi-bit digital control signal (DCTL) such that a gain factor associated with the programmable gain amplifier is a blend of the first gain value (G 1 ) and the second gain value (G 2 ), wherein the blend is adjustable controlled in response to a multi-bit digital control signal (DCTL).