Patent ID: 7557045

Claim:
A method for manufacturing a semiconductor device, the method comprising: forming a wiring layer on an insulating film covering a principal surface of a semiconductor substrate, wherein said wiring layer comprises an antireflection film formed as an uppermost layer of said wiring layer; forming an interlayer insulating film on said insulating film, said interlayer insulating film covering said wiring layer and including a lamination film of a deposited insulating film and a coated insulating film stacked in a recited order from a bottom; and forming a contact hole through said interlayer insulating film in a region corresponding to a partial surface area of said wiring layer, by a selective dry etching process, said selective dry etching process being executed by a plurality of steps including at least first and second steps, said first step etching said insulating film to leave at least a portion of said deposited insulating film and not expose said antireflection film of said wiring layer under a highly depositive condition such that said coated insulating film is not side-etched, and said second step etching said deposited insulating film under a lowly depositive condition such that polymer formation derived from said wiring layer is suppressed in said contact hole.