Patent ID: 7436046

Claim:
A semiconductor device having an MISFET, comprising: (a) a silicon-germanium layer formed over a semiconductor substrate; (b) a strained silicon layer formed over the silicon-germanium layer; (c) a gate insulating film formed over the strained silicon layer; (d) a gate electrode formed over the gate insulating film; and (e) a source region and a drain region; wherein the strained silicon layer is thicker than a critical film thickness at which misfit dislocations occur and the misfit dislocations exist on an interface between the strained silicon layer and silicon-germanium layer, wherein the source region and drain region are each comprised of an impurity diffusion region and an extension region which is shallower or has a lower impurity concentration than the impurity diffusion, and wherein the extension region is formed in a region shallower than the interface between the strained silicon layer and the silicon-germanium layer, and the extension region has a thickness greater than a critical film thickness at which misfit dislocations occur.