Patent ID: 6894929

Claim:
A method of programming a semiconductor memory device having a plurality of memory cells, which allows a computer upon programming of the semiconductor memory device having the plurality of memory cells to execute: a verification step 1 of verifying whether a memory cell has been already programmed or it has not been programmed yet per memory cell to be programmed; a flagging step 2 of flagging the memory cell in the case where it is verified that the memory cell has not been programmed yet in the several verifying steps, to which the memory cell is subjected thereafter, even if it is verified that the memory cell has been already programmed; a first application step 3 of applying a programming pulse having a programming level to the not-programmed memory cell without any flag; a repeat step 4 of repeating the verification step 1 , the flagging step 2 and the first application step 3 until it is verified that all of the memory cells have been already programmed at least once; and a second application step 5 of applying a boost pulse having a boost programming level lower than that of the programming level to the memory cell with the flag, wherein the memory cell is a nonvolatile memory cell including a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having the function of retaining charges.