Patent ID: 8245392

Claim:
A method of making an interposer for interconnecting a high density pattern of conductors of an electronic device and a less dense pattern of conductors on a circuitized substrate, said method comprising: providing a single, thin dielectric layer including first and second opposing surfaces; forming a high density pattern of conductors on said first surface of said single, thin dielectric layer adapted for engaging said high density pattern of conductors of said electronic device; forming a high density pattern of openings within said single, thin dielectric layer, each of said openings aligned with and exposing a respective one of said conductors of said high density pattern of conductors on said first surface and extending through said single, thin dielectric layer to said second opposing layer; forming a circuit pattern on said second opposing surface of said single, thin dielectric layer and including a first high density pattern of conductors similar to said high density pattern of conductors on said first surface and a second, less dense pattern of conductors adapted for being electrically coupled to said less dense pattern of conductors of said circuitized substrate; forming a plurality of circuit lines interconnecting selected ones of said conductors of said high density pattern of conductors on said second opposing surface to selected ones of said conductors of said less dense pattern of conductors; and forming a plurality of conductive members within said high density pattern of openings within said single, thin dielectric layer to electrically interconnect selected ones of said high density pattern of conductors on said first surface to selected ones of said high density pattern of conductors on said second opposing surface.