Patent ID: 7924196

Claim:
A parallel digital-analog converter for the conversion of a plurality of differential digital input signals into a differential analog output signal, including a group of 1-bit digital-analog converters ( 200 ) which respectively include an intermediate storage cell ( 202 ) and a current cell ( 201 ) and which are adapted to feed a respective output current to a first ( 204 ) or a second output contact ( 206 ) in dependence on a logic state of the intermediate storage cell, characterized in that a first of two outputs of the intermediate storage cell ( 202 ) is connected by way of an input resistor ( 220 ) to a first signal terminal ( 208 . 1 ) of a first transistor ( 208 ) and a second of the two outputs of the intermediate storage cell ( 202 ) is connected by way of an input resistor ( 218 ) to a first signal terminal ( 210 . 1 ) of a second transistor ( 210 ); the respective first signal terminals of the first and second transistors are additionally connected by way of a constant current source ( 212 and 214 ) to a ground terminal ( 216 ); and a respective time-constant bias voltage is applied at a respective control terminal ( 208 . 2 and 210 . 2 ) of the first and second transistors.