Patent ID: 8423750

Claim:
A data processing system comprising: a processor; and a memory coupled to the processor, wherein the processor comprises a fetch unit and hardware implemented pervasive thread control logic coupled to the fetch unit, wherein: the fetch unit is configured to receive a branch-to-assist-thread instruction of a main thread, wherein the branch-to-assist-thread instruction informs hardware of the processor to look for an already spawned idle thread to be used as an assist thread; and the hardware implemented pervasive thread control logic is configured to: determine if one or more already spawned idle threads are available for use as an assist thread; select an idle thread from the one or more already spawned idle threads if it is determined that one or more already spawned idle threads are available for use as an assist thread, to thereby provide the assist thread; and offload a portion of a workload of the main thread to the assist thread.