Patent ID: 8874170

Claim:
A chip card comprising: an interface to a master device, wherein the chip card is powerable via the master device, a single tasking processor for receiving chip card commands from the master device via the interface, first program instructions for execution by the processor, the first program instructions implementing a chip card functions as specified in a first telecommunication standard and a second telecommunication standard, second program instructions for execution by the processor, the second program instructions implementing a blocking method, wherein the blocking method is an endless loop, the blocking method disabling usage of the chip card as long as the chip card is powered via the master device, third program instructions for execution by the processor, the third program instructions being adapted to start execution of the second program instructions by generating a blocking signal, wherein the interface is adapted for receiving the chip card commands of at least first and second command sets, the first command set belonging to the first telecommunication standard and the second command set belonging to the second telecommunication standard, the third program instructions being adapted to determine whether a received command belongs to the first or the second command set, and when the received command belongs to the first command set to generate the blocking signal.