Patent ID: 6925024

Claim:
A method of implementing a standby mode in a system comprising the acts of: delivering a control signal to the input of an isolation circuit internal to a memory device, the isolation circuit being coupled between a power supply and an internal power bus that is internal to the memory device, wherein the control signal is delivered in response to a power down state; providing a power signal to the isolation circuit and to one or more components, wherein the one or more components are not coupled directly to the internal power bus; providing the power signal to an input buffer and circuitry regardless of the power down state, wherein the input buffer and circuitry are internal to the memory device and coupled to the isolation circuit; and isolating the power supply from the internal power bus by interrupting the path between the power supply and the internal power bus, wherein the isolation circuit is configured to disconnect the power signal from the internal power bus in response to the occurrence of an event without disconnecting the power signal from the one or more components.