Patent ID: 7161989

Claim:
An apparatus for modulating a digital input signal having a pre-assigned symbol rate and having a baseband carrier frequency by using a single sample clock signal; said pre-assigned symbol rate is selected from the group consisting of a plurality of symbol rates; said apparatus being configured in a baseband mode; said apparatus comprising: an Interpolate_by — 2_Nyquist Filter block configured to double said pre-assigned symbol rate and configured to perform Nyquist filtering operation on said pre-assigned signal having said double symbol rate; and configured to output an Inphase (I) component and a Quadrature (Q) component of said pre-assigned signal having said double symbol rate; a Complex Shaper block coupled to said Interpolate_by — 2_Nyquist Filter block; said Complex Shaper block configured to pre-compensate the spectrum of said Inphase (I) component and of said Quadrature (Q) component of said signal having said double symbol rate in advance for a spectrum distortion caused by said apparatus; a Cascaded Integrated Comb (CIC) Interpolator filter coupled to said Complex Shaper, said CIC Interpolator configured to increase by an interpolation R factor said sample rate of said signal as compared with a sample rate of said baseband carrier; and configured to output an Inphase (I) component and a Quadrature (Q) component of said interpolated by said factor R signal; R being an integer; a Phase Shifter coupled to said (CIC) Interpolator filter; said Phase Shifter configured to compensate a phase of said interpolated by R signal for a known quadrature error; an Inphase (I) channel Gain (I_Gain) block coupled to said Phase Shifter; a Quadrature (Q) channel Gain (Q_Gain) block coupled to said Phase Shifter; wherein said I_Gain block and said Q_Gain block are configured to pre-compensate said I component and said Q component of said interpolated by R signal for a known gain difference between said I channel gain and said Q channel gain; an I channel DC offset (I_DC_Offset) block coupled to said I_Gain block; a Q channel DC offset (Q_DC_Offset) block coupled to said Q_Gain block; wherein said I_DC_Offset block and said Q_DC_Offset block are configured to pre-compensate said I component and said Q component of said interpolated by R signal for a known DC offset difference between said I channel DC offset and said Q channel DC offset; and a Controller block configured to supply a plurality of control signals to said apparatus; wherein said I_DC_Offset block is configured to output an I component of a demodulated input signal in said I channel; and wherein said Q_DC_Offset block is configured to output a Q component of a demodulated input signal in said Q channel.