Patent ID: 7728669

Claim:
An output stage circuit for enhancing a driving capability of an output signal outputted by an amplifying circuit, the output stage circuit comprising: a first node; a second node; an output unit, comprising: a first transistor, a first source/drain terminal thereof coupled to a first common voltage, a gate terminal thereof coupled to the first node; and a second transistor, a first source/drain terminal thereof coupled to a second source/drain terminal of the first transistor, a second source/drain terminal thereof coupled to a second common voltage, a gate terminal thereof coupled to the second node; a bias circuit, comprising: a first current source, a first terminal thereof coupled to the first common voltage; a third transistor, a first source/drain terminal thereof coupled to a second terminal of the first current source, a second source/drain terminal thereof coupled to the first node, a gate terminal thereof receives a control voltage; a fourth transistor, a first source/drain terminal thereof coupled to the second terminal of the first current source, a second source/drain terminal thereof coupled to the second node, a gate terminal thereof receives a first constant bias; a fifth transistor, a first source/drain terminal thereof coupled to the first node, a gate terminal thereof receives a second constant bias; a sixth transistor, a first source/drain terminal thereof coupled to the second node, a gate terminal thereof receives the second constant bias; a second current source, wherein a first terminal thereof is coupled to second source/drain terminals of the fifth transistor and sixth transistor, and receives the first output signal outputted from the amplifying circuit, and a second terminal thereof is coupled to the second common voltage; and a differential value amplifying circuit, a first input terminal thereof coupled to the first node, a second input terminal thereof coupled to the second node, wherein the differential value amplifying circuit is used for comparing a voltage difference between the first node and the second node with a constant differential value to generate the control voltage so as to control the voltage difference between the first node and the second node within a preset range.