Patent ID: 8520765

Claim:
An information processing apparatus, comprising: a data encoding unit that generates an encoded signal in partial response mode having a transmission speed Fb by encoding input data; a clock signal addition unit that synchronously adds a clock signal at frequency Fb having an amplitude value larger than that of the encoded signal to the encoded signal generated by the data encoding unit; a signal transmission unit that transmits the encoded signal obtained by the clock signal being added by the clock signal addition unit through a predetermined transmission line; a signal receiving unit that receives the encoded signal through the predetermined transmission line; a band-elimination filter that removes a frequency component of a predetermined width containing the frequency Fb from the encoded signal received by the signal receiving unit; an input data decoding unit that performs decoding to obtain the input data based on an amplitude value of an signal output from the band-elimination filter; and a clock component detection unit that detects a clock component of the encoded signal based on a reversal period by detecting the reversal period of polarity held by the amplitude value of the encoded signal received by the signal receiving unit, wherein the input data decoding unit uses the clock component detected by the clock component detection unit to obtain the input data by decoding.