Patent ID: 7919989

Claim:
A circuit architecture for effective compensating the time skew of circuit, comprising: a required compensation circuit used for receiving an input signal and a compensation signal to output an output signal; a first duplicated circuit used for receiving a first logic signal and said compensation signal to output a first detection signal; a second duplicated circuit used for receiving a second logic signal and said compensation signal to output a second detection signal; and a time skew detection and compensation circuit connected to said required compensation circuit, said first duplicated circuit and said second duplicated circuit, used for receiving said first detection signal and said second detection signal, and detecting the time skew between said first detection signal and said second detection signal to generate said compensation signal so as to compensate the time skew existed in said required compensation circuit; wherein said first duplicated circuit and said second duplicated circuit are the duplicates of said required compensation circuit or the imitator of said required compensation circuit, and said first logic signal and said second logic signal are a pair of differential signals.