Patent ID: 7473993

Claim:
A semiconductor stack package comprising: at least one first package including a circuit substrate having a top face, a bottom face, and a central opening, an integrated circuit (IC) chip having an upper surface and a lower surface, the upper surface being attached to the bottom face of the circuit substrate, a plurality of solder balls formed on the bottom face of the circuit substrate, and an encapsulant formed on the upper face of the circuit substrate in the central opening; wherein the first package includes a lower individual package and an upper individual package, each individual package including a circuit substrate having a top face and a bottom face, an integrated circuit (IC) chip having an upper surface and a lower surface, the upper surface being attached to the bottom face of the circuit substrate, and a plurality of solder balls formed on the bottom face of the circuit substrate, wherein each individual package has a heat-conducting layer on the top face of the circuit substrate and a heat-mediating layer on the lower surface of the IC chip, wherein the upper individual package is stacked on the lower individual package by connecting the solder balls of the upper individual package to the top face of the circuit substrate of the lower individual package, and wherein the heat-mediating layer of the upper individual package touches the heat-conducting layer of the lower individual package, thus producing a direct heat-dissipating path; and at least one second package including a circuit substrate having a top face, a bottom face, and a central opening, an IC chip having an upper surface and a lower surface, the lower surface being attached to the top face of the circuit substrate, a plurality of solder balls formed on the bottom face of the circuit substrate, and an encapsulant formed on the bottom face of the circuit substrate in the central opening, wherein the second package is stacked on the first package by connecting the solder balls of the second package to the top face of the circuit substrate of the first package creating a heat-dissipating path from the IC chip of the first package in a direction away from the second package, and a heat-dissipating path from the IC chip of the second package in a direction away from the first package.