Patent ID: 7727781

Claim:
A method for manufacturing an integrated device and a test structure for characterizing properties of the integrated device, the method comprising: (a) manufacturing the integrated device comprising (i) a substrate, (ii) a pad having a periphery, the pad overlying the substrate to form a pad-substrate interface, (iii) a solder mask overlying the substrate, the solder mask having an opening with a periphery, wherein the periphery of the pad is within the periphery of the opening, and (iv) a solder bump attached to the pad to form a solder-pad interface; and (b) manufacturing the test structure comprising (i) a substrate, (ii) a pad corresponding to the pad of the integrated device and having a periphery, the pad overlying the substrate to form a pad-substrate interface, (iii) a solder mask overlying the substrate, the solder mask having an opening with a periphery, wherein the periphery of the pad extends below the solder mask and beyond the periphery of the opening, and (iv) a solder bump attached to the pad, wherein: extending the periphery of the pad of the test structure below the solder mask and beyond the periphery of the opening strengthens the pad-substrate interface of the pad of the test structure compared to the pad-substrate interface of the pad of integrated device; and the integrated device and the test structure are part of a single manufacturing lot.