Patent ID: 7079097

Claim:
A liquid crystal display comprising: a liquid crystal panel including a that data line and a plurality of second data lines extending parallel to each other in a column direction, a plurality of gate lines extending parallel to each other in a row direction, and a signal line extending in the row direction connected to the first data line; and a timing controller electrically connected to the first and the second data lines, the gate lines, and the signal line, the timing controller controlling timing of image signals and a selection signal respectively applied to the second data lines and the gate lines; and wherein the timing controller applies a first puke to the first data line, receives a second pulse as a delayed signal of the first pulse through the signal line, and measures a load of the second data line based on the delay between the first pulse and the second pulse, and a pulse width of a gate signal applied to a previous gate line is narrower than a pulse width of a gate signal applied to a current gate line adjacent to the previous gate line in case that polarities of the data signals applied to pixels connected to the previous and the current gate lines are opposite if the measured load is large than a predetermined value.