Patent ID: 7483933

Claim:
A re-configurable correlation unit for correlating a sequence of chip samples, said re-configurable correlation unit comprising: a memory for storing said sequence of chip samples; a plurality of add-subtract cells, wherein each of said add-subtract cells is capable of receiving a plurality of real bits, a, from a first chip sample in said memory and a plurality of imaginary bits, b, from said first chip sample; and a processing unit comprising: a plurality of sign select units, each of said plurality of sign select units capable of receiving from one of said plurality of add-subtract cells a first input equal to a sum (a+b) of said plurality of real bits, a, and said plurality of imaginary bits, b, and a second input equal to a difference (a−b) of said plurality of real bits, a, and said plurality of imaginary bits, b, and wherein said each sign select unit generates a real output and an imaginary output, wherein each of said real output and said imaginary output is equal to one of: 1) said sum (a+b) multiplied by one of +1 and −1 and 2) said difference (a−b) multiplied by one of +1 and −1.