Patent ID: 8665616

Claim:
A power inversion circuit for converting a DC voltage received at a DC input to an AC voltage, which is paralleled-connected with the DC input and includes: a top-cell comprising a first clamping capacitor, a second clamping capacitor, a first switch, and a first inductor and a first primary winding connected in series between a first node of the first clamping capacitor and a top node of the first switch, wherein a first node of the second clamping capacitor and the top node of the first switch are connected together; a bottom-cell comprising a third clamping capacitor and a second switch, and a second inductor and a second primary winding connected in series between a second node of the third clamping capacitor and a bottom node of the second switch; a transformer includes the first and second primary windings and at least one secondary winding, wherein the first and second primary windings each has identical turns; and at least one middle-cell connected in series between the top and bottom cells and each comprising a fourth clamping capacitor, a fifth clamping capacitor, a third switch and a fourth switch; wherein the third and fourth switches are connected in series; when there is one middle-cell, a top node of the fourth switch is connected to a bottom node of the first switch, the first node of the fourth clamping capacitor is connected to a second node of the first clamping capacitor, a first node of the fifth clamping capacitor is connected to a second node of the second clamping capacitor and a node between the third and fourth switches, respectively, and a second node of the fourth clamping capacitor, a bottom node of the third switch and a second node of the fifth clamping capacitor are connected to the first node of the third clamping capacitor, a top node of the second switch and the bottom node of the second switch, respectively; thereby, when the switches are turned on or off alternatively within one switching cycle, the AC voltage is generated at an output by the secondary winding and a near zero input-current ripple with low voltage stress on the switches is performed.