Patent ID: 8101994

Claim:
A semiconductor device comprising: a substrate; a first fin of a first finFET formed in the substrate between a first adjacent pair of trenches, the first fin having a first height, the first fin including a first channel region and first source/drain regions on opposing sides of the first channel region, each of the first adjacent pair of trenches having a first dielectric layer having a first depth, a first gate structure of the first finFET being over the first channel region and over the first dielectric layer; and a second fin of a second finFET formed in the substrate between a second adjacent pair of trenches, the second fin having a second height, the second fin including a second channel region and second source/drain regions on opposing sides of the second channel region, the first height being different than the second height, each of the second adjacent pair of trenches having a second dielectric layer having a second depth, a second gate structure of the second finFET being over the second channel region and over the second dielectric layer, the second depth being different than the first depth.