Patent ID: 7590776

Claim:
A data storage system, comprising: a circuit board module; a set of Serial ATA devices; and a set of Serial ATA cables connecting the circuit board module to the set of Serial ATA devices, the circuit board module including: a circuit board, multiple host circuits mounted to the circuit board, each host circuit being configured to perform data storage operations on the set of Serial ATA devices on the behalf of an external client, and multiplexer circuitry mounted to the circuit board, the multiplexer circuitry being configured to (i) receive control signals from the host circuits and (ii) provide communication pathways between the host circuits and the set of Serial ATA devices in response to the control signals; wherein the multiplexer circuitry of the circuit board module includes: a plurality of discrete multiplexer units, each multiplexer unit corresponding to a Serial ATA device of the set of Serial ATA devices and being configured to selectively provide (i) a first pathway between a first host circuit and that Serial ATA device, and (ii) a second pathway between a second host circuit and that Serial ATA device; wherein the circuit board of the circuit board module is planar in shape and includes: a first host section which supports the first host circuit; a second host section which supports the second host circuit and which is disposed adjacent to the first section in a side-by-side manner; and a multiplexer section which supports the plurality of discrete multiplexer units and which is disposed adjacent to both the first host section and the second host section; wherein the set of Serial ATA devices includes a set of single-ported Serial ATA disk drive assemblies; wherein the multiplexer section is disposed along a connecting edge of the circuit board; wherein the circuit board module further includes: a set of Serial ATA cable connectors disposed along the connecting edge of the circuit board, the set of Serial ATA cable connectors being configured to operate as a set of connecting interfaces for a set of Serial ATA cables leading from the set of Serial ATA cable connectors to the set of single-ported Serial ATA disk drive assemblies; and wherein the multiple host circuits mounted to the circuit board are further configured to send sleep and wake signals to the set of Serial ATA devices to prevent each of the Serial ATA devices from needing to reinitialize upon switching between the first pathway and the second pathway.