Patent ID: 7329604

Claim:
A method for fabricating a semiconductor device comprising: the step of forming a gate electrode having a gate length of below 50 nm including 50 nm over a semiconductor substrate; the step of forming a source/drain diffused layer in the semiconductor substrate on both sides of the gate electrode; the step of forming a cobalt film on the gate electrode; the first thermal processing step of reacting the cobalt film with the gate electrode to form a cobalt monosilicide film on an upper part of the gate electrode; the step of selectively etching off a part of the cobalt film, which has not reacted; and the second thermal processing step of reacting the cobalt monosilcide film with the gate electrode to form a cobalt disilicide film on the upper part of the gate electrode, wherein in the first thermal processing step, the cobalt monosilicide film is formed so that a ratio h/w of a height of the cobalt monosilicide film to a width of the cobalt monosilicide film is below 0.7 including 0.7.