Patent ID: 8656334

Claim:
A computer implemented method for incorporating multiple threshold voltage cell families (mVt families) in a design of an integrated circuit having cells, a cell including an electronic component, the computer implemented method comprising: initializing, using a processor and a memory, a design process by using cells from the mVt families in the design; including the cells from the mVt families in iterative manipulation of the design before a violation cleanup is initiated on the design; further including the cells from the mVt families in the violation cleanup and subsequent steps of the design process; selecting a first number of cells from a first cell family in the mVt families, the first number not exceeding a budget for the first cell family in the design; selecting a second number of cells from a second cell family in the mVt families; using the first number of cells from the first cell family and the second number of cells from the second cell family in an iteration of the design process, and producing a version of the design usable to implement the circuit with the cells from the mVt families.