Patent ID: 7592861

Claim:
A reference voltage generation circuit for outputting a predetermined reference voltage, comprising: a first field-effect transistor that is an n channel-type field-effect transistor of a depletion-type, wherein one terminal of the first field-effect transistor is connected to a predetermined power source voltage; a second field-effect transistor including a concentrated n-type gate, wherein one terminal of the second field-effect transistor is connected to another terminal of the first field-effect transistor; and a third field-effect transistor including a concentrated p-type gate, wherein one terminal of the third field-effect transistor is connected to another terminal of the second field-effect transistor; wherein a gate of the first field-effect transistor is connected to a part where the first field-effect transistor and the second field-effect transistor are connected, each substrate gate of the first field-effect transistor and the third field-effect transistor is connected to a ground voltage, a gate and a substrate gate of the second field-effect transistor and a gate of the third field-effect transistor are connected to a connecting part where the second field-effect transistor and the third field-effect transistor are connected, and the reference voltage is output from the connecting part, wherein a ratio S 3 between a channel width and a channel length of the third field-effect transistor is less than a ratio S 2 between a channel width and a channel length of the second field-effect transistor.