Patent ID: 8898543

Claim:
A method operable within a nonvolatile memory system including a memory cell array, the method comprising: receiving programming commands each including program data and indicating execution of the programming command using a fast programming mode or a normal programming mode, wherein at least one of the received programming commands indicates the fast programming mode and at least one other of the received programming commands indicates the normal programming mode; in response to receipt of each programming command indicating the fast programming mode, activating a multi-bit Error Detection and/or Correction (ECC) engine to generate multi-bit ECC code in relation to the program data and storing the program data and multi-bit ECC data in the memory cell array; and in response to receipt of each programming command indicating the normal programming mode is indicated, activating a single bit ECC engine to generate single bit ECC code in relation to the program data and storing the program data and single bit ECC data in the memory cell array.