Patent ID: 7988470

Claim:
A thin film transistor formation method, comprising: depositing and patterning a gate electrode over a substrate using a first mask; depositing a gate dielectric layer over the gate electrode; depositing a semiconductive active layer over the gate dielectric layer, the semiconductive active layer comprising oxygen, nitrogen, and one or more elements selected from the group consisting of zinc, indium, cadmium, gallium, and tin; depositing an etch stop layer over the semiconductive active layer; forming a second mask over the etch stop layer; etching the etch stop layer to form a patterned etch stop layer of a device portion of the thin film transistor and remove the etch stop layer from a gate contact portion of the thin film transistor to expose the semiconductive active layer; removing the second mask to expose the patterned etch stop layer; depositing a metal layer over the patterned etch stop layer and the semiconductive active layer; forming a third mask over the metal layer at the device portion of the thin film transistor; etching the metal layer to define a source electrode and a drain electrode at the device portion and remove the metal layer from the gate contact portion; removing the third mask; etching the semiconductive active layer using the source electrode and the drain electrode as a mask to remove the semiconductive active layer from the gate contact portion and expose the gate dielectric layer in the gate contact portion; and etching the gate dielectric layer using a fourth mask to expose a gate contact in the gate contact portion.