Patent ID: 8873287

Claim:
A nonvolatile programmable logic switch comprising first and second cells, each of the first and second cells comprising: a first memory having a first terminal, a second terminal, and a third terminal which receives a control signal to control a memory state, the first memory being a first memory transistor having a gate structure formed by stacking a first insulation film, a charge trap film, a second insulation film, and a gate electrode, a source and a drain of the first memory transistor being the first and second terminal, and the gate electrode being the third terminal; a first transistor connected at one of source/drain thereof to the second terminal; and a second transistor connected at a gate thereof to the other of the source/drain of the first transistor, the third terminal of the first memory in the first cell and the third terminal of the first memory in the second cell being connected in common, and when conducting writing into the first memory in the first cell, the third terminals being connected to a write power supply which generates a write voltage, the first terminal of the first memory in the first cell being connected to a ground power supply which generates a ground voltage, and the first terminal of the first memory in the second cell being connected to a write inhibit power supply which generates a write inhibit voltage, the write inhibit voltage being between the ground voltage and the write voltage.