Patent ID: 8106914

Claim:
A graphics processor comprising: a rendering pipeline adapted to generate image data, the rendering pipeline including a processing core adapted to execute a plurality of concurrent threads, wherein the rendering pipeline operates on single-precision operands, the processing core further including a multipurpose double-precision functional unit adapted to selectably execute one of a plurality of double-precision operations on a set of double-precision input operands, the multipurpose double-precision functional unit including at least one arithmetic logic circuit, the plurality of double-precision operations including an addition operation that adds two double-precision operands, a multiplication operation that multiplies two double-precision operands, and a fused multiply-add operation that computes a product of a first double precision operand and a second double-precision operand then adds a third double-precision operand to the product, wherein the multipurpose double-precision functional unit is wide enough to perform each of the plurality of double-precision operations in a single pass, such that each of the plurality of double-precision operations completes in a same number of clock cycles, and wherein all of the arithmetic logic circuits of the double-precision functional unit are sufficiently wide to operate at double-precision.