Patent ID: 8809171

Claim:
A method comprising: forming a first gate stack to cover a first middle portion of a first semiconductor fin; forming a second gate stack to cover a second middle portion of a second semiconductor fin; performing a first implantation to implant an exposed portion of the first semiconductor fin with an n-type impurity to form a first n-type doped region, wherein a portion of the first middle portion is protected by the first gate stack from receiving the n-type impurity; performing a second implantation to implant an exposed portion of the second semiconductor fin with an additional n-type impurity to form a second n-type doped region, wherein a portion of the second middle portion is protected by the second gate stack from receiving the additional n-type impurity, and wherein the first n-type doped region and the second n-type doped region have different gate proximities from edges of the first gate stack and the second stack, respectively; etching the first n-type doped region using chlorine radicals to form a first recess; etching the second n-type doped region using the chlorine radicals to form a second recess; and performing an epitaxy to re-grow a first semiconductor region and a second semiconductor region in the first recess and the second recess, respectively.