Patent ID: 8802566

Claim:
A method for producing semiconductor components on a substrate using photolithographic patterning, the method comprising the steps of: providing a substrate; providing a first layer to be patterned on the substrate; providing a second layer as a mask layer for the first layer on the first layer; providing a third layer as a mask layer for the second layer on the second layer; patterning the third layer by performing at least a first photolithographic patterning process to produce a first photosensitive layer structure on the third layer to define a first mask, whereby positive ramp angles α are produced at patterning edges of the third layer, wherein exposed portions of the third layer, given a thickness h of the third layer, decrease in size by a value D=2*h/tan α, and performing at least a second photolithographic patterning process to produce a second photosensitive layer structure on the third layer to define a second mask, whereby negative ramp angles β are produced at the patterning edges of the third layer, wherein remaining portions of the second photosensitive layer structure, given a thickness h of the third layer, decrease in size by a value W=2*h/tan β; and patterning at least a portion of the second layer via the respectively patterned third layer.