Patent ID: 7741692

Claim:
An integrated circuit device comprising: a semiconductor substrate; a multi-layer wiring layer provided on said semiconductor substrate; a first temperature monitor member having a first end portion and a second end portion being provided on a layer overlying said multi-layer wiring layer, an electric resistivity of said first temperature monitor member having a negative temperature coefficient; a second temperature monitor member having a first end portion and a second end portion, said first end portion of said second temperature monitor being connected to said second end portion of said first temperature monitor member, an electric resistivity of said second temperature monitor member having a positive temperature coefficient; a first terminal connected to said first end portion of said first temperature monitor member, said first terminal being applied a first reference potential; a second terminal connected to said second end portion of said second temperature monitor member, said second terminal being applied a second reference potential different from said first reference potential; and a third terminal connected to said second end portion of said first temperature monitor member and said first end portion of said second temperature monitor member, said third terminal outputting a voltage indicating a temperature of said integrated circuit device, wherein said first temperature monitor member, said second temperature monitor member, said first terminal, said second terminal and said third terminal comprise a temperature monitor circuit.