Patent ID: 7462528

Claim:
A structure formation method, comprising: providing a structure including: (a) a semiconductor region comprising a semiconductor region top surface, and (b) first and second dopant source regions on and in direct physical contact with the semiconductor region top surface, wherein each region of the first and second dopant source regions comprises a first dielectric material which contains first dopants; forming a diffusion barrier region (i) on and in direct physical contact with the semiconductor region top surface and (ii) in direct physical contact with the first and second dopant source regions; causing the first dopants to diffuse from the first and second dopant source regions into the semiconductor region so as to form first and second source/drain extension regions, respectively, in the semiconductor region after said forming the diffusion barrier region is performed, wherein the first and second source/drain extension regions define a channel region in the semiconductor region, and wherein the channel region is (i) disposed between and in direct physical contact with the first and second source/drain extension regions and (ii) in direct physical contact with the semiconductor region top surface; removing the diffusion barrier region after said causing the first dopants to diffuse is performed; forming a gate dielectric region on the channel region after said removing the diffusion barrier region is performed; forming a gate region on the gate dielectric region, wherein the gate dielectric region electrically insulates the gate region from the channel region; and forming first and second contact regions (i) in the first and second dopant source regions, respectively, (ii) not in direct physical contact with the gate region, and (iii) in direct physical contact with the first and second source/drain extension regions, respectively.