Patent ID: 7759928

Claim:
A semiconductor device, comprising: an internal voltage generation circuit generating a prescribed voltage, a first test circuit connecting to a voltage-supplying wiring, one end of the first test circuit being connected to a source wiring and the other end of the first test circuit being connected to the internal voltage generation circuit, the first test circuit being supplied an outer voltage from the source wiring and a voltage of the internal voltage generation circuit through the voltage-supplying wiring, the first test circuit generating a prescribed resistance value on a basis of a control input from an outer portion in a test mode; wherein the first test circuit has a plurality of MOS transistors, a plurality of resistors and a first switching MOS transistor setting up the test mode, each of the MOS transistors and each of the resistors are constituted of a pair and connects each other in parallel, each of the pairs is connected each other in series, one end of the pairs being connected in series is connected to the source wiring and the other end of the pairs being connected in series is connected to a source terminal of the first switching MOS transistor, and a drain terminal of the first switching MOS transistor is connected to the voltage-supplying wiring.