Patent ID: 8599998

Claim:
A semiconductor device comprising: a first transistor; a second transistor; and a third transistor, wherein one of a source and a drain of the first transistor is electrically connected to a first line, and the other of the source and the drain of the first transistor is electrically connected to a second line, wherein one of a source and a drain of the second transistor is electrically connected to the second line, the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor, and a gate of the second transistor is electrically connected to the first line, wherein one of a source and a drain of the third transistor is electrically connected to a third line, the other of the source and the drain of the third transistor is electrically connected to the gate of the first transistor, and a gate of the third transistor is electrically connected to the third line, wherein each channel region of the second transistor and the third transistor includes an oxide semiconductor, and wherein a ratio of a channel width to a channel length of the second transistor is 0.1 times or more and less than 1 time a ratio of a channel width to a channel length of the third transistor.