Patent ID: 8225323

Claim:
A data transfer control device connected to a plurality of circuits, comprising: a plurality of transfer resources, each identifying a transfer destination of frame data received from the circuits and transferring the frame data; a transfer resource management portion that sets an operating status of each of the plurality of transfer resources to either one of a transfer-enabled state whereby data transfer is enabled and a plurality of standby states based on a load on the data transfer control device and that manages each of the plurality of transfer resources so as to assume the set operating status; and a load distribution portion that distributes the frame data received from the circuits to transfer resources that have been set to the transfer-enabled state, wherein the plurality of standby states are states which data transfer is disabled and which mutually differ in terms of at least one of power consumption level and transition time to the transfer-enabled state, and wherein the plurality of transfer resources, in response to an instruction from the transfer resource management portion, include: a first transfer resource set in the transfer-enabled state; a second transfer resource set in one of the plurality of standby states; and a third transfer resource set in another of the plurality of standby states that differs from the standby state of the second transfer resource in terms of at least one of power consumption level and transition time to the transfer-enabled state.