Patent ID: 8892963

Claim:
A method, comprising: transmitting digital data between a first system component and a second system component over an asymmetrical interface in an application approaching a maximum threshold data rate according to a standard selected from the group consisting of a GDDR standard and a DDR standard, wherein the first component has many logic functions and the second component has minimal logic functions, wherein the asymmetrical interface comprises a shared bus that directly couples the first component and the second component; the first component controlling operations of the second component in the asymmetrical interface by, receiving a signature from the second component, wherein the signature received corresponds to data transferred in response to a particular command using one line for at least every 8 data bits in the digital data computed by the second component, wherein the signature is received concurrent with the transmission of subsequent commands and data over the interface over dedicated pins, wherein receiving the signature is completed within a threshold period of time for the second component to compute a subsequent signature; comparing the signature from the second component to a signature stored in the first component, wherein the signature stored corresponds to the transferred data; and determining whether the particular command was executed successfully based on the comparison, wherein the first system component is a memory controller and the second system component is a memory approaching a maximum threshold speed according to the standard.