Patent ID: 7525154

Claim:
A semiconductor substrate, comprising: a support substrate including a first region and a second region, the second region being adjacent to the first region; a first insulating layer formed on the support substrate in the first region, the first insulating layer including a first side wall facing the second region; a relaxed silicon germanium (SiGe) layer formed on the first insulating layer, the relaxed SiGe layer including a second side wall facing the second region; a second insulating layer formed on the second side wall, the second insulating layer including a third side wall flush with the second side wall; a third insulating layer formed on the first and second side walls, the third insulating layer including a fourth side wall facing the second region and a lower end portion thereof spaced apart from a first upper surface of the support substrate; a silicon layer formed on the support substrate in the second region, the silicon layer including a fifth side wall contacting the first and fourth side walls; a strained silicon layer formed on the relaxed SiGe layer, the strained silicon layer including a second upper surface; and a relaxed silicon layer formed above the silicon layer, the relaxed silicon layer including a third upper surface flush with the second upper surface.