Patent ID: 6941417

Claim:
A content comparing memory device for generating the carry bit or bits in the summation of a search binary word to at least one stored binary word, comprising a plurality of content comparing memory cells arranged in rows and columns, with each stored binary word stored in each of said rows, each of said content comparing memory cells comprising: (a) a normal memory cell for storing the stored binary bit, (b) means for reading from and writing to said normal memory cell, (c) a signal line for delivering the search binary bit, (d) a first logic device which provides a carry transfer logical operation selected from the group consisting of logical XOR and logical OR of said search binary bit or its inverse and said stored binary bit or its inverse, (e) a second logic device which provides logical AND of said search binary bit or its inverse and said stored binary bit or its inverse, (f) an input port for delivering the carry-in value for the bit summation, (g) an output port for delivering the carry-out value of the bit summation, (h) said input port connecting to the output port of the previous content comparing memory cell in the row and said output port connecting to the input port of the next content comparing memory cell in the row, (i) said first logic device driving a passgate between said input port and said output port, said passgate transferring the carry-in value to said output port when turned on, (j) said second logic device driving said output port to a predetermined carry logical value indicating carry bit in the summation of said stored binary bit or its inverse and said stored binary bit or its inverse, whereby, the output port of the last content comparing memory cell in a row is driven to the said carry logical value if the summation of the stored binary word of said row, said search binary word, and the carry-in value applied to the input port of the first content comparing memory cell in said row generates a carry.