Patent ID: 7590163

Claim:
A clock modulation system for modifying a clock input to generate a clock output with reduced electromagnetic interference (EMI), the clock modulation system comprising: a phase detector configured to receive the clock input and generate a phase detector output; a filter configured to receive the phase detector output and generate a filter output; an oscillator configured to receive the filter output and generate an oscillator output; a feedback divider configured to receive the oscillator output and generate a divided output using a divide ratio; and a spread spectrum modulation profile generator configured to control the divide ratio for modulating a frequency of the clock input over a period of time using an upslew modulation form and a downslew modulation form to generate the clock output; wherein the spread spectrum modulation profile generator generates the upslew modulation form during an upslew frequency transition and generates the downslew modulation form during a downslew frequency transition, wherein the upslew modulation form is asymmetrical to the downslew modulation form, wherein the upslew frequency transition occurs during a first time period of the period of time and the downslew frequency transition occurs during a second time period of the period of time, and wherein the second time period is longer than the first time period.