Patent ID: 8862453

Claim:
A method implementable in a computer system for generating a simulatable vector, comprising: providing in the computer system a first vector indicative of an input signal and having a first format, wherein the first vector comprises a plurality of first entries each corresponding to a transition in the input signal, each first entry comprising a first time difference between a current transition and a previous transition in the input signal and a logic value of the input signal at the current transition; converting in the computer system the first vector to a second vector having a second format different from the first format, wherein the second vector comprises a plurality of second entries, wherein each second entry comprises a first time stamp comprising an absolute time of a transition in the input signal and a logic value of the input signal at that first time stamp; converting in the computer system the second vector to a third vector having the second format, wherein the third vector comprises a plurality of third entries, wherein each third entry comprises a second time stamp and a logic value of the input signal at that time stamp, wherein the second time stamps comprise time-shifted transitions of the input signal and are time shifted from the first time stamps by one or more random timing variations; and converting in the computer system the third vector to a fourth vector having the first format, wherein the fourth vector comprises a plurality of fourth entries each corresponding to the time-shifted transition in the input signal, each fourth entry comprising a second time difference between a current time-shifted transition and a previous time-shifted transition in the input signal and a logic value of the input signal after the current time-shifted transition.