Patent ID: 7457967

Claim:
A system for controlling access to digital services comprising: (a) a control center configured to coordinate and provide digital services; (b) an uplink center configured to receive the digital services from the control center and transmit the digital services to a satellite; (c) the satellite configured to: (i) receive the digital services from the uplink center; (ii) process the digital services; and (iii) transmit the digital services to a subscriber receiver station; (d) the subscriber receiver station configured to: (i) receive the digital services from the satellite; (ii) control access to the digital services through an integrated receiver/decoder (IRD); (e) a conditional access module (CAM) communicatively coupled to the IRD, wherein the CAM comprises: (i) a protected nonvolatile memory component, wherein: (1) the protected nonvolatile memory component is used to contain state information to provide desired functionality and enforce one or more security policies for accessing the digital services; and (2) the protected nonvolatile memory component is protected from modification such that the protected nonvolatile memory component is read only; and (3) access to the protected nonvolatile memory component is isolated; (ii) a microprocessor's unprotected nonvolatile memory component wherein the microprocessor's unprotected nonvolatile memory component and the protected nonvolatile memory component use physical and logical address ranges that are the same; (iii) a hidden non-modifiable identification number embedded into the protected nonvolatile memory component, wherein: (1) the identification number uniquely identifies the CAM; and (2) the identification number is used to limit a cloning attack wherein said cloning attack comprises copying the identification number to a new CAM; and (iv) a fixed state custom logic block, wherein the protected nonvolatile memory component is not directly accessible via a system bus and access to the protected nonvolatile memory component is limited to the custom logic block, and wherein data and address lines of the protected nonvolatile memory component are routed only to the fixed state custom logic block.