Patent ID: 7282433

Claim:
A method of forming bump sites on bond-pads in the manufacturing of microelectronic devices, comprising: providing a microelectronic workpiece having a plurality of dies, wherein individual dies include integrated circuitry and bond-pads electrically coupled to the integrated circuitry; forming a passivation structure on the workpiece, wherein forming the passivation structure comprises depositing a first dielectric over the workpiece, a second dielectric layer onto the first dielectric layer, and a photo-active third dielectric layer onto the second dielectric layer; creating openings in the passivation structure to at least partially expose the bond-pads, wherein creating openings in the passivation structure comprises developing the photo-active third dielectric layer to form a mask having holes aligned with the bond-pads, etching using the mask through the first and second dielectric layers to form openings having sidewalls projecting from corresponding bond-pads, and forming shoulders in the openings that extend transversely to the sidewalls; depositing an intermediate layer onto the bond-pads and the passivation structure; depositing an external metal layer over the passivation structure and the bond-pads, wherein depositing an external metal layer comprises depositing an aluminum layer onto the intermediate layer; and planarizing the workpiece by placing the workpiece against a planarizing medium and moving the workpiece and/or the planarizing medium relative to each other in a manner that removes portions of the external metal layer from the passivation structure, wherein planarizing the workpiece comprises chemical-mechanical planarization of portions of the intermediate layer and the external metal layer from a top surface of the third dielectric layer to leave self-aligned caps over the bond-pads.