Patent ID: 8173466

Claim:
A method for fabricating a light emitting diode chip, comprising: forming a semiconductor layer and a dielectric layer sequentially on a substrate; forming a first patterned photoresist layer on the dielectric layer, wherein the first patterned photoresist layer comprises a first photoresist block and a second photoresist block, and a thickness of the first photoresist block is thinner than a thickness of the second photoresist block; removing a portion of the dielectric layer and a portion of the semiconductor layer with the first patterned photoresist layer as a mask to form a semiconductor device layer; reducing a thickness of the first patterned photoresist layer until the first photoresist block is removed completely and using the remaining second photoresist block as a mask to partially remove the dielectric layer to form a patterned dielectric layer, wherein the patterned dielectric layer partially exposes the semiconductor device layer; removing the remaining second photoresist block; and forming a current spreading layer and a plurality of electrodes on the patterned dielectric layer and the semiconductor device layer; wherein the current spreading layer and the plurality of electrodes are fabricated by different mask processes respectively; and the step of forming the current spreading layer and the plurality of electrodes comprises: forming the current spreading layer on the patterned dielectric layer and the semiconductor device layer; forming a passivation layer on the current spreading layer and the semiconductor device layer; forming a second patterned photoresist layer on the passivation layer; removing partially the passivation layer to form a patterned passivation layer with the second patterned photoresist layer as a mask, wherein the patterned passivation layer exposes a portion of the semiconductor device layer and a portion of the current spreading layer; forming an electrode material layer entirely; and removing the second patterned photoresist layer to strip the electrode material layer thereon and form the plurality of electrodes, wherein the plurality of electrodes are electrically connected with the semiconductor device layer and the current spreading layer.