Patent ID: 7933150

Claim:
A programming method of a nonvolatile semicoductor memory device which includes a plurality of adjacent memory cells each cell having threshold voltage distributions corresponding respectively to first second, third and fourth data states, the programming method comprising: programming a cell to be programmed to the first data state among the plurality of adjacent memory to a threshold voltage distribution corresponding to the first data state; and programming a cell to be programmed to the second data state and a cell to be programmed to the third data state among the plurality of adjacent memory cells, wherein the first data state has the highest threshold voltage distribution among multiple data states: wherein the programming the cell to be programmed to the second data state and the cell to be programmed to the third data state comprises: programming both the cell to be programmed to the second data state and the cell to be programmed to the third data state to a voltage distribution a predetermined level lower than the threshold voltage distribution corresponding to the third data state; programming the cell to be programmed to the second data state to the threshold voltage distribution corresponding to the second data state; and programming the cell to be programmed to the third data state to the threshold voltage distribution corresponding to the third data state, wherein the first, second and third data states have the highest, second highest and third highest threshold voltage distributions, respectively.