Patent ID: 7271408

Claim:
A semiconductor device, comprising: (a) a test pattern that includes a word line on a semiconductor substrate; an active region comprising a first impurity doped region and a second impurity doped region; a first contact pad electrically connected to the first impurity doped region, the first contact pad having a first region that covers the first impurity doped region and a second region that is offset from the first impurity doped region; a first bit line electrically connected to the first contact pad; a second contact pad electrically connected to the second impurity doped region; a second conductive line electrically connected to the second contact pad; (b) a first probing pad electrically connected to the first bit line; (c) a second probing pad electrically connected to the second conductive line; and (d) a first contact plug between the first bit line and the first probing pad that electrically connects the first bit line and the first probing pad.