Patent ID: 8117586

Claim:
A printed circuit board (PCB) layout system, comprising: a storage unit storing a plurality of PCB layout files and a signal name file listing all signal names of the PCB layout system, each of the PCB layout files comprising outline information defining an outline of an internal plane of each of the PCB layout files; and a processing unit executing a plurality of executions to: display an outline of an internal plane of an opened PCB layout file; record etching line information of etching lines, wherein the etching lines divide the internal plane into a plurality of signal areas; record input signal names and positions where the input signal names are arranged; obtain the outline information of the internal plane and the etching line information in response to user input; perform a logical operation according to the obtained outline information and the obtained etching line information to obtain the position information of points within each of the signal areas; perform an intersection operation to determine whether one of the signal areas is associated with one of the input signal names; compare one of the input signal names associated with one of the signal areas with the signal names in the signal name file to determine whether the one of the input signal names matches one of the signal names in the signal name file; and set one of the input signal names as a name attribute of the signal area associated with the one of the input signal names if the one of the input signal names matches one of the signal names in the signal name file; and wherein the processing unit further comprises executions to replace one input signal name which does not match any signal name in the signal name file with a default signal name and set the default signal name as a name attribute of one signal area associated with the one input signal name.