Patent ID: 7787233

Claim:
A capacitor matrix fabricated on a semiconductor substrate comprising: M×N capacitor segments arranged in a matrix of M rows and N columns, each capacitor segment including a plurality of capacitor elements, each capacitor element including two sets of electrically insulated and spatially interleaved parallel conductive fingers having a longitudinal axis; wherein the conductive fingers of a first capacitor element of at least one capacitor segment have a longitudinal axis that is not parallel to the longitudinal axis of the conductive fingers of a second capacitor element of the same capacitor segment; wherein the capacitor segments at a column (or row) of the matrix are connected in parallel; and wherein a first metal line is selectively connected to the capacitor segments at a first row (or column) of the matrix and a second metal line is selectively connected to the capacitor segments at a last row (or column) of the matrix.