Patent ID: 7109099

Claim:
A method of fabricating an integrated circuit device comprising: providing a bulk silicon substrate; depositing a carbon-doped silicon layer on said bulk silicon substrate; growing an epitaxial silicon layer overlying said carbon-doped silicon layer to provide a starting wafer for integrated circuit fabrication; and fabricating said integrated circuit device on said starting wafer by the steps comprising: forming a gate electrode on said starting wafer; implanting LDD regions within said epitaxial silicon layer adjacent to said gate electrode; implanting source and drain regions within said epitaxial silicon layer adjacent to said gate electrode and extending through said carbon-doped silicon layer into said bulk silicon substrate; and implanting a heavy ion to form halo implants within said epitaxial silicon layer adjacent to said LDD regions and underlying said gate electrode wherein said halo implants extend downward through said epitaxial silicon layer to an interface between said epitaxial silicon layer and said carbon-doped silicon layer.