Patent ID: 8130748

Claim:
A transmitter circuit for transmitting parallel data, suitable for compensating for influence of crosstalk noise in a pre-emphasis scheme, comprising: first through N th transmission lines configured to respectively transmit first through N th data, wherein N is 2 or greater; first through N th output driving circuit sections configured to output the first through N th data transmitted through the first through N th transmission lines; first through N th pre-emphasis circuit sections configured to generate first through N th pre-emphasis signals for controlling transition output levels of the first through N th data depending upon signal modes of adjoining data among the first through N th data; and first through N th adders configured to generate first through N th data output signals that are controlled in transition output levels using output signals of the first through N th output driving circuit sections and the first through N th pre-emphasis signals, wherein the signal modes includes: an even mode in which transition directions of adjoining data are the same; an odd mode in which transition directions of adjoining data are different; and a static mode in which at least one of adjoining data does not transit, wherein the first pre-emphasis circuit section comprises a first pre-emphasis circuit which adds the first data outputted through the first transmission line and an inversion data of the first data having a delay time to the same proportion depending upon a signal mode between the first transmission line and the second transmission line and outputs a first pre-emphasis signal, and wherein the first pre-emphasis circuit section generates the second data output signal by combining the first pre-emphasis signal and the output signal of the second output driving circuit section.