Patent ID: 7249295

Claim:
A semiconductor test circuit comprising: an input terminal for inputting test data; a control terminal for inputting a test control signal; a control circuit for generating a plurality of transition states and outputting an internal control signal when the test control signal is supplied from the control terminal; a setting circuit for setting a testing instruction code and control data based on the internal control signal and the test data; a command generating circuit for generating a command for testing a test circuit, based on the instruction code and control data received from the setting circuit; a transmission path switching circuit having a first port for inputting the test data supplied from the input terminal, a second port for inputting the command supplied from the command generating circuit, a third port for outputting the input data sent from the first or second port to the test circuit, a fourth port for inputting a test result supplied from the test circuit, a fifth port for outputting the input data sent from the first, second or fourth port, and a sixth port for outputting the input data sent from the first, second or fourth port, the transmission path switching circuit switching data transmission paths among the first, second, third, fourth, fifth and sixth ports, based on the internal control signal and the instruction code; a comparing circuit for performing a comparison between an expected value supplied from the command generating circuit and the output data sent from the fifth port; a selector for selecting either the result of comparison by the comparing circuit or the output data sent from the sixth port, based on the instruction code; and an output terminal for outputting the result of selection by the selector.