Patent ID: 8640013

Claim:
A storage device comprising: a memory unit; an encoder generating an error detection code word on the basis of data written to the memory unit, and generating an error correction code on the basis of the data and the error detection code word to the data; a memory control unit writing the data, the error detection code word, and the error correction code to the memory unit, and reading the data written in the memory unit and the error detection code word and the error correction code to the data; and a decoder decoding a code including the data read from the memory unit and the error detection code word and the error correction code to the data, wherein the decoder includes: an error correction processor performing, on the basis of the error detection code word, error correction processing to correct an error number, which is less than a maximum correctable error number of the error correction code, of an error; an error detector detecting an error of the error-corrected data, on the basis of the error detection code word and the data corrected by the error correction processing; and a decoding controller controlling to repeat a cycle, which includes the error correction processing and the detecting the error of the error-corrected data, for a same error detection code word until the error detector no longer detects any error or when a target error number of the error correction processing becomes the maximum correctable error number by the error correction code, and increasing the target error number of the error correction processing each cycle, wherein the error correction processing uses information obtained during the error correction processing in a previous cycle.