Patent ID: 8572433

Claim:
An integrated circuit comprising: a TDI signal lead, a TDO signal lead, a TCK signal lead and a TMS signal lead; a Tap state machine having an input coupled to the TCK signal lead, an input coupled to the TMS signal lead, instruction register control outputs and data register control outputs; an instruction register having an input coupled to the TDI signal lead, an output coupled to the TDO signal lead, control inputs coupled to the instruction control outputs of the Tap state machine and enable outputs; a commandable data register control router including: (1) a command circuit having an input coupled to the TCK signal lead, an input coupled to the TMS signal lead, and control outputs; and (2) a routing circuit having first control inputs coupled to the data register control outputs of the Tap state machine, second control inputs coupled to the control outputs of the command circuit, data register control outputs and enable inputs coupled to the enable outputs of the instruction register; and a data register having an input coupled to the TDI signal lead, an output coupled to the TDO signal lead, and control inputs coupled to the data register control outputs of the routing circuit.