Patent ID: 8237217

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor region; a first insulating film on the semiconductor region; a charge storage layer on the first insulating film; a second insulating film provided on the charge storage layer; and a control gate electrode on the second insulating film, wherein the second insulating film includes a bottom layer (A), a top layer (C) provided above the bottom layer (A), and a middle layer (B) provided between the bottom layer (A) and the top layer (C), the middle layer (B) has a higher barrier height and lower dielectric constant than both the bottom layer (A) and the top layer (C), the middle layer (B) comprises one of a silicon oxide film and a silicon oxynitride film, the middle layer (B) has a composition in which an average composition is represented by (SiO 2 ) x (Si 3 N 4 ) 1-x (0.75≦x≦1), the bottom layer (A) comprises one of Al-oxide, Al-oxynitride, Al-silicate, Al-nitride-silicate, Hf-oxide, and Al—Hf-oxide, the top layer (C) comprises one of Al-oxide, Al-oxynitride, Al-silicate, Al-nitride-silicate, and the charge storage layer comprises one of silicon nitride, silicon oxynitride, HfO 2 , HfON, HfSiOx, HfSiON, HfAlO x , HfAlON, ZrO 2 , ZrON, ZrSiO x , ZrSiON, ZrAlO x , and ZrAlON.