Patent ID: 7957229

Claim:
An optical disc controller for controlling reading and writing of data from/to an optical disc in which data is recorded while divided into data capacity units for which an error correction code can be added, the controller comprising: an interface circuit for controlling input/output of data with respect to an external device; a buffer for holding data inputted from said interface circuit in units for which said error correction code is added; a memory manager for controlling reading and writing of data from/to said buffer; an ECC circuit for adding said error correction code to data held in said buffer; a modulation circuit for modulating data for which said error correction code is added in said ECC circuit into a predetermined format; and an operation processor for controlling said interface circuit, said memory manager, said ECC circuit and said modulation circuit, wherein said memory manager includes: a control register part having a plurality of registers for taking out and holding information necessary for transfer of reproduction data, from a control signal of said operation processor that instructs said buffer to transfer reproduction data from said ECC circuit in units of sectors for deficient data, when the data inputted at the time of writing into said optical disc from said interface circuit does not fill the unit for which said error correction code is added; a reproduction data controller for controlling transfer of said reproduction data to said buffer from said ECC circuit based on said information from said control register part; and a buffer controller for controlling reading and writing of said reproduction data from/to said buffer based on an instruction from said reproduction data transfer controller, said control register part further including a reproduction data transfer sector number setting register that takes out plural sector numbers of deficient data from said control signal of said operation processor, and holds said reproduction data as transfer execution/inhibition information; and wherein said reproduction data transfer controller directly transfers said reproduction data from said ECC circuit to said buffer based on said transfer execution/inhibition information.