Patent ID: 7538435

Claim:
A wafer structure, comprising: a semiconductor substrate having an active surface, wherein the semiconductor substrate comprising a plurality of pads disposed on the active surface; a passivation layer, disposed on the active surface of the semiconductor substrate, having a plurality of openings for exposing the pads; a plurality of elastic elements disposed on the pads respectively and also on the passivation layer, wherein each elastic element has an opening, such that a portion of each pad is exposed from the opening of the corresponding elastic element, and the elastic elements are separated from each other; a plurality of under bump metallurgic layers covering the elastic elements respectively, wherein each under bump metallurgic layer is connected to the corresponding pad; a plurality of bumps, having a flat surface portion, disposed on the under bump metallurgic layers respectively; and a rigid substrate, pressed on a contact area of the bumps, wherein each of the elastic elements ensures the contact area of each of the bumps for contacting the rigid substrate by an elastic deformation, wherein a height of the elastic elements counting from a top surface of the passivation layer is substantially at least ⅓ of a height of the bumps counting from the top surface of the passivation layer as well.