Patent ID: 7759804

Claim:
A semiconductor device comprising: an internal circuit for driving a liquid crystal display, formed on a first area of a semiconductor substrate, said internal circuit including a first semiconductor element; a second semiconductor element formed on a second area of said semiconductor substrate and being not electrically connected to said internal circuit in said semiconductor substrate, said second area being different area from said first area; a first electrode pad formed over said first semiconductor element in said first area; a first multiple wiring structure having a plurality of wirings which are connected to one another via first thorough holes formed in interlayer insulating films, said first multiple wiring structure being formed over said first semiconductor element and under said first electrode pad, said first multiple wiring structure electrically connecting said first semiconductor element with said first electrode pad; a second electrode pad formed over said second semiconductor element in said second area; a second multiple wiring structure having a plurality of wirings which are connected to one another via second thorough holes formed in said interlayer insulating films, said second multiple wiring structure being formed over said second semiconductor element and under said second electrode pad, said second multiple wiring structure electrically connecting said second semiconductor element with said second electrode pad; a first bump electrode and a second bump electrode formed on said first and second electrode pads, respectively, said first and second bump electrodes acting to provide a mechanical contact to a mounting substrate of said liquid crystal display; wherein said second electrode pad is formed of a same conductive layer as that of said first electrode pad; wherein said second multiple wiring structure is formed of same conductive layers as that of said first multiple wiring structure; and wherein said second electrode pad and said second bump electrode are dummy patterns which are not electrically connected to said internal circuit in said semiconductor substrate.