Patent ID: 8525581

Claim:
A circuit, comprising: a first capacitor arranged to store a power supply sample voltage in response to a first power fail signal; a second capacitor arranged to provide a charge reservoir; a third capacitor having first and second terminals; a first transistor having a control terminal and a current path, and having a first terminal of the current path coupled to the second capacitor and a second terminal of the current path coupled to the first terminal of the third capacitor; a second transistor having a control terminal coupled to receive the first power fail signal and having a current path coupled between a power supply voltage terminal and the first capacitor; a third transistor having a control terminal coupled to receive the first power fail signal and having a current path coupled between the power supply voltage terminal and the first terminal of the first transistor; and a comparator circuit having a first input terminal coupled to the first capacitor and a second input terminal coupled to the second terminal of the third capacitor, and having an output terminal coupled to the control terminal of the first transistor.