Patent ID: 7897461

Claim:
A method for fabricating a semiconductor device, the method comprising the steps of: (a) forming a low concentration body region of a second conductivity type on a drain region of a first conductivity type; (b) forming a plurality of trenches which extend in a same direction and each of which forms a continuous concavo-convex shape when viewed from above and passes through the low concentration body region to reach into the drain region; (c) forming a gate electrode in each of the plurality of trenches; and (d) forming in an upper part of the low concentration body region a source region of a first conductivity type and a high concentration body region containing a second conductivity type impurity whose concentration is higher than that of the low concentration body region, wherein the source region and the high concentration body region are formed such that a maximum distance between two adjacent trenches of the source region is greater than a maximum distance between the two adjacent trenches of the high concentration body region.