Patent ID: 7562246

Claim:
A signal generator comprising: at least first and second clock phase shifters receiving a common clock signal with the first clock phase shifter generating a first phase shifted clock and the second clock phase shifter generating a second phase shifted clock, a first signal generating means reading first parallel data according to a first reading clock that is a divided clock of a first phase shifted clock and converting the parallel data into serial data for generating a first output signal, a second signal generating means reading second parallel data according to a second reading clock that is a divided clock of a second phase shifted clock and converting the parallel data into serial data for generating a second output signal, means for comparing phases of the first and second reading clocks of the first and second signal generating means to produce a phase difference signal, and a controller receiving the phase difference signal and producing control signals coupled to the first and second clock phase shifter for controlling phases of the first and second phase shifted clocks according to the phase difference signal and phase relationships between the output signals of the first and second signal generating means.