Patent ID: 7907468

Claim:
An apparatus comprising: a plurality of memory arrays configured to store data, wherein the plurality of memory arrays comprises a first memory array and a second memory array adjacent to each other; a plurality of groups of contacts for input/output of data to/from the plurality of memory arrays, wherein each of the contacts for input/output is disposed outside of an outline for a respective memory array, wherein the plurality of groups of contacts comprises a first group of contacts and a second group of contacts such that the first and second memory arrays are interposed between the first and second groups of contacts; a plurality of master data lines, each of the master data lines extending in a space between a respective group of contacts for input/output and a side of a respective memory array, each of the master data lines being electrically connectable to a respective contact of the respective group, wherein the plurality of master data lines comprises a first master data line extending in a first space between the first group of contacts and a side of the first memory array, and a second master data line extending in a second space between the second group of contacts and a side of the second memory array; and a plurality of local data lines, each of the local data lines extending over at least a respective one of the memory arrays, each of the local data lines being electrically connectable to a respective one of the master data lines, wherein at least one of the local data lines extends over at least portions of two of the memory arrays, wherein the plurality of local data lines comprises a first local data line extending over the first and second memory arrays, and a second local data line extending over the first and second memory arrays, wherein the first local data line is electrically connectable to the first master data line, but not to the second master data line, wherein the second local data line is electrically connectable to the second master data line, but not to the first local data line; wherein a local data line is configured to carry data to and from a portion of a memory array and a master data line; wherein a master data line is configured to carry data to and from a local data line and a contact for input/output.