Patent ID: 8115324

Claim:
A semiconductor module comprising: a circuit substrate; a first die on the circuit substrate; a second die on the first die; at least one first data input/output pad on the first die formed at a first peripheral portion of the first die, the at least one first data input/output pad configured to input/output a first data input/output signal into/from the circuit substrate; at least one second data input/output pad on the second die formed at a second peripheral portion of the second die, the at least one second data input/output pad configured to input/output a second data input/output signal into/from the circuit substrate, the second peripheral portion not overlapping the first peripheral portion; at least one first control/address pad on the first die formed at a third peripheral portion of the first die, the first control/address pad configured to input/output a control/address signal into/from the circuit substrate, the third peripheral portion being separate from the first peripheral portion; and at least one second control/address pad on the second die formed at a fourth peripheral portion of the second die, the second control/address pad configured to input/output a control/address signal into/from the circuit substrate, the fourth peripheral portion overlapping at least a portion of the third peripheral portion.