Patent ID: 7582947

Claim:
A semiconductor structure comprising: a semiconductor substrate; a first and a second isolation region disposed in the substrate and defining a first active region in the semiconductor substrate therebetween, wherein the first and second isolation region have sidewalls with a tilt angle of substantially less than about 90 degrees; a gate dielectric in the first active region and over the semiconductor substrate; a gate electrode over the gate dielectric; a source/drain region substantially aligned with a sidewall of the gate electrode; a second active region in the semiconductor substrate, wherein the second active region has a top surface higher than a top surface of the first active region by a height difference of at least about 100 Å; an additional gate dielectric in the second active region and over the semiconductor substrate; an additional gate electrode over the additional gate dielectric; and an additional source/drain region substantially aligned with a sidewall of the additional gate electrode.