Patent ID: 7129140

Claim:
A method of forming a metal oxide semiconductor field effect transistor (MOSFET) on a semiconductor substrate, comprising the steps of: providing a gate insulator layer, and an overlying conductive layer on said semiconductor substrate; forming a mask shape on said conductive layer; performing a first dry etch procedure using said mask shape to form a tapered conductive gate structure on said gate insulator layer with top surface of said conductive gate structure comprised with a smaller width than a bottom surface of said tapered conductive gate structure; performing an ion implantation procedure to form a lightly doped source/drain (LDD) region in an area of said semiconductor substrate not covered by said tapered conductive gate structure, and to implant ions into portions of said tapered conductive gate structure, through tapered sides of said tapered conductive gate structure; performing a second dry etch procedure having an isotropic etch component to remove portions of said tapered conductive gate structure comprised with said implanted ions resulting in a straight walled conductive gate structure, and resulting in said LDD region offset from edges of said straight walled conductive gate structure; forming sidewall spacers on said straight walled conductive gate structure; and forming a heavily doped source/drain region in an area of said semiconductor substrate not covered by said straight walled conductive gate structure of by said sidewall spacers.