Patent ID: 7827423

Claim:
A processing system, comprising: a processor; low power (LP) nonvolatile memory that communicates with said processor; high power (HP) nonvolatile memory that communicates with said processor; and a drive control module, wherein said processing system manages data using a cache hierarchy comprising (i) a HP nonvolatile memory level for data in said HP nonvolatile memory and (ii) a LP nonvolatile memory level for data in said LP nonvolatile memory, wherein said LP nonvolatile memory level has a higher level in said cache hierarchy than said HP nonvolatile memory level, and wherein said drive control module at least one of: controls data access to said LP nonvolatile memory and said HP nonvolatile memory independent of control signals from a host computer; or controls data transfer between said LP nonvolatile memory and said HP nonvolatile memory independent of control signals from the host computer.