Patent ID: 7912693

Claim:
A system for verifying respective configuration data values for programming a plurality of configuration memory cells of an integrated circuit device, comprising: a memory device adapted to store a file that structurally associates each configuration memory cell of the integrated circuit device with a corresponding initialization value; and a logic simulator adapted to simulate a test bench including a selectable assertion of an initialization signal and a selectable assertion of a check signal, the logic simulator further adapted to simulate each configuration memory cell of the integrated circuit device using a model of the configuration memory cells, the model of the configuration memory cells including storage for an initial value and a current value for each configuration memory cell, and the simulation including: controlling an input of the corresponding initialization value from the file to the storage for the initial value in the model of the configuration memory cell in response to the selectable assertion of the initialization signal, writing the respective configuration data value to the storage for the current value in the model of the configuration memory cell via simulation of a configuration port of the integrated circuit device, and outputting a mismatch error to a user interface in response to the selectable assertion of the check signal together with a difference between the initial value in the model of the configuration memory cell and the current value in the model of the configuration memory cell.