Patent ID: 7109794

Claim:
A method to improve the low voltage performance of a differential gain stage, said method comprising: providing a monitoring stage comprising: a differential transistor pair having a first differential input, a second differential input, an upper current input, and a lower current output, where said differential transistor pair comprises MOS transistors having bulk terminals, where said bulk terminals are connected together and where a bulk current source is connected to said bulk terminals; a current source connected to said upper current input; and a current load connected to said lower current output; providing a differential stage comprising: a differential transistor pair having a first differential input, a second differential input, an upper current input, a first lower current output, and a second lower current output, where said differential transistor pair comprises MOS transistors having bulk terminals, where said bulk terminals are connected together and where a bulk current source is connected to said bulk terminals; a current source connected to said upper current input; a first current load connected to said first lower current output; and a second current load connected to said second lower current output; forcing a current through said monitoring stage current source; mirroring said current through said monitoring stage current source in said differential stage current source; mirroring current in said monitoring stage current load through said differential transistor stage first and second current loads; forcing said monitoring stage and said differential stage first differential inputs to the same voltage; and forcing said monitoring stage and said differential stage second differential inputs to the same voltage.