Patent ID: 7151813

Claim:
An apparatus comprising: a phase recoverer to adjust a phase of a clock signal to approximately match a phase of a clock signal to a phase of a first signal, wherein the phase recoverer is to output samples of the first signal and is to output a phase adjusted clock signal, wherein the phase recoverer comprises: a detector to compare a phase of the first signal with a phase of the clock signal and to output a comparison, and a phase matcher to adjust a phase of the clock signal to approximately match the phase of the clock signal with the phase of the first signal based upon the comparison, wherein the phase matcher includes a phase interpolator mixer; a storage device to store samples based upon the phase adjusted clock signal; and a clock multiplication unit to provide the clock signal to the phase recoverer and to transfer samples from the storage device, wherein the clock multiplication unit provides the clock signal based on a second clock signal and wherein the second clock signal is a lower frequency than the clock signal.