Patent ID: 7968876

Claim:
A device comprising: a substrate having a first region and a second region; the first region comprising: a first field effect transistor comprising first and second doped regions separated by a horizontal channel region within the substrate, a gate of the first field effect transistor overlying the horizontal channel region, and a first dielectric covering the gate of the first field effect transistor; the second region comprising: a second field effect transistor comprising: a first terminal extending through the first dielectric to contact the substrate; a second terminal overlying the first terminal and having a top surface; a vertical channel region separating the first and second terminals; a gate of the second field effect transistor on the first dielectric and adjacent the vertical channel region, the gate of the second field effect transistor having a top surface that is co-planar with the top surface of the second terminal; and a second dielectric separating the gate of the second field effect transistor from the vertical channel region.