Patent ID: 7671440

Claim:
A semiconductor device having a first major surface comprising: at least one cell having longitudinally spaced source and drain regions at the first major surface, a source body region at the end of the source region facing the drain region, a drain body region at the end of the drain region facing the source region and a drift region extending from the source body region to the drain body region; at least one pair of longitudinally spaced insulated gates, one of the pair being adjacent to the source body region and the other of the pair being adjacent to the drain body region, the gates extending longitudinally with longitudinal side walls, the insulated gates being formed in trenches having gate dielectric along the side and end walls and the base of the trench and a gate conductor within the gate dielectric; and plates adjacent to the drift region for controlling the drift region to carry current flowing between source and drain when the device is switched on and to support a voltage between source and drain when the device is switched off.