Patent ID: 8564331

Claim:
A semiconductor device comprising: a circuit, the circuit comprising an input terminal, a first transmission gate, a second transmission gate, a first inverter, a second inverter, a functional circuit, a clocked inverter, and an output terminal, the functional circuit comprising: a first transistor, a second transistor, a third transistor, and a capacitor, wherein the first transistor and the second transistor are p-channel transistors, wherein one of a source and a drain of the first transistor is electrically connected to a first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor, wherein the other of the source and the drain of the third transistor is electrically connected to one of electrodes of the capacitor, and wherein the other of the electrodes of the capacitor is electrically connected to a second wiring, wherein the input terminal is electrically connected to a first terminal of the first transmission gate, wherein a second terminal of the first transmission gate is electrically connected to a first terminal of the first inverter and the other of the source and the drain of the second transistor, wherein a second terminal of the first inverter and a gate of the second transistor are electrically connected to a first terminal of the second transmission gate, wherein a second terminal of the second transmission gate is electrically connected to a first terminal of the second inverter and a second terminal of the clocked inverter, and wherein a second terminal of the second inverter and a first terminal of the clocked inverter are electrically connected to the output terminal.