Patent ID: 7184308

Claim:
A method for programming a flash memory device having a memory cell string including a plurality of memory cells, the method comprising, during a programming cycle, delaying application of a program voltage to a channel region of the plurality of memory cells until after a gate of each of the memory cells of the plurality of memory cells that is to be programmed has reached a programming voltage Vpgm, wherein the string further includes a string selection transistor and wherein the program voltage is a ground voltage and wherein delaying application of a program voltage comprises: charging the channel region of the plurality of memory cells to a program-inhibit voltage; floating the charged channel region of the plurality of memory cells; applying a voltage to the gates of each of the memory cells to be programmed while the charged channel region is floating; and then connecting the channel region of the plurality of memory cells to the program voltage after the gate of each of the memory cells to be programmed has reached the programming voltage Vpgm.