Patent ID: 8519475

Claim:
A semiconductor device comprising: a first flat semiconductor layer formed on a substrate; a first columnar semiconductor layer formed on the first flat semiconductor layer; a first semiconductor layer of a second conductive type formed in a lower portion of the first columnar semiconductor layer and an entirety or an upper portion of the first flat semiconductor layer; a second semiconductor layer of the second conductive type formed in an upper portion of the first columnar semiconductor layer; a semiconductor layer of a first conductive type formed between the first semiconductor layer of the second conductive type formed in the lower portion of the first columnar semiconductor layer, and the second semiconductor layer of the second conductive type formed in the upper portion of the first columnar semiconductor layer; a gate insulating film and a gate electrode which are formed around the first columnar semiconductor layer; a first insulating film formed between the gate electrode and the first flat semiconductor layer; a sidewall-shaped second insulating film formed to surround an upper sidewall of the first columnar semiconductor layer while contacting an upper surface of the gate electrode and to surround a sidewall of the gate electrode and the first insulating film; a metal-semiconductor compound formed on each of an upper surface of the first semiconductor layer of the second conductive type formed in the entirety or the upper portion of the first flat semiconductor layer, and an upper surface of the second semiconductor layer of the second conductive type formed in the upper portion of the first columnar semiconductor layer, wherein: the first insulating film formed between the gate electrode and the first flat semiconductor layer has a thickness larger than that of the gate insulating film formed around the first columnar semiconductor layer; and a length between a central axis of the first columnar semiconductor layer and an edge of the first semiconductor layer is larger than a sum of a length between the central axis of the first columnar semiconductor layer and a sidewall of the first columnar semiconductor layer, the thickness of the gate insulating film, a thickness of the gate electrode, and a thickness of the sidewall-shaped second insulating film formed to surround the sidewall of the gate electrode and the first insulating film.