Patent ID: 7195952

Claim:
A method for forming an integrated circuit package including a semiconductor chip having a passivation layer and a discrete electronic device, the method comprising: providing a discrete electronic device having a first surface and a second surface opposite the first surface, the first surface comprising a single terminal being a backside electrode of the discrete electronic device, and the second surface comprises a second terminal, at least one of the backside electrode and the second terminal of the discrete electronic device being electronically coupled to the semiconductor chip; forming a metal pad on the top surface of the passivation layer of the semiconductor chip; attaching substantially the entire first surface of the discrete electronic device to the metal pad using a conductive adhesive structure to form an electrical connection between the backside electrode of the discrete electronic device and the metal pad; forming an electrical connection from the metal pad to one of a bond pad of the semiconductor chip or a package post of the integrated circuit package; and encapsulating the semiconductor chip and the discrete electronic device to form the integrated circuit package.