Patent ID: 8133782

Claim:
A method of manufacturing a semiconductor memory device, the method comprising: forming a first gate insulating film above a semiconductor substrate; sequentially forming a charge accumulation layer and a mask layer on the first gate insulating film; processing the mask layer into a predetermined pattern; etching the charge accumulation layer, the first gate insulating film and an upper part of the semiconductor substrate to form a plurality of gate structures with the processed mask layer being used as a mask; filling a buried insulating film between the plurality of gate structures; flattening the buried insulating film, followed by setting an upper surface of the buried insulating film to be lower than an upper surface of the charge accumulation layer, and rounding an upper corner of the charge accumulation layer; depositing a second gate insulating film on an entire surface after rounding the upper corner of the charge accumulation layer; forming a control electrode layer on the second gate insulating film; patterning the control electrode layer to form a plurality of control gates along a first direction; and etching a stacked film composed of the second gate insulating film, the charge accumulation layer and the first insulating film to form a plurality of stacked gate structures with the plurality of control gates being used as a mask, wherein said rounding the upper corner of the charge accumulation layer includes rounding the upper corner of the charge accumulation layer in a cross section along a second direction perpendicular to the first direction.