Patent ID: 8839177

Claim:
A method comprising: accessing, by a computer-aided design system, a library stored in a memory, said library comprising functional library elements and hybrid fill-placeable library elements; and placing, by said computer-aided design system, both selected functional library elements and at least one selected hybrid fill-placeable library element in a layout of an integrated circuit chip under design, said selected hybrid fill-placeable library element being placed in said layout in order to meet, at one of a tile-level and a product-level, a first density rule directed to first features when any of said selected functional library elements violates said first density rule, and said selected hybrid fill-placeable library element comprising: first fill shapes corresponding to said first features; and a corresponding marker shape comprising an instruction that is executable by said computer-aided design system during design rule checking and that defines a custom design rule for said selected hybrid fill-placeable library element.