Patent ID: 7464130

Claim:
A logic circuit for encrypting and decrypting data including shifting in a MixColumn transform by multiplication of an (m×n) matrix of data by a (1×n) or by a (m×1)matrix, where m is a number of rows and n is a number of columns, and wherein each successive row m of n elements is a predetermined row permutation of a preceding row, the circuit comprising: n multiplication circuits for performing a multiplication function on a value of data, each n multiplication circuit having data input for receiving input data and an output for outputting a changed value of the data received by said input, the output value of the data comprising the input data that has been multiplied by a predetermined multiplicand; n logic circuits, each logic circuit comprising at least a first input and a second input for executing a predetermined logical combination of the first input and the second input to provide a logical output, the first input being coupled to the output of a corresponding one of the n multiplication circuits; n registers coupled to said n logic circuits for receiving and storing said logical output from a respective logic circuit; feedback logic for routing stored contents of each register to a selected one of the second inputs of said n logic circuits in accordance with a feedback plan that corresponds to a predetermined row permutation; and control means for successively providing a data input to each of the n multiplication circuits for each element in the (1×n) or (m×1) matrix; and wherein said n registers in accordance with said feedback logic having a data-shifted output of the data input by the control means, the data-shifted output in each of the n registers having a state “s” for remaining encryption or decryption operations.