Patent ID: 6861967

Claim:
A method of correcting non-linearity of digital data output from an A/D converting circuit for converting an analog signal to digital data, the method comprising: setting reference analog signals Vi (i=0, 1, 2, . . . , n) (V 0 <V 1 <V 2 < . . . <Vn) of n+1 (n≧2) which can be A/D-converted in the A/D converting circuit, and setting reference digital values yj (j=1, 2, . . . , n) of n which have the following relation (1) between the respective reference analog signals Vi: y 1 : y 2 : . . . : yn =( V 1 − V 0 ):( V 2 − V 0 ): . . . :( Vn−V 0 ) (1) A/D-converting each of the reference analog signals Vi in the A/D converting circuit to achieve corresponding digital data di (i=0, 1, 2, . . . , n), and converting each digital data di excluding d 0 to a shift value xj (j=1, 2, . . . , n) by the following equation (2): xj=di−d 0 ( i=j ) (2) setting as a linearly correcting expression an n-order function expression y=f(x) representing an n-order curve passing through coordinate points xj, yj of n and the origin on the xy coordinate; and achieving digital data d by A/D-converting any analog signal in the A/D converting circuit, subtracting d 0 from the digital data d to achieve a shift value, and then substituting the shift value as a variable x into the linearly correcting expression to achieve a corrected digital value y in which non-linearity of the digital data d is corrected.