Patent ID: 7839172

Claim:
A bidirectional buffer circuit comprising: a first terminal; a second terminal; a first output buffer to which a signal from the first terminal is input and which outputs the signal to the second terminal; a first one-shot buffer control circuit to which the signal from the first terminal and a signal from the second terminal are input and which generates a first control signal according to an earlier arriving signal out of the signal from the first terminal and the signal from the second terminal; a first one-shot buffer temporarily driving the second terminal by the first control signal; a second output buffer to which a signal from the second terminal is input and which outputs the signal to the first terminal; a second one-shot buffer control circuit to which the signal from the first terminal and the signal from the second terminal are input and which generates a second control signal according to an earlier arriving signal out of a signal from the first terminal and the signal from the second terminal; and a second one-shot buffer temporarily driving the first terminal by the second control signal.