Patent ID: 7538397

Claim:
A semiconductor device comprising: a first MIS transistor including an isolation region surrounding sides of a first active region of a semiconductor substrate, a first gate insulation film provided on the first active region, a first gate electrode provided on the first gate insulation film, a first impurity doped layer provided in part of the first active region located under a side of the first gate electrode, a first silicide film provided on the first gate electrode, a second silicide film provided on the first impurity doped layer, and a first contact plug directly connected to the second silicide film; and a resistor including a resistor element provided on the isolation region and containing silicon, a first sidewall provided on a side surface of the resistor element, a second sidewall provided over the side surface of the resistor element with the first sidewall interposed therebetween, an insulation film covering part of the resistor element and the first and second sidewalls, and a second contact plug directly connected to the resistor element, wherein the insulation film is not provided on the first gate electrode, the silicide film is not provided between the resistor element and the second contact plug, and the first impurity doped layer includes source and drain regions and the insulation film is provided on part of the drain region and the second silicide layer is not provided on the part of the drain region.