Patent ID: 7719861

Claim:
A circuit for transmitting signals, the circuit comprising: a transformer having an input side and an output side, the input side having a first end and a second end; a first p-type MOSFET transistor coupled to the first end of the transformer, the first transistor being configured to provide a first signal to the first end in response to an input signal transitioning to a first state; a second p-type MOSFET transistor coupled to the second end of the transformer; the second transistor being configured to provide a second signal to the second end in response to the input signal transitioning to a second state; a third n-type MOSFET transistor coupled to the first transistor, the first and third transistors provided in a half bridge configuration; a fourth n-type MOSFET transistor coupled to the second transistor, the second and fourth transistors provided in a half bridge configuration; a first delay component coupled to the gate of the third transistor to delay the input signal by a first delay period before being applied to the gate of the third transistor, the first delay component including a resistor having a first end coupled to a first voltage source, a capacitor coupled to a second end of the resistor, and a comparator having a first input node coupled to a node between the resistor and the capacitor and a second input node coupled to a second voltage source; and a second delay component coupled to the gate of the fourth transistor to delay the input signal by a second delay period before being applied to the gate of the fourth transistor; wherein the input signal is applied to the gate of the first transistor without being inverted and the applied to the gate of the second transistor after being inverted and the output side is configured to output differential signals according to the first and second signals applied to the transformer.