Patent ID: 7707466

Claim:
A method comprising: providing a memory device comprising a plurality of functional components, the plurality of functional components comprising a plurality of latch components; in a first mode, performing one or more functional operations using the functional components and storing functional data associated with the one or more functional operations at the plurality of latch components; in a second mode: performing a memory test operation for the memory device to determine memory test/repair data, the memory test/repair data comprising a series of bits representing a serial list of memory addresses of faulty memory storage locations of the memory device that are identified during the memory test operation; and storing each bit of the memory test/repair data at a corresponding latch component of the plurality of latch components in parallel; configuring the plurality of latch components into a scan chain and using the scan chain to access the memory test/repair data; and repairing the memory device using the memory test/repair data accessed from the scan chain.