Patent ID: 8211770

Claim:
A method of forming a transistor, comprising: providing a current spreading layer of a first conductivity type; providing a buffer layer of said first conductivity type on a surface of the current spreading layer; implanting a doped well region of a second conductivity type into a surface of the buffer layer, the doped well region extending through the buffer layer and into the current spreading layer; providing a first epitaxial layer of said second conductivity type on the surface of the buffer layer such that the first epitaxial layer covers at least a portion of the doped well region; providing a second epitaxial layer of said first conductivity type on the first epitaxial layer; etching the first and second epitaxial layers and the buffer layer to form a pair of mesas, the mesas defining a trench there between, wherein the trench has a depth that is less than a depth of the doped well region and is separated from the doped well region by a portion of the buffer layer; and providing a buried channel layer over a portion of the second epitaxial layer and extending the buried channel layer into the trench between the mesas.