Patent ID: 7598543

Claim:
A semiconductor memory component comprising at least one memory cell; said memory cell comprising: a semiconductor body comprised of a body region, a drain region and a source region; said body region comprising a first conductivity type and a depression between said source and drain regions, and said source and drain regions comprising a second conductivity type; body regions of adjacent memory cells are insulated from one another by an isolation trench configured to isolate the respective body regions of the adjacent memory cells along a bit line; a gate dielectric; and a gate electrode arranged at least partly in said depression and being insulated from said body, source, and drain regions by said gate dielectric; said body region further comprising a first continuous region with a first dopant concentration and a second continuous region with a second dopant concentration greater than said first dopant concentration; said first continuous region adjoining said drain region, said depression and said source region, and said second region being arranged below said first region and adjoining said first region.