Patent ID: 7105410

Claim:
A contact process for a semiconductor device containing a base region of a first conductivity type formed on a semiconductor substrate, said contact process comprising the steps of: forming at least one gate in said base region; after formation of said at least one gate, heavily doping by combined vertical and inclined ion implantation of a dopant into a first surface of said base region containing said at least one gate formed therein for forming on said base region and in juxtaposition with said at least one gate a first shallow layer of a second conductivity type; depositing an insulator on said first shallow layer; etching said insulator and first shallow layer for forming a contact hole thereof to thereby expose a sidewall of said first shallow layer and a second surface of said base region; thermally driving said first shallow layer more deeply into said base region; heavily doping said second surface of said base region through said contact hole for forming on said second surface of said base region a second shallow layer of a conductivity type opposite to said second conductivity type of said first shallow layer; and filling a metal in said contact hole for contacting said sidewall of said first shallow layer and said second shallow layer.