Patent ID: 8304310

Claim:
A method of manufacturing a semiconductor device comprising: forming, in a first region of a semiconductor substrate, a first gate insulating film over a semiconductor substrate and a first silicon layer over the first gate insulating film; removing the first silicon layer and the first gate insulating film outside the first region; forming, in a second region of the semiconductor substrate, a second gate insulating film over the semiconductor substrate; forming, in a third region of the semiconductor substrate, a third gate insulating film over the semiconductor substrate; forming, in the first region, an insulating layer over the first silicon layer; after forming the insulating layer, forming, in the first, second, and third regions, a second silicon layer over the semiconductor substrate; patterning the second silicon layer, the insulating layer and the first silicon layer in the first region to form a first gate pattern of a memory cell; patterning the second silicon layer in the third region to form a third gate pattern of a first transistor; after forming the first gate pattern and the third gate pattern, heating the semiconductor substrate in an oxidizing atmosphere to oxidize exposed surfaces of the first silicon layer and the second silicon layer of the first and third gate patterns; and after heating the semiconductor substrate, patterning the second silicon layer in the second region to form a second gate pattern of a second transistor.