Patent ID: 7124240

Claim:
A method for reading data from a synchronous memory of the type having data cells arranged in rows and columns, comprising: arranging said synchronous memory in a symmetrical layout along a horizontal direction to include: a left plurality of N memory portions including a left memory block, a central sense amplifier block, and a right memory block arranged along said horizontal direction; one centrally located single row cache; a secondary sense amplifier block co-located with said centrally located single row cache; and a right plurality of N memory portions including a left memory block, a central sense amplifier block, and a right memory block arranged along said horizontal direction, said single row cache disposed between said left plurality of memory portions and said right plurality of memory portions, wherein N is at least equal to two; receiving an initial command that is not a “read” command and receiving row address data for reading contents of a row of said synchronous memory selected by said row address data, said initial command exclusive of colunm address data; moving said contents of said row into said single row cache; after said contents of said row have been moved into said single row cache, receiving a “read” command and column address data; and in response to said “read” command, reading data from said single row cache at a column address specified by said column address data for output by said synchronous memory.