Patent ID: 7565024

Claim:
A method for run length coding, comprising: determining a coefficient bit to be run length coded by a processor; in response to selected coefficient bits to be run length coded, executing a run length coding instruction by a processor to accelerate generation of context and decision values for the selected coefficient bits by reducing the number of clock cycles required of the processor to generate the context and decision values during compression, the execution of the run length coding instruction comprising: receiving coefficient bit values associated with the selected bit to be processed wherein the input starts at the current coefficient bit coded and includes the next three bits scanned down vertically as input; generating context and decision values in response to the coefficient bit values; processing the context and decision values to generate compressed data output; and storing context and decision values into a destination register specified by the instruction; wherein the instruction further comprises determining, based upon an input value, the next bit coefficient to be coded and the column for which it is to be coded.