Patent ID: 8124534

Claim:
An integration method comprising the steps of: obtaining a semiconductor wafer having features thereon; depositing sequential layers of oxide and silicon over the semiconductor wafer and the features; depositing a first photoresist layer; forming first openings in the first photoresist layer to expose the silicon layer; selectively ion implanting in the silicon layer through the first openings to form first ion implanted regions; removing the first photoresist layer; depositing a second photoresist layer; forming second openings in the second photoresist layer to expose the silicon layer; selectively ion implanting in the silicon layer through the second openings to form second ion implanted regions; removing the second photoresist layer; reactive ion etching the entire silicon layer to form openings only in portions of the silicon layer that were formerly occupied by the first and second ion implanted regions, the reactive ion etching being chosen such that it has a high selectivity for etching the first and second ion implanted regions with respect to the silicon layer not containing the first and second ion implanted regions; and etching the oxide layer to extend the openings in the silicon layer through the oxide layer to the features.