Patent ID: 6867106

Claim:
A method for fabricating a semiconductor device comprising the steps of: forming on a first conduction type substrate a device isolation film for defining a device region including a first region and a second region adjacent to the first region; forming above the device region a conducting film interposing a gate insulation film therebetween; patterning the conducting film to form a gate electrode in the first region and a dummy electrode in the second region near the interface between the first region and the second region, the dummy electrode being electrically insulated with the gate electrode; doping an impurity having a second conduction type different from the first conduction type in the first region with the gate electrode as a mask to form source/drain regions in the first region on both sides of the gate electrode; and doping an impurity having the first conduction type in the second region with the dummy electrode as a mask to form a body contact region in the second region.