Patent ID: 8847627

Claim:
A semiconductor device comprising: a first transistor; a second transistor; a third transistor; a circuit comprising a first input terminal and a second input terminal; a high-potential power supply; a low-potential power supply; and an output terminal, wherein one of a source and a drain of the first transistor is electrically connected to the low-potential power supply, wherein the other of the source and the drain of the first transistor is electrically connected to the circuit, wherein one of a source and a drain of the second transistor is electrically connected to the circuit and one of a source and a drain of the third transistor, wherein the other of the source and the drain of the second transistor is electrically connected to the high-potential power supply, wherein the other of the source and the drain of the third transistor is electrically connected to the output terminal, wherein the low-potential power supply is electrically connected to the output terminal through the first transistor and the circuit when a first data potential signal input to the first input terminal is same as a second data potential signal input to the second input terminal, wherein the high-potential power supply is electrically connected to the output terminal through the second transistor when the first data potential signal is different from the second data potential signal, and wherein the third transistor includes an oxide semiconductor layer including a channel formation region.