Patent ID: 8300761

Claim:
A shift register circuit comprising: an input terminal; an output terminal; a clock terminal; a first transistor for charging said output terminal by providing a constant first power supply potential to said output terminal; and a pull-up driving circuit for driving said first transistor; wherein said pull-up driving circuit includes: a second transistor for charging a first node by providing a second power supply potential larger in absolute value than the first power supply potential to said first node connected to a control electrode of said first transistor; a third transistor for providing a clock signal provided at said clock terminal to a second node connected to a control node of said second transistor; and a boosting circuit for boosting said second node, wherein a control electrode of said third transistor is charged when an input signal input to said input terminal is activated, and the control electrode of said third transistor is discharged when said second node is charged by activation of the clock signal, and wherein said boosting circuit increases the potential at said second node after the control electrode of said third transistor is discharged.