Patent ID: 7259103

Claim:
A method of fabricating an active layer of a polycrystalline silicon thin film transistor, the method comprising: depositing a buffer layer on a substrate; depositing an amorphous silicon layer on the buffer layer with a first thickness; crystallizing the deposited amorphous silicon layer by using a laser to form a polycrystalline silicon layer; etching the crystallized polycrystalline silicon layer to a second thickness thinner than the first thickness; curing the etched polycrystalline silicon layer; patterning the cured polycrystalline silicon layer to form a semiconductor layer forming a first insulating layer on the semiconductor layer; forming a gate electrode on the first insulating layer; forming a second insulating layer on the gate electrode; forming first and second contact holes in the first and second insulating layers, the first and second contact holes exposing the semiconductor layer; and forming source and drain electrodes on the second insulating layer, the source and drain electrodes contacting the semiconductor layer through the first and second contact holes.