Patent ID: 7456455

Claim:
A semiconductor memory device comprising: a first interlayer insulating film formed on a semiconductor substrate; a capacitor formed above the first interlayer insulating film and composed of a lower electrode, a capacitor insulating film of a high dielectric film or a ferroelectric film, and an upper electrode; a second interlayer insulating film formed over the first interlayer insulating film to cover the capacitor; a first contact plug formed in the first interlayer insulating film to penetrate the first interlayer insulating film; and a second contact plug formed in the second interlayer insulating film to penetrate the second interlayer insulating film to make connection to the first contact plug, wherein between the first and second contact plugs, a third contact plug comprising a first oxygen barrier film is interposed to come into contact with part of the boundary area between the first and second interlayer insulating films.