Patent ID: 7432964

Claim:
A solid-state imaging device comprising: a pixel array area having pixels including photoelectric transducers arranged in column and row directions; a vertical signal line wired for each pixel column in the pixel array area and extending in the column direction; and a plurality of correlated double sampling (CDS) circuits provided for each corresponding vertical signal line, each CDS circuit independently sampling a reset level and a signal level of a pixel from said array during a single horizontal blanking interval, wherein each one of the plurality of the CDS circuits comprises: a first capacitor, one end of which is connected to the vertical signal line; a first switch element, a first port of which is connected to the other end of the first capacitor; a second capacitor connected between a second port of the first switch element and a reference voltage; and a clamping element for clamping a voltage of a connecting node between the first port of the first switch element and the first capacitor to a predetermined voltage, and wherein said first capacitor is shared amongst each one of the respective plurality of CDS circuits provided for each vertical signal line.