Patent ID: 7384818

Claim:
A method of fabricating a semiconductor device package comprising the steps of: (a) establishing a semiconductor die having a sealing area defined on a front side thereof; (b) establishing a substrate having a front surface; (c) forming respectively on said semiconductor die and said substrate first and second solder sealing ring pads, said first and second solder sealing ring pads being substantially aligned one relative to the other, at least one of said first and second solder sealing ring pads defining an open loop contour; and, (d) flip chip mounting said semiconductor die on said substrate to form a solder sealing ring structure sandwiched between said first and second solder sealing pads of said substrate and semiconductor die, said solder sealing ring structure extending peripherally about a substantial portion of said sealing area to substantially enclose thereat a cavity between said semiconductor die and said substrate, said solder sealing ring structure including at least one venting portion defining against at least one of said substrate and semiconductor die an air vent in open communication with said cavity.