Patent ID: 8736302

Claim:
A reconfigurable integrated circuit, comprising: integrated circuit interface terminals including circuit input terminals and circuit output terminals; at least one bypass control node; bypass circuitry coupled to the bypass control node, at least one of the circuit input terminals and at least one of the circuit output terminals, wherein the bypass circuitry comprises at least one multiplexer with a bypass input, a processing circuitry input, a control input coupled to the bypass control node, and a multiplexer output; and processing circuitry comprising a plurality of circuit modules coupled to the bypass circuitry, wherein the processing circuitry is coupled to at least one of the circuit input terminals and at least one of the circuit output terminals, wherein the bypass circuitry further comprises a logic module having a sensitizing input coupled to the bypass control node, a selective input coupled to the bypass input, and a logic module output coupled to at least one of the circuit modules, wherein in operation a signal at the bypass control node controls the bypass circuitry to selectively couple at least one pair of the integrated circuit interface terminals together by selectively coupling the multiplexer output to at least one of the bypass input and the processing circuitry input, the pair comprising one of the circuit input terminals and one of the circuit output terminals.