Patent ID: 7368757

Claim:
A compound semiconductor device in which a back electrode is formed on a back of an n-type Si single crystal substrate of the compound semiconductor device in which an n-type 3C-SiC single crystal buffer layer having a thickness of 0.05-2 μm and a carrier concentration of 10 16 -10 21 /cm 3 , a hexagonal In w Ga x Al 1-w-x N single crystal buffer layer having a thickness of 0.01-0.5 μm (0≦W<1, 0≦X<1, W+X<1), and an n-type hexagonal In y Ga z Al 1-y-z N single crystal layer (0≦Y<1, 0<Z≦1, Y+Z≦1) having a thickness of 0.1-5 μm and a carrier concentration of 10 11 -10 16 /cm 3 are stacked in order on an n-type Si single crystal substrate having a crystal-plane orientation {111} and a carrier concentration of 10 16 -10 21 /cm 3 , and a surface electrode is formed on a surface of the hexagonal In y Ga z Al 1-y-z N single crystal layer, and wherein an insulating layer is formed on a surface of the surface electrode and the surface of the hexagonal In y Ga z Al 1-y-z N, and an upper electrode is stacked on said insulating layer.