Patent ID: 7372111

Claim:
A semiconductor device comprising: a semiconductor chip having a first major surface and a second major surface facing opposite to each other; an active section on the side of the first major surface for flowing current actively or passively; a low resistance layer of a first conductivity type on the side of the second major surface, the low resistance layer exhibiting low electrical resistance; a vertical drift section between the active section and the low resistance layer, the vertical drift section providing a substantially vertical drift current path in the ON-state of the semiconductor device, the vertical drift section being substantially depleted in the OFF-state of the semiconductor device; and a peripheral section formed between the first major surface and the low resistance layer, and formed around the vertical drift section, the peripheral section providing substantially no current path in the ON-state of the semiconductor device and being substantially depleted in the OFF-state of the semiconductor device, wherein the vertical drift section comprises a first alternating conductivity type layer comprised of first regions of the first conductivity type and first regions of a second conductivity type arranged alternately at a first pitch repeating along the first major surface, wherein the peripheral section comprises a first subsection and a second subsection, the second subsection being in the surface portion of the peripheral section between the first major surface and the first subsection, wherein the first subsection comprises a second alternating conductivity type layer comprised of second regions of the first conductivity type and second regions of the second conductivity type arranged alternately at the first pitch also repeating along the first major surface, wherein the second subsection comprises a third alternating conductivity type layer composed of third regions of the first conductivity type and third regions of the second conductivity type arranged alternately at a second pitch also repeating along the first major surface, wherein the second pitch is narrower than the first pitch, and wherein the impurity or carrier concentration or the carrier amount in the third regions of the second conductivity type is higher than the respective impurity or carrier concentration or the carrier amount in the third regions of the first conductivity type.