Patent ID: 8756549

Claim:
A system for designing an integrated circuit chip, said system comprising: a timing analysis tool performing a timing analysis of said integrated circuit chip at a specified low temperature to identify any temperature-sensitive circuits within said integrated circuit chip, said timing analysis being performed based on an initial design for said integrated circuit chip; a mapping tool in communication with said timing analysis tool and generating a map that identifies at least one temperature-sensitive zone on said integrated circuit chip, said temperature-sensitive zone comprising at least one temperature-sensitive circuit and said map being generated based on results of said timing analysis; and a design-for-reliability tool in communication with said mapping tool and inserting, based on said map, at least one thermal radiator into a layout of said integrated circuit chip such that said thermal radiator is in a metal wiring layer and aligned above said temperature-sensitive zone, said design-for-reliability tool further inserting, based on said map, at least one temperature sensor into said layout such that said temperature sensor is positioned adjacent to a perimeter of said temperature-sensitive zone, senses a temperature of said temperature-sensitive zone and is operatively connected to said thermal radiator so as to automatically trigger operation of said thermal radiator when said temperature is a below a predetermined threshold temperature.