Patent ID: 8664780

Claim:
A semiconductor package comprising: a substrate having upper and lower surfaces; a first semiconductor chip disposed on the upper surface of the substrate; a first encapsulant disposed in contact with the upper surface of the substrate and in which the first semiconductor chip is embedded; a plurality of second semiconductor chips stacked vertically one atop the other on the first encapsulant; and a second encapsulant disposed in contact with the upper surface of the substrate and in which the stack of second semiconductor chips is embedded, and wherein the first encapsulant has first and second sidewall surfaces facing in opposite directions, and third and fourth sidewall surfaces facing in opposite directions, and the third sidewall surface of the first encapsulant joins and subtends an angle with the first sidewall surface of the first encapsulant, the first sidewall surface stands upright on the upper surface of the substrate at a location spaced inwardly from an outer periphery of the substrate, the first encapsulant is embedded in the second encapsulant with the second encapsulant covering the first sidewall surface of the first encapsulant, and the third sidewall surface of the first encapsulant is exposed at an exterior of the package.