Patent ID: 8689163

Claim:
A semiconductor apparatus comprising a plurality of metal layers, comprising: at least one repair block configured to perform a predetermined function; a spare block configured to substitute for the predetermined function of the repair block; and at least one of the plurality of metal layers predetermined as a repair layer for error revision, wherein at least one pin of the repair block is connected to the repair layer through a first pin extension extending at least one pin of the repair block, and at least one pin of the spare block is capable of extending to the repair layer; when the repair block is to be repaired, the first pin extension between the repair layer and the repair block is configured to be disconnected, and the at least one pin of the spare block is configured to be connected to the repair layer through a second pin extension, wherein a block comprises at least two cells; and a custom cell in the repair layer, the custom cell comprising at least one contact configured to be connected to at least one pin.