Patent ID: 7615162

Claim:
A method of producing a multilayer printed circuit board comprising: providing a structure having a substrate, at least one first conductor circuit formed on the substrate and having a surface at least partially roughened, and an insulating layer formed on the substrate and the at least one first conductor circuit; forming at least one opening for a viahole structure connecting to the at least one first conductor circuit through the insulating layer; subjecting the insulating layer with the opening to an electroless plating to form an electroless plated film having a thickness of 0.1-5 μm; forming a plating resist on the electroless plated film; subjecting the electroless plated film and the plating resist over the insulating layer to an electrolytic plating so as to form an electrolytic plated film having a thickness of 5-30 μm; removing the plating resist; and etching and removing the electroless plated film exposed by a pattern of the plating resist by applying an etching solution to form at least one second conductor circuit comprising the electroless plated film and the electrolytic plated film, and the viahole structure electrically connected between the first conductor circuit and the second conductor circuit.