Patent ID: 7683453

Claim:
A semiconductor isolation structure and edge termination region, the isolation structure comprising: a floor isolation layer of a first conductivity type buried in a semiconductor substrate of a second conductivity type, the substrate not comprising an epitaxial layer, the floor isolation layer having an upper boundary below a surface of the substrate and a lower boundary in the substrate; a sidewall well of the first conductivity type extending downward from the surface of the substrate and merging with the floor isolation layer, the floor isolation layer and the sidewall well together forming an isolated pocket of the second conductivity type; and an interlayer dielectric above the surface of the substrate; the edge termination region comprising; a substrate ring of the second conductivity type adjacent the surface of the substrate, the substrate ring laterally surrounding and laterally spaced apart from the sidewall well, the substrate ring having a doping concentration greater than a doping concentration of the substrate; a first conductive contact in contact with the sidewall well through a first opening in the interlayer dielectric, the first conductive contact comprising a first field plate portion spaced apart from the substrate and extending laterally towards the substrate ring; and a second conductive contact in contact with the substrate ring through a second opening in the interlayer dielectric, the second conductive contact comprising a second field plate portion spaced apart from the substrate and extending laterally towards the sidewall well, the first and second field plate portions being horizontally spaced apart from each other, the second conductive contact being exposed so as to permit an external electrical connection to be made to the substrate ring through the second conductive contact.