Patent ID: 7279375

Claim:
A method of forming a semiconductor device comprising: forming a plurality of parallel semiconductor bodies, wherein each of said semiconductor bodies has a channel region between a source region and a drain region; forming a single gate electrode over and adjacent to said channel regions of said plurality of parallel semiconductor bodies; forming a dielectric layer over said gate electrode and said plurality of parallel semiconductor bodies; forming a single drain opening in said dielectric layer which extends between and exposes said drain regions of said plurality of parallel semiconductor bodies; forming a single source opening in said dielectric layer which extends between and exposes said source regions of said plurality of parallel semiconductor bodies, wherein forming the single drain opening and single source opening in said dielectric layer further comprises exposing a photoresist mask to approximate one-dimensional slots having a lithographically defined length that is substantially smaller than the lithographically defined width; and filling said single drain opening and said single source opening with a metal film wherein said metal film is in contact with said source regions and said drain regions of said plurality of parallel semiconductor bodies.