Patent ID: 8427187

Claim:
A probe wafer to be electrically connected to a semiconductor wafer having a plurality of semiconductor chips formed thereon, the probe wafer comprising: a wafer substrate; a plurality of wafer connector terminals that are provided on the wafer substrate in such a manner that one or more wafer connector terminals correspond to each of the semiconductor chips, each wafer connector terminal to be electrically connected to an input/output terminal of a corresponding semiconductor chip; a plurality of circuit units that are provided on the wafer substrate in such a manner that each of the circuit units corresponds to a predetermined number of semiconductor chips, each circuit unit generating signals to be supplied to a predetermined number of corresponding semiconductor chips; and one or more switches, each switch corresponding to one of the circuit units, that switches which one of the predetermined number of corresponding semiconductor chips is connected to the corresponding circuit unit, wherein a wafer connecting surface of the wafer substrate, on which the wafer connector terminals are provided, is brought into contact with the semiconductor wafer via an anisotropic electrically conductive film such that the anisotropic electrically conductive film is sandwiched between the probe wafer and a wafer-side membrane formed by a material that has a similar coefficient of thermal expansion to the substrate of the semiconductor wafer.