Patent ID: 7842576

Claim:
A method of manufacturing a semiconductor device, comprising: forming an FET forming region including a first gate electrode and a non-volatile memory forming region including a second gate electrode and a plurality of dummy gates provided in a comb teeth shape on a drain forming region side of said second gate electrode over a substrate; forming a resist film that covers said non-volatile memory forming region; implanting impurities into said substrate of said FET forming region, using said resist film and said first gate electrode as a mask, to form a pair of extension regions on both sides of said first gate electrode in the vicinity of the surface of said substrate; removing said resist film and forming an insulating film so as to cover said FET forming region and said non-volatile memory forming region; and etching said insulating film to obtain a first side wall formed over the side of said first gate electrode and a second side wall formed over the sides of said second gate electrode and said dummy gates, wherein said etching said insulating film contains obtaining said second side wall in which the width of said second side wall formed over the side wall of said second gate electrode not facing said dummy gates on said drain forming region side is larger, compared to the width of said second side wall formed over the side wall of said second gate electrode on a source forming region side, in the gate length direction.