Patent ID: 8880577

Claim:
A method, performed by an apparatus for outputting a result of a modulo operation, in a case where the square of a divisor N is greater than or equal to a dividend C, comprising: determining, by a controller of the apparatus, the number of computation stages n satisfying 2n<N≦2n+1; performing, by the controller, an initialization operation by initializing a constant a to the smallest integer greater than or equal to half of N; performing, by an operating circuit, a first operation by subtracting, when C is greater than or equal to N·a, the value of C by the value of N·a, and outputting the result of the subtraction as the value of C, wherein N·a is the product of N and a; performing, by the controller, a second operation by assigning the smallest integer greater than or equal to half of a to the value of a; repeatedly performing, by the controller, the first operation and the second operation n times; outputting, by the controller, the value of C as the result of modulo operation to a transceiver of the apparatus; using a result of the modulo operation in a generation of a preamble signal; and transmitting, by the transceiver, the preamble signal through a physical random access channel.