Patent ID: 6850582

Claim:
A frame synchronization circuit receiving a sampled in-phase (I) signal component and a sampled quadrature (Q) signal component, wherein a single unique word is included in both signals, the circuit for use in a digital receiver, comprising: a correlation circuit capable of correlating a prestored single unique word and the single unique word included in the I and Q signal components, wherein the correlation circuit comprises: a real filter for the I signal and a matching real filter for the Q signal, and a combination circuit capable of generating a real and an imaginary correlation output signal for the filtered I signal and the filtered Q signal; an I magnitude circuit and a Q magnitude circuit receiving the I and Q outputs of the correlation circuit and capable of determining the magnitude of the correlation; a summer capable of summing the outputs of the I magnitude circuit and the Q magnitude circuit; and a threshold detection circuit capable of identifying a pulse representative of a frame synchronization peak.