Patent ID: 7326608

Claim:
A method of manufacturing a fin field effect transistor, comprising: forming a first silicon nitride pattern on a substrate; forming an active pattern by etching the substrate using the first silicon nitride pattern as an etching mask, so that the active pattern protrudes from the substrate in a vertical direction and extends across the substrate in a horizontal direction; forming a first oxide pattern on a surface of the substrate and on sidewalls and on a top surface of the active pattern; forming a buffer layer on the first oxide layer; forming a second silicon nitride layer on the buffer layer, the second silicon nitride layer having a higher etching rate than the buffer layer; forming a device isolation layer on the second silicon nitride layer at both side portions of the active pattern, so that a top surface of the device isolation layer is lower than a top portion of the active pattern and so that the second silicon nitride layer is partially exposed; removing the exposed second silicon nitride layer by a first etching process, so that the buffer oxide layer is partially exposed and a second silicon nitride pattern is formed; and removing the exposed buffer layer and the first oxide layer under the exposed buffer layer by a second etching process, thereby forming a buffer pattern and a first oxide pattern.