Patent ID: 8115280

Claim:
An integrated circuit structure comprising: a semiconductor substrate; a guard ring formed of a shallow trench isolation region extending into the semiconductor substrate; a well region of a first conductivity type encircled by the guard ring, wherein the well region forms a polygon; an emitter of a second conductivity type opposite the first conductivity type over the well region; at least one collector of the second conductivity type over the well region and substantially encircling the emitter; a plurality of base contacts of the first conductivity type over the well region, wherein the plurality of base contacts is spaced apart from each other by the at least one collector, wherein each of the plurality of base contacts is located at one corner of the polygon, and wherein no base contact extends from one corner of the polygon to another corner of the polygon; at least one conductive strip horizontally spacing the emitter, the at least one collector, and the plurality of base contacts apart from each other; and a dielectric layer directly under, and contacting, the at least one conductive strip.