Patent ID: 7724047

Claim:
A semiconductor integrated circuit arranged to drive an external FET, the semiconductor integrated circuit comprising: an external terminal; a switching control circuit including a first transistor and a second transistor coupled to said FET via the external terminal, and arranged to turn on and off said FET by turning on and off each of said first transistor and said second transistor, said FET attaining an OFF state when said first transistor is in an ON state and said second transistor is in an OFF state; a bias circuit arranged to supply said FET with a bias voltage via the external terminal for turning off said FET when said first transistor and said second transistor are in an OFF state; an abnormality detection circuit arranged to monitor the external terminal, to determine whether an abnormality has occurred and to provide an abnormality detection signal if it is determined that an abnormality has occurred; and a protection control circuit arranged to turn off said FET by turning on said first transistor and turning off said second transistor in response to receiving the abnormality detection signal, and turning off said first transistor and said second transistor after a lapse of a predetermined time.