Patent ID: 7428174

Claim:
A semiconductor flash memory comprising: a first readout control unit that, when performing a read operation of a plurality of read memory cells, selects at least two read memory cells, and senses total memory current for the at least two read memory cells; a second readout control unit that selects one read memory cell, and senses memory current of the one read memory cell; and an erase/write control unit that, when performing an erase/write operation of the read memory cells, reads and senses the memory current of the read memory cells for each of the memory cells, and adjusts threshold voltage of each of the read memory cells to a predetermined value, wherein verify voltages for a first memory block formed by the at least two read memory cells selected by the first readout control unit and a second memory block formed by the read memory cells selected one-by-one by the second readout control unit are set to different values, and the at least two memory cells in the first memory block store the same data.