Patent ID: 8539289

Claim:
A memory testing method for testing a memory module of a computing device, the method comprising: adjusting an operating voltage of the memory module to a first voltage; writing a predetermined data set into the memory module, and reading out the written data set from the memory module when the operating voltage of the memory module is adjusted to the first voltage, to accomplish a data writing and reading process of the memory module; adjusting the operating voltage of the memory module to a second value; writing the data set into the memory module, and reading out the written data set from the memory module when the operating voltage of the memory module is adjusted to the second value; acquiring a register value of an error checking and correcting (ECC) register of the memory module after the data writing and reading process is accomplished under the second value, wherein: the first voltage is V+Vr, and the second value is V−Vr, V is a nominal operating voltage or a standard operating voltage of the memory module, and Vr is predetermined according to a range within the operating voltage of the memory module; determining whether the memory module is stable during the adjusting of the operating voltage of the memory module according to the register value; and generating a test result indicating how many memory errors have occurred after the data writing and reading process is accomplished under the second value if the memory module is determined to be unstable.