Patent ID: 7732869

Claim:
An insulated-gate semiconductor device comprising: a semiconductor substrate of a first general conductivity type; a plurality of gate electrodes formed on or in a surface portion of the semiconductor substrate in a form of stripes running in a first direction; a plurality of channel regions of a second general conductivity type formed in the surface portion in a form of stripes running in the first direction; a first insulating film formed between one of the plurality of gate electrodes and a corresponding one of the plurality of channel regions; a plurality of source regions of the first general conductivity type formed in the plurality of channel regions in a form of stripes running in the first direction; a gate pad electrode formed on the surface portion; a plurality of pn junction diodes formed on or in the surface portion so as to be under the gate pad electrode and extend in the first direction, each of the plurality of pn junction diodes comprising a plurality of pn junctions serially connected; a second insulating film formed on each of the plurality of gate electrodes, on the plurality of pn junction diodes and on portions of the plurality of channel regions, and a source electrode formed on the surface portion so that the source electrode is disposed on the plurality of source regions and is electrically in contact with the plurality of source regions through contact holes formed in the second insulating film, wherein the gate pad electrode is disposed on portions of a set of the plurality of channel regions so that other portions of the set of the plurality of channel regions extend from under the gate pad electrode and the source electrode is physically in contact with the other portions of the set of the plurality of channel regions extending from under the gate pad electrode, the plurality of channel regions in the set being continuous under the gate pad electrode.