Patent ID: 8735228

Claim:
A method for manufacturing a trench isolation metal-oxide-semiconductor (MOS) P-N junction diode device, comprising steps of: providing a substrate; forming a first mask layer on the substrate; performing a first photolithography and etching process to partially remove the first mask layer to form a concave structure on the substrate; performing an etching process to partially remove the substrate through the concave structure to form a trench structure in the substrate; growing a trench oxide layer on an inner surface of the trench structure; forming a second mask layer over the first mask layer and the trench oxide layer; performing a dry etch-back process to partially remove the second mask layer until the level of the second mask layer is lower than a surface of the substrate; performing a second photolithography and etching process to partially remove the first mask layer; performing a thermal oxidation process to form a first oxide layer on the substrate and the second mask layer; forming a third mask layer over the first oxide layer, the first mask layer, the second mask layer and the trench oxide layer; performing a third photolithography and etching process to partially remove the third mask layer to form a gate structure over the first oxide layer and the substrate; performing an ion-implanting process to dope the substrate to form a deep doped region at a location adjacent to the trench oxide layer; partially removing the first oxide layer uncovered by the gate oxide layer; performing a metallic sputtering process to form a metallic sputtering layer on the third mask layer within the trench structure, the gate structure, the trench oxide layer and the first mask layer; and performing a fourth photolithography and etching process to partially remove the metallic sputtering layer.