Patent ID: 8826206

Claim:
A computer program product for implementing a model of an electrical circuit including a first region and a second region, the first region including simulated logic and a simulated latch circuit, the simulated latch circuit configured to output a simulated data output signal to the second region, the computer program product comprising: a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit including a processor for performing a method comprising: receiving, by the processor, as logical inputs to the simulated logic, a simulated power supply voltage state of the first region, a simulated data input signal and a simulated clock signal; and generating, by the processor, based on determining that the power supply voltage state of the first region corresponds to the first region being inactive, a pseudo-random number as an output of the simulated latch circuit, the pseudo-random number generated based on the simulated data input signal and the simulated data output signal from the latch circuit.