Patent ID: 8368142

Claim:
A semiconductor device comprising: a substrate; and a thin film transistor over the substrate, wherein the thin film transistor comprises: a semiconductor layer comprising a source region, a drain region, and a channel formation region interposed therebetween, the source region and the drain region doped with a first impurity element; and a gate electrode formed adjacent to the semiconductor layer with a gate insulating film interposed therebetween, wherein the semiconductor layer comprises needle-shaped or column-shaped crystals which are substantially aligned in a direction parallel to a length direction of the channel formation region, wherein the channel formation region comprises a substantially intrinsic region and an impurity region, wherein the substantially intrinsic region extends continuously from the source region to the drain region, wherein the impurity region extends continuously from the source region to the drain region, wherein the substantially intrinsic region is in contact with the source region and the drain region, wherein the impurity region is in contact with the source region and the drain region, and wherein a standard deviation of S-value of the thin film transistor is within 10 mV/dec for an N-channel type and 15 mV/dec for a P-channel type.