Patent ID: 8741769

Claim:
A method of forming a semiconductor device comprising: obtaining a semiconductor substrate having a plurality of wiring layers wherein a last wiring layer of the plurality of wiring layers comprises a conductive material; forming an insulation layer on the last wiring layer, forming a via opening in the insulation layer to expose the conductive material in the last wiring layer; forming a barrier layer in the via opening; forming a copper plug on the barrier layer and filling the via opening wherein the copper plug has a wall which makes an angle with respect to the last wiring layer of 45 to 75 degrees; forming a cap layer over the insulation layer and directly covering the copper plug to prevent oxidation of the copper in the copper plug, the cap layer making direct contact with the wall; and forming a dielectric layer directly on the cap layer and having an opening aligned with the copper plug, the dielectric layer opening being larger than the copper plug such that the dielectric opening exposes the cap layer covering the copper plug and in addition exposes a portion of the cap layer that is not covering the copper plug.