Patent ID: 8158888

Claim:
A semiconductor package comprising: a substrate having an upper surface; a bonding pad, disposed on the upper surface of the substrate; a first solder mask layer having a first thickness, disposed on the upper surface of the substrate, and having a first opening that exposes at least a portion of the bonding pad; and a second solder mask layer having a second thickness greater than the first thickness and having a second opening that exposes the at least a portion of the bonding pad, the second solder mask layer disposed over the first solder, mask layer, wherein: the first opening is tapered and includes a first top diameter an a first bottom diameter, the first top diameter being larger than the first bottom diameter; the second opening is tapered and includes a second top diameter and a second bottom diameter, the second top diameter being larger than the second bottom diameter; and the second bottom diameter is larger than the first top diameter.