Patent ID: 7266035

Claim:
A static random access memory comprising: a memory cell array having a plurality of memory cells arranged in a matrix form; a plurality of word lines each connected in common to the plurality of memory cells arranged in each row of the memory cell array; a plurality of power supply lines extending parallel to the plurality of word lines, each of the plurality of power supply lines being connected in common to the plurality of memory cells arranged in each row of the memory cell array and which supplies a power supply voltage to the plurality of memory cells; and a plurality of power supply line/word line control circuits connected to the plurality of word lines and the plurality of power supply lines respectively, wherein, in accessing the plurality of memory cells row by row, the power supply line/word line control circuits raise a voltage of a corresponding power supply line among the plurality of power supply lines, detect that the voltage of the power supply line at all positions reaches a first voltage, and after detecting that, start activation of the word line, whereas, in turning from an access state to a non-access state, the power supply line/word line control circuits deactivate the word line, detect that the voltage of the word line at all positions has been changed to a voltage corresponding to a deactivated state, and after detecting that, change the voltage of the power supply line to a second voltage which is lower than the first voltage.