Patent ID: 6987394

Claim:
An electrical circuit for measuring capacitance, comprising: a signal generating mechanism for generating a signal having a predefined frequency and predefined low and high voltage levels; an electrical network having at least four nodes (A, B, C, D), wherein the network has a first switching mechanism coupled between nodes (A) and (B), a second switching mechanism coupled between nodes (B) and (C), a third switching mechanism coupled between nodes (C) and (D) and a fourth switching mechanism coupled between nodes (D) and (A), and wherein node (C) is connected to a grounding mechanism for coupling node (C) to an electrical ground; and a load having at least two terminals and an unknown capacitance between the terminals, wherein one of the terminals is connected to the signal generating mechanism and another of the terminals is connected to the node (A) in the network, wherein the first switching mechanism and the third switching mechanism constitute a first pairing and the second switching mechanism and the fourth switching mechanism constitute a second pairing, and wherein the first pairing is selectively substantially opened and thereby substantially blocking current while the second pairing is selectively substantially closed and thereby substantially conduct current, and wherein the first pairing is selectively substantially closed while the second pairing is selectively substantially opened in order to full-wave rectify a current flowing between the two terminals in the load.