Patent ID: 7069399

Claim:
A method for accessing a memory device of a computer system, the memory device being electrically connected to a memory controller, the memory controller sequentially responding to a master device according to a sequence of access requests issued in order by the master device, the memory controller comprising a request queue, and a latency monitoring unit electrically connected to the request queue, the method comprising: (a) using the request queue to store access requests generated from the master device; (b) using the latency monitoring unit to record a plurality of latency values, the latency values respectively corresponding to the access requests stored in the request queue; (c) using the memory controller to receive a first access request and add the first access request to the request queue with an associated queue priority according to latency values associated with the access requests already stored in the request queue and respectively adding a predetermined increment value to the latency values corresponding to access requests in the request queue having associated queue priorities that are lower than the queue priority of the first access request; and (d) using the memory controller to sequentially access the memory device according to the associated queue priorities of the access requests stored in the request queue.