Patent ID: 8410534

Claim:
An integrated circuit structure comprising: a semiconductor layer having a top surface; a first device comprising a first diffusion region within said semiconductor layer at said top surface; a second device comprising a second diffusion region within said semiconductor layer at said top surface; and a capacitor between said first diffusion region and said second diffusion region, wherein said capacitor comprises: an isolation structure having a first side at said top surface and a second side; a silicon germanium film adjacent to said first side; a trench isolation structure adjacent to said second side and comprising: a dielectric liner; and a first fill material comprising one of a semiconductive material and a conductive material; and a channel extending through said isolation structure from said first side to said second side and comprising a second fill material that electrically connects said silicon germanium film to said first fill material, wherein said silicon germanium film further extends over said first diffusion region and said second diffusion region so as to electrically connect said first diffusion region, said capacitor and said second diffusion region.