Patent ID: 8576952

Claim:
A configurable demodulator for demodulating a user code from a received signal, the configurable demodulator comprising: a first multiply-logic device configured to multiply a first product code with an encoded data signal to produce a first code demodulated chip sequence, the first product code including at least a user code sequence; a first accumulator coupled to the first multiply-logic device, the first accumulator configured to sum the first code demodulated chip sequence to produce a first code-demodulated sample; a second multiply-logic device configured to multiply a second product code with the encoded data signal to produce a second code demodulated chip sequence, the second product code including at least a user code sequence; and a second accumulator coupled to the second multiply-logic device, the second accumulator configured to sum the second code demodulated chip sequence to produce a second code-demodulated sample, wherein the first product code includes the user code sequence and an in-phrase portion of an extended code sequence, and wherein the second product code includes the user code sequence and a quadrature-phase portion of the extended code sequence.