Patent ID: 7876720

Claim:
A method for differential clock pulse compensation between a clock-pulse system of a digital line-connected data interface and an asynchronous clock-pulse system of a digital wireless data interface, wherein user data which is sent over the wireless data interface in a synchronous mode of the wireless data interface is transmitted over the line-connected data interface in a packet-based manner, the method comprising the steps of: (1) monitoring the occupancy level of at least one memory arranged between the wireless data interface and the line-connected data interface, which memory admits the user data for temporary storage, and is clocked both by a clock-pulse signal of the clock-pulse system of the wireless data interface and by a clock-pulse signal of the clock-pulse system of the line-connected data interface; and (2) adapting the data rate of the data transmitted over the line-connected data interface depending on the occupancy level of the memory, in that the number of data elements in a data packet transmitted over the line-connected data interface is increased if the occupancy level is below a permitted limit, and the number of data elements in a data packet transmitted over the line-connected data interface is reduced if the occupancy level is above a permitted limit.