Patent ID: 7840832

Claim:
A fault tolerant data processing system for controlling a real time process, said system being tolerant to systematic faults in its software, said system comprising: a data processor unit with a program memory and a data memory and input and output units where program software residing in the program memory can be executed on the data processor unit a normal-mode software program residing in said program memory, a backup-mode software program also residing in said program memory arranged to perform the same or similar function of the normal mode software program but being differently implemented than the normal-mode software program, wherein a trigger signal received by the data processor unit can switch execution control such that the normal-mode software program stops executing and the backup-mode software program starts executing, a backup activation system comprising a plurality of activation units, wherein the activation units are implemented in the normal-mode software program, wherein the activation units are operative to issue an error signal upon discovery of an error, and a voter unit connected to the data processor unit, wherein each activation unit is connected to the voter unit, wherein the voter unit is configured to issue the trigger signal to interrupt the real time process when a majority of the activation units issue the error signal.