Patent ID: 7661100

Claim:
A method for linking program code in a processor instruction memory comprising rows and columns, the program code comprising a plurality of instructions for processing data packets in a communications network, the method comprising: dividing the program code into a plurality of sequences, each sequence comprising a number of instructions steps and being configured to perform a certain task on a data packet passing through the communications network; defining, based on the program code, a plurality of relocation objects, each relocation object of the plurality of relocation objects corresponding to a dependency relationship between two or more of the sequences; allocating each sequence to at least one row and at least one column of the processor instruction memory such that the instruction steps of the sequence are consecutively allocated in the processor instruction memory; linking a first sequence to a second sequence by using a defined relocation object corresponding to a dependency relationship between the first sequence and the second sequence to define a branch from the first sequence to the second sequence; forming at least one directed graph, based on at least some of the sequences and at least some of the relocation objects, and determining a longest execution path through the directed graph; and entering in the processor instruction memory in a shorter of the at least two execution paths a null instruction, so as to make the at least two execution paths equally long, wherein the length of the at least two execution paths correspond at least to the length of the longest execution path.