Patent ID: 8203186

Claim:
A semiconductor device, comprising an nMISFET and a pMISFET, wherein the nMISFET includes a first active region divided by an isolation region and made of a first semiconductor region, a first gate electrode formed on the first active region, and a first stress film which is formed on the first active region to cover the first gate electrode and has a first stress, the pMISFET includes a second active region divided by the isolation region and made of a second semiconductor region, a second gate electrode formed on the second active region, a second stress film which is formed on the second active region to cover the second gate electrode and has a second stress, and the first stress film and the second stress film overlap on the isolation region, the first stress and the second stress are different stresses from each other, the first stress film is formed not to be located on an upper surface of the second gate electrode, the second stress film is formed not to be located on an upper surface of the first gate electrode, and the semiconductor device further includes an interlevel insulating film formed to be in contact with upper surfaces of the first stress film and the second stress film.