Patent ID: 8878501

Claim:
A multi-phase power block for a switching regulator, the switching regulator being configured to receive an input voltage and to generate a regulated output voltage, the multi-phase power block comprising: a phase control circuit configured to receive a single phase pulse-width modulation (PWM) clock signal and generate N clock signals in N phases; N power cells, each power cell comprising a pair of power switches connected in series between the input voltage and a ground potential and configured to generate a switching output voltage at a common node between the power switches, one or more gate drivers configured to drive gate terminals of the power switches, a control circuit configured to receive one of the N clock signals and to generate gate drive signals for the gate drivers, and an inductor having a first terminal receiving the switching output voltage and a second terminal providing an inductor current, the second terminals of the inductors of the N power cells being connected together to an output node; and a current sharing control circuit configured to assess the inductor current at the inductor of each of the N power cells and to generate duty cycle control signals for each of the N power cells, the duty cycle control signals being applied to the control circuits of the N power cells to adjust the duty cycle of one or more clock signals supplied to the power cells to balance a current loading among the N power cells.