Patent ID: 7348610

Claim:
A substrate, comprising: a first crystalline semiconductor layer and a second crystalline semiconductor layer; and an insulating layer bonding a bottom surface of said first crystalline semiconductor layer to a top surface of said second crystalline semiconductor layer, a first crystal direction of said first crystalline semiconductor layer aligned relative to a second crystal direction of said second crystalline semiconductor layer, said first crystal direction different from said second crystal direction; a first notch formed in an edge of said first crystalline semiconductor layer at an intersection of a line along said first crystal direction and passing through a center of said first crystalline semiconductor layer and a perimeter of said first crystalline semiconductor layer; a second notch formed in an edge of said second crystalline semiconductor layer at an intersection of a line along said second crystal direction and passing through a center of said second crystalline semiconductor layer and a perimeter of said second crystalline semiconductor layer, and wherein said first crystalline semiconductor layer has a thickness of between about 10 nm to about 100 nm, said insulating layer has a thickness of between about 5 nm to about 500 nm and said second crystalline semiconductor layer has a thickness of greater than about 700 microns.