Patent ID: 8887120

Claim:
A timing path slack monitoring system, comprising: a flip-flop for capturing transitions of a signal transmitted along a signal line of an integrated circuit, the flip-flop having at least one output; a logic module coupled to the flip-flop for receiving the at least one output and to generate an output signal that includes a first pulse having a width that is a function of a timing path slack associated with the signal line; a pulse width shrinking circuit having an input coupled to the logic module for receiving the output signal and generating in response, a series of pulses of decreasing width, wherein a time taken for the series of pulses to die away is a function of the width of the first pulse; an integrator coupled to an output of the pulse shrinking circuit for integrating the series of pulses to produce a second pulse at an output of the integrator, wherein a duration of the second pulse is a function of a dying time of the first pulse; and a timer having coupled to the output of the integrator for receiving the second pulse and for measuring the duration of the second pulse.