Patent ID: 7459338

Claim:
A method of manufacturing an organic field effect transistor comprising a resin substrate, a gate electrode, a gate insulating layer, a source electrode, a drain electrode, and an organic semiconductor layer, the method comprising the steps of: forming by application on at least a resin substrate, an organic resin layer having an average surface roughness of 1 nm or less and a maximum peak height of a surface unevenness of 30 nm or less; forming a first hydrophobic organic layer by application on the organic resin layer; subjecting the first hydrophobic organic layer to such a treatment as to form a first region in a surface of the first hydrophobic organic layer or a surface of the organic resin layer and to also form a second region in the surface of the first hydrophobic organic layer, the first and the second regions having different surface free energies; forming a gate electrode on only either one of the first and the second regions; removing the first hydrophobic organic layer from one of the first and second regions on which the gate electrode is not formed; forming a gate insulating layer by application on the gate electrode; after the step of forming the gate insulating layer, forming a second hydrophobic organic layer by application on a surface of the gate insulating layer and a surface of the organic resin layer; subjecting the second hydrophobic organic layer to such a treatment as to form, in a surface of the second hydrophobic organic layer or the surface of the organic resin layer, a third region and a fourth region having different surface free energies, and simultaneously to form, in the surface of the gate insulating layer, a fifth region and a sixth region having different surface free energies, one of the fifth and the sixth regions having a water droplet contact angle of 90° or more and 130° or less and the other of the fifth and the sixth regions having a water droplet contact angle of 20° or more and 40° or less; forming a source electrode and a drain electrode simultaneously by application on only either one of the third and fifth regions and the fourth and sixth regions; and forming an organic semiconductor layer by application on the gate insulating layer between the source electrode and the drain electrode.