Patent ID: 8767024

Claim:
A display apparatus, comprising: a display panel, comprising: a plurality of data lines; a plurality of scan lines; and a plurality of sub-pixels arranged in a matrix manner, and each sub-pixel being electrically connected to one of the data lines and one of the scan lines; a data driving circuit electrically connected to the data lines; a scan driving circuit electrically connected to the scan lines; and a timing control circuit electrically connected to the data driving circuit and the scan driving circuit, wherein the timing control circuit is configured to control the scan driving circuit to drive the scan lines and control the data driving circuit to output data voltages to the data lines, the data voltages on any two consecutive data lines initially are configured to have different polarities while the data lines are being supplied with data voltages from the data driving circuit; the timing control circuit is further configured to judge a to-be-displayed image whether or not containing an area for displaying a predetermined pattern constituted by a plurality of pixels in row, wherein at least one of the pixels in the predetermined pattern has a first gray level, another one pixel adjacent to the pixel has a second gray level, and the first and second gray levels have a gray-level difference therebetween greater than or equal to a predetermined value; the timing control circuit is further configured to, if the to-be-displayed image contains the area corresponding to the predetermined pattern, divide the data lines associated with the area into a plurality of data line groups each constituted by four consecutive data lines and configure, while the data driving circuit outputs the data voltages associated with the area, data voltages on the two middle data lines in one data line group to have a first polarity and the data voltages on the rest two data lines in the same data line group to have a second polarity.