Patent ID: 8116047

Claim:
An electrostatic discharge (ESD) protection circuit that protects an internal circuit having at least one input pin by dissipating energy associated with an ESD event at the input pin, the ESD protection circuit comprising: rise time dependent activation circuitry for detecting a slew rate of an input signal supplied at the input pin, wherein when activation circuitry determines that the slew rate of the input signal is greater than a first threshold value, then the input signal is the ESD event and generates a trigger signal of a short period of time in accordance with a first time constant associated with the circuitry of said activation circuitry and for input signals having a slew rate of less than the first threshold value, then no trigger signal is generated; dissipation duration control circuitry coupled to the rise time dependent activation circuitry and an ESD dissipation circuit, the duration control circuit is activated in response to the trigger signal received from the rise time dependent activation circuitry to produce an activation signal that activates the ESD dissipation circuitry and that controls the length of time the dissipation circuit remains active in accordance with a second time constant associated with the control circuitry that is longer than the first time constant causing the dissipation circuit to remain active long enough to enable sufficient discharge of the input signal the dissipation control circuitry further comprising a capacitor and transistor arranged in series between a voltage supplied at the input pin and a ground such that the gate and source of the transistor are connected with the ground, thereby forming a shunt protective circuit for protecting a shunt inverter; and the ESD dissipation circuitry coupled to the duration control circuitry, wherein the ESD dissipation circuitry responds to the activation signal provided by the duration control circuitry by activating the dissipation circuitry thereby shunting the energy associated with the ESD event away from the internal circuit, the ESD dissipation duration circuitry is configured to maintain the shunting of the energy for a period of time until a sufficient amount of the energy associated with the ESD event is shunted away from the internal circuit thereby protecting the internal circuit from the ESD event.