Patent ID: 7010777

Claim:
A look-up table (LUT) based logic element (LE), comprising: m data inputs; two data outputs; 2 k bits of LUT mask, wherein the LE includes first and second circuitry configured to accomplish first and second respective identical Boolean functions, each of the first and second circuitry operating on k data inputs responsive to a separate 2 k−1 bits of the 2 k bits of LUT mask, wherein 2 k−m inputs of the m inputs are shared between the first and second circuitry and m−k inputs of each k inputs are independent inputs; m=k+2; each of the first and second circuitry includes base circuitry comprising a plurality of multiplexor stages to nominally accomplish a k−1 LUT function operating responsive to the separate 2 k−1 bits of the 2 k bits of LUT mask; each of the first and second circuitry further includes an additional stage inserted between a first, earlier, multiplexor stage and a second, later, multiplexor stage of the base circuitry, the additional stage of each of the first and second circuitry configured to selectively pass the outputs from the earlier stage of that circuitry or from the earlier stage of the other circuitry, to the later stage of that circuitry, the first and second circuitry thereby collectively forming two k input LUT functions with no additional LUT mask bits beyond the 2 k bits of LUT mask; and the LE further comprises an SRAM-controlled 2:1 mux whose output provides an (m+1)st data input, wherein the 2:1 mux selects between a signal provided at one of the m data inputs and a signal that is not provided at one of the m data inputs.