Patent ID: 8822342

Claim:
A method of forming a device comprising: providing a substrate prepared with a dielectric layer where interconnects are to be formed, the dielectric layer comprising trenches for lines and vias for contacts, the trenches being above the vias, the dielectric layer having first and second regions, wherein the first region comprises wide trenches and the second region comprises narrow trenches, and wherein a depth delta exists between bottoms of the wide and narrow trenches; forming a non-conformal layer on the substrate, the non-conformal layer lining the wide and narrow trenches in the first and second regions; etching the non-conformal layer in the wide and narrow trenches to expose areas of the dielectric layer in the narrow trenches and to remove the non-conformal layer from the bottom of the vias while leaving an remaining amount of the non-conformal layer over the wide trenches; and reducing the depth delta between the bottoms of the wide and narrow trenches in the first and second regions by etching the remaining amount of the non-conformal layer and the dielectric layer, the non-conformal layer having a lower etch rate than the dielectric layer, thereby allowing the narrow trenches to be etched further and faster than the wide trenches.