Patent ID: 8593184

Claim:
A regulating circuit for use with a buffer circuit, the buffer circuit at least comprising a metal-oxide-semiconductor transistor and a voltage output terminal, the voltage output terminal being connected to a drain terminal of the metal-oxide-semiconductor transistor, the regulating circuit comprising: a first metal-oxide-semiconductor transistor having a gate terminal, a source terminal and a drain terminal connected to a voltage source and a connecting node, respectively, wherein the connecting node is electrically connected to a substrate of the metal-oxide-semiconductor transistor of the buffer circuit; and a second metal-oxide-semiconductor transistor having a gate terminal, a drain terminal and a source terminal connected to the connecting node and the voltage output terminal, respectively, wherein a substrate of the second metal-oxide-semiconductor transistor is electrically connected to the connecting node, wherein the gate terminals of the first metal-oxide-semiconductor transistor and the second metal-oxide-semiconductor transistor are directly connected together.