Patent ID: 8110457

Claim:
A method of manufacturing a semiconductor device comprising the steps of: (a) preparing a semiconductor substrate; (b) forming a semiconductor region in the semiconductor substrate; (c) forming an alloy film containing nickel and a first metal element over the semiconductor substrate including the semiconductor region; (d) forming a metal silicide layer comprised of silicide containing the nickel and the first metal element by causing the alloy film to react with the semiconductor region by a first heat treatment; (e) after the step (d), removing a part of the alloy film not reacted with the semiconductor region in the step (d) from the metal silicide layer; (f) after the step (e), performing a second heat treatment at a heat treatment temperature higher than that of the first heat treatment; and (g) after the step (f), forming a first insulating film over the semiconductor substrate including the metal silicide layer, wherein a rate of the first metal element included in metal elements forming the metal silicide layer is larger than a rate of the first metal element included in the alloy film, wherein in the step (d), the first heat treatment is performed at a heat treatment temperature where a diffusion coefficient of the first metal element into the semiconductor region is larger than a diffusion coefficient of nickel into the semiconductor region, and wherein the first heat treatment is performed such that the unreacted part of the alloy film remains above the metal silicide layer, wherein the method further comprises the steps of (a1) after the step (a), forming a gate insulating film over the semiconductor substrate; (a2) forming a gate electrode over the gate insulating film, wherein in the step (c), the alloy film is formed over the semiconductor substrate including the semiconductor region so as to cover the gate electrode; and (a3) after the step (a2), forming a sidewall insulating film on a sidewall of the gate electrode, the step (b) being performed after the step (a3); and wherein after the step (b), the method further comprises the steps of (b1) forming a second insulating film over the semiconductor substrate so as to cover the gate electrode and the sidewall insulating film; (b2) forming a resist pattern over the second insulating film; (b3) dry etching the second insulating film using the resist pattern as an etching mask; and (b4) removing the resist pattern, wherein in the step (b2), the resist pattern is not formed over the semiconductor region, the gate electrode, and the sidewall insulating film, wherein in the step (b3), a part of the second insulating film remains at a lower part of one side of the sidewall insulating film opposite to the other side thereof opposed to the gate electrode, wherein after the step (b4), the step (c) is performed, and wherein in the step (c), the alloy film is formed while the part of the second insulating film remains at the lower part of one side of the sidewall insulating film opposite to the other side thereof opposed to the gate electrode.