Patent ID: 7632744

Claim:
A method of manufacturing a semiconductor integrated circuit device having a DRAM memory cell, comprising steps of: (a) forming a gate insulating film over a semiconductor substrate; (b) forming a first silicon film over the gate insulating film; (c) forming a tungsten nitride film over the first silicon film, wherein a nitrogen content of the tungsten nitride film is 7% or greater; (d) forming a tungsten film over the tungsten nitride film, wherein the tungsten film is of greater thickness than the tungsten nitride film; (e) patterning the first silicon film, the tungsten nitride film and the tungsten film to form a word line of the memory cell; (f) doping impurities into the semiconductor substrate to form a source region and a drain region; (g) forming a first insulating film over the word line, the source region and the drain region; (h) forming a first plug and a second plug in the first insulating film, wherein the first plug is electrically connected to the source region, and the second plug is electrically connected to the drain region; (i) forming a bit line of the memory cell over the first insulating film, wherein the bit line is electrically connected to the second plug; and (j) forming a capacitance element of the memory cell over the first insulating film, wherein the capacitance element is electrically connected to the first plug.