Patent ID: 7124280

Claim:
An execution control apparatus of a data driven information processor said execution control apparatus comprising: a handled instruction that includes N+2 (N is an arbitrary integer of at least 1) inputs, in which of the inputs is a constant when an instruction has N+2 inputs; an instruction decoder that decodes an instruction in an input packet and outputs a number of inputs required for said instruction; a waiting storage region including a waiting data storage region that can store N waiting data in each waiting data address, and a data valid flag storage region that stores a data valid flag for each waiting data address, said data valid flag indicating whether the N waiting data stored in said each waiting data address is respectively valid or invalid; a constant storage device including a region that stores a constant, and a constant valid flag storage region that stores a constant valid flag representing whether a constant stored in a plurality of constant addresses are valid or invalid; a constant readout unit that accesses said constant storage region according to each constant address information included in the input packet to read out a constant and a constant valid flag from a relevant constant address in said constant storage region; an input number detection unit that, when the number of inputs is N+2, updates the constant valid flag to a value representing “invalid”, updates the number of inputs to N+1, and outputs the updated constant valid flag and the updated number of inputs to the waiting processing unit; a waiting operation determination unit that determines a hash address by a hash calculation from contents of the input packet, selects one predetermined way out of a plurality of predetermined ways of processing waiting data, outputs a select signal for the predetermined way of processing waiting data depending upon a combination of a data valid flag for said determined hash address, a constant valid flag read out by said constant readout unit, and the number of instruction inputs output from said instruction decoder for said waiting data storage region, and updates the data valid flag for said hash address based on the select predetermined way of processing waiting data; and a waiting region access unit being responsive to said select signal to implement a waiting process corresponding to said select signal.