Patent ID: 7892959

Claim:
A method comprising: forming a first oxide film pattern and a first polysilicon pattern on a semiconductor substrate; sequentially forming a dielectric film and a polysilicon film on the semiconductor substrate including the first oxide film pattern and the first polysilicon pattern; forming a second oxide film pattern on the polysilicon film; forming a gate by etching to the semiconductor substrate using the second oxide film pattern as a mask, the gate including the first oxide film pattern, the first polysilicon pattern, a dielectric film pattern and a second polysilicon pattern; removing the second oxide film pattern; forming a spacer on sidewalls of the gate; and forming an interlayer dielectric film on the semiconductor substrate including the gate and the spacer, wherein forming the spacer comprises: forming a third oxide film and a first nitride film on the sidewalls of the gate; forming a third oxide film pattern and a first nitride pattern on the sidewalls of the gate by performing a dry-etching process on the third oxide film and the first nitride film; removing the first nitride film pattern; forming a second nitride film on the semiconductor substrate including the third oxide film pattern and the gate; forming a fourth oxide film on the second nitride film; and forming a second nitride film pattern by performing an etching process on the fourth oxide film.