Patent ID: 8750027

Claim:
An SRAM device, comprising: a first access transistor, a second access transistor, a first driver transistor, and a second driver transistor on a first substrate; a first load transistor on the second driver transistor and a second load transistor on the first driver transistor; a first shared contact electrically connecting a gate of the first load transistor to a source of the second access transistor and electrically connecting the gate of the first load transistor to a gate of the first driver transistor; a second shared contact electrically connecting a gate of the second load transistor to a source of the first access transistor and electrically connecting the gate of the second load transistor to a gate of the second driver transistor; a first contact between the second load transistor and the gate of the first driver transistor to electrically connect the second load transistor to the first driver transistor; and a second contact between the first load transistor and the gate of the second driver transistor to electrically connect the first load transistor to the second driver transistor, wherein the first access transistor, the second access transistor, the first driver transistor, and the second driver transistor are configured to operate horizontally and the first and second load transistors are configured to operate vertically.