Patent ID: 8310430

Claim:
A driver comprising: a plurality of output portions configured to be synchronized with a shift pulse signal, wherein said shift pulse signal indicates one specification shift pulse signal among a plurality of specification shift pulse signals, wherein said plurality of specification shift pulse signals indicates a plurality of output numbers, which are different from each other based on respective specifications of said plurality of specification shift pulse signals, and wherein said one specification shift pulse signal indicates a setting output number as one output number among said plurality of output numbers; an output switching control portion configured to select a group of output portions corresponding to said setting output number among said plurality of output portions based on said one specification shift pulse signal; and a plurality of shift register portions configured to be connected to respective output portions of said plurality of output portions and output said shift pulse signals in turn, wherein said group of output portions loads display data in synchronization with said shift pulse signal, and outputs output grayscale voltages corresponding to said display data to a display portion, wherein said output switching control portion connects in cascade a group of shift register portions corresponding to said setting output number among said plurality of shift register portions based on said one specification shift pulse signal, wherein said group of shift register portions is connected to said group of output portions, respectively, and wherein said output switching control portion comprises: a shift pulse input terminal configured to be supplied with said shift pulse signal; an input pulse width, monitoring circuit configured to monitor said shift pulse signal supplied to said shift pulse input terminal and to output a specification control signal indicating said setting output number corresponding to said one specification shift pulse signal among said plurality of output numbers; an output number control circuit configured to connect in cascade said group of shift register portions corresponding to said setting output number among said plurality of shift register portions based on said specification control signal; and a shift pulse shaping circuit configured to shape said one specification shift pulse signal supplied to said shift pulse input terminal into a shaped shift pulse signal and to output said shaved shift pulse signal to a first stage register portion of said group of shift register portions so that a group of output portions corresponding to said group of shift register portions among said plurality of output portions loads said display data at a predetermined timing.