Patent ID: 7447617

Claim:
A data processing device designing method of dividing a predetermined program comprising instructions for a plurality of operations, into a first part which is executed by a predetermined processor and a second part, functions of which are realized in hardware according to a predetermined technology, and thus designing a data processing device corresponding to the predetermined program, comprising the steps of: a) previously calculating an execution time required when each predetermined operation is executed by the predetermined processor; b) previously calculating a circuit size required when each predetermined operation is realized in hardware according to the predetermined technology; c) calculating, for operations included in each sub-program of the first part of the predetermined program, a total execution time required when each sub-program of the first part of the predetermined program is executed by the predetermined processor, by using the previously calculated required execution time obtained for the predetermined operation for the predetermined processor; and d) calculating, for operations included in each sub-program of the second part of the predetermined program, a total circuit size required when functions of each sub-program of the second part of the predetermined program are realized in hardware according to the predetermined technology, by using the previously calculated required circuit size obtained for each predetermined operation for the predetermined technology, and thus, designing the data processing device corresponding to the predetermined program in such a manner that predetermined circuit designing requirements comprising a predetermined required execution time and a predetermined required circuit size may be fulfilled.