Patent ID: 7711764

Claim:
A method of implementing logarithmic computations based on first and second operands in a multi-stage pipeline of a logarithmic ALU, said method comprising: decomposing a master look-up function associated with a master look-up table into two or more sub-functions; storing a sub-function look-up table in memory for each sub-function, each sub-function look-up table comprising a different portion of the master look-up table; dividing a range of input values associated with the master look-up table into a plurality of non-overlapping input range subsets, wherein each sub-function look-up table corresponds to a different input range subset; executing at least one sub-function look-up table in a respective stage of said multi-stage pipeline based on a stage input to obtain a stage output; skipping a stage when the stage input exceeds the corresponding input range subset; and combining the stage outputs to generate a logarithmic output.