Patent ID: 8018289

Claim:
A holdover circuit comprising: an analog-to-digital converter configured to generate a digital value indicating a loop filter voltage in a loop filter of a phase-lock loop, the analog-to-digital converter further configured to generate a digital input signal based on the loop filter voltage, the digital input signal representing the digital value; a digital storage unit coupled to the analog-to-digital converter and configured to store the digital value based on the digital input signal and to generate a digital output signal representing the digital value stored in the digital storage unit, the digital storage unit comprising: a selector configured to select either the digital input signal or the digital output signal as a selected digital signal; and a register coupled to the selector and configured to store the digital value represented by the selected digital signal; and a digital-to-analog converter coupled to the digital storage unit and configured to generate an analog voltage signal based on the digital output signal, the analog voltage signal having the loop filter voltage indicated by the digital value for regenerating the loop filter voltage in the loop filter.