Patent ID: 8288817

Claim:
A semiconductor construction, comprising: a gate stack pillar over a semiconductor substrate; the gate stack pillar comprising a gate dielectric material, a silicon-containing material over the gate dielectric material, and an electrically insulative material extending only partially across the silicon-containing material and having an opening extending therethrough to the silicon-containing material; electrically insulative spacers along sidewalls of the gate stack pillar, the electrically insulative spacers extending to above the electrically insulative material; the opening extending within a gap between the electrically insulative spacers, the opening being bounded by interior surfaces of the spacers, an upper surface of the electrically insulative material, and a surface of the silicon-containing material; a first electrically conductive material within the opening and partially filling the opening, the first electrically conductive material narrowing the opening and physically contacting the silicon-containing material; and a second electrically conductive material within the narrowed opening and entirely filling the narrowed opening.