Patent ID: 8791528

Claim:
A microelectronics device comprising: a dielectric layer located over a substrate and having an opening extending therethrough; a dielectric material layer disposed within the opening, the dielectric material layer being different than the dielectric layer; a doped semiconductive layer substantially lining the opening and having a first substantially U-shaped profile within the opening, wherein a portion of the doped semiconductive layer physically contacts a portion of the dielectric layer, a conductive layer substantially lining the doped semiconductive layer and having a second substantially U-shaped profile within the opening, wherein portions of the doped semiconductive layer and the conductive layer are interdiffused; and a bulk conductive material filling the second substantially U-shaped profile within the opening, wherein the doped semiconductive layer includes a region having an impurity concentration disposed between the dielectric layer and the conductive layer, the impurity concentration adjacent the conductive layer being higher than the impurity concentration adjacent the dielectric layer.