Patent ID: 7706900

Claim:
A control apparatus with a fast I/O function, the control apparatus being adapted for storage of a control program, and to input a status of a target to be controlled as an input data from an I/O device, follow the control program to execute an operation of the input data, and output to the I/O device a result of the operation as an output data for controlling the target to be controlled, the control apparatus comprising: a control program execution unit for controlling the target to be controlled; an I/O data interface unit for having the input data input to the control apparatus and the output data output to the I/O device; and a system bus for interconnection between the control program execution unit and the I/O data interface unit, the control program execution unit comprising: a control program memory adapted for storage of the control program; a control data memory adapted for temporary storage of the input data, the output data, and a control variable; and a control program executing circuit adapted for execution of the control program by using the input data to be stored in the control data memory, the control program executing circuit comprising: an instruction register for storing an instruction read from the control program memory; a decoder for interpreting the instruction stored in the instruction register; a control data storage register for storing a content of an operand read from the control data memory; an operation unit for operating a control data stored in the control data storage register in accordance with the instruction interpreted by the decoder; a register for storing an operation output of the operation unit; a control data comparator for detecting whether or not a coincidence is found between the control data before operation by the operation unit and a data after execution of operation; and an operation controller adapted for controls to have the operand read from the control data memory to the control data storage register, and an output data from the operation unit written in the control data memory in accordance with an output of the control data comparator, wherein the operation controller controls a write phase of a read and write instruction to be omitted if a coincidence signal is output from the control data comparator, and otherwise an entirety of the read and write instruction to be executed.