Patent ID: 8868865

Claim:
A computer system comprising: a server module including a first processor and first memory; a storage module including a second processor, a second memory and a storage device; and wherein the server module further includes a transfer module which controls a data transfer between the first memory of the server module and the second memory of the storage module, wherein when the first processor of the server module issues a read command to the second processor of the storage module via the transfer module, wherein the transfer module retrieves a first transfer list including a first address of the first memory for the read command, which is set by the first processor; wherein the transfer module further retrieves a second transfer list including a second address of the second memory, in which data corresponding to the read command read from the storage device is stored temporarily by the second processor, wherein the transfer module creates a conversion list by associating the first address as the data transfer destination address with the second address as the data transfer source address in accordance with the first transfer list and the second transfer list, wherein the transfer module executes a data transfer from the second memory to the first memory based on the conversion list, wherein the transfer module sends a notice of a completion of the data transfer to the second processor, and wherein the transfer module to sends a notice of a completion of the read command to the first processor in response to receiving an instruction from the second processor.