Patent ID: 7550804

Claim:
A semiconductor device comprising: a semiconductor substrate having a first dopant type; an epitaxial layer on an upper surface of the semiconductor substrate; a first semiconductor region within the epitaxial layer and having a plurality of first portion and second portions that are laterally adjacent to the first portions, the first portions having a first thickness and the second portions having a second thickness that is greater than the first thickness, the first semiconductor region having a first concentration of a second dopant type; a plurality of second semiconductor regions within the epitaxial layer, each second semiconductor region being positioned directly below one of the first portions of the first semiconductor region and laterally between a respective pair of the second portions of the first semiconductor region, the second semiconductor regions having the first dopant type; a contact region within and at a surface of the epitaxial layer and adjacent to the first semiconductor region, the contact region having a second concentration of the second dopant type, the second concentration being substantially different than the first concentration; the third semiconductor region within the epitaxial layer, the third semiconductor region having the first dopant type; and a gate electrode over at least a portion of the first semiconductor region and at least a portion of the third semiconductor region, wherein the first semiconductor region covers the plurality of second semiconductor regions to form a buried super-junction.