Patent ID: 6838360

Claim:
A method of fabricating a semiconductor device, characterized by comprising: a first step of defining first, second, third, and fourth element active regions by forming an element isolation structure on a semiconductor substrate having an insulating layer in a predetermined depth and covering a region from side surfaces to a lower surface of at least said first element active region with said insulating layer and said element isolation structure; a second step of forming a first diffusion layer by doping an impurity into said first element active region; the third step of forming a diffusion layer region by doping an impurity having a conductivity type opposite to a conductivity type of said semiconductor substrate into a surface region of said semiconductor substrate in said second element active region; a fourth step of forming first, second, third, and fourth insulating films on said semiconductor substrate in said first, second, third, and fourth element active regions, respectively; a fifth step of forming a conductive film via first, second, third, and fourth insulating films on an entire surface of said semiconductor substrate in said first, second, third, and fourth element active regions, respectively; a sixth step of patterning said conductive film to leave a predetermined pattern in at least one of said first and third element active regions and form gate electrodes in said second and fourth element active regions; a seventh step of doping an impurity into said third and fourth element active regions to form a pair of second diffusion layers and a pair of third diffusion layers in surface regions of said semiconductor substrate on two sides of said conductive film in said third and fourth element active regions; an eighth step of doping an impurity having a conductivity type opposite to a conductivity type of said diffusion layer region into said second element active region to form a pair of fourth diffusion layers in surface regions of said semiconductor substrate on two sides of said conductive film in said second element active region; a ninth step of forming a fifth diffusion layer by doping an impurity into said semiconductor substrate near said third element active region; and a tenth step of forming an electrode connected to said fifth diffusion layer to apply a predetermined voltage to said third element active region via said fifth diffusion layer.