Patent ID: 8552503

Claim:
A strained silicon structure comprising: a substrate having a top surface and having a low density region and a high density region; a first transistor disposed on the top surface within the low density region, the first transistor comprising: a first gate structure disposed on the top surface; and a first source/drain region disposed in the substrate at one side of the first gate structure, wherein a first source/drain to gate distance is defined between the first source/drain region and the first gate structure, and the first source/drain region is stressed wherein the first source/drain region comprise: a first recess disposed in the substrate at one side of the substrate; and a first epitaxial layer filling the first recess; and a second transistor disposed on the top surface within the high density region, the second transistor comprising: a second gate structure disposed on the top surface; and a second source/drain region disposed in the substrate at one side of the second gate structure, wherein a second source/drain to gate distance is defined between the second source/drain region and the second gate structure, the second source/drain region is stressed, and the first source/drain to gate distance is smaller than the second source/drain to gate distance.