Patent ID: 8390055

Claim:
A nonvolatile semiconductor memory device, comprising: a plurality of memory strings each having a plurality of electrically rewritable memory transistors connected in series; and a control circuit for controlling the memory strings, each of the memory strings comprising: a semiconductor layer including a columnar portion that extends in a perpendicular direction to a substrate and functioning as a body of the memory transistors; a charge storage layer formed around a side surface of the columnar portion and configured to enable storage of a charge; and a plurality of first conductive layers formed around the side surface of the columnar portion and the charge storage layer and functioning as gates of the memory transistors, the control circuit comprising: a plurality of second conductive layers formed in the same layers as the plurality of first conductive layers; an insulating layer formed penetrating the plurality of second conductive layers in the perpendicular direction; and a plurality of plug layers formed penetrating the insulating layer in the perpendicular direction, the insulating layer having a rectangular shaped cross-section with a constricted portion in a horizontal direction to the substrate, and the constricted portion being positioned on a long side of the cross-section.