Patent ID: 7683714

Claim:
A differential amplifier comprising: a differential pair that includes a first N-channel MOS transistor and a second N-channel MOS transistor, each of said first and second N-channel transistors being a depletion type transistor, each said depletion-type transistor having a threshold voltage that is predetermined to permit an offset voltage of said differential amplifier to be canceled even when said input signal is in a vicinity of a supply voltage; a first current source that supplies a current to said differential pair; a current mirror circuit that includes plural stages of transistor pairs coupled in cascode fashion for setting an output pair of said differential pair in folded connection; a second current source and a third current source connected to an input terminal of said current mirror circuit and an output terminal of said current mirror circuit, respectively; and an amplification stage that has an input terminal connected to said output terminal of said current mirror circuit and has an output terminal connected to an output terminal of said differential amplifier.