Patent ID: 6858514

Claim:
A method of making a flash memory cell comprising the steps of: forming a first polysilicon layer, which has a bottom surface and a top surface, overlying a substrate with a tunnel oxide layer interposed between the substrate and the first polysilicon layer; forming a trench through the first polysilicon layer, and into the substrate; forming a field oxide layer, having an upper surface, overlying the substrate to a thickness such that the upper surface of the field oxide layer within the trench is higher than the bottom surface of the first polysilicon layer; depositing a second polysilicon layer, having an upper surface, overlying the insulating layer to a thickness such that the upper surface of the second polysilicon layer within the trench is lower than the top surface of the first polysilicon layer; depositing a sacrificial oxide layer over the second polysilicon layer; planarizing the second polysilicon layer, the field oxide layer, and the first polysilicon layer; and stopping the step of planarizing at the top surface of the first polysilicon layer and the upper surface of the second polysilicon layer; depositing a high-k dielectric material overlying the second polysilicon layer; and depositing a third polysilicon layer overlying the high-k dielectric material.