Patent ID: 8004626

Claim:
A pixel array, comprising: a plurality of first scan lines; a plurality of second scan lines, wherein each of the second scan lines is located between adjacent two of the first scan lines; and a plurality of data lines substantially intersected with the first scan lines and the second scan lines; and a plurality of sub-pixels, wherein each of the sub-pixels is electrically connected to one of the first scan lines, one of the second scan lines, and one of the data lines, and each of the sub-pixels comprises: a first switch; a second switch, the first switch and the second switch being electrically connected to the same first scan line and the same data line; a first pixel electrode electrically connected to the first switch; a second pixel electrode electrically connected to the second switch, one of the first scan lines being located between the first pixel electrode and the second pixel electrode; a plurality of common lines electrically connected with each other, the common lines being disposed under the first pixel electrode and the second pixel electrode; and a third switch electrically connected to the first pixel electrode and one of the second scan lines, wherein the third switch has a floating terminal, the floating terminal is capacitively coupled to the second pixel electrode to form a first capacitor, and the floating terminal is capacitively coupled to the common line under the second pixel electrode to form a second capacitor.