Patent ID: 7050331

Claim:
A semiconductor memory device comprising: a memory cell array in which memory cells are arranged in a matrix; a user interface circuit for accepting a command issued by an external user; and an array control circuit for executing an operation on the memory cell array, wherein the user interface circuit includes a command queue having a storage circuit for storing therein the accepted command and a logic circuit for generating a program memory address, the array control circuit is connected to the user interface circuit to receive the program memory address from the user interface circuit, and includes a microcontroller and a program memory, the program memory can be programmed by the external user to construct a code which can be selectively executed by the microcontroller, the program memory address specifies location of a code to be executed by the microcontroller in the program memory, the microcontroller is configured to execute an operation corresponding to the code in the program memory onto the memory cell array, the memory cell includes a gate electrode formed over a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional elements formed on both sides of the gate electrode and having the function of retaining charges, the memory functional element is formed from at least one of an insulating film including an insulator having the function of retaining charges, an insulating film including at least one conductor or semiconductor dot, or an insulating film including a ferroelectric film of which inner charge is polarized by an electric field and in which the polarized state is held, and the memory cell is configured so that a programming operation, to the selected one of the memory functional elements formed on both sides of the gate electrode, can be executed independently from the other unselected one by controlling a voltage applied to the diffusion regions and the gate electrode.