Patent ID: 8000953

Claim:
A computer implemented method for simulating processor operation in a data processing system, the computer implemented method comprising: generating an instruction trace of code that includes phases of execution of the code that are known to a user and phases of execution of the code that are unknown to the user; wherein the code includes markers inserted into the code by the user in order to specify protected intervals, and further wherein each one of the protected intervals corresponds to one of the phases that are known to the user, and still further wherein boundaries of each one of the protected intervals are aligned with boundaries of each one of the phases that are known to the user, and wherein a first part of the instruction trace includes only user-specified protected intervals and a second part of the instruction trace corresponds to phases of execution of the code that are unknown to the user; wherein the markers include a plurality of start markers, wherein each one of the plurality of start markers indicates a beginning of a different one of the protected intervals, an end marker that indicates an end of a particular one of the protected intervals, a break marker that is insertable between a selected one of the plurality of start markers and the end marker to break the particular one of the protected intervals into a plurality of particular protected intervals, and an end all marker; in response to encountering each one of the plurality of start markers in the code, pushing each one of the plurality of start markers onto a stack causing each one of the plurality of start markers to enter into one of the protected intervals; in response to encountering the end marker in the code, popping one of the plurality of start markers from the stack; in response to encountering the end all marker in the code, popping all of the plurality of start markers from the stack; and dividing, by a clustering-based algorithm, only the second part of the instruction trace into a plurality of intervals, wherein the cluster-based algorithm does not divide the first part of the instruction trace into intervals further comprising: forming at least one of the plurality of intervals and at least one of the protected intervals into a plurality of interval clusters, wherein each one of the plurality of interval clusters represent one phase of execution of the instruction trace; selecting at least one selected interval from each one of the plurality of interval clusters to form a trace sample, wherein each at least one selected interval is of at least a minimum size; performing a simulation using the trace sample plurality of trace samples; and providing the user a result of the simulation; and wherein the minimum size of each at least one selected interval is greater than one percent of a total number of instructions in the instruction trace.