Patent ID: 7028240

Claim:
A method for diagnosing a back-end state machine used for testing an array of flash memory cells fabricated on a semiconductor substrate, including the steps of: fabricating a signal selector and a diagnostic matching logic on the semiconductor substrate; setting, by the diagnostic matching logic, a generated match output to a pass or fail state depending on control variables from the back-end state machine; selecting, by the signal selector, the generated match output to be used by the back-end state machine in a verify step of a BIST (built-in-self-test) mode, if a diagnostic mode is invoked for testing functionality of the back-end state machine that is outside of the array of flash memory cells; and selecting by the signal selector, a core match output generated from a measured bit pattern for an address of the flash memory cells for the verify step of the BIST mode if the diagnotic mode is not invoked.