Patent ID: 7329599

Claim:
A method for fabricating a semiconductor device comprising the steps of: forming an insulating layer overlying a semiconductor substrate, the semiconductor substrate having a device region therein; forming an opening through the insulating layer to expose a portion of the device region; contacting the portion of the device region with a first metal layer; forming an electrically conductive barrier layer overlying the first metal layer, and thereby forming an interface between the first metal layer and the electrically conductive barrier layer, the first metal layer and the electrically conductive barrier layer cooperating to form a metallic liner; implanting ions of a conductivity determining impurity into the conductive barrier layer, the ions being implanted under implantation conditions that produce a peak implant concentration within the metallic liner substantially at the interface between the first metal layer and the electrically conductive barrier layer; and depositing a metal layer overlying the metallic liner and filling the opening through the insulating layer.