Patent ID: 8742390

Claim:
A memory cell formed in a semiconductor device, the memory cell comprising: a first electrode conformally formed through a first opening in a first dielectric layer, the first dielectric layer being formed on a substrate including a first metal layer; a resistive layer conformally formed on the first electrode; a second electrode conformally formed on the resistive layer; and a second dielectric layer conformally formed on the second electrode, the second dielectric layer including a second opening; wherein: the first electrode and the resistive layer collectively include a first lip region that extends a first distance beyond a region defined by the first opening; the second electrode and the second dielectric layer collectively include a second lip region that extends a second distance beyond the region defined by the first opening; the second electrode is coupled to a second metal layer using a via that extends through the second opening; the second dielectric layer includes a first surface and a second surface opposite the first surface, the second surface being closer to the substrate than the first surface; and a portion of the second dielectric layer in the region defined by the first opening extends closer to the substrate than the second surface in the second lip region.