Patent ID: 7221009

Claim:
A semiconductor device, comprising: a first transistor having a first impurity diffusion layer of a first conduction type formed in such a manner that a shallow junction region and a deep junction region overlap each other at least partially, and having a silicide layer formed at least on a surface of said first impurity diffusion layer, said shallow junction region being formed on said deep junction region; a second transistor having a second impurity diffusion layer of a second conduction type, said first conduction type and said second conduction type being opposite to each other, and said first transistor and said second transistor comprising a CMOS structure, wherein a first impurity doped into said shallow junction region in said first impurity diffusion layer has a diffusion coefficient lower than a diffusion coefficient of a second impurity doped into said second impurity diffusion layer, and a dose in said shallow junction region is in a range from 1.1×10 15 to 2×10 15 ions/cm 2 ; wherein said first transistor further comprises a third impurity diffusion layer of said second conductive type between the first impurity diffusion layer and a channel of said first transistor; and wherein said third impurity diffusion layer does not underlie the center of a gate electrode.