Patent ID: 7836567

Claim:
A method for manufacturing a thin-film capacitor which is capable of being incorporated into a high-density packaging substrate, the method comprising: forming a high-dielectric-constant capacitor on an upper side of a support substrate; and thinning a back surface of the support substrate by mechanical and/or chemical polishing, wherein the high-dielectric-constant capacitor comprises a lower electrode layer, a high-dielectric-constant-layer, and an upper electrode layer which are sequentially laminated in this order; and the method further comprising: a patterning step of the upper electrode layer, wherein a first resist film is formed on the upper electrode layer, the first resist film is patterned by photolithography, and a part of the upper electrode layer is removed by etching with the patterned resist film as a mask, to expose a part of the high-dielectric-constant layer; a patterning step of the high-dielectric-constant film, wherein, after removing the residue of the first resist film, a second resist film is formed, the second resist film is patterned by photolithography, and a part of the high-dielectric-constant layer is removed by etching with the patterned resist film as a mask, to expose a part of the lower electrode layer; an insulating layer laminating step, wherein an insulating layer is laminated to cover the patterned three layers; a step of forming contact holes, wherein a third resist film is formed on the insulating layer, the third resist film is patterned by photolithography, a part of the insulating layer on the upper electrode layer and a part of the insulating layer on the lower electrode layer are removed with the patterned resist film as a mask by etching, to form a first contact hole at the upper side of the upper electrode layer and a second contact hole at the upper side of the lower electrode layer; and a step of forming connectors, wherein a conductive material is embedded into the first contact hole and the second contact hole to form an upper electrode connector and a lower electrode connector.