Patent ID: 7284100

Claim:
A method for clearing address translation buffers and invalidating a range of associated storage address translation table entries in a computer system, the method comprising the steps of: determining from an opcode of a machine executable instruction to be executed that the machine executable instruction is a multi-function Invalidate Dynamic Address Translation Table Entry (IDTE) computer instruction, the Invalidate Dynamic Address Translation Table Entry (IDTE) instruction configured to perform a function comprising an invalidate and clear function; wherein when performing the invalidate and clear function, performing the steps a)–d) of: a) determining from information provided by the Invalidate Dynamic Address Translation Table Entry (IDTE) instruction, a first translation table entry address of a first translation table entry of a range of one or more address translation table entries to be invalidated; b) determining from information provided by the Invalidate Dynamic Address Translation Table Entry (IDTE) instruction, a range value indicating a number of address translation table entries to be invalidated; c) invalidating the one or more address translation table entries indicated by the range value; and d) clearing address translation buffers of address translation buffer entries, the address translation buffer entries associated with address translation table entries of the range of one or more address translation table entries.