Patent ID: 7830183

Claim:
An apparatus comprising: a first stage having that receives an input signal and that generates a first output signal, wherein the first output signal is at a first logic level if the input signal is greater than a threshold, and wherein the first output signal is at a second logic level if the input signal is less than the threshold, and wherein first stage includes a first transistors that receives a bias signal at its control electrode; a second stage that is coupled to receive the first output signal from the first stage and that generates a second output signal, wherein the second output signal is at the second logic level if the first output signal is at the first logic level, and wherein the second output signal is at the first logic level if the first output signal is at the second logic level, and wherein the second stage includes a second transistors that receives the bias signal at its control electrode; and a bias generator circuit that generates the bias signal, wherein the bias generator circuit includes a third transistor that is coupled to the control electrodes of the first and second transistors at its control electrode.