Patent ID: 7132969

Claim:
A configuration for digital-analog conversion of a high-frequency digital input signal into a carrier-frequency analog output signal, comprising: a delay device having at least one delay element, each delay element having an input and an output, the input of a first delay element receiving the high-frequency digital input signal and any additional delay elements connected downstream from the first delay element in a serially consecutive manner; a first D/A converter having an input receiving the high-frequency digital input signal; and at least one subsequent D/A converter, each having an input connected to the output of a corresponding delay element, all D/A converters controlled with an identical clock signal and having outputs with a multiple pulse sequence combined in a step-by-step manner to form the analog output signal, where a filter characteristic is realized by assigning specific coefficients to the first and at least one subsequent D/A converters, respectively, and a specific delay time to each delay element, for a total delay time corresponding to at least part of a clock period of the identical clock signal such that the filter characteristic is automatically adjusted if there is a change in carrier frequency range of the output signal, thereby improving filter function.