Patent ID: 7183647

Claim:
An electronic parts packaging structure comprising: a wiring substrate which has a structure in which a wiring pattern including a plurality of connection pads on an insulating film, and in which a plurality of via posts are filled in via holes are arranged in portions in the insulating film under the connection pads or under the wiring pattern connected to connection pads within 200 μm from the connection pads, the via post functioning as strut to support the connection pads upon a ultrasonic flip-chip packaging; and the electronic parts whose bumps are ultrasonic flip-chip packaged to the connection pads; wherein, the via holes are arranged in a state that dummy via holes and normal via holes are arranged mixedly, and a normal via holes is arranged separately under the wiring pattern electrically connected to the dummy via hole, in the wiring pattern in which the via post in dummy via holes is used as the struts.