Patent ID: 6885086

Claim:
A lead frame strip for use in the manufacture of integrated circuit chip packages, the strip comprising: at least one array defining a multiplicity of lead frames which each include: an outer frame defining a central opening; a die pad disposed within the central opening; and a plurality of leads attached to the outer frame and extending toward the die pad in spaced relation to each other; the outer frames being integrally connected to each other such that the lead frames are arranged in a matrix wherein the leads thereof extend in multiple rows and columns, the leads within each of the rows and columns being arranged in sets which are disposed in spaced relation to each other and separated by prescribed gaps; a plurality of openings formed within the strip between and in alignment with at least some of the sets of the leads within at least some of the rows and columns, at least some adjacent sets of the leads being separated from each other by at least one of the openings which is sized to span a corresponding one of the gaps; the sets of the leads within each of the rows and columns and the openings collectively defining saw streets for cutting the strip in a manner separating the lead frames from each other.