Patent ID: 8885399

Claim:
A phase change memory (PCM) architecture, the PCM architecture comprising: a PCM array, wherein the PCM array comprises a plurality of rows of PCM cells, wherein each of the rows of PCM cells comprises a plurality of PCM cells, and wherein each PCM cell comprises: a PCM element configured to store a value; and a selection device connected to the PCM element and used to select the PCM element; a plurality of word line driver circuits connected to the rows of PCM cells, wherein each of the word line driver circuits is used to access one of the rows of PCM cells; a plurality of bit line driver circuits connected to the rows of PCM cells and an electrical ground, wherein each of the bit line driver circuits is used to access a PCM cell in each of the rows of PCM cells; a source driver circuit connected to source terminals of at least some of the selection devices in the PCM array and the electrical ground; and a voltage supply circuit configured to provide a positive voltage to the word line driver circuits, the bit line driver circuits and the source driver circuit, wherein during a program operation, a selected bit line driver circuit and a selected source driver circuit precharge a selected bit line and a selected source line to the positive voltage, followed by a set operation and a reset operation, wherein during the set operation and the reset operation, the selected source driver circuit applies the positive voltage to the selected source line, and the bit line driver circuit pulls down the selected bit line.