Patent ID: 8040694

Claim:
A spike converter comprising: (a) a DC bias supply having a positive and negative electrode where the negative terminal is connected to the common ground of the circuit; (b) the positive terminal of said DC bias supply connected to one terminal of a timing resistor; (c) the other terminal of said timing resistor connected to one terminal of a timing capacitor and the input of a comparator with hysteresis and the output of a current sense comparator; (d) the other terminal of said timing capacitor connected to said common ground; (e) the output of said comparator with hysteresis connected to the gate terminal of a switching element, such as a MOSFET; (f) the source terminal of said switching element connected to one terminal of a sensing resistor and one terminal of a current sample feed resistor; (f) the other terminal of said sensing resistor connected to said common ground; (g) the other terminal of said current sample feed resistor connected to the negative input of the current sense comparator forming the feedback point of the converter; (h) the positive terminal of said current sense comparator forming the voltage reference point of the converter; (i) the drain terminal of said switching element connected to one terminal of the primary winding of a transformer; (j) said transformer having a primary and secondary winding; (k) the other terminal of said primary winding of said transformer connected to the positive terminal of the converter's DC power source; (l) the negative terminal of the converter's DC power source connected to said common ground; (m) one terminal of the secondary winding of said transformer connected to the anode of an output rectifier; (n) the cathode of said output rectifier forming the positive output of the converter; (o) the other terminal of said secondary winding of said transformer forming the negative output of the converter; (p) an output capacitor connected between said positive and negative output terminals; (q) an output load in parallel with said output capacitor.