Patent ID: 7176090

Claim:
A method for making a semiconductor device comprising: forming a first dielectric layer on a substrate; forming on the first dielectric layer a sacrificial structure that comprises a first layer and a second layer, the second layer being formed on the first layer and the second layer being wider than the first layer; forming a second dielectric layer on the first dielectric layer, wherein the second dielectric layer encases the sacrificial structure; planarizing the second dielectric layer to expose a top surface of the sacrificial layer; removing the sacrificial structure to generate a trench having sidewalls and a bottom that is nested within the second dielectric layer; forming a conformal high-k gate dielectric layer on the sidewalls and bottom of the trench; and then forming a tapered metal gate electrode on the high-k gate dielectric layer within the trench, wherein the tapered metal gate electrode comprises a first metal layer and a second metal layer, the second metal layer being formed on the first metal layer and the second metal layer being wider than the first metal layer.