Patent ID: 7778060

Claim:
A ferroelectric memory comprising: a memory cell having a ferroelectric capacitor, wherein, in a read-out operation, a first signal Q 1 is given when a first voltage is applied to the ferroelectric capacitor, wherein the first signal is based on a variation in an amount of polarization generated when a voltage magnitude applied to the ferroelectric capacitor changes from 0V to the first voltage and returns to 0V, and a second signal Q 2 is given when a second voltage having an identical magnitude as the first voltage in a different polarity is applied to the ferroelectric capacitor, wherein the second signal is based on a variation in an amount of polarization generated when the voltage magnitude applied to the ferroelectric capacitor changes from 0V to the second voltage and returns to 0V; and an amplification circuit that doubles the first signal, wherein a comparison circuit judges that the memory cell stores first data when 2Q 1 is greater than Q 2 , and the comparison circuit judges that the memory cell stores second data when 2Q 1 is smaller than Q 2 .