Patent ID: 8655935

Claim:
A processing apparatus comprising: a register that stores operand data; a storage that stores a plurality of coefficient tables each storing Taylor series operation coefficient data; and a processor to execute: reading the operand data stored in the register; selecting the Taylor series operation coefficient data to be processed from among the plurality of coefficient tables using degree information of a Taylor series and coefficient table identification information identifying a coefficient table of the plurality of coefficient tables; decoding a floating point operation instruction of the operand data stored in the register; and performing the Taylor series operation by executing the floating point operation instruction using the selected Taylor series coefficient data, and data read from the register or bypass data, and wherein execution of the floating point instruction includes reading from the floating point instruction a field including an instruction type code to indicate a Taylor series multiply-add instruction, a field including first information to indicate a register to store one operand value of a multiply operation of a floating point multiply-add operation, a field including second information indicating a register to store another operand value of the multiply operation of the floating point multiply-add operation, a field including third information to specify a register to which the operation result of the floating point multiply-add operation should be output, a field including fourth information to specify a register storing identification information of a coefficient table and a field including fifth information to specify the degree of the Taylor series, and wherein data necessary for a floating point multiply-adder to execute the Taylor series operation is read from the register and the storage through the reading of the operand data and the reading of the Taylor series operation coefficient data according to a result of the decoding where the floating point operation instruction includes a Taylor series multiply-add instruction and the data is supplied to the processor.