Patent ID: 8687222

Claim:
An image data buffer apparatus, comprising: a memory; and a FIFO control unit configured to cause the memory to operate as a FIFO and having a write pointer indicative of a write position of the memory and a read pointer indicative of a read position of the memory, wherein the FIFO control unit is configured to store image data as a plurality of blocks in the memory at respective positions successively indicated by the write pointer as the image data are supplied as the plurality of blocks contained in an image, to read a given one of the plurality of blocks from the memory at a position indicated by the read pointer, to read, from the memory, partial data that is only part and not all of at least one of the plurality of blocks immediately next to the given one of the plurality of blocks, and to output the given one of the plurality of blocks and the partial data together as one consolidated block, the partial data being a right-hand edge portion or left-hand edge portion of a two-dimensional image corresponding to the at least one of the plurality of blocks, and wherein the FIFO control unit is configured to read an entirety of the at least one block including the partial data before or after said reading of the partial data, thereby reading the partial data of the at least one block twice, without reading a remaining portion of the at least one block twice, the remaining portion plus the partial data being equal to an entirety of the at least one block.