Patent ID: 8041900

Claim:
A method for executing a transaction on a processor that supports transactional memory, comprising: executing the transaction on the processor, wherein stores encountered during the transaction are placed in a store buffer, and wherein a stores_encountered indicator is cleared when commencing the transaction and is set when a first store is placed in the store buffer during the transaction; upon completing the transaction, determining if the stores_encountered indicator is set, if so, signaling a cache to commit the stores placed in the store buffer during the transaction to the cache and, upon receiving a PASS signal from the cache when the stores have been committed, resuming execution of program code following the transaction; otherwise, receiving a PASS signal from an internal mechanism in the processor, wherein the PASS signal is generated in the internal mechanism in the processor without signaling the cache, and resuming execution of program code following the transaction; whereby a resource usage to commit the stores is avoided if no stores have been placed in the store buffer during the transaction.