Patent ID: 7908603

Claim:
A computing system comprising: one or more processing elements, at least one of which is a floating point processing element; a memory having a first interface for connecting to a host processor and a second interface, the memory being divided into a plurality of logical partitions, with at least one partition that contains information regarding the state of the task; and a multi-task controller (MTC) that includes a scheduler unit, a data flow unit, an executive unit, and a resource manager unit, each unit coupled to the other units, wherein the data flow unit is configured to transfer data between the second interface of the memory and one of either the scheduler unit, the executive unit, or resource manager unit, wherein the scheduler unit is coupled to the second interface of the memory and to the processing elements, the data flow unit is coupled to the second interface of the memory, and the resource manager unit is coupled to the one or more processing elements, wherein the resource manager unit is configured to find an available processing element for carrying out a function of a task and to assign a processing element to a current task by providing a linkage between said available processing element and the task, wherein the scheduler unit is configured to select a task as the current task, to obtain the state of the current task, and select an assigned processing element to carry out a function of the current task, wherein the executive unit is configured to decode instructions relating to a task and request the resource manager to load information into a processing element to carry out a function of a task; and wherein the number of processing elements and number of tasks are independent of each other.