Patent ID: 7627732

Claim:
A design structure tangibly embodied in a machine readable medium, the design structure comprising: a memory system comprising: a memory controller; a memory bus terminator; a high speed memory bus that interconnects the memory controller, the memory bus terminator, and at least one memory module, wherein the high speed memory bus comprises at least one high speed bus contact fabricated in direct contact with a conductive pathway of the high speed memory bus on the memory module; and the at least one memory module, the memory module comprising: at least one memory hub device, the memory hub device comprising an integrated circuit that includes at least one data communications circuit and a die pad, the data communications circuit connected to the memory bus through the die pad and the high speed bus contact; high speed random access memory served by the memory hub device; two bus signal ports; and a segment of the high speed memory bus fabricated on the memory module so as to interconnect the bus signal ports and the memory hub device, the high speed memory bus connected to the memory hub device by a negligible electrical stub, the negligible electrical stub comprising the high speed bus contact positioned in alignment on a central axis through the die pad and the data communications circuit, the high speed bus contact connected directly to the die pad with no intervening conductive pathway.