Patent ID: 7512204

Claim:
A line card associated with a network device, the line card comprising: a first phase-locked loop (PLL) associated with a line card link, the first PLL having dynamically reconfigurable parameters; a second PLL associated with the line card link, the second PLL connected to the output of the first PLL; a data handler connected to the output of the second PLL, the data handler configured to process data received at the line card link using clocking information provided by the first and second PLLs; a control block configured to output a change factor for reconfiguring the first PLL and a correction signal generated using control signal; and, a correction block configured to generate a recovered data signal using the data handler output and correction signals from the second PLL and from the control block; wherein the reconfigurable parameters are dynamically adjustable without affecting operation of other links associated with the line card.