Patent ID: 8232585

Claim:
A transistor, comprising: a semiconductor substrate comprising a source region and a drain region; a doped channel region formed in the semiconductor substrate between the source region and the drain region, the channel region configured to pass current between the source region and the drain region; and a gate comprising a first semiconductor material formed over the channel region, a second semiconductor material formed over the first semiconductor material, a third semiconductor material formed over the second semiconductor material, and at least one protective material formed on a surface of the second semiconductor material and configured to inhibit the migration of a dopant into the second semiconductor material, wherein the at least one protective material comprises a first protective material located between the first semiconductor material and the second semiconductor material, and a second protective material located between the second semiconductor material and the third semiconductor material; wherein the first semiconductor material is the same dopant type as the channel region, the second semiconductor material is intrinsic, and the third semiconductor material is the opposite dopant type as the channel region.