Patent ID: 7596781

Claim:
A method of facilitating emulation of a target instruction stream, the method comprising: selectively optimizing at least one instruction of a frequently executed sequence of target instructions prior to translation of the frequently executed sequence of target instructions to a sequence of host instructions directly executable by a host computing environment, the selectively optimizing comprising for the at least one instruction: (i) confirming that at least one register of the host computing environment is a read-only register for instructions of the frequently executed sequence of target instructions; (ii) confirming that each register of the at least one register has been detected to have a constant value for the at least one instruction in multiple prior iterations of the frequently executed sequence of target instructions; and (iii) responsive to the confirming (i) and the confirming (ii), optimizing the at least one instruction by replacing the at least one instruction with at least one immediate form instruction having at least one constant value obtained from the at least one register encoded directly therein, wherein the selectively optimizing results in an optimized sequence of target instructions.