Patent ID: 8110858

Claim:
A thin film transistor array, comprising: thin film transistors, each of the thin film transistors comprising: an insulating substrate; a gate electrode on the insulating substrate; a gate insulator; a source electrode and drain electrode; and a semiconductor layer between the source electrode and the drain electrode, wherein the gate electrode overlaps the source electrode and the drain electrode through the gate insulator, wherein the drain electrode is connected to a pixel electrode, wherein the pixel electrode overlaps a capacitor electrode through an insulating layer, wherein the thin film transistors are arranged as a matrix-shaped using a plurality of gate wires connected to a plurality of the gate electrodes and a plurality of source wires connected to a plurality of the source electrodes, wherein the semiconductor layer is stripe-shaped and is parallel to the source wire in plane view and is extending over a plurality of the transistors connecting to one of the source wires, wherein the semiconductor layer is not formed above the source wire in the plane view and wherein the gate insulator being between a first group including the source wire, the source electrode, the drain electrode, the pixel electrode and the semiconductor layer, and a second group including the gate wire, the gate electrode, a capacitor wire and the capacitor electrode.