Patent ID: 8759174

Claim:
A method of fabricating a device comprising a first transistor and a second transistor, and comprising active regions, the method comprising: forming a first silicon oxide layer within a first region of said device and a second silicon oxide layer within a second region of said device; implanting doping ions of a first type into said first region such that ions are implanted into said first silicon oxide layer and not into said second silicon oxide layer; implanting doping ions of a second type into said second region such that ions are implanted into said second silicon oxide layer and not into said first silicon oxide layer, wherein said steps of implanting doping ions of said first and second types form active regions of said device; and simultaneously etching said first and second silicon oxide layers for a determined duration, wherein a first etch rate of the first silicon oxide layer being greater than a second etch rate of the second silicon oxide layer causes said first silicon oxide layer to be completely removed and at least a part of said second silicon oxide layer on a gate electrode of the second transistor to remain.