Patent ID: 8705577

Claim:
A method for determining one-way latency between a first computer node (A) having a first clock and a second computer node (B) having a second clock, comprising: pre-synchronizing said first clock of said first computer node (A) with said second clock of said second computer node (B), said pre-synchronizing further comprising obtaining a first clock difference value and a first absolute clock value; measuring a sending time and a receiving time associated with each measurement message within a plurality of measurement messages; post-synchronizing said first clock of said first computer node (A) with said second clock of said second computer node (B), said post-synchronizing further comprising obtaining a second clock difference value and a second absolute clock value; interpolating, comprising adjusting the sending time associated with each measurement message, said adjusting based on the sending time, the said first and second clock difference values, and the said first and second absolute clock values, further wherein said adjusting comprises calculating a ratebias as ratebias=(CDIFF1-CDIFF0)/(CABS1-CABS0), wherein CDIFF1 is the second clock difference value, CDIFF0 is the first clock difference value, CABS1 is the second absolute clock value, and CABS0 is the first absolute clock value, calculating the one-way latency associated with a measurement message in the data network between said first computer node (A) and said second computer node (B) as the difference between the receiving time associated with the measurement message, and the adjusted sending time associated with the measurement message; and generating a latency profile.