Patent ID: 8749272

Claim:
Apparatus comprising: at least one resistive voltage divider; and at least two inverters; wherein the resistive voltage divider is coupled between a first supply potential terminal (VDD) and a second supply potential terminal (VSS), wherein the voltage divider comprises a first resistor, a second resistor, a third resistor and a fourth resistor being serially connected, and wherein a first connection point of the second resistor and the third resistor is connected to a voltage input, and a second connection point of the first resistor and the second resistor is connected to the input side of a first inverter, and a third connection point of the third resistor and the fourth resistor is connected to the input side of a second inverter, wherein the first inverter and the second inverter are configured to provide a first output logic state if a first voltage is applied to the voltage input, and the first inverter and the second inverter are configured to provide a second output logic state if a second voltage is applied to the voltage input, and the first inverter is configured to provide the second output logic state and the second inverter is configured to provide the first output logic state if an open input is applied to the voltage input.