Patent ID: 6856516

Claim:
A resistor and capacitor network comprising: a) a core of dielectric material having a top, a bottom and four side surfaces having side surface interface edges; b) a first set of spaced apart electrode plates located within the core; c) a second set of spaced apart electrode plates located within the core, each of the first and second electrode plates being separated by a portion of the core, the first and second set of electrode plates arranged in an alternating manner within the core, the first and second set of electrode plates and core forming a plurality of capacitors within the core; d) a first terminal extending from the first set of electrodes toward the top surface; e) a second terminal extending from at least one of the second set of electrodes toward the top surface; f) a third terminal extending from the first set of electrodes toward the bottom surface; g) a fourth terminal extending from the second set of electrodes toward the bottom surface; h) a first buss bar located on the top surface and electrically connected between the first terminals i) a second buss bar located on the bottom surface and electrically connected between the third terminals; j) a third buss bar located on the bottom surface and electrically connected between the fourth terminals; k) a plurality of ball pads located on the top surface; l) a plurality of resistors formed on the top surface, the resistors connected between the ball pads and the first buss bar; and m) a plurality of conductive bumps attached to the ball pads.