Patent ID: 7737542

Claim:
A stackable semiconductor package comprising: a substrate comprising a first side surface including a plurality of first pads, wherein the first pads are aligned in a plurality of rows, each of the first pads is a lateral distance “a” from immediately adjacent ones of said first pads; a semiconductor die; an encapsulant covering the semiconductor die and a portion of the first side surface of the substrate, wherein the encapsulant has substantially vertical sidewalls extending a vertical distance “d” from the first side surface of the substrate, all of the first pads are external to the encapsulant, and each of the first pads that is immediately adjacent to one of the sidewalls of the encapsulant is a lateral distance “b” from the respective sidewall; and at least one solder layer having an exposed exterior surface portion that faces in a same direction as the first side surface of the substrate and extends a maximum vertical distance “c” from the first side surface of the substrate, and wherein a>b and c<d.