Patent ID: 6998339

Claim:
A method of forming a conductor wiring pattern, comprising: forming a first insulating layer on a surface of a substrate and forming a second, photosensitive insulating resin layer thereon; light-exposing and developing the second insulating layer to form pattern grooves, each having sidewalls and a bottom, so that the first insulating layer is exposed at the bottom of each pattern groove; forming a plating seed layer on the second insulating layer including inner surfaces of the pattern grooves and then forming a resist pattern on the plating seed layer except for portions of the pattern grooves of the second insulating layer so that the plating seed layer only on the sidewalls and the bottom of the pattern groove is exposed; filling the pattern grooves with a conductor having an upper surface by an electrolytic plating using the plating seed layer as a power supply layer; coating the upper surface of the conductor with a barrier layer; and removing the resist pattern and also removing by etching the plating seed layer exposed on the surface of the second insulating layer to form a wiring pattern consisting of the conductor remaining in the pattern grooves, while the upper surface of the conductor filled in the pattern grooves is protected by the barrier layer.