Patent ID: 8716717

Claim:
A semiconductor device comprising: an active region formed in a surface of a semiconductor layer having a first conductive type; and a plurality of electric field relief layers that are defined by impurity regions having a second conductive type, said plurality of electric field relief layers being arranged from a peripheral portion of said active region toward the outside so as to surround said active region, wherein said plurality of electric field relief layers are configured such that an impurity implantation amount decreases from said active region side toward the outside, said plurality of electric field relief layers include: a first electric field relief layer whose entire region is implanted with an impurity having the second conductive type at a first surface density; a second electric field relief layer whose entire region is implanted with an impurity having the second conductive type at a second surface density; and a third electric field relief layer configured with a plurality of first small regions and a plurality of second small regions being alternately arranged, said first small region having a width in a plane direction smaller than that of said first electric field relief layer, said first small region being implanted with an impurity having the second conductive type at said first surface density, said second small region having a width in the plane direction smaller than that of said second electric field relief layer, said second small region being implanted with an impurity having the second conductive type at said second surface density, said third electric field relief layer is arranged between said first electric field relief layer and said second electric field relief layer with respect to the plane direction, and the average surface density of said third electric field relief layer takes a value between said first surface density and said second surface density.