Patent ID: 7263431

Claim:
An analog input signal processing circuit for inputting to a microprocessor a signal related to a signal voltage of a variable analog signal source: the analog input signal processing circuit comprising a switched capacitor filter circuit, a gain adjustment circuit, and a data conversion circuit; and in which a non-volatile program memory that cooperates with said microprocessor includes a program acting as a control pulse train generator; wherein said microprocessor is arranged so as to provide a common control signal pulse train to said switched capacitor filter circuit and gain adjustment circuit with said control pulse train generator; said switched capacitor filter circuit includes a switching element of which switching is controlled with a control signal pulse train commanded from said microprocessor, and a charge/discharge capacitor; and of which filter characteristics are variably-controlled in response to a pulse frequency of said control signal pulse train; said gain adjustment circuit, being commanded from said microprocessor, makes the switching control of an amplification factor adjustment switching element of which switching is controlled with said control signal pulse train, and variably controls of an amplification factor with respect to an input signal voltage in response to a pulse duty, defined as an ON time period/period or OFF time period/period of said control signal pulse train; said data conversion circuit converts a detection current value responsive to a signal voltage of a variable analog signal source, which is obtained via said switched capacitor filter circuit and gain adjustment circuit, to a digital logic signal to input it to said microprocessor, and writes it in a RAM memory acting as a detection data memory via said microprocessor; said control pulse train generator is formed of: a first setting means for changing and setting a pulse period; a second setting means for changing and setting a pulse duty; pulse width operation setting means for calculating and setting a product of a pulse period and a pulse duty having been changed and set by said first setting means and second setting means; interrupt counting means for counting the number of times of fixed-time interrupts; a flag output generator in which flag is set when a counter current value of said interrupt counting means has reached a set value calculated by said pulse width operation setting means; and reset means for initializing said counter current value to reset a flag output when a counter current value of said interrupt counting means has reached a pulse period that is variably-set by said first setting means; and a flag output from said flag output generator is said control signal pulse train.