Patent ID: 7732874

Claim:
A semiconductor structure comprising: a first finFET including a first semiconductor fin located over a substrate, a first gate dielectric located upon the first semiconductor fin and a first gate electrode located to straddle the first semiconductor fin and to provide a first channel region beneath the first gate electrode that separates a plurality of source and drain regions within the first semiconductor fin; and a second finFET including a second semiconductor fin located over the substrate, a second gate dielectric located upon the second semiconductor fin and a second gate electrode located to straddle the second semiconductor fin and to provide a second channel region beneath the second gate electrode that separates a plurality of source and drain regions within the second semiconductor fin, wherein each of the first finFET and the second finFET comprises an n-finFET and one of the first gate dielectric or the second gate dielectric is located on the sidewalls and atop its corresponding semiconductor fin, while the other of the first gate dielectric or the second gate dielectric is located only on the sidewalls of its corresponding semiconductor fin and where at least either: the first gate dielectric and the second gate dielectric comprise different gate dielectric materials; or the first gate electrode and the second gate electrode comprise different gate electrode materials.