Patent ID: 7365604

Claim:
An amplifier circuit for amplifying an input signal, comprising: an amplifying transistor circuit having a power transistor; and a dc bias circuit having a plurality of current mirror circuits, comprising: a current source configured to provide bias current; an output terminal node coupled to a control terminal node of the power transistor via the first resistor; a first pair of mirror transistors having a first transistor and a second transistor, wherein an emitter node of the first transistor is coupled to a collector node and a base node of the third transistor and an emitter node of the second transistor is coupled to a collector node of the fourth transistor to provide the output terminal node; a second pair of mirror transistors having a third transistor and a fourth transistor wherein the current source is coupled to a collector node and a base node of the first transistor; and a discharge transistor wherein the discharge transistor and the power transistor form a combined current mirror.