Patent ID: 8525249

Claim:
A semiconductor memory device, comprising: a semiconductor substrate including a first region and a second region located adjacent to the first region, the first region including a first active area sectionalized by a first element isolation area extending to a first direction, the second region including second active areas sectionalized by second element isolation areas extending to the first direction; first and second word lines extending from the first region to the second region and connecting to memory cells, said first and second word lines located parallel to each other and extending to a second direction perpendicular to the first direction a first insulating film provided between the first and second word lines and directly contacting to one side of the first word line and contacting to one side of the second word line, and the first insulating film including a void; and first and second contacts provided respectively corresponding to the first and second word lines in the second region, wherein a first bottom portion of the void on one of the second active areas is higher than a second bottom portion of the void on the second element isolation area.