Patent ID: 7786562

Claim:
An electronic module comprising: a plurality of semiconductor chip layers, wherein at least one of the plurality of semiconductor chip layers includes a semiconductor substrate having a first surface and a second surface; electronic circuitry comprising a plurality of circuit elements defined on the first surface during a predetermined series of semiconductor process steps using a predetermined reticle set; a trench having an interior surface between at least one of the plurality of circuit elements and the second surface, wherein the trench is defined concurrently with the electronic circuitry during the predetermined series of semiconductor process steps using the predetermined reticle set; a dielectric material located on the interior surface; an electrically conductive material located on the dielectric material; an electrically conductive via defined by removing a predetermined portion of the second surface to expose the electrically conductive material, wherein the plurality of semiconductor chip layers are stacked and bonded to form a module, and wherein the electrically conductive via electrically couples the electronic circuitry of the at least one of the plurality of semiconductor chip layers to the electronic circuitry of at least one other of the plurality of semiconductor chip layers in the electronic module; and an element disposed between at least two of the plurality of semiconductor chip layers and configured to provide thermal management for at least one of the plurality of semiconductor chip layers.