Patent ID: 7870343

Claim:
A method of simplifying and speeding the management of intra-node cache coherence in a message passing parallel supercomputer comprising a multitude of nodes, each of the nodes including first and second non-coherent processor elements, a first cache memory area for the first processor element of the node, a second cache memory area for the second processor element of the node, and a shared memory area shared by and accessed by the first and second processor elements of the node, the method comprising the steps: starting and ending a communication phase during which messages are sent between the nodes, and wherein during the communications phase, at least one of the nodes sends messages to and receives messages from others of the nodes; during the communications phase, achieving intra-node cache coherence on said one of the nodes whereby each of the cache areas of the first and second processor elements of said one of the nodes contains a copy of data in the shared memory shared by said first and second processor elements of said one of the nodes, including during a first period of time during said communications phase, writing data from the cache memory of the first processor element of said one of the nodes into the shared memory area of said one of the nodes while preventing the first processor of said one of the nodes from using the data in the cache memory of the first processor element of said one of the nodes; preventing said one of the nodes from sending messages to and receiving messages from said others of the nodes during the communication phase until said intra-node cache coherence has been achieved on said one of the nodes; wherein the communication phase is part of a put/get window consisting of a computation phase followed by the communication phase; in the communication phase, the nodes exchange data produced by the computation phase; and in the communication phase, each node scatters locally produced work items to other nodes, while assembling remotely produced work items into the memory of said each node.