Patent ID: 7310012

Claim:
A voltage level shifter apparatus for receiving an input data signal and outputting an output data signal with different levels accordingly, comprising: a first dynamic-bias generator for outputting a first bias signal, herein the first dynamic-bias generator further dynamically determines a level of the first bias signal in accordance with an in-phase signal of the input data signal and an out-of-phase signal of the input data signal, including: a first transistor, having its gate end receive the in-phase signal of the input data signal, and its first source/drain end grounded; a second transistor, having its gate end coupled to the gate end of the first transistor, its first source/drain end coupled to the second source/drain end of the first transistor, and its second source/drain end receive the out-of-phase signal of the input data signal; a third transistor, having its gate end coupled to the gate end of the second transistor, and its first source/drain end coupled to the first source/drain end of the second transistor, wherein the first source/drain end of the third transistor provides the first bias signal; a first capacitor, having its first end receive the out-of-phase signal of the input data signal and coupled to the second source/drain end of the second transistor, and its second end coupled to the second source/drain end of the third transistor; and a fourth transistor, having its gate end coupled to the first end of the first capacitor, its first source/drain end coupled to the second end of the capacitor, and its second source/drain end coupled to a first preset potential; wherein the doping type of the first transistor is different from that of the second transistor, the third transistor, and the fourth transistor; a second dynamic-bias generator for outputting a second bias signal, wherein the second dynamic-bias generator further dynamically determines a level of the second bias signal in accordance with the in-phase signal of the input data signal and the out-of-phase signal of the input data signal; and a level supply circuit coupled to the first dynamic-bias generator and the second dynamic-bias generator, for receiving the input data signal and generating the output data signal in accordance with the first bias signal and the second bias signal.