Patent ID: 7759736

Claim:
An oxide interface comprising: a transparent substrate; a silicon layer overlying the substrate; overlying the silicon layer, a deposition oxide layer with a refractive index of 1.46; a diffusion barrier overlying the substrate and underlying the silicon layer; a gate electrode overlying the oxide layer; wherein the silicon layer includes channel, source, and drain regions; and, wherein the oxide layer has: a fixed oxide charge density (N f ) of 1.8×10 11 per square centimeter (/cm 2 ); an interface trap concentration of 1.2×10 10 per square centimeter-electron volt (/cm 2 eV); a flat band voltage shift (V FB ) of −0.8 volts (V); a leakage current density (J) of 2.6×10 −8 amperes per square centimeter (A/cm 2 ) at an applied electric field of 2 megavolts per centimeter (MV/cm); a breakdown field strength (EBD) of 7.2 MV/cm; an electric field strength (E) of 6.4 MV/cm associated with a J of 1×10 −8 A/cm 2 ; and, a bias temperature shift (BTS) of less than 1V under dual bias (±2 MV/cm) temperature stress at 150° C.