Patent ID: 7313705

Claim:
A computer system, comprising: a central processing unit; system memory, coupled to the central processing unit by way of a memory bus, the system memory comprising non-volatile program memory and random access memory, the program memory storing program instructions corresponding to a bootloader sequence comprising an authentication process for authenticating program code blocks; and security logic, coupled to the central processing unit and to the non-volatile program memory, and comprising: a security key store, for storing a security key used in the authentication process; a read protect register, for selectively preventing read access of the security key store; at least one write protect register for storing a memory address range corresponding to an authenticated program code block; a shadow memory; and security control logic, for comparing address values on the memory bus to the contents of the at least one write protect register, and for denying write access to system memory at memory addresses within the memory address range stored by the at least one write protect register; wherein the security control logic enables access to the shadow memory responsive to a memory address value of a program instruction being within the memory address range stored in the at least one write protect register.