Patent ID: 8401073

Claim:
An inverse quantization circuit that adaptively handles performance of inverse quantization for plural encoding systems by selectively performing operations depending on a present encoding system from among the plural encoding systems, said inverse quantization circuit comprising: a first multiplier generation unit that generates a first multiplier, wherein the first multiplier generation unit determines the first multiplier or a way of generating the first multiplier depending on the present encoding system; a second multiplier generation unit that generates a second multiplier, wherein the second multiplier generation unit determines the second multiplier or a way of generating the second multiplier depending on the present encoding system; a shift quantity generation unit that generates shift quantity data indicating a bit shift quantity; a multiplication unit that determines whether or not to perform a multiplication operation depending on the present encoding system, and when determined affirmatively, performs the multiplication operation which comprises multiplying quantized coefficient data by the first multiplier generated by the first multiplier generation unit and the second multiplier generated by the second multiplier generation unit, wherein the quantized coefficient data is a result of quantization of a coefficient value for each frequency obtained by transforming image data based on an encoding system; a shift unit that determines whether or not to perform a bit shift operation depending on the present encoding system, and when determined affirmatively, performs the bit shift operation to the data outputted from the multiplication unit according to the shift quantity data generated by the shift quantity generation unit; an addend generation unit that generates an addend, wherein the addend generation unit determines the addend or a way of generating the addend depending on the present encoding system; and an addition unit that determines whether or not to perform an addition operation depending on the present encoding system, and when determined affirmatively, performs the addition operation which comprises adding the addend generated by the addend generation unit to the data outputted from the multiplication unit, wherein the shift unit performs the bit shift operation to the data outputted from the addition unit or to the data outputted from the multiplication unit depending on the present encoding system, according to the shift quantity data generated by the shift quantity generation unit.