Patent ID: 8713205

Claim:
A data transfer device comprising: one or more data transfer control units configured to control a command issuance and a data transfer separately; a command issuing unit configured to determine priorities of commands and issue the commands in an order from a higher priority; a memory communication control unit configured to carry out the data transfer, corresponding to the commands thus issued from the command issuing unit, from and to a memory; and a signal output unit configured to output a completion signal indicative of a completion of the data transfer controlled by one of the data transfer control units, in a case where the data transfer is normally completed, in response to a data transfer request, from the memory communication control unit, for the data transfer controlled by the one of the data transfer control units, wherein a data transfer control unit amongst the data transfer control units issues a request for resetting itself, the request for resetting coming after the command issuance by the data transfer control unit and prior to the data transfer by the data transfer control unit, the command issuing unit issues a pseudo command corresponding to the request for resetting and having a priority lower than a priority of commands issued by the remaining data transfer control units which have not issued a request for resetting, and wherein in a case that the request for resetting the data transfer control unit is received when the data transfer control unit has issued a read command, the signal output unit outputs a dummy completion signal to the memory communication control unit, and the memory communication control unit, in response to the dummy completion signal, discards data read from the memory in response to the read command.