Patent ID: 7096374

Claim:
Apparatus for defining an input state vector for application to circuit inputs of a digital circuit to achieve low power consumption when said digital circuit is in an idle state, said digital circuit comprising one or more circuit elements of respective circuit element types, said apparatus comprising: an idle power value source having idle power values stored therein, said idle power values including idle power values for each one of said circuit element types, said idle power values for said one of said circuit element types corresponding to different digital states of the inputs of a circuit element of said one of said circuit element types; and an idle power assessor coupled to said idle power value source, said idle power assessor operable to use said idle power values to determine, for each one of said circuit elements, digital states of the inputs of said one of said circuit elements that would set said one of said circuit elements to a lowest-allowable idle power state when said digital circuit is in said idle state, said determining accounting for logic constraints of said digital circuit, said states determined for ones of said inputs that constitute said circuit inputs defining said input state vector.