Patent ID: 7372303

Claim:
A semiconductor integrated circuit comprising: a signal line; a driver circuit which drives said signal line in accordance with an input signal; and a receiver circuit which sets an output signal at a potential of said low power supply line when a potential of said signal line is higher than a threshold value, and sets the output signal at a potential of said high power supply line when the potential of said signal line is lower than the threshold value, wherein said driver circuit includes: a first p-type transistor having a source connected with said signal line, a drain connected with a low power supply line and a gate receiving the input signal; a first n-type transistor having a source connected with said signal line, a drain connected with a high power supply line and a gate receiving the input signal; a second n-type transistor having a drain connected with said signal line and a gate receiving an inverted signal of the input signal; a second p-type transistor having a drain connected with said signal line and a gate receiving an inverted signal of the input signal; a first switch circuit interposed between a source of said second n-type transistor and said low power supply line, and turned ON when the potential of said signal line becomes higher than the threshold value of said receiver circuit, and turned OFF when the potential of said signal line becomes lower than the threshold value of said receiver circuit; and a second switch circuit interposed between a source of said second p-type transistor and said high power supply line, and turned ON when the potential of said signal line becomes lower than the threshold value of said receiver circuit, and turned OFF when the potential of said signal line becomes higher than the threshold value of said receiver circuit.