Patent ID: 8161490

Claim:
A storage apparatus having plural control processors that interpret and process a request sent from a host computer, the storage apparatus comprising: each of the control processors comprising: a respective cycle processing unit for calculating average response time for the processing in the respective control processor during a prescribed time cycle; a distribution judgment unit for judging, after a control processor receives a request sent from the host computer, whether or not to allocate processing relevant to the request from that control processor to any other control processor; and a control processor selection unit configured for selecting an allocation target control processor if the distribution judgment unit decides to allocate the processing to another control processor, wherein the control processor selection unit of a first control processor of the plural control processors is configured to allocate, in the case in which the first control processor receives the request from the host computer and the distribution judgment unit of the first control processor judges to allocate the processing relevant to the request to another control processor, the processing relevant to the request to the another of the control processors based at least in part on the average response time of the first control processor and on the average response time of the another control processor, wherein the cycle processing unit also is configured to determine a total number of requests received by the control processor and a number of allocations of processing relevant to the requests to any other of the control processors during a prescribed time cycle, wherein the distribution judgment unit is configured to judge whether or not to allocate the processing relevant to the request to another control processor based on the total number of requests received by the control processor and the number of allocations of processing relevant to the requests to any other of the control processors during the prescribed time cycle, and wherein the distribution judgment unit of the first control processor is configured to prohibit allocation of the processing to a second one of the control processors if the average response time for the processing in the second control processor exceeds a first threshold, and makes the second control processor resume accepting allocation from the first control processor if the average response time for the processing in the first control processor exceeds a second threshold.