Patent ID: 7903465

Claim:
A method of programming a single bit in a memory cell of a memory array, the method comprising: applying a first voltage to a word line, in a first set of word lines, connected to the memory cell to be programmed, wherein the memory cell is one of a plurality of memory cells organized in a matrix of rows and columns, each of the memory cells comprising: an access transistor; a floating gate memory transistor electrically connected to the access transistor; and a coupling capacitor electrically connected to the memory transistor; applying a second voltage to a word line, in a second set of word lines, connected to the memory cell to be programmed, the second voltage equal to the first voltage; grounding a bit line, in a first set of bit lines, connected to the memory cell to be programmed; applying a third voltage to a bit line, in a second set of bit lines, connected to the memory cell to be programmed, the third voltage being greater than the first voltage; grounding bit lines, in the second set of bit lines, not connected to the memory cell to be programmed; and grounding word lines, in the first set of word lines, not connected to the memory cell to be programmed.