Patent ID: 8456007

Claim:
A memory device, comprising: a memory array; a control circuit operatively coupled to the memory array; and an input/output circuit operatively coupled to the memory array, wherein at least one of the memory array, the control circuit, or the input/output circuit further comprises a via having: a layer of a titanium alloy formed to overlay walls of a contact hole, wherein the titanium alloy comprises titanium and an element selected from the group consisting of zinc, cadmium, mercury, aluminum, gallium, indium, tin, silicon, germanium, lead, arsenic and antimony, a titanium silicide contact formed in the layer of titanium alloy and having a composition that is different than the layer of titanium alloy, the titanium silicide contact being directly coupled to the layer of titanium alloy, and a fill coupled to the layer of titanium alloy, the fill comprising a metal selected from the group consisting of tungsten and aluminum.