Patent ID: 8890498

Claim:
A driving circuit comprising: a field-effect transistor (FET) configured to switch an input voltage; a switching element configured to drive the FET, the switch element being connected to a gate terminal of the FET; a capacitor configured to store a voltage applied between the gate terminal of the FET and a source terminal of the FET during an on-period of the FET; and a rectification element that connects to the capacitor, wherein one terminal of the rectification element is connected to the source terminal of the FET, another terminal of the rectification element is connected to one terminal of the capacitor, and another terminal of the capacitor is connected to the gate terminal of the FET, wherein the voltage stored in the capacitor is supplied to the switch element during an off-period of the FET, wherein the FET includes an N-channel FET, and the switch element includes a PNP transistor, wherein a gate terminal of the N-channel FET is connected to an emitter terminal of the PNP transistor, a source terminal of the N-channel FET is connected to a collector terminal of the PNP transistor and a cathode terminal of the diode, the capacitor is connected to an anode terminal of the diode and the gate terminal of the N-channel FET, and a base terminal of the PNP transistor is connected to a connection point between the anode terminal of the diode and the capacitor, and wherein, during an on-period of the N-channel FET, the capacitor is charged with a voltage applied between the gate and source terminals of the N-channel FET, and during an off-period of the N-channel FET, the capacitor supplies a base current to the PNP transistor.