Patent ID: 6943583

Claim:
A programmable device having programmable input/output (I/O) circuitry and programmable logic connected to receive incoming signals from and provide outgoing signals to the I/O circuitry, the programmable device comprising: a first pad; and a programmable I/O circuit (PIC) associated with the first pad, wherein the PIC comprises: a first output buffer adapted to present a first outgoing signal at the first pad; and a first transmission gate connected between the first pad and the first output buffer, wherein: the first transmission gate is adapted to be closed when the first output buffer is selected to present the first outgoing signal at the first pad; and the first transmission gate is adapted to be open when the first output buffer is selected not to present the first outgoing signal at the first pad, wherein capacitive loading at the first pad due to the first output buffer is lower when the first transmission gate is open than when the first transmission gate is closed.