Patent ID: 7414283

Claim:
A nonvolatile memory device comprising: a voltage generator which generates a first voltage and a second voltage; a first circuit and a second circuit; a nonvolatile memory cell having a first gate and a second gate; and a logic circuit having a MOS transistor, wherein said first circuit is coupled with said first gate of said nonvolatile memory cell, wherein said second circuit is coupled with said second gate of said nonvolatile memory cell, wherein said voltage generator supplies said first voltage to said first circuit and said second voltage to said second circuit, wherein a gate withstand voltage of said first circuit is lower than a gate withstand voltage of said second circuit, wherein said nonvolatile memory cell has a charge storage region between said second gate and a channel region, wherein said first circuit is arranged on a first side of said nonvolatile memory cell, wherein said second circuit is arranged on a second side, which is opposite side to said first side, of said nonvolatile memory cell, and wherein a gate withstand voltage of said MOS transistor in said logic circuit is lower than the gate withstand voltage of said second circuit.