Patent ID: 8626972

Claim:
An I2C (Inter Integrated Circuit) multi-slot circuit system comprising: a plurality of I2C slots for receiving a plurality of slaves; a CPU configured for determining an address of one of the I2C slots to which to-be-transmitted data will be transmitted, and generating a first logic control signal according to the determined address, and being further configured for converting the to-be-transmitted data into an I2C signal; a logic control unit connected to the CPU via a logic data line and each of the I2C slots via signal lines, the logic control unit being configured for receiving the first logic control signal and generating an enabling signal to enable the one of the I2C slots to which the to-be-transmitted data will be transmitted, in response to the first logic control signal; and an I2C switch unit connected to the CPU via a first I2C bus and each of the I2C slots via second I2C buses, the I2C switch unit configured for receiving and transmitting the I2C signal to the enabled I2C slot.