Patent ID: 7761780

Claim:
An apparatus for protecting a memory, comprising: a parity generator that generates a parity of first data to be written to the memory; a parity adder that obtains a second data by adding the parity to the first data; an access-key register that holds an access key unique to a source of request for writing data to the memory or for reading data from the memory, the access key being set by the source of request and being used for accessing the memory; a first operating unit that obtains a third data by calculating an XOR between the second data and the access key, the access key being set in the access-key register by the source of request for writing data to the memory; a writing unit that writes the third data to the memory; a second operating unit that obtains a fourth data by calculating an XOR between the access key and the third data, the access key being set in the access-key register by the source of request for reading data from the memory; a syndrome calculator that calculates a syndrome from the third data; and a determining unit that determines whether to output the third data as the first data, based on calculated syndrome.