Patent ID: 8477524

Claim:
A nonvolatile memory device including a memory cell array having a plurality of stacked memory layers and a rectifier configured to select memory cells constituting each memory layer sharing one of a word line and a bit line, but not both, with another adjacent memory layer, the nonvolatile memory device comprising: a word line driving unit configured to drive a first word line, connected to a first memory cell of a first memory layer to be read, at a first voltage level and drive a second word line, connected to a second memory cell of a second memory layer sharing a first bit line connected to the first memory cell, at a second voltage level; and a bit line biasing unit configured to bias the first bit line at the second voltage level and bias a second bit line, connected to a third memory cell of a third memory layer sharing the first word line, at the first voltage level, wherein the first and second word lines have a first direction, the first and second bit lines have a second direction intersecting the first direction, and the memory layers are stacked along a third direction intersecting the first and second directions.