Patent ID: 8872865

Claim:
A pixel driving circuit, comprising: a first pixel, comprising a first main region and a first sub region, wherein the first main region is coupled to a first data line and a scan line, the first sub region is coupled to a second data line and the scan line, and each of the first main region and the first sub region stores a gray level voltage corresponding to first digital data; a second pixel, comprising a second main region and a second sub region, wherein the second sub region is coupled to a third data line and the scan line, the second main region is coupled to a fourth data line and the scan line, and each of the second main region and the second sub region stores a gray level voltage corresponding to second digital data; and a data driving circuit, comprising: a first digital-to-analog converter, for converting the first digital data or the second digital data to a first gray level voltage according to a positive main region gamma voltage; a second digital-to-analog converter, for converting the first digital data or the second digital data to a second gray level voltage according to a positive sub region gamma voltage; a third digital-to-analog converter, for converting the first digital data or the second digital data to a third gray level voltage according to a negative sub region gamma voltage; a fourth digital-to-analog converter, for converting the first digital data or the second digital data to a fourth gray level voltage according to a negative main region gamma voltage; a first selecting circuit, for simultaneously distributing the first digital data and the second digital data according to a gamma voltage selecting signal and a polarity signal such that the first digital data is inputted into two digital-to-analog converters of the first, the second, the third and the fourth digital-to-analog converters while the second digital data is inputted into the other two digital-to-analog converters of the first, the second, the third and the fourth digital-to-analog converters; and a second selecting circuit, for distributing the first, the second, the third and the fourth gray level voltages to the first main region, the second main region, the first sub region and the second sub region via the first, the second, the third and the fourth data lines, according to the gamma voltage selecting signal and the polarity signal.