Patent ID: 8209571

Claim:
A valid-transmission verifying circuit that provides data to an output circuit in correspondence with reference data, comprising: a data receiving terminal receiving the reference data; a valid-transmission verifier including a reference load unit configured to sample the reference data, the data sampling operation is interrupted in response to a sampling control signal to determine whether the data sampling operation has been performed within a sampling time; and a selection switch providing the reference data to one of the output circuit and the valid-transmission verifier in response to a mode selection signal, wherein the valid-transmission verifier comprises: a sampling circuit including the reference load unit and conducting the data sampling operation for the reference data, wherein the reference data is provided from the selection switch in response to the sampling control signal; a latch circuit holding the reference data sampled by the sampling circuit; and a monitoring circuit outputting the reference data from the latch circuit in response to a result confirmation signal.