Patent ID: 8916473

Claim:
A method for preparing a base silicon wafer for constructing an assembly comprising at least two integrated circuit chips at least one of which is from the base silicon wafer, said method comprising: a) providing the base silicon wafer having front and back sides, wherein the front side comprises integrated circuits disposed thereon and wherein the base silicon wafer comprises at least one conductive via comprising conductive metal; b) affixing the front side of the base silicon wafer having integrated circuits thereon to a carrier; c) contacting the back side of the base silicon wafer with a polishing pad and a CMP slurry, said CMP slurry comprising: 1) a liquid carrier; 2) hydrogen peroxide at a level of 0.02 weight percent to less than 0.50 weight percent; 3) an abrasive; and 4) at least one chelating agent selected from the group consisting of glycine, alanine, asparagine, aspartic acid, cysteine, glutamic acid, glutamine, proline, serine, tyrosine, arginine, histidine ethylenediamine tetraacetic acid, alkane amine: and d) polishing the backside of the base silicon wafer until at least one conductive via is exposed or further exposed, wherein silicon on the base silicon wafer is polished using the CMP slurry at a removal rate of at least 5,000 angstroms per minute at 6 psi or less of down-force; and ratio of removal rates of the silicon and the conductive metal ranging from 2:1 to 0.5:1.