Patent ID: 8285907

Claim:
A first device operable as a virtual Peripheral Component Interconnect-Express (PCIe) to Advanced Switching (AS) Bridge having an upstream port and N downstream ports, the first device comprising: a first interface operatively coupled to a PCIe fabric to pass communication between the PCIe fabric and the first device; a second interface operatively coupled to an Advanced Switching Interconnect (ASI) fabric to pass communication between the first device and the ASI fabric; an Advanced Switching Configuration Space (ASCP) comprising information related to the device; a downstream tunneling processor to receive a first packet from the PCIe fabric through the first interface; encapsulate the received packet by associating one of N downstream ports with an AS path routing header of the received packet assembled, at least in part, using information in the ASCP, and transmit the encapsulated first packet from the PCIe fabric to the AS fabric through the second interface; and an upstream tunneling processor to receive a second packet from the AS fabric through the second interface, associate an AS path routing information in a header of the received second packet with one of N downstream ports assembled, at least in part, using information in the ASCP, and transmit the processed second packet from the AS fabric to the PCIe fabric through the first interface.