Patent ID: 7389092

Claim:
An integrated circuit device operable to perform an iterative processing method, said device comprising: means for injecting a series of predetermined digital values; means for storing new digital values resulting from said injection of digital values, said stored new digital values constituting a stored topographical number matrix in which two, or more, rows accommodate each of a plurality of trials of each of a plurality of iterative steps and wherein each iterative step introduces a number probe which causes a relative displacement between two rows, each of which contains column information, to afford an opportunity to match the stored entry values in two appropriate columns by a digital number comparator, wherein the polarity and magnitude of a next iterative probe are determined to control a next iterative result and the algebraic sum of said probes values provides an accurate estimate of the polarity and magnitude of the noise portion of each separate iterative signal-to-noise sample thereby allowing the noise to be subtracted from the delayed signal-plus-noise input to yield an enhanced signal with reduced noise, and wherein further each frame of signal information is enhanced by several iterative steps that reduce the noise by providing the device with the information such that each iteration results in a noise value that is either closer to, or further from, a topocentric or zero reference of an array consisting of two, or more, rows, wherein one of the rows is displaced, or shifted, in column location by an amount corresponding to a dispersion amount (difference) between a noise average of a sextet or octet that provides the information from an antenna and the average of a similar entry that is closest to the noise average by comparing values in appropriate columns so that information regarding polarity and magnitude is derived with respect to each of a succession of iterative probes.