Patent ID: 8044676

Claim:
A method of testing an integrated circuit in the field comprising: forming a quiescent supply current (IDDQ) test circuit; coupling the IDDQ test circuit to a testable portion of the integrated circuit; scheduling the IDDQ test circuit to test the testable portion of the integrated circuit by selectively interrupting normal operation of the integrated circuit in the field; and testing the testable portion of the integrated circuit by the IDDQ test circuit after selectively interrupting normal operation of the integrated circuit in the field by turning off a clock of the testable portion of the integrated circuit, disconnecting the testable portion of the integrated circuit from a supply voltage, measuring a discharge time of a buffer capacitor, and comparing the discharge time of the buffer capacitor with a threshold that was determined from a measurement of the testable portion of the integrated circuit during manufacturing of the integrated circuit and stored individually for the integrated circuit.