Patent ID: 7791514

Claim:
A digital-to-analog converter comprising: a constant current cell group including a plurality of constant current cells for feeding constant currents which are substantially identical to each other; a switch group including a plurality of switches, each of which is provided correspondingly to different one of said plurality of constant current cells and operative in response to a control signal for outputting a current passing through the corresponding constant current cell to a first node or a second node; a switch controller for decoding an input digital signal to produce the control signal; and a current-to-voltage converter for converting the currents passing through said first and second nodes to a corresponding analog voltage to output the voltage, said plurality of constant current cells including a first plurality of MOS (Metal-Oxide Semiconductor) transistors formed in substantially identical configuration and arranged in a matrix array, said constant current cell group further including a plurality of dummy transistors including a second plurality of MOS transistors formed in substantially identical configuration with said plurality of constant current cells and placed around said plurality of constant current cells, and a plurality of MOS capacitances including MOS transistors formed in substantially identical configuration with said plurality of constant current cells and placed adjacent to at least one of said plurality of dummy transistors, each of said plurality of constant current cells having a gate electrode connected to a first wiring layer to which a common bias voltage is applied, a source electrode connected to a second wiring layer to which a common power supply voltage is applied, and a drain electrode connected to corresponding one of said plurality of switches, at least one of said plurality of dummy transistors having a gate, a source and a drain electrode connected to said first wiring layer, each of said plurality of MOS capacitances having a gate electrode connected to said first wiring layer and a source and a drain electrode connected to said second wiring layer.