Patent ID: 7352639

Claim:
A method for repairing one or more shorted memory cells in a memory circuit, the method comprising the steps of: setting a signal to be applied to a selected memory cell in the memory circuit to a first value; setting a current address to a value corresponding to a current selected memory cell in the memory circuit; reading a logic state of the current selected memory cell with the signal at the first value and determining whether or not the current selected memory cell is shorted; when the current selected memory cell is determined to be shorted, initiating a repair of the shorted memory cell, and repeating the steps of reading the logic state of the current selected memory cell and determining whether or not the selected memory cell is shorted; and when the current selected memory cell is determined to be not shorted, setting the current address to a value corresponding to a new current selected memory cell which has not been previously read, and repeating the steps of reading the logic state of the current selected memory cell and determining whether or not the selected memory cell is shorted.