Patent ID: 8031141

Claim:
A scan driving circuit, comprising: a first scan driver including a plurality of first units, the first units receiving an input signal or an output voltage of a previous first unit and first and second clock signals to output a scan signal; a second scan driver having a plurality of second units, the second units receiving a plurality of scan signals output from respective ones of the first units, and at least one of the first and second clock signals, and outputting an emission control signal; each of the first units of the first scan driver comprises; a first transistor including a first terminal receiving an output voltage of a previously operated first unit or initial input signal, a gate terminal connected to a first clock terminal, and a second terminal; a second transistor including a gate terminal connected to the second terminal of the first transistor, a first terminal connected to a second clock terminal, and a second terminal connected to an output terminal for outputting the respective scan signal; a third transistor including a gate terminal connected to the first clock terminal, a first terminal connected to a first node, and a second terminal connected to a second power supply; a fourth transistor including a gate terminal connected to the second terminal of the first transistor, a first terminal connected to the first clock terminal, and a second terminal connected to the first node; and a fifth transistor including a gate terminal connected to the first node, a first terminal connected to a first power supply, and a second terminal connected to the output terminal.