Patent ID: 7724604

Claim:
A system, comprising: a voltage detection circuit; a clock detection circuit; a controller coupled to the voltage detection circuit and the clock detection circuit; a memory control state machine coupled to the controller; volatile memory coupled to the memory control state machine; a battery; and battery regulation circuitry coupled to the controller and the memory control state machine; wherein the battery, battery regulation circuitry, volatile memory, memory control state machine, controller, clock detection circuit and voltage detection circuit are all collectively included in a unitary memory module; and a power multiplexer coupled to receive a power supply of the battery and a power supply of a surrounding system and to provide a power supply to the volatile memory, the power multiplexer including: a series of two drain coupled power MOSFETs coupled between the power supply of the battery and the power supply of the volatile memory; and a series of two drain coupled power MOSFETs coupled between the power supply of the surrounding system and the power supply of the volatile memory.