Patent ID: 8583904

Claim:
A method, comprising: performing, by a processor: receiving a basis vector, a selection vector, and a control vector; selecting a basis value from the basis vector dependent upon the selection vector; and generating a result vector dependent upon the selected basis value; wherein each of the basis vector, the selection vector, the control vector, and the result vector includes a respective plurality of elements that occupy N ordered element positions, wherein the N ordered element positions include an initial element position and a last element position; wherein N is an integer greater than one; wherein selecting the basis value includes selecting the basis value from an element position of the basis vector corresponding to an element position immediately preceding an initial active element position of the selection vector, wherein the initial active element position precedes any other active element positions in the selection vector; wherein for each of the N ordered element positions, said generating comprises performing a negation operation dependent upon the control vector and the basis value.