Patent ID: 7307864

Claim:
A semiconductor integrated circuit comprising: a data fuse element which stores data in the form of a variation in its resistance according to whether it has been subjected to an electrical write operation or not, the data being read upon application of a voltage across it; at least one adjustment fuse element which has substantially the same electrical characteristics as the data fuse element and determines a data read condition for the data fuse element; a trim value adjustment circuit which is connected to the adjustment fuse element and which applies a constant voltage across the adjustment fuse element prior to reading data from the data fuse element, then reads data from the adjustment fuse element and, on the basis of the results of the read, outputs a trim value to specify the read conditions for the data fuse element; and a fuse data read circuit which is connected to the trim value adjustment circuit and the data fuse element and which applies a constant voltage across the data fuse element and then reads data from the data fuse element according to the trim value output from the trim value adjustment circuit.