Patent ID: 7821047

Claim:
A semiconductor apparatus comprising: a semiconductor substrate; an element isolation region formed in the semiconductor substrate so as to extend in a first direction; a gate electrode formed in the semiconductor substrate so as to extend in a second direction crossing the first direction and to penetrate through the element isolation region; a gate insulating film interposed between the gate electrode and the semiconductor substrate; an interlayer dielectric film formed on the gate electrode; a ferroelectric capacitor comprising: a first electrode that is disposed on the interlayer dielectric film, a second electrode that is disposed on the interlayer dielectric film, and that is separated from the first electrode, and a ferroelectric that is disposed on the interlayer dielectric film so that the first electrode, the ferroelectric and the second electrode are stacked in an order of the first direction and so that both side surfaces of the ferroelectric respectively contact the first electrode and the second electrode; a first semiconductor pillar that is in contact with the first electrode; a second semiconductor pillar that is in contact with the second electrode, the first semiconductor pillar, the second semiconductor pillar, the gate insulating film and the gate electrode forming a transistor; a second transistor that shares the first semiconductor pillar with the transistor; and a second ferroelectric capacitor that shares the first electrode with the ferroelectric capacitor.