Patent ID: 7518408

Claim:
A system to synchronize modules in an integrated circuit, the system comprising: a first latch circuit to latch and deliver data in synchronism with a first clock signal; a second latch circuit to latch data issued from the first latch circuit and to deliver data synchronized with a second clock signal; and a circuit connected to produce a first control signal from the first clock signal, comprising a strobe signal circuit including a trigger generator to deliver a trigger signal, edge triggered flip-flops controlled by the first clock signal, and a logical circuit “OR” having one input receiving the trigger signal and another input receiving an output of one of the edge triggered flip-flops, wherein the first latch circuit is controlled by the first control signal and the second latch circuit is controlled by a second control signal elaborated from the second clock signal, and wherein one of the first and second control signals is shifted by an amount corresponding at least to a set-up time of at least one of: the first latch circuit and the second latch circuit.