Patent ID: 7538573

Claim:
A dynamic output buffer circuit which matches an output impedance to a characteristic impedance of a metal line connected to an external circuit, and pre-emphasizes at least one input signal, the dynamic output buffer circuit comprising: a control circuit which matches the output impedance of the dynamic output buffer circuit to the characteristic impedance of the metal line in response to at least one output signal of the dynamic output buffer circuit, and outputs a plurality of resistor control signals which are used to pre-emphasize at least one input signal in response to the input signal; and an output circuit which controls the output impedance and pre-emphasizes the input signal in response to the resistor control signals, and which outputs the output signal, wherein the control circuit comprises: a pre-emphasis circuit which detects edges of the input signal, and outputs a pre-emphasis control signal indicating that the input signal is to be amplified for a time period relative to a rising edge and a falling edge of the input signal; an impedance matching circuit which outputs an impedance matching control signal indicating whether the output impedance of the dynamic output circuit matches the characteristic impedance of the metal line, in response to the output signal and a reference signal; and a resistor circuit which outputs the resistor control signals in response to the pre-emphasis control signal and the impedance matching control signal.