Patent ID: 7724605

Claim:
A clock-based data storage device comprising: a dual pulse generating unit which delays a clock signal to generate a delayed clock signal and then outputs a first clock signal corresponding to inversion of the clock signal and outputs a second clock signal corresponding to the clock signal by using the delayed clock signal when the clock signal shifts; a pull-up unit for outputting a pull-up output signal to an output port, based on the first clock signal outputted from the dual pulse generating unit and an input data signal which has been inputted, wherein the pull-up unit includes an output transistor to output the output signal and having a source node coupled to VCC power; a pull-down unit for outputting a pull-down output signal to the output port, based on the second clock signal outputted from the dual pulse generating unit and the input data signal which has been inputted; and a latch unit disposed between the pull-up and pull-down units and the output port so as to store at least one output signal outputted from the pull-up unit and the pull-down unit.