Patent ID: 8125804

Claim:
A circuit minimizing standby power in a power adapter with a power-frequency transformer (T 1 ), comprising: a four-terminal network, comprising a pair of input terminals (X 3 ) and (X 4 ) and a pair of output terminals (X 1 ) and (X 2 ), the input terminals (X 3 ) and (X 4 ) coupled in series to a secondary side of the power-frequency transformer (T 1 ), and the output terminals (X 1 ) and (X 2 ) connected in series to a primary side of the power-frequency transformer (T 1 ), and the four-terminal network comprising a sensing circuitry ( 1 ), a driving circuitry ( 2 ), a switching circuitry ( 3 ) and a resistive member (Z), wherein the switching circuitry ( 3 ) comprises a thyristor (VT 1 ) and a bridge rectifier (VC 2 ); wherein a positive electrode ( 7 ) of the thyristor (VT 1 ) is connected to a positive output terminal ( 9 ) of the bridge rectifier (VC 2 ); a negative electrode ( 8 ) of the thyristor (VT 1 ) is connected to a negative output terminal ( 10 ) of the bridge rectifier (VC 2 ); a gate electrode ( 6 ) of the thyristor (VT 1 ) is connected to an emitter electrode of a triode (V 2 ); AC input terminals ( 11 ) and ( 12 ) of the bridge rectifier (VC 2 ) serve as the output terminals (X 1 ) and (X 2 ) of the four-terminal network; a capacitor (C 2 ) serves as the resistive member (Z) connected between the output terminals (X 1 ) and (X 2 ).