Patent ID: 8716827

Claim:
An integrated circuit, comprising: a semiconductor substrate; a first well comprising a plurality of successively deeper first implanted regions of one conductivity type disposed in the semiconductor substrate, with a deepest one of the first implanted regions having a first range defining a first well depth at which a maximum implanted dopant concentration occurs, the first well depth being greater than or equal to an isolation depth of shallow trench isolation structures formed in the semiconductor substrate, the first well comprising a body region, and first and second head regions disposed at opposite ends of the body region; at least one second well comprising a plurality of successively deeper second implanted regions of a different conductivity type disposed in the semiconductor substrate, with a deepest one of the second implanted regions having a second range defining a second well depth at which a maximum implanted dopant concentration occurs, the second well depth being greater than or equal to the isolation depth, the second well being spaced laterally from the first well by a lateral spacing distance and facing at least one lateral side of the body region of the first well with a well-free portion of the semiconductor substrate extending laterally between the second well and the body region of the first well, the well-free portion of the semiconductor substrate having a dopant concentration lower than the second well and lower than the body region of the first well; and first and second contact structures individually connected to the first and second head regions of the first well.