Patent ID: 8659951

Claim:
A nonvolatile semiconductor memory device, comprising: a memory cell being electrically data rewritable; a bit line electrically connected to one end of a current path of the memory cell; a word line commonly connected to the memory cells arranged in a direction intersecting the bit line; and a control circuit configured to execute: a write voltage application operation for applying a write voltage to the word line so shift a threshold voltage of the memory cell to be data written that the threshold voltage of the memory cell to be data written reaches a first threshold voltage; a first verify operation for judging whether the threshold voltage of the memory cell to be data written is equal to or more than a second threshold voltage which is lower than the first threshold voltage or not; and a second verify operation for judging whether the threshold voltage of the memory cell to be data written is equal to or more than the first threshold voltage or not, during execution of the write voltage application operation on the memory cell judged by the first and second verify operations to have a threshold voltage which is less than the first threshold voltage and equal to or more than the second threshold voltage, accompanying an increase in number of times of executions of the write voltage application operation, the control circuit being configured to gradually raise a voltage of the word line and gradually change a voltage of the bit line corresponding to the memory cell.