Patent ID: 8546232

Claim:
A method of manufacturing a semiconductor device, comprising: forming a sacrificial interlayer insulating film over a substrate; forming a plurality of cylinder holes in the sacrificial interlayer insulating film positioned in each of a memory cell forming region and a compensation capacitance forming region having different planar surface areas; forming lower electrodes so as to cover inner surface of the cylinder holes; removing overall the sacrificial interlayer insulating film; forming a capacitance insulating film and an upper electrode in order on all of the inner and outer surfaces of the lower electrodes; forming a boron-doped silicon germanium film so as to fill up recesses of the upper electrodes; forming an adhesive layer on the boron-doped silicon germanium film; forming a metal film on the adhesive layer; forming a mask film on the metal film over the memory cell forming region and the compensation capacitance forming region; and etching the metal film, the adhesive layer, and the boron-doped silicon germanium film using the mask film as a mask, thereby removing the metal film, the adhesive layer, and the boron-doped silicon germanium film which are formed in a region other than the memory cell forming region and the compensation capacitance forming region.