Patent ID: 6906561

Claim:
An input/output (IO) device comprising: an input node for receiving an input data bit signal; an output node; a plurality of pull-up and pull-down circuit pairs coupled between the input node and the output node, wherein individual ones of the plurality of circuit pairs comprise at least one FET that defines a gate oxide voltage limit, wherein individual ones of the plurality of pull-up and pull-down circuit pairs are configured to receive a supply voltage and the input data bit signal, wherein the individual ones of the plurality of pull-up and pull-down circuit pairs are configured to charge and discharge the output node to the supply voltage and ground, respectively, in response to the supply voltage, the input data bit signal, and at least one indicator of an output impedence of the IO device, wherein the supply voltage is greater than the gate oxide voltage limit; a plurality of first circuits coupled between the input node and respective ones of the plurality of pull-up and pull-down circuit pairs, wherein individual ones of the plurality of first circuits are configured to generate a modified input data bit signal which varies between the supply voltage and an intermediate voltage in response to the supply voltage, the input data bit signal, and the at least one indicator of the output impedance of the IO device, wherein the intermediate voltage is greater than ground but less than the supply voltage.