Patent ID: 7518892

Claim:
A semiconductor integrated circuit electrically connected to a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor, comprising: a first switch having a first terminal connected to a node at a first potential, and a second terminal electrically connected to a first terminal of said first capacitor; a second switch having a first terminal connected to the node at said first potential, and a second terminal electrically connected to a second terminal of said first capacitor; a third switch having a first terminal electrically connected to the first terminal of said first capacitor, and a second terminal electrically connected to a first terminal of said fourth capacitor; a fourth switch having a first terminal connected to the second terminal of said first capacitor, and a second terminal connected to a node at a second potential lower than said first potential; a fifth switch having a first terminal electrically connected to the second terminal of said first capacitor, and a second terminal electrically connected to a first terminal of said second capacitor; a sixth switch having a first terminal connected to the node at said first potential, and a second terminal connected to the first terminal of said second capacitor; a seventh switch having a first terminal connected to the node at said first potential, and a second terminal connected to a second terminal of said second capacitor; an eighth switch having a first terminal electrically connected to the first terminal of said second capacitor, and a second terminal electrically connected to the first terminal of said fourth capacitor; a ninth switch having a first terminal electrically connected to the second terminal of said second capacitor, and a second terminal connected to the node at said second potential; a tenth switch having a first terminal electrically connected to the second terminal of said second capacitor, and a second terminal electrically connected to a first terminal of said third capacitor; and an eleventh switch having a first terminal connected to the second terminal of said first capacitor, and a second terminal connected to the first terminal of said third capacitor, wherein a second terminal of said third capacitor is connected to the node at said second potential, wherein the first terminal of the fourth switch is directly connected to the second terminal of the first capacitor, wherein the second terminal of the sixth switch is directly connected to the first terminal of the second capacitor, wherein the second terminal of the seventh switch is directly connected to the second terminal of the second capacitor wherein the first terminal of the eleventh switch is directly connected to the second terminal of the first capacitor, and wherein the second terminal of the eleventh switch is directly connected to the first terminal of the third capacitor.