Patent ID: 8386987

Claim:
A computer implemented method, comprising: generating a candidate power switch configuration for an electronic design, wherein the electronic design comprises data for a physical design of an electronic circuit; analyzing power consumption for the candidate power switch configuration; computing circuit values with respect to the candidate power switch configuration; using at least one processor to generate an improved power switch configuration for the electronic design by at least performing a constraint mapping that maps multiple current constraints, which are associated with a power switch, a saturation current of the power switch, a maximum current derived from an electrical characteristic of the power switch, and a block of circuitry controlled by the power switch in the electronic design, into a single current constraint by determining a minimum current of multiple currents, which are determined for the electronic circuit based at least in part upon the multiple current constraints, for the power switch; and displaying the electronic design with the improved power switch configuration on a display device or storing the electronic design with the improved power switch configuration on a non-transitory computer readable medium.