Patent ID: 7702942

Claim:
A variable timing system embedded in a magnetoresistive random access memory integrated circuit (MRAM IC) comprising: a plurality of timing control circuits, wherein each timing control circuit generates a timing control signal, wherein each of the plurality of timing control circuits further comprises: a register having a register output; a programmable fuse having a programmable signal output; and a multiplexer connected to receive the register output and the programmable signal output; a plurality of variable timing circuits, wherein each variable timing circuit is coupled to receive at least two of the timing control signals, wherein each of the plurality of variable timing circuits outputs a variable timing in response to the timing control signals, wherein the multiplexer is controlled to select one of the register output and the programmable signal output as a timing control signal routed to at least one of the plurality of variable timing circuits; and at least one MRAM IC current driver connected to receive the variable timing.