Patent ID: 8476738

Claim:
An electronic component package, comprising: a packaging layer; a first electronic component package module with a top surface mounted on a surface of the packaging layer; a second electronic component package module laminated on a bottom of the first electronic component package module together, wherein the first and second electronic component package modules each respectively comprise: at least two semiconductor chips laminated; and an interior connection structure, comprising a conductive trace layer conformably mounted on sides and backsides of the corresponding electronic component package module, respectively electrically connecting the first and the second electronic component package modules, wherein at least one package module of the first and second electronic component package modules further comprises: at least two conductive pads respectively disposed on and electrically connected to the two semiconductor chips of the package module and the at least two conductive pads extending to the sides of the package module to electrically connect to the conductive trace layer mounted on the sides of the package module; an exterior connection structure, comprising a first redistribution layer between the first and the second electronic component package modules, respectively electrically connected to the conductive trace layer of the first and the second electronic component package modules; and a conductive bump mounted on a bottom of the second electronic component package module, electrically connected to the second electronic component package module, wherein the interior connection structure and the exterior connection structure are different.