Patent ID: 7652506

Claim:
A complementary signal generating circuit, comprising: an inverting element inverting a first signal to generate a second signal; a first transistor connecting a first power supply potential and a first output terminal electrically in accordance with the first signal; a second transistor connecting the first output terminal and a second power supply potential electrically in accordance with the second signal; a third transistor connecting the first power supply potential and a second output terminal electrically in accordance with the second signal; and a fourth transistor connecting the second output terminal and the second power supply potential electrically in accordance with the first signal, wherein a delay of a rising waveform from the first output terminal against the first signal and a delay of a falling waveform from the second output terminal against the first signal are set substantially the same, and a delay of a falling waveform from the first output terminal against the second signal and a delay of a rising waveform from the second output terminal against the second signal are set substantially the same.