Patent ID: 8577297

Claim:
A signal transceiving circuit, comprising: a receiver, for receiving an input signal; a transmitter, for transmitting an output signal; and a resistance circuit, for omitting noise that the output signal caused to the input signal, comprising: a voltage transferring circuit, for generating a voltage transferring signal according to the output signal; and a voltage dividing circuit, for voltage-dividing the voltage transferring signal and the output signal, such that a voltage that the output signal generates at the receiver will be counteracted with a voltage that the voltage transferred signal generates at the receiver; wherein the receiver receives the input signal from a cable, and the transmitter transmits the output signal to the cable, where the input signal and the output signal are differential signals, the receiver comprising a first receiving terminal and a second receiving terminal, the transmitter comprising a first transmitting terminal and a second transmitting terminal, where the resistance circuit comprises: a first resistance device, having a first terminal coupled to the second transmitting terminal, and a second terminal coupled to the cable; a second resistance device, having a first terminal coupled to the first transmitting terminal; a third resistance device, having a first terminal coupled to a second terminal of the second resistance device, and a second terminal coupled to the cable; a fourth resistance device, having a first terminal coupled to the first transmitting terminal, and a second terminal coupled to the cable; a fifth resistance device, having a first terminal coupled to the second transmitting terminal; and a sixth resistance device, having a first terminal coupled to a second terminal of the fifth resistance device, and a second terminal coupled to the cable; wherein the second terminal of the second resistance is coupled to the second receiving terminal, and the second terminal of the fifth resistance device is coupled to the first receiving terminal; wherein the voltage transferring circuit comprises the first resistance device and the fourth resistance device, and the voltage dividing circuit comprises the second resistance device, the third resistance device, the fifth resistance device and the sixth resistance device.