Patent ID: 8634257

Claim:
A semiconductor storage device comprising: a substrate; a first select line disposed above the substrate; a select element disposed above the first select line and in which a drain-source current flows vertically with respect to the substrate; a first stacked structure, the first stacked structure having a structure in which a plurality of semiconductor layers are stacked and disposed above the select element; a second select line arranged in a direction intersecting with the first select line and disposed above the first stacked structure; a gate insulating layer disposed along a side of the first stacked structure; a channel layer disposed along a side of the gate insulating layer, a variable resistive element material layer disposed along a side of the channel layer and including a variable resistive element material whose resistance value varies according to a current; and a current-bias circuit configured to apply current to the semiconductor layers, wherein the channel layer, the variable resistive element material layer, and the select element are provided in a region where the first select line and the second select line intersect with each other, and wherein the current-bias circuit applies a first current to a first portion of the variable resistive element material layer located on a side surface of a first semiconductor layer out of the semiconductor layers, and thereafter applies a second current to a second portion of the variable resistive element material layer located on a side surface of any one of the semiconductor layers other than the first semiconductor layer, the application time of the second current being shorter than an application time of the first current.