Patent ID: 8426942

Claim:
A semiconductor device comprising: a semiconductor substrate; a base insulating layer disposed over the semiconductor substrate for insulation; a silicon fuse disposed on the base insulating layer; a pair of silicon wires disposed on the base insulating layer, each extending from one end of the silicon fuse; a generally ring-shaped, closed silicon guard ring disposed on the base insulating layer to surround, in plan view, the silicon fuse, while overlapping the silicon wires at points where the silicon wires extend beyond the silicon guard ring, the silicon fuse and the silicon wires being formed of a first patterned silicon layer deposited on the base insulating layer, the silicon guard ring being formed of a second patterned silicon layer, different from the first patterned silicon layer, deposited on the base insulating layer; an insulation coating deposited at least over surfaces of the silicon wires to electrically isolate the silicon wires from the silicon guard ring at the points of overlap, the insulation coating comprising an oxidized surface of the silicon wire, and the insulation coating having a thickness of approximately 0.05 to 0.2 micrometers; a first interlayer insulating layer, thicker than the insulation coating, disposed on the base insulating layer to cover the silicon fuse, the silicon wires, and the silicon guard ring for insulation; a generally ring-shaped, closed via guard ring formed of metal filling a via hole defined in the interlayer insulating layer on and along the silicon guard ring to surround, in plan view, the silicon fuse; a generally ring-shaped, closed metal guard ring formed of metal deposited above the interlayer insulating layer on and along the via guard ring to surround, in plan view, the silicon fuse; a final insulating layer disposed on the interlayer insulating layer to cover the metal guard ring for insulation; and a fuse window defined in at least one of the insulating layers above the silicon fuse inside the guard rings to provide access to the silicon fuse with relatively thin insulation therethrough.