Patent ID: 7544564

Claim:
A method for forming a semiconductor device, the method comprising: forming a gate dielectric layer over a substrate; forming a first conductive layer over the substrate; forming a dielectric layer over the first conductive layer; forming a second conductive layer over the dielectric layer; forming a sacrificial layer over the second conductive layer; patterning the gate dielectric layer, the first conductive layer, the dielectric layer, the second conductive layer, and the sacrificial layer to form a plurality of gate electrode patterns; forming a buried oxide layer over and between the gate electrode patterns; removing the sacrificial layer to form a plurality of trenches surrounded by the buried oxide layer, wherein the second conductive layer is exposed by the removal of the sacrificial layer; forming a metal layer over the semiconductor substrate to form a plurality of metal gate structures, wherein the metal layer fills the trenches, the metal layer contacting the second conductive layer exposed by the removal of the sacrificial layer; and performing a polishing process to remove the metal layer formed on the buried oxide layer, wherein the metal layer remains within the trenches, wherein the metal layer is formed after the buried oxide layer has been formed to minimize oxidation of the metal layer.