Patent ID: 8170520

Claim:
A semiconductor integrated circuit device comprising: a clock generation unit which is formed on a semiconductor substrate and generates a clock; a signal processing unit which is formed on the semiconductor substrate, and transmits and receives data by a wireless communication using a bandwidth of a first frequency, the signal processing unit operating in synchronization with the clock generated by the clock generation unit; an FM receiving unit which is formed on the semiconductor substrate and receives an FM signal, the FM receiving unit operating in synchronization with the clock generated by the clock generation unit; a processor which is formed on the semiconductor substrate and controls the signal processing unit and the FM receiving unit, the processor operating in synchronization with the clock generated by the clock generation unit; and a bus which is formed on the semiconductor substrate and connects the clock generation unit, the signal processing unit, the FM receiving unit, and the processor, the FM receiving unit including: an RF unit which performs frequency conversion of the received FM signal based on the clock generated by the clock generation unit; a canceller which produces a replica of a noise based on a reference signal to cancel the noise on the frequency-converted FM signal, the reference signal being obtained by performing frequency conversion of a signal in at least one of the signal processing unit and the bus based on the clock generated by the clock generation unit, the clock having a second frequency which is integer multiple of the first frequency, the noise superimposed on the FM signal being due to the clock; and a wave detector which detects the frequency-converted FM signal in which the noise is cancelled.