Patent ID: 8320162

Claim:
A semiconductor device comprising: a bit line; a source line; a potential change circuit; and a memory cell, the memory cell comprising: a first transistor comprising a first gate electrode, a first source electrode, a first drain electrode, and a first channel formation region including a first semiconductor; a second transistor comprising a second gate electrode, a second source electrode, a second drain electrode, and a second channel formation region including a second semiconductor; and a capacitor, wherein the first semiconductor is different from the second semiconductor, wherein the first gate electrode, the second drain electrode, and one of electrodes of the capacitor are electrically connected to each other to form a node which holds charge, wherein the source line, one of terminals of the potential change circuit, and the first source electrode are electrically connected to each other, wherein the bit line, the second source electrode, and the first drain electrode are electrically connected to each other, wherein the potential change circuit is configured to selectively apply a first potential to the source line or a second potential to the source line, and wherein the first potential is equal to a potential of the bit line and the second potential is different from the potential of the bit line.