Patent ID: 8499137

Claim:
A memory manager for a network processor having a plurality of processing modules, the memory manager coupled to at least one shared memory, the memory manager comprising: a memory manager core configured to allocate one or more blocks of the at least one shared memory to a requesting one of the plurality of processing modules; a free block list configured to track availability of one or more memory blocks of the shared memory; a reference counter configured to maintain, for each allocated memory block, a reference count value indicating a number of access requests of corresponding ones of the plurality of processing modules accessing the memory block, the reference count value located with data at the allocated memory block; a memory access accumulator configured to, for one or more subsequent access requests to a given memory address corresponding to an allocated memory block concurrent with processing of at least one prior access request to the given memory address: (i) accumulate an incremental value corresponding to the one or more subsequent access requests, (ii) update the reference count value associated with the given memory address, and (iii) update a value stored at the given memory address with the accumulated incremental value during a data operation corresponding to a most recent of the one or more subsequent access requests.