Patent ID: 7109100

Claim:
A semiconductor device comprising: a channel layer ( 16 ) formed on a substrate ( 12 ); a diffusion stop layer ( 17 ) formed on a top surface of said channel layer ( 16 ); a diffusion layer ( 18 ) formed on a top surface of said diffusion stop layer ( 17 ); and an evaporation prevention layer ( 19 ) formed at least at part of the top of said diffusion layer ( 18 ) and preventing evaporation of elements included in said diffusion layer ( 18 ) due to heating, and a doping region ( 25 ) formed adjoining said diffusion stop layer ( 17 ) at least at part of said diffusion layer ( 18 ) and having an impurity diffused in it; wherein elements included in said diffusion layer are constant in concentration at any position of said substrate, and said diffusion stop layer ( 25 ) has a diffusion rate slower than the diffusion rate of said impurity in said diffusion layer ( 18 ) and is formed to a thickness stopping the diffusion of said impurity from said diffusion layer ( 18 ).