Patent ID: 8245173

Claim:
A computer-implemented method of generating a schedule for parallel processing of placement computations for movebounds of an integrated circuit design having associated placeable objects, comprising: receiving a list of the movebounds and placeable objects associated with the movebounds by executing first instructions in the computer system; first determining that a total number of movebounds in the design is large by executing second instructions in the computer system to compare the total number of the movebounds to a threshold number of movebounds; second determining that an average number of placeable objects per movebound in the design is large by executing third instructions in the computer system to compare the average number of placeable objects per movebound to a threshold number of objects per movebound; and in response to said first and second determining, creating a schedule which balances the placeable objects and the movebounds amongst host processors of a computer system by executing fourth instructions in the computer system to sort the movebounds into descending order based on the number of placeable objects associated with each movebound, assign the movebounds in the descending order to the host processors in successive rounds, wherein the movebounds are assigned in odd-numbered rounds according to a first processor order and are assigned in even-numbered rounds according to a second processor order which is the reverse of the first processor order, adaptively remove a given one of the host processors from the first and second processor orders when (i) the number of objects in all movebounds assigned to the given host processor is greater than an expected object load, and (ii) the number of movebounds assigned to the given host processor is greater than an ideal number of movebounds per processor less an offset value, and update the expected object load and the ideal number of movebounds per processor after any host processor is removed from the first and second processor orders; and storing the schedule in a memory device of the computer system by executing fifth instructions in the computer system.