Patent ID: 7932127

Claim:
A method for manufacturing a CMOS image sensor, the method comprising: providing a semiconductor substrate; forming at least one isolation region between a periphery region of the substrate and a photo-sensing region of the substrate; forming a first well in the periphery region and a second well in the photo-sensing region of the substrate; forming a third well in the photo-sensing region of the substrate, the third well being associated with a photodiode; depositing a gate oxide layer on a surface of the substrate; depositing a polysilicon layer over the gate oxide layer; depositing a first metal layer over the polysilicon layer; etching the polysilicon layer and first metal layer to form an least one gate in the photo-sensing region and at least one gate in the periphery region; forming spacers for each of the at least one gate in the photo sensing region and the at least one gate in the periphery region; implanting a first plurality of ions to form at least two doped regions in the first well; implanting a second plurality of ions to form a doped region in the second well; depositing a silicide block layer over the photo-sensing region of the substrate, wherein the silicide block layer extends over the entire photo-sensing region of the substrate including the entire part of the at least one gate in the photo-sensing region; depositing a second metal layer at least over the periphery region after deposition of the silicide block layer; exposing the substrate to a thermal environment to simultaneously form silicide in the at least two doped regions in the first well and the at least one gate in the photo-sensing region; and etching after the exposing to the thermal environment to remove the second metal layer.