Patent ID: 7524752

Claim:
A method of manufacturing a semiconductor device, in which a wiring structure is formed by a damascene process, the method comprising, to form the wiring structure, the steps of: forming an insulating film on a semiconductor substrate or on a lower wiring layer; depositing a metal hard mask on the insulating film; using a first resist pattern to form a predetermined wiring pattern in the metal hard mask; forming a second resist pattern with a via pattern formed therein, on the insulating film and the metal hard mask; using the second resist pattern to form a via hole in the insulating film; removing the second resist pattern; forming a wiring groove in the insulating film through the metal hard mask; thinning the metal hard mask; forming a barrier metal and a conductive film in the via hole and the wiring groove; and removing parts of the barrier metal and the conductive film which stick out from the via hole and the wiring groove.