Patent ID: 7989814

Claim:
A thin film transistor array panel comprising: a substrate comprising a display area and a peripheral area; a display area signal line disposed in the display area; a display area thin film transistor disposed in the display area, the display area thin film transistor electrically connected to the display area signal line; a peripheral area signal line disposed in the peripheral area; a black matrix disposed on the display area signal line, the display area thin film transistor, and the peripheral area signal line, the black matrix comprising a first and a second contact holes exposing the peripheral area signal line; a protrusion member disposed on or under the peripheral area signal line, the protrusion member overlapping the peripheral area signal line; a transparent connector disposed on the black matrix and within the peripheral area, wherein the transparent connector contacts the peripheral area signal line through at least one of the first and the second contact holes and comprises a protrusion within at least one of the first and the second contact holes which corresponds to the protrusion member; and a pixel electrode electrically connected to the display area thin film transistor.