Patent ID: 7852101

Claim:
A semiconductor device testing apparatus comprising: a testing LSI; a power supply unit; and an intermediate substrate provided so that there is a connection between said testing LSI, and said power supply unit and tester; said testing LSI having a wafer, a dielectric material layer disposed on said wafer at a surface side of said wafer which faces a tested semiconductor device, an electrode disposed in said dielectric material layer at a position facing an external terminal electrode of said tested semiconductor device on a surface of said wafer which faces said tested semiconductor device, and a first penetrating electrode that passes completely through said wafer, is connected to said electrode, and is used for exchanging signals with the exterior; and said power supply unit having mutually independent elastic probe pins that are disposed in positions that correspond to power electrodes of said tested semiconductor device, and that are provided with a metal protrusion at the distal ends thereof, a substrate on which a first wiring layer is formed, and is electrically connected to the probe pins, and a second penetrating electrode that passes through the substrate.