Patent ID: 7769883

Claim:
An apparatus comprising: a general input/output communication port to implement a communication stack including a physical layer, a data link layer and a transaction layer, the transaction layer to include assembling a packet header for a message request transaction to one or more logical devices, the packet header including: a format field to indicate the length of the packet header and to further specify whether the packet header includes a data payload; a subset of a type field to indicate the packet header relates to the message request transaction; and a message field to include a message to implement the message request transaction, the message to include at least one message selected from the following group of: a message to unlock a logical device, a message to reset a logical device, a message to indicate a correctable error condition, a message to indicate an uncorrectable error condition, a message to indicate a fatal error condition, a message to report a bad request packet, a message to indicate power management and a message to emulate an interrupt signal.