Patent ID: 8072726

Claim:
A radiation-tolerant electrical component for limiting inrush currents in radiation-intensive applications, the component comprising: a common line, an load input line; an positive input line; an inrush limiter comprising a non-hardened p-channel FET having a drain, a gate, and a source, wherein the source is operably connected to the positive input line, the drain is operably connected to the load input line, the FET providing controlled electrical response to the load input line when exposed to radiation, a gate-drive-voltage-buffer transistor operably connected across a negative bias supply referenced to the positive input line and the gate, a common-base-amplifier transistor operably connected, across the load input and the gate drive-voltage-buffer transistor, wherein the non-hardened p-channel FET has an initial negative gate threshold voltage that changes to a more negative value in the presence of radiation and said FET operates close to its maximum gate voltage range so said FET can function over a large range of radiation exposure, said FET has a gate drive signal high enough to saturate the drain to source channel but not so high that a gate to source breakdown voltage rating of the FET is exceeded, a voltage lockout circuit operatively connected between the positive input line and to a collector load resistor of the common base amplifier which drives said FET, where the voltage lockout circuit applies voltage to the common-base-amplifier and gate-drive-voltage-buffer which drives the gate of said FET when the input carries a predetermined-minimum input voltage to permit said inrush limiter to operate.