Patent ID: 7084611

Claim:
A DC/DC converter comprising: an input to which an input voltage (Vin) is applied, an inductance (L) whose one terminal is connected to said input, a first controllable switch (N 1 ) via which the other terminal of said inductance (L) is connectable to a reference potential (Vss), a second controllable switch (P 1 ) via which the other terminal of said inductance (L) is connectable to the output of said converter, and a regulator circuit ( 1 ) configured so that it is able to control said two switches (N 1 , P 1 ) in regulating the output voltage (Vout) of said DC/DC converter to a predetermined wanted value, said second controllable switch being a PMOS-FET and said regulator circuit ( 1 ) being configured so that when said input voltage (Vin) is higher than said wanted value of said output voltage, a gate of said PMOS-FET (P 1 ) is permanently connected to a voltage which is larger than the difference between said input voltage and the threshold voltage of said PMOS-FET, connecting a back gate of said PMOS-FET permanently to a voltage which is larger than the expression input voltage plus threshold voltage of said PMOS-FET minus diode voltage of a pn junction of said PMOS-FET and timing said first controllable switch (N 1 ) with a specific duty cycle so that said output voltage attains said wanted value.