Patent ID: 7541646

Claim:
A thin film transistor device, comprising: a thin film transistor having a silicon layer including a source region, a drain region, and a channel region, a gate insulating layer, and a gate electrode formed on an insulating substrate; an interlayer insulating layer covering the thin film transistor; a line electrically connected with the source region, the drain region, and the gate electrode through a contact hole formed in the interlayer insulating layer; a first upper insulating layer covering the line and the interlayer insulating layer directly and smoothing out stepped portions of the line and irregularities of a surface of the interlayer insulating layer; and a second upper insulating layer covering the first upper insulating layer, the second upper insulating layer having a hydrogen diffusion coefficient smaller than a hydrogen diffusion coefficient of the first upper insulating layer; wherein the first upper insulating layer is a single layer comprising one of an organic Spin On Dielectrics (SOD) film, an organic Spin On Glass (SOG) film, an inorganic SOD film, an inorganic SOG film, and a high-heat-resistance organic polymer film resistant to a temperature of about 400° C. or higher.