Patent ID: 6897529

Claim:
An integrated circuit device on a substrate, comprising: multiple semiconductor surface structures spaced apart along the substrate; a number of plugs contacting the substrate between the multiple semiconductor surface structures, wherein the number of plugs includes an inner plug and a pair of outer plugs a pair of spacers placed on interior walls of an opening at the inner plug, the pair of spacers separating the inner plug and the pair of outer plugs, the inner plug being isolated beneath and between an adjacent pair of the semiconductor surface structures, the pair of outer plugs covering part of top portions of the adjacent pair; and a conductive material contacted the inner plug and being isolated from the pair of outer plugs by the pair of spacers, wherein the inner and the pair of outer plugs are formed by the method of: forming an initial opening in a first isolation layer on the multiple semiconductor surface structures, wherein forming the initial opening includes exposing portions of the multiple semiconductor surface structures, and includes exposing portions of the substrate between the multiple semiconductor surface structures; depositing an initial conductive material in the fist initial opening to cover the multiple semiconductor surface structures; forming a second isolation layer across the initial conductive material; and etching the initial conductive material and the second isolation layer to form the opening at the inner plug and in the initial conductive material in a source region on the substrate.