Patent ID: 6977638

Claim:
Method of compensating for disturbances due to demultiplexing an analogue signal with regard to a circuit comprising N data lines, N being a positive integer, wherein the demultiplexing is carried out by sample-and-hold circuits whose input receives the analogue signal and whose output is connected to one of the N data lines, the method comprising steps of: providing a sampling signal comprising a first level V 1 configured to turn on the sample-and-hold circuits, a second level V 2 configured to keep the sample-and-hold circuits off, and a third level V 3 also configured to keep the sample-and-hold circuits off, wherein a difference in level between the levels V 1 and V 3 is greater than a difference in level between the levels V 1 and V 2 ; and operating the sample-and-hold circuits in succession by applying the first level V 1 of the sampling signal to a first one of the sample-and-hold circuits to turn on the first one of the sample-and-hold circuits while applying the third level V 3 of the sampling signal to sample-and-hold circuits other than the first one of the sample-and-hold circuits.