Patent ID: 8121150

Claim:
A method of processing packets having variable lengths in an integrated circuit, comprising: obtaining, as each packet of the packets is written to a buffer memory, a length of the packet from a length field therein; comparing, for each packet of the packets, the length of the packet with a threshold length; storing an encoded length for each of the packets in a sideband memory, wherein the encoded length for each packet of the packets is the length of the packet if the length satisfies the threshold value and is a predefined value if the length of the packet does not satisfy the threshold; and determining, as each packet of the packets is read from the buffer memory, a starting address of a next packet to read from the buffer memory responsive to the encoded length thereof in the sideband memory; wherein the determining includes: in response to the encoded length from the sideband memory not being the predefined value, determining the starting address of the next packet to read from the buffer memory from the encoded length from the sideband memory; and in response to the encoded length from the sideband memory being the predefined value, determining the starting address of the next packet to read from the length field of the packet read from the buffer memory.