Patent ID: 7023283

Claim:
A phase locked loop type frequency synthesizer comprising: a phase/frequency comparator for receiving an input signal; a charge pump circuit connected to said phase/frequency comparator; a bias voltage source for generating a bias voltage; a loop filter, selectively connected to one of said charge pump circuit and said bias voltage, for generating a control voltage, said charge pump circuit charging and discharging said loop filter in accordance with an output signal of said phase/frequency comparator, said bias voltage source applying said bias voltage to said loop filter; a voltage control oscillator block connected to said loop filter and including a plurality of voltage controlled oscillators controlled by said control voltage; a first frequency divider connected to said voltage controlled oscillator block; a second frequency divider connected to said first frequency divider, said phase/frequency comparator comparing a phase of said input signal with a phase of an output signal of said second frequency divider; and a selecting circuit, connected to said first frequency divider and said voltage controlled oscillator block, for selecting and activating only one of said voltage controlled oscillators; said selecting circuit counting a number of output pulses of said first frequency divider within a predetermined number of output pulses of said input signal while applying said bias voltage to said loop filter, the one of said voltage controlled oscillators being selected so that the number of the output pulses of said first frequency divider is brought close to an optimum value.