Patent ID: 7579238

Claim:
A method for forming a multi-bit memory cell using a semiconductor substrate, comprising: forming a first insulating layer over the semiconductor substrate; forming a second insulating layer over the first insulating layer; forming a layer of gate material over the second insulating layer; patterning the gate material to leave a gate portion of the layer of gate material; etching the second insulating layer to undercut the gate portion and leave a portion of the second insulating layer between the first insulating layer and the gate portion; and forming nanocrystals on the first insulating layer wherein a first portion of the nanocrystals is under the gate portion on a first side of the portion of the second insulating layer and a second portion of the nanocrystals is under the gate portion on a second side of the portion of the second insulating layer, whereby the first portion of the nanocrystals are for storing a logic state of a first bit and the second portion is for storing a logic state of a second bit.