Patent ID: 7732278

Claim:
A method for forming a split gate memory cell, comprising: forming a charge storage layer comprising nanocrystals over a substrate; forming a layer of control gate material over the charge storage layer, wherein the control gate material is formed of a semiconductor material that is doped to p type; patterning the layer of control gate material, wherein the patterning defines a first sidewall of a structure of the layer of control gate material; forming a layer of select gate material over the substrate and over the structure of the layer of control gate material after the patterning the layer of control gate material, wherein the select gate material is formed of semiconductor material that is doped to n type; and patterning the layer of select gate material and the structure of the layer of control gate material to define a stack sidewall, the stack sidewall including a first sidewall of a structure of the layer of select gate material and a second sidewall of the structure of the layer of control gate material, wherein the first sidewall of the structure of the layer of control gate material is an opposite sidewall to the second sidewall of the structure of the layer of control gate material.