Patent ID: 6975100

Claim:
A circuit arrangement for regulating the duty cycle of an electrical signal, the circuit arrangement comprising: a first input differential amplifier including two transistors, to which a first input signal is applied, a first current source for controlling a first current through the first input differential amplifier, a second input differential amplifier including two transistors, to which the first input signal is applied, a second current source for controlling a second current through the second input differential amplifier, means for generating a fluctuating voltage signal in response to the first and second currents, a buffer device for converting the fluctuating voltage signal into a digital output signal, and for transmitting the digital output signal to an output terminal, a capacitance, and means for charging and discharging the capacitance in synchronization with the digital output signal, wherein a voltage present at the capacitance is fed to the first and second current sources as a control voltage such that regulation of the two current sources is effected in opposite senses.