Patent ID: 7422954

Claim:
A method for fabricating a capacitor structure, comprising: providing a substrate having a first metal layer therein; forming an etching stop layer on the substrate; forming in the etching stop layer an opening that exposes a portion of the first metal layer; forming a connection layer on the portion of the first metal layer, a sidewall of the opening and the etching stop layer; forming an insulating layer on the connection layer; forming a second metal layer on the insulating layer, wherein a portion of the second metal layer is formed in the opening; and removing a portion of each of the second metal layer, the insulating layer and the connection layer outside the opening, wherein the step of removing a portion of each of the second metal layer, the insulating layer and the connection layer outside the opening comprises: forming a patterned photoresist layer covering the opening and the rest of each of the second metal layer, the insulating layer and the connection layer outside the opening; and etching the second metal layer, the insulating layer and the connection layer using the patterned photoresist layer as a mask, after a portion of each of the second metal layer, the insulating layer and the connection layer outside the opening is removed, further comprising: forming a dielectric layer over the substrate; and forming in the dielectric layer a first contact plug connected with the first metal layer and a second contact plug connected with the second metal layer.