Patent ID: 7580310

Claim:
An apparatus for controlling a voltage used in a semiconductor memory device, comprising: a first voltage supplying block for supplying a first voltage to a predetermined first transistor of the semiconductor memory device in response to an inputted control signal; and a second voltage supplying block for supplying a second voltage to a predetermined second transistor of the semiconductor memory device in response to the inputted control signal, wherein the first and the second voltages are used as a bulk voltage of the predetermined first and second transistors which are coupled between a first source voltage and a first ground voltage in series, wherein the first voltage supplying block supplies the first voltage higher than the first source voltage to the bulk voltage of the predetermined first transistor, and the second voltage supplying block supplies a back-bias voltage lower than the first ground voltage to the bulk voltage of the predetermined second transistor in case that an external self refresh signal is inputted, and an internal self refresh signal is activated during an active section of a self refresh flag signal.