Patent ID: 7382021

Claim:
A transistor, comprising a gate, a semiconductor channel formed on an {001} surface, and one or more channel taps, at least one of the channel taps arranged as a stack on a {111} surface of the semiconductor channel and consisting at least in part of the semiconductor channel, an interfacial III-VI layered compound consisting of one or more elements from Groups IIIA-B and one or more Group VIA elements in approximately a 1:1 ratio of Groups IIIA-B to Group VIA stoichiometry, and a conductor, wherein the interfacial III-VI layered compound (i) comprises primarily a bilayer made up of a single plane of primarily elements from Groups IIIA-B and a single plane of primarily Group VIA elements, and (ii) is approximately epitaxially aligned with the underlying {111} surface of the semiconductor channel.