Patent ID: 7930445

Claim:
A computer system, comprising: a host computer; a device that utilizes a DMA engine to execute data I/O between the host computer and an appliance; and a network which connects the host computer and the device, wherein the device is coupled to the network via a device bridge, wherein the device bridge includes a bridge memory, wherein the host computer includes a host memory, which contains address conversion information that includes associations between addresses in the host memory and corresponding addresses in the bridge memory, and a device driver, which controls data transfer to the device, wherein the device driver is configured to: when data to be transferred to the appliance is written in the host memory, convert a first address in the host memory at which the data is written into a first address in the bridge memory that corresponds to the first address in the host memory according to the address conversion information; write the data in an area within the bridge memory that is indicated by the first address in the bridge memory; write the first address in the bridge memory to a second area within the bridge memory; and send a data transfer request to the DMA engine through the device bridge, and wherein the DMA engine is configured to: upon reception of the data transfer request, read the first address in the bridge memory from the second area within the bridge memory; read the data from the area within the bridge memory that is indicated by the read first address in the bridge memory; and transfer the data to the appliance.