Patent ID: 7742843

Claim:
A method for the structured application of a laminatable intermediate layer to a substrate for a semiconductor module, the method comprising the steps of: applying an isolating layer indirectly or directly to the substrate over a large area so that at least one semiconductor component or contact element attached to the substrate is covered by the isolating layer, applying the intermediate layer by lamination over a large area to the substrate including the isolating layer so that the at least one semiconductor component or contact element is further covered by the intermediate layer, opening the intermediate layer after being applied to the substrate at locations on the substrate to provide cutouts in the intermediate layer to expose the isolating layer at the cutout locations, the cutouts in the intermediate layer being produced by means of a laser such that in the region of each cutout a segment of the intermediate layer is completely separated from the remainder of the intermediate layer and then removed; and removing the isolating layer at the cutout locations after the isolating layer is applied to the substrate to expose at least partially a surface of the at least one semiconductor component or contact element.