Patent ID: 6884680

Claim:
A method for manufacturing a non-volatile memory device, comprising the steps of: (a) forming an oxide layer on a substrate; (b) implanting ions through the oxide layer to sequentially form a well in the substrate and a channel in the well; (c) removing the oxide layer; (d) depositing a tunnel oxide layer, a first polysilicon layer, and a nitride layer sequentially on the substrate; (e) etching the nitride layer, the first polysilicon layer, the tunnel oxide layer and the substrate based on a shallow trench isolation pattern, resulting in a shallow trench in which the substrate is etched by a predetermined depth; (f) filling the shallow trench with an isolation material; (g) performing a polishing until the nitride layer is exposed to form a shallow trench isolation; (h) removing the nitride layer to thereby protrude the shallow trench isolation; and (i) depositing an oxide-nitride-oxide layer and a second polysilicon layer sequentially.