Patent ID: 8433532

Claim:
A digital data acquisition module, comprising: a synchronous random access memory (RAM); a digital signal processing unit, coupled to the synchronous RAM, including: at least one analog-to-digital (A/D) converter to digitize an analog signal; and a digital signal processor, including: a dual-port RAM; a plurality of processing blocks to process the digitized analog signal data, store the processed digitized analog signal data in the synchronous RAM, create display data from the stored digitized analog signal data, and store the display data in the dual-port RAM; and a communications interface to transmit the stored display data; and a master control unit, coupled to the digital signal processing unit, including: an internal communications interface coupled to the digital signal processing unit communications interface; an external communications interface; and a central processing unit to receive the display data over the internal communications interface and transmit the display data over the external communications interface.