Patent ID: 8027546

Claim:
An image processing apparatus, comprising: an input device configured to receive image data of a given data size and transmit the image data in N data blocks, with N representing a first given number; an encoder configured to encode the N data blocks transmitted from the input unit; a memory configured to store the N data blocks encoded by the encoder; a first allocator configured to allocate, before encoding, N memory areas of at least one specified memory size within the memory; a data block size determination mechanism configured to determine whether each of the N data blocks is larger than the at least one memory size; a second allocator configured to dynamically allocate an additional memory area within the memory when the determination mechanism determines that one of the N data blocks is larger than the at least one memory size; and a processor configured to retrieve the image data from the memory for processing thereof, wherein the N data blocks are sequentially stored in the memory, the determination mechanism determines that one of the N data blocks is larger than the at least one memory size when a first count is different from a second count, and the second allocator calculates a difference between the first count and the second count to dynamically allocate M additional memory areas, the first count representing a number of data blocks stored in the memory and the second count representing a number of memory areas consumed by the stored data blocks, M representing a number corresponding to the calculated difference.