Patent ID: 7785706

Claim:
A semiconductor wafer comprising the following layers in the given order: a) a monocrystalline substrate wafer ( 1 ) consisting essentially of silicon, b) a first amorphous intermediate layer ( 2 ) comprising an electrically insulating material and having a thickness of 2 nm to 100 nm, c) a monocrystalline first oxide layer ( 3 ) having a cubic Ia-3 crystal structure, a composition of (M 1 2 O 3 ) 1-x (M 2 2 O 3 ) x wherein each of M 1 and M 2 is a metal and wherein 0≦x≦1, and a lattice constant which differs from the lattice constant of the material of the substrate wafer by 0% to 5%, and a monocrystalline second oxide layer ( 4 ) adjacent to the first oxide layer ( 3 ), the second oxide layer ( 4 ) having a cubic Ia-3 crystal structure, a composition of (M 3 2 O 3 ) 1-y (M 4 2 O 3 ) y wherein each of M 3 and M 4 is a metal and wherein 0≦y≦1, y starting with a value y 1 at the boundary to the first oxide layer ( 3 ), varying across the thickness of the second oxide layer ( 4 ) in order to achieve a variation in the lattice constant of the material of the second oxide layer ( 4 ) across its thickness, and ending with a value y 2 at the surface of the second oxide layer ( 4 ), the value y 1 being selected such that the lattice constant of the second oxide layer ( 4 ) at its boundary to the first oxide layer ( 3 ) differs from the lattice constant of the material of the first oxide layer ( 3 ) by 0% to 2%.