Patent ID: 8907425

Claim:
A semiconductor device, comprising: a first MIS transistor, wherein: the first MIS transistor includes: a first gate insulating film formed on a first active region in a semiconductor substrate, a first gate electrode formed on the first gate insulating film, a first sidewall spacer formed on a side surface of the first gate electrode, a first source/drain region of a first conductivity type which is formed in a trench provided in the first active region on a lateral side of the first sidewall spacer, and which includes a silicon compound layer causing a first stress in a gate length direction of a channel region in the first active region, and a stress insulating film which is formed on the first active region to cover the first gate electrode, the first sidewall spacer, and the first source/drain region, and which causes a second stress opposite to the first stress, an uppermost surface of the silicon compound layer is located higher than a surface of the semiconductor substrate located directly under the first gate electrode, a first stress-relief film is formed in a space between the silicon compound layer and the first sidewall spacer, the first stress-relief film is formed on the side surface of the first gate electrode with the first sidewall spacer interposed therebetween, and the first stress-relief film is not in direct contact with the side surface of the first gate electrode.