Patent ID: 8739088

Claim:
A method for designing a circuit comprising: embedding design constraint program code within a first high level circuit component of a high level circuit design within a high level modeling system, wherein the design constraint program code is specific to the first high level circuit component and specifies a high level design constraint and a criterion for applying the high level design constraint; responsive to detecting an execution condition occurring within the high level circuit design, executing the design constraint program code within the high level modeling system; wherein the execution condition comprises detecting a user specified change to the first high level circuit component; and responsive to executing the design constraint program code, determining whether the criterion for applying the high level design constraint is met and, responsive to determining that the criterion is met, applying the high level design constraint to at least one selected high level circuit component of the high level circuit design; translating the high level circuit design into a low level circuit design comprising a low level circuit component derived from the first high level circuit component; automatically generating, using a processor, a low level design constraint from the high level design constraint for the low level circuit component; and storing the low level design constraint in association with the low level circuit design.