Patent ID: 6930012

Claim:
A method of manufacturing a semiconductor memory device, comprising: forming a substrate, the substrate comprising a buried insulating layer formed on a first semiconductor layer and a second semiconductor layer formed on the buried insulating layer; forming a trench to reach the first semiconductor layer through the second semiconductor layer and the buried insulating layer; forming a first insulating film, which contains an impurity, on a side surface and a bottom surface of the trench; removing the first insulating film by isotropic etching on the side surface of the trench at the second semiconductor layer and the buried insulating layer; diffusing the impurity into the first semiconductor layer and forming a first capacitor electrode of a diffusion layer along the side surface and the bottom surface of the trench; removing the first insulating film; forming a capacitor insulating film on the side surface and the bottom surface of the trench; forming a second capacitor electrode on the capacitor insulating film; removing the capacitor insulating film and the second capacitor electrode formed on side surfaces of the second semiconductor layer and the buried insulating layer; forming a second insulating film on the side surface of the trench and the second capacitor electrode; forming a resist film on the second insulating film inside the trench; removing the second insulating film by using the resist film as a mask to be flush with an upper surface of the buried insulating layer; removing the resist film; removing a portion of the second insulating film on the second capacitor electrode, the second insulating film being in contact with the side surface of the buried insulating layer; and forming a connection portion in the trench in the second semiconductor layer and the buried insulating layer and electrically connecting the connection portion to the second capacitor electrode.