Patent ID: 7822906

Claim:
A bridge, comprising: a buffering unit comprising a plurality of buffers; a first master device for outputting a flush request to flush the buffering unit; and a flush request control circuit for recording flushed buffers in the buffering unit in response of the flush request from the first master device, and outputting a flush acknowledge signal to indicate to the first master device that the buffering unit has been flushed in response of that all the plurality of buffers have been flushed after the flush request has been received; wherein the flush request control circuit comprises: a plurality of detection units correspondingly coupled to the plurality of buffers for outputting flush validation signals according to the flushed buffers, respectively; and an output unit for generating the flush acknowledge signal when all the detection units output the flush validation signal; wherein the detection units each comprise: a register for generating a flush signal according to the flush request and an idle signal from a corresponding buffer, to represent that the corresponding buffer has been flushed after the flush request has been received; and a processor for generating the flush validation signal according to the flush signal and the idle signal.