Patent ID: 8487371

Claim:
A system, comprising: a vertical transistor including: a source contact and a drain contact, the source contact and the drain contact being disposed on a same side of the vertical transistor, a gate structure disposed in a trench, a source region adjacent to the trench, a well region disposed adjacent to the trench and adjacent to the source region; a drift region disposed between the well region and a substrate, the system defining a conduction path extending substantially vertically from the drain contact to the substrate, substantially laterally through the substrate, and substantially vertically from the substrate through the drift region to the source contact; a first metal layer including: a first metal source layer coupled to a source region of the vertical transistor, and a first metal drain layer coupled to a drain region of the vertical transistor, the first metal source layer being electrically insulated from the first metal drain layer; and a second metal layer including: a second metal source layer coupled to the source contact, and coupled to the first metal source layer, the second metal source layer being aligned orthogonal to the first metal source layer, and a second metal drain layer coupled to the drain contact and the first metal drain layer, the second metal drain layer being aligned orthogonal to the first metal drain layer, the second metal source layer being electrically insulated from the second metal drain layer.