Patent ID: 7800157

Claim:
A semiconductor device comprising: a semiconductor substrate including a first upper surface; a gate insulating film formed on the first upper surface of the semiconductor substrate; a plurality of gate electrodes that each includes: a floating gate electrode formed on the gate insulating film; an inter-gate insulating film formed on the floating gate electrode; and a control gate electrode formed on the inter-gate insulating film, the control gate electrode including a polycrystal silicon layer located on the inter-gate insulating film and a metal silicide layer formed on the polycrystal silicon layer; and an inter-electrode insulating film formed between the plurality of gate electrodes, wherein each of the control gate electrodes includes an overhung portion that overhangs on a second upper surface of the inter-electrode insulating film, respectively, and wherein an interface between the polycrystal silicon layer and the metal silicide layer is positioned lower than the second upper surface of the inter-electrode insulating film and higher than an interface between the polycrystal silicon layer and the inter-gate insulating film, respectively.