Patent ID: 7598098

Claim:
A method of manufacturing a bonded pair of semiconductor wafers, having an active wafer and a second wafer, by monitoring a reduction in thickness of one of the wafers during manufacturing, the method comprising forming a test structure having a systematic row of trenches in the active wafer, said trenches having different defined widths, said active wafer provided for receiving an active circuit in a later step; bonding the active wafer with a side which holds the test structure onto the second wafer of the semiconductor wafer pair; wherein a targeted thickness of the active wafer after a removal of wafer material corresponds at least substantially to a reference depth of a reference trench in the row of trenches in said test structure, said reference trench neighbored by a shallower and a deeper trench; performing the wafer material removal, commencing from a backside of the bonded active wafer until the reference trench is exposed, and optically detecting said exposure of the reference trench, for monitoring a thickness reduction of the active wafer; and forming at least one active circuit in said active wafer in said later step.