Patent ID: 7898536

Claim:
A display apparatus comprising: a timing controller adapted to receive an image signal and a control signal, the timing controller being operative to generate a first timing control signal, a second timing control signal and an image signal; a memory having N high gamma values and N low gamma values stored therein, wherein N is an integer not less than 2; a selector coupled to the memory and being operative to select one of the N high gamma values and one of the N low gamma values in a predetermined i frame unit in response to a selection signal, wherein i is an integer not less than 1; a gamma reference voltage generator coupled to the selector, the gamma reference voltage generator being operative to output a high gamma reference voltage corresponding to the selected high gamma value and a low gamma reference voltage corresponding to the selected low gamma value; a data driving circuit coupled to the gamma reference voltage generator, the data driving circuit receiving the image signal in synchronization with the first timing control signal and being operative to convert the image signal into a first data voltage based on the high gamma reference voltage and output the first data voltage during a first active period, and to convert the image signal into a second data voltage based on the low gamma reference voltage and output the second data voltage during a second active period; a gate driving circuit being operative in response to the second timing control signal to output a first gate voltage during the first active period and output a second gate voltage during the second active period; and a display panel coupled to the gate driving circuit, the display panel including a plurality of pixels to display an image, each of which comprises a first sub-pixel coupled to receive the first data voltage in response to the first gate voltage and a second sub-pixel coupled to receive the second data voltage in response to the second gate voltage.