Patent ID: 6967881

Claim:
A method of manufacturing a semiconductor integrated circuit including: a plurality of circuit modules; a fuse circuit which has a plurality of nonvolatile memory cells capable of writing therein control information for defect relief, trimming of circuit characteristics or function switching with respect to the plurality of circuit modules and which allows memory information to be electrically read therefrom; a dedicated wiring which allows the memory information of the fuse circuit to be transmitted to the circuit modules; and testing external interface means which makes it possible to output information on the dedicated wiring to the outside of a semiconductor substrate and to externally input data to the dedicated wiring, said method comprising: a first process for supplying control information from the testing external interface means to each of the circuit modules through the dedicated wiring; a second process for confirming an operation of each of the circuit modules in a supplied state of the control information; and a third process for writing control data in the fuse circuit according to the result of confirmation by the second process.