Patent ID: 7725853

Claim:
An information storage medium including a plurality of instructions adapted to direct an information processing device to perform a set of steps, the set of steps comprising: receiving, determining, or estimating a representation for a set of paths of at least a portion of a logic design; receiving or determining maximum and minimum timing constraints for at least a portion of the set of paths of the logic design; determining delays for the portion of the set of paths of the logic design; identifying a set of potentially critical short-path timing paths from the portion of the set of paths of the logic design using the delays, the maximum and minimum timing constraints, and at least a partial ordering of timing paths according to a first function including at least one slack value associated with the set of timing paths and a corner; and revising the logic design representation considering a timing of a subset of the set of potentially critical timing paths, wherein the timing is evaluated based on a weighted average of a set of timing slacks associated with the subset of the set of potentially critical timing paths.