Patent ID: 8871592

Claim:
A method of manufacturing a semiconductor device including a transistor, said method comprising: forming a channel region by implanting impurity ions of a second conductive type into an element forming region that is formed on one side of a substrate and is partitioned by an element isolation insulating film; forming a trench in said channel region formed on said one side of said substrate; covering side faces and a bottom face of said trench with a gate insulating film by forming said gate insulating film on said one side of said substrate; forming a gate electrode so as to bury an inside of said trench; patterning said gate electrode in a predetermined shape; and forming a source region and a drain region by implanting impurity ions of a first conductive type on both sides of said channel region formed on said one side of said substrate in a gate longitude direction, wherein, in said patterning of said gate electrode in a predetermined shape, said gate electrode is formed so as to be exposed also on said substrate outside said trench, wherein said gate electrode formed so as to be exposed is disposed so as to cover upper portions of both ends of said trench in said gate longitude direction and so as to form at least one concave portion having a depth reaching said substrate in a center portion, and wherein said trench includes a plurality of trenches having depths intermittently changing in a gate width direction of said gate electrode.