Patent ID: 8086913

Claim:
An apparatus, comprising: a memory with a redundant area; a repair controller coupled to the memory, the repair controller including a tag random access memory (RAM) to receive an address associated with the memory, the repair controller to store a first plurality of fields, each indicating a type of repair to be performed for at least a portion of memory cells corresponding to a memory address, and a second plurality of fields, each indicating a location of at least one memory cell used to perform the repair; and a comparator to compare at least a portion of an address received from a memory controller with at least a portion of an address received from the tag RAM to generate a control signal based on the second plurality of fields to instruct a selector to select data from either the redundant area or an auxiliary redundant data RAM, wherein the tag RAM is configured to determine the type of repair for a row of the memory, and when the type of repair is a partial row repair, the tag RAM is configured to identify at least one defective column address in the row of the memory.