Patent ID: 7476944

Claim:
A static random access memory (SRAM), comprising: a semiconductor substrate; a buried insulator in a predetermined portion of the semiconductor substrate; a silicon-on-insulator (SOI) region including a semiconductor layer on the buried insulator; a flip-flop circuit in the SOI region, the flip-flop circuit comprising at least two CMOS inverters; and a plurality of pass transistors connected to the flip-flop circuit and on a bulk region of the semiconductor substrate, the bulk region of the semiconductor substrate being a separate region from the SOI region; wherein an active region is defined in a portion of the semiconductor layer including one of the CMOS inverters and extends to the bulk region of the semiconductor substrate including one of the pass transistors such that an output terminal of the one of the CMOS inverters shares a same active region with source/drain terminals of the one of the pass transistors, wherein the active region includes a main part crossing the SOI region, a first branch protruding from the main part and a second branch protruding from the main part in a direction opposite to the first branch and from a different position of the main part from where the first branch protrudes.