Patent ID: 7343436

Claim:
A control system comprising: a system controller comprising a bus arbiter and a non-volatile memory and having only periodically executed functions and passive functions; a bus employing a center arbitration method, wherein a single bus arbiter is connected to a plurality of CPUs via the bus, from which devices can be detached and to which the detached devices can be attached again as power being supplied; and a plurality of CPU boards which execute the same processes synchronously, as devices arranged on said bus, wherein: said system controller control the system to continue processes only by periodically executed functions and passive functions of a hardware structure of the system such that when one of said CPU boards on said bus is down while accessing to said non-volatile memory, said system controller assigns the right to use said bus to other CPU board according to a requirement from said other CPU board; and even if one of the CPU boards is down, the system is restored by detaching said down CPU board from said bus and attaching said detached CPU board to said bus again as power for the whole system being supplied.