Patent ID: 7969773

Claim:
An addressable digital data access computer system, comprising: an addressable digital data access subsystem, comprising a control module including at least one control subcircuit, wherein the control subcircuit has at least one access address table for storing a plurality of access addresses; and an access module including at least one storage medium layer and an electromagnetic induction subcircuit, wherein the electromagnetic induction subcircuit has a plurality of coils and a plurality of magnetizable rods, each rod being partially wound by a coil and corresponding to one of a plurality of regions in the storage medium layer, the control module controlling the plurality of coils through the access module according to the access address table, in order to access digital data stored in the plurality of regions, wherein each region corresponds to one of the plurality of access addresses in the access address table; a microprocessor electrically coupled with the control module, the microprocessor accessing instructions to be executed by it from the storage medium layer via the control module; and at least one input/output (I/O) device electrically coupled with the control module, the I/O device accessing digital data from the storage medium layer via the control module.