Patent ID: 7280066

Claim:
A third-order single-loop multi-bit differential analog-to-digital sigma-delta converter comprising: a first, second and third differential switched-capacitor integrator coupled in cascade; said first differential switched-capacitor integrator receiving as input an analog differential input signal to be converted, said third differential switched-capacitor integrator that is last in the cascade for generating a differential analog output signal, and each differential switched-capacitor integrator comprising a switched-capacitor structure and an operational amplifier coupled thereto; a multi-bit quantizer coupled to said third differential switched-capacitor integrator for receiving the differential analog output signal, and generating a corresponding differential digital output signal of the sigma-delta converter; and a first, second and third negative feedback digital-to-analog converter respectively coupled between said multi-bit quantizer and said first, second and third differential switched-capacitor integrators, each converter receiving as input the differential digital output signal and feeding an analog replica thereof to an input terminal of said operational amplifier of a corresponding differential switched-capacitor integrator; each of said negative feedback digital-to-analog converters coupled to said first and second differential switched-capacitor integrators comprising a bilinear switched capacitor array, and said negative feedback digital-to-analog converter coupled to said third differential switched-capacitor integrator comprising a switched-capacitor array for forming with said respective operational amplifier a differential non-inverting delaying switched-capacitor integrator.