Patent ID: 7846811

Claim:
Process for manufacturing a SOI wafer, comprising: forming, in a monolithic body of semiconductor material having a front face, a plurality of polygonal pillars, each pillar isolated from other pillars at the top side; forming a buried cavity, extending at a distance from said front face and delimiting, with said front face, a surface region of said monolithic body, said surface region being surrounded by a bulk region and forming a flexible membrane suspended above said buried cavity; forming, through said monolithic body, at least one access passage, which reaches said buried cavity; and filling said buried cavity uniformly with an insulating region wherein said insulating region is formed by a single insulating filling material which completely fills the buried cavity; wherein said surface region is continuous and formed by a single portion of semiconductor material, and said buried cavity is contained and completely insulated within said monolithic body; and wherein forming at least one access passage is performed after forming a buried cavity.