Patent ID: 8093652

Claim:
A power device, comprising: a semiconductor substrate of first conductivity having an upper surface and a lower surface; a first electrode terminal coupled to a first conductive region provided proximate the upper surface of the substrate, the first electrode terminal being provided over the upper surface of the substrate; a second electrode terminal coupled to a second conductive region provided proximate the lower surface of the substrate, the second electrode terminal being provided below the lower surface of the substrate; an isolation diffusion region of second conductivity provided at a periphery of the substrate and extending from the upper surface to the lower surface of the substrate, the isolation diffusion region having a first surface corresponding to the upper surface of the substrate and a second surface corresponding to the lower surface; a peripheral junction region of second conductivity formed within the isolation diffusion region, and completely surrounded by the isolation diffusion region, and formed proximate the first surface of the isolation diffusion region; and a passivation layer provided over the upper surface of the substrate, the first surface of the isolation diffusion region, and the peripheral junction region, the passivation layer comprising a polyimide layer and an oxide layer; wherein the peripheral junction region is different than the first conductive region and the second conductive region, and the peripheral junction region is in direct contact with the oxide layer, and wherein the first electrode terminal and the second electrode terminal define a vertical electrical current path therebetween.