Patent ID: 6855629

Claim:
A method of forming a dual damascene wiring pattern, comprising the steps of: forming an etch stop film and an interlayer dielectric film comprising an SiOC:H group material on a substrate having an electrical connection layer formed thereon; forming an anti-reflection layer on the interlayer dielectric film; forming a primary opening by etching the anti-reflection layer and the interlayer dielectric film to expose a surface of the etch stop film; forming a sacrificial film comprising a low dielectric constant material in the primary opening and on the anti-reflection layer; plasma-processing the sacrificial film to densify the sacrificial film; forming a trench photoresist pattern having a width larger than that of the primary opening on the sacrificial film after plasma-processing the sacrificial film; sequentially etching the sacrificial film, the anti-reflection layer and the interlayer dielectric film using the trench photoresist pattern as an etch mask so as to form a secondary opening of a trench shape, and removing the trench photoresist pattern, said secondary opening extending from an upper portion of the primary opening; and removing the sacrificial film remaining, removing the exposed etch stop film and anti-reflection layer, and filling the primary and secondary openings with metal so as to be electrically coupled with the electrical connection layer.