Patent ID: 7190080

Claim:
A semiconductor chip assembly, comprising: a semiconductor chip that includes first and second opposing surfaces, wherein the first surface of the chip includes a conductive pad; a conductive trace that includes a routing line and a pillar, wherein the pillar includes first and second opposing surfaces and tapered sidewalls therebetween, the first surface of the pillar faces away from the routing line, the second surface of the pillar contacts the routing line, and the tapered sidewalls are adjacent to the first and second surfaces of the pillar and slant inwardly towards the first surface of the pillar; a connection joint that electrically connects the routing line and the pad; and an encapsulant that includes first and second opposing surfaces, wherein the first surfaces of the pillar and the encapsulant face in a first direction, the second surfaces of the pillar and the encapsulant face in a second direction opposite the first direction, the chip, the pillar and the encapsulant extend vertically beyond the routing line in the first direction, the pillar is disposed outside a periphery of the chip, the routing line extends laterally from the pillar towards the chip, the chip and the pillar are embedded in the encapsulant, the encapsulant does not cover the first surface of the pillar, and the conductive trace extends through the first surface of the encapsulant.