Patent ID: 7402902

Claim:
A memory device comprising at least two electronic devices, each memory device including: a base having a surface having a first plurality of flip-chip pads thereon and a second plurality of wire-bondable pads, a majority of flip-chip pads of the first plurality of flip-chip pads connected to a majority of the wire bondable pads of the second plurality of wire-bondable pads; a first integrated circuit memory chip having opposing front-side and back-side surfaces, the front-side surface having a plurality of flip-chip bumps thereon connected to the at least one flip-chip pad of the first plurality of flip-chip pads on the surface of the base; a second integrated circuit memory chip having opposing front-side and back-side surfaces, the back-side surface attached to the back-side surface of the first integrated circuit memory chip and the front-side surface having a plurality of bond pads thereon; and at least one connection between at least one bond pad of the plurality of bond pads on the front-side surface of the second integrated circuit memory chip and the at least one wire-bondable pad of the second plurality of wire-bondable pads on the surface of the base.