Patent ID: 8176360

Claim:
A FLASH memory based solid state storage system capable of adapting to the failure of one or more FLASH memory chips comprising: a printed circuit board; a plurality of FLASH memory chips mounted to the printed circuit board, each FLASH memory chip including a plurality of FLASH memory cells arranged to store a plurality of pages of digital data and a chip-level communications bus interface capable of receiving and sending digital data to be stored in, and retrieved from, FLASH memory cells within the FLASH memory chip; and a system controller including a plurality of system communication bus interfaces, each system communication bus interface being coupled by a system communications bus to one or more chip-level communication bus interfaces such that the system controller can provide digital data to and retrieve digital data from memory cells within the one or more FLASH memory chips, the system controller further including an external communications bus interface capable of receiving digital data to be stored within the storage system; wherein the system controller is configured to store data received over the external communications bus in the plurality of FLASH memory chips in the form of page stripes, each page stripe comprising a plurality of pages of data stored in the FLASH memory chips, each of the plurality of pages being stored in a FLASH memory chip that is different from each of the FLASH memory chips in which the other pages of data within the page stripe are stored, the plurality of pages making up the page stripe including a plurality of data pages, each data page storing data initially received over the external communications bus, and further including at least one data protection page containing data that may be used to reconstruct data stored in a data page within the page stripe that becomes corrupted or unavailable; and wherein the system controller is further configured to: detect the failure of at least a portion of a FLASH memory chip in which a data page of a particular page stripe is stored; reconstruct data that was stored within a data page of the particular page stripe using data in the data protection page for the particular page stripe; and store the reconstructed data page as a data page within a new page stripe, wherein the number of data pages within the new page stripe is less than the number of data pages that were in the particular page stripe, and wherein no page of the new page stripe is stored in a memory location within the failed portion of the FLASH memory chip, such that each FLASH memory chip used by the system controller for a given page stripe stores either a page of data or data that may be used to reconstruct data stored in a data page for that given page stripe.