Patent ID: 8822324

Claim:
A method for forming a semiconductor component, the method comprising: forming a cap layer over a last metal line of an inter level dielectric layer; forming an intermediate insulating layer over the cap layer; forming an uppermost insulating layer over the intermediate insulating layer; forming an opening in the cap layer, the intermediate insulating layer and the uppermost insulating layer, wherein the opening exposes a portion of the last metal line, and wherein the opening comprises a sidewall; forming a conductive liner on the exposed portion of the last metal line and the sidewall of the opening; depositing an under bump metallization layer over the conductive liner, wherein depositing the under bump metallization layer comprises depositing multiple layers, and wherein depositing the under bump metallization layer comprises depositing layers comprising Ti/Cu/Ni; and forming a solder bump on the under bump metallization layer and in the opening.