Patent ID: 8063415

Claim:
A semiconductor device having a plurality of aligned standard cells, comprising: a first power supply portion and a second power supply portion are included by the plurality of aligned standard cells in common, wherein a first standard cell as one of said aligned standard cells is a function element, wherein the first standard cell includes a first transistor and a signal line, wherein the first power supply portion formed in the first standard cell includes a first power supply line, a second power supply line, and a third power supply line, wherein the first power supply line extends along a first boundary of the aligned standard cells which are adjacent to each other and is arranged on the first boundary, wherein the second power supply portion extends along a second boundary of the aligned standard cells which are adjacent to each other and is arranged on the second boundary, wherein the second power supply line extends from the first power supply line to an inside of the first standard cell, one end of the second power supply line connected to the first power supply line, and the other end of the second power supply line connected to one end of the third power supply line, wherein the third power supply line extends in a direction parallel to the first boundary, the other end of the third power supply line electrically connected to a source terminal of the first transistor, wherein a first power supply voltage is supplied to the first power supply portion, and a second power supply voltage which is higher than the first power supply voltage is supplied to the second power supply portion, and wherein the signal line is arranged between the first power supply line and the third power supply line.