Patent ID: 7995182

Claim:
An array substrate for a liquid crystal display device, comprising: a substrate; a plurality of gate lines arranged transversely on the substrate; a plurality of data lines disposed orthogonal to the plurality of gate lines; a plurality of thin film transistors formed on the substrate adjacent to intersections of the gate lines and the data lines, each thin film transistor including a gate electrode, a gate insulation layer, an active layer, an ohmic contact layer, a source electrode, and a drain electrode, the source electrode extended from each of the data lines and overlapping a portion of the gate electrode; a plurality of pixel electrodes disposed at pixel regions defined by the intersections of the gate lines and the data lines, each pixel electrode connected to a corresponding one of the drain electrodes; and a metal layer formed on an entire surface of each of the data lines and an entire of a top surface of the source electrode, and at peripheral portions of the drain electrode, wherein the metal layer exposes an entire of side surfaces of the source electrode, wherein the drain electrode and the pixel electrodes are formed from the same material, and wherein the source electrode is positioned between the ohmic contact layer and the metal layer and formed of a transparent conductive material selected from a group including indium-tin-oxide, indium-zinc-oxide, zinc oxide, tin oxide and indium oxide.