Patent ID: 8455943

Claim:
A semiconductor device including a power MISFET, comprising: a semiconductor substrate having a first conductivity type; a semiconductor layer formed over the semiconductor substrate and having the first conductivity type; a channel region of the power MISFET formed in the semiconductor layer and having a second conductivity type opposite to the first conductivity type; a trench penetrating through the channel region and reaching the semiconductor layer; a gate insulating film of the power MISFET formed over an inner wall of the trench; a gate electrode of the power MISFET formed over the gate insulating film and filled in the trench; a source region of the power MISFET formed over the channel region, having the first conductivity type and being contiguous to the trench; an insulating film formed over the gate electrode and the source region; a contact hole formed in the semiconductor layer, arranged apart from the trench and having a depth greater than that of the source region; a body contact region formed below the bottom portion of the contact hole, being contiguous to the channel region and having the second conductivity type; a first metal film formed over the insulating film, filling in the contact hole and electrically connected to the source region and the body contact region; and a second metal film formed over a rear surface of the semiconductor substrate and having function as a drain electrode of the power MISFET, wherein a first semiconductor region is formed below the body contact region, is contiguous to the body contact region and has the second conductivity type, and wherein an impurity concentration of the first semiconductor region is lower than an impurity concentration of the body contact region.