Patent ID: 7144750

Claim:
A method of fabricating a silicon-based microstructure, comprising: depositing in-situ at least one first layer of electrically conductive amorphous silicon doped with a dopant at a temperature of 520 to 580° C. in the presence of silane at a partial pressure of 100 to 5000 mTorr and a dopant-containing gas at a pressure of 0.01 to 50 mTorr to achieve a bulk resistivity of 0.01 to 1000 mohm·cm, said at least one first layer being in compressive stress of −0.01 to −400 Mpa; depositing at least one second layer doped with phosphorus, said at least one second layer being in tensile stress of +0.01 to +400 Mpa; wherein said dopant is selected from the group consisting of arsenic, antimony and bismuth; wherein when said dopant is antimony, said dopant-containing gas is arsine; when said dopant is antimony, said dopant-containing gas is stibine; and when said dopant is bismuth, said dopant-containing gas is bismuthine; and wherein the resulting structure has a residual mechanical stress of less than +/−100 Mpa.