Patent ID: 8648666

Claim:
A multimode frontend circuit comprising first, second and third ports, a first transmission path between the first and second ports, and a second transmission path between the first and third ports, each of the transmission paths comprising: two input/output lines; a first transmission line having one end connected to one of the input/output lines and the other end connected to the other input/output line; a second transmission line having one end connected to the one of the input/output lines and the other end connected to the other input/output line; and one or a plurality of termination switch circuits; wherein: the electrical length of the first transmission line is equal to the electrical length of the second transmission line; a characteristic impedance for an even mode and a characteristic impedance for an odd mode of the first transmission line are constant along the length of the first transmission line; a characteristic impedance for an even mode and a characteristic impedance for an odd mode of the second transmission line are constant along the length of the second transmission line; the characteristic impedance for the even mode of the first transmission line is equal to the characteristic impedance for the even mode of the second transmission line; the characteristic impedance for the odd mode of the first transmission line is equal to the characteristic impedance for the odd mode of the second transmission line; and each of the one or plurality of termination switch circuits comprises a switch and a termination circuit, one end of the switch being connected to one of the first and second transmission lines, the termination circuit being connected to the other end of the switch.