Patent ID: 8294252

Claim:
A semiconductor system in a package comprising: a package substrate, first and second semiconductor substrates, each having first and second major surfaces with a circuit defined in the first major surface, said second semiconductor substrate being positioned on top of said first semiconductor substrate and in mechanical and electrical connection therewith and said first semiconductor substrate being positioned on said package substrate and in mechanical and electrical connection therewith, a plurality of through-silicon-vias extending through a peripheral region of the circuit defined in the first major surface of said first semiconductor substrate between the first and second major surfaces of said first semiconductor substrate and connecting to the circuit in the first major surface, a redistribution layer on the second major surface of the first semiconductor substrate that connects to the through-silicon-vias, and connectors for connecting the redistribution layer to the circuit in the first major surface of the second semiconductor substrate, whereby the circuit in the first major surface of the first semiconductor substrate is connected through the through-silicon-vias, the redistribution layer and the connectors to the circuit in the first major surface of the second semiconductor substrate.