Patent ID: 7624365

Claim:
A semiconductor integrated device, comprising: a first circuit unit to which electric power is supplied from a first power supply wiring and a second power supply wiring; a second circuit unit to which electric power is supplied from a third power supply wiring and a fourth power supply wiring; a first interface circuit unit formed in the first circuit unit; and a second interface circuit unit formed in the second circuit unit, the second interface circuit unit being configured to perform any of inputting and outputting a signal to and from the first interface circuit unit, wherein the second power supply wiring is coupled to the fourth power supply wiring at a node, wherein the second interface circuit unit and the first interface circuit are arranged with respect to each other in an arrangement that reduces a wiring resistance in an electrostatic discharge current path within the semiconductor integrated device, and wherein the arrangement of the second interface circuit and the first interface circuit is independent of a configuration of other circuits within the semiconductor integrated device.