Patent ID: 8713344

Claim:
A method for synchronizing a configuration of series-connected semiconductor memory devices, comprising: initializing the system; and, providing a first clock signal to a first memory device in a configuration of series-connected semiconductor memory devices; and, receiving a second clock signal from a second memory device in the configuration, the second clock signal corresponding to a version of the first clock signal that has undergone processing by a clock synchronizer in at least one of the memory devices in the configuration; and, processing the first and second clock signals to detect a phase difference there between; and, commanding an adjustment to the clock synchronizer in at least one of said memory devices in the configuration based on the phase difference; wherein the processing further includes obtaining the phase difference between a master input clock signal and a master output clock signal; wherein the processing compares the phase difference between the master input clock signal and the master output clock signal to a predetermined acceptable value and ends the process if the phase difference is acceptable.