Patent ID: 7638161

Claim:
A method to control nitride consumption during integrated circuit manufacture, the method comprising: placing a substrate having a nitride layer in a reaction chamber; providing a silicon source, an oxygen source, a boron source and a phosphorous source; injecting the silicon, oxygen and boron sources into the reaction chamber while delaying injecting the phosphorous source in the reaction chamber for a predetermined period of time to deposit a boron-rich silicate glass film over the nitride layer; injecting a predetermined amount of the phosphorous source in the reaction chamber following the predetermined period of time while continuing injecting the silicon, oxygen and boron sources into the reaction chamber to deposit a borophosphosilicate film over the boron-rich silicate glass film, wherein the borophosphosilicate glass layer comprises approximately 2-9 weight percent of phosphorous; and annealing the borophosphosilicate glass layer to consume at least a portion of the nitride layer, wherein the predetermined period of time for delaying injecting the phosphorous source and the predetermined amount of the phosphorous source are selected relative to the desired nitride layer consumption.