Patent ID: 7384840

Claim:
A method of making a diode having a PN junction, the method comprising: providing a substrate having a doped region formed in a bulk region of the substrate; disposing a dielectric material over the doped region of the substrate; forming a first hole and a second hole in the dielectric material, the first hole and the second hole exposing the doped region; depositing a first polysilicon plug and a second polysilicon plug over the doped region, the first polysilicon plug being disposed in the first hole and the second polysilicon plug being disposed in the second hole, wherein the second polysilicon plug is doped opposite the first polysilicon plug such that the PN junction of the diode is formed between the first or second polysilicon plug and the doped region of the substrate, the PN junction having a cross-sectional area generally defined by the first or second hole adjacent the PN junction; forming a diffusion resistant layer between the doped region and at least one of the first or second polysilicon plugs such that the diffusion resistant layer is substantially located at the PN junction of the diode and inhibits diffusion of dopants between the first or second polysilicon plug and the doped region; depositing a first conductive material over the first polysilicon plug in the first hole and a second conductive material over the second polysilicon plug in the second hole; and depositing a third conductive material over the first conductive material and a fourth conductive material over the second conductive material, the third conductive material being coupled to the first conductive material and the fourth conductive material being coupled to the second conductive material.