Patent ID: 7486208

Claim:
A method for encoding a data input sequence of m bits into an output sequence codeword of m+1 bits, where m is an integer multiple of an ECC symbol size s, the method comprising the steps of: receiving a data stream of unencoded m-bit input sequences; dividing each m-bit input sequence into a first block of n bits and a second block of m−n unencoded bits, where n is an integer multiple of s; encoding the first block of n bits into a first set of n+1 encoded bits, wherein at least one of P 1 subblocks of the first set of n+1 bits satisfies a G constraint, an M constraint and an I constraint; mapping in a one-to-one manner the first set of n+1 encoded bits into a second set of n+1 encoded bits wherein, at least one of P 2 subblocks of the second set of n+1 bits gives rise to at least Q 1 transitions after 1/(1+D 2 ) precoding; dividing the second set of n+1 encoded bits into P 3 encoded subblocks; interleaving the P 3 encoded subblocks among (m−n)/s unencoded symbols so as to form the (m+1)-bit output sequence codeword; and storing the output sequence codeword on a data storage medium.