Patent ID: 8471806

Claim:
A display panel drive circuit, comprising: a plurality of circuit blocks each of which includes a former circuit and a latter circuit by which the former circuit is followed, and in each of the plurality of circuit blocks a signal is transmitted from the former circuit to the latter circuit, the signal including a plurality of video signals, the former circuit including former signal circuits corresponding to the plurality of video signals, respectively, the latter circuit including latter signal circuits corresponding to the plurality of video signals, respectively, each of the former signal circuits including first latch circuits whose number is equal to a number of bits of a corresponding one of the plurality of video signals, each of the latter signal circuits including second latch circuits whose number is equal to the number of bits of a corresponding one of the plurality of video signals; inter-block shared wires each of which allows respective two of the circuit blocks adjacent to each other to be connected to each other, a signal transmission from the former circuit to the latter circuit in one of the two circuit blocks and a signal transmission from the former circuit to the latter circuit in the other of the two circuit blocks being carried out in a time division manner, via a corresponding one of the inter-block shared wires, each of the inter-block shared wires including shared wires for the plurality of video signals, the plurality of video signals being inputted to the corresponding former signal circuits, and being transmitted to the corresponding latter signal circuits via the corresponding discriminatingly-shared wires, respectively, each of the discriminatingly-shared wires including wires whose number is equal to the number of bits of a corresponding one of the plurality of video signals; and switch circuits provided between the former signal circuits and the discriminatingly-shared wires, respectively, the switch circuits, provided between the former signal circuits belonging to odd-numbered ones of the plurality of circuit blocks and the discriminatingly-shared wires, respectively, being connected to a first control signal line, and the switch circuits, provided between the former signal circuits belonging to even-numbered ones of the plurality of circuit blocks and the discriminatingly-shared wires, respectively, being connected to a second control signal line.