Patent ID: 6916712

Claim:
A process for forming an improved trench MOS-gated device, said process comprising: (a) forming a doped upper layer on a semiconductor substrate, said upper layer having an upper surface and an underlying drain region; (b) forming a well region having a first polarity in said upper layer, said well region overlying said drain region; (c) forming a gate trench mask on said upper surface of said upper layer; (d) forming a plurality of gate trenches extending from the upper surface of said upper layer through said well region to said drain region, said gate trenches having sidewalls and floors; (e) covering said sidewalls and floors with a layer of dielectric material; (f) forming gate electrodes in the trenches to a selected level substantially below the upper surface of said upper level with a conductive gate material, (g) removing said trench mask from the upper surface of said upper layer; (h) forming an isolation layer of dielectric material on the upper surface of said upper layer and over said dielectric material covering said sidewalls within said gate trench, said isolation layer overlying said gate material and substantially filling said trench; (i) removing said isolation layer from the upper surface of said upper layer, a portion of said isolation layer remaining within and substantially filling said trench, and having an upper surface that is proximate to and slightly below the upper surface of said upper layer to increase source contact areas and reduce on resistance, (j) implanting the entire upper surface of the substrate and diffusing into the surface of the substrate source dopants having a second polarity to form a plurality of heavily doped source regions that extend into the substrate along the sides of the trenches; (k) implanting and diffusing into the surface a plurality of heavily doped body regions having a first polarity, said body regions overlying the drain region in said upper layer; and (l) forming a metal contact to said body and source regions over the upper surface of said upper layer.