Patent ID: 7870178

Claim:
An apparatus for accessing memory, the apparatus comprising: a multiplier circuit configured to compute complex multiplication for computation of a discrete Fourier transform, wherein the multiplier circuit has multiple pairs of real and imaginary outputs, wherein each pair of outputs provides products for a particular frequency bin of the discrete Fourier transform computation; an integrate and dump control circuit configured to sequence the start of a plurality of coherent integration memories and control outputting from the plurality of coherent integration memories in sequence, the integrate and dump control circuit further configured to reset a memory location after the memory location has been accessed, wherein each pair of the coherent integration memories is coupled to a real output and an imaginary output of the multiplier circuit to separately integrate real products and imaginary products; and a multiplexer circuit coupled to the plurality of coherent integration memories, the multiplexer circuit configured to select coherent integration memories that are outputting data.