Patent ID: 8039389

Claim:
A method for forming a transistor, comprising: providing a semiconductor substrate; forming an insulating layer over the semiconductor substrate, wherein the insulating layer is for use as a gate dielectric; forming a conductive layer over the insulating layer; forming an organic anti-reflective coating (ARC) layer over the conductive layer; depositing a silicon oxide cap layer using a organosilane based precursor over the organic ARC layer; depositing a photoresist layer over the silicon oxide cap layer; patterning the photoresist layer to form a patterned photoresist structure; after the patterning, etching the silicon oxide cap and the organic ARC layer using the patterned photoresist structure as a mask; thinning the ARC layer to form a thinned organic ARC layer etching the conductive using the thinned organic ARC layer as a mask to form a gate from the conductive layer; and forming a source and a drain in the semiconductor substrate, wherein the source is on a first side of the gate and the drain is on a second side of the gate.