Patent ID: 7994589

Claim:
A semiconductor device comprising: an element formed on a substrate in a chip region; a multilayer structure including a plurality of dielectric films formed on the substrate; a seal ring structure formed through the multilayer structure in a peripheral part of the chip region and surrounding the chip region; and an insulating film formed on the multilayer structure in which the seal ring structure is provided, wherein the insulating film has an opening on a top of the seal ring structure, a cap layer is formed in the opening to be connected to the seal ring structure, the plurality of dielectric films includes a First dielectric film and a second dielectric film, the seal ring structure includes one or more first seal vias in the first dielectric film and one or more second seal vias in the second dielectric film, the first dielectric film is formed between the substrate and the second dielectric film, a number of first seal vias is greater than a number of second seal vias, the second seal vias have a length that is greater than a length of the first seal vias, the seal ring structure includes a first seal ring surrounding the chip region and a second seal ring surrounding the first seal ring, the insulating film has a first opening on a top of the first seal ring and a second opening on a top of the second seal ring, the cap layer includes a first cap layer and a second cap layer, the first cap layer is formed in the first opening to be connected to the first seal ring, and the second cap layer is formed in the second opening to be connected to the second seal ring.