Patent ID: 8017485

Claim:
A method of fabricating a semiconductor device, comprising: forming a first dielectric layer, a data storage layer, and a second dielectric layer, which are sequentially stacked, over a semiconductor substrate; forming a mask over the second dielectric layer, the mask having a first opening exposing a first region of the second dielectric layer; forming a gate electrode filling at least a portion of the first opening in the mask; exposing a second region of the second dielectric layer by partially removing the mask, the second region being spaced apart from the first region, and the partially removed mask having inclined sidewalls which narrow from a lower region of the mask towards an upper region of the mask; and forming a second dielectric pattern and a data storage pattern by removing portions of the second dielectric layer and the data storage layer in the second region, the second dielectric pattern having a greater width than a lower surface of the gate electrode.