Patent ID: 8441286

Claim:
An integrated circuit having a four logic state voltage to two output decompressor circuit comprising: A. a threshold detector having a logic input receiving one of four logic states represented by different voltages, a voltage source lead and a ground lead, and first, second, and third voltage state outputs; and B. an output decoder including: i. a first transmission gate having a first terminal connected to the first voltage state output, a control gate connected to the second voltage state output, and a second terminal; ii. a second transmission gate having a first terminal connected to the third voltage state output, a control gate connected to the second voltage state output, and a second terminal; iii. first complementary transistors forming a first two-state data output driver connected between an output voltage and ground, the first complementary transistors each having gates connected to the second terminals of the first and second transmission gates and a common output; and iv. second complementary transistors forming a second two-state output driver connected between the output voltage and ground, the second complementary transistors each having gates connected to the second voltage state output, and a common output.