Patent ID: 7391054

Claim:
A semiconductor device comprising: a semiconductor film formed on an insulating surface; a channel forming region in the semiconductor film; a gate insulating film formed on the semiconductor film; a gate electrode formed over the channel forming region with the gate insulating film interposed therebetween; an insulating film in contact with an upper surface and side surfaces of the gate electrode; a pair of side walls adjacent to the side surfaces of the gate electrode with the insulating film interposed therebetween; a pair of first impurity regions doped with an impurity element at a first concentration and formed in the semiconductor film with the channel forming region extending therebetween wherein the pair of side walls overlap the pair of first impurity regions; a pair of second impurity regions doped with an impurity element at a second concentration greater than the first concentration and formed in the semiconductor film adjacent to the pair of first impurity regions; and a pair of third impurity regions doped with an impurity element at a third concentration greater than the second concentration and formed in the semiconductor film with the pair of second impurity regions extending between the pair of first impurity regions and the pair of third impurity regions, wherein the pair of side walls do not overlap the pair of second impurity regions and third impurity regions, wherein a portion of the first impurity regions overlaps the gate electrode.