Patent ID: 7120881

Claim:
A computer-aided wiring graphic verification method for verifying wiring intervals in wiring graphic data for wiring masks including vertical and horizontal wiring and slanted wiring created from layout data for a circuit design, the method comprising: an edge extraction step, by an edge extraction unit, extracting vertical and horizontal wiring edges and slanted wiring edges from overall wiring graphics; a wiring width classification step, by a wiring width classification unit, executing a scaling process for the overall wiring graphics and classifying the wiring graphics into wiring width ranges which are divided by a predefined reference wiring width; a vertical and horizontal wiring edge extraction step, by a vertical and horizontal wiring edge extraction unit, extracting the vertical and horizontal wiring edges which are in contact with graphics classified into the wiring width ranges; a vertical and horizontal wiring interval verification step, by a vertical and horizontal wiring interval verification unit, verifying intervals between the vertical and horizontal wiring edges and opposed edges to be verification counterparts based on a vertical and horizontal reference interval for each wiring width range; a slanted wiring edge extraction step, by a slanted wiring edge extraction unit, extracting slanted wiring edges which are in contact with graphics classified into the wiring width ranges; and a slanted wiring interval verification step, by a slanted wiring interval verification unit, verifying intervals between the slanted wiring edges and opposed edges to be verification counterparts based on a slanted reference interval for each wiring width range.