Patent ID: 7454573

Claim:
An apparatus comprised of a computer processor configured for executing a computer program stored in computer memory so as to effect cache management, said apparatus comprising: an arrangement for displacing data from a cache block; an arrangement for ascertaining a new cache location for displaced data; wherein said ascertaining arrangement determines the suitability of one or more candidates for a new cache location via at least one of: determining a cost of re-fetching the displaced data, determining a likelihood of future reference to the displaced data, and determining whether a candidate is able to retain the displaced data; wherein said ascertaining arrangement determines the suitability of one or more candidates for a new cache location via determining a likelihood of future reference to the displaced data; and wherein said ascertaining arrangement employs a decay counter corresponding to each candidate cache block to determine a likelihood of future reference to the displaced data; and wherein said ascertaining arrangement employs a residency counter per congruence class to determine a likelihood of future reference to the displaced data; and wherein the likelihood of future reference to displaced data corresponds to a threshold being reached in the residency counter; and wherein the residency counter threshold is 2 n−1 , where n represents a count of instances in which a cache block belonging to a corresponding congruence class is displaced before the decay counter reaches a predetermined decay threshold.