Patent ID: 7592697

Claim:
A microelectronic package comprising: a chip stack that includes: a substrate; a first die over the substrate and a second die over the first die; a first underfill layer between the substrate and the first die; and a second underfill layer between the first die and the second die; a first fluidic microchannel system in the chip stack, the first fluidic microchannel system comprising a first fluid inlet and a first fluid outlet connected to each other by a first fluidic passage; and a second fluidic microchannel system in the chip stack, the second fluidic microchannel system comprising a second fluid inlet and a second fluid outlet connected to each other by a second fluidic passage, wherein the first fluidic passage is entirely contained within the substrate and the first fluid inlet and the first fluid outlet are both located at a first side of the substrate, and wherein the second fluidic passage extends through the substrate, the first underfill layer, and the first die and into the second underfill layer.