Patent ID: 7067879

Claim:
A BCD device including integrated CMOS and trench DMOS transistors, comprising: a vertical trench region formed into an epitaxial layer on a substrate, the vertical trench region extending from a first surface of the epitaxial region the epitaxial layer including at least one implant region and being capable of serving as a drain region for the trench DMOS transistor near an end of the vertical trench region away from the first surface; a region of doped polysilicon in the vertical trench region acting as a gate electrode for the trench DMOS transistor, the vertical trench region having a gate portion and a drain contact portion; a heavily doped region near the first surface of the epitaxial layer and adjacent the trench region, the heavily doped region acting as a source region for the trench DMOS transistor; a p-body region between the source region and drain region, and adjacent the trench region, acting as a channel of the trench power transistor whereby current flows between the source and the drain in a direction substantially away from the first surface; and at least one CMOS transistor formed in a layer on the substrate and electrically connected to the trench DMOS transistor.