Patent ID: 7973369

Claim:
A semiconductor device comprising: a positive channel metal oxide semiconductor (PMOS) transistor formed in a first region of a workpiece having a first fin, the PMOS transistor including a first gate dielectric disposed over the first fin and a first gate electrode disposed over the first gate dielectric, the first gate electrode comprising a first layer of conductive material and a first layer of semiconductive material disposed over the first layer of conductive material, wherein the first layer of semiconductive material comprises a thickness of about 50 Angstroms or less; and a negative channel metal oxide semiconductor (NMOS) transistor formed in a second region of the workpiece having a second fin, the second region being proximate the first region of the workpiece, the NMOS transistor including a second gate dielectric disposed over the second fin and a second gate electrode disposed over the first gate dielectric, the second gate electrode comprising a second layer of conductive material and a second layer of semiconductive material disposed over the second layer of conductive material, wherein the second layer of semiconductive material comprises a thickness of about 50 Angstroms or less.