Patent ID: 7885092

Claim:
A semiconductor storage device comprising: a bit line; a first word line; a second word line; a first inverter in which one terminal of a first conductive-type first load transistor is connected to one terminal of a second conductive-type first driver transistor and a junction point therebetween forms a first node; a second inverter in which one terminal of a first conductive-type second load transistor is connected to one terminal of a second conductive-type second driver transistor and a junction point therebetween forms a second node; a first write transistor one terminal of which is connected to the other terminal of the first load transistor and the other terminal of which is connected to a power supply voltage; a second write transistor one terminal of which is connected to the other terminal of the first driver transistor and the other terminal is connected to a reference potential; and an access transistor which is a second conductive-type, one terminal of which is connected to the first node and the other terminal of which is connected to the bit line, wherein control terminals of the first load transistor and the first driver transistor are connected to the second node, wherein control terminals of second load transistor and the second driver transistor are connected to the first node, wherein a control terminal of the first write transistor and a control terminal of the access transistor are connected to the first word line; and wherein a control terminal of the second write transistor is connected to the second word line.