Patent ID: 7638870

Claim:
An integrated circuit package comprising: an integrated circuit die comprising N adjacent pads, where N is an integer greater than three; a substrate comprising a first pair of traces including first and second traces and a second pair of traces including third and fourth traces, wherein said first, second, third and fourth traces include first ends that are spaced from said integrated circuit die and second ends that are adjacent to said integrated circuit die, wherein said first and second pairs of traces carry differential signals, wherein said third trace of said second pair of traces has a first polarity and said fourth trace of said second pair of traces has a second polarity, and wherein said third trace is located on one side of said fourth trace at said first end and is located on an opposite side of said fourth trace at said second end, wherein said third trace crosses said fourth trace, and wherein said fourth trace comprises a middle section that communicates with said first and second ends of said fourth trace through first and second vias; and N connections that independently connect said second ends to N pads.