Patent ID: 8578382

Claim:
A method comprising: collecting data for a plurality of events, each of the plurality events associated with at least one of a plurality of software threads being processed by a processor, wherein the data for each of the plurality of events includes a value of an associated clock cycle counter and wherein the data is collected upon occurrence of the event and stored at a first-in-first-out (FIFO) buffer, wherein the data is correlated by one of: starting each of a plurality of clock cycle counters associated with the plurality of software threads at a common time; and logging a synchronizing event within each of the plurality of software threads upon occurrence of the synchronizing event, wherein the synchronizing event includes an execution start of one of the plurality of software threads; outputting the data from a trace port of the FIFO buffer to a debugging device in response to a count indicated by at least one clock cycle counter of the plurality of clock cycle counters reaching a count threshold that is less than a count capacity associated with the at least one clock cycle counter; and resetting each of the plurality of clock cycle counters in response to outputting the data.