Patent ID: 7511648

Claim:
Reconfigurable circuitry in a hybrid delta-sigma/SAR ADC (analog-to-digital) circuit for converting an input voltage to a digital result, the reconfigurable circuitry comprising: an integrator including: an amplifier; a plurality of input capacitors and first and second integrating capacitors; and a plurality of switches for selectively coupling the plurality of input capacitors and the first and second integrating capacitors between various terminals of the amplifier and input terminals of the integrator to effectuate operation of the hybrid delta-sigma/SAR ADC in delta-sigma ADC and SAR ADC modes thereof; a comparator having an input coupled to an output of the integrator, an output of the comparator being coupled to MSB/LSB combination logic of the hybrid delta-sigma/SAR ADC circuit; digital control circuitry coupled to control electrodes of the plurality of switches for controlling the plurality of switches by performing a plurality of cycles of SAR ADC operation for generating each of one or a plurality of SAR bits; and the digital control circuitry creating an entire reference voltage value equal to the sum of a first voltage and a second voltage, a first cycle including multiplying a residue voltage of the integrator by 2, a second cycle integrating the second voltage in a first direction by means of the integrator if the comparator changes state or in a second direction opposite to the first direction if the comparator does not change state, and a third cycle integrating the first voltage in a direction that causes the integrator output voltage to equal either 2Ã—Vresidueâˆ’Vref or 2Ã—Vresidue+Vref, wherein Vresidue is a residue voltage which is an output voltage of the integrator at the end of a preceding cycle and Vref is equal to the entire reference voltage value.