Patent ID: 7774932

Claim:
A circuit board process, comprising: providing a plurality of first carriers, and forming a first conductive layer on each of the first carriers, wherein the first conductive layer has a plurality of first concave structures; providing a first dielectric layer, wherein the first dielectric layer has a first surface and a second surface; respectively laminating a first carrier with the first conductive layer formed on the first surface and the second surface of the first dielectric layer, wherein the first conductive layer is located between the first dielectric layer and the respective first carrier, and a portion of the first conductive layer is embedded in the first surface and the second surface of the first dielectric layer; removing the first carriers; removing the first conductive layer corresponding to at least one of the first concave structures to expose a portion of the first dielectric layer; removing the first dielectric layer exposed by the first conductive layer to form a first opening; forming a second conductive layer on the inner wall of the first opening, wherein the second conductive layer is electrically connected to the first conductive layers on both sides of the first dielectric layer; and removing the first conductive layers on the first surface and the second surface such that a first circuit layer is remained on the first surface and second surface of the first dielectric layer.