Patent ID: 8724735

Claim:
A quadrature modulator that corrects quadrature modulation errors included in a quadrature-modulated signal, comprising: a quadrature modulation unit that receives a baseband signal including an in-phase component and a quadrature component, modulates two carrier wave signals which are orthogonal to each other using the baseband signal to obtain the quadrature-modulated signal, and outputs the quadrature-modulated signal; a quadrature modulation error calculating unit; and an error correcting unit, wherein the quadrature modulation errors include a gain balance error indicating that the gains of the in-phase component and the quadrature component are different from each other, a zero offset error indicating the offsets of an in-phase component axis and a quadrature component axis from the origins of each axis, and an orthogonality error indicating the deviation of orthogonalities of the in-phase component axis and the quadrature component axis, the quadrature modulation error calculating unit calculates the gain balance error, the zero offset error, and the orthogonality error included in the quadrature modulation errors on the basis of the power of the quadrature-modulated signal output from the quadrature modulation unit when the baseband signal in which the in-phase component and the quadrature component are predetermined DC voltages is received, and the error correcting unit corrects the baseband signal such that the quadrature modulation errors calculated by the quadrature modulation error calculating unit are removed, wherein the error correcting unit includes: a first multiplier that multiplies the in-phase component of the input baseband signal by a gain balance correction value for removing the gain balance error of the in-phase component; a second multiplier that multiplies the quadrature component of the input baseband signal by a gain balance correction value for removing the gain balance error of the quadrature component; a third multiplier that multiplies the multiplication result of the second multiplier by an orthogonality correction value for removing the orthogonality error; a fourth multiplier that multiplies the multiplication result of the first multiplier by the orthogonality correction value; a first adder that adds the multiplication result of the first multiplier and the multiplication result of the third multiplier; a second adder that adds the multiplication result of the second multiplier and the multiplication result of the fourth multiplier; a third adder that adds the addition result of the first adder and a zero offset correction value for removing the zero offset error of the in-phase component and outputs the addition result to the quadrature modulation unit; and a fourth adder that adds the addition result of the second adder and a zero offset correction value for removing the zero offset error of the quadrature component and outputs the addition result to the quadrature modulation unit.