Patent ID: 8558226

Claim:
A thin film transistor substrate with a plurality of pixels arrayed in matrix shape, each of said pixels comprising: a thin film transistor including: a semiconductor film disposed in a plurality of portions on a substrate, a source electrode and a drain electrode which are disposed, on said semiconductor film of a first part on said substrate, in contact with the semiconductor film while being spaced from each other, and including a first conductive film, a gate insulating film which includes an insulating film and coats said semiconductor film, said source electrode and said drain electrode, and a gate electrode which is disposed across said source electrode and said drain electrode via said gate insulating film and including a second conductive film; an auxiliary capacitance electrode which is disposed on said semiconductor film of a second part on said substrate while in contact with said semiconductor film, and including said first conductive film; a source line which has said semiconductor film in a lower layer thereof, extends from said source electrode, and includes said first conductive film; a gate line which extends from said gate electrode and includes said second conductive film; a pixel electrode which is electrically connected to said drain electrode, and including said second conductive film; and an auxiliary capacitance electrode connecting line which is electrically connected to said auxiliary capacitance electrode, electrically connects said auxiliary capacitance electrode of one pixel to said auxiliary capacitance electrode of each adjacent pixel, and includes said second conductive film, wherein said auxiliary capacitance electrode and said source line are coated by said insulating film, and said gate line, said pixel electrode and said auxiliary capacitance electrode connecting line are disposed on said insulating film.