Patent ID: 7999320

Claim:
A semiconductor structure comprising: a semiconductor-on-insulator (SOI) substrate including a top semiconductor layer, a buried insulator layer, and a bottom semiconductor layer having a doping of a first conductivity type; at least one field effect transistor located on said top semiconductor layer; a shallow trench isolation structure laterally abutting said at least one field effect transistor; a doped semiconductor region embedded in said bottom semiconductor layer and abutting said buried insulator layer and having a doping of a second conductivity type, wherein said second conductivity type is the opposite of said first conductivity type, wherein a portion of said doped semiconductor region underlies a portion of said at least one field effect transistor; and at least one conductive via of unitary construction extending from a top surface of a middle-of-line (MOL) dielectric layer through said MOL dielectric layer, said shallow trench isolation structure, said buried insulator layer, and to a top surface of said doped semiconductor region, and laterally surrounding an entirety of said at least one field effect transistor.