Patent ID: 7163850

Claim:
A method for manufacturing bottom gate-type thin-film transistors on a transparent insulating substrate, comprising: forming a first gate electrode and a second gate electrode on a transparent substrate such that said second gate electrode is wider than said first gate electrode; forming a gate insulating film on said first and second gate electrodes; forming a semiconductor layer on said gate insulating film; forming a first mask with a first resist film having openings above both sides of said first gate electrode and doping impurities using said first mask, wherein a width of a portion of said first resist film above said first electrode is larger than a width of said first gate electrode; removing said first resist film without performing heat treatment; forming a second mask with a second resist film having openings above both sides of said second gate electrode and doping impurities using said second mask, wherein a width of a portion of said second resist film above said second gate electrode is smaller than a width of said second gate electrode; removing said second resist film without performing heat treatment; and forming an interlayer insulating film on said semiconductor layer, wherein said interlayer insulation film directly contacts said semiconductor layer in a part above each of said first and second gate electrodes, wherein said first and second masks are configured and dimensioned to prevent impurity doping to a channel region.