Patent ID: 8053359

Claim:
A method for processing a semiconductor structure defining a metallization layer which results in said metallization layer being substantially free of damage comprising the steps of: capping a top surface of said semiconductor structure that defines said metallization layer with a thin stop layer, wherein said thin stop layer comprises an organic material; forming a dielectric layer over said thin stop layer; patterning said dielectric layer to expose at least one area wherein said thin stop layer is exposed, wherein said step of patterning said dielectric layer is performed according to a patterned resist layer, said patterned dielectric layer defining a layout for an upper level of metallization, and wherein said step of patterning said dielectric layer comprises: patterning an upper portion of said dielectric layer using a process gas comprising O 2 and F 2 ; and patterning a lower portion of said dielectric layer using etchant gases free from oxygen; and removing said exposed thin stop layer to expose a top surface of said metallization layer using etchant gases free from oxygen, so that said metallization layer is substantially free of damage, wherein said step of removing said exposed thin stop layer further comprises removing said patterned resist layer.