Patent ID: 8508211

Claim:
A system for a stacked ΔV BE generator for generating a ΔV BE , comprising: an error amplifier configured to generate an output based on an error signal; a first stack of the ΔV BE generator for producing a first ΔV BE , the first stack being coupled to the error amplifier to form a closed loop and including a first pair of transistors; a second stack of the ΔV BE generator for producing a second ΔV BE , the second stack being coupled to the first stack and including a second pair of transistors, a first resistor at which the first ΔV BE is formed, the first resistor being coupled between a base of a first transistor in the first pair and a base of a first transistor in the second pair, and a second resistor at which the second ΔV BE is formed, the second resistor being coupled between a base of a second transistor in the first pair and a base of a second transistor in the second pair, wherein the ΔV BE is determined as the sum of first voltage across the first resistor and second voltage across the second resistor.