Patent ID: 8618856

Claim:
A latch device comprising: a driver comprising an input to accept a binary driver input signal, an input to accept a clock signal, an input to accept a shadow-Q signal, and an output to supply a binary Q signal equal to an inverse of the driver input signal, in response to the driver input signal, the shadow-Q signal, and the clock signal, a first clocked inverter circuit having an input to accept the driver input signal, an input to accept the clock signal, and an output to supply the Q signal, and a second clocked inverter circuit having an input to accept the shadow-Q signal, an input to accept the clock signal, and an output to supply the Q signal; and a shadow latch having an input to accept the driver input signal, an input to accept the clock signal, and an output to supply the shadow-Q signal equal to an inverted Q signal, in response to the driver input signal and clock signal.