Patent ID: 8857050

Claim:
A method comprising: providing a circuit board having an outer surface, the outer surface configured with a plurality of discrete electrical components that are manufactured independently of one another; coating the outer surface and the plurality of discrete electrical components with a protective dielectric layer, wherein the protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter 2 /day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 10 15 ohm-centimeter, and a defect density less than 0.5/centimeter 2 ; and coating the protective dielectric layer with a dielectric layer, the dielectric layer comprising a dielectric material having a modulus of elasticity less than 3.5 Giga-Pascal (GPa), a dielectric constant less than 2.7, a dielectric loss less than 0.002, a breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), a temperature stability to 300° Celsius, a defect density less than 0.5/centimeter, and wherein the dielectric material is pinhole free in films greater than 50 Angstroms, and capable of being deposited conformally over and under 3D structures with a thickness uniformity less than or equal to 10%.