Patent ID: 8026615

Claim:
An IC package comprising: a substrate having a top surface, a bottom surface, a first interconnecting finger and a second interconnecting finger disposed on the top surface, wherein the top surface includes a die-attaching area; a die-attaching layer formed on the die-attaching area on the top surface of the substrate; a chip disposed on the top surface of the substrate and attached to the die-attaching area by the die-attaching layer; at least one bonding wire connecting the first interconnecting finger to the second interconnecting finger; a plurality of electrical connecting components electrically connecting the chip to the substrate; wherein at least a portion of the bonding wire is encapsulated in the die-attaching layer; wherein the first interconnecting finger and the second interconnecting finger are located outside the die-attaching area; wherein the die-attaching layer is comprised of a resin containing spacer balls.