Patent ID: 7342518

Claim:
A digital rate converter comprising: a first interpolator including an input, the input receiving a data signal at a first sampling rate, the first sampling rate is based on a first clock signal, the first interpolator having an output to provide a data signal at a second sampling rate, the second sampling rate being greater than the first sampling rate as per an upsampling factor; a buffer including a plurality of buffer positions and an input coupled to the output of the first interpolator to receive the data signal provided by the output; selection circuitry coupled to the buffer; a second interpolator coupled to the selection circuitry, the selection circuitry providing values of a subset of buffer positions of the plurality of buffer positions to the second interpolator dependent on a position indicator, the second interpolator having a data output for providing a data output signal at a third sampling rate, the third sampling rate is based on a second clock signal, wherein the first clock signal and the second clock signal are independent of each other, wherein the output of the second interpolator provides an output value dependent upon a fractional indicator; and a digital sampling positioner, the digital sampling positioner including a first output for providing the position indicator and a second output for providing the fractional indicator.