Patent ID: 8049553

Claim:
A high-voltage complementary metal-oxide semiconductor (CMOS) charge pump, comprising: a first charge pump configured to double a supply voltage based on an input clock signal and a complementary input clock signal which have reversed phases to each other; a level shifter configured to double voltage levels of the input clock signal and the complementary input clock signal based on an output signal and a complementary output signal of the first charge pump as power sources, to thereby output a doubled-output clock signal and a doubled-complementary output clock signal; and a second charge pump configured to double voltage levels of the output signal and the complementary output signal based on the doubled-output clock signal and the doubled-complementary output clock signal from the level shifter, wherein the second charge pump comprises: a fifth NMOS transistor, including a drain coupled to an output node a source coupled to a first node, and a gate coupled to a second node; a sixth NMOS transistor, including a drain coupled to a complementary output node, a source coupled to the second node, and a gate coupled to the first node; a third PMOS transistor, including a source coupled to the first node, a drain coupled to a final output terminal, and a gate coupled to the second node; a fourth PMOS transistor, including a source coupled to the second node, a drain coupled to the final output terminal, and a gate coupled to the first node; a third flying capacitor connected between the first node and a doubled-clock output node; and a fourth flying capacitor connected between the second node and a doubled-complementary clock output node.