Patent ID: 7054982

Claim:
A fieldbus interface board connected with a fieldbus line, the fieldbus interface board comprising: a main control unit controlling an overall operation of the board; a main memory inputting and outputting data required for the operation of the main control unit, the main memory being controlled by the main control unit; a fieldbus control unit controlling transmission and reception of fieldbus data; a buffer memory buffering the fieldbus data to be transmitted to the fieldbus line or to be received from the field bus line; a fieldbus access unit transmitting the fieldbus data to the fieldbus line or receiving the fieldbus data from the fieldbus line, wherein the fieldbus control unit controls the buffer memory and the fieldbus access unit; and wherein the main memory inputs and outputs the fieldbus data according to an order of priority determined under the control of the main control unit, and the main memory comprises an emergency data transmission/reception unit queue, a general data transmission/reception unit queue, a time-available data transmission/reception unit queue, an emergency data buffer, a general data buffer, and a time-available data buffer.