Patent ID: 8614942

Claim:
A system comprising: an input processor to: receive a plurality of packets, the plurality of packets comprising respective header portions and determine, based on header information included in the respective header portions respective priorities of the plurality of packets; a distributor, to: receive the plurality of packets, identify, the respective priorities of the plurality of packets, and provide each of the plurality of packets to one of a first queue or a second queue based on the respective priorities, the distributor providing a packet, of the plurality of packets, to: the first queue when the respective identified priority of the packet corresponds to a first priority, or the second queue when the respective identified priority corresponds to a second priority and a controller to: receive a first status signal associated with the first queue and a second status signal associated with the second queue, determine a status of the first queue based on the first status signal and the second queue based on the second status signal, and generate a system switching signal based on the status of the first queue and the second queue, the system switching signal indicating whether at least one packet of the plurality of packets, is stored in the first queue, cause the at least one packet to be outputted from the first queue, before any of the plurality of packets are outputted from the second when the system switching signal indicates that the at least one packet is stored in the first queue, and cause another one of the plurality of packets, stored in the second queue, to be outputted from the second queue when the system switching signal indicates that none of the plurality of packets is stored in the first queue.