Patent ID: 8569894

Claim:
A semiconductor package, comprising: a substrate unit including: a first patterned conductive layer having an upper surface; a first dielectric layer disposed adjacent to the upper surface of the first patterned conductive layer, the first dielectric layer exposing a part of the first patterned conductive layer to form a plurality of first contact pads; a second patterned conductive layer below the first patterned conductive layer and having a lower surface; a second dielectric layer between the first patterned conductive layer and the second patterned conductive layer, wherein: the second dielectric layer defines a plurality of openings extending from the first patterned conductive layer to the second patterned conductive layer; and the second patterned conductive layer includes a plurality of second contact pads exposed by the second dielectric layer; and a plurality of conductive posts, each of the plurality of conductive posts extending from the first patterned conductive layer to a corresponding one of the plurality of second contact pads through a corresponding one of the plurality of openings in the second dielectric layer, the each of the plurality of conductive posts filling the corresponding one of the plurality of openings in the second dielectric layer; wherein at least one of the plurality of conductive posts defines a cavity, and wherein the cavity is filled by a part of the first dielectric layer; a die electrically connected to the plurality of first contact pads; and a package body covering the first patterned conductive layer and the die.