Patent ID: 8134401

Claim:
A system comprising: a network of switches; a network of capacitors electrically connected to the network of switches, the network of capacitors and network of switches configured to sample an input voltage; a clocked amplifier electrically connected to the network of capacitors, the clocked amplifier having differential outputs configured to sample the input voltage applied to the network of capacitors; a clocked comparator electrically connected to the clocked amplifier, the clocked comparator having inputs configured to compare the differential outputs of the clocked amplifier; and a shorting switch electrically connected across the differential outputs of the clocked amplifier and across the inputs of the clocked comparator, the shorting switch configured to short the inputs of the clocked comparator during a settling period of the network of capacitors; wherein inputs of the clocked amplifier are configured to be shorted to outputs of the clocked amplifier during a first clock phase.