Patent ID: 8754520

Claim:
A microelectronic substrate, comprising: a dielectric layer overlying a semiconductor region of a substrate, the dielectric layer having a top surface; a plurality of metal lines consisting essentially of a first metal disposed within the dielectric layer, each metal line having edges and a recessed surface extending between the edges, the recessed surface being recessed at all points with respect to the top surface of the dielectric layer; a dielectric cap layer having a first portion overlying and in direct contact with the recessed surfaces of the metal lines and a second portion overlying the dielectric layer between the metal lines, the first portion having a first height above the top surface of the dielectric layer, and the second portion having a second height above the top surface of the dielectric layer, the second height being greater than the first height; and at least one air gap devoid of the dielectric layer disposed between the metal lines, the air gap underlying the second portion of the dielectric cap layer.