Patent ID: 7208973

Claim:
An on die termination circuit, comprising: an input transmission line for transmitting a data of an external input pin to an input buffer; a first resistor connected to a first voltage source; a first transmission gate connected between the first resistor and the input transmission line and driven according to a first termination signal and an inverted first termination signal; a second resistor connected to a second voltage source; a second transmission gate connected between the second resistor and the input transmission line and driven according to the first termination signal and the inverted first termination signal; a third resistor connected to the first voltage source; a third transmission gate connected between the third resistor and the input transmission line and driven according to a second termination signal and an inverted second termination signal; a fourth resistor connected to the second voltage source; and a fourth transmission gate connected between the fourth resistor and the input transmission line and driven according to the second termination signal and the inverted second termination signal.