Patent ID: 7516264

Claim:
In a memory subsystem having a memory controller connected to memory devices divided internally into ranks and banks for addressing data in blocks, a method comprising: determining when the number of banks within the memory subsystem is larger than N, where N represents a total number of available bank control logic components within the memory controller; when the number of banks within the memory subsystem is not larger than N, allocating an individual one of the available bank control logic components to each of the banks within the memory subsystem; when the number of banks is larger than N, folding multiple ones of the banks within a memory device into a set to be addressed by a single one of the available bank control logic components, wherein said folding includes virtually combining the multiple banks into the set such that access to each of the multiple banks of the set are controlled by a same bank control logic component; and when a memory access operation is received addressed to a first bank: identifying which set from among a plurality of sets of banks that the first bank is folded into; and controlling access to the first bank and all banks within the identified set using the single bank control logic component allocated to the identified set, wherein the plurality of sets each have multiple banks folded therein and a separate bank control logic component allocated thereto, and wherein the identified set is treated as being a single bank for purposes of controlling memory access operations targeting any one of the banks within the identified set; and wherein said folding multiple ones of the banks comprises: folding banks within Dual Inline Memory Modules (DIMMs) in a predetermined configuration that minimizes subsequent accesses hitting “false busy” banks; folding only banks that are not sequentially addressed; folding across banks prior to folding across ranks to minimize the number of ranks that are folded; when rank-level folding is required, combining an address space of Y ranks on the DIMMs into Y copies of the same bank control logic component; when only bank-level folding is required: folding a first X internal banks in Dynamic Access Memories (DRAMs) with a second X internal banks of the DRAMs to create a set; wherein said folding is carried out within individual DIMMs and not across the DIMMs; and wherein said folding produces an effective total of N sets of banks in the memory subsystem.