Patent ID: 7704815

Claim:
A method of forming a SiGe-on-insulator substrate comprising the steps of: forming a low temperature oxide atop a structure that comprises a fully relaxed SiGe layer located on a sacrificial substrate; first annealing said structure including said low temperature oxide at a first temperature to form an interfacial layer comprising elements of Si, Ge and O between the low temperature oxide and said SiGe layer; providing an implant region within said fully relaxed SiGe layer; bonding said low temperature oxide to a surface of a semiconductor substrate, wherein said bonding comprises contact bonding to form a bond between said exposed surface of said low temperature oxide and said semiconductor substrate, a second anneal at a second temperature to strengthen said bond, and a third anneal performed at a third temperature that is greater than the second temperature to cause separation at said implant region within said fully relaxed SiGe layer, whereby said sacrificial substrate and a portion of the fully relaxed SiGe layer are removed; and re-annealing the structure at a fourth temperature that is greater than the third temperature to form a SiGe-on-insulator (SGOI) substrate that comprises the semiconductor substrate, said low temperature oxide located on said semiconductor substrate, and said fully relaxed SiGe layer having a defect density of about 10 4 to about 10 5 defects/cm 2 or less and a Ge content that is greater than 25 atomic % located atop said low temperature oxide, wherein said low temperature oxide and said fully relaxed SiGe layer are separated by said interfacial layer.