Patent ID: 6933222

Claim:
A method for microcircuit fabrication, comprising: providing a first dielectric layer with one or more first conductive pads; depositing a second dielectric layer defining one or more first vias at least one of which in communication with each first conductive pad; depositing a third dielectric layer defining one or more second vias each in communication with the one or more first vias associated with one first conductive pad, the second vias having a diameter larger than the first vias; depositing a catalyst on each of the first conductive pads; depositing a carbon nanotube in each via extending from the catalyst through the first and second vias, the carbon nanotube in vertical alignment with the first vias and having semiconducting properties; and depositing a fourth dielectric layer with one or more second conductive pads each in communication with one or more carbon nanotubes.