Patent ID: 8456908

Claim:
A multi-dot flash memory comprising: active areas arranged in a first direction, which extend to a second direction crossed to the first direction, the first and second direction being parallel to a surface of a semiconductor substrate; floating gates arranged in the first direction, which are provided above the active areas; a word line provided above the floating gates, which extends to the first direction; and bit lines provided between the floating gates, which extend to the second direction, wherein each of the floating gates has two side surfaces in the first direction, shapes of the two side surfaces are different from each other, and shapes of the facing surfaces of the floating gates which are adjacent to each other in the first direction are symmetrical, wherein the bit lines are comprised of charge serving-only lines and charge receiving-only lines which are alternately arranged in the first direction, the charge serving-only lines serve charges to the floating gates, and the charge receiving-only lines receive the charges from the floating gates.