Patent ID: 7923786

Claim:
A semiconductor device comprising: a semiconductor substrate having a top surface; a first region of said substrate having a first well extending into said semiconductor substrate from said top surface of said substrate and bounded in a direction perpendicular to said top surface by a first trench isolation, said first trench isolation extending perpendicular to said top surface of said substrate into said substrate, said first well abutting said semiconductor substrate; a source and a drain of a first FET formed in said first well of said first region, said source and said drain abutting different sidewall regions of said first trench isolation; a second region of said substrate having a second well extending into said semiconductor substrate from said top surface and bounded in a direction perpendicular to said top surface by a second trench isolation, said second trench isolation having a vertical portion extending perpendicular to said top surface into said substrate and a lateral portion extending from said vertical portion in a direction parallel to said top surface of said substrate, said second well abutting said semiconductor substrate; and a source and a drain of a second FET formed in said well of said second region, said source of said second FET abutting a first region of said vertical portion and an abutting first region of said lateral portion, said drain of said second FET abutting a second region of said vertical portion and an abutting second region of said lateral portion, said source and said drain of said second FET intervening between said lateral portion and said top surface of said substrate.