Patent ID: 7462509

Claim:
A method of packaging an electronic device, comprising: providing a first substrate having a first set of electrically conductive substrate pads on a first surface of said first substrate, a second set of electrically conductive substrate pads on a second surface of said first substrate, and a plurality of electrically conductive wires connecting substrate pads of said first set of substrate pads to corresponding substrate pads of said second set of substrate pads; providing a second substrate having a third set of electrically conductive substrate pads on a first surface of said second substrate, a plurality of electrically conductive wires in said second substrate interconnecting combinations of substrate pads of said third set of substrate pads; and attaching an integrated circuit chip to said first and second substrates, said integrated circuit chip having a first side and an opposite second side, a first set of chip pads on said first side and a second set of chip pads on said second side of said integrated circuit chip, chip pads of said first set of chip pads physically and electrically connected to corresponding substrate pads of said first set of substrate pads, and chip pads of said second set of chip pads physically and electrically connected to corresponding substrate pads of said third set of substrate pads.