Patent ID: 7994764

Claim:
A low dropout voltage regulator, comprising: a voltage reference circuit having an output for providing a reference voltage; an error amplifier having first and second input terminals, a power supply terminal for receiving an input voltage, and an output terminal for providing a regulated output voltage; a voltage divider for providing a feedback voltage as a predetermined fraction of said regulated output voltage; and a voltage reference/amplifier circuit coupled to said first and second input terminals of said error amplifier and to said voltage divider, said voltage reference/amplifier circuit comprising: a first resistor having a first terminal for receiving said reference voltage, and a second terminal coupled to said first input terminal of said error amplifier; a second resistor having a first terminal for receiving said reference voltage, and a second terminal coupled to said second input terminal of said error amplifier; a first depletion MOS transistor having a first current electrode coupled to said second terminal of said first resistor, a gate coupled to a power supply voltage terminal, and a second current electrode coupled to said power supply voltage terminal; and a first enhancement MOS transistor having a first current electrode coupled to said second terminal of said second resistor, a gate for receiving said feedback voltage, and a second current electrode coupled to said power supply voltage terminal.