Patent ID: 8129705

Claim:
A nonvolatile memory device comprising: a semiconductor substrate; a plurality of first metal wirings being provided on the semiconductor substrate and extending along a first direction and being electrically connected to a peripheral circuit; a plurality of third metal wirings extending along a second direction orthogonal to the first direction; memory cells provided at intersections between the plurality of first metal wirings and the plurality of third metal wirings, the memory cells forming an array and including selection elements provided on the first metal wirings and being electrically connected to the first metal wirings; memory elements provided on the selection elements, the memory elements being electrically connected to the selection elements and including a phase-change material; and second metal wirings provided on the memory elements and being electrically connected to the memory elements; the third metal wirings being provided on the second metal wirings and being electrically connected to the second metal wirings and a peripheral circuit; and an interlayer film provided between adjacent memory elements and between adjacent selection elements having voids between the adjacent memory elements, wherein widths of memory elements are narrower than widths of corresponding selection elements along at least one of the first and second directions, and widths of second metal wirings are wider than widths of corresponding memory elements along the at least one of the first and second directions.