Patent ID: 8799605

Claim:
A memory device comprising: a nonvolatile memory including a plurality of memory cells; and a controller configured to control the nonvolatile memory, the controller being configured such that at a time of a boot operation, when a request for initialization of the memory device is issued, the controller does not return a response to the request until completion of the initialization, and the controller returns a response to the request when the initialization is completed, and in response to a request from a host device to write, in the memory, write data to which logical addresses are allocated, the controller requests the host device to transmit a write data part, which is a divided part of the write data, with a size of the write data part being designated, wherein the memory device incorporates a flag value of a substantive part, which is sent together with an address in a response packet, into a response which is returned when a request for information for boot has been issued from the host device, and when the host device reads presence/absence of the flag value and determines that a polling operation is needless, the memory device does not indicate to the host device a status as to whether the initialization is completed or not.