Patent ID: 6894392

Claim:
A scaleable integrated data processing device, provided on a carrier substrate, comprising a processing unit having one or more processors, and a storage unit having one or more memories, wherein the data processing device comprises mutually adjacent, substantially parallel stacked layers and the processing unit and the storage unit are provided in one or more of the substantially parallel stacked layers, wherein each of the substantially parallel stacked layers comprises one or more processors and/or one or more memories, and electrical conducting structures which form internal electrical connections in the layer, wherein each substantially parallel stacked layer is formed of a plurality of sublayers, having delimited portions which form dielectric, semiconducting or electrical conducting areas in the sublayer and the sublayer, in addition to at least one dielectric portion, having one or more semiconducting and/or electrical conducting portions, wherein delimited portions with a given electrical property in each sublayer are provided in a registering relationship to one or more corresponding portions in at least one of the adjacent neighbor sublayers to form integrated circuit elements which extend vertically through one or more sublayers, wherein the electrical conducting structures are formed by the electrical conducting portions in the sublayer and respectively extend horizontally in order to create horizontal electrical conducting structures or are provided in registering connection with corresponding electrical conducting portions in one or more adjacent sublayers, such that the electrical conducting structures integrated in the sublayers form three-dimensional electrical interconnecting networks in the layers and interconnect the circuit elements therein mutually in three dimensions, and wherein additional electrical conducting structures in the data-processing device interconnect the layers mutually and/or the layers with the substrate and in order to create a connection to the exterior of the data processing device.