Patent ID: 7084063

Claim:
A fabrication method of a semiconductor integrated circuit device, comprising the steps of: (a) forming a first insulation film over a major surface of a wafer; (b) forming an interconnect groove in an upper surface of said first insulation film; (c) depositing a metal layer containing copper as its principal component over the upper surface of said first insulation film and inside said interconnect groove; (d) removing the metal layer outside the interconnect groove by chemical mechanical polishing so as to leave a metal interconnect in the interconnect groove; (e) after step (d), carrying out organic acid cleaning treatment to the upper surface of said first insulation film and an upper surface of said metal interconnect; (f) after step (e), carrying out hydrogen anneal treatment to the upper surface of said first insulation film and the upper surface of said metal interconnect; (g) after step (f), carrying out plasma treatment in a gas atmosphere including an ammonia gas to the upper surface of said first insulation film and the upper surface of said metal interconnect; and (h) depositing an insulation copper diffusion barrier film by plasma chemical vapor deposition on the upper surface of said first insulation film and the upper surface of said metal interconnect treated by said organic acid cleaning treatment, said hydrogen anneal treatment and said plasma treatment.