Patent ID: 7747929

Claim:
A method for generating a block low density parity check (LDPC) code, the method comprising the steps of: receiving an information word; and generating a block LDPC code by coding the information word using one of a first parity check matrix and a second parity check matrix, wherein the first parity check matrix is used when a length of the block LDPC code is a first length, the second parity check matrix is used when the length of the block LDPC code is a second length different from the first length, and the second parity check matrix is defined by varying a size of the first parity check matrix, wherein the second parity check matrix has a relation defined by a i ′=a i mod N s ′ (for 1≦i≦L) where a 1 , a 2 , . . . , a L denote exponents of L non-zero permutation matrixes among permutation matrixes of the first parity check matrix, N s ×N s (N s ) denotes a size of partial blocks of the first parity check matrix, a 1 ′, a 2 ′, . . . , a L ′ denote exponents of L non-zero permutation matrixes among permutation matrixes of the second parity check matrix, N s ′×N s ′ (N s ′) denotes a size of partial blocks of the second parity check matrix, and ‘mod’ denotes a modulo operation.