Patent ID: 7476572

Claim:
A method for manufacturing a thin film transistor, comprising the steps of: forming a gate electrode layer over a substrate having an insulating surface; forming a gate insulating layer over the gate electrode layer; forming a first semiconductor layer over the gate insulating layer; forming a second semiconductor layer containing an impurity of one conductivity type over the first semiconductor layer; forming a first mask over the second semiconductor layer; etching the first semiconductor layer and the second semiconductor layer by using the first mask; removing the first mask; forming a second mask over the second semiconductor layer; etching a portion of the second semiconductor layer by using the second mask to expose a first region of the first semiconductor layer; applying a solution over the second mask and the exposed region of the first semiconductor layer to give a first wettability thereto; removing the second mask after applying the solution to expose a second region of the second semiconductor layer; and forming a wiring over the second region by a droplet discharging method, wherein the second region has a higher wettability than the first wettability.