Patent ID: 8350487

Claim:
A switch circuit comprising first and second terminals, a switch connected between the first and second terminals, and a control circuit connected to the switch to operate the switch to selectively connect and disconnect the first and second terminals, the control circuit comprising: a defined point detector connected to the first and second terminals to provide indications of times of occurrences of a defined point on the waveform between the first and second terminals; a period low-pass filter connected to receive the indications of the defined point times and to provide a low-pass filtered signal of the periods between the times indicated; a local oscillator connected to receive the low-pass filtered periods and to provide indications of predicted defined point times based on the previous predicted defined point time and the current value of the low pass-filtered period; a phase comparator connected to receive the indications of the defined point times and the respective indications of predicted defined point times and to provide error indications of a difference between respective pairs of defined point times and predicted defined point times; an error low-pass filter connected to receive the error indications and to provide a low-pass filtered output of the error indications; a phase adjuster connected to receive the low-pass filtered error indications and to apply the low-pass filtered error indications to the low-pass filtered periods before those periods are applied to the local oscillator; and an output section connected to receive the predicted defined point times and responsive thereto to operate the switch to selectively connect and disconnect the first and second terminals.