Patent ID: 8099534

Claim:
A system comprising: a mapping system to receive, from a universal serial bus host, a first endpoint address with corresponding first endpoint data and a second endpoint address with corresponding second endpoint data, the mapping system to: store the first endpoint data and the second endpoint data to an endpoint data buffer; logically map the received first endpoint address and second endpoint address to an endpoint address First In First Out (FIFO) buffer; and store the first endpoint address and the second endpoint address to the endpoint address FIFO buffer that is separate from the endpoint data buffer; and an endpoint service unit to: retrieve the first endpoint address from the endpoint address FIFO buffer; and retrieve the first endpoint data from the endpoint data buffer using the retrieved first endpoint address; and a bi-directional unit to generate a directionality signal identifying one of a plurality of destination controllers to receive the first endpoint data, wherein the endpoint service unit is to transmit the first endpoint data to the one of the plurality of destination controllers identified through the first endpoint address retrieved from the endpoint address FIFO buffer.