Patent ID: 6939746

Claim:
A method of constructing a semiconductor assembly comprising: providing an interposer including an upper surface and a perimeter wall substantially encircling the upper surface to form a recess, the recess having at least a first upper electrical contact and at least a second upper electrical contact located therein, the interposer further comprising at least one lower electrical connection on a lower surface of the interposer, the at least one lower electrical connection in electrical communication with the at least a first upper electrical contact and the at least a second upper electrical contact; providing a semiconductor die including at least a first bond pad; attaching the semiconductor die within the recess such that the at least first bond pad is adjacent to, and in electrical communication with, either the at least a first upper electrical contact or the at least a second upper electrical contact, and that at least some surface area of the recess is accessible between a periphery of the semiconductor die and the perimeter wall; and disposing an underfill encapsulant into the at least some surface area of the recess by flowing the underfill encapsulant along at least two sides of the semiconductor die having an orientation perpendicular to the interposer, such that the underfill encapsulant flows between the semiconductor die and the upper surface of the interposer.