Patent ID: 7030014

Claim:
A semiconductor construction, comprising: a semiconductor substrate comprising monocrystalline silicon; a first metal silicide layer over the semiconductor substrate, the first metal silicide layer being predominantly MSi 2 where M is one or more of Hf, Mo, Ta and W; the first metal silicide layer having a thickness of at least about 50 Å; a second metal silicide layer over and directly against the first metal silicide layer, the second metal silicide layer being predominantly QSi 2 where Q is selected from Groups 3, 4, 8, 9 and 10 of the periodic table, wherein the metals of Q are different from the metals of M, and wherein the second metal silicide layer has a thickness of at least about 100 Å; a conductively-doped silicon-containing layer over and directly against the second metal silicide layer; and wherein the first metal silicide layer, second metal silicide layer and conductively-doped silicon-containing layer are all part of a line stack having substantially vertical sidewalls extending along the first metal silicide layer, second metal silicide layer and conductively-doped silicon-containing layer.