Patent ID: 7268401

Claim:
A semiconductor integrated circuit device, comprising: a first MISFET having a first gate insulating film formed over a first element forming region of a main surface of a semiconductor substrate and a first gate electrode formed over said first gate insulating film; and a second MISFET having a second gate insulating film formed over a second element forming region of said main surface of said semiconductor substrate and a second gate electrode formed over said second gate insulating film; said second gate insulating film being thinner than said first gate insulating film; wherein said first gate insulating film includes a thermally oxidized film and a deposited film formed over said thermally oxidized film, and having a thickness greater than that of said thermally oxidized film; wherein said second gate insulating film includes a thermally oxidized film and a deposited film formed over said thermally oxidized film of the second gate insulating film; wherein said first element forming region and said second element forming region are individually isolated by an element isolation region; and wherein an operating voltage of said first MISFET is higher than an operating voltage of said second MISFET.