Patent ID: 6842021

Claim:
A method of detecting the location of a defect within an integrated circuit (IC), comprising: providing an IC with a plurality of layers including one or more metal layers and a generally planar surface having X and Y dimensions; applying power to said IC at a substantially constant source voltage with a measurable source current; exposing said IC to a laser light, including scanning with said laser light along at least a portion of said X and Y dimensions, with a plurality of controllable focal lengths corresponding to at least said plurality of metal layers; converting infrared (IR) light reflected from said IC during at least a portion of said exposing of said IC to an IR signal; processing said IR signal in accordance with a first Fourier Transformation computation; determining a first one of said plurality of controllable focal lengths corresponding to a selected value of said processed IR signal; measuring said source current during said exposing of said IC; processing said measured source current in accordance with a second Fourier Transformation computation; determining a second one of said plurality of controllable focal lengths corresponding to said selected value of said processed source current; and determining a Z coordinate generally orthogonal to said IC surface and corresponding to a difference between said first and second focal lengths.