Patent ID: 7256095

Claim:
A method for fabricating metal-oxide-semiconductor devices, comprising: providing a semiconductor substrate; forming a gate dielectric layer having a first thickness on said semiconductor substrate; depositing a polysilicon layer on said gate dielectric layer; forming a resist mask on said polysilicon layer; etching said polysilicon layer not masked by said resist mask, thereby forming a gate electrode; etching said gate dielectric layer not covered by said gate electrode such that remaining said gate dielectric layer not covered by said gate electrode has a second thickness that is smaller than said first thickness; forming a spacer on said sidewalls of said gate electrode and on remaining said gate dielectric layer; forming a salicide block resist mask covering said gate electrode, said spacer and a portions of remaining said gate dielectric layer laterally protruding an offset “d” from bottom of said gate electrode; and etching away remaining said gate dielectric layer not covered by said salicide block resist mask, thereby exposing said semiconductor substrate and forming a salicide block lug portions on two opposite sides of the gate electrode with said offset “d” from sidewalls of said gate electrode; wherein said spacer has a maximum thickness that is smaller than said offset “d” such that said salicide block lug portions laterally protruding from bottom of said spacer and forms a step thereto.