Patent ID: 8471260

Claim:
A pixel structure, disposed on a substrate having an array of a plurality of pixel areas, the pixel structure being disposed in each of the pixel areas, the pixel structure comprising: a common electrode, disposed on the substrate to surround each of the pixel areas; a capacitance storage electrode, disposed on the common electrode; a first passivation layer, covering the capacitance storage electrode and the common electrode; a scan line and a gate electrode, disposed in each of the pixel areas; a gate insulation layer, covering the scan line and the gate electrode; a semiconductor layer, disposed on the gate insulation layer above the gate electrode; a data line, a source and a drain, disposed in each of the pixel areas, the source and the drain being disposed on two sides of the semiconductor layer; a second passivation layer, covering the data line, the source, and the drain, wherein the second passivation layer above the drain has a contact window; and a pixel electrode, disposed in each of the pixel areas, the pixel electrode being electrically connected with the drain through the contact window, wherein the common electrode, the capacitance storage electrode, and the first passivation layer are sequentially disposed on the second passivation layer; the contact window is formed in the second passivation layer and the first passivation layer above the drain to expose the drain.