Patent ID: 7307560

Claim:
A circuit, comprising: a phase interpolator that is to provide a interpolator output, wherein the interpolator output is a weighted combination of one or more of a plurality of phasor signals, and wherein the interpolator output has a phase corresponding to a respective phase step in a plurality of phase steps; and a self-test circuit, the self-test circuit including: a phase detector that is to couple to a reference signal and the interpolator output, wherein the phase detector is to generate an output that is proportional to a phase difference between the reference signal and the interpolator output; a phase-difference-to-voltage converter, wherein the phase-difference-to-voltage converter is convert the output from the phase detector into a corresponding voltage, and wherein the phase-difference-to-voltage converter includes a charge pump; an analog-to-digital converter (ADC) coupled to the phase-difference-to-voltage converter, wherein the ADC is to convert an output from the phase-difference-to-voltage converter into a corresponding digital value; and control logic, wherein the control logic is to test the phase interpolator using the self-test circuit.