Patent ID: 7821003

Claim:
A thin-film transistor (TFT) substrate comprising: a plurality of gate lines and a plurality of first and second data lines that cross the gate lines; a plurality of first and second pixel electrodes disposed in a plurality of unit pixel regions defined by the gate lines and the first and second data lines, respectively; a first TFT disposed in a unit pixel region and comprises a first gate terminal connected to a gate line, a first source electrode connected to a first data line, and a first drain electrode connected to any one of first and second pixel electrodes; and a second TFT disposed in the unit pixel region and comprises a second gate terminal connected to the gate line, a second source electrode connected to a second data line, and a second drain electrode connected to the other one of the first and second pixel electrodes, wherein the first and second drain electrodes are disposed to maintain the difference between a first coupling capacitance between the first drain electrode and the first data line and a second coupling capacitance between the second drain electrode and the second data line within a range of 50% or less of a maximum of the first and second coupling capacitances.