Patent ID: 7897500

Claim:
A method of manufacturing a semiconductor device comprising: forming a plurality of spaced-apart conductor structures on a semiconductor substrate, each of the conductor structures comprising a conductive layer; forming insulating spacers on sidewalls of the conductor structures; forming an interlayer-insulating film that fills gaps between adjacent ones of the insulating spacers; removing portions of the interlayer-insulating layer to expose upper surfaces of the conductive layers; growing respective epilayers on the respective exposed upper surfaces of the conductive layers, wherein growing respective epilayers on the respective exposed upper surfaces of the metal layers comprises growing the epilayers to a thickness such that a height of upper surfaces of the epilayers with respect to an upper surface of the semiconductor substrate is substantially equal to a height of upper surfaces of the insulating spacers with respect to the upper surface of the semiconductor substrate; and forming respective metal silicide layers from the respective epilayers.