Patent ID: 6867486

Claim:
A stack chip module including: a substrate having first and second opposing sides, each of said sides having a predetermined-size groove with an adjacent circuit pattern, said grooves being arranged on said opposing sides of said substrate such that said grooves do not overlap with each other; a first semiconductor chip adhered in each groove of the substrate by adhesive, said first semiconductor chip having a plurality of center pads and a plurality of edge pads, electrically connected to each other, on an upper part thereof; a plurality of gold wires for electrically connecting a respective circuit pattern of the substrate and the edge pads of a respective first semiconductor chip, respectively; for said first semiconductor chip, a second semiconductor chip having a plurality of center pads corresponding to said plurality of center pads on said upper part of the respective first semiconductor chip and a formative side being opposite to that of the respective first semiconductor chip; a plurality of bumps interposed between the center pads of the first semiconductor chip and the center pads of the corresponding second semiconductor chip for joining and electrically connecting said respective center pads; and a molding material molding a side of the second semiconductor chip including the gold wires, the edge pads of a respective circuit first semiconductor chip and the circuit pattern of the substrate.