Patent ID: 7557401

Claim:
A semiconductor device comprising: a semiconductor substrate including an active area extending in a first direction; an element isolation insulating film which is adjacent to the active area and extends in the first direction; a gate insulating film formed on the semiconductor substrate in the active area; a pair of gate electrodes located on the gate insulating film; a contact plug located on the active area between the gate electrodes; a pair of first upper lines located on the gate electrodes and extending in a second direction perpendicular to the first direction and corresponding to the gate electrodes respectively; a second upper line located on the gate electrodes and extending in the first direction; and a stopper film located above first upper surfaces of the gate electrodes and side surfaces of the gate electrodes, wherein the semiconductor substrate has a second upper surface located below the gate electrodes; the element isolation insulating film has a third upper surface adjacent to the contact plug in the second direction and fourth upper surface adjacent to the gate electrodes in the second direction; the element isolation insulating film has a first height of the third upper surface thereof with reference to the second upper surface of the semiconductor substrate and a second height of the fourth upper surface thereof with reference to the second upper surface of the semiconductor substrate; and the first height of the third upper surface is smaller than the second height of the fourth upper surface.