Patent ID: 7603646

Claim:
A processor-based method for processing an integrated circuit design, the method comprising: utilizing a processor for: representing the design in a memory with a plurality of programmable look-up-table (LUT) blocks, each LUT block having a plurality of logic devices, a plurality of inputs and a plurality of configuration bits that implement a function that is responsive to the inputs; for a LUT block of the plurality of programmable LUT blocks, identifying one or more of the configuration bits that have don't care conditions; determining a plurality of dynamic power states for a first level of the logic devices in the LUT block as a function of each identified configuration bit that has the don't care condition; determining at least one dynamic power state for a second level of the logic devices in the LUT block as a function of the determined dynamic power states for the first level of the logic devices; wherein the dynamic power state of each of the logic devices in the first and second levels indicates whether an output of the logic device changes in response to changing one or more of the inputs of the LUT block, and further indicates whether the changes of the output depend on the identified configuration bits that have the don't care conditions; selecting a respective value for each identified configuration bit of the LUT in response to the determined dynamic power states of the logic devices in the first and second levels; wherein the selecting reduces occurrence of changes of the outputs of the logic devices in the first and second levels caused by changing one or more of the inputs of the LUT block; and storing into the design, the respective value for each identified configuration bit.