Patent ID: 7282929

Claim:
A circuit for sensing a current, the circuit comprising: a first gainstage comprising a first switched capacitor network configured to sense first and second reference potentials indicating the current; a second gainstage having an output and comprising a second switched capacitor network coupled to said first gainstage, said second gainstage configured to produce first and second amplified reference potentials from said first and second reference potentials at said output; a sample/hold (S/H) stage having an input coupled to said output of said second gainstage and having an output, said S/H stage configured to obtain first and second sampled potentials from said first and second amplified reference potentials for a predetermined time period; and an analog-to-digital converter coupled to said output of said S/H stage and configured to receive said first and second sampled potentials from said S/H stage; wherein the first gainstage further includes: a first amplifier having an input coupled to said first switched capacitor network and having an output; and a third switched capacitor network having a first terminal coupled to said input of said first amplifier and having a second terminal coupled to said output of said first amplifier, said third switched capacitor network configured to cancel offset voltage at said input of said first amplifier.