Patent ID: 8819690

Claim:
A data processing system comprising: a plurality of processing nodes, each processing node having at least one processing unit; a system memory construct coupled to the plurality of processing nodes via an interconnect; a global command queue (GCQ) maintained within the system memory construct during data processing operations utilizing multiple processing resources; and a scheduler performing the functions of: selectively allocating a work element having multiple individual work items to specific processing nodes or processing units from among the plurality of processing nodes in order to complete execution of the work element, wherein the multiple individual work items may be independently executed by different ones of the plurality of processing nodes and by different ones of the processing units; generating an allocated processor unit (APU) bit mask that identifies at least one of the specific processing nodes or processing units that has been selectively allocated the work element, wherein the APU bit mask further comprises a bit for each processing node and processing unit from among the plurality of processing nodes; in response to generating the APU bit mask: placing the work element in a first entry of the GCQ; and associating the APU bit mask with the work element in the first entry of the GCQ; and in response to the GCQ receiving work requests from each of the plurality of processing nodes or the processing units, dispatching the multiple individual work items from the work element in the GCQ to only the selected specific processing nodes or processing units.