Patent ID: 6977836

Claim:
A non-volatile memory device that can be irreversibly programmed electrically, said device comprising: a memory plane formed from a matrix of memory cells, each of the memory cells including an access transistor and a capacitor having a dielectric, the memory cell matrix including: first groups of memory cells laid out in a first direction, each first group including memory cells whose transistor gates are connected together by a first metallization, whose upper capacitor electrodes are connected together by a second metallization, and whose transistor sources are not connected together; and second groups of memory cells laid out in a second direction, each second group including memory cells whose transistor sources are connected together by a third metallization, whose transistor gates are not connected together, and whose upper capacitor electrodes are not connected together; and control means capable of applying chosen voltages to the first, second, and third metallizations so as to selectively program a single one of the memory cells by damaging its dielectric without programming the other memory cells and without damaging the transistors of the memory cells, wherein the control means is also capable of applying chosen second voltages to the first, second, and third metallizations so as to selectively read logic content of the one memory cell without reading logic content of the other memory cells, and the control means applies to the first, second, and third metallizations other than those which are connected to the one memory cell, voltages for switching off the transistors of the memory cells of the memory plane other than the one memory cell.