Patent ID: 8080482

Claim:
A process for the preparation of a semiconductor wafer by use of a substrate having a central axis, a front surface and a back surface that are generally perpendicular to the central axis, a circumferential edge, and a radius extending from the central axis to the circumferential edge, wherein the substrate is doped with a p-type dopant at a concentration between about 5×10 14 carriers/cm 3 and about 1×10 16 carriers/cm 3 , the process comprising: forming a protective layer on the front surface of the substrate, the protective layer being doped with a dopant concentration between about 1.0×10 19 carriers/cm 3 and about 1.0×10 20 carriers/cm 3 and having a thickness of at least about 0.5 μm and less than about 3 μm; forming a device layer on the exposed surface of the protective layer parallel to the front surface of the substrate, the device layer being doped with a dopant concentration below about 1×10 17 carriers/cm 3 and having a thickness between about 2 μm and about 15 μm; and exposing the back surface of the substrate to an alkaline etchant for a time period sufficient to remove substantially all of the substrate, exposing the protective layer.