Patent ID: 8901973

Claim:
A frequency multiplier comprising: an input amplifier configured to receive a frequency multiplier input signal having an input frequency, and to generate a suitably amplified frequency multiplier input signal; a multi-band multiplier core comprising: a multiplier core differential amplifier configured to receive the multiplier input signal, and a multiplier core differential output; and a switchable load impedance connected to the multiplier core differential output, the switchable load impedance comprising n multiplier sections, each multiplier section comprising a section impedance and a section switch, where the multiplier core differential output generates an output signal having an output frequency substantially equal to k times the input frequency, where the output frequency is in a range of a selected one of n critical frequencies when a selected one of the section switches corresponding to the selected one of the n critical frequencies is triggered; and a load resistor connected to the switchable load impedance opposite the multiplier core differential output, where the section impedance for each of the n multiplier sections has an impedance value selected such that: when no switch is triggered, the multi-band multiplier core operates in a pass-through band that generates a frequency multiplier output signal at the input frequency; when a selected one of the n switches is triggered, the multi-band multiplier core operates in one of n multiplier bands to generate a k th harmonic of the frequency multiplier input signal in a range of the one of the n critical frequencies corresponding to the selected switch.