Patent ID: 6940128

Claim:
A semiconductor device comprising: a semiconductor substrate; and a first transistor and a second transistor formed on said semiconductor substrate, each of the first and second transistors having a first main electrode region formed on one surface side of said substrate, a second main electrode region formed on the other surface side of said substrate, and a gate electrode for control of a current flowable between said first main electrode region and said second main electrode region, while letting said second main electrode region be owned in common by said first and second transistors, wherein said first main electrode region of said first transistor is formed to be divided into a plurality of first isolated island regions on the one surface side of said semiconductor substrate, said first isolated island regions being commonly connected together to a first electrode wiring line through a plurality of first electrode layers formed at respective upper surfaces of said first isolated island regions, and said first main electrode region of said second transistor is formed on the one surface side of said semiconductor substrate and is divided into a plurality of second isolated island regions as laid out adjacent to said plurality of first isolated island regions, said plurality of second isolated island regions being commonly connected together to a second electrode wiring line via a plurality of second electrode layers formed at respective upper surfaces of said second isolated island regions.