Patent ID: 7615858

Claim:
A stacked-type semiconductor device package, comprising: a plurality of stacked semiconductor chip packages with joining electrodes exposed on sides of the semiconductor chip packages; and a flexible printed circuit board (PCB) on which the stacked semiconductor chip packages are mounted, the flexible PCB including a first surface having connecting electrodes corresponding to the joining electrodes of the stacked semiconductor chip packages and a second surface opposite the first surface, wherein the flexible PCB covers the sides of the stacked semiconductor chip packages, and the connecting electrodes of the first surface are connected to the joining electrodes of the stacked semiconductor chip packages, wherein the stacked semiconductor chip packages have different structures and sizes with respect to each other, and wherein at least one of the stacked semiconductor chip packages comprises: a semiconductor chip with bonding pads; sector-type joining electrodes disposed to cover the bonding pads; a printed circuit board (PCB) including a first surface on which the semiconductor chip is mounted and a second surface opposite the first surface of the PCB; and a molding material configured to seal the semiconductor chip and the joining electrodes, wherein the semiconductor chip has the same size as the PCB, and one side surface of each of the joining electrodes is exposed.