Patent ID: 7503501

Claim:
A circuit for detecting an abnormal condition in an integrated circuit card, comprising the following in an integrated circuit card substrate: a plurality of detectors, a respective one of which is configured to detect a corresponding abnormal condition in the integrated circuit card; a plurality of monitoring registers, a respective one of which is configured to receive and store detection signals output from a corresponding detector; a plurality of control registers, a respective one of which is configured to store data for controlling activation of signals output from a corresponding monitoring register; a detection signal generation circuit that is configured to generate a first detection signal in response to signals output from the monitoring registers and signals output from the control registers; and a signal control circuit that is configured to output a reset enable signal and an interrupt enable signal in response to an interrupt control signal and the first detection signal, wherein the reset enable signal is of opposite phase from the interrupt control signal and the interrupt enable signal is in phase with the interrupt control signal.