Patent ID: 6880066

Claim:
A central processing unit for executing instructions read from a memory, said central processing unit comprising: a prefetch queue, which reads and stores instructions expected to be executed next by said central processing unit, and which is set in one of an activated state and a deactivated state in accordance with a control signal provided from an external unit, wherein the prefetch queue reads in advance an instruction corresponding to an address subsequent to an address of an instruction already read by the central processing unit when the prefetch queue is set in the activated state, and the central processing unit stops using the prefetch queue and fetches the instruction already read by the prefetch queue when the prefetch queue is set in the deactivated state, and wherein when the status of the prefetch queue is changed from the activated state to the deactivated state, the prefetch queue outputs the instructions already stored in the prefetch queue so that the instructions already stored in the prefetch queue are executed without being discarded.