Patent ID: 7799611

Claim:
A method of forming electronic packages, the method comprising the steps of: forming a block of partially etched lead frames having selectively pre-plated top and bottom surfaces, the lead frames comprising webbed portions, chip pad areas, and electrical lead portions, wherein the electrical lead portions are electrically separated from the chip pad areas, and the lead frames are separated from each other by street portions; attaching first chips to corresponding chip pad areas on the lead frames; die-stacking one or more second chips onto the tops of corresponding first chips; forming electrical connections between one or more terminals of each of the first chips and one or more electrical lead portions of the corresponding lead frame; forming electrical connections to the second chips; encapsulating the lead frames by applying an encapsulant material over the lead frames and the street portions separating the lead frames; back-patterning the bottom surface of the lead frames to remove the webbed portions and the street portions; and singulating the encapsulant material disposed over the street portions to form individual chip scale packages.