Patent ID: 8084833

Claim:
A semiconductor device, comprising: a semiconductor substrate of a first conductivity type; a first well region of a first conductivity type formed in a surface of the semiconductor substrate; a second well region of a second conductivity type formed in the surface of the semiconductor substrate and in contact with the first well region; a heavily-doped source region of a second conductivity type formed on the first well region; a lightly-doped source offset region of a second conductivity type formed on the first well region and in contact with the heavily-doped source region; a channel formation region configured on the fist well region and next to the heavily-doped source region; a heavily-doped drain region of a second conductivity type formed on the second well region; a first lightly-doped drain offset region of a second conductivity type formed on the second well region so as to be spaced away from the lightly-doped source offset region by a length of the channel formation region; a second lightly-doped drain offset region of a second conductivity type formed between the heavily-doped drain region and the first lightly-doped drain offset region and in contact with both of them; a LOCOS oxide film formed in a surface portion of the semiconductor substrate, the LOCOS oxide film comprising a first LOCOS oxide region formed on the lightly-doped source offset region and a second LOCOS oxide region formed on the first lightly-doped drain offset region; a gate oxide film formed on: a part of the first LOCOS oxide region formed in contact with the channel formation region on a source side, the channel formation region, an entirety of the second LOCOS oxide region formed in contact with the channel formation region on a drain side, and the second lightly-doped drain offset region; a gate electrode formed on the gate oxide film; a source electrode formed on the heavily-doped source region; and a drain electrode formed on the heavily-doped drain region.