Patent ID: 8551815

Claim:
A method of fabricating a stacked microelectronic assembly, comprising: a) forming a first subassembly including a plurality of spaced apart first microelectronic elements, each first microelectronic element having a front face and contacts exposed at the front face, a rear face remote from the front face, first edges extending between the front and rear faces, a first dielectric layer overlying each of the respective first edges, and a plurality of traces extending from the contacts to beyond the first edges of the first microelectronic elements, the rear faces of the first microelectronic elements being joined to a carrier layer; b) attaching a plurality of spaced apart second microelectronic elements to the first subassembly, each second microelectronic element having a front face and contacts exposed at the front face, a rear face remote from the front face, second edges extending between the front and rear faces, such that the rear faces of the second microelectronic elements overlie and are adjacent to the front faces of respective ones of the first microelectronic elements, wherein a second dielectric layer overlies each of the respective second edges; c) after the attaching of the plurality of spaced apart second microelectronic elements to the first subassembly, forming a plurality of traces extending from the contacts of the second microelectronic elements to beyond the second edges of the second microelectronic elements; and d) forming leads in at least one opening extending between confronting first edges of adjacent ones of the first microelectronic elements and between confronting second edges of adjacent ones of the second microelectronic elements, each of the leads being connected to the traces of at least one of the first and at least one of the second microelectronic elements, and each of the leads formed on and extending along both the first and the second dielectric layers.