Patent ID: 8821798

Claim:
A method of fabricating a microwell, the method comprising: disposing a titanium nitride (TiN) layer on at least one conductive layer coupled to a gate structure of at least one field effect transistor (FET) in an array structure, wherein the array structure comprises a plurality of FETs, each of the plurality of FETs having an associated gate structure; disposing an insulation layer on the array structure, wherein the insulation layer lies above the TiN layer; and etching an opening above the gate structure of the at least one FET to remove the insulation layer above the gate structure and to expose the TiN layer, wherein the insulation layer forms at least one sidewall and the TiN layer forms a bottom surface of the microwell, wherein the disposing the TiN layer comprises disposing the TiN layer above a conduction channel formed by a source and a drain of the FET, wherein the gate structure lies above the conduction channel.