Patent ID: 7166887

Claim:
An electrically erasable programmable read only memory (EEPROM) device comprising: a semiconductor substrate of a first conductive type; a memory transistor disposed on the semiconductor substrate, the memory transistor comprising a gate insulating film formed on the semiconductor substrate and a memory transistor gate formed on the gate insulating film, the gate insulating film including a tunnel insulating film; a select transistor disposed on the semiconductor substrate and separated from the memory transistor gate, the select transistor comprising a gate insulating film formed on the semiconductor substrate and a select transistor gate formed on the gate insulating film; a floating junction region formed of a second conductive type on the semiconductor substrate below the tunnel insulating film; a common source region of a second conductive type formed on the semiconductor substrate adjacent to the memory transistor gate and separated from the floating junction region; and a bit line junction region of a second conductive type formed on the semiconductor substrate adjacent to the select transistor gate and separated from the floating junction region, wherein the common source region includes a single junction region with a first doping concentration, and a depth of the common source region is shallower than a depth of the floating junction region and the bit line junction region.