Patent ID: 7350166

Claim:
A method for reversing effects of reparameterization in a digital design, said method comprising: receiving an original design, an abstracted design, and a first trace over said abstracted design, wherein said abstracted design is a reduced reparameterized version of said original design produced by computing a cut at a cutpoint of said original design and replacing a fanin-side of said original design with simpler logic, and wherein said first trace over said abstracted design is a set of logical evaluations of a collection of gates within said abstracted design; populating one or more conditional values into said first trace over said abstracted design; casting a k-step satisfiability check to obtain a second trace in said original design; concatenating one or more values to an initial gate set in said second trace with one or more values to a generated subset of said original design in said first trace over said abstracted design to form a new unabstracted trace; and reversing one or more effects of a reparameterization by returning said new unabstracted trace over said original design.