Patent ID: 8799532

Claim:
system, comprising: at least one upstream port for coupling to a host; at least one downstream port for coupling to at least one downstream device; at least one transaction translator (TT) comprising one or more circuits and coupled to the at least one downstream port, wherein the one or more circuits are configured to: split a communication received from the downstream device at the first speed into a plurality of packets when the host communicates at a second speed and does not support the first speed; transmit an acknowledgment signal to the downstream device, wherein the acknowledgement signal is indicative of having received the communication and wherein the acknowledgment signal triggers an additional communication from the downstream device on the downstream port; adjusting a toggle bit on at least one of the plurality of packets wherein the toggle bit is used by the host to confirm receipt of the plurality of packets; adjusting a polling rate associated with the frequency of requests for communications from the downstream device; and send the plurality of communications to the host device at a second speed wherein the second speed is slower than the first speed.