Patent ID: 8492235

Claim:
A method for forming a device comprising: providing a substrate prepared with a device region which includes a doped isolation well and a dielectric stack over the substrate, wherein the dielectric stack includes a second dielectric sub-layer over a first dielectric sub-layer, wherein the first dielectric sub-layer comprises a first dielectric material and the second dielectric sub-layer comprises a second dielectric material; forming a fin structure in an opening in the dielectric stack, wherein the fin structure comprises a second portion having a second material over a first portion with a first material; removing the second dielectric sub-layer selective to the first dielectric sub-layer to leave a portion of the fin structure extending above a top surface of the first dielectric sub-layer, wherein removing the second dielectric sub-layer exposes a portion of the first material; forming a void in the fin structure between the first and second materials, wherein forming the void comprises providing a first interface of the first and second portions above a second interface of the first and second dielectric sub-layers, and selectively removing an upper portion of the first material to form the void between the first and second materials; forming a gate which traverses the fin structure; forming doped S/D regions in the fin structure adjacent to the gate, wherein a channel is disposed between the S/D regions below the gate; and forming a first stressor to cause the channel to have a first strain to improve carrier mobility.