Patent ID: 7120718

Claim:
A method for generating interrupt commands for a microprocessor system, the method comprising: storing interrupts in a pending interrupts register; storing priority values associated with the stored interrupts in a plurality of priority registers coupled to the pending interrupts register; loading a plurality of counters coupled in cascade to the plurality of priority registers with the stored priority values; incrementing at predetermined intervals the priority values loaded in the plurality of counters; comparing the incremented priority values for identifying the interrupt having a highest priority if an interrupt service routine is not being executed; processing the interrupt having the highest priority by generating an interrupt command and an interrupt vector identifying the interrupt service routine to be executed; canceling the interrupt having the highest priority from the pending interrupts register and its priority value from the plurality of priority registers; and wherein the incrementing is based upon increment signals having different periods, each period corresponding to a particular interrupt that is associated with a corresponding counter and the increment signal of one of the plurality of counters has a period shorter than a ratio between a maximum latency of one of the interrupts and a difference between maximum and minimum priority values.