Patent ID: 7163017

Claim:
A method used to etch a conductive layer to result in a selected profile of the conductive layer, comprising: providing a semiconductor wafer substrate assembly comprising a semiconductor wafer; forming a conductive layer over the semiconductor wafer; etching through the conductive layer to expose the semiconductor wafer substrate assembly on first and second sides of the conductive layer and to form first and second vertically-oriented cross-sectional sidewalls, each sidewall comprising a lower portion and an upper portion continuous with the lower portion, with the upper portion being further away from the wafer than the lower portion; selecting a post-etch profile from first and second post-etch profiles, wherein: the first post-etch profile results from an etch which removes the lower portion of each sidewall of the conductive layer at a faster rate than it removes the upper portion to result in a substantially U-shaped profile of the conductive layer; and the second post-etch profile results from an etch which removes the lower portion of each sidewall of the conductive layer at a faster rate than it removes the upper portion to result in the conductive layer having a profile which tapers inward at a uniform rate from the upper sidewall portion to the lower sidewall portion; then etching the conductive layer using an etch comprising a flow rate of between about 9 sccm and about 12 sccm He—O 2 to result in the conductive layer having the selected post-etch profile, wherein the He—O 2 flow rate is about 9 sccm to result in the conductive layer having the first profile; and wherein the He—O 2 flow rate is about 12 sccm to result in the conductive layer having the second profile.