Patent ID: 8133797

Claim:
A semiconductor processing method for filling high-aspect ratio gaps, the method comprising: (a) providing a substrate having a region of high feature density and a region of lower feature density; (b) depositing a protective layer over the features, wherein the protective layer prevents excess removal of an underlying structure of the features in the lower feature density region during a subsequent dry etching operation, wherein the protective layer is a dielectric layer that deposits thicker on the sidewalls of features in the lower density region than on the sidewalls of the features in the high density region; (c) after depositing the protective layer, depositing a dielectric layer to partially fill the high-aspect ratio gaps; (d) after depositing a dielectric layer, dry etching the substrate to remove deposition from the surface to reduce the aspect-ratio of the high-aspect ratio gaps in the high feature density region; and, (e) depositing a final dielectric layer to completely fill the gaps, wherein the protective layer is deposited using a HDP CVD chamber operated under higher pressure, lower bias and source power and lower temperature than the dielectric deposition layer of operation (c).