Patent ID: 7645692

Claim:
A method of manufacturing a semiconductor device containing a first region provided with capacitor elements and first transistors, and a second region provided with second transistors, comprising: forming first gate electrodes of said first transistors on a silicon substrate in said first region, and forming second gate electrodes of said second transistors on said silicon substrate in said second region, said second gate electrode having a minimum gate length smaller than a minimum gate length of said first gate electrodes; forming first source/drain regions in said silicon substrate beside said first gate electrodes, and forming second source/drain regions in said silicon substrate beside said second gate electrodes; forming, after said forming the first gate electrodes and the second gate electrodes, a first insulating film on said silicon substrate as being extended from said first region to said second region; forming, after selectively removing said first insulating film in said first region, one of a cobalt film and a titanium film on an element-forming surface of said silicon substrate, and annealing the element-forming surface and the one of a cobalt film and a titanium film at a first temperature, to thereby form a first silicide layer on said first source/drain regions and on said first gate electrodes; forming, after said forming the first silicide layer, a second insulating film over said silicon substrate, as being extended from said first region to said second region; and selectively removing said first and second insulating films in said second region, forming a nickel-containing film on said element-forming surface, and annealing the nickel-containing film and said element-forming surface at a second temperature, to thereby form a second silicide layer on said second source/drain regions and on said second gate electrodes.