Patent ID: 8228108

Claim:
A level formatter comprising: a common mode voltage generator with inputs coupled to two reference voltages and an output coupled to a common mode voltage node; two differentially coupled closed loop current sources, each having an input to receive a respective one of the two reference voltages and an output coupled to the common mode voltage node via a respective bias element having an impedance value, wherein each closed loop current source is configured to produce a current through the respective bias element that is directly proportional to the respective reference voltage; and a bipolar transistor bridge differentially coupled to two supplementary current sources, wherein each supplementary current source produces a respective current equal to a respective one of the closed loop current sources, wherein the bipolar transistor bridge is configured to steer the respective currents between two additional bias elements each coupled to the common mode voltage node and each having an impedance value, wherein respective output voltages are produced at respective outputs that are approximately equal to respective ones of the two reference voltages.