Patent ID: 7531407

Claim:
A method of forming a semiconductor device, comprising: forming an integrated circuit on a frontside of a semiconductor substrate; forming an integrated inductor within a backside insulating layer on a backside of the semiconductor substrate; forming an interconnection structure through a buried insulating layer interposed between the frontside and backside of the semiconductor substrate, which connects the integrated inductor to the integrated circuit; forming a ground plane within the backside insulating layer on the backside of the semiconductor substrate, wherein forming the integrated inductor structure comprises: filling a first plurality of via holes etched in a the backside insulating layer to form backside contact plugs; filling a trench etched in the backside insulating layer to form an inductor coil, wherein the backside contact plugs form part of the interconnection structure for connecting the inductor coil to the frontside integrated circuit; filling a second plurality of via holes in the backside insulating layer to form backside dummy contact plugs to support the integrated inductor, wherein the backside dummy contact plugs each have one end embedded in the backside of the semiconductor substrate and do not form part of the interconnection structure for connecting the inductor coil to the frontside integrated circuit; and forming an air gap surrounding the integrated inductor by removing insulation material from the backside insulating layer.