Patent ID: 7312636

Claim:
A level shifter circuit to translate a logic signal with logic ‘1’ and ‘0’ levels corresponding to first high and low voltage levels, driven from a logic circuit powered by first high and low voltage supplies, to an output signal with second high and low voltage levels, the level shifter circuit comprising: a first circuit receiving a second high voltage supply for providing the second high voltage level to the output signal in response to a first state of the logic signal; a second circuit receiving a second low voltage supply for providing the second low voltage level to the output signal in response to the second state of the logic signal; and, a crowbar current limiting circuit connected to the output signal between the first circuit and the second circuit for limiting crowbar current between the first circuit and the second circuit during a state transition of the logic signal, wherein the crowbar current limiting circuit includes: a first current limiting circuit connected to the output signal and in series with pull-up circuitry to the second high voltage supply in the first circuit; and a second current limiting circuit connected to the output signal and in series with pull-down circuitry to the second low voltage supply in the second circuit, the first and second current limiting circuits being responsive to a common input signal.