Patent ID: 7898292

Claim:
A level converter comprising: an input device, coupled to a low power source and a first high power source, which generates a complementary first signal and second signal in accordance with an input signal; and a shift circuit that outputs an output signal generated by shifting a voltage level of the input signal, the shift circuit including: a latch circuit having: a first inverter circuit provided in a first path between a second high power source and the low power source, wherein the second high power source is different from the first high power source; and a second inverter circuit provided in a second path between the second high power source and the low power source, wherein the latch circuit is formed by coupling an input terminal and an output terminal of the first inverter circuit and the second inverter circuit, and wherein the latch circuit latches the first signal and the second signal; a first transistor coupled to the first path; a second transistor coupled to the second path; a control signal line that controls a gate potential of one of the first transistor and the second transistor; and an initial value setting circuit coupled to the control signal line, the initial value setting circuit including a third inverter circuit disposed between the second high power source and the low power source, wherein the first inverter circuit includes a third transistor and a fourth transistor, one side of the third transistor coupled to the second high power source, the other side of the third transistor coupled to one side of the first transistor, one side of the fourth transistor coupled to the low power source, the other side of the fourth transistor coupled to the other side of the first transistor, and wherein the second inverter circuit includes a fifth transistor and a sixth transistor, one side of the fifth transistor coupled to the second high power source, the other side of the fifth transistor coupled to one side of the second transistor, one side of the sixth transistor coupled to the low power source, the other side of the sixth transistor coupled to the other side of the second transistor.