Patent ID: 7965553

Claim:
A method of verifying a program operation in a non-volatile memory device, the method comprising: performing a program operation; verifying whether or not each of a plurality of first program target memory cells is programmed to a voltage higher than a first verifying voltage; setting data so that a page buffer for the first program target memory cells outputs a first pass signal in accordance with the number of fail status bits in response to determining that a fail status memory cell is not programmed to a voltage higher than the first verifying voltage; verifying whether or not each of a plurality of second program target memory cells is programmed to a voltage higher than a second verifying voltage; setting data so that a page buffer for the second program target memory cells outputs a second pass signal in accordance with the number of fail status bits in response to determining that a fail status memory cell is not programmed to a voltage higher than the second verifying voltage; verifying whether or not each of a plurality of third program target memory cells is programmed to a voltage higher than a third verifying voltage; and setting data so that a page buffer for the third program target memory cells outputs a third pass signal in accordance with the number of fail status bits in response to determining that a fail memory cell is not programmed to a voltage higher than the third verifying voltage.