Patent ID: 8255745

Claim:
A computing system comprising: a processor subsystem having an adjustable physical operating parameter; an information store operable to save a sequence of instructions; and a controller module including: a monitor circuit for detecting an incidence of an operating-parameter-caused error corresponding to an execution of an instruction of the sequence of instructions by the processor subsystem; a recovery circuit operable to rollback an execution of the sequence of instructions to a checkpoint in response to the detected operating-parameter-caused error; and a control circuit for adjusting the adjustable physical operating parameter based upon an error-tolerant performance criterion corresponding to an incidence of the detected operating-parameter-caused error, to substantially minimize a time to complete an execution of the sequence of instructions by adjusting the adjustable physical operating parameter including adjusting a processor subsystem voltage in response to the error-tolerant performance criterion, wherein the error-tolerant performance criterion corresponds in substantial conformity to 0=(Δ time to complete an execution of the sequence of instructions) divided by (Δ adjustable physical operating parameter).