Patent ID: 7867828

Claim:
A semiconductor device fabrication method comprising: separately arranging, on an upper surface of a base plate, a plurality of semiconductor constituent bodies each having a semiconductor substrate and a plurality of external connecting electrodes formed on the semiconductor substrate; forming, on the upper surface of the base plate around each semiconductor constituent body, an insulating layer formation layer made of a material containing a resin selected from the group consisting of a semi-hardened thermosetting resin and liquid thermosetting resin, and placing, on an upper surface of the insulating layer formation layer, a hard sheet having a hole corresponding to each semiconductor constituent body; performing heating and pressing to form an insulating layer on the base plate around each semiconductor constituent body by fully hardening the semi-hardened thermosetting resin or liquid thermosetting resin in the insulating layer formation layer, and to bury at least a portion of the hard sheet in the insulating layer; forming an interconnection to be connected to the external connecting electrodes of each semiconductor constituent body; and obtaining a plurality of semiconductor devices by cutting the hard sheet, insulating layer, and base plate between the semiconductor constituent bodies.