Patent ID: 7725640

Claim:
A system, comprising: an interface core for connecting to a component of an information handling system device, the interface core comprising an electric circuit including one or more electronic components and control logic for interfacing with the information handling system device; a front end data channel coupled with the interface core for connecting the electric circuit to the component and transmitting at least one data packet between the one or more electronic components and the information handling system device; and a memory for buffering the at least one data packet after transmitting the at least one data packet, wherein the control logic of the interface core is operatively configured to direct at least one of the information handling system device or another device connected to the interface core to copy the at least one data packet buffered in the memory, the interface core being operatively configured to direct at least one of the information handling system device and another device connected to the interface core to copy the at least one data packet buffered in the memory upon one or more of a detected error, a set pattern value, and a back end logic-initiated signal.