Patent ID: 8877622

Claim:
A method of producing an integrated circuit on a surface of a substrate comprising: (a) producing a first layer comprising active zones and insulating zones on the surface of the substrate; (b) producing gate zones on the surface of the first layer, the gate zones presenting upper surfaces substantially at the same level; (c) producing insulating spacers that surround each of the gate zones, the insulating spacers presenting upper surfaces level with the upper surfaces of the gate zones; (d) producing a dielectric layer between the insulating spacers, the dielectric layer presenting an upper surface level with the upper surfaces of the gate zones produced in (b); (e) partially etching each gate zone so as to lower the upper surface of a first part of each gate zone, a second part of each gate zone maintaining the level of its upper surface, the second part of each gate zone forming a gate contact; (f) depositing an insulating dielectric layer on the first parts of the gate zones.