Patent ID: 8030709

Claim:
A semiconductor structure comprising: a high-k material metal gate structure to an n-type semiconductor device, and a semiconductor gate structure to a p-type semiconductor device, wherein said high-k material metal gate structure includes: a high dielectric constant (high-k) material portion having a dielectric constant greater than 8.0 and located on a semiconductor substrate; a metal gate portion comprising a metal having a composition to provide a threshold voltage for an n-type semiconductor device, said metal gate portion vertically abutting said high-k material portion; an oxygen-impermeable dielectric spacer laterally abutting sidewalls of said high-k material portion and said metal gate portion; and a first low-k spacer comprising a dielectric material having a dielectric constant less than 4.0 and laterally contacting sidewalls of said oxygen-impermeable dielectric spacer, wherein said first low-k spacer is laterally spaced from said high-k material portion and said metal gate portion by said oxygen-impermeable dielectric spacer; and wherein said semiconductor gate structure includes: a semiconductor oxide containing gate dielectric portion having a dielectric constant less than 8.0 and located directly on said semiconductor substrate; a doped semiconductor portion comprising a doped semiconductor material and vertically abutting said gate dielectric; and a second low-k gate spacer comprising said dielectric material and laterally abutting sidewalls of said semiconductor oxide containing gate dielectric portion and said doped semiconductor portion, wherein said oxygen-impermeable dielectric spacer is not present between the second low-k gate spacer and the sidewalls of the doped semiconductor portion.