Patent ID: 8093721

Claim:
A flip chip semiconductor package comprising: an electrode pad formed on a semiconductor substrate; an insulating layer formed on the semiconductor substrate and exposing a part of the electrode pad; a lower metal bonding layer formed on an exposed part of the electrode pad; an upper metal bonding layer formed on the lower metal bonding layer and having a post shape of a predetermined height; a solder bump formed on the upper metal bonding layer; and a substrate electrically connected on the solder bump, wherein the solder bump covers an upper part of a side wall of the upper metal bonding layer, and the upper metal bonding layer penetrates into the solder bump to a depth of 0.01 to 50 μm, wherein the upper metal bonding layer is formed from the lower metal bonding layer to the solder bump at the height being at least 55 μm or more such that an exposed portion of the upper metal bonding layer at a lower part of the sidewall of the upper metal bonding layer is 5 microns or more.