Patent ID: 8248134

Claim:
An apparatus that is adapted to receive signals from an Inter-Integrated Circuit (I 2 C) bus, the apparatus comprising: a serial data (SDA) filter that is adapted to receive an SDA signal from the I 2 C bus, wherein the SDA filter includes a hold terminal and a disable terminal, and wherein the hold terminal of the SDA filter issues a disable signal when a transient in the SDA signal is detected; a serial clock (SCL) filter that is adapted to receive an SCL signal from the I 2 C bus, wherein the SCL filter includes a hold terminal and a disable terminal, and wherein the hold terminal of the SCL filter issues a disable signal when a transient in the SCL signal is detected, and wherein the hold terminal of the SCL filter is coupled to the disable terminal of the SDA filter, and wherein the hold terminal of the SDA filter is coupled to the disable terminal of the SCL filter; I 2 C interface logic that is coupled to the SDA filter and to the SCL filter; and operational circuitry that is coupled the I 2 C interface logic.