Patent ID: 7301805

Claim:
A non-volatile memory system, comprising a non volatile memory array including a plurality of multi-state storage units formed into a physical page; one or more data buffers to hold data assigned the physical page; programming circuitry connectable to the buffers and the array to write data content assigned to the first physical page being held in said buffers to the physical page; and control circuitry connectable to the programming circuitry, whereby, subsequent to beginning, and prior to completing, a programming operation to the physical page for first data content assigned thereto, wherein the first data content specifies less than all of the data content storable for storage units of the physical page, the programming operation of the first data content can be interrupted and subsequently resumed, where the resumed programming operation concurrently programs the first data content and additional data content assigned to the physical page received at the data buffers subsequent to beginning the programming operation for the first data content.