Patent ID: 7696030

Claim:
A method of fabricating a semiconductor device, comprising: depositing a silicon layer containing amorphous silicon on a substrate using a plasma enhanced chemical vapor deposition (PECVD) method or a low pressure chemical vapor deposition (LPCVD) method; annealing the silicon layer in an H 2 O atmosphere at a temperature to form a polycrystalline silicon layer via solid phase crystallization, the annealing being for less than 10 minutes; forming a gate insulating layer on the polycrystalline silicon layer over an entire surface of the substrate; forming impurity regions in the polycrystalline silicon layer to define source and drain regions; and activating the impurity regions, wherein the H 2 O pressure is in a range of 10,000 Pa to 2 MPa, and the temperature is in a range of 550 to 750° C.