Patent ID: 8094057

Claim:
An A/D conversion circuit in which an input signal as analog data is converted to an A/D conversion data as digital data, comprising: a sample-and-hold circuit adapted to sample and hold the input signal to output a sampled signal; a control circuit adapted to output successive approximation data; a first D/A conversion circuit adapted to perform D/A conversion on the successive approximation data to output a first D/A output signal; a second D/A conversion circuit adapted to perform D/A conversion on time-varying code data to output a second D/A output signal; and a comparison circuit adapted to compare the first D/A output signal with an addition signal that is provided as a sum of the sampled signal and the second D/A output signal, and to output a comparison result signal, wherein the control circuit has a successive approximation register in which register values are set in accordance with the comparison result signal, provides successive approximation result data after all of the register values of the successive approximation register have been determined, subtracts the time-varying code data from the successive approximation result data, and outputs the A/D conversion data that is provided by subtracting the time-varying code data from the successive approximation result data.