Patent ID: 8542077

Claim:
A high-frequency circuit comprising: a plurality of transistors formed arranged and formed on a semiconductor substrate in parallel to each other; a plurality of input matching circuits arranged on a first insulating substrate and connected to gate terminals of the plurality of transistors; a plurality of output matching circuits arranged on a second insulating substrate and connected to drain terminals of the plurality of transistors; a plurality of resistors formed between the plurality of input matching circuits and between the plurality of output matching circuits; and low-frequency oscillation suppressing circuits, each configured by a filter circuit having a desired transmission band and a resistor and each having one end connected to the respective gate terminal of the transistor located on a respective end of the plurality of transistors and having its other end grounded, wherein each of the resistors is formed to include a position closest to the transistors between the input matching circuits and between the output matching circuits, and each of the resistors has a length at which the low-frequency oscillation suppressing circuit can suppress oscillation at the lowest frequency in the transmission band.