Patent ID: 7834669

Claim:
A semiconductor output circuit, comprising: a first power supply line; an output terminal to be coupled to a second power supply line through a load; an output transistor coupled between the first power supply line and the output terminal; a depletion transistor coupled between a control terminal of the output transistor and the output terminal, wherein a voltage applied between a gate and a source of the depletion transistor is smaller than a voltage difference between a potential of the first power supply line and a potential of the second power supply line when the output transistor is in a conductive state and a nonconductive state; an intermediate voltage generating circuit generating an intermediate potential between the potential of the first power supply line and the potential of the second power supply line to an intermediate voltage line; and a control circuit which causes the gate of the depletion transistor to have a potential related to the intermediate voltage in a case of causing the output transistor to be in the conductive state, and couples the gate and the source of the depletion transistor in a case of causing the output transistor to be in the nonconductive state.