Patent ID: 8823574

Claim:
An A/D converter comprising: a reference signal generating section that generates a reference signal; a comparator that compares an analog signal input thereto with the reference signal and converts the analog signal into a digital signal; a data memory in which the digital signal resulting from the comparison is stored; a control section that controls the generation of the reference signal to perform oversampling by executing an A/D conversion process on the analog signal at the comparator plural times, the A/D conversion process comprising a first A/D conversion process and a second and subsequent A/D conversion processes, and the A/D conversion process executes such that the analog signal is A/D-converted into a digital value of N bits and an upper bit value of n of the N-bit digital value is provided at the first A/D conversion process and such that the second and subsequent A/D conversion processes are performed starting with only a lower bit of the (N−n)-th or lower order with the upper n bits of the N-bit digital value obtained at the first A/D conversion process fixed; and a data converter in communication with the data memory and that generates a digital output signal based on the digital signal stored therein, wherein the reference signal generating section has a redundant configuration.