Patent ID: 8106809

Claim:
A switched capacitor converter comprising: a first summer; a quantizer; at least one integrator, the first summer, the quantizer, and the at least one integrator being configured as a chopper-stabilized sigma-delta modulator; and a clock generator module configured to generate a first phase of a sampling clock, a second phase of the sampling clock, a first phase of a chopping clock, and a second phase of the chopping clock, the first and second phases of the sampling clock being non-overlapping, the first and second phases of the chopping clock being non-overlapping, the clock generator module being configured to cause transitions from active to inactive of the first and second phases of the chopping clock when the first phase and the second phase of the sampling clock are inactive, wherein the clock generator module is further configured to cause transitions from inactive to active of the first and second phases of the chopping clock when the first phase and the second phase of the sampling clock are inactive, and wherein the clock generator module is further configured to cause at least one transition from inactive to active of the second phase of the sampling clock in response to inactive to active transitions of the first phase of the chopping clock, and to cause at least one transition from inactive to active of the second phase of the sampling clock in response to inactive to active transitions of the second phase of the chopping clock.