Patent ID: 8803280

Claim:
A high-voltage ESD protection device, comprising a silicon controlled rectifier, a first PNP transistor and an isolation high-voltage P-well for isolating the silicon controlled rectifier from the first PNP transistor, wherein: the silicon controlled rectifier and the first PNP transistor are formed on a P-type epitaxial layer of a silicon substrate; the silicon controlled rectifier comprises a high-voltage P-well and a high-voltage N-well adjacent to each other; a first N+ diffusion region and a first P+ diffusion region are formed in the high-voltage P-well; a second N+ diffusion region and a second P+ diffusion region are formed in the high-voltage N-well; the first PNP transistor comprises an N-type buried layer and a low-voltage N-well formed in the N-type buried layer of the first PNP transistor; a third N+ diffusion region, a third P+ diffusion region, and a fourth P+ diffusion region are formed in the low-voltage N-well of the first PNP transistor to serve as a base, an emitter and a collector of the first PNP transistor, respectively; the base and the emitter of the first PNP transistor are shorted to each other and connected to an electrostatic terminal; the collector of the first PNP transistor is shorted to the second N+ diffusion region and the second P+ diffusion region; the first N+ diffusion region is shorted to the first P+ diffusion region to act as a ground terminal for dissipating an electrostatic discharge between the electrostatic terminal and the ground terminal.