Patent ID: 7558978

Claim:
A power management device, applied in a multiprocessor system with a plurality of processors, comprising: at least one checking unit coupled to a peripheral device to receive therefrom an event, wherein said at least one checking unit determines which one of the plurality of processors the received event corresponds to and sends a checking signal; a plurality of recording units corresponding to the processors respectively, one of the plurality of recording units recording the received event according to the checking signal, wherein said recording unit recording the received event corresponds to the processor corresponding to the received event, and wherein one of the plurality of processors corresponding to one of the plurality of recording units recording no event sends a shut-down command and an entering C3 state command; and a plurality of arbiters corresponding to the processors respectively, wherein an arbiter corresponding to the processor sending the shut-down command is turned off according to the shut-down command; wherein a first control signal is sent according to the entering C3 state command, and wherein the processor corresponding to the arbiter being turned off receives the first control signal for entrance of a C3 state.