Patent ID: 7437497

Claim:
A method for using encoded memory control signals to reduce pin count on chips that generate and drive memory control signals, comprising: receiving encoded memory control signals from a memory controller, wherein the memory control signals were encoded to reduce the number of memory control signals, and wherein the encoded memory control signals are received at a buffer chip which is external to the memory controller and memory modules; decoding the encoded memory control signals on the buffer chip to restore the memory control signals for controlling one or more memory modules, wherein the one or more memory modules are located on integrated circuit (IC) chips that are separate from the buffer chip; and driving the memory control signals from the buffer chip to the one or more memory modules in a system memory, wherein driving the memory control signals involves using a phase-locked loop (PLL) or a delay-locked loop (DLL) within the buffer chip to synchronize the memory control signals with clock signals for the system memory; whereby transferring the memory control signals in encoded form from the memory controller to the buffer chip requires fewer pins on both the memory controller chip and the buffer chip.