Patent ID: 6956747

Claim:
A semiconductor device comprising: at least one first pad, the first pad being formed above a substrate and given a first potential; at least one first conductive layer, the first conductive layer being formed between the first pad and the substrate so as to be electrically connected to the first pad; at least one second pad, the second pad being formed above the substrate so as to sandwich said at least one first conductive layer between the second pad and the substrate, and given a second potential different from the first potential; at least one second conductive layer, the second conductive layer being formed between the first and second pads and the substrate so as to be electrically connected to the second pad; and a plurality of insulating layers, the insulating layers being stacked on the substrate, at least one first pad, at least one second pad, at least one first conductive layer, and at least one second conductive layer being formed in predetermined ones of the insulating layers, and at least one of the insulating layers being sandwiched, as an inter-electrode insulator of a capacitance element, between at least one of the first pad and first conductive layer and at least one of the second pad and second conductive layer in at least one of a direction in which the insulating layers are stacked and a direction perpendicular to the direction in which the insulating layers are stacked.