Patent ID: 7932120

Claim:
A method of manufacturing a complementary metal-oxide semiconductor (CMOS) image sensor (CIS), the method comprising: forming an epitaxial layer on a substrate in which a first, second, third and fourth region are each defined; forming a photodiode in an upper portion of the epitaxial layer in the first region; forming a plurality of gate structures on the epitaxial layer in the second, third and fourth regions; forming a first blocking layer on the plurality of gate structures and the epitaxial layer; forming a first lightly-doped impurity layer in the upper portion of the epitaxial layer using a first mask and the plurality of gate structures as an ion implantation mask, the first mask covering the first region and a portion of the second region; forming a first highly-doped impurity layer in the upper portion of the epitaxial layer using a second mask and the plurality of gate structures as an ion implantation mask, the second mask covering the first, third and fourth regions; forming a second highly-doped impurity layer in the upper portion of the epitaxial layer using a third mask and the plurality of gate structures as an ion implantation mask, the third mask covering the first and second regions; forming a color filter layer over the photodiode; and forming a microlens on the color filter layer.