Patent ID: 7606343

Claim:
A phase-locked-loop circuit for generating an oscillation signal in synchronism with an input reference signal, said phase-locked-loop circuit comprising: a) phase detecting means for detecting a phase difference between a first signal derived from said input reference signal and a second signal derived from said oscillation signal, and for generating a control signal corresponding to said phase difference; b) frequency control means for controlling the frequency of said oscillation signal based on said control signal; c) frequency dividing means for dividing the frequency of said input reference signal by a factor M and dividing a feedback signal derived from said oscillation signal by the same factor M to generate said first and second signal, respectively; and d) inhibiting means for inhibiting the operation of said frequency dividing means, such that the frequency of said input reference signal is no longer divided by the factor M, and the feedback signal derived from said oscillation signal is no longer divided by the same factor M, when said phase-locked-loop circuit has reached a phase-locked state.