Patent ID: 7453899

Claim:
A field programmable router application specific integrated circuit, comprising: a plurality of media access controllers and a plurality of programmable logic core blocks (MP-blocks), including: at least one media access controller that transmits and receives network data via a physical interface device, and at least one programmable logic core having an array of dynamically configurable arithmetic logic units, said programmable logic core interfaces with said media access controller and implements at least one application level function capable of generating meta-data; an interconnect multiplexer (MUX) coupled to each of said plurality of MP-blocks and configured to switch said network data between ones of said plurality of MP-blocks; and a master subsystem configured to receive said meta-data from each of said plurality of MP-blocks and control said interconnect MUX to route said network data, wherein said master subsystem further includes a master programmable logic core having an array of dynamically configurable arithmetic logic units, said master programmable logic core configured to receive said meta-data and implement at least one router application level function.