Patent ID: 8298903

Claim:
A method of manufacturing a semiconductor device comprising: forming a plurality of first resistive elements and a dummy pattern, which is electrically isolated from the plurality of first resistive elements and which is formed beside one of the plurality of first resistive elements, on a semiconductor substrate, the forming of the plurality of first resistive elements and the dummy pattern comprising: forming a conductor layer on the semiconductor substrate, forming a mask layer on the conductor layer, and patterning the conductor layer to form the plurality of first resistive elements and the dummy pattern by using the mask layer as a mask and by setting an aspect ratio between 3 and 5.2; forming an interlayer insulation film on the plurality of first resistive elements and the dummy pattern; forming a plurality of contact vias, which are connected to the plurality of first resistive elements, in the interlayer insulation film; and forming a plurality of second resistive elements, which are connected to the plurality of contact vias, on the interlayer insulation film, wherein the aspect ratio is defined as (A+B)/C; where the A is a thickness of the conductor layer, the B is a thickness of the mask layer, and the C is a distance between the one of the plurality of first resistive elements and the dummy pattern.