Patent ID: 7023071

Claim:
A semiconductor integrated circuit device comprising: a plurality of memory cells arranged in a first direction and in a second direction crossing said first direction, each of said plurality of memory cells including a first n-channel MISFET, a second n-channel MISFET, a first p-channel MISFET, a second p-channel MISFET, a first conductive film and a second conductive film, said first n-channel MISFET and said second n-channel MISFET each having a gate electrode formed on a semiconductor substrate, and a source region and a drain region formed in said semiconductor substrate, said first p-channel MISFET and said second p-channel MISFET each having a gate electrode formed on said semiconductor substrate, and a source region and a drain region formed in said semiconductor substrate, said first n-channel MISFET and said second n-channel MISFET spaced from said first p-channel MISFET and said second p-channel MISFET in said first direction, said first conductive film and said second conductive film located on said semiconductor substrate and comprised of a different conductive layer from the gate electrodes of the MISFETS, with an insulating film interposed therebetween, said first conductive film being electrically connected to said drain region of said first n-channel MISFET, said drain region of said first p-channel MISFET, said gate electrode of said second n-channel MISFET, and said gate electrode of said second p-channel MISFET, said second conductive film being electrically connected to said drain region of said second n-channel MISFET, said drain region of said second p-channel MISFET, said gate electrode of said first n-channel MISFET, and said gate electrode of said first p-channel MISFET; and a capacitor electrode, of capacitor elements, extending over adjacent memory cells arranged in said first direction such that said capacitor electrode extends over the first conductive films and the second conductive films in said adjacent memory cells arranged in said first direction, said capacitor elements comprising said capacitor electrode and said first conductive films of said memory cells, and said capacitor elements also comprising said capacitor electrode and said second conductive films of said memory cells.