Patent ID: 7289888

Claim:
A method for scheduling a process in a repetitive real time process cycle executed by an operating system in controlling an active filter having a transistor bridge for each phase of a power grid connected to a DC-link with the active filter configured to compensate for undesired variations in current consumption of an apparatus from the power grid, comprising the steps of: (a) setting a reference point in time, To, relative to the repetitive real time process cycle using only an onboard clock with the repetitive real time process cycle having a determinate time period; (b) determining a scheduled transistor bridge trigger time for each phase; (c) converting each scheduled transistor bridge trigger time by applying an absolute time correction to the scheduled transistor bridge trigger time with the absolute time correction being equal to the determinate time period of the repetitive real time process cycle multiplied by the number of real time process cycles that have occurred from the reference point in time, To, up until the current real time process cycle during which the scheduled transistor bridge trigger time is set to occur; and (d) triggering a designated one of the transistor bridges when the absolute scheduled transistor bridge trigger time arrives for the designated one of the transistor bridges compensating for variation in the apparatus current consumption for the corresponding phase from the power grid.