Patent ID: 8836230

Claim:
A power factor correction circuit of an electronic ballast, the electronic ballast including a rectification circuit ( 120 ) for rectifying an AC input voltage, a first capacitive element (C 1 ) for smoothing an output voltage from the rectification circuit ( 120 ) and an inverter ( 130 ), the power factor correction circuit comprising: a unidirectional element (D 1 ), an inductive element (Lf) and a second capacitive element (Cf), wherein the unidirectional element (D 1 ) is connected in series with the inductive element (Lf), the second capacitive element (Cf) is connected in parallel with the unidirectional element (D 1 ) and the inductive element (Lf) and coupled to junction (N 1 ) of the of the unidirectional element (D 1 ) and junction (N 2 ) of the inductive element (Lf), the junction (N 1 ) of the unidirectional element (D 1 ) and the second capacitive element (Cf) is coupled to a first output terminal (O 1 , O 2 ) of the rectification circuit ( 120 ), the junction (N 2 ) of the inductive element (Lf) and the second capacitive element (Cf) is coupled to an input terminal (I 1 , I 2 ) of the inverter ( 130 ), and the first capacitive element (C 1 ) is coupled between a second output terminal (O 1 , O 2 ) of the rectification circuit ( 120 ) and a junction (N 3 ) of the unidirectional element (D 1 ) and the inductive element (Lf).