Patent ID: 6900086

Claim:
A method of manufacturing a semiconductor device, comprising: forming, above a semiconductor substrate, a first gate electrode of a first MISFET operating at a first operating voltage and a second gate electrode of a second MISFET operating at a second operating voltage higher than the first operating voltage; performing ion implantation to form a first LDD layer of the first MISFET; performing ion implantation to form a second LDD layer of the second MISFET; forming a first film over the first and second gate electrodes, above the semiconductor substrate; forming a second film on the first film, the second film being different in material from the first film; performing anisotropic etching on the second film to form a first side-wall film at a stepped part near the first gate electrode and a stepped part near the second gate electrode; performing partial etching on the first side-wall film to remove the first side-wall film which lies above the first MISFET and leave the first side-wall film which lies above the second MISFET; performing anisotropic etching on the first film to form a second side-wall film on sides of the first and second gate electrodes; and performing ion implantation to form a first source/drain diffusion layer of the first MISFET and a second source/drain diffusion layer of the second MISFET.