Patent ID: 8420464

Claim:
A method of fabricating a semiconductor device comprising: providing a first fin structure for a first conductivity semiconductor device and a second fin structure for a second conductivity semiconductor device on a substrate; forming a gate structure in direct contact with at least a channel portion of the first fin structure and the second fin structure; forming a blanket dielectric over the first fin structure and the second fin structure; removing a portion of the blanket dielectric to expose at least sidewalls of the second fin structure, wherein a remaining portion of the blanket dielectric covers at least sidewalls of the first fin structure; epitaxially forming in-situ doped second source and drain regions having a facetted exterior sidewall on the sidewalls of the second fin structure, wherein the remaining portion of the blanket dielectric obstructs epitaxial growth on the sidewalls of the first fin structure; removing the remaining portion of the blanket dielectric to expose at least the sidewalls of the first fin structure; and forming first source and drain regions on the sidewalls of the first fin structure.