Patent ID: 7326647

Claim:
A method for use during fabrication of a semiconductor device, comprising: forming a dielectric layer over a semiconductor wafer substrate assembly, the dielectric layer comprising an upper surface and one or more openings therein; forming a first portion of a conformal conductive layer over the upper surface of the dielectric and a second portion of the conformal conductive layer within each of the one or more openings in the dielectric layer; and with both the first and second portions of the conformal conductive layer exposed, exposing the conformal conductive layer over the upper surface to an etch to remove the first portion of the conformal conductive layer and to leave all or substantially all of the second portion of the conformal conductive layer within each of the one or more openings in the dielectric layer, the etch comprising: exposing the semiconductor wafer substrate assembly to an etch gas selected from the group consisting of Cl 2 and BCl 3 ; and during the exposure of the semiconductor wafer substrate assembly to the etch gas, exposing the semiconductor wafer substrate assembly to a diluent.