Patent ID: 8643572

Claim:
A display device, comprising: a plurality of pixel circuits arranged in a matrix; and a set of first potential lines, which are arranged in a same direction as an arrangement direction of a set of signal lines, where two ends of the set of first potential lines are connected to be a common line out of a display region, wherein each of the pixel circuits includes a light emitting element, a first transistor, a second transistor, a third transistor, a fourth transistor, and a capacitor, wherein the fourth transistor is connected to a second potential line that is arranged in the same direction as the arrangement direction of the set of signal lines and is configured to supply a second potential from the second potential line to a gate of the first transistor during a first conductive state, the third transistor is connected to a signal path extending between a signal line and the capacitor and is configured to supply a data voltage from the signal line to the capacitor to alter a gate potential of the first transistor to Vdata-|Vth| during a second conductive state, where |Vth| is an absolute value of a threshold value of the first transistor, the second transistor is connected to a first potential line and is configured to supply a current that flows from the first potential line to the light emitting element via the first transistor during a third conductive state, wherein the data voltage is supplied into adjacent pixel circuits in a time division manner, and wherein one of the second potential lines for a given one of the pixel circuits and one of the signal lines for the given one of the pixel circuits are adjacent to each other, and no potential line arranged in the same direction as the arrangement direction of the signal lines is disposed between said one of the second potential lines and said one of the signal lines.