Patent ID: 7191424

Claim:
A method for implementing a circuit design, comprising the steps of: (A) identifying a first cell in a layout of said circuit design, said first cell having (i) a function and (ii) an input pin, said input pin being connectable to one of a first power rail and a second power rail, said second power rail having a different voltage than said first power rail; (B) replacing said first cell with a second cell, said second cell having (i) said function, (ii) said input pin and (iii) at least one blocking characteristic, said blocking characteristic reserving (a) a first route completely within a particular conductive layer of said second cell between said input pin and said first power rail and (b) a second route completely within said particular conductive layer between said input pin and said second power rail; and (C) routing said circuit design incorporating said second cell such that said input pin is connected to one of (i) said first power rail using said first route and (ii) said second power rail using said second route.