Patent ID: 7973363

Claim:
An IGBT comprising a semiconductor substrate partitioned, in a plan view, into an active region in which an IGBT element is formed and a peripheral region that surrounds the active region in the plan view, the IGBT comprising: a drift layer of a first conductivity type formed across the active region and the peripheral region; a body region of a second conductivity type formed within the active region in a surface layer of the drift layer; a peripheral voltage-resistant region of the second conductivity type formed within the peripheral region in the surface layer of the drift layer, the peripheral voltage-resistant region surrounding the body region in the plan view; a collector layer of the second conductivity type formed at a back surface side of the drift layer, the collector layer being formed across the active region and the peripheral region; and a buffer layer formed between the back surface of the drift layer and the collector layer, the buffer layer containing impurities of the first conductivity type in a concentration greater than that of the impurities in the drift layer; wherein: a thickness of the collector layer in the peripheral region is smaller than that in the active region; a distance between a back surface of the peripheral voltage-resistant region and the back surface of a portion of the drift layer formed in the peripheral region is greater than that between a back surface of the body region and the back surface of a portion of the drift layer formed in the active region; and the impurity concentration in the buffer layer in the peripheral region is greater than that in the buffer layer in the active region.