Patent ID: 8842400

Claim:
A method of providing electrostatic discharge (ESD) protection, comprising: providing a silicon controlled rectifier (SCR) including a semiconductor substrate and an n-type well formed in the substrate; providing a p-type metal-oxide-semiconductor (PMOS) transistor formed in the n-type well of the SCR including a gate, a first diffused region and a second diffused region separated apart from the first diffused region; providing an n-type region formed in the n-type well being electrically connected to the first diffused region of the PMOS transistor, wherein the n-type region includes a plurality of sub-regions formed in the n-type well, the plurality of sub-regions being separated apart from each other by the second diffused region of the PMOS transistor; and providing a p-type region formed in the substrate outside of the n-type well, and being electrically connected to the second diffused region of the PMOS transistor, keeping the PMOS transistor at an on state before an ESD event occurs.