Patent ID: 7393776

Claim:
A method of building a closed air gap interconnect structure comprising the steps of: coating a first sacrificial dielectric on a substrate and patterning a set of discrete support regions formed by lithography therein; filling and planarizing said discrete support regions with a robust line support dielectric; patterning contact via holes in said first sacrificial dielectric by reactive ion etching; coating a second sacrificial dielectric and a hard mask layer on said first sacrificial dielectric and said discrete support regions; patterning and etching line trenches in said second sacrificial dielectric and said hard mask layer; depositing a thin conformal dielectric passivation liner layer on said contact via holes and said line trenches; filling said line trenches and said contact via holes with a conductive liner and conductive fill material and planarizing said conductive fill material so that a top surface of said conductive fill material is substantially coplanar with a top surface of said second sacrificial dielectric; forming an electrically conductive cap layer on a top surface of said conductive fill material; forming a stencil having a regular array of holes on a top surface of said electrically conductive cap layer and said hard mask layer; transferring said regular array of holes into said hard mask layer by reactive ion etching and extracting said first sacrificial dielectric and said second sacrificial dielectric to form air gaps; and closing off said air gaps by depositing a dielectric barrier to pinch off a top surface of said regular array of holes in said hard mask layer.