Patent ID: 7462508

Claim:
A method for manufacturing a stack type semiconductor package module, the method comprising the steps of: preparing a lower semiconductor package including a main substrate, a chip mounted on a first surface of the main substrate, an epoxy molding compound (EMC) applied to the first surface of the main substrate to cover the chip and formed at both lateral ends thereof with a plurality of contact holes, and a plurality of solder balls provided at a second surface of the main substrate; preparing a sub-substrate provided at a second surface thereof with a plurality of protrusions, in which a solder is coated on outer peripheral portions of the protrusions, and inserting the protrusions into the contact holes of the lower semiconductor package; melting the solder coated on the outer peripheral portions of the protrusions by heating the sub-substrate coupled with the lower semiconductor package, thereby bonding the protrusions to the main substrate of the lower semiconductor package and the contact holes; and stacking an upper semiconductor package having a structure identical to that of the lower semiconductor package on a first surface of the sub-substrate bonded to the lower semiconductor package.