Patent ID: 8614480

Claim:
A semiconductor device, comprising: a semiconductor substrate; a power metal oxide semiconductor field effect transistor (MOSFET), including: a power MOSFET gate structure disposed on said substrate; a body region of a first conductivity type disposed in said substrate under said power MOSFET gate structure; a source region of a second conductivity type opposite from said first conductivity type; and a drain region of said second conductivity type; a diode-connected MOSFET proximate to said power MOSFET, including: a gate structure disposed on said substrate; a source region of said second conductivity type; a drain region of said second conductivity type; and a body region of said first conductivity type disposed in said substrate under said diode-connected MOSFET gate structure; and metal interconnects, so that: a gate input node of said semiconductor device is electrically coupled to said drain region of said diode-connected MOSFET; said gate input node is electrically coupled through a shunt resistor to said power MOSFET gate structure and said diode-connected MOSFET drain region; a drain input/output node of said semiconductor device is electrically coupled to said power MOSFET drain region; and a source input/output node of said semiconductor device is electrically coupled to said power MOSFET source region; so that said diode-connected MOSFET source region is electrically isolated from said power MOSFET source region by a pn junction and said diode-connected MOSFET drain region is electrically isolated from said power MOSFET source region by a pn junction.