Patent ID: 8612507

Claim:
A computing device provided with a processor having a Single Instruction Multiple Data (SIMD) function executing a plurality of operations by a single instruction, the device comprising: a deciding unit which, in computation of values of nodes on a lattice in a direction where a value of m representing a horizontal axis coordinate of the lattice increases, decides a range of nodes present on m=n, so as to enable the values to be calculated by executing a vector operation through the use of the SIMD function by using values of nodes on m=n−1; an in-range node value calculating unit calculating values of nodes within the range decided by said deciding unit, among the nodes present on m=n, by executing the vector operation through the use of the SIMD function by using the values of the nodes on m=n−1; and an out-of-range node value calculating unit calculating values of nodes outside the range decided by said deciding unit, among the nodes present on m=n, without using the SIMD function.