Patent ID: 7816784

Claim:
A semiconductor die package, comprising: a leadframe having a first surface, a second surface opposite to its first surface, a die attach region, a first tab disposed adjacent the die attach region, and at least one lead electrically coupled to the first tab; a semiconductor die having a first surface disposed on the die attach region at the first surface of the leadframe and a second surface opposite to its first surface, a first electrode disposed on the die's first surface and electrically coupled to the die attach region, and a second electrode disposed on the die's second surface; a heat sink member disposed over the second surface of the semiconductor die and the first tab of the leadframe, the heat sink member having an electrically insulating substrate with a first surface and a second surface, a first electrically conductive layer disposed on the substrate's first surface, and a heat conducting layer disposed on the substrate's second surface, the first electrically conductive layer having a first portion electrically coupled to the die's second electrode by a first body of electrically conductive adhesive and a second portion electrically coupled to the leadframe's first tab by a second body of electrically conductive adhesive; and a body of electrically insulating material disposed between the heat sink member and the leadframe and adhered to the heat sink member and the leadframe.