Patent ID: 8569801

Claim:
A three-dimensional CMOS circuit including: a first crystalline substrate; a second crystalline substrate disposed overlapping the first crystalline substrate; a first field-effect transistor of a first conductivity type formed on the first crystalline substrate, the first field-effect transistor presenting a first source-drain axis oriented in a first secondary crystallographic direction of the first crystalline substrate; a second field-effect transistor of a second conductivity type formed on the second crystalline substrate, the second field-effect transistor presenting a second source-drain axis oriented in a second secondary crystallographic direction of the second crystalline substrate, wherein: the first source-drain axis and the second source-drain axis form a first angle different from a second angle formed, in the first substrate, by the first secondary crystallographic direction and the second secondary crystallographic direction, and the first angle is in a ]0, 90[ range.