Patent ID: 8059200

Claim:
An apparatus including integrated video clock signal generator circuitry, comprising: a first electrode to convey an off-chip control signal for off-chip voltage-controlled oscillator (VCO) circuitry; a second electrode to convey an off-chip VCO signal from said off-chip VCO circuitry; master phase detection circuitry coupled to said first and second electrodes and responsive to a horizontal reference signal and said off-chip VCO signal by providing said off-chip control signal, wherein said horizontal reference signal is related to a horizontal video synchronization signal, and said off-chip VCO signal is synchronized with said horizontal reference signal; and slave phase-locked loop (PLL) circuitry coupled to said second electrode and responsive to said off-chip VCO signal by providing one or more on-chip PLL signals, wherein each of said one or more on-chip PLL signals is synchronized with said off-chip VCO signal.