Patent ID: 7822885

Claim:
A method for multithreaded communications, the method comprising: accepting a plurality of direct memory access (DMA) command messages directed to a fixed port address, each DMA command message including a completion notification field, with a notification address embedded in the completion notification field, and control descriptors (CDs), where the CDs are instruction sequences to be performed by a DMA completion engine; arranging each DMA command message in one of a first fixed number plurality of parallel non-virtual first-in first-out (FIFO) queues, where each of the first fixed number plurality of non-virtual FIFO queues shares the fixed port address, and where each of the first fixed number plurality of non-virtual FIFO queues arranges DMA messages in an order in which they are received; fetching a DMA command message from one of the first fixed number plurality of non-virtual FIFO queues; storing the CDs from the DMA command message in one of a first plurality of context memories, where each context memory is associated with a corresponding one of the first fixed number plurality of non-virtual FIFO queues, and where each context memory has a priority ranking; and, loading the DMA completion engine with CDs from one of the first plurality of context memories; in response to performing the instruction sequences in the CDs, the DMA completion engine concurrently managing a plurality of data transfer operations, giving preferential treatment to CDs sourced from higher priority ranked context memories; for each DMA command message, sending a transfer complete message to the notification address embedded in the DMA command message, indicating completion of an associated data transfer operation; wherein accepting the plurality of DMA command messages includes accepting a first DMA command message and a second DMA command message; wherein arranging the plurality of DMA command messages in the first fixed number plurality of non-virtual FIFO queues includes arranging the first DMA message in a first non-virtual FIFO queue and arranging the second DMA command message in the first non-virtual FIFO queue, subsequent to the first DMA command message; wherein fetching the DMA command message from one of the first fixed number plurality of non-virtual FIFO queues includes fetching the second DMA command message from the first non-virtual FIFO queue, subsequent to fetching the first DMA command message from the first non-virtual FIFO queue; and, wherein concurrently managing the plurality of data transfer operations in response to the CDs includes executing all CDs associated with the first DMA command message, prior to executing CDs associated with the second DMA command message.