Patent ID: 7858462

Claim:
A method of manufacturing a semiconductor device including an NMOS transistor and a PMOS transistor, comprising: forming a silicon layer over a substrate through a gate insulating film; forming a first gate electrode and a second gate electrode by patterning said silicon layer, said first gate electrode being a gate electrode of said NMOS transistor, and said second gate electrode being a gate electrode of said PMOS transistor; introducing a first impurity into said first gate electrode; removing a portion of said second gate electrode such that said second gate electrode has a thickness less than said first gate electrode after said introducing said first impurity; selectively oxidizing said first gate electrode which is formed of silicon to form a silicon oxide film on said first gate electrode by a chemical solution process with a solution including oxidizing agent after said removing a portion of said second gate electrode; after said selectively oxidizing said first gate electrode, forming a first metallic layer formed of a metal capable of forming a silicide over said first and second gate electrodes; and performing a first heat treatment such that the remaining portion of said second gate electrode includes a first silicide layer of a silicide of said first metallic layer such that said first gate electrode and said second gate electrode have substantially the same thickness.