Patent ID: 7872296

Claim:
A semiconductor memory device comprising: a semiconductor substrate having a projection projecting from a substrate surface, an upper end portion of the projection being curved, and a root of the projection having a first width; a first element isolation insulating film formed on the substrate surface at the root of the projection, having an upper surface lower than an upper surface of the projection, and having a second width; a second element isolation insulating film formed in the projection, and having a third width smaller than the first width and the second width; a gate insulating film formed on the projection, and including a charge storage layer; and a gate electrode formed on the gate insulating film, wherein a height of a first portion where the gate electrode is in contact with the gate insulating film above the upper surface of the first element isolation insulating film is smaller than that of a second portion where the gate electrode is in contact with the gate insulating film above an upper end of the second element isolation insulating film.