Patent ID: RE40275

Claim:
In a method for producing a memory cell having a transistor and a capacitor in an integrated circuit, the improvement which comprises: initially providing a whole-area polysilicon layer; covering the polysilicon layer with an oxidation protection layer; structuring the oxidation protection layer by photolithography to produce a mask covering a gate region and a field region of the transistor by etching the oxidation protection layer and uncovering the polysilicon in unmasked regions, causing the oxidation protection layer remaining over the field region to form a dielectric and the underlying polysilicon to form a first electrode of the capacitor; converting the polysilicon of the polysilicon layer in regions freed from the oxidation protection layer into silicon dioxide by local oxidation and thereby structuring the polysilicon layer; applying a further polysilicon layer with an inclusion of a remaining oxidation protection layer; applying and structuring a photoresist mask to cover a region of the further polysilicon layer disposed above the field region for forming a second electrode of the capacitor; and producing the second electrode of the capacitor by etching the further polysilicon layer in the unmasked regions.