Patent ID: 7765381

Claim:
A system, comprising: a plurality of nodes, wherein each node includes an active device and a memory subsystem coupled to the active device; wherein an active device in a node of the plurality of nodes is configured to generate a global address and translation information identifying a translation function, wherein the global address identifies a coherency unit; wherein a memory subsystem included in the node is configured to select the translation function in response to the translation information and to perform the translation function on the global address to generate a physical address of the coherency unit within the memory subsystem; wherein an additional memory subsystem included in an additional node of the plurality of nodes is configured to store the translation information identifying the translation function used in the node, wherein in response to a request for access to the coherency unit, the additional memory subsystem is configured to send the translation information to the node; wherein an additional active device in the additional node is configured to initiate a coherency transaction to gain access to the coherency unit by sending the request for access to the coherency unit to the additional memory subsystem, wherein the request for access includes the global address and additional translation information, and wherein the additional translation information is associated with the coherency unit in the additional node; wherein the additional memory subsystem is configured to send an packet indicating the coherency transaction to an additional interface included in the additional node, wherein the packet includes the global address and the translation information for the node; and wherein in response to the packet, the additional interface is configured to communicate the global address and the translation information to an interface included in the node.