Patent ID: 7288838

Claim:
A semiconductor device, comprising: a substrate having an upper surface including a chip mounting region, a wiring region and a reinforcement layer region, the regions being independent from each other, the wiring region being located outside of the chip mounting region, the reinforcement layer region being located outside of the wiring region; wiring formed in the wiring region; a reinforcement layer formed in the reinforcement layer region; a protective film that is a solder resist, and that is in direct contact with the substrate, and covers the substrate, the wiring and the reinforcement layer to protect them; a semiconductor chip arranged over the chip mounting region and on the protective film; a bonding wire that connects the semiconductor chip to the wiring; and a sealing resin that seals at least the bonding wire and the semiconductor chip; wherein the protective film is disposed under the semiconductor chip, and wherein an upper surface of the protective film is not planar over the wiring and the reinforcement layer, and is planar under the semiconductor chip.