Patent ID: 8679906

Claim:
An asymmetric multi-gated transistor, comprising: a substrate; a semiconductor fin formed on the substrate, wherein the semiconductor fin is asymmetrically doped with a semiconductor dopant, wherein a first side portion of the fin has a high doping concentration and a second side portion opposite therefrom has a lower doping concentration; a gate dielectric formed on the fin, wherein the gate dielectric comprises a first gate dielectric formed on the first side portion of the fin having a high doping concentration and a second gate dielectric formed on the second side portion of the fin having a lower doping concentration, wherein the first gate dielectric formed on the first side portion of the fin having a high doping concentration has a thickness that differs from the thickness of the second gate dielectric formed on the side portion of the fin having a lower doping concentration, wherein the first gate dielectric extends only along the first side portion of the semiconductor fin from the substrate up to a top portion of the semiconductor fin, and the second gate dielectric extends only along the second side portion of the semiconductor fin from the substrate up to the top portion of the semiconductor fin; a first gate conductor formed on the first gate dielectric; and a second gate conductor formed on the second gate dielectric.