Patent ID: 7465972

Claim:
A semiconductor device comprising: a semiconductor substrate; a gate structure comprising a gate electrode over a gate dielectric, the gate dielectric being over the semiconductor substrate; a spacer along a side wall of the gate structure; a buffer layer overlying the semiconductor substrate, wherein the buffer layer and the semiconductor substrate comprise different materials; a semiconductor-capping layer overlying the buffer layer and underlying the gate structure; an insulation region in the semiconductor-capping layer, the buffer layer and the semiconductor substrate, wherein the insulation region is adjacent and spaced apart from an outer sidewall of the spacer; and a recess extending from a top surface down to a bottom surface of the semiconductor-capping layer, wherein the recess has an inner sidewall and an outer sidewall, wherein the outer sidewall of the recess is spaced apart from an inner edge of the insulation region, and wherein the inner sidewall of the recess and the outer sidewall of the spacer are substantially in a same plane.