Patent ID: 6969661

Claim:
A method for forming, in an integrated circuit, a localized region of a material difficult to etch, comprising the steps of: forming a first silicon oxide layer having a thickness smaller than 1 nm on a silicon substrate; depositing, on the first silicon oxide layer, a second layer selectively etchable with respect to the first silicon oxide layer; forming in the second layer a first opening according to the pattern of said localized region; selectively growing on the second layer, around the first opening, a germanium layer, the material of the second layer being chosen to enable this selective growth of the germanium layer, whereby there exists in the germanium layer a second opening conformable with the first opening; depositing the material difficult to etch so that it does not deposit on the germanium layer; depositing a conductive layer to fill the opening in the germanium layer; performing a leveling to expose the germanium layer; and removing the germanium layer, the first silicon oxide layer and the second layer.