Patent ID: 7797668

Claim:
A method for converting a circuit design into a lithography mask to be used for fabricating a semiconductor device by an integrated circuit foundry, comprising: receiving an original design information representing the circuit design from a source entity other than the integrated circuit foundry; identifying priority portions and non-priority portions from the circuit design; configuring the priority portions as priority data, wherein the priority data include a set of critical net information identified from a netlist representing the circuit design; extracting a priority design information from the original design information based on the priority data, wherein the priority design information represents the priority portions of the circuit design; processing both the original design information and the priority design information by applying regular fabrication conditions to the original design information and enhanced fabrication conditions to the priority design information to generate a processed design information, wherein the step of processing is performed by the integrated circuit foundry using its proprietary intellectual properties or technical library; and producing the lithography mask using the processed design information for fabricating the semiconductor device with improved quality and reliability using the produced mask.