Patent ID: 6962862

Claim:
A method of manufacturing a semiconductor device which has an isolation region with a trench isolation structure, comprising a trench formed on a semiconductor substrate and a buried insulating film buried within said trench; which comprises the steps of: forming a gate electrode in an active region adjacent to said isolation region on said semiconductor substrate; applying an ion implantation onto said semiconductor substrate using said gate electrode as a mask to form a first dopant diffusion region which is to be used as a LDD region; forming a first insulating film and a second insulating film, in this order, on the entire surface of a principal plane of said semiconductor substrate, inclusive of said gate electrode; performing an etch back, using said first insulating film as an etching stopper, to form a first sidewall from said second insulating film on a lateral face of said gate electrode, with said first insulating film lying therebetween; forming a resist film, being patterned so as to cover said isolation region; etching said first insulating film by an entire surface etch back, with said resist film being used as a mask, whereby forming a second sidewall from said first insulating film on the lateral face of said gate electrode as well as a trench isolation cover from said first insulating film to cover said isolation region; making another ion implantation, using said gate electrode as well as said first and said second sidewall as a mask, to form a second dopant diffusion region which is to be used as a source/drain region; forming an interlayer insulating film on the entire surface of the principal plane of said semiconductor substrate; and etching said interlayer insulating film selectively under the condition that said trench isolation cover functions as an etching stopper, and thereby forming a contact hole to reach said second dopant diffusion region from the top surface of said interlayer insulating film.