Patent ID: 6862234

Claim:
A method for testing a sense amplifier in a dynamic memory circuit having at the sense amplifier connected to a first bit line pair via a first switching device and to a second bit line pair via a second switching device and first memory cells arranged at crossover points between first word lines and one of the bit lines of the first bit line pair and second memory cells being arranged at crossover points between second word lines and one of the bit lines of the second bit line pair, comprising: writing data to the first and the second memory cells to be subsequently read out; during readout of one of the first memory cells, activating a relevant first word line and the first switching device while the second switching device is closed; and during read-out of one of the second memory cells, activating a relevant second word line and the second switching device while the first switching device is closed; wherein one of the first and one of the second memory cells are read in a sequence such that the first and the second switching devices are switched multiply during testing of the first and second memory cells.