Patent ID: 7863169

Claim:
A method of forming a semiconductor structure comprising: forming a stack, from bottom to top, of a gate dielectric layer, a gate conductor layer, a dielectric oxide layer, and a semiconductor layer on a semiconductor substrate; forming crystallographic facets joined by a ridge in said semiconductor layer by an anisotropic wet etch; forming a masking material layer on said crystallographic facets; forming implantation-damaged masking material portions by implanting Ge, B, Ga, In, As, P, Sb, or inert atoms into said masking material layer, whereby a portion of said masking material layer is not implanted by said Ge, B, Ga, In, As, P, Sb, or inert atoms to form an undamaged masking material portion; removing said implantation-damaged masking material portions selective to said undamaged masking material portion; and etching said semiconductor layer and said dielectric oxide layer employing said undamaged masking material portion as an etch mask.