Patent ID: 7644322

Claim:
A system comprising: a register operable to store a first data value that represents an expected place of an instruction in a predetermined sequence of instructions; a processor to execute a set of instructions to be performed in the predetermined sequence, wherein executing the sequence of instructions causes operations to be performed, the operations comprising: processing an instruction in the set of instructions to determine whether the instruction is being executed according to the predetermined sequence; and setting a second data value to a value that represents the processed instruction's place in the predetermined sequence; an evaluation module to evaluate whether the first data value corresponds to the second data value; an update module to update the first data value in response to an update signal associated with the processor's execution of the instructions according to the predetermined sequence if the first data value corresponds to the second data value; an output module to generate an output signal if the second data value does not correspond to the first data value; a counter that includes the register and the update module; and a smart card that includes the processor and the counter.