Patent ID: 6928500

Claim:
A bus system, comprising: a plurality of bus elements, with each of the plurality of bus elements making requests for access to at least one other bus element; a central unit having a plurality of bus input ports and a plurality of bus outputs, with the central unit selectively coupling at least one of the inputs to at least one of the outputs, the central unit providing for an arbitrated, point-to-point coupling of a particular one of the plurality of bus elements with the at least one other bus element; a first plurality of uni-directional point-to-point buses (“first buses”) for coupling in a first direction the bus elements to the central unit bus inputs; a second plurality of unit directional point-to-point buses (“second buses”) for coupling in a second direction each output of the central unit to a respective bus element; and arbitration logic connected to the plurality of bus inputs of the central unit to which the first plurality of unidirectional point-to-point buses connect, the arbitration logic for granting each of the bus elements access to the at least one other bus element through the central unit one at a time based upon the requests from the bus elements; wherein each bus input port comprises an input state device, a buffer coupled to the input state device, a port multiplexer coupled to the buffer and the input state device, and validity logic that couples to the state device and that receives a control signal from the arbitration logic, said arbitration logic grants the input port access to the bus system and the validity logic provides an output to the port multiplexer.