Patent ID: 8018020

Claim:
A Schottky barrier diode comprising: a semiconductor substrate on which surface a semiconductor layer of first conduction type is provided; junction barrier layers including a plurality of semiconductor layers of second conduction type, and provided with a predetermined interval and at a predetermined depth from the surface of the semiconductor layer of the first conduction type; and a metal layer disposed so as to contact the semiconductor layer of first conduction type and the junction barrier layers, wherein: when a backward voltage is applied to the Schottky barrier diode, a width of a depletion layer of a junction between the semiconductor layer of the first conductive type and the semiconductor layers of second conduction type of the junction barrier layers is arranged such that an inside of the junction barrier layers is depleted, and a width w p of each of the junction barrier layers is set to satisfy a following relationship with a width w op of the depletion layer within the junction barrier layers: w p < 2 ⁢ w op w o = w op + w on N p × w op = N n × w on w o = 2 ⁢ ⁢ ɛ s q ⁢ ( N n + N p N n × N p ) ⁢ ( V bi + VR ) V bi = kT q ⁢ ln ⁢ N n × N p N i 2 w op = w 0 1 + N p N n where, N n : impurity concentration of n − silicon layer, N p : impurity concentration of junction barrier layers, N i : impurity concentration of intrinsic semiconductor, V bi : internal potential, VR: backward applying voltage, w o : width of depletion layer, w op : width of depletion layer within junction barrier layers when the backward voltage is applied, w on : width of depletion layer within n − silicon layer, ε s : permittivity of silicon, q: elementary electric charge, k: Boltzmann's constant, and T: temperature.