Patent ID: 7652379

Claim:
A bond pad structure for an integrated circuit, the structure comprising: one or more lower conductive layers having dielectric material formed therebetween, each lower conductive layer having a width that is less than or equal to a first width; a top conductive layer formed over the one or more lower conductive layers and having dielectric material formed between the top conductive layer and the one or more lower conductive layers, the top conductive layer having a second width that is greater than the first width such that the top conductive layer includes a first portion that is formed over the one or more lower conductive layers and a second portion that extends beyond the first width of the one or more lower conductive layers; a first passivation layer formed on the top conductive layer and having an opening formed therethrough to expose an upper surface area of the second portion of the top conductive layer; a conductive bond pad layer formed on the first passivation layer such that the conductive bond pad layer includes a first portion that is formed over the first portion of the top conductive layer and a second portion that extends through the opening in the first passivation layer and into electrical contact with the exposed upper surface area of the second portion of the top conductive layer; and a second passivation layer that is formed on the conductive bond pad layer and having an opening formed therethrough to expose a bond pad surface area of the first portion of the conductive bond pad layer such that the exposed bond pad surface area is formed over the one or more lower conductive layers.