Patent ID: 8558314

Claim:
A semiconductor device comprising: a power supply line supplied with a power supply voltage; a power supply pad connected with said power supply line; a ground line; a ground pad connected with said ground line; a signal input pad; a protection object circuit; a first connection node connected with said protection object circuit; a first resistance element connected between said signal input pad and said first connection node; a first protection circuit section arranged between said power supply line or said ground line and a second connection node between said signal input pad and said first resistance element; and a second protection circuit section, wherein said second protection circuit section comprises: at least one of a first PMOS transistor having a source connected with said first connection node, a drain connected with said ground line and a gate and a back gate connected with said power supply line, and a first NMOS transistor having a source connected with said first connection node, a drain connected with said power supply line and a gate and a back gate connected with said ground line.