Patent ID: 8367517

Claim:
A method for manufacturing SOI substrates comprising the steps of: a first step of performing first heat treatment on a first semiconductor wafer using a heating furnace under a non-oxidizing atmosphere, thereby forming a second semiconductor wafer; a second step of forming a first insulating layer on a surface of the second semiconductor wafer; a third step of forming a first embrittlement region in the second semiconductor wafer by irradiating the second semiconductor wafer with a first ion; a fourth step of attaching the second semiconductor wafer to a first base substrate with the first insulating layer interposed therebetween; a fifth step of performing second heat treatment on the second semiconductor wafer, thereby forming a first semiconductor layer fixed to the first base substrate with the first insulating layer interposed therebetween and a third semiconductor wafer from which the first semiconductor layer is separated; a sixth step of performing chemical mechanical polishing on the third semiconductor wafer to planarize a surface of the third semiconductor wafer, thereby forming a fourth semiconductor wafer; a seventh step of forming a second insulating layer on a surface of the fourth semiconductor wafer; an eighth step of forming a second embrittlement region in the fourth semiconductor wafer by irradiating the fourth semiconductor wafer with a second ion; a ninth step of attaching the fourth semiconductor wafer to a second base substrate with the second insulating layer interposed therebetween; and an tenth step of performing third heat treatment on the fourth semiconductor wafer, thereby forming a second semiconductor layer fixed to the second base substrate with the second insulating layer interposed therebetween and a fifth semiconductor wafer from which the second semiconductor layer is separated, wherein a temperature of the second heat treatment and a temperature of the third heat treatment are lower than a temperature of the first heat treatment, wherein an oxygen concentration of the second semiconductor wafer is lower than an oxygen concentration of the first semiconductor wafer, and wherein the seventh step is performed after the sixth step without any heat treatment.