Patent ID: 8446749

Claim:
A resistance change memory device comprising: a cell array including a plurality of first lines disposed in parallel, a plurality of second lines disposed to cross the first lines and a resistance change type of memory cells disposed at the cross-points of the first lines and the second lines, the resistance value of the memory cell being changed between a set state and a reset state; a first line driver circuit configured to select one of a set-use pulse voltage, a reset-use pulse voltage and a mask-use voltage and supply the selected voltages to the respective first lines; and a second line driver circuit configured to select at least one of the second lines and supply a second line drive pulse voltage to it, wherein the memory cell is changed from the reset state into the set state under the condition that the set-use pulse voltage and the second line drive pulse voltage are applied simultaneously, and changed from the set state into the reset state under the condition that the reset-use pulse voltage and the second line drive pulse voltage are applied simultaneously, while the memory cell is kept in the present state under the condition that the mask-use pulse voltage and the second line drive pulse voltage are applied simultaneously.