Patent ID: 8138822

Claim:
A circuit comprising: a first current source; a first switch having a first terminal coupled to an output of the first current source, and a second terminal coupled to an output node; a second current source; a second switch having a first terminal coupled to an output of the second current source, and a second terminal coupled to the output node; a third switch configured to open and close in response to a calibration signal, the third switch having a first terminal coupled to the output of the first current source, and a second terminal coupled to a first node; a fourth switch configured to open and close in response to the calibration signal, the fourth switch having a first terminal coupled to the output of the second current source, and a second terminal coupled to the first node; and a programmable current source having an output coupled to the first current source or the second current source, wherein the calibration signal closes the third switch and the fourth switch in response to both the first switch and the second switch being open, and wherein the programmable current source is adjusted using a digital signal to reduce a difference between a first current from the first current source into the first node and a second current into the second current source out of the first node, wherein the digital signal is generated using a digital algorithm based on said difference.