Patent ID: 8031809

Claim:
A template pulse generating circuit that generates a template pulse used for detection of a received pulse in pulse communication, comprising an output mode switching circuit that switches an output mode in accordance with a supplied control signal between a continuous output mode that continuously outputs the template pulses and an intermittent output mode that intermittently outputs the template pulses so that the template pulse is generated in either one of the continuous output mode and the intermittent output mode; and a variable mode pulse generating circuit that generates the template pulses one of continuously and intermittently in accordance with an oscillation mode switching signal supplied to a mode control signal input terminal, wherein the output mode switching circuit supplies the mode control signal input terminal of the variable mode pulse generating circuit with the oscillation mode switching signal, wherein the variable mode pulse generating circuit is configured including a multi-stage inverter circuit section configured including a plurality of cascaded inverters, and a pulse generating logic circuit section including a plurality of switching elements controlled to be opened and closed by outputs of the inverters of the multi-stage inverter circuit section, and capable of generating the template pulse as an intermittent pulse signal with a higher frequency than the frequency of a clock pulse signal supplied to an input terminal of the first stage inverter of the inverters by connecting a predetermined output terminal to one of a positive side and a negative side of a power supply in accordance with opening and closing of the plurality of switching elements, wherein the multi-stage inverter circuit section is configured so that connection and disconnection of a feedback loop circuit can be switched in accordance with the oscillation mode switching signal supplied to the mode control signal input terminal, the feedback loop forming a ring oscillator circuit by forming a closed loop for feeding-back an output of a last stage inverter of a predetermined plurality of stages of inverters to an input terminal of a first stage inverter of the predetermined plurality of stages of inverters, and wherein the pulse generating logic circuit section generates the template pulses one of continuously and intermittently in accordance with the switching of connection and disconnection of the feedback loop circuit.