Patent ID: 7094661

Claim:
A method of forming an electrically conductive element in an integrated circuit, the method comprising: depositing a composite polymer dielectric film onto a substrate, wherein the composite polymer dielectric film includes a silane-containing adhesion promoter layer formed on the silicon-containing substrate, and a low dielectric constant polymer layer formed on the adhesion promoter layer, wherein the adhesion promoter layer is at least partially formed from at least one material having a general structure of (RZ) x —Si—(W—T) y , wherein W is selected from —O—, —CH 2 —, —(CH 2 ) a C═OO—, and —(CH 2 ) a —OO═C—; wherein T is selected from —CR═CR′R″, alkyl chlorides, alkyl bromides, alkyl iodides, and —RC═O; wherein Z is selected from O and NR; wherein R, R′and R″ are an H, alkyl or aromatic group; wherein a is 0 or an integer; wherein x=1, 2 or 3; wherein y=1, 2 or 3; and wherein x+y=4; depositing a silane-containing hard mask layer onto the composite polymer dielectric film; exposing the hard mask layer and the adhesion promoter layer to a free radical-generating energy source to chemically bond the adhesion promoter layer to the underlying silicon-containing substrate and to the low dielectric constant polymer layer, and to chemically bond the composite polymer dielectric film to the hard mask layer; etching an etched feature in the hard mask layer and the composite polymer dielectric film; and depositing an electrically conductive material in the etched feature.