Patent ID: 8108453

Claim:
In a phase-locked loop (PLL) system, a method for efficiently switching a loop bandwidth using stored values in a digital filter, the method comprising: accepting an input signal; in a first timeslice, digitally filtering the input signal using base coefficients multiplied by stored filter output and input values from previous timeslices; using a first filter output value, acquiring the input signal frequency in a first bandwidth; in response to changes in the input signal frequency, digitally filtering the input signal in a predetermined number of first intermediate period timeslices using transient coefficients multiplied by number stored filter output and input values from previous timeslices; maintaining the first filter output value within a predetermined range; in a second timeslice, digitally filtering the input signal using said base coefficients multiplied by stored filter output and input values from previous timeslices; and, using a second filter output value, acquiring the input signal frequency in a second bandwidth.