Patent ID: 7682881

Claim:
A method of manufacturing a thin film transistor substrate, the method comprising: providing a substrate wherein first and second semiconductor patterns are formed on a blocking layer; forming a first gate insulating layer on the first and the second semiconductor patterns; forming a first pattern of a second gate insulating layer overlapping with a channel region of the first semiconductor pattern, forming a second pattern of the second gate insulating layer overlapping with a channel region of the second semiconductor pattern; forming a first gate electrode overlapping with the channel region of the first semiconductor pattern; forming a second gate electrode overlapping with the channel region of the second semiconductor pattern; forming a first conductive type source/drain regions by injecting a high-concentration first conductive type impurity ion into the first semiconductor pattern; and forming a second conductive type source/drain regions by injecting a high-concentration second conductive type impurity ion into the second semiconductor layer, wherein the second conductive type impurity is injected into the blocking layer under the first semiconductor pattern when the second conductive type source/drain regions are formed.