Patent ID: 8274131

Claim:
A semiconductor device including a bipolar complementary metal oxide semiconductor (BiCMOS) device comprising: a semiconductor layer formed on a semiconductor substrate, wherein said semiconductor layer and said substrate include a same first dopant type, and a concentration of said first dopant type is greater in said substrate than in said semiconductor layer, with said substrate including a gradient zone that has a gradually increasing concentration of said first dopant type from an interface of the semiconductor layer with the substrate toward said greater concentration of said substrate; a metal oxide semiconductor (MOS) transistor formed on or in said semiconductor layer; a bipolar transistor formed on or in said semiconductor layer; and an insulating trench located between said MOS transistor and said bipolar transistor, wherein said insulating trench is formed through said semiconductor layer and into said gradient zone of said substrate, so that a bottom of said insulating trench stops at a depth in said substrate, and at least one top corner of said insulating trench is formed as a rounded corner in a lateral plane of said substrate; wherein said depth corresponds to a depth having a first dopant type concentration of about 5E17 atoms/cm 3 in said gradient zone of said substrate; said MOS transistor is formed with a doped well in said semiconductor layer, and said doped well includes a second dopant type with a concentration of 1E17 atoms/cm 3 or less; at least one of said MOS transistor or said bipolar transistor is configured for normal operation at an applied voltage of about 50 Volts or more; said semiconductor layer is formed with said first dopant concentration of about 5E15 atoms/cm 3 or less; and said substrate has said greater first dopant type concentration of about 1E19 atoms/cm 3 or more.