Patent ID: 7026201

Claim:
A method for forming a polycrystalline silicon thin film transistor, comprising the steps of: sequentially forming a buffer layer and an amorphous silicon layer on a glass substrate; forming a polycrystalline silicon layer including multiple protrusions by crystallizing the amorphous silicon layer according to a crystallization method in which the multiple protrusions are formed due to collision between crystal grains; patterning the polycrystalline silicon layer in an active pattern which includes only two protrusions of the multiple protrusions, which are apart from each other and located at both sides of a gate electrode-forming area; applying a barrier layer on the patterned polycrystalline silicon layer while partially covering the two protrusions; forming a source electrode and a drain electrode at the protrusions of the polycrystalline silicon layer formed at both sides of the gate electrode-forming area by ion-implanting dopants into a resultant lamination; eliminating the barrier layer; forming a gate insulating layer on the resultant lamination; and forming a gate electrode on the gate electrode-forming area between the source electrode and the drain electrode.