Patent ID: 7913142

Claim:
A method for testing at least a first arithmetic unit of a microcontroller of a control unit, the microcontroller having at least the first arithmetic unit and a second arithmetic unit, the control unit having a control unit interface, the first arithmetic unit having a first scan chain and at least a first memory unit, the second arithmetic unit having a second scan chain and at least a second memory unit, the method comprising: a) loading first test data with the aid of the control unit interface for testing the first arithmetic unit; b) saving the loaded first test data in the second memory unit of the second arithmetic unit; c) switching the first arithmetic unit to a test mode in which the first scan chain of the first arithmetic unit is accessible with the aid of the second arithmetic unit; d) reading the first test data from the second memory unit with the aid of the second arithmetic unit; e) shifting the first test data which have been read through the first scan chain of the first arithmetic unit switched to the test mode, with the aid of the second arithmetic unit, for providing test result data for the first arithmetic unit; and f) checking the provided test result data for plausibility with the aid of the second arithmetic unit for providing a test result for the first arithmetic unit.