Patent ID: 7432834

Claim:
A method for encoding a data input sequence of m bits into an output sequence codeword of m+1 bits, where m is an integer multiple of an ECC symbol size s, the method comprising the steps of: receiving a data stream of unencoded m-bit input sequences, including a first m-bit input sequence; dividing each m-bit input sequence into a first block of s bits and at least one second block of (m-s) unencoded bits; in response to at least one of the second blocks of (m-s) unencoded bits adjacent the first block of s bits of the first m-bit input sequence, encoding the first block of s bits of the first m-bit input sequence into an encoded block of s+1 of the first m-bit input sequence, wherein the encoded block of s+1 bits of the first m-bit input sequence in conjunction with adjacent unencoded blocks satisfies a j constraint, a k constraint and a t constraint and the encoded block of s+1 bits of the first m-bit input sequence gives rise to at least q transitions after 1/(1⊕D), precoding: interleaving the encoded block of s+1 bits of the first m-bit input sequence among (m/s-1) unencoded blocks of the first m-bit input sequence to generate an (m+1)-bit output sequence codeword; precoding the (m+1)-bit output sequence codeword with a 1/(1⊕D) precoder; and storing the precoded output sequence codeword on a data storage medium.