Patent ID: 7761665

Claim:
A data processing apparatus comprising: a processing unit configured to issue a series of access requests, each access request having associated therewith an address of a data value to be accessed; an n-way set associative cache memory configured to store data values for access by the processing unit, each way of the cache memory comprising a plurality of cache lines, each cache line being configured to store a plurality of data values, the cache memory further comprising for each way a tag storage configured to store, for each cache line of that way, a corresponding tag value, the tag value being derived from a portion of the address common to each data value held in that cache line; the cache memory being configured, when the processing unit is issuing access requests specifying data values held sequentially in a cache line of a current way of the cache memory, to perform a speculative lookup in at least one tag storage to determine whether the tag value associated with a next cache line in one way associated with the at least one tag storage equals an expected tag value; if that tag value does equal the expected tag value, and following an access request identifying a last data value in said cache line of said current way, a further access request is issued identifying the next cache line, then the cache memory is configured, without further reference to the tag storages of the cache memory, to access from that next cache line of said one way the data value the subject of the further access request.