Patent ID: 8018076

Claim:
A semiconductor device comprising: a substrate having a plurality of plates, said substrate further having an elongate opening defined therethrough from a first surface to a second surface; a plurality of connecting patterns located on the second surface of said plurality of plates of said substrate, each of said plurality of connecting patterns having a wire connecting portion located at a peripheral area of said elongate opening; a semiconductor chip mounted to the first surface of the substrate; a bonding material, said semiconductor chip is mounted to the first surface of said substrate via said bonding material; a plurality of electrodes located on the surface of said semiconductor chip and aligned with the elongate opening of said substrate; a plurality of wires extending within the elongate opening of said substrate, first ends of said plurality of wires being respectively bonded to said plurality of electrodes, and second ends of said plurality of wires being respectively bonded to the wire connecting portions of each connecting patterns; a resist which covers the second surface of said substrate and said plurality of connecting patterns, wherein the wire connecting portions of said plurality of connecting patterns are exposed from said resist; and a resin which covers said plurality of electrodes, said plurality of wires, and the wire connecting portions of said plurality of connecting patterns.