Patent ID: 7821433

Claim:
A pipeline-type analog-to-digital (A/D) converter, comprising: N number of stages cascade-connected; and a digital correction circuit that receives digital signals outputted from the N number of stages and outputs a final digital signal, wherein an Mth stage in the N number of stages includes: a sub A/D converter A/D-converting an input analog signal; a sub digital-to-analog (D/A) converter D/A converting a digital signal outputted from the sub A/D converter; a differential amplifier circuit that includes a sample hold circuit and an operational amplifier, performs an sampling operation and a holding operation to obtain a difference between the input analog signal and an output signal of the sub D/A converter, and amplifies the difference; and a compensation circuit compensating a gain error of the operational amplifier in an operation of the differential amplifier circuit, the gain error being caused by parasitic capacitance between an input terminal and an output terminal of the operational amplifier, and wherein 1≦M<N.