Patent ID: 7554475

Claim:
An inverted ladder circuit for a Digital to Analog Converter (DAC) having an input binary word representing an input value and an output current corresponding to a converted analog value, said circuit comprising: at least two fine resistor ladders comprising at least: an upper fine resistor ladder comprising a plurality of switches, each in parallel with a corresponding plurality of fine resistors; and a lower fine resistor ladder comprising a corresponding plurality of switches, each in parallel with a corresponding plurality of fine resistors; and a coarse resistor ladder having the same corresponding plurality of coarse ladder resistors and coarse ladder switches in parallel pairs, wherein said coarse resistor ladder slides upon said at least two fine resistor ladders, and wherein said coarse ladder switches each operate to include a preceding string of coarse resistors, and wherein both of said upper and lower fine switches are operable in parallel to define a combined output resistance in accordance with the lower five bits of the input binary word, such that upon matching said plurality of fine ladder resistors with said plurality of coarse ladder resistors, a current is obtained proportional to the input binary word, and such that the total string resistance is kept constant, independent of the position, and such that said circuit provides substantially improved load driving ability.