Patent ID: 7468331

Claim:
A method comprising: forming a plurality of elongate features on a semiconductor part, the elongate features each having an associated long dimension substantially along a long axis and an associated short dimension, the associated long dimension greater than the associated short dimension; and forming a plurality of alignment features on the semiconductor part, the plurality of alignment features aligned substantially along a long axis, the plurality of alignment features to define an alignment region, the alignment region bordered by a first outer alignment feature and a second outer alignment feature and extending vertically, wherein a portion of at least one of the plurality of elongate features is included in the alignment region, the long axis of the plurality of elongate features and the long axis of the alignment features are neither parallel nor perpendicular to one another, and the elongate features are dimensioned to interact with electromagnetic radiation in a manner that would interfere with detection of the alignment features were the elongate features aligned parallel to the first axis.