Patent ID: 7868374

Claim:
A semiconductor structure comprising: a substrate including an insulator layer; an epitaxial semiconductor structure including a horizontal layer separated from said insulator layer, a first vertical layer vertically contacting said insulating layer, and a second vertical layer contacting said insulating layer and not contacting said first vertical layer, wherein an entirety of said epitaxial semiconductor structure is of integral construction and epitaxially aligned as a single crystal; an inner gate electrode insulated from said epitaxial semiconductor structure and located between said first and second vertical layers and between said horizontal layer and said insulating layer; an outer gate electrode insulated from said epitaxial semiconductor structure and located over said epitaxial semiconductor structure; an inner gate dielectric contacting sidewalls and a planar top surface of said inner gate electrode and a bottom surface of said epitaxial semiconductor structure; and an outer gate dielectric contacting a bottom surface of said outer gate electrode and outer sidewalls and a top surface of said epitaxial semiconductor structure.