Patent ID: 7397315

Claim:
A current-limited oscillator, comprising: a delay section that includes a plurality of series-connected inverters to delay an output pulse on the basis of a current limiting level indication signal; at least one first transistor that limits a first current between said inverters and a high potential power supply; and at least one second transistor that limits a second current between said inverters and a low potential power supply, wherein at least one of said plurality of inverters is configured as a first inverter that is connected with said first transistor and is not connected with said second transistor, and at least another of said plurality of inverters is configured as a second inverter that is not connected with said first transistor and is connected with said second transistor, said plurality of inverters are divided into a first block that delays rising portions of said output pulse and a second block that delays falling portions of said output pulse, and said first block and said second block each include one or more of said inverters, and said inverters in each block are connected in an order of said first inverter, said second inverter, and said first inverter.