Patent ID: 7018929

Claim:
A method for in-situ reduction of volatile residual contamination on a semiconductor process wafer following a plasma etching process comprising the steps of: first performing a plasma etching process; providing an ambient controlled chamber for accepting transfer of a semiconductor process water under controlled ambient conditions following a plasma etching process; providing a heat exchange surface disposed within the ambient controlled chamber in thermally conductive heat exchange relationship with a thermally conductive heating source; then transferring the semiconductor process wafer under controlled ambient conditions to the ambient controlled chamber, said semiconductor process wafer comprising volatile residual contamination following the plasma etching process; mounting the semiconductor process wafer in heat exchange relationship with the heat exchange surface; and, then heating in-situ the heat exchange surface by thermal conduction for a time period to thereby heat the semiconductor process wafer to vaporize the volatile residual contamination while simultaneously removing a resulting vapor from the ambient controlled chamber.