Patent ID: 6987295

Claim:
A trench capacitor for use in a DRAM memory cell, the trench capacitor comprising: a substrate having a substrate surface and a trench formed therein, said trench having a lower trench region, an upper trench region, a base, and walls; a lower capacitor electrode adjoining, in said lower trench region, one of said walls of said trench; a storage dielectric disposed at least partially in said trench; a spacer layer disposed in said upper trench region, said spacer layer adjoining one of said walls of said trench and made from an insulating material; and an upper capacitor electrode disposed at least partially in said trench, said upper electrode formed from at least three layers, said layers in each case extending along said walls and said base of said trench to at least an upper edge of said spacer layer, said layers including a first layer disposed in said trench on said storage dielectric and containing doped polysilicon, a second layer disposed on said first layer and containing metal-silicide, and a third layer disposed on said second layer and containing doped polysilicon.