Patent ID: 7911851

Claim:
A non-volatile memory apparatus, comprising: an electrically-alterable non-volatile memory cell having more than two predetermined memory states; a programming signal source which applies a programming signal to said memory cell; control circuitry which generates a plurality of programming reference parameters and selects among said plurality of programming reference parameters in accordance with information indicating a memory state to which said memory cell is to be programmed, each programming reference parameter corresponding to a different memory state of the memory cell, and said control circuitry controlling the application of said programming signal to said memory cell based on the selected programming reference parameter; and read circuitry which reads the state of the memory cell by comparing a parameter corresponding to the state of the memory cell with a plurality of read reference parameters having values that are different from values of said programming reference parameters, wherein each of said read reference parameters is generated based on at least one of said programming reference parameters, and said read circuitry time shares common circuit components with the control circuitry.