Patent ID: 7443186

Claim:
A test structure for characterizing a circuit fabricated on a substrate, said test structure comprising: (a) a differential cell to output a differential output signal at a first signal terminal and a second signal terminal in response to application of a transistor bias voltage to a bias terminal and application of a differential input signal applied to a third signal terminal and a fourth signal terminal and, alternatively, to output a differential output signal at said third signal terminal and said fourth signal terminal in response to application of said bias voltage to said bias terminal and application of a differential input signal applied to said first signal terminal and said second signal terminal; (b) a first probe pad interconnected with said third signal terminal; (c) a second probe pad adjacent to said first probe pad and interconnected with said first signal terminal; (d) a third probe pad adjacent to said second probe pad and interconnected with said bias terminal; (e) a fourth probe pad adjacent to said third probe pad and interconnected to said second signal terminal; and (f) a fifth probe pad adjacent to said fourth probe pad and interconnected to said fourth signal terminal.