Patent ID: 7342437

Claim:
A charge pump circuit comprising: a first charge pump circuit comprising a plurality of first charge transfer devices connected in series between a node at a power supply voltage and a first output terminal, a plurality of first capacitors, a first terminal of each of the first capacitors being connected to a corresponding connecting node between the first charge transfer devices, and a plurality of first clock drivers that provide second terminals of the first capacitors with clocks so that the second terminals next to each other are provided with the clocks opposite in phase to each other; and a second charge pump circuit comprising a plurality of second charge transfer devices connected in series between a node at a ground voltage and a second output terminal, a plurality of second capacitors, a first terminal of each of the second capacitors being connected to a corresponding connecting node between the second charge transfer devices, and a plurality of second clock drivers that provide second terminals of the second capacitors with clocks so that the second terminals next to each other are provided with the clocks opposite in phase to each other, wherein a positive boosted voltage generated at one of the connecting nodes between the first charge transfer devices is applied to a gate of a first MOS transistor of one of the second clock drivers to turn the first MOS transistor on so that the one of the second clock drivers outputs a high level during a first period.