Patent ID: 8756473

Claim:
A method for decoding, comprising: using a first decoder to perform a first decoding on each data set in a first plurality of data sets using a first error correction code, wherein: a first data set in the first plurality of data sets, processed during the first decoding, is obtained from a first NAND Flash chip; and a second data set in the first plurality of data sets, processed during the first decoding, is obtained from a second NAND Flash chip; determining if the first decoding is successful; and in the event it is determined that the first decoding is not successful: using a second decoder to perform a second decoding on each data set in a second plurality of data sets using a second error correction code, wherein: the second plurality of data sets processed during the second decoding includes one or more results from the first decoding using the first error correction code; and parity information, used by the second decoder to perform the second decoding, is obtained from a third NAND Flash chip; and using the first decoder to perform a third decoding on each data set in the first plurality of data sets using the first error correction code, wherein the first plurality of data sets processed during the third decoding includes one or more results from the second decoding using the second error correction code.