Patent ID: 8638609

Claim:
A method of programming a memory system comprising: for duration of a time period, increasing a voltage level of a Program Signal coupled to a selected word line which is coupled to a memory transistor to be programmed; during the time period, increasing a voltage level of a first Bias Signal coupled to a first word line adjacent to a source side of the selected word line; applying a second Bias Signal to a second word line adjacent to the first word line on the source side of the selected word line; increasing a voltage level of a third Bias Signal coupled to a third word line adjacent to a drain side of the selected word line, the voltage level of the third Bias Signal being increased to a first predetermined voltage level at a first point of time during the time period; lowering the voltage level of the third Bias Signal to a second predetermined voltage level before a second point of time during the time period; and during the time period, increasing a voltage level of a Pass Signal to a plurality of word lines, wherein the plurality of word lines excludes the selected word line and the first, second, and third word lines.