Patent ID: 8741161

Claim:
A method of manufacturing a semiconductor device, the method comprising: forming a pillar on a base layer; forming an insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar; and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer, wherein the pillar comprises a memory cell on the base layer, and a hard mask layer on the memory cell, wherein after the forming the insulating layer and before the polishing the insulating layer and the pillar, the lowermost portion of the upper surface of the insulating layer is higher than a lower surface of the hard mask layer, and is lower than an upper surface of the hard mask layer.