Patent ID: 8252625

Claim:
A method of manufacturing a thin film transistor substrate, the method comprising: forming a gate line and a gate electrode connected with the gate line on the substrate; stepwise forming a first border insulating layer having a first containment hole and a second containment hole which expose the gate electrode; forming a gate insulating layer to be filled within the first containment hole; forming a data line intersecting the gate line, a source electrode connected with the data line, a drain electrode facing the source electrode, a pixel electrode connected with the drain electrode, and a second border insulating layer formed on the source electrode, the drain electrode, and the data line; forming a semiconductive layer constituting a channel between the source electrode and the drain electrode within an area provided by the first border insulating layer and the second border insulating layer; and forming a protective layer within the second containment hole to cover the semiconductive layer and its peripheral area.