Patent ID: 8278719

Claim:
A semiconductor device comprising: a substrate having a substrate impurity concentration and a substrate resistivity no greater than 20 ohm-cm, having a top surface, and having a conductive bottom surface for providing electrical connection to a device package contact; a first plurality of wells having a first conductivity type; a second plurality of wells having a second conductivity type opposite the first conductivity type; a first plurality of transistors formed proximate to the top surface of the substrate, said first plurality of transistors including a respective transistor disposed in each of the first plurality of wells; a second plurality of transistors formed proximate to the top surface of the substrate, said second plurality of transistors including a respective transistor disposed in each of the second plurality of wells; a buried layer formed via ion-implantation, having the first conductivity type and comprising a buried layer impurity concentration greater than the substrate impurity concentration, said buried layer extending substantially continuously beneath and vertically spaced apart from both the first and second plurality of wells; and a vertical conductive path between the buried layer and the conductive bottom surface of the substrate, said vertical conductive path traversing through the substrate.