Patent ID: 8125028

Claim:
A high power semiconductor device, comprising: a first type doped semiconductor substrate; a second type doped epitaxial layer deposited on the first type doped semiconductor substrate; a first type doped body region disposed in the second type doped epitaxial layer; a heavily doped drain region formed in the second type doped epitaxial layer and isolated from the first type doped body region with an isolation region and a channel; a second type deep heavily doped region extending from the heavily doped drain region to the first type doped semiconductor substrate; a pair of inversed type heavily doped source regions disposed in the first type doped body region, wherein the pair of inversed type heavily doped source regions comprises a first type heavily doped source and a second type heavily doped source, and the first type heavily doped source is a ring region encompassing the heavily doped drain region; and a gate electrode disposed overlying the channel with a dielectric interposed therebetween, wherein the high power semiconductor device is isolated from the other devices with a first type heavily doped region.