Patent ID: 8839210

Claim:
A program performance analysis apparatus for analyzing performance of a program being executed on hardware, the program performance analysis apparatus comprising: a performance information acquisition unit to obtain, from a CPU (Central Processing Unit) that executes the program, performance information indicating the operating state of the CPU and a plurality of items including a number of Very Long Instruction Words (VLIWs) per cycle, an average number of instructions of VLIWs, a number of stall cycles of pipeline, a number of executed instructions, a number of executed LOAD/STORE instructions, a number of cache-missing in data cache, a number of cache-missing in instruction cache, and a number of a branch prediction error; a difference information generator to make a comparison between the plurality of items of performance information of a first program, which is obtained by the performance information acquisition unit, and the plurality of items of performance information of a second program obtained by making a change to an arbitrary portion of the first program, and to generate performance difference information from a result of the comparison; and a change evaluation unit to determine whether the performance of the program is improved with the change using the performance difference information generated by the difference information generator, and to output a determination result, wherein the change evaluation unit determines that the performance of the program is improved when one half or more of the plurality of items are improved.