Patent ID: 8310274

Claim:
A field of cell elements for data processing, the field comprising: a plurality of function cells, each (a) adapted for executing at least one of algebraic and logic functions and (b) including at least one arithmetic logic unit (ALU); a plurality of memory cells adapted for at least one of receiving, storing, and outputting processing data; and a configurable bus system adapted for being sequentially configured during program runtime into a plurality of different configurations that each provides a respective set of connections of memory cells of the plurality of memory cells to function cells of the plurality of function cells, different ones of the plurality of different configurations being used for processing of different respective sequential parts of the program via the respective connections of the configurations; wherein: the sets of connections differ between at least some of the different configurations; and for each function cell to memory cell connection of the sets of connections, the function cell of the respective connection controls memory accesses of the memory cell of the respective connection.