Patent ID: 7769795

Claim:
A microprocessor comprising: an execution pipeline comprising: a plurality of execution units, a register file, a residue computation unit, a residue checking unit, a first path of execution, that includes one or more of the execution units, configured to perform a floating point operation, and a second path of execution, that includes the residue computation unit, configured to compute residues for a result of the floating point operation performed by the first path, wherein the result of the floating point operation and the residue for the result of the floating point operation are stored in the register file, wherein the residue checking unit detects errors in an operand of the floating point operation, the result of the floating point operation, and the residue of the result of the floating point operation at a time of decision of whether to commit the result of the floating point operation, and wherein the residue checking unit detects errors using residues computed by the residue computation unit and the residue checking unit for end-to-end protection of the microprocessor's execution pipeline, wherein the residue checking unit is configured to generate a residue from a result of a floating point operation and compare the generated residue against a corresponding residue computed by the second path, and operable to indicate whether an error is detected based, at least in part, on the comparison, and wherein the residue checking unit is further operable to assemble a residue for a result of a double precision floating point operation from first and second partial residues computed by the second path, wherein the first and second partial residues respectively correspond to an even and odd portion of the double-precision result.