Patent ID: 8054859

Claim:
Reception device able to receive packets in a packet communication network comprising at least two stations, the said device comprising: means for receiving packets containing samples of the said network, the said samples originating from data sampled every period T smp , where T smp emanates from a time base synchronized on all the stations of the said network; means for regenerating a counting ramp with the aid of a phase-locked loop receiving the samples and furthermore delivering local samples every period T smp and a reconstituted clock; means for initializing, on every zero-crossing of the counting ramp, an image counter which is regulated by the reconstituted clock; means for generating image pips every zero-crossing of the said image counter; and means for reconstituting a synchronization signal on the basis of the said image pips; the phase-locked loop comprising: a samples comparator comparing the samples and the local samples and delivering an error signal; a corrector receiving the error signal and delivering a corrected error signal, the corrector having a static gain equal to 1; a digital oscillator receiving the corrected error signal and delivering the reconstituted clock, the clock having a frequency dependent on the corrected error signal and being proportional to a gain; wherein the phase-locked loop comprises, furthermore, a gain adjustment device which determines a gain value as a function of the error signal for modification of a cutoff frequency wherein the gain adjustment device modifies the cutoff frequency of the phase-locked loop based on whether the reception device is in a latching phase or a tracking phase.