Patent ID: 7541203

Claim:
A process for electrically testing a thinned silicon substrate containing a through-silicon via, the process comprising: obtaining a thinned silicon substrate having a thickness of less than about fifty micrometers comprising at least one through-silicon via (TSV) and at least one circuit design; wherein the thinned silicon substrate is a member selected from the group consisting of a thinned silicon wafer, a stack of thinned silicon wafers, a thinned die and a stack of thinned die; obtaining a polymeric electrically conductive adhesive composition; obtaining a mechanical handler which is a member selected from the group consisting of a glass substrate and a thick silicon wafer, wherein the mechanical handler comprises a grounding path to the thinned silicon substrate and through the electrically conductive adhesive; forming a temporary bond between the thinned silicon substrate and the mechanical handler by means of the adhesive composition; and electrically testing the thinned silicon substrate; whereby the at least one circuit design is substantially protected from electrostatic discharge by means of the grounding path.