Patent ID: 7277396

Claim:
A processor comprising: controller circuitry operative to control performance monitoring for at least one flow of protocol data units received by the processor; the controller circuitry comprising a classifier and being operative to access memory circuitry associated with the processor; wherein the classifier is configured to perform at least a first pass classification of at least a subset of the protocol data units; the controller circuitry in conjunction with a first pass classification of a protocol data unit of a first type being operative to execute a first script, and in conjunction with a first pass classification of a protocol data unit of a second type being operative to execute a second script different than the first script, a result of execution of at least one of the first and second scripts being storable in the memory circuitry; wherein a performance monitoring output is generated, responsive to receipt of the protocol data unit of the second type, based at least in part of the result of execution of at least one of the first and second scripts.