Patent ID: 8136073

Claim:
A method for fitting a circuit design having been synthesized, comprising: identifying overflow conditions from a first placement of a mapped circuit design in association with an integrated circuit; marking circuit blocks associated with the integrated circuit with control set identifiers; implementing a second placement for a first circuit object from a list of sequential circuit objects generated responsive at least in part to the overflow conditions, wherein the first circuit object is associated with a first control set identifier, wherein the second placement comprises: locating a site for placement of the first circuit object, wherein the site is associated with a first circuit resource block, and the first circuit resource block is associated with circuit resource blocks of the integrated circuit; categorizing nearest neighbor circuit resource blocks of the first circuit resource block in response to statuses, wherein the statuses include categories of control set identifiers and an unused category; and placing, with a placer operating in a computer, the first circuit object in a nearest neighbor of the nearest neighbor circuit resource blocks of the first circuit resource block for the second placement, wherein the nearest neighbor is associated with a categorization from the act of categorizing including the first control set identifier of the first circuit object.