Patent ID: 7073253

Claim:
A process for making an interconnect for attaching a multi-chip module to a circuit substrate comprising: providing a member elongated in a longitudinal direction; forming a series of circuit pads on opposing major faces of said member, said circuit pads being arranged in at least two lines in said longitudinal direction on each of said major faces, with the circuit pads in a line on one major face of said member being aligned with respective opposing circuit pads on the other major face of said member; forming a series of openings in said circuit pads extending through said member and at least one circuit pad on one of said major faces and at least another circuit pad on said opposing major face, said openings being arranged in said at least two lines; forming a conductive metalization in said openings electrically connecting each of said one circuit pads to a respective one of said another circuit pads; dividing said member along a generally central axis of said openings in said at least two lines to provide at least one interconnect member having at least a first elongated side and a second opposed and generally parallel elongated side, said first and second sides extending in said longitudinal direction; each of said first and second sides having at least one portion formed by a series of metallized depressions in said respective first and second sides extending inwardly from a first outer surface of said first side and a second outer surface of said second side; and wherein said depressions form leads.