Patent ID: 7248662

Claim:
A system to derive symbol timing for a receiver, comprising: a slicer configured to receive a signal segment from a communication channel and to decode the signal segment into a discrete data symbol; a calculator configured to compute an average symbol timing phase error based upon the signal segment and the discrete data symbol; an integrator configured to integrate a scaled value of the average symbol timing phase error; a symbol timing generator configured to produce symbol timing for the receiver based on the integrated scaled timing phase error; a forward equalizer having a plurality of coefficients and configured to apply the plurality of coefficients to the received signal segment, producing an equalized signal; a phase rotator configured to receive the discrete data symbol as a reference signal and to receive a phase-corrector angle, and further configured to produce a phase-corrected reference signal; and a decision-feedback equalizer (DFE) configured to receive a difference between the phase-corrected reference signal and a signal indicating error present in a DFE-compensated signal, and to receive a delayed difference between the phase-corrected reference signal and an output of the forward equalizer.