Patent ID: 7511506

Claim:
A semiconductor testing system for testing a semiconductor device including an output buffer switching between a first mode for outputting data based on an input test signal and a second mode for setting an output terminal to a high impedance state, comprising: a test signal generator supplying the test signal to the semiconductor device; an external tester setting an output terminal of the output buffer to a predetermined potential if the output buffer is set to the second mode, wherein the external tester is a circuit applying the predetermined potential through a resistor that has a resistance value higher than an output impedance value of the output buffer in the first mode; and a detecting circuit measuring a potential of an output of the output buffer, the detecting circuit detecting a stuck-at fault in the semiconductor device based on the data if the test signal designates the first mode and detecting a stuck-at fault in the semiconductor device based on the predetermined potential if the test signal designates the second mode.