Patent ID: 8237195

Claim:
A field effect transistor device having a strained semiconductor channel region overlying a heterostructure semiconductor on a metal substrate, comprising: a first metal layer; a first semiconductor layer characterized by a thickness of approximately 3 μm or thinner and disposed directly on the first metal layer, the first semiconductor layer having a first semiconductor material and a second semiconductor material in a relaxed heterostructure, wherein the first semiconductor layer comprises no graded layers, the first semiconductor layer being heavily doped with a doping concentration of 1.0×10 19 cm −3 or higher and characterized by a first conductivity; a second semiconductor layer disposed directly on the first semiconductor layer, the second semiconductor layer having the first semiconductor material and the second semiconductor material in a relaxed heterostructure, wherein the second semiconductor layer comprises no graded layers, the second semiconductor layer having a second conductivity that is lower than the first conductivity; a trench extending into the second semiconductor layer; a channel region having a strained layer of the first semiconductor material adjacent a trench sidewall; a second metal layer overlying the second semiconductor layer, wherein a current conduction in the channel region is characterized by an enhanced carrier mobility in the strained semiconductor layer; and wherein the first metal layer has sufficient thickness for supporting the field effect transistor.