Patent ID: 7461771

Claim:
A method of treating a via connected with a substrate, comprising: aligning a stencil with the substrate, the stencil including a pattern with a plurality of apertures and a shield; connecting the stencil with the substrate so that the shield covers a hole and a first portion of a pad of the via, and the apertures are positioned over a second portion of the pad; applying a lead-free solder paste to the stencil to print the paste directly upon the second portion only, the shield preventing the paste from entering the hole; removing the stencil from the substrate; and reflowing the paste so that a flux drains through the hole and separate sections of lead-free solder are positioned around the hole directly upon the pad and wet only a portion of a surface area of the pad, the hole remaining unobstructed, the separate sections of lead-free solder exposed to receive an electrical test probe.