Patent ID: 8385147

Claim:
A sensing circuit comprising: a reference column including a reference voltage node, a reference memory cell, a first MOS transistor, and a first differential threshold MOS transistor; and a plurality of data columns, each coupled to a respective data voltage node, in parallel with the reference column, wherein each data column comprises a data memory cell, a second MOS transistor, and a second differential threshold MOS transistor; wherein one or more of the differential threshold transistors are transistors that each have a gate-to-source threshold voltage that differs from a gate-to-drain threshold voltage; wherein one or more of the differential threshold transistors comprises: a substrate of semiconductor material of a first conductivity type; a first region and a second region in the substrate, wherein the first and second regions are of a second conductivity type and spaced apart from each other defining a channel region therebetween; an insulating layer disposed over the channel region of the substrate, wherein the insulating layer comprises opposed insulating portions including a first insulating portion adjacent the first region and a second insulating portion adjacent the second region; and a gate portion above the insulating layer; wherein each insulating portion characterizes a threshold voltage between the gate and the first region or the second region adjacent each insulating portion; and wherein the first insulating portion is fabricated with varying dimension including a first thickness different than a second thickness of the second insulating portion to provide a first threshold voltage that differs from a second threshold voltage associated with the opposed insulating portion.