Patent ID: 6903453

Claim:
A semiconductor integrated circuit device comprising: a first semiconductor chip including a memory section, input/output sections, a CPU core and a first debug circuit section for verifying operation of a program executed by the CPU core; and a second semiconductor chip retained over a principal surface of the first semiconductor chip and including a second debug circuit section electrically connected to the CPU core and the first debug circuit section, wherein the first debug circuit section includes a command analyzing section for analyzing a debug command input from outside, a first transmitting/receiving section for, if the analyzed command is a command to be executed by the CPU core, transmitting the command to the CPU core and receiving an execution result of the command from the CPU core, and a second transmitting/receiving section for, if the analyzed command is a command to be executed by the second debug circuit section, transmitting the command to the second debug circuit section and receiving an execution result of the command from the second debug circuit, and the second debug circuit section includes a debugging function circuit.