Patent ID: 8378454

Claim:
A semiconductor device comprising: a substrate; a wiring layer formed over said substrate; and first, second, third, fourth, fifth, sixth, seventh, and eighth electrode structures arranged in order in said wiring layer; wherein said first and fifth electrode structures are connected to each other with a first conductive line having a first node, said second and sixth electrode structures are connected to each other with a second conductive line having a second node, said third and seventh electrode structures are connected to each other with a third conductive line having a third node, said fourth and eighth electrode structures are connected to each other with a fourth conductive line having a fourth node, and wherein a first voltage is applied to said first node, a second voltage that is lower than said first voltage is applied to said second node, a third voltage is applied to said third node, and a fourth voltage that is higher than said third voltage is applied to said fourth node, the first, second, third, and fourth voltages being independently applied.