Patent ID: 8507320

Claim:
A method, comprising: providing a carrier comprising a first conducting layer, a first insulating layer over the first conducting layer, and a plurality of through-connections from a first face of the first insulating layer to a second face of the first insulating layer; attaching at least two semiconductor chips to the carrier, wherein the at least two semiconductor chips are power semiconductor chips and each of the at least two semiconductor chips has a first electrode on a first surface and a second electrode on a second surface opposite to the first surface, wherein the first surface of each of the at least two semiconductor chips faces the carrier such that each of the first electrodes is electrically coupled to a respective one of the plurality of through-connections; applying a second insulating layer over the carrier and the at least two semiconductor chips; opening the second insulating layer until at least portions of at least one of the plurality of through-connections of the carrier and the second electrodes of the at least two semiconductor chips are exposed; depositing a single metal layer over the opened second insulating layer, wherein the single metal layer itself electrically couples each of the second electrodes of the at least two semiconductor chips to a respective one of the plurality of through-connections and a portion of the metal layer that extends directly over the second insulating layer has a thickness in the range from 80 to 400 μm; and separating the at least two semiconductor chips after depositing the metal layer.