Patent ID: 7741677

Claim:
A semiconductor integrated circuit device comprising: a first MISFET for use as a selecting MISFET of a dynamic random access memory cell and formed in a first region of a semiconductor substrate; and a second MISFET formed in a second region of the semiconductor substrate, wherein the first MISFET includes: a first insulation film formed over the first region; a first portion of a third insulation film formed over the first insulation film; a first gate electrode of the first MISFET formed over the first portion of the third insulation film, wherein the second MISFET includes: a second insulation film formed over the second region; a second portion of the third insulation film formed over the second insulation film; a second gate electrode of the second MISFET formed over the second portion of the third insulation film, wherein the first and second portions of the third insulation film of the first and second MISFETs, respectively, are formed as a same layer, wherein the first and second insulation films include silicon, oxygen, and nitrogen, wherein the first and second portions of the third insulation film of the first and second MISFETs, respectively, have a greater dielectric constant than each of the first and second insulation films, wherein a thickness of the first insulation film is larger than a thickness of the second insulation film, and wherein thicknesses of the first and second portions of the third insulation film of the first and second MISFETs, respectively, are larger than the thicknesses of the first insulation film and the second insulation film, respectively.