Patent ID: 8812907

Claim:
A computer system configured to provide fault tolerance, the computer system comprising a first host system and a second host system, wherein the first host system comprises a first processor and a memory and wherein the first processor is programmed to: monitor a number of portions of memory of the first host system that have been modified by a guest running on the first host system and, upon determining that the number of portions exceeds a threshold level, determine that a checkpoint needs to be created, and upon determining that the number of portions does not exceed the threshold level, determine that no checkpoint needs to be created and return to monitoring the number of portions of memory that have been modified; upon determining that the checkpoint needs to be created, pause operation of the guest and generate checkpoint data; and after generating the checkpoint data, resume operation of the guest and transmit the checkpoint data to the second host system; wherein operation of the guest is resumed while the checkpoint data is being transmitted to the second host system, and wherein the threshold level is a predetermined number of portions of memory.