Patent ID: 8445790

Claim:
A coreless substrate having filled via pads, comprising: a build-up layer including a plurality of build-up insulating layers and a plurality of build-up circuit layers having a plurality of build-up vias; a first insulating layer laminated at one side of the build-up layer; a second insulating layer laminated at the other side of the build-up layer; a first filled via pad, to which a solder ball is attachable and that is formed to penetrate both sides of the first insulating layer; a second filled via pad, to which a solder ball is attachable and that is formed to penetrate both sides of the second insulating layer, the first and second filled via pads being embedded in the first and second insulating layers, respectively, a surface of the first and second filled via pads being flush with a surface of the respective insulating layer, and the first and second filled via pads being formed as a filled plating layer.