Patent ID: 7501334

Claim:
A method of fabricating a semiconductor device, the method comprising: forming an active region isolated by a device isolation layer formed in a semiconductor substrate; forming a molding hole in the semiconductor substrate on the active region; forming self-alignment masks on the semiconductor substrate having the molding hole to traverse the active region, the self-alignment masks exposing the molding hole; forming a pocket insulating layer on the semiconductor substrate having the self-alignment masks; sequentially forming a pocket conductive layer, and lower and upper metal layers on the pocket insulating layer; performing an etch process on the upper metal layer, the lower metal layer, and the pocket conductive layer, using the self-alignment masks as etch masks, to form a pocket pattern including a pocket conductive layer pattern, a lower metal layer pattern and an upper metal layer pattern; forming a line capping layer pattern on the pocket pattern; and patterning the pocket pattern, and the pocket insulating layer, using the line capping layer pattern as an etch mask, to form a pocket insulating layer pattern and a pocket line including a pocket conductive layer line, a lower metal layer line and an upper metal layer line.