Patent ID: 7463519

Claim:
A nonvolatile semiconductor memory device, comprising: a data input buffer configured to receive data from outside the nonvolatile semiconductor memory device; a nonvolatile memory cell including two MIS transistors to store first data received by the data input buffer by creating an irreversible change of transistor characteristics in one of the two MIS transistors, whichever is selected in response to a value of the first data; a sense latch coupled to the nonvolatile memory cell and configured to store the first data obtained by sensing a difference in the transistor characteristics between the two MIS transistors of the nonvolatile memory cell; and a logic circuit configured to produce a signal indicative of comparison between the first data stored in the sense latch and second data received by the data input buffer, the signal being output to outside the nonvolatile semiconductor memory device, wherein no data path to output the first data stored in the sense latch to outside the nonvolatile semiconductor memory device exists.