Patent ID: 6859762

Claim:
A signal processing system suitable for processing transducer signals in a low power measuring instrument, the signal processing system comprising; a reference signal generator for generating an ADC ramp signal; one or more differential signal channels, each differential signal channel comprising: a first comparator comprising a first input, a second input, and an output, the first input of the first comparator receiving the first signal of a pair of differential signals, the second input of the first comparator receiving the ramp signal, the output of the first comparator providing a first-comparator output signal based on the signals at the first and second inputs; and a second comparator comprising a first input, a second input, and an output, the first input of the second comparator receiving the second signal of the pair of differential signals, the second input of the second comparator receiving the ramp signal, the output of the second comparator providing a second-comparator output signal based on the signals at the first and second inputs; and one or more digital differential value determining circuits for receiving the first-comparator output signal and the second-comparator output signal of at least one differential signal channel and determining a digital value representative of the difference between the pair of differential signals received by the at least one differential signal channel; and wherein the one or more digital differential value determining circuits comprise at least one clock circuit configured such that for at least one comparator included in the clock circuit a trip-point voltage of the comparator and a voltage change rate of a clock ramp signal input to the comparator are both controlled based on a common signal, such that variations in a voltage supplied to the clock during normal operation does not substantially affect the clock period.