Patent ID: 8351559

Claim:
A method of adjusting a plurality of interpolating clocks having a first frequency and different phase offsets, the method comprising: receiving a serial stream of data bits of a data signal clocked at a second frequency; accumulating by counting with a clock recovery block a number of data transitions of the data bits occurring during respective phase offsets corresponding to respective time intervals that elapse between respective sampling edges of corresponding successive pairs of the interpolating clocks, to generate a respective data bit transition count for each interpolating clock; comparing the respective data bit transition counts; adjusting the respective phase offsets of the interpolating clocks in response to the comparing; and repeating the accumulating by counting, comparing, and adjusting until the respective data bit transition counts for all the interpolating clocks differ by no more than a desired value wherein the respective phase offsets of the interpolating clocks are evenly spaced when the respective data bit transition counts are equal.