Patent ID: 7684649

Claim:
A brightness signal processing apparatus comprising: a differential operation circuit for outputting a horizontal differential signal synchronizing with a horizontal synchronous signal of an inputted video signal and a vertical differential signal synchronizing with a vertical synchronous signal of the inputted video signal by detecting and differentiating rise edges or breaking edges in the vertical synchronous signal and the horizontal synchronous signal; a first counter circuit for counting number of pixels in one horizontal period by resetting with the horizontal differential signal; a first AND circuit for executing an AND processing between the horizontal differential signal and an output signal of the first counter circuit; a first delay circuit for delaying an output signal of the first AND circuit per clock; a horizontal pixel skipping adjusting circuit for skipping pixels from an output signal of the first delay circuit while adjusting number of the pixels to be skipped in the one horizontal period; a first set/reset circuit for setting a first sampling effective period in the horizontal period which is set at a point at which an output result of the horizontal pixel skipping adjusting circuit and the horizontal period starting-point signal are coincident with each other and reset at a point at which the output result of the horizontal pixel skipping adjusting circuit and the horizontal period ending-point signal are coincident with each other by receiving a supply of a horizontal period starting-point signal which sets a starting point of a horizontal period of a sample window period and a horizontal period ending-point signals which sets an ending point thereof; a second AND circuit for detecting a point at which the first sampling effective period and the output result of the horizontal pixel skipping adjusting circuit are coincident with each other; a second delay circuit for delaying an output signal of the second AND circuit by N number of pixels (N is a natural number of at least 1); a first sampling pixel position switching signal generating circuit for generating a sampling pixel position switching signal which repeats inversion in each horizontal cycle from the horizontal differential signal; and output a first selecting circuit for selecting one from the signal of the second AND circuit and an output signal of the second delay circuit and outputting the selected signal as a sample window signal based on the sampling pixel position switching signal.