Patent ID: 7510966

Claim:
A method of forming an electrically conductive line, comprising: providing a silicon-comprising layer over a substrate; forming an electrically conductive layer over the silicon-comprising layer; forming an MSi x N y -comprising layer over the electrically conductive layer, where â€œxâ€ is greater than zero and less than or equal to 3.0, â€œyâ€ is from 0.5 to 10, and â€œMâ€ is at least one of Ta, Hf, Mo, and W; forming an MSi z -comprising layer over the MSi x N y -comprising layer, where â€œzâ€ is from 1 to 3.0; forming a TiSi a -comprising layer over the MSi z -comprising layer, where â€œaâ€is from 1 to 3.0; and patterning the silicon-comprising layer, the electrically conductive layer, the MSi x N y -comprising layer, the MSi z -comprising layer, and the TiSi a -comprising layer into a stack comprising an electrically conductive line.