Patent ID: 7943957

Claim:
A lateral semiconductor device comprising: a semiconductor substrate; an insulator film formed on the semiconductor substrate; and a semiconductor layer formed on the insulator film, the semiconductor layer comprising: a first semiconductor region formed in a portion of the semiconductor layer, including an impurity of a first conductive type, and being electrically connected to a first main electrode; a second semiconductor region formed in the other portion of the semiconductor layer, being away from the first semiconductor region, including an impurity of a second conductive type, and being electrically connected to a second main electrode; a surface semiconductor region formed in the surface portion of the semiconductor layer between the first semiconductor region and the second semiconductor region, including an impurity of the second conductive type, and being electrically connected to the second main electrode; a bottom semiconductor region formed in the bottom portion of the semiconductor layer between the first semiconductor region and the second semiconductor region, being away from the surface semiconductor region, and including an impurity of the first conductive type; and an intermediate semiconductor region formed in a portion of the semiconductor layer between the surface semiconductor region and the bottom semiconductor region, making contact with the first semiconductor region and the second semiconductor region, and including an impurity of the first conductive type, wherein the impurity concentration of the bottom semiconductor region is higher than the impurity concentration of the intermediate semiconductor region, the impurity concentration of the bottom semiconductor region decreases from a boundary surface between the bottom semiconductor region and the insulator film towards a boundary surface between the bottom semiconductor region and the intermediate semiconductor region, and the location where the impurity concentration of the bottom semiconductor region is one tenth or less of the impurity concentration of the bottom semiconductor region at the boundary surface between the bottom semiconductor region and the insulator film, is a location within 0.5 μm from the boundary surface between the bottom semiconductor region and the insulator film.