Patent ID: 7933747

Claim:
A computer-implemented method for simulating dynamic behavior of a transistor, comprising: representing static behavior of a transistor using a lookup table, wherein the lookup table describes a plurality of instances of the transistor according to a plurality of predefined parameters, including a channel equilibrium charge of the transistor with respect to variations of voltages between a drain terminal and a source terminal, between a gate terminal and the source terminal, and between a body terminal and the source terminal, and a charge of the transistor at the drain terminal with respect to variations of voltages between the drain terminal and the source terminal, between the gate terminal and the source terminal, and between the body terminal and the source terminal; selecting an instance of the transistor from the lookup table for computing dynamic behavior of the transistor; computing a previous state of the instance using a non-quasi static analytical model; computing a variation in channel charge of the instance according to a rate of change in time; computing a current state of the instance using the previous state and the variation in channel charge; computing a modified terminal voltage at a terminal according to the current state and previous state of the instance with respect to change in time, wherein the modified terminal voltage comprises a dynamic voltage across a parasitic resistance at the terminal of the transistor; and storing the modified terminal voltage in a memory device for computing dynamic behavior of the transistor at the current state.