Patent ID: 8559582

Claim:
A circuit comprising: a first phase detection circuit that compares a phase of a first periodic signal to a phase of a second periodic signal to generate a first control signal; a phase adjustment circuit that causes the phase of the second periodic signal and a phase of a third periodic signal to vary based on a variation in the first control signal; and a sampler circuit that samples a data signal to generate a sampled data signal in response to the third periodic signal, wherein the circuit varies a frequency of the third periodic signal to correspond to changes in a data rate of the data signal between at least three different data rates that are based on at least three data transmission protocols; a first frequency divider circuit that generates the second periodic signal based on a fourth periodic signal; a second frequency divider circuit that generates the third periodic signal based on a fifth periodic signal, wherein the phase adjustment circuit causes phases of the fourth and the fifth periodic signals to vary based on a change in the first control signal; and a control circuit that varies frequency division values of the first and the second frequency divider circuits based on changes in the data rate of the data signal between the three different data rates.