Patent ID: 7996629

Claim:
A multiprocessor computing system, comprising: a memory storing a program that is divisible into a plurality of program threads; a plurality of processors arranged to execute the program stored in the memory; a controller arranged to control execution of the program by the plurality of processors; an affinity unit arranged to restrict the plurality of program threads to execute one at a time on a selected one of the plurality of processors according to the default memory consistency model of the computing system; a load monitor arranged to monitor loading of the selected one of the plurality of processors and to alert the controller when loading of the selected one processor exceeds a predetermined threshold; and a memory consistency protection unit arranged, in response to the alert from the load monitor, to selectively intervene to apply active memory consistency protection to the plurality of program threads according to a second memory consistency model and to free the plurality of program threads to execute simultaneously on any two or more of the plurality of processors.