Patent ID: 8659945

Claim:
A method of operating a NAND flash memory device comprising a bulk region and NAND flash string comprising a plurality of memory cells connected in series to a source line and connected in parallel to a plurality of wordlines, respectively, the method comprising: applying a source line voltage to the source line with a first magnitude; applying a bulk voltage to the bulk region with a second magnitude lower than the first magnitude; and while applying the bulk voltage to the bulk region and the source line voltage to the source line, applying a select read voltage to a selected wordline among the plurality of wordlines and applying an unselect read voltage to unselected wordlines among the plurality of wordlines; wherein the bulk voltage has a negative voltage level and a difference in magnitude between the source line voltage and the bulk voltage is between 0V and 2V; and wherein the source line is a common source line of multiple NAND flash strings.