Patent ID: 6884713

Claim:
A method for forming metal line of semiconductor device, comprising the steps of: (a) sequentially forming a conductive layer for lower metal line and a conductive layer for via contact plug on a planarized first interlayer insulating film having a contact plug; (b) etching the conductive layer for via contact plug and the conductive layer for lower metal line using a lower metal line mask to form a lower metal line; (c) forming a second interlayer insulating film on the entire surface; (d) etching the second interlayer insulating film and the conductive layer for via contact plug using a via contact mask to form a via contact plug; (e) forming a third interlayer insulating film on the entire surface; (f) performing a planarization process to expose a upper surface of the via contact plug; and (g) forming an upper metal line electrically connected to the via contact plug.