Patent ID: 8183934

Claim:
A PLL circuit comprising: a control voltage generator configured to generate a control voltage in accordance with a phase difference between a phase of an output signal fed back thereto and a phase of an input reference signal; and a voltage-controlled oscillator configured to control an oscillation frequency of the output signal in accordance with the control voltage, wherein the voltage-controlled oscillator includes: an oscillator configured to have plural sets of upper and lower limits of the oscillation frequency and a plurality of control voltage-to-oscillation frequency correspondence relations correlated with a plurality of controlling values, respectively, the oscillator being configured to output the output signal with the oscillation frequency corresponding to the control voltage and associated with the correspondence relation specified by the controlling value, a threshold discriminator configured to generate a control signal indicating a relative level of the control voltage, and a controller configured to output the controlling value in accordance with the control signal, the controller outputting a predetermined controlling value when either one of conditions below is fulfilled: (a) the control signal indicates a high level when the controlling value specifies the correspondence relation of which the upper and lower limits of the oscillation frequency are highest; and (b) the control signal indicates a low level when the controlling value specifies the correspondence relation of which the upper and lower limits of the oscillation frequency are lowest, wherein the controller includes an adder storing the controlling value, the adder being configured to add an incremental value to the stored controlling value if the control signal indicates a high level, subtract a decremental value from the stored controlling value if the control signal indicates a low level, store, as the controlling value, a value obtained by subtracting a difference between upper and lower limits of the controlling value from a sum of the controlling value assumed before the addition and the incremental value if the controlling value exceeds the upper limit as a result of the addition, store, as the controlling value, a value obtained by adding the difference between the upper and lower limits of the controlling value to a difference between the controlling value assumed before the subtraction and the decremental value if the controlling value decreases below the lower limit as a result of the subtraction, and output the stored controlling value.