Patent ID: 6874039

Claim:
A voice over packet system on a chip comprising: a buffer memory; a system bus coupled to the buffer memory; a plurality of bus arbitrators coupled to the system bus; a plurality of functional modules coupled to the plurality of bus arbitrators, each of the plurality of functional modules has a DMA controller to couple to a bus arbitrator of the plurality of bus arbitrators, the DMA controller to provide direct memory access to the buffer memory; wherein the plurality of functional modules includes one or more signal processors to process data of a plurality of communication channels, the one or more signal processors to directly memory access the buffer memory to read data for processing and to write data after processing, a host port to couple to a packet network and transmit and receive packet payloads with the packet network and to directly memory access the buffer memory to read data from and write data into the buffer memory, and a multichannel serial port to couple to a telephone network and transmit and receive data with the telephone network and to directly memory access the buffer memory to read data from and write data into the buffer memory.