Patent ID: 8859327

Claim:
A method of manufacturing a non-volatile semiconductor memory device comprising: forming a stacked structure on a semiconductor substrate, the stacked structure having a structure where a first layer and a second layer are alternately stacked plurality of times; forming a first mask pattern on the stacked structure, the first mask pattern having a plurality of first line patterns being located parallel with each other; dividing the stacked structure into a plurality of fin-shaped members where an insulation film and a conductive film are alternately stacked plurality of times, by selectively etching a region exposed by the first mask pattern in the stacked structure to form the plurality of fin-shaped members and by forming recesses in at least one side surface of the formed plurality of fin-shaped members; forming a resistance change film on an exposed side surface of the conductive film of each of the plurality of fin-shaped members; embedding a conductive material between the plurality of fin-shaped members on which the resistance change film is formed; forming a second mask pattern on the plurality of fin-shaped members on which the resistance change film is formed and on the embedded conductive material, the second mask pattern having a plurality of second line patterns, each of the plurality of second line patterns extending in a direction intersecting with the fin-shaped members and being arranged side by side each other; and selectively etching a region exposed by the second mask pattern in the embedded conductive material so as to separate the embedded conductive material into a plurality of pillar members, each of the plurality of pillar members extending approximately vertical to the surface of the semiconductor substrate.