Patent ID: 7814239

Claim:
A memory system that operates according to first and second input/output modes, the memory system comprising: a board; a first memory chip attached to a first surface of the board and comprising a first package having a first pin connected to a clock signal line that carries a clock transmitted to the board; and a second memory chip attached to a second surface of the board, opposite to the first surface, and comprising a second package having a second pin, which is opposite and adjacent to the first pin and is connected to the first pin by a through-electrode extending through the board, and a third pin located at a mirror site of the first pin, wherein, in response to the first data input/output mode, the second pin in the second package of the second memory chip is switched to be electrically connected to the clock signal line, and wherein, in response to the second data input/output mode, the third pin in the second package of the second memory chip is switched to be electrically connected to the clock signal line.