Patent ID: 8519376

Claim:
A nonvolatile memory cell comprising: first and second electrodes; first and second resistive storage layers interposed between the first and second electrodes; and first, second, and third separation layers, the first separation layer being interposed between the first electrode and the first resistive storage layer, the second separation layer being interposed between the second resistive storage layer and the second electrode, and the third separation layer being interposed between the first resistive storage layer and the second resistive storage layer; wherein, the first separation layer extends between the first electrode and the first resistive storage layer; the second separation layer extends between the second resistive storage layer and the second electrode; the third separation layer extends between the first resistive storage layer and the second resistive storage layer; and the first, second, and third separation layers are configured to terminate defect clusters formed within the corresponding first and second resistive storage layers to reduce leakage of trapped charge from the storage layers.