Patent ID: 7679126

Claim:
A method of manufacturing a non-volatile memory device, comprising: sequentially forming a charge storage layer and a first conductive film on an active region of the non-volatile memory device, wherein the charge storage layer comprises an ONO layer; patterning the first conductive film to form a first conductive film pattern; removing a first exposed portion of the charge storage layer; forming a conformal second conductive film over the whole first conductive film pattern; forming a photoresist pattern on the second conductive film, the photoresist pattern having an opening over the active region; etching the second conductive film and the first conductive film pattern in the opening using the photoresist pattern as an etching mask to thereby form a pair of control gates from the first conductive film pattern; removing a second exposed portion of the charge storage layer in the opening such that the charge storage layer and the first conductive film pattern are substantially co-extensive; and forming a pair of wordlines by patterning the second conductive film such that the wordlines are over an uppermost surface of the first conductive film pattern and horizontally adjacent to a sidewall of the first conductive film pattern.