Patent ID: 8893143

Claim:
A processing apparatus configured to act as a plurality of virtual processors, comprising: a first virtual program space that includes a first program execution memory, the first program execution memory including code to run a non-real-time operating system capable of supporting a one or more non-real-time applications; a second virtual program space that includes a second program execution memory, the second program execution memory including code to run one or more real-time processes, wherein the second virtual program space further includes a set of second input/output circuitry configured to trigger the high-priority interrupts upon reception of a media packet: and a central processing unit (CPU) configured to operate in a first operating mode and a second operating mode, the CPU being configured to perform operating system and application activities using the first virtual program space for the first operating mode without using the second virtual program space and without interfering with the one or more real-time processes that are running in the second operating mode.