Patent ID: 8138427

Claim:
A printed circuit board comprising: a base insulating layer; first and second wiring patterns that are formed on said base insulating layer and constitute a signal line pair; a cover insulating layer formed on said base insulating layer to cover at least part of said first and second wiring patterns; and a connecting layer provided on said cover insulating layer, wherein said first wiring pattern has first and second lines, said second wiring pattern has third and fourth lines, one ends of said first and second lines are electrically connected to each other and the other ends of said first and second lines are electrically connected to each other, one ends of said third and fourth lines are electrically connected to each other and the other ends of said third and fourth lines are electrically connected to each other, said first and second lines of said first wiring pattern and said third and fourth lines of said second wiring pattern are arranged such that any one of said first and second lines is located between said third and fourth lines and any one of said third and fourth lines is located between said first and second lines, a first intersection region in which said first or second line of said first wiring pattern and said third or fourth line of said second wiring pattern intersect with each other is provided, a second intersection region in which said first or second line of said first wiring pattern and said third or fourth line of said second wiring pattern intersect with each other is provided, a portion of said first or second line of said first wiring pattern positioned in said first intersection region is divided, a portion of said third or fourth line of said second wiring pattern positioned in said first intersection region is arranged on said base insulating layer to pass through a portion in between divided portions of said first or second line of the first wiring pattern, said cover insulating layer includes a first cover portion that has first and second through holes and is provided to cover said first and second wiring patterns in said first intersection region, said connecting layer includes a first connecting layer provided on said first cover portion, one of said divided portions of said first or second line of the first wiring pattern is electrically connected to said first connecting layer through said first through hole of said first cover portion, and the other of said divided portions of said first or second line of the first wiring pattern is electrically connected to said first connecting layer through said second through hole of said first cover portion.