Patent ID: 8319286

Claim:
A system for electrostatic discharge protection, the system comprising: a first transistor including a first drain; a second transistor including a second drain; a resistor including a first terminal and a second terminal, the first terminal being coupled to the first drain and the second drain; a third transistor coupled to the second terminal and a protected system, the third transistor including a first gate, a first dielectric layer located between the first gate and a first substrate, a first source, and a third drain, the protected system including a fourth transistor, the fourth transistor including a second gate, a second dielectric layer located between the second gate and a second substrate, a second source, and a fourth drain; wherein: the third transistor is selected from a plurality of transistors, the plurality of transistors including a plurality of gate regions, a plurality of source regions, and a plurality of drain regions; each of the plurality of gate regions intersects a polysilicon region, the polysilicon region being separated from the first substrate by a third dielectric layer; at least a part of the polysilicon region is located on an active area within the first substrate.