Patent ID: 7663440

Claim:
An amplifier circuit comprising a plurality of CMOS (Complementary Metal Oxide Semiconductor) inverter circuits connected in parallel with each other, wherein said CMOS inverter circuits each include a first PMOS (P-channel Metal Oxide Semiconductor) transistor, a first NMOS (N-channel Metal Oxide Semiconductor) transistor having a drain connected to a drain of said first PMOS transistor, a gate of said first PMOS transistor and a gate of said first NMOS transistor being connected to an input terminal, and the drain of said first PMOS transistor and the drain of said first NMOS transistor being connected to an output terminal, a second PMOS transistor having a drain connected to a source of said first PMOS transistor, and having a source connected to a power supply voltage source, a first switch connected to a gate of said second PMOS transistor, said first switch changing a gate voltage of said second PMOS transistor to one of a power supply voltage and a first operating voltage, a second NMOS transistor having a drain connected to a source of said first NMOS transistor, and having a source connected to a ground, and a second switch connected to a gate of said second NMOS transistor, said second switch changing a gate voltage of said second NMOS transistor to one of a potential of said ground and a second operating voltage, and said first switch and said second switch perform switching operation so as to eliminate an imbalance between first operating currents of the PMOS transistors and second operating currents of the NMOS transistors in the plurality of said CMOS inverter circuits.