Patent ID: 8907439

Claim:
A focal plane array apparatus comprising: a substrate; a plurality of die stacks mounted on said substrate, each said die stack including a first integrated circuit die and a second integrated circuit die interposed between said first die and said substrate, said first die containing an array of pixels, and said second die containing signal processing circuitry coupled to said array of pixels and said substrate; and an image detector mounted on said die stacks adjacent said first dice, said image detector containing a further array of further pixels, each said array of pixels coupled to said further array of further pixels, wherein said pixels have a first common pixel width and said further pixels have a second common pixel width that is greater than said first common pixel width, wherein said first die includes a plurality of sub-array portions of said array of pixels, and a gap area that is devoid of pixels and separates said sub-array portions from one another, wherein said gap area separates said sub-array portions from one another by a distance approximately equal to said first common pixel width, wherein said die stacks are separated from one another on said substrate by a distance that is less than said first common pixel width, and wherein, in said first die, some of said sub-array portions are separated from a peripheral edge of said first die by a distance that is less than said first common pixel width, and wherein said apparatus includes a routing structure for coupling said array of pixels to one of said signal processing circuitry and said further array of further pixels, and wherein said routing structure extends through said gap area.