Patent ID: 7557556

Claim:
A voltage control circuit, comprising: a voltage control MOS transistor having an input terminal connected to a voltage input terminal and an output terminal connected to a voltage output terminal; transistor control means for detecting a voltage value of an output voltage that is output from the voltage output terminal and controlling a voltage value of a control voltage that is applied to a control terminal of the voltage control MOS transistor so that the voltage value of the output voltage becomes a predetermined set voltage value; a transistor control MOS transistor having an input terminal connected to the voltage input terminal and an output terminal connected to the control terminal of the voltage control MOS transistor, which applies an additional control voltage that increases conduction resistance of the voltage control MOS transistor to the control terminal of the voltage control MOS transistor when a voltage of the control terminal changes from a high potential to a low potential; a monitor circuit having a monitor MOS transistor and a monitor resistor whose resistance is fixed which are connected in series, which is connected in parallel to the voltage control MOS transistor; an inverter circuit having an input terminal input with a monitor voltage that is applied to the monitor resistor, and an output terminal whose voltage changes from a high potential to a low potential when the monitor voltage exceeds a predetermined threshold value; and a current mirror circuit including an input voltage conversion resistor that is electrically connected between the voltage input terminal and a ground potential, a second current mirror transistor that is connected in series with the input voltage conversion resistor and allows a current that flows in the input voltage conversion resistor to flow therein, and a first current mirror transistor that allows a current which flows in the second current mirror transistor to flow in the monitor resistor.