Patent ID: 7002245

Claim:
A semiconductor package having conductive bumps on a chip, comprising: at least one chip having an active surface and an opposite inactive surface, and having a plurality of bond pads formed on the active surface; a plurality of conductive bumps respectively formed on the bond pads of the chip; a single encapsulation body for completely encapsulating the chip and the conductive bumps, wherein ends of the conductive bumps are exposed outside of the encapsulation body and flush with a surface of the encapsulation body; a plurality of first conductive traces formed at the surface of the encapsulation body exposing the conductive bumps and electrically connected to the exposed ends of the conductive bumps; a solder mask layer applied over the first conductive traces and having a plurality of openings for exposing predetermined portions of the fist conductive traces; and a plurality of solder balls respectively formed on the exposed portions of the first conductive traces.