Patent ID: 7759179

Claim:
A method of forming a semiconductor device, said method comprising: providing a wafer comprising a semiconductor layer on an isolation layer; etching said semiconductor layer to form, on said isolation layer, a first semiconductor fin, having a first center region between first end regions, for a first device with a first conductivity type and a second semiconductor fin, having a second center region between second end regions, for a second device with a second conductivity type different from said first conductivity type such that said first semiconductor fin and said second semiconductor fin each comprise a rectangular-shaped body extending vertically from said isolation layer, and such that a chevron pattern is created with said first semiconductor fin non-parallel and non-orthogonal relative to said second semiconductor fin; forming a first gate adjacent to first opposing sidewalls of said first semiconductor fin on said first center region and a second gate adjacent to second opposing sidewalls of said second semiconductor fin on said second center region such that said first gate and said second gate are approximately perpendicular to a centerline of said wafer; forming a mask covering said first semiconductor fin and having an edge approximately parallel to said centerline of said wafer; and performing a series of only two implant processes directed into said second opposing sidewalls of said second semiconductor fin to form one of halo regions and source/drain regions in said second end regions of said second semiconductor fin on opposite sides of said second gate, wherein said series of only two implant processes comprises: directing dopant in a first direction towards one of said second opposing sidewalls of said second semiconductor fin so as to simultaneously implant said dopants through said one of said second opposing sidewalls into each of said second end regions, said first direction being non-parallel relative to said second semiconductor fin; and directing said dopant in a second direction opposite said first direction towards a different one of said second opposing sidewalls of said second semiconductor fin so as to simultaneously implant said dopant through said different one of said second opposing sidewalls into each of said second end regions wherein first direction and said second direction are parallel to said edge to ensure that implantation of said dopants into said second semiconductor fin is not obstructed by said mask.