Patent ID: 8404576

Claim:
A method of forming a gate structure, comprising: forming a tunnel insulation layer on a substrate; forming a floating gate on the tunnel insulation layer; forming a dielectric layer pattern on the floating gate; and forming a control gate on the dielectric layer pattern by forming a first conductive layer pattern on the dielectric layer pattern, forming a metal ohmic layer pattern on the first conductive layer pattern, forming a diffusion preventing layer pattern on the metal ohmic layer pattern, forming an amorphous layer pattern on the diffusion preventing layer pattern, and forming a second conductive layer pattern on the amorphous layer pattern, wherein forming the floating gate further comprises: forming an additional first conductive layer pattern on the tunnel insulation layer; forming an additional metal ohmic layer pattern on the additional first conductive layer pattern; forming an additional diffusion preventing layer pattern on the additional metal ohmic layer pattern; forming an additional amorphous layer pattern on the additional diffusion preventing layer pattern; and forming an additional second conductive layer pattern on the additional amorphous layer pattern.