Patent ID: 8003506

Claim:
A method for fabricating a semiconductor device comprising: forming a conductive material over a substrate; forming a resist material on the conductive material; patterning the resist material, leaving a portion of the conductive material exposed through the patterned resist layer; partially etching the conductive material using the patterned resist material as a mask such that a plurality of first portions of the conductive material have a first thickness and a plurality of second portions of the conductive material have a second thickness that is greater than the first thickness, each second portion having a first width and being separated from each adjacent second portion by a first distance; removing the patterned resist material; forming spacers on sidewalls of the plurality of second portions and over the plurality of first portions; etching the exposed conductive material to substantially remove the exposed portions of the plurality of first portions of the conductive material; forming an insulating material on the plurality of second portions to form a plurality of gate structures; and doping a region between two adjacent gate structures.