Patent ID: 8429426

Claim:
A method and a device for data storage comprising: performing in a data storage device that includes: a storage memory, a storage memory manager, a host interface, a secure data path between said host interface and said storage memory, said secure data path including two or more cryptographic processors (crypto-processors) arranged in series along the secure data path, a main Central Processing Unit (CPU) configured to manage operations of the data storage device and to direct the storage memory manager to transfer data to and from the storage memory via the secure data path, and a control CPU that is configured to consume less power than the main CPU, wherein the control CPU does not perform the operations of the main CPU and wherein the Control CPU is configured to control the two or more cryptographic processor; transferring data to and from a host to said host interface by: transferring data to and from the storage memory, under control of the main CPU via said storage memory manager, wherein the transferring is performed via the secure data path; performing encryption operations under control of the control CPU, using the two or more cryptographic engines in series, wherein said control CPU has access to secret keys required to control operation of said secure data path and said main CPU does not have access to said secret keys; and placing the main CPU in an idle mode such that the main CPU does not consume an appreciable amount of power for at least a period of time while encryption operations are performed under control of the control CPU.