Patent ID: 7723153

Claim:
A method of forming an inverter comprising: providing a first metal layer having a first portion for coupling a source of an OFET to a first power supply voltage, a second portion for coupling a drain of the OFET to an output terminal and a first load resistor terminal, and a third portion for coupling a second load resistor terminal to a second power supply voltage; providing a semiconductor layer overlapping a portion of the first portion of the first metal layer and second portion of the first metal layer to form an OFET active area, and overlapping a portion of the second portion of the first metal layer and third portion of the first metal layer to form a load resistor; providing a dielectric layer overlapping a portion of the first portion of the first metal layer, second portion of the first metal layer, and the semiconductor layer that form the OFET active area, and overlapping a portion of the second portion of the first metal layer, third portion of the first metal layer and the semiconductor layer that form the load resistor area; and providing a second metal layer overlapping the OFET active area to form a gate of the OFET and an input terminal.