Patent ID: 7894202

Claim:
A multilayer capacitor comprising: a laminate including a plurality of ceramic layers, and which has a first surface and a second surface opposing the first surface; at least one pair of first and second internal electrodes opposed to each other with the ceramic layer provided therebetween; first and second external electrodes provided on the first surface; third and fourth external electrodes provided on the second surface; a first via conductor arranged to electrically connect the first external electrode, the first internal electrode, and the third external electrode, the first via conductor being arranged to pass between the first and second surfaces and to have an end projecting from the first surface; and a second via conductor arranged to electrically connect the second external electrode, the second internal electrode, and the fourth external electrode, the second via conductor being arranged to pass between the first and second surfaces and to have an end projecting from the first surface; wherein relationships P≧Ra and P≧W are provided, wherein P represents an average projection height of the first and second via conductors from the first surface, Ra represents a surface roughness of the first surface, and W represents an amount of curvature of the laminate; and the projecting portions of the first and second via conductors projecting from the first surface are buried in the first and second external electrodes, respectively.