Patent ID: 7517754

Claim:
A method of forming a semiconductor construction, comprising: forming an electrically insulative material over a semiconductor substrate; forming trenches within the electrically insulative material; the trenches having faceted upper portions with facets of the faceted portions sloping upwardly and outwardly relative to interior regions of the trenches; the faceted upper portions having uppermost and outermost facet edges; the uppermost and outermost facet edges of adjacent trenches being spaced from one another by intervening regions of the electrically insulative material; forming first electrically conductive material to be within the trenches and over the faceted upper portions, but to not be over the intervening regions of the electrically insulative material; using the first electrically conductive material as a mask during an etch through the intervening regions of the electrically insulative material; the etch through the intervening regions forming openings; and forming second electrically conductive material to be within the openings.