Patent ID: 8281223

Claim:
A microprocessor, comprising: a first plurality of fuses, a predetermined number of which are selectively blown, wherein control values are provided from the first plurality of fuses to circuits of the microprocessor to control operation of the microprocessor; and a second plurality of fuses, blown with a signature, wherein the signature specifies the predetermined number of the first plurality of fuses that are blown, wherein the second plurality of fuses are also blown with a Boolean complement of the signature; wherein, in response to being reset, the microprocessor is configured to: read the signature and the Boolean complement of the signature from the second plurality of fuses; Boolean complement the signature read from the second plurality of fuses to generate a result; compare the result with the Boolean complement of the signature read from the second plurality of fuses; and prevent fetching and executing user program instructions if the result does not equal the Boolean complement of the signature read from the second plurality of fuses.