Patent ID: 7639060

Claim:
A level shift circuit comprising: a first capacitor circuit including a plurality of capacitors coupled in series between a ground potential and a predetermined potential; an input terminal coupled to a ground potential side of the first capacitor circuit and configured to receive an input pulse signal; a first trigger circuit coupled to a predetermined potential side of the first capacitor circuit and configured to output a first edge signal associated with only one of rising and falling edges of the input pulse signal; a second capacitor circuit including a plurality of capacitors coupled in series between the ground potential and the predetermined potential; an inverter element coupled between the input terminal and the ground potential side of the second capacitor circuit and configured to output an inverted pulse signal of the input pulse signal; a second trigger circuit coupled to the predetermined potential side of the second capacitor circuit and configured to output a second edge signal associated with only one of rising and falling edges of the inverted pulse signal; and a set-reset latch circuit having a first input coupled to an output of the first trigger circuit and a second input coupled to an output of the second trigger circuit, wherein the second edge signal has a same polarity as the first edge signal.