Patent ID: 8418155

Claim:
A computer-implemented method to programmatically generate parallel application source code for each of a plurality of distinct parallel computing architectures, based on source code user-annotated according to a predefined annotation standard that is independent of each parallel computing architecture, the method comprising: receiving source code of a parallel application program, wherein the source code is annotated based on user input and according to the predefined annotation standard specifying a grammar for expressing: (i) a target architecture definition comprising at least two of a target name, an architecture type, a parent name, and a communications protocol; (ii) a code block definition comprising a target name, a code block name, and a maximum number of threads to execute; and (iii) a shared variable definition comprising a variable name, a variable type, and an array size; identifying, based on the received source code and the predefined annotation standard: (i) a plurality of target architectures for the parallel application program and (ii) one or more parallel application operations for the parallel application program to perform when executed on each target architecture, wherein each target architecture comprises a distinct parallel computing architecture, wherein the predefined annotation standard is independent of each target architecture, wherein the one or more parallel application operations are selected from at least data transmission operations, synchronization operations, and single-instruction multiple data (SIMD) operations; generating, for each of the identified target architectures and by operation of one or more computer processors, parallel application source code that is native to the respective identified target architecture, based on the identified one or more parallel application operations and a predefined set of mappings between: (i) the identified one or more parallel application operations and (ii) corresponding syntax native to the respective identified target architecture, wherein the generated parallel application source code is output.