Patent ID: 8003975

Claim:
A semiconductor integrated circuit device, comprising: a first semiconductor layer having a first surface on which a source electrode, a drain electrode and a gate electrode are formed and having a first through hole; a second semiconductor layer formed on said first semiconductor layer, said first through hole extending through said second semiconductor layer, a first insulating film formed in contact with the first semiconductor layer and having a second through hole; a first metal electrode formed on a first surface of the second semiconductor layer and directly connected to the gate electrode through a metal which fills the first through hole; and a second metal electrode formed on the first insulating film and directly connected to the source electrode through a metal which fills the second through hole, wherein the first metal electrode and the second metal electrode face each other, the second metal electrode is a ground plane and the first metal electrode is a transmission line for a signal of the integrated circuit, and the first metal electrode and the second metal electrode form a microstrip line, and a high resistance region is formed in the first semiconductor layer and the second semiconductor layer between the second semiconductor layer and the first insulating film.