Patent ID: 6844624

Claim:
A multichip module comprising a first chip, a second chip, and a first wiring and a second wiring each connecting said first chip and said second chip, wherein said first chip comprises: an internal circuit having an output terminal and an input terminal; and a selector having a first input terminal, a second input terminal connected to said output terminal of said internal circuit of said first chip, and an output terminal selectively outputting a signal given to said first input terminal or a signal given to said second input terminal, said second chip comprises: an internal circuit having an output terminal and an input terminal; and a selector having a first input terminal connected to said input terminal of said internal circuit of said second chip, a second input terminal connected to said output terminal of said internal circuit of said second chip, and an output terminal, said output terminal of said selector of said first chip is connected via said first wiring to said input terminal of said internal circuit of said second chip, said output terminal of said selector of said second chip is connected via said second wiring to said input terminal of said internal circuit of said first chip, said selector of said second chip outputs the signal given to the first input terminal thereof to the output terminal thereof when said selector of said first chip outputs the signal given to the first input terminal thereof to the output terminal thereof, and said selector of said second chip outputs the signal given to the second input terminal thereof to the output terminal thereof when said selector of said first chip outputs the signal given to the second input terminal thereof to the output terminal thereof.