Patent ID: 7671930

Claim:
A pixel structure of a multi-domain vertical alignment liquid crystal display (MVA LCD) panel, comprising: a first substrate comprising: a first scan line, a second scan line and a data line; a first active device electrically connected with the first scan line and the data line, wherein a first parasitic capacitance exists between the first active device and the first scan line; a second active device electrically connected with the first scan line and the data line, wherein a second parasitic capacitance exists between the second active device and the first scan line, and the first parasitic capacitance is equal to the second parasitic capacitance; a first pixel electrode electrically connected to the first active device, and the first pixel electrode covers a part of the second scan line to form a compensation capacitance (Cadd); a second pixel electrode electrically connected with the second active device, and there is a voltage difference between the second pixel electrode and the first pixel electrode; a plurality of alignment members disposed on the first pixel electrode and the second pixel electrode; a common line, disposed under the first and second pixel electrodes, wherein a first storage capacitance (Cst 1 ) exists between the first pixel electrode and the common line and a second storage capacitance (Cst 2 ) exists between the second pixel electrode and the common line; a second substrate having a common electrode thereon, opposite to the first substrate; and a liquid crystal layer, between the first and second substrates, wherein a first liquid crystal capacitance (Clc 1 ) exists between the first pixel electrode and the common electrode, a second liquid crystal capacitance (Clc 2 ) exists between the second pixel electrode and the common electrode, and Cadd+Clc 1 +Cst 1 =Clc 2 +Cst 2 .