Patent ID: 7194766

Claim:
A security data packet processing system comprising: a transmitting (Tx) direct memory access (DMA) interface ( 314 ) receiving a streamed security data packet, selecting a least busy channel for processing the streamed security data packet, based on an amount of buffer space available for a channel in an external memory, and transferring the streamed security data packet to the external memory; an input DMA engine ( 306 ) retrieving portions of the streamed security data packet from the external memory after all portions of the streamed security data packet have been transferred to the external memory; an input FIFO ( 308 ) receiving the portions of the streamed security data packet from the input DMA engine ( 306 ) in blocks of a predetermined byte size, portions being retained in a portion of the input FIFO allocated to the selected channel; a context RAM ( 308 ) receiving a security association database (SAD) entry associated with the selected channel, the SAD entry being retrieved from the external memory by the input DMA engine; and an input crypto DMA engine ( 310 ) providing the blocks of the security data packet to a processing engine for processing.