Patent ID: 7694201

Claim:
A semiconductor testing device comprising: a data memory which stores a test program, said test program to be used for generating one or more of test commands, each of said one or more of test commands instructing a test of a plurality of functions, said plurality of functions being included in one function area of a plurality of function areas of a semiconductor device; a first area generation part which generates first data, said first data identifying one or more of function areas of said plurality of function areas; a main control part which generates said one or more of test commands based on said test program and said first data and transmits said one or more of test commands to said semiconductor device; a second area generation part which receives a first result, said first result being returned from said semiconductor device based on one or more of first tests, each of said one or more of first tests having been instructed by each of said one or more of test commands, said second area generation part generating one or more of second results based on said first result, each of said one or more of second results showing a pass or failure of each of said one or more of first tests; and a third area generation part which transmits said one or more of second results to said first area generation part, said first area generation part generating second data based on said second result, said second data identifying one or more of said plurality of function areas, a plurality of functions of each of said one or more of said plurality of function areas being the object of second tests subsequent to said first tests.