Patent ID: 7307450

Claim:
A programmable logic block performing a predetermined logic processing function based on a set of external input signals and then outputting a set of external output signals, the programmable logic block comprising: a first programmable logic block outputting a first output signal in accordance with a first look-up table and a set of first input signals; a second programmable logic block outputting a second output signal in accordance with a second look-up table and a set of second input signals; an inverter for receiving an external trigger signal and outputting an inverted signal; a first logic AND gate for receiving the first output signal and the inverted signal and outputting a first feedback signal; a second logic AND gate for receiving the second output signal and the inverted signal and outputting a second feedback signal; a first multiplexer for receiving the first feedback signal or a first external input signal and outputting a first input signal; a second multiplexer for receiving the second feedback signal or a second external input signal and outputting another first input signal; a third multiplexer for receiving the first feedback signal or a third external input signal and outputting a second input signal; and a fourth multiplexer for receiving the second feedback signal or a fourth external input signal and outputting another second input signal; wherein the first to the fourth external input signals for the first to the fourth multiplexers respectively are selected from the set of the external input signals in accordance with a set of predetermined signals, and the first and the second feedback signals are, respectively, external output signals.