Patent ID: 8223053

Claim:
A sigma-delta modulator comprising: a plurality of capacitor pairs; a plurality of switches to couple any pair of capacitors from said plurality of capacitor pairs selectively to an input signal or a reference signal, wherein the reference signal is provided by at least one digital-to-analog converter; and control means operable to control sampling through said switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal, and wherein the digital-to-analog converter is a single-bit or a multi-bit digital-to-analog converter (DAC), wherein each input value of the DAC controls an associated rotation sequence of said input signal and said reference signal to respective pairs of capacitors such that for the same DAC input values for sequential samples the input signal is sequentially assigned to different pairs of the plurality of capacitor pairs and the reference signal is sequentially assigned to respective other pairs of the plurality of capacitor pairs according to a predefined rotation cycle sequence.