Patent ID: 8204160

Claim:
A method implemented by a demodulator for generating soft bit values for a plurality of symbol blocks, each symbol block being a combination of two or more symbols, comprising the steps of: forming a subset of candidate symbol combinations, for each of one or more groups of symbols in a symbol block, by selecting from a set of candidate symbol combinations for the each of one or more groups of symbols in the symbol block, the following of: a most likely candidate symbol combination in said set; at least one candidate symbol combination which is a next most likely in said set that has a complementary bit value for a respective bit value in the most likely candidate symbol combination; and a plurality of additional next most likely candidate symbol combinations from said set of candidate symbol combinations not yet selected, the selection based on a highest to lowest likelihood of the candidate symbol combinations in the set, wherein the plurality of additional next most likely candidate symbol combinations are needed for inclusion for a size of the subset to conform to a pre-determined size; and generating soft bit values for the plurality of symbol blocks based on a joint detection process that limits the candidate symbol combinations of symbols considered for the corresponding symbol block according to the subset formed for the each of one or more groups of symbols in the symbol block.