Patent ID: 6882375

Claim:
A thin film transistor array substrate for a liquid crystal display, comprising: a substrate; a gate line assembly formed on the substrate and transferring gate signals, the gate line assembly comprising gate lines extending in a row direction, and gate electrodes connected to the gate lines; a storage capacitor line assembly extending in the row direction; a gate insulating layer formed on the substrate and covering the gate lines and the storage capacitor line assembly; a semiconductor pattern formed on the gate insulating layer over the gate electrodes; a data line assembly formed on the gate insulating layer, the data line assembly comprising: data lines crossing over the gate lines, the data lines and the gate lines define pixel regions; source electrodes formed on the semiconductor pattern and connected to the data lines; and drain electrodes formed on the semiconductor pattern and facing the source electrodes around the gate electrodes; a protective layer covering the data line assembly and the semiconductor pattern, the protective layer having first and second contact holes and being in direct contact with an upper surface of the semiconductor pattern between the source electrode and the drain electrode; pixel electrodes formed on the protective layer at the respective pixel regions such that the pixel electrodes are connected to the drain electrodes through the first contact holes; and repair members provided corresponding to the pixel regions, wherein each repair member is extended from the pixel electrode corresponding thereto and overlaps a gate line of an adjoining pixel region on a previous row.