Patent ID: 8352898

Claim:
A method of preparing a plurality of systems that include respective programmable integrated circuits (ICs) of the same type, comprising: identifying a set of input/output pins of the programmable IC, the set including each input/output pin used by a plurality of circuit designs for the programmable IC; partitioning each of the plurality of circuit designs into a base design and a respective supplemental design, the base design including at least the set of input/output pins, and each supplemental design corresponding to one of the plurality of circuit designs, the base design being the same for each of the plurality of circuit designs; generating a plurality of respective supplemental bitstreams for the supplemental designs; generating a first bitstream for implementing the base circuit design, a communication module, and a reconfiguration module in a first portion of programmable resources of the programmable IC, the reconfiguration module configured to program, in response to each respective one of the supplemental bitstreams received via the communication module, a second portion of the programmable resources with the supplemental bitstream to implement a corresponding one of the plurality of circuit designs; and storing the first bitstream in memories of each of the systems.