Patent ID: 8316177

Claim:
A re-programmable non-volatile memory system, comprising: an array of storage elements organized into a plurality of blocks, each block having storage elements that are erasable together and organized into a plurality of pages, each page having storage elements that are accessed together and each page is programmable in a preset order in a block at a specified offset position, a memory controller for controlling the operations of the non-volatile memory system, the operations including: (a) in response to a host command for programming and one or more pages of original user data addressable by logical addresses and received from the host, programming the one or more pages of original user data into a first one or more pages of storage elements in the preset order in at least a first one of the blocks, (b) in response to a host command for updating and one or more pages of updated user data received from the host, programming the received one or more pages of updated user data into a second one or more pages of storage elements in the preset order in at least a second one of the blocks without necessarily in the same offset positions as in the at least a first one of the blocks, and (c) in response to a host command for reading user data of specified logical addresses, reading at least the one or more pages of updated data from the at least the second one of the blocks with some of the specified logical addresses in common with that of original user data and reading pages of original user data that have not been updated from the at least the first one of the blocks with others of the specified logical addresses are associated.