Patent ID: 8227862

Claim:
A semiconductor device comprising: a substrate having a first semiconductor region of a first conduction type in a surface portion of the substrate; a second semiconductor region of a second conduction type formed in a part of the surface of the first semiconductor region; a first electrode formed over the second semiconductor region; a third semiconductor region of the second conduction type formed in a part of the surface of the first semiconductor region; a second electrode formed over the third semiconductor region and electrically connected to the third semiconductor region; a fourth semiconductor region of the first conduction type formed in a part of the surface of the first semiconductor region; a third electrode electrically connected to the fourth semiconductor region and electrically connected to the fourth semiconductor region and the second electrode; a gate insulating film formed so as to cover the surface of the first semiconductor region between the second semiconductor region and the third semiconductor region; a gate electrode formed over gate insulating film; a buried semiconductor region of the second conduction type formed under the first semiconductor region; and a sinker layer of the second conduction type formed over the buried semiconductor region and extending from the buried semiconductor region to the surface of the substrate such that the first semiconductor region is surrounded by the sinker layer and the buried semiconductor region, the sinker layer electrically connected to the first electrode.