Patent ID: 7126430

Claim:
A PLL circuit, comprising: a first voltage controlled oscillator; a first phase comparator for detecting a phase difference between an input signal and the output of said first voltage controlled oscillator; a first filter into which the output of said first phase comparator is inputted, and which supplies a frequency control voltage to said first voltage controlled oscillator; a first variable frequency divider for dividing the reference frequency signal outputted from a reference frequency signal source; a second voltage controlled oscillator having the same elements and configuration as said first voltage controlled oscillator; a second variable frequency divider for dividing the output of said second voltage controlled oscillator; a second phase comparator for detecting a phase difference between the outputs of said first variable frequency divider and said second variable frequency divider; a second filter into which the output of said second phase comparator is inputted; a frequency control means into which the output of said second filter is inputted, and which respectively controls the frequencies of said first voltage controlled oscillator and said second voltage controlled oscillator, with circuits having the same configuration; and a frequency switching means for respectively switching the frequencies of said first voltage controlled oscillator and said second voltage controlled oscillator in accordance with a frequency switching signal, with circuits having the same configuration, wherein at least either of said first variable frequency divider and said second variable frequency divider switches the division ratio in accordance with said frequency switching signal.