Patent ID: 7764559

Claim:
A semiconductor memory device for sequentially selecting target word lines according to refreshing request signals to thereby perform refresh operations, comprising: a storage section for storing an address, each address related to each word line which is connected with at least one of memory cells having first data-holding characteristics or second data-holding characteristics; and a storage switching section for switching the addresses to be stored in the storage section between first addresses related to word lines each of which is connected with the memory cells each having the first data-holding characteristics and second addresses related to word lines each of which is connected with the memory cells each having the second data-holding characteristics, according to a distribution of data-holding characteristics included in memory cells; wherein a frequency of execution of the refresh operation is judged based on the address to be stored in the storage section by the switching of the storage switching section, wherein the first address is stored in the storage section when a number of memory cells corresponding to the first address is smaller than a number of the memory cells corresponding to the second address.