Patent ID: 7648905

Claim:
A method of manufacturing a flash memory device, comprising: forming isolation layers and a plurality of gate lines on a semiconductor substrate; forming source and drain regions by ion-implanting impurities into the semiconductor substrate using the gate lines as a mask; forming a side oxide layer on sidewalls and surfaces of the gate lines; forming a side nitride layer on the side oxide layer; forming an insulation layer on the semiconductor substrate and the side nitride layer; forming a photosensitive layer pattern on the insulation layer; exposing the source regions between the gate lines by etching the insulation layer using the photosensitive layer pattern as a mask; forming a polysilicon layer on the exposed source regions and the insulation layer; and forming a source line by etching the polysilicon layer so that the source line is laterally connected to the source regions; wherein the insulation layer is removed after forming the source line; and wherein the etching of the polysilicon layer is performed by a chemical mechanical polishing process or plasma etching process.