Patent ID: 8315301

Claim:
A transceiver comprising: an equalizer, wherein the equalizer includes i) a unity tap comprising a coefficient input configured to receive a coefficient equal to 1, ii) a first plurality of taps, wherein the first plurality of taps include a first plurality of coefficient inputs, wherein the first plurality of taps are configured to receive an input signal, and filter the input signal to generate a first output signal, and wherein the first plurality of coefficient inputs are each configured to receive a respective one of first coefficients, and iii) a second plurality of taps, wherein the second plurality of taps include a second plurality of coefficient inputs, wherein the second plurality of taps are configured to filter the first output signal to generate a second output signal, wherein the second plurality of coefficient inputs are each configured to receive a respective one of second coefficients, wherein the unity tap is connected between the first plurality of taps and the second plurality of taps, and wherein the unity tap is configured to receive the first output signal, and wherein a first one of the second plurality of taps is configured to receive an output of the unity tap; and a control circuit configured to limit a sum of the first coefficients and the second coefficients to a first predetermined range based on the coefficient of the unity tap.