Patent ID: 8107912

Claim:
A receiver for wireless communication, said receiver comprising: a first variable gain low pass filter that receives a baseband signal and includes a combination of a first variable gain amplifier and a first low pass filter coupled to each other in series; a first offset voltage canceling circuit that receives an output signal of said first variable gain amplifier and cancels an offset voltage of said first variable gain low pass filter; a second variable gain low pass filter that receives an output signal of said first variable gain low pass filter and includes a combination of a second variable gain amplifier and a second low pass filter coupled to each other in series; and a second offset voltage canceling circuit that receives an output signal of said second variable gain amplifier and cancels an offset voltage of said second variable gain low pass filter, wherein said first offset voltage canceling circuit cancels the offset voltage of said first variable gain low pass filter previously to said second offset voltage canceling circuit canceling the offset voltage of said second variable gain low pass filter wherein each of said first and second offset voltage canceling circuits comprises: an analog-to-digital converter (ADC) that receives an output signal of a respective one of said first and second variable gain amplifiers and converts the respective one in analog to the respective one in digital; a controller that receives an output signal of said ADC and detects an offset voltage of the respective one of said first and second variable gain amplifiers from the output signal of said ADC to output a digital signal for canceling the offset voltage of the respective one of said first and second variable gain low pass filters; and a digital-to-analog converter (DAC) that receives the digital signal outputted from said controller to output an analog signal corresponding to the digital signal for canceling the offset voltage to the respective one of said first and second variable gain amplifier, wherein said first variable gain low pass filter is configured of a differential circuit, wherein said first low pass filter includes first and second switches and a first capacitor, wherein said first switch is connected between a first signal wire of said differential circuit and said first capacitor, wherein said second switch is connected between a second signal wire of said differential circuit and said first capacitor, and wherein said first and second switches are switched to a short-circuited state or to an open state in synchronism through switching control.