Patent ID: 7502251

Claim:
A phase-change cell memory device, comprising: a plurality of phase-change memory cells each including a volume of material programmable between amorphous and crystalline states; an address circuit for selecting at least one of the memory cells; a write driver for generating a reset sloped pulse current to program a memory cell selected by the address circuit into the amorphous state, and generating a set sloped pulse current to program the memory cell selected by the address circuit into the crystalline state; and a write driver control circuit coupled to the address circuit, the write driver control circuit for varying at least one of a pulse width and pulse slope of at least one of the reset and set sloped pulse currents according to a load between the write driver and the memory cell selected by the address circuit, wherein the write driver control circuit varies a pulse width of at least one of the reset and set slope pulse currents, and wherein the pulse width of the reset sloped pulse current is constant, and wherein the write driver control circuit decreases a pulse width of the set sloped pulse current with an increase in load between the write driver and the memory cells selected by the address circuit.