Patent ID: 7752016

Claim:
An integrated circuit comprising: a monitoring system that monitors data provided on a physical bus, the monitoring system comprising first condition circuitry that provides at least one signal as a function of at least one performance condition being met by at least some of the data provided on the physical bus, the monitoring system provides at least one output signal indicating a measure of performance for the at least some data and adjusts the at least one output signal based on the at least one signal that is provided by the first condition circuitry; and an analysis system operative to perform logic analysis of the data on the physical bus as a function of the at least one signal, the analysis system providing at least one trigger signal that varies based on the logic analysis of the data on the physical bus to control capture of the data on the physical bus, wherein the analysis system comprises: a trigger state machine comprising second condition circuitry configured to receive the at least one signal and compare the at least one signal to a condition in the second condition circuitry and control the trigger state machine to transition from a current state to a next of a plurality of available states based on the at least one signal.