Patent ID: 7032138

Claim:
A flexible and dynamically reconfigurable convolutional interleaver/de-interleaver that is operable to interleave/de-interleave a plurality of symbols, the interleaver/de-interleaver comprising: an interleaver; a de-interleaver that is communicatively coupled to the interleaver via a data channel; wherein each of the interleaver and the de-interleaver includes a corresponding memory cell array, operable to store symbols therein, that includes a plurality of memory cells functionally operable to support a substantially triangular memory configuration to include a plurality of interleaver/de-interleaver array rows such that each memory cell of the memory cell array may be referenced by a row and a row position; wherein each of the corresponding memory cell arrays is characterized by a memory block length and an interleave depth; wherein each of the interleaver and the de-interleaver includes a corresponding write commutator, operable to communicatively couple to any interleaver/de-interleaver array row of the plurality of interleaver/de-interleaver array rows, that is operable to write a symbol to a memory cell of the memory cell array at a first time; wherein each of the interleaver and the de-interleaver includes a corresponding first row position pointer that synchronizes with its corresponding write commutator to select the memory cell by referencing the row and the row position of the memory cell when the write commutator performs a write operation; wherein each of the interleaver and the de-interleaver includes a corresponding read commutator, operable to communicatively couple to any interleaver/de-interleaver array row of the plurality of interleaver/de-interleaver array rows, that is operable to read the symbol from the memory cell of the memory cell array at a second time; wherein each of the interleaver and the de-interleaver includes a corresponding second row position pointer that synchronizes with its corresponding read commutator to select the memory cell by referencing the row and the row position of the memory cell when the read commutator performs a read operation; wherein at least one of the first row position pointer, the interleaver array row to which the write commutator communicatively couples, the second row position pointer, and the interleaver array row to which the read commutator communicatively couples is updated by incrementing it by a positive valued integer; wherein the positive valued integer multiplied by the interleave depth and multiplied by a modulo function of the memory block length results in a constant value; wherein a difference between the first time and the second time is a predetermined selectable delay that corresponds to a preselected number of symbols to be interleaved/de-interleaved by the interleaver/de-interleaver in its particular configuration; and wherein the particular configuration of the interleaver/de-interleaver is selected from among a predetermined plurality of configurations in which the interleaver/de-interleaver may be configured.