Patent ID: 8026733

Claim:
A wafer test equipment system, comprising: a performance board connected to a tester head of a tester; a universal block printed circuit board positioned on the performance board, directly connecting a plurality of normal signal lines to a probe card and dividing each of a plurality of power signal lines into multiple paths and connecting them to the probe card; a cable assembly transferring the normal signal lines and the power signal lines between the universal block printed circuit board and the tester head, the cable assembly soldered directly to the universal block printed circuit board in a perpendicular direction through a center portion of the performance board; and a probe card that is removably secured to the performance board including the universal block printed circuit board, the probe card including an interposer on an upper surface thereof, a ceramic multi-layer substrate positioned below the interposer, and a plurality of needles positioned below the ceramic multi-layer substrate on a lower surface thereof opposite the upper surface, wherein the performance board and the probe card are electrically connected at a plurality of connection contact points at a lower surface of the universal block printed circuit board at a lower portion of the performance board, and wherein the connection contact points correspond with interposer terminals of the interposer of the probe card on the upper surface of the probe card, and wherein the universal block printed circuit board has a matrix structure including a plurality of blocks of printed circuit patterns and wherein each block includes the connection contact points that are provided on the lower surfaces of the printed circuit patterns.