Patent ID: 7483420

Claim:
Digital signal processing (DSP) circuitry that independently processes a plurality of multi-channel data signals, comprising: a plurality of columns of registers, each said column comprising a single input, an output and a plurality of registers arranged in serial as a sequence of registers, wherein the single input is coupled to a register of the plurality of registers that is positioned first in the sequence of registers; and interconnection circuitry for allowing a first channel of said plurality of multi-channel data signals to be selectively shifted, at the same time, through said plurality of registers in a first and a second of said columns, wherein said interconnection circuitry: allows a value at the single input of each column to be selectively routed to any said register in said respective column by bypassing any register or registers that precede said register in said respective column, and allows the output of the first column to be selectively shifted through said plurality of registers in the second column instead of the first channel that is received by the first and second columns at the same time.