Patent ID: 7755739

Claim:
A method for manufacturing an array substrate for an LCD device, the method comprising: forming a transparent conductive layer on a substrate; forming a non-transparent conductive layer on the transparent conductive layer; patterning the transparent conductive layer and the non-transparent conductive layer to form a gate line, a gate electrode, a gate pad, and a transparent pixel electrode, wherein the gate line, the gate electrode, and the gate pad each include portions of the non-transparent conductive layer and the transparent conductive layer; sequentially forming a gate insulation layer, a semiconductor layer, and a data metal layer on the substrate; forming a second photoresist pattern having areas of differing thickness on the data metal layer; patterning the gate insulation layer, the semiconductor layer and the data metal layer to form a data line, a data pad, a capacitor electrode and at least one contact hole by using the second photoresist pattern as a mask; forming a contact electrode layer and a third photoresist layer on the second photoresist pattern and ashing the third photoresist to form an ashed third photoresist pattern inside the at least one contact hole; etching the contact electrode layer to form a contact electrode in each of the at least one contact hole using the ashed third photoresist pattern; ashing the second photoresist pattern to expose a portion of the data metal layer and etching the exposed portion of the data metal layer to form a channel between a source electrode connected to the data line and a drain electrode using the second photoresist pattern; and removing the ashed second photoresist pattern and the ashed third photoresist pattern.