Patent ID: 7415630

Claim:
A method of operating a fault-tolerant computer system with a plurality of processors, the method comprising: flushing out internal processor state data from processors of the plurality of processors; determining an instance of the flushed out internal processor state data in accordance with processor majority vote; storing the instance of the flushed out internal processor state data; invalidating and disabling caches of the processors of the plurality of processors; disabling snooping; holding each processor of the plurality of processors in reset; loading said each processor of the plurality of processors with the instance of the flushed out internal processor state data; enabling snooping; and enabling the caches of the processors of the plurality of processors; wherein: the step of disabling snooping is performed after the steps of invalidating and disabling caches; the step of holding each processor of the plurality of processors in reset is performed after the step of disabling snooping; the step of loading is performed after the step of holding each processor of the plurality of processors in reset; and the step of enabling snooping is performed after the step of loading.