Patent ID: 7037752

Claim:
A method for manufacturing a semiconductor device in which a wiring portion, a first semiconductor element, and a second semiconductor element are laminated on an insulating substrate in sequence, comprising the steps of: forming an integrated circuit of the first semiconductor element using a semiconductor substrate; bonding the first semiconductor element to the insulating substrate through the wiring portion; laminating a metal film, a metal oxide film, an insulating film, and a semiconductor thin film on a surface of a first substrate in sequence; crystallizing the metal oxide film and the semiconductor thin film by a heat treatment; forming an integrated circuit of the second semiconductor element using the crystallized semiconductor thin film; bonding a second substrate over the second semiconductor element with a first adhesive member so as to face the first substrate; separating the first substrate from the second semiconductor element; bonding the second semiconductor element over the first semiconductor element; separating the second substrate from the second semiconductor element; and electrically connecting the second semiconductor element to the wiring portion after electrically connecting the first semiconductor element to the wiring portion.