Patent ID: 7682904

Claim:
A method of fabricating a flash memory device, comprising: providing a semiconductor substrate in which a tunnel dielectric layer, a first conductive layer, a dielectric layer, and a second conductive layer are formed; patterning the second conductive layer and the dielectric layer; forming an anti-oxidization layer over the first conductive layer, including the patterned second conductive layer and the patterned dielectric layer; etching the anti-oxidization layer, while etching the first conductive layer, in such a manner that the anti-oxidization layer remains on sidewalls of the second conductive layer and the first conductive layer is patterned; forming a first insulating layer surrounding each element of the remaining anti-oxidization layer and having a top with an overhang shape; and forming a second insulating layer having an air-gap between the first insulating layer on sidewalls of adjacent elements of the patterned first conductive layer.