Patent ID: 8076781

Claim:
A semiconductor device comprising: a first wiring layer disposed on a semiconductor substrate; a first insulating layer disposed on the first wiring layer and having a first opening formed therein; a first metal layer embedded in the first opening so as to be connected to the first wiring layer; a second wiring layer disposed on the first insulating layer so as to be connected to the first metal layer; a second insulating layer disposed on the second wiring layer and the first insulating layer and having a second opening formed therein, the second opening covering the first opening; a third wiring layer disposed on the second insulating layer so as to be connected to the second wiring layer through the second opening; and an alloy layer disposed between the second and third wiring layers and made of metals of the second and third wiring layers, the alloy layer being formed non-uniformly between the second and third wiring layers so that the alloy layer is formed above the first opening but is not formed horizontally away from the first opening.