Patent ID: 7851709

Claim:
A circuit board, comprising: a plurality of dielectric layers; a plurality of signal lines; and a plurality of shielding walls, separated by the plurality of dielectric layers and disposed between the signal lines, wherein each shielding wall comprises: an upper surface; a lower surface opposite to the upper surface; a groove extending from the upper surface toward the lower surface, wherein each of the plurality of signal lines extends along a longitudinal direction parallel to a longitudinal axis of the groove of each shielding wall without extending within the groove of each shielding wall; a first metal layer disposed on the upper surface, wherein the first metal layer and the plurality of signal lines are located at a same layer; a second metal layer disposed inside the groove and electrically connecting to the first metal layer; a middle metal layer disposed between the upper surface and the lower surface, wherein the second metal layer electrically connects the first metal layer to the middle metal layer; and wherein the first metal layer is a ground shielding layer or a power shielding layer.