Patent ID: 7360063

Claim:
A method of managing registers of a processor, the method comprising: providing a register mapping comprising a set of maps, each map of the set of maps comprising a plurality of map registers; providing a set of actual registers indirectly accessed by the processor via map entries of the set of maps of the register mapping, wherein the number of actual registers in the set of actual registers is greater than the number of map entries in the set of maps, and wherein the map entries of the set of maps reference only a subset of the set of actual registers at any given time; managing updates to map entries of the set of maps of the register mapping by updating multiple map entries of at least one map of the set of maps responsive to executing a single update instruction; wherein the providing of the register mapping further comprises providing the register mapping with a plurality of increment registers, each increment register being associated with a respective map register of the plurality of map registers, and wherein the managing comprises employing at least one increment register of the plurality of increment registers to update the multiple map entries of the at least one map of the set of maps responsive to the single update instruction, wherein the single update instruction comprises an “increment map register” instruction; wherein the providing of the register mapping further comprises providing the register mapping with a plurality of pre-incremented map registers, each pre-incremented map register being associated with a respective map register of the plurality of map registers, and wherein the managing further comprises moving pre-incremented map entries from at least one pre-incremented map register to at least one map register of the at least one map employing the single update instruction; and automatically determining map entries of a pre-incremented map register of the plurality of pre-incremented map registers responsive to an update of map entries of an associated map register of the plurality of map registers or its associated increment register of the plurality of increment registers.