Patent ID: 8400816

Claim:
A resistance change memory device comprising: a memory cell array with memory cells arranged therein, the memory cells having a variable resistance element for storing a rewritable resistance value; a reference cell formed of the same memory cells as those set in a high resistance state in the memory cell array; and a sense amplifier configured to compare a cell current value of a memory cell selected in the memory cell array with the reference current value of the reference cell, wherein both the memory cell array and the reference cell are formed of memory cells arranged three-dimensionally, the memory cell array stores such multi-level data that one memory cell stores one selected from three or more resistance value states, and the reference cell comprises: a plurality of word line groups each having multiple word lines connected in parallel, to which one ends of memory cells are coupled; a plurality of bit line groups each having multiple bit lines connected in parallel, to which the other ends of the memory cells are coupled; first switch groups disposed between the word line groups and a reference word line; and second switch groups disposed between the bit line groups and a reference bit line, and wherein a plurality of the reference current values are set with the second switches sequentially turned on at a read time of the multi-level data.