Patent ID: 6998696

Claim:
A thin film capacitor/inductor/interconnect method comprising: (a) thinly metalizing a substrate with a lower electrode and interconnect layer formed on said thin film hybrid substrate, said layer further comprising a lower adhesive layer and an upper conducting layer having a sum total thickness of less than or equal to 1.5 microns; (b) applying/imaging photoresist and etching to form metal patterns on said substrate for lower capacitor electrodes and interconnect; (c) applying a thin dielectric layer to said metal patterns; (d) applying/imaging photoresist and etching to form contact holes in said dielectric layer and optionally selectively patterning said dielectric layer; (e) metalizing said substrate to make contact with said lower capacitor electrodes and interconnect; (f) applying/imaging photoresist and etching to form patterns for upper capacitor electrodes, inductors, and/or interconnect conductors; (g) optionally forming resistor elements by applying/imaging photoresist and etching a resistor layer on said substrate; wherein said upper conducting layer is approximately 0.25 microns thick.