Patent ID: 7901974

Claim:
A method of fabricating an array of complementary metal-oxide-semiconductor (“CMOS”) imaging pixels, comprising: fabricating front side components on a front side of the array; implanting a blanket dopant layer across a backside of the array; masking the blanket dopant layer with a mask to selectively expose portions of the blanket dopant layer beneath a photodiode region of each CMOS imaging pixel within the array while covering pixel circuitry of each CMOS imaging pixel within the array; and laser annealing the exposed portions of the blanket dopant layer to create an activated portion of the blanket dopant layer beneath the photodiode region of each CMOS imaging pixel within the array while retaining an unactivated portion of the blanket dopant layer beneath the pixel circuitry of each CMOS imaging pixel within the array such that the activated portion and unactivated portion of each CMOS imaging pixel form a pattern of activated and unactivated portions across the backside of the array wherein the activated portions encourage photo-generated charge carriers to migrate towards the photodiode regions while the unactivated portions become high recombination regions for the photo-generated charge carriers that migrate laterally to reduce crosstalk between the CMOS imaging pixels.