Patent ID: 7531403

Claim:
A method for fabricating a semiconductor component including a semiconductor on insulator (SOI) substrate having a first semiconductor layer of first conductivity type, a layer of insulator on the first semiconductor layer, and a second semiconductor layer overlying the layer of insulator, the method comprising the steps of: forming an insulating region extending through the second semiconductor layer to the layer of insulator; implanting conductivity determining ions into the first semiconductor layer to form a drift region of second conductivity type; etching a first opening exposing a portion of the drift region and a second opening exposing a portion of the first semiconductor layer adjacent the drift region; forming a gate electrode overlying the first semiconductor layer adjacent the drift region; implanting conductivity determining ions into the drift region to form a drain region and into the first semiconductor layer to form a source region, the drain region and source region of second conductivity type; and forming an electrical contact to the gate electrode, the drain region, and the source region.