Patent ID: 8604456

Claim:
A nonvolatile memory device comprising: a semiconductor substrate; a plurality of first metal wirings provided on the semiconductor substrate and extending along a first direction and being electrically connected to a peripheral circuit; a plurality of third metal wirings extending along a second direction orthogonal to the first direction; memory cells provided at intersections between the plurality of first metal wirings and the plurality of third metal wirings, the memory cells forming an array and including selection elements provided on the first metal wirings and being electrically connected to the first metal wirings; memory elements provided on the selection elements, the memory elements being electrically connected to the selection elements; and second metal wirings provided on the memory elements and being electrically connected to the memory elements; the third metal wirings provided on the second metal wirings and being electrically connected to the second metal wirings and peripheral circuit; and a first interlayer film having a first thermal conductivity and provided on side surfaces of the memory elements and between adjacent selection elements and not provided between adjacent memory elements; and a second interlayer film having a second thermal conductivity provided in a void formed by the first interlayer film having the first thermal conductivity; the second thermal conductivity being lower than the first thermal conductivity.