Patent ID: 7638396

Claim:
A method for forming a semiconductor device, comprising: providing a silicon-containing substrate with first, second, and third regions; forming first, second, and third gate stacks overlying a portion of the silicon-containing substrate in the first, second, and third regions respectively, wherein the first, second, and third gate stacks respectively have a conducting layer and first, second, and third gate dielectric layers formed between the conducting layer and the silicon-containing substrate; forming a spacer on opposing sidewalls of the each of the first, second, and third gate stacks, the spacer overlying a portion of the silicon-containing substrate in the first, second, and third regions, respectively; and forming a source/drain region in a portion of the silicon-containing substrate in the first, second, and third regions, the source/drain region being adjacent to the first, second, and third gate stacks, respectively, wherein the first, second, and third gate dielectric layers have various thicknesses and have been treated by NH 3 -plasma, and at least one of the first, second, and third gate dielectric layers with various thicknesses has a nitrogen-concentratiion of about 10 13 ˜10 21 atoms/cm 2 therein.