Patent ID: 7038319

Claim:
A multi-layer semiconductor chip package, comprising: a plurality of pairs of conductors for carrying a plurality of signals in a layer of a carrier of the package, the plurality of pairs of conductors including a first pair of conductors to carry aggressor signals and a second pair of conductors adjacent to the first pair of conductors, the second pair of conductors to carry victim signals affected by the aggressor signals; wherein each pair of conductors in the layer is positioned so that adjacent pairs of conductors affect each other evenly such that each aggressor signal of the first pair of conductors is respectively equidistant to both the victim signals of the second pair of conductors and each victim signal of the second pair of conductor is respectively equidistant to both the aggressor signals of the first pair of conductors, wherein cross-talk between the adjacent pairs of conductors is substantially minimized without increasing a size of the package.