Patent ID: 7674711

Claim:
A method of fabricating a flash memory device, comprising the steps of: forming a first interlayer insulating film on a semiconductor substrate, said semiconductor substrate having a cell region; etching the first interlayer insulating film to form a first contact hole that exposes a first junction region of the cell region; forming a first contact plug within the first contact hole; forming a second interlayer insulating film on the first interlayer insulating film; etching the second and first interlayer insulating films to form a second contact hole that exposes a second junction region of the cell region; forming a second contact plug within the second contact hole, the second contact plug having a height lower than that of an interface of the first and second interlayer insulating films; and forming a spacer on sidewalls of the second contact hole over the second contact plug, wherein the spacer prevents residuals that remain between the first interlayer insulating film and the second interlayer insulating film from connecting to a bit line that will be formed by a subsequent process.