Patent ID: 7782104

Claim:
A system comprising: a voltage controlled oscillator (VCO) to output a signal; a time-to-digital converter (TDC) having a first delay-locked loop (DLL) to receive the signal and to generate one or more control signals; a second DLL to receive the signal and to generate one or more delayed versions of the signal; and an array of a plurality of delay elements configured to output a corresponding plurality of delayed versions of the signal based at least in part on the one or more control signals and the one or more delayed versions of the signal; and logic coupled to the array of the plurality of delay elements and configured to generate a digital word that represents phase information of the signal based at least in part on the plurality of delayed versions; and a phase detector coupled to the TDC and configured to generate a digital phase error based at least in part on the digital word and a reference digital word.