Patent ID: 8890733

Claim:
A device comprising: a sample and hold circuit configured to provide at least one signal related to an input analogue current signal by sampling the input analogue current signal and integrating it on capacitive means, thereby charging the capacitive means to a charge value, wherein the capacitive means is configured to dynamically change its effective capacitance value in order to shape a voltage signal present on the capacitive means by biasing the capacitive means, while the charge value on the capacitive means remains unchanged; and an analogue-to digital conversion and control circuit configured to perform an analogue-to-digital conversion of the at least one related signal provided by the sample and hold circuit into an output digital signal, the analogue-to-digital conversion and control circuit including successive approximation analogue-to-digital conversion means for considering a value of the voltage signal on the capacitive means and converting the charge value present in the capacitive means into the digital output signal.