Patent ID: 8055882

Claim:
A multiprocessor apparatus comprising: a plurality of processors coupled to a common bus to access a predetermined device which is coupled to the common bus, and further coupled to local buses thereof, which are different buses from the common bus, to transfer commands therethrough and to output requests for use; a co-processor coupled to the local buses thereof to receive the commands, to execute the commands by using resources in the co-processor, and to return results of execution of the commands to the processors through the local buses, wherein the co-processor outputs a resource status information representing a usage state of the resources in the co-processor; an arbitration circuit coupled to the processors to receive the requests therefrom and configured to arbitrate the requests to output a permission signal thereto which indicates permitting the respective processors simultaneously to use the resources in the co-processor, if the respective processors output the requests simultaneously among the respective processors but the resources to be used by the respective processors do not contend with each other, wherein the arbitration circuit receives the resource status information from the co-processor and the permission signal is based on the resource status information; and a multiplexer coupled to the arbitration circuit, coupled to the processors through the local buses, and coupled to the co-processor through the local buses to transfer the commands received from the respective processors to the co-processor in accordance with the permission signal, wherein the multiplexer receives the commands from the plurality of processors through the local buses, receives the permission signal from the arbitration circuit, selects from one of the plurality of processors based on the permission signal and supplies the commands from the selected one of the plurality of processors to the co-processor through the local buses.