Patent ID: 7212241

Claim:
A solid-state imaging device comprising, on a semiconductor substrate: a plurality of sensor sections each of which is configured to store a signal charge commensurate with a quantity of received light within a signal storage period; a charge transfer section configured to transfer and output the signal charges of each of the sensor sections to an output section; the output section which is configured to convert each signal charge transferred by the charge transfer section into an imaging signal for output; and a current controller which is configured to cut off or reduce current flowing to the output section from the charge transfer section during a signal storage period of the sensor section, wherein, the output section comprises: (a) a signal converting section having amplifier circuits each of which comprises a drive transistor and a load transistor connected in series an input stage and an output stage of the output section, the gate of the drive transistor of the first amplifier in the series being coupled to a floating diffusion terminal for supplying a signal charge to the gate of the drive transistor, the source of the drive transistor of each preceding amplifier circuit being connected to the gate of the drive transistor of the immediately following amplifier circuit in the series in a next stage in a repeated fashion, and the source of the drive transistor of the last amplifier circuit in the series being couple to an output terminal for an imaging signal; and (b) a reset gate control section coupled to the gate of the drive transistor of the first amplifier circuit in the signal converting section and configured to issue a reset gate signal depending upon a transfer clock, the current controller has a switching element operatively configured to control current flowing to the load transistors of the amplifier circuits of the output section, the switching element is a MOS transistor, and the MOS transistor has a channel potential same as or operatively substantially the same as a potential on a transfer gate of the charge transfer section.