Patent ID: 8471244

Claim:
A semiconductor device comprising: a source; a drain; a channel coupled to a substrate and disposed between the source and the drain, the channel including a first portion comprising an alloy material, the alloy material including a first impurity having a graded concentration throughout the first portion, wherein the concentration of the first impurity linearly increases or decreases throughout a height of the first portion, the channel further including a second portion comprising an alloy material, the alloy material of the second portion including a second impurity with a graded concentration, wherein the second portion of the channel directly contacts a portion of the substrate and wherein the channel is configured to have a built-in drift field that adds a drift velocity to charge carriers in the channel; a gate dielectric, at least a portion of the gate dielectric disposed above the alloy material and a gate electrode, the gate dielectric disposed between the alloy material and the gate electrode, wherein the first portion of the channel directly contacts the gate dielectric.