Patent ID: 8427122

Claim:
An electronic circuit with enhanced power supply rejection, the electronic circuit comprising: a cancellation circuit comprising: an input terminal receiving a reference signal; a first capacitor directly coupled to the input terminal for receiving the reference signal and generating a first input current; a second capacitor directly coupled to the input terminal for receiving the reference signal and generating a second input current; and a differential current amplifier comprising: a first input for receiving the first input current from the first capacitor; a second input for receiving the second input current from the second capacitor; a first output for outputting a first output current; and a second output for outputting a second output current; and an output terminal generating a cancellation current comprising the first output current and the second output current; and a regulator circuit comprising: a differential pair of transistors outputting a differential current; a load coupled to the differential pair of transistors, the load comprising: a first input receiving the cancellation current; a second input receiving the differential current; and an output outputting the sum of the cancellation current and the differential current; and a pass transistor having an input terminal coupled to the output of the load and an output terminal for generating an output current based on the sum of the cancellation current and the differential current.