Patent ID: 6937949

Claim:
A system for processing a data signal comprising: a first circuit configured to generate a first data signal based on a pattern, said first data signal including variations from the pattern, said first data signal transmitted at a first frequency; a second circuit configured to generate a second data signal by delaying the first data signal by a first amount of time, said first amount of time subject to a series of adjustments; a third circuit configured to latch states of the second data signal; a fourth circuit configured to take measurements of the variations from the pattern by reference to the states of the second data signal following each adjustment in the series of adjustments; a fifth circuit configured to receive the measurements of the variations from the pattern from the fourth circuit, said fifth circuit further configured to: control the series of adjustments so that a measurement of a first spike of said variations is received from said fourth circuit, said first spike corresponding to a first delay; control the series of adjustments so that a measurement of a second spike of said variations is also received from said fourth circuit, said second spike corresponding to a second delay; and set said first amount of time to a third delay derived from said first delay and said second delay.