Patent ID: 8802528

Claim:
A manufacturing method of a PMOS field effect transistor, comprising: providing a substrate; forming an oxide layer on the substrate, and depositing a first nitride layer on the oxide layer; etching part of the first nitride layer and the oxide layer by the photolithography technology to form a substrate concave trough, wherein the surface layer of the substrate that corresponds to the substrate concave trough forms a first doping area; depositing a first strained Si—Ge layer, an epitaxial Si layer and a second strained Si—Ge layer on the substrate concave trough and the first nitride layer in order and forming a second doping area on the surface layer of the second strained Si—Ge layer; forming a buffer oxide layer is formed on the second strained Si—Ge layer, and depositing a hard-mask layer on the buffer oxide layer; etching part of the hard-mask layer, the buffer oxide layer, the second nitride layer, the epitaxial Si layer and the first strained Si—Ge layer by the photolithography technology to form a mesa structure; forming two gate oxide films on two sides of the mesa structure, and depositing a gate stack layer on the mesa structure and the first nitride layer; etching part of the gate stack layer to make the gate stack layer be stacked on the two sides of the mesa structure and the first nitride layer; depositing a second nitride layer on the mesa structure, the gate stack layer and the first nitride layer; and etching part of the second nitride layer and the first nitride layer by the photolithography technology to make the second nitride layer be stacked on two sides of the mesa structure and the gate stack layer.