Patent ID: 7553756

Claim:
A process for producing a semiconductor integrated circuit device, comprising the steps of: (a) providing a first insulating film over a semiconductor substrate; (b) providing a plurality of wiring grooves in the first insulating film; (c) forming a first conductive film on the first insulating film including respective insides of the plurality of the wiring grooves; (d) removing the first conductive film lying outside the plurality of the wiring grooves to form a wiring line composed of the first conductive film in respective insides of the plurality of the wiring grooves; (e) forming a second insulating film from material different than that of the first insulating film on the first insulating film and the wiring line; (f) etching the second insulating film by using a mask covering a formation region of a connection hole to be formed in a later step for exposing the upper surface of the wiring line, to form a sacrifice film pillar composed of the second insulating film in the formation region of the connection hole; (g) selectively removing the first insulating film in a region not covered with the sacrifice film pillar to leave behind the first insulating film under the sacrifice film pillar; (h) forming a third insulating film from material different than that of the second insulating film on the wiring line and the sacrifice film pillar, while leaving behind an air-gap in a space region between the wiring line portions on which the first insulating film was removed; (i) removing the third insulating film on the sacrifice film pillar to expose the upper surface of the sacrifice film pillar; (j) removing the sacrifice film pillar to form the connection hole for exposing the upper surface of the wiring line; and (k) forming a second conductive film inside the connection hole.