Patent ID: 7339844

Claim:
A method for keeping track of failures in a memory device under test, the memory device comprising a plurality of memory cells organized into a plurality of memory cell groups along a plurality of dimensions, each memory cell group addressable by one of a plurality of address components corresponding to one of the plurality of dimensions, the method comprising: receiving indication of a failed memory address, the failed memory address comprising a plurality of address components corresponding to a plurality of selected memory cell groups addressed by the failed memory address, each of the selected memory cell groups organized along a different associated dimension and each of the selected memory cell groups associated with a corresponding failure count that indicates a number of redundant memory cell groups organized along a dimension other than the dimension of the associated memory cell group that are available for repairing the associated memory cell group; determining whether any of the failure counts associated with the selected memory cell groups has an expired status indicating that the corresponding selected memory cell group must be repaired using a redundant memory cell group organized along the dimension of the corresponding memory cell group; and if none of the failure counts associated with the selected memory cell groups has an expired status, adjusting the failure counts associated with the selected memory cell groups to reflect detection of a failure at the failed memory address.