Patent ID: 7015049

Claim:
A method for manufacturing a ferroelectric capacitor comprising the steps of: forming a substructure of the capacitor having a contact plug passing therethrough for electrically connecting a bottom electrode of the capacitor to an underlying active layer; depositing over the substructure the bottom electrode including a barrier layer intermediate therebetween; depositing over the bottom electrode a ferroeletric layer such that the diffusion of contaminants from the ferroelectric layer to the contact plug is inhibited by the intermediate barrier layer; depositing over the ferroelectric layer a top electrode; depositing over the top electrode, the underlying ferroelectric layer and the bottom electrode a first hardmask; etching to pattern the top electrode using the first hardmask; depositing over the remaining portions of the first hardmask and on the bottom electrode an additional hardmask; etching to pattern the bottom electrode using a first recipe resulting in the formation of a first fence clinging to sidewalls of the additional hardmask, bottom electrode and barrier layer; and etching the intermediate barrier layer using a second recipe resulting in the formation of a second fence clinging to and structurally supported by the first fence while at the same time etching away a substantial portion of the first fence to remove the structural support provided to the second fence so that the second fence is lifted-off from the sidewalls leaving the sidewalls substantially free of clinging fences.