Patent ID: 7327593

Claim:
A ROM memory cell of a ROM memory, comprising: at least one of a first predetermined potential or a second predetermined potential in a driven state at a memory cell output dependent on a programming state of the ROM memory cell; a switching element including: a signal input, at which the at least one first predetermined potential or the second predetermined potential is present in a manner dependent on the programming state of the ROM memory cell, and a signal output for reading out the programming state of the ROM memory cell, which is connected to the signal input in the driven state; a first interconnect, to which the first predetermined potential is applied, and a second interconnect, to which the second predetermined potential is applied, the signal input of the switching element being electrically connected to the first interconnect or the second interconnect dependent on the programming state of the ROM memory cell; a first metallization layer, in which the first interconnect and the second interconnect are arranged above the switching element; and a first electrical connection, which is electrically connected to the signal input of the switching element and has a top side situated in the plane of the first metallization layer; wherein: the top side of the first electrical connection is arranged spatially between the first interconnect and the second interconnect, a second electrical connection is arranged in the plane of the first metallization layer and the first electrical connection abuts on the second electrical connection, and the second electrical connection is connected to the first interconnect or the second interconnect dependent on the programming state of the ROM memory cell.