Patent ID: 7826441

Claim:
An apparatus, comprising: a memory storage unit configured to store packets of data; and a first controller adapted to determine a target delay length for the memory storage unit based on a filtered value of a percentage of underflows due to delay of said packets of data, so as to track said target delay length with the percentage of underflows wherein the first controller is further configured to calculate the target delay length as: If (PER delay < TARGET_VALUE) then DEJITTER_DELAY = DEJITTER_DELAY − CONSTANT; If (PER delay > TARGET_VALUE) then DEJITTER_DELAY = DEJITTER_DELAY + CONSTANT; Set DEJITTER_DELAY = MAX (MIN_JITTER, DEJITTER_DELAY); and DEJITTER_DELAY = MIN (MAX_JITTER, DEJITTER_DELAY), wherein PER delay is a rate of underflows due to delayed packets, TARGET_VALUE is a targeted rate of delayed packets, DEJITTER_DELAY is the target delay length of the adaptive de-jitter buffer, CONSTANT is a pre-defined value, and MAX_JITTER and MIN_JITTER are pre-defined values representing the maximum and minimum target delay lengths respectively.