Patent ID: 7816731

Claim:
An apparatus comprising: a plurality of transistor segments arranged on a die, each transistor segment having a racetrack shape with a length elongated in a first lateral direction and a width in a second lateral direction, each transistor segment including: a pillar of a semiconductor material, the pillar including an extended drain region that extends in a vertical direction through the die; a first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; wherein the transistor segments are arranged into a plurality of sections, transistor segments of a first section being shifted in the first lateral direction with respect to transistor segments of a second section, with each of the transistor segments of a row of the first section being separated by a pair of the transistor segments of the second section, the pair being arranged in an end-to-end relationship in the first lateral direction, the second dielectric regions of alternating ones of the transistor segments in the first and second sections being merged.