Patent ID: 7051169

Claim:
A wireless communications device, comprising: a serially-addressed memory for storing data, the serially-addressed memory accessible by a serial address and data line; a processing unit directly connected to the serially-addressed memory by the serial address and data line, the processing unit having a serial memory interface for reading data from the serially-addressed memory upon a power on condition, the processing unit outputting at least a portion of the data read from the serially-addressed memory onto parallel address and data lines to a volatile memory; the volatile memory connected to the processing unit by the parallel address and data lines, the volatile memory for storing the at least a portion of the data read from the serially-addressed memory for later use by the processing unit; a communications circuit connected to the processing unit, the processing unit controlling the communications circuit utilizing the at least a portion of the data read from the volatile memory, the communications circuit comprising: a transmitter circuit; a receiver circuit; and an antenna connected to the transmitter circuit and the receiver circuit.