Patent ID: 8222927

Claim:
A reference buffer circuit, comprising: a buffering stage, for providing a first driving voltage based on a first input voltage; and a driving stage, arranged to be driven by the first driving voltage to output a first output voltage; wherein the buffering stage comprises: a first operational amplifier, having a first input end for receiving the first input voltage, a second input end, and an output end for outputting a first tracking voltage; a first charge pump, coupled to the output end of the first operational amplifier, for shifting a level of the first tracking voltage to generate the first driving voltage; and a first buffering transistor having a drain coupled to a first supply voltage, a source connected to the second input end of the first operational amplifier, and a gate coupled to the first charge pump for receiving the first driving voltage and providing the first driving voltage to the driving stage, and wherein the driving stage comprises: a first low pass filter (LPF), coupled to the gate of the first buffering transistor, for low-pass filtering the first driving voltage to output a first filtered voltage; and a first driving transistor, having a drain for receiving the first supply voltage, a gate coupled to the first LPF for receiving the first filtered voltage, and a source for outputting the first output voltage.