Patent ID: 7449388

Claim:
A process for forming a bipolar junction transistor in a semiconductor substrate, the process comprising: forming first doped tub regions of a first dopant type within the substrate, wherein the first doped tub regions are located within metal oxide semiconductor field effect transistor (MOSFET) regions; using a first mask to form sinker regions of a second dopant type within the substrate, wherein at least a portion of the sinker regions are located within bipolar junction transistor (BJT) regions and a remaining portion of the sinker regions are located in the MOSFET regions adjacent the first doped tub regions; using a second mask, and the second dopant type, to form first subcollectors within a portion of the BJT regions that include a portion of the sinker regions, and triple well regions within the MOSFET that electrically isolate the first doped tub regions, and the another mask covering a remaining portion of the sinker regions to prevent the remaining portion from being doped; and forming gate structures over the MOSFET regions; using a third mask to dope a portion of each of the first subcollectors, the remaining portions of the sinker regions, and source/drains regions in the first doped tub regions with the second dopant type; and using a fourth mask to dope the remaining portions of the sinker regions to form second subcollectors and a portion of the first subcollector regions with the second dopant, such that the portion of the first subcollector regions has a dopant concentration different from a remaining portion of the first subcollector regions and the second subcollector regions.