Patent ID: 8088661

Claim:
A method of manufacturing a nonvolatile semiconductor memory comprising: forming a floating gate electrode of a memory cell transistor on a gate insulating film on a surface of a memory cell region in a semiconductor substrate; forming a first insulating film in a first trench in the memory cell region and a second insulating film in a second trench in a resistor region in the semiconductor substrate, the first insulating film being adjacent the floating gate electrode in the memory cell region; forming a recess in the upper portion of the second insulating film; filling up the recess with a resistor of a resistance element so as to be flush with an upper portion of the resistor and an upper portion of the second insulating film; etching an upper portion of the first insulating film so as to be lower than the upper portion of the floating gate electrode and the upper portion of the second insulating film relative to the surface of the semiconductor substrate; forming an inter-gate insulating film of the memory cell transistor and an intermediate insulting film of the resistance element simultaneously on the upper portion and the side portion of the floating gate electrode and the upper portion of the resistor, respectively; and forming a control gate electrode of the memory cell transistor and an intermediate layer of the resistance element simultaneously on the inter-gate insulating film and the intermediate insulating film, respectively.