Patent ID: 7937259

Claim:
A co-simulation system, comprising: a data processing arrangement configured to execute a simulator that simulates a first block of an electronic circuit design, and further configured to execute a clock control interface; a first clock source that generates a first clock signal; a second clock source that generates a second clock signal and is coupled to the clock control interface, wherein the first and second clock signals are independent one from another, and an operating frequency of the second clock signal is dynamically adjustable from the clock control interface; a programmable device coupled to the data processing arrangement; wherein the programmable device is configured to include: a co-simulation interface coupled to the simulator and further coupled to the first clock source; a second block of the electronic circuit design coupled to the co-simulation interface and further coupled to and clocked by the second clock source; and a synchronizer coupled to the first and second clock sources, to the co-simulation interface, and to the second block for controlling data transmission between the co-simulation interface and the second block; wherein the synchronizer comprises: a first domain controller coupled to the co-simulation interface and to the first clock source; a second domain controller coupled to the second clock source; a first serial chain of at least two registers enabled by the first clock signal; a second serial chain of at least two registers enabled by the second clock signal; wherein the first and second domain controllers use the first and second serial chains of registers for transmission of control signals in a handshake protocol used in controlling clock signal selection by the synchronizer and in data transmission between the second block and the co-simulation interface.