Patent ID: 8859369

Claim:
A method of manufacturing a semiconductor device, comprising: forming, on a semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type; forming an epitaxial layer of the second conductivity type on the buried layer; forming a trench in the epitaxial layer; partially forming a cancelling region of the first conductivity type below a bottom surface of the trench, for cancelling a conductivity type of the buried layer, the cancelling region having a distribution center located below a boundary surface between the buried layer and the epitaxial layer; forming a body region of the first conductivity type in the epitaxial layer at a periphery of a side surface of the trench, and simultaneously forming a trench bottom surface lower region of the first conductivity type below the bottom surface of the trench, the trench bottom surface lower region being continuous to the cancelling region; forming a gate insulating film on an inner wall of the trench; filling polycrystalline silicon in the trench so as to be brought into contact with the gate insulating film, to thereby form a gate electrode; forming a source region of the second conductivity type in a surface of the body region; and forming a body contact region of the first conductivity type in the surface of the body region.