Patent ID: 7274581

Claim:
A ternary content addressable memory (TCAM) system comprising: a write/search bit line decoder and driver circuit; and a TCAM block array including multiple TCAM blocks, wherein the TCAM block array is organized into at least one rectangular array having rows each having a plurality of TCAM blocks, wherein each TCAM block is associated with a row and a column of the TCAM block array, and wherein each TCAM block comprising: a plurality of TCAM cells, wherein the TCAM block is arranged into at least one rectangular array, wherein each TCAM cell is associated with a row and a column in the TCAM block; an associated read/write bit line coupled between each TCAM cell and the write/search bit line decoder and driver circuit and wherein during a write cycle the write bit line decoder and driver circuit to write a data bit to each TCAM cell via the associated read/write bit line; and an associated data decode bypass circuit wherein during a debug mode, the bypass circuit allows the TCAM to write raw nondecoded data, for testing purposes.