Patent ID: 8626955

Claim:
A non-transitory computer readable medium containing instructions, which when executed, cause a processor to: store data associating respective packet flows with respective ones of multiple processor units; store data associating a first packet flow with a first of the multiple processor units; cause packets in the first packet flow to be directed to the first of the multiple processor units based on the data associating the first packet flow with the first of the multiple processor units; determine a second, different, one of the multiple processor units based on a socket call, the socket corresponding to the first packet flow, the socket call to determine an id of the second, different, one of the multiple processor units; store data to associate the first packet flow with the second of the multiple processor units; cause packets in the first packet flow to be directed to the second of the multiple processor units based on the data associating the first packet flow with the second of the multiple processor units determined to be associated with the socket call; and if a packet belongs to a packet flow not represented in the data associating respective packet flows with respective ones of multiple processor units, causing the packet to be directed to a one of the multiple processor units based on a receive side scaling indirection table indexed by a hash of packet header flow data, wherein the receive side scaling indirection table is capable of mapping multiple packet flows to the same receive side scaling indirection table entry.