Patent ID: 8916444

Claim:
A method of fabricating a semiconductor device, comprising: forming a semiconductor layer on a substrate; patterning the semiconductor layer into a fin structure; forming a gate dielectric layer and a gate electrode layer over the fin structure; patterning the gate dielectric layer and the gate electrode layer to form a gate structure in a manner so that the gate structure wraps around a portion of the fin structure; and performing a plurality of implantation processes to form source/drain regions in the fin structure, the plurality of implantation processes being carried out in a manner so that a doping profile across the fin structure is non-uniform including a first region having a first doping concentration level, a second region extending from the first region and partially wrapped around by the gate structure and having a second doping concentration level that is different than the first doping concentration level, and a third region extending from the second region but not wrapped around by the gate structure and having a third doping concentration level that is different than the second doping concentration level, wherein the first, second, and third regions all have the same doping polarity.