Patent ID: 8446181

Claim:
A sampling circuit that samples an input signal using at least one switch, at least one capacitor, and an amplifier, the sampling circuit comprising: a clamp block connected between an output terminal and a negative input terminal of the amplifier, wherein the clamp block prevents a difference between a voltage level of the output terminal of the amplifier and a voltage level of the negative input terminal of the amplifier during sampling from exceeding a maximum voltage difference, the clamp block including at least one of a diode and a diode connected transistor connected to the output terminal of the amplifier, wherein: the amplifier has a positive input terminal connected to a reference voltage; the at least one switch includes a first switch and a second switch; the first switch has a first end receiving the input signal; a second switch has a first end connected to a negative input terminal of the amplifier and a second end connected to an output terminal of the amplifier; the at least one capacitor includes a first capacitor and a second capacitor; the first capacitor has a first end connected to a second end of the first switch, the first capacitor having a second end connected to the negative input terminal of the amplifier; the second capacitor has a first end connected to the negative input terminal of the amplifier; and the clamp block has a first end connected to the negative input terminal of the amplifier and a second end connected to the output terminal of the amplifier, the clamp block being connected in parallel with the second switch.