Patent ID: 7759747

Claim:
An integrated circuit comprising: memory, comprising flash memory, the flash memory including a plurality of storage capacitive elements, each of the storage capacitive elements having a dielectric on and contacting a conductive channel, the conductive channel located between a first region and a second region, wherein electrical conductivity of the conductive channel is modulated by a voltage, the dielectric configured to electrically couple the first region and the second region using the conductive channel, the dielectric structured as a dielectric stack including at least one Ta y Al z O x N w (y>0, z>0, x>0, w>0) layer such that concentration of nitrogen in the Ta y Al z O x N w (y>0, z>0, x>0, w>0) is graded in the dielectric, the dielectric stack including at least one insulator layer without Ta y Al z O x N w (y>0, z>0, x>0, w>0) such that the dielectric stack includes a layer of tantalum oxide, a layer of aluminum oxide, or both a layer of tantalum oxide and a layer of aluminum oxide, the dielectric stack interposed between at least two electrodes.