Patent ID: 7968881

Claim:
A thin film transistor substrate comprising: gate lines; first data lines and second data lines intersecting the gate lines, the first data lines and second data lines being alternately arranged; a first thin film transistor and a second thin film transistor formed in a unit pixel region defined by one gate line of the gate lines, one first data line of the data lines, and one second data line of the data lines, the first thin film transistor having a first source electrode extended from the first data line, a first drain electrode and a first gate electrode, and the second thin film transistor having a second source electrode extended from the second data line, a second drain electrode and a second gate electrode, respectively, the first gate electrode and the second gate electrode in the unit pixel region being extended from the same gate line; a first pixel electrode and a second pixel electrode formed in the unit pixel region; a first drain electrode plate-connected to the first pixel electrode and the first drain electrode-in the unit pixel region; and a second drain electrode plate connected to the second pixel electrode and the second drain electrode in the unit pixel region, wherein entire areas of the first and second drain electrode plates in the unit pixel region are formed between extension portions of the first and second drain electrodes, the extension portions being parallel to the first and second data lines.