Patent ID: 8823538

Claim:
A computer-implemented method for optimizing an order of testing points of a circuit board using an electronic device, the method comprising: establishing a coordinate system for a circuit diagram of the circuit board, and setting at least one locating point in the coordinate system at random, the circuit diagram comprising a plurality of signal path routings; creating a list to save circuit names of the plurality of signal path routings, names of testing points in each of the signal path routings, and coordinates of the testing points; selecting a signal path routing from the list by receiving a selection input of a circuit name of the selected signal path routing, and displaying the testing points in the selected signal path routing on a display device that is electronically connected to the electronic device; calculating a distance between each of the testing points of the selected signal path routing and the at least one locating point, and obtaining a group of distances incorporating the calculated distances; determining a minimum distance from the group of distances, and setting the locating point that consists of the minimum distance as a base point; optimizing an order of the testing points to be tested in the selected signal path routing according to a distance between each of the testing points and the base point; upon the condition that the distance between any testing point and the base point is greater than a preset maximum distance, generating a warning to an operator, and displaying the warning on the display device; and storing the coordinates of the testing point in an abnormality list.