Patent ID: 8222159

Claim:
A manufacturing method of semiconductor device comprising: sequentially laminating a third mask layer, a second mask layer, and a first mask layer on a processed layer; forming a fourth mask layer comprising a line pattern on the first mask layer by photolithography that uses a reticle; processing the first mask layer so as to have a line pattern form corresponding to the line pattern of the fourth mask layer by partially etching the first mask layer using the fourth mask layer as a mask; forming a pair of sidewall layers on both sides in the line-width direction of the first mask layer and subsequently etching and removing the first mask layer; processing the second mask layer so as to have a pair of line pattern forms corresponding to the pair of sidewall layers by partially etching the second mask layer using the pair of sidewall layers as a mask; forming a fifth mask layer having a different etching selectivity from that of the second mask layer, on the third mask layer which is exposed due to the processing of the second mask layer; forming a pair of opening portions which correspond to the pair of line patterns of the second mask layer, in the third mask layer by etching and removing the second mask layer and subsequently partially etching the third mask layer using the fifth mask layer as a mask; and forming a pair of groove portions on the processed layer by partially etching the processed layer using the third mask layer in which the pair of opening portions are formed as a mask.