Patent ID: 7830204

Claim:
A semiconductor integrated circuit device comprising: a plurality of first circuit blocks, each of the plurality of circuit blocks having operating states which include a first state and a second state; a power management block including a memory which stores a maximum chip power value that is referred when the operating state for each of the plurality of circuit block is determined; and a second circuit block to be privileged to access each of the plurality of first circuit blocks and issue a request signal which requests to raise a number of the first circuit blocks in the first state to the power management block, wherein each of the plurality of first circuit blocks in the first state are activated by higher operational frequency than each of the plurality of the first circuit blocks in the second state, and wherein if the power management block receives the request signal from the second circuit block when a power consumption of the semiconductor integrated circuit device is lower than the maximum chip power value, the power management block determines to increase the number of the first blocks in the first state under a condition that the power consumption of the semiconductor integrated circuit device is not to exceed the maximum chip power value.