Patent ID: 7148112

Claim:
A method for manufacturing a semiconductor device, the method comprising the steps of: i) preparing a semiconductor substrate formed with an isolation layer for defining active areas; ii) forming a buffer oxide layer on an entire surface of the semiconductor substrate including the isolation layer; iii) forming a hard mask layer on the buffer oxide layer in such a manner that a predetermined portion of the active area corresponding to a recess channel forming area and a predetermined portion of the buffer oxide layer adjacent to the active area are selectively exposed; iv) etching an exposed portion of the buffer oxide layer by using the hard mask layer as an etching mask, and selectively etching a predetermined portion of the isolation layer formed below the buffer oxide layer corresponding to a depth of a recess channel to be formed; v) etching a substrate active area of an exposed recess channel forming area by using the isolation layer as an etching mask and removing the hard mask layer; vi) removing a remaining buffer oxide layer; vii) sequentially forming a gate oxide layer and a gate conductive layer on a resultant structure; viii) etching the gate conductive layer and the gate oxide layer, thereby forming a gate; and ix) forming a source/drain area in the substrate active area formed at both sides of the gate.