Patent ID: 8431834

Claim:
A method of determining a depth to which a via in a printed circuit board (PCB) has been counterbored, the via intended to carry signals between a first conductive layer and a second conductive layer of the PCB, comprising: fabricating a structure in a third conductive layer of the PCB that couples the via electromagnetically to a first node on the PCB, the structure positioned so that the electromagnetic coupling to the first node will be disrupted if the via is counterbored through the third conductive layer; counterboring the via; and testing for the electromagnetic coupling between the first node and the via; wherein the structure that is fabricated in the third conductive layer of the PCB that couples the via electromagnetically to the first node on the PCB comprises a trace that spans a portion of an anti-pad, and wherein at least a portion of the trace is removed when the via is counterbored through the third conductive layer.