Patent ID: 8041862

Claim:
An apparatus comprising a first serial-to-parallel interface that converts serial data signals received from a data storage host controller to parallel data signals; a second serial-to-parallel interface that presents a serial interface to a serial data storage unit; a data flow control circuit operably connected to the first serial-to-parallel interface and the second serial-to-parallel interface, wherein the data flow control circuit is operative to access parallel data storage interface signals from the first and second serial-to-parallel interfaces; a controller unit, operably connected to the data flow control circuit, and the second serial-to-parallel interface, the controller unit comprising a processor; wherein the controller unit is operable to access executable instructions physically stored in a memory and, when executed, operable to cause the processor to: transmit, responsive to a first data transfer command received from the data storage host controller, control signals to the data flow control circuit; and wherein the data flow control circuit, responsive to control signals provided by the controller unit, is further operative to transfer data received from the first serial-to-parallel interface to the second serial-to-parallel interface without intervention by the controller unit.