Patent ID: 8363175

Claim:
An active matrix substrate comprising: scanning signal lines extending in a row direction; data signal lines extending in a column direction; first transistors and second transistors, each pair of which is provided in a vicinity of corresponding intersections of the scanning signal lines and the data signal lines respectively, the first transistors and the second transistors being connected to the data signal lines corresponding thereto and having gate electrodes which are the scanning signal lines corresponding thereto, and pixel regions, each of the pixel regions including: a first pixel electrode connected to corresponding one of the first transistors; and a second pixel electrode connected to corresponding one of the second transistors, the scanning signal lines each having an opening, a first scanning electrode section, and a second scanning electrode section in the vicinity of each intersection, the first scanning electrode section and a second scanning electrode section being provided on respective adjacent sides to the opening in such a manner that the first scanning electrode section and second scanning electrode section face each other and sandwich therebetween the opening in a column direction, each of the first transistors including (i) a drain electrode provided above the first scanning electrode section corresponding thereto and (ii) two source electrodes provided such that the drain electrode is sandwiched between the two source electrodes, one of the source electrodes being connected to the data signal line corresponding thereto, via a source extension electrode provided above the opening corresponding thereto, and the other one of source electrodes being connected to the data signal line corresponding thereto, via a source extension electrode provided off the scanning signal line corresponding thereto, and each of the second transistors including (i) a drain electrode provided above the second scanning electrode section corresponding thereto and (ii) two source electrodes provided such that the drain electrode is sandwiched between the two source electrodes, one of the source electrodes being connected to the data signal line corresponding thereto, via a source extension electrode provided above the opening corresponding thereto, and the other one of the source electrodes being connected to the data signal line corresponding thereto, via a source extension electrode provided off the scanning signal line corresponding thereto.