Patent ID: 8445351

Claim:
A method of making a floating-gate non-volatile semiconductor memory device, comprising: providing a semiconductor substrate; forming consecutively over the semiconductor substrate a first insulator layer, a first polysilicon layer, a second insulator layer, and a second polysilicon layer; depositing a protective layer directly over the second polysilicon layer; forming a hard mask layer over the protective layer; etching consecutively the hard mask layer, the protective layer, the second polysilicon layer, the second insulator layer, the first polysilicon layer, the first insulator layer, thereby forming openings corresponding, respectively, to a drain and a source, the openings exposing the semiconductor substrate; depositing a first dielectric layer, and etching the first dielectric layer while retaining part of the first dielectric layer filling the opening corresponding to the source; implanting ions at the positions of the openings, thereby forming a P-N junction at the drain; removing the first dielectric layer; forming sidewalls covering sides of the openings corresponding to the drain and the source, respectively; and depositing a metal layer to form a metal-semiconductor junction at the source.