Patent ID: 7432493

Claim:
A solid-state image pick-up device comprising: a plurality of image pick-up pixels arranged in the row and column directions; a pixel signal output element arranged at each image pick-up pixel that outputs, to a corresponding vertical signal line, a pixel signal from each respective image pick-up pixel at each column of a selected row; an amplifier arranged at each vertical signal line which receives pixel signals from the image pick-up pixels of the respective column; a limiter associated with each amplifier, which limits an output of the associated amplifier, and a horizontal line output portion which transfers the pixel signals output by each amplifier, wherein said amplifier comprises: a current source MOS transistor for determining the consumption current; a cascade MOS transistor for suppressing a drain-terminal voltage of said current source MOS transistor; and an auxiliary amplifier unit which detects a drain voltage of said current source MOS transistor and applies the feedback to a gate terminal of said cascade MOS transistor so as to keep the drain voltage constant, and said limiter comprises an MOS transistor in which a source terminal thereof is connected to an output terminal of said amplifier, a drain terminal thereof is connected to the power supply or the ground, and a gate terminal thereof is connected to a gate terminal of said cascade MOS transistor.