Patent ID: 8031096

Claim:
A delta-sigma digital-to-analog converter (DAC), comprising: a first stage including a delta-sigma noise-shaping loop, wherein the first stage is capable of receiving an input signal, the first stage has a first quantizer, the first quantizer has a first quantization error, the delta-sigma noise-shaping loop is configured to suppress an inband noise, and the first stage provides a first stage output; a first DAC, wherein the first DAC receives the first stage output and provides a first analog output; a digital differentiator that provides a digital differentiator output; a second DAC, wherein the second DAC receives the digital differentiator output and provides a second analog output; an adder that adds the first analog output and the second analog output to provide a third analog output; and a second stage that receives the first quantization error, wherein the second stage is configured to provide a second stage output to the digital differentiator so that the first quantization error is cancelled out and the inband noise is suppressed in the third analog output.