Patent ID: 7910981

Claim:
A semiconductor device having a non-volatile memory comprising: a base material; and a stack structure disposed on the base material, the stack structure at least comprising: a tunneling layer; a trapping layer disposed on the tunneling layer; and a dielectric layer disposed on the trapping layer, the dielectric layer having a dielectric constant and being in a second solid state, wherein the dielectric layer is transformed from a first solid state to the second solid state through a process, and the dielectric layer is non-conductive in the first solid state and in the second solid state, wherein the first solid state is an amorphous solid state, and the second solid state is a crystalline solid state and an erase rate of the non-volatile memory changes from a first rate to a second rate when the dielectric layer is transformed from the first solid state to the second solid state, and the second rate is greater than the first rate.