Patent ID: 7386407

Claim:
A method for testing a semiconductor device comprising: determining a relationship between an amount of noise generated in a noise generation circuit and a signal delay of a first delay circuit measured by a first delay measurement circuit in an evaluation semiconductor device (LSI), said noise generation circuit capable of generating a controlled amount of noise controlled from outside of said evaluation LSI, said first delay circuit having a delay time influenced by noise generated by said noise generation circuit; measuring a signal delay of a second delay circuit by using a second delay measurement circuit in a device-under-test (DUT) LSI having a functional circuit upon operation of said functional circuit of said DUT LSI, said second delay circuit having a signal delay influenced by said functional circuit, said DUT LSI and said evaluation LSI being manufactured in a common process condition: and evaluating an amount of noise generated in said DUT LSI based on said relationship determined in said determining step and said signal delay detected by said second delay measurement circuit.