Patent ID: 8471896

Claim:
A signal processing apparatus comprising: a phase matching unit which matches phases of a left image signal and a right image signal input from two cameras which are disposed so as to be matched with an interval between both eyes of a human to image the same object; and a phase adjusting unit which moves in a horizontal direction by a predetermined distance both or any one of a left image and a right image displayed on a display unit by the left image signal and the right image signal by changing the phases of the left image signal and/or the right image signal in the horizontal direction based on displacement amounts of phases designated by an operating unit, and outputs the left image signal and the right image signal obtained by changing disparity between the left image and the right image; wherein the phase matching unit includes a writing address counter which counts a writing address of the left image signal written in a left image memory by a writing unit and a writing address of the right image signal written in a right image memory, an address sampling unit which obtains a reading start address to be used by the reading unit to read the left image signal from the left image memory and a reading start address to be used to read the right image signal from the right image memory, a first adding unit which outputs an added address obtained by adding the reading start address and a fixed delay amount determined based on variable amounts of the phases of the left image signal and the right image signal, and a comparing unit which compares the writing address and the added address and outputs the position of the added address in the writing address as equivalent timing at which the phases of the left image signal and the right image signal are matched with each other, wherein the phase adjusting unit includes a delay amount control unit which controls a reading delay amount for the left image signal read from the left image memory and a reading delay amount for the right image signal read from the right image memory based on the input operation to the operating unit, a second adding unit which adds the reading delay amount and the reading start address to output the control address to control the reading positions for the left image signal read from the left image memory and the right image signal read from the right image memory, and a reading address counter which counts a reading address to be used by the reading unit to read the left image signal from the left image memory and the reading address to be used to read the right image signal from the right image memory.