Patent ID: 8049270

Claim:
A semiconductor device comprising: a first semiconductor layer of a first conductivity type; an epitaxial layer of a first conductivity type formed on a surface of the first semiconductor layer; a base layer of a second conductivity type formed on a surface of the epitaxial layer; a diffusion layer of a first conductivity type selectively formed in the base layer; a trench penetrating the base layer to reach the epitaxial layer; a gate electrode formed in the trench through a gate insulator film formed on an inner wall of the trench; a first main electrode connected to a rear surface of the first semiconductor layer; a second main electrode connected to the diffusion layer and the base layer; a first buried diffusion layer of a second conductivity type formed in the epitaxial layer deeper than the bottom of the gate electrode; and a second buried diffusion layer connecting the first buried diffusion layer and the base layer and having a resistance higher than that of the first buried diffusion layer, the second buried diffusion layer being formed below the base layer and not in contact with the trench, the trench being formed to have a longitudinal direction along a first direction, while the first buried diffusion layer being formed to have a longitudinal direction along the first direction; wherein the second buried diffusion layer has a smaller width than the first buried diffusion layer in a direction along a second direction orthogonal to the first direction.