Patent ID: 7893457

Claim:
A semiconductor device comprising: at least one cell including a base region of a first conductivity type having disposed therein at least one emitter region of a second conductivity type; a first well region of the second conductivity type; a second well region of the first conductivity type; a drift region of the second conductivity type; a collector region of the first conductivity type; a collector contact; wherein each cell is disposed within the first well region and the first well region is disposed within the second well region; and wherein the device further comprises a first gate in communication with the base region so that a MOSFET channel is defined between the at least one emitter region and the first well region, and an embedded region embedded in the first well region such that the embedded region is below the base region and separated from the base region; wherein the device further comprises at least one transistor having the embedded region as a component thereof and is configured such that during operation of the device a depletion region at a junction between the base region and the first well region extends to a junction between the first well region and the second well region, thereby substantially isolating the potential of the first well region from any increase in the potential of the collector contact so that the device can be turned off without having to form a MOSFET channel between the base region and the second well region, the extension of the depletion junction being achieved through punch-through of the at least one transistor having the embedded region as a component thereof.