Patent ID: 7674714

Claim:
A method of fabricating a semiconductor device, comprising: forming an isolation layer defining an active region in a semiconductor substrate; forming a silicon pattern and a sacrificial pattern on the active region, the sacrificial pattern including a semiconductor material different from the silicon pattern; forming an inside spacer on a sidewall of the silicon pattern and a sidewall of the sacrificial pattern; forming a lightly doped drain (LDD) region by implanting first impurity ions into the active region using at least one of the sacrificial pattern, the inside spacer and the isolation layer as a mask for ion implantation; forming a spacer insulating layer on the semiconductor by using a chemical vapor deposition method; anisotropically etching the spacer insulating layer to form an outside spacer; removing the sacrificial pattern to expose a top surface of the silicon pattern; and forming a gate silicide on the silicon pattern.