Patent ID: 8487410

Claim:
A semiconductor component comprising: a semiconductor substrate having a top surface; an opening having an interior surface extending from the top surface into the semiconductor substrate, wherein the opening has a top portion and a bottom portion; a first dielectric liner disposed on the interior surface of the opening, the first dielectric liner having a thickness T 1 on the top portion and a thickness T 2 on the bottom portion, wherein R 1 is a ratio of T 1 to T 2 ; a second dielectric liner disposed on the first dielectric liner, the second dielectric liner having a thickness T 3 on the top portion and a thickness T 4 on the bottom portion, wherein R 2 is a ratio of T 3 to T 4 , and R 1 is greater than R 2 ; a third dielectric liner disposed on the second dielectric liner, the third dielectric liner having a thickness T 5 on the top portion and a thickness T 6 on the bottom portion, wherein T 5 is greater than T 6 ; a metal barrier layer disposed on the third dielectric liner; and a conductive material disposed on the metal barrier layer and filling the opening.