Patent ID: 7414449

Claim:
A circuit, comprising: a first input circuit having an input for receiving a first input signal and having an output; a second input circuit having an input for receiving a second input signal and having an output; an inverting circuit having an input coupled to the outputs of the first and second input circuits; and a feedback circuit having an input coupled to an output of the inverting circuit and an output coupled to the outputs of the first and second input circuits; wherein the feedback circuit comprises: a first transistor having a control terminal coupled to the output of the inverting circuit, a first current electrode coupled to a first power supply terminal, and a second current electrode coupled to the outputs of the first and second input circuits; a first switchable load, coupled between the second current electrode of the first transistor and a second power supply terminal, responsive to the first input signal in a first mode and disabled in a second mode; a second switchable load, in parallel with the first switchable load, responsive to a clock signal in the second mode and disabled in the first; and a second transistor that couples the first and second switchable loads to the second current electrode of the first transistor, the second transistor having a control electrode coupled to the output of the inverting circuit, a first current electrode coupled to the second current electrode of the first transistor, and a second current electrode coupled to the first and second switchable loads.