Patent ID: 8829621

Claim:
A semiconductor substrate for manufacturing transistors having back-gates thereon, comprising: a semiconductor base layer; a first insulating material layer on the semiconductor base layer; a first conductive material layer on the first insulating material layer; a second insulating material layer on the first conductive material layer; a second conductive material layer on the second insulating material layer; an insulating buried layer on the second conductive material layer; a semiconductor layer on the insulating buried layer, a plurality of first isolation structures, the bottom surfaces of the first isolation structures being flushed with the lower surface of the second insulating material layer, and the top surfaces of the first isolation structures being flushed with or slightly higher than the upper surface of the semiconductor layer, wherein at least one first conductive via is provided between the first conductive material layer and the second conductive material layer to penetrate through the second insulating material layer so as to connect the first conductive material layer with the second conductive material layer, the position of each of the first conductive vias being defined by a region in which a corresponding one of a first group of transistors is to be formed; and wherein each of the areas in which transistors having back-gates are to be formed is defined by adjacent first isolation structures.