Patent ID: 8291390

Claim:
A method for testing a first graphical program intended for implementation on a programmable hardware element comprising: storing the first graphical program in a memory, wherein the first graphical program comprises a first plurality of nodes connected by lines, wherein the first plurality of nodes connected by lines visually specify first functionality, wherein the first graphical program is intended for deployment on the programmable hardware element; storing a second graphical program in the memory, wherein the second graphical program comprises a second plurality of nodes connected by lines, wherein the second plurality of nodes connected by lines visually specify testing functionality for the first graphical program, wherein the second graphical program is executable by a processor of a host computer to simulate input to the first graphical program as though it were deployed on the programmable hardware element; and executing, on the processor of the host computer, the first graphical program and the second graphical program to test the first functionality as though deployed on the programmable hardware element.