Patent ID: 7249271

Claim:
A host-side data transfer control device which performs data transfer with a target-side data transfer control device, the host-side data transfer control device comprising: an OUT-transfer transmitter circuit which is connected with an OUT-transfer receiver circuit of the target-side data transfer control device through an OUT-transfer serial signal line, and transmits OUT data by driving the OUT-transfer serial signal line; a clock-transfer transmitter circuit which is connected with a clock-transfer receiver circuit of the target-side data transfer control device through a clock-transfer serial signal line, and transmits a clock signal, which is used to sample the OUT data and is used to generate a system clock signal of the target-side data transfer control device, by driving the clock-transfer serial signal line; and a power-down setting circuit for setting a power-down mode which includes a first power-down mode and a second power down mode, wherein, in the first power-down mode, the power-down setting circuit sets the OUT-transfer transmitter circuit to the power-down mode and sets the clock-transfer transmitter circuit to the power-down mode to stop the system clock signal of the target-side data transfer control device, and, in the second power-down mode, the power-down setting circuit sets the OUT-transfer transmitter circuit to the power-down mode without setting the clock-transfer transmitter circuit to the power-down mode.