Patent ID: 7096448

Claim:
A method of routing sets of routable elements in a region of an integrated-circuit (“IC”) layout, the method comprising: a) using a first set of lines to partition the IC region into a plurality of sub-regions; b) defining at least one particular route for each particular routable elements, wherein each particular route for each particular set traverses the set of sub-regions that contain the set of routable elements; c) using a second set of lines to measure congestion of routes within the IC region, wherein at least a plurality of the lines in the second set are different from the lines in the first set, wherein the second set of lines includes intersecting diagonal lines that form a diagonal grid, wherein the first set of lines includes intersecting horizontal and vertical lines that form a first rectilinear grid, wherein the diagonal lines intersect at a center of the sub-regions created by the first set of lines.