Patent ID: 7176743

Claim:
A driver circuit comprising: a first output element comprising at least N transistors connected in parallel; a second output element comprising at least N transistors connected in parallel; a third output element coupled to the first output element and comprising at least N transistors connected in parallel; a fourth output element coupled to the second output element and comprising at least N transistors connected in parallel; a first drive chain coupled to the first and second output elements and configured to generate output signals for controlling switching of the transistors of the first and second output elements, the first drive chain comprising N delay elements, the delay elements of the first drive chain being cascaded to form a series of delay elements, each of the delay elements producing a time delay equal to t DELAY , the entire cascaded series of delay elements of the first drive chain producing an aggregate time delay equal to at least (N×t DELAY ); a second drive chain coupled to the third and fourth output elements and configured to generate output signals for controlling switching of the transistors of the third and fourth output elements, the second drive chain comprising N+1 delay elements cascaded to form a series of delay elements, N of the delay elements of the second drive chain each producing a time delay equal to t DELAY and a first one of the delay elements of the second drive chain producing a time delay equal to ½(t DELAY ), the entire cascaded series of delay elements of the second drive chain producing an aggregate time delay equal to at least ((N×t DELAY )+(½t DELAY )), and a pair of output terminals coupled between the first, second, third and fourth output elements and configured in such a way that a voltage differential is produced between the pair of output terminals, wherein the first drive chain controls the switching of the transistors of the first and second output elements and the second drive chain controls the switching of the transistors of the third and fourth output elements in such a way that the voltage differential between the pair of output terminals transitions from a first state to a second state in a plurality of transition steps, wherein the time delay produced by the first one of the delay elements of the second drive chain causes smoothing of the plurality of transition steps during the transition from the first state to the second state.