Patent ID: 8411719

Claim:
An optoelectronic (OE) assembly for a semiconductor or computer chip, comprising: a silicon layer including a wiring layer, the silicon layer defining at least one optical via for allowing light to pass therethrough; an optical coupling layer bonded to the silicon layer, the optical coupling layer including a plurality of microlenses for focusing and or collimating the light through the optical via; a plurality of first OE elements coupled to the silicon layer and electrically communicating with the wiring layer, the first OE elements positioned in optical alignment with the optical via for receiving the light, the first OE elements being attached beneath the silicon layer and electrically communicating with the wiring, and the first OE elements being positioned in optical alignment with the optical via for receiving the light; a second OE element embedded within the wiring layer; a spacer electrically connecting the first OE elements to a PCB, the spacer including conductive wiring, the spacer electrically communicating with a plurality of wiring layer interconnect elements for attaching the assembly to the spacer, and the spacer electrically communicating with the wiring layer, the spacer being interposed between a plurality of electrical interconnect elements connected to a circuit board, and the plurality of wiring layer interconnection elements, and the first OE elements being embedded in the spacer for housing the first OE elements; and a thermal heat spreader positioned above one or more said first OE elements and the spacer, and in thermal contact with the first OE elements and the spacer.