Patent ID: 8530931

Claim:
A semiconductor device comprising: a laterally diffused metal oxide semiconductor (LDMOS) transistor; and an electrostatic discharge (ESD) protection element, wherein the LDMOS transistor comprises: a first gate electrode formed on the semiconductor substrate with an insulating film interposed therebetween; a first body region formed by implanting impurities of a first conductivity type into the semiconductor substrate and disposed at one edge side of the first gate electrode; a first source region of a second conductivity type disposed in an upper portion of the first body region; a first element isolation film formed in an upper portion of the semiconductor substrate and disposed to overlap the first gate electrode; a first drain region formed inside the semiconductor substrate, including impurities of the second conductivity type, and disposed at a position in contact with an edge portion of the first element isolation film and away from the first gate electrode; and a first drift region formed inside the semiconductor substrate, including impurities of the second conductivity type, and being in contact with the first body region and the first drain region, and the ESD protection element comprises: a second gate electrode formed on the semiconductor substrate with an insulating film interposed therebetween; a second body region formed inside the semiconductor substrate, including impurities of the first conductivity type, and disposed at one edge side of the second gate electrode; a second source region of the second conductivity type disposed in an upper portion of the second body region; a second element isolation film formed in an upper portion of the semiconductor substrate and disposed to overlap the second gate electrode; an anode region formed inside the semiconductor substrate, including impurities of the first conductivity type, and disposed at a position in contact with an edge portion of the second element isolation film and away from the second gate electrode; a third element isolation film formed in an upper portion of the semiconductor substrate and disposed adjacent to the anode region; a second drain region formed inside the semiconductor substrate, including impurities of the second conductivity type, and being in contact with the third element isolation film; and a second drift region formed inside the semiconductor substrate, including impurities of the second conductivity type, and being in contact with the second body region, the anode region and the second drain region, wherein the semiconductor device has relationships of A 1 ≧A 2 and B 1 <B 2 where A 1 denotes an overlap length of the first gate electrode and the first element isolation film; A 2 denotes an overlap length of the second gate electrode and the second element isolation film; B 1 denotes a distance between the first gate electrode and the first drain region; and B 2 denotes a distance between the second gate electrode and the anode region.