Patent ID: 7308536

Claim:
A data processing system comprising: a processor unit; a cache; means for coupling said cache to said processor unit to effectuate data transfer; means for determining an order in which to transmit said data from a cache line of said cache, wherein said determining means further includes: means for receiving at said cache a preference of ordering for a read address/request from said processor, said receiving means includes means for accepting a hierarchical sequence of preference of ordering bits from said processor; means for evaluating said preference of ordering; and means for comparing said preference of ordering with a cache order preference, wherein said comparing means evaluates said hierarchical sequence to determine if a highest preference may be honored, wherein if said highest preference cannot be honored, a next highest preference is evaluated; and means for issuing to said coupling means a selected order bit ahead of said data, wherein said selected order bit alerts said processor unit of said order and said data is transmitted in said order.