Patent ID: 7611934

Claim:
A semiconductor device, comprising: (a) a semiconductor layer formed on an electrically insulating layer; (b) a gate insulating film formed on said semiconductor layer; (c) a gate electrode formed on said gate insulating film; and (d) a field insulating film formed on said semiconductor layer for defining a region in which a semiconductor device is to be fabricated, said semiconductor layer including: (a1) source and drain regions formed in said semiconductor layer around said gate electrode, said source and drain regions containing first electrically conductive type impurity; (a2) a body contact region formed in said semiconductor layer, said body contact region containing second electrically conductive type impurity; and (a3) a carrier path region formed in said semiconductor layer such that said carrier path region does not make contact with said source and drain regions, but makes contact with said body contact region, said carrier path region containing second electrically conductive type impurity, wherein said semiconductor layer has a first region in which said source and drain regions are formed, a second region in which said carrier path region is formed, and a third region in which said body contact region is formed, and wherein said gate electrode is comprised of a first portion which is in the level with said field insulating film in a predetermined allowable error range, and a second portion formed on said first portion such that said second portion extends towards and above said second region.