Patent ID: 7763498

Claim:
A method for manufacturing a stack package, comprising the steps of: providing a molded reconfigured wafer having a plurality of semiconductor chips arranged side by side, each of which having a plurality of bonding pads on a upper surface thereof, and a molding part surrounding side and lower surfaces of each semiconductor chip; defining grooves in the molding part adjacent to the bonding pads of each semiconductor chip; forming through-electrodes in the grooves and forming re-distribution lines which connect the through-electrodes and the adjacent bonding pads to each other; removing a portion of the lower surface of the molded reconfigured wafer so as to expose the lower surfaces of the through-electrodes so as to form a plurality of package units in the molded reconfigured wafer; stacking at least two molded reconfigured wafers, wherein the package units from each of the stacked wafers are stacked such that corresponding through-electrodes are connected with each other; and sawing the stacked package units of the stacked molded reconfigured wafers into a chip level.