Patent ID: 6936923

Claim:
A conductive bump overlying a layer of Under Bump Metallization (UBM), comprising: a semiconductor surface including integrated circuitry therein, at least one layer of passivation deposited over said semiconductor surface; access to said integrated circuitry for external contact by at least one via extending through said at least one layer of passivation, said at least one via being aligned with at least one contact pad; layer of UBM metal over said at least one layer of passivation, said layer of UBM metal extending into said at least one via to make electrical contact with said at least one contact pad; a first surface of said layer of UBM that is aligned with said at least one via having a first radius; said layer of UBM and the at least one layer of passivation having been removed where this layer of UBM and the at least one layer of passivation do not belong to said first surface of said layer of UBM, thereby having created a patterned layer of UBM and at least one patterned layer of passivation having essentially vertical sidewalls aligned with said at least one via; a second surface of said layer of UBM that is aligned with said at least one via having a second radius, said second radius being smaller than said first radius, said second surface of said layer of UBM being essentially concentric with said first surface of said layer of UBM; a patterned layer of copper followed by a patterned layer of nickel over said second surface of said layer of UBM, said patterned layer of copper and said patterned layer of nickel having essentially vertical sidewalls; a layer of solder compound or its alloy overlying said patterned layer of nickel; reflow having been applied to said layer of solder or its alloys, forming the solder bump.