Patent ID: 8354305

Claim:
A method of manufacturing a TFT LCD array substrate, comprising the steps of: 1) depositing in sequence a gate metal layer, a gate insulating dielectric layer and a semiconductor layer on a substrate, then performing masking and etching by a gray tone mask to form a gate line, a gate electrode connected with the gate line, a gate insulating layer, and a semiconductor layer for a thin film transistor, wherein the semiconductor layer and the gate insulating layer have a width less than that of the gate electrode so that each side of the gate electrode is exposed by the semiconductor layer and the gate insulating layer; 2) depositing an isolating dielectric layer on the resultant substrate after step 1, then performing masking and etching processes with respect to the isolating dielectric layer to form via holes in the isolating dielectric layer on both sides of the semiconductor layer; 3) forming an ohmic contact layer in the via holes obtained in the step 2; and 4) depositing a pixel electrode layer and a source/drain electrode metal layer on the resultant substrate after the step 3, then performing masking and etching with a gray tone mask to form a transparent pixel electrode, a source electrode, a drain electrode and a data line, wherein the drain electrode is integrated with the data line.