Patent ID: 7692211

Claim:
A gate turn-off thyristor device comprising: a lower portion having at least one lower base region of a first conductivity type and at least one lower emitter region of a second conductivity type; an upper portion situated above said lower portion, said upper portion having a plurality of upper base regions of the second conductivity type and a plurality of upper emitter regions of the first conductivity type, wherein the plurality of upper base regions each forms one of a plurality of first conductive contacts and the plurality of upper emitter regions each forms one of a plurality of second conductive contact, the first conductive contacts alternating with the second conductive contacts and forming a top upper surface of the upper portion, wherein the top upper surface is a planar surface, wherein each of said plurality of first conductive contacts and each of said plurality of second conductive contacts are parallel to each other from a plan view; an intermediate layer having first regions of a first metal alternating with second regions of a second metal and non-conductivity regions between the first regions and the second regions, the first regions of said intermediate layer directly connected to the first conductive contacts, and the second regions of said intermediate layer directly connected to the second conductive contacts; a dielectric layer formed over said intermediate layer, the dielectric layer having openings; and, first and second metal stripes formed over said dielectric layer to traverse the first and second regions of said intermediate layer, said first metal stripes directly contacting the first regions of said intermediate layer through the openings in said dielectric layer and said second metal stripes directly contacting the second regions of said intermediate layer through the openings in said dielectric layer, wherein said lower portion and said upper portion form said gate turn-off thyristor device.