Patent ID: 7429774

Claim:
An electrostatic discharge (ESD) protection MOS device, comprising: a silicon substrate of first conductivity type; a first ion well of said first conductivity type disposed in said silicon substrate; a second ion well of a said second conductivity type disposed in said silicon substrate, said second ion well encompassing said first ion well and laterally isolating said first ion well; a first isolation structure consisting of a gate insulating layer and a field oxide layer, wherein said first isolation structure is formed on said silicon substrate between said first and second ion wells; a gate laid over said gate insulating layer and field oxide layer; a second isolation structure spaced apart from said first isolation structure, said second isolation structure being formed on said second ion well; a field ion well of said first conductivity type adjacent to said second ion well, wherein said field ion well is located directly under said second isolation structure, and said first ion well, said second ion well and said field ion well are disposed in the substrate at substantially the same depth; a buried layer of said second conductivity type formed in said silicon substrate and disposed under said field oxide layer, wherein said buried layer of said second conductivity type directly touches said first ion well of said first conductivity type; a source doping region of said second conductivity type disposed in said first ion well between said gate insulating layer and said second isolation structure; and a drain doping region of said second conductivity type disposed in said second ion well between said field oxide layer and said second isolation structure.