Patent ID: 8854403

Claim:
A system that facilitates forming a latent image on a photoreceptor, comprising: a thin-film transistor (TFT) array comprising a plurality of TFTs located above and coupled to a ground plane; and a charge acceptance layer deposited over the TFT array; wherein each TFT corresponds to a pixel of the charge acceptance layer; wherein the charge acceptance layer is charged with negative ions; wherein the TFTs have a gate-to-source voltage (Vgs) configured to be adjusted to reduce a surface voltage of respective pixels coupled to the respective TFTs to form a latent image; wherein the gate-to-source voltage (Vgs) is applied to a gate electrode of respective TFTs by addressing the gate electrode from the inner side of the TFT; and wherein one or more pixels is discharged to form a latent image on the charge acceptance layer, without a light source, by adjusting the gate-to-source voltage (Vgs) of one or more TFTs corresponding to the one or more pixels such that Vgs is greater than a predetermined threshold voltage (Vth), and wherein the TFTs are configured to withstand a range of approximately 200V to 800V, while operating at the predetermined threshold voltage, by spacing a drain and a source of the TFTs so as to attenuate the applied gate-to-source voltage (Vgs) down to the predetermined threshold voltage (Vth).