Patent ID: 7169656

Claim:
A method of manufacturing a semiconductor device comprising: forming a conductive layer over a first semiconductor region and a second semiconductor region; forming a photoresist pattern over the conductive layer by performing a light exposure using a mask; patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a second gate electrode over the second semiconductor region by using the photoresist pattern; forming at least a first source region, a first drain region, a lightly doped region, and a first channel region in the first semiconductor region, said lightly doped region having a smaller impurity concentration than said first source region and said first drain region, and being located between the first channel region and at least one of the first source region and the first drain region; and forming at least a second source region, a second drain region and a second channel region in the second semiconductor region, the second channel region being contiguous with the second source region and the second drain region, wherein said mask comprises at least a first pattern for the first gate electrode and a second pattern for the second gate electrode, with the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light.