Patent ID: 7459358

Claim:
A method for fabricating a semiconductor device comprising: (a) forming a device isolation structure in a semiconductor substrate to define an active region having a pad insulating film; (b) etching the pad insulating film to expose the semiconductor substrate; (c) etching a predetermined thickness of the exposed semiconductor substrate using an island shaped recess gate mask to form a first recess and a second recess, wherein a Fin channel region is formed at a lower part of the second recess, the etching of the predetermined thickness comprising: (c-1) forming a first insulating film over the exposed semiconductor substrate and a first hard mask layer over the first insulating film and the device isolation structure; (c-2) etching a predetermined region of the first hard mask layer, the first insulating film, the semiconductor substrate and the device isolation structure using the island shaped recess gate mask to form the first recess defining a recess channel region; (c-3) removing the first hard mask layer; (c-4) forming a spacer on a sidewall of the first recess; (c-5) isotropically etching the semiconductor substrate exposed at the lower part of the first recess to form the second recess; (c-6) isotropically etching the device isolation structure exposed at the lower part of the second recess in a longitudinal direction of the gate region to form a Fin channel region; and (c-7) removing the spacer and the first insulating film to expose the semiconductor substrate; (d) forming a gate insulating film over the active region including the Fin channel region, the first recess, and the second recess; (e) forming a gate conductive layer filling up the Fin channel region, the first recess, and the second recess; (f) forming a gate hard mask layer over the gate conductive layer; and (g) patterning the gate hard mask layer and the gate conductive layer using a gate mask as an etching mask to form a gate structure.