Patent ID: 8828861

Claim:
A method for fabricating conductive lines of a semiconductor device, comprising: depositing a conductive material over a substrate to provide a conductive layer; depositing a first barrier layer on the conductive layer, the first barrier layer including Ti or TiN; patterning a mask on the first barrier layer, the pattern comprising a layout of the conductive lines; etching the conductive material and the first barrier layer using the patterned mask to form the conductive lines; forming a conductive barrier layer directly on the patterned first barrier layer and over and between the conductive lines, the conductive barrier layer including an ionized metal plasma formed Ti or a metal-organic chemical vapor deposition formed TiN; etching to remove portions of the conductive barrier layer between the conductive lines, thereby leaving portions of the conductive barrier layer on the top and sidewall portions of each of the conductive lines; and depositing a dielectric material over and between the patterned conductive lines.