Patent ID: 8421509

Claim:
A charge pump circuit comprising: a first comparator having a first input end, a second input end, and an output end coupled to the second input end of the first comparator; a PMOS tuner having a source coupled to a voltage source, and a gate for receiving a first bias voltage; a first current mirror comprising: a source PMOS transistor having a source coupled to the voltage source, and a gate coupled to a drain of the source PMOS transistor; and a first output PMOS transistor having a gate coupled to the gate of the source PMOS transistor, and a drain coupled to the first input of the first comparator; a first NMOS transistor having a drain coupled to the gate of the first output PMOS transistor, a gate coupled to the output end of the first comparator, and a source coupled to ground; a first PMOS switch having a drain coupled to the source of the first output PMOS transistor, a source coupled to a drain of the PMOS tuner, and a gate for receiving a first control signal; an NMOS tuner having a source coupled to ground, and a gate for receiving a second bias voltage; a second current mirror comprising: a source NMOS transistor having a source coupled to ground, and a gate coupled to a drain of the source NMOS transistor; and a first output NMOS transistor having a gate coupled to the gate of the source NMOS transistor, and a drain coupled to the first input of the first comparator; a first PMOS transistor having a drain coupled to the gate of the first output NMOS transistor, a gate coupled to the output end of the first comparator, and a source coupled to the voltage source; and a first NMOS switch having a drain coupled to the source of the first output NMOS transistor, a source coupled to the drain of the NMOS tuner, and a gate for receiving a second control signal.