Patent ID: 7523296

Claim:
A method for handling an exception in a superscalar microprocessor configured to execute a group of instructions, the group of instructions having a predefined program order, the method comprising: (a) executing a subset of instructions from the group of instructions in an out-of-order fashion with respect to the program order; (b) storing each result generated in step (a) in a static location in a buffer, wherein the location of the instruction for which the result was generated determines the static location; (c) detecting an exception; and (d) responsive to detecting the exception: (i) suspending out-of-order execution, (ii) retiring each result stored in step (b) that is the result of an instruction that precedes the instruction that caused the exception in the program order, wherein retiring a result comprises associating the result with a corresponding location in an array, wherein the array includes a plurality of locations referenced to provide execution results of instructions that have been retired, and (iii) resuming out-of-order execution, wherein resuming out-of-order execution comprises overwriting non-retired results stored in the buffer.