Patent ID: 8502370

Claim:
A stack package structure, comprising: a first substrate having a first surface with a die attach area and a peripheral area defined thereon and a second surface opposite to the first surface, wherein the die attach area has a plurality of die attach pads, and the peripheral area has a plurality of first conductive pads; a first insulating layer formed on the first surface of the first substrate and having a plurality of openings for exposing the die attach pads and the first conductive pads; a plurality of first conductive terminals and a plurality of second conductive terminals disposed on the first insulating layer and electrically connected to the die attach pads and the first conductive pads; a dielectric layer formed on the first insulating layer, the dielectric layer having a cavity corresponding in position to the die attach area to expose the first conductive terminals and a plurality of openings for exposing the second conductive terminals; a plurality of first copper pillars disposed on the second conductive terminals in the openings of the dielectric layer; a first semiconductor chip disposed in the cavity of the dielectric layer and electrically connected to the first conductive terminals; a plurality of first solder balls formed on the first copper pillars that are located proximately to the die attach area; and a first package structure disposed on and electrically connected to the first solder balls.