Patent ID: 8782327

Claim:
A method of managing memory operations in non-volatile solid-state memory, the method comprising: processing an internal command comprising a read data portion from a first physical page address and a write data portion to a second physical page address; executing the read data portion of the internal command; before executing the write data portion of the internal command, processing a write command from a host system for writing data to a logical address in the non-volatile solid-state memory, said processing comprising: locating, in a mapping table, a physical page address that corresponds to the logical address, the physical page address comprising the first physical page address; executing the write command to write data to a third physical page address; updating the physical page address in the mapping table with the third physical address; and updating an invalid page table with information related to the first physical page address; and cancelling the write data portion of the internal command if an entry in the invalid page table indicates that data at the first physical page address is invalid.