Patent ID: 7524722

Claim:
A method for operating a resistance type memory comprising a plurality of resistance type memory devices, each of the resistance type memory devices being disposed on a substrate and comprising a tungsten electrode, an upper electrode disposed on the tungsten electrode, and a tungsten oxide layer sandwiched between the tungsten electrode and the upper electrode, comprising: applying a pulse voltage to each of the tungsten oxide layers so as to adjust a resistivity thereof, wherein each of the resistivities of each of the tungsten oxide layers refers to a first resistivity when no pulse voltage is applied to any of the tungsten oxide layers, and each of the resistance type memory devices is in a first storage state; each of the resistance type memory devices is programmed to be in a second storage state when each of the resistivities is adjusted to be a second resistivity; each of the resistance type memory devices is programmed to be in a third storage state when each of the resistivities is adjusted to a third resistivity; and each of the resistance type memory devices is programmed to be in a fourth storage state when each of the resistivities is adjusted to be a fourth resistivity, wherein the second resistivity is greater than the first resistivity, the first resistivity is greater than the third resistivity, and the third resistivity is greater than the fourth resistivity.