Patent ID: 7802133

Claim:
A method of operating a multiple-chip memory device having a volatile memory element, comprising: powering up the multiple-chip memory device; reading initial repair information from a non-volatile memory in the multiple-chip memory device, the initial repair information, identifying one or more errors in a volatile memory element in the multiple-chip memory device; decoding the initial repair information to generate volatile repair information; storing the volatile repair information in a volatile repair information storage element; receiving logical address information identifying a logical memory location in a volatile memory element after storing the volatile repair information; reading the volatile repair information from the volatile repair information storage element; generating physical address information identifying a physical memory location in the volatile memory element based on the logical address information and the volatile repair information; wherein the volatile memory element repair information includes a plurality of repair items, each repair item including: one or more control bits indicating operations parameters of an identified error, and a plurality of address bits identifying one a row in the volatile memory element and a column in the volatile memory element.