Patent ID: 7880651

Claim:
A sample and hold circuit comprising: first and second capacitance elements, each of the first and second capacitance elements having first and second terminals, at least one of the first terminals of the first and second capacitance elements being supplied with a voltage to be sampled, the second terminals of the first and second capacitance elements being coupled together and connected to a node supplied with a reference voltage; a first switch connected between respective ones of the first terminals of the first and second capacitance elements; and a differential circuit, wherein the differential circuit includes: a differential input stage having first and second inputs, the second input of the differential input stage being connected to the first terminal of the second capacitance element; a second switch connected between the first input of the differential input stage and the first terminal of the first capacitance element; an amplifier stage having an input at which an output signal of the differential input stage is received, the amplifier stage having an output connected to an output terminal of the sample and hold circuit; and a third switch connected between the first input of the differential input stage and the output of the amplifier stage.