Patent ID: 7015538

Claim:
A method for manufacturing non-volatile memory, comprising the steps of: forming a first insulating layer on a first electroconductive semiconductor substrate; forming a first electroconductive film on said first insulating film; forming an etching stopper film on said first electroconductive film; forming a spacer film on said etching stopper film; selectively removing said spacer film by etching to said etching stopper film, so as to form an opening; removing said etching stopper film in said opening; forming a bowl-shaped recess in said first electroconductive film within said opening; forming a side wall insulating film on the side face of said opening; removing said first electroconductive film and said first insulating film within said opening; implanting impurities of a second electroconductivity type on the surface of said semiconductor substrate within said opening, thereby forming one of a source and drain; forming a second insulating film so as to cover the exposed face of said first electroconductive film within said opening; forming a plug by filling the inside of said opening with an electroconductive film; removing said spacer film; forming a floating gate of said first electroconductive film at the region directly below said side wall insulating film, by selectively etching away said first electroconductive film with said side wall insulating film as a mask; forming a third insulating film so as to cover the exposed face of said floating gate; forming a control gate on the side of said plug by forming an electroconductive film on said side wall insulating film; and forming the other of the source and drain by selectively implanting impurities of a second electroconductivity type on the surface of said semiconductor substrate, with said plug, said side wall insulating film, said floating gate, and said control gate, as masks.