Patent ID: 7579671

Claim:
A semiconductor device comprising: a semiconductor die comprising a first surface and a second surface, a via hole being formed in the semiconductor die between the first and second surfaces; a pad electrode disposed on the first surface of the semiconductor die and covering one end of the via hole; a first insulation layer formed on the second surface of the semiconductor die; a wiring layer formed on the first insulation layer and electrically connected with the pad electrode through the via hole, the wiring layer at least partially filling the via hole; a protection layer covering the wiring layer; and a conductive terminal formed on a portion of the wiring layer away from the via hole and electrically connected with the wiring layer through a hole formed in the protection layer, wherein the wiring layer does not extend to a lateral edge of the semiconductor die so as to expose the first insulation layer at the lateral edge, the protection layer does not extend to the lateral edge of the semiconductor die so as to expose the first insulation layer on the second surface of the semiconductor die, and the first insulation layer electrically insulates the wiring layer from the second surface of the semiconductor die.