Patent ID: 6939766

Claim:
A method for fabricating a flash memory device comprising: fabricating a gate structure comprising a tunnel oxide layer, a floating gate layer, an oxide layer, and a control gate layer on a semiconductor substrate, wherein said fabricating comprises an etch process, and wherein said etch process results damage to said tunnel oxide layer; creating a first impurity concentration in said semiconductor substrate prior to said repairing; creating a second impurity concentration in said semiconductor substrate prior to said repairing; and repairing damage resulting from said etch process to said tunnel oxide layer prior to creating said first impurity concentration and creating said second impurity concentration wherein said repairing said tunnel oxide layer is accomplished using a rapid thermal oxidation (RTO) process, and wherein repairing said tunnel oxide layer prior to creating said first and second impurity concentrations prevents a dopant diffusion from said first and second concentration into a channel region due to said repairing.