Patent ID: 8178395

Claim:
A method of making a semiconductor chip assembly, comprising: providing a post, a base, a support layer, an underlayer, a conductive layer and an adhesive, wherein the post is adjacent to the base, extends above the base in an upward direction, extends into an opening in the adhesive and is aligned with an aperture in the conductive layer, the base extends below the post in a downward direction opposite the upward direction, extends laterally from the post in lateral directions orthogonal to the upward and downward directions and is sandwiched between the adhesive and the support layer, the conductive layer is mounted on and extends above the adhesive, the adhesive is sandwiched between the base and the conductive layer and is non-solidified, the support layer is sandwiched between the base and the underlayer, and the underlayer extends below the support layer; then flowing the adhesive into and upward in a gap located in the aperture between the post and the conductive layer; solidifying the adhesive; then providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer; providing a thermal via that extends from the base through the support layer to the underlayer and provides a thermally conductive path between the base and the underlayer; providing a heat spreader that includes the post, the base, the underlayer and the thermal via; then mounting a semiconductor device on the post, wherein the semiconductor device overlaps the post, the base, the support layer and the underlayer and the underlayer covers the post in the downward direction; electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the underlayer.