Patent ID: 8338265

Claim:
A method of manufacturing a semiconductor structure, comprising: forming a buried conductive layer in a semiconductor substrate; forming a dielectric layer on a top surface of said semiconductor substrate; lithographically patterning and etching a portion of said dielectric layer over said buried conductive layer; removing said dielectric layer; after removing said dielectric layer, forming a contact trench that extends from a top surface of said semiconductor substrate onto said buried conductive layer, wherein a bottommost surface of said contact trench is a horizontal surface of a remaining portion of said buried conductive layer; and forming a contiguous silicide structure including a trench contact silicide and at least one metal silicide region during the same processing steps, wherein said trench contact silicide contacts said buried conductive layer, extends from said top surface of said semiconductor substrate to, and not below, a depth between a topmost surface of said buried conductive layer and a bottommost surface of said buried conductive layer within said semiconductor substrate, and has substantially the same composition as said at least one metal silicide region, wherein an entirety of surfaces of said contiguous silicide structure in contact with any semiconductor material contacts semiconductor materials having a doping of a same conductivity type.