Patent ID: 8058694

Claim:
A semiconductor device comprising a plurality of unit cells formed on a semiconductor substrate, each of the unit cells including: a ring-shaped gate electrode; a first diffusion region formed in a region inside of the ring-shaped gate electrode and serving as a drain region or a source region; a second diffusion region formed in a region outside of the ring-shaped gate electrode and serving as a source region or a drain region; an isolation region surrounding an active region formed by the first diffusion region and the second diffusion region when viewed in plan; a gate contact pad portion provided on the isolation region; and a gate drawing wire for connecting together the ring-shaped gate electrode and the gate contact pad portion, the ring-shaped gate electrode including a portion disposed on the active region and a portion disposed on a non-active region, the gate drawing wire being connected to the ring-shaped gate electrode by the portion disposed on the non-active region, and all of the gate drawing wire being arranged on the isolation region.