Patent ID: 6855954

Claim:
A bottom gate type thin film transistor comprising: a gate electrode formed on a substrate; a gate insulating film formed on the gate electrode; an operational semiconductor film formed on the gate insulating film on the gate electrode; a channel protection film formed on the operational semiconductor film; a source electrode and a drain electrode formed, respectively, on each side of a top surface of the channel protection film and being connected to the operational semiconductor film; and the channel protection film including a first insulating layer that contacts an upper surface of the operational semiconductor film, and a second insulating layer formed on the first insulating layer; wherein a dielectric constant of the second insulating layer is less than or equal to the dielectric constant of the first insulating layer; a thickness of the first insulating layer is within the range of approximately 100-300 nm, and a thickness of the second insulating layer is greater than or equal to the thickness of the first insulating layer; and a width of the second insulating layer is less than a width of said first insulating layer, such that light doping drain (LDD) areas can be formed on the operational semiconductor film.