Patent ID: 8031189

Claim:
An apparatus comprising a data driver circuit, wherein: the data driver circuit is configured to receive a first data signal and a first clock signal; the data driver circuit is configured to output a second data signal to be transmitted to a display panel; the data driver circuit comprises a data driver configured to sample the first data signal according to a second clock signal, obtain the second data signal by analog-converting the first data signal, and output the second data signal; the data driver circuit comprises a mask signal generator configured to generate a mask signal, wherein the mask signal indicates presence within a predetermined time period measured from when the second data signal begins to change; the data driver circuit comprises a delay-locked loop (DLL) configured to generate the second clock signal from the first clock signal; and there is a delay between the first clock signal and the second clock signals, the delay changes due to a phase difference between the first clock signal and the second clock signal, and the changes in the delay due to the phase difference is substantially prevented by the mask signal.