Patent ID: 7625813

Claim:
A method of fabricating a recess channel in a semiconductor device, comprising: forming a hard mask pattern over a substrate; etching the substrate using the hard mask pattern to form first recesses; forming an insulation layer over the hard mask pattern and the first recesses; etching the insulation layer to form spacers on sidewalls of the first recesses and on sidewalls of the hard mask pattern; etching the substrate below the first recesses to form second recesses using a sulfur fluoride containing gas mixture by using the spacers and the hard mask pattern as an etch barrier; and removing the hard mask pattern and the spacers, wherein etching the substrate below the first recesses further comprises performing a post treatment using a mixed gas including tetrafluoromethane (CF 4 )/O 2/ nitrogen trifluoride (NF 3 ) /helium (He)/argon (Ar).