Patent ID: 8495402

Claim:
A method for predictively limiting power consumption of a non-volatile memory (NVM), the NVM operative to perform NVM operations, each of which includes a buffering part and a programming part, the buffering requiring time, Tbuff, to be fully performed, and the programming part requiring time, Tprog, to be fully performed, the method comprising: receiving a current threshold; determining a maximum number of concurrent NVM operations that can be performed based on the current threshold; assigning predictive timing parameters for each NVM operation, the predictive timing parameter including a predictive time parameter, Tbuff(p), for the buffering part of a NVM operation to be fully performed, wherein Tbuff(p) is greater than Tprog; receiving an overlimit of queued concurrent NVM operations, the concurrent operation of which would have a cumulative current consumption that exceeds the current threshold; determining how many of the queued NVM operations can be dispatched as a subsequent set of dispatched NVM operations such that the number of concurrent NVM operations does not exceed the maximum number; appending the Tbuff(p) of each NVM operation in the subsequent set to an end of the Tbuff(p) of a prior dispatched NVM operation; and performing the programming part of the prior dispatched NVM operation during the Tbuff(p) of the subsequent set.