Patent ID: 6842714

Claim:
A method for determining total leakage power for an integrated circuit (IC) having a plurality of circuit macros, comprising the steps of: a) estimating a present total macro power for each of said plurality of circuit macros; b) calculating a macro temperature for each of said plurality of circuit macros in response to said present total macro power using a multi-dimensional thermal model for a thermal structure for removing heat from said IC; c) calculating a macro voltage for each of said plurality of circuit macros in response to a current drawn by each of said macros using a multi-dimensional electrical model for a power distribution structure for delivering power from a power supply to said IC, wherein a value of said current is set as a function of said total macro power; d) calculating a present leakage power for each of said circuit macros in response to a corresponding macro temperature and macro voltage; e) calculating a present dynamic power for each of said plurality of said circuit macros in response to a corresponding macro temperature and macro voltage; f) calculating said present total macro power for each of said plurality of circuit macros in response to said present leakage power and said present dynamic power; and g) repeating steps b) through f) if said present leakage power has not converged to a final leakage power and stopping if said present leakage power has converged to said final leakage power for each of said plurality of circuit macros.