Patent ID: 7346881

Claim:
A computer-implemented method for generating a hardware description of a microprocessor the method comprising: enabling a user to define a plurality of operations that can be performed in parallel in various combinations during execution of a single VLIW instruction by the microprocessor; enabling the user to specify a first set of the plurality of operations to be performed during execution of a first user-defined VLIW instruction; enabling the user to specify a second set of the plurality of operations to be performed during execution of a second user-defined VLIW instruction, the first and second user-defined VLIW instructions also having a user-defined configurable characteristic; and automatically generating the hardware description of the microprocessor, including generating a description of logic that is capable of performing each of the plurality of operations in parallel, and further including generating a description of logic that is capable of executing the first and second user-defined VLIW instructions in the microprocessor, in addition to a pre-defined set of core instructions for execution by a pre-defined microprocessor core, based on the user definition of the plurality of operations, the configurable characteristic and the first and second user-defined VLIW instructions.