Patent ID: 7975157

Claim:
A host device with power-saving function comprising: a first interface for coupling to an external device and accordingly generating a first signal; a second interface for coupling to a corresponding first port of a south bridge chip of a chip set of a host and receiving a second signal transmitted from the south bridge chip; a third interface for coupling to a corresponding second port of the south bridge chip of the chip set of the host; a logic gate coupled to the first interface and the second interface for generating a third signal according to the first signal and the second signal; a physical layer processing device coupled to the third interface and the logic gate for processing signals received on the third interface according to the third signal; a digital logic processing device coupled to the first interface and the logic gate for processing signals received on the first interface according to the third signal; and a controller coupled to the second interface and the logic gate for transmitting a fourth signal to the south bridge chip of the chip set of the host according to the third signal.