Patent ID: 7506112

Claim:
A computer implemented method for reducing bitmap management overhead during a data write, the method comprising: establishing a bitmap cache, wherein the bitmap cache is a copy of a bitmap in a cache; creating a shadow copy of the bitmap; writing a first bit associated with a first data write entry into the bitmap cache, a bitmap on persistent storage, and the shadow copy, wherein the first bit is associated with a first range of logical block addresses; receiving a second data write entry; comparing each logical block address of the second data write entry to each logical block address associated with bits in the shadow copy of the bitmap; responsive to at least one section of a logical block address range of the second data write entry matching at least one section of a logical block address range associated with bits in the bitmap, bypassing writing a second bit associated with a second range of logical block addresses to the bitmap on persistent storage; and responsive to at least one section of the logical block address range of the second data write entry being unique to each section of the logical block address range associated with bits in the bitmap, writing a second bit associated with the second range of logical block addresses of the second data write entry to the bitmap cache, the bitmap on persistent storage and the shadow copy.