Patent ID: 7462864

Claim:
A liquid crystal display device comprising: a substrate; a metal block layer having a porous block and a drain electrode on the substrate, the porous block having a plurality of tunnels; an insulation layer on the metal block layer; a source electrode and a data line at an end of the porous block; an interlayer insulation layer on the source electrode, the data line and the insulation layer; a gate electrode and a gate line on the interlayer insulation layer, the gate electrode being formed on the interlayer insulation layer between the source electrode and the drain electrode, and the gate line and the data line being intersected with each other to define a pixel region; nanowires formed in the tunnels of the porous block to form a nanowire channel layer, the nanowires being electrically connected to the first and second electrodes at ends of the tunnels; ohmic contact layers formed between the nanowires and first electrode and between the nanowires and the second electrode; a passivation layer on the substrate including the gate electrode and the gate line; and a pixel electrode formed to connect the drain electrode in the pixel region, wherein the gate electrode, the nanowire channel layer, the ohmic contact layers, the source electrode and the drain electrode constitute a thin film transistor.