Patent ID: 8435722

Claim:
A method for fabricating thin film transistor comprising: forming a gate electrode on a substrate; sequentially forming an insulation layer, a semiconductor layer and an etch stopper layer on the substrate including the gate electrode; forming a photosensitive film on the etch stopper layer; exposing the photosensitive film using a slit exposure mask, wherein the slit exposure mask includes a blocking part and a semi-transparent part adjacent to each side of the blocking part, and performing a developing process to form a photosensitive film pattern, wherein the thickness of both side portions of the photosensitive film pattern is thinner than that of a central portion of the photosensitive film pattern disposed on the etch stopper layer corresponding to the gate electrode; etching the etch stopper layer and the semiconductor layer using the photosensitive film pattern as a mask to form a semiconductor layer pattern and an etch stopper layer pattern; removing the side portions of the photosensitive film pattern on the etch stopper layer pattern by an ashing process to expose an edge portion of the etch stopper layer pattern, wherein a part of the central portion of the photosensitive film pattern is removed in proceeding the ashing process; removing the exposed edge portion of the etch stopper layer pattern to expose the semiconductor layer pattern; removing the remained photosensitive film pattern; forming an ohmic contact layer on the entire surface of the substrate including the semiconductor layer pattern, the etch stopper layer pattern and the insulation layer; forming a conductive layer on the ohmic contact layer; simultaneously patterning the conductive layer and the ohmic contact layer using the same mask to form source and drain electrodes and an ohmic contact layer pattern, and defining a channel region, wherein the ohmic contact layer pattern is in contact with an entire under surface of the source and drain electrodes, and is in contact with the etch stopper layer pattern, the semiconductor layer pattern and the insulation layer; forming a passivation layer on the entire surface of the substrate including the source and drain electrodes and the ohmic contact layer pattern, wherein the passivation layer directly contacts the ohmic contact layer pattern; patterning the passivation layer to form a contact part exposing the drain electrode; and forming a pixel electrode connected with the drain electrode via the contact part on the passivation layer, wherein three photosensitive films and three exposing processes are used in forming a thin film transistor.