Patent ID: 8759924

Claim:
A dual Field Effect Transistor (FET) device comprising: a compound semiconductor layer; a control FET fabricated on the compound semiconductor layer, the control FET including a source region, a drain region and a gate region, the control FET further comprising: an ohmic metal control source finger and an ohmic metal control drain finger disposed on a surface of the compound semiconductor layer in electrical contact with the source region and drain region, respectively, a control gate finger between the control source finger and the control drain finger, and a first and second control gate pad at opposite ends of the control gate finger and in electrical contact with the control gate finger; a sync FET fabricated on the compound semiconductor layer with the control FET as a monolithic device, the sync FET including a source region, a drain region and a gate region, the sync FET further comprising: an ohmic metal sync source finger and an ohmic metal sync drain finger disposed on the surface of the compound semiconductor layer in electrical contact with the source region and drain region, respectively, a sync gate finger between the sync source finger and the sync drain finger, and a first and second sync gate pad at opposite ends of the sync gate finger and in electrical contact with the sync gate finger, the first control gate pad and the first sync gate pad disposed between the control drain finger and the sync source finger; and an electrical connection between the control source finger and the sync drain finger.