Patent ID: 7462547

Claim:
A method of fabricating a bipolar transistor, comprising: a) growing an epitaxial semiconductor layer onto an underlying semiconductor region, the epitaxial layer having a low dopant concentration of less than about 5×10 16 cm −3 ; b) forming a trench isolation region defining peripheral edges of an active semiconductor region including the underlying semiconductor region; c) after steps (a) and (b), implanting a portion of the epitaxial layer through a mask to define a collector region having a relatively high dopant concentration, the collector region laterally adjoining a second region of the epitaxial layer, the second region having a low dopant concentration of less than about 5×10 16 cm −3 ; d) forming an intrinsic base layer overlying the collector region and the second region, the intrinsic base layer including an epitaxial region in conductive communication with the collector region; e) after step d), forming a low-capacitance region laterally separated from the collector region by the second region, the low-capacitance region including a dielectric region disposed in an undercut directly underlying the intrinsic base layer; and f) forming an emitter layer overlying the intrinsic base layer.