Patent ID: 7093081

Claim:
A method, in a multiprocessor data processing system, for identifying false sharing of a cache line, comprising: associating a performance indicator with at least one portion of a cache line in a cache; providing a plurality of processor access flag bits for the at least one portion of the cache line in the cache, wherein there is at least one processor access flag bit for each processor of a plurality of processors in the multiprocessor data processing system; responsive to an access operation to the at least one portion of the cache line, setting a processor access flag bit corresponding to a processor from which the access operation was received; in response to a reload of the cache line due to an access operation from a current processor of the plurality of processors targeting a current portion of the cache line, reading values of the processor access flag bits for each portion of the cache line; and determining if the reload is due to false sharing of the cache line based on the values of the processor access flag bits for each portion of the cache line.