Patent ID: 7052956

Claim:
A method for manufacturing a capacitor of a semiconductor device, the method comprising the steps of: i) providing a semiconductor substrate having a storage node plug; ii) sequentially forming a TEOS layer and a hard mask exposing a storage node contact area on the semiconductor substrate; iii) forming a storage node contact having a side profile of a positive and negative pattern through etching the TEOS layer by using the hard mask; iv) removing the hard mask by etching-back the hard mask while simultaneously removing a predetermined part of the storage node plug; v) performing an annealing process with respect to a resultant structure; vi) forming a silicon layer on the silicon substrate, which passes through the annealing process; vii) coating a photoresist film on an entire surface of the semiconductor substrate including the silicon layer; viii) forming a storage node electrode of a capacitor by etching-back the photoresist film and the silicon layer; iX) removing a remaining photoresist film; and X) sequentially forming a dielectric layer and a silicon layer for a plate electrode on a storage node electrode structure.