Patent ID: 7245011

Claim:
A semiconductor device comprising: a) a semiconductor chip having: i) an active surface having a peripheral region and a central region; ii) a plurality of first bonding pads formed on the peripheral region of the active surface; iii) a plurality of second bonding pads formed on the central region of the active surface; and iv) a patterned passivation layer located on the active surface; v) at least one dam located on the patterned passivation layer between the plurality of first bonding pads and the plurality of second bonding pads, the at least one dam completely surrounding the plurality of second bonding pads; b) a jointing material located on the second bonding pads; c) at least one SMD type passive component mounted on the active surface of the semiconductor chip and having a plurality of electrodes connected to the second bonding pads via the jointing material; d) a carrier connected to a back surface of the semiconductor chip; e) a plurality of bonding wires connecting the plurality of first bonding pads to the carrier; and f) an encapsulant sealing the SMD type passive component and the bonding wires and covering the at least one dam and the active surface of the semiconductor chip.