Patent ID: 8890085

Claim:
An apparatus for pulse pile-up rejection, comprising: a discriminator circuit, outputting a pulse threshold-crossing time signal in response to a signal of a received single pulse if the signal of the single pulse exceeds a threshold; a time delay circuit coupled with the discriminator circuit, the time delay circuit receiving the pulse threshold-crossing time signal, and outputting an adjustable delayed time signal according to a delay value and the pulse threshold-crossing time signal received from the discriminator circuit for the purpose of determining pulse pile-up; a peak detector circuit, the peak detector circuit receiving the signal of the single pulse, determining the peak-occurrence time of the single pulse, and outputting a pulse peak-occurrence time signal indicative of the peak-occurrence time of the single pulse; and a comparator circuit coupled with the time delay circuit and the peak detector circuit, the comparator circuit receiving the adjustable delayed time signal from the time delay circuit and the pulse peak-occurrence time signal from the peak detector circuit, comparing the pulse peak-occurrence time signal with the adjustable delayed time signal to determine whether pulse pile-up occurs, indicating pulse acceptance if the pulse peak-occurrence time signal occurs before the adjustable delayed time signal, and outputting a pulse pile-up rejection signal indicating pulse pile-up occurrence if the pulse peak-occurrence time signal occurs after the adjustable delayed time signal.