Patent ID: 7928809

Claim:
A semiconductor integrated circuit device, comprising: a first active region in which a source and a drain constituting one of transistors of a differential configuration are alternately arranged; a plurality of first gates each of which is formed between the source and drain of the first active region and each of which has a first protrusion section protruding from the first active region; a second active region in which a source and a drain constituting the other transistor of the transistors of a differential configuration are alternately arranged adjacent to the first active region; a plurality of second gates each of which is formed between the source and drain of the second active region and each of which has a second protrusion section protruding from the second active region in a direction opposite to a protruding direction of the first gate; a first common interconnect which connects all sources of the first and second active regions in common; a second common interconnect which is formed on the first protrusion section of the plurality of first gates and on all drains of the second active region and connects the plurality of first gates and all drains of the second active region; and a third common interconnect which is formed on the second protrusion section of the plurality of second gates and on all drains of the first active region and connects the plurality of second gates and all drains of the first active region.