Patent ID: 7278060

Claim:
A memory test system for testing a system memory of a computer, comprising: a host computer system operable to provide diagnostic testing commands and receive diagnostic testing results; and a system memory under test having a plurality of memory modules, each of the memory modules having located thereon a plurality of memory devices and a memory hub coupled to the memory devices, the memory hub comprising: a memory device interface coupled to the memory devices of the respective memory module, the memory device interface operable to provide control, address and write data signals to the memory devices and further operable to receive read data signals from the memory devices; and a diagnostic test engine coupled to the memory device interface and having a host computer system interface coupled to the host computer system and operable to receive the diagnostic testing commands and provide diagnostic testing results, the diagnostic test engine operable to monitor at least one of control, address, write data signals, and read data signals while at least one of the memory devices is operating, the diagnostic test engine further operable to provide results from monitoring the respective signals to the host computer system as diagnostic testing results.