Patent ID: 8890327

Claim:
A microelectronic semiconductor package comprising first and second microelectronic elements, each said microelectronic element having oppositely-facing active and passive surfaces, first edges bounding said surfaces in a first lateral direction, and second edges bounding said surfaces in a second lateral direction transverse to said first lateral direction, said first microelectronic element being superposed on said second microelectronic element with said passive surface of said first microelectronic element facing toward said active surface of said second microelectronic element without requiring a minimum spacing between said active and passive facing surfaces of said first and second microelectronic elements, each of said first edges of said first microelectronic element disposed beyond each of adjacent first edges of said second microelectronic element and each of said second edges of said second microelectronic element disposed beyond each of adjacent second edges of said first microelectronic element, each said first edge of said first microelectronic element having a length smaller than each said first edge of said second microelectronic element and each said second edge of said first microelectronic element having a length greater than each said second edge of said second microelectronic element, said first microelectronic element having a plurality of first contacts disposed on said active surface thereof, at least some of said first contacts being positioned adjacent each of said first edges of said first microelectronic element, said second microelectronic element having a plurality of second contacts disposed on said active surface thereof, at least some of said second contacts being positioned adjacent each of said second edges of said second microelectronic element, and none of said second contacts of said second microelectronic element underlying said passive surface of said first microelectronic element, said microelectronic package further comprising a substrate having a first surface and an oppositely-facing second surface, bonding contacts exposed at said first surface, apertures aligned with respective first and second plurality of contacts of said first and second microelectronic elements, a peripheral edge extending around an outer perimeter of said substrate, and terminals provided adjacent said peripheral edge of the substrate, and said substrate overlaying said first microelectronic element and said second microelectronic element such that said second surface of said substrate faces toward said active surfaces of said first and second microelectronic elements, wherein said first contacts of said first microelectronic element and said second contacts of said second microelectronic element are electrically connected with respective bonding contacts of said substrate.