Patent ID: 7714611

Claim:
An integrated circuit, comprising: a L-level permutable switching network (L-PSN); wherein the L-PSN comprises: for (I[i]/D[i])>1, i)[i]>1, L≧1 and i=[1:L], L levels of conductors of I[i] number of conductors consisting of D[i] sets of conductors, wherein at least one j where D[j]>2 for j selected from j=[1:L]; an 0-th level of conductors of I[0] number of conductors, wherein (I[0]/Π i=[1:L] D[i]>1; an (L+1)-th level of conductors of I[L+1] number of conductors comprising D[L+1] sets of conductors, wherein D[L+1]>2 and (I[L+1]/D[L+1])=Π i=[1:L] D[i]; and Σ i=[1:L+1] (I[i−1]×D[i]) number of switches; wherein the I[i−1] number of conductors of the (i−1)-th level of conductors selectively couple to (I[i]/D[i]) number of conductors in each of the D[i] sets of conductors of the i-th level of conductors through a respective I[i−1] number of switches of the Σ i=[1:L+1] (I[i−1]×D[i]) number of switches for i=[ 1 :L+1]; each conductor of the (i−1)-th level of conductors selectively couples to one conductor in each of the D[i] sets of conductors of the i-th level of conductors through a respective switch of the respective I[i−1] number of switches for i=[1:L+1]; for an j selected from j=[1:L] and D S [j]=(I[j−1]/I[j])×D[j], the I[j−1] number of conductors of the (j−1)-th level of conductors consisting of (I[j−1]/D S [j]) groups of D S [j] number of conductors, wherein each of the D S [j] number of conductors of the (I[j−1]/D S [j]) groups selectively couple to one conductor in each of the D[j] sets of conductors of the j-th level of conductors through a respective D S [j] number of switches of the respective I[j−1] number of switches; and for T>1 and L>1, any D S [j+1] groups of D S [j] number of conductors of (T×D S [j+1]) groups of D S [j] number of conductors of the (j−1)-th level of conductors selectively couple to D S [j+1] number of conductors in each of the D[j] sets of conductors of T groups of D S[+1 ] number of conductors of the j-th level of conductors of D[j] sets of conductors through a respective (D S [j+1]×D S [j]×D[j]) number of switches, wherein the D S [j+1] groups of D S [j] number of conductors selectively couple to the conductors of at least two groups of D S [j+1] number of conductors of at least one of the D[j] sets of conductors of the T groups of D S[+1 ] number of conductors through a respective (D S +[j+1]×D S [j]) number of switches of the (D S [j+1]×D S [j]×D[j]) number of switches.