Patent ID: 7759763

Claim:
A semiconductor device comprising: a semiconductor substrate having active regions of a silicon layer and an element isolating trench arrangement with a first insulating film buried therein, in a main surface of said semiconductor substrate, each active region being surrounded by a corresponding first portion of said isolating trench arrangement in a plan view such that said active regions are isolated from one another; MISFETs formed on predetermined ones of said active regions, each of said MISFETs having a gate insulating film, a gate electrode including a silicon film on said gate insulating film, and source and drain regions at both sides of said gate electrode; a resistance element of a silicon film formed over a second portion of said element isolating trench arrangement; and a second insulating film formed over said second portion of said element isolating trench arrangement; wherein said silicon film of said resistance element and said silicon films of said gate electrodes of said MISFETs are formed as parts of the same silicon layer, wherein said second insulating film is formed between a portion of said first insulating film and said silicon film of said resistance element, wherein said MISFETs include a first MISFET having a first gate insulating film and operating at a first supply voltage, and a second MISFET having a second gate insulating film thicker than said first gate insulating film and operating at a second supply voltage higher than said first supply voltage, and wherein said second insulating film is formed as part of the same insulating layer as said second gate insulating film.