Patent ID: 8709880

Claim:
A method of manufacturing semiconductor devices: providing a first device comprising a first die and a second die, wherein said first die is diced from a first wafer and said second die is diced from a second wafer and said first die is connected to said second die using at least one through-silicon-via (TSV); providing a second device comprising a third die and a fourth die, wherein said third die is diced from a third wafer and said fourth die is diced from a fourth wafer and said third die is connected to said fourth die using at least one through-silicon-via (TSV); wherein said first die comprises a first functionality and said third die comprises a second functionality, wherein said first functionality is different than said second functionality, wherein a majority of the masks used for processing said first wafer and said third wafer are the same; wherein said second die comprises a first amount of logic, or device input-output cells or memory, and wherein said fourth die comprises a second amount of logic, or device input-output cells or memory, said second amount is substantially different than said first amount.