Patent ID: 7184395

Claim:
A circuit module comprising: a loop switch comprising: a plurality of interconnected first retiming elements, wherein each of the plurality of first retiming elements comprises a transmit port and a receive port, the transmit ports of the first retiming elements respectively connected to first output ports of a plurality of first output ports of the circuit module and the receive ports of the first retiming elements respectively connected to first input ports of a plurality of first input ports of the circuit module, each first retiming element configured to recondition a data signal received at its receive port from a respective one of the first input ports and to transmit a reconditioned data signal to a respective one of the first output ports; and a second retiming element comprising a first receive port connected to one of the plurality of interconnected first retiming elements, the second retiming element further comprising a transmit port and a second receive port; and a port bypass circuit connected to the transmit port and the second receive port of the second retiming element; wherein the port bypass circuit is configured to receive a reconditioned data signal from the transmit port of the second retiming element and to transmit that reconditioned data signal to a second output port of the circuit module; wherein the port bypass circuit is further configured to receive a data signal from a second input port of the circuit module, recondition that data signal, and transmit the resulting reconditioned data signal to a third output port of the circuit module; wherein the port bypass circuit is further configured to receive a data signal from a third input port of the circuit module and transmit that data signal to the second receive port of the second retiming element of the loop switch; and wherein the second retiming element of the loop switch is configured to recondition the data signal transmitted to its second receive port.