Patent ID: 8334540

Claim:
A semiconductor device comprising: a line; a common wiring; a first non-linear element comprising: a first gate electrode layer; a gate insulating layer over the first gate electrode layer; a first wiring layer over the gate insulating layer; a second wiring layer over the gate insulating layer; and a first oxide semiconductor layer above and in contact with the gate insulating layer, the first wiring layer, and the second wiring layer; and a second non-linear element comprising a second gate electrode layer, a third wiring layer, a fourth wiring layer, and a second oxide semiconductor layer, wherein the common wiring is electrically connected to the first gate electrode layer, the first wiring layer, and the third wiring layer, wherein the line is electrically connected to the second gate electrode layer, the second wiring layer, and the fourth wiring layer, and wherein the line is in direct contact with the second wiring layer and the fourth wiring layer.