Patent ID: 8364818

Claim:
A method, with an information processing system, for reducing message flow on a message bus, the method comprising: determining if at least one logical operator in a plurality of logical operators requires processing on a given physical processing node in a group of physical nodes; pinning, in response to determining that the logical operator requires processing on the given physical processing node, the logical operator to the given physical processing node, wherein the pinning prevents any subsequent reassignment of the logical operator to another physical processing node; assigning each logical operator in the plurality of logical operators to an initial physical processing node in the group of physical processing nodes on a message bus; determining if at least one logical operator in the plurality of logical operators needs to be reassigned to a different physical processing node based on a difference between a set of input message flow rates and a set of output message flow rates associated with the at least one logical operator, wherein the determining further comprises determining, for the logical operator in the plurality of logical operators, if a sum of the set of input message flow rates associated with the logical operator is at least one of greater than and equal to a sum of the set of output message flow rates associated with the logical operator; and responsive to determining that the at least one logical operating in the plurality of logical operators needs to be reassigned to a different physical processing node, reassigning the at least one logical operator to the different physical processing node, wherein the reassigning comprises: assigning, in response to the sum of the set of input message flow rates being one of greater than and equal to the sum of the set of output message flow rates, the logical operator to a preceding physical processing node situated at a position on the message bus for a given message flow sequence preceding the physical processing node to which the logical operator is currently associated therewith; and assigning, in response to the sum of the set of input message flow rates being less than the sum of the set of output message flow rates, the logical operator to a subsequent processing node situated at a subsequent position on the message bus for the given message flow sequence to the physical processing node to which the logical operator is currently associated therewith.