Patent ID: 7222337

Claim:
A method for loop optimization within a dynamic compiler system, comprising: discovering each index expression within a loop portion; determining which arrays are accessed using the index expressions; for each of the arrays accessed using the index expressions, sorting the index expressions by trip counter and offset portions of the index expressions; and creating a loop structure using iteration splitting wherein a plurality of loops are generated, each loop of the plurality of loops being based on an original loop structure of the loop portion, and wherein at least one of an upper or lower range check is eliminated in at least one loop of the loop structure, the loop structure being determined based on the sorted index expressions; wherein the creating a loop structure comprises creating a pre-loop structure based on the original loop structure of the loop portion, wherein the pre-loop structure is capable of testing indexing expressions for underflow; generating a main loop structure having indexing expressions based on the original loop structure, wherein the indexing expressions cannot produce an underflow, and wherein the indexing expressions cannot produce an overflow; and creating a post-loop structure based on the original loop structure, wherein the post-loop structure is capable of testing indexing expressions for overflow.