Patent ID: 8729684

Claim:
A method of manufacturing an interposer chip, the method comprising: providing a substrate; forming a plurality of upper terminals at a first surface of the substrate, at least one upper terminal comprising an external connection for connecting outside the interposer chip; forming a plurality of lower terminals at a second, opposite surface of the substrate, at least one lower terminal comprising an external connection for connecting outside the interposer chip; forming, for a first upper terminal, a first conductive pattern that electrically connects the first upper terminal to a first set of one or more lower terminals; forming, for a second upper terminal, a second conductive pattern that electrically connects the second upper terminal to a second set of one or more lower terminals; forming a test pattern that electrically connects the first conductive pattern to the second conductive pattern; supplying a first current from the first conductive pattern through the test pattern to the second conductive pattern; and cutting the test pattern.