Patent ID: 7259435

Claim:
An intermediate structure in the fabrication of an electronic device, the intermediate structure comprising: a semiconductor substrate having a gate oxide layer disposed over at least a portion thereof, the gate oxide layer having an interface with the semiconductor substrate; a polysilicon layer disposed over the gate oxide layer and having an interface therewith; and a metal silicide layer disposed over the polysilicon layer and having an interface therewith, wherein the intermediate structure includes a nitrogen concentration profile comprising nitrogen atoms located in the semiconductor substrate, the gate oxide layer, the metal silicide layer and the polysilicon layer, wherein the nitrogen concentration profile includes a nitrogen concentration peak located within the interface of the polysilicon layer and the metal silicide layer, and wherein the nitrogen concentration profile does not include a nitrogen concentration peak at the interface of the polysilicon layer and the gate oxide layer or a nitrogen concentration peak at the interface of the gate oxide layer and the semiconductor substrate.