Patent ID: 7829947

Claim:
A semiconductor device comprising: a semiconductor substrate acting as a drain; a semiconductor epitaxial layer located on top of the semiconductor substrate; a drift region disposed at the top surface of the semiconductor epitaxial layer; a source region located at a top surface of the drift region; a channel region proximate a surface of the semiconductor epitaxial layer located between the source region and the drift region; an electrically conductive gate over a gate dielectric positioned on top of the channel region; a drain contact trench located in the drift region and the epitaxial layer, configured to electrically connect the drift region to the semiconductor substrate, wherein the drain contact trench includes: a trench formed vertically from the upper surface of the drift region, through the epitaxial layer to the semiconductor substrate and filled with an electrically conductive drain plug; electrically insulating spacers along sidewalls of the drain contact trench configured to electrically isolate the drain plug from the drift region and the epitaxial layer and to prevent dopant diffusion to or from the drain plug; and an electrically conductive drain strap located on top of the drain contact trench configured to electrically connect the drain contact trench to the drift region.