Patent ID: 8786345

Claim:
A single-trigger low-energy flip-flop circuit, comprising: a trigger sub-circuit that includes a first clock-activated transistor that is directly coupled to power and is configured to arm a trigger signal when an input signal to the single-trigger low-energy flip-flop circuit is at a different level than a level of an output signal generated by the single-trigger low-energy flip-flop circuit, wherein the trigger sub-circuit comprises transistors configured to function as an exclusive-or gate with the input signal and the output signal as inputs and the trigger signal as an output; and a latch sub-circuit that includes a second clock-activated transistor and is configured to change the level of the output signal when the trigger signal is armed and a clock signal transitions from a first level to a second level and maintain the level of the output signal when the trigger signal is unarmed, wherein a gate of the first clock-activated transistor and a gate of the second clock-activated transistor are directly coupled to the clock signal.