Patent ID: 8064486

Claim:
A method comprising: generating first and second test patterns, the first test pattern being identical to the second test pattern; transmitting the first test pattern from a first network node on a first channel to a switch having first and second inputs and first and second outputs, the switch being provided in a second network node, the switch receiving the first test pattern at the first input and outputting the first test pattern at the first output, such that the first test pattern is transmitted back to the first network node on a second channel, the first and second channels constituting portions of a first round trip path; transmitting the second test pattern from the first network node on a third channel to the switch in the second node, the switch receiving the second test pattern at the second input and outputting the second test pattern at the second output, such that second test pattern is transmitted back to the first network node on a fourth channel, the third and fourth channels constituting portions of a second round trip path; obtaining latency measurements associated with the first and second round-trip paths; determining a latency value associated with each of the first, second, third, and fourth channels based on the latency measurements.