Patent ID: 8599620

Claim:
A nonvolatile semiconductor memory device comprising: a memory cell array having electrically-rewritable nonvolatile memory cells arranged therein; and a control unit configured to perform a control of repeating a program operation, a program verify operation, and a step-up operation, the program operation being an operation of applying a program pulse voltage to a selected memory cell in order to write data and applying an intermediate voltage less than the program pulse voltage to first and second non-selected memory cells adjacent to the selected memory cell, the program verify operation being an operation of determining whether the writing of the data is completed, and the step-up operation being an operation of increasing the program pulse voltage by a first step-up value when the writing of the data is not completed, for a first period for which the number of times the program pulse voltage is applied is less than a first value, the control unit maintaining the intermediate voltage to be a constant value, for a second period for which the number of times the program pulse voltage is applied is equal to or greater than the first value, the control unit controlling the step-up operation such that the intermediate voltage is increased by a second step-up value, and determining the first step-up value on the basis of the second step-up value.