Patent ID: 7354859

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first film to be etched on an insulating layer formed on a semiconductor substrate, said insulating layer being a multilayer; forming a first mask film with an opening on said first film to be etched; forming a second film to be etched on said first mask film in such a way that said opening is buried; forming a second mask film on said second film to be etched; forming an interconnection pattern in said second mask film located in the upper portion of said opening; forming an interconnection pattern by etching said second film to be etched by use of said second mask film as a mask, forming a via pattern by etching said first film to be etched by use of said first mask film exposed on the bottom of said interconnection pattern as a mask; and forming a via hole and an interconnection trench in the upper portion of said via hole in said insulating layer by selectively etching said insulating layer by use of said interconnection pattern and said via pattern.