Patent ID: 8183843

Claim:
An apparatus comprising: a voltage regulator circuit including an output terminal to generate a regulated voltage and at least one input terminal; a first transistor with a gate coupled in parallel with a first resistor between the output terminal and the input terminal to couple a feedback signal to the input terminal while operating in a linear region to regulate the stability of the voltage regulator circuit, wherein the potential of the gate of the first transistor follows the regulated voltage of the output terminal; the first transistor is switched on by a bias voltage coupled to a gate of the first transistor, the bias voltage to follow the regulated voltage; the first transistor is a p-channel transistor, and the bias voltage is less than the regulated voltage; and the first transistor is directly and electrically connected in parallel with the first resistor between the output terminal and the input terminal; and further comprising a first capacitor coupled between the input terminal and the parallel connection of the first transistor and the first resistor to couple the feedback signal to the input terminal.