Patent ID: 8649137

Claim:
A semiconductor device, comprising: an inverter including a p-type transistor and an n-type transistor coupled in series and having an inverter control node and an inverter output node, the p-type transistor further coupled to a positive voltage rail; a trailing transistor coupled between the n-type transistor of the inverter and a negative voltage rail, and forming a trailing node between the trailing transistor and the n-type transistor of the inverter; a clamp transistor coupled between the positive and negative voltage rails and having a clamp control node coupled to the inverter output node; a latching transistor having a latching control node coupled to the inverter output node, the latching transistor further coupled in series between a resistance and the trailing node, where the resistance is further coupled to the positive voltage rail; and a resistor-capacitor (RC) circuit coupled in series between the positive and negative voltage rails and including a resistor and a capacitor, with the resistor coupled to the positive voltage rail and the capacitor coupled to the negative rail, an RC node defined by a junction of the resistor and capacitor, and wherein the RC node is coupled to the inverter control node.