Patent ID: 7348848

Claim:
A buffer amplifier for source driver, comprising: a first type differential amplifier, having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal is for receiving an input signal; a second type differential amplifier, having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal is for receiving the input signal, and the negative input terminal is coupled to the negative input terminal of the first type differential amplifier; a 1 st transistor, having a gate, a first source/drain, and a second source/drain, wherein the gate is coupled to the output terminal of the first type differential amplifier, and the first source/drain is coupled to a first power cord; a 2 nd transistor, having a gate, a first source/drain, and a second source/drain, wherein the gate receives a first bias, and the first source/drain is coupled to the second source/drain of the 1 st transistor; a 3 rd transistor, having a gate, a first source/drain, and a second source/drain, wherein the gate receives a second bias, the first source/drain is coupled to the second source/drain of the 1 st transistor, and the second source/drain is coupled to the second source/drain of the 2 nd transistor; a 4 th transistor, having a gate, a first source/drain, and a second source/drain, wherein the gate is coupled to the output terminal of the second type differential amplifier, the first source/drain is coupled to the second source/drain of the 2 nd transistor, and the second source/drain is coupled to a second power cord; a 5 th transistor, having a gate, a first source/drain, and a second source/drain, wherein the gate is coupled to the first source/drain of the 2 nd transistor, the first source/drain is coupled to the first power cord, and the second source/drain is coupled to the negative input terminal of the first type differential amplifier; and a 6 th transistor, having a gate, a first source/drain, and a second source/drain, wherein the gate is coupled to the second source/drain of the 2 nd transistor, the first source/drain is coupled to the second power cord, and the second source/drain is coupled to the negative input terminal of the first type differential amplifier.