Patent ID: 8058888

Claim:
A test apparatus for an electronic device package, comprising: a test socket having a first portion and a second portion overlying the first portion, wherein the first portion has a recess for receiving an electronic device package to be tested having a plurality of external terminals arranged in a terminal configuration; an interchangeable insert board disposed between the first portion and the second portion and partially extended on the recess, wherein the interchangeable insert board comprises: a plurality of first contact pads arranged in a first pad configuration compatible with the terminal configuration and facing the recess; a plurality of second contact pads arranged in a second pad configuration and disposed between the first portion and the second portion; and a plurality of trace layers each electrically connecting one of the first contact pads to one of the second contact pads, respectively; and a plurality of contact pins each penetrating through the second portion and electrically connected to one of the second contact pads of the interchangeable insert board, wherein the contact pins are arranged in a pin configuration, and the second pad configuration is compatible with the pin configuration.