Patent ID: 7609768

Claim:
A digital broadcasting receiver comprising a plurality of system decoders, a dual video decoder, a first video buffer area temporarily storing a first video stream corresponding to a first channel and a second video buffer area temporarily storing a second video stream corresponding to a second channel, the first and second video streams separated by the plurality of the system decoders, and a video buffer control apparatus for dual video decoding, the video buffer control apparatus comprising: a first write unit configured to receive and temporarily store the first video stream in the first video buffer area, wherein the first write unit performs stuffing on the first video buffer area if an input of the received first video stream is interrupted for a predetermined time; a second write unit configured to receive and temporarily store the second video stream in the second video buffer area, wherein the second write unit performs stuffing on the second video buffer area if an input of the received second video stream is interrupted for the predetermined time; and a read unit configured to enable concurrent processing of the first and second video streams by storing a first base address of the first video buffer area and a second base address of the second video buffer area and reading and temporarily storing the first video stream from the first video buffer area and the second video stream from the second video buffer area using the first and second base addresses in response to a request by the dual video decoder to decode the first and second video streams, and provide the temporarily stored first and second video streams to the dual video decoder.