Patent ID: 7991604

Claim:
A method of indirectly simulating a semiconductor integrated circuit (IC), the method comprising: forming a circle chain using input pins and output pins to provide an intellectual property (IP) core model that is substituted for a real IP core circuit, wherein the circle chain comprises logic modules, select modules and delay modules and wherein forming the circle chain comprises coupling a first output pin to a first select module; generating a test bench for the IP core model; integrating the semiconductor IC that includes the IP core model using the generated test bench; and simulating the semiconductor IC, wherein the input pins and the output pins of the IP core model respectively correspond to input pins and output pins of the real IP core circuit that is integrated in the semiconductor IC, wherein the input pins and the output pins of the real IP core circuit are to be tested, and wherein the IP core model includes a first input pin and a second input pin that respectively receive a first input signal and a second input signal, a third input pin that receives an enable signal, a fourth input pin that receives a test mode signal, a fifth input pin that receives a clock signal and at least one output pin that outputs an output signal.