Patent ID: 7974376

Claim:
A PLL (Phase Locked Loop) implemented to perform continuous time BPF (Band Pass Filter) tuning, the PLL comprising: a PFD (Phase/Frequency Detector) implemented to determine a phase difference between transitions of a feedback signal and an input signal; a CP (Charge Pump) implemented to convert the phase difference into a charge pump current; a loop filter implemented to process the charge pump current thereby generating a VCO (Voltage Controlled Oscillator) control voltage and a BPF (Band Pass Filter) control voltage; a VCO (Voltage Controlled Oscillator) implemented to process the VCO control voltage thereby generating a recovered clock, wherein the feedback signal is derived from the recovered clock and the VCO includes a plurality of g m (transconductance) cells; and wherein: when processing the charge pump current thereby generating the BPF control voltage, the loop filter for ensuring that any spur content or glitch content within the charge pump current is filtered from the BPF control voltage; and the BPF control voltage for determining a tuning frequency of a BPF to which the PLL is communicatively coupled.