Patent ID: 7387941

Claim:
A method for fabricating a semiconductor device, the method comprising: (a) forming a device isolation structure defining an active region on a semiconductor substrate having a pad insulating film; (b) forming a patterned mask layer over the device isolation structure, the patterned mask layer defining an opening that exposes the device isolation structure and the pad insulating film; (c) etching the exposed device isolation structure using the patterned mask layer to form a recess exposing sidewalls of the active region; (d) removing the patterned mask layer; (e) forming an epitaxial layer in the recess using the exposed sidewalls of the active region as a seed layer; (f) selectively etching the epitaxial layer by a predetermined thickness to form a SOI (Silicon-on-Insulator) channel region in the recess; (g) removing the pad insulating film to expose the active region; (h) forming a gate insulating film over the exposed active region including the SOI channel region; (i) forming a gate conductive layer over the gate insulating film; and (j) patterning the gate conductive layer to form a gate structure.