Patent ID: 8101460

Claim:
A method of making a semiconductor device, comprising: providing a first semiconductor wafer having a plurality of semiconductor die; mounting a second semiconductor wafer having a plurality of semiconductor die over the first semiconductor wafer so that the plurality of semiconductor die in the first and second semiconductor wafers are aligned; creating a gap between the aligned semiconductor die of the first and second semiconductor wafers; depositing a conductive material in a bottom portion of the gap; depositing an insulating material in the gap, over the conductive material, and over the aligned semiconductor die of the first and second semiconductor wafers; removing a portion of the insulating material and a tapered portion of the conductive material in the gap to form a recess between each aligned semiconductor die of the first and second semiconductor wafers extending to the conductive material; forming a shielding layer over the insulating material and in the recess that contacts the conductive material to isolate the aligned semiconductor die of the first and second semiconductor wafers with respect to inter-device interference; forming a substrate with a build-up structure on the plurality of semiconductor die of the first semiconductor wafer adjacent to the conductive material; electrically connecting the conductive material to a ground point in the substrate; and singulating the first and second semiconductor wafers through the gap to separate the aligned semiconductor die of the first and second semiconductor wafers.