Patent ID: 6872611

Claim:
A method of manufacturing a transistor, comprising the steps of: diffusing an impurity on a top surface of a drain layer of a first conductivity type provided on a semiconductor layer to form a conductive region of a second conductivity type; forming a trench having a bottom surface which is located deeper than a bottom surface of said conductive region; forming a gate insulating film at least on a side surface of said trench; forming a gate electrode material in said trench; forming a source region of the first conductive type which is in contact with said gate insulating film and whose lower end is lower than the upper end of said gate electrode material, in an entire cross-section thereof, in said conductive region; forming a film which consists of an insulating material having an upper end which is lower than the opening of said trench on said gate electrode material; and exposing said source region on an upper part of the side, surface of said trench and forming a source electrode film in contact with said source region.