Patent ID: 7293139

Claim:
A disk array system, comprising: a plurality of disk drives on which data is read and written, and a control unit that controls the read and written of the data on the plurality of disk drives based on a data input/output request from a host coupled to the disk array system, wherein the control unit comprises: a host input/output unit that exchanges the data and a control signal with the host, a disk input/output unit that exchanges the data and a control signal with the plurality of disk drives, a cache memory that temporarily stores the data during transfer between the host input/output unit and the disk input/output unit in units of segments that are each formed by a plurality of blocks having a predetermined size, an MPU that controls an operation of the control unit by executing a control program, and a cache controller that controls input/output of the data into/from the cache memory; and wherein the MPU generates, as information concerning data transfer between the host input/output unit and the cache memory, a host-side internal bus transfer list including an guarantee code (LA_SEG) of a first block of a segment relating to the data transfer, an identifier of the host input/output unit received the data input/output request, an identifier of the data input/output request, and a cache memory address (ADR) relating to the input/output of the data; and the control unit: (i) calculates guarantee codes for the blocks from the cache memory address (ADR) relating to the input/output of the data, a first cache address (ADR_SEG) of a segment containing the cache memory address (ADR) relating to the input/output of the data, a size of the block (BLK_SIZE), and the guarantee code (LA_SEG) of the first block of the segment relating to the data transfer using the following equation: LA =(( ADR—ADR — SEG )/ BLK _SIZE)+ LA — SEG, (ii) stores the data added the calculated guarantee codes in the cache memory when the data input/output request from the host is a data input request, and (iii) checks by comparing guarantee codes given to the data read from the cache memory with the calculated guarantee codes when the data input/output request from the host is a data output request.