Patent ID: 8495636

Claim:
A method for executing a single threaded program within a multi-core processor comprising: identifying an idle core within the multi-core processor, the identifying the idle core comprising identifying a main thread and a plurality of sub-threads from the plurality of instruction threads of the single threaded program, at least one of the plurality of sub-threads being a speculatively executable instruction thread, the identifying the main thread and the plurality of sub-threads being prior to executing instructions of the single threaded program; performing a look ahead operation on the instructions of the single threaded program prior to executing the instructions, the look ahead operation identifying a plurality of instruction threads within the single threaded program; allocating the idle core to execute at least one of the plurality of instruction threads based upon results of the look ahead operation; executing the at least one of the instruction threads on the idle core; generating a graph of relationships between a plurality of discretely executable components, the graph comprising a main component and a plurality of discretely executable sub-components; assigning the main component to execute on the idle core of the multi-core processor; assigning each of the plurality of discretely executable sub-components to execute on at least one other idle core of the multi-core processor; and, managing conflicts between each of the plurality of discretely executable components based upon information determined from the graph prior to the assigning.