Patent ID: 7829989

Claim:
An electronic package for containing at least a top packaging module vertically stacked on a bottom-packaging module for packaging at least a top integrated circuit (IC) chip and a bottom IC chip therein respectively,: the electronic package further comprising: a top and a bottom laminated boards each having via connectors and conductive traces distributed on multiple layers of said laminated boards and connected to selected via connectors and each of said laminated boards having a patterned metal plates covering over an extensive area of a bottom surface of said laminated board; each of said top and bottom IC chips having a flat-surface electrode and each of said flat-surface electrodes is face-to-face soldered to the metal plates disposed on the bottom surface of said laminated boards and said bottom laminated board further having a top surface having electrical contact pads matched with electrode footprints of said top packaging module to surface mount said top packaging module directly onto said bottom laminated board; and said top packaging module further comprising a first ball grid array (BGA) including a first set of top-tall solder balls connected to said flat surface electrode of said top IC chip through the solder mask disposed on said bottom surface of said upper laminated board wherein said top-tall solder balls are extended downwardly from said bottom surface of said upper laminated board to contact the electrical contact pads disposed on said top surface of said lower laminated board to stack vertically thereon, and wherein said bottom IC chip of said bottom packaging module further includes solder bumps extended from electrodes of said bottom IC chip contained in said bottom packaging module wherein said solder bumps extended downwardly to substantially a same horizontal plane as a second set of top-ball solder balls of a second BGA for conveniently mounting directly onto terminals disposed on a print circuit board (PCB).