Patent ID: 8525231

Claim:
A semiconductor device, comprising: a base substrate; a semiconductor layer having a receiving groove, a protrusion part, a first carrier injection layer, at least two insulating patterns, and a second carrier injection layer provided on the base substrate, the insulating patterns being disposed to traverse the first carrier injection layer and the second carrier injection layer being spaced apart from the first carrier injection layer and disposed on a lower portion of the protrusion part; a source electrode and a drain electrode disposed to be spaced apart from each other on the semiconductor layer; and a gate electrode insulated from the source electrode and the drain electrode and having a recess part recessed into the receiving groove, wherein a lowest portion of the receiving groove contacts an uppermost layer of the first carrier injection layer or is disposed above the uppermost layer thereof, and an insulating pattern, disposed at an innermost portion of the semiconductor layer among the insulating patterns, traverses the first carrier injection layer and is disposed at the outside of both sides of the receiving groove in a thickness direction thereof.