Patent ID: 8116093

Claim:
A printed circuit board (PCB) comprising: a substrate having a first group of at least two via holes and a second group of at least two via holes formed therein, wherein the substrate comprises a plurality of stacked layers; a first pad set of terminal pads and a second pad set of terminal pads each formed on an uppermost layer of the stacked layers of the PCB substrate, the first group of the via holes being surrounded by the first pad set of terminal pads and the second group of the via holes being surrounded by the second pad set of terminal pads; a first group of conductive connection members and a second group of conductive connection members formed in the substrate, the first and the second groups of conductive connection members filling up the first and the second groups of the via holes, the first group of the conductive connection members being connected to the first pad set of terminal pads and the second group of the conductive connection members being connected to the second pad set of terminal pads; and a conductive line formed on the uppermost layer of the PCB substrate between the first pad set of terminal pads and the second set of terminal pads to pass through a region of the PCB substrate located between the first pad set of terminal pads and the second pad set of terminal pads, wherein the conductive line is at least any one of a signal line, a power line and a ground line.