Patent ID: 7495345

Claim:
A semiconductor device-composing substrate having a mounting region on which a semiconductor chip is to be mounted, comprising: an interconnect layer provided on a support base, and including an interconnect; an insulating layer provided on said interconnect layer; a chip-connecting electrode provided in said insulating layer located in said mounting region, one end of which connected to said interconnect, and the other end of which to be connected to a bump of said semiconductor chip; an external electrode pad provided in said insulating layer located outside said mounting region, one end of which connected to said interconnect, and the other end of which to be connected to an external electrode terminal to be provided on said insulating layer; and a resin stopper pattern provided in said insulating layer located between said mounting region and said external electrode pad, being exposed in a surface of said insulating layer, and being composed of an electro-conductive material.