Patent ID: 7016983

Claim:
A system for controlling communication, comprising: a first processor connected to a selector via a processor bus and a control bus; the selector placing one or more signal lines of the processor bus in electrical communication with one or more signal lines of one of a first bus and a second bus, the selector responsive to a control signal sent from the first processor via the control bus; a first device connected to the first bus for accessing a storage medium in response to a first instruction from the first processor; a second processor connected to the second bus, the second processor having an input for receiving data and attached to a buffer for storing data; and a second device connected to the second bus, which retrieves and stores the data from the buffer in response to a second instruction from the first processor; wherein the first processor is configured to issue the first instruction to the first device via the first bus causing the first device to access the storage medium, wherein while the first device is performing according to the first instruction, the first processor transmits the control signal to the selector to select the second bus, and the first processor issues the second instruction to the second device via the second bus causing the second device to retrieve and store the data from the buffer, and wherein after the second device completes performance in accordance to the second instruction, the first processor transmits the control signal to the selector to select the first bus to communicate with the first device relating to the first instruction.