Patent ID: 7657891

Claim:
A multithreading processor configured to concurrently execute a plurality of threads of execution, comprising: an execution pipeline, for executing instructions of the plurality of threads, configured for: detecting a stalling event in response to an instruction issued to said execution pipeline, wherein said execution pipeline cannot continue executing said instruction without incorrectly executing a stalling thread, wherein said stalling thread includes said instruction, and wherein said stalling thread is one of the plurality of threads; indicating said stalling event, said stalling thread, and whether said stalling thread is the only runnable thread; stalling said execution pipeline when said stalling thread is the only runnable thread; and flushing said execution pipeline when said stalling thread is not the only runnable thread, in response to detecting said stalling event, thereby enabling said execution pipeline to continue executing instructions after said flushing; and a thread scheduler, coupled to said execution pipeline, configured to issue to said execution pipeline instructions of the plurality of threads other than said stalling thread, in response to said execution pipeline indicating said stalling thread, wherein said thread scheduler is further configured to determine that said stalling event has terminated and to resume issuing to said execution pipeline instructions of said stalling thread in response to said stalling event terminating, and wherein said flushing said execution pipeline comprises flushing only said stalling thread from said execution pipeline.