Patent ID: 8095771

Claim:
A method of caching translations of virtual addresses (VA) to system physical addresses (SPA) from multiple address spaces in a virtual machine, the method comprising: write-protecting a guest page table containing an address translation for a first guest address space before caching the address translation in a shadow page table; intercepting a write to the guest page table; creating a guest-writable mapping to the guest page table after intercepting the write to the guest page table; marking a cached address translation associated with the guest page table affected by the guest-writable mapping, wherein the marking indicates a stale cached address translation; purging the marked address translation upon one of a switch to a second guest address space and a flush of translations, wherein non-stale address translations remain cached and stale address translations are removed; sharing the shadow page table between a first shadow address space that corresponds to the first guest address space and a second shadow address space that corresponds to the second guest address space when the guest page table is used in the corresponding first and second guest address spaces; and tagging the shadow page table with guest page directory table attributes and processor control register flags, wherein the attributes preserve access permissions.