Patent ID: 7571397

Claim:
A method for design based process control optimization, comprising: creating, by using a computer, a circuit layout database including a design rule set; querying by employing at least one algorithm, the circuit layout database to calculate at least one process specification limit; comparing the calculated at least one process specification limit with at least one predefined technology process to determine if the at least one process specification limit allows for a manufacturable process; recalculating the at least one process specification limit, if the at least one process specification limit does not allow for the manufacturable process; performing a manufacturing process step for a semiconductor device according to the at least one process specification limit; feeding at least one output specification result of the manufacturing process step to a downstream manufacturing process step; comparing the at least one output specification result of the manufacturing process step with at least one predefined technology process to determine if the at least one output specification result allows for the manufacturable process; calculating at least one process specification limit for the downstream manufacturing process step, if the at least one output specification result does not allow for the manufacturable process; and performing a manufacturing process step for a semiconductor device according to the at least one process specification limit for the downstream manufacturing process step.