Patent ID: 8271809

Claim:
A computer-implemented method for managing power consumption within a multi-core microprocessor chip, the computer-implemented method comprising: receiving, from an authorized user, a set of activities selected to be monitored for a unit wherein the user assigns a specific counter of a first set of counters for a specific activity of the set of activities; storing a value for each activity of the set of activities in an assigned counter of the first set of counters, forming a set of stored values, wherein the value comprises a count multiplied by a weight factor specific to the activity, wherein the weight factor is based on a pre-silicon and after-silicon power modeling; grouping the set of activities into subsets; summing the stored values corresponding to each activity in each of the subsets to reach a total value for each of the subsets; multiplying the total value of each of the subsets by factor corresponding to the subset to form a scaled value for each of the subsets; receiving, at a power manager, a power usage value comprising a summation of the scaled value of each of the subsets; and adjusting, by the power manager, the operational parameters of the unit based on a comparison of the power usage value to a predetermined threshold value.