Patent ID: 7018914

Claim:
A method of forming a gate structure of a semiconductor device, comprising: forming a first insulating layer on a substrate, subsequently coating the substrate with a conductive material, and patterning the conductive material to form at least one gate pattern insulated from the substrate by the first insulating layer; forming a second insulating layer on the gate pattern and the substrate; removing some of the second insulating layer until an upper surface thereof is below a level of an upper surface of the gate pattern; forming a second conductive layer comprising the conductive material on the second insulating layer and the gate pattern; selectively removing portions of the second conductive layer such that the second insulating layer is exposed, so that a spacer of the conductive material is formed at both sides of an upper portion of the gate pattern and a surface area of the gate pattern is enlarged; and subsequently removing a first portion of the second insulating layer, while leaving a second portion of the second insulating layer intact.