Patent ID: 7687900

Claim:
A semiconductor integrated circuit device comprising: an integrated active element formed on a semiconductor substrate; an interlayer insulating film formed on the active element; at least one or more first metal patterns made of a first metal layer formed in the interlayer insulating film at a position right above the active element, for acting as a first electrode of the active element; at least one or more second metal patterns made of the first metal layer for acting as a second electrode of the active element; a first bus made of a second metal layer formed in the interlayer insulating film at a position right above the first metal layer, the first bus being electrically connected with the at least one or more first metal patterns; a second bus made of the second metal layer, the second bus being electrically connected with the at least one or more second metal patterns; wherein each of the first bus and the second bus has at least one or more slits; and at least one or more contact pads provided on the first bus and the second bus, wherein the contact pad has a probe testing region and a bonding region.