Patent ID: 7800187

Claim:
A semiconductor device including a vertical transistor with an upper first electrode and a lower second electrode, the device comprising: an upper semiconductor region of a first conductivity type, said upper semiconductor region having spaced-apart diffusion regions at a top surface thereof directly adjacent to said first electrode; a lower semiconductor region of a second conductivity type that is different than the first conductivity type, said lower semiconductor region being closer to said lower second electrode than said upper semiconductor region; a trench formed in said upper and lower semiconductor regions between said diffusion regions, said trench having an upper portion that throughout a majority of said upper semiconductor region has a first width, a lower portion having a second width larger than the first width, and a middle portion between the upper and lower portions having a width that enlarges from the first width to the second width, wherein said lower portion having the second width is present in each of said upper and lower semiconductor regions; and a gate electrode buried in said upper, middle, and lower portions of said trench of said device.