Patent ID: 7280328

Claim:
A semiconductor integrated circuit device comprising: an external connection terminal; an electrostatic discharge protection circuit connected to the external connection terminal; a power supply line connected to the electrostatic discharge protection circuit; a ground line connected to the electrostatic discharge protection circuit; and an inter-power supply electrostatic discharge protection circuit that is connected to the power supply line and the ground line, and has a gate insulating element, wherein the inter-power supply electrostatic discharge protection circuit comprises a first gate voltage control circuit capable of controlling the gate voltage of the gate insulating element, the gate insulating element is a first NMIS transistor whose source is connected to the ground line and whose drain is connected to the power supply line, and the first gate voltage control circuit comprises: a first Schmidt trigger circuit connected at its output to the gate of the first NMIS transistor; a resistor whose one end is connected to the power supply line and whose other end is connected to an input of the first Schmidt trigger circuit; and a capacitor whose one end is connected to the ground line and whose other end is connected to the input of the first Schmidt trigger circuit, and wherein the first Schmidt trigger circuit comprises: a first inverter section that is connected at its input to the other end of the resistor and the other end of the capacitor; a second inverter section that is connected at its input to the output of the first inverter section; a third inverter section that is connected at its input to the output of the second inverter section and is connected at its output to the gate of the first NMIS transistor; and a fourth inverter section that is connected at its input to the output of the second inverter section and is connected at its output to the input of the second inverter section.