Patent ID: 8624132

Claim:
A printed wiring board comprising: a wiring substrate; a build-up wiring layer formed by laminating conductor circuits and at least one interlaminar resin insulating layer alternately on the wiring substrate, the built up wiring layer having an outermost interlaminar resin insulating layer; a plurality of filled vias each filled with a plated conductor within a respective opening provided in the outermost interlaminar resin insulating layer, wherein each filled via electrically connects first and second conductor circuits situated in mutually different layers; a solder resist layer provided on the outermost interlaminar resin insulating layer and an outermost conductor circuit of said first and second conductor circuits; a plurality of openings formed in the solder resist layer to expose a plurality of parts of a the outermost conductor circuit which forms a plurality of conductor pads for mounting electronic parts, respectively, wherein each of the plurality of conductor pads has a filled via surface having a depression or protrusion in the range of about −5 μm to about +5 μm in relation to a surface thickness of the outermost conductor circuit; and a plurality of solder bumps formed on the plurality of conductor pads, respectively wherein the conductor pads are aligned at a pitch of about 200 μm or less, and a ratio W/D of a diameter W of the solder bumps to an opening diameter D of the openings formed in the solder resist layer is about 1.05 to about 1.26.