Patent ID: 8106679

Claim:
A control method for controlling a data processing system including a logic circuit region where circuits are dynamically reconfigurable, the control method comprising: obtaining an architecture code, the architecture code including object circuit information for mapping an object circuit that is at least part of a circuit for executing an application onto part of the logic circuit region, interface circuit information for mapping an interface circuit in contact with the object circuit onto the logic circuit region, and boundary condition to be realized in the interface circuit; mapping the object circuit and the interface circuit in contact with the object circuit onto the logic circuit region according to the object circuit information and the interface circuit information of the architecture code; and activating the interface circuit based on the boundary condition of the architecture code, and wherein the object circuit is a divided circuit of a hardware module for implementing a function, and wherein the boundary condition includes information of timing control of data supplying to the object circuit so that the object circuit functions as the divided circuit of the hardware module when the object circuit is mapped spatially and/or temporally divided to other divided circuits.