Patent ID: 7716459

Claim:
A method for protecting at least one jump in a program executed by a processor from attack, the method comprising: determining a result over several bits as an indicator of whether the attack is underway, the result corresponding to an operation taking into account at least one fixed value and at least one current value; determining a masked memory address based on the result, a random number, and a base address; deriving a jump address using the masked memory address; and performing a jump operation to execute instructions stored at the jump address, wherein the jump address is within a first plurality of memory addresses, the first plurality of memory addresses storing at least one first trap instruction, at least one second trap instruction, and at least one normal instruction such that the at least one normal instruction is stored at a memory address between the at least one first trap instruction and the at least one second trap instruction, and an instruction stored at the jump address is the at least one normal instruction if the attack is not underway and is the at least one first or second trap instruction if the attack is underway.