Patent ID: 8228677

Claim:
A tape wiring substrate comprising: a base film provided with a rectangular chip mounting region comprising a first side, second and third sides adjacent to the first side, and a fourth side opposite to the first side; a first output wiring group comprising a first end portion arranged along one end of the base film, a second end portion arranged within the chip mounting region along the first side of the chip mounting region, and a first connecting portion connecting the first end portion and the second end portion and arranged in a first direction; a second output wiring group comprising a first end portion arranged along the one end of the base film, a second end portion arranged within the chip mounting region along the fourth side of the chip mounting region, and a second connecting portion that connects the first end portion and the second end portion, intersects the second side of the chip mounting region, and is connected to the second end portion in the first direction; a third output wiring group comprising a first end portion is arranged along the one end of the base film, a second end portion arranged within the chip mounting region along the fourth side of the chip mounting region, and a third connecting portion that connects the first end portion and the second end portion, intersects the third side of the chip mounting region, and is connected to the second end portion in the first direction; a first input/output wiring group comprising a first end portion arranged along the one end of the base film, a second end portion arranged within the chip mounting region along the fourth side of the chip mounting region, and a fourth connecting portion that connects the first end portion and the second end portion, intersects the fourth side of the chip mounting region, and is connected to the second end portion in a direction opposite to the first direction; and a second input/output wiring group comprising a first end portion arranged along the one end of the base film, a second end portion arranged within the chip mounting region along the fourth side of the chip mounting region, and a fifth connecting portion that connects the first end portion and the second end portion, intersects the fourth side of the chip mounting region, and is connected to the second end portion in the direction opposite to the first direction; wherein the first end of the second output wiring group and the first end of the third output wiring group are arranged between the first end of the first input/output wiring group and the first end of the second input/output wiring group.