Patent ID: 7742119

Claim:
A pixel structure, disposed on a substrate, the pixel structure comprising: a scan line and a data line arranged on the substrate; a first thin film transistor disposed on the substrate, wherein the first thin film transistor comprises a gate electrode electrically connected to the scan line, a source electrode electrically connected to the data line and a drain electrode; a second thin film transistor disposed on the substrate, wherein the second thin film transistor comprises a main gate electrode, a source electrode electrically connected to the data line and a drain electrode electrically connected to the drain electrode of the first thin film transistor, and the main gate electrode of the second thin film transistor is floating; a pixel electrode disposed on the substrate and electrically connected to the drain electrodes of the first and the second thin film transistors via a first contact hole; and a pattern designed at the layer of the source electrodes and the drain electrodes of the first and the second thin film transistors, wherein two ends of the pattern cross over the gate electrode of the first thin film transistor and the main gate electrode of the second thin film transistor respectively, and the designed pattern is separated from the source electrode of the second thin film transistor and the drain electrode of the second thin film transistor, wherein the second thin film transistor further comprises a top gate electrode opposite to the main gate electrode of the second thin film transistor at the layer of the pixel electrode, and the top gate electrode is electrically connected to the main gate electrode of the second thin film transistor.