Patent ID: 6933778

Claim:
A digital amplifier, comprising: a summation circuit coupled to receive an input signal and a feedback signal and to generate a summed output signal from the input signal and the feedback signal; a noise shaping network coupled to receive the summed output signal from the summation circuit and to generate a noise shaped signal from the summed output signal; a sampling stage coupled to receive the noise shaped signal from the noise shaping network and to generate a sampled signal from the noise shaped signal, the sampling stage having a predetermined sampling frequency and generating the sampled signal at an output frequency that differs from the sampling frequency; a feedback loop coupled to receive the sampled signal at the output frequency from the sampling stage and to provide the feedback signal at the output frequency based on the sampled signal to the summation circuit; and an output stage coupled to receive the sampled signal at the output frequency from the sampling stage and to generate an output signal at the output frequency based on the sampled signal, wherein the sampling stage further comprises a logic circuit for suppressing sampling of the noise shaped signal for a predetermined period, wherein the logic circuit further includes a transition detector for detecting a transition in the sampled signal, and wherein the predetermined period starts at the transition.