Patent ID: 7448016

Claim:
A pad layout on a printed circuit board (PCB) comprising: a plurality of pads arranged on the PCB for cooperatively receiving either a first surface mounted component (SMC) or a second surface mounted component (SMC), the first SMC and the second SMC having same numbers of footprints; each of the pads for selectively attaching a footprint of the first SMC and a footprint of the second SMC thereon, and integrating a first portion for receiving the footprint of the first SMC, and a second portion for receiving the footprint of the second SMC, the first portion overlapped with the second portions, the first and second portion both entirely located within an area of the pad, so that each of the pads can selectively receive the footprints of the first and second SMCs; wherein each of the pads has a polygonal shape corresponding to a minimum sized shape that accommodates both a shape of the first footprint of the first SMC and a shape of the first footprint of the second SMC.