Patent ID: 7095072

Claim:
A semiconductor device, comprising: a plurality of wiring layers that are laminated with each other, each of said wiring layers comprising: an interlayer insulating film; first and second electrodes buried in the interlayer insulating film and remote from each other; a first via that connects the first electrode of one wiring layer to the first electrode of an adjacent wiring layer; and a second via that connects the second electrode of the one wiring layer to the second electrode of the adjacent wiring layer, and said connected first electrodes and said first via are connected to a first terminal, said connected second electrodes and said second via are connected to a second terminal, and a capacitor is formed between said first electrodes and said first via connected to said first terminal and said second electrodes and said second via connected to said second terminal; and wherein said semiconductor device further comprises an integrated circuit section, wherein a diameter of each of said first and second via is larger than a diameter of via provided in said integrated circuit section.