Patent ID: 8117427

Claim:
A controller comprising: a micro control unit coupled to a central processing unit, wherein when power is supplied to the controller, the micro control unit transmits an unfetch signal to the central processing unit such that the central processing unit suspends a booting procedure; a buffer coupled to the micro control unit; a peripheral control unit coupled to the micro control unit and a storage module, the peripheral control unit is adapted to load a system firmware in the storage module into the buffer; and an interface control module coupled to the micro control unit and the central processing unit, the interface control module is adapted to read the system firmware in the buffer, wherein the interface control module comprises a firmware interface control unit, the firmware interface control unit receiving a read request transmitted from the central processing unit via a system firmware transmission interface, the firmware interface control unit comprising: a firmware address register for temporarily storing an address carried in the read request transmitted from the central processing unit such that the firmware interface control unit reads the system firmware from the buffer according to the address; and a firmware data register for temporarily storing the system firmware which is read according to the address; wherein when the central processing unit suspends the booting procedure, the micro control unit loads a first code segment of the system firmware in the storage module into the buffer, and after the first code segment is fully loaded into the buffer, the micro control unit transmits a fetch-done signal to the central processing unit such that the central processing unit starts executing the booting procedure; after receiving the read request transmitted from the central processing unit, the firmware interface control unit determines whether the address of the read request is within an address scope of the first code segment temporarily stored in the buffer, wherein when the address of the read request is within the address scope of the first code segment temporarily stored in the buffer, the firmware interface control unit reads the codes of the first code segment of the system firmware in the buffer according to the address of the read request, stores the codes corresponding to the address into the firmware data register, and the firmware interface control unit returns the codes stored in the firmware data register back to the central processing unit via the system firmware transmission interface.