Patent ID: 6847568

Claim:
A sense amplifier configuration for a memory device having a memory area including a plurality of memory elements having a memory state and further including access line devices having at least one of bit line devices and word line devices for addressing the memory elements, the sense amplifier comprising: an input area configured to be connected during operation to at least a selected one of the access line devices for selected memory elements in the memory area in order to ascertain the memory state for at least one of the selected memory elements; an output area outputting during operation an output signal representing the ascertained memory state; a compensation voltage source device configured to control a voltage applied to the selected access line device in relation to an unselected memory area during operation; and a compensation current source device generating an electric compensation current during operation and supplying the electric compensation current to at least one of the access line devices, a time profile of the compensation current being chosen to generate a constant potential difference over time and during operation in interaction with said compensation voltage source device on the selected access line device relative the unselected memory area.