Patent ID: 7669040

Claim:
A method for executing a long transaction in a system with limited transactional hardware resources, comprising: executing the long transaction in a non-transactional mode, which does not use transactional hardware resources; deferring stores generated during the long transaction so that the stores are not committed to the architectural state of a processor until the transaction is successfully completed; and if the long transaction successfully completes, committing the long transaction, which involves performing multiple hardware transactions to commit the deferred stores to the architectural state of the processor: wherein performing the multiple hardware transactions involves, partitioning the deferred stores into subsets, and committing each subset of deferred stores to the architectural state of the processor; wherein deferring a store generated during the long transaction involves placing the store into a thread-specific speculative commit buffer; wherein if a load operation is performed on a variable which is stored in the thread-specific commit buffer, the method further comprises retrieving a value for the variable from a corresponding entry in the thread-specific commit buffer; and wherein prior to executing the long transaction, the method further comprises determining a favored mode of execution for the transaction, wherein the favored mode of transactional execution can involve, executing the transaction using mutual exclusion to ensure that the transaction completes without interference from other threads, executing the transaction as a single hardware transaction which uses the transactional hardware resources, or executing the transaction as a long transaction, which does not use the transactional hardware resources, and wherein stores are not committed to the architectural state of the processor until the transaction is successfully committed.