Patent ID: 7547948

Claim:
A semiconductor device including a bipolar junction transistor, comprising: a semiconductor substrate having a principal surface; a collector region of a first conductivity type formed in said semiconductor substrate from said principal surface; a base region of a second conductivity type opposite to said first conductivity type, formed in said collector region from said principal surface; an emitter region of said first conductivity type, formed in said base region from said principal surface, forming an emitter-base junction reaching said principal surface; junction protection structure formed above said emitter-base junction reaching the principal surface comprising an insulator film formed on said principal surface, and a conductive electrode formed on said insulator film; at least one CMOS transistor, comprising: first and second wells of the first and the second conductivity types formed in said semiconductor substrate from said principal surface, first and second insulated gate structures formed on said first and second wells, including first and second gate insulating films formed on said first and second wells, first and second conductive electrodes formed on said first and second gate insulating films and having side walls, and first and second side wall spacers formed on side walls of said first and second conductive electrodes, and first and second source/drain regions formed in said first and second wells on both sides of said first and second insulated gate structures, and having the second and first conductivity types, wherein said junction protection structure has same constituent elements one of said first and second insulated gate structures; a field insulating film having a base aperture above said base region, a collector aperture above said collector region outside said base region and first and second MOS transistor apertures above said first and second wells, wherein the base region has a surface exposed at the principal surface in the base aperture, the junction protection structure has a layout configuration of closed loop lines within the base aperture, and the emitter region is formed in a region defined between the field insulating film and the junction protection structure with an emitter-base junction reaching the principal surface below the field insulating film and the junction protection structure.