Patent ID: 7714440

Claim:
A metal interconnection structure of a semiconductor device having a low resistance, comprising: a first metal film pattern disposed on an upper part of an insulation film of a semiconductor substrate; an intermetallic dielectric film disposed on the first metal film pattern and the insulation film, and having a via-hole exposing an upper surface of the first metal film pattern; a metal barrier layer disposed on side walls and a lower surface of the via-hole; a first metal contact plug disposed on a lower part of the via-hole such that the first metal contact plug connects the upper surface of the first metal film pattern through the metal barrier layer, and made of a metal film having a first specific resistance; a second metal contact plug disposed on the upper part of the first metal contact plug while filling the upper part of the via-hole, and made of a metal film having a second specific resistance lower than the first specific resistance; and a second metal film pattern disposed on the second metal contact plug and intermetallic dielectric film.