Patent ID: 8686780

Claim:
An attenuation circuit comprising: a variable resistance transistor coupled between an AC signal being attenuated and a circuit reference voltage; a scaling circuit having an input coupled to the AC signal being attenuated and an output coupled to a control terminal of the variable resistance transistor, the scaling circuit providing an output relative to the circuit reference voltage that is a fixed fraction of the instantaneous AC signal being attenuated relative to the circuit reference voltage; a variable DC bias also coupled to the control terminal of the variable resistance transistor; whereby the output of the scaling circuit and the output of the variable DC bias are combined to provide a signal to the control terminal of the variable resistance transistor that has a first component controlled by the variable DC bias to control the attenuation of the AC signal, and a second component that is a fixed fraction of the instantaneous AC signal being attenuated to linearize the resistance of the variable resistance transistor.