Patent ID: 7057230

Claim:
A semiconductor device comprising: a plurality of nonvolatile memory cells each including, a MOS type first transistor section used for information storage, and a MOS type second transistor section which selects the first transistor section, wherein the first transistor section and the second transistor section are formed with an insulating region between gate electrodes thereof and adjacent to each other, wherein a channel region connected to channel regions of the first transistor section and the second transistor section is provided below the insulating region, wherein the second transistor section has a bit line electrode connected to a bit line, and a control gate electrode connected to a control gate control line, wherein the first transistor section has a source line electrode connected to a source line, a memory gate electrode connected to a memory gate control line, and a charge storage region disposed directly below the memory gate electrode, wherein a gate withstand voltage of the second transistor section is lower than a gate withstand voltage of the first transistor section, and wherein a gate withstand voltage of a drive MOS transistor connected to the control gate control line is lower than a gate withstand voltage of the first transistor section.