Patent ID: 6991973

Claim:
A method for manufacturing a thin film transistor, comprising steps of: (a) providing an insulating substrate; (b) sequentially forming a source/drain layer, a primary gate insulating layer, and a first conducting layer on said insulating substrate; (c) etching said first conducting layer to form a primary gate directly located on and contacting with a surface of said primary gate insulating layer, (d) forming a secondary gate insulating layer directly located on and horizontally contacting with said surface of said primary gate insulating layer and directly located on and contacting with a surface of said primary gate and a second conducting layer directly located on and contacting with a surface of said secondary gate insulating layer; and (e) etching said second conducting layer and said secondary gate insulating layer to form a first secondary gate and a second secondary gate both directly located on, contacting with, and located beside said surface of said secondary gate insulating layer.