Patent ID: 7519526

Claim:
A method of analyzing a circuit, the method comprising: obtaining a design for the circuit, the design including a set of Silicon-on-Insulator (SOI) transistors and a set of nodes, each node corresponding to a node on a SOI transistor in the set of SOI transistors; generating a behavioral model for the circuit, the generating including: obtaining an initial charge for a node in the set of nodes based on a non-equilibrium initial condition, the node comprising a body node for a SOI transistor in the set of SOI transistors; obtaining an initial charge for at least one of the set of nodes based on a DC equilibrium for the node, wherein none of the at least one of the set of nodes is the body node for the SOI transistor; simulating operation of the circuit over a set of input cycles based on the initial charges for the set of nodes; and identifying at least one performance attribute for the circuit based on the simulating, the at least one performance attribute comprising at least one of: a delay, a slew, a power consumption, or a leakage, wherein the behavioral model is generated based on the at least one performance attribute; determining an effect of a transient event on the circuit, the transient event comprising one of: an electrostatic discharge or a charged particle, the determining including: adjusting an initial charge for at least one of the set of nodes to simulate the transient event; simulating operation of the circuit over the set of input cycles based on the adjusted initial charge for the at least one of the set of nodes; and determining the effect of the transient event for the circuit based on the simulating; and providing the at least one performance attribute, the behavioral model, and the effect of the transient event for use by a user.