Patent ID: 8518791

Claim:
A method for forming a semiconductor device on a substrate having at least two contact studs formed in a planar surface thereof, the method comprising: forming an insulating layer overlying said planar surface; selectively removing a portion of said insulating layer and a selected portion of said planar surface to form an opening extending to and partially between said at least two contact studs; forming first spacers adjoining sides of said opening over said at least two contact studs; forming bottom electrode spacers, each contacting respective ones of said at least two contact studs in said opening adjoining said first spacers; forming an insulating cap in said opening between said at least two contact studs and said bottom electrode spacers; forming a ferroelectric dielectric layer in said opening over said insulating layer, said insulating cap and between said bottom electrode spacers; forming a pair of top electrodes within said opening comprising first and second side portions displaced laterally from respective ones of said bottom electrode spacers by said ferroelectric dielectric layer; forming an additional insulating layer between said top electrodes and over said ferroelectric dielectric layer; and forming first and second contacts to respective ones of said pair of top electrodes within said additional insulating layer.