Patent ID: 8592789

Claim:
A nonvolatile semiconductor memory device comprising: a plurality of first wires formed above a semiconductor substrate and extending in a first direction of a main surface of the semiconductor substrate; a plurality of diodes formed above the respective plurality of first wires at a predetermined interval; a plurality of nonvolatile memories formed above the plurality of diodes and electrically connected to the plurality of diodes; and a plurality of second wires formed above the plurality of nonvolatile memories and extending in a second direction orthogonal to the first direction, each of the plurality of diodes functioning as a selective element of each of the plurality of nonvolatile memories, each of the plurality of diodes having a column-shaped stacked structure vertically stacked above the main surface of the semiconductor substrate, the stacked structure including: a first-conductivity type semiconductor layer having a first resistivity, formed above each of the plurality of first wires and electrically connected to the plurality of first wires; a plurality of polycrystalline semiconductor layers each having a second resistivity higher than the first resistivity, stacked above the first-conductivity type semiconductor layer; and a second-conductivity type semiconductor layer having a third resistivity lower than the second resistivity, formed above the plurality of polycrystalline semiconductor layers and electrically connected to the plurality of nonvolatile memories, and the plurality of first wires and the plurality of second wires configuring word lines and bit lines for selecting the plurality of nonvolatile memories.