Patent ID: 8492295

Claim:
A semiconductor structure fabrication method, said method comprising: providing a structure which includes: a semiconductor substrate, a transistor on the semiconductor substrate, N interconnect layers on the semiconductor substrate, and a temporary filling region within the N layers, wherein the temporary filling region is filled with a temporary filling material, wherein each interconnect layer includes an interlevel dielectric (ILD) layer and a metal line electrically coupled to the transistor, and wherein N is at least 2; and heating the temporary filling region at a high temperature sufficiently high to result in the temporary filling material being replaced by a cooling pipes system that does not include any solid or liquid material, wherein a first portion and a second portion of the cooling pipes system are each in direct physical contact with a surrounding ambient at a first interface and a second interface, respectively, such that a first direction perpendicular to the first interface is perpendicular to a second direction perpendicular to the second interface, and wherein a totality of interfaces between the cooling pipes system and the ambient consists of the first interface and the second interface.