Patent ID: 7554854

Claim:
A method for deleting data from a NAND-type nonvolatile memory which includes a bit line, a source line, a NAND-type cell including first and second nonvolatile memory elements connected in series, and a selection transistor, wherein each of the first and second nonvolatile memory elements includes a semiconductor film, a charge accumulating layer formed over the semiconductor film with a tunnel insulating film interposed therebetween, and a control gate formed over the charge accumulating layer with an insulating film interposed therebetween; wherein one of terminals of the NAND-type cell is connected to the bit line through the selection transistor; and wherein the other terminal of the NAND-type cell is connected to the source line, the method comprising the step of: releasing a charge stored in the charge accumulating layer of the first nonvolatile memory element, by applying a first potential to the bit line and the source line, a second potential to the control gate of the first nonvolatile memory element, and a third potential which is different from the second potential to the control gate of the second nonvolatile memory element.