Patent ID: 7395307

Claim:
A 4-bit carry look ahead circuit forming a combined propagate signal and a combined generated signal comprising: a first NAND gate ( 101 ) having a first input receiving a propagate signal from the first bit, a second input receiving a propagate signal from the second bit and an output; a second NAND gate ( 102 ) having a first input receiving a propagate signal from the third bit, a second input receiving a propagate signal from the fourth bit and an output; a NOR gate ( 103 ) having a first input connected to said output of said first NAND gate, a second input connected to said output of said second NAND gate and an output forming the combined propagate signal for the four bits; a first AND-NOR gate ( 201 ) having a first AND input receiving a generate signal from the first bit, a second AND input receiving a propagate signal from the second bit, a NOR input receiving a generate signal from the second bit and an output; a second AND-NOR gate ( 202 ) having a first AND input receiving a generate signal from the third bit, a second AND input receiving a propagate signal from the fourth bit, a NOR input receiving a generate signal from the fourth bit and an output; and a OR-NAND gate ( 251 ) having a first OR input connected to said output of said first AND-NOR gate, a second OR input connected to said output of said second NAND gate, a NAND input connected to said output of said second AND-NOR gate and an output forming the combined generate signal for the four bits.