Patent ID: 7746106

Claim:
An integrated circuit, comprising: a plurality of interconnected logic blocks, each of the logic blocks comprising: a logic circuit having an input coupled to an input of the logic block, and further having first and second outputs; and means for placing, during an initial cycle, a self-timed first data signal on the second output of the logic circuit onto a first output of the logic block, and for placing, during subsequent cycles, a self-timed second data signal on a selected one of the first or second outputs of the logic circuit onto the first output of the logic block, wherein the means for placing is coupled to provide an output token with the second data signal during the initial cycle only when a first token is received indicating valid new data on the second output of the logic circuit and a second token is received indicating a valid new value on a select signal controlling selection of the selected one; and wherein the means for placing is coupled to provide the output token with the second data signal during the subsequent cycles only when either one of the following is true: the first output of the logic circuit is the selected one, and tokens are received indicating valid new data on the first output of the logic circuit and on the select signal; or the second output of the logic circuit is the selected one, and tokens are received indicating valid new data on the first and second outputs of the logic circuit and on the select signal.