Patent ID: 7632728

Claim:
A method of manufacturing a semiconductor device comprising: preparing a substrate having an n-type semiconductor area and a p-type semiconductor area insulated from each other; forming gate dielectric films on the n-type semiconductor area and the p-type semiconductor area, respectively; alternately supplying tantalum (Ta) and carbon (C) on the gate dielectric film on the n-type semiconductor area to form a first Ta—C alloy film in which a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more; simultaneously supplying tantalum (Ta) and carbon (C) onto the gate dielectric film on the p-type semiconductor area to form a second Ta—C alloy film in which a crystal orientation ratio of a TaC (111) face in a film thickness direction [TaC (111) face/{TaC (111) face+TaC (200) face}] is 60% or less; and processing the first TaC alloy film on the n-type semiconductor area and the second TaC alloy film on the p-type semiconductor area into gate electrode patterns.