Patent ID: 8692367

Claim:
A process comprising: forming resilient leads on a wafer configured to be segmented into integrated circuit chips; applying a guard to the wafer, the guard configured to protect the resilient leads; and segmenting the wafer to separate an integrated circuit chip from the wafer, the integrated circuit chip including at least one resilient lead, wherein the at least one resilient lead is configured to move from a first position to a second position during an assembly reflow process, the resilient lead being held adjacent to the integrated circuit chip in the first position and extending away from the integrated circuit chip in the second position to provide electrical interconnection of the integrated circuit chip to a printed circuit board; wherein the forming of resilient leads on the wafer comprises: applying a first isolation layer onto the wafer, the first isolation layer having apertures formed therein over bonding pads disposed on the wafer; forming regions of a sacrificial material over the first isolation layer; applying a redistribution layer over the regions of sacrificial material, the redistribution layer at least partially extending into the apertures formed in the first isolation layer to provide electrical contact with the bonding pads; applying a second isolation layer over the redistribution layer and the first isolation layer; providing under bump metallization over the redistribution layer; forming μbumps over the under bump metallization; and removing the regions of sacrificial material so that the redistribution layer applied over the regions of sacrificial material is generally cantilevered over the first isolation layer.