Patent ID: 7560316

Claim:
A thin film transistor array panel, comprising: a substrate; a gate line formed on the substrate and including a gate pad for contact with an external driving circuit; a gate insulating layer formed on the substrate and having a first contact hole exposing the gate pad; a first semiconductor layer formed on the gate insulating layer; a data line formed on the gate insulating layer and the first semiconductor layer, and including a source electrode; a drain electrode disposed opposite the source electrode; a conductor formed on the gate insulating layer and connected to the gate pad through the first contact hole; a first passivation layer formed on the data line, the drain electrode, and the conductor, and having a second contact hole exposing the drain electrode; a reflective electrode formed on the first passivation layer; a color filter formed on the reflective electrode and the first passivation layer; and a transparent electrode formed on the color filter, connected to the drain electrode through the second contact hole, and also connected to the reflective electrode.