Patent ID: 7623122

Claim:
An electro-optical device comprising: an electro-optical panel that includes a plurality of scanning lines, a plurality of data lines, and pixels provided corresponding to intersections of the scanning lines and the data lines; a first scanning line driving circuit that outputs first scanning signals to odd-numbered scanning lines of the plurality of scanning lines; and a second scanning line driving circuit that outputs second scanning signals to even-numbered scanning lines of the plurality of scanning lines, the second scanning line driving circuit being opposite to the first scanning line driving circuit with a pixel forming region having the pixels formed therein interposed therebetween, wherein the first scanning line driving circuit includes: a first shift register unit that is constituted by cascading a plurality of first shift unit circuits which sequentially shift a start pulse, on the basis of a clock signal, to output first output signals; a first output control circuit that has a plurality of first calculation unit circuits which are provided corresponding to the first shift unit circuits, the first calculation unit circuits calculating the logical products of the first output signals and the second scanning signals output through the corresponding even-numbered scanning lines from the second scanning line driving circuit to generate the first scanning signals; and a first output buffer unit that is connected to the odd-numbered scanning lines to output the first scanning signals to the corresponding odd-numbered scanning lines, and the second scanning line driving circuit includes: a second shift register unit that is constituted by cascading a plurality of second shift unit circuits which sequentially shift the start pulse, on the basis of the clock signal, to output second output signals; a second output control circuit that has a plurality of second calculation unit circuits which are provided corresponding to the second shift unit circuits, the second calculation unit circuits calculating the logical products of the second output signals and the first scanning signals output through the corresponding odd-numbered scanning lines from the first scanning line driving circuit to generate the second scanning signals; and a second output buffer unit that is connected to the even-numbered scanning lines to output the second scanning signals to the corresponding even-numbered scanning lines, wherein the first output control circuit is provided between the first shift register unit and the first output buffer unit, and the second output control circuit is provided between the second shift register unit and the second output buffer unit.