Patent ID: 7078629

Claim:
A multilayer wiring board adapted to receive a semiconductor chip to be soldered thereto, comprising: an insulating layer; a plurality of electrode pads provided on said insulating layer so that each of said electrode pads is located corresponding to an associated one of a plurality of solder bumps of the semiconductor chip to be soldered; a solder resist covering said insulating layer and said electrode pads; openings provided in said solder resist coveting said electrode pads, each of said openings reaching a surface of the electrode pads; and solder filled into the openings of said solder resist, wherein each of the electrode pads corresponding to the solder bumps located near an outer periphery of the semiconductor chip to be soldered has an oblong shape, each of the openings of said solder resist is smaller than said oblong shape, and a center of said opening has a fixed location with respect to a center of said oblong shape so as to be offset from the center of said oblong shape in a direction toward a center of the semiconductor chip to be soldered.