Patent ID: 7528402

Claim:
A non-volatile semiconductor memory device, comprising: a plurality of lower electrodes arranged in a matrix form having a plurality of rows and columns; an interlayer insulating film covering each of the lower electrodes; a plurality of apertures selectively formed in the interlayer insulating film, the apertures being arranged separately from one another and in parallel to one another in a column direction, each of the apertures being extended continuously in a row direction to expose respective parts of all the lower electrodes belonging to an associated one of the rows of the matrix; and a plurality of recording layers selectively formed over the interlayer insulating film and each containing a phase change material, the recording layers being arranged separately from one another and in parallel to one another in a row direction, each of the recording layers being extended continuously in a column direction to be in contact through the corresponding ones of the apertures with the respective parts of all the lower electrodes belonging to an associated one of the columns of the matrix.