Patent ID: 8339867

Claim:
A margin restore fuse element, comprising: a semiconductor substrate including active circuitry fabricated front-end-of-the-line (FEOL) on the semiconductor substrate, the active circuitry including a latch operative as an amplifier and configured to store temporary data in response to an enable signal, and a restore circuit electrically coupled with the latch; an interlayer interconnect structure fabricated FEOL above and in contact with the semiconductor substrate and positioned vertically above the active circuitry: and a memory layer vertically fabricated back-end-of-the-line (BEOL) directly above the semiconductor substrate and in contact with the interlayer interconnect structure, the memory layer including a plurality of re-writeable non-volatile BEOL memory elements having exactly two terminals, each BEOL memory element including an ion reservoir and a tunnel barrier electrically in series with each other and with its two terminals, the ion barrier including mobile oxygen ions, the BEOL memory elements retain stored data in an absence of electrical power, the BEOL memory elements including a first BEOL memory element configured to store a first resistive value and electrically coupled with the latch and the restore circuit through the interlayer interconnect structure, and a second BEOL memory element configured to store a second resistive value that is different than the first resistive value and electrically coupled with the latch and the restore circuit through the interlayer interconnect structure, wherein the restore circuit is configured to perform a restore data operation to substantially restore the first and second BEOL memory elements to the first and second resistive values, respectively, and the latch is operative to generate restore data used by the restore circuit to perform a restore data operation.