Patent ID: 8119479

Claim:
A method for fabricating a flash memory device, the method comprising: providing a semiconductor substrate, the semiconductor substrate having a surface region; forming a flash memory device structure overlying a portion of the semiconductor substrate, the flash memory device structure having a select gate overlying the surface region, a first oxide spacer formed overlying a first edge and a second oxide spacer formed overlying a second edge of the select gate, a tunnel oxide layer formed overlying a first region of the surface region and formed overlying a second region of the surface region, a first poly spacer formed overlying the first oxide spacer on the first edge and a portion of the first region, a second poly spacer formed overlying the second oxide spacer on the second edge and a portion of the second region; forming a filler material overlying at least the first poly spacer, second poly spacer, and an exposed portion of the tunnel oxide layer; forming a masking layer overlying at least the first poly spacer, while exposing a spatial region within a vicinity of the second poly spacer; subjecting the spatial region within the vicinity of the second poly spacer to an etching process to remove a height of the second poly spacer, while maintaining a portion of the second poly spacer; removing exposed portions of the filler material, while maintaining the masking layer; and selectively removing a remaining portion of the second poly spacer.