Patent ID: 8872275

Claim:
An SRAM device, comprising: a flip-flop circuit having a non-inverting output terminal and an inverting output terminal; a first tunnel transistor that is connected between the non-inverting output terminal and a first bit line and allows a current to flow in a direction from the non-inverting output terminal to the first bit line when the first tunnel transistor turns on; a second tunnel transistor that is connected in parallel with the first tunnel transistor between the non-inverting output terminal and the first bit line and allows a current to flow in a direction from the first bit line to the non-inverting output terminal when the second tunnel transistor turns on; a third tunnel transistor that is connected between the inverting output terminal and a second bit line and allows a current to flow in a direction from the inverting output terminal to the second bit line when the third tunnel transistor turns on; and a fourth tunnel transistor that is connected in parallel with the third tunnel transistor between the inverting output terminal and the second bit line and allows a current to flow in a direction from the second bit line to the inverting output terminal when the fourth tunnel transistor turns on, wherein the first tunnel transistor has a higher drive power than the second tunnel transistor, the third tunnel transistor has a higher drive power than the fourth tunnel transistor, and one region of source and drain regions in each of the first to fourth tunnel transistors is p-type and the other region is n-type.