Patent ID: 8174079

Claim:
A semiconductor device comprising: a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a silicide gate electrode of an n-type MISFET formed on the gate insulation film; a silicide gate electrode of a p-type MISFET formed on the gate insulation film and having a thickness smaller than that of the silicide gate electrode of the n-type MISFET, the silicide gate electrode of the p-type MISFET being fully-silicided, the silicide gate electrode of the n-type MISFET being fully-silicided; and spacers and sidewalls provided on side surfaces of each of the silicide gate electrode of the n-type MISFET and the p-type MISFET, wherein a material of a metal in the silicide gate electrode of the p-type MISFET is the same as a material of a metal in the silicide gate electrode of the n-type MISFET, a top surface of the silicide gate electrode of the n-type MISFET is higher than top surfaces of the spacers and sidewalls, and a top surface of the silicide gate electrode of the p-type MISFET is lower than top surfaces of the spacers and sidewalls.