Patent ID: 7897503

Claim:
A method for fabricating an infinitely stackable interconnect device, the method comprising: forming a substrate from a single wafer having a first surface and an opposing second surface; forming a recessed region in the substrate sized to accommodate at least one die in a stack; forming at least one via in the substrate passing from the first surface to the opposing second surface; at least partially filling the via with conductive material to form a conductive via; forming at least one first interconnection pad on the first surface in electrical communication with the conductive via; forming at least one second interconnection pad on the second surface in electrical communication with the conductive via; forming at least one redistribution trace at one of said first and second surfaces of said substrate and in communication with at least one of said first and second interconnection pads; mounting a die to the substrate in electrical communication with the first or second interconnection pad to form a packaged subsystem; singulating the packaged subsystem by dicing and; mounting the packaged subsystem to at least one subsequent packaged subsystem to form a stack.