Patent ID: 8427497

Claim:
A method for processing a graphics surface, said surface having an array of T tiles, wherein each tile of the array of T tiles has a plurality of pixels, the method comprising: setting a state for a pattern caching bit associated with the graphics surface, wherein the state of the pattern caching bit is configured to provide an indication as to whether a caching operation is enabled for the graphics surface; setting P tile pattern bits, wherein each of the P tile pattern bits is associated with at least one of the T tiles; and responsive to the state of the pattern caching bit indicating that the caching operation is enabled for the graphics surface, storing V pixel values in a cache memory, wherein each of the V pixel values corresponds to at least one of the T tiles, and wherein the method further comprises determining whether all of the plurality of pixels of at least one of the T tiles of the graphics surface have a common pixel value, wherein responsive to all of the plurality of pixels of at least one of the T tiles of the graphics surface having a common pixel value, setting the pattern caching bit to an active state to provide an indication that the caching operation is enabled for the graphics surface, setting at least one of the P tile pattern bits associated with the at least one of the T tiles having the common pixel value to the active state, and setting at least one of the V pixel values corresponding to the at least one of the T tiles having the common pixel value to the common pixel value.