Patent ID: 7366046

Claim:
A sense amplifier, comprising: a differential amplifier adapted to amplify an input voltage difference (V P −V N ) between a pair of bit lines, wherein a first one of the bit lines is charged to the voltage V P and a second one of the bit lines is charged to the voltage V N , the differential amplifier amplifying the input voltage difference according to a gain G so as to drive an output voltage difference (V P0 −V N0 ) between a pair of output nodes, wherein a first one of the output nodes is charged to the voltage V P0 and a second one of the output nodes is charged to the voltage V N0 , the differential amplifier having a non-zero offset bias voltage (ΔV) such that if the input voltage difference is zero, the output voltage difference is non-zero; and a self-bias generation circuit adapted to couple the first output node to the second bit line such that the output voltage V P0 equals the input voltage V N and to couple the second output node to the first bit line such that the output voltage V N0 equals the input voltage V P , the offset bias voltage ΔV thereby being reduced responsive to the gain G.