Patent ID: 8097515

Claim:
A method for forming a nanowire field effect transistor (FET) device, the method comprising: forming a nanowire over a semiconductor substrate; forming a gate structure around a portion of the nanowire; forming a capping layer on the gate structure; forming a first spacer adjacent to sidewalls of the gate and around portions of nanowire extending from the gate; forming a hardmask layer on the capping layer and the first spacer; removing exposed portions of the nanowire; epitaxially growing a doped semiconductor material on exposed cross sections of the nanowire to form a source region and a drain region; forming a silicide material in the epitaxially grown doped semiconductor material; forming a conductive material on the source and drain regions by: depositing a first layer of conductive material on the substrate, the source and drain regions, and the hardmask layer; removing a portion of the first layer of conductive material and the hardmask layer; depositing a second layer of conductive material on the first layer of conductive material and the capping layer; patterning a protective mask material on the second layer of conductive material; and etching to define a contact in the source region, a contact in the drain region, and a contact in a gate region; and forming an isolation region around the device.