Patent ID: 8526539

Claim:
A signal shaper for generating an output signal representing a binary sequence, the output signal being a time-dependence of a signal value F, comprising: the signal shaper is configured to receive a first signal value F 0 and a different second signal value F 1 ; receive a sequence of data bits, each data bit having a state which is either “zero” or “one”, the sequence containing at least a first data bit and a subsequent second data bit; determine the state of the first data bit and the state of the second data bit; if the state of the first data bit and the state of the second data bit are determined to be “zero” and “one”, respectively, controlling the signal value F to change monotonically from the first signal value F 0 at a first point in time via one or more intermediate values at intermediate points in time to a second signal value F 1 at a later second point in time; and, if the state of the first data bit and the state of the second data bit are determined to be “one” and “zero”, respectively, controlling the signal value F to change monotonically from the second signal value F 1 at the first point in time via one or more intermediate values at intermediate points in time to the first signal value F 0 at the second point in time, wherein the signal value F is an oscillation frequency delivered by a phase-locked loop; wherein the signal shaper is in an integrated circuit.