Patent ID: 8748251

Claim:
A method for manufacturing a semiconductor device, the method comprising: providing a substrate having first and second regions; forming an interlayer dielectric layer on the substrate, wherein the interlayer dielectric layer includes a first trench on the first region of the substrate and a second trench on the second region of the substrate; forming a gate dielectric layer on a surface of the interlayer dielectric layer, on side and bottom surfaces of the first trench, and on side and bottom surfaces of the second trench; forming an etch stop dielectric layer on the gate dielectric layer, wherein the gate dielectric layer and the etch stop dielectric layer comprise different materials; forming a metal layer on the etch stop dielectric layer filling the first and second trenches; and removing the metal layer in the first region including the first trench using the etch stop dielectric layer as an etch stop.