Patent ID: 6916716

Claim:
A method of manufacturing, comprising: forming a symmetric transistor and an asymmetric transistor on a substrate, the symmetric transistor having a first gate on the substrate, a first source/drain region and second source/drain region in the substrate, the asymmetric transistor having a second gate on the substrate, a first source region and a first drain region in the substrate; forming a first mask on the substrate with a first opening to enable implantation of first and second halo regions proximate the first and second source/drain regions of the symmetric transistor; forming the first and second halo regions of a first dosage beneath the first gate by implanting off-axis through the first opening at a first twist angle and then a second and substantially opposite twist angle; removing the first mask; forming a second mask on the substrate with a second opening to enable implantation formation of a third halo region proximate the first source region of the second asymmetric transistor but prevent formation of a halo region proximate the first drain region; and forming the third halo region of a second dosage greater than the first dosage by implanting off-axis through the second opening.