Patent ID: 8665003

Claim:
A dead-time generating circuit comprising: a constant current circuit configured to generate a constant current whose magnitude is determined by an external resistor; a current generating circuit configured to generate a capacitor-charge current corresponding to the constant current; a control circuit configured to receive a dead time control signal and a comparator signal, the control circuit being configured to generate a dead time generating signal based on the dead time control signal and the comparator signal, and a charge/discharge signal based on the dead time generating signal, wherein the dead time generating signal is delayed from a rise timing or a fall timing of the dead time control signal by a delay time; and a charge/discharge circuit configured to control charging or discharging of a capacitor using the capacitor-charge current from the current generating circuit in accordance with the charge/discharge signal, wherein the charge/discharge circuit is also configured to (1) compare a voltage of the capacitor with a threshold voltage, (2) generate the comparator signal when the voltage of the capacitor exceeds the threshold voltage, and (3) output the comparator signal to the control circuit, and wherein the control circuit generates the charge/discharge signal for a duration starting from a time when the delay time has elapsed from the rise or fall timing of the dead time control signal until the control circuit receives the comparator signal, and wherein the control circuit stops generating the charge/discharge signal in response to receipt of the comparator signal by the control circuit.