Patent ID: 8046506

Claim:
A First-in-First-Out (FIFO) system, for transferring data between a first device and a second device and handling access of a memory device, wherein the FIFO system is coupled between the first and second devices, and the memory device, comprising: a CPU, executing status instructions to control data transfer between the first and second devices; at least two data FIFOs, serving as data buffers dedicated to buffer data instructions transferred between the first and second devices; at least one status FIFO, coupled to the CPU, serving as an instruction buffer dedicated to buffer status instructions transferred between the first device, the second device and the CPU; and a FIFO controller, establishing a bidirectional data path between the first and second devices through the at least two data FIFOs, wherein the bidirectional data path is a direct data path that does not occupy the memory device, and wherein the memory device is separate from the at least two data FIFOs and the at least one status FIFO, the at least two data FIFOs comprises a first and a second data FIFOs, and wherein the FIFO controller further comprises a memory controller to access the memory device and a data controller, the data controller comprising: a first selector, having two input ends respectively connected to the second data FIFO and the memory controller, and one output end connected to the first data FIFO, selectively passing a data instruction sent from the second data FIFO or the memory controller to the first data FIFO; and a second selector, having two input ends respectively connected to the first data FIFO and the memory controller, and one output end connected to the second data FIFO, selectively passing a data instruction sent from the first data FIFO or the memory controller to the second data FIFO.