Patent ID: 8901553

Claim:
A semiconductor device comprising: a multilayer wiring layer including a first wiring layer and a second wiring layer located over said first wiring layer; a first wire embedded into said first wiring layer; a gate electrode embedded into said first wiring layer; a gate insulation film formed between said first wiring layer and said second wiring layer and located over said gate electrode; a diffusion prevention film formed between said first wiring layer and said second wiring layer and located over said first wire; a semiconductor film formed between said first wiring layer and said second wiring layer and located over said gate insulation film; and vias embedded into said second wiring layer and coupled to said semiconductor film, wherein said gate insulation film is thinner than said diffusion prevention film, and wherein said diffusion prevention film and said gate insulation film are an identical insulation film, and said diffusion prevention film has a recess at a part to act as said gate insulation film.