Patent ID: 8817973

Claim:
An encrypting method performed by an encrypting apparatus having a processor, the encrypting method having a countermeasure function against power analyzing attacks by performing an exponential remainder calculation y=a d (mod n) from an exponent d expressed by u-bit binary, input data a, and a modulo n to encrypt the input data a, the encrypting method comprising: calculating, using the processor, a′=a 2 (mod n); calculating, using the processor, y=(a) f (mod n) on an exponent f that expresses higher order u−1 bits of d; calculating, using the processor, y=y×a (mod n) with d 0 =1; and outputting the calculated y as encrypted data y=a d (mod n) of the input data a, wherein when g is a least significant bit of d and f is higher order u−1 bits of d, by using f and g satisfying d=2×f+g, a calculation of a d (mod n)=((a 2 ) f )×a g (mod n) is performed.