Patent ID: 8151225

Claim:
A pattern layout designing method comprising: creating, using a computer, a graph in which mask patterns adjacent to one another at a distance in which desired printing resolution cannot be obtained in a lithography process or a distance in which an assist pattern for obtaining the desired printing resolution cannot be arranged among mask patterns generated based on a pattern layout design drawing are set as nodes connected to one another by edges; extracting, using a computer, closed loops from the created graph; selecting, using a computer, an odd number loop formed by an odd number of nodes from the extracted closed loops; when the selected odd number loop is isolated, arbitrarily selecting nodes from the selected odd number loop as rearrangement target nodes; when the selected odd number loop is not isolated, based on whether a closed loop group, in which a plurality of closed loops including the odd number loop are connected, includes an even number loop formed by an even number of nodes, selecting rearrangement target nodes from the odd number loop included in the closed loop group according to different selection criteria; and rearranging, using a computer, a layout of patterns described in the pattern layout design drawing corresponding to the selected rearrangement target nodes.