Patent ID: 7042379

Claim:
A current switching digital-to-analog converter (DAC), comprising: an analog output node for which a “zero” potential has been defined which provides said DAC's analog output voltage; a digital input which receives a plurality of digital bits representative of a desired analog output voltage; a first clock signal CK; a second clock signal {overscore (CK)} which is the inverse of said first clock signal; a plurality of current sources having respective outputs which are selectively directed to respective intermediate nodes in response to respective control signals, the states of said control signals varying with said digital bits and changing states in synchronization with said first clock signal CK; a control signal; a plurality of return-to-zero (RZ) current switch circuits connected between respective intermediate nodes and said analog output node, each of said RZ circuits comprising: a first transistor connected between the intermediate node and said analog output node and driven with a fixed bias voltage V bias , and a second transistor connected between the intermediate node and a fixed voltage and driven with said control signal; said DAC arranged such that said control signal toggles above and below V bias such that, when said control signal toggles below V bias , said second transistor turns off and said first transistor turns on and directs current to said analog output node, and when said control signal toggles above V bias , said first transistor turns off and said second transistor turns on and directs current to said fixed voltage; and an output network connected to said analog output node and arranged such that said analog output voltage is pulled to said “zero” potential when the currents applied to said intermediate nodes are directed to said fixed voltage via said RZ circuits.