Patent ID: 7974071

Claim:
A multilayer capacitor comprising: a dielectric body having an approximately rectangular parallelepiped shape formed by stacking a plurality of dielectric layers; a first internal conductor layer, arranged inside said dielectric body sandwiched between said dielectric layers, having a first lead portion led out straddling a first longitudinal direction side face and two lateral direction side faces of said dielectric body; a second internal conductor layer, arranged inside said dielectric body via said dielectric layer to said first internal conductor layer, having a second lead portion led out straddling a second longitudinal direction side face and two lateral direction side faces of said dielectric body; a first terminal electrode connected to said first lead portion, formed on an outer face of said dielectric body, straddling said first longitudinal direction side face and two lateral side faces; and a second terminal electrode connected to said second lead portion, formed on an outer face of said dielectric body, straddling said second longitudinal direction side face and two lateral side faces, wherein; a first space pattern is formed on said first lead portion at a position along with said first longitudinal direction side face which is not connected with said first terminal electrode, said first space pattern is formed at a center position of said first longitudinal direction side face, a ratio of L 1 /L 0 is within a range of 0.2 to 0.5 in case that a longitudinal width of said first space pattern is L 1 , and a longitudinal width of said dielectric body is L 0 , a ratio of L 0 /W 0 is within a range of 1.6 to 3 in case that a longitudinal width of said dielectric body is L 0 , and a width of lateral direction of said dielectric body is W 0 , a ratio of W 1 /W 0 is within a range of 0.25 to 0.4 in case that a width of the first lead portion led out to the lateral direction side face of said dielectric body is W 1 , a plane pattern of said first internal conductor layer having said first space pattern is line symmetry pattern to a centerline passing through a longitudinal middle portion of said dielectric body, a second space pattern which is not connected with said second terminal electrode, is formed on said second lead portion at a position along with said second longitudinal direction side face, said second space pattern and said first space pattern have same shape and same size, and a width of space W 2 of the first space pattern is comparable to a width of space of an insulating space, and W 2 is 100 to 200 μm.