Patent ID: 7257165

Claim:
A receiver circuit, adapted to receive an input signal from a transmitter in a communication system, comprising: (a) an input node capable of receiving an analog input signal and a plurality of reference samples H(n); (b) an FFT generator, adapted to receive the analog input signal, wherein the FFT generator generates a plurality of complex frequency domain samples R(n); (c) a first complex conjugator, adapted to receive the plurality of reference samples H(n), wherein the first complex conjugator generates a plurality of reference sample complex conjugates H*(n); (d) a first multiplier, adapted to receive the plurality of complex frequency domain samples R(n) and the plurality of reference sample complex conjugates H*(n), wherein the first multiplier multiplies the plurality of complex frequency domain samples R(n) by the plurality of reference sample complex conjugates H*(n) and generates a plurality of resultant vectors C(n); (e) a difference vector multiplier, adapted to receive the plurality of resultant vectors C(n), wherein the difference vector multiplier generates a plurality of difference vectors D(n); (f) an accumulator, adapted to receive the plurality of difference vectors D(n), wherein the accumulator generates a vector sum S and outputs a magnitude and a phase based on the vector sum S; (g) a timing error estimator, adapted to receive the phase, wherein the timing error estimator generates a timing error k based on the phase; and (h) a comparator, adapted to receive the magnitude, wherein the comparator detects a preamble based on the magnitude.