Patent ID: 6876630

Claim:
A reframer, comprising: a first circuit that detects a frame start point of input data based on a frame alignment signal defined in a framed data of a digital hierarchy signal, the first circuit designating a start location of the frame alignment signal as a frame start point detecting value; and a second circuit that excludes the input data having an improper start point based on the frame start point detecting value, and that outputs reframed data having a normal frame format, wherein the reframed data is based on the excluded input data, wherein the fast circuit includes: an input selecting circuit that shifts the input data, maps respective bits of the shifted input data, and selects a plurality of checking patterns on a bit by bit basis according to the shifted input data; a frame start point detecting circuit that receives the checking patterns outputted from the input selecting circuit, and that detects the frame start point which designates the start location of the frame alignment signal as the frame start point detecting value; an initial value setting circuit that sets an initial value for counting improper input data based on the frame start point detecting value, and that generates a control signal; and a counter that counts a number of input data bits having improper data, as count results, from the frame start point, according to the control signal and the initial value.