Patent ID: 8692701

Claim:
A pipelined A/D converter circuit, comprising: a sample hold circuit configured to sample and hold an analog input signal, and thereafter, output a sample hold signal; and an A/D converter circuit configured to include a plurality of A/D converter circuit parts that are connected to each other in cascade as plural stages, and perform A/D conversion in a pipelined form, wherein the A/D converter circuit part of each stage comprises: a sub-A/D converter circuit configured to include a plurality of comparators, and A/D convert the input signal into a digital signal of predetermined bits; a multiplier D/A converter circuit configured to D/A convert the digital signal from the sub-A/D converter circuit into an analog control signal generated with a reference voltage served as a reference value, sample, hold and amplify the input signal with a plurality of sampling capacitors based on the analog control signal; and a precharge circuit configured to charge the sampling capacitor on a rear stage side with an intermediate voltage value between an upper limit and a lower limit of the reference voltage in accordance with comparison result signals outputted from the plurality of comparators included in the sub-A/D converter circuit before the sampling is performed in the multiplier D/A converter circuit on the rear stage side, wherein the precharge circuit comprises: a first control switch configured to connect the plurality of sampling capacitors in series as a plurality of combined capacitances between a positive reference voltage source and a negative reference voltage source; and a second control switch configured to connect the plurality of sampling capacitors in parallel between the positive reference voltage source and the negative reference voltage source, and wherein the charging is performed by connecting in series the plurality of sampling capacitors in series as a plurality of combined capacitances by means of the first control switch between the positive reference voltage source and the negative reference voltage source, and thereafter changing connection of the plurality of sampling capacitors to parallel connection by means of the second control switch.