Patent ID: 7546332

Claim:
A circuit to output a mathematical function of an input to the circuit, the circuit comprising a plurality of core cells, each core cell having: first and second transistors, each having first and second terminals and a control terminal, the conduction between the first and second terminals being controlled by the voltage between the control terminal and the first terminal; the first and second transistors of each core cell having their first terminals coupled together and through a respective weighted current source to a first power supply terminal; the first transistor of each core cell having its second terminal coupled to the output and the second transistor of each core cell having its second terminal coupled to a second power supply terminal; the control terminal of one of the first and second transistors of each core cell being coupled to the input and the control terminal of the other of the first and second transistors of each core cell being coupled to a respective reference voltage; the respective reference voltage supplied to each of the plurality of core cells being a monotonically increasing integer value times the reference voltage supplied to the first core cell.