Patent ID: 8027826

Claim:
An evaluation device comprising: a microprocessor programmed to perform as: a logic simulator of a logic circuit capable of being connected with an opposing connection device via a network; a simulation result table storing a request packet and a response packet while being made correspondent to each other, the response packet being obtained by performing logic simulation with respect to the request packet by the logic simulator; a target packet determination part determining presence or absence of a target packet transmitted to the opposing connection device upon receiving of the request packet from the opposing connection device via the network, the target packet corresponding to the response packet made correspondent to the request packet in the simulation result table; a response packet output part reading out the target packet from the simulation result table and transmitting the target packet to the opposing connection device upon determination of the presence of the target packet by the target packet determination part; a controller forcing the logic simulator to perform the logic simulation for the request packet and disconnecting the connection with the opposing connection device upon determination of the absence of the target packet by the target packet determination part, and performing connection with the opposing connection device again after completion of the logic simulation by the logic simulator; and a table generating part writing the response packet of the request packet obtained by the logic simulator into the simulation result table, the response packet being made correspondent to the request packet.