Patent ID: 8090832

Claim:
A computer storage system, comprising: a cluster of nodes, each node having an N module and a D module, the D module connected to a writeable storage device and a cluster switching fabric configured to establish a connection between the nodes of the cluster of nodes, and the N module having an N module processor and an accelerator module; the accelerator module having a connection processor, a network adapter, and an interface to a system bus of the N module, the system bus having a connection to the N module processor; the network adapter to receive a data access request from a computer network; an operating system executing on the connection processor of the accelerator module to determine if the data access request is directed to either the N module processor using the writeable storage device, another node of the cluster of nodes, or to an exterior node to the cluster of nodes, the exterior node not part of the cluster of nodes; in the event that the data access request is directed to the N module processor using the writeable storage device, the accelerator module reserving buffers for a connection to service the data access request and passing the data access request to the system bus for the N module processor to service the data access request using the writeable storage device and the buffers; in the event that the data access request is directed to the another node of the cluster of nodes, the accelerator module passing the data access request to the system bus for the N module processor to pass the data access request to the cluster switching fabric to send the data access request to the another node of the cluster of nodes; and in the event that the data access request is directed to an exterior node to the cluster of nodes, the accelerator module identifying the exterior node and packaging the data access request for forwarding onto the computer network to the exterior node, whereby the accelerator module both decides which node can service the data access request and reserves buffers for a connection if the data access request is directed to the N module processor, without involving the N module processor in the decision.