Patent ID: 8847315

Claim:
A complementary metal-oxide-semiconductor (CMOS) device comprising: a substrate; a dielectric insulator material on the substrate; an extension layer on the dielectric insulator material, wherein the extension layer comprises a first implants region, a second implants region, and a channel region; a first expansion region on the first implants region, wherein the first expansion region forms a first conducting path between a source and the first implants region; a second expansion region on the second implants region, wherein the second expansion region forms a second conducting path between a drain and the second implants region; and a gate stack in contact with the channel region, the first expansion region, the second expansion region, the first implants region, and the second implants region, wherein the gate stack comprises a gate electrode and a gate dielectric layer, wherein the first expansion region and the second expansion region comprise undoped semiconducting material, and wherein the first expansion region and the second expansion region are thicker than the channel region to reduce resistance.