Patent ID: 8751736

Claim:
A computing system comprising: a physical memory, wherein the physical memory is configured to store one or more data structures, each with an associated version number; and a processor coupled to the memory, wherein the processor is configured to: receive an instruction; determine the instruction is a memory access instruction corresponding to a first data structure of the one or more data structures; and generate a pointer corresponding to a location within the first data structure, wherein bits used to form the pointer include both an address and a first version number associated with the first data structure; wherein the physical memory comprises a plurality of banks, and wherein the first data structure is stored in a first bank of the plurality of banks, and a second version number associated with the first data structure is stored in a spare bank corresponding to the first bank, wherein in response to said instruction, the processor is further configured to: access the second version number stored in the memory; compare the first version number to the second version number; and detect an error in response to determining the first version number does not match the second version number.