Patent ID: 8108758

Claim:
A method for stochastic decoding processing a set of encoded samples comprising: a) receiving the set of encoded samples, the set of encoded samples being representative of a sequence of information bits and parity bits generated using a linear code with parity check matrix; b) determining for each encoded sample a corresponding probability message; c) providing each probability message in a symbol wise fashion to equality nodes of a logic circuitry comprising logic components forming equality nodes and parity check nodes, the equality nodes and the parity check nodes for performing an equality function and a parity check function, respectively, the equality nodes and the parity check nodes being connected such that they represent a factor graph of the parity check matrix; d) passing each probability message in a symbol wise fashion through the factor graph and performing for each received symbol at the parity check nodes the parity function and at the equality nodes the equality function, each of the equality nodes providing an output symbol in dependence upon each received symbol; e) if an equality node is in a hold state, providing a chosen symbol; and, f) repeating b) to e) until a stopping criterion is satisfied.