Patent ID: 8670278

Claim:
A method, comprising: setting limits of a memory sense window, wherein the memory sense window is between an expected intrinsic threshold voltage (E{VTO}) of a non-volatile trapped-charge memory device and one of a beginning-of-life (BOL) value of a threshold voltage of a programmed state of the non-volatile trapped-charge memory device (VTP BOL ) and a BOL value of a threshold voltage of an erased state of the non-volatile trapped-charge memory device (VTE BOL ), and wherein setting the limits of the memory sense window comprises determining a standard deviation for the E {VTO} and setting an upper or a lower limit of the memory sense window within four standard deviations of E{VTO} from E{VTO}; and sensing, using a sense circuit, a data state of the non-volatile trapped-charge memory device.