Patent ID: 6928600

Claim:
A folding systolic architecture for a Comma-Free Reed-Solomon decoding circuit, comprising: an input pattern generator, which receives the arbitrarily cyclic-shift CFRS codes, for generating 15 cyclic-shift versions of the CFRS codes to output in a skewed form to a systolic array; a plurality of processing element assignments folded at least one time compared to a systolic array composed of 64×15 processing elements, for receiving the skewed-form CFRS codes, to make correlating comparisons and output a set of correlating comparison results; a plurality of boundary processing element assignments folded at least one time compared to a systolic array composed of 64×1 boundary processing elements, for calculating the greatest correlating comparison result of each row of said systolic array to find the greatest row result and set a corresponding index as a decoding result; and a refresh mechanism for refreshing a code symbol saved in advance in each said processing element.