Patent ID: 8633541

Claim:
An integrated circuit, comprising: a p-type semiconductor substrate; a diode disposed in said substrate, said diode including: an anode connected to an input/output (I/O) pad of said integrated circuit, said anode including a p-type anode active area; and a cathode, said cathode including an n-type cathode well containing said anode active area; a drain extended n-channel metal oxide semiconductor (DENMOS) transistor proximate to said diode, said DENMOS transistor including: a gate dielectric layer disposed over said substrate; a gate disposed over said gate dielectric layer; an n-type source active area disposed in said substrate adjacent to said gate, said source active area being connected to a ground node of said integrated circuit; an n-type drain drift region disposed in said substrate, said drain drift region extending under said gate opposite from said source active area; and an n-type drain contact active area disposed in said drain drift region, said drain contact active area being laterally separated from said gate, said drain contact active area being electrically connected to said diode cathode; and a guard element disposed proximate to said diode and to said DENMOS transistor, said guard element including a p-type guard element active area disposed in said substrate, said guard element active area being electrically coupled to an instance of a ground node of said integrated circuit.