Patent ID: 7262975

Claim:
A multilayer printed wiring board comprising: a core substrate; a build-up layer that is formed on the core substrate and has a conductor pattern disposed on an upper surface; a low elastic modulus layer that is formed on the build-up layer; mounting electrodes that are disposed on the upper surface of the low elastic modulus layer and connected via connecting portions to an electronic element; and conductor posts that pass through the low elastic modulus layer and electrically connect the mounting electrodes with the conductor pattern; and wherein the conductor posts have the aspect ratio Rasp of not less than 4 and the diameter exceeding 30 μm, and the aspect ratio Rasp of external conductor posts which, among the conductor posts, are positioned at external portions of the low elastic modulus layer is greater than or equal to the aspect ratio Rasp of internal conductor posts which are positioned at internal portions of the low elastic modulus layer.