Patent ID: 8383511

Claim:
A method for manufacturing a semiconductor device, comprising: forming lower conductive layers; forming an interlayer insulating film on the lower conductive layers; forming a second mask layer and a first mask layer in this order on the interlayer insulating film; patterning the first and second mask layers to form openings at positions corresponding to the lower conductive layers in the first and second mask layers; enlarging diameters of the openings in the second mask layer so that the diameters of the openings in the second mask layer become larger than diameters of the openings in the first mask layer; depositing mask material into the openings in the first and second mask layers so that cavities are formed within the openings in the second mask layer; etching back the first mask layer and the mask material so that the second mask layer remains, to remove the first mask layer and to expose the cavities in the second mask layer; removing the mask material from bottom surfaces of the cavities in a thickness direction of the mask material until the interlayer insulating film is exposed, to form a mask which includes the second mask layer and the mask material and has the openings including the cavities at positions corresponding to the lower conductive layers on the interlayer insulating film; etching the interlayer insulating film using the mask, to form contact holes in the interlayer insulating film and beneath the openings of the mask; filling conductive material into the contact holes to form contact plugs; and forming upper conductive layers so as to be electrically connected to the contact plugs.