Patent ID: 6987816

Claim:
In a wireless receiver, a circuit for receiving an input signal from a transmitter, the input signal including a preamble portion, a unique word portion and a data portion, the circuit comprising: a. a preamble detector configured to receive the input signal and to provide a preamble signal where the preamble signal is active during the preamble portion of the input signal and inactive during all portions of the input signal other than the preamble portion; b. a DC level set circuit configured to receive the preamble signal, the input signal including the preamble portion, the unique word portion and the data portion and to receive a control signal and to provide a level set signal; and c. a data slicer circuit coupled with the DC level set circuit to receive the level set signal and to provide an output signal; wherein the preamble detector comprises: i. an AC coupling for removing a direct current offset from the input signal; ii. a first comparator for recovering a digital output from the AC coupling; iii. a four bit delay line for detecting and for holding the preamble portion of the input signal; iv. a lower block coupled with both the four bit delay line and the first comparator for providing the preamble signal when the four bit delay line detects the preamble portion of the input signal; and v. a delay element for receiving the input signal and for providing a delay signal to the DC level set circuit.