Patent ID: 8796762

Claim:
A semiconductor device having a buried gate transistor, the semiconductor device comprising: a semiconductor body that includes a first active region surrounded by a trench isolation region; a recess in a surface of the first active region, the recess having a bottom surface and vertical sidewalls; a dielectric layer continuously and conformal lining an entire length of the bottom surface and the vertical sidewalls of the recess; an electrode material filling the recess, wherein an upper portion of the electrode material extends above an uppermost surface of the first active region; source/drain regions disposed in the first active region, the source/drain regions physically contacting a majority but not all of a length of the dielectric layer lining the vertical sidewalls of the recess; a continuous doped channel region between the source/drain regions, the continuous doped channel region having a higher doping concentration along the bottom surface and a lower doping concentration along the vertical sidewalls; and localized halo regions disposed in the first active region directly under the vertical sidewalls but not in a central portion of the continuous doped channel region.