Patent ID: 8531377

Claim:
A liquid crystal display device comprising: a liquid crystal display panel; and first and second drive circuits which are configured to drive the liquid crystal display panel, wherein a first distribution circuit is configured to distribute video signals outputted from the first drive circuit to a plurality of video signal lines arranged on the liquid crystal display panel and formed on the liquid crystal display panel, a second distribution circuit is configured to distribute video signals outputted from the second drive circuit to a plurality of video signal lines arranged on the liquid crystal display panel and formed on the liquid crystal display panel, the first distribution circuit is configured to be controlled in response to a first control signal outputted from the first drive circuit, the second distribution circuit is configured to be controlled in response to a second control signal outputted from the second drive circuit, the first drive circuit includes a plurality of video signal output terminals which are configured to output the video signals, first and second control signal output terminals which are formed with the plurality of video signal output terminals sandwiched therebetween and are configured to output the control signals, the second drive circuit includes a plurality of video signal output terminals which are configured to output the video signals, third and fourth control signal output terminals which are formed with the plurality of video signal output terminals sandwiched therebetween and are configured to output the control signals, a master/slave control signal line is connected between the first drive circuit and the second drive circuit for imparting a slave function of the second drive circuit, the first drive circuit starts outputting the grayscale voltage of positive polarity, the second drive circuit starts outputting the grayscale voltage of negative polarity, and the first distribution circuit has an input terminal which connects to two video signal output terminals of the first drive circuit.