Patent ID: 6850578

Claim:
A digital signal processing apparatus for processing an input digital signal that has been segmented as blocks each having a predetermined data amount and highly efficiently encoded along with adjacent blocks, comprising: decoding means for decoding the highly efficiently encoded digital signal along with adjacent blocks; modifying process means for modifying the decoded digital signal; encoding means for highly efficiently encoding the modified digital signal along with adjacent blocks; and delay compensating means for compensating a delay of the decoded signal decoded by said decoding means; wherein said encoding means comprises: band dividing means for dividing the input digital signal into a plurality of frequency band components; block segmenting and encoding means for segmenting a sequence of samples of which the plurality of frequency band components is arranged in chronological direction and/or frequency direction into blocks and encoding the blocks; normalization processing means for normalizing each block that has been encoded by said encoding means and generating normalization information; quantized coefficient calculating means for calculating a quantized coefficient that represents the feature of each block of the signal components; bit allocating means for deciding the bit allocation amount of each block corresponding to the quantized coefficient calculated by said quantized coefficient calculating means; and encoded data generating means for re-quantizing each block corresponding to the normalization information generated by said normalization processing means and the bit allocation amount allocated by said bit allocating means and generating encoded data corresponding to a predetermined format.