Patent ID: 8071445

Claim:
A method for manufacturing a semiconductor device, said method comprising: forming a second-conductivity-type semiconductor layer on a first-conductivity-type semiconductor layer to be a drain region; forming first through third trenches that penetrate through said second-conductivity-type semiconductor layer, and are linked to one another; filling said first through third trenches with a source interconnect layer, and causing said source interconnect layer to protrude from an upper end of said second trench; filling said first and third trenches with a gate electrode, said filling said first and third trenches comprising: forming a conductive film in said first and third trenches and on said second-conductivity-type semiconductor layer, said conductive film becoming said gate electrode; and performing etch-back on said conductive film, to form a sidewall formed with said conductive film on a sidewall of said source interconnect layer protruding from the upper end of said second trench; bringing a source electrode into contact with said source interconnect layer protruding from the upper end of said second trench; and bringing a gate interconnect layer into contact with said gate electrode in said third trench.