Patent ID: 8089100

Claim:
An integrated circuit, comprising: a gate electrode level region including at least four linear-shaped conductive structures formed to extend lengthwise in a first direction, the at least four linear-shaped conductive structures including, a first linear-shaped conductive structure including a gate portion that forms a gate electrode of a first transistor and an extending portion that extends away from the gate portion of the first linear-shaped conductive structure, a second linear-shaped conductive structure including a gate portion that forms a gate electrode of a second transistor and an extending portion that extends away from the gate portion of the second linear-shaped conductive structure, a third linear-shaped conductive structure including a gate portion that forms a gate electrode of a third transistor and an extending portion that extends away from the gate portion of the third linear-shaped conductive structure, and a fourth linear-shaped conductive structure including a gate portion that forms a gate electrode of a fourth transistor and an extending portion that extends away from the gate portion of the fourth linear-shaped conductive structure, wherein the extending portions of the first, second, third, and fourth linear-shaped conductive structures collectively include at least two different extending portion lengths as measured in the first direction, and wherein the first, second, third, and fourth transistors include at least one transistor of a first transistor type and at least one transistor of a second transistor type.