Patent ID: 8418011

Claim:
A test module for testing, a device wider test, comprising: a pattern memory that has an externally supplied deterministic test pattern stored therein; a random number generator that generates a pseudo random pattern; a pattern selector that selects one of the deterministic test pattern stored in the pattern memory and the pseudo random pattern as a driver pattern; and a waveform generator that generates, based on the driver pattern, a waveform of a signal to be supplied to the device under test, wherein the random number generator includes: a controller that generates a register selection signal based on a control instruction stored on an instruction memory; a plurality of polynomial configuration registers one of which is selected by the register selection signal, each polynomial configuration register having polynomial data stored therein; a plurality of initial value configuration registers one of which is selected by the register selection signal, each initial value configuration register having an initial value stored therein; and a random number veneration shift register that loads the initial value from the selected one of the plurality of initial value configuration registers and sequentially generates the pseudo random pattern based on the polynomial data stored in the selected one of the plurality of polynomial configuration registers.