Patent ID: 8908750

Claim:
A circuit device comprising: a peak detector to receive a signal and to generate a peak output related to the received signal, the peak detector including a level shifter configured to apply a signal offset to the peak output; an average detector to generate an average output related to the received signal; a logic circuit configured to perform a logical AND operation on at least one of the peak output and the average output to generate a data output related to the received signal; and a first logical OR circuit to receive the peak output as a first input and to receive a peak enable signal as a second input, the first logical OR circuit to selectively provide the peak output to the logic circuit in response to receiving the peak enable signal; and a second logical OR circuit to receive the average output as a third input and to receive an average enable signal as a fourth input, the second logical OR circuit to selectively provide the average output to the logic circuit in response to receiving the average enable signal.