Patent ID: 6849495

Claim:
A method of manufacturing a semiconductor device, comprising: providing a workpiece, the workpiece comprising a semiconductor material; forming at least one memory cell within the workpiece; forming at least one first conductive line proximate the at least one memory cell, wherein the first conductive line provides access to the at least one memory cell; depositing a first insulating layer over the at least one memory cell and first conductive line; depositing a second insulating layer over the first insulating layer; depositing a photoresist over the second insulating layer; removing a portion of the photoresist; etching the second insulating layer and first insulating layer, exposing at least an active region of the memory cell, wherein etching the second insulating layer and first insulating layer comprises a two-step etch process, wherein one of the steps comprises an anisotropic etch and the other step comprises an isotropic etch; and forming a silicide material on the exposed active region top surface.