Patent ID: 6858495

Claim:
A method for fabricating a multi-bit memory unit, comprising: providing a semiconductor substrate with a hard mask layer formed thereon; implanting ions into the semiconductor substrate to form an ion implantations region using the hard mask layer as a mask; forming a first spacer on a sidewall of the hard mask layer; anisotropically etching the semiconductor substrate to form a protruding semiconductor substrate using the hard mask layer and the first spacer as masks; forming a second spacer on a sidewall of the protruding semiconductor substrate and the first spacer; anisotropically etching the semiconductor substrate to form an opening using the hard mask layer and the second spacer as masks; removing the second spacer; conformally forming a doped layer on the semiconductor substrate; anisotropically etching the doped layer to form a third spacer on the sidewall of the protruding semiconductor substrate, wherein the opening is filled with the doped layer; removing the hard mask layer and the first spacer; and conformally forming an ONO layer.