Patent ID: 7869553

Claim:
Apparatus for use in recovering data information from a serial data signal having a bit rate comprising: clock circuitry that produces a plurality of phase-distributed candidate clock signals having a first frequency; first data recovery circuitry that receives the serial data signal and uses a first selection of a plural number of the candidate clock signals to recover data information from the serial data signal when the bit rate is in a first bit rate range, the candidate clock signals in the first selection having equal first phase spacing between them; and second data recovery circuitry that receives the serial data signal and uses a second selection of a plural number of the candidate clock signals to recover data information from the serial data signal when the bit rate is in a second bit rate range that is lower than the first bit rate range and below the first frequency, wherein the second selection differs from the first selection by including only a subset of the signals that are included in the first selection, wherein the candidate clock signals in the second selection have equal second phase spacing between them, and wherein the first phase spacing is smaller than the second phase spacing.