Patent ID: 6982573

Claim:
A clock source selector for selecting a first clock signal or a second clock signal in accordance with a switch request signal, the clock source selector comprising: a first clock input for receiving the first clock signal; a second clock input for receiving the second clock signal; a switch request signal input for receiving the switch request signal which takes a first value when the first clock signal is required and a second value when the second clock signal is required; a first retiming circuit coupled to the switch request signal input and connected to the second clock input to receive the second clock signal for retiming relative to the second clock signal; a retiming input signal applied to the first retiming circuit, the retiming input signal being timed relative to the first clock signal and comprising the switch request signal or a signal derived therefrom; a second retiming circuit coupled to an output of the first retiming circuit and connected to the first clock input to receive the first clock signal for retiming, relative to the first clock signal, the output of the first retiming circuit; and selector circuitry for coupling the second clock input to an output when the output of the first retiming circuit is asserted and for coupling the first clock input to the output when neither the retiming input signal nor an output of the second retiming circuit are asserted.