Patent ID: 7875794

Claim:
A process for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to the substantially planar surface, the process comprising the steps of: selecting a strip thickness and a slot width for division of the wafer into a plurality of adjoining strips such that the thickness of the wafer is greater than the sum of the strip thickness and the slot width; selecting a technique for forming a plurality of slots, each slot having the slot width, and thereby forming the plurality of adjoining strips in the wafer with each strip having the strip thickness, wherein each of the slots when formed extends from the substantially planar surface at an angle thereto, wherein the slots extend all the way through the wafer over either all of the slot length or most of the slot length; processing a portion of the wafer into the plurality of adjoining strips using the selected technique wherein the adjoining strips are supported within a frame; and separating the adjoining strips from the frame to form a plurality of individual separated strips.