Patent ID: 8367471

Claim:
A method of manufacturing stacked semiconductor assemblies, comprising: mounting a semiconductor wafer to a temporary carrier wherein the semiconductor wafer has a plurality of first dies arranged in a die pattern on the semiconductor wafer, the individual first dies having a first terminal at a first side and a through-die interconnect in contact with the first terminal and extending from the first side towards a second side of the semiconductor wafer, wherein the through-die interconnects are spaced apart from the second side of the semiconductor wafer; thinning the semiconductor wafer to expose the through-die interconnects at the second side; attaching a plurality of singulated second dies to corresponding first dies, wherein the second dies are arranged in the die pattern and spaced apart from each other by gaps, the individual second dies having a second terminal in contact with one of the exposed through-die interconnects; disposing an encapsulating material in the gaps between the second dies; and thinning the second dies after attaching the second dies to the first dies.