Patent ID: 7089372

Claim:
A method for performance by a coherency controller of a node, comprising: receiving a transaction relating to a line of local memory of the node; determining locally within the controller that the line of local memory is one or more of not being cached by any other node, and has not been modified by any other node, by looking up two count values within an entry of a table within the coherency controller corresponding to a section of the local memory including the line of local memory, a first count value corresponding to a number of lines within the section of local memory being cached by other nodes, and a second count value corresponding to a number of lines within the section of the local memory having been modified by other nodes; in response to determining locally within the controller that the line of the local memory is one or more of not being cached by any other node, and has not been modified by any other node, processing the transaction by the coherency controller without accessing information regarding the line of local memory in a tag directory associated with the local memory.