Patent ID: 7868327

Claim:
An electronic device, comprising: a thin film transistor; a flexible substrate comprising a metallic sheet; a semiconductor layer formed over the flexible substrate, the semiconductor layer comprising a source region, a drain region and a channel region located between the source and drain regions; a gate electrode formed over the semiconductor layer; a gate insulating layer interposed between the gate electrode and the semiconductor layer; a source electrode contacting the semiconductor layer; a drain electrode contacting the semiconductor layer; a buffer layer interposed between the flexible substrate and the semiconductor layer, the buffer layer comprising one or more materials selected from the group consisting of SiO 2 , SiNx and SiNO, wherein the buffer layer comprises at least first, second, third, and fourth sequentially stacked sub-layers, wherein the first and third sub-layers are formed of a first material, and the second and fourth sub-layers are formed of a second material, wherein the first and second materials are different from one another in composition; and a diffusion barrier comprising Ti or Ta and interposed between the flexible substrate and the buffer layer, wherein the diffusion barrier is a single layer that contacts both the flexible substrate and the buffer layer, and wherein the diffusion barrier is configured to prevent impurities from diffusing from the substrate into the semiconductor layer.