Patent ID: 7886255

Claim:
A method of design of an integrated circuit programmed data processor comprising the steps of: selecting a benchmark application for the data processor; selecting an initial set of architecture parameters for the data processor including a plurality of datapath clusters, each datapath cluster consisting of a data register file including plurality of associated data registers, at least one functional unit capable of data processing operations upon data stored in said data registers in response to program instructions, and at least one data address unit operable to calculate data addresses in a memory in response to program instructions, wherein a functional unit may access only data stored in a data register within a same data cluster, and said plurality of datapath clusters having a number selected to avoid too many input/output ports in said data register files; reconfiguring a reconfigurable compiler to generate program code adapted to run on said selected set of architecture parameters; compiling said benchmark application with said reconfigured compiler; reconfiguring a reconfigurable data processor simulator to simulate said selected set of architecture parameters; running said complied benchmark application on said reconfigured simulator; automatically synthesizing an integrated circuit physical layout of said selected architecture parameters; evaluating performance of said selected set of architecture parameters against a predetermined set of criteria from said running of said complied benchmark application on said reconfigured simulator and said synthesized integrated circuit physical layout; and if evaluation of said selected set of architecture parameters fails to meet said predetermined set of criteria, varying said selected architecture parameters and repeating said steps of reconfiguring said compiler, compiling said benchmark application, reconfiguring said simulator, running said complied benchmark application, automatically synthesizing an integrated circuit physical layout and evaluating performance, until evaluation of said selected set of architecture parameters meets said predetermined set of criteria.