Patent ID: 6999135

Claim:
A pixel structure, comprising: a gate line, located on a substrate; a common line, located on said substrate for a bottom electrode of a pixel storage capacitor; a gate insulating layer, located on said substrate, said gate insulating layer covering said gate line and said common line; a data line, located on said gate insulating layer; a switching device, located on said substrate, said switching device electrically connecting said gate line and said data line; a conducting layer, located on said gate insulating layer, said conducting layer including a coupling portion and a connecting portion, said coupling portion being above said common line for a top electrode of said pixel storage capacitor, s aid connecting portion comprising a first portion, a second portion and the third portion, wherein said first portion is coupled to said coupling portion, said second portion is connected to said switching device and said third portion located between said first portion and said second portion possesses a plurality of channels; a passivation layer, covering said data line, said switching device, and said conducting layer; a contact window, disposed in said passivation layer and above said third portion of said connecting portion; and a pixel electrode, located on said passivation layer, said pixel electrode electrically connecting said switching device and said coupling portion of said conducting layer through said contact window.