Patent ID: 7755432

Claim:
A circuit comprising: an amplifier stage comprising, a first transistor having (i) a first terminal coupled to a first reference voltage, (ii) a second terminal coupled to an amplifier output terminal, and (iii) a control terminal coupled to receive a first signal, a second transistor having (i) a first terminal coupled to the second terminal of the first transistor and the amplifier output terminal, (ii) a second terminal coupled to a second reference voltage, and (iii) a control terminal coupled to receive a second signal, wherein the amplifier stage provides an amplifier output signal through the amplifier output terminal of the amplifier stage; a first monitor circuit coupled to receive the first signal, the first monitor circuit generating an output signal indicating a condition of the first signal; a second monitor circuit coupled to receive the second signal, the second monitor circuit generating an output signal indicating a condition of the second signal; a third monitor circuit coupled to receive the amplifier output signal, the third monitor circuit generating an output signal indicating a condition of the amplifier output signal; and a control circuit coupled to receive the output signals from the first, second, and third monitor circuits, wherein the control circuit generates a shut down signal based on the first signal, the second signal, and the amplifier output signal if a short circuit condition is indicated by the output signals of the first, second, and third monitor circuits.