Patent ID: 7161215

Claim:
A semiconductor memory device comprising: a memory cell with a first drive MISFET and a second drive MISFET, a first transfer MISFET and a second transfer MISFET and a first load MISFET and a second load MISFET, the drive MISFETs and the transfer MISFETs formed on a major surface of a semiconductor substrate such that a gate electrode of the first driver MISFET and a gate electrode of the first transfer MISFET extend over a first active region and such that a gate electrode of the second driver MISFET and a gate electrode of the second transfer MISFET extend over a second active region, wherein the first active region extends in a first direction such that the gate electrode of the first driver MISFET and the gate electrode of the first transfer MISFET are arranged in the first direction and such that a gate length direction thereof is in parallel with the first direction, wherein the second active region extends in the first direction such that the gate electrode of the second driver MISFET and the gate electrode of the second transfer MISFET are arranged in the first direction and such that a gate length direction thereof is in parallel with the first direction, wherein the first driver MISFET and the second transfer MISFET are arranged in a second direction crossing to the first direction, wherein the first transfer MISFET and the second drive MISFET are arranged in the second direction, and wherein the load MISFETs are formed over the drive MISFETs and the transfer MISFETs with an insulating film interposed therebetween.