Patent ID: 7969185

Claim:
A logical circuit device comprising: a plurality of logical blocks including reconfigurable logical configurations; and a network including reconfigurable connections among the plurality of logical blocks, wherein at least one of the plurality of logical blocks comprises a basic logical operation element, a first storage element, and a second storage element, wherein the basic logical operation element receives a first data signal and a first validity indication signal that becomes an asserted state when the first data signal is valid, outputs a second data signal generated by a first logical operation based on the first data signal and a second validity indication signal that becomes an asserted state when the second data signal is valid, and sets the second data signal to the asserted state in response to the asserted state of the first validity indication signal, wherein the first storage element holds the second validity indication signal in response to the asserted state of the second validity indication signal, and wherein the second storage element holds the second data signal in response to the asserted state of the second validity indication signal.