Patent ID: 7135921

Claim:
A driver circuit comprising: a first differential amplifier circuit comprising: a first differential circuit including a first differential pair, adapted to be driven by a first constant-current source connected to a low-potential power supply, and having a non-inverting input terminal and an inverting input terminal for differentially receiving input signal voltages; a first amplification stage for receiving an output from said first differential circuit, said first amplification stage including an output terminal for outputting a first output signal; and a first further transistor of a first conductivity type, said first further transistor connected in parallel to a transistor of the first differential pair having the first conductivity type and having a control terminal forming the non-inverting input terminal of said first differential circuit, said first further transistor having a control terminal for receiving a first control voltage; and a second differential amplifier circuit comprising: a second differential circuit including a second differential pair adapted to be driven by a second constant-current source connected to a high-potential power supply and having a non-inverting input terminal and an inverting input terminal for differentially receiving the input signal voltages; a second amplification stage for receiving an output from said second differential circuit, said second amplification stage including an output terminal for outputting a second output signal; and a second further transistor of a second conductivity type, said second further transistor connected in parallel to a transistor of said second differential pair having the second conductivity type and having a control terminal forming the non-inverting input terminal of said second differential circuit, said second further transistor having a control terminal for receiving a second control voltage; wherein: the non-inverting input terminals of said first differential circuit and said second differential circuit are connected to a common input terminal, the output terminals of said first amplification stage and said second amplification stage are connected to a common output terminal, the inverting input terminals of said first differential circuit and said second differential circuit are connected to the common output terminal; and for a voltage range in which the transistor of said first or second differential pair whose control terminal is connected to said non-inverting input terminal is turned off by an input voltage sent to said common input terminal, the first or second control voltage is such that said further transistor whose control terminal receives said first or second control voltage is tuned on, respectively.