Patent ID: 8653655

Claim:
A semiconductor device comprising: a wiring substrate having a front surface, a first electrode pad formed on the front surface, a plating film formed on the first electrode pad, a rear surface opposite to the first surface, and a second electrode pad formed on the rear surface; a semiconductor chip having a main surface, and a bonding pad formed on the main surface, and mounted over the front surface of the wiring substrate; a conductive material electrically connecting the bonding pad of the semiconductor chip with the first electrode pad of the wiring substrate; a resin sealing the semiconductor chip; and a solder material connected with the second electrode pad of the wiring substrate, wherein the wiring substrate has a first side surface, a second side surface, and a wiring for electroplating, wherein the first side surface is located between the front surface and the rear surface, and is located at a furthermost peripheral portion side of the wiring substrate, and is not covered with the resin, wherein the second side surface is located at an inner side of the wiring substrate with respect to the first side surface, and is covered with the resin, wherein the wiring is electrically connected with the first electrode pad, and extends toward the second side surface, wherein an end face of the wiring exposed from the second side surface is covered with resin; wherein the second electrode pad is located at an inner side of the rear surface with respect to the first side surface, and wherein, in the wiring substrate, a thickness of a first part which includes the first side surface is less than a thickness of a second part which includes the second side surface and which is located adjacent to the inner side of the first part.