Patent ID: 8725936

Claim:
A storage system, comprising: one or more flash memory chips, each of which has a storage region configured by a plurality of blocks; and a device controller configured to control access to data corresponding to the storage regions of the flash memory chips, wherein the device controller is configured to: manage, for each of the blocks, a number of determination readings for determining read disturb on the basis of one or more read requests with respect to data of each block from a higher-level device of the device controller; when there is a block for which the number of determination readings becomes equal to or larger than a threshold represented as a standard indicating a predetermined state related to read disturb, transmit, to the higher-level device, notification information that includes information indicating that read disturb of the block enters the predetermined state; take part of a plurality of read requests from the higher-level device as read requests to be added to the number of determination readings; and randomly determine, within a range of predetermined numbers, a sampling interval representing a number of read requests between a read request to be added to the number of determination readings and a next read request to be added to the number of determination readings, and specify the read request to be added to the number of determination readings, based on the sampling interval, wherein the threshold includes a first threshold that is a standard for determining that read disturb is apt to occur in the block, and the notification information includes first information indicating that read disturb is apt to occur in the block.