Patent ID: 7924338

Claim:
An image sensor comprising: (a) a plurality of vertical shift registers arranged in an array; (b) a first Horizontal Charge-Coupled Device (HCCD) and a second HCCD connected in parallel to each other, wherein the first HCCD receives charge from the vertical shift registers and the second HCCD receives charge from the first HCCD; (c) a plurality of transfer gates positioned between the first and second HCCDs and connecting the transfer channels of the first and second HCCD on alternate gates; and (d) means for clocking the plurality of transfer gates to provide multiple readout modes for the first and second HCCDs, wherein in a full resolution readout mode, every other gate in the plurality of transfer gates is complementary clocked to readout each charge packet in each HCCD, and in a reduced resolution mode the gates adjacent to each transfer gate are held at a constant voltage while the remaining gates are complementary clocked to sum charge packets of the same color from two columns together in each HCCD and readout half the number of charge packets compared to the full resolution readout mode.