Patent ID: 8338869

Claim:
A semiconductor device comprising: a substrate comprising a patterned wiring layer; a magnetic tunnel junction stack formed over the patterned wiring layer; an intermediate non-magnetic layer formed over the magnetic tunnel junction stack, the intermediate non-magnetic layer comprising a first thickness a hard mask formed over the intermediate non-magnetic layer, the hard mask comprising a second thickness; and a spacer material formed and contacting at least one sidewall of the hard mask and the intermediate non-magnetic layer, wherein the spacer material comprises a different electrical conductivity than the intermediate non-magnetic layer, and wherein a height of the spacer material is substantially equal to a sum of the first and second thicknesses, and wherein a difference in electrical conductivity between the intermediate non-magnetic layer and the spacer material creates current flow predominantly along at least one side of a free magnetic layer within the magnetic tunnel junction stack; and a non-magnetic decoupling layer formed between the intermediate non-magnetic layer and the free magnetic layer of the magnetic tunnel junction stack.