Patent ID: 8017521

Claim:
A method of forming through-hole vias in a semiconductor wafer, comprising: forming a semiconductor wafer having a plurality of die with contact pads disposed on a surface of the plurality of die, the semiconductor wafer having a saw street between the plurality of die; forming a trench in the saw street, the trench extending partially through the semiconductor wafer, a portion of the semiconductor wafer below the trench along a backside of the semiconductor wafer maintaining structural support for the semiconductor wafer during processing steps of: (a) filling the trench with organic material, (b) forming a plurality of vias in the organic material, (c) forming traces between the contact pads and plurality of vias, and (d) depositing conductive material in the plurality of vias to form conductive vias; removing the portion of the semiconductor wafer below the trench along the backside of the semiconductor wafer; and singulating the semiconductor wafer along the saw street to separate the plurality of die.