Patent ID: 8879346

Claim:
A semiconductor integrated circuit package comprising: a set of one or more processor cores, each including a set of one or more execution units; an embedded dynamic random access memory (EDRAM) power management controller coupled with the set of processor cores, the EDRAM power management controller configured to support multiple power states including a power-on state, a power-off state, and a self-refresh state by issuing power state transition commands; and an EDRAM module coupled with the set of processor cores configured to implement multiple power states including a power-on state, a power-off state, and a self-refresh state, the EDRAM module comprising: an EDRAM power management agent configured to transition the EDRAM module between power states in response to power state commands issued by the EDRAM power management controller, wherein transitioning to a power-off state or self-refresh state reduces the amount of power consumed by the EDRAM module as compared to the power-on state, and a memory array coupled with the EDRAM power management agent that is comprised of a plurality of memory cache lines.