Patent ID: 8084373

Claim:
A manufacturing method of a semiconductor device, comprising the steps of: forming a gate electrode in a predetermined region of a main surface of a semiconductor substrate in such a manner as to laminate a metal film having a predetermined work function over a dielectric film having a predetermined dielectric constant; forming a predetermined offset insulating film so as to cover a side of the gate electrode; and forming an extension region in the predetermined region by setting a part of the offset insulating film positioned over the side of the gate electrode as an offset spacer, and introducing impurities of a predetermined conductive type using the offset spacer as a mask, wherein the step of forming the offset insulating film comprises a step of forming a silicon oxide film of a predetermined thickness by repeating one cycle, said one cycle including: a first step of adsorbing monosilane (SiH 4 ) to the semiconductor substrate by positioning the semiconductor substrate in a predetermined chamber, introducing the monosilane (SiH 4 ) into the chamber, and exposing the semiconductor substrate to the monosilane (SiH 4 ); a second step of emitting the monosilane (SiH 4 ) remaining in the chamber; and a third step of oxidizing the monosilane (SiH 4 ) adsorbed to the semiconductor substrate by introducing nitrous oxide (N 2 O) into the chamber, generating plasma from the nitrous oxide, and exposing the semiconductor substrate to the nitrous oxide plasma.