Patent ID: 6984569

Claim:
A method of enhancing carrier mobility in a semiconductor active region of a semiconductor device having a predetermined channel type of either n-channel type or p-channel type, comprising: selecting an appropriate one of compressive stress or tensile stress that when exerted on the active region will enhance carrier mobility within the active region for the channel type of the semiconductor device; providing a layer of semiconductor material; and providing a trench isolation region in the layer of semiconductor region that defines placement of the active region, the trench isolation region defined by sidewalls and a bottom and the providing the trench isolation region includes: providing a liner that exerts the selected one of compressive stress or tensile stress on the active region, the liner made from a material having a relative permittivity (K) of about 10 or more and conforming to the sidewalk and bottom; and providing a fill section made from isolating material that is disposed within and conforms to the liner.