Patent ID: 6841475

Claim:
A method for forming a thin film transistor comprising: forming a preliminary substrate having at least a silicon layer, a first dielectric layer, and a gate metal layer stacking up sequentially; forming a photoresist layer on top of the preliminary substrate; selectively removing a portion of the photoresist layer in a single exposure process to form a first photoresist pattern having a two-portion structure with a first portion having a first width and a second portion underneath the first portion with a second width; removing the gate metal layer, the first dielectric layer, and the silicon layer to have the same width as the second width; selectively reducing the first photoresist pattern to form a second photoresist pattern having the first width; reducing the gate metal layer to have the same width as the first width using the second photoresist pattern; and doping a predetermined impurity in the silicon layer for forming a source region and a drain region of a predetermined type in areas not directly underneath the reduced gate metal layer.