Patent ID: 8080845

Claim:
A method of manufacturing a semiconductor device, comprising: preparing a semiconductor substrate; forming a first drain region in the semiconductor substrate, the first drain region having a first impurity concentration; forming a gate insulating film over the semiconductor substrate; forming a gate electrode extending over one end of the first drain region over the gate insulating film; forming a first source region in the semiconductor substrate on an opposite side of the first drain region across the gate electrode, the first source region having a second impurity concentration; forming a sidewall over the semiconductor substrate and over a sidewall of the gate electrode; forming a first resist layer over the gate electrode and the first source region; forming a second drain region in the first drain region by implanting first ions by using the first resist layer, the gate electrode, and the sidewall as a mask, and performing a first thermal treatment to the semiconductor substrate, the second drain region having a third impurity concentration higher than the first impurity concentration; forming a second resist layer over the gate electrode and the second drain region, the second resist layer extending from the gate electrode by a distance; forming a second source region in the first source region, and a third drain region in the second drain region by implanting second ions by using the sidewall, the gate electrode, and the second resist layer as a mask, and performing a second thermal treatment to the semiconductor substrate, the second source region having a fourth impurity concentration higher than the second impurity concentration, the third drain region having a fifth impurity concentration higher than the third impurity concentration; forming a silicide layer over the surface of the semiconductor substrate in the area of the second drain region and the third drain region.