Patent ID: 8551826

Claim:
A method manufacturing a thin film transistor substrate, comprising: forming a gate pattern through a first mask process, the gate pattern comprising a gate line, a first gate electrode, a second gate electrode, a third gate electrode, a storage line, and an opposite electrode; forming a gate insulating layer on the gate pattern; forming an impurity-doped amorphous silicon layer on the gate insulating layer; forming a data pattern through a second mask process, the data pattern comprising a data line, a first source electrode, a second source electrode, a third source electrode, a first drain electrode, a second drain electrode, and a third drain electrode; forming at least one protective layer through a third mask process; and forming a first sub pixel electrode, a second sub pixel electrode, and a first auxiliary electrode through a fourth mask process, wherein the first auxiliary electrode at least partially overlaps with the opposite electrode with the gate insulating layer and the at least one protective layer therebetween.