Patent ID: 8858818

Claim:
A method for minimizing defects in a semiconductor substrate due to ion implantation, comprising: providing a semiconductor substrate; prior to any other material being formed in or on the substrate: forming a native oxide layer across all of a top surface of the semiconductor substrate by dipping the semiconductor substrate in a first chemical wet bath, the native oxide layer protecting the top surface of the semiconductor substrate; upon forming the native oxide layer, performing ion implantation through the native oxide layer to establish a transistor device in a region of the semiconductor substrate, wherein a dopant material used in the ion implantation is selected from one or more of germanium, boron, carbon, and arsenic; removing the native oxide layer in its entirety after ion implantation; after removal, etching all of the top surface of the semiconductor substrate including the region of the ion implantation, the etching removing the semiconductor substrate in an amount sufficient to remove oxygen driven into a silicon lattice of the semiconductor substrate from the ion implantation, the etching performed by dipping the semiconductor substrate into a second chemical wet bath, the etching establishing a new top surface of the semiconductor substrate; after etching, forming an epitaxial layer across all of the new top surface of the semiconductor substrate, including the region of the ion implantation, to establish a channel region on the semiconductor substrate; forming other materials in and on the semiconductor substrate to establish a PMOS or NMOS device at the region of the ion implantation depending on the dopant material selected.