Patent ID: 7034735

Claim:
A digital-to-analog converter, comprising at least one input node; switches providing an input digital signal; an output stage including at least one resistive element; a resistance ladder coupled to the switches, the ladder including branches corresponding respectively to bit positions, in which selective operation of the switches in response to the input digital signal produces a corresponding analog output signal from the output stage; a first trim structure coupled to the most significant bit position (MSB) of the resistance ladder; and a second trim structure in the output stage resistive element, and N additional trim structures (N=0, 1, 2, 3, . . . ), wherein the first trim structure is configured to adjust the gain of the digital-to-analog converter without affecting the relative bit weights of the bit positions, and wherein the resistances of the first, second and any additional trim structures, respectively, are substantially of a prescribed ratio prior to any trimming.