Patent ID: 8390064

Claim:
A semiconductor device comprising: an active region provided in a semiconductor substrate, defined by an STI region, and extending in a first direction; a first gate trench, a second gate trench, and a dummy gate trench formed in the active region; a first gate electrode, a second gate electrode, and a dummy gate electrode extending in a second direction crossing the first direction, at least a part of the first gate electrode, the second gate electrode, and the dummy gate electrode being buried in the first gate trench, the second gate trench, and the dummy gate trench, respectively; first and second diffusion layers formed in the active region provided on both sides of the first gate electrode, respectively; and third and fourth diffusion layers formed in the active region provided on both sides of the second gate electrode, respectively, wherein the first gate electrode and the first and second diffusion layers constitute a first transistor, the second gate electrode and the third and fourth diffusion layers constitute a second transistor, and the dummy gate electrode is arranged between the second diffusion layer and the third diffusion layer, and electrically isolates the first transistor from the second transistor.