Patent ID: 7323928

Claim:
A method of providing capacitance with an integrated circuit, said method comprising: amplifying a first current across a capacitor to generate an amplified current, said amplified current having a greater magnitude than said first current; magnifying the capacitance of said capacitor in said integrated circuit with at least two integrated transistors to produce an equivalent capacitance of said integrated circuit, said equivalent capacitance higher than said capacitance of said capacitor by a magnification factor, a first and a second transistor of said two integrated transistors, each of said first and second transistor comprises an emitter, wherein said emitter of said first transistor comprising a size that is larger than that of said emitter of said second transistor; feeding back a current that is a function of output current of said integrated circuit to said second transistor to increase said magnification factor; and buffering changes in said output current from said second transistor, wherein said feeding back comprises feeding back a current equal to a portion of output current of said integrated circuit to a base and a collector of said second transistor, said feeding back causing said magnification factor to increase.