Patent ID: 7368786

Claim:
An ESD protected LDMOS device, comprising: a first LDMOS device having source region, drain region, gate, first body well region containing the source region, second body well region containing the drain region and separated from the first body well region by a drift region, and an isolation region surrounding but separated from the first and second body well regions; a second LDMOS device having source region, drain region, gate, first body well region containing the source region, second body well region containing the drain region and separated from the first body well region by a drift region, and an isolation region surrounding but separated from the first and second body well regions and a further region of the same conductivity type as the drain region, coupling the drain region to the isolation region; wherein the source region and gate of the first device are electically connected, respectively, to the source region and gate of the second device such that the first and second LDMOS devices are parallel coupled; and wherein the drain region of the first device is electrically connected to the isolation region of the second device.