Patent ID: 8606837

Claim:
A digital signal processing module that includes a digital signal processor for interpolating a gain coefficient to produce an interpolated output gain coefficient y n , and a means configured to use the interpolated output gain coefficient y n to modify the gain of a digital audio signal, wherein the digital signal processor comprises: a first memory configured to store a target gain coefficient x n ; a second memory configured to store a current gain coefficient; response determining means configured to determine the interpolated output gain coefficient y n based on the target gain coefficient x n and the current gain coefficient; and means for storing the interpolated output gain coefficient y n in the second memory in place of the current gain coefficient, to be used as the current gain coefficient in subsequent operations; wherein the response determining means comprises a first order filter configured to limit the rate of change of the gain coefficient which includes a first input for receipt of the target gain coefficient value x n and an output configured to deliver the interpolated output gain coefficient y n to the means configured to use the interpolated output gain coefficient y n to modify the gain of a digital audio signal, a subtractor configured to compute the difference between the target gain coefficient x n and a previously interpolated outputted gain value y n-1 (which in the first instance, will be the current gain coefficient), a multiplier configured to multiply the resultant value x n −y n-1 by a stored filter constant K which defines the response of the filter, and an adder configured to add the previously interpolated outputted gain value y n-1 to the resultant multiplied value K (x n −y n-1 ) to create the interpolated filter output y n =y n-1 +K (x n −y n-1 ).