Patent ID: 8036213

Claim:
A system comprising: a processor comprising integrated circuits; a first module device configured to interact with the processor to determine when a switch is initially connected to a network and to provide a signal in response thereto; and a second module device, configured to interact with the processor to selectively form adjacencies between the switch and a plurality of subsets of peers of the switch in response to the signal and based on one or more predetermined parameters, wherein the second module device includes one or more routines for selectively controlling a rate at which adjacencies are formed with the switch based on the one or more predetermined parameters, wherein the one or more routines are configured to control the rate at which adjacencies are formed by controlling the rate at which adjacency-forming messages are sent between the second module device and the peers of a particular subset, wherein the rate determines a number of adjacencies formed with each subset of peers, and wherein the second module device is configured to process slow-start instructions.