Patent ID: 7778597

Claim:
A repeater circuit comprising: an amplification portion that receives a first signal with data and clock information and increases the amplitude of the first signal to generate an amplified first signal, the amplification portion including a current feedback amplifier stage and a voltage limiting amplifier stage; a transceiver portion that receives the amplified first signal, recovers the data and clock information from the received amplified first signal, and transmits a second signal with the data and clock information recovered from the amplified first signal; a first isolation transformer; a printed circuit board housing the first isolation transformer, current feedback amplifier stage, voltage limiting amplifier stage, and the transceiver portion; a first linear signal trace connecting the first isolation transformer to the current feedback amplifier stage; and a second linear signal trace connecting the current feedback amplifier stage to the voltage limiting amplifier stage, wherein the first signal trace is positioned linearly with respect to the second signal trace.