Patent ID: 8621290

Claim:
A method for facilitating probabilistic error correction with partial-component sparing in a memory system, the method comprising: accessing a memory system, wherein each block of data in the memory system includes an array of bits logically organized into R rows and C columns, including a row-checkbit column containing row-parity bits for each of the R rows, an inner-checkbit column containing X=Râˆ’S inner checkbits and S spare bits, and C-2 data-bit columns containing data bits, wherein each column in the C columns is stored in a different memory component, and wherein the checkbits, which comprise the row-parity bits and the inner checkbits, are generated from the data bits to provide guaranteed detection and probabilistic correction for a failed memory component; and upon determining a failure for a component in the memory system that has failed, examining a pattern of errors associated with the component in the memory system that has failed to determine if the failure affects a partial component associated with S or fewer bits of an associated failed column, and if so, correcting and remapping data bits from the partial component to the S spare bits in the inner-checkbit column, and after the correcting and remapping are complete, resuming accesses to the memory system with guaranteed detection and probabilistic correction of a subsequent failed memory component.