Patent ID: 7605447

Claim:
A semiconductor device structure comprising at least one SRAM cell located in a hybrid substrate having a first portion with a first crystallographic orientation region and a second crystallographic region, wherein said at least one SRAM cell comprises at least two pull-up transistors, two pull-down transistors, and two pass-gate transistors, wherein the pull-down transistors are present in the first portion of the hybrid substrate having the first crystallographic orientation region that is connected through an active region that is in direct physical contact to the second crystallographic orientation region in which the pass-gate transistors are present, the first crystallographic orientation region having an upper surface coplanar with an upper surface of the second crystallographic orientation region and said first crystallographic region and said second crystallographic region comprise substrate materials of different composition, wherein the at least two pull-down transistors and the at least two pass-gate transistors are substantially similar in channel widths and have substantially similar source-drain doping concentrations, and wherein said at least one SRAM cell has a beta ratio of at least about 1.5.