Patent ID: 7389415

Claim:
A cryptographic feature enablement system comprising: a processing unit; a cryptographic chip including circuitry configured to perform encryption and decryption for each of a plurality of cryptographic systems wherein each of said plurality of cryptographic systems provides a different level of security; a non-volatile read/write memory storing an encrypted token including encrypted initialization data for enabling said cryptographic chip to perform encryption and decryption for one of said plurality of cryptographic systems in said cryptographic chip that provides a highest level of security in said cryptographic chip, wherein the encrypted token was encrypted using a Media Access Control (MAC) address of the cryptographic feature enablement system; a bus connecting said processing unit to said non-volatile memory and said cryptographic chip to transmit data between said processing unit, said non-volatile memory, and said cryptographic chip; and token decryption circuitry in said non-volatile memory to decrypt said encrypted initialization data in said encrypted token wherein said initialization data enables said circuitry in said cryptographic chip to perform encryption and decryption of data for said one of said plurality of cryptographic systems that provides said highest level of security.