Patent ID: 7218177

Claim:
A phase-locked loop with nonlinear phase-error response characteristic, the phase-locked loop comprising: a phase/frequency detector for generating a phase error signal according to a reference signal and an input signal; a charge pump for outputting a charge signal according to the phase error signal; an adaptive adjusting unit for outputting a control signal according to the phase error signal; a charge-controlled circuit for outputting a voltage signal according to the charge signal, comprising: a resistor coupled to the charge pump; a first capacitor coupled to the resistor; and a second capacitor coupled to the charge pump, wherein at least one of the resistance of the resistor, the capacitance of the first capacitor and the capacitance of the second capacitor is controlled by the control signal outputted by the adaptive adjusting unit; and a voltage-controlled oscillator for outputting an output signal according to the voltage signal, the output signal being used as the input signal or processed to generate the input signal; wherein the adaptive adjusting unit controls at least one of the resistance of the resistor, the capacitance of the first capacitor and the capacitance of the second capacitor, and thereby form a nonlinear relation between the output signal and the phase error signal.