Patent ID: 7813266

Claim:
A method on a chip comprising a plurality of signal paths, wherein the plurality of signal paths comprise a plurality of switch-able driver circuits connected to respective data source circuits of a plurality of data source circuits as defined by switch control logic, wherein according to a first setting of said switch control logic, a first signal path comprises a first data source circuit of the plurality of data source circuits connected to a first switch-able driver of the plurality of switch-able drivers, and wherein according to the first setting of said switch control logic, a second signal path comprises a second data source circuit of the plurality of data source circuits connected to a second switch-able driver of the plurality of switch-able drivers, and wherein the method comprises: transmitting a signal from the chip over the plurality of signal paths; detecting an error in the transmitted signal; responsive to the detecting the error, reconfiguring the plurality of signal paths, wherein reconfiguring comprises setting the switch control logic to a second setting of said switch control logic, wherein according to the second setting of said switch control logic the second signal path comprises the first data source circuit of the plurality of data source circuits connected to the second switch-able driver of the plurality of switch-able drivers, wherein the second data source circuit of the plurality of data source circuits is not connected to the second switch-able driver of the plurality of switch-able drivers, and wherein reconfiguring forms a reconfigured plurality of signal paths; transmitting the signal over the reconfigured plurality of signal paths; and wherein the switch control logic comprises latch controlled multiplexers, wherein the first setting of the switch control logic sets a first latch to 0, wherein the second setting of the switch control logic sets the first latch to 1, wherein if the first latch is 0 then a multiplexer connects the second data source to the second switch-able driver, and wherein if the first latch is 1 then the multiplexer connects the first data source to the second switch-able driver.