Patent ID: 7855439

Claim:
A semiconductor die package comprising: a leadframe having a first surface, a second surface, an aperture disposed between the leadframe's first and second surfaces, and a plurality of leads disposed adjacent to the aperture; a semiconductor die having a top surface, a bottom surface, at least one side surface between the top and bottom surfaces, and a plurality of conductive regions disposed on the semiconductor die's top surface, the semiconductor die being disposed in the aperture of the leadframe with its top surface substantially flush with the first surface of the leadframe, wherein the top surface of the semiconductor die comprises an active surface; at least one gap between the at least one side surface of the semiconductor die and at least one lead of the leadframe; a body of electrically insulating material disposed in at least a portion of the at least one gap, wherein the body of electrically insulating material has a top surface that is substantially flush with the top surface of the semiconductor die; and a plurality of conductive members, each conductive member having a first end electrically coupled to a conductive region of the semiconductor die and a second end electrically coupled to a lead of the leadframe, at least one conductive member having a portion disposed over at least a portion of the body of electrically insulating material.