Patent ID: 8537167

Claim:
A graphics system, comprising: a processor; a processing pipeline including a plurality of pipeline units, managed by the processor; and a plurality of decoders coupled to a connection, wherein: each decoder is associated with a first predetermined list of data structures to decode and a second predetermined list of data structures to not process further, the processor requests each of the plurality of decoders, having obtained first state information associated with a first process from each of the plurality of pipeline units, to place the first state information on the connection, the processor restores the first state information back to the plurality of decoders by placing the first state information on the connection after having switched out second state information associated with a second process from the plurality of decoders, and in response to a second data structure associated with a current state of the processing pipeline being on a first predetermined list of data structures to kill, wherein the first predetermined list is associated with a second decoder included in the plurality of decoders, the second decoder asserts a kill signal to prevent the second data structure from flowing to a next stage of the processing pipeline.