Patent ID: 8073820

Claim:
An apparatus for interconnect analysis of an electronic design, the apparatus comprising: a relational database with defined tables designed for interconnect analysis of transactions occurring between initiator intellectual property (IP) cores and target IP cores of the electronic design; a relational database application programming interface (API) suite to format input data for storing in the defined tables, to retrieve data from the defined tables based on performing a query, and to execute an algorithm to perform specific interconnect performance analysis requested by the query, wherein any functions of the API suite that are implemented in software are tangibly stored on a machine readable medium in an executable format; and a SystemC verification (SVC) database to receive SCV data generated from a first performance simulation of the interconnect being modeled with a SystemC model having a first level of abstraction, wherein the SCV database receives the SCV data from the first performance simulation of the interconnect and the API suite receives the SCV data in a form of the input data.