Patent ID: 8539157

Claim:
An apparatus comprising: a memory; and a cache memory structure stored in the memory, the cache memory structure comprising: a data area with a plurality of cache files, wherein each cache file is configured to store a version of a set of data; and a control area configured to control access to the plurality of cache files, wherein the control area comprises at least one release area that comprises: at least one version area comprising: a first version section, a second version section, and a third version section that are each configured to store at least one key that addresses data of at least one cache file, and a version offset area comprising: a new offset configured to point to one of the first version section, the second version section, and the third version section to thereby identify the pointed-to version section as a new version section, a current offset configured to point to one of the first version section, second version section, and third version section to thereby identify the pointed-to version section as a current version section, and an old offset configured to point to one of the first version section, second version section, and third version section to thereby identify the pointed-to version section as an old version section.