Patent ID: 7791371

Claim:
A level shift circuit connectable to a power semiconductor device including a high-side NMOS transistor serving as a high-side switching element, a low-side switching element, and a bootstrap circuit that generate a first potential by shifting a source potential of the high-side NMOS transistor to high potential side, the level shift circuit comprising: a drive transistor having a source-drain path coupled between the first potential and the source potential, to generate an output signal for driving a gate of the high-side NMOS transistor; a first PMOS transistor having a source and a back gate coupled to the first potential, and a drain coupled to a gate of the drive transistor; a first clamp transistor of PMOS type having a gate coupled to the source potential of the high-side NMOS transistor, and a source and a back gate coupled to the drain of the first PMOS transistor; and a second clamp transistor of PMOS type having a gate coupled to the source potential of the high-side NMOS transistor, and a source and a back gate coupled to a gate of the first PMOS transistor.