Patent ID: 7847320

Claim:
An integrated circuit structure comprising: a substrate; a limited area within said substrate, said limited area being essentially rectangular in shape; multiple parallel angled semiconductor fins on said substrate diagonally traversing in said limited area, each of said fins comprising a discrete linear structure; and multiple parallel gates on said substrate extending laterally across a width of said limited area and traversing said fins, wherein said gates have a pre-selected first pitch, wherein at least one of said fins is traversed by more than one of said gates, wherein said fins are positioned diagonally relative to said gates at a pre-selected angle and according to a pre-selected periodic pattern with none of said fins being only partially traversed by a gate and none of said gates traversing an end of a fin, and wherein said fins further have a second pitch that is predetermined, based on said angle and said first pitch, in order to achieve said periodic pattern.