Patent ID: 7868470

Claim:
A multichip package, comprising: a pair of semiconductor chip structural bodies each including, a semiconductor chip having a rectangular main surface; a first electrode pad group provided on the main surface, said first electrode pad group including a plurality of first electrode pads provided in parallel along a first side defining the main surface and provided in order from the 1st to n (where n: integer greater than or equal to 2)th first electrode pads; and a second electrode pad group provided on the main surface, said second electrode pad group including a plurality of second electrode pads provided in parallel along a second side defining the main surface and opposite to the first side and provided in order from the 1 st to n (where n: integer greater than or equal to 2)th second electrode pads, wherein one of the pair of semiconductor chip structural bodies is configured as a semiconductor chip package, said one further including: a first bonding pad group including, in an area between the first electrode pad group and the first side, of the main surface, first bonding pads provided parallel to the first side in a reverse order from the n (where n: integer greater than or equal to 2)th to 1st first bonding pads, corresponding to the first electrode pads in parallel to the first side; a second bonding pad group including, in an area between the second electrode pad group and the second side, of the main surface, second bonding pads provided parallel to the second side in a reverse order from the n (where n: integer greater than or equal to 2)th to 1st second bonding pads, corresponding to the second electrode pads in parallel to the second side; first redistribution wiring layers that respectively electrically connect the i (where i: integers from 1 to n)th first electrode pads and the i (where i: integers from 1 to n)th first bonding pads; second redistribution wiring layers that respectively electrically connect the i (where i: integers from 1 to n)th second electrode pads and the i (where i: integers from 1 to n)th second bonding pads; and an encapsulating layer formed on the main surface with a thickness that causes top faces of the first and second bonding pads to be exposed therefrom respectively, wherein the pair of semiconductor chip structural bodies are stacked on one another in such a manner that the back surfaces of the semiconductor chips respectively included in the semiconductor chip structural bodies are faced each other and side faces of the semiconductor chips, containing the first sides thereof are faced in the same direction.