Patent ID: 7383393

Claim:
A method comprising: identifying a first load instruction of a program stream executed by a processing unit as delinquent based on a buffer miss during an iteration of the first load instruction; performing a first prefetching process at a first prefetch unit for one or more iterations of the first load instruction for prefetching data from memory into a buffer, the first prefetching process based on an expected stride pattern of the one or more iterations of the first load instruction; performing a second prefetching process at a second prefetch unit for one or more iterations of the first load instruction for prefetching data from memory into the buffer, the second prefetching process based on an instruction loop that represents a subset of a sequence of instructions between iterations of the first load instruction that affect an address value associated with the first load instruction; determining a first confidence value for the first prefetching process based on a prefetch performance of the first prefetching process; determining a second confidence value for the second prefetching process based on a prefetch performance of the second prefetching process; and terminating execution of one of the first prefetching process or the second prefetching process based on a comparison of the first confidence value and the second confidence value.