Patent ID: 7328423

Claim:
A method for creating a logic circuit with an optimized number of AND/OR switches to evaluate a logic function FUNC(x,y), comprising: (a) defining said logic function FUNC(x,y) in terms of control inputs x 1 , x 2 , . . . , x n , n≧1, data inputs y 1 , y 2 , . . . , y m , m≧1, and a set of at least one operator OP i , i= 1,N , 1,N =1,2,3, . . . , N; (b) evaluating dependency relationship among said set of at least one operator OP i ; (c) means for simplifying said logic function based on said dependency relationship; and (d) means for creating said logic circuit with an optimized number of AND/OR switches to evaluate said simplified logic function.