Patent ID: 8759942

Claim:
A semiconductor device comprising: a first semiconductor region formed above a substrate, said first semiconductor region comprising a drift region; a second semiconductor region formed above said substrate and laterally enclosing at least a portion of said first semiconductor region; and an isolation structure positioned laterally between at least said drift region and said second semiconductor region, said isolation structure terminating at least said drift region and electrically insulating said second semiconductor region from said first semiconductor region, said isolation structure comprising: a first plurality of isolation trenches filled with an insulating material and extending along a first lateral direction and being spaced apart by portions of semiconductor material having a first width, said isolation structure further comprising a second plurality of isolation trenches filled with said insulating material and extending along a second lateral direction and being spaced apart by said portions of semiconductor material having a second width, and said first and second plurality of isolation trenches forming a plurality of intersection areas, wherein each of said portions of semiconductor material is electrically insulated from said drift region and said first and second pluralities of isolation trenches extend to a buried insulating layer whereby said portions of semiconductor material define an array of islands for adjusting a field distribution in said isolation structure of said pluralities of isolation trenches across said first and second lateral directions.