Patent ID: 8034699

Claim:
A method for implanting impurities into well regions of transistors, said method comprising: preparing a first mask over a substrate; performing a first shallow well implant through said first mask to implant first-type impurities to a first depth of said substrate; preparing a second mask over said substrate; performing a second shallow well implant through said second mask to implant second-type impurities to said first depth of said substrate; preparing a third mask over said substrate, said third mask having openings smaller than openings in said first mask and said second mask; performing a first deep well implant through said third mask to implant said first-type impurities to a second depth of said substrate, said second depth of said substrate being greater than said first depth of said substrate, and said first deep well implant being centered below, relative to said top surface of said substrate, said first shallow well implant; preparing a fourth mask over said substrate, said fourth mask having openings smaller than said openings in said first mask and said second mask; and performing a second deep well implant through said fourth mask to implant said second-type impurities to said second depth of said substrate, said second deep well implant being centered below, relative to said top surface of said substrate, said second shallow well implant.