Patent ID: 8885414

Claim:
A nonvolatile semiconductor memory device comprising: a p-type semiconductor substrate; a first P-well formed in the semiconductor substrate, a plurality of memory cells being formed on the first P-well; a first N-well surrounding the first P-well, the first N-well electrically separating the first P-well from the semiconductor substrate; a first negative voltage generation unit configured to generate a first negative voltage; a boost unit configured to boost a voltage and generate a boosted voltage; a well voltage transmission unit connected to the first negative voltage generation unit, the boost unit, and the first P-well, the well voltage transmission unit configured to switch a voltage being applied to the first P-well between the first negative voltage and the boosted voltage; a second P-well formed in the semiconductor substrate, a bit line connection transistor connecting a bit line of the memory cells and a sense amplifier unit being formed on the second P-well; and a second N-well surrounding the second P-well, the second N-well electrically separating the second P-well from the semiconductor substrate.