Patent ID: 7987350

Claim:
An electronic apparatus including: a first nonvolatile memory; a first volatile memory; a first microprocessor unit to which are connected the first nonvolatile memory and the first volatile memory; a second nonvolatile memory; a second volatile memory; a second microprocessor unit to which are connected the second nonvolatile memory and the second volatile memory; a communication interface arranged to interconnect the first microprocessor unit and the second microprocessor unit; and an initializing unit configured to, at power-on, execute in parallel a process of initializing data, which is stored in the first nonvolatile memory and requires initialization, into the first volatile memory by the first microprocessor unit, and a process of initializing data, which is stored in the second nonvolatile memory and requires initialization, into the second volatile memory by the second microprocessor unit; copy a second set of initialized data, which has been initialized by the second microprocessor unit and stored in the second volatile memory, into the first volatile memory via the communication interface; and copy a first set of initialized data, which has been initialized by the first microprocessor unit and stored in the first volatile memory, into the second volatile memory via the communication interface.