Patent ID: 7913059

Claim:
An information processing device, comprising: a memory; a main processor that executes programs and transfers a task that requires translating an address of the memory to at least one sub-processor; the at least one sub-processor; an I/O device; and address translation table sharing means, for sharing an address translation table, for translating logical addresses of the memory to physical addresses, between the main processor and the at least one sub-processor, wherein the at least one sub-processor comprises: request receiving means for receiving a transfer request designating a logical address of the memory; address translation means for translating the logical address designated by the transfer request to a physical address using the shared address translation table; and transfer process execution means for executing transfer process for data stored in the memory to the I/O device in accordance with the translated physical address, wherein the sub-processor is dedicated to a task of translating addresses of the memory and transferring data addressed thereby to the I/O device using the request receiving means, address translation means and transfer process execution means when the main processor does not perform such translation of the addresses of the memory.