Patent ID: 8803232

Claim:
A lateral DMOS transistor structure comprising: a semiconductor material having a top surface; a conductive gate overlying and insulated from said top surface by at least a gate dielectric, said conductive gate having a geometric shape including a rectilinear portion, and a curved portion in a curved region of said lateral DMOS transistor structure; a source region formed in said semiconductor material; a drain region formed in said semiconductor material and spaced from said conductive gate; a field oxide region formed in and above said top surface, said field oxide region extending from said conductive gate to said drain region and having a thickness greater than a thickness of said gate dielectric; and an interlevel dielectric disposed between said conductive gate and said drain region and including a plurality of isolated floating conductor leads disposed therein or thereon, at least in said curved region, wherein said plurality of isolated floating conductor leads in said curved region include metal leads formed at one device level and directly over straight metal leads formed at a different device level.