Patent ID: 7675847

Claim:
A method of modifying data in a reception chain implemented in IEEE 802.11n standard by a hardware implementation of a programmable Fast Fourier Transform (FFT) comprising the steps of: using a programmable N/2 FFT which is validated, along with a wrapper; first storing the data in a memory wherein the N FFT is applied in a FFT 128 module comprising 16 rows of data consuming one half of the memory and using a second half of the memory to store incoming time domain samples, wherein after the memory is filled, the method including the step of starting a first FFT 64 step computation and storing its output back in the memory, starting a second FFT 64 step computation and multiplying its output by W i , {where W i =exp (−2*i*PI/128)} coefficients using pipelined Cordics, combining with a previously stored FFT 64 computation result and storing a combined result back in the memory; and extending and applying the validated programmable N/2 FFT to a N FFT by splitting the N FFT into two smaller first and second FFTs, and applying said first smaller FFT to selected data samples from the N FFT and applying said second FFT to remaining data samples from the N FFT to complete handling said data.