Patent ID: 8035409

Claim:
A system for testing performance of a multi-level printed circuit board (PCB) having one or more layers of conductors carrying signals at or exceeding Gigahertz frequencies, the testing system comprising: formed at a layer of said multi-level PCB board, a first conductor line of x length and a second conductor line of y length where x>y; and, each first and second conductor line having respective capture pad termination at each end; a plated via through hole extending between a formed surface test pad connector at said top and bottom surfaces of said PCB for electrically coupling respective first and second capture pad terminations at each line end to a respective surface test pad connector provided at a top and bottom PCB surface, each test pad connector configured for electrical coupling to an RF connector device at said PCB board surface; and, a testing apparatus configured for testing said conductor line formed at a PCB layer by inputting signals at a first end of said conducting line via said RF connector device coupled to a first surface test pad connector at a PCB surface and measuring signals at a second end of said conducting line via a second RF connector device coupled to a second surface test pad connector at said PCB surface, said test apparatus processing said measured signals for modeling performance of said PCB when operating in excess of Gigahertz frequencies, said testing implementing a time-domain Short Pulse Propagation (SPP) technique.