Patent ID: 7787276

Claim:
A method for operating a memory array using a mechanical switch, in which the memory array comprises: a plurality of word lines; a plurality of bit lines intersecting the plurality of word lines; a gate electrode connected to each of the word lines; a drain electrode spaced apart from the gate electrode and connected to a capacitor; and a source electrode, the source electrode comprising: an anchor part spaced apart from the gate electrode and connected to each of the bit lines; and a mobile part having a dimple formed therein, the method comprising: applying a first voltage V 1 to a bit line selected from the plurality of bit lines; applying a second voltage V 2 greater than a sum of the first voltage V 1 and a pull-in voltage V pi to the word lines selected from the plurality of word lines; and applying a voltage that is smaller than a sum of an erase voltage V erase and the pull-in voltage V pi and greater than a difference between a write voltage V write and the pull-in voltage V pi to unselected word lines of the plurality of word lines.