Patent ID: 7631137

Claim:
A data processing system on at least one integrated circuit, the data processing system comprising at least two modules and an interconnect arranged to transmit data between the modules, wherein the interconnect comprises a first sub-interconnect and a second sub-interconnect, the first sub-interconnect using a first scheme for reservation of resources and the second sub-interconnect using a second scheme for reservation of resources, wherein the data processing system further comprises a conversion unit, the conversion unit being arranged to convert first data into second data, the first data being controlled by the first scheme for reservation of resources and the second data being controlled by the second scheme for reservation of resources; wherein the first scheme for reservation of resources and the second scheme for reservation of resources comprise slot tables for controlling transmission of data; and wherein the first sub-interconnect and the second sub-interconnect deploy different slot table sizes, and wherein the conversion unit is arranged to convert slot assignments for the first data into slot assignments for the second data.