Patent ID: 8917532

Claim:
A microelectronic package, comprising: a substrate having first and second opposed surfaces, a peripheral edge extending between the first and second surfaces, and an aperture extending between the first and second surfaces, the aperture having an axis extending in a direction of a longest dimension of the aperture and centered relative to a width of the aperture in a direction transverse to the longest dimension, the second surface having a first region disposed between the axis and the edge; a microelectronic element having memory storage array function, the microelectronic element having a surface facing the first surface of the substrate and a plurality of contacts exposed at the surface of the microelectronic element aligned with the aperture; a plurality of terminals exposed at the second surface of the substrate and configured for connecting the microelectronic package to at least one component external to the package; and leads electrically connected between the contacts of the microelectronic element and the terminals, the leads having portions aligned with the aperture, wherein the terminals include first terminals exposed in the first region of the second surface of the substrate configured to carry all of the address signals transferred to the package.