Patent ID: 7954078

Claim:
A method to produce an information structure in a computer readable memory device, wherein the information structure specifies power source hierarchy information for Register Transistor Level (RTL) an RTL circuit design that includes multiple function instances encoded in computer readable memory, comprising: specifying in the memory device a primary power domain that includes respective function instances of the RTL design; specifying in the memory device a power control related behavior (PCB) to include within the primary power domain; specifying in the memory device a secondary power domain; and providing an association within the memory device between the primary power domain and the secondary power domain, by using a computer; wherein the association is indicative to one or more electronic design automation tools, of a hierarchical power source relationship in which the secondary power domain serves as a switched power source for the function instances included in the associated primary power domain and in which the secondary power domain serves as an unswitched power source for the PCB included in the associated primary power domain; wherein the association does not indicate to the electronic design automation tool whether the switched power source uses power net switching or ground net switching; and wherein the association is used in the computer system by the one or more design tools in one or more of design simulation or design verification of both functional behavior and power control behavior of a design having the hierarchical power source relationship and to derive a physical level design at one or more stages of the circuit design.