Patent ID: 7271793

Claim:
A driving circuit comprising: a shift register; a first output enable signal line; a second output enable signal line; a video signal line; a plurality of first NAND circuits, each of the plurality of first NAND circuits electrically connecting the shift register, the each of the plurality of first NAND circuits electrically connecting the first output enable signal line; a plurality of second NAND circuits, each of the plurality of second NAND circuits electrically connecting the shift register, the each of the plurality of second NAND circuits electrically connecting the second output enable signal line; a plurality of first analog switches electrically connecting the video signal line, each of the plurality of first analog switches electrically connecting one of the plurality of first NAND circuits; and a plurality of second analog switches electrically connecting the video signal line, each of the plurality of second analog switches electrically connecting one of the plurality of second NAND circuits.