Patent ID: 8301836

Claim:
A computer-implemented method, comprising: determining, by a redundant array of independent disk (RAID) stack, a first number of processor cycles to reload first data from a first memory address of a main memory into a processor of a data processing system; loading, by the RAID stack, second data from a second memory address of the main memory into the processor, wherein the second memory address is configured to be an address offset from the first memory address; reloading, by the RAID stack, the first data from the first memory address of the main memory; determining, by the RAID stack, a second number of processor cycles to reload the first data from the first memory address of the main memory; and determining an alias offset of a cache memory associated with the processor of the data processing system based on the first number of processor cycles and the second number of processor cycle, wherein the alias offset is used to load a parity block of RAID data during parity calculations of the RAID data.