Patent ID: 8397019

Claim:
A non-volatile memory system, comprising: memory control circuitry; and a non-volatile memory unit coupled to the memory control circuitry, the non-volatile memory unit comprising a plurality of rows, each row comprising one or more row-portions, each row-portion comprising storage locations for a plurality of sectors of information, a sector of information comprising user data and overhead, the user data of a sector of information comprising even user data bytes and odd user data bytes and the overhead of a sector of information comprising even overhead bytes and odd overhead bytes; wherein the memory control circuitry is configured to program the even user data bytes and the even overhead bytes of at least one of the plurality of sectors of information into the first row-portion and to program the odd user data bytes and the odd overhead bytes of the at least one of the plurality of sectors of information into a second row-portion; wherein the memory control circuitry is configured to program the even user data bytes and the even overhead bytes of at least one other of the plurality of sectors of information into the first row-portion and to program the odd user data bytes and the odd overhead bytes of the at least one other of the plurality of sectors of information into the second row-portion; and wherein the memory control circuitry is configured to write two or more sectors of information to a row concurrently.