Patent ID: 7272675

Claim:
A data assembler, comprising: a first-in-first-out (FIFO) memory having a width of one unit; a read pointer of the FIFO memory, the read pointer to increment by at least one of a unit access per read and a fraction of the unit access per read; and a write pointer of the FIFO memory, the write pointer to increment by at least one of a unit access per write and a fraction of the unit access per write, wherein the read pointer is configured to increment by the unit access per read when the write pointer is configured to increment by the fraction of the unit access per write, wherein the read pointer is configured to increment by the fraction of the unit access per read when the write pointer is configured to increment by the unit access per write, wherein the read pointer is configured to increment by a number of bytes read from the FIFO memory, and wherein the write pointer is configured to increment by a number of bytes written in the FIFO memory.