Patent ID: 8638143

Claim:
A phase locked loop frequency synthesizer circuit comprising: a voltage controlled oscillator configured to generate an oscillator output signal; a loop filter including a capacitor, the loop filter being configured to supply a control voltage to the voltage controlled oscillator; a phase detector configured to detect a phase difference between a reference signal and a feedback signal generated from said oscillator output signal, and to generate pulses on one of a first detector signal and a second detector signal in dependence of the sign of said detected phase difference; a charge pump circuit comprising: two controlled switches configured to convert pulses on the first detector signal to be current pulses from a reference voltage to a common terminal connected to the capacitor of the loop filter, and to convert pulses on the second detector signal to be current pulses from said common terminal to ground; and a current generator comprising at least one first resistor connected between said common terminal and said controlled switches; and an operational amplifier coupled as a non-inverting amplifier, the operational amplifier comprising: an output connected to the reference voltage; an inverting input connected to a midpoint of two second, equal sized feedback resistors connected between the reference voltage and ground; and a non-inverting input connected to said common terminal, so that the reference voltage is kept at twice the voltage at the common terminal.