Patent ID: 7511569

Claim:
A circuit for supplying a voltage in a memory device, comprising: a voltage supplying unit having an output terminal, a first path and a second path, wherein the voltage supplying unit is coupled between a voltage source and a ground, the first path is coupled between the voltage source and the output terminal, and the second path is coupled between the output terminal and the ground; a third path coupled between the voltage source and the output terminal for transferring a voltage of the voltage source to the output terminal in response to a control signal; a fourth path coupled between the output terminal and the ground for discharging a voltage of the output terminal to the ground in response to the control signal; and a controller for generating the control signal by combining a bank active signal, which is enabled when the memory device is an active mode, and a delay signal, which is obtained by delaying the bank active signal for a predetermined delay time, wherein said controller is coupled to the third and fourth paths for supplying the control signal to said third and fourth paths.