Patent ID: 8536900

Claim:
A circuit comprising: a supply voltage divider, a state machine, two comparators and a threshold selector, wherein the supply voltage divider, connected with the threshold selector, is configured to divide a supply voltage V CC into N states S K , and to acquire the border voltages V K and V K+1 corresponding to the S K through a resistor divider, wherein K=1, 2, . . . N; the threshold selector, connected with the supply voltage divider and the state machine, is configured to acquire a corresponding voltage V K from the supply voltage divider according to the current state S K outputted by the state machine, send the acquired V K as V H to a first comparator in the two comparators, and to acquire a corresponding voltage V K+1 and send the acquired V K+1 as V L to a second comparator in the two comparators, wherein the V H is greater than the V L ; the first comparator is configured to compare a reference voltage V ref from a reference voltage circuit with the V H in magnitude; the second comparator is configured to compare the V ref with the V L in magnitude; and the state machine is configured to determine whether or not the V H and the V L outputted by the threshold selector are matched with the current state S K , when each clock period of an oscillator (OSC) arrives, according to the output results of the first comparator and the second comparator, wherein if the V H and the V L are matched with the current state S K , the OSC of the state machine will be turned off, and otherwise, the OSC will be turned on to provide the clock of the state machine to output the next state S k+1 or S k−1 of the S K .