Patent ID: 7327169

Claim:
A clocked inverter comprising: a first transistor and a second transistor electrically connected in series, a third transistor and a fourth transistor electrically connected in series and a fifth transistor and a sixth transistor electrically connected in series, wherein: gates of the third transistor and the fourth transistor are electrically connected to each other, drains of the third transistor and the fourth transistor are each electrically connected to a gate of the first transistor, sources of the first transistor and the fourth transistor are each electrically connected to a first power source, sources of the second transistor and the sixth transistor are each electrically connected to a second power source, gates of the fifth transistor and the sixth transistor are electrically connected to each other, drains of the fifth transistor and the sixth transistor are each electrically connected to a gate of the second transistor, a first signal is inputted to a source of the third transistor, a second signal is inputted to a source of the fifth transistor, the first signal is different from the second signal, an amplitude of the first signal is smaller than a potential difference between the first power source and the second power source, and an amplitude of the second signal is smaller than the potential difference between the first power source and the second power source.