Patent ID: 8356122

Claim:
A distributed trace device, comprising: a plurality of processing cores, each of the plurality of processing cores having one or more local performance counters; a central storage unit having at least a memory; a daisy chain connection connecting the central storage unit and the plurality of processing cores and forming a daisy chain ring layout, wherein at least one of the plurality of processing cores places trace data on the daisy chain connection for transmitting the trace data to the central storage unit, and wherein the central storage unit detects the trace data and stores the trace data in the memory, wherein the local performance counters each comprise lower resolution memory than the memory of the central storage unit, wherein the local performance counters count and store a number of events, and before an overflow of the local performance counters occurs, the local performance counters transfer the count to the memory of the central storage unit via the daisy chain connection, the memory of the central storage unit aggregating the count of the number of events into higher resolution count for each of the respective local performance counters.