Patent ID: 7020402

Claim:
An apparatus including a crosstalk compensation engine for reducing signal crosstalk effects within a data signal, comprising: a plurality of input signal terminals that convey a plurality of demultiplexed data signals corresponding to a plurality of multiplexed data signals received via a signal transmission medium, wherein first and second ones of said plurality of demultiplexed data signals correspond to first and second ones of said plurality of multiplexed data signals, respectively, and said first demultiplexed data signal includes a first signal crosstalk product related to an interaction among at least said first and second ones of said plurality of multiplexed data signals within said signal transmission medium; an output signal terminal that conveys an output data signal corresponding to said first demultiplexed data signal and including a second signal crosstalk product corresponding to said first signal crosstalk product, wherein a ratio of said second signal crosstalk product and said output data signal is substantially less than another ratio of said first signal crosstalk product and said first demultiplexed data signal; and crosstalk compensation circuitry, coupled between said plurality of input signal terminals and said output signal terminal, that processes said plurality of demultiplexed data signals to provide said output data signal, wherein said crosstalk compensation circuitry comprises mutiplexing crosstalk compensation circuitry that compensates for signal crosstalk effects resulting from dense wavelength-division multiplexing of a plurality of input data signals used to provide said plurality of multiplexed data signals, and said multiplexing crosstalk compensation circuitry comprises signal combining circuitry, coupled to a first one of said plurality of input signal terminals, that receives and subtracts at least one processed signal from said first demultiplexed data signal to provide a resultant signal, nonlinear processing circuitry, coupled between at least a second one of said plurality of input signal terminals and said signal combining circuitry, that receives and nonlinearly processes at least said second one of said plurality of demultiplexed data signals to provide said at least one processed signal, and signal slicing circuitry, coupled to said signal combining circuitry, that receives and slices said resultant signal to provide said output data signal.