Patent ID: 7696916

Claim:
A parallel type analog-to-digital conversion circuit, comprising: a reference signal generating portion for generating a plurality of reference signals different in voltage from one another; and a comparison amplification portion for amplifying voltage differences between the plurality of reference signals generated by said reference signal generating portion, and an input signal, and outputting the voltage differences thus amplified; said comparison amplification portion including a plurality of amplifiers, input resetting switches connected to input terminals of said plurality of amplifiers, respectively, and adapted to make an input signal to each of said plurality of amplifiers invalid, first sampling capacitors including one terminals connected to output terminals of said plurality of amplifiers, respectively, second sampling capacitors including one terminals connected to the output terminals of said plurality of amplifiers, respectively, first sampling switches provided between the other terminals of said first sampling capacitors, and a portion including a predetermined potential, and second sampling switches provided between the other terminals of said second sampling capacitors, and a portion including the predetermined potential, wherein a control operation for holding each of said input resetting switches and said first sampling switches in an ON state for a given time period, and a control operation for holding each of said second sampling switches in an ON state for a given time period are carried out alternately, so that signals corresponding to the voltage differences between the input signal and the reference signals are outputted alternately through said first sampling capacitors and through said second sampling capacitors.