Patent ID: 8411707

Claim:
A data acquisition circuit comprising: (a) a multiplexer circuit for receiving various input signals and multiplexing them in accordance with a multiplexer address signal to generate various corresponding values of a multiplexer output signal; (b) an input amplifier for amplifying the multiplexer output signal to produce an amplified signal; (c) a sampling and holding circuit having an input coupled to an output of the input amplifier to receive, sample, and hold the amplified signal; (d) a digitizing circuit for digitizing the sampled and held amplified signal to produce a digital signal representative of the multiplexer output signal; (e) control circuitry for controlling a time at which at least a portion of the digitizing circuit is powered up for analog to digital conversion operation and controlling a time at which the portion of the digitizing circuit is powered down to reduce power consumption, in response to a power control signal, wherein powering up of the digitizing circuit causes a power-up glitch on the input of the digitizing circuit; (f) the control circuitry also providing a first predetermined amount of time between the power-up glitch and a beginning of a conversion process by the digitizing circuit to allow settling of the power-up glitch; and (g) the control circuitry also providing a multiplexer address signal to cause the multiplexer circuit to multiplex a next one of the input signals so as to cause a corresponding next value of the amplified signal to occur at a beginning of a conversion by the digitizing circuit of a previous sampled value of the amplified signal, wherein the digitizing circuit includes a SAR ADC (successive approximation register analog to digital converter) and wherein the first predetermined amount of time is sufficiently large to allow a bandwidth of the input amplifier to be below a predetermined bandwidth that allows power dissipation of the input amplifier to be below a predetermined level, wherein the input amplifier remains in a fully turned on condition during all conversion operation by the SAR ADC.