Patent ID: 8554815

Claim:
In a frequency synthesis device, a method for synthesizing signal frequencies using a single reference clock and a primitive ratio of integers, the method comprising: accessing a plurality (k) of reference clock frequency values (f r i ), where 1≦i≦k, and also accessing a plurality of synthesized clock frequency values (f o i ); for each synthesized clock frequency value, calculating a raw ratio of integers Np raw i and Dp raw i , such that: f o i = Np raw i Dp raw i × f r i ; finding a greatest common divisor (GCD) of Np raw i and Dp raw i (GCD(Np raw i ,Dp raw i )), and primitive ratio of integers Np i and Dp i ⁡ ( Np i Dp i ) , for each raw ratio of integers, such that: N p i = Np raw i GCD ⁡ ( Np raw i , Dp raw i ) ; and D p i = Dp raw i GCD ⁡ ( Np raw i , Dp raw i ) ; selecting a common clock frequency value (f cr ); performing a calculation to determine a final ratio of integers N cr i and D cr i ( C · ( N cr i D cr i ) ) for each synthesized clock frequency value, the calculation a function of values selected from the common clock frequency value, each primitive ratio of integers, each reference clock frequency value, where C is an integer value; storing each final ratio of integers, cross-referenced to its associated synthesized clock frequency value, in a tangible memory medium; and using a final ratio of integers accessed from the tangible memory medium to generate the associated synthesized clock frequency value.