Patent ID: 7882299

Claim:
A method of programming an array of non-volatile memory cells having minimum units of program using a cache memory, comprising: receiving an addressable data packet having a logical address, wherein each minimum unit of program has a size greater than the addressable data packet; selecting a physical location in the array of non-volatile memory cells for storing the addressable data packet; recording the physical location for the addressable data packet; if there is no cached data in the cache memory, then storing the addressable data packet in the cache memory; if there is cached data in the cache memory and if the selected physical location is in a same unit of program of the array of non-volatile memory cells as a selected physical location of cached data, then storing the addressable data packet in the cache memory; and if there is cached data in the cache memory and if the selected physical location is not in the same unit of program of the array of non-volatile memory cells as a selected physical location of the cached data, then programming the cached data to the array of non-volatile memory cells and storing the addressable data packet in the cache memory.