Patent ID: 8132320

Claim:
A circuit board process, comprising: providing a first substrate having a base, a first metal layer, a second metal layer, and at least a first conductive structure passing through the base and electrically connected to the first metal layer and the second metal layer, wherein the first metal layer is disposed on a first surface of the base, and the second metal layer is disposed on a second surface of the base; patterning the first metal layer to form a first circuit layer having a plurality of first pads; forming a first solder mask on the first circuit layer and in the first conductive structure and exposing bonding surfaces of the first pads; performing a roughening process on the bonding surfaces of the first pads, so as to form a roughened layer; providing a second substrate, at least an insulation layer, and a third metal layer, wherein the second substrate and the insulation layer have a common opening, and the third metal layer covers the common opening; and laminating the second substrate and the insulation layer on the first surface of the base, wherein the first solder mask and the first pads are disposed in the common opening.