Patent ID: 7764554

Claim:
An apparatus, comprising: a terminal; a first plurality of driver lines for driving the terminal to a first logic state responsive to a first enable signal; and a first phase mixer coupled to a first one of the first plurality of driver lines, the first phase mixer being operable to receive the first enable signal and a first delayed enable signal derived from the first enable signal and generate a first signal on the first driver line having a first configurable delay with respect to the first enable signal by mixing the first enable signal and the first delayed enable signal, the first phase mixer including a plurality of stages, each stage being responsive to a bit of a first control word to select one of the first enable signal or the first delayed enable signal as an output of the stage to generate the first signal, the first phase mixer further having an output providing a second delayed enable signal; and a second phase mixer coupled to a second one of the first plurality of driver lines, the second phase mixer being operable to receive the first enable signal and the second delayed enable signal from the first phase mixer and generate a second signal on the second driver line having a second configurable delay with respect to the first enable signal by mixing the first enable signal and the second delayed enable signal, the second phase mixer including a plurality of stages, each stage being responsive to a bit of a second control word to select one of the first enable signal or the second delayed enable signal as an output of the stage to generate the second signal, the second phase mixer further having an output providing the first delayed enable signal for the first phase mixer.