Patent ID: 7983371

Claim:
A method of offsetting a reference frequency of a quadrature reference clock signal, comprising: generating the quadrature reference clock signal at the reference frequency, the quadrature reference clock signal comprising first and second sinusoidal signals; choosing a base offset value from a plurality of possible offset values, the base offset value corresponding to a base offset frequency; generating a quadrature offset clock signal at the base offset frequency based at least in part on the base offset value, the quadrature offset clock signal comprising third and fourth sinusoidal signals; performing a polyphase mixing operation between the quadrature reference clock signal and the quadrature offset clock signal to generate an agile clock signal having an agile clock frequency equal to the reference frequency plus the base offset frequency, and determining a phase offset value corresponding to an offset phase, wherein plurality of possible offset values are offset from each other by a set interval corresponding to an offset frequency step, wherein the quadrature offset clock signal is generated at the base offset frequency based at least in part on a frequency offset value, and at the offset phase based at least in part on the phase offset value, and wherein the agile clock signal has the agile clock frequency equal to the reference frequency plus the base offset frequency, and has an agile clock phase equal to a reference phase plus the offset phase.