Patent ID: 7368368

Claim:
A method of conducting multiple step multiple chamber vapor deposition while avoiding reactant memory in the relevant reaction chambers, the method comprising: depositing a layer of a first semiconductor material on a substrate using vapor deposition in a first deposition chamber; purging the first deposition chamber to reduce vapor deposition source gases remaining in the first deposition chamber following the deposition growth and prior to opening the chamber; transferring the substrate to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to thereby prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects; thereafter depositing a second layer of a different semiconductor material on the substrate in the second chamber using vapor deposition; purging the second deposition chamber to reduce vapor deposition source gases remaining in the second deposition chamber following the deposition growth and prior to opening the second deposition chamber; transferring the substrate to the first deposition chamber while isolating the second deposition chamber from the first deposition chamber to thereby prevent reactants present in the second chamber from affecting deposition in the first deposition chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects; and thereafter depositing an additional layer of the first semiconductor material on the second deposited layer in the first chamber using vapor deposition.