Patent ID: 8728892

Claim:
A method comprising: designing a standard cell comprising: determining a fin pitch of semiconductor fins in the standard cell, wherein the semiconductor fins are portions of FinFETs, and wherein the fin pitch is equal to or smaller than all other pitches of the semiconductor fins in the standard cell; determining a grid comprising grid lines having a uniform pitch; determining a metal pitch of metal lines in a bottom metal layer over the standard cell to be equal to the uniform pitch, wherein the metal pitch is greater than the fin pitch, and wherein the steps of determining the fin pitch and determining the metal pitch are formula based, and are based on formula: (TN*MetP)/FP=FN, wherein TN is a metal track number of the standard cell, MetP is the metal pitch, FP is the fin pitch, and FN is a total number of semiconductor fins that can be accommodated by the standard cell; and aligning the metal lines to the grid lines, with neighboring metal lines having pitches equal to positive integer times the uniform pitch, wherein the metal lines are in the bottom metal layer of the standard cell; and implementing the standard cell on a semiconductor wafer.