Patent ID: 7523202

Claim:
A system for resolving contention issues in a fibre optic switch environment, said contention issues occurring during channel program execution, comprising: at least one channel operating on a host system, said at least one channel executing a channel program; wherein said at least one channel is in receipt of a status packet from a control unit; and wherein further, said status packet indicates a no-longer busy status for a device; and wherein further, said control unit is in communication with said at least one channel via a fibre optic switch network; and a status acceptance packet including a re-initiate field that indicates to the control unit whether or not said at least one channel intends to re-initiate a channel program, said re-initiate field operable for receiving at least one of a first, second and third combination of bits; wherein said at least one channel performs: specifying whether said at least one channel intends to re-initiate said channel program that previously resulted in a device-busy status; if said at least one channel does not intend to re-initiate said channel program, setting said second combination of bits in said re-initiate field of a status-acceptance packet operable for indicating that said at least one channel will take no further action; if said at least one channel intends to re-initiate said channel program, setting said first combination of bits in said re-initiate field of said status-acceptance packet operable for indicating that said channel will re-initiate said channel program after waiting a first time period; if said at least one channel intends to re-initiate said channel program, setting said third combination of bits in said re-initiate field of said status—acceptance packet operable for indicting that said channel will re-initiate said channel program after waiting a second time period; transmitting said status-acceptance packet to said control unit; and re-initiating said channel program in response to said re-initiate field being set by at least one of said first and third combination of bits.