Patent ID: 7782665

Claim:
A method of managing a multi-level memory device that includes singularly addressable three-level cells, the method comprising: storing strings of three bits by coding them in corresponding ternary strings according to a coding scheme and writing each of the ternary strings in a respective pair of three-level cells; programming a pair of adjacent bits, belonging to at least one of a same string and two adjacent strings, by identifying pairs of three-level cells to be programmed that encode the strings of three bits and programming each pair of three-level cells by at least determining whether a least significant cell of a pair of three-level cells is to be programmed in a state corresponding to a highest program level, and, if so, programming the least significant cell in the state corresponding to the highest program level, determining whether a most significant cell of the pair of three-level cells is to be programmed in a state corresponding to either an intermediate program level or the highest program level, and, if so, programming the most significant cell in the state corresponding to the intermediate program level, determining whether the least significant cell of the pair of three-level cells is to be programmed in a state corresponding to the intermediate program level, and, if so, programming the least significant cell in the state corresponding to the intermediate program level, and determining whether the most significant cell of the pair of three-level cells is to be programmed in a state corresponding to the highest program level, and, if so, programming the most significant cell in the state corresponding to the highest program level.