Patent ID: 7253063

Claim:
A method of fabricating a composite gate dielectric layer comprising the step of: forming a complementary dielectric layer upon a layer of silicon oxide, SiO x<2 , the layer of silicon oxide formed on a silicon substrate and having a thickness of less than about Å and a dielectric constant greater than about 3.9 and less than about 12, wherein step of forming a complementary dielectric layer upon a layer of silicon oxide comprises the steps of: forming a first monolayer of oxygen upon a silicon substrate by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition or low pressure chemical vapor deposition; forming a monolayer of silicon upon the first monolayer of oxygen by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition or low pressure chemical vapor deposition; forming a second monolayer of oxygen upon the monolayer of silicon by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition or low pressure chemical vapor deposition; and growing the complementary dielectric layer upon the second monolayer of oxygen.