Patent ID: 8279153

Claim:
A liquid crystal display comprising: a liquid crystal display panel including a plurality of data lines, a plurality of gate lines crossing the data lines, and a plurality of liquid crystal cells; a data drive circuit that inverts a polarity of a data voltage supplied to the data lines in response to a polarity control signal; a gate drive circuit that supplies a gate pulse to the gate lines; and a timing controller that generates the polarity control signal and controls the data drive circuit and the gate drive circuit, wherein first to fourth liquid crystal cells of the liquid crystal cells are aligned in a direction of the data line, wherein a logic state of the polarity control signal is inverted every one horizontal period and every one frame period for first to (N−1)th frame periods and (N+I)th to (2N−1)th frame periods, where N is an integer, wherein the first to fourth liquid crystal cells charge a data voltage having a polarity different from a previous polarity for the first to (N−1)th frame periods, and the (N+I)th to (2N−1)th frame periods, wherein the polarity control signal is fixed in a low logic state for an Nth frame period, wherein the first and the third liquid crystal cells charge a negative voltage for the (N−1)th and Nth frame periods, and the second and the fourth liquid crystal cells charge the negative voltage for the Nth and (N+I)th frame periods, and wherein the polarity control signal is fixed in a high logic state for a 2Nth frame period, the first and the third liquid crystal cells charge a positive voltage for the (2N−1)th and 2Nth frame periods, and the second and the fourth liquid crystal cells charge the positive voltage for the 2Nth and a (2N+I)th frame periods.