Patent ID: 8723245

Claim:
A nonvolatile memory device comprising: a substrate comprising first and second active regions isolated from each other by an element isolation trench; first and second tunnel insulating films located in the first and second active regions, respectively; first and second floating gate electrodes located on the first and second tunnel insulating films, respectively; a control gate electrode located above the first and second floating gate electrodes; a first insulating layer of a first insulating material located on top surfaces and side surfaces of the first and second floating gate electrodes, located in direct physical contact with side surfaces of the first and second tunnel insulating films and located on an inner surface of the element isolation trench; an electron trap layer of a second insulating material located on the first insulating layer, the second insulating material comprising an electron trapping property by which an electron moving from the first and second active regions to the control gate electrode is trapped; and a second insulating layer of the first insulating material on the electron trap layer, wherein the first insulating material is lower in electron trapping property than the second material, and the first insulating layer and the electron trap layer fill the element isolation trench, fill a first space between the first tunnel insulating film and the second tunnel insulating film, and fill a second space between the first floating gate electrode and the second floating gate electrode; and wherein the second insulating layer is in direct physical contact with the electron trap layer and does not fill the second space between the first floating gate electrode and the second floating gate electrode.