Patent ID: 8384434

Claim:
A semiconductor device, comprising: a chip; a plurality of pads that is formed along a perimeter of the chip, and that includes a first pad and a second pad placed next to the first pad; and a circuit that is formed on the chip, and that is coupled to the first and second pads, wherein the circuit comprises: first and second conductivity type transistors that are coupled between first and second reference potentials; and a comparator that includes a first input node coupled to the first pad and a second input node coupled to the second pad, and that compares a potential of the first input node with a potential of the second input node, wherein the first pad is coupled to gate electrodes of the first and second conductivity type transistors, wherein the second pad is coupled to drain electrodes of the first and second conductivity type transistors, wherein the circuit comprises a first circuit, wherein the semiconductor device further comprises a second circuit that is coupled to the first pad, and that is different from the first circuit, and wherein the second circuit receives a signal from the first pad or outputs a signal to the first pad.