Patent ID: 7956931

Claim:
A delay circuit acquiring an output signal delayed from an input signal, comprising: a switched capacitor group that includes a plurality of switched capacitor units, wherein each of the plurality of switched capacitor units has a switching element, and a capacitive element which is charged/discharged by turning on/off the switching element, and wherein the plurality of switched capacitor units are connected such that the input signal is input in common to all of the plurality of switched capacitor units and such that the capacitive elements are charged as well as such that the capacitive elements are discharged to allow the output signal to be output from each of the plurality of switched capacitor units; and a switching control unit that performs on/off control of each of the switching elements of the plurality of switched capacitor units, to cause each of the capacitive elements of the plurality of switched capacitor units to be charged in sequence based on the input signal, and that, upon causing the each of the capacitive elements to be charged in sequence based on the input signal, causes the capacitive element charged last time to be discharged, to allow the output signal to be output in sequence from each of the plurality of switched capacitor units, and that, upon on/off switching of each of the switching elements of the plurality of switched capacitor units, performs control of all of the switching elements of the plurality of switched capacitor units so as to be turned off.