Patent ID: 7180512

Claim:
An integrated circuit, comprising: a first signal-inversion switching circuit having a first input node to receive a first input signal and a first output node to output an output signal, the first signal-inversion switching circuit configured to output an inversion of the first input signal at the first output node in response to a first state of a switching signal and to output the first input signal without logic inversion at the first output node in response to a second state of the switching signal; a signal processing circuit which performs signal processing based on the output signal of said first signal-inversion switching circuit; and a second signal-inversion switching circuit having a second input node to receive the output signal of said first signal-inversion switching circuit as a second input signal and a second output node to output an output signal, the second signal-inversion switching circuit configured to output an inversion of the second input signal at the second output node in response to the second state of the switching signal and to output the second input signal without logic inversion at the second output node in response to the first state of the switching signal.