Patent ID: 7378324

Claim:
A method of forming a transistor, comprising: forming a P-type collector in a silicon substrate; forming an intrinsic base on said collector, said intrinsic base including an N-type dopant species, germanium and carbon; forming an N-type extrinsic base over a first region and a second region of said intrinsic base, said first region over said collector and said second region over a dielectric adjacent to said collector; forming a P-type emitter on said first region of said intrinsic base; and wherein forming said intrinsic base includes: forming a first intrinsic silicon layer on said collector; forming a first silicon-germanium (SiGe) layer on said first intrinsic silicon layer and doping said first SiGe layer with carbon; forming an N-type doped SiGe layer on said first SiGe layer and doping said N-type doped SiGe layer with said N-type dopant species and carbon; forming a second SiGe layer on said first intrinsic silicon layer and doping said second SiGe layer with carbon; and forming a second intrinsic silicon layer on said second SiGe layer.