Patent ID: 7719076

Claim:
A HV MOS transistor device, comprising: a substrate of a first conductive type; a source of a second conductive type disposed on the substrate; a drain of the second conductive type disposed on the substrate; a first ion well of the second conductive type disposed around the drain in the substrate; an isolation structure disposed on a surface of the substrate between the source and the drain; a gate dielectric layer disposed on the surface of the substrate between the source and the isolation structure; a gate disposed on the gate dielectric layer and extended to the isolation structure; a plurality of field plates covering the isolation structure; and at least a first doped region of the first conductive type disposed in the first ion well and between the source of the second conductive type and the drain of the second conductive type, and a first interface between the first ion well and the first doped region near the source disposed in a region under any one of the field plates; wherein the first doped region is completely disposed under the isolation structure and completely isolated by the first ion well.