Patent ID: 8044434

Claim:
An MIS field-effect transistor, comprising: a nitride semiconductor multilayer structure portion including a first group III-V nitride semiconductor layer of a first conductivity type, a second group III-V nitride semiconductor layer of a second conductivity type stacked on the first group III-V nitride semiconductor layer and a third group III-V nitride semiconductor layer of the first conductivity type stacked on the second group III-V nitride semiconductor layer; a gate insulating film formed on a wall surface formed over the first, second and third group III-V nitride semiconductor layers to extend over the first, second and third group III-V nitride semiconductor layers; a gate electrode made of a conductive material formed as being opposed to the second group III-V nitride semiconductor layer with the gate insulating film interposed therebetween; a drain electrode electrically connected to the first group III-V nitride semiconductor layer; and a source electrode provided as being in contact with both of the second group III-V nitride semiconductor layer and the third group III-V nitride semiconductor layer, wherein the source electrode includes a first electrode portion made of a first conductive material, and a second electrode portion, made of a second conductive material different from the first conductive material, bonded to the first electrode portion, the first electrode portion is in contact with the second group III-V nitride semiconductor layer, the second electrode portion is in contact with the third group III-V nitride semiconductor layer, a source electrode trench reaching the second group III-V nitride semiconductor layer from the third group III-V nitride semiconductor layer is formed, the source electrode trench has a bottom surface and a sidewall extending over the second and third group III-V nitride semiconductor layers, the source electrode is embedded in the source electrode trench, the first electrode portion is embedded in the source electrode trench such that the first electrode portion is in contact with the second group III-V nitride semiconductor layer on the bottom surface and the sidewall, the second electrode portion is embedded in the source electrode trench to fill up the source electrode trench such that the second electrode portion is in contact with the third group III-V nitride semiconductor layer on the sidewall, and the first electrode portion is embedded in the source electrode trench from the bottom surface up to a height of a layer thickness intermediate portion of the third group III-V nitride semiconductor layer beyond an interface between the second group III-V nitride semiconductor layer and the third group III-V nitride semiconductor layer.