Patent ID: 8482081

Claim:
A semiconductor apparatus, comprising: a collector layer formed in a semiconductor substrate; a base formed on the collector layer in the semiconductor substrate; an emitter formed above the collector layer via the base and being surrounded by the base except for an upper surface thereof; a conductive film laminated on, with an insulation film therebetween, an upper surface of the semiconductor substrate above a circumference of the emitter and a part of the base that is adjacent to the emitter, the conductive film being electrically connected with a predetermined wiring; and a first MOS transistor which has been formed in an area of the semiconductor substrate that is different from an area in which the base is formed, the first MOS transistor including a first source, a first drain, and a first gate electrode, the first source and the first drain of the first MOS transistor having a same conductive type as the emitter, wherein the emitter includes: a first emitter area including an area above which the conductive film is not laminated; and a second emitter area being a remaining area of the emitter excluding the first emitter area, wherein the second emitter area is positioned under the conductive film, is sandwiched between the first emitter area and the base at least in an upper side of the semiconductor substrate, and is lower in density of impurities than the first emitter area, and wherein each of the first source and the first drain includes: a body area including an area above which the first gate electrode is not laminated; and a low impurity density area being lower in density of impurities than the body area and formed at a position under the first gate electrode, and the first emitter area and the body area of each of the first source and the first drain have equivalent impurities and density of impurities, and the low impurity density area and the second emitter area have equivalent impurities and density of impurities.