Patent ID: 6875637

Claim:
A method for manufacture of a semiconductor package comprising the steps of: providing an insulation film, forming two rows of sprocket holes comprising a plurality of sprocket holes formed at a pitch L along both edges of the insulation film, forming a two-dimensional array of through holes between the rows of sprocket holes, each through hole in said array spaced from adjacent through holes by a pitch p, forming a two-dimensional plurality of circuit patterns upon the insulation film according to size of the semiconductor package, forming a conductor pattern electrically connected with the plurality of circuit patterns having a main line surrounding a perimeter of the plurality of circuit patterns and a sub-line electrically connecting each of the circuit patterns to the main line; mounting a semiconductor chip within a respective prescribed region of each circuit pattern of the insulation film and electrically connecting the semiconductor chip with the circuit pattern; performing resin sealing for partitioning off each region enclosed by the main line of the conductor pattern; and cutting apart into individual semiconductor packages by dicing along the sub-lines of the insulation film, wherein the dicing step is carried out by use of a dicing blade having a blade trim width wider than the wiring width of the sub-line of the conductor pattern whereby the sub-line is not left behind upon the insulation film.