Patent ID: 8704454

Claim:
A method of forming an integrated power circuit with an integrated power supply, comprising: forming a dielectric region having a first region and a second region over a substrate; forming one or more capacitors in the first region of the dielectric region, each capacitor comprising; multiple conductive layers separated by multiple dielectric layers horizontal to the substrate, the conductive layers comprising cathode layers interleaved with anode layers, the multiple dielectric layers comprising the first region of the dielectric region; the interleaved cathode and anode layers offset to form cathode fins at a first end, and anode fins at a second end, the cathode and anode fins extending beyond the ends of respectively the anode layers and the cathode layers; forming a plurality of lower transformer windings extending vertically in the second region of the dielectric region; for each capacitor, forming first and second conductive vias, the first conductive via formed through the cathode fins, in contact with respective cathode layers and not in contact with any anode layer; and the second conductive via formed through the anode fins, in contact with respective anode layers and not in contact with any cathode layer; forming a redistribution layer including contacts to each first and second conductive via, and contacts to the lower transformer windings; forming a non-conductive layer over the one or more capacitors, and the lower transformer windings, and the redistribution layer; disposing at least one embedded integrated circuit die in the non-conductive layer; disposing a torroidal core in the non-conductive layer, over the lower transformer windings; forming a plurality of upper transformer windings in the non-conductive layer, each upper transformer winding contacting a respective lower transformer winding, such that at least some of the upper transformer windings extend axially within the torroidal core; the upper and lower transformer windings and the torroidal core comprising a transformer; and forming connections between the at least one integrated circuit die and the redistribution layer.