Patent ID: 8691608

Claim:
A method of forming a semiconductor device, comprising: depositing a first metal layer on a bulk substrate, the first metal layer comprising a first electrode; depositing a first dielectric layer on the first metal layer, the first dielectric layer having a thickness h; depositing a second dielectric: layer on the first dielectric layer; forming a second metal layer on the second dielectric layer, the second metal layer comprising a second electrode having a width w, which extends through the second dielectric layer down to the first dielectric layer; etching the first dielectric layer selective to the first metal layer, the second metal layer and the second dielectric layer to form an undercut structure at a lateral depth d into a side surface of the first dielectric layer; and anisotropically depositing a third dielectric layer to enclose the undercut structure in the first dielectric layer to form a nanochannel that longitudinally extends in a direction parallel to a plane of the bulk substrate, wherein a top wall of the nanochannel is defined at least in part by a surface of the second electrode and a bottom surface of the second dielectric layer, wherein a bottom wall of the nanochannel is defined by a surface of the first electrode, wherein a first side wall of the nanochannel is defined at least in part by a side surface of the first dielectric layer, wherein a second side wall of the nanochannel is defined at least in part by a surface of the third dielectric layer, and wherein the nanochannel has a cross-sectional area) of h×d.