Patent ID: 8138570

Claim:
An isolated junction field-effect transistor comprising: a semiconductor substrate of a first conductivity type; a floor isolation region of a second conductivity type opposite to the first conductivity type submerged in the substrate; a filled trench comprising a dielectric material and extending downward from a surface of the substrate, a bottom of the filled trench being located above a top of the floor isolation region; a sidewall isolation region of the second conductivity type extending downward from a bottom of the filled trench at least to the top of the floor isolation region, the sidewall isolation region being submerged in the substrate and not extending upward to the surface of the substrate, the floor isolation region, filled trench and sidewall region together enclosing an isolated pocket of the substrate; a source region of the first conductivity type adjacent the surface of the substrate in the isolated pocket; a drain region of the first conductivity type adjacent the surface of the substrate in the isolated pocket; and a gate region of the second conductivity type disposed between the source and drain regions, a channel region of the transistor comprising an area of the isolated pocket between the gate region and the floor isolation region.