Patent ID: 8037436

Claim:
A circuit verification apparatus for verifying a net list of wiring connections designed for a printed wiring board (PWB) comprising: a net list reduction art which generates a reduction net list, in which unnecessary components and unnecessary connections for verification are eliminated from connection relationships for all components used in the PWB, via referring to a reduction components library which defines the unnecessary components and unnecessary connections and a power and ground net library which defines a net to become a power and ground net, by connecting wiring between pins of the unnecessary component defined in the reduction components library, disconnecting wiring at a pin relating to the power and ground net and removing the unnecessary component; a pin conversion part which converts a specified pin name according to predetermined conversion information among pin names included in the reduction net list, and generates a conversion net list in which pin names corresponding to the predetermined conversion information have been converted; a connection rule which includes each connection rule for defining an expected wiring connection in a verification target PWB and defines conditions of a start point and an end point of the expected wiring connection; a rule expanding part which generates a post-development rule, in which the start point conditions and the corresponding end point conditions are stored, based on data read from the connection rule and the conversion net list by searching a pin whose conditions agree with the start point conditions defined in the connection rule, specifying the pin as a start point pin, developing the end point conditions based on the connection rule via using attribute information of the start point pin and correlating the developed end point conditions to the start point conditions in the post-development rule; and a net list and rule matching verification part which verifies a matching state of the start point and corresponding end point for each connection via referring to the reduction net list, the conversion net list, and the post-development rule, and outputs a verification result, wherein, the rule expanding part searches all pins successively used in the conversion net list for specifying the start point pin to determine the end point conditions.