Patent ID: 8704307

Claim:
A microchip comprising an ESD protection device for protecting the microchip from electrostatic discharge damage, the ESD protection device having a thermal breakdown voltage and a BJT triggering voltage, the ESD protection device comprising: a semiconductor substrate; a plurality of isolation regions formed over the semiconductor substrate along a length direction of the semiconductor substrate; a gate formed over the semiconductor substrate; a drain formed adjacent to the gate, the drain comprising: a drain active region formed a first predetermined distance apart from a sidewall of the gate facing the drain active region, the drain active region having a first impurity ion concentration; a drain drift region formed adjacent to the sidewall of the gate or extending to the sidewall, the drain drift region having a second impurity ion concentration; and a drain impurity region formed a second predetermined distance apart from the sidewall of the gate along the length direction, the drain impurity region having a thickness that is greater than the thickness of the drain drift region and having a third impurity ion concentration; and a source formed on an opposite side of the gate from the drain, wherein the gate and the source are connected to a ground line, and the drain active region is connected to a power line or an I/O pad, and the thermal breakdown voltage is higher than the BJT triggering voltage.