Patent ID: 8354318

Claim:
A method of fabrication of a semiconductor memory device, comprising: forming a tunnel insulation film on a semiconductor substrate; forming a first floating electrode material on the tunnel insulation film; forming trenches in that part of the semiconductor substrate which serves as device isolation regions, the trenches being formed through the first floating electrode material and the tunnel insulation film; forming first and second device isolation insulation films in the trenches such that the first and second device isolation insulation films have an upper surface higher than that of the first floating electrode material; forming a second floating electrode material on the first floating electrode material, and the first and second device isolation insulation films; etching back the second floating electrode material and leaving the second floating electrode material on side walls of the second device isolation insulation film, thereby forming a floating electrode having an L-shaped cross section; forming an inter-gate insulation film on the first and second device isolation insulation films and the first and second floating electrodes; and forming a control electrode on the inter-gate insulation film, wherein when the floating electrode having an L-shaped cross section is formed, a distance between the second floating electrodes which neighbor in a word line direction is set to be greater than a distance between the first floating electrodes which neighbor in the word line direction.