Patent ID: 8722524

Claim:
A method for forming a semiconductor device, comprising: forming at least two gate stacks and respective sidewall spacers on a semiconductor substrate, wherein all of the gate stacks are formed on active regions and isolation regions, each of the gate stacks comprises a gate dielectric layer and a dummy gate, the dummy gate is formed on the semiconductor substrate, and the gate dielectric layer is sandwiched between the dummy gates and the semiconductor substrate, wherein the sidewall spacers surround both of the respective dummy gate and the respective gate dielectric layer, or the sidewall spacers are formed on the respective gate dielectric layer and surround the respective dummy gate; forming a material layer, which exposes the dummy gates and the sidewall spacers and fills spaces between two adjacent ones of the gate stacks, wherein the material of the material layer is the same as the material of the dummy gate; removing the dummy gates and the material layer at the same time to form recesses; filling the recesses with a conductive material, and planarizing the conductive material to expose the sidewall spacers; and breaking the conductive material outside the sidewall spacers to form at least two conductors, each of the conductors being only in contact with the active region at one side outside one of the sidewall spacers, so as to form gate stack structures and first contacts at the same time.