Patent ID: 7076229

Claim:
Circuit comprising a noise suppressing circuitry ( 40 ; 69 ) having an input ( 42 ; 70 ) for a first voltage (VDD) and an output ( 43 ; 68 ) for providing a supply voltage (VDDfiltered), a MOSFET-based switch ( 41 ) with a MOSFET (MP) being situated in a well ( 67 ), where a supply voltage (VDDfiltered) can be applied to well ( 67 ), whereby the first voltage (VDD) is a global voltage used elsewhere in the same circuit, the supply voltage (VDDfiltered) is less-noisy than the first voltage (VDD), and the noise suppressing circuitry ( 40 ; 69 ) has a noise suppression characteristic where frequencies within a bandwidth range around the upper edge of the circuit's frequency band are damped.