Patent ID: 7400039

Claim:
A semiconductor device comprising: a plurality of pads and a plurality of protuberantly formed electrodes arrayed in regular order on a surface of each pad, said semiconductor device being mounted on a wiring board in accordance with a flipchip system; wherein said semiconductor device comprises: a plurality of first potential pads to which a first potential is applied; a plurality of second potential pads to which a second potential different from the first potential is applied; the second potential pads being formed in the same layer as the first potential pads and arrayed in one direction in alternation with the first potential pads; a first potential upper layer common wire formed in the same layer as the first potential pads; said first potential upper layer common wire extending in said one direction and being connected to a first end of each of the first potential pads viewed in said one direction; a second potential upper layer common wire formed in the same layer as the second potential pads; said second potential upper layer common wire extending in said one direction and being connected to a second end of the second potential pad said second end being on an opposite side to said first end viewed in said one direction; a first potential upper layer branched wire formed in the same layer as the first potential pad and extending between said first potential upper layer common wire and said second potential upper layer common wire, from the first potential pad to the vicinity of the second potential pad neighboring the first potential pad; and a second potential upper layer branched wire formed in the same layer as the second potential pad and extending between said first potential upper layer common wire and said second potential upper layer common wire, from the second potential pad to the vicinity of the first potential pad neighboring to the second potential pad.