Patent ID: 8722496

Claim:
A method for producing non-volatile memory (NVM) cells comprising: forming an oxide-nitride-oxide (ONO) stack on a substrate, the ONO stack including a nitride layer sandwiched between first and second oxide layers such that the nitride layer is electrically isolated from the substrate by the first oxide layer; forming a polycrystalline silicon (polysilicon) gate structure on the ONO stack such that the polysilicon gate structure includes side edges; and forming a source region and a drain region in the substrate by implanting two or more dopant materials through the ONO stack into the substrate including: forming first and second lightly-doped drain extension diffusion (LDD) implants such that the first LDD implant has a first inside boundary that is aligned with a first side edge of the polysilicon gate structure, and such that the second LDD implant has a second inside boundary that is aligned with a second side edge of the polysilicon gate structure, wherein the channel region is disposed between the first and second inside boundaries; and forming first and second pocket implants such that the first pocket implant has a first portion extending from the first boundary into the channel region, and such that the second pocket implant includes a second portion extending from the second boundary into the channel region.