Patent ID: 6955937

Claim:
A process for making a carbon nanotube memory cell for an integrated circuit structure which comprises: a) forming a first dielectric layer over a substrate; b) forming a first metal layer over said first dielectric layer; c) forming a second dielectric layer over said first metal layer; d) patterning said second dielectric layer to form an opening in said second dielectric layer down to said first metal layer, said opening comprising a first chamber in said second dielectric layer; e) filling said first chamber with a first removable material; f) forming a porous carbon nanotube ribbon layer over said second dielectric layer and said first removable material—filled first chamber therein; g) forming a third layer of dielectric material over said carbon nanotube ribbon layer; h) patterning said third dielectric layer to form an opening in said third dielectric layer down to said underlying carbon nanotube ribbon layer in registry with said first chamber formed in said second dielectric layer, whereby said opening in said third dielectric layer will function as an upper chamber for said memory cell in registry with said first chamber; i) filling said upper chamber with a second removable material; j) forming a fourth dielectric layer over the third dielectric layer and said second removable material-filled upper chamber therein; k) forming a contact opening in said third and fourth dielectric layers down to said porous carbon nanotube ribbon; l) forming a layer of conductive material over said fourth dielectric layer which fills said contact opening; m) patterning said layer of conductive material and said fourth dielectric layer thereunder to form at least one line of said conductive material over said contact opening and said filled upper chamber, the width of said line over said filled chamber being less than the width of said filled—upper chamber; n) forming a layer of a third removable material over said structure; o) anisotropically etching said layer of said third removable material to form first sidewall spacers of said third removable material on the sidewalls of said lines of conductive material; p) forming a further dielectric layer over said structure; q) anisotropically etching said further dielectric layer to form second sidewall spacers of said further dielectric material on the sidewalls of said first sidewall spacers of said third removable material; r) removing said first sidewall spacers of said third removable material to provide an opening to said filled upper chamber; s) removing said first and second material respectively in said lower and upper chambers through said opening formed by removal of said first sidewall spacers; and t) forming a dielectric layer over said structure to seal the opening leading to said upper and lower chambers.