Patent ID: 7388253

Claim:
A non-volatile memory comprising: a substrate having a first surface; first diffusion regions in the first surface of the substrate, the first diffusion regions spaced apart from each other; a second diffusion region in the first surface of the substrate between the first diffusion regions; first and second ONO films over the first surface of the substrate, the first and second ONO films extending along the first surface of the substrate from respective opposite sides of the second diffusion region, and both also extending in a direction substantially perpendicular from the first surface; a source line in electrical contact with the second diffusion region; a first control gate electrode over the first ONO film, and between the source line and the first ONO film; a second control gate electrode over the second ONO film, and between the source line and the second ONO film, the source line also in electrical contact with the first and second control gate electrodes; a first gate over the first surface of the substrate and on a sidewall of the first ONO film, the first ONO film disposed between the first gate and the first control gate electrode; a second gate over the first surface of the substrate and on a sidewall of the second ONO film, the second ONO film disposed between the second gate and the second control gate electrode; and a bit line electrically connecting the first diffusion regions.