Patent ID: 8743948

Claim:
A computer system adapted to perform a method of video decoding, the computer system comprising plural processing units and memory, the method comprising: receiving encoded video information at a video decoder implemented with the computer system, the computer system comprising plural hardware threads, wherein each of the plural processing units has two or more of the plural hardware threads; and decoding the encoded video information using plural decoding tasks, wherein a first video decoding stage is split into plural segmented decoding tasks among the plural decoding tasks, the plural segmented decoding tasks being associated with different segments of a picture, wherein the first video decoding stage includes one or more of entropy decoding operations, motion compensation operations, intra decoding operations, and inverse frequency transform operations, and wherein the decoding includes: scheduling and executing plural parallel runnable segmented tasks, among the plural segmented decoding tasks, by plural ones of the plural hardware threads, including: selecting a first one of the plural parallel runnable segmented tasks; by a first one of the plural hardware threads, performing the first parallel runnable segmented task; selecting a second one of the plural parallel runnable segmented tasks; and by a second one of the plural hardware threads, performing at least part of the second parallel runnable segmented task while the first hardware thread is performing the first parallel runnable segmented task; and scheduling and executing another decoding task, among the plural decoding tasks, wherein the other decoding task includes a second decoding stage for the picture, wherein the second decoding stage includes loop filtering operations, wherein the other decoding task has at least one task dependency on at least one of the plural segmented decoding tasks, and wherein the other decoding task is scheduled based at least in part on the at least one task dependency on the at least one of the plural segmented decoding tasks, including performing the other decoding task with one of the plural hardware threads.