Patent ID: 7568085

Claim:
A scalable super-reconfigurable fabric architecture (SuRFA) system for performing parallel processing in a hybrid-computing framework using a number of field programmable gate arrays (FPGAs), comprising: a virtual bus interface that translates a host protocol sent from a host processor to a virtual bus interface signal; a configurable very long instruction word (CVLIW) controller that receives the virtual bus interface signal and sends a control interface signal, the control interface signal comprising control information for a number of components in the number of the FPGAs; a reconfigurable communication and control fabric (RCCF) that controls a plurality of data paths through which the control interface signal and the virtual bus interface signal are routed to the number of components in the number of FPGAs; and a number of single instruction-multiple data (SIMD) processing element cells that are controlled by the control information through the RCCF to process data received via the virtual bus interface signal, wherein the number of SIMD processing element cells are among the number of components.