Patent ID: 7996168

Claim:
A method of for time vernier calibration in an automatic test equipment (ATE) system having a data signal generator and a trigger signal generator, said method comprising: generating a data signal by the date signal generator; generating a reference signal whose period differs from a period of the data signal by a small amount (dt); using precession of said data signal and reference signal to create accurate delay increments; creating a trigger signal by the trigger signal generator for BERT (Bit Error Rate Test) counting, said trigger signal having a select frequency such that an integer number (N) of triggers are generated within a precession period (T PREC ), wherein upon occurrence of each trigger, a BERT is initiated for measuring data to determine strobe positions with respect to said data signal; setting a delay setting of a phase delay register according to a programmed delay value; determining an actual delay of a strobe signal according to each of said strobe positions with respect to said data signal; and calibrating said actual delay with respect to said programmed delay value.