Patent ID: 7812660

Claim:
A level shift circuit for producing a high voltage amplitude output signal from a low voltage amplitude input signal, the circuit comprising: complementary-type first and second transistors that are connected in series between a high-voltage power supply and a ground potential; a capacitor connected between control electrodes of the first and second transistors; a first bias generating circuit connected to the high-voltage power supply and the control electrode of the first transistor, the first bias generating circuit being configured to apply a first bias voltage to the control electrode of the first transistor; a second bias generating circuit connected to the ground potential and the control electrode of the second transistor, the second bias generating circuit being configured to apply a second bias voltage to the control electrode of the second transistor; a first switch unit configured to turn on or off depending on the low voltage amplitude input signal in order to supply power to the first bias generating circuit while the output signal is at a high-level and to stop the supply of power to the first bias generating circuit while the output signal is at a low-level; and a second switch unit configured to turn on or off depending on the low voltage amplitude input signal in order to stop a supply of power to the second bias generating circuit while the output signal is at the high-level, and to supply power to the second bias generating circuit while the output signal is at the low-level, wherein the high voltage amplitude output signal is outputted from a connecting node of the first and second transistors, wherein the first bias generating circuit includes a first voltage limiting circuit connected between the high-voltage power supply and the control electrode of the first transistor, and a first bias current generating circuit configured to supply a first bias current to the first voltage limiting circuit, wherein the first voltage limiting circuit includes a series connection of a diode-connected transistor having the same characteristics as those of the first transistor and a diode-connected transistor having the same characteristics as those of the second transistor, and wherein the second bias generating circuit includes a second voltage limiting circuit connected between the control electrode of the second transistor and the ground potential, and a second bias current generating circuit configured to supply a second bias current to the second voltage limiting circuit, wherein the second voltage limiting circuit includes a series connection of a diode-connected transistor having the same characteristics as those of the first transistor and a diode-connected transistor having the same characteristic as those of the second transistor.