Patent ID: 8664073

Claim:
A method for fabricating a complimentary metal-oxide-semiconductor field-effect transistor (MOSFET), comprising: (A) forming a PMOS gate structure and an NMOS gate structure on a substrate; (B) performing a first co-implantation process to define a p-type source/drain extension region depth profile in the substrate adjacent to two sides of the PMOS gate structure; (C) forming a p-type source/drain extension region with p-type species in the substrate adjacent to the PMOS gate structure; (D) performing a second co-implantation process to define a first pocket region depth profile in the substrate adjacent to two sides of the NMOS gate structure; (E) performing a first pocket implantation process with p-type species to form a first pocket region adjacent to two sides of the NMOS gate structure; (M) performing a second pocket implantation process to form a second pocket region adjacent to two sides of the NMOS gate structure before the step (D); (N) performing a second pre-amorphization implantation process to amorphize the substrate adjacent to two sides of the NMOS gate structure before the step (M); (O) forming an n-type source/drain region in the substrate after the step (E); (P) forming an n-type source/drain extension region in the substrate adjacent to the NMOS gate structure before the step (O); and performing sequentially the step (E), the step (P), and the step (O).