Patent ID: 7919871

Claim:
A method for manufacturing an integrated circuit package system comprising: providing a base substrate; attaching a base die over the base substrate; providing a lower interposer substrate with a lower inward surface and a lower outward surface having lower exposed conductors; attaching a die over the lower inward surface of the lower interposer substrate; applying a stack encapsulant over the die and the lower interposer substrate having the lower exposed conductors partially exposed near the lower inward surface and the lower outward surface; attaching an upper interposer substrate having an upper inward surface and an upper outward surface with upper exposed conductors, the upper interposer substrate having a length less than a length of the lower interposer substrate and the upper inward surface in direct contact on the stack encapsulant with the upper exposed conductors substantially exposed near the upper outward surface; and attaching the lower interposer substrate over the base die.