Patent ID: 7613066

Claim:
An integrated circuit device comprising: a RAM block including a plurality of wordlines, a plurality of bitlines, a plurality of memory cells, and a data read control circuit; and a data line driver block which drives a plurality of data line groups of a display panel based on data supplied from the RAM block; wherein the data read control circuit reads data for pixels corresponding to data lines of each of the data line groups from the RAM block by N-time reading (N is an integer larger than one) in one horizontal scan period; wherein the data line driver block includes first to N-th divided data line driver blocks, each of the first to N-th divided data line driver blocks driving a different data line group of the data line groups; and wherein each of the first to N-th divided data line driver blocks is disposed along a first direction in which the bitlines extend; wherein, when data supplied from the RAM block is M bits (M is an integer larger than 1) and grayscale of a pixel corresponding to a data line is G bits, each of the first to N-th divided data line driver blocks includes (M/G) data line driver cells which drive (M/G) data lines; and wherein, when the display panel is a color display panel, (M/G) is a multiple of three, and the (M/G) data line driver cells include (M/3G) R data line driver cells each of which drives a data line corresponding to an R pixel, (M/3G) G data line driver cells each of which drives a data line corresponding to a G pixel, and (M/3G) B data line driver cells each of which drives a data line corresponding to a B pixel.