Patent ID: 8097962

Claim:
A semiconductor device, comprising: a first substrate having a first top surface, a first bottom surface opposite to the first top surface, a first external connection terminal, at least two second external connection terminals, a first wiring pattern, and a second wiring pattern; and a first semiconductor chip provided on the first top surface; wherein the first top surface comprises a chip area in the middle of the first top surface and a peripheral area outside the chip area, and said chip area and said peripheral area do not overlap with one another, the first semiconductor chip is disposed in the chip area, the first external connection terminal is formed in the peripheral area, the at least two second external connection terminals are formed in the peripheral area outside the first external connection terminal, the first wiring pattern extends from the first external connection terminal to an outer periphery of the first top surface, the second wiring pattern extends from each of the at least two second external connection terminals to the outer periphery of the first top surface, and the first wiring pattern passes through a place between adjacent ones of the at least two second external connection terminals.