Patent ID: 7176518

Claim:
A nonvolatile memory device comprising: a polysilicon gate on a semiconductor substrate, the polysilicon gate having lateral faces; a gate oxide layer between the polysilicon gate and the substrate; sidewall floating gates on the bottom of the lateral faces of the polysilicon gate; tunnel oxide layers between the sidewall floating gates and the substrate; block oxide layers between the polysilicon gate and the sidewall floating gates, the block oxide layers also being between the gate oxide layer and the tunnel oxide layer; sidewall spacers on the sidewalls of the polysilicon gate and the sidewall floating gates; a polysilicon oxide layer covering a top and side of the polysilicon gate and a side of the sidewall floating gates, the polysilicon oxide layer being between the sidewall spacers and the polysilicon gate and the sidewall floating gates; source and drain extension regions in the substrate under the sidewall spacers; and source and drain regions adjacent to the source and drain extension regions.