Patent ID: 7989875

Claim:
A BiCMOS system comprising: a semiconductor substrate comprising: a CMOS area supporting at least one CMOS device, and a bipolar area supporting at least one bipolar device; and a many times programmable (MTP) cell, comprising: a deep trench isolation (DTI) isolated control gate comprising: a first surface well implant within said semiconductor substrate, bounded by inward facing surfaces of a first DTI trench surrounding a given region of the semiconductor substrate, the first DTI trench extending vertically a depth D 1 into an upper surface of the semiconductor substrate, a first buried well implant under the first surface well implant, said first buried well implant extending at a depth less than D 1 and having a perimeter abutting the inward facing surfaces of the first DTI trench, wherein a doping level of the first surface well implant is lower than a doping level of the first buried well implant, a first floating gate disposed on an upper surface of said first surface well implant, and a second floating gate, electrically connected to the first floating gate, disposed on an area of the upper surface of the semiconductor substrate outside said upper surface of said first surface well implant, wherein said first floating gate and said second floating gate are arranged and dimensioned to selectively form a channel through the substrate, in response to a given charge state on the first and second floating gates.