Patent ID: 7279988

Claim:
A frequency synthesizer comprising: a frequency and phase locked loop adapted to receive a mode control signal and to operate in a frequency locked loop (FLL) mode when the mode control signal is in a first state and in a phase locked loop (PLL) mode when the mode control signal is in a second state, wherein the frequency and phase locked loop comprises: a controlled oscillator adapted to provide an output frequency based on a control signal; feed-back circuitry adapted to receive the output frequency and provide a feed-back phase; first circuitry adapted to receive a reference frequency and the mode control signal and provide the reference frequency when the mode control signal is in the first state and provide a reference phase when the mode control signal is in the second state, wherein the reference phase is provided based on the reference frequency; second circuitry adapted to receive the feed-back phase and the mode control signal and provide a feed-back frequency when the mode control signal is in the first state and provide the feed-back phase when the mode control signal is in the second state, wherein the feed-back frequency is provided based on the feed-back phase; a frequency and phase detector adapted to receive either the reference frequency and the feed-back frequency or the reference phase and the feed-back phase and generate an error signal based on a difference between the reference frequency and the feed-back frequency or the reference phase and the feed-back phase; and a loop filter adapted to receive the error signal and provide the control signal based on the error signal.