Patent ID: 7465885

Claim:
A circuit carrier, comprising a substrate having a surface, said surface having a passive component connecting area; a patterned circuit layer on said surface of said substrate, said patterned circuit layer having at least a set of passive component electrode pads on said passive component connecting area, said set of passive component electrode pads including a first passive component electrode pad and a second passive component electrode pad; and a solder mask layer covering said surface of said substrate, said solder mask layer including at least a set of solder mask openings, said set of solder mask openings including a first solder mask opening, a second solder mask opening, and a third solder mask opening, said first solder mask opening and said second solder mask opening exposing said first passive component electrode pad and said second passive component electrode pad respectively, said third solder mask opening having a length direction, said third solder mask opening along said length direction being divided into a central area, a first extension area, and a second extension area, said central area being between said first and said second solder mask openings, said first extension area and said second extension area extending from said central area along said length direction to two sides respectively, the width of said central area being smaller than the width of said first extension area.