Patent ID: 7586144

Claim:
A flash memory transistor comprising: a substrate having a plurality of source/drain regions, the source/drain regions having a different conductivity than the remainder of the substrate; a composite gate insulator layer, overlying the substrate, comprising a metal oxide tunnel insulator, a metal floating gate and a metal oxide inter-gate insulator layer wherein an upper portion of the metal floating gate is comprised of a metal oxide, thereby defining the metal oxide inter-gate insulator layer, the tunnel insulator and the inter-gate insulator having a dielectric constant that is higher than silicon dioxide and wherein the composite gate insulator is composed of one of the following structures: Ta 2 O 5 —Ta—Ta 2 O 5 , TiO 2 —Ti—TiO 2 , ZrO 2 —Zr—ZrO 2 , or Nb 2 O 5 —Nb—Nb 2 O 5 wherein the metal oxide inter-gate insulator layer covers all of the substrate; and a control gate formed on top of the inter-gate insulator.