Patent ID: 6885681

Claim:
A bit rate converter, comprising: a memory for storing input data of a fixed bit rate; a memory controller for writing the input data sequentially into the memory according to a write clock and reading out data from the memory sequentially according to a read clock having a frequency different from that of the write clock; a phase comparator for comparing a write address of the memory and a read address of the memory to determine a phase difference, wherein the write address is ahead of the read address in the memory; a stuffing rate controller for selecting one of a plurality of preset fixed stuffing rates depending on the phase difference; and a stuff pulse inserter for inserting a stuff pulse into readout data from the memory at the selected stuffing rate, wherein: the plurality of preset fixed stuffing rates comprises a normal fixed stuffing rate, a higher fixed stuffing rate, and a lower fixed stuffing rate, and the stuffing rate controller normally selects the normal fixed stuffing rate, selects the higher fixed stuffing rate when the phase difference is smaller than a first threshold value, and selects the lower fixed stuffing rate when the phase difference is greater than a second threshold value that is greater that the first threshold value.