Patent ID: 7295411

Claim:
A semiconductor integrated circuit device comprising: an external connection terminal; an electrostatic discharge protection circuit connected to the external connection terminal; a power supply line connected to the electrostatic discharge protection circuit; a ground line connected to the electrostatic discharge protection circuit; and an inter-power supply electrostatic discharge protection circuit connected to the power supply line and the ground line and including a gate insulating element, wherein the inter-power supply electrostatic discharge protection circuit comprises a first substrate potential control circuit capable of controlling a substrate voltage of the gate insulating element, wherein the gate insulating element comprises a first NMIS transistor having a source connected to the ground line and a drain connected to the power supply line, and wherein the first substrate potential control circuit comprises: a first inverter section connected at its output only to a substrate of the first NMIS transistor and including an uneven number of inverters; a resistor having one end connected to the power supply line and another end connected to an input of the first inverter section; and a capacitor having one end connected to the ground line and another end connected to the input of the first inverter section.