Patent ID: 7894518

Claim:
A motion estimation circuit, used for searching a block most similar to a current block in a search window, wherein the search window comprises a left search window and a right search window; the motion estimation circuit comprising: a latch module, having n pieces of shift registers, wherein each of the shift registers has m stages of latches and is used for receiving current block data and transmitting the received current block data to next stage according to a timing, wherein n is an integer larger than 1 and m is an integer larger than 0; a processing module, having a plurality of processing elements, wherein each of the processing elements receives left search window data and right search window data, wherein the processing elements are divided into (m+1) groups for coupling the corresponding latches of all the stages in the shift registers, wherein the processing elements of the i-th group are coupled to the output ends of the i-th stage of latches in the corresponding shift registers and the input ends of the i-th stage of latches in the corresponding shift registers, wherein i is an integer larger than 0 but smaller than or equal to m, and each of the processing elements is used for comparing the similarity degree between a corresponding candidate block in the search window and the current block and outputs a processed result, respectively, and each of the processing elements comprises: n pieces of selectors, used for receiving and selecting the left search window data and the right search window data, respectively, and for outputting a selected data, respectively; n pieces of operation circuits, coupled to the corresponding selectors, respectively, and used for receiving the selected data and the current block data to perform an absolute difference (AD) operation and for outputting an operation result, respectively; and a plurality of accumulation circuits, each of the accumulation circuits coupled to the operation circuits and used for receiving and accumulating the operation results of the operation circuits for outputting a processed result; and a comparing unit, coupled to the processing module and used for receiving and comparing the processed results of the accumulation circuits for outputting a first comparison result.