Patent ID: 8015528

Claim:
A method in a data processing system, said method comprising: executing program code by a computer to cause the computer to perform: initializing a first variable to limit a rewrite time for rewrite operations with respect to an initial design by a rewriting module; initializing a second variable to limit a time for satisfiability solver operations with respect to said initial design by a satisfiability solver module; initializing a third variable to limit a maximum number of rewrite iterations with respect to said initial design; calling a timer to track said rewrite time; running a local logic rewriting operation on said initial design with said rewriting module; in response to determining that all of all targets for an initial design netlist are not solved, determining whether a rewrite time is expired; in response to determining that said rewrite time is not expired, running AND refactoring; and in response to determining that said rewrite time is not expired, running XOR refactoring.