Patent ID: 8273626

Claim:
A method of forming a nonplanar semiconductor device comprising: forming a semiconductor body having a top surface opposite a bottom surface and a pair of laterally opposite sidewalls above an insulating substrate; forming a sacrificial gate electrode on the top surface and laterally opposite sidewalls, but not on any portion of the bottom surface, of a semiconductor body, the semiconductor body formed on a dielectric layer; forming a pair of source/drain regions in said semiconductor body on opposite sides of said sacrificial gate electrode; forming a second dielectric layer above the sacrificial gate electrode; removing a portion of the second dielectric layer to expose the sacrificial gate electrode; removing the sacrificial gate electrode; removing a portion of the dielectric layer to expose an outer portion of said bottom surface, but not on an inner portion of said bottom surface, of said semiconductor body, forming a gate dielectric on said top surface of said semiconductor body, on said laterally opposite sidewalls of said semiconductor body, and on the outer portion of said bottom surface, but not on the inner portion of said bottom surface, of said semiconductor body; and forming a replacement gate electrode on said gate dielectric on said top surface of said semiconductor body and adjacent to said gate dielectric on said laterally opposite sidewalls of said semiconductor body and subadjacent to said gate dielectric formed on said outer portion of said bottom surface of said semiconductor body.