Patent ID: 8461920

Claim:
A semiconductor integrated circuit device comprising: a first power supply wiring extending along a first direction and supplying a first supply voltage; a second power supply wiring extending in parallel with the first power supply wiring and supplying a second supply voltage; a third power supply wiring disposed opposite to the second power supply wiring with respect to the first power supply wiring, extending in parallel with the first power supply wiring, and supplying a third supply voltage; a first capacitive element formed of a transistor of which source and drain receive the first supply voltage, and of which gate receives the second supply voltage or the third supply voltage; a second capacitive element formed of a transistor disposed between the first capacitive element and the second power supply wiring, the transistor having a source and a drain which receive the second supply voltage, and the transistor having a gate which receives the first supply voltage; and a third capacitive element formed of a transistor disposed in a portion between the first capacitive element and the third power supply wiring, wherein a source and a drain of the transistor receive the third supply voltage and a gate of the transistor receives the first supply voltage, wherein the first capacitive element is formed under the first power supply wiring such that the first capacitive element strides over a portion at the second power supply wiring side and a portion at the third power supply wiring side.