Patent ID: 7879650

Claim:
A method of fabricating a complementary metal oxide semiconductor (“CMOS”) structure, comprising: forming a bulk device having a source drain conduction path in a first region of said substrate in conductive communication with an underlying bulk region of said substrate and a first gate conductor overlying said first region, said first region and said bulk region having a first crystal orientation; forming an SOI device being an n-type field effect transistor (“NFET”), said NFET having a source drain conduction path in a semiconductor-on-insulator (“SOI”) layer separated from said bulk region of said substrate by a buried dielectric region, said SOI device including a second gate conductor overlying said SOI layer, said SOI layer having a second crystal orientation different from said first crystal orientation; forming a first diode in a second region of said substrate in conductive communication with said bulk region, said first diode having a breakdown voltage in excess of which said first diode is highly conductive; and conductively connecting said first diode in a reverse-biased orientation to at least said first gate conductor, such that a voltage on said gate conductor exceeding said breakdown voltage is discharged through said first diode to said bulk region of said substrate; forming a second diode in a third region of said substrate in conductive communication with said bulk region, said second diode having a breakdown voltage in excess of which said second diode is highly conductive; forming a first metal layer at a first height from an exposed major surface of said SOI layer of said substrate, said first metal layer including a metal line conductively connecting said second diode in a reverse-biased orientation to at least one of a source region or a drain region of said SOI device, such that a voltage on said at least one of said source region or said drain region exceeding said breakdown voltage of said second diode is discharged through said second diode to said bulk region of said substrate; and after forming said first metal layer, forming at least one ith metal layer at a second height from said exposed major surface of said SOI layer, said second height being greater than said first height.