Patent ID: 7888238

Claim:
A semiconductor device manufacturing method comprising: preparing, on one surface of a semiconductor wafer, a wafer process material, the wafer process material having a plurality of semiconductor formation regions comprising at least a first semiconductor formation region having a first planer size, and a second semiconductor formation region having a second planer size which is different from the first planer size, and the wafer process material including a low dielectric constant film/wiring line stack structure component in which a low dielectric constant film and a wiring line are stacked in each semiconductor formation region; selecting the first semiconductor formation region as a necessary semiconductor formation region from among the semiconductor formation regions, selecting, as an unnecessary semiconductor formation region, the second semiconductor formation region from among the semiconductor formation regions, in which a dicing street for the necessary semiconductor formation region traverses the second semiconductor formation region, and applying a laser beam to the predetermined width area including the dicing street for the necessary semiconductor formation region and onto a straight extension of the predetermined width area in the wafer process material in order to form a first groove around the dielectric constant film/wiring line stack structure component of the necessary semiconductor formation region and a second groove in an area corresponding to the straight extension within the unnecessary semiconductor formation region; forming a protective film in at least the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component; forming, on the protective film in the necessary semiconductor formation region, an upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component; forming a sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line within the necessary semiconductor formation region; and cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street; wherein preparing the semiconductor wafer comprises preparing a material in which a passivation film is formed on the low dielectric constant film/wiring line stack structure component; and wherein a laser beam is applied before forming the first groove and the second groove, and a laser groove formation preliminary groove is formed in a region corresponding to the predetermined width area of the passivation film in the necessary semiconductor formation region except for the passivation film in the unnecessary semiconductor formation region.