Patent ID: 8076226

Claim:
A method for manufacturing a semiconductor device, the method comprising: forming a gate insulating film on a semiconductor substrate; forming a gate electrode on the gate insulating film; implanting arsenic ions into the semiconductor substrate using the gate electrode as a mask; forming sidewall spacers on side surfaces of the gate electrode and the gate insulating film, the sidewall spacers having a first insulating film containing oxygen atoms, and a second insulating film containing nitrogen atoms; implanting phosphorus ions into the semiconductor substrate using the gate electrode as a mask; treating the semiconductor substrate by an annealing process after implanting the arsenic ions and the phosphorus ions; and forming an interlevel insulating film over the gate electrode and the semiconductor substrate after the annealing process, wherein the annealing process includes: placing the semiconductor substrate on a substrate stage, in which a heat source having first and second heaters is provided, such that the first heater faces a first area assigned at a central part of the semiconductor substrate and the second heater faces a second area assigned at a peripheral part of the semiconductor substrate, a temperature of each of the first and second heaters being independently controlled; individually preheating the central part by the first heater and the peripheral part by the second heater; and irradiating an entire top surface of the semiconductor substrate with a pulsed light at a pulse width of about 0.1 ms to about 100 ms, in synchronization with the preheating.