Patent ID: 8681839

Claim:
A communications interface for a digital data device, comprising: (N+M) ports, each for receiving a respective serial data signal over a respective communications line; a clock circuit which produces (N+M) phase adjusted local clock signals, each phase adjusted local clock signal corresponding to a respective port of said (N+M) ports, each phase adjusted local clock signal being phase offset from an interface clock signal, the phase offset of each phase adjusted local clock signal being independently adjustable; (N+M) receiver/deserializer circuits each corresponding to a respective port of said (N+M) ports and for receiving the respective serial data signal from the corresponding port and producing a respective deserialized output, each receiver/deserializer circuit comprising at least one latch which captures data received on the corresponding port responsive to the corresponding phase adjusted local clock signal; (N+M) alignment circuits, each alignment circuit corresponding to a respective receiver/deserializer circuit and for producing respective aligned data from the deserialized output of the corresponding receiver/deserializer circuit, said aligned data being synchronized to a common clock signal; N switches, each switch receiving input derived from aligned data produced by a respective subset of said (N+M) alignment circuits, each subset comprising more than one and fewer than all of said (N+M) alignment circuits, and selecting the input derived from aligned data produced by a respective one of the alignment circuits of the respective subset of said (N+M) alignment circuits as output of the respective switch for use by said digital device, wherein N is greater than one, and wherein M is at least one; and a calibration mechanism controlling said switches and operative responsive to said common clock signal, said calibration mechanism receiving data derived from outputs of said alignment circuits to calibrate the phase offset of each said phase adjusted local clock signal.