Patent ID: 6882018

Claim:
A semiconductor device comprising: a first silicide layer, a second silicide layer, and a third silicide layer, each formed on an insulating surface; a first active layer formed on the insulating surface between the first silicide layer and the second silicide layer, and a second active layer formed on the insulating surface between the second silicide layer and the third silicide layer; a first lightly doped region formed on the insulating surface between the first silicide layer and the first active layer, and a second lightly doped region formed on the insulating surface between the second active layer and the third silicide layer; a first heavily doped region formed on the insulating surface between the first active layer and the second silicide layer, and a second heavily doped region formed on the insulating surface between the second silicide layer and the second active layer; a first gate insulating film formed on the first active layer, and a second gate insulating film formed on the second active layer; and a first gate electrode formed on the first gate insulating film, and a second gate electrode formed on the second gate insulating film.