Patent ID: 7589814

Claim:
An array substrate for an in-plane switching liquid crystal display device, comprising: a gate line disposed in a first direction on a substrate; a gate electrode extending from the gate line, wherein the gate electrode and the gate line have a first double-layered structure consisting of a first barrier layer and a first low resistance metallic layer on the first barrier layer; a gate pad connected to one end of the gate line; a common line substantially parallel and adjacent to the gate line; a data line disposed in a second direction and defining a pixel region with the gate line, wherein the data line has a second double-layered structure consisting of a second barrier layer and a second low resistance metallic layer on the second barrier layer; a data pad disposed at one end of the data line; a plurality of common electrodes extending from the common line to the pixel region and disposed in a direction opposite to the adjacent gate line; a thin film transistor near a crossing of the gate and data lines, the thin film transistor including a semiconductor layer, the gate electrode, a source electrode, and a drain electrode, wherein each of the source and drain electrodes has the same double-layered structure as the data line; a plurality of pixel electrodes disposed in the direction opposite the adjacent gate line, and connected to the drain electrode, wherein the pixel electrodes are arranged in an alternating pattern with the common electrodes; and another semiconductor layers extended under and along the data line, the data pad, and the plurality of pixel electrodes, wherein the first and second low resistance metallic layer includes a material selected from a group consisting of copper (Cu), silver (Ag) and platinum (Pt), wherein the another semiconductor layer is a double-layered structure consisting of a first layer of pure amorphous silicon and a second layer of doped amorphous silicon on the first layer, and wherein the first layer protrudes outside from both sides of each of the data line, the data pad and the plurality of pixel electrodes.