Patent ID: 8755233

Claim:
A memory system comprising: a non-volatile memory device including a plurality of memory cells each of which stores data; a monitoring unit which monitors a characteristic of the non-volatile memory device when writing and erasing processes are performed to write and erase the data to and from the non-volatile memory device; and a changing unit which changes at least one of a value of a writing start voltage and an increase width of a writing voltage in the writing process in accordance with the monitored characteristic, the writing process being a process in which a writing operation and a verification operation are alternately repeated, wherein the memory system applies, when performing the writing operation, a first voltage to a first bit line connected to a first write memory cell, a second voltage higher than the first voltage to a second bit line connected to a second write memory cell, a third voltage higher than the second voltage to a third bit line connected to a non-write memory cell, according to a result of the verification operation, and the changing unit changes the second voltage according to the monitored characteristic of the non-volatile memory device.