Patent ID: 7706377

Claim:
A video stream processing circuit, comprising: signal processing circuitry arranged to execute a first video stream processing function; and a first and second buffer memory coupled to the signal processing circuitry for buffering the frame data produced by the first video stream processing function, the first buffer memory being coupled to the signal processing circuitry via a shareable channel, the signal processing circuitry having access to the second buffer memory outside the shareable channel, wherein the first video stream processing function comprises writing frame data of successive video frames in a temporally ordered output sequence of frames into the first and/or second buffer memory; the signal processing circuitry being arranged to execute a second video stream processing function using the written frame data in a temporally ordered input sequence of frames that differs from the output sequence, the second video stream processing function being arranged to select to read the frame data of predetermined first and second ones of the frames selectively from the first and second buffer memory respectively, the second ones of the frames occurring in the same temporal order in both the input and output sequence, the first ones of the frames containing at least all particular frames whose position relative to the second ones of the frames in the output sequence differs from the position of the particular frames relative to the second ones of the frames in the input sequence.