Patent ID: 7429850

Claim:
A circuit to generate a bias voltage, the circuit comprising: an inductor element including a first inductor node and a second inductor node, the inductor element configured to receive an input voltage at the first inductor node and to output an inductor current; a first capacitor associated with the second inductor node; a diode provided between the first capacitor and the first inductor node, the diode being configured to direct current towards the first inductor; a free running oscillator, the free running oscillator comprising: a trigger configured to react with different threshold levels depending on whether a trigger threshold voltage is on a positive transition or on a negative transition upon reaching a trigger threshold; a resistor—capacitor network associated with the trigger; a second capacitor being associated with ground, the second capacitor including a second capacitor node; a trigger resistor, the trigger resistor including a first trigger node associated with the resistor—capacitor network and a second trigger node associated with the second capacitor node; a trigger node configured between the first capacitor and the second capacitor node; and a switch associated with the resistor—capacitor network and the second inductor node, the switch configured to connect the inductor current to ground when closed, wherein the first capacitor and the second capacitor become charged via the trigger resistor by the inductor current until the trigger node reaches the trigger threshold and the trigger closes the switch when the trigger threshold is reached, wherein the inductor is drained when the switch is opened and, when the inductor current reaches zero, an inductor voltage provides a negative voltage step at the trigger node via the first capacitor, and wherein when the negative voltage step is provided to the trigger node, the trigger directs the switch to close.