Patent ID: 7394164

Claim:
A semiconductor device comprising: a chip having a surface where a first line and a second line are defined on the surface and parallel to each other; a plurality of regular bumps formed on the surface of the chip and disposed along the first line at a same pitch; a plurality of irregular bumps formed on the surface of the chip, wherein each of the irregular bumps has a narrow portion and a probed portion, wherein the narrow portions are disposed along the first line at the same pitch and are interspersed with the regular bumps, wherein the width of the narrow portions is smaller than the width of the regular bumps along the first line, wherein the probed portions integrally connected with the corresponding narrow portions are disposed along the second line at the same pitch; and a plurality of bonding pads located on the surface of the chip and positioned parallel to the first line and between the first line and an edge of the chip, the edge of the chip is parallel to the first line and the second line, the narrow portion of each of the plurality of irregular bumps is located above a corresponding one of the plurality of bonding pads, the probed portion of each of the plurality of irregular bumps is spaced apart from the corresponding one of the plurality of bonding pads, wherein each of the plurality of regular bumps and the plurality of irregular bumps protrude outwardly from the surface of the chip.