Patent ID: 8236619

Claim:
A method of making a semiconductor chip assembly, comprising: providing a post, a base, a first adhesive, a second adhesive, a substrate and a conductive layer, wherein the post is adjacent to the base, extends above the base in an upward direction, extends into a first opening in the first adhesive and is aligned with a second opening in the second adhesive, a hole in the conductive layer and an aperture in the substrate, the base extends below the post in a downward direction opposite the upward direction and extends laterally from the post in lateral directions orthogonal to the upward and downward directions, the second adhesive is mounted on and extends above the base and is non-solidified, the substrate is mounted on and extends above the second adhesive, wherein the substrate includes a first conductive segment, a second conductive segment and a dielectric layer, the first conductive segment is attached to and extends above the dielectric layer, the second conductive segment is attached to and extends below the dielectric layer and the dielectric layer is solidified, the first adhesive is mounted on and extends above the substrate and is non-solidified, and the conductive layer is mounted on and extends above the first adhesive; then flowing the first adhesive into and upward in a first gap located in the hole between the post and the conductive layer; flowing the second adhesive into and upward in a second gap located in the aperture between the post and the substrate; solidifying the adhesives; then providing a conductive trace that includes a pad, a terminal, a conductive pattern, a first via, a second via and a selected portion of the conductive layer, wherein the conductive pattern is a part of the substrate and includes the first and/or second conductive segment, the first via extends to the conductive pattern, the second via extends to the conductive pattern and an electrically conductive path between the pad and the terminal includes the conductive pattern and the vias, an electrically conductive path between the pad and the conductive pattern includes the first via and an electrically conductive path between the terminal and the conductive pattern includes the second via; then mounting a semiconductor device on the post, wherein a heat spreader includes the post and the base and the semiconductor device overlaps the post; electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and thermally connecting the semiconductor device to the post, thereby thermally connecting the semiconductor device to the base.