Patent ID: 7167047

Claim:
A multi-channel power amplifier for driving a plurality of loads, each associated with a respective channel, each channel comprising a pair of operational amplifiers, first and second, each composed of a differential trans-conductance stage controlling the gates of a p-type MOS transistor and of an n-type MOS transistor forming an output push-pull stage of the operational amplifier, one of said operational amplifiers of each channel functioning either in a bridge configuration with the other operational amplifier to drive the respective load or, by closing first configuring switches connecting together said loads, in single-ended configuration to a constant reference voltage for driving said loads connected in common, the amplifier further comprising at least a window comparator for monitoring the level of an input signal and outputting a logic control signal for said switches, wherein the amplifier comprises: an asymmetric common mode control loop of each output bridge, including a differential amplifier having a non inverting input coupled to a constant reference voltage and an inverting input connected to the output node of said one of the two operational amplifiers of each channel for keeping their output node at a voltage substantially equal to said reference voltage until the other operational amplifier of the channel saturates; and switch means for respectively connecting in common the gate nodes of the p-type MOS and the gate nodes of the n-type MOS transistors of the output push-pull stages of all said one operational amplifier of all the channels when functioning in single-ended configuration.