Patent ID: 7463531

Claim:
A non-volatile memory system, comprising: a group of non-volatile storage elements; a set of word lines in communication with said group of non-volatile storage elements; a first subset of word lines on a first side with respect to a particular word line of said set, said first subset has not been subjected to programming when said particular word line is selected for programming; a second subset of word lines on a second side with respect to said particular word line, said second subset has been subjected to programming when said particular word line is selected for programming; and managing circuitry in communication with said set of word lines, said managing circuitry pre-charges said group prior to applying a program signal to said particular word line by applying one or more first pre-charge enable signals to said first subset and applying one or more second pre-charge enable signals to said second subset that are at different voltages than said one or more first pre-charge enable signals, said managing circuitry boosts a channel potential of said group by applying one or more first boosting signals to said first subset after applying said one or more first pre-charge enable signals and applying one or more second boosting signals to said second subset after applying said one or more second pre-charge enable signals, said one or more first boosting signals are at different voltages than said one or more second boosting signals.