Patent ID: 7511330

Claim:
A semiconductor device comprising: a semiconductor substrate including a first upper surface having an active area extending in a first direction; a gate insulating film formed on the active area: a pair of gate electrodes having respective first side surfaces and formed on the gate insulating film, each gate electrode including a conductive portion and a first insulating film formed on the conductive portion; a first silicon oxide film having second side surfaces opposed to each other and formed above the gate electrodes; a plurality of bit lines formed on the first silicon oxide film and extending in the first direction, each bit line including a lower surface having a recess; a contact plug located between the gate electrodes so as to electrically connect one of the bit lines and the active area and including a first portion having a third side surface interposed between the gate electrodes, a second portion having a fourth side surface located between the opposed second side surfaces of the first silicon oxide film, and a third portion having an upper surface and fifth side surface embedded in each recess of the bit line; a first silicon nitride layer located between the third side surface of the first portion of the contact plug and the first side surface of the gate electrode; a second silicon nitride layer located between the fourth side surface of the second portion of the contact plug and the second side surfaces of the first silicon oxide film; and a second silicon oxide film formed on the first silicon oxide film, wherein the entire upper surface and fifth side surface of the third portion of the contact plug directly contacts with an inner surface of each recess.