Patent ID: 7325086

Claim:
A method for supporting multiple graphics processing units (GPUs), comprising the steps of: setting a switch configuration through a processor, wherein the switch configuration routes groups of communication lanes between the multiple GPUs and the processor; communicating data between the processor and a first GPU over a first group of communication lanes, the first group of communication lanes coupled to the first GPU at an interface consisting of less than the total number of inputs/outputs for the first GPU; communicating data between the processor and a second GPU over a second group of communication lanes, the second group of communication lanes coupled to the second GPU at an interface consisting of less than the total number of inputs/outputs for the second GPU; and communicating data between the first and second GPUs over a third group of communication lanes coupled to each of the first and second GPUs at interfaces containing a remaining number of inputs/outputs not utilized by the first and second groups of communication lanes, wherein the third group of communication lanes bypasses the processor, wherein the first and second GPUs are configured to work in conjunction with each other to perform graphics processing operations.