Patent ID: 7482699

Claim:
A semiconductor device comprising: a first circuit section formed to be including a first transistor which has a current passage between the first potential and the second potential included; a second circuit section formed to be including a second transistor which has a current passage between the third potential and the fourth potential; a first pad that supplies the first potential to the first circuit section; a second pad that supplies the second potential to the first circuit section; a third pad that supplies the third potential to the second circuit section; a fourth pad that supplies the fourth potential to the second circuit section; a first bus-bar arranged along the direction where the first pad and the second pad are arranged, arranged between a plurality of inner leads and the first and second pads, connected to the first pad by a wire, and supplied with the first potential; a second bus-bar arranged along the direction where the first pad and the second pad are arranged, arranged between a plurality of inner leads and the first and second pads, connected to the second pad by a wire, and supplied with the second potential; a third bus-bar arranged along the direction where the third pad and the fourth pad are arranged, arranged between a plurality of inner leads and the third and fourth pads, connected to the third pad by a wire, and supplied with the third potential; and a fourth bus-bar arranged along the direction where the third pad and the fourth pad are arranged, arranged between a plurality of inner leads and the third and fourth pads, connected to the fourth pad by a wire, and supplied with the fourth potential.