Patent ID: 7190563

Claim:
An electrostatic discharge (ESD) protection circuit for protecting a circuit from an ESD event, the ESD protection circuit comprising: a first metal-oxide semiconductor (MOS) device including a gate terminal, a first source/drain terminal, a second source/drain terminal and a bulk terminal, the bulk and first source/drain terminals being operatively coupled across the circuit to be protected, the gate and second source/drain terminals being coupled together; and a voltage generation circuit coupled between the bulk and gate terminals of the first MOS device, the voltage generation circuit being configured to generate a voltage difference between the bulk and gate terminals of the first MOS device during at least a portion of the ESD event; wherein the voltage generation circuit comprises: a second MOS device including a gate terminal, a first source/drain terminal and a second source/drain terminal, the gate and first source/drain terminals of the second MOS device being coupled to the second source/drain terminal of the first MOS device and the second source/drain terminal of the second MOS device being coupled to the bulk terminal of the first MOS device; and a passive element coupled between the gate and second source/drain terminals of the second MOS device.