Patent ID: 7674986

Claim:
A method of forming a circuit board having a capacitor array and embedded electronic components, comprising the steps of: providing two carrier boards and a high dielectric constant material layer, in which the carrier boards have the embedded electronic components therein and a plurality of electrode plates on one surface of each of the carrier boards; forming a circuit build-up structure on the other surface of each of the carrier boards, wherein the circuit build-up structure comprises dielectric layers, circuit layers formed on the dielectric layers and conductive structures formed in the dielectric layers, allowing the conductive structures of the circuit build-up structure to be electrically conductive to the electronic components and the electrode plates of the carrier boards, and wherein an outermost surface of the circuit build-up structure has electrically conductive pads formed thereon; and laminating the carrier boards with the high dielectric constant material layer interposed therebetween in a way that the carrier boards are separated by the high dielectric constant material layer and the electrode plates on the surface of one carrier board are facing towards the electrode plates on the other carrier board, so as to form the capacitor array.