Patent ID: 7848141

Claim:
A multi-level cell copyback program method in a non-volatile memory device, the method comprising: initializing a first register and a second register of a page buffer; performing a first read operation of a source page based on a first read voltage to store data obtained by the first read operation on the second register; performing a second read operation of the source page based on a third read voltage higher than the first read voltage to store data obtained by the second read operation on the second register; performing a least significant bit (LSB) program operation of a target page by changing a voltage level of a sensing node in the page buffer based on the data stored on the first and second registers; discriminating whether or not the performance number of the LSB-program operation is higher than a given number; performing an LSB-verifying operation of the target page in accordance with a result of the discriminating process, wherein the LSB-verifying operation is performed when the number of the LSB-program operation is higher than the given number; initializing the first register and the second register of the page buffer; performing a third read operation of the source page based on a second read voltage between the first read voltage and the third read voltage to store data obtained by the second register; transmitting the data obtained by the third read operation to the first resister; initializing the second resister of the page buffer; performing a fourth read operation of the target page based on the first read voltage to store data obtained by the fourth read operation on the second register; changing or maintaining the data stored on the first register in accordance with the data stored on the first register and the second register; and performing a most significant bit (MSB) program operation and an MSB-verifying operation by changing a voltage level of the sensing node in the page buffer based on data of the first and second registers.