Patent ID: 7475105

Claim:
A one bit full adder with sum and carry outputs for performing independent functions comprising: at least one three-input look up table (LUT) for implementing a sum function; and at least one carry circuit for implementing a carry/borrow function comprising a first multiplexer having first and second inputs, a select line input, and a carry/borrow output, an AND gate having two inputs, and an output connected to the first input of said first multiplexer, an OR gate having two inputs, and an output connected to the second input of said first multiplexer, an XOR gate having a first input, and an output connected to the select line input of said first multiplexer, and a second multiplexer having an output connected to the first input of said XOR gate, said at least one LUT and said at least one carry circuit for providing independent sum and carry outputs for different function requirements.