Patent ID: 7148740

Claim:
A boost circuit for boosting a first power source potential using a clock signal that swings between the first power source potential and a reference potential, comprising: a first level shift means for shifting either a high level or a low level of the clock signal from the first power source potential to a second power source potential; a first boost means, which contains a plurality of transistors for conducting switching in accordance with the clock signal whose one level has been shifted by the first level shift means and a plurality of capacitors each coupled with the plurality of transistors, which generates the second source potential having an absolute value larger than that of the first power source potential by conducting a charge pump operation, and which supplies the second power source potential to the first level shift means; a second level shift means for shifting either a high level or a low level of the clock signal from the first power source potential to a third power source potential; a third level shift means for shifting the other level of the clock signal whose one level has been shifted by the second level shift means from the reference potential to the second power source potential; and a second boost means, which contains a plurality of transistors for conducting switching in accordance with the clock signal whose high level and low level have been shifted by the second and the third level shift means and a plurality of capacitors each coupled with the plurality of transistors, which generates the third power source potential having an absolute value larger than that of the second power source potential by conducting a charge pump operation, and which supplies the third power source potential to the second and third level shift means.