Patent ID: 7692282

Claim:
A semiconductor device comprising: a first semiconductor element that includes: a semiconductor substrate, a plurality of connecting pads arranged on the semiconductor substrate, insulation films arranged over an upper surface of the semiconductor substrate excluding center portions of the connecting pads, distributing wiring layers electrically connected to the connecting pads and arranged over upper surfaces of the insulation films, a plurality of columnar electrodes for external connection which are arranged on upper surfaces of the distributing wiring layers and electrically connected thereto, and a sealing film arranged on the upper surfaces of the insulation films and the distributing wiring layers such that an upper surface of the sealing film is flush with upper surfaces of the columnar electrodes; wherein the first semiconductor element defines a periphery between a lower, outer edge of the semiconductor substrate and an upper, outer edge of the sealing film, an insulation member surrounding the periphery of the first semiconductor element such that the insulation member is situated around the semiconductor substrate, the connecting pads, the insulation films, the distributing wiring layers, the columnar electrodes and the sealing film; an upper wiring structure arranged over an upper surface of the first semiconductor element and the insulation member; a lower wiring structure arranged below a lower surface of the first semiconductor element and the insulation member; and a second semiconductor element that is mounted on at least one of the upper wiring structure and the lower wiring structure.