Patent ID: 7590890

Claim:
A power control system comprising: a control terminal for connection to a switch for selectively coupling a power supply voltage to an electrical device; fault detection circuitry for receiving sense signals indicating any fault in delivery of the power supply voltage to the electrical device, the fault detection circuitry generating fault indication signals; internal power good (IPRG) circuitry for detecting that power to the electrical device is satisfactory and there are no fault indication signals and, in response, asserting an IPRG signal; first circuitry for asserting a power-good signal, for application to second circuitry, when the IPRG signal is asserted; and a first delay circuit for delaying the power-good signal and generating a delayed power good signal, wherein an asserted delayed power-good signal indicates to the second circuitry that the electrical device should be operational, wherein the first circuitry and the first delay circuit apply the power-good signal and the delayed power-good signal to the second circuitry upon the electrical device powering up, and wherein, upon powering down of the electrical device, the first circuitry changes a state of the delayed power-good signal, the system further comprising: a second delay circuit that delays a transition of the power-good signal until sometime after the delayed power-good signal has changed states.