Patent ID: 8076208

Claim:
A method for forming a transistor, comprising: providing a plurality of mandrels overlying a semiconductor substrate; blanket depositing a layer of spacer material on the mandrels; selectively etching the spacer material to form spacers on sidewalls of the mandrels; forming a spacer mask overlying the substrate by selectively removing the mandrels to leave a plurality of spacers, the spacers formed of elongated loops of spacer material; etching the substrate through the spacer mask to define a plurality of trenches in the substrate, the trenches defined between strips of semiconductor material, wherein etching the substrate comprises: providing a protective mask material over ends of the loops; and transferring a pattern formed by exposed portions of the loops to the substrate while the protective mask material simultaneously prevents transfer of a shape defined by the ends of the loop to the substrate; filling the trenches with an dielectric material; providing a source for the transistor proximate an end of the trenches; providing a drain for the transistor proximate an opposite end of the trenches, the strips of semiconductor material extending between the drain and the source; and providing a gate overlying a channel region between the source and the drain.