Patent ID: 6897665

Claim:
A method for carrying out failure analysis of integrated circuit semiconductor device conductive portions comprising the steps of: providing an integrated circuit (IC) semiconductor device comprising at least one conductive interconnect portion; providing a printed circuit board (PCB) comprising a current signal amplification circuit having a current signal input side and a current signal output side for outputting an amplified current signal; mounting the IC semiconductor device such that the at least one conductive interconnect portion is electrically connected between a ground potential of the PCB and the current signal input side; mounting the PCB comprising the IC semiconductor device in a scanning electron microscope (SEM) for impacting a surface of the IC semiconductor device with a primary electron beam; exposing at least a portion of the IC semiconductor device to the primary electron beam to induce a current signal within the conductive portions; passing the induced current signal through the amplification electronics to amplify the current signal; and, outputting the amplified induced current signal from the current signal output side to an image display system input side to produce an image comprising a brightness contrast.