Patent ID: 6889164

Claim:
A method of determining a defect-free or defective semiconductor integrated circuit, comprising: a first measurement step for measuring a quiescent power supply current (QPSC) of a first semiconductor integrated circuit (IC) a plurality of times in a predetermined interval after operation of the first IC has stopped; a first data calculation step for calculating a first feature data indicating a feature(s) of the measured QPSCs of the first IC; a second measurement step for measuring a QPSC of a second semiconductor IC a plurality of times in the same condition as that of the first IC after operation of the second IC has stopped; a second data calculation step for calculating a second feature data indicating a feature(s) of the measured QPSCs of the second IC; and a comparison and determination step for comparing a resemblance-between the first feature data and the second feature data, and determining the first and second ICs as defect-free ICs when the resemblance is high or the first and second ICs as defective ICs when the resemblance is low.