Patent ID: 8412917

Claim:
A method of dynamically determining data-transfer paths in response to an instruction to facilitate data transfer among execution lanes in an integrated-circuit processing device operable to execute operations in parallel, the method comprising: receiving data-transfer requests from associated potential source lanes among the execution lanes; determining, from among the potential source lanes, source lanes operable to send data to requested destination lanes among the execution lanes; providing confirmation information to the potential source lanes, the confirmation information indicating whether the potential source lanes may send data to the requested destination lanes during a data-transfer interval; outputting source lane identifiers to the requested destination lanes, a source lane identifier including identification information to identify a source lane from which to receive data during the data-transfer interval; and forming, for each of the requested destination lanes, via an associated multiplexing circuit, a data-transfer path between (i) one of a plurality of communication lanes within an inter-lane switch identified by a corresponding one of the source lane identifiers and (ii) one or more of the requested destination lanes.