Patent ID: 7746871

Claim:
A wideband stereo codec interface for transmitting/receiving data using a transmission/reception First-In-First-Out (FIFO) memory, comprising: a first interface logic for exchanging at least one of voice and audio data with a wideband stereo codec, and generating an address and control signals for a transmission signal, an address and control signals for a reception signal, and a write data signal; a multiplexer for alternately outputting one of the transmission and reception signals delivered from the first interface logic according to a toggle signal; a transmission/reception FIFO memory comprising a transmission area and a reception area distinguishable according to a last transmission address, the transmission/reception FIFO memory performing a read/write operation on each of the transmission and reception areas according to the one of the transmission and reception signals output from the multiplexer, delivering transmission read data to the first interface logic, and outputting received read data; and a second interface logic for receiving the read data delivered from the transmission/reception FIFO memory, delivering the received read data to a central processing unit (CPU), and delivering as write data the data delivered from the CPU and a corresponding control and address signals to the transmission/reception FIFO memory; wherein each of the first and second interface logics comprises control registers that store parameters indicating the number of data units for the case where at least one of the transmission and reception areas is substantially full or empty, and if read data input to each of the first and second interface logics arrives at the stored parameter value, each of the first and second interface logics generates an interrupt signal according to each parameter value and outputs the interrupt signal to the CPU.