Patent ID: 7701287

Claim:
A voltage detection type overcurrent protection device for a Class-D amplifier, comprising: a clock logic module, connected to a PWM (Pulse Width Modulation) module and receiving a PWM signal; a CMOS (Complementary Metal Oxide Semiconductor) digital power amplifier, including a PMOS (P-channel MOS) transistor and an NMOS transistor, which are capable of driving a high load, wherein gates of said PMOS and NMOS (N-channel MOS) are respectively connected to said clock logic module; a first voltage comparator and a second voltage comparator, respectively connected to an output terminal of said CMOS digital power amplifier; a reference voltage circuit, setting two reference voltages respectively for said first voltage comparator and said second voltage comparator, wherein said reference voltages are derived from critical current values for overcurrent protection; a digital voltage debounce device with input terminals thereof respectively connected to output terminals of said first voltage comparator and said second voltage comparator; an overcurrent protection module with input terminals thereof connected to said digital voltage debounce device and an output terminal thereof connected to said clock logic module; and the overcurrent protection module receives a signal from said digital voltage debounce device, when said signal is 1, said overcurrent protection module sends a high-impedance instruction to said clock logic module to compulsorily turn off said PMOS transistor and said NMOS transistor.