Patent ID: 7903075

Claim:
An image display apparatus comprising: a first memory cell which comprises a first memory transistor and a first memory capacitor; a second memory cell which comprises a second memory transistor and a second memory capacitor; a first data line; a second data line; a first memory gate line; a second memory gate line; a memory select circuit to scan the first memory gate line and the second memory gate line; a data input circuit to input data to the first and second data lines; and a sense amplifier to amplify data read out from the first and second capacitors through the first and second lines, wherein a gate of the first memory transistor is connected to the first memory gate line, a source-drain path of the first memory transistor is connected between the first data line and one end of the first memory capacitor, the other end of the first memory capacitor is connected to the second memory gate line, a gate of the second memory transistor is connected to the second memory gate line, a source-drain path of the second memory transistors is connected between the second data line and one end of the second memory capacitor, and the other end of the second memory capacitor is connected to the first memory gate line.