Patent ID: 7462905

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate; a first floating gate formed on a main surface of said semiconductor substrate with a first electrically insulating film therebetween; a second floating gate formed on the main surface of said semiconductor substrate with a second electrically insulating film therebetween; a first control gate formed on said first floating gate with a third electrically insulating film therebetween and having a first wider portion larger than said first floating gate in width in the direction parallel with the main surface of said semiconductor substrate; a second control gate formed on said second floating gate with a fourth electrically insulating film therebetween and having a second wider portion larger than said second floating gate in width in the direction parallel with the main surface of said semiconductor substrate; an interlayer insulating film formed to cover said first control gate and said second control gate; and a gap formed in said interlayer insulating film in at least a portion located between said first floating gate and said second floating gate.