Patent ID: 7457129

Claim:
A multilayer printed wiring board including: a first printed wiring board including: at least two wiring patterns of a first wiring pattern formed on one side thereof, and a second wiring pattern formed on an opposite side thereof, and such that the first and second wiring patterns are electrically conducted to each other; and a semiconductor element housed within the first printed wiring board in the state mounted on the second wiring layer, the multilayer printed wiring board comprising: a second printed wiring board laminated on the second wiring pattern through a first insulating layer; a third printed wiring board laminated on the second printed wiring board through a second insulating layer; and a space region penetrating through the first insulating layer and the second printed wiring board in a thickness direction thereof, and adapted so that the semiconductor element can be accommodated therewithin, wherein the second printed wiring board includes: a third wiring pattern formed on a plane surface opposite to the first insulating layer; a fourth wiring pattern formed on a plane surface opposite to the second insulating layer; a first bump disposed on the third wiring pattern, and penetrating through the first insulating layer in a thickness direction thereof; at least one insulating layer disposed between the third and fourth wiring patterns; and a second bump penetrating through the insulating layer in the thickness direction thereof, and the third wiring pattern and the second wiring pattern being electrically conducted to each other through the first bump; wherein the third wiring pattern and the fourth wiring pattern being electrically conducted to each other through the second bump, the third printed wiring board includes: a fifth wiring pattern formed on a plane surface opposite to the second insulating layer; a sixth wiring pattern formed on a plane surface opposite to the last-mentioned plane surface; a third bump disposed on the fifth wiring pattern and penetrating through the second insulating layer in the thickness direction thereof; and a fourth bump penetrating through the inside of the third printed wiring board in the thickness direction thereof, the fifth wiring pattern and the fourth wiring pattern being electrically conducted to each other through the third bump, the fifth wiring pattern and the sixth wiring pattern being electrically conducted to each other through the fourth bump, the first insulating layer and the insulating layer disposed between the third wiring pattern and the fourth wiring pattern each having a thickness ranging from 10 μm to 100 μm, and the first bump and the second bump each having a diameter of the maximum bottom surface ranging from 50 μm to 200 μm.