Patent ID: 8278897

Claim:
A method for adjusting the operation of a semiconductor component, comprising: providing a low side semiconductor device having a control electrode and first and second current conducting electrodes; providing a high side semiconductor device having a control electrode and first and second current conducting electrodes, wherein the first current conducting electrode of the low side semiconductor device is coupled to the second current conducting electrode of the high side semiconductor device to form a first node; generating a first drive signal in response to comparing a first signal at the first node with a second signal at a second node, the first drive signal for driving the low side semiconductor device; changing an operating state of the low side semiconductor device; monitoring the first signal at the first node and in response to the first signal being one of greater than or less than the second signal: generating a first comparison signal in response to comparing the first signal with a first reference signal and generating a second comparison signal in response to comparing the first signal with a second reference signal; using the first and second comparison signals to generate an adjusted second signal at the second node, wherein using the first and second comparison signals includes one of: generating a counter increment signal from a first flip-flop in response to the first comparison signal and a pulse width modulation signal or generating a counter decrement signal from a second flip-flop in response to the second comparison signal and the pulse width modulation signal; comparing the first signal with the adjusted second signal to generate the first drive signal for the low side semiconductor device.