Patent ID: 8547462

Claim:
A reference voltage generator formed in an integrated circuit also including pixel and column circuitry of an imager, said reference voltage generator for generating a reference voltage for an imager, said reference voltage generator comprising: a load circuit, for controllably flowing a current to a ground potential; a first circuit, said first circuit comprising a first node and a second node, said first circuit for generating a signal equal to a nominal reset signal level of pixels of said imager, and for flowing said signal as a first current between said first node and said load circuit via said second node; a second circuit, comprising a third node, an output node for outputting said reference voltage, said second node, a second circuit source follower transistor having a first source/drain coupled to said third node and a second source/drain coupled to said output node, and an offset voltage generator for generating a voltage difference between said third node and a gate of said second circuit source follower transistor, said second circuit for flowing a second current from said third node to said load circuit via said second node; and a third circuit, comprising a current mirror coupled to a power source and for flowing an identical current from said power source respectively into said first and third nodes.