Patent ID: 7349275

Claim:
A semiconductor memory including a plurality of sense amplifiers based on an overdrive system, comprising: a first switch device interconnecting said sense amplifiers connected in parallel and a first power supply; said first switch device being on when overdrive begins; a capacitive device that accumulates electrical charges referenced to in association with electrical charges supplied via said first switch device to said sense amplifiers; a second switch device interconnecting said capacitive device and said first power supply and being turned on when overdrive begins; a control circuit that exercises control for turning said first and second switch devices off when the potential of said capacitive device has reached a preset voltage lower than a voltage of said first power supply; and a third switch device interconnecting said sense amplifiers and a second power supply having said preset voltage; said third switch device being turned on after said first and second switch devices are turned off to supply said second power supply to said sense amplifiers.