Patent ID: 7822952

Claim:
A context switcher used in a parallel processing system having: N processors which execute programs that are switched to be executed; and a shared memory which has M access ports, where M<N, that holds pieces of context data, the pieces of context data being used by the N processors to execute the programs and being obtained from the N processors, said context switcher performing the switching by transferring a corresponding piece of the pieces of context data from the shared memory to a processor Y of the N processors before the processor Y executes a program X of the programs, and transferring the corresponding piece of the pieces of context data from the processor Y to the shared memory after the processor Y executes the program X, said context switcher comprising: a transferrer that transfers the pieces of context data, according to one of a first transfer mode in which the pieces of context data are transferred continuously through cycles to a predetermined processor, and a second transfer mode in which the pieces of context data are transferred alternately per cycle by switching respective processors of the pieces of context data; and a controller that (i) holds priority information including priorities of processing requests of the N processors for switching, (ii) when requests for switching, among P processors of the N processors, conflict, where M<P<=N, decides which processor of the P processors is to be used in the first transfer mode and which processors of the P processors is to be used in the second transfer mode, depending on priorities included in the priority information, and (iii) transfers the pieces of context data of the P processors, based on the decision.