Patent ID: 7487404

Claim:
A method for controlling a hardware circuit with a processor, the processor used for executing a program code to control the hardware circuit, the program code comprising: a plurality of lower-level subroutines, wherein after the processor executes various lower-level subroutines, the hardware circuit will be controlled to execute various corresponding operations, and each the lower-level subroutine will record operation results, which come from the hardware circuit executing corresponding operations, in an error code; wherein each operation result corresponds to a recovery operation; a plurality of higher-level subroutines, each higher-level subroutine used for calling at least a lower-level subroutine to control the hardware circuit to execute operations corresponding to the lower-level subroutine called by the higher-level subroutine when the processor executes the higher-level subroutine; a plurality of recovery subroutines, each recovery subroutine corresponding to a recovery operation, wherein the hardware circuit is controlled to execute various corresponding recovery operations after the processor executes various recovery subroutines; and an error-handling subroutine for calling the recovery subroutines according to the error code; the method comprising: after the processor executes the higher-level subroutine, executing the error-handling subroutine to allow the processor to control the hardware circuit to execute recovery operations according to the operation results corresponding to the lower-level subroutine called by the higher-level subroutine.