Patent ID: 8288270

Claim:
A method for reducing electromigration in an integrated circuit containing a through-silicon via (TSV), the method comprising the steps of: forming a TSV through a semiconductor substrate such that a first end of the TSV is exposed on a device side of the semiconductor substrate, the first end having at least one flat edge, and a second end of the TSV is exposed on a grind side of the semiconductor substrate, the second end having at least one flat edge; forming a contact grid on the first end of the TSV, the contact grid comprising a pattern of metal lines, wherein a metal line from the pattern of metal lines runs parallel to and contacts an entire length of the at least one flat edge on the first end and overlaps the at least one flat edge on the first end by at least one and one-half times a thickness of the metal line; and forming at least one other metal line on the device side of the semiconductor substrate and connected to the contact grid such that current can pass between the TSV and the at least one other metal line via the contact grid.