Patent ID: 7491633

Claim:
A method of forming semiconductor device, said method comprising the steps of: providing a first conductive type semiconductor substrate having an epi-layer doped with impurities of said first conductive type formed thereon; forming a first oxide layer on said epi-layer; forming a first nitride layer on said first oxide layer; to define a plurality of first trenches and a termination region; forming a second oxide layer on said first nitride layer; patterning said second oxide layer and said first nitride layer to define a plurality of first trenches and a termination trench; patterning said epi-layer by using said second oxide layer and said first nitride layer as a hard mask; thermal growing an oxide layer on said epi-layer portions of said first trenches and said termination trench; forming a second nitride layer on said second oxide layer, as well as all of sidewalls and bottoms of said trenches performing an anisotropic etching to etch said second nitride layer so as to form a nitride spacer on each of said sidewalls; forming a polycrystalline silicon layer on all areas until said first trenches are filled; etching back said polycrystalline silicon layer, said first nitride layer using said first oxide layer as a stop layer; removing said first oxide layer to expose said epi-layer; depositing a Schottky barrier metal layer on said epi-layer and said polycrystalline silicon layer; performing an anneal process so as to form silicide layer; forming a top metal on entire front surface of said semiconductor substrate; and patterning said top metal layer to define an anode; removing layers formed on a backside surface of said semiconductor substrate during forgoing steps; and forming a backside metal layer on said backside surface, said backside metal layer acted as a cathode electrode.