Patent ID: 7221598

Claim:
A method of controlling a program operation of a flash memory device including a plurality of Multi Level Cells (MLCs) that share word lines and bit lines, comprising: performing a first program process of programming lower bit program data into MLCs of a selected page, of the plurality of MLCs; performing a second program process of programming upper bit program data into the MLCs of the selected page; performing a first verify process of verifying whether all MLCs of the selected page have been programmed by applying a first verify voltage to the MLCs of the selected page; transferring first lower sensing data, which is stored in lower bit registers of the page buffers during the second program process, to the upper bit registers so that the upper bit program data is stored in upper bit registers of all page buffers respectively connected to the bit lines in order for MLCs on which a program operation has to be performed to be consecutively programmed though the program operation has been completed during the second program process; and repeatedly performing the second program process, the first verify process and transferring the first lower sensing data until the MLCs of the selected page are completely programmed.