Patent ID: 6884683

Claim:
A method of making a trench DMOS transistor having overvoltage protection, said method comprising the steps of comprising: providing a substrate of a first conductivity type; forming a body region by an implantation of a second conductivity type on the substrate; forming at least one trench extending through the body region, wherein said body region is formed prior to the step of forming at least one trench; depositing an insulating layer that lines the trench and overlies said body region; depositing a conductive electrode in the trench overlying the insulating layer; implanting a dopant of the first conductivity type to form a source region in the body region adjacent to the trench; depositing an undoped polysilicon layer overlying a portion of the insulating layer; and implanting a dopant of the first conductivity type to form a plurality of cathode regions in the undoped polysilicon layer, said plurality of cathode regions being separated by at least one anode region.