Patent ID: 7687327

Claim:
A method for manufacturing integrated circuitry, comprising: a) forming, from a first silicon-containing ink, a plurality of first semiconductor layer elements in a first pattern on a first surface of a dielectric layer, said dielectric layer on an electrically active substrate and said first semiconductor layer elements comprising a transistor channel region in a first region of the substrate, and a first diode layer element in a second region of the substrate; b) forming, from a second silicon-containing ink, a plurality of second semiconductor layer elements different from said first semiconductor layer elements in a second pattern on at least one of said first semiconductor layer element(s) and said first surface of said dielectric layer, said second semiconductor layer elements comprising a second semiconductor layer in the first region of the substrate and a second diode layer element in the second region of the substrate, wherein at least one of said first and second semiconductor layer element forming steps comprises printing the respective first and/or second silicon-containing ink; and c) forming a plurality of metal elements on or over said first semiconductor layer element(s) and said second semiconductor layer element(s), said metal elements comprising a metal contact and a metal gate in the first region of the substrate, and a diode contact in the second region of the substrate.