Patent ID: 7592940

Claim:
A digital-to-analog converter, comprising: a coarse resistor-string digital-to-analog conversion unit for selectively outputting one of the 2 N -level analog voltages in response to upper N-bit digital data, wherein N is a natural number greater than or equal to 2; a fine resistor-string digital-to-analog conversion unit for selectively outputting one of the 2 N -level analog voltages in response to lower N-bit digital data, the 2 N -level analog voltages being obtained by dividing a level of unit voltage of the coarse resistor-string digital-to-analog conversion unit into 2 N levels; and a voltage combining unit including: a capacitor, a switching circuit configured to provide a plurality of capacitive couplings by switching the connection of first and second nodes of the capacitor, a coarse analog voltage terminal of the coarse resistor-string digital-to-analog conversion unit, a lowest reference voltage terminal; and a fine analog voltage terminal of the fine resistor-string digital-to-analog conversion unit and a unit gain buffer circuit configured to buffer a voltage generated by the capacitive coupling and output the 2 2N -level analog output signals, wherein the unit gain buffer circuit has a positive input terminal connected to the first node of the capacitor and a negative input terminal feedback-connected to an output terminal of the unit gain buffer circuit.