Patent ID: 8017478

Claim:
A method for manufacturing a semiconductor device, the method comprising: forming a memory cell gate structure, a first dummy gate structure, and a second dummy gate structure each having a first gate insulating film formed on a semiconductor substrate, a first gate electrode film formed on the first gate insulating film, a second gate insulating film formed on the first gate electrode film, and a second gate electrode film formed on the second gate insulating film; forming a first impurity diffusion layer and a second impurity diffusion layer, the first impurity diffusion layer being formed in a surface area of the semiconductor substrate and being located at a portion which corresponds to an area between the memory cell gate structure and the first dummy gate structure, the second impurity diffusion layer being formed in a surface area of the semiconductor substrate and being located at a portion which corresponds to an area between the first dummy gate structure and the second dummy gate structure; removing at least the second gate electrode films and second gate insulating films of the first and second dummy gate structures to form a hole; and forming a conductive film in the hole to form a select gate structure.