Patent ID: 7304496

Claim:
A mask-programmable logic device comprising: a plurality of base semiconductor layers; and a plurality of base metallization layers; wherein: said base semiconductor layers and said base metallization layers when connected to at least one additional metallization layer form a plurality of logic units; each respective one of at least two of said logic units comprises a first metallization structure forming an internal input/output port within said respective logic unit and a second metallization structure forming an external input/output port within said respective logic unit; said external input/output port is configured for connection to one said additional metallization layer; and at least one layer in said plurality of base semiconductor layers and said plurality of base metallization layers is configured to programmably control connection between said internal input/output ports and said external input/output ports, to provide all of (a) programmable isolation of each respective one of said external input/output ports from its respective logic unit, (b) programmable connection of said external input/output port of a respective one of said logic units to said internal input/output port of said respective logic unit, (c) programmable connection of said external input/output port of a respective one of said logic units to said internal input/output port of another one of said logic units for use of said external input/output port of said respective one of said logic units by said another one of said logic units, and (d) programmable interconnection of said internal input/output ports of said at least two logic units for sharing of said external input/output port of one of said at least two logic units by all of said at least two logic units.