Patent ID: 7659130

Claim:
A method of manufacturing a thin film transistor array panel for a display, comprising: forming a gate conductor including a gate line and a gate electrode on an insulating substrate; forming a gate insulating layer covering the gate conductor; forming a semiconductor pattern on the gate insulating layer; forming a data conductor at least on the semiconductor pattern, the data conductor including a source electrode, and a drain electrode separated from the source electrode; forming a color filter covering the data conductor using photoresist material including pigment, wherein the color filter includes a first aperture exposing at least a portion of the drain electrode; depositing a passivation layer on the color filter; patterning the passivation layer to form a first contact hole within the first aperture to expose at least a portion of the drain electrode; and forming a pixel electrode connected to the drain electrode via the first contact hole, wherein the first aperture is only formed on the drain electrode.