Patent ID: 7991944

Claim:
A flash memory system for interfacing a host device to a flash memory, comprising: at least one random access memory for storing a mapping table mapping logical memory addresses of the flash memory to physical memory addresses of the flash memory, the mapping table retrieved from the flash memory; and at least one dedicated hardware-based search engine, which is distinct from a memory controller, associated with each of the at least one random access memories for searching for desired physical memory addresses of the flash memory from the mapping table stored in the random access memory, wherein the dedicated hardware-based search engine comprises: a start address register for storing a start address from which searching starts; an ending address register for storing an ending address from which searching ends; a search value register for storing a value of a logical address to be searched for; a hit address register for storing a physical address corresponding to the logical address to be searched for; and a control register for storing a control command for the dedicated hardware-based search engine.