Patent ID: 8416610

Claim:
A method of forming a memory device, comprising: forming an array of transistors; forming a plurality of subgroups of transistors from the transistors among the array of transistors by connecting the transistors within the subgroups with local data lines; forming an array of storage devices, wherein each storage device among the array of storage devices is connected to a transistor among the array of transistors; forming a plurality of word lines, wherein a common word line of the plurality of word lines is coupled to both a first and a second subgroup of the plurality of subgroups, wherein a second word line of the plurality of word lines is not coupled to both the first and the second subgroup; and connecting each global data line among a plurality of global data lines to the plurality of subgroups of transistors by connecting the global data line to at least a portion of storage devices among the array of storage devices, wherein each global data line is connected to only one subgroup sharing a common word line.