Patent ID: 7932169

Claim:
A method for forming an interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, consisting of forming ball limiting metallurgy (BLM) pads on a substrate; said BLM pads are formed by depositing an adhesion layer on said substrate, said adhesion layer: is a metal, alloy or compound selected from the group consisting of Cr, Ti, TiW, V, Zr, Ta; is deposited by sputtering, evaporation or induction heating on the surface of said substrate; and has a thickness of between about 100 and 5,000 Å; depositing a solder reaction barrier layer on said adhesion layer, said solder reaction barrier layer: is selected from the group consisting of Ni, Co, Ru, Hf, Nb, Mo, W, V and their, alloys; is deposited by sputtering, evaporation, electroless- or electrolytic plating; and has a thickness of between about 500 and 30,000 Å; depositing a solder wettable layer on said solder reaction barrier layer, said solder wettable layer: is selected from the group consisting of Cu, Au, Pd, Pt, Sn and their alloys; is deposited by sputtering, evaporation, electroless- or electrolytic plating; and has a thickness of between about 500 and 20,000 Å; forming a resist pattern on the said ball limiting metallurgy; etching the ball limiting metallurgy by using the resist pattern as an etch mask; removing the resist from remaining ball limiting metallurgy; and forming a lead free solder ball using a vacuum molding process and depositing said lead free solder on said ball limiting composition; reflowing said lead free solder ball in an atmosphere selected from the group consisting of N 2 or H 2 N 2 using heating means selected from the group consisting of a belt furnace, vacuum furnace or oven.