Patent ID: 8575655

Claim:
A structure including a SiGe engineered channel comprising: a semiconductor substrate having at least one active area with an exposed upper surface comprising a semiconductor material of said semiconductor substrate, wherein isolation regions are present in said semiconductor material and are located at a periphery of said at least one active device region, each isolation region having an upper surface that is coplanar with the exposed upper surface of the semiconductor material; and a SiGe film located directly on the exposed upper surface of the semiconductor material active area, said SiGe film including a lower region that has a first Ge concentration and an upper region that has a second Ge concentration, wherein the first Ge concentration is greater than the second Ge concentration, and wherein said SiGe film has sidewall surfaces located above the isolation regions, wherein each sidewall surface of said SiGe film is oriented perpendicular to a topmost surface of the semiconductor substrate and is vertically aligned to a sidewall edge of each isolation region that is located at the periphery of the at least one active device region.