Patent ID: 8510539

Claim:
A spilling method in register files for a processor, the processor comprising a first cluster, a second cluster and a memory, each of the first and second clusters comprising a first function unit, a second function unit, a first local register file, a second local register file and a global register file, the first and second local register files being used by the first and second function units, respectively; for a live range, the method includes the steps of: calculating communication costs of the first local register file, the second local register file and the global register file in each of the first and second clusters and communication cost of the memory for spilling the live range; calculating use ratios of the first local register file, the second local register file and the global register file in each of the first and second clusters, and use ratio of the memory for the live range; selecting one of the first local register file, the second local register file and the global register file in each of the first and second clusters and the memory for spilling the live range based on the communication costs and the use ratios.