Patent ID: 8450831

Claim:
A semiconductor device, comprising: a semiconductor substrate; a wiring layer formed over the semiconductor substrate; an inductor formed in the wiring layer; and a plurality of dummy metals formed in the wiring layer; wherein the plurality of the dummy metals includes a first dummy metal, a second dummy metal, a third dummy metal, and a fourth dummy metal, wherein the first dummy metal and the second dummy metal are formed inside the inductor in a plan view, wherein the third dummy metal and the fourth dummy metal are formed outside the inductor in a plan view, wherein the first dummy metal and the second dummy metal are formed at a nearest location among the plurality of the dummy metals in a plan view, wherein the third dummy metal and the fourth dummy metal are formed at a nearest location among the plurality of the dummy metals in a plan view, wherein a nearest distance between the first dummy metal and the second dummy metal is more than a nearest distance between the third dummy metal and the fourth dummy metal, and wherein the first, the second, the third, and the fourth dummy metals and the inductor are formed in a same layer.