Patent ID: 8161221

Claim:
A storage system comprising: a plurality of storage devices; and a controller module connected to the plurality of storage devices, wherein the controller module comprising: at least one processor module that transmits a write packet; at least one storage resource; and at least one transfer control module connected to the processor module and the storage resource, each of the at least one transfer control module comprising: a receiver; and a transmitter, wherein (1-1) the receiver receives the write packet from the processor module, and transmits a write packet provided with the following (1-A) to (1-D) based on the write packet received from the processor module, (1-A) a write code that is a code representing a write; (1-B) a specific code that is one of a first specific code or a second specific code; (1-C) a write targeted data; (1-D) a destination information indicating a storage resource of a write destination, and (1-2) in the case in which the transmitter connected the storage resource of the write destination receives a write packet, the transmitter connected the storage resource of the write destination writes the write targeted data in the received write packet to the storage resource indicated by the destination information in the packet, and (1-2-1) if the received write packet includes the first specific code, the transmitter generates a response packet that represents a write completion in a situation where the specific code is the first specific code and a write of the write targeted data is terminated, and (1-2-2) if the received write packet includes the second specific code, the transmitter reads the write targeted data from the write destination after a write operation of the write targeted data is terminated, compares data that has been read with the write targeted data provided by the received write packet, and generates a response write packet, the response write packet representing a write completion in a situation where the specific code is the second specific code if the data that has been read matches the write targeted data and representing a write failure if the data that has been read does not match the write targeted data.