Patent ID: 8023614

Claim:
A counting circuit, comprising: a first counter unit having an initial value based on a first preset control signal input through a set terminal and configured to output first and second counting signals based on a clock signal and to output a first control signal; a clock unit for outputting a control clock signal based on the first control signal and the clock signal; and a second counter unit having an initial value based on a second preset control signal input through a set terminal and configured to output third and fourth counting signals according to the control clock signal, wherein the first counter unit comprises: a first FF, a second FF, a third FF and a fourth FF, wherein each of the first to fourth FFS has an initial value based on the first preset control signal, each of the first to fourth FFs being configured to receive a signal at a corresponding input terminal, and output an output signal at a corresponding output terminal based on the clock signal; a fifth FF coupled to the output terminal of the fourth FF and configured to output the output signal of the fourth FF synchronously with the clock signal; and a logic operation unit for logically combining the output signals of the second to fourth FFs and for outputting the first and second counting signals.