Patent ID: 7925891

Claim:
An apparatus, for accomplishing cryptographic operations, comprising: an x86-compatible complex instruction set computer (CISC) microprocessor, comprising: translation logic, configured to receive a single, atomic cryptographic instruction from a source therefrom, wherein said single, atomic cryptographic instruction prescribes generation of a message digest according to one of the cryptographic operations, and configured to translate said single, atomic cryptographic instruction into a sequence of micro instructions specifying sub-operations required to accomplish generation of said message digest according to said one of the cryptographic operations; execution logic, operatively coupled to said translation logic, configured to receive said sequence of micro instructions, and configured to perform said sub-operations to generate said message digest, said execution logic comprising: an x86 integer unit, an x86 floating point unit, an x86 MMX unit, and an x86 SSE unit, wherein a cryptography unit within said execution logic operates in parallel with said x86 integer unit, said x86 floating point unit, said x86 MMX unit, and said x86 SSE unit, to accomplish generation of said message digest.