Patent ID: 7732921

Claim:
A window-type BGA semiconductor package primarily comprising: a substrate having a top surface, a bottom surface, and a wire-bonding slot, wherein the substrate includes a plurality of bonding fingers and a plurality of plating line stubs on the bottom surface, wherein the bonding fingers are close to the wire-bonding slot and the plating line stubs connect the bonding fingers and extend to the wire-bonding slot; a chip disposed on the top surface of the substrate, wherein the chip has an active surface with a plurality of bonding pads disposed on the active surface, wherein the active surface is faced toward and attached to the substrate with the bonding pads aligned in the wire-bonding slot; and a plurality of bonding wires passing through the wire-bonding slot and electrically connecting the bonding pads to the bonding fingers, wherein the bonding wires have a plurality of wire-bonding paths projected on the bottom surface; wherein the plating line stubs extend in a manner to be compliant to the wire-bonding paths; wherein the bonding wires and the compliant plating line stubs are correspondingly connected at the bonding fingers.