Patent ID: 7917788

Claim:
A system on a chip (SOC) comprises: a bus structure; a processing module coupled to the bus structure; read only memory (ROM) coupled to the bus structure; random access memory (RAM) coupled to the bus structure; a display interface coupled to the bus structure; an external memory interface coupled to the bus structure; a digital to analog conversion (DAC) module coupled to the bus structure, wherein the digital to analog converter produces an analog audio signal; an analog to digital conversion (ADC) module coupled to the bus structure; a headphone amplifier circuit coupled to amplify the analog audio signal; a clock circuit coupled to produce a first clock signal when the SOC is in a low power mode and to produce a second clock signal when the SOC is in a performance mode, wherein the first clock signal is less accurate than the second clock signal, wherein the clock circuit consumes more power when producing the second clock signal than when producing the first clock signal, and wherein the processing module utilizes the second clock signal; and a bandgap circuit coupled to produce a first bandgap reference when the SOC is in the low power mode and to produce a second bandgap reference when the SOC is in the performance mode, wherein the first bandgap reference is less accurate than the second bandgap reference, and wherein a DC-DC converter is configured to utilize the first bandgap reference when the SOC is in the low power mode and to utilize the second bandgap reference when the SOC is in the performance mode.