Patent ID: 7764102

Claim:
A pulse generator circuit for generating an input signal for a flip flop circuit from a clock signal and from a data signal, comprising: a clock pulse field effect transistor, at the gate terminal of which the clock signal is applied and at the first source/drain terminal of which the input signal for the flip flop circuit is provided; a logic field effect transistor, at the gate terminal of which the data signal is applied and the first source/drain terminal of which is coupled to the second source/drain terminal of the clock pulse field effect transistor; a feedback field effect transistor, at the gate terminal of which a feedback signal based on the clock signal is applied, the first source/drain terminal of which is coupled to the second source/drain terminal of the logic field effect transistor and at the second source/drain terminal of which a first electrical reference potential is applied, wherein the feedback field effect transistor is activated by a level of the clock signal that deactivates the clock pulse field effect transistor; and a control unit configured to apply the data signal to the gate terminal of the logic field effect transistor before the clock signal is switched to a level that activates the clock pulse field effect transistor such that, to generate the input signal, the clock pulse field effect transistor is chronologically activated after the logic field effect transistor and the feedback field effect transistor are activated.