Patent ID: 7142616

Claim:
A front end processor for a data receiver which receives a digital modulation signal that has been amplified in a saturated region during either the process of transmission or of reception, comprising: a quadrature detector which receives data of a modulated digital signal, and converts said data into a complex baseband signal x(n) with quadrature detecting; a complex signal converter for nonlinear distortion equalization which deletes m-th order distortion components of said complex baseband signal x(n), based on a coefficient a m (n) for the nonlinear distortion equalization for showing information through which m-th order distortion components are estimated, where m is an integer greater than one; a demodulation circuit which outputs a demodulation signal after performing a demodulation process for an output signal of said complex signal converter for the nonlinear distortion equalization, and then outputs a control signal of a phase correction performed in said demodulation process; and an error estimator which calculates an error between said demodulation signal and an ideal reception point; and a coefficient estimator for the nonlinear distortion equalization generates said coefficient a m (n) for showing information through which the m-th order distortion components are estimated, based on an output of said error estimator and a control signal for phase correction, and then outputs said coefficient a m (n) to said complex signal converter for the nonlinear distortion equalization, wherein said front end processor for a data receiver updates the value of said coefficient a m (n) for the nonlinear distortion equalization so that the output of said error estimator becomes a minimum.