Patent ID: 7831282

Claim:
A wireless node comprising: a processor comprising a sleep routine, a wakeup routine and an output; a wireless transceiver comprising an input electrically connected to said output; and a battery structured to power said processor and said wireless transceiver, wherein said sleep routine is structured to output a signal on said output to power down said wireless transceiver through said input and place said processor in a sleep mode, in order to minimize power consumption from said battery by said processor and said wireless transceiver, wherein said wakeup routine is structured to remove said processor from said sleep mode independent of said wireless transceiver; and wherein the output of said processor is a first output; wherein said signal is a first signal; wherein the input of said wireless transceiver is a first input; wherein said processor further comprises a serial communications interface and a second output; and wherein said wireless transceiver further comprises a serial communications interface electrically connected to the serial communications interface of said processor, and a second input electrically connected to said second output, said wakeup routine being structured to output a second signal on said first output to power up said wireless transceiver through said first input, output a third signal on said second output to reset said wireless transceiver through said second input, and reinitialize said wireless transceiver through said serial communications interface, in order to resume normal power consumption from said battery by said processor and said wireless transceiver and normal wireless communication through said wireless transceiver.