Patent ID: 8729620

Claim:
A nonvolatile semiconductor memory device comprising: a substrate; a semiconductor layer over the substrate, the semiconductor layer including a channel forming region between a pair of impurity regions which are formed apart from each other; a first insulating layer over the semiconductor layer; a floating gate over the channel forming region with the first insulating layer interposed therebetween; a second insulating layer over the floating gate; and a control gate over the floating gate with the second insulating layer interposed therebetween, wherein the floating gate includes at least a first layer which is in contact with the first insulating layer and a second layer formed over the first layer, and the first layer comprises germanium and oxygen, wherein the semiconductor layer is an island-like semiconductor layer formed on an insulating surface, wherein the first insulating layer covers the channel forming region and the pair of impurity regions, and wherein the semiconductor layer comprises a low-concentration impurity region which overlaps with the control gate, does not overlap with the floating gate, and has the same conductivity type as a conductivity type of the pair of impurity regions.