Patent ID: 8159052

Claim:
A method of manufacturing chip assemblies, comprising: providing a plurality of metal lead frames formed in a fixed-attached array, each of the plurality of metal lead frames having a paddle in a center region and a plurality of conductive lands in a peripheral region, the plurality of conductive lands surrounding the paddle, the plurality of conductive lands discretely defined and arranged inwardly toward the paddle; attaching a plurality of chips to the plurality of metal lead frames, the step of attaching a plurality of chips comprising: attaching each of the plurality of chips to a corresponding one of the paddles, each of the plurality of chips having a front surface, a rear surface and a side, each of the plurality of chips overlying the corresponding one of the paddles, each of the plurality of chips having conductive contacts on its front surface, wherein the front surface of each of the plurality of chips faces away from the corresponding one of the paddles; attaching a plurality of frequency extending devices to the plurality of metal lead frames, the step of attaching a plurality of frequency extending devices comprising: disposing each of the plurality of frequency extending devices at least partially adjacent to the side of a corresponding one of the plurality of chips and at least partially overlying a corresponding one of the paddles, each of the plurality of frequency extending devices having at least a first conductive layer and a first dielectric layer, the first conductive layer having one or more conductive traces, each of the plurality of frequency extending devices configured to provide a lower discontinuity in impedance as compared to one or more bond wires; connecting at least one of the conductive contacts of each of the plurality of chips to at least one of the one or more conductive traces of a corresponding one of the plurality of frequency extending devices; and connecting at least one of the one or more conductive traces of each of the plurality of frequency extending devices to at least one of the plurality of conductive lands of a corresponding one of the plurality of metal lead frames; encapsulating the chip assemblies, each of the chip assemblies having a corresponding one of the plurality of metal lead frames, a corresponding one of the plurality of chips, and a corresponding one of the plurality of frequency extending devices; and separating the chip assemblies from the fixed-attached array into individual packages, wherein each of the plurality of frequency extending devices is surface mounted on a corresponding paddle and on a corresponding plurality of conductive lands, and wherein the step of connecting at least one of the conductive contacts comprises having one or more solder balls between the conductive contacts of each of the plurality of chips and the one or more conductive traces of a corresponding one of the pluralilty of frequency extending devices.