Patent ID: 7232703

Claim:
A method for fabricating a non-volatile memory comprising an alignment step for aligning and connecting a first substrate and a second substrate, the first substrate having a plurality of switching elements arranged in a matrix, and a plurality of first electrodes connected to the switching elements, the second substrate having a conductive film, and a recording layer whose resistance value changes by application of an electric pulse, wherein the first substrate further comprises a second electrode the voltage of which is maintained at a certain level while applying current to the recording layer, in the alignment step, a first electrode connecting step in which the recording layer is held between the plurality of first electrodes and the conductive film by covering the plurality of first electrodes with the recording layer integrally, and a second electrode connection step for electrically connecting the second electrode to the conductive film or the recording layer are conducted at the same time, and wherein the conductive film has an exposed portion not covered by the recording layer, and in the second electrode connection step, the second electrode is connected to the exposed portion.