Patent ID: 8369411

Claim:
A system for processing sub-blocks of a macroblock, the system comprising: a memory; a processor operative to: process each sub-block of the macroblock, wherein each sub-block is associated with a predetermined position in a first sequence, wherein the processing of certain sub-blocks in the first sequence requires results of processing of one or more previously processed sub-blocks in the first sequence, wherein the processing of one or more previously processed sub-blocks in the first sequence comprises the processor operative to form a prediction sub-block based on information pertaining to a current macroblock to be processed; and selectively process each sub-block of the macroblock in a second sequence, wherein the second sequence is altered from the first sequence to enable the first module to process certain sub-blocks of the macroblock in parallel; and a controller for controlling a demultiplexer to dispatch the sub-blocks of the macroblock and requisite processing information pertaining to the sub-blocks of the macroblock to the first sequence and the second sequence, wherein the sub-blocks are dispatched on successive clock ticks.