Patent ID: 6894633

Claim:
An analog-to-digital converter, comprising: an input for receiving an analog input signal; a digitizer for producing a digital output signal, said digitizer being switchable, in response to an activation signal, between a power saving mode, in which said digitizer is inactive, and a reconstruction mode, in which said digitizer is operational; a circuit element for generating said activation signal in response to a trigger event; a sample-and-hold circuit having a plurality of storage elements, said sample-and-hold circuit storing successive groups of samples of said analog input signal; a first set of switch elements connecting said input to said respective storage elements of said sample-and-hold circuit; a second set of switch elements connecting said respective storage elements of said sample-and-hold circuit to said digitizer; and a control element for controlling said first set of switch elements to continually apply incoming samples of said analog input signal in a cyclic fashion to said storage elements, said control element further controlling said second set of switch elements when said digitizer is in said reconstruction mode to sequentially apply said samples of said analog input signal stored in said storage elements to said digitizer with a predetermined delay relative to said incoming samples so as to permit said digitizer to output a portion of said input signal that arrived at said input prior to the occurrence of said activation signal.