Patent ID: 7808848

Claim:
A method for a semiconductor memory device which comprises a plurality of memory banks, each of the memory banks including a read/write amplifier that amplifies data read out from and data to be written into a memory cell in an associated memory bank, each of the memory banks further including a remedying bit register, the method comprising: storing first defective address information indicative of a first defective memory cell belonging to a first memory bank of the memory banks; producing, in response to the first defective address information, a detection signal indicating that an access is made to the first defective memory cell; deactivating, in response to the detection signal, the read/write amplifier of each of the memory banks; and performing, in place of the first defective memory cell, a read/write operation on the remedying bit register of a selected memory bank of the memory banks in a state wherein a read/write amplifier of a selected memory bank of the memory banks is being deactivated.