Patent ID: 8640011

Claim:
An apparatus comprising: an input to receive a sequence including N coded blocks (CBs) that includes a first CB, a last CB, and a plurality of CBs that includes a second CB that is interposed between the first CB and the last CB, where N is an integer; a first cyclic redundancy check (CRC) encoder to employ a generation polynomial to process all of the N CBs to generate a first CRC field and to combine the first CRC field with the second CB to generate a modified CB and to generate a modified sequence including N−1 CBs and the modified CB; a second CRC encoder to employ the generation polynomial to process each of the N−1 CBs and the modified CB, of the modified sequence, to generate N CRC fields and to combine N−1 CRC fields respectively with the N−1 CBs, such that each of the N−1 CRC fields undergoing combination with a respective one of the N−1 CBs, and to combine one of the N CRC fields with the modified CB to generate N CRC CBs; and an output to output the N CRC CBs.