Patent ID: 7687325

Claim:
A method of manufacturing a semiconductor device comprising: a first step of forming a gate wiring and a plurality of convex portions in a pixel portion by using a first mask; a second step of forming an insulating film covering said gate wiring and said plurality of convex portions; a third step of forming a first amorphous semiconductor film on said insulating film; a fourth step of forming a second amorphous semiconductor film, containing an impurity element which imparts n-type conductivity, on said first amorphous semiconductor film; a fifth step of forming a first conductive film on said second amorphous semiconductor film; a sixth step of forming a second mask on the first conductive film; a seventh step of sequentially patterning said first conductive film, said second amorphous semiconductor film and said first amorphous semiconductor film, by using the second mask; thereby forming a wiring from said first conductive film; an eighth step of forming a second conductive film contacting and overlapping said wiring; a ninth step of patterning said second conductive film, said wiring, said second amorphous semiconductor film and a portion of said first amorphous semiconductor film, by using a third mask, sequentially, thereby forming a pixel electrode made from said second conductive film, a source wiring and a drain electrode made from said wiring, and a source region and a drain region made from the second amorphous semiconductor film.