Patent ID: 7545679

Claim:
A method for detecting degraded transconductance in bit cells of a memory array comprising: performing a pre-conditioning program operation on the bit cells with use of a pre-conditioning reference current and pre-conditioning bit line and word line voltages to render the bit cells programmed, the programmed bit cells collectively having a pre-conditioning threshold voltage distribution width less than a threshold voltage distribution width resulting from a normal program operation on the bit cells; reading all bit cells with use of a verification reference current and verification word line voltage, the verification reference current and word line voltage being different from the pre-conditioning reference current and word line voltage, respectively; and determining whether any read bit cell is erased, as opposed to being programmed, wherein (i) responsive to any bit cell being erased, then at least one bit cell of the memory array is detected as having degraded transconductance, and (ii) responsive to no bit cell being erased, then no bit cell of the memory array is detected as having degraded transconductance.