Patent ID: 8650525

Claim:
A system embodied on one or more tangible non-transitory computer-readable media and configured to be executed on one or more processors, the system comprising: a compiler configured to: interpret a high level program; generate low level code based upon the high level program, wherein the low level code represents programmable logic for an integrated circuit (IC), wherein the low level code includes a hardware component logic and a control unit, wherein said hardware component logic is useful for implementing the high level program, and wherein said control unit is configured to control the hardware component logic based upon a host program; and generate the host program comprising machine-readable implementation instructions for the control unit based upon the high level program; and programmable logic design software configured to implement changes to the high level program using the low level code without re-generating the low level code, by: receiving modifications to the high level program; determining whether the modifications can be implemented by a new host program utilizing the low level code; and generating the new host program to implement the modifications, when the modifications can be implemented by the new host program utilizing the low level code.