Patent ID: 7260736

Claim:
A method comprising: delaying a first clock signal to produce a delayed clock signal; generating the first clock signal from an input clock signal, wherein the first clock signal includes first pulses, which correspond to leading edges of the input clock signal, and second pulses, which correspond to falling edges of the input clock signal; measuring time intervals between phases of the first clock signal, wherein measuring the time intervals comprises determining a first duty cycle skew of the first clock signal by adjusting a time delay between the first clock signal and the delayed clock signal, and comparing the first clock signal and the delayed clock signal, wherein determining the first duty cycle skew comprises adjusting the time delay to a first value, which indicates a first time delay when a first delayed pulse of the delayed clock signal occurs in proximity to a second pulse of the first clock signal, adjusting the time delay to a second value, which indicates a second time delay when a second delayed pulse of the delayed clock signal occurs in proximity to a first pulse of the first clock signal, and determining the first duty cycle skew based on the first time delay and the second time delay; and adjusting the delayed clock signal based on the time intervals.