Patent ID: 8618648

Claim:
A method for flip chip stacking, comprising: forming a cavity wafer by forming a plurality of cavities within an electrostatic (ESC) chuck wafer and forming a bonding layer on a surface of the ESC chuck wafer; placing a through-silicon-via (TSV) interposer with solder bumps coupled to a surface of the TSV interposer on the cavity wafer, such that the solder bumps are situated in the plurality of cavities and the TSV interposer is situated on the bonding layer; applying an electrostatic bias to the bonding layer to bond the TSV interposer to the cavity wafer; placing an integrated circuit (IC) die on another surface of the TSV interposer, such that the IC die, the TSV interposer, and the solder bumps form a stacked interposer unit; and removing the stacked interposer unit from the cavity wafer.