Patent ID: 6970005

Claim:
A probe assemblage for providing electrical connection simultaneously between one or more integrated circuits on a semiconductor wafer and a circuit test equipment, said assemblage including: an interposer comprising a dielectric material having two major surfaces, a plurality of protruding contact elements on one major surface of said interposer, each element corresponding to a test pad on one or more integrated circuits, a plurality of conductive vias connecting each of said contact elements to a metallized pad on the second surface of said interposer, a plurality of conductive leads fanning outward from said metallized pads to a standardized array of interposer connectors, a compliant material underlying said contact elements on the first surface, and/or said interposer connectors on the second surface of the interposer, a probe card having an array of connectors corresponding to said interposer connector array, and means for attaching said probe card to said interposer.