Patent ID: 8823435

Claim:
An apparatus comprising: a first circuit block to receive an input signal from a communication channel and to generate a serialized signal; a second circuit block, including current-controlled complementary metal-oxide semiconductor (C 3 MOS) logic, to deserialize the serialized signal to generate a deserialized signal including a plurality of signals; and a third circuit block, coupled to the second circuit block and including conventional complementary metal-oxide-semiconductor (CMOS) logic wherein substantially zero static current is dissipated, to process the plurality of signals to generate a plurality of processed signals; and wherein: the C 3 MOS logic including a first metal-oxide semiconductor (MOS) transistor with a first drain, a first gate, and a first source and a second MOS transistor with a second drain, a second gate, and a second source such that a current steering circuit within the C 3 MOS circuit including the first source and the second source such that current steering is performed within the current steering circuit in response to the serialized signal, being a differential signal, provided to the first gate and the second gate; the first source and the second source being coupled together and to a current source; and the first drain and the second drain being coupled to a power supply.