Patent ID: 6902974

Claim:
A method for fabricating an integrated circuit comprising nonvolatile memory, the method comprising: forming a first conductive gate for a nonvolatile memory cell over a semiconductor substrate; forming a layer L over the first conductive gate, wherein the memory cell is to have a second conductive gate comprising a portion of the layer L, wherein the layer L has a portion L-P 1 protruding above the first conductive gate and has another portion L-P 2 ; forming a layer L 1 over the layer L such that the layer L 1 covers the portion L-P 2 but not the portion L-P 1 , the portion L-P 1 being exposed; selectively forming a layer L 2 on the exposed portion L-P 1 by a process that does not form the layer L 2 on the layer L; removing at least a portion of the layer L 1 to expose the portion L-P 2 ; and removing the portion L-P 2 .