Patent ID: 8345027

Claim:
An image display device for displaying input image data on a display section formed by arranging pixel circuits in a form of a matrix by driving said pixel circuits by a signal line driving circuit and a scanning line driving circuit via a signal line and a scanning line of said display section, wherein: said pixel circuits each include at least a light emitting element, a driving transistor configured to current-drive said light emitting element by a driving current corresponding to a gate-to-source voltage, a storage capacitor configured to retain said gate-to-source voltage, and a writing transistor configured to set a voltage across said storage capacitor by a voltage of said signal line; said signal line driving circuit includes a data driver configured to time-division-multiplex and output gradation setting voltages for each unit of a plurality of signal lines after assigning said input image data to said signal lines and generating, for each of said signal lines, said gradation setting voltages sequentially indicating gradations of said pixel circuits connected to the respective signal lines, a switch circuit for the gradation setting voltages, said switch circuit for the gradation setting voltages distributing an output signal of said data driver to said plurality of signal lines, and a switch circuit for precharge, said switch circuit for precharge setting at least potential of the corresponding signal lines to a precharge voltage in advance of setting the gate-to-source voltage of the driving transistor when voltage of said signal lines is set to said gradation setting voltages; and said signal line driving circuit selects and outputs the precharge voltage to each of said signal lines via the switch circuit for precharge to simultaneously set each signal line in advance of sequentially setting said gradation setting voltages, and wherein the voltage across the storage capacitor is set to the threshold voltage of the driving transistor such that the potential of the plurality of signal lines is simultaneously set to the precharge voltage in advance of setting the gate-to-source voltage of the driving transistor and the gate-to-source voltage of the driving transistors of said pixel circuits are sequentially set to said gradation setting voltages of the respective signal lines.