Patent ID: 8345458

Claim:
A semiconductor device comprising: a first semiconductor chip which includes a first MOSFET including a source, a gate and a drain; a second semiconductor chip which includes a second MOSFET including a source, a gate and a drain; a third semiconductor chip which includes a driver circuit for driving the gate of the first MOSFET and the gate of the second MOSFET; a resin encapsulator encapsulating the first, second and third semiconductor chips; an input power terminal exposed from the resin encapsulator and configured to be used for receiving an input power; a reference potential terminal exposed from the resin encapsulator and configured to be used for receiving a reference potential; and an output terminal exposed from the resin encapsulator and configured to be used for outputting an output, wherein a source-to-drain path of the first MOSFET is electrically coupled in series between the input power terminal and the output terminal, wherein a source-to-drain path of the second MOSFET is electrically coupled in series between the reference potential terminal and the output terminal, and wherein the first semiconductor chip and the second semiconductor chip are electrically and mechanically coupled to a metal material which is electrically coupled to the output terminal.