Patent ID: 7603771

Claim:
A method of manufacturing a combined multilayer circuit board having embedded chips comprising: (a) providing at least two multilayer circuit boards, wherein each multilayer circuit board is fabricated by: (a1) preparing a single-layer Flame Retardant 4 (FR4) printed circuit board having multiple chip sections arranged in matrix, and each chip section having a FR4 substrate; multiple conducting wires formed on the FR4 substrate of each chip section; an insulating coating coated on a portion of the multiple conducting wires; and multiple contacts defined as the exposed portion of the multiple conducting wires; (a2) attaching at least one chip to the corresponding chip section of the single-layer FR4 printed circuit board, wherein each chip is electronically connected to the contacts on the corresponding single-layer FR4 printed circuit board; (a3) attaching a frame to the single-layer FR4 printed circuit board, wherein the frame has multiple enclosures corresponding to the chip sections on the single-layer FR4 printed circuit board to enclose the corresponding chip section and the corresponding chip; (a4) attaching a semi-fluid glue sheet to the frame to cover the frame; (a5) vacuum pressing a conductive layer on the semi-fluid glue sheet to fill inside of the enclosures with glue of the semi-fluid glue sheet to encapsulate the chips; and (a6) forming multiple inner conductive vias by drilling multiple holes through the multilayer circuit board and then electroplating the peripheries defining the holes to electronically connect the conducting wires to the conductive layer in the multilayer circuit board; (b) combining the at least two multilayer circuit boards to form a combined multilayer circuit board, wherein the of combining comprises: (b1) reversing one of the multilayer circuit boards; and (b2) vacuum pressing other multilayer circuit boards on the reversed multilayer circuit board with multiple glue layers, and each glue layer sandwiched in between two multilayer circuit boards; (c) forming multiple outer conductive vias by drilling multiple through holes through the combined multilayer circuit board and then electroplating the peripheries defining the through holes to electronically interconnect the conducting wires and the conductive layers in the at least two multilayer circuit boards; and (d) forming circuits and contacts on the combined multilayer circuit board by etching patterns on the conductive layers and coating an insulating lacquer layer on a portion of the patterned conductive layers.