Patent ID: 8296517

Claim:
A memory device comprising: a memory controller; and a plurality of memory chips; the memory controller configured to receive, from a computing device, a request for data that is stored in one or more data blocks that are striped across the plurality of memory chips, wherein each data block stores a set of rows, wherein each memory chip of the plurality of memory chips is a non-volatile random access memory device; the memory controller configured to determine that the request is for columnar data stored in one or more columns in said set of rows; and the memory controller configured to perform, for each data block of the one or more data blocks: using mapping logic for said each data block that maps each column of said one or more columns to one or more striped portions of the data block, based on the mapping logic, selecting one or more memory chips of the plurality of memory chips that store the one or more striped portions to which the one or more columns are mapped; retrieving the one or more striped portions from the one or more memory chips without retrieving one or more other striped portions of the data block from one or more other memory chips of the plurality of memory chips, wherein the one or more other striped portions of the data block are mapped to by one or more other columns; and returning, to the computing device, the columnar data from the one or more striped portions of the data block.