Patent ID: 7062526

Claim:
A method of performing a product operation with rounding in a microprocessor in response to a single rounding multiplication instruction, the method comprising the steps of: fetching a first pair of elements and a second pair of elements; forming a most significant product of a first element of the first pair of elements and a most significant element of the second pair of elements and a least significant product of the first element of the first pair of elements and a least significant element of the second pair of elements, wherein the first element of the first pair of elements is a most significant element of the first pair of elements; combining the most significant product with the least significant product to form a combined product, wherein combining comprises shifting the most significant product left by a width of the least significant element of the second pair of elements prior to adding the most significant product to the least significant product; rounding the combined product to form an intermediate result; and shifting the intermediate result a selected amount to form a final result.