Patent ID: 8842062

Claim:
A pixel driving circuit, coupled between a first data line and a second data line, and coupled between a first scan line and a second scan line, the pixel driving circuit comprising: a first switch, having a first end, a second end and a control end, the first end of the first switch being directly connected to the first data line, and the control end of the first switch being directly connected to the first scan line; a second switch, having a first end, a second end and a control end, the first end of the second switch being directly connected to the second data line, and the control end of the second switch being directly connected to the first scan line; a third switch, having a first end, a second end and a control end, the first end of the third switch being directly connected to the first data line, and the control end of the third switch being directly connected to the first scan line; a fourth switch, having a first end, a second end and a control end, the first end of the fourth switch directly connected to the second data line, and the control end of the fourth switch being directly connected to the first scan line; a liquid crystal capacitor, being formed between the second end of the first switch and the second end of the second switch; a first capacitor, having a first end and a second end, and the first end of the first capacitor being directly connected to the second end of the first switch; a second capacitor, having a first end and a second end, and the first end of the second capacitor being directly connected to the second end of the second switch; a first storage capacitor, having a first end and a second end, the first end of the first storage capacitor being directly connected to the second end of the third switch, and the second end of the first storage capacitor being used for receiving a reference voltage; a second storage capacitor, having a first end and a second end, the first end of the second storage capacitor being directly connected to the second end of the fourth switch, and the second end of the second storage capacitor being used for receiving the reference voltage; and a plurality of switching units, each of the plurality of switching units having a first end, a second end and a control end, the first end of each of the plurality of switching units being directly connected to the first end of the first storage capacitor and the second end of the second capacitor, the control end of each of the plurality of switching units being directly connected to the second scan line, and the second end of each of the plurality of switching units being directly connected to the first end of the second storage capacitor and the second end of the first capacitor.