Patent ID: 8174480

Claim:
A gate driver, comprising: a shift register generating a shifted signal (S SR ); a level shifter generating a level signal (S LS ) according to a first operation voltage (V GH ), a second operation voltage (V EE ) and the shifted signal (S SR ); an output buffer providing a scan signal (S S ) according to the level signal (S LS ); and a processing unit controlling the level signal (S LS ) to follow the second operation voltage (V EE ) when the first operation voltage (V GH ) equals to a first preset value and the second operation voltage (V EE ) is higher than a second preset value, wherein the second preset value is less than the first preset value, wherein the processing unit comprises: a comparing module comparing the second operation voltage (V EE ) with the second preset value; and a switch module providing the second operation voltage (V EE ) to serve as the level signal (S LS ) according to the compared result.