Patent ID: 7178085

Claim:
An encoder performing encoding operations using LDPC (low density parity check) codes, comprising: a parity check matrix generator for generating a parity check matrix H; and a codeword generator for processing the parity check matrix H to generate a codeword, wherein the codeword generator comprises: an AB analyzer for analyzing the parity check matrix H into matrixes A and B; a pivoting unit for pivoting the parity check matrix H comprising matrixes A and B and for checking the pivoting result being 1; a bit-reversing unit for bit-reversing the pivoted matrix when the pivoting result is not 1; an LU analyzer for analyzing the matrix A into matrixes L and U when the pivoting result is 1; and a codeword generator unit for performing a logical operation on the matrixes A, B, L, and U to determine parity bits when the pivoting result is one, wherein a codeword is determinable based on the parity bits.