Patent ID: 8426982

Claim:
A chip package comprising: a die having a contact pad on a top side of said die, a single barrier metal layer being disposed on said contact pad; a substrate having a bottom side joining a top side of said die, wherein said substrate is over said die and across a left outer sidewall of said die and a right outer sidewall of said die, said substrate having an opening passing through said substrate; a metal bump on said substrate, a portion of said metal bump passing through said opening, said metal bump having a bottom end contacting said contact pad via said single barrier metal layer; and a molding material under a bottom side of said die, at left and right sides of said die and under said bottom side of said substrate, wherein said molding material has a left outer sidewall and a right outer sidewall substantially parallel with said left outer sidewall of said molding material, said left and right outer sidewalls of said molding material being directly adjacent and parallel to said left and right sides of said die, wherein said substrate has a left outer sidewall substantially aligned with said left outer sidewall of said molding material and a right outer sidewall substantially aligned with said right outer sidewall of said molding material, wherein said molding material comprises a first portion between said left outer sidewall of said molding material and said left side of said die, a second portion between said right outer sidewall of said molding material and said right side of said die, and a third portion vertically under said bottom side of said die and between said first and second portions, wherein said first, second and third portions continuously extend under said die.