Patent ID: 8460956

Claim:
A method for fabricating a thin film transistor substrate, comprising: (a) forming a gate electrode on a substrate using a first photoresist layer; (b) forming an insulating film, an active semiconductor layer, a doped semiconductor layer, an ohmic contact metal film, a passivation film, and a second photoresist layer on the substrate to cover the gate electrode; (c) disposing a multi-tone mask over the second photoresist layer, followed by performing a lithography process to form the second photoresist layer into a patterned photoresist, which has different thicknesses at a location corresponding in position to the gate electrode and on two opposite sides of the location; and (d) performing etching using the patterned photoresist so that a portion of each of the passivation film, the ohmic contact metal film, the doped semiconductor layer, the active semiconductor layer, and the insulating film, which is uncovered by the patterned photoresist, is etched until the substrate is exposed, so that a channel is formed to expose the active semiconductor layer at the location corresponding to the gate electrode, and so that two contact holes are formed on two opposite sides of the channel to expose parts of the ohmic contact metal layer that form drain and source electrodes.