Patent ID: 7587535

Claim:
A data transfer control device which includes an endian conversion circuit, the device further comprising: a transfer start address adjusting circuit; a write strobe signal generation circuit for generating a write strobe signal for indicating an effective byte of write data; and a bus interface, wherein the endian conversion circuit endian-converts the write data to which the write strobe signal generated in the write strobe signal generation circuit has been added, and outputs the result to the bus interface; when data is transferred to a device in a different endian format with a smaller data width than a transfer bus width, the transfer start address adjusting circuit aligns a transfer start address with the transfer bus width and outputs the result to the bus interface; and the bus interface burst-transfers with a smaller data width than the transfer bus width, the write data to which the write strobe signal output from the endian conversion circuit has been added, based on the transfer start address output from the transfer start address adjusting circuit.