Patent ID: 8028153

Claim:
A method of executing floating point instructions from an instruction set, wherein the instruction set defines a plurality of floating point instruction types respectively associated with a plurality of opcodes, wherein a first opcode among the plurality of opcodes is associated with a plurality of floating point operations, and wherein each floating point operation among the plurality of floating point operations is associated with a decode value among a plurality of decode values, the method comprising, in response to receiving a first floating point instruction: performing a primary decode of the first floating point instruction based upon an opcode associated therewith; and in response to determining that the opcode associated with the first floating point instruction matches the first opcode: retrieving a first floating point register identified by the first instruction from a floating point register file, wherein the first floating point register stores an exponent in an exponent portion thereof, a significand in a most significant subset of a significand portion thereof and a decode value in a least significant subset of the significand portion thereof; after retrieving the first floating point register, performing a supplemental decode of the first floating point instruction using the decode value stored in the first floating point register to identify a first floating point operation from among the plurality of floating point operations that is associated with the decode value stored in the first floating point register; and after performing the supplemental decode of the first floating point instruction, executing the first floating point instruction in a floating point execution unit by performing the first floating point operation using the exponent and significand stored in the first floating point register.