Patent ID: 7876617

Claim:
An apparatus for applying power to a semiconductor memory device, comprising: a first power pin for receiving a first power at a first voltage from an external device; a second power pin for receiving a second power at the first voltage from the external device; a memory array block connected to the first power pin, the memory array block configured to write input data in a data write operation, to output read data in a data read operation, and to undergo a refresh operation at regular intervals to sustain stored data; a peripheral logic block connected to the first power pin and configured to communicate with the memory array block to perform the data write operation and the data read operation; a data output driver connected to the second power pin and configured to drive a data output pin to output data from the memory array block through the peripheral logic block; and a switch to electrically connect the first power pin and the second power pin by performing a switching operation during the refresh operation.