Patent ID: 8161350

Claim:
A method, implemented in a coder device, of constructing an LDPC code parity check matrix, comprising the steps of: arranging each column of said parity check matrix to define a determined number of coded bits, including information bits and parity bits, and each row of said parity check matrix to define a parity equation, and arranging said parity check matrix to include at least two matrix rows, each element of a matrix row being a matrix, and each matrix row including: (i) at least one processing matrix and one connection matrix having only one “1” per column and one “1” per row, and (ii) a null matrix and a triangular matrix, wherein said at least one processing matrix and one connection matrix are arranged to form a block corresponding to the information bits, and said null matrix and said triangular matrix are arranged to form another block corresponding to the parity bits.