Patent ID: 8717370

Claim:
A computer-implemented method for automatically analyzing test results related to the operability of a plurality of registers disposed within a graphics processing unit (GPU), the method comprising: identifying within a first log file test results associated with a first register type under a first set of testing conditions; identifying within a second log file test results associated with the first register type under a second set of testing conditions; creating a template document associated with the first register type that includes a different spreadsheet for each log file of test results associated with the first register type, wherein the template document is configured to store and operate on the test results associated with the first register type; for each of the first log file and the second log file, populating a different spreadsheet of the template document with the test results associated with the first register type stored in the log file, wherein each spreadsheet includes an array for the test results, each array for each spreadsheet is structured the same, and each cell within an array indicates a passing result or a failing result for a different combination of a register value for the first register type and a data bit for a bus between the GPU and a local memory coupled to the GPU; aggregating the test results across each similarly positioned cell within each of the arrays of test results to show how many times each of the different register values for the first register type failed testing; and without human intervention, determining one or more suitable register values to use in operating the GPU from a passing range of register values based on the aggregated test results.