Patent ID: 7691681

Claim:
A method of making a flip chip lead frame package, comprising: providing a die paddle disposed at a first level and having an array of interconnect sites disposed in a central area of the die paddle, the array of interconnect sites formed as islands by patterned etching to have a height above the first level of the die paddle; disposing a plurality of leads at a second level on each side apart from the die paddle, the second level being different than the first level of the die paddle and substantially equal to the first level plus the height of the islands; disposing a semiconductor die having an active surface on the die paddle with the active surface facing the die paddle; electrically connecting the semiconductor die to the plurality of leads; and electrically connecting the semiconductor die to the array of interconnect sites on the die paddle with thermo-compression bonds, the thermo-compression bonds being formed by pressing bumps formed on the active surface of the semiconductor die against the array of interconnect sites on the die paddle and heating the bumps and interconnect sites to a temperature to form a metallurgical connection without melting the bumps, wherein the thermo-compression bonds provide heat transfer from the semiconductor die to the die paddle.