Patent ID: 7907458

Claim:
A non-volatile memory, comprising: a memory array of non-volatile storage units partitioned into an user array portion and a redundant array portion, the redundant array portion having redundant locations for storing data slated for any defective location in the user array portion as relocated data; a first group of data latches for latching data of the user array portion and a second group of data latches for latching data of the redundant array portion; a defect map buffer storing addresses of defective locations of the user array portion; a redundant data buffer for buffering relocated data from the data latches of the redundant array portion; and control circuits enabling transfer of data with said user portion data latches when a current address of the user array portion does not correspond to any address of defective locations and enabling transfer of data with said redundant data buffer when a current address of the user array portion corresponds to an address of a defective location.