Patent ID: 7863193

Claim:
A method of processing a substrate having a silicon-containing semiconductor channel and an overlying silicon-containing gate electrode separated from said channel by a thin gate dielectric layer, comprising: forming a pair of source-drain regions in said channel adjacent opposing edges of said gate electrode by ion implanting dopant impurities; depositing a metal-containing layer on top surfaces of said source-drain regions and of said gate electrode; depositing a compression cap layer on said metal-containing layer; performing a rapid thermal process step to heat said substrate sufficiently to form metal silicide contacts at the top surfaces of said source-drain regions and of said gate electrode; removing the remainder of said metal-containing layer; and scanning a focused line beam of radiation from an array of plural lasers across said substrate along a direction transverse to the focused line beam so as to create a surface temperature near the melting point of said substrate in a surface zone illuminated by the line beam.