Patent ID: 8575621

Claim:
A dual Field Effect Transistor (FET) comprising: a control switch formed on a substrate, the control switch including: a control drain terminal configured to receive power from a first power supply node and distribute the received power to a control drain finger, a control source terminal configured to couple a control source finger to a load, and a control gate terminal coupled through a control gate pad to a control gate finger disposed between the control drain finger and the control source finger, the control gate terminal configured to receive a control gate signal for switching current between the control drain finger and the control source finger; and a sync switch formed on the substrate, the sync switch including: a sync source terminal configured to receive power from a second power supply node and distribute the power to a sync source finger, a sync drain finger contiguous with the control source finger to form a single continuous ohmic finger, and a sync gate terminal coupled through a sync gate pad to a sync gate finger disposed between the sync drain finger and the sync source finger, the sync gate terminal configured to receive a sync gate signal for switching current between the sync drain finger and the sync source finger, the control gate pad and the sync gate pad disposed between the control drain finger and the sync source finger.