Patent ID: 7528441

Claim:
An insulated gate semiconductor device comprising: a semiconductor substrate of a first general conductivity type; a drain region comprising a semiconductor layer of the first general conductivity type disposed on the substrate; a channel layer of a second general conductivity type disposed on the semiconductor layer; trenches formed in the channel layer in a form of stripes extending in a direction parallel to the substrate; gate electrodes disposed in the trenches; source regions formed in the channel layer, each of the source regions being disposed next to a corresponding trench and extending in said direction; first back gate regions of the second general conductivity type formed in the channel layer, each of the first back gate regions being disposed under a corresponding source region; second back gate regions of the second general conductivity type, each of the second back gate regions being connected with a corresponding first back gate region and comprising a top surface of channel layer; a first electrode layer disposed on the source regions; and a second electrode layer disposed on the second back gate regions and physically separated from the first electrode layer.