Patent ID: 8372675

Claim:
A fabricating method of a microelectronic device, comprising the steps of: providing a substrate having a CMOS circuit region and a MEMS region; forming a semi-conductor element in the CMOS circuit region of the substrate; forming at least a first metallic layer, a plurality of first contact plugs and at least a first oxide layer on the substrate, the at least a first metallic layer and the at least a first oxide layer interlaced with each other, the first contact plugs formed in the at least a first oxide layer and connected with the at least a first metallic layer correspondingly; forming a first protective layer on a portion of the at least a first oxide layer within the MEMS region; forming a plurality of second metallic layers, a plurality of second contact plugs and a plurality of second oxide layers on the at least a first oxide layer and the first protective layer, the second metallic layers and the second oxide layers interlaced with each other, the second contact plugs formed in the second oxide layers and connected with the second metallic layers, portions of the second metallic layers, the second contact plugs and the second oxide layers located within the MEMS region composing a MEMS structure, and other portions of the second metallic layers, the second contact plugs and the second oxide layers located within the CMOS circuit region and portions of the at least a first metallic layer, the first contact plugs and the at least a first oxide layer located within the CMOS circuit region composing an interconnecting structure; forming a second protective layer on the interconnecting structure, thereby covering the interconnecting structure; and removing predetermined portions of the second oxide layers within the MEMS region and thereby making the MEMS structure partially suspended above the substrate to be a MEMS element.