Patent ID: 7544580

Claim:
A method for manufacturing passive components, comprising: providing a substrate, at least a connecting region, at least a capacitor region and at least an inductance region being defined in the substrate, the substrate comprising a first metal layer and an insulating layer on the first metal layer; performing a first patterning process on the insulating layer so as to remove the insulating layer positioned in the connecting region, the insulating layer positioned in the inductance region and a part of the insulating layer positioned in the capacitor region, and to retain a part of the insulating layer positioned in the capacitor region on the unpatterned first metal layer; performing a second patterning process on the first metal layer so as to form at least an outer connecting pad in the connecting region and to form a bottom electrode below the insulating layer positioned in the capacitor region after patterning the insulating layer; depositing a dielectric layer on the substrate in the capacitor region, the inductance region and the connecting region to cover the outer connecting pad; performing a third patterning process on the dielectric layer so as to form an inductance pattern opening in the inductance region, to form a top electrode opening in the capacitor region above the bottom electrode, and to retain a part of the dielectric layer covering the outer connecting pad; filling the inductance pattern opening and the top electrode opening of the remaining dielectric layer with a second metal layer so as to form an inductance structure and a top electrode in the remaining dielectric layer, the top electrode and the bottom electrode forming a capacitor structure; and performing a fourth patterning process on the remaining dielectric layer to expose the outer connecting pad.