Patent ID: 7691700

Claim:
A method of forming a semiconductor device, comprising: forming gate structures over at least two same type and at least one different type of PMOS or NMOS regions of a semiconductor body; patterning a first source/drain mask to mask off the at least two same type regions while leaving the at least one different type region exposed; performing a first implant through the first source/drain mask to form source and drain regions of a corresponding one p or n conductivity type associated with the gate structure in the at least one different type region; patterning a second source/drain mask to mask off the at least one different type region while leaving the at least two same type regions exposed; performing a second implant through the second source/drain mask to form source and drain regions of a corresponding other p or n conductivity type associated with the gate structures in the at least two same type regions; patterning a third source/drain mask to mask off the at least one different type region and at least one of the at least two same type regions while leaving at least one other of the at least two same type regions exposed; and performing a third implant through the third source/drain mask to provide additional doping of the corresponding other p or n conductivity type in the source and drain regions in the at least one other of the at least two same type regions; wherein the dose and energy of the third implant varies from the dose and energy of the second implant.