Patent ID: 8522218

Claim:
A process for managing cross-module inlining, the process utilizing a device which has at least one logical processor in operable communication with at least one memory, the process comprising the steps of: accessing routine service histories for a collection of routines, the service histories tracking changes to the routines over time as opposed to merely summarizing current information about the routines without historic information, the service history of a given routine showing a frequency and/or an extent of modification of that given routine; excluding from the collection each routine which, according to the routine's service history, has been modified more than a specified threshold; removing from the collection each routine which fails to satisfy a specified execution performance criterion; and automatically identifying as a candidate for cross-module inlining a particular routine which according to the routine's service history has been modified less than a specified threshold, without reliance on persistent summary information being maintained for every entry in a routine, namely, without register stack pressure persistent summary information denoting an estimate of register stack pressure in the routine and without data cache pressure persistent summary information denoting an estimate of data cache pressure in the routine.