Patent ID: 8920046

Claim:
A test adapter ( 1 ) for operatively connecting a chip to be tested to a test device, wherein the test adapter ( 1 ) comprises: a baseplate ( 8 ); a cover plate ( 2 ) spaced apart from the baseplate ( 8 ) with a contact array ( 3 ) having contact elements ( 9 ) coordinated with the chip to be tested in terms of number and arrangement; side walls ( 4 ) which are arranged between the baseplate ( 8 ) and the cover plate ( 12 ) that frame within a center the contact array ( 3 ) and comprise, in a manner arranged at an angle with respect to the cover plate ( 2 ), a number of individual connectors ( 5 ) that is coordinated with the chip to be tested; and wherein the contact elements ( 9 ) of the contact array ( 3 ) are connected to the individual connectors ( 5 ) by spatially curved lines to form a three-dimensional connection array within the sidewalls having multiple rows and multiple columns of the individual connectors ( 5 ) along each side wall ( 4 ) of the side walls ( 4 ).