Patent ID: 7342307

Claim:
A semiconductor device comprising: a first semiconductor chip and a second semiconductor chip each having a first MISFET and a second MISFET, respectively; a first lead, a second lead and a third lead electrically connected with the first semiconductor chip, said first, second and third leads including a first lead terminal, a second lead terminal and a third lead terminal, respectively; a fourth lead, a fifth lead and a sixth lead electrically connected with the second semiconductor chip, said fourth, fifth and sixth leads including a fourth lead terminal, a fifth lead terminal and a sixth lead terminal, respectively; and a package covering the first and second semiconductor chips, and parts of the first to sixth leads, said package having a first side surface and a second side surface opposite to the first side surface, wherein the first, second and sixth lead terminals protrude from the first side surface of the package, wherein the second lead terminal is positioned between the first and sixth lead terminals, wherein the third, fourth and fifth lead terminals protrude from the second side surface of the package, wherein the fifth lead terminal is positioned between the third and fourth lead terminals, wherein a distance between the second and sixth lead terminals is greater than that between the first and second lead terminals, and wherein a distance between the third and fifth lead terminals is greater than that between the fourth and fifth lead terminals.