Patent ID: 8456401

Claim:
A display device, comprising: an insulating substrate; and a transistor which is provided above the insulating substrate and includes a polycrystalline semiconductor layer, a gate insulating film, and a gate electrode, wherein: the gate electrode is formed above the polycrystalline semiconductor layer through the gate insulating film; the polycrystalline semiconductor layer includes a first region overlapping with the gate electrode in plan view, a second region, and a third region; the first region is sandwiched between the second region and the third region; the second region of the polycrystalline semiconductor layer includes a first impurity diffusion region and two second impurity diffusion regions which are opposite in conductivity type to the first impurity diffusion region; the first region and the first impurity diffusion region are in contact with each other at a first boundary; the first region and the two second impurity diffusion regions are in contact with each other at second boundaries; the two second impurity diffusion regions sandwiching the first impurity diffusion region are provided along the gate electrode; the first and the second boundaries extend along a first edge of the gate electrode; the third region of the polycrystalline semiconductor layer is of a same conductivity type as that of the first impurity diffusion region, the third region does not include a diffusion region which is of a same conductivity type as that of the second impurity diffusion regions; the third region and the first region are in contact with each other at a third boundary; the third boundary is extended along second edge of the gate electrode which is opposed to the first edge; the first boundary is sandwiched between the two second boundaries; the second boundaries are disposed at a respective outer side of the first boundary; the second impurity diffusion regions extend along the first region a distance greater than a distance the second impurity diffusion regions extend along the first impurity diffusion region; the second region forms a source region of the transistor; and the third region forms a drain region of the transistor.