Patent ID: 7835129

Claim:
A circuit arrangement for detecting the overtemperature of a semiconductor body, the circuit arrangement comprising: at least one field effect transistor including a load terminal; a parasitic diode integrated in the semiconductor body, the parasitic diode connecting the load terminal of the field effect transistor to a bulk terminal of the semiconductor body; an evaluating unit electrically connected to the parasitic diode via the bulk terminal at the semiconductor body, the evaluating unit configured to feed a current into the parasitic diode and evaluate a temperature-dependent voltage drop across the parasitic diode, the direction of the current fed into the diode being such that it is operated in the forward direction; wherein the evaluating unit comprises a short circuit device operable to temporarily short circuit the parasitic diode; wherein the voltage across a load path of the field effect transistor is monitored; and wherein the evaluating unit is configured to be deactivated when a further limit value is exceeded by the voltage across the load path of the field effect transistor.