Patent ID: 7374108

Claim:
A memory system connectable to a plurality of hosts, comprising: an interface for connection of the memory system to said hosts for the transfer of data and commands between the memory system and a host to which the system is connected; a memory section for storing said data, the memory section including: a plurality of memory groups, each of said memory groups comprising a plurality of non-volatile memory cells; write circuitry connectable to the memory cells to store data content therein; and a plurality of group tags, each of said group tags corresponding to one of said memory groups, each of said group tags indicating whether the memory cells of the corresponding memory group are write protected; a controller connected to the interface to receive the data and commands and to the memory section to write and manage the storage of the data therein; and registers connected to the controller to store information for the management of the memory section, said information including a parameter indicating a size of the memory groups, wherein any combination of the memory groups can be write protected and said group tags are settable in response to a command from the host to which the memory system is connected.