Patent ID: 8354751

Claim:
An interconnect structure comprising: a first interconnect level including a first dielectric material having at least one conductive feature embedded therein, said at least one conductive feature having a via gouging feature located therein; a patterned metallic capping layer located atop some, but not all, portions of the at least one conductive feature; a patterned dielectric capping layer located atop the patterned metallic capping layer and portions of the first dielectric material; a second interconnect level including a second dielectric material having at least one conductively filled line embedded in a porous dielectric material located atop and connected to an underlying conductively filled via embedded in a non-porous third dielectric material, wherein said first and second dielectric materials comprise the same porous low k dielectric, wherein the metallic capping layer extends onto a first diffusion barrier without extending onto the first dielectric material, wherein the first diffusion barrier lines at least one opening within the first dielectric material, and is affixed on an exposed wall portion of the first dielectric material, and wherein a lower portion of said conductively filled via located in proximity to the patterned dielectric capping layer includes a multi-layered liner comprising: a second diffusion barrier from a patterned surface of the second dielectric material outwards; a multi-material layer including a first material layer comprising residue from said patterned dielectric capping layer, and a second material layer comprising residue from said patterned metallic capping layer; and a hard mask comprising multilayered stacks of oxynitride; and a third diffusion barrier formed on all exposed surfaces of the one opening within the first dielectric material and on top of the hard mask comprising a multilayered stack with at least one layer of tantalum, at least one layer of ruthenium, and at least one layer of titanium.