Patent ID: 7605033

Claim:
A method of forming a memory device, comprising: forming a first opening in a dielectric material to expose an active area in a silicon substrate at a peripheral circuitry area, the dielectric material overlying a polysilicon plug over a source/drain region in the silicon substrate adjacent a gate stack in a memory cell array area; with the dielectric material overlying the polysilicon plug and said plug not exposed, chemical vapor depositing titanium over the dielectric material and into the first opening to form titanium silicide, over the silicon substrate; removing the titanium selective to the titanium silicide; forming a second opening in the dielectric material at the memory cell array area to expose the polysilicon plug; physical vapor depositing titanium over the dielectric material and into the first and second openings over the exposed polysilicon plug and the titanium silicide and sidewalls of the openings; depositing a metal nitride over the titanium; and depositing a conductive metal over the metal nitride and to fill the openings.