Patent ID: 7064377

Claim:
A programmable read-only memory cell, comprising: a source electrode; a drain electrode; a channel layer formed between the source electrode and the drain electrode; a floating gate isolated from the channel layer; and a selection gate isolated from the channel layer, wherein the selection gate and the floating gate are arranged on opposite sides of the channel layer, and wherein a first insulator layer is arranged between the floating gate and the channel layer and a second insulator layer is arranged between the selection gate and the channel layer; wherein the floating gate is arranged at least partly in a trench of a substrate, wherein the trench is formed between the source electrode and the drain electrode, and wherein the floating gate is electrically insulated from the substrate; and wherein a trench capacitor is formed in the substrate, an inner electrode of said trench capacitor being formed by the floating gate and an outer electrode of said capacitor being formed by a first diffusion region.