Patent ID: 6852012

Claim:
A method of processing a wafer, comprising: providing a wafer having initial thickness variations between two surfaces of said wafer; processing said wafer through a first cluster tool module, said first cluster tool module comprising apparatus for performing a grinding process and said processing therethrough includes said grinding process, the first cluster tool module defining a first clean room environment; processing said wafer through a second cluster tool module, said second cluster tool module comprising apparatus for performing a double side polish (DSP) process, and said processing therethrough includes said DSP process, the second cluster tool module defining a second clean room environment separate from the first clean room environment; processing said wafer through a third module, said third module comprising an apparatus for performing a finish polish process, and said processing therethrough includes said finish polish process; cleaning said wafer after said processing through said third module; and after the cleaning, inserting the wafer into a wafer processing chamber within a same facility as that containing said first, second and third modules, the processing chamber adapted for performing a circuit device formation process.