Patent ID: 7919828

Claim:
A structure for isolating areas in a semiconductor device comprising: a substrate comprising a pixel array region and a peripheral circuit region, said pixel array region comprising a plurality of image sensor pixels; an n-type structure formed in said substrate, said n-type structure comprising: an n-type region, said n-type region being sandwiched between a first p-type region of said substrate and a second p-type region of said substrate and said n-type region extending at least beneath said pixel array region; and ann-type sidewall implant extending to and in electrical communication with said n-type region only outside of said pixel array region; wherein said n-type structure defines a p-type area situated in said pixel array region which is isolated from said peripheral circuit region; and at least one p-type implant for contacting said p-type area situated between said n-type sidewall implant and said pixel array region.