Patent ID: 8729640

Claim:
A semiconductor device comprising: a substrate having, at a surface thereof, a region of a first conductivity type and a first substrate impurity concentration; a first well of the first conductivity type formed at the surface of the substrate, and having a first well contact region within the first well; a second well of a second conductivity type opposite the first conductivity type formed at the surface of the substrate; a first transistor having a drain region and a source region disposed within the first well; a buried layer of the first conductivity type extending beneath the first well and having a buried layer impurity concentration greater than the first substrate impurity concentration, said buried layer disposed beneath and separated from the source and drain regions, and having a depth that is shallower than that of the second well; and a conductive region disposed between the buried layer and the first well contact region, said conductive region laterally spaced and separated from the source and drain regions, and said conductive region providing a higher conductance between the buried layer and the first well contact region than otherwise provided in the absence of said conductive region.