Patent ID: 7317779

Claim:
A shift register having a plurality of stages each providing a gate line driving signal to a corresponding gate line of a display panel, the stages each comprising: a pull-up part to generate a current gate line driving signal having a first state in response to a first control signal and a clock signal; a pull-down part to generate the current gate line driving signal having a second state in response to a second control signal; a pull-up driver to generate the first control signal to control the pull-up part in response to an adjacent previous gate line driving signal provided from an adjacent previous stage, an adjacent following gate line driving signal provided from an adjacent following stage, and an input voltage signal externally provided; and a pull-down driver to generate the second control signal to control the pull-down part in response to the first control signal and the input voltage signal, the pull-down driver futher comprising an inverter to generate a third control signal in response to the input voltage signal and the first control signal from the pull-up driver, and a deterioration compensation part to generate the second control signal in response to the input voltage signal, the first control signal from the pull-up driver, and the third control signal from the inverter; wherein the second control signal swings between first and second voltage levels in association with the input voltage signal that swings between predetermined voltage levels and wherein the first voltage level is configured to exceed the threshold voltage level of the pull-down part that is increased due to deterioration thereof.