Patent ID: 7625787

Claim:
A method for fabricating a silicon (Si)-on-insulator (SOI) high voltage transistor device with a body ground, the method comprising: providing a SOI substrate with a buried oxide (BOX) layer and a Si top layer having a first thickness and a second thickness, greater than the first thickness; forming a body ground in the second thickness of Si top layer overlying the BOX layer; forming a control channel in the first thickness of the Si top layer; forming a control gate overlying the control channel; forming an auxiliary channel in the second thickness of Si top layer partially overlying the body ground and extending into the first thickness of the Si top layer; forming an auxiliary gate overlying the auxiliary channel; forming a source region in the first thickness of the Si top layer adjacent the control channel, and a drain region in the second thickness of Si top layer adjacent the auxiliary channel; and, forming a pn junction in the second thickness of Si top layer between the auxiliary channel and the body ground.