Patent ID: 8638156

Claim:
An amplifier circuit, comprising: an amplifier; a plurality of impedance selection transistors to electrically connect a plurality of impedances to an input of the amplifier in response to a plurality of driver output signals; and a plurality of switch drivers, each having an output to provide a respective one of the driver output signals to a respective one of the impedance selection transistors in response to a respective input signal, each switch driver including: a PMOS transistor connected to a resistor, the resistor connected to the switch driver output; and an NMOS transistor connected to the switch driver output, wherein a first output resistance of the switch driver when providing a first logic state of the driver output signal in response to a first logic state of the input signal is substantially equal to a resistance value of the resistor, a second output resistance of the switch driver when providing a second logic state of the driver output signal in response to a second logic state of the input signal is substantially equal to an on resistance of the NMOS transistor, and the first output resistance is greater than the second output resistance.