Patent ID: 8848121

Claim:
A display device comprising: a plurality of scanning signal lines; and a plurality of data signal lines, two of which are provided for each column of pixels containing a plurality of pixels arranged in a column-wise direction in which the data signal lines extend, a first data signal line of the two data signal lines being provided on a left side of each of the columns of the pixels, and a second data signal line of the two data signal lines being provided on a right side of each of the columns of the pixels, wherein in each of the columns of the pixels, a pixel electrode contained in one of two pixels adjacent to each other in the column-wise direction is connected to the first data signal line via a transistor, and a pixel electrode contained in another one of the two pixels adjacent to each other in the column-wise direction is connected to the second data signal line via another transistor, for a first, a second, and a third of the columns of the pixels arranged in sequence, the second data signal line provided to the first column of the pixels is adjacent to the first data signal line provided to the second column of the pixels, and the second data signal line provided to the second column of the pixels is adjacent to the first data signal line provided to the third column of the pixels, each pixel electrode contained in the second column of pixels being configured to generate: (i) a first parasitic capacitance with the second data signal line provided to the first column of the pixels, (ii) a second parasitic capacitance with the first data signal line provided to the second column of the pixels, (iii) a third parasitic capacitance with the second data signal line provided to the second column of the pixels, and (iv) a fourth parasitic capacitance with the first data signal line provided to the third column of the pixels, and a potential of the each pixel electrode changes due to the first and fourth parasitic capacitances in a direction in which a change in potential of the each pixel electrode due to the second and third parasitic capacitances is cancelled, and wherein each pixel electrode contained in the second column of the pixels overlaps the second data signal line provided to the first column of pixels and the first data signal line provided to the second column of the pixels, and overlaps the second data signal line provided to the second column of the pixels and the first data signal line provided to the third column of the pixels.