Patent ID: 6993106

Claim:
A phase locked loop comprising: a phase detector coupled to receive an input signal and a reference signal and to provide an output signal indicative of a difference between the input signal and the reference signal; a low pass filter defining a loop pole and coupled to receive the output signal from the phase detector and to provide a filtered detector output signal; a transconductance (gm) amplifier coupled to receive the filtered detector output signal from the low pass filter and to generate a conditioned signal output; a digital to analog converter coupled to receive the conditioned signal output from the gm amplifier and to provide an analog output signal; a second filter coupled to receive the analog output signal from the digital to analog converter and to filter the analog output signal; a voltage controlled oscillator coupled to receive the filtered analog output signal from the second filter and to provide an oscillator signal in response to the filtered analog output signal; and a feedback circuit coupled to receive the oscillator signal from the voltage controlled oscillator and to provide the reference signal based on the oscillator signal to the phase detector.