Patent ID: 6917060

Claim:
A vertical semiconductor device comprising: a first conductivity type base layer having resistance higher than that of a first conductivity type buffer layer; said first conductivity type buffer layer formed in one surface portion of said first conductivity type base layer; a second conductivity type drain layer selectively formed in a surface portion of said first conductivity type buffer layer; a second conductivity type base layer selectively formed in the other surface portion of said first conductivity type base layer; a first conductivity type source layer selectively formed in a surface portion of said second conductivity type base layer; a gate insulating film formed on said second conductivity type base layer between said first conductivity type source layer and said first conductivity type base layer; a gate electrode formed on said second conductivity type base layer via said gate insulating film; a drain electrode electrically connected to said second conductivity type drain layer; and a source electrode electrically connected to said first conductivity type source layer and said second conductivity type base layer, wherein said drain electrode is not electrically connected to said first conductivity type buffer layer.