Patent ID: 7056779

Claim:
A method for manufacturing a semiconductor power device comprising: introducing an impurity of a first conductivity type into a semiconductor substrate from one surface to form a first base layer, a concentration gradient of said first base layer continuously changing at any point in a thickness direction thereof; introducing an impurity of a second conductivity type into said first base layer to form a second base layer; introducing an impurity of said first conductivity type into said second base layer to form an emitter layer; forming a trench in said emitter layer, said trench having a depth that reaches through said second base layer to said first base layer; forming a gate electrode in said trench; forming a conductive layer on the resultant structure, then patterning said conductive layer to form a first main electrode continuously on said second base layer and said emitter layer; removing said first base layer from the other surface to provide a desired thickness of said first base layer; introducing an impurity of said second conductivity type into said other surface of said first base layer to form a collector layer; and forming a second main electrode on an exposed surface of said collector layer.