Patent ID: 8779514

Claim:
A transistor comprising: a substrate comprising at least a back gate of the transistor, an insulating layer and a semiconductor layer stacked sequentially, wherein the back gate of the transistor is used for adjusting the threshold voltage of the transistor; a gate stack formed on the semiconductor layer, wherein the gate stack comprises a gate dielectric and a gate electrode formed on the gate dielectric; a spacer formed on sidewalls of the gate stack; a source region and a drain region located on both sides of the gate stack, respectively; and a back gate contact formed on a portion of the back gate, wherein the back gate contact comprises a part raised from the surface of the back gate, and each of the source region and the drain region comprises a part raised from the surface of the semiconductor layer, and a height of the gate stack is lower than a height of the spacer, wherein the back gate contact is isolated from the source region and the drain region by a dummy gate.