Patent ID: 8735182

Claim:
A method for detecting embedded voids present in a structure formed in or on a semiconductor substrate, the method comprising: performing at least one processing step P 1 for forming the structure, wherein the structure comprises at least one recess formed in the substrate, and wherein the at least one processing step P 1 is a step of filling the at least one recess with material by electroplating, electroless plating, Metal-organic Chemical Vapor Deposition, Chemical Vapor Deposition, or Physical Vapor Deposition; measuring a mass M 1 of the substrate; performing a thermal treatment; measuring the mass M 2 of the substrate; calculating a mass difference between the mass of the substrate measured before and after the thermal treatment; and deducing the presence of embedded voids in the structure by comparing the mass difference with a pre-determined value, wherein the embedded voids are completely surrounded by material of the structure.