Patent ID: 8306175

Claim:
A clock and data recovery circuit comprising: a voltage controlled oscillator for generating an output clock according to a control voltage signal; a loop filter connected electrically to said voltage controlled oscillator for outputting the control voltage signal according to a current output; a charge pump unit connected electrically to said loop filter for outputting the current output according to an error signal; and a controller connected electrically to said voltage controlled oscillator for determining a run length corresponding to input data based on the output clock from said voltage controlled oscillator, said controller further controlling at least one of said voltage controlled oscillator, said loop filter and said charge pump unit according to the run length to dynamically adjust loop bandwidth; wherein said controller includes an inverse coder connected electrically to at least one of said voltage controlled oscillator and said charge pump unit for generating a control signal, which has a frequency proportional to that of the input data, based on the run length, said controller further controlling at least one of said voltage controlled oscillator and said charge pump unit based on the control signal.