Patent ID: 6979870

Claim:
A semiconductor integrated circuit having a CMOS logic gate including a first MOS transistor of a first conductivity type and a second MOS transistor of a second conductivity type, comprising: a first MOS transistor region in which the first MOS transistor is formed; and a 2ath MOS transistor region and a 2bth MOS transistor region, said second MOS transistor formed in both the 2ath MOS transistor region and the 2bth MOS transistor region, the 2ath MOS transistor region arranged to be in direct contact with a first side of said first MOS transistor region with no isolation region, and the 2bth MOS transistor region separately arranged to be in direct contact with a second side opposite to the first side of said first MOS transistor region with no isolation region, wherein the first side of a source region in said first MOS transistor region is in contact with one side of a source region in said 2ath MOS transistor region, the second side of the source region in said first MOS transistor region is in contact with one side of a source region in said 2bth MOS transistor region, the first side of a drain region in said first MOS transistor region is in contact with one side of a drain region in said 2ath MOS transistor region, the second side of the drain region in said first MOS transistor region is in contact with one side of a drain region in said 2bth MOS transistor region, and a gate electrode extends above said 2ath MOS transistor region, said first MOS transistor region, and said 2bth MOS transistor region through a gate oxide film.