Patent ID: 8677219

Claim:
A method for configuring a bit interleaver to LDPC codes and modulations comprising: calculating a bitwise capacity of non-uniform parallel AWGN channels; approximating said AWGN channels with a set of Q surrogate binary erasure channels with an erasure probability; determining whether a decoding threshold signal-to-noise ratio results in a lowest decoding threshold signal-to-noise ratio for a bit interleaver configuration using erasure probability density distributions; and configuring the bit interleaver based on the bit interleaver configuration corresponding to the determined lowest decoding threshold signal-to-noise ratio, wherein said determining further comprises: reducing the SNR by a predetermined step size when the erasure probability converges to zero; determining the erasure probability for the reduced SNR; determining whether the erasure probability of the reduced SNR converges to zero; and identifying the SNR prior to said reducing as the decoding threshold SNR for the bit interleaver configuration when the erasure probability does not converge to zero.