Patent ID: 7705677

Claim:
A CMOS amplifier circuit, comprising: a differential input circuit including differentially coupled first NMOS input transistor having first gate, drain, and source terminals and second NMOS input transistor having second gate, drain, and source terminals; a first voltage reference node; a current mirror circuit including a third PMOS load transistor having third gate, drain, and source terminals, a fourth PMOS load transistor having fourth gate, drain, and source terminals, the third and fourth gate terminals coupled to the first and third drain terminals, the third and fourth source terminals coupled to the first voltage reference node, the fourth drain terminal coupled to the second drain terminal; an output stage circuit including an amplifier circuit having a gain, the amplifier circuit coupled between the second drain terminal and a signal output; a first compensating capacitor coupled between the second drain terminal and the first gate terminal; and a second compensating capacitor coupled between the signal output and the second gate terminal.