Patent ID: 8396136

Claim:
A system comprising: a first device having a first transceiver and a first device electrode pair connected to the first transceiver; and a second device having a second transceiver and a second device electrode pair connected to the second transceiver, the second device electrode pair located relative to the first device electrode pair such that the first device electrode pair and the second device electrode pair form a capacitive network wherein the first transceiver and the second transceiver each comprise an encoder, a pulse transmitter, comprising a first amplifier and a second amplifier, connected to the encoder and the respective electrode pair, a pulse receiver connected to the respective electrode pair, a threshold detector connected to the pulse receiver, and a decoder connected to the threshold detector, wherein the first transceiver and second transceiver are each configured to receive a plurality of bits, encode each bit of the plurality of bits, and DC balance and transmit each of the plurality of encoded bits over the capacitive network.