Patent ID: 7973573

Claim:
A semiconductor integrated circuit comprising: a pair of input terminals; a first drive circuitry connected to said pair of terminals to convert a first voltage pulse signal, having a first reference potential and being inputted from said pair of input terminals, into a second voltage pulse signal having a second reference potential higher than the first reference potential to be thereby outputted; a second drive circuitry connected to a pair of outputs of said first drive circuitry to generate a third voltage pulse signal with a voltage swing based on a potential difference between the second reference potential and a ground potential to drive an external output load on the basis of the second voltage pulse signal being inputted from the pair of outputs of said first drive circuitry to be thereby outputted; and an output terminal being commonly connected to a pair of outputs of said second drive circuitry to output the third voltage pulse signal being outputted by said second drive circuitry to the external output load; a first power supply voltage terminal to which a first power supply voltage is to be applied; a second power supply voltage terminal to which a second power supply voltage being higher than the first power supply voltage is to be applied; a third power supply voltage terminal to which a third power supply voltage is to be applied, wherein said first drive circuitry is integrated with said second drive circuitry monolithically into a single semiconductor substrate, wherein the pair of outputs of said first drive circuitry are mutually DC-coupled with a pair of inputs of said second drive circuitry, respectively, wherein said second drive circuitry generates the third voltage pulse signal from the second power supply voltage being applied to said second drive circuitry through said second power supply voltage terminal based on the second voltage pulse signal, and wherein said semiconductor integrated circuit generates an input gate voltage level of said second drive circuitry by using the second power supply voltage and a fourth power supply voltage generated based on the second power supply voltage by an internal power supply circuit included in said first drive circuitry.