Patent ID: 7655529

Claim:
A method of integrating emitter-up and emitter-down Hetero-junction Bipolar Transistors (HBTs) comprising: forming an emitter-up HBT on a first location on a substrate; and forming an emitter-down HBT on a second location on the substrate, wherein the substrate is of equal thickness at the first location and the second location; wherein forming the emitter-up HBT comprises: forming an undoped collector layer over the substrate; forming a base layer over the undoped collector layer; and forming an emitter layer over the base layer; and wherein forming the emitter-down HBT comprises: implanting a first ion implant in the undoped collector layer to form an emitter; implanting a second ion implant in the undoped collector layer adjacent to the first ion implant for preventing parasitic current injection through an extrinsic base emitter junction area under forward bias; forming the base layer over the first and second ion implants; and forming the emitter layer over the base layer to provide a collector for the emitter-down HBT.