Patent ID: 7193327

Claim:
A semiconductor device comprising: a conductive layer; a dielectric layer over the conductive layer; an opening formed in the dielectric layer, the opening comprising a via and a trench, at least a portion of the via being over the conductive layer, the conductive layer having a recess under the via; a plurality of barrier layers formed over the dielectric layer in the opening; and a conductive plug formed over the barrier layers within the opening wherein a ratio of a first thickness of the barrier layers along a point approximately midway between a bottom of the trench and a top of the dielectric layer to a second thickness of the barrier layers along a bottom of the via is greater than about 1.0, wherein the plurality of barrier layers includes at least a first barrier layer and a second barrier layer, the first barrier layer formed on the dielectric layer and the second barrier layer formed on the first barrier layer along sidewalls of the opening and the bottom of the trench, at least the second barrier layer positioned along the bottom of the via.