Patent ID: 8010709

Claim:
A system comprising: a serial interconnection configuration of N memory devices of mixed type, N being an integer greater than one, each of the devices having serial input and output connections, the serial input and output connections of one device being coupled to the serial output connection of a previous device and the serial input connection of a next device, respectively, each of the devices including: a determiner configured to determine if a received device type (DT) corresponds to a reference DT assigned to the device, and to provide a determination result, and a device identifier producer configured to produce a device identifier (ID) in response to the determination result; and a controller configured to provide a serial input signal and a control signal to a first device of the serial interconnection configuration, the serial input signal containing ID information and the received DT, the serial input signal and the control signal being propagated with or without being altered through the N devices, a propagated input signal being inputted to one device and outputted therefrom as a serial output signal, the N-th device providing the propagated serial output signal and the propagated control signal to the controller.