Patent ID: 7116593

Claim:
A storage device, comprising: plural word lines; plural data lines that cross the plural word lines; plural control lines that cross the plural word lines and are provided so that each is paired with a corresponding one of the plural data lines; plural memory cells arranged at each intersection of the plural word lines and the plural data lines and including a storage element the resistance of which varies according to stored information and a first transistor; a precharge circuit for precharging the plural data lines and the plural control lines at first potential; a common data line; a first switching circuit for selecting one of the plural data lines and connecting it to the common data line; and a second switching circuit for selecting one of the plural control lines corresponding to a selected data line out of the plural data lines and driving it at second potential, such that one of the plural memory cells that exists at an intersection of a selected word line out of the plural word lines, a selected data line out of the plural data lines and a selected control line out of the plural control lines is selected thereby, wherein the storage element included in each of the plural memory cells is coupled between a corresponding one of the plural data lines and a corresponding one of the plural control lines.