Patent ID: 6847099

Claim:
A semiconductor package comprising: a leadframe comprising: a die pad defining opposed, generally planar top and bottom die pad surfaces and a peripheral edge; at least one tie bar connected to and extending from the peripheral edge of the die pad; a plurality of leads extending at least partially about the die pad in spaced relation to the peripheral edge thereof, the leads each including opposed, generally planar top and bottom lead surfaces, with at least two of the leads comprising corner leads which extend along opposed sides of the tie bar and each further define: an angularly offset distal portion extending along and in spaced relation to the tie bar, the distal portion having a top distal surface which extends in generally co-planar relation to the top lead surface and a bottom distal surface which is recessed relative to the bottom lead surface; a semiconductor die attached to the top die pad surface and electrically connected to at least one of the leads and at least one of the corner leads; and a package body at least partially encapsulating the leadframe and the semiconductor die such that the bottom lead surface of each of the leads and each of the corner leads is exposed within the package body.