Patent ID: 7719358

Claim:
A low frequency analog circuit, comprising: a resistance conversion stage, for receiving an input signal and transmitting the input signal from a high resistance to a low resistance, so as to form a resistance conversion signal; and an amplifying circuit, for receiving and amplifying the resistance conversion signal, wherein the amplifying circuit comprises at least one MOS transistor, highly related to cause high noise and high power consumption, operating at a weak inversion region, wherein the resistance conversion stage comprises: a first PMOS transistor, having a source electrode and a gate electrode receiving the input signal and a drain electrode coupled to a grounded voltage; a second PMOS transistor, having a source electrode coupled to a power source voltage, and a gate electrode for receiving a first bias voltage; and a third PMOS transistor, having a drain electrode coupled to the grounded voltage, and a gate electrode coupled to the source electrode of the first PMOS transistor, and a source electrode coupled to a drain electrode of the second PMOS transistor, and outputting the resistance conversion signal.