Patent ID: 6984864

Claim:
A semiconductor device comprising: (a) a MISFET formed in a semiconductor substrate, including: (a1) a gate portion comprising a first conductor formed in a trench in the semiconductor substrate; (a2) a source portion comprising a semiconductor region of a first conduction type in contact with a side wall of the gate portion; (a3) a drain portion comprising a semiconductor region of the first conduction type formed to a rear face of the semiconductor substrate; and (a4) a semiconductor region of a conduction type opposite to the first conduction type arranged between the source portion and the drain portion, and (b) a conductive portion formed above the semiconductor substrate and in contact with the source portion and the semiconductor region of the second conduction type, including: (b1) a second conductor; and (b2) a third conductor arranged between the second conductor and the semiconductor substrate, (c) wherein the contact resistance between the source portion and the conductive portion is higher than the contact resistance between the semiconductor region of the second conduction type and the conductive portion.