Patent ID: 7924205

Claim:
A successive approximation-type analog-to-digital converter, comprising: a sampling and holding circuit configured to sample and hold an analog input voltage; a digital-to-analog converter section configured to receive current digital data corresponding to a current search voltage range, and to output a plurality of comparison voltages based on the current digital data; a comparator section configured to perform parallel comparison in which the held analog input voltage is compared with each of the plurality of comparison voltages; a successive approximation register section configured to determine digital data for a next search voltage range within the current search voltage range based on a result of the parallel comparison using the current search voltage range, and to output the digital data as the current digital data to said digital-to-analog converter section such that the parallel comparison is successively performed; and a timing control circuit configured to generate a switching signal from the parallel comparison to a redundant comparison such that the redundant comparison is performed.