Patent ID: 8222083

Claim:
A method for fabricating a semiconductor package from a wafer comprising a first and second semiconductor chips formed thereon, comprising the steps of: forming a trench on a upper surface of the wafer along a cutting area interposed between the first and second semiconductor chips, each semiconductor chip having a bonding pad; forming a preliminary first redistribution pattern connecting the bonding pads of the first and second semiconductor chips over the trench; forming a preliminary second redistribution pattern for covering the preliminary first redistribution pattern formed over the trench; polishing a bottom surface of the wafer having the first and second semiconductor chips until the preliminary second redistribution pattern in the trench is exposed from the bottom surface of the first and second semiconductor chips; and forming first and second redistribution patterns by cutting the preliminary first and second redistribution patterns at the cutting area, wherein first and second semiconductor packages, each package comprising at least the respective one of first and second semiconductor chips having the first and second redistribution patterns, are formed.