Patent ID: 7171603

Claim:
A method for operating a transmitter that generates parity-check bits (p 0 , . . . , p m−1 ) based on a current symbol set s=(s 0 , . . . , s k−1 ), the method comprising the steps of: receiving the current symbol set s=(s 0 , . . . , s k−1 ); using a matrix H to determine the parity-check bits, wherein H comprises a non-deterministic section H 1 and a deterministic section H 2 , and wherein H 2 comprises a first part comprising a column h having an odd weight greater than 2, and a second part comprising matrix elements for row i, column j equal to 1 for i=j, 1 for i=j+1, 0 elsewhere; and transmitting the parity-check bits along with the current symbol set.