Patent ID: 8081718

Claim:
An apparatus comprising: a processor; and a memory having instructions stored thereon that, in response to being executed by the processor, the instructions cause the apparatus to set a current bit rate and a current fragmentation threshold for transmitting a current set of one or more frames based at least in part on: a measured signal quality of a set of one or more previously received acknowledgement frames corresponding to a set of one or more previously transmitted frames; and error correction activity corresponding to the set of one or more previously transmitted frames, wherein the set of one or more previously transmitted frames has a previous bit rate and a previous fragmentation threshold, wherein the current bit rate is set to a bit ru/cthn 1 is equal to the previous bit rate if: the measured signal quality of the set of one or more previously received acknowledgement frames is less than a low signal quality threshold, and errors corresponding to the error correction activity of the set of one or more previously transmitted frames are temporally uncorrelated; or the measured signal quality of acknowledgement frames in the set of one or more previously received acknowledgement frames increased during the transmission of the set of one or more previously transmitted frames, and an error rate based on the error correction activity of the set of one or more previously transmitted frames is greater than a low error rate threshold.