Patent ID: 8237224

Claim:
A semiconductor device containing a MOS transistor on a semiconductor substrate comprising: a gate insulation film formed on a surface of an active area in a surface of said semiconductor substrate, the active area having a first conduction type; a gate electrode formed on said gate insulation film and having sidewalls; a first sidewall film formed on each sidewall of the gate electrode; deep grade layers of a second conduction type formed in the surface of the active area at both sides of the gate electrode, each of the deep grade layers extending outwardly from a gate edge; a drain layer of said second conduction type formed in a surface of the deep grade layer, the drain layer being doped heavier compared with said deep grade layer, the drain layer extending outwardly from a first edge positioned away from said gate edge; and a shallow grade layer of said second conduction type formed in a portion of the surface of the deep grade layer from a middle point, which is located between the gate edge and the first edge and spaced laterally apart from the first sidewall film, to the first edge of the drain layer, the shallow grade layer being lightly doped compared with the drain layer, wherein the shallow grade layer increases a concentration of impurities of said second conduction type in the vicinity of the surface of said active area adjacent to the first edge of the drain layer compared with the concentration at the gate edge.