Patent ID: 7852253

Claim:
A quantization circuit comprising: an input node for an input signal; a comparator array coupled to the input node, wherein each comparator of the comparator array is coupled to the input node; a voltage divider arrangement coupled to the comparator array, the voltage divider arrangement having a plurality of threshold voltage reference nodes, each threshold voltage reference node being configured to establish a respective threshold voltage for each comparator of the comparator array, wherein a voltage potential difference between adjacent threshold reference nodes is substantially equal throughout the voltage divider, and wherein the comparator array generates a digital code based on the input signal and the respective threshold voltage for each comparator; and a control node coupled to the voltage divider arrangement, wherein the control node and the voltage divider arrangement are cooperatively configured to adjust the voltage potential difference between adjacent threshold voltage reference nodes by adjusting the threshold voltage for at least one comparator of the comparator array in response to a control signal at the control node.