Patent ID: 7994769

Claim:
A switching regulator which steps down or boosts an input voltage applied to an input terminal, and which outputs an output voltage stabilized to a predetermined target value via an output terminal, comprising: a plurality of switching transistors provided in parallel; an output circuit including an inductor, an output capacitor, and a rectifying device; a pulse modulator which generates a pulse signal with a duty ratio controlled such that the output voltage of the switching regulator approaches the predetermined target value; and a driver which distributes the pulse signal to the plurality of switching transistors, and which switches the plurality of switching transistors in a time divisional manner, wherein the driver comprises a divider configured to divide the pulse signal, and distributes a plurality of pulse signals thus divided to the plurality of switching transistors, and wherein the divider comprises: an first inverter configured to invert the pulse signal; a D flip-flop configured to receive the inverted pulse signal from the first inverter on its clock terminal, its inverting output terminal being connected to its input terminal; a NOR gate configured to generate a logical negative OR of the output of the first inverter and the output of the D flip-flop; a second inverter configured to invert the output of the first inverter; and an AND gate configured to generate an logical AND of the output of the second inverter and the output of the D flip-flop.