Patent ID: 8786008

Claim:
A nonvolatile semiconductor memory device, comprising: a first stacked body having a plurality of electrode layers and a plurality of first insulating layers which are stacked alternately; a memory film provided on a side wall of a first hole penetrating the first stacked body in a stacking direction of the first stacked body; a first channel body layer provided inside the memory film provided in the first hole; an interlayer insulating film provided on the first stacked body; a second stacked body having a select gate electrode layer provided on the interlayer insulating film, and a second insulating layer provided on the select gate electrode layer; a gate insulating film provided on a side wall of a second hole communicating with the first hole and penetrating the second stacked body and the interlayer insulating film in a stacking direction of the second stacked body; and a second channel body layer provided inside the gate insulating film in the second hole, and connected to the first channel body layer, a first pore diameter of the second hole at an upper end of the select gate electrode layer being smaller than a second pore diameter of the second hole at an lower end of the select gate electrode layer.