Patent ID: 8166362

Claim:
A method for detecting a control or communication fault on an analog to digital converter circuit during use of the analog to digital converter circuit in an input circuit, the analog to digital converter circuit receiving an input to generate an analog circuit output functionally dependent on the input of the analog to digital control circuit as determined by different cooperating analog circuit elements the analog to digital control circuit further receiving a control input selected from the group consisting of at least one of a global reference clock, a test signal, and control signals sent over a data transport system, the method comprising the steps of: digitally simulating the analog to digital converter circuit in a digitally simulated circuit by providing digital equivalents of the cooperating analog circuit elements to receive an input and the control input and generate using the digital equivalents of the analog to digital converter circuit elements, a digital circuit output functionally dependent on the input to the digitally simulated circuit and the control input; driving the digitally simulated circuit with-an input uninfluenced by an input to the analog to digital converter circuit; and comparing an output of the digitally simulated circuit with a reference output and setting an error condition in the event that the output of the digitally simulated circuit and the reference output differ, the error indicating a fault related to the control input; and responding to the error circuit to disable the analog to digital converter circuit output.