Patent ID: 8253208

Claim:
A structure comprising a primary field-effect transistor comprising: a channel zone of a semiconductor body; a pair of source/drain zones situated in the semiconductor body and laterally separated by the channel zone; a gate dielectric layer overlying the channel zone, having lower and upper gate dielectric surfaces, being of an average gate dielectric thickness, and comprising semiconductor material, oxygen, and nitrogen at a gate dielectric nitrogen concentration (i) which reaches a maximum concentration of 2×10 21 -6×10 21 atoms/cm 3 along a maximum-nitrogen-concentration location in the gate dielectric layer when the normalized depth into the gate dielectric layer is at a normalized maximum-nitrogen-concentration depth value of no more than 0.2 and (ii) which drops to 1×10 20 atoms/cm 3 when the normalized depth is at a higher value of up to 0.9, the normalized depth being the actual depth below the upper gate dielectric surface divided by the average gate dielectric thickness; and a gate electrode overlying the gate dielectric layer above the channel zone.