Patent ID: 7173629

Claim:
An image processor comprising: a storage circuit storing therein image data; a data input/output circuit controlling input/output of the image data; an access control circuit controlling access of writing in and reading out the image data to and from said storage circuit; a refresh circuit controlling refreshing of said storage circuit; and a memory control circuit comprising an address generation circuit generating an address in said storage circuit to and from which the image data is written in and read out, said memory control circuit comprising a window adjustment circuit which sets up an additional window adjacent to a window in which the image data are actually stored in a memory space of said storage circuit and storing therein additional data other than the image data, which adjusts the address generated by said address generation circuit, and which reads out the image data from said storage circuit, including the additional data in the additional window, in response to the address and a read control signal supplied to said storage circuit, wherein the additional data are written in with an address of the additional window.