Patent ID: 7237217

Claim:
An integrated circuit (IC) comprising: a clock distribution grid distributing a clock to local circuits, said distribution grid having a known load capacitance; a clock driver driving said clock distribution grid; at least one inductor connected at one end to said distribution grid, said clock having a frequency within a frequency range of a resonant frequency of local grid capacitance and said at least one connected inductor, wherein said clock driver is driving a first clock phase, said one end of said at least one inductor being connected to said first clock phase; a second clock phase, said at least one inductor being connected to said second clock phase at an other end, said local grid capacitance comprising local wiring capacitance from both of said first clock phase and said second clock phase; and a power grid, power grid lines being discontinuous in the vicinity of each said at least one inductor, whereby power grid line loops are open in the vicinity of each said at least one inductor.