Patent ID: 6909762

Claim:
A phase-locked loop circuit comprising: a voltage-controlled oscillator providing a voltage-controlled oscillator output signal; a loop filter providing a phase-locked loop circuit output signal which is fed back to provide a voltage-controlled oscillator input signal; a phase detector responsive to a reference input signal and the voltage-controlled oscillator output signal and providing an input signal to the loop filter; and a lock detector responsive to the voltage-controlled oscillator output signal, the reference input signal and a data present signal for producing a control signal to control a transition between a phase-locked mode and a frequency-locked mode for the phase-locked loop circuit, the lock detector comparing the reference input signal and the voltage-controlled oscillator output signal to determine if a frequency differential between the reference input signal and the voltage-controlled oscillator output signal is within an adjustable predetermined threshold, the control signal: maintaining the phase-locked mode if the data present signal is indicative of data being present and the frequency differential is within the adjustable predetermined threshold; and maintaining the frequency locked mode if the data present signal is indicative of data not being present or if the frequency differential is not within the adjustable predetermined threshold.