Patent ID: 7514939

Claim:
A circuit arrangement comprising: a potentiometer (PT 1 ), which is provided with a first terminal (A 1 ), a second terminal (A 2 ) and an intermediate tap (ZA), a resistance value between the first terminal (A 1 ) and the second terminal (A 2 ) being independent of a position of the potentiometer (PT 1 ); and a microprocessor (MC) having a first microprocessor terminal (M 1 ), a second microprocessor terminal (M 2 ) and a third microprocessor terminal (M 3 ), wherein the first microprocessor terminal (M 1 ) and the second microprocessor terminal (M 2 ) are configured for outputting a first drive voltage (GND) and at least one second drive voltage (VS) differing from the first drive voltage (GND) respectively to the first terminal (A 1 ) and said second terminal (A 2 ), and the third microprocessor terminal (M 3 ) is configured for measuring an analog voltage present at the intermediate tap (ZA), wherein a) the first terminal (A 1 ) of the potentiometer (PT 1 ) is connected to the first microprocessor terminal (M 1 ) of the microprocessor (MC), b) the second terminal (A 2 ) of the potentiometer (PT 1 ) is connected to the second microprocessor terminal (M 2 ) of the microprocessor (MC), and c) the intermediate tap (ZA) of the potentiometer (PT 1 ) is connected to the third microprocessor terminal (M 3 ) of the microprocessor (MC) wherein the microprocessor is adapted to: supply the first drive voltage (GND) to the first terminal (A 1 ) of the potentiometer (PT 1 ); supply the second drive voltage (VS) to the second terminal (A 2 ) of the potentiometer (PT 1 ); measure and store a first analog measurement voltage at the intermediate tap (ZA); supply the second drive voltage (VS) to the first terminal (A 1 ) of the potentiometer (PT 1 ); supply the first drive voltage (GND) to the second terminal (A 2 ) of the potentiometer (PT 1 ); measure and store a second analog measurement voltage at the intermediate tap (ZA); and evaluate the first and second analog measurement voltages to determine the operability or the position of the potentiometer (PT 1 ).