Patent ID: 7435620

Claim:
A method of fabricating a semiconductor device comprising: forming at least one via in a semiconductor substrate comprising at least one semiconductor die, the at least one via extending substantially perpendicular to a back surface of the semiconductor substrate and exposing a bottom portion of a bond pad located on an active surface of the substrate; depositing a dielectric layer over the back surface, an inner region of the at least one via, and the bottom portion of the bond pad; exposing a portion of the bond pad through the dielectric layer; depositing a conductive material within the at least one via; forming at least one redistribution line in electrical communication with the conductive material on at least a portion of the dielectric layer and on the conductive material; and depositing another dielectric layer over the at least one redistribution line and exposed portions of the dielectric layer; exposing at least one portion of the at least one redistribution line through the another dielectric layer; and wherein depositing each of the dielectric layer, the another dielectric layer, and the conductive material and forming the at least one redistribution line is effected below a temperature sufficient to cause operational or physical damage to the semiconductor device.