Patent ID: 8230308

Claim:
A decoding apparatus, comprising: at least one memory; an add-compare-select (ACS) unit that executes an add-compare-select operation on encoded received data; an error detector that detects whether there is an error in decoded data calculated based on the executed add-compare-select operation, the ACS unit configured to, if an error is detected in the decoded data calculated based on the executed add-compare-select operation, additionally execute the add-compare-select operation on the received data using information about the executed add-compare-select operation, and the error detector configured to detect whether there is an error in the decoded data based on an error detecting code contained in the decoded data; a decoding controller that determines whether the ACS unit additionally executes the add-compare-select operation on the received data based on a detection result of the error detector; and a data comparator that compares first decoded data calculated based on the previously executed add-compare-select operation with second decoded data calculated based on the additionally executed add-compare-select operation to determine whether the first decoded data and the second decoded data match, wherein if the error detector detects an error of the second decoded data and the data comparator determines that the first decoded data and the second decoded data match, the decoding controller decides to end decoding of the received data.