Patent ID: 7035780

Claim:
A method for routing a plurality of critical conductors in an integrated circuit design, the method comprising the operations of: identifying a plurality of logic signals which are to be communicated by the critical conductors; prioritizing the plurality of critical conductors by ranking the critical conductors in order of the importance of the critical conductors relative to each other, the importance being with respect to the needs of the critical conductors to be protected from inductive coupling or capacitive coupling from at least one adjacent conductor; providing a plurality of preferred tracks, each track being configured to be located adjacent to at least one constant voltage conductor; prioritizing the plurality of preferred tracks by ranking the preferred tracks in order of which preferred track is immediately adjacent to the most constant voltage conductors; and routing the critical conductors into the preferred tracks according to the rankings of both the critical conductors and the preferred tracks starting with the critical conductor having the highest critical conductor rank being first routed into the preferred track having the highest preferred track rank.