Patent ID: 6933751

Claim:
A monolithic integrated circuit comprising a plurality of logic gates, a single logic gate comprising: a P-type well formed in an N-type region, the P-type well forming a base of an NPN bipolar transistor; an N+ region formed in the P-type well forming an emitter of the bipolar transistor; the N-type region forming a collector of the transistor in common with the cathodes of two or more Schottky diodes; nodes of the logic gate being adapted for coupling to nodes of other similar logic gates, the nodes of the logic gate comprising an input node coupled to the base and comprising output nodes coupled to respective anodes of the two or more Schottky diodes, wherein the two or more Schottky diodes comprise one or more output Schottky diodes and at least one clamping Schottky diode, the at least one clamping Schottky diode being coupled between the collector and base of the transistor; and a resistor in series with the at least one clamping Schottky diode, wherein an anode metal of all the Schottky diodes comprises titanium or titanium silicide.