Patent ID: 8635394

Claim:
A method comprising: addressing data on a memory device comprising a volatile memory device and a non-volatile memory device, and controlling at least a flow of the data to and from at least a selected one of the volatile memory device and the non-volatile memory device through an interface common to both the volatile memory device and the non-volatile memory of the memory device, wherein the selected one of the volatile memory device and the non-volatile memory device is selected based on at least a chip select signal provided with one or more signal lines of said common interface; transferring data to and from the selected memory device through a data bus of said common interface; and transferring via the common interface at least one command to the selected one of the volatile memory device and the non-volatile memory device of the memory device, wherein the at least one command transferred via the common interface is adjusted for a particular use dependent on whether the selected memory device is said volatile memory device or said non-volatile memory device, and wherein if said selected memory device is said volatile memory device said at least one command to said volatile memory device is adjusted for a first use to precharge an address area of said volatile memory device identified with said at least one command for implementing said at least one command, and where if said selected memory device is said non-volatile memory device said at least one command to said non-volatile memory device is adjusted for a second use different from said first use to implement said at least one command in an address area of said non-volatile memory device identified with said at least one command.