Patent ID: 7447230

Claim:
A system for protocol processing engine, which is arranged between a host side and a media access control (MAC) layer to thus speed up data transmission, the system comprising: a host interface, which interfaces with the host side; a network media access control (MAC) interface, which interfaces with the MAC layer; a receiving subsystem, which is coupled between the host interface and the network MAC interface such that a network connection received by the network MAC interface is classified into a priority connection, fast connection or slow connection based on a pre-stored information and a hardware circuit corresponding to the connection classified is activated to speed up data transmission of the connection, and comprises: a DRAM, which stores packets to be processed and a connection information table (CIT); a cache SRAM, which stores an information of priority connections; a receiving controller, which is coupled to the network MAC interface in order to receive the network connection transmitted by the network MAC interface; a content addressable memory (CAM), which provides the information of the priority connections in the cache SRAM for fast searching; and a scorekeeper, which is coupled to the receiving controller and the CAM in order to handle accesses and associated use situations of the CAM; wherein the receiving controller defines destination and source's IP addresses and TCP ports, which is extracted from a header of a packet receiving the network connection, as a connection identification (CID) and accordingly searches the CAM through the scorekeeper, thereby determining if the network connection is a priority connection; and a transmitting subsystem, which is coupled between the host interface and the network MAC interface in order to transmit a host connection received by the host interface to the network MAC interface.