Patent ID: 7557442

Claim:
A power semiconductor arrangement comprising an electrically insulating and thermally conductive substrate, which is provided with a structured metallization on at least one side, a cooling device which is in thermal contact with the other side of the substrate, at least one semiconductor component which is arranged on the substrate and which is electrically connected to the structured metallization and has first protective metallization on its side facing away from the cooling device, an entirely or partially electrically insulating film which is arranged at least on that side of the substrate at which the at least one semiconductor component is placed, and which is laminated without any cavities onto the substrate including the at least one semiconductor component, and a contact-pressure device which exerts a force on the substrate locally and via the at least one semiconductor component such that the substrate is pressed against the cooling device, wherein the film extends over the at least one semiconductor component and the contact-pressure device exerts a force on the substrate via the film and the at least one semiconductor component and wherein the contact-pressure device has an elastic element which produces the force for pressing against the substrate and a rigid element arranged between the elastic element and the at least one semiconductor component.