Patent ID: 8181063

Claim:
A computer device that includes a plurality of processor boards each provided with a processor, a memory, and a chipset, comprising: a first processor board that makes erroneous data in a cache of said processor of said first processor board in operation invalid, said erroneous data having become erroneous as a result of an uncorrectable failure which occurs when reading out data from said memory on said first processor board, stores valid data in said cache and information representing an internal state of said processor on said first processor board in said memory on said first processor board, copies all data in said memory on said first processor board, onto said memory on a second processor board, and switches from said first processor board to said second processor board for replacement; and said second processor board that fetches said information representing said internal state of said processor on said first processor board from said memory on said second processor board, copies said information onto said processor on said second processor board, and re-executes an instruction that was being executed in said first processor board when said failure occurred with said data read from said memory on said second processor board.