Patent ID: 7206222

Claim:
A thin-film magnetic memory device for executing a page mode operation with a unit operation cycle including a row cycle for receiving input of a row address and a plurality of subsequent column cycles for receiving input of a column address in each of said column cycles, comprising: a plurality of memory cells arranged in rows and columns, each of said memory cells including a magnetic memory portion having an electric resistance varying in accordance with a magnetization direction rewritable in response to application of a predetermined data write magnetic field produced by first and second data write currents; a plurality of data write select lines provided corresponding to memory cell rows, respectively, and being selectively activated to pass said first data write current; a plurality of data read select lines provided corresponding to said memory cell rows each for selecting corresponding at least one memory cell row; a plurality of data lines provided corresponding to memory cell columns, respectively; a row select portion for controlling activation of said plurality of data write select lines and said plurality of said data read select lines in accordance with results of a row selection based on said row address, said row select portion activating at least one of said data read select lines corresponding to at least one selected row in said row cycle, and activating at least one of said data write select lines corresponding to said at least one selected row in each of the column cycles including instruction of a data write operation; a read/write control circuit for accessing memory cells data via the data lines of at least M (M is integer larger than one) in number among said plurality of data lines in said row cycle, and supplying said second data write current to the data line corresponding to the received column address in each of the column cycles including instruction of said data write operation; and a control circuit for instructing output of one of the M memory cells data corresponding the received column address in each of said column cycles including instruction of a data read operation.