Patent ID: 7053431

Claim:
A phase-change memory device comprising: memory cells including phase-change layers formed on a semiconductor substrate, the phase-change layer showing an amorphous-crystalline phase change; a memory cell array which has the memory cells arranged in a matrix, the phase change layer including first regions which contact the semiconductor substrate in units of memory cells and a second region which connects the first regions arranged in a same column; a first electrode layer formed on the second region of each phase-change layer, a contact area of each first region and the semiconductor substrate being smaller than a contact area of the second region and the first electrode layer, the first regions and the second region being formed of a material which shows a phase change between an amorphous phase and a crystalline phase; a word line which connects the memory cells arranged in a same row; and a bit line electrically connected to the first electrode layer, the bit line connecting in common the phase-change layers of the memory cells arranged in the same column.