Patent ID: 7663176

Claim:
A semiconductor device comprising: a first MISFET including: a first gate insulative film formed over a first region of a semiconductor substrate; and a first gate electrode formed over the first insulative film; a second MISFET including: a second gate insulative film formed over a second region of the semiconductor substrate; and a second gate electrode formed over the second insulative film; and a non-volatile memory cell including: a third gate insulative film formed over a third region of the semiconductor substrate; a control gate electrode formed over the third insulative film; a fourth gate insulative film having a charge accumulation layer and formed over the third region and one side wall of the control gate electrode; and a memory gate electrode formed over the fourth insulative film; wherein the thickness of the first gate insulative film is smaller than that of the second gate insulative film, and wherein the first and third insulative films have a same thickness.