Patent ID: 8912776

Claim:
A control circuit of a DC/DC converter, wherein the DC/DC converter further comprises a high-side switch and a low-side switch, and wherein the DC/DC converter provides an output signal to a load, the control circuit comprising: an amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is configured to receive a feedback signal indicative of the output signal, and the second input terminal is configured to receive a reference signal, wherein based on feedback signal and the error signal, the amplifier generates an error signal at the output terminal; a ramp generator configured to provide a ramp signal; a comparator having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the ramp generator to receive the ramp signal, and the second input terminal is coupled to the amplifier to receive the error signal, and wherein based on the ramp signal and the error signal, the comparator generates a comparison signal at the output terminal; a COT generator having an input terminal and an output terminal, wherein the input terminal is coupled to the output of the comparator to receive the comparison signal, and wherein based on the comparison signal, the COT generator provides a COT signal at the output terminal to control the high-side switch and the low-side switch, and wherein the COT generator having a timer with a first input terminal, a second input terminal, a third input terminal and an output terminal, wherein the first input terminal is configured to receive an input signal of the DC/DC converter, the second input terminal is configured to receive the output signal of the DC/DC converter, and the third input terminal is configured to receive the COT signal, wherein based on the COT signal, the input signal and the output signal of the DC/DC converter, the timer generates a timing signal at the output terminal; and a first logic circuit having a first input terminal coupled to the timer to receive the timing signal, a second input terminal coupled to the comparator to receive the comparison signal, wherein based on the timing signal and the comparison signal, the first logic circuit provides the COT signal at the output terminal.