Patent ID: 8400823

Claim:
A memory unit comprising: a giant magnetoresistance cell electrically coupled between a write bit line and a write source line, a write current passing through the giant magnetoresistance cell switches the giant magnetoresistance cell between a high resistance state and a low resistance state, the giant magnetoresistance cell comprises a free magnetic layer separated from a first pinned magnetic layer by a first non-magnetic electrically conducting layer; and a magnetic tunnel junction data cell electrically coupled between a read bit line and a read source line, the magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by magnetostatic coupling with the giant magnetoresistance cell, and be read by a read current passing though the magnetic tunnel junction data cell, the magnetic tunnel junction data cell comprises the free magnetic layer separated from a second pinned magnetic layer by an oxide barrier layer, wherein the free magnetic layer of the magnetic tunnel junction data cell is coextensive with the free magnetic layer of the giant magnetoresistance cell and the pinned magnetic layer of the magnetic tunnel junction data cell is not adjacent to the pinned magnetic layer of the giant magnetoresistance cell.