Patent ID: 8298899

Claim:
A method of fabricating a semiconductor device, the method comprising: forming a sacrificial film and an active layer in sequence on a substrate; successively patterning the active layer, the sacrificial film, and the substrate to form a sacrificial pattern and an active pattern stacked in sequence, and a trench; forming a field isolation film to fill the trench; partially recessing the field isolation film to partially expose the sacrificial pattern; removing the sacrificial pattern by isotropically etching to form an empty region; forming a dielectric film to fill the empty region; forming an embedded pattern to fill the recess region on the dielectric film formed on the bottom and sidewall of the recess region of the field isolation film; forming a gate insulation film and a gate electrode to be stacked in sequence on the active pattern; and forming a pair of impurity layers to locate in the active pattern at both sides of the gate electrode, respectively, the bottoms of the impurity layers contacting with the dielectric film, wherein a channel region between the impurity layers is a data storage field.