Patent ID: 8826051

Claim:
A method for dynamically managing power in a system comprising a processor and non-volatile memory (“NVM”), the method comprising: detecting that the system is communicating with an external power charging device during a handshaking phase such that the system receives power from the external power charging device, wherein the received power has a pre-determined power level; dynamically allocating a power budget to each of the processor and the NVM such that the processor and the NVM collectively operate without exceeding the pre-determined power level, wherein dynamically allocating the power budget further comprises: detecting whether a request to access the NVM has been issued from the processor; in response to detecting that a request to access the NVM has been issued from the processor, allocating a lower power budget to the processor as compared to the NVM; allocating a first power budget to the processor prior to detecting that the request to access the NVM has been issued; upon detecting that the request to access the NVM has been issued, allocating a second power budget to the processor, wherein the second power budget is lower than the first power budget; and stalling the processor to limit power consumption by the processor so that it does not exceed the second power budget; determining if the received power is above the pre-determined power level; and removing the respective power budget allocated to each of the processor and the NVM if the received power is above the pre-determined power level.