Patent ID: 7217591

Claim:
A method for providing electrostatic discharge protection during fabrication processing of photodiode array panels comprising the steps of: depositing first trace and pad features in a first metal layer on a glass substrate; etching to define the trace and pad contours; depositing a first dielectric layer over the first metal layer; etching the first dielectric layer to provides first vias through the dielectric layer; depositing a second metal layer contacting the first metal layer through the first vias providing a shorting bar for contact between the traces during further handling and processing for ESD protection; depositing a second dielectric layer; creating a second via surrounding the shorting bar during normal processing for connection of a third metal layer to the second metal layer; depositing the third metal layer; masking the third metal for etching; removing the photoresist around the shorting bar; and, etching the third metal layer and the shorting bar.