Patent ID: 8289059

Claim:
A duty-cycle corrector, comprising: a phase detector configured in a first mode to receive a first output signal and a first feedback signal and provide a first control signal based, at least in part, on a phase difference between the first output signal and the first feedback signal, wherein the phase detector is further configured in a second mode to receive a second output signal and a second feedback signal and provide a second control signal based, at least in part, on a phase difference between the second output signal and the second feedback signal; a delay element coupled to the phase detector, wherein the delay element is configured to delay an input signal to generate at least one of the first or second feedback signal, wherein the delay element is configured to receive the first control signal and provide a delay based, at least in part, on the first control signal; and a signal driver coupled to the delay element and the phase detector, wherein the signal driver is configured to receive a differential input signal and generate the input signal, wherein the input signal is a single-ended input signal, wherein the signal driver is further configured to receive the second control signal and generate the single-ended input signal based, at least in part, on the second control signal.