Patent ID: 7481885

Claim:
A semiconductor device manufacturing apparatus comprising: a wafer testing part which detects characteristics of individual chips of a wafer to be tested and determines a drawing pattern for trimming the chips based on the detected data; a storage part which stores information of said wafer to be tested; and a drawing pattern printing part which forms a desired drawing pattern on the chips of said wafer through a printing operation based on information of the drawing pattern from said wafer testing part and the information of the wafer from said storage part, wherein said drawing pattern printing part includes a print head which ejects at least a conductive solvent, an insulative solvent, and an interface treatment solution, a chip coordinate recognition part which obtains coordinate information of the chips using image recognition of said wafer, and a control part which controls the drawing operation of said print head on said wafer based on the information of the drawing pattern from said wafer testing part, the information on the wafer from said storage part, and the coordinate information from said chip coordinate recognition part.