Patent ID: 8471625

Claim:
A beta enhancement circuit comprising: a first voltage supply terminal for connection to a power supply; a second voltage supply terminal for connection to ground potential; a first stage; a second stage; and a third stage; wherein the first stage comprises a first current source connected to the first voltage supply terminal, a first transistor connected between the first current source and the second voltage supply terminal, and a resistor connected between a control terminal of the first transistor and the second voltage supply terminal, wherein the second stage comprises a second current source connected to a third voltage supply terminal, and a second transistor cascade connected to the first transistor, the second transistor having a first terminal connected to the second current source and a second terminal connected to a fourth voltage supply terminal, wherein the third stage comprises a third current source connected to the third voltage supply terminal, and a third transistor connected between the third current source and the second voltage supply terminal, wherein a control terminal of the third transistor is connected to the first terminal of the second transistor, and wherein a reference voltage is based at least on an output voltage provided as a voltage potential at an electrical connection between i) the first current source, and ii) the first transistor referenced to the second voltage supply terminal.