Patent ID: 8890239

Claim:
A vertical semiconductor device including a GaN-based stacked layer having an opening, the GaN-based stacked layer including n-type GaN-based drift layer/p-type GaN-based barrier layer/n-type GaN-based contact layer in that order to a top layer side of the semiconductor device, the opening extending from a top layer and reaching the n-type GaN-based drift layer, the semiconductor device comprising: a regrown layer located so as to cover the opening, the regrown layer including an electron drift layer and an electron supply layer; a source electrode located around the opening so as to be in contact with the n-type GaN-based contact layer, the regrown layer, and the p-type GaN-based barrier layer; a drain electrode located so as to have the center corresponding to the center of the opening, the drain electrode and the source electrode sandwiching the GaN-based stacked layer; and a gate electrode located on the regrown layer, wherein, assuming that the source electrode serving as one electrode, the drain electrode serving as the other electrode, and a dielectric material disposed therebetween constitute a capacitor, the semiconductor device includes a capacitance-decreasing structure that decreases a capacitance of the capacitor, wherein, in the capacitance-decreasing structure, the GaN-based stacked layer is formed on a conductive GaN-based substrate; the drain electrode is located on the conductive GaN-based substrate; the source electrode and the conductive GaN-based substrate overlap each other when viewed in plan; the n-type GaN-based drift layer is disposed only in a region that includes a bottom portion of the opening; and a region around the n-type GaN-based drift layer is filled with a low dielectric constant material having a dielectric constant lower than that of the n-type GaN-based drift layer.