Patent ID: 7968947

Claim:
A semiconductor device, comprising: an N-type region and a P-type region formed within a semiconductor substrate such that the N-type region and the P-type region are isolated by an isolation region; a line electrode formed over the N-type region, the isolation region, and the P-type region; a PMOS transistor comprising a first gate electrode constituted by the line electrode over the N-type region and a gate insulating film formed between the first gate electrode and the semiconductor substrate; and an NMOS transistor comprising a second gate electrode constituted by the line electrode over the P-type region and a gate insulating film formed between the second gate electrode and the semiconductor substrate, wherein the gate insulating film comprises at least a Hf-containing high-dielectric insulating film which contacts with the first gate electrode and the second gate electrode, the line electrode comprises a silicide region (A) comprising the first gate electrode and a silicide region (B) comprising the second gate electrode, one silicide region of the silicide region (A) and one silicide region of the silicide region (B) comprise a silicide (a) as a silicide of a metal M to be a diffusing species in a siliciding reaction, the other silicide region of the silicide region (A) and the other silicide region of the silicide region (B) comprise a silicide layer (C) in contact with the gate insulating film, and the silicide layer (C) comprises a silicide (b) as a silicide of a metal M having a smaller atomic composition ratio of metal M than the silicide (a) and a dopant substantially preventing diffusion of the metal M in the silicide (b).