Patent ID: 7369491

Claim:
A device for regulating transfer of data bursts from a burst buffer, each data burst belonging to one of a plurality of burst streams, said device comprising: a burst flow-rate controller for determining instants of time at which data bursts are released from said burst buffer; a flow-rate-allocation memory containing a flow-rate allocation for each of said burst streams; a burst-record memory containing a record of a selected burst from each active burst stream each record containing a size of said selected burst and a credit of a burst stream associated with said selected burst; a first memory device storing a first calendar organized into a predefined number of calendar slots; a second memory device storing a second calendar organized into said predefined number of calendar slots; and a burst-transfer memory for storing identifiers of data bursts eligible for transfer from said burst buffer; wherein said first memory device and second memory device periodically interchange roles between control operation and calendar update; wherein said burst flow-rate controller determines burst dequeueing instants from said burst buffer such that for each of said burst streams the flow-rate allocation multiplied by the time interval between successive burst dequeueing instants equals the size of a specified one of said bursts selected during said time interval.