Patent ID: 7675332

Claim:
A frequency synthesizer, comprising: a delay-locked loop comprising a delay chain having delay circuits, phase detection circuitry that generates a control signal for controlling delays of the delay circuits, and a multiplexer that receives output signals of at least two of the delay circuits, wherein the phase detection circuitry has a first input that receives a periodic input signal having a frequency, and the multiplexer outputs a feedback signal to a second input of the phase detection circuitry, wherein the delay-locked loop further comprises a delta sigma modulator that controls a duty cycle of the multiplexer using input signals that are indicative of a fractional number; and a frequency multiplier coupled to receive output signals of the delay circuits, the frequency multiplier generating a periodic output signal having an average frequency that is a product of the frequency of the periodic input signal multiplied by a non-integer fractional number when the frequency of the periodic input signal is constant.