Patent ID: 7268739

Claim:
A data processing terminal comprising: a first ground plane comprised of a conductor in a predetermined shape for determining a potential reference; a second ground plane comprised of a conductor in a predetermined shape having at least a plurality of edges, and positioned substantially in parallel with said first ground plane; a data processing circuit connected to at least one of said first ground plane and said second ground plane; a connector for connecting a position near one edge of said second ground plane to said first ground plane through a plurality of ground terminals; and resistive connecting means for connecting a position near another edge of said second ground plane opposite to the position of said ground connector to said first ground plane with a predetermined resistance value, wherein, said first ground plane, said plurality of said ground terminals, and said second ground plane make up a ground structure, said ground structure having a characteristic impedance equivalent to the resistance value of said resistive connecting means, and said resistive connecting means has a resistance value “R” which satisfies: [α1×120× π×h/w]≦R<[α 2×120 ×π×h/w ](Ω) where “w” represents a length of an edge of said second ground plane near which said resistive connecting means is positioned, “h” represents a spacing between said first ground plane and said second ground plane, and α 1 and α 2 are predetermined coefficients which satisfy “α 1 ≦1<α2.