Patent ID: 8415794

Claim:
A semiconductor device comprising: a semiconductor element having a plurality of element electrodes formed thereon; a circuit board having board electrodes respectively corresponding to the element electrodes formed thereon and having the semiconductor element mounted thereon; and bumps each of which is provided on at least one of the element electrode and the board electrode, and connects together the element electrode and the board electrode corresponding to each other when the semiconductor element is mounted on the circuit board, wherein, at least one of a dielectric layer and a resistive layer is provided between at least one of the bumps and the element or board electrode on which the at least one of the bumps is provided, said semiconductor device further comprising a first conductive layer between the dielectric or resistive layer and the element or board electrode that has the dielectric or resistive layer provided thereon, the first conductive layer having a plane area larger than an area of a junction with the element or board electrode that has the first conductive layer provided thereon, the dielectric layer having a plane area equal to that of the first conductive layer, and a second conductive layer is provided between a bump and the dielectric layer, the second conductive layer having a plane area equal to that of the first conductive layer.