Patent ID: 7024516

Claim:
A Content Addressable Memory (CAM) module comprising: a. a rule Random Access Memory (RAM) block storing n rule entries where n=(2^b) and b is a positive integer; b. a rule n-to-1 multiplexer responsive to a value C varying between 0 and n-1, the rule multiplexer selecting a C'th stored rule entry in the rule RAM block; c. a comparator performing a bitwise matching operation between a matching key and contents of the C'th entry in the rule RAM block provided by the multiplexer, the comparator providing a comparison result; d. a rule decoder block responsive to the comparison result and the value C to identify a matched entry, the rule multiplexer and the rule decoder block enabling comparison between the matching key and n rules using a single comparator; and e. a comparison binary cycle counter register having b bits, the binary cycle counter register resetting to zero when incremented by one count from an n-1 value.