Patent ID: 8578355

Claim:
A method performed by a data processing apparatus, the method comprising: generating multiple different versions of a program segment based on different respective execution scenarios associated with an execution of a program, the program operable to use the program segment versions, the program segment versions comprising: a first program segment version associated with a first execution scenario representing minimal or zero performance impacting events; a second program segment version associated with a second execution scenario indicative of a contention of one or more execution resources during an execution of the program; and a third program segment version associated with a third execution scenario indicative of an execution environment suitable to execute processor instructions associated with the one or more optimization techniques; generating a switching mechanism to associate the program segment with the program segment versions and to invoke one or more of the program segment versions during an execution of the program based on an input associated with at least one of the execution scenarios, the switching mechanism hooking into an execution of the program using a trampoline mechanism that reroutes the execution by setting an active program segment version or combination of program segment versions; generating a control mechanism to monitor an execution of the program by monitoring one or more event counters associated with the one or more execution resources to identify one or more of the execution scenarios during an execution of the program, the event counters comprising a memory bus contention counter and an instruction retirement counter, the control mechanism providing the input to the switching mechanism based on an identified execution scenario, the control mechanism monitoring an instruction retirement rate associated with the execution of the program and providing the input associated with the at least one execution scenario to the switching mechanism based on different instruction retirement rate thresholds or a memory bus contention count; and producing an output based at least on the program segment versions, the switching mechanism, and the control mechanism.