Patent ID: 8841141

Claim:
A method for separating a multiple number of semiconductor devices or semiconductor integrated circuits from a wafer on which the multiple number of semiconductor devices or semiconductor integrated circuits are formed, the method comprising: forming, on a surface of the wafer, a mask layer through which a pattern is exposed; mounting the wafer on a stage; etching the exposed pattern to a depth equal to or larger than about ⅔ of a thickness of the wafer; separating each of the semiconductor devices or semiconductor integrated circuits along the pattern formed on the surface of the wafer; and inclining the stage so that separated semiconductor devices or semiconductor integrated circuits are transferred downward along an inclined surface of the stage into a collecting member provided in the vicinity of and below the stage, wherein the pattern is formed so as to prevent a test device formed on a gap between the semiconductor devices or semiconductor integrated circuits from remaining on the separated semiconductor devices or semiconductor integrated circuits.