Patent ID: 8878713

Claim:
A system comprising: an array of comparators configured to convert an analog input to a digital output of a plurality of output bits by comparing the analog input with respective reference levels of the comparators; a switch configured to adjust one or more output bits of the digital output; and a control logic configured to: initialize the switch; initialize a direct-current (DC) source, the DC source being coupled to the analog input, to a value less than a minimal voltage value corresponding to a least significant bit of the digital output; cause the switch to zero out all output bits that are of logic 1; increase the DC source, from a voltage value corresponding to the least significant bit of the digital output to a voltage value corresponding to a most significant bit of the digital output, in incremental steps of a minimal voltage value corresponding to the least significant bit of the digital output; and for at least one incremental step: if the output bit corresponding to the current incremental step is of logic 1, and one or more higher bits are of logic 1, then: cause the switch to zero out the one or more higher bits that are of logic 1; and if the output bit corresponding to the current incremental step is of logic 0, and one or more higher bits are of logic 1, then: cause the switch to swap one of the one or more higher bits and the output bit corresponding to the current incremental step; and cause the switch to zero out the remaining of the one or more higher bits of logic 1.