Patent ID: 8516422

Claim:
A method for implementing a single file format for power-related information for an IC comprising: providing an RTL circuit design in at least one design file in a non-transitory computer readable storage device; providing power-related design information in a file in the non-transitory computer readable storage device that specifies multiple power domains within the circuit design, each power domain including one or more design object instances from within the circuit design and that specifies isolation behavior relative to respective power domains and that specifies multiple power modes each power mode corresponding to a different combination of on/off states of the multiple specified power domains, that specifies one or more transitions between the power modes, and; and using a computer to perform a verification of the RTL circuit design, wherein the verification includes: accessing the power-related design information and using that information to, demarcate multiple power domains within the circuit design, each power domain including one or more design object instances from within the circuit design, implement the specified isolation behavior relative to respective power domains, and verify functional behavior of the RTL design during the specified one or more transitions between the multiple power modes each power mode corresponding to a different combination of on/off states of the multiple demarcated power domains.