Patent ID: 7892905

Claim:
A method of forming a metal oxide semiconductor field effect transistor (MOSFET) device on a semiconductor substrate featuring a strained channel region, comprising the steps of: providing a conductive gate structure on an underlying gate insulator layer, a source/drain extension region oppositely adjacent said conductive gate structure, and insulator sidewall spacers on sides of said conductive gate structure; forming a layer including a strain inducing element; performing an anneal procedure to form a semiconductor alloy source/drain region via consumption of uncovered portion of said source/drain extension region and via consumption of bottom portion of said layer including said strain inducing element, with said strained channel region forming in top portion of said semiconductor substrate located between semiconductor alloy source/drain region; removing unconsumed top portion of said layer including said strain inducing element; and forming a conductive source/drain region in top portions of said semiconductor substrate directly underlying said semiconductor alloy source/drain region.