Patent ID: 8041755

Claim:
An apparatus configured to perform a shift operation on an input operand, wherein a size of the shift operation is specified by a shift count and a direction of the shift operation is specified by a shift direction, the apparatus comprising: a rotator coupled to receive the input operand and the shift count, wherein the rotator is configured to rotate the input operand by the shift count, outputting a rotated operand; a mask generator coupled to receive the shift count and the shift direction and configured to generate an output mask comprising a plurality of bits equal in number to that of the input operand, wherein the output mask is divided into a plurality of sections where each section of the output mask is the same size as each other section of the output mask, wherein the mask generator is configured to decode a most significant bit (MSB) field of the shift count to generate a first mask comprising a number of bits equal to the number of sections in the output mask, and wherein the mask generator is configured to decode a least significant bit (LSB) field of the shift count to generate a second mask comprising a number of bits equal to the size of a section in the output mask and identifying the bits in a transition section where a transition from binary ones to binary zeros occurs in the output mask, and wherein each bit of the first mask is a section enable determining the assertion or deassertion of bits in the corresponding section of the output mask, and wherein the mask generator is configured to generate each section of the output mask by logically ANDing each of the bits of the second mask with the corresponding bit of the first mask and logically ORing the result with an adjacent bit of the first mask, wherein the mask generator is configured to select the adjacent bit responsive to the shift direction; and circuitry configured to mask the rotated operand with the output mask.