Patent ID: 7955941

Claim:
A method of forming an integrated semiconductor device comprising: providing a semiconductor substrate of a first conductivity type; forming a first doped region of a second conductivity type on a surface of the semiconductor substrate; forming a second doped region of the first conductivity type on a surface of the first doped region wherein the second doped region and the first doped region form a first diode; forming a third doped region of the second conductivity type on the surface of the semiconductor substrate and underlying the second doped region wherein the third doped region and a first portion of the semiconductor substrate form a first zener diode that is coupled in series with the first diode; forming a fourth doped region of the second conductivity type on the surface of the first doped region and spaced laterally apart from the second doped region wherein an interface between the semiconductor substrate and a first portion of the first doped region that underlies the fourth doped region forms a second diode that is coupled in parallel with the series combination of the first diode and the first zener diode; and forming a fifth doped region of the second conductivity type on the surface of the semiconductor substrate wherein the fifth doped region and a second portion of the semiconductor substrate form a third diode that is coupled in parallel with the second diode.