Patent ID: 7969019

Claim:
A semiconductor device, comprising: a first wiring board including a first upper surface, a first lower surface opposite to the first upper surface, a first connection pad formed on a central portion of the first upper surface, and a second connection pad formed on a peripheral portion of the first upper surface; a first semiconductor chip including a first surface, a second surface opposite to the first surface, and a first electrode pad formed on the first surface, and mounted on the first upper surface of the first wiring board so that the first surface of the first semiconductor chip faces the first wiring board, and the first electrode pad being electrically connected with the first connection pad of the first wiring board; a second semiconductor chip including a third surface, a fourth surface opposite to the third surface, and a second electrode pad formed on the third surface, and mounted on the second surface of the first semiconductor chip so that the fourth surface of the second semiconductor chip faces the first semiconductor chip; a second wiring board including a second upper surface, a second lower surface opposite to the second upper surface, a third connection pad formed on a periphery of the second upper surface, and a fourth connection pad formed on the second lower surface, the third connection pad electrically connected to the fourth connection pad, and the second wiring board mounted on the third surface of the second semiconductor chip so that the second lower surface of the second wiring board faces the second semiconductor chip, the second electrode pad being electrically connected with the fourth electrode pad of the second wiring board; and a conductive wire electrically connected between the second connection pad of the first wiring board and the third connection pad of the second wiring board.