Patent ID: 8161436

Claim:
A method of transforming fork-join blocks in a hardware description language (HDL) specification, comprising: creating a respective HDL specification of a free-running process for each sub-statement within a fork-join block that is contained in a specification of a parent process; copying each sub-statement from the fork-join block into the respective specification of the free-running process; placing first timing constructs, controlled by a single first synchronization variable unique to the fork-join block, in the specification of the parent process and in the specification of each free-running process; wherein the first timing constructs trigger execution of the free-running processes, suspend execution of the parent process in response to the parent process initializing the first variable, and resume execution of the parent process in response to adjustments to the first variable by the free-running processes indicating that the free-running processes have completed; wherein the creating, copying, and placing are performed by a programmed computer; storing in a memory an HDL specification of each free-running process including the first timing constructs; and storing an HDL specification of a modified version of the parent process including the first timing constructs in the memory, the modified version not including the fork-join block.