Patent ID: 7668193

Claim:
A data processor unit, including at least two operation-execution units, each one adapted to: receive input data; perform a respective operation on the input data; and outputting output data resulting from said input data after applying said operation, the data processor unit further including: a data storage unit including at least two individually-accessible memory devices adapted to store data; a programmable controller adapted to be programmed so as to execute a selected program; a first data routing circuit arrangement adapted to receive data from the at least two memory devices, from the programmable controller and from a second data routing circuit arrangement, and for selectively routing selected ones among the received data to the input of the operation-execution units; said second data routing circuit arrangement being adapted to receive the output data outputted by the operation-execution units and to selectively route the output data to the at least two memory devices, to the programmable controller, and to the first data routing circuit arrangement; wherein the programmable controller is operatively coupled to the at least two operation-execution units, to the first and second data routing circuit arrangements, and to the at least two memory devices for controlling the operation thereof.