Patent ID: 7768112

Claim:
A window-type semiconductor package comprising: a substrate unit formed by singulation from a substrate strip, having a die-attaching surface, an external surface and a plurality of small windows, wherein the small windows are formed at a plurality of corners of the substrate unit, wherein the external surface includes a plurality of window molding areas surrounding the small windows and extending into the sides of the substrate unit, wherein the substrate unit further has a central slot formed at the center thereof, and the central slot is longer than the small windows; a chip deposited on the die-attaching surface, wherein the chips are disposed within the substrate unit without covering the sides of the substrate unit, the small windows expose a plurality of peripheries of an active surface of the chip, the central slot exposes a center of the active surface of the chip; a plurality of electrical connecting components formed through the small windows to electrically connect the chip to the substrate unit; and an encapsulant formed on the window molding areas and in the small windows to encapsulate the electrical connecting components, wherein the encapsulant on the window molding areas has a plurality of first singulated cut sidewalls perpendicular to the external surface and aligned to the sides of the substrate unit wherein some of the electrical connecting components are formed through the central slot, wherein the external surface further includes a bottom molding area surrounding the central slot, wherein the encapsulant is further formed in the central slot and on the bottom molding area; wherein the encapsulant is further formed on the die-attaching surface to encapsulate at least a portion of the chip; and wherein the encapsulant completely covers the die-attaching surface and has a second singulated cut sidewall perpendicular to the die-attaching surface and aligned to the sides of the substrate unit.