Patent ID: 6981107

Claim:
A nonvolatile memory device comprising: an input/output port sequentially receiving information comprising data words; a memory array connected to said input/output port for storing said data words; a programming-management unit connected to said input/output port for receiving said information, said programming-management unit being connected to and controlling said memory array; and a plurality of temporary storage elements connected between said input/output port and said memory array and controlled by said programming-management unit, said temporary storage elements temporarily storing a plurality of data words and transferring in parallel and simultaneously said stored data words to said memory array, wherein said information also comprises addresses associated with storage locations in the memory array for storing the data words, and said programming-management unit comprises: an address register that stores an initial address of the addresses received by the programming-management unit; and a logic unit having a first input coupled to the input/output port and a second input coupled to an output of the address register, the logic unit being structured to compare the initial address stored in the address register with a current address of the address received by the programming-management unit, determine whether the current address corresponds to a storage location in a same sector of the memory array as the storage location to which the initial address corresponds, and the data words in the temporary storage elements to be transferred in parallel to the memory array in response to determining that the storage location to which the current address corresponds is located in a different sector than the sector in which is located the storage location corresponding to the initial address.