Patent ID: 8581894

Claim:
An output circuit comprising: an input terminal; an output terminal; first, second and third power supply terminals supplied with first, second and third power supply voltages from first, second and third power supplies, respectively, said third power supply voltage being a voltage intermediate between said first and second power supply voltages; a differential amplifier circuit; an output amplifier circuit; and a control circuit, wherein said differential amplifier circuit that includes: a differential input stage that differentially receives an input signal at said input terminal and an output signal at said output terminal; a first current mirror that includes a pair of transistors of a first conductivity type connected to said first power supply terminal; a second current mirror that includes a pair of transistors of a second conductivity type connected to said second power supply terminal, at least one of said first and second current mirrors receiving an output current of said differential input stage; a first junction circuit connected between respective input nodes of said first and second current mirrors; and a second junction circuit connected between respective output nodes of said first and second current mirrors, wherein said output amplifier circuit includes: a first transistor of said first conductivity type that is connected between said first power supply terminal and said output terminal, and has a control terminal connected to a connection node between an output node of said first current mirror and one end of said second junction circuit; and a second transistor of said second conductivity type that is connected between said output terminal and said third power supply terminal and has a control terminal connected to an other end of said second junction circuit, and wherein said control circuit includes a third transistor of said first conductivity type that has a first terminal connected to a connection node between said other end of said second junction circuit and said control terminal of said second transistor of said output amplifier circuit, has a second terminal connected to said output node of said second current mirror and has a control terminal supplied with a first bias voltage having a value in accordance with said third power supply voltage.