Patent ID: 8400601

Claim:
A flat panel display device, comprising: a first substrate; an active layer formed over the first substrate, wherein the active layer comprises a source region, a drain region, and a channel region; a gate insulating layer formed on the active layer; a gate electrode formed on the gate insulating layer and over the channel region of the active layer; a first interlayer insulating film formed on the gate insulating layer and the gate electrode; a source electrode and a drain electrode electrically connected to the source region and the drain region of the active layer, respectively, through a contact hole, wherein the contact hole is formed in the first interlayer insulating film and the gate insulating layer; a second interlayer insulating film interposed substantially only between i) the first interlayer insulating film and ii) the source electrode and the drain electrode; a passivation layer formed on the first interlayer insulating film and the source electrode and the drain electrode; and a pixel electrode electrically connected to the source electrode or the drain electrode through a via-hole formed in the passivation layer.