Patent ID: 7498859

Claim:
A driving device, comprising: a delay unit comprising a plurality of CMOS inverters driven by a low driving voltage and a high driving voltage; a low power regulating unit for outputting the low driving voltage, wherein the low power regulating circuit comprises a plurality of PMOS transistors coupled in series between a power source and a first output node, the gates of the PMOS transistors being directly connected to ground, the low power regulating circuit further comprising a first resistor coupled between the first output node and the ground; and a high power regulating unit for outputting the high driving voltage, the high power regulating unit comprising a plurality of NMOS transistors coupled in series between the ground and a second output node, the gates of the NMOS transistors being directly connected to the power source, the high power regulating unit further comprising a second resistor coupled between the second output node and the power source.