Patent ID: 8593254

Claim:
A semiconductor integrated circuit comprising: a rectifying circuit comprising a first input terminal, a second input terminal, a first output terminal and a second output terminal; a switched capacitor; a switched-capacitor drive circuit; a demodulator; and an internal circuit, wherein the first input terminal and the second input terminal are electrically coupled to one end and another end of an external antenna, respectively, wherein the first output terminal is electrically coupled with the switched capacitor, and the second output terminal is electrically coupled with a ground, wherein an RF reception signal from a reader/writer is supplied to the first input terminal and the second input terminal of the rectifying circuit, wherein an output rectified voltage outputted from the first output terminal of the rectifying circuit is supplied to the switched capacitor, wherein the switched-capacitor drive circuit generates a switch control signal responding to the RF reception signal to drive the switched capacitor by the switch control signal, wherein the demodulator demodulates a modulated signal included in the RF reception signal to generate a demodulation signal and supplies the generated demodulation signal to the internal circuit, and wherein, by executing series charging to a plurality of capacitors using the output rectified voltage supplied from the rectifying circuit and parallel discharging from the capacitors in response to the switch control signal from the switched-capacitor drive circuit, current driving performance of the switched capacitor at the time of supplying a power source voltage to the demodulator and the internal circuit is set to a predetermined level.