Patent ID: 8569136

Claim:
A manufacturing method of a semiconductor device, said semiconductor device comprising a first MISFET in a first region of a semiconductor substrate and a second MISFET in a second region of the semiconductor substrate, said manufacturing method comprising the steps of: (a) preparing the semiconductor substrate; (b) after the step (a), respectively forming a first gate structure for the first MISFET over the semiconductor substrate in the first region, and a second gate structure for the second MISFET over the semiconductor substrate in the second region; (c) after the step (b), forming a first material film over the semiconductor substrate so as to cover the first gate structure and the second gate structure; (d) after the step (c), forming a first mask layer covering the second region and exposing the first region, over the first material film; (e) after the step (d), performing first ion implantation on the semiconductor substrate in the first region using the first mask layer as an ion implantation blocking mask; (f) after the step (e), removing the first mask layer; (g) after the step (f), removing the first material film; (h) after the step (g), forming a second material film over the semiconductor substrate so as to cover the first gate structure and the second gate structure; (i) after the step (h), forming a second mask layer covering the first region and exposing the second region, over the second material film; (j) after the step (i), performing second ion implantation on the semiconductor substrate in the second region using the second mask layer as the ion implantation blocking mask; and (k) after the step (j), removing the second mask layer, wherein each of the first gate structure and the second gate structure includes a gate insulating film and a gate electrode formed over the gate insulating film, and wherein in the step (g), the first gate structure and the second gate structure are exposed.