Patent ID: 7205565

Claim:
A thin film transistor, comprising: a semiconductor layer formed on a substrate; a gate insulating layer formed on the substrate having the semiconductor layer; a gate electrode formed on the gate insulating layer over the semiconductor layer; source/drain areas formed in the semiconductor layer at both sides of the gate electrode; an interlayer insulating layer formed on an entire surface of the substrate and having a contact hole/via hole that exposes the source/drain areas; source/drain electrodes formed on the interlayer insulating layer and contacting with the source/drain areas through the contact hole/via hole; and a passivation layer formed between a pixel electrode and the interlayer insulating layer, the passivation layer comprising an inorganic layer, wherein a top of the inorganic layer contacts the pixel electrode, and an organic planarization layer is located on an area of the inorganic layer that does not contact the pixel electrode, the top of the inorganic layer being substantially coplanar with a top of the organic planarization layer.