Patent ID: 7259422

Claim:
A semiconductor device comprising a split-gate memory cell, the memory cell including: a selective gate formed on a principal surface of a semiconductor substrate through a gate insulating layer; a memory gate formed on one side surface of the selective gate, the memory gate being in a form of a sidewall; and an ONO layer with a generally L-shaped cross section, includes one part formed between one side surface of the selective gate and one side surface of the memory gate, and an other part formed below the memory gate, wherein a second insulating layer is formed on an other side surface of the memory gate through a first insulating layer, the first insulating layer being in the form of a sidewall, the second insulating layer also being in the form of a sidewall, the second insulating layer in the form of the sidewall is formed on an other side surface of the selective gate, and one end of the ONO layer formed on the semiconductor substrate is terminated below the first insulating layer.