Patent ID: 6872991

Claim:
Circuitry for managing leakage current in selected logic devices comprising: a first power bus for coupling a first voltage potential of a power supply to the selected logic devices within a logic domain; a first switch device with a first leakage current having a first node coupled to the first voltage potential and a second node coupled to the first power bus, wherein the first voltage potential is coupled to the first power bus with a first conductivity in response to a first logic state of a first control signal and decoupled from the first power bus in response to a second logic state of the first control signal; and a second switch device with a second leakage current materially greater than the first leakage current having a first node coupled to the first voltage potential and a second power node coupled to the first power bus, wherein the first voltage potential is coupled to the first power bus with a second conductivity in response to a first logic state of a second control signal and decoupled from the first power bus in response to a second logic state of the second control signal so that the first logic state of the second control signal has a materially shorter duration than the first logic state of the first control signal.