Patent ID: 8013385

Claim:
A semiconductor device comprising: a device isolation film formed in a substrate; a first contact and a second contact located over said device isolation film so as to be opposed with each other, each of which including a length in the horizontal direction larger than the height; a first electro-conductive pattern located on said first contact, and formed in at least a single interconnect layer; a second electro-conductive pattern located on said second contact so as to be opposed with said first electro-conductive pattern, and formed in at least a single interconnect layer; and an upper interconnect layer located above said first electro-conductive pattern and said second electro-conductive pattern, wherein, said upper interconnect layer is provided so as to locate a portion of said upper interconnect layer composed of an insulating film or a portion of said upper interconnect layer composed of a third electro-conductive pattern, which is different from said first electro-conductive pattern and said second electro-conductive pattern, above said first electro-conductive pattern and said second electro-conductive pattern.