Patent ID: 6972262

Claim:
A method for fabricating a semiconductor device, comprising the steps of: forming a plurality of conductive patterns on a substrate provided with a cell region and a peripheral region; forming an etch stop layer on the plurality of conductive patterns and the substrate; forming a spin on glass (SOG) layer on the etch stop layer; performing a first curing process for densifying the SOG layer; partially etching the SOG layer to thereby make a bottom part of the SOG layer densified during a subsequent second curing process; performing the second curing process for densifying the SOG layer; forming a photoresist pattern on the SOG layer; forming a plurality of contact holes by etching the SOG layer with use of the photoresist pattern as an etch mask; removing portions of the etch stop layer exposed by the plurality of contact holes to thereby expose the substrate; and cleaning the contact holes.