Patent ID: 7860701

Claim:
A method for predicting functionality of and correcting an integrated circuit segment for lithographic printing on a wafer comprising: providing a two-dimensional design of an integrated circuit, including an integrated circuit segment having critical width; simulating a two-dimensional printed image of the critical width integrated circuit segment; dividing the simulated printed critical width integrated circuit segment into a plurality of sub-segments based on deviation of edges along a length of the simulated printed critical width integrated circuit segment with respect to edges along a length of the designed critical width integrated circuit segment; calculating theoretical current performance for each sub-segment of the simulated printed critical width integrated circuit segment; predicting functionality of the critical width integrated circuit segment after printing based on the theoretical current performance of the sub-segments of the simulated printed critical width integrated circuit segment; correcting the critical width integrated circuit segment based on predicted functionality thereof; and lithographically printing the corrected integrated circuit segment on the wafer.