Patent ID: 6917208

Claim:
A method for determining resistances in a test structure for integrated circuits with a four-point measurement, wherein at least four resistors are interconnected and the resistors have measurement pads for impressing a measurement current and for measuring a voltage drop, the method which comprises: providing a plurality of resistors, interconnected in a ring structure with each two resistors connected to one another via a node, and with each of four nodes having two measurement pads for impressing current and measuring a voltage; in a first measurement step, impressing a first measurement current via one measurement pad at a first node, the current being divided between two mutually parallel resistor branches each having at least two series-connected resistors, measuring first, second and third voltages at a second measurement pad of the first node and a respective measurement pad of the two nodes adjacent the first node, while the measurement pads of a remaining node serve as a zero point; in a second measurement step, impressing a second measurement current via one measurement pad at a second node, the current being divided between two mutually parallel resistor branches each having at least two series-connected resistors, measuring fourth, fifth and sixth voltages at a second measurement pad of the second node and a respective measurement pad of the two nodes adjacent the second node, while the measurement pads of a remaining node serve as a zero point; and determining the resistances of the four resistors from the measured voltages and from the measurement currents.