Patent ID: 8265215

Claim:
A symbol timing unit configured to produce a plurality of difference values for a plurality of different potential symbol timing boundaries, the symbol timing unit comprising: a subtractor configured to subtract (1) a first sample value of a first training symbol from (2) a second sample value of a second training symbol to produce a first difference value of the plurality of difference values; an absolute value circuit configured to calculate absolute value or magnitude; an accumulator configured to accumulate an absolute value or magnitude of the first difference value with an absolute value or magnitude of a second difference value of the plurality of difference values computed by the absolute value circuit, wherein the second difference value was previously computed; a controller configured to facilitate repeating of the subtracting in the subtractor and accumulating in the accumulator over at most a factor of a symbol length; an estimator configured to estimate noise due to inter-carrier and inter-symbol interference for at least one of the plurality of different potential symbol timing boundaries; and a comparator configured to select, based on the accumulated difference value produced by the accumulator, a choice of symbol boundary timing with substantially a least estimated noise due to inter-carrier and inter-symbol interference.