Patent ID: 7816782

Claim:
A wiring substrate for mounting semiconductors comprising: an insulation film; wires formed in said insulation film; a first plurality of electrode pads whose surfaces are exposed to a front surface of said insulation film, and at least a part of a side surface of the first plurality of the electrode pads being buried in said insulation film; a second plurality of electrode pads whose surfaces are exposed and parallel to a rear surface of said insulation film; and a via by which said wires and said first plurality of electrode pads are connected to each other, wherein said via has an end at an inner side of the insulation film relative to the end of the first plurality of electrode pads in a direction parallel to the exposed surfaces of said first plurality of electrode pads, wherein the first plurality of the electrode pads are disposed on a first layer, and the via is disposed on a second layer, wherein the first layer is on a different level from the second layer, wherein the exposed surface of at least one of said first plurality of electrode pads is located at a position recessed from the front surface of said insulation film, wherein said insulation film comprises: a first insulation layer located at a front surface of said wiring substrate; a second insulation layer located at a rear surface of said wiring substrate; and a singularity or a plurality of third insulation layers positioned in an interior of said wiring substrate, said singularity or a plurality of the third insulation layers comprising: a plurality of wires, among the wires, buried in both of a front surface and a rear surface of said singularity or a plurality of the third insulation layers; and vias which connect said plurality of the wires of the front surface and said plurality of the wires of the rear surface to each other, said first plurality of electrode pads are, respectively, exposed to the front surface side of said wiring substrate in said first insulation layer and said second plurality of electrode pads to the rear surface side of said wiring substrate in said second insulation layer, and at least a part of the side surface of the first plurality of electrode pads and a side surface of the second plurality of electrode pads is buried in said first insulation layer and said second insulation layer, respectively, wherein at least one of the first insulation layer and the second insulation layer comprises a first material having a higher film strength or a lower thermal expansion coefficient relative to the singularity or the plurality of the third insulation layers.