Patent ID: 8324553

Claim:
A chip-stacked image sensor comprising: a first semiconductor chip comprising a plurality of image signal sensing cells for generating image charges corresponding to image signals, wherein each of the image signal sensing cells comprises at least four photodiodes and at least two image charge transmission pads; and a second semiconductor chip comprising a plurality of image signal conversion cells for converting the image signals into electrical signals, wherein each of the image signal conversion cells comprises at least two image charge receiving pads, wherein the image charges generated by a first image signal sensing cell in the plurality of image signal sensing cells are transmitted to a first image signal conversion cell in the plurality of image signal conversion cells via the at least two image charge transmission pads of the first image signal sensing cell and the at least two image charge receiving pads of the first image signal conversion cell, and wherein the first image signal sensing cell comprises: a first photodiode ( 0 , 0 ); a second photodiode ( 1 , 1 ) disposed in a diagonal direction of the first photodiode ( 0 , 0 ); a third photodiode ( 1 , 0 ) disposed in a side of the second photodiode ( 1 , 1 ) and over the first photodiode ( 0 , 0 ); a fourth photodiode ( 2 , 1 ) disposed over the second photodiode ( 1 , 1 ); a first charge transmission transistor M 1 comprising a terminal connected to the first photodiode ( 0 , 0 ) and a gate applied with a first charge transmission signal Tx 0 ; a second charge transmission transistor M 2 comprising a terminal connected to the second photodiode ( 1 , 1 and a gate applied with a second charge transmission signal Tx 1 ; a third charge transmission transistor M 6 comprising a terminal connected to the third photodiode ( 1 , 0 ) and a gate applied with the second charge transmission signal Tx 1 ; a fourth charge transmission transistor M 7 comprising a terminal connected to the fourth photodiode ( 2 , 1 ) and a gate applied with a third charge transmission signal Tx 2 ; a first image charge transmission pad P 1 - 1 commonly connected to the other terminal of the first charge transmission transistor M 1 and the other terminal of the second charge transmission transistor M 2 ; and a second image charge transmission pad P 1 - 2 commonly connected to the other terminal of the third charge transmission transistor M 6 and the other terminal of the fourth charge transmission transistor M 7 .