Patent ID: 8349720

Claim:
A method of manufacturing a nonvolatile semiconductor memory, comprising: sequentially depositing a gate insulating film and a first gate electrode on a semiconductor substrate having a memory region and a peripheral circuit region; forming an element isolation insulating layer in portions of the semiconductor substrate, the gate insulating film, and the first gate electrode, an upper surface of the element isolation insulating layer being leveled with an upper surface of the first gate electrode; forming a first insulating film on first portions of the first gate electrode and element isolation insulating layer corresponding to the peripheral circuit region; etching the element isolating insulating layer by using the first insulating film as a mask, thereby lowering an upper surface of a second portion of the element isolation insulating layer corresponding to the memory region; forming a second insulating film on the first insulating film and on a second portion of the first gate electrode corresponding to the memory region; forming a control gate electrode on a portion of the second insulating film corresponding to the memory region; and forming a second gate electrode electrically connected to the first gate electrode, on the first portions of the first gate electrode and element isolation insulating layer.