Patent ID: 8259276

Claim:
An active device array substrate, comprising: a substrate having an active area and a peripheral circuit area connected to the active area; a pixel array disposed on the active area of the substrate; a peripheral circuit disposed on the peripheral circuit area of the substrate and, comprising: a plurality of driver bonding pads; a plurality of fan-out lines electrically connected to the pixel array; and a plurality of connecting lines, each of the plurality of connecting lines respectively connected with one of the plurality of driver bonding pads and one of the plurality of fan-out lines; and at least one mark disposed between two of the plurality of connecting lines adjacent to each other, wherein the mark is a pin number marks, which is not connected to any electrode or connecting line, and a pitch between two of the plurality of connecting lines disposed at two sides of the at least one mark is P1, a pitch between two of the plurality of connecting lines with none of the at least one mark disposed therebetween is P2, and P1>P2.