Patent ID: 7417458

Claim:
A gate driving circuit in which a plurality of stages are connected to each other, each stage comprising: a pull-up part to pull up a present gate signal to a first clock during a 1H period; a pull-down part to discharge the present gate signal to an off-voltage; a pull-up driving part to turn on the pull-up part and turn off the pull-up part, the pull-up driving part being connected to a Q-node of the pull-up part; and a ripple preventing part to prevent a ripple of the present gate signal and an input terminal of the pull-up driving part, wherein the ripple preventing part comprises: a first ripple preventing device to connect the Q-node and a present output terminal during a high period of the first clock within a (n−1)H period; a second ripple preventing device to connect the input terminal of the pull-up driving part and the Q-node during a high period of a second clock within the (n−1)H period; and a back-flow preventing device connected between the input terminal of the pull-up driving part and the second ripple preventing device to prevent an electric charge of the Q-node from flowing back to the input terminal of the pull-up driving part.