Patent ID: 6952038

Claim:
A three dimension (3D) polysilicon read only memory (ROM), at least comprising: a silicon substrate; an isolated silicon dioxide (SiO 2 ) layer, which is deposited on the silicon substrate; a N-Type heavily doped (N+) polysilicon layer, which is deposited on the isolated SiO 2 layer and further defines a plurality of parallel, separate word lines (WL); a first oxide layer, which is filled in the space between the word lines; a dielectric layer, which is deposited on the word lines and the first oxide layer; a P-Type lightly doped (P−) polysilicon layer, which is deposited on the dielectric layer and further defines a plurality of parallel, separate bit lines (BL), wherein the bit lines overlap the word lines, from a top view, to form a shape that defines a cross; at least a neck structure, which are individually formed between the N-type heavily doped (N+) polysilicon layer and the P-type lightly doped (P−) polysilicon layer by isotropically etching the dielectric layer and using dilute hydrofluoric acid (HF); and a second oxide layer, which is filled in the space between the bit lines and is on the word lines and the first oxide layer.