Patent ID: 6871258

Claim:
A method for erasing an electrically erasable nonvolatile memory device, in particular an EEPROM-FLASH memory device, the nonvolatile memory device including a memory array formed by a plurality of memory cells grouped in sectors each formed by a plurality of subsectors having a plurality of word lines, the erase method comprising the steps of: erasing a sector of the memory array by extracting electrons from floating gates of memory cells; verifying erase of said sector wherein said step of verifying erase of said sector comprises the step of verifying erase of each subsector of said sector, which includes verifying erase of at least one subsector of said sector, wherein said verifying erase of at least one subsector of said sector includes verifying erase of a selected subset of memory cells within that subsector with a deselected subset of the memory cells within that subsector biased at a negative voltage; and further erasing only the subsectors not completely erased of said sector, including allowing erasure of multiple word lines in a same subsector simultaneously.