Patent ID: 7420832

Claim:
A semiconductor storage comprising: a first plane of circuitry; a second plane of circuitry, the second plane of circuitry being parallel to, and not coplanar with, the first plane of circuitry; a first array portion formed on the first plane of circuitry; a second array portion formed on the second plane of circuitry; at least a first composite word line or a first composite bit line, the first composite word line having a first word line portion on the first array portion and a second word line portion on the second array portion, the first composite bit line having a first bit line portion on the first array portion and a second bit line portion on the second array portion; and an interconnect connecting a proximal end of the first word line portion and a proximal end the second word line portion, or a proximal end of the first bit line portion and a proximal end of the second bit line portion.