Patent ID: 7791570

Claim:
Electrical circuit arrangement for a display device, the electrical circuit arrangement comprising an input terminal for receiving a first signal; a first memory element for storing information related to the first signal; a second memory element; a driver element coupled to the first memory element for outputting a second signal via an output terminal based on the information about the first signal; and a calibration circuit coupled between the driver element and the input terminal for matching a potential difference between the driver element and the input terminal during a calibration phase prior to receiving the first signal, the matching being such that there is no voltage change required at the input terminal during a subsequent programming phase if during a current programming phase the second signal is programmed to the same value as during a previous programming phase, wherein the calibration circuit comprises a calibration transistor coupled with a main terminal between the input terminal and the driver element, and wherein the second memory element is coupled to a gate of the calibration transistor.