Patent ID: 7892907

Claim:
A method for forming a CMOS device, comprising: providing a substrate and then in any order: forming in the substrate a first well region of a first conductivity type; forming in the substrate a second well region of a second, opposite, conductivity type, laterally separated from the first well region by a first distance; forming a first further region of the first conductivity type in the substrate between the first and second well regions, proximate the second well region; forming a second further region of the second conductivity type in the substrate between the first and second well regions, proximate the first well region; providing first source-drain regions of the first conductivity type in the second well region; providing a first contact region of the first conductivity type in the first well region; providing a second contact region of the first conductivity type in the first further region; providing second source-drain regions of the second conductivity type in the first well region; providing a third contact region of the second conductivity type in the second well region; providing a fourth contact region of the second conductivity type in the second further region; and then ohmically coupling the second and fourth contact regions.