Patent ID: 7816178

Claim:
A method for making a packaged semiconductor device, the method comprising: a. providing at least one semiconductor die comprising a transistor having at least one control region and at least one first terminal region and a second terminal region; b. providing a thermal clip with a first surface and a second surface c. providing a lead frame array in matrix format, said lead frame comprising at least one first terminal pad structure with at least one first terminal lead extending from one side of said first terminal lead pad structure; at least one control pad structure with at least one control lead extending from one end of said control pad structure; and at least one second terminal pad structure with at least one second terminal lead extending from one end of said second terminal pad structure, wherein said lead frame has a first surface and a second surface; d. providing a nonconductive molding material; e. attaching said second terminal region of said semiconductor die to said second surface of said thermal clip; f. attaching said control region of said semiconductor die to said first surface of said control pad structure and said first terminal region to said first surface of said first terminal pad structure in said lead frame; g. attaching said second surface of said thermal clip to said first surface of said second terminal pad structure in said lead frame; h. encapsulating said semiconductor die, said thermal clip and said lead frame with said nonconductive molding material, wherein said first surface of said thermal clip and said first terminal pad structure on said second surface of said lead frame and said control lead, said first terminal leads and said second terminal leads are exposed through the molding material.