Patent ID: 8872165

Claim:
A thin film transistor array substrate, comprising: a thin film transistor including an activation layer, a gate electrode, source and drain electrodes, a first insulation layer between the activation layer and the gate electrode, and a second insulation layer between the gate electrode and the source and drain electrodes; a pixel electrode including a transparent conductive oxide, the pixel electrode being on a portion of the first insulation layer extending from the thin film transistor, and the pixel electrode being connected to one of the source and drain electrodes via an opening in the second insulation layer; a capacitor including a first electrode and a second electrode, the first electrode being on a same layer as the activation layer and including a semiconductor doped with ion impurities, the second electrode being between the first and second insulation layers and including a transparent conductive oxide; a third insulation layer covering the source and drain electrodes and exposing the pixel electrode; and a connection portion connected to the first electrode, the connection portion disposed on a same layer as the first electrode, wherein the semiconductor doped with ion impurities is present continuously between the first electrode and the connection portion.