Patent ID: 8159012

Claim:
A semiconductor device comprising: a semiconductor substrate including an active region; a transistor that is formed in the active region of the semiconductor substrate; an interlevel insulating layer that is formed on the semiconductor substrate; a contact plug that is formed in the interlevel insulating layer and that is electrically connected to the transistor; a lower electrode that is formed on the interlevel insulating layer and that is electrically connected to the contact plug; an upper electrode that is formed on the lower electrode; and an insulating layer of a cubic system or a tetragonal system comprising a metal silicate layer, the insulating layer formed between the lower electrode and the upper electrode, wherein the metal silicate layer comprises a first hafnium silicate layer, and a second hafnium silicate layer, wherein the insulating layer of the cubic system or the tetragonal system further comprises a zirconium-based oxide layer, and wherein the zirconium-based oxide layer is formed between the first hafnium silicate layer and the second hafnium silicate layer.