Patent ID: 7335929

Claim:
A transistor structure comprising: a substrate having a strained layer, the substrate comprising a first semiconductor material having a first lattice constant, the strained layer comprising a second semiconductor material different from the first semiconductor material and having a second lattice constant; a strained channel region in the strained layer, wherein the strained channel region is substantially parallel to the major surface of the substrate; source and drain regions oppositely adjacent the strained layer, wherein a portion of the source and drain regions oppositely adjacent the strained layer comprises the first semiconductor material, at least a portion of the first semiconductor material in the source and drain regions being located immediately adjacent the strained layer in a direction substantially parallel to the major surface of the substrate, a continuous layer of the first semiconductor material being subjacent the strained layer and extending below the source and drain regions; a gate dielectric layer overlying the strained channel region; and a gate electrode overlying the gate dielectric layer.