Patent ID: 7812377

Claim:
A semiconductor device comprising: a semiconductor substrate of a first general conductivity type configured to operate as a back gate region; a channel region of a second general conductivity type disposed on a front surface of the semiconductor substrate; a gate region of the first general conductivity type formed in a surface portion of the channel region so as to form a mesh pattern comprising first mesh cells and second mesh cells, each of the first and second mesh cells surrounds a portion of the channel region, the first mesh cell being a first polygon and the second mesh cell being a second polygon that is smaller than the first polygon, each first mesh cell being disposed next to a corresponding second mesh cell, and the gate region being electrically connected to the back gate region; a plurality of source regions formed in corresponding second mesh cells; and a plurality of drain regions formed in corresponding first mesh cells, wherein the source regions are separated from the gate region at least by a first distance, and the drain regions are separated from the gate region at least by a second distance that is larger than the first distance.