Patent ID: 7660968

Claim:
A reconfigurable processor integrated circuit, comprising: a processor core for operating on a set of instructions to carry out predefined processes; a plurality of input/output pins; a plurality of functional input/output blocks each having an input and an output and associated with said processing core to allow said processing core to interface with said plurality of input/output pins, each of said functional input/output blocks having an associated and predetermined functionality, said functionality being the output as a function of the input, the function defined by said functionality, and each of said functional input/output blocks having a requirement for a defined number of said plurality of input/output pins wherein the total of said defined number for all of said plurality of functional input/output blocks exceeds the number of said plurality of input/output pins, wherein said processor core is interfaced with one of said input or output of each of said functional input/output blocks; a reconfigurable interface for selectively interfacing between the other of said input or output of said functional input/output blocks and a select one or ones of said plurality of input/output pins, such that said processor core can be interfaced with said select one or ones of said input/output pins, said reconfigurable interface operable to define how each of said plurality of input/output pins interfaces with said select ones of said plurality of functional input/output blocks and the associated functionality in accordance with configuration information; and a non-volatile memory, said non-volatile memory for storing information for use in association with said configuration information, such that said stored information can be altered.