Patent ID: 7106025

Claim:
A method of controlling switching in a three-phase power conversion device to reduce a common mode voltage, the method comprising: comparing respective pairs of the phase voltages to each other for a period of a carrier wave to determine a voltage difference; and limiting the voltage difference to an amount calculated by the expression: δ = VbusT d P sw , where δ is a voltage difference function limit, where V bus is a dc bus voltage that determines a peak-to-peak amplitude of the carrier wave, where P sw is the period of the carrier wave, and where T d is a dead time that is predetermined for switches in the power conversion device; comparing the carrier wave to three respective phase voltages to determine active periods for gating signals to be transmitted to the switches in the power conversion device; and delaying gating signals to the switches in the power conversion device to maintain the voltage difference and to inhibit production of common mode voltage pulses.