Patent ID: 8782490

Claim:
A data storage device comprising: a non-volatile memory device including a plurality of memory cells; and a memory controller configure to modify an arrangement of program data and to program the modified program data into the plurality of memory cells, wherein the memory controller modifies the arrangement of the program data to eliminate a given data pattern causing a physical interference between adjacent memory cells from the modified program data, wherein the memory controller includes an arrangement modifier which performs an arrangement modifying operation to eliminate the given data pattern from the modified program data, wherein the arrangement modifier includes an RLL (Run-Length Limited) code unit which encodes the program data, and wherein the RLL code unit encodes the program data with an encoding condition of (d=2, k=∞), where d is an integer denoting a maximum number of logical ‘0’s between two logical ‘1’s in the encoded program data, and k is an integer denoting a maximum number of logical ‘1’s between logical ‘0’s in the encoded program data.