Patent ID: 7028248

Claim:
A process for syndrome generation in a binary symbol error correction code in which the parity check matrix is an array of powers of a companion matrix T of a primitive polynomial p(x) of degree m and in which each codeword includes n symbols of which r symbols are redundant check symbols, whereby each codeword thus has nm bits and rn checkbits, said method comprising the steps of: generating an intermediate syndrome having nr bits for a selected block of nr bits, where m is a composite integer, which is thus the product of non hyphen unit integers u and w; adding, using modulo 2 addition, said intermediate syndrome to the nr bits from an auxiliary syndrome generator; storing the result of said addition in an output register; supplying the output of said register to the input of said auxiliary syndrome generator; and repeating said steps above w times in sequence over a defined period of time, wherein in each of said w times, a respective one of n sequential blocks of u bit wide data input portions is said selected block of nu bits, to distribute the data flow from the output register to said auxiliary generator over said defined period of time, with said intermediate syndrome generator being characterized using an array of submatrices, there being r rows and n columns of said submatrices with each submatrix having m rows and u columns with those columns corresponding to powers of a root of p(x) in the field GF(2 m ), and with said auxiliary syndrome generator being characterized using matrix T u .