Patent ID: 7746170

Claim:
An amplifier, comprising: an input stage receiving an input signal, the input stage having a first output node on which a first voltage is generated that varies directly with the magnitude of the input signal and a second output node on which a second voltage is generated that varies inversely with the magnitude of the input signal; and an output stage coupled to the input stage, the output stage comprising: a first transistor and a second transistor connected in series with each other between first and second voltage nodes, the second transistor being complementary to the first transistor, the first transistor having a gate that is coupled to one of the output nodes of the input stage; a third transistor of the same type as the first transistor and a fourth transistor of the same type as the second transistor connected in series with each other between third and fourth voltage nodes, the third transistor having a gate that is coupled to the other of the output nodes of the input stage, the fourth transistor being connected to the second transistor as a current mirror; a first cascode transistor coupled between the third transistor and the fourth transistor, the first cascode transistor being of the same type as the third transistor, and a second cascode transistor coupled between the fourth transistor and the third transistor, the second cascode transistor being of the same type as the fourth transistor.