Patent ID: 7206876

Claim:
A method of interfacing an internal circuit of an integrated circuit device with input/output terminals of the integrated circuit device, said method comprising: a first signal conversion process which comprises: receiving M base-A-level output signals from M terminals of the internal circuit, respectively; encoding each of A M values represented by the M base-A-level output signals as a different base-K value represented by N base-K-level output signals, and outputting the N base-K-level output signals to N input/output terminals of the integrated circuit device, respectively; and a second signal conversion process which comprises: receiving N base-K-level input signals from the N input/output terminals of the integrated circuit device, respectively, decoding each base-K value represented by the N base-K-level input signals into a different one of A M values of M base-A-level input signals, and outputting the M base-A-level input signals to the M terminals of the internal circuit, respectively; wherein M, N, A and K are positive integers, wherein M>N>1 and K>A>1, and wherein the integrated circuit device includes a memory cell array, and a command decoder and an address buffer coupled to the memory cell array, wherein the internal circuit is at least one of the memory cell array, the command decoder, and the address buffer, and wherein the N input/output terminals are at least one of data pin terminals, command pin terminals and address pin terminals.