Patent ID: 7439149

Claim:
A method of forming a trench memory device, the method comprising: forming a trench capacitor within a silicon-on-insulator (SOI) substrate, the trench capacitor including a node dielectric layer formed within a trench and a trench polysilicon material formed within the trench in contact with the node dielectric layer, the trench polysilicon material serving as a capacitor electrode; forming a strap mask so as cover one side of the trench, wherein the strap mask covers about one-half the trench; recessing the exposed side of the trench polysilicon material, down to a level at least below an SOI layer of the SOI substrate; removing a portion of the node dielectric layer exposed by the recessing of the trench polysilicon; filling a volume of the trench vacated by the removed portion of the node dielectric layer and recessed trench polysilicon material with a polysilicon buried strap material; following removal of the strap mask, further recessing previously covered portions of the trench polysilicon material and the polysilicon buried strap material, thereby defining a single-sided buried strap; and forming a trench top oxide (TTO) material over the single-sided buried strap and the trench polysilicon material, wherein the node electric layer serves as an insulator to prevent electrical contact between the SOI layer and the trench polysilicon material in the other side of the trench with respect to the location of the single-side buried strap.