Patent ID: 8299546

Claim:
A method of forming a semiconductor device comprising: providing a semiconductor substrate doped with a first conductivity dopant, said semiconductor substrate having first portions separated by a second portion present therebetween; forming raised extension regions on the first portions of the semiconductor substrate, wherein the raised extension regions have a first concentration of a second conductivity dopant; forming raised source regions and raised drain regions on the raised extension regions, the raised source regions and the raised drain regions each having a second concentration of the second conductivity dopant, wherein the second concentration is greater than the first concentration; and forming a gate structure on the second portion of the semiconductor substrate, the gate structure including a gate dielectric layer that is positioned between the semiconductor substrate and a base of a gate conductor, wherein the gate dielectric layer is also present on sidewalls of the gate conductor, wherein an inner edge of the raised extension regions is in contact with the gate dielectric layer that is present on the sidewalls of the gate conductor that provides a sidewall of the gate structure and an inner edge of the raised source regions and the raised drain regions is in contact with the gate dielectric layer that is present on the sidewalls of the gate conductor that provides the sidewall of the gate structure so that the inner edge of the raised source regions and the raised drain regions is aligned to the inner edge of the raised extension regions.