Patent ID: 7294531

Claim:
A method of forming a wafer level chip stack comprising: preparing a first wafer assembly that supports a first wafer, the first wafer including a plurality of first chips sawed to have a first chip size; preparing a second wafer assembly that supports a second wafer, the second wafer including a plurality of second chips sawed to have a second chip size different from the first chip size; positioning the first and second wafer assemblies so that a first surface of one of the plurality of first chips is arranged adjacent to and aligned with a first surface of a corresponding one of the plurality of second chips, wherein the first surface of one of the plurality of first chips is an active surface and the first surface of a corresponding one of the plurality of second chips is a back surface; bonding the first surface of the aligned first chip to the first surface of the corresponding second chip to form a chip stack supported by the first wafer assembly; and detaching the chip stack from the first wafer assembly.