Patent ID: 8898548

Claim:
A data storage device, comprising: an array of flash memory devices; and a controller coupled to the array of memory devices and configured to program and read data from the array of flash memory devices responsive to data access commands from a host, wherein the array of flash memory devices comprises: a plurality of blocks, each comprising a plurality of flash pages (F-Pages), each of the plurality of F-Pages comprising an integer number of one or more error correcting code pages (E-Pages), at least some of the E-Pages comprising a data portion and an error correction code (ECC) portion; wherein the controller is configured to: store a plurality of logical pages (L-Pages) in one or more of the plurality of E-Pages, at least some of the plurality of L-Pages being unaligned with boundaries of the E-Pages; and adjust, in at least one of the F-Pages, a size of the ECC portion and correspondingly adjust a size of the data portion of one or more E-Pages of the at least one F-Page, wherein the controller is further configured to decrease the size of the data portion by an amount that the size of the ECC portion has been increased.