Patent ID: 6842849

Claim:
A data processing apparatus, comprising: a processing unit comprising a pipeline for executing a sequence of instructions, said processing unit having a first mode of operation and a second mode of operation; a set of source registers for storing source data required by the processing unit when executing instructions in the sequence; a locking mechanism for locking source registers dependent on configurable criteria, the configurable criteria being chosen to ensure that source registers still required for completing execution of an instruction in the pipeline are locked to prevent predetermined types of access by a subsequent instruction, the subsequent instruction only being able to enter the pipeline if the source registers relevant to that instruction can be accessed as required by the instruction; wherein, the first mode of operation, the processing unit, responsive to a determination of at least one exception conditions during execution of an instruction, invoking a process external to the pipelined execution unit to enable execution of the instruction to be completed; in the second mode of operation, the processing unit completing execution of an instruction within the pipeline even if the presence of said at least one exception conditions is determined; and wherein the locking mechanism altering the configurable criteria dependent on the mode of operation of the processing unit, such that a reduction in the number of source registers being locked can be achieved in the second mode of operation.