Patent ID: 7248502

Claim:
A non-volatile semiconductor memory device, comprising: a memory cell array containing electrically erasable programmable non-volatile semiconductor memory cells; a controller configured to control operations of reading, programming and erasing of data in said memory cell array; a decoder configured to select a memory cell in said memory cell array; a sense amp configured to sense and amplify data from said memory cell array; a voltage level detector configured to detect if a supply voltage reaches a recovery voltage level; a signal generator configured to generate a recovery operation instructing signal for instructing a recovery operation that halts operations of reading, programming and erasing and initiates voltages applied at least to said memory cell array when said voltage level detector detects that said supply voltage reaches said recovery voltage level; and a switching circuit configured to invalidate said recovery operation instructing signal if a user sequence operation mode is executed and to validate said recovery operation instructing signal in other a data entry mode.