Patent ID: 7937637

Claim:
An integrated circuit comprising: A. a serial data in lead; B. a mode select lead; C. a clock lead; and D. TAP circuitry including: i. data registers having a serial input connected with the serial data in lead and control inputs; ii. an instruction register having a serial input connected with the data in lead, control outputs connected with the data registers, and control inputs; and iii. TAP controller circuitry having an input connected with the mode select lead, an input connected with the clock lead, an enable input, and control outputs connected with the data registers and the instruction register, the TAP controller circuitry including: a. state output leads; b. gating circuitry having an input connected to the enable input, an input connected to the mode select input, and an output; and c. multiplexer circuitry having an input connected to the output of the gating circuitry, an input connected to the mode select input, and a control input coupled with the state output leads.