Patent ID: 7863173

Claim:
A method of fabricating an integrated circuit memory cell, comprising: forming a cup-shaped electrode on sidewalls of an opening in an insulation layer and through the opening onto an ohmic layer stacked on a conductive structure, wherein an upper portion of the electrode is formed from a different material having a greater resistivity than a lower portion of the electrode, the upper portion of the electrode having a ring shape; forming an insulation filling member that at least partially fills an interior of the lower electrode; and forming a variable resistivity material on the insulation filling member and electrically connected to the ring shaped upper of the electrode, wherein the ring shaped upper portion is between the lower portion and the variable resistivity material, wherein forming an insulation filling member comprises: forming a silicon layer that at least partially fills an interior of the electrode; and introducing nitrogen into an upper portion of the silicon layer in the interior of the electrode to form a silicon nitride layer that serves as the insulation filling member.