Patent ID: 7884645

Claim:
A circuit device comprising: a voltage level shifter comprising a single input to receive an input voltage signal and an inverting output to provide a level shifted voltage signal that is inverted relative to the input voltage signal, the voltage level shifter further comprising: a first weak state holding path coupled to the single input, wherein the first weak state holding path comprises a first n-channel field effect transistor (NFET) serially coupled to a first p-channel field effect transistor (PFET); a second weak state holding path coupled to the inverting output, wherein the second weak state holding path comprises a second NFET serially coupled to a second PFET; a first inverter responsive to the input voltage signal, wherein the second NFET and the second PFET are responsive to an output of the first inverter, wherein the first inverter controls the second NFET and the second PFET to respond to a complement of the input voltage signal while the first NFET and the first PFET are responsive to the input voltage signal; a voltage pull-up logic circuit coupled to the first weak state holding path and to the second weak state holding path; and a control path coupled to the voltage pull-up logic circuit to selectively control activation of the voltage pull-up logic circuit in response to a transition of a buffer output of a buffer, wherein the buffer has an input coupled to the inverting output; wherein the buffer enables control of the voltage pull-up logic circuit to be responsive to a load applied to the buffer output while a switching response of the second weak state holding path to a transition of the input voltage signal is substantially unaffected by the load.