Patent ID: 8266196

Claim:
A Fast Fourier Transform (FFT) processing apparatus, the apparatus comprising: a sample memory having a number of samples values stored in each row equal to a radix of the FFT; a transpose memory; a butterfly core configured to receive a row of values from the sample memory, perform a butterfly operation on the values, and write results to a column of the transpose memory; a multiplier module configured to retrieve a predetermined number of adjacent values from the transpose memory, multiply each of the values with a twiddle factor, and write results to same locations of the adjacent values in the transpose memory; and a normalization register configured to receive values read from the transpose memory in a row-by-row manner, normalize the values, and write the normalized values row by row to original locations in the sample memory, for sample values corresponding to one of data FFTs, channel estimation FFTs, local and wide identification channel processing, or fine timing IFFTs, and further configured to receive values read from the transpose memory in a column-by-column manner, normalize the values, and write the normalized values row by row to original locations in the sample memory for sample values corresponding to one of estimation IFFTs, pilot FFTs, or pilot IFFTs.