Patent ID: 7541611

Claim:
A system for measuring stress, comprising: a first transistor comprising: a first diffusion region having a first terminal; a second diffusion region having a second terminal; and a channel region disposed between the first diffusion region and the second diffusion region, wherein only a portion of the first diffusion region and only a portion of the second diffusion region borders the channel region, wherein the first transistor channel region has a stair-step shape, wherein at least one of the first diffusion region and the second diffusion region has a resistance greater than an effective resistance of the first transistor, wherein the first terminal and the second terminal are offset to enable a non-Manhattan current flow, and wherein a first pathway for a majority of current carriers between the first terminal and the second terminal defines a first direction; a second transistor comprising: a third diffusion region having a third terminal; and a fourth diffusion region having a fourth terminal, wherein a second pathway for a majority of current carriers between the third terminal and the fourth terminal defines a second direction, and wherein an angle between the first direction and the second direction is nonzero and acute; at least one ammeter to measure the non-Manhattan current flow and a second current flow between the third terminal and the fourth terminal of the second transistor; and a stress computer for determining a magnitude of a stress on a substrate by comparing the non-Manhattan current flow and the second current flow.