Patent ID: 8432737

Claim:
A nonvolatile semiconductor memory device, comprising: a memory cell array including a plurality of blocks arranged therein, each of the blocks including therein an aggregate of NAND cell units, each of the NAND cell units including therein memory strings, first and second select gate transistors connected to both ends of the memory string respectively, each of the memory string including therein a plurality of nonvolatile memory cells connected in series; word lines each commonly connected to control gates of the memory cells arranged along a first direction; first and second select gate lines each commonly connected to gates of the first or second select gate transistors arranged along the first direction; bit lines each connected to a first end of the NAND cell unit; a source line connected to a second end of the NAND cell unit; a sense amplifier circuit configured to detect a potential of the bit lines to determine data stored in the memory cells; a voltage control circuit configured to control voltages to be provided to the word lines, and the first and second select gate lines, transfer transistors configured to switch a connection state between the voltage control circuit and the word lines, the first select gate line, and second select gate line; and a control circuit configured to control the voltage control circuit, the transfer transistors and the sense amplifier circuit, the control circuit being configured to, when performing a word line leak test to determine a leak state of the word lines, apply, from the voltage control circuit to the word lines connected to the memory cell array written with test pattern data, voltages corresponding to the test pattern data, thereafter switch the transfer transistors to a nonconductive state, thereby setting the word lines in a floating state, after a lapse of a certain time from switching of the transfer transistors to a nonconductive state, activate the sense amplifier circuit to perform a read operation in the memory cell array, and compare a result of the read operation with an expectation value corresponding to the test pattern data.