Patent ID: 7508158

Claim:
A synchronous machine regulator comprising: a gate drive circuit board mounted with a gate drive circuit for supplying a gate pulse to each of thyristors constituting a plurality of thyristor bridges connected in parallel and supplying excitation current to a field winding of said synchronous machine, and phase control means for controlling the phase angle of the gate pulse to be supplied to each of said thyristors; signal detection calculation means for sampling output voltages and currents of a synchronous machine and calculating status quantities regarding excitation regulation for said synchronous machine at a first calculation period; high speed control calculation means for calculating control commands for controlling the status quantities of said synchronous machine to become target values, at a second calculation period longer than said first calculation period, in accordance with the status quantities calculated by said signal detection calculation means; low speed calculation means for calculating asynchronously with said high speed control on/off command for controlling outputs, to said gate drive circuit, of said control commands calculated by said high speed control calculation means, at a third calculation period longer than said second calculation period, in accordance with an externally input system control command regarding said synchronous machine; and a control board mounting one CPU for executing operations of said signal detection calculation means, said high speed control calculation means and said low speed control calculation means.