Patent ID: 8037116

Claim:
A computer implemented method of streamlining floating-point conversions in a digital computing system, the method comprising: determining, by a processing unit, a source coefficient, c 1 , and a source exponent, n, of an input value represented by a floating-point number in a source base, b 1 ; estimating an approximated target exponent (ATE) using the source coefficient and the source exponent, responsive to the source coefficient having a non-zero value; determining whether the ATE exceeds a predefined maximum exponent wherein the ATE exceeding the predefined maximum exponent is an overflow condition, and outputting a predefined overflow value responsive to determining the overflow condition; responsive to determining the ATE does not exceed the predefined maximum exponent, determining whether the ATE is less than a predefined minimum exponent wherein the ATE being less than the predefined minimum exponent is an underflow condition, and outputting a predefined underflow value responsive to determining the underflow condition; and responsive to the ATE not exceeding the predefined maximum value and the ATE not being less than the predefined minimum value, converting the input value to an output value represented by c 2 ×b 2 m , wherein c 2 is a converted coefficient of the output value in a converted base b 2 and m is an exponent of the output value.