Patent ID: 6888906

Claim:
A clock and data regenerator: a first sampling flip-flop having a data input for receiving a data signal, having a clock input for receiving a first clock signal having a clock period corresponding to a duration of two bits of the data signal, and having an output; a second sampling flip-flop having a data input for receiving the data signal, having a clock input for receiving a second clock signal which is phase-shifted by 180Â° with respect to the first clock signal, and having an output; a third sampling flip-flop serving as a reference sampling flip-flop, the third sampling flip-flop having a data input for receiving the data signal, having a clock input for receiving a third clock signal which is phase-shifted by 90Â° with respect to at least one of the first and second clock signals, and having an output; a fourth sampling flip-flop serving as a reference sampling flip-flop, the fourth sampling flip-flop having a data input for receiving the data signal, having a clock input for receiving a fourth clock signal which is phase-shifted by 180Â° relative to the third clock signal, and having an output; a first EXOR element having a first input connected to the output of the first sampling flip-flop, having a second input connected to the output of the third sampling flip-flop, and having an output; a second EXOR element having a first input connected to the output of the second sampling flip-flop, having a second input connected to the output of the third sampling flip-flop, and having an output; a third EXOR element having a first input connected to the output of the second sampling flip-flop, having a second input connected to the output of the fourth sampling flip-flop, and having an output; a fourth EXOR element having a first input connected to the first sampling flip-flop, having a second input connected to the output of the fourth sampling flip-flop, and having an output; an addition and comparison circuit for combining the output of the first EXOR element with the output of the third EXOR element to produce a first result, for combining the output of the second EXOR element with the output of the fourth EXOR element to produce a second result, and for comparing the first and second results to produce a phase regulating signal which is then filtered; and an oscillator, wherein the filtered phase regulating signal controls a frequency of the oscillator.