Patent ID: 8350271

Claim:
A transistor, comprising: an electrically-conductive substrate; a grounding metallization layer disposed on a bottom surface of the electrically-conductive substrate; a first transistor electrode disposed over a top surface of the electrically-conductive substrate; an electrically-conductive shallow trench electrically connecting the first transistor electrode to the grounding metallization layer by way of the electrically-conductive substrate; and one or more stacked epitaxial layers disposed over the electrically-conductive substrate, wherein the first transistor electrode is disposed over the one or more stacked epitaxial layers, wherein the electrically-conductive substrate comprises a lower portion of relatively high electrical conductivity and an upper portion of relatively low electrical conductivity, and wherein the electrically-conductive shallow trench extends through the one or more stacked epitaxial layers and through the upper portion to the lower portion of the substrate.