Patent ID: 7005316

Claim:
A method of fabricating a stacked multidie assembly, the method comprising: securing at least one semiconductor die to one side of a first interposer substrate; securing at least one semiconductor die to one side of a second interposer substrate; electrically connecting the first and second interposer substrates with a first plurality of conductive elements extending transversely from the first interposer substrate to the second interposer substrate and with no semiconductor dice disposed between the first and second interposer substrates; introducing a flowable dielectric material between the first and second interposer substrates and substantially encapsulating the first plurality of conductive elements; electrically connecting one of the first and second interposer substrates to a carrier substrate with a second plurality of conductive elements extending transversely therebetween; and introducing a flowable dielectric material between the one of the first and second interposer substrates and the carrier substrate and substantially encapsulating the second plurality of conductive elements.