Patent ID: 6958713

Claim:
A modulation apparatus for generating a channel-bit sequence from an input bit sequence and generating an output code sequence from the channel-bit sequence, the modulation apparatus comprising: digital sum value (DSV) control bit generating means for generating a DSV control bit that is inserted in the input bit sequence in order to control a DSV of the output code sequence; DSV-control-bit inserting means for inserting the DSV control bit generated by the DSV-control-bit generating means at a predetermined position of the input bit sequence; and modulating means for modulating a post-insertion bit sequence, obtained by inserting the DSV control bit into the input bit sequence, into the channel-bit sequence based on a conversion rule of a variable-length code (d, k; m, n; r); and a synchronization-signal inserting unit for inserting a predetermined synchronization signal at a predetermined position of the channel-bit sequence supplied from the modulating means, wherein the DSV-control-bit generating means comprises: modulation-delimiter detecting means for detecting a modulation delimiter that serves as a delimiter for conversion of the variable-length code; and valid-delimiter detecting means for detecting a valid delimiter for controlling timing for determining a value of the DSV control bit, based on the modulation delimiter detected by the modulation-delimiter detecting means.