Patent ID: 7177307

Claim:
A protocol data unit switching method used for the selective interconnection of a transmitter port and a plurality of receiver ports selected from among at least two receiver ports by means of at least one internal bus, said protocol data units being constituted by at least one elementary piece of data, wherein the method comprises: a synchronization mechanism defining time slots, called connection cycles, on said internal bus; a mechanism for the allocation of at least one of said connection cycles to each of the selected receiver ports; and a mechanism for the writing of at least one piece of elementary data in the allocated connection cycle or cycles so as to enable the broadcasting of the protocol data unit to said selected receiver ports, wherein said writing mechanism comprises a verification step determining whether all the elementary pieces of data constituting a current protocol data unit have been received by each of the selected receiver ports, and wherein writing of at least one elementary piece of data belonging to another protocol data unit to any one of the selected receiver ports is blocked until all the selected receiver ports have received all the elementary pieces of data constituting the current protocol data unit.