Patent ID: 8549181

Claim:
A method of operating a semiconductor memory device connected with a first master group including at least one first master and a second master group including at least one second master through a data bus, the method comprising: receiving, by the memory device, a timeout index signal from a first master of the first master group, wherein the timeout index signal indicates whether a residual capacity of a data buffer of the first master exceeds a threshold; selecting, by the memory device, one of first and second timeout values defined for the first master based on the timeout index signal, wherein the selected timeout value is different from a third timeout value selected by the memory device for the second master of the second group among the third timeout value and a fourth timeout value defined for the second master; counting, by the memory device, until one of the selected timeout value for the first master and the third timeout value for the second master is reached first; and assigning a first command from the first master of commands stored in a queue of the memory device a higher execution priority than a second command from the second master of the commands stored in the queue of the memory device if the selected timeout value for the first master is reached first and assigning the second command a higher execution priority than the first command otherwise.