Patent ID: 8012832

Claim:
A process, comprising: forming a drain semiconductor layer on a semiconductor substrate of a first type of conductivity; forming a surface semiconductor layer on the drain semiconductor layer; and forming body regions of a second type of conductivity in the surface semiconductor layer, the forming the drain semiconductor layer including: forming a first semiconductor layer of the first type of conductivity and of a first value of resistivity, the first semiconductor layer having a thickness; forming in the first semiconductor layer first sub-regions of the second type of conductivity using a first selective implant step with a first implant dose, the body regions being aligned with the first sub-regions; forming in the first semiconductor layer second sub-regions of the first type of conductivity using a second implant step with a second implant dose; and forming, from the first sub-regions, electrically continuous first column regions aligned and in electric contact with said body regions, respectively, the first column regions being formed by carrying out a thermal diffusion process, said first column regions being formed with a maximum width that is less than the thickness of the first semiconductor layer and being spaced apart from the semiconductor substrate, the first column regions having portions of elongated, substantially elliptical shape and having an alternating dopant concentration profile.