Patent ID: 7750695

Claim:
A phase-locked loop system comprising: phase frequency detector circuitry configured to generate an up signal and a down signal based on a phase difference between an input signal and a feedback signal; charge pump circuitry including: a first current mirror circuitry, a second current mirror circuitry, programmable current mirror circuitry configured to receive a reference current and a digital signal and to output an adjusted reference current to the first current mirror circuitry based on the reference current and the digital signal; and leakage compensation circuitry configured to mirror a leakage current in the programmable current mirror circuitry and to cancel the leakage current appearing at the output of the programmable current mirror, the charge pump circuitry configured to generate a charge pump output signal based on the up signal and the down signal; loop filter circuitry configured to generate a filtered control signal based on the charge pump output signal; and voltage controlled oscillator circuitry configured to generate the feedback signal based on the filtered control signal.