Patent ID: 7860914

Claim:
A computer system comprising: memory units configured to store infinite, infinitesimal, and finite numbers; new arithmetical logical units (NALU) configured to execute arithmetical operations with said infinite, infinitesimal, and finite numbers; wherein said infinite, infinitesimal, and finite numbers are of a form C=c L □ P L + . . . +c 1 □ P 1 , p L > . . . >p 1 (16) wherein C represents an infinite, infinitesimal, or finite number, radices □ represent infinite numbers, symbols c i represent grossdigits, and symbols p i represent grosspowers, and 1≦i≦L; wherein each said grossdigit c i is an infinite number of said form 16, an infinitesimal number of said form 16, or a finite number of said form 16, and each said grosspower p i is an infinite number of said form 16, an infinitesimal number of said form 16, or a finite number of said form 16; said memory units storing said number C of said form 16 by utilizing at least a first series of registers and at least a second series of registers; said first series of registers storing said grossdigits c i , said second series of registers storing said grosspowers p i ; said first series of registers being linked to said second series of registers by pointers; said first series of registers containing a pointer to an address for each infinite or infinitesimal grossdigit, wherein each said infinite or infinitesimal grossdigit is of said form 16 and is stored in said memory units in the same manner as said number C; and said second series of registers containing a pointer to an address for each infinite or infinitesimal grosspower, wherein each said infinite or infinitesimal grosspower is of said form 16 and is stored in said memory units in the same manner as said number C.