Patent ID: 7078958

Claim:
An Integrated Circuit comprising: a first closed-loop circuit having a first voltage gain stage and adapted to generate a first current having a positive temperature coefficient and a size I 1 ; a second closed-loop circuit having a second voltage gain stage and adapted to generate a second current having a negative temperature coefficient and a size I 2 ; a first output stage adapted to generate a third current and a fourth current, wherein the third current has a temperature coefficient that is substantially the same as the temperature coefficient of the first current and a size I 3 that is equal to K 1 *I 1 , wherein the fourth current has a temperature coefficient that is substantially the same as the temperature coefficient of the second current and has a size I 4 that is equal to K 2 *I 2 , said first output stage further adapted to add the third and fourth currents and pass the added currents through a first output resistor disposed in the first output stage, wherein each of K 1 and K 2 is a positive number and each is selected such that an output voltage generated across the output resistor has a nearly zero temperature coefficient, wherein each of the first and second voltage gain stages is an operational amplifier, wherein the first current flows through a first node coupled to a positive input terminal of the first operational amplifier and wherein a mirrored replica of the first current flows through a second node coupled to a negative input terminal of the first operational amplifier and wherein the second current flows through a third node coupled to a positive input terminal of the second operational amplifier and wherein a mirrored replica of the second current flows through a fourth node coupled to a negative input terminal of the second operational amplifier.