Patent ID: 8368374

Claim:
A comparator-type DC-DC converter using a synchronous rectification method, the converter comprising: a voltage conversion unit which includes a switching element and generates an output voltage obtained by voltage-converting an input voltage by controlling the switching element according to a control signal; and a control unit generating the control signal for stabilizing the output voltage of the voltage conversion unit, the control unit including: a comparator detecting that the output voltage of the voltage conversion unit becomes smaller than a reference voltage; a trigger signal generation section generating a trigger signal when receiving an output signal from the comparator after having received a minimum off-time signal; a DLL section generating a reference delay clock which is a reference clock delayed by a reference delay amount and also generating a reference delay signal having a value corresponding to the reference delay amount; a delay section generating: a trigger delay signal which is delayed from the trigger signal output from the trigger signal generation section by a predetermined delay amount; a first dead time delay signal which is delayed from the trigger delay signal by a delay amount corresponding to a desired first dead time; an on-time delay signal which is delayed from the first dead time delay signal by a delay amount corresponding to a desired on-time; a second dead time delay signal which is delayed from the on-time delay signal by a delay amount corresponding to a desired second dead time; and a minimum off-time delay signal which is delayed from the second dead time delay signal by a delay amount corresponding to a desired minimum off-time, according to the reference delay signal from the DLL section; and a timing control section: determining an end time point of an off-pulse in the control signal according to the trigger delay signal from the delay section; determining a start time point of an on-pulse in the control signal according to the first dead time delay signal from the delay section; determining an end time point of the on-pulse according to the on-time delay signal from the delay section; determining a start time point of the off-pulse according to the second dead time delay signal from the delay section; and generating the minimum off-time signal according to the minimum off-time delay signal from the delay section.