Patent ID: 8749274

Claim:
A level sensitive comparing device, comprising: a first comparator, arranged for comparing an input signal with a first reference level to generate a first comparison signal; a second comparator, arranged for comparing the input signal with a second reference level to generate a second comparison signal, wherein the second reference level is different from the first reference level; and a determination circuit, coupled to the first comparator and the second comparator, arranged for determining whether the first comparison signal is allowed to appear at an output of the level sensitive comparing device according to at least the first comparison signal and the second comparison signal, wherein the determination circuit is composed of digital components only, wherein the determination circuit further comprises: a first sampling circuit, coupled to the second comparator, arranged for sampling the second comparison signal to generate a first sampled signal based on an edge of a triggering signal derived from the first comparison signal; and a logic circuit, coupled to the first sampling circuit, arranged for determining whether to allow the first comparison signal to appear at the output of the level sensitive comparing device according to the first sampled signal; wherein the first sampled signal has a first level when the input signal maintains beyond the second reference level for the certain period after the input signal rises higher than the first reference level; otherwise the first sampled signal has a second level.