Patent ID: 7342309

Claim:
A semiconductor device comprising: a die pad; a first semiconductor chip placed on the die pad, the first semiconductor chip having an upper surface, a lower surface, a first side and an opposite second side, with a first electrode pad being provided along the first side on the upper surface, a second electrode pad being formed along the second side on the upper surface, and a third electrode pad being formed along the second electrode pad on the upper surface and electrically connected with the first electrode pad; a second semiconductor chip having the same configuration as the first semiconductor chip, the third electrode pad of the second semiconductor chip being electrically connected to the third electrode pad of the first semiconductor chip, the second semiconductor chip being placed on the first semiconductor chip such that the first side of the second semiconductor chip protrudes from the first side of the first semiconductor chip, and such that the second and third electrode pads of the first semiconductor chip are exposed; a third semiconductor chip having the same configuration as the first semiconductor chip; a spacer mounted between the second and third semiconductor chips such that the first, second and third electrode pads of the second semiconductor chip are exposed; a first external terminal electrically connected to the second electrode pads of the first and third semiconductor chips; a fourth semiconductor chip having the same configuration as the first semiconductor chip, the third electrode pad of the fourth semiconductor chip being electrically connected to the third electrode pad of the third semiconductor chip, the fourth semiconductor chip being placed on the third semiconductor chip such that the first side of the fourth semiconductor chip protrudes from the first side of the third semiconductor chip and such that the second and third electrode pads of the third semiconductor chip are exposed; a second external terminal electrically connected to the first electrode pads of the second and fourth semiconductor chips; and a resin material for entirely sealing the first, second, third and fourth semiconductor chips, the die pad and the spacer, and for partly sealing the first and second external terminals.