Patent ID: 8372741

Claim:
A method of making a microelectronic package comprising: a) feeding a metal wire segment having a predetermined length out of a capillary of a bonding tool; b) using the bonding tool to bond a portion of the metal wire to a conductive element exposed at a first surface of a substrate, thereby forming a base of a wire bond on the conductive element; c) clamping a portion of the wire within the bonding tool; d) cutting the metal wire at a location between the clamped portion and the base portion to at least partially define an end surface of the wire bond, an edge surface of the wire bond being defined between the base and the end surface; e) repeating steps (a) through (d) to form a plurality of wire bonds to a plurality of the conductive elements of the substrate; and f) then forming a dielectric encapsulation layer overlying the surface of the substrate, wherein the encapsulation layer is formed so as to at least partially cover the surface of the substrate and portions of the wire bonds, such that unencapsulated portions of the wire bonds are defined by a portion of at least one of an end surface or of an edge surface thereof that is uncovered by the encapsulation layer, wherein at least one microelectronic element overlies the first surface of the substrate, wherein the substrate has a first region and a second region, the at least one microelectronic element being located within the first region, the conductive elements being located within the second region and being electrically connected to the at least one microelectronic element, and wherein the dielectric encapsulation layer is formed overlying the first surface of the substrate in at least the second region thereof.