Patent ID: 7439082

Claim:
A method of making a plurality of conductive memory devices, each conductive memory device operable to be reversibly placed in multiple resistive states, the method comprising: sputtering a bottom electrode layer; sputtering a multi-resistive state element layer, the multi-resistive state element layer including a conductive perovskite; sputtering a top electrode layer; depositing a hard mask layer; photo lithographically patterning the hard mask layer and the top electrode layer such that the patterned top electrode and hard mask have a first cross sectional area; depositing a dielectric material; etching the dielectric anisotropically to create a sidewall spacer at the edges of the top electrode; etching the multi-resistive state element layer and the bottom electrode layer using the hard mask such that the etched bottom electrode and multi-resistive state element have a second cross sectional area that is larger than the first cross sectional area; and wet etching the multi-resistive state element layer, wherein the wet etching is performed after the etching of the multi-resistive state element layer, the etching of the multi-resistive state element layer forming multi-resistive state element sides, and wherein the wet etching of the multi-resistive state element removes a thickness of 50-150 Å, thereby forming an undercut from the multi-resistive state element sides.