Patent ID: 7538601

Claim:
A step-up voltage generator for a semiconductor memory, comprising: a level detection unit configured to compare a reference voltage with a division voltage of a pumping voltage, detect a level of the pumping voltage according to the comparison result, and generate a level detection signal; a bank-active command generator configured to generate bank-active signals in response to a row-active command signal; an oscillation signal generator configured to generate pulse signals in response to the bank-active signals, and generate oscillation signals in response to the pulse signals or the level detection signal; and an active-voltage UP converter configured to pump a power-supply voltage in response to the oscillation signals, and generate a step-up voltage, wherein the oscillation signals are enabled when the bank-active signals are enabled or the level detection signal is enabled, wherein the oscillation signal generator includes: a pulse generator configured to generate pulse signals in response to the bank-active signals; a first logic circuit configured to perform a NAND operation in response to the bank-active signals and the level detection signal; and a second logic circuit configured to perform a NAND operation in response to output signals of the first logic circuit and the pulse generator.