Patent ID: 8384441

Claim:
A semiconductor integrated circuit comprising: a first reception terminal and a second reception terminal receiving a differential signal; a squelch circuit which has a first noninverting input terminal and a first inverting input terminal, which compares differential amplitude between a signal which is input to the first noninverting input terminal and a signal which is input to the first inverting input terminal with a preset threshold, and which outputs a signal depending upon a result of the comparison; a first switch circuit which brings about conduction between the first reception terminal and the first noninverting input terminal when it is switched to an on-state, and which brings about insulation between the first reception terminal and the first noninverting input terminal when it is switched to an off-state; a second switch circuit which brings about conduction between the second reception terminal and the first inverting input terminal when it is switched to an on-state, and which brings about insulation between the second reception terminal and the first inverting input terminal when it is switched to an off-state; a third switch circuit which brings about conduction between the first reception terminal and the first inverting input terminal when it is switched to an on-state, and which brings about insulation between the first reception terminal and the first inverting input terminal when it is switched to an off-state; a fourth switch circuit which brings about conduction between the second reception terminal and the first noninverting input terminal when it is switched to an on-state, and which brings about insulation between the second reception terminal and the first noninverting input terminal when it is switched to an off-state; and a pattern generator which is adapted to generate a test pattern signal, wherein at time of test operation of the squelch circuit, in a state in which a first DC voltage is applied to the first reception terminal and a second DC voltage which is different from the first DC voltage is applied to the second reception terminal, the first switch circuit and the second switch circuit are controlled to be synchronized to each other in on/off and the third switch circuit and the fourth switch circuit are controlled to be synchronized in on/off and be complementary in on/off to the first and second switch circuits, wherein on/off of the first to fourth switch circuits are controlled on the basis of the test pattern signal.