Patent ID: 8154636

Claim:
An image enhancement circuit, comprising: an input interface, which is operative to accept a stream of input pixel values belonging to pixels of an input image, which comprises a plurality of different input sub-images comprising respective subsets of the pixels, such that the input pixel values of the pixels in the different input sub-images are interleaved in the stream; a plurality of filter cells, which are connected in a two-dimensional array configuration and are arranged to separately filter the input pixel values of each of the input sub-images with respective two-dimensional deconvolution kernels so as to produce respective output sub-images comprising output pixel values; wherein each of the plurality of filter cells comprises a circuit element; wherein each of the circuit elements provides an output, and wherein the image enhancement circuit comprises an adder that sums the outputs; and a multiplexer, which is coupled to multiplex together the output pixel values of the output sub-images so as to produce a filtered output image.