Patent ID: 7260770

Claim:
A method of block puncturing for turbo code based incremental redundancy, the method comprising the steps of: coding an input data stream into systematic bits and parity bits; loading the systematic bits and parity bits into respective systematic and parity block interleavers in a column-wise manner; selecting a redundancy; and outputting bits from the block interleavers in a row-wise manner in accordance with the selected redundancy; and further comprising the step of selecting a coding rate dependant upon available symbol memory as defined by the equation N P , max_row = min ⁡ ( [ N S ⁢ ⁢ M ⁢ ⁢ L 2 × N C ⁢ ⁢ B × N c ⁢ ⁢ o ⁢ ⁢ l × N ARQ_proc - N r ⁢ ⁢ o ⁢ ⁢ w 2 × N C ⁢ ⁢ B - N t ⁢ ⁢ a ⁢ ⁢ i ⁢ ⁢ l 2 × N c ⁢ ⁢ o ⁢ ⁢ l × N C ⁢ ⁢ B ] , N r ⁢ ⁢ o ⁢ ⁢ w ) where N p,max — row the maximum number of rows in the parity block interleaver that can be transmitted, N SML is the total number of Soft Metric Locations provisioned at the user equipment, N CB is the number of code blocks, N col is the number of columns in the parity block interleaver, N row is the number of rows in the parity block interleaver, N tail is the number of tail bits per code block, N ARQ — PROC is the number of ARQ processes currently defined in the user equipment, and given that the size of the systematic block interleaver is substantially fixed.