Patent ID: 6919606

Claim:
A semiconductor device comprising: a semiconductor layer of a first conductive type formed in an active region; a first gate electrode formed on the semiconductor layer via a gate insulating film in a predetermined pattern and having an end portion arranged in the active region; a first insulating mask formed on at least a part of the first gate electrode and a part of the semiconductor layer, said first insulating mask being arranged on said end portion of the first gate electrode and on the semiconductor layer to cross the active region along a gate length direction of the first gate electrode; a pair of first diffusion regions of a second conductive type formed in the active region not covered with the first insulating mask and the first gate electrode, said pair of first diffusion regions being positioned adjacent to the first gate electrode and being used as a source and drain; and a spacer formed in a region where the first insulating mask is not formed, and only on a sidewall of the first gate electrode, said spacer being formed of a same material as the first insulating mask.