Patent ID: 7829394

Claim:
A manufacturing method of a semiconductor device comprising: forming a semiconductor film over a substrate; forming a gate insulating film over the semiconductor film; forming a gate electrode selectively over the semiconductor film with the gate insulating film interposed therebetween; forming selectively a first resist to cover a portion of the gate electrode and a portion of the semiconductor film, and then forming a first impurity region selectively in the semiconductor film by adding a first impurity element selectively to the semiconductor film using the first resist as a first mask, wherein the first impurity region is in direct physically contact with a portion of the semiconductor film which is located directly under the first resist; removing the first mask; forming a second impurity region selectively in the semiconductor film by adding a second impurity element selectively to the semiconductor film using the gate electrode as a second mask; forming side wall spacers adjacent to sides of the gate electrode; forming a second resist to cover a portion of the gate electrode and a portion of the semiconductor film, and forming a third impurity region selectively by adding a third impurity element selectively to the semiconductor film using the second resist as a third mask, after forming the side wall spacers; forming an insulating film over the gate electrode and the gate insulating film; and forming a conductive film over the insulating film, wherein the conductive film is electrically connected with the semiconductor film.