Patent ID: 7075545

Claim:
A graphics system, comprising a graphics chip having graphics processing circuitry and an embedded frame buffer for storing frame data prior to sending the frame data to an external location, wherein the embedded frame buffer is selectively configurable between the following pixel formats: RGB8 and 24 bit Z; RGBA6 and 24 bit Z; Three R5G6B5 color and 16 bit Z super-samples; and YUV 4:2:0; wherein in the YUV 4:2:0 configuration, a color buffer of the embedded frame buffer is partitioned to store 720Ã—576 Y, 360Ã—288 U and 360Ã—288 V image planes for a YUV 4:2:0 frame and further, wherein the color buffer partitioning allocates as follows: 1024Ã—640 8 bit Y image; 528Ã—320 8 bit U image; and 528Ã—320 8 bit V image.