Patent ID: 7595523

Claim:
A transistor comprising: a pillar of semiconductor material arranged in a racetrack-shaped layout having a substantially linear section that extends in a first lateral direction and rounded sections at each end of the substantially linear section of the racetrack-shaped layout, a source region of a first conductivity type being disposed at or near a top surface of the pillar, and a body region of a second conductivity type being disposed in the pillar beneath the source region; first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; first and second gate members respectively disposed in the first and second dielectric regions at or near the top surface of the pillar adjacent the body region, the first and second gate members being separated from the body region by a gate oxide having a first thickness in the substantially linear section of the racetrack-shaped layout, the gate oxide having a second thickness at the rounded sections, the second thickness being substantially larger than the first thickness.