Patent ID: 7462565

Claim:
A method of manufacturing a semiconductor device comprising: preparing a first interlayer insulator film including copper wiring and supported by a semiconductor substrate; forming an insulating film on said copper wiring; forming a second interlayer insulator film on said insulating film; forming a via hole in said second interlayer insulator film, said via hole including a first opening reaching said insulating film; etching said insulating film at the bottom of said first opening in a first plasma discharge within a gas mixture including fluorine and thereby forming a second opening reaching said copper wiring; after said first plasma discharge is once extinguished, and before exposing said second opening to the atmosphere, treating said copper wiring at the bottom of said second opening with a second plasma discharge, thereby removing contamination, including a polymer containing fluorine, from said copper wiring; and during treating said copper wiring with said second plasma discharge, applying a bias power between a first electrode supporting said semiconductor substrate and a second electrode, opposite said first electrode, with said semiconductor substrate between said first and second electrodes, and maintaining surface temperature of said first electrode at no more than 25° C.