Patent ID: 8507985

Claim:
A semiconductor device, comprising: a semiconductor layer; a first base region of a first conductivity type selectively provided on a surface of the semiconductor layer; a first source region of a second conductivity type selectively provided on a surface of the first base region; a second base region of the first conductivity type selectively provided on the surface of the semiconductor layer spaced from the first base region; a second source region of a second conductivity type selectively provided on a surface of the second base region; a back gate region of the first conductivity type provided on the surface of the second base region adjacent to the second source region; a drift region of the second conductivity type sandwiched between the first base region and the second base region and selectively provided on the surface of the semiconductor layer; a drain region of the second conductivity type selectively provided on a surface of the drift region; a first insulating region provided to an interior from the surface of the drift region and facing the first base region via a portion of the drift region disposed; a second insulating region provided to the interior from the surface of the drift region and facing the second base region via a portion of the drift region disposed, the drain region being sandwiched between the first insulating region and the second insulating region; a first gate oxide film provided on the surface of the first base region; a second gate oxide film provided on the surface of the second base region; a first gate electrode provided on the first base region and the drift region via the first gate oxide film; a second gate electrode provided on the second base region and the drift region via the second gate oxide film; a first main electrode connected to the first source region, the second source region, and the back gate region; and a second main electrode connected to the drain region, a distance between the first base region and the first insulating region being not more than 1.8 μm, the first base region facing the first insulating region via a portion of the drift region and the distance between the first base region and the first insulating region being shorter than a distance between the second base region and the second insulating region, the first base region facing the first insulating region via a portion of the drift region, the second base region facing the second insulating region via a portion of the drift region.