Patent ID: 7447696

Claim:
A subcode-data generating circuit, which generates subcode data including subcode component data which indicates time information and additional subcode component data which indicates information other than the time information, said circuit comprising: a first generating portion for automatically generating the subcode component data which indicates the time information; a second generating portion for automatically generating the additional subcode component data which indicates the information other than the time information; a selecting portion which selects an output of at least one of said first and second generating portions; and a memory, wherein said first generating portion operates according to a first command for automatic generation of a plurality of time information subcode component data, wherein said second generating portion operates according to a second command for automatic generation of a plurality of additional subcode component data, and wherein the first commands are written collectively in a first area of said memory, and the second commands are written collectively in a second area of said memory, and wherein each of said first commands written in said memory includes specification of a corresponding number of generation cycles.