Patent ID: 8014163

Claim:
A package module for a memory IC chip, comprising: a ground pad; a plurality of lower contact pads, distributively provided on the periphery of the ground pad without electrically contacting one another; at least a first memory IC chip, stacked on an upper side of the ground pad, an upper surface of the at least a first memory IC chip being provided with a plurality of first solder pads, each of the plurality of first solder pads being electrically connected to one of the plurality of lower contact pads via one of a plurality of golden lines; a plurality of lead frames, each being correspondingly soldered to one of the plurality of lower contact pads; a plurality of upper contact pads, each being correspondingly soldered to one of the plurality of lead frames; and a molding layer, for packaging and enclosing the ground pad, the plurality of lower contact pads, the at least a first memory IC chip, the plurality of lead frames and the plurality of upper contact pads, and curing the same, wherein a lower surface of the molding layer further exposes the plurality of lower contact pads and an upper surface of the molding layer further exposes the plurality of upper contact pads.