Patent ID: 8879598

Claim:
A device comprising: a short period superlattice (SPSL) semiconductor layer comprising a plurality of barriers, wherein a composition of at least one barrier varies along lateral dimensions of the at least one barrier such that a lateral cross section of the at least one barrier includes: a set of transparent regions having a first characteristic band gap, wherein the set of transparent regions are at least ten percent of an area of the lateral cross section of the at least one barrier; and a set of higher conductive regions having a second characteristic band gap at least five percent smaller than the first characteristic band gap, wherein the set of higher conductive regions occupies a sufficient area of the area of the lateral cross section of the at least one barrier to keep a voltage drop across the SPSL within a target range, and wherein lateral inhomogeneities in at least one of: the composition or a doping of the at least one barrier forms the set of transparent regions and the set of higher conductive regions.