Patent ID: 7960822

Claim:
A package on package substrate, comprising: a bottom package substrate, an electronic element mounted on the bottom package substrate, a bottom pad part and a solder resist part corresponding to the bottom pad part being formed on an upper surface of the bottom package substrate; and a top package substrate being stacked on an upper side of the bottom package substrate by interposing a solder between the top package substrate and the bottom package substrate, a top pad part corresponding to the bottom pad part formed on a lower surface of the top package substrate, wherein the bottom pad part comprises a first pad formed on the upper surface of the bottom package substrate, and a second pad being formed on an upper surface of the first pad such that the second pad makes contact with the solder, and the solder resist part comprises a first solder resist layer being formed on the upper surface of the bottom package substrate corresponding to the first pad, and a second solder resist layer being shaped like a dam enveloping the electronic element and being formed on the first solder resist layer such that the second pad is exposed.