Patent ID: 7557389

Claim:
A field-effect transistor, comprising: a semi-insulating substrate; an epitaxial channel layer of a III-V compound semiconductor material free of aluminum and supported by the semi-insulating substrate; an epitaxial gate contact layer, on and in contact with the channel layer, of a III-V compound semiconductor material which contains aluminum and has a dopant concentration not exceeding 1×10 16 cm −3 ; an epitaxial gate buried layer, located on and in contact with the gate contact layer, consisting of the III-V compound semiconductor material free of aluminum of the channel layer, having a thickness, and having a dopant concentration not exceeding 1×10 16 cm −3 , wherein the gate buried layer includes a recess entirely within the gate buried layer and extending only partially through the thickness of the gate buried layer, the recess including a bottom wall that is transverse to the thickness of the gate buried layer, and first side walls that are transverse to and join the bottom wall and that extend into the recess toward the gate contact layer, and a hole centrally located in the recess, extending from the bottom wall to and exposing a portion of the gate contact layer and including second side walls that are transverse to the bottom wall; and a gate electrode including a leg having a first portion in contact with the gate contact layer, filling the hole, and having a lower side wall in contact with the second side walls, and a second portion within the recess and having upper side walls spaced from the first side walls of the recess, and an upper portion, on the leg, spaced from the gate buried layer, and having a gate length longer than the leg and longer that the total width of the recess along the bottom wall between the first side walls.