Patent ID: 8093130

Claim:
A fabrication method for a semiconductor device, comprising: forming a gate electrode above a semiconductor substrate; forming a silicon layer on a top surface of a first region in the semiconductor substrate adjacent one side of the gate electrode, and on a top surface of a second region in the semiconductor substrate adjacent another side of the gate electrode, wherein the first region is wider than the second region in the first region-second region direction across the gate electrode; and forming, after forming the silicon layer by a selective epitaxial growth method, a first impurities diffusion region and a second impurities diffusion region by injecting impurities over the first region and the second region through the silicon layer, wherein the silicon layer is formed by the selective epitaxial growth method so that the height of an upper end portion of the silicon layer at the second region is higher than the height of an upper end portion of the silicon layer at the first region, and wherein by injecting the impurities, a depth of the second impurities diffusion region from the top surface of the semiconductor substrate is formed so as to be shallower than a depth of the first impurities diffusion region from the top surface of the semiconductor substrate.