Patent ID: 8841975

Claim:
A digitally controlled oscillator device comprising: first and second oscillation output nodes from which complementary oscillation output signals are output; coil elements coupled between the first oscillation output node and the second oscillation output node; capacitors units respectively having the same circuit configuration and substantially the same layout configuration, said each capacitor unit having a first capacitive element, a first switch and a second capacitive element coupled in series in order between first and second nodes; and a negative resistance generating circuit which generates a negative resistance between the first oscillation output node and the second oscillation output node, wherein a part of the capacitor units configures a first capacitor bank as first capacitor units; wherein another part of the capacitor units configure a second capacitor bank; wherein the first node of each of the first capacitor units is coupled to the first oscillation output node, and the second node of each thereof is coupled to the second oscillation output node, respectively; wherein the second capacitor bank includes capacitor blocks comprising N (where N: integer greater than or equal to 2) capacitor units, said each capacitor block including a second capacitor unit being one of the N capacitor units, and (N−1) third capacitor units being other than the second capacitor unit; wherein the first node of the second capacitor unit is coupled to the first oscillation output node, and the second node thereof is coupled to the second oscillation output node, respectively; wherein the first and second nodes of the (N−1) third capacitor units are coupled to an AC ground power supply voltage; wherein a node on the first switch side, of the first capacitive element in the second capacitor unit is coupled in common to a node on the first switch side, of the first capacitive element in each of the (N−1) third capacitor units; wherein a node on the first switch side, of the second capacitive element in the second capacitor unit is coupled in common to a node on the first switch side, of the second capacitive element in each of the (N−1) third capacitor units, and wherein the first switches in the second capacitor unit and the (N−1) third capacitor units are controlled in common in on/off operations.