Patent ID: 8264652

Claim:
A liquid crystal display device, comprising: a gate line provided on a substrate; a data line crossing the gate line with a gate insulating film to define a pixel area; a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode opposed to the source electrode and a semiconductor layer for defining a channel between the source electrode and the drain electrode; a common line provided in parallel to the gate line on the substrate; a common electrode extended from the common line into the pixel area; a pixel electrode extended from the drain electrode into the pixel area in such a manner as to overlap the common electrode with the gate insulating film; an alignment film coated on the substrate including the data line; a color filter substrate joined to the substrate by a sealant, wherein the gate line and the common line are formed of a first conductive layer group having at least double conductive layers formed on the substrate, and the common electrode is formed by an extension of the lowermost layer of the common line; and wherein the data line, the source electrode and the drain electrode are formed of a second conductive layer group having at least double conductive layers, and the pixel electrode is formed by an extension of the lowermost layer of the drain electrode; a gate pad connected to the gate line; a data pad connected to the data line via a data link, the data link formed of the first conductive layer group extended from a lower electrode of the data pad to have a portion thereof overlapped with and directly in contact with the data line; a common pad connected to the common line, wherein each of the gate pad, the data pad and the common pad includes: a lower pad electrode formed of the first conductive layer group; a first contact hole passing through the gate insulating film to expose the lower pad electrode; and an upper pad electrode connected to the lower pad electrode via the first contact hole and formed of the lowermost layer of the second conductive layer group; a second contact hole passing through the gate insulating film to expose the data link to the data line; wherein the alignment film is positioned within an area sealed by the sealant to be not in contact with the sealant.