Patent ID: 7727908

Claim:
A method of forming a gate dielectric, comprising: exposing a substrate surface at a temperature between 250° C. to 350° C. to a precursor material including zirconium tertiary-butoxide and trimethyl-aluminum simultaneously for a time period of between 0.3 to 2.0 seconds; exposing the substrate surface to at least one first purge material selected from hydrogen, helium, neon, nitrogen, and argon for a time period of between 1 to 5 seconds; exposing the substrate surface to at least one reactant material including water vapor, oxygen, hydrogen peroxide, ozone and nitrous oxide for a time period of between 0.5 to 5.0 seconds to form a first dielectric material having a thickness ranging from 0.1 to 0.2 nanometers and a formula of approximately ZrAlON; exposing the substrate surface to at least one second purge material selected from hydrogen, helium, neon, nitrogen, and argon for a time period of between 1 to 5 seconds to complete a first deposition cycle to form a first dielectric layer having a first thickness; and repeating the first deposition cycle to form additional dielectric layers having the first thickness until a final dielectric material thickness is obtained.