Patent ID: 7135932

Claim:
An apparatus comprising: a first transistor having a gate terminal, a drain terminal, and a source terminal; a first resistor having a first terminal and second terminal, wherein said first terminal of said first resistor is electrically connected to said gate terminal of said first transistor; a second transistor having a gate terminal, a drain terminal, and a source terminal, wherein said drain terminal of said second transistor is electrically connected to said source terminal of said first transistor; and a second resistor having a first and a second terminal, wherein said first terminal of said second resistor is electrically connected to said gate terminal of said second transistor, and wherein said second terminal of said second resistor is electrically connected to said drain terminal of said first transistor; wherein a first voltage connected to said second terminal of said first resistor is greater than a second voltage connected to said drain terminal of said first transistor by at least the gate-to-source threshold voltage of said first transistor.