Patent ID: 8216938

Claim:
A method for forming a semiconductor device comprising: forming a partition line pattern and a partition pad pattern connected to an end part of the partition line pattern over the semiconductor substrate; forming spacer insulation layers at sidewalls of the partition line pattern and the partition pad pattern; forming a gap-filling layer between the spacer insulation layers; forming a first cutting mask pattern to expose a connecting part between the partition line pattern and the partition pad pattern; removing the partition line pattern and the gap-filling layer adjacent to the spacer insulation layer using the first cutting mask pattern as a mask; forming a second cutting mask pattern including a first pattern and a second pattern, wherein the first pattern adjacent to a region exposed by the first cutting mask pattern and covers the gap-filling layer, the spacer insulation layer adjacent to the gap-filling layer, and some parts of the partition line pattern adjacent to the spacer insulation layer, and the second pattern covers the partition line pattern, the spacer insulation layer adjacent to the partition line pattern, and some parts of a gap-filling layer adjacent to the spacer insulation layer; and removing the spacer insulation layer using the second cutting mask pattern as a mask to form a gate trench in the substrate.