Patent ID: 8605176

Claim:
An analog-to-digital converter comprising: a sigma-delta modulator configured to sigma-delta modulate an input signal into a digital output signal in response to a clock signal; and an accumulator configured to accumulate the digital output signal at each cycle of the clock signal according to an analog-to-digital conversion time and output an accumulation result, wherein the accumulation result changes based on a change in at least a first parameter, the first parameter corresponding to a period of operation of the accumulator, the period of operation of the accumulator being the analog-to-digital conversion time, and the accumulation result changes based on a change in a number of clocks of the clock signal during the analog-to-digital conversion time, and a clock frequency of the clock signal is fixed and the analog-to-digital conversion time is varied to vary the number of clocks of the clock signals during the analog-to-digital conversion time.