Patent ID: 7758141

Claim:
A recording head comprising: a plurality of element arrays, each element array including a plurality of recording elements; a plurality of array circuits, each array circuit corresponding to a respective element array; an input terminal configured to input data, the data including image data and discrimination data; a wiring configured to commonly supply the data inputted in the input terminal to the plurality of array circuits, wherein each array circuit comprises a latch circuit and a decode circuit, the latch circuit configured to latch the discrimination data based on a latch signal and configured to latch the image data based on the latch signal and an output of the decode circuit, the decode circuit configured to decode the latched discrimination data and output a signal based on a result of decoding, wherein the discrimination data is data corresponding to an element array of the plurality of element arrays, and wherein the discrimination data is expressed by a bit number, the bit number being less than the number of array circuits.