Patent ID: 7250639

Claim:
An insulated gate bipolar transistor comprising: a first semiconductor layer of a first conductivity type having a first main surface and a second main surface opposite from said first main surface; a second semiconductor layer of a second conductivity type formed on an entire face of said first main surface of said first semiconductor layer; a plurality of first doped regions of said first conductivity type selectively formed in a main surface of said second semiconductor layer opposite from said first semiconductor layer without being connected to said first semiconductor layer; a collector electrode formed on said main surface of said second semiconductor layer to cover an entire surface of each of said first doped regions; and a plurality of structures each including a second doped region of said second conductivity type selectively formed in said second main surface of said first semiconductor layer without being connected to said second semiconductor layer, a third doped region of said first conductivity type selectively formed in a surface of said second doped region without being connected to said first semiconductor layer, a channel region defined in a portion of said surface of said second doped region which lies between said third doped region and said first semiconductor layer, an insulation film formed on said channel region, a gate electrode formed on said insulation film, and an emitter electrode connected to said second and third doped regions, wherein said plurality of first doped regions are formed in corresponding relation to and only under said channel regions of said structures, respectively.