Patent ID: 7778077

Claim:
A non-volatile memory system, comprising: a plurality of rewritable memory cells, where the memory cells each have a lifetime of a finite number of rewrite cycles; rewrite circuitry connectable to said memory cells whereby the memory cells can be rewritten; and control circuitry that maintains a parameter indicative of the number of rewrites the memory cells have undergone, determines an indication of the expected amount of remaining lifetime of the memory system based on the value of said parameter, and provides said indication of the expected amount of remaining lifetime to a host to which the memory is connected, wherein, subsequent to providing said indication of the expected amount of remaining lifetime to a host, said control circuitry monitors the usage pattern of the memory system during operating and revises the expected amount of remaining lifetime of the memory system based on said usage pattern, and wherein when the memory system is attached to a host, said monitoring the usage pattern is performed using a current time value from the host.