Patent ID: 7034580

Claim:
A capacitor charging circuit, comprising: a terminal for connecting a direct-current power source; a plurality of capacitors serially connected to one another; a plurality of parallel monitor circuits connected in parallel to the plurality of capacitors, each one of the plurality of parallel monitor circuits configured to apply a direct-current source voltage received from the terminal for connecting a direct-current power source to a corresponding one of the plurality of capacitors and configured to bypass a charge current of the corresponding one of the plurality of capacitors when a charge voltage of the corresponding one of the plurality of capacitors exceeds a predetermined reference voltage, wherein each parallel monitor circuit comprises: a reference voltage circuit configured to generate the predetermined reference voltage; a voltage detecting circuit configured to detect the charge voltage of the corresponding one of the plurality of capacitors; a comparator configured to compare the predetermined reference voltage with an output voltage from the voltage detecting circuit, the comparator further configured to be supplied with the direct-current source voltage from the terminal for connecting a direct-current power source; a bypass switching circuit configured to bypass the charge voltage under control in accordance with an output from the comparator; and a voltage limiter connected between the comparator and the bypass switching circuit and configured to limit a voltage applied to the bypass switching circuit, wherein the voltage limiter includes an N-channel field-effect transistor having a gate connected to the output from the comparator, a source connected to a negative side of the direct-current source voltage, and a drain connected to a positive side of the direct-current source voltage through a resistor.