Patent ID: 7386769

Claim:
A diagnosis method performed on a memory device for repair of the memory device, the memory device containing a plurality of memory cells, comprising: during a built-in self test (BIST), storing inside two arrays on the memory device information for use in a final diagnosis to apply redundancy resources to repair the memory device, wherein a first array is used to store addresses of memory words, where the addresses correspond to one or more detected defect memory cells and for each stored address of a memory word, further storing input/output line locations of the detected defect memory cells, and a second array with a plurality of entries is used to store the input/output line locations and control what information is stored in the first array, wherein a number of entries is determined based on an amount of available redundant resources; and activating redundancy resources based upon analysis of the information stored in the first array by generating a reference element from information stored in the first array, wherein the reference element indicates whether there are one or more of the detected defect memory cells associated with each address stored in the first array; generating difference elements based on information stored in the reference elements and information stored in the first array, wherein each difference element indicates a difference between said reference element and a column in the first array corresponding to an input/output line of the memory device; and selecting a difference element with a maximum number of zero value entries to indicate which addresses have to be stored inside redundant registers external to the memory device.