Patent ID: 7120894

Claim:
A method of mapping a logical expression to a logic circuit, the logical expression comprising a first product term and a second product term including n and m logic functions, respectively, wherein m is greater than n, the method comprising: placing a first multiple-input logic gate having at least n input terminals and an output terminal; connecting the input terminals of the first multiple-input logic gate to directly input the n logic functions of the first product term so that the first product term is output from the output terminal of the first multiple-input logic gate; placing a second multiple-input logic gate having less than m input terminals and an output terminal, and a first unit multiplexer having a first input terminal, a second input terminal to input a constant, a control terminal and an output terminal; connecting the first input terminal and the control terminal of the first unit multiplexer to input at least two of the m logic functions of the second product term; and connecting the input terminals of the second multiple-input logic gate to input the m logic functions of the second product term by inputting the at least two of the m logic functions through the output terminal of the first unit multiplexer so that the second product term is output from the output terminal of the second multiple-input logic gate.