Patent ID: 7323762

Claim:
A semiconductor package substrate with embedded resistors, comprising: an inner circuit board having a patterned first circuit layer thereon, the first circuit layer having a plurality of pairs of resistor electrodes; at least one patterned resistive material electrically connected to the resistor electrodes, wherein the at least one patterned resistive material is filled between each of the pairs of the resistor electrodes, respectively, and partially or completely covering the resistor electrodes; at least one patterned second circuit layer formed above the first circuit layer and spaced from the first circuit layer by an insulating layer; a plurality of plated through holes formed through the insulating layer, the patterned circuit layers and the inner circuit board, and electrically connected to the patterned first and second circuit layers and an electrode of the pair of resistor electrodes; and a plurality of conductive vias formed In the insulating layer and electrically connected to the other electrode of the pair of resistor electrodes.