Patent ID: 8782367

Claim:
A circuit for controlling access to at least one memory area accessible by a program execution unit, comprising: an instruction address input to receive at least one instruction address, the at least one instruction address comprising a memory address for an executable instruction; at least one data address input to receive at least one data address from the program execution unit; at least one circuit component configured to take as input the at least one instruction address and the at least one data address and determine whether the at least one instruction address and the at least one data address fulfill one or more conditions set by at least one correlation function, the at least one circuit component comprising at least one storage component configured to store information representing the at least one correlation function, wherein: the information representing the correlation function establishes a correspondence between each instruction address range in a plurality of instruction address ranges and at least one corresponding data address range; each instruction address range in the plurality of instruction address ranges is associated with a particular program and the correspondence established by the information representing the correlation function indicates that the particular program is permitted to access the at least one data address range corresponding to the instruction address range; and the circuit is configured to, in response to the particular program being loaded for execution by the program execution unit, update the information stored in the at least one storage component so that the at least one correlation function maps the instruction address range associated with the particular program to the corresponding data address range; and at least one output of a value indicative of whether the at least one instruction address and the at least one data address fulfill the one or more conditions set by the at least one correlation function.