Patent ID: 7514776

Claim:
A printed circuit board assembly comprising: a first semiconductor die defining a first active surface; a second semiconductor die defining a second active surface; an intermediate substrate positioned between said first active surface of said first semiconductor die and said second active surface of said second semiconductor die such that a first surface of said intermediate substrate faces said first active surface and such that a second surface of said intermediate substrate faces said second active surface, wherein said first semiconductor die is electrically coupled to said intermediate substrate by at least one topographic contact extending from said first active surface to said first surface of said intermediate substrate, said second surface of said intermediate substrate includes a cavity defined therein, said intermediate substrate defines a passage there through, said second semiconductor die is secured to said second surface of said intermediate substrate within said cavity, and said second semiconductor die is electrically coupled to said intermediate substrate by at least one conductive line extending from said second active surface, through said passage defined in said intermediate substrate and to a conductive contact on said first surface of said intermediate substrate; and a capacitor positioned between said intermediate substrate and one of said first and second semiconductor dies, wherein said capacitor defines a thickness dimension that is no greater than a dimension defined by said first semiconductor die or said at least one topographic contact, and said capacitor is electrically coupled between high and low voltage inputs on at least one of said first and second semiconductor dies.