Patent ID: 7669156

Claim:
A computer-implemented method of performing static timing analysis by identifying timing paths in a digital network with timing delays dominated by a factor of interest, said method comprising: partitioning, by a computer, inputted timing delays in said digital network into a first partition of timing delays associated with a number of first timing paths and attributable to said factor of interest, and a second partition of timing delays associated with a number of second timing paths and attributable to other factors; multiplying, by said computer, said first partition of timing delays by a first weight and said second partition of timing delays by a second weight, wherein said first weight and said second weight differ; and determining, by said computer, an outputted relative timing delay between a weighted first partition of timing delays and a weighted second partition of timing delays, corresponding to a difference between said factor of interest in said first timing paths and said other factors in said second timing paths in said digital network, to effect said static timing analysis.