Patent ID: 7132330

Claim:
A process for producing a nonvolatile semiconductor memory device comprising a plurality of memory cells each having a floating gate formed on a semiconductor substrate with the interposition of a tunnel dielectric film and a control gate formed on said floating gate with the interposition of an interpoly dielectric film, and a plurality of field effect transistors each having gate electrodes formed on the semiconductor substrate with the interposition of a gate insulating film, said process comprising the steps of: forming a shallow groove isolation region on a semiconductor substrate; forming a tunnel dielectric film on the semiconductor substrate surface in said memory cell formed region by thermal oxidation method, depositing a first polycrystalline Si film which becomes said floating gate, and then removing the first polycrystalline Si film in said field effect transistor formed region; depositing a first silicon oxide film which becomes the first portion of said gate insulating film, and then removing the first silicon oxide film in said memory cell formed region; depositing a second silicon oxide film which becomes said interpoly dielectric film and a second portion of said gate insulating film; and depositing a second polycrystalline Si film which becomes said control gate and said gate electrodes.