Patent ID: 8105871

Claim:
A semiconductor device, comprising: a semiconductor element; a wiring board having an upper surface where the semiconductor element is provided and a lower surface facing the upper surface, the lower surface having an outside connection terminal is provided, the wiring board further including a conductive layer, the conductive layer being connected to the semiconductor element at the upper surface and connected to the outside connection terminal at the lower surface, the conductive layer being covered with a resist; sealing resin formed over the conductive layer and the semiconductor element; and reinforcing resin provided at least at a part of a boundary part between an external side surface of the sealing resin and the resist, the reinforcing resin being provided along a perimeter of the external side surface of the sealing resin but not extending over an upper surface of the sealing resin, wherein the sealing resin and the reinforcing resin are made of thermosetting epoxy resins containing a filler of 70 Wt % through 90 Wt %, and having a glass transition temperature of 100° C. through 195° C. and a linear expansion coefficient of 5×10 −6 K −1 through 20×10 −6 K −1 or 50×10 −6 through 100×10 −6 K −1 .