Patent ID: 8803242

Claim:
A semiconductor field effect device structure comprising: a source region and a drain region; a channel region between said source and drain regions; a semiconductor barrier region under said channel region; a dielectric layer extending over at least a portion of said channel region; a gate extending over said dielectric layer; wherein said gate is in physical contact with said dielectric layer; wherein said gate is at least partially overlapped with at least one of said source and drain regions; wherein said channel region has a dopant concentration less than about 5×10 16 cm −3 ; wherein said gate has a work-function substantially equal or greater than the sum of the electron affinity and half energy-gap of said channel region, when said semiconductor field effect device is a n-channel device; wherein said gate has a work-function substantially equal or lower than the sum of the electron affinity and half energy-gap of said channel region, when said semiconductor field effect device is a p-channel device, and wherein said semiconductor field effect device structure is an enhancement mode field effect device.