Patent ID: 7116373

Claim:
A deinterlacing apparatus comprising: a field buffer which receives and stores a plurality of consecutive interlaced fields, and then outputs, in response to a control signal, p-th interlaced line data of an m-th field, p-th interlaced line data of an (m+2)-th field, p-th interlaced line data of an (m+1)-th field, and (p+1)-th interlaced line data of the (m+1)-th field in series or the p-th interlaced line data of the (m+1)-th field, p-th interlaced line data of an (m+3)-th field, the p-th interlaced line data of the (m+2)-th field, and (p+1)-th interlaced line data of the (m+2)-th field in series; a shift buffer which receives signals output from the field buffer in series, converts the signals into parallel signals, and outputs first through fourth line data in parallel; a frame generator which receives the first through fourth line data from the shift buffer, senses motion between fields of the first through fourth line data between fields, and selectively outputs, as an output signal, a first result of temporally filtering adjacent line data or a second result of spatially filtering adjacent line data in response to the result of the motion sensing; and a line exchanger which receives the first line data of the shift buffer and the output signal of the frame generator and selectively exchanges the first line data with line data of the output signal of the frame generator in response to a line exchange signal, wherein the first line data are comprised of line data of the (m+1)-th field and line data of the (m+2)-th field which are repeatedly output.