Patent ID: 6927596

Claim:
A burn-in board for testing a plurality of integrated circuit devices placed in a like plurality of cells defining fixed locations in a processing tray, the burn-in board comprising: a substrate having an interface surface and at least one port defined in the substrate extending from the interface surface to another surface thereof, the at least one port being configured for coupling with a vacuum source, the substrate being sized and configured to enable application of a negative pressure between the substrate and the processing tray upon engagement of the substrate with the processing tray and application of vacuum through the at least one port; and a plurality of electrical contacts disposed on the interface surface in a plurality of groups, each group of electrical contacts located to correspond to a cell of the processing tray and arranged to correspond to a pattern of leads of an integrated circuit device of the plurality of integrated circuit devices disposed in the corresponding cell to respectively establish electrical contact with leads of each integrated circuit device of the plurality of integrated circuit devices placed in the processing tray in each of the cells.