Patent ID: 7560319

Claim:
A method for fabricating a semiconductor device comprising: forming an insulation layer structure on a single-crystalline silicon substrate having a first region and a second region, wherein the insulation layer structure comprises a plurality of layers having etch selectivities relative to one another; forming a first insulation layer structure pattern by etching a portion of the insulation layer structure, wherein the first insulation layer structure pattern comprises a first opening exposing at least a portion of a surface of the first region; filling the first opening with a non-single-crystalline silicon layer; forming a single-crystalline silicon pattern by irradiating the non-single-crystalline silicon layer with a first laser beam; forming a second insulation layer structure pattern by etching a portion of the first insulation layer structure, wherein the second insulation layer structure pattern comprises a second opening exposing a surface of the second region; filling the second opening with a non-single-crystalline silicon-germanium layer; and forming a single-crystalline silicon-germanium pattern by irradiating the non-single-crystalline silicon-germanium layer with a second laser beam.