Patent ID: 7183167

Claim:
A method of fabricating a semiconductor device comprising at least one MOS transistor on a semiconductor layer, and a trench isolation oxide film for defining at least one active region as a region in which said MOS transistor is formed and electrically isolating said MOS transistor, comprising: (a) forming at least one auxiliary film for forming said trench isolation oxide film on said semiconductor layer; (b) forming a side wall spacer of an insulating film on an inner wall of a trench after forming the trench penetrating said auxiliary film and reaching a predetermined depth in said semiconductor layer and removing said insulating film on a bottom of said trench by etching; (c) implanting ions of an impurity of a conduction type different from that of a source/drain layer of said MOS transistor with energy by which a peak of a profile is formed in said semiconductor layer on the bottom of said trench not covered with said side wall spacer in a state where said side wall spacer is formed, thereby forming channel stop layers in said semiconductor layer on the bottom of said trench; and (d) forming said trench isolation oxide film by filling said trench with an oxide film after formation of said channel stop layer, wherein said step (b) includes, a step (b-1) of forming an inner-wall oxide film by performing thermal oxidation on the inner wall of said trench, a step (b-2) of forming a protection oxide film on the inner wall of said trench and the whole main surface of said auxiliary film, and a step (b-3) of forming said side wall spacer by the use of a nitride film on said protection oxide film, said step (c) includes, a step of implanting ions of said impurity in a state where said side wall spacer is formed, and said step (d) includes, a step of filling said trench with said oxide film in a state where said side wall spacer is left.