Patent ID: 7224629

Claim:
A semiconductor device, comprising: a memory array having a plurality of word lines, a plurality of data lines, and a plurality of memory cells arranged at intersections of said plurality of word lines and said plurality of data lines; and a plurality of sense amplifier circuits connected to said plurality of data lines, wherein each of said plurality of sense amplifier circuits is provided with a first MISFET pair of a first conductivity type in which a gate of one MISFET is connected to a drain of the other MISFET, a second MISFET pair of the first conductivity type in which a gate of one MISFET is connected to a drain of the other MISFET, and a third MISFET pair of a second conductivity type in which a gate of one MISFET is connected to a drain of the other MISFET, and said first MISFET pair is a device having a drivability larger than that of said second MISFET pair.