Patent ID: 8723235

Claim:
A transistor, comprising: a semiconductor substrate comprising a source region and a drain region; a channel formed in the semiconductor substrate between the source region and the drain region, the channel configured to pass current between the source region and the drain region, wherein the channel is doped to a concentration of less than 1.0e16 atoms per cubic centimeter or the channel is undoped or intrinsic; and a gate comprising a metal formed directly on a top surface of the semiconductor substrate over the channel; wherein a Schottky barrier is formed between the gate and the channel; and wherein: the channel is n-type and the metal comprises palladium, nickel, tungsten, or molybdenum, or a silicide of palladium, nickel, tungsten, or molybdenum; Or the channel is p-type and the metal comprises magnesium, tantalum, hathium, or a silicide of magnesium, tantalum, or hafnium; or the channel is undoped or intrinsic and the metal comprises palladium, nickel, magnesium, tantalum, hafnium, tungsten, or molybdenum, or a silicide of any of these.