Patent ID: 6873660

Claim:
A data transmitter for receiving a single-ended binary input signal and converting the single-ended binary signal to a differential binary output signal, the data transmitter comprising: (a) a first and a second conduction paths connected in parallel between a first and a second nodes; (b) a first and a second switches connected in series in the first conduction path, wherein the first switch is located closer to the first node, and the second switch is located closer to the second node; (c) a third and a fourth switches connected in series in the second conduction path, wherein the third switch is located closer to the first node, and the fourth switch is located closer to the second node; (d) a source follower NMOS transistor having a drain connected to a voltage source, a gate connected to a first driving voltage, and a source connected to the first node, for providing current to the first and the second conduction paths via the first node; and (e) a source follower PMOS transistor having a drain connected to ground, a gate connected to a second driving voltage, a source connected to the second node for receiving current from the first and the second conduction paths via the second node; wherein a control terminal of each of the first switch, the second switch, the third switch and the fourth switch are each provided with one of the single-ended binary input signal or the inverse signal thereof for cutting off the second and the third switches when the first and the fourth switches are turned on, and for cutting off the first and the fourth switches when the second and the third switches are turned on; the differential binary output signal pulled out by a pair of output terminals, one of the output terminals is connected between the first and the second switches within the first conduction path, while the other output terminal is connected between the third and the fourth switches within the second conduction path.