Patent ID: 8105895

Claim:
A method for manufacturing a semiconductor power device to form an active cell area with a plurality of power transistor cells comprising: forming said power transistor cells in said active cell area with separated body regions having gaps between two adjacent power transistors and forming a planar Schottky diode in each of said power transistor cells by depositing a Schottky junction barrier metal covering areas above said gaps between separated body regions for applying a heavy body doped region disposed in said separated body regions surrounding said Schottky diode to adjust a leakage current of said Schottky diode in each of said power transistor cells; and wherein: said step of forming said planar Schottky diodes further comprising a step of carrying out a shallow Shannon implant to form a Sharon implant region in said gaps between said separated body regions of two adjacent power transistor cells for adjusting a leakage current of said Schottky diode.