Patent ID: 8691625

Claim:
A method for making a chip package, comprising: (a) providing a substrate having a first surface, a second surface, at least one conductive via and at least one first bump, wherein the conductive via is disposed in the substrate, the first bump is disposed on the second surface and electrically connected to a first end of the conductive via; (b) disposing the substrate on a carrier, wherein the second surface of the substrate faces the carrier; (c) removing part of the substrate from the first surface of the substrate, so as to expose a second end of the conductive via to a third surface of the substrate, and form at least one through via in the substrate; (d) disposing a plurality of chips on the third surface of the substrate, wherein the chips are electrically connected to the through via of the substrate, each of the chips has an active surface, a backside surface and a side surface, wherein the active surface is opposite the backside surface, and the side surface is adjacent to the active surface; (e) forming an encapsulation on part of the third surface of the substrate, wherein the encapsulation encapsulates the chips; (f) removing the carrier; (g) conducting a flip-chip mounting process, so that the first bump of the substrate contacts a receiving element; (h) removing the encapsulation to expose at least one side surface of each of the chips, wherein the exposed side surface is around the chip; and (i) forming a protective material on the receiving element, wherein the protective material at least encapsulates the first bump of the substrate.