Patent ID: 7215167

Claim:
A frequency synthesizer, comprising: an accumulator for accumulating a first seed word, said first seed word based on a desired output frequency, at a high variable clock rate starting from a remainder word for updating a reference word at an output of the accumulator at said high variable clock rate, said reference word having a most significant bit (MSB) and less significant bits (LSB)s, said remainder word corresponding to said LSBs at overflows of said MSB; a tracking filter for receiving an MSB signal, said MSB signal corresponding to changes in said MSB, and issuing a filtered output signal having an actual output frequency based on a frequency of said MSB signal; and a variable rate clock generator for providing said high variable clock rate at a combination of at least one fixed clock rate and a clock interpolation rate, said clock interpolation rate responsive to a second seed word, said second seed word based on said desired output frequency.