Patent ID: 8291307

Claim:
A parity generator, provided along with a priority encoder into which binary input data is input and which outputs output data representing a bit position at which â€œ0â€ or â€œ1â€ appears first from the most significant bit of the binary input data, for generating a parity of the output data from the priority encoder, the parity generator comprising: a first level generator having a plurality of first component circuits arranged in parallel, into each of which one of a plurality of sets of a specific number of bits of the binary input data in sequence from the most significant bit is input and each of which generates and outputs a first signal for parity generation of bit data of the specific number of bits and a second signal representing whether or not the entire bit data of the specific number of bits is â€œ1sâ€ or â€œ0sâ€; and a second level generator generating the parity of the output data based on the first signal and the second signal from each of the first component circuits of the first level generator.