Patent ID: 7915132

Claim:
A method for producing a capacitor arrangement comprising the steps of: preparing a carrier substrate; forming a first insulating layer at the surface of the carrier substrate; forming a first capacitor electrode having a multiplicity of interspaced first interconnects in the first insulating layer; forming a mask layer at the surface of the first capacitor electrode and the first insulating layer for the purpose of uncovering at least partial regions of the first insulating layer between the multiplicity of first interconnects; removing the uncovered partial regions of the first insulating layer for the purpose of uncovering the multiplicity of first interconnects; removing the mask layer; forming a capacitor dielectric at least at the surface of the uncovered first interconnects; forming a second capacitor electrode at the surface of the capacitor dielectric with a multiplicity of interspaced second interconnects lying between the first interconnects coated with capacitor dielectric; wherein the step of forming the first insulating layer involves forming, as first insulating layer, a bottom layer with an etching stop layer at the surface of the carrier substrate and a top layer at the surface of the bottom layer; wherein the step of forming the first capacitor electrode involves forming the first interconnects at the surface of the etching stop layer; and wherein the step of removing the uncovered partial regions of the first insulating layer involves removing the uncovered partial regions of the top layer as far as the etching stop layer.