Patent ID: 8479132

Claim:
A computer implemented method for generating a display indicating whether a circuit has a property comprising: providing an assertion based on data indicating values of signals of the circuit at a succession of simulation times, wherein the assertion expresses the property as a first sequence of expressions, and separately defines for each expression a corresponding evaluation time relative to the succession of simulation times at which the expression is to be evaluated, wherein a value of each expression is a function of a value of at least one variable representing either a value of at least one signal of the circuit or a value of another separately defined sequence of expressions, and wherein the circuit has the property only if every expression of the first sequence evaluates true at its corresponding evaluation time, the method comprising evaluating each expression of the first sequence by using a computer, identifying the simulation time at which the expression is first time evaluated true and, if at least one of the expressions is evaluated false, performing the further steps of: a. displaying the representation of an expression for each of a plurality of the evaluated expressions of the first sequence, wherein the representation of the expression comprises a separate variable symbol for each of its variables; b. annotating the displayed representation of each expression which was evaluated true with its corresponding identified simulation time at which the expression was first time evaluated true, without showing tick-by-tick evaluating steps to annotate the expression.