Patent ID: 8202682

Claim:
A method of manufacturing a semiconductor device, the method comprising: forming a resist layer on an underlayer; forming an exposed pattern in the resist layer, wherein the exposed pattern comprises a soluble layer and an insoluble layer; forming a first resist pattern by removing the soluble layer from the exposed pattern; removing an intermediate exposed area from the first resist pattern to form a second resist pattern; applying a reaction material to the second resist pattern, the reaction material being a solubilization material that solubilizes the second resist pattern; forming a new soluble layer in a surface of the second resist pattern where the reaction material is applied; and removing the new soluble layer from the second resist pattern to form a third resist pattern, the method further comprising: removing a solubilizing component of the reaction material which solubilizes the second resist pattern, from an upper surface of the second resist pattern applied, after the applying of the reaction material to the second resist pattern, wherein the removing of the solubilizing component of the reaction material which solubilizes the second resist pattern comprises filling the second resist pattern with a filling material except for the upper surface of the second resist pattern, and then applying a material that removes the solubilizing component of the reaction material from the upper surface of the second resist pattern.