Patent ID: 7599226

Claim:
A drive circuit for driving a memory with a first nonvolatile memory transistor with a floating gate electrode and a gate terminal, and a second non-volatile memory transistor with a floating gate electrode and a gate terminal, and a first switch connected between a drain terminal of the first memory transistor and a bit line for reading out information stored in the memory circuit, and a second switch connected between a drain terminal of the second memory transistor and the bit line, wherein the first switch and the second switch are formed to selectively couple the drain terminal of the first memory transistor or the drain terminal of the second memory transistor to the bit line during readout, for writing write data into one of the memory transistors, comprising: means for providing equal signals for the gate terminals of the first memory transistor and the second memory transistor based on the write data; means for providing a programming signal for a source terminal of the memory transistor to be written to, wherein the programming signal is formed to allow a state stored in the memory transistor to be written to to be changed; and means for driving a source terminal of a memory transistor not to be written to such that a state stored in the memory transistor not to be written to is not changed.