Patent ID: 7566871

Claim:
A wafer defect inspection method, comprising the steps of: radiating an electron beam on a certain area of a wafer; reflecting radiated electrons by applying a negative voltage to said wafer just before said radiated electrons reach a surface of said wafer; forming an image of the reflected electrons; moving said wafer at a certain speed with respect to said radiated electron beam; obtaining a digital image with a time delay integration data acquisition synchronously with a moving speed of said wafer; and extracting a defect of said wafer using an obtained image and displaying a position and an image of said defect, wherein said method further includes a step of displaying on an operation screen a relationship among the values of S, D, L, and P when L is defined as a length in a direction perpendicular to a moving direction of said wafer of which image is being obtained in a range of an inspection object image in the region on which said electron beam is radiated, S is defined as an area of said wafer to be inspected per unit time, D is defined as a size on said wafer, corresponding to a unit pixel of said obtained digital image, and P is defined as an image signal acquisition frequency in said time delay integration formula, as well as a step of adjusting an electron optical system and a wafer moving speed on the basis of user determined S, D, L, and P values, wherein a graph for S=D×L×P is displayed with respect to a plurality of L values and P values respectively by assuming the horizontal axis as D and the vertical axis as S, and wherein said horizontal axis of said graph is displayed as a defect sensitivity obtained by multiplying said D value by a constant less than 1.