Patent ID: 7902882

Claim:
An apparatus comprising: an active device having an output terminal; a first follower circuit having an input terminal coupled to the output terminal of the active device for receiving an input signal from the active device, the first follower circuit including: a first NMOS transistor and a first PMOS transistor, a drain terminal of the first NMOS transistor coupled to a local supply voltage, and a drain terminal of the first PMOS transistor coupled to a local ground voltage; and a second NMOS transistor and a second PMOS transistor, wherein the first and second NMOS transistors and the first and second PMOS transistors are arranged in a current mirror configuration, a gate terminal of the second NMOS transistor is coupled to a gate terminal of the first NMOS transistor, and a gate terminal of the second PMOS transistor is coupled to a gate terminal of the first PMOS transistor; and a second follower circuit having an input terminal coupled to the output terminal of the first follower circuit, the second follower circuit including: a third NMOS transistor and a third PMOS transistor, a drain terminal of the third NMOS transistor coupled to the local supply voltage, and a drain terminal of the third PMOS transistor coupled to the local ground voltage; and a fourth NMOS transistor and a fourth PMOS transistor, wherein the third and fourth NMOS transistors and the third and fourth PMOS transistors are arranged in a current mirror configuration, a gate terminal of the fourth NMOS transistor is coupled to a gate terminal of the third NMOS transistor, and a gate terminal of the fourth PMOS transistor is coupled to a gate terminal of the third PMOS transistor.