Patent ID: 8224062

Claim:
A wafer inspection method for inspecting an individually isolated wafer level chip size package following dicing, wherein the individually isolated wafer has a rectangular shape in plan view and top and bottom surfaces, and wherein the dicing creates four cut side surfaces on the individually isolated wafer, the wafer inspection method comprising: simultaneously irradiating a plurality of infrared rays onto the four cut side surfaces of the individually isolated wafer whose top surface is sealed with a resin layer such that an optical axis of the irradiated infrared rays is at an angle with respect to the top or bottom surface of the individually isolated wafer; receiving infrared rays reflected from an interface between the individually isolated wafer and the resin layer and infrared rays reflected from an interface of a crack, the reflected infrared rays being received by image capturing unit positioned below the individually isolated wafer, wherein an optical axis of the image capturing unit is perpendicular to the bottom surface of the individually isolated wafer; and producing an image based on the received reflected infrared rays so as to detect cracks formed in the individually isolated wafer.