Patent ID: 8199084

Claim:
A driving circuit of a flat panel display device having an array substrate, comprising: a first horizontal signal line formed on a surface of the array substrate to transmit a plurality of horizontal driving signals and in addition to transmit N types of vertical driving signals by decoding technique, wherein N is larger than 2; a first clock signal line parallel with the first horizontal signal line and formed on the surface of the array substrate; a plurality of horizontal driver ICs, formed over the array substrate and electrically connected to the first clock signal line in series; at least one vertical signal line formed on the surface of the array substrate to transmit the N vertical driving signals transmitted from the first horizontal signal line; and a plurality of vertical driver ICs formed over the array substrate and electrically connected to the vertical signal line in series; wherein between a first horizontal driver IC closest to the vertical signal line and a first vertical driver IC closest to the first horizontal signal line, there exist only one first clock signal line transmitting clock signal, and only one vertical signal line transmitting N decoded vertical driving signals, and the first vertical driver IC is operative to decode and read the N vertical driving signals transmitted from the first horizontal signal line, and the vertical driving signals are transmitted from the first horizontal signal lines to the vertical signal lines, the vertical driver IC transmits the N vertical driving signals transmitted from the first horizontal signal line, and the vertical driver ICs are connected to the first clock signal line.