Patent ID: 6894947

Claim:
A semiconductor integrated circuit comprising: a serial/parallel conversion circuit receiving serial data and a clock signal, and outputting parallel data; a memory storing the parallel data; and a write pulse producing circuit producing a write pulse setting a time for writing data into the memory by counting clock signals, wherein the write pulse producing circuit includes: a counter counting clock signals; a first coincidence detecting circuit detecting coincidence between a count value of the counter and a first predetermined value; a second coincidence detecting circuit detecting coincidence between the count value of the counter and a second predetermined value; and a sequence circuit producing the write pulse by setting an output level to a first level during a period starting from detection of the coincidence by the first coincidence detecting circuit to detection of the coincidence by the second coincidence detecting circuit and by setting the output level to a second level during a period starting from detection of the coincidence by the second coincidence detecting circuit to detection of the coincidence by the first coincidence detecting circuit.