Patent ID: 8482688

Claim:
An array substrate, comprising: a base substrate comprising a display area and a peripheral area outside the display area, the display area comprising a plurality of pixels arranged in regions defined by a plurality of gate lines extending in a first direction and a plurality of data lines extending in a second direction; a plurality of storage voltage lines extending in the first direction and arranged in the pixels; a plurality of first connecting lines to electrically connect the storage voltage lines of adjacent pixels, the adjacent pixels being arranged in the second direction; and a common voltage applying section arranged in the peripheral area, the common voltage applying section to apply a common voltage to the storage voltage lines that are arranged in a portion of the pixels arranged in the first direction, the common voltage applying section comprising a power supply line extending along at least one of the storage voltage lines in the first direction and a first common voltage line extending in the second direction, the power supply line being electrically connected to the first common voltage line, wherein the array substrate further comprises a plurality of second connecting lines to each electrically connect respective storage voltage lines with the first common voltage line, and wherein the first common voltage line is directly disposed on a first layer and the storage voltage lines are directly disposed on a second layer, the second layer being different from the first layer.