Patent ID: 8339863

Claim:
An operation method of a memory device, the memory device having a source, a drain, a channel region located between the source and the drain, a gate dielectric having a charge storage layer and being located on the channel region, and a gate located on the gate dielectric, and the source, the drain and the channel. region are located in a substrate, the operation method comprising: applying a reverse bias between the gate and the drain of the memory device in order to generate band-to-band hot holes in the substrate near the drain, and injecting the band-to-band hot holes into a drain side of the charge storage layer of the memory device; and performing a program/erase operation upon the memory device by means of tunneling mechanism different from the band-to-band hot holes injection mechanism after the band-to-band hot holes are injected: wherein the band-to-band hot holes located in the drain side of the charge storage layer are not completely vanished by the program/erase operation.