Patent ID: 7485921

Claim:
A semiconductor device comprising: a first semiconductor layer of a first conductivity type; an epitaxial layer of a first conductivity type formed in the surface on the first semiconductor layer; a base layer of a second conductivity type formed on the surface of the epitaxial layer; column layers of a second conductivity type repeatedly formed in the epitaxial layer under the base layer at a certain interval; a diffusion layer of a first conductivity type formed selectively in the base layer; trenches formed so as to penetrate the base layer to reach the epitaxial layer; gate electrodes formed in the trenches via a gate insulation film formed on an inner wall of the trench; a first main electrode connected to the back side of the first semiconductor layer; a second main electrode connected to the diffusion layer and the base layer; and a termination layer of a second conductivity type formed on the epitaxial layer at an end region at the perimeter of the base layer, the termination layer being formed to have a junction depth larger than that of the base layer, impurity concentration of the termination layer being set lower than the impurity concentration of the column layer, wherein the column layers are formed exclusively under the base layer.