Patent ID: 8922960

Claim:
An electrostatic discharge (ESD) protection device, comprising: a silicon controlled rectifier (SCR) coupled between a first voltage potential and a second voltage potential, the SCR including a PNP transistor and an NPN transistor; and a first ESD control device including: a trigger circuit coupled between a base of the PNP transistor of the SCR and the second voltage potential, the trigger circuit including a first N-type metal oxide semiconductor (NMOS) device and a serial chain of at least one diode, wherein the serial chain includes a first terminal at a first end of the serial chain and a second terminal at a second end of the serial chain, a source of the first NMOS device is serially coupled to the first terminal of the serial chain, the second terminal of the serial chain is coupled to the second voltage potential, a base of the PNP transistor of the SCR is coupled to a drain of the first NMOS device, and wherein all of a current flowing through the source of the first NMOS device flows through the first terminal of the serial chain; and a voltage divider coupled between the first voltage potential and the second voltage potential and coupled to a gate of the first NMOS device, wherein the voltage divider includes at least two dividing elements, wherein all of the at least two dividing elements are one of a same type selected from a group consisting essentially of a resistor, a MOS device, a diode, and a capacitive element, and further wherein the voltage divider is configured such that: a first dividing element of the at least two dividing elements is coupled between the first voltage potential and the gate of the first NMOS device; and a second dividing element of the at least two dividing elements is coupled between the second voltage potential and the gate of the first NMOS device; and wherein the voltage divider is configured to provide a divided portion of a voltage difference between the first voltage potential and the second voltage potential to the gate of the first NMOS device, wherein the divided portion is a function of a respective same physical dimension of the at least two dividing elements, and further wherein the respective same physical dimensions are sized such that the divided portion is less than a source voltage of the first NMOS device to keep off the first NMOS device during normal operation and further wherein the divided portion turns on the first NMOS device during an ESD event.