Patent ID: 8645883

Claim:
A non-transitory computer readable medium having instructions stored thereon that, when executed by a processor, cause the processor to simulate an integrated circuit comprising a plurality of devices, the simulating comprising: performing a fundamental circuit simulation run using parameters for the plurality of devices and an initial time step, wherein the parameters for the fundamental circuit simulation are original stored parameters from a device model library that correspond to each of the devices; generating one or more fundamental time steps from the fundamental circuit simulation run, wherein the fundamental time steps are generated when changes that indicate state time derivatives during two or more successive integration steps are within a predetermined range; reducing the initial time step when state time derivatives during two or more successive integration steps are not within a predetermined range during the fundamental circuit simulation run; storing the one or more fundamental time steps as fundamental circuit events in an events queue; updating the parameters for the plurality of devices based on the fundamental circuit events to generate one or more derivative circuits; and performing one or more derivative circuit simulation runs using the derivative circuits, wherein the derivative circuit comprises the updated parameters that differ from the original stored parameters.