Patent ID: 7190035

Claim:
A semiconductor device, comprising: a semiconductor substrate; a source region which is formed in a surface side of the semiconductor substrate; a drain region which is formed in the surface side of the semiconductor substrate which is apart from the source region; a gate electrode which is formed over the semiconductor substrate via a gate insulating film and which is substantially between the source region and the drain region; an element isolation insulator which is formed on the surface side of the semiconductor substrate to provide electrical insulation from other elements, a height of a surface of the element isolation insulator being equal to or lower than that of the surface side of the semiconductor substrate; a stopper which is formed of a material different from that of the element isolation insulator and which is formed on the element isolation insulator so as to protrude from the surface of the element isolation insulator, the stopper being at a distance from a boundary between the source region/drain region and the element isolation insulator; and an elevated source/drain which is formed on the source region and the drain region so as to be elevated from the surface side of the semiconductor substrate, wherein a condition of B>A/tan θ is satisfied, where θ is an angle which is formed by a face that a boundary face of the boundary is extended in a height direction and a facet of the elevated source/drain between the source region/drain region and the stopper. A is the distance from the boundary to the stopper, and B is a height by which the stopper protrudes from the surface of the element isolation insulator.