Patent ID: 7133294

Claim:
An integrated circuit (IC) package comprising: a substrate having a substantially planar upper surface entirely throughout an IC mounting region and a plurality of conductors within the IC mounting region on the upper surface; at least one capacitor within the IC mounting region, wherein the at least one capacitor comprises top and bottom surfaces, each having a plurality of terminals of first and second polarity types, wherein a selected terminal of first polarity type on the bottom surface is physically and electrically coupled to a first conductor of the plurality of conductors, wherein a selected terminal of second polarity type on the bottom surface is physically and electrically coupled to a second conductor of the plurality of conductors, and wherein the at least one capacitor is mounted atop and at a diagonal to the first and second conductors to which it is electrically coupled; and an IC comprising a plurality of IC terminals on a surface thereof, wherein the IC terminals are physically and electrically coupled to selected terminals of first and second polarity types on the top surface of the capacitor.