Patent ID: 7449360

Claim:
A method for fabricating a memory device, the method comprising: forming a first electrode on a semiconductor substrate including a transistor; forming at least one conductive contact on the first electrode; forming a dielectric layer on the first electrode such that the dielectric layer contacts sides of the conductive contact, wherein forming the conductive contact and the dielectric layer includes sequentially forming a conductive contact layer, a first mask layer and a second mask layer on the first electrode, the second mask layer having a width less than the first mask layer, forming an oxide layer on at least one side of the second mask layer, the oxide layer having a width less than, or equal to, about 30 nm, removing the second mask layer; etching the first mask layer and the conductive contact layer to form at least one stack, forming a dielectric layer on the at least one stack and the first electrode, and planarizing the dielectric layer and the at least one stack; forming a phase change material film and a second electrode on the conductive contact and the dielectric layer; and patterning the phase change material film and the second electrode.