Patent ID: 7605602

Claim:
An output driver buffer circuit for a logic device comprising: a first output driver transistor adapted to adjust an output voltage of an output pad, the transistor having a gate; a first capacitor adapted to be connected to the transistor gate and further adapted when connected to the gate to turn the transistor on; a first reference voltage source adapted to be connected to the first output driver transistor and further adapted when connected to the first transistor gate to maintain the transistor on; a second output driver transistor adapted to adjust the output voltage of the output pad, the transistor having a gate; a second capacitor adapted to be connected to the second transistor gate and further adapted when connected to the gate to turn the transistor off; a second reference voltage source adapted to be connected to the second output driver transistor and further adapted when connected to the second transistor gate to maintain the first transistor off; and switch circuitry responsive to a first data signal for connecting first the first capacitor and then the first reference voltage source to the transistor gate of the first output driver transistor to turn and maintain the first transistor on and responsive to a second data signal for connecting first the second capacitor and then the second reference voltage source to the transistor gate of the second output driver transistor to turn and maintain the second transistor off.