Patent ID: 8101470

Claim:
A method for packaging integrated circuit devices, comprising: providing a foil carrier structure including a metallic foil adhered to a carrier, the metallic foil being a continuous sheet of metal wherein only some portions of a bottom surface of the foil are bonded to the carrier and wherein other portions of the bottom surface of the foil are not bonded to the carrier; attaching a multiplicity of dice to the metallic foil; encapsulating the multiplicity of dice and at least a portion of the metallic foil with a molding material to form a molded foil carrier structure wherein the metallic foil remains a continuous sheet of metal during the encapsulation operation; after encapsulating the multiplicity of dice, removing the carrier from the molded foil carrier structure to form a molded foil structure; after removing the carrier, patterning the metallic foil using photolithographic techniques then etching the metallic foil to expose portions of the underlying molding material and form a multiplicity of device areas, each device area supporting an associated die and including a plurality of conductive lines; and after etching the metallic foil, selectively covering portions of the conductive lines of each device area and leaving other portions of the conductive lines exposed to define a plurality of bond pads in the device area.