Patent ID: 7079440

Claim:
A memory system, comprising: a volatile memory having a plurality of banks, a bank address latch, a refresh trigger and a refresh counter, the refresh counter further having a row address counter and a row increment counter, wherein the refresh trigger is configured to control the refresh counter and the bank address latch, and wherein the row increment counter is configured to increment the row address counter; a memory controller configured to control the volatile memory to engage in an auto-refresh mode or a self-refresh mode, the memory controller further configured to direct the volatile memory to perform an auto-refresh operation on a target bank in the plurality of banks by loading a bank address for the target bank into the bank address latch; wherein the bank address stored in the bank address latch is used by the volatile memory to identify the target bank for the auto-refresh operation; and wherein the remaining banks in the plurality of banks are available for access while the auto-refresh operation is being performed on the target bank.