Patent ID: 7787301

Claim:
A method of manufacturing a flash memory device, the method comprising: forming a conductive layer on a substrate; forming a hard mask layer on the conductive layer; forming a first material layer on the hard mask layer; forming photoresist patterns on the first material layer; forming first material patterns, which selectively exposes a surface of the hard mask layer, through patterning using the photoresist patterns as an etching mask; removing the photoresist patterns; forming a second material layer on the first material patterns and the hard mask layer, the surface of which is selectively exposed; forming a third material layer on the second material layer; forming third material patterns, which is formed to expose an upper surface of the second material layer existing between portions of the second material layer, through patterning; selectively exposing surfaces of the first material patterns, the third material patterns and the hard mask layer by vertically removing the second material layer, the upper portion of which is exposed, thus forming second material patterns remaining only under the third material patterns; forming hard mask patterns through patterning of the hard mask layer, the surface of which has been selectively exposed, using the first material patterns and the third material patterns as an etching mask; removing the first material patterns, the second material patterns and the third material patterns; forming conductive patterns through patterning of the conductive layer using the hard mask patterns as an etching mask; and removing the hard mask patterns.