Patent ID: 8248841

Claim:
A spin-torque MRAM cell array comprising: a plurality of spin-torque MRAM cells arranged in rows and columns, each spin-torque MRAM cell comprising: a magnetic tunnel junction element, and a select switching device having a drain terminal connected to a first terminal of the magnetic tunnel junction element; a plurality of local word lines, each local word line associated with one row of the plurality of spin-torque MRAM cells and connected to a gate terminal of the select switching device of each spin-torque MRAM cell on the one row to control activation and deactivation of the select switching device; and a plurality, of gate voltage boosting circuits, each gate voltage boosting circuit placed between an associated global word line of a plurality of global word lines and an associated local word line of the plurality of local word lines to boost a local word line voltage applied to a gate of the select switching device of the selected spin-torque MRAM cell during writing the magnetic tunnel junction element of a selected spin-torque MRAM cell as a first level with a program current flowing from the switching transistor to the magnetic tunnel junction element when a local word line control signal is deactivated at a first time and a bit line associated with the selected spin-torque MRAM cell is precharged between the first time and a second time to generate a boost voltage from the gate boosting circuit to the gate of the select switching transistor of the selected spin-torque MRAM cell for compensating for a rise of a voltage at a source of the select switching device of the selected spin-torque MRAM cell.