Patent ID: 8780609

Claim:
A variable-resistance memory device comprising: a memory array section including a main memory cell employing a storage element having a resistance increasing and decreasing in a reversible manner in accordance with application of a signal set at one of different polarities to the opposite ends of the storage element; and a reference cell section including a reference cell provided with a storage element having a resistance increasing and decreasing in a reversible manner in accordance with application of a signal set at one of different polarities to the opposite ends of the storage element and generating a reference current used for recognizing data of the main memory cell, wherein the direction of an applied current serving as the reference current is set in accordance with the resistance state of the reference cell, wherein the storage elements of the main memory cell and the reference cell are respectively configured to be in either one of a high resistance state and a low resistance state which represent respectively two states of data stored in the storage element, the reference cell is in the high resistance state, and the reference cell is used as a single unit or is connected in parallel with another reference cell in order to generate the reference current in a current direction that does not change the high resistance state of the reference cell.