Patent ID: 7030459

Claim:
A three-dimensional memory structure, comprising: a first stack line, having: a first first-type polysilicon layer; a second first-type polysilicon layer; a first conductive layer between the first first-type polysilicon layer and the second first-type polysilicon layer; and a first anti-fuse between the first first-type polysilicon layer and the second first-type polysilicon layer; and a second stack line crossing over the first stacked line, having: a first second-type polysilicon layer; a second second-type polysilicon layer; a second conductive layer between the first second-type polysilicon layer and the second second-type polysilicon layer; and a second anti-fuse between the first second-type polysilicon layer and the second second-type polysilicon layer, wherein each layer of the second stack line crosses over each layer of the first stack line.