Patent ID: 8729661

Claim:
A method for manufacturing a semiconductor structure, comprising: disposing a first dielectric material layer on a surface of a first semiconductor layer, and defining openings in the first dielectric material layer to expose portions of the surface of the first semiconductor layer; epitaxially growing a second semiconductor layer on the exposed portions of the surface of the first semiconductor layer via the openings defined in the first dielectric material layer, such that portions of the second semiconductor layer grows via adjacent openings coalescing with each other on a top surface of the first dielectric material layer, wherein the second semiconductor layer and the first semiconductor layer comprise different materials from each other; and forming plugs of a second dielectric material in the second semiconductor layer at positions where the openings are defined in the first dielectric material layer and also at middle positions between adjacent openings, wherein the plugs pass through the second semiconductor layer to reach the surface of the first semiconductor layer or the top surface of the first dielectric material layer.