Patent ID: 7019738

Claim:
A display device comprising: a plurality of gate signal lines disposed in a predetermined direction on a substrate; a gate driver for feeding scanning signals to the gate signal lines; a plurality of drain signal lines disposed in a direction different from the predetermined direction; a drain driver which selects at least one of the drain signal lines and feeds an image signal to the selected drain signal lines; a timing control circuit which feeds a timing control signal to the gate driver, the drain driver or both of the drivers; a plurality of pixel electrodes which are disposed as a matrix, selected by the scanning signals fed through the gate signal lines and provided with the image signal fed through the drain signal lines; a first display circuit which is provided for the pixel electrodes and provides a corresponding pixel electrode with the image signal; a second display circuit which is provided for the pixel electrodes, includes a retaining circuit holding the image signal and provides a corresponding pixel electrode with an voltage corresponding to the image signal held by the retaining circuit; a circuit selection circuit for selecting one of the first and second display circuits; and a control circuit which halts a supply of a power voltage to a predetermined circuit required to operate the first display circuit after the circuit selection circuit selects the second display circuit, wherein the control circuit comprises a delay circuit which delays an display mode change signal inputted from outside of the device in accordance with a vertical period end signal and generates a halt signal and a gate circuit which receives the display mode change signal and the halt signal, and wherein an output signal from the gate circuit holts the supply of the power voltage to the predetermined circuit.