Patent ID: 8843870

Claim:
A method of fabricating a semiconductor device for reducing current leakage therein, the method comprising: obtaining a design for fabricating the semiconductor device, the design comprising active circuits and one or more unused circuits, wherein obtaining comprises: identifying, by a processor, at least one of the one or more unused circuits in the obtained design of the semiconductor device based on a set of timing constraints by: applying a subtractive unused circuit identification; analyzing static timing of all active circuits for determining a first circuit list including at least one timing-constrained circuit having a timing-constrained path; generating a second circuit list of at least one non-timing-constrained circuit by omitting circuits in the first circuit list from a list of all circuits; and identifying, in the second circuit list, the at least one of the one or more unused circuits in the device by omitting, from the second circuit list, circuits remaining in operation in the semiconductor device; fabricating the semiconductor device based on the obtained design; during fabrication: selectively masking the semiconductor device to expose the at least one of the one or more unused circuits; and modifying a characteristic of each exposed unused circuit to inhibit the each exposed unused circuit and to reduce current leakage therefrom.