Patent ID: 8121395

Claim:
A circuit-pattern inspection apparatus that acquires an image of a circuit pattern of a die formed on a semiconductor wafer to judge whether or not the circuit pattern has a defect, the apparatus comprising: a plurality of image memories, each of which stores data of the image distributed on the basis of the repeatability of the circuit pattern; a plurality of processor elements that determine a direction of the repeatability of the circuit pattern, wherein each processor element compares the image data stored in a respective one of the image memories with a reference image generated by adding and averaging in the direction of the repeatability to generate a difference image, and judges whether an area, in which a difference value of the difference image is larger than a predetermined threshold value, is a defect; and an information integration unit for integrating and outputting a plurality of pieces of defect information, the defect information including image data judged to be defective by one of the processor elements and coordinates indicative of the defect.