Patent ID: 8797713

Claim:
A laminated ceramic capacitor comprising: a laminate comprising a plurality of stacked ceramic layers and a plurality of internal electrodes disposed at interfaces between the ceramic layers; and a plurality of external electrodes on an outer surface of the laminate and electrically connected to the internal electrodes, wherein the ceramic layers comprise: main-phase grains having a perovskite-type compound containing Ba and Ti and optionally containing one or more of Ca, Sr, Zr, and Hf; and secondary-phase grains having an average grain size of 100 nm or more and having a Si content (calculated after excluding oxygen) of 50 mol % or more per grain, the average grain boundary number, (Average Thickness for Ceramic Layers)/(Average Grain Size for Main Phase Grains)−1, is greater than 0 and 3.0 or less, and the average grain size of the secondary-phase grains is ¼ or more of the average thickness for the ceramic layers.