Patent ID: 8129258

Claim:
A method for dicing a semiconductor wafer, comprising: cutting a reference slot in a back main surface of the wafer; cutting a back slot in the back main surface of the wafer, the back slot positioned with respect to the reference slot; determining a desired location for a first chip edge with respect to the reference slot; applying, using a radiant energy source, radiant energy in a first path such that a first series of reformed regions are formed within the wafer along the first path, wherein: a crystalline structure of the wafer is modified in the first series of reformed regions; and, a location of a first edge of the radiant energy source is: with respect to the desired location for the first chip edge; and, in alignment with the back slot; and, separating the wafer along the first series of reformed regions to divide portions of the wafer on either side of the first series of reformed regions.