Patent ID: 6993756

Claim:
An optimization apparatus comprising: a first storage means for storing a program including a loop structure composed of a body and a control statement, the body including at least one arithmetic expression and the control statement prescribing a repeat condition for the body; a detection means for reading the program stored in the first storage means and detecting from the read program a first arithmetic expression that defines a value in an i-th repetition of the body, the value being to be referred to in an (i+x)th repetition of the body, where i and x are positive integers; an estimation means for estimating, based on a value of x, an execution delay that will occur when the body is repeatedly executed in pipeline processing; a second storage means; and a conversion means for converting, when the execution delay exceeds a predetermined threshold level, the detected arithmetic expression into a second arithmetic expression that defines a value in the i-th repetition, and writing a program that includes the second arithmetic expression in place of the first arithmetic expression to the second storage means, the value being to be referred to in an (i+y)th repetition of the body, where y is an integer that is greater than x.