Patent ID: 7315994

Claim:
A method for generating integrated circuit designs according to design rules, the circuit designs comprising fin-shaped structures (FinFET fins), comprising the steps of: designing a first cell structure at a first design hierarchy level, the first cell structure comprising first regions for one or more first fin-shaped structures; designing a second cell structure at the first design level, the second cell structure comprising second regions for one or more second fin-shaped structures, the second fin-shaped structures combining with the first fin-shaped structures forming one or more combined fin-shaped structure; when the first regions of the first cell structure in combination with the second regions of the second cell structure result in no design rule violation, generating the combined fin-shaped structure at the first design level; and when the first regions of the first cell structure in combination with the second regions of the second cell structure result in a design rule violation, generating the combined fin-shaped structure at a second design level, wherein the second design level comprises a larger contiguous region of fin-shaped structures than the regions of fin-shaped structures of the first design level.