Patent ID: 7671408

Claim:
An integrated circuit that includes a vertical diffused power metal-oxide semiconductor (VDMOS) transistor, the VDMOS transistor comprising: a buried layer having a first conductivity type in a semiconductor body having a second conductivity type; an epitaxial (EPI) layer having the first conductivity type and disposed above the buried layer; a deep well having the first conductivity type in the EPI layer extending down to the buried layer; a shallow well having the second conductivity type in the EPI layer, wherein the shallow well is spaced apart laterally from the deep well; a surface implant region having the first conductivity type and disposed in the shallow well; and a gate electrode having a lateral component extending over an edge of the shallow well, and a vertical trench comprising a field plate extending vertically into the EPI layer and isolated from the EPI layer by a field plate dielectric layer.