Patent ID: 7111263

Claim:
A process for designing semi-conductor memory components comprising: designing of a first layout for a semi-conductor memory module of the semi-conductor memory component to be used for a first configuration of the semi-conductor memory component; designing of a second layout for the semi-conductor memory module to be used for a second configuration of the semi-conductor memory component, the second layout being different from the first layout; using the first layout or the second layout for a total layout of the semi-conductor memory component, depending on the particular configuration of the semi-conductor memory component selected from said first or second configurations, together with at least one further layout for at least one further semi-conductor memory module of the semi-conductor memory component that is identical and not dependent on the particular configuration of the semi-conductor memory component, wherein the first and second layouts for the semi-conductor memory module have essentially the same external dimensions and are arranged at the same locality of the total layout.