Patent ID: 8014719

Claim:
An integrated circuit transistor structure that amplifies a radio frequency signal in a circuit having a reference DC voltage to obtain an amplified radio frequency signal to an output that has a load associated therewith comprising: a first FET transistor having a first source connected to ground and a first gate that receives the radio frequency signal; and a second FET transistor having a second source connected to a first drain of the first FET transistor, a second gate connected, via a first resistor, to the reference DC voltage that biases the second gate, and a second drain that is connected to the reference DC voltage via an inductor, the second FET transistor being a cascoded transistor, an output of the cascoded transistor being connected to the reference DC voltage through the inductor, wherein a shunt capacitor provides a path to the ground for the first gate, wherein the inductor is in parallel with a circuital arrangement comprising a second resistor in series with a switch, and wherein the first resistor reduces an effect caused by a parasitic inductance at the second gate of the cascoded transistor.