Patent ID: 8194727

Claim:
An equalizer characteristics optimizing method comprising: acquiring a recovery clock timing from a reception signal whose frequency characteristics are compensated by an equalizer; acquiring a predetermined sampling clock timing with respect to the recovery clock timing; latching, at the recovery clock timing, the reception signal whose frequency characteristics are compensated by the equalizer; latching, at the sampling clock timing, the reception signal whose frequency characteristics are compensated by the equalizer; comparing a logic value obtained by the latching, at the recovery clock timing, with a logic value obtained by the latching, at the sampling clock timing; collecting logic value comparison result data by repeating, after a characteristics setting of the equalizer is changed, the acquiring a recovery clock timing, the acquiring a predetermined sampling clock timing, the latching, at the recovery clock timing, the latching, at the sampling clock timing, and the comparing with regard to the reception signal whose frequency characteristics are compensated by the equalizer with the changed characteristics setting, said collecting including changing the equalizer characteristics setting by independently varying a predetermined first coefficient for controlling a low-frequency band of a frequency characteristics of the equalizer and a predetermined second coefficient for controlling a high-frequency band of a frequency characteristics of the equalizer; and determining an optimum characteristics setting of the equalizer based on the logic value comparison result data collected by the collecting logic value comparison result data, said determining including obtaining a two-dimensional table of comparison results obtained by said comparing and collected by said collecting with respect to the predetermined first coefficient and the predetermined second coefficient, and determining a center of gravity of the comparison results in the two-dimensional table that indicate correspondence of the compared logic values.