Patent ID: 8304303

Claim:
A method of forming a semiconductor device including a drain-extended PMOS transistor, comprising: providing a p-type semiconductor substrate; forming a p-type lower epitaxial layer over the substrate; forming a p-type upper epitaxial layer over the lower epitaxial layer; forming an n-type buried layer in a lower portion of the upper epitaxial layer and an upper portion of the lower epitaxial layer; forming an n-type well region in an upper portion of the upper epitaxial layer, leaving a p-type drift region outside and lateral to the n-type well region; forming a drain-extended PMOS transistor including an n-type backgate above the n-type buried layer; and forming a p-type separation region between the n-type buried layer and the n-type backgate electrically separating the n-type buried layer from the n-type backgate; whereby the n-type buried layer is left electrically floating and the potential of the n-type buried layer is defined by a potential applied to the n-type backgate and a potential drop across the p-type separation region; wherein forming the n-type buried layer comprises, prior to forming the upper epitaxial layer, implanting n-type dopant to form the n-type buried layer in the lower epitaxial layer; and, following forming the upper epitaxial layer, thermally diffusing the implanted n-type dopant to form the n-type buried layer in the upper epitaxial layer.