Patent ID: 7639673

Claim:
A frame aligning method implemented by a frame aligning integrated circuit, the method comprising: the frame aligning integrated circuit processing every channel of a frame in a time sharing manner, wherein the frame aligning integrated circuit includes a receiving timer, a pointer interpreter module, a transmitting timer, a pointer generator module, and a first memory, and wherein the pointer interpreter module comprises a first read-write controller, a second memory, a third memory, a fourth memory, and a pointer interpreter finite-state-machine; based on the structure and control information of a frame to be aligned, the receiving timer generating a receiving pulses indicating positions of a channel pointer's first byte and second byte; the first read-write controller in the pointer interpreter module receiving timing signals generated by the receiving timer to create read-write control signals to the second, third, and fourth memories; under control of the first read-write controller, the second and third memories storing channel pointer information of a frame received or outputting the channel pointer information to the pointer interpreter finite-state-machine; under control of the first read-write controller, the fourth memory storing pointer state information sent by the pointer interpreter finite-state-machine or sending the pointer state information to the pointer interpreter finite-state-machine, and at specific timing signals provided by the receiving timer, the pointer interpreter finite-state-machine interpreting signals in the second, third, and fourth memories, storing interpretation results in the fourth memory, and outputting the interpretation results to the receiving timer; generating, by the transmitting timer, a time signal for a new frame required and providing to the pointer generator module; based on pointer offset and adjustment information of each channel, the pointer generator module creating new channel pointers for all channels; generating the control signal according to timing signals of the new frame and the new channel pointers generated by the pointer generator module; with the control signal, reading the payload and generated pointer of each channel to form aligned data frame.