Patent ID: 8806145

Claim:
A method of executing instructions in a computer system, the method comprising the acts of: increasing an overall processing speed of at least one processor core by utilizing idle time of the at least one processor core to perform speculative execution on a program code by: executing, using the at least one processor core, a plurality of threads of program code, the plurality of threads comprising a first speculative load request; setting a first indicator bit corresponding to a first cache line in response to the first speculative load request; in the event that a second speculative load request from the plurality of threads refers to the first cache line with the first indicator bit set, executing a first cache replacement scheme to determine if a second cache line is available that does not have a second indicator bit set, the second indicator bit corresponding to the second cache line; in the event that the second cache line is not available, reattempting to identify the second cache line for a number of times; and after the number of times, executing a second cache replacement scheme to determine if a third cache line is available.