Patent ID: 7577226

Claim:
Clock recovery circuitry which is arranged to recover a clock signal from a data signal, comprising: a sampler which samples the data signal at a plurality of sampling points; a bit reversal detector which determines a sampling point at which the data signal changes state; a phase selector which selects a phase from amongst a plurality of candidate phases based on a sampling point at which the data signal is determined to change state; a phase detector which determines a difference between the phase of the clock signal and the phase of the data signal; a filter which filters the output of the phase detector to produce a control signal; a control signal selector which, in a first operating mode of said circuitry, supplies the selected phase from the phase selector and which, in a second operating mode of said circuitry, supplies the control signal from the filter; and a phase setting unit which, in said first operating mode, sets the phase of the clock signal in dependence on the selected phase supplied by the control signal selector and which, in said second operating mode, sets the phase of the clock signal in dependence on the control signal supplied by the control signal selector, wherein, a loop comprised of the phase detector, filter and phase setting unit is only closed in the second operating mode, and in the first operating mode, the loop is open and the phase setting unit is controlled based on the output of the phase selector.