Patent ID: 7728426

Claim:
A semiconductor device comprising: a substrate having a first main surface having a chip mounting portion, a second main surface opposite to the first main surface, a first insulating film provided on the first main surface, a first interconnection layer including a plurality of interconnection conductors extending over the first insulating film, a second insulating film provided on the second main surface, a second interconnection layer including a plurality of interconnection conductors extending over the second insulating film, through holes extending from the first main surface to the second main surface, and open at the first insulating film and the second insulating film, contacts filling the through holes and being electrically connected to the first interconnection layer and the second interconnection layer, a plurality of substrate external terminals electrically connected to the second interconnection layer, and at least one groove provided at the second main surface, said groove being provided in at least a portion of said second main surface opposite to said chip mounting portion of said first main surface; one or more semiconductor chips mounted in said chip mounting portion of said first main surface, each of said semiconductor chips having a front surface, a rear surface opposite to the front surface, and chip external terminals provided on the rear surface and electrically connected to the first interconnection layer on the substrate; one or more peripheral chips electrically connected to the first interconnection layer on the substrate; and a heat radiating member covering the second main surface and the inner surface of the groove.