Patent ID: 7515132

Claim:
A liquid crystal display apparatus, comprising: a data driver for driving data lines of a pixel matrix; a gate driver for driving gate lines of the pixel matrix; and a common voltage generator for supplying a common voltage, which is a reference voltage, to a common electrode of the pixel matrix, wherein each one of the data driver and the common voltage generator includes an analog buffer wherein the analog buffer includes: a comparator having an inverter connected in series to the input line; a feedback switch connected between the input line and the output line; and an output inverter, connected between the comparator and the output line, for pre-charging any one of a first driving voltage and a second driving voltage into the output line in accordance with an output voltage of the comparator and a controlling signal for a reset interval and for converging the pre-charged voltage to a voltage of the input line for a feedback interval, wherein the first and second driving voltages are generated from a voltage source, the first driving voltage is higher than the voltage of the input line, and the second driving voltage is lower than the voltage of the input line, wherein the output inverter includes: a first transistor and a second transistor connected between the comparator and the output line to configure an inverter; a third transistor connected between a supplying line of the first driving voltage and the first transistor, the third transistor being controlled by the controlling signal; and a fourth transistor connected between a supplying line of the second driving voltage and the second transistor, the fourth transistor being controlled by the controlling signal, wherein when the pre-charged voltage is converged to the voltage of the input line, the first to fourth transistors are turned off to cut-off current path of the output inverter, wherein the data driver inverts a polarity of a data signal in accordance with a polarity of the controlling signal and then supplies the inverted data signal to the data line, wherein the common voltage generator supplies an alternating common voltage to the common electrode, and wherein, when the common voltage generator supplies the common voltage of a positive polarity and the data driver supplies the data signal of a negative polarity, the analog buffer of the data driver makes the first driving voltage to be pre-charged into the data line for the reset interval and makes the pre-charged voltage to be discharged to the second driving voltage for the feedback interval, so that the pre-charged voltage is converged to the data signal of negative polarity.