Patent ID: 7683668

Claim:
A level shifter for shifting a low voltage digital input signal to a high voltage digital output signal, comprising: a first transistor having a gate configured to receive a first low voltage digital input signal; a second transistor having a gate configured to receive a second low voltage digital input signal; a first feedback circuit connected to drains of the first transistor and the second transistor, wherein the first feedback circuit comprises, a third transistor having a gate connected to a drain of the second transistor at a first node; and a fourth transistor having a gate connected to a drain of the first transistor at a second node; and a second feedback circuit connected to the first feedback circuit, wherein the second feedback circuit comprises, a fifth transistor having a gate connected to a drain of the third transistor at a third node; and a sixth transistor having a gate connected to a drain of the fourth transistor at a fourth node, wherein a first high voltage digital output signal is generated at the third node and a second high voltage digital output signal is generated at the fourth node; and wherein the first, second, fifth and sixth transistors are of a first category of transistors, and the third and fourth transistors are of a second category of transistors, and wherein the first and second categories of transistors are different.