Patent ID: 7035352

Claim:
A signal detection circuit capable of receiving a digital baseband signal comprising an amplitude modulated symbol stream of Logic 0 symbols and Logic 1 symbols, each of said Logic 0 and Logic 1 symbols comprising a plurality of sequential samples, said amplitude modulated symbol stream containing a preamble having a plurality of known symbols preceding a plurality of user data symbols, said signal detection circuit comprising: a signal mean determination circuit operable to receive at least some of the samples from said digital baseband signal and to determine therefrom an amplitude mean value associated with said amplitude modulated symbol stream; and a correlation circuit operable to detect said preamble, said correlation circuit capable of: 1) receiving substantially simultaneously a first sequential sample for each of a plurality of consecutive symbols; 2) generating a sum value equal to a total number of said first sequential samples that match corresponding ones of said known preamble symbols; 3) repeating steps 1) and 2) for remaining sequential samples associated with each of the consecutive symbols to thereby generate a plurality of sum values; and 4) determining the sequential sample associated with a maximum one of said sum values and generating a detection signal associated with said sequential sample associated with the maximum sum value.