Patent ID: 6916743

Claim:
A method for manufacturing a semiconductor device, the method comprising the steps of: depositing an insulation film above a semiconductor device; etching the insulation film to form a buried wiring hole and an alignment mark pit, which is used for alignment, in the insulation film; depositing a conductive film on the surface of the insulation film that includes the buried wiring hole and the alignment mark pit, wherein the step of depositing the conductive film includes depositing the conductive film so that the thickness of the conductive film is less than the depth of the alignment mark pit and less than half of a minimum opening width of the alignment mark pit; forming a buried film in the alignment mark pit and forming a buried wiring in the buried wiring hole to flatten the surface of the deposited conductive film until the surface of the insulation film is exposed; depositing a wiring film on the buried film in the alignment mark pit, the buried wiring, and the insulation film after the flattening by means of the chemical mechanical polishing; forming a hard mask on the surface of the wiring film so that an upper depression is formed above the alignment mark pit; transcribing a wiring pattern on the hard mask by performing lithography so that the upper depression is used as an alignment mark; and etching the wiring film excluding the portion on which the wiring pattern is transcribed; wherein the step of depositing the conductive film includes depositing he conductive film so that a lower depression is formed between the surface of the insulation film and the surface of the buried film in the alignment mark pit, the depth of the lower depression being set so that the wiring film does not remain in the lower depression subsequent to the step of etching the wiring film.