Patent ID: 8883596

Claim:
A method of fabricating a semiconductor device, the method comprising: patterning a substrate to form a trench that defines an active region; forming a sacrificial pattern in a lower region of the trench; forming a spacer on an upper sidewall of the trench; recessing a top surface of the sacrificial pattern to form a window exposing a sidewall of the active region between the spacer and the sacrificial pattern; doping a sidewall of the trench through the window to form a doped region in the active region; forming a wiring in the trench to be connected to the doped region; and forming a semiconductor pattern in the trench, wherein forming the wiring includes: forming a metal layer in the trench having the semiconductor pattern therein, recessing the metal layer to form a metal pattern in the lower region of the trench, and forming an insulating gapfill layer to fill the trench provided with the metal pattern.