Patent ID: 6855992

Claim:
A semiconductor structure comprising: a) a monocrystalline Group IV substrate; b) a layer of amorphous oxide of Group IV in contact with said substrate; c) a monocrystalline metal oxide and/or metal nitride layer overlying the amorphous layer; d) a metal or metal oxide capping layer in contact with said monocrystalline metal oxide and/or metal nitride layer; e) a compound semiconductor template layer in contact with said capping layer; and f) a monocrystalline compound semiconductor layer in contact with said template layer; and a composite transistor comprising a first transistor having first active regions formed at least in part in a silicon portion of the semiconductor structure, a second transistor having second active regions formed at least in part in a monocrystalline compound semiconductor portion of the semiconductor structure, and a mode control terminal for controlling the first transistor and the second transistor.