Patent ID: 7068747

Claim:
A data decision circuit comprising: a clock generation unit which generates a clock signal based on a phase difference signal so that the clock signal has an optimum phase with respect to a phase of an input data signal; a data determination unit which determines data carried by said input data signal, by using said clock signal, and generates a determined data signal representing the determined data values; a phase-difference detection unit which detects a rising-side phase difference and a falling-side phase difference, where the rising-side phase difference is a phase difference between a rising of the input data signal and a transition in the clock signal which occurs subsequently to the rising of the input data signal, and the falling-side phase difference is a phase difference between the transition in the clock signal and a falling of the input data signal which occurs subsequently to the transition in the clock signal; wherein said phase-difference detection unit generates a first pulse representing said rising-side phase difference by obtaining a logical product of said input data signal and an inversion of said determined data signal, and a second pulse representing said falling-side phase difference by obtaining a logical product of said input data signal and the determined data signal; and a phase-difference-signal generation unit which generates said phase difference signal so as to represent a difference between said rising-side phase difference and said falling-side phase difference.