Patent ID: 8143119

Claim:
A method of manufacturing a semiconductor device, the semiconductor device comprising: a first transistor of a first conductive type and a second transistor of the first conductive type whose threshold voltages are equal to each other, in a first element formation region; and a third transistor of the first conductive type, in a second element formation region positioned adjacent to the first element formation region, wherein the second transistor is positioned between the first transistor and the third transistor, and a channel region of the first transistor and a channel region of the second transistor have a shape which is line-symmetrical with respect to a reference line extending between the channel regions of the first and second transistors, the method comprising: isolating the first element formation region and the second element formation region from each other by forming an element isolating film on a substrate; forming, on the substrate, a first mask pattern which has a first opening exposing the first element formation region and having a shape which is line-symmetrical with respect to the reference line, and covers the second element formation region; forming a first well of a second conductive type in the first element formation region by ion-implanting an impurity of the second conductive type into the substrate by using the first mask pattern as a mask; removing the first mask pattern; forming, on the substrate, a second mask pattern which has a second opening exposing the second element formation region and covers the first element formation region; forming a second well of the second conductive type in the second element formation region by ion-implanting an impurity of the second conductive type into the substrate by using the second mask pattern as a mask; removing the second mask pattern; and forming the first transistor and the second transistor in the first element formation region, and the third transistor in the second element formation region.