Patent ID: 8536674

Claim:
An apparatus comprising: a base comprising a first semiconducting layer and a second semiconducting layer extending over a portion of said first semiconducting layer, wherein at least one of the first and second semiconducting layers is formed from at least one of silicon carbide, gallium nitride, indium nitride, and aluminum nitride; a plurality of isolation barriers extending through at least a portion of said base, wherein at least a portion of said plurality of isolation barriers defines a plurality of base islands, wherein the isolation barriers comprise at least one of: (i) a plurality of trenches substantially defined within the second semiconducting layer, each of the trenches extending to the first semiconducting layer; and (ii) a plurality of body wells substantially defined within the base; a first transistor positioned on a first base island, wherein said first transistor comprises a first body terminal at a first voltage; and a second transistor positioned on a second base island, wherein said second transistor comprises a second body terminal at a second voltage, said first transistor and said second transistor being substantially electrically isolated from each other.