Patent ID: 7888203

Claim:
A method of making a nonvolatile memory device, the method comprising: forming a string selection transistor, a plurality of memory cell transistors, and a ground selection transistor where each has a channel region and source/drain regions in a substrate; injecting first impurity ions into edge portions of the channel regions in the substrate to form first impurity layers around boundaries between the channel regions and the source/drain regions of each of the string selection transistor, the memory cell transistors, and the ground selection transistor, the first impurity layers having an opposite conductivity relative to the source/drain regions of each of the string selection transistor, the memory cell transistors, and the ground selection transistor; and injecting second impurity ions, which are the same conductivity type as the first impurity ions, into an edge portion of the channel regions of each of the string selection transistor and the ground selection transistor to form second impurity layers at boundaries between the channel region and the drain region of the string selection transistor and between the channel region and the source region of the ground selection transistor, wherein injecting second impurity ions comprises: forming an ion implantation mask on the substrate that exposes portions of the drain region of the string selection transistor and the source region of the ground selection transistor; injecting the second impurity ions into the exposed portions of the drain region of the string selection transistor and the source region of the ground selection transistor, and an interval between the memory cell transistors is L 1 , a height of the memory cell transistors from the substrate is L 2 , and the first and second impurity ions are injected at an incident angle θ1 defined by θ1≧tan −1 (L 2 /L 1 ).