Patent ID: 7676684

Claim:
A semiconductor device having an interface relevant to a double-data-rate memory, comprising: a flight time acquisition unit acquiring flight times of a clock signal and a data strobe signal transmitted to or from the memory, using a reflected wave on a transmission path of said signals; a calculation unit determining a valid range of data to be synchronized with a system clock, based on the flight times of the clock signal and the data strobe signal acquired by said flight time acquisition unit; and a synchronizing unit synchronizing data in the valid range determined by said calculation unit, wherein the flight time acquisition unit includes: an observation time measuring unit observing the reflected wave on the transmission path of said signals, and measuring observation times; and a flight time output unit acquiring the flight times of said clock signal and said data strobe signal, based on the observation times obtained by said observation time measuring unit, and using a prepared table or an equation showing correlation between said observation times and said flight times.