Patent ID: 8471548

Claim:
A power supply circuit to generate a predetermined constant voltage from an input voltage and output the predetermined constant voltage as an output voltage, the power supply circuit comprising: an input terminal and an output terminal; an output driver transistor to generate a predetermined current according to a control signal input from the input terminal and output the predetermined current from the output terminal; a buffer circuit to control the output driver transistor according to the inputted control signal, comprising a first transistor connected to the output terminal and a second transistor to function as a load for the first transistor; and an error amplification circuit to control the output driver transistor via the buffer circuit to make a proportional voltage proportional to the output voltage equal to a predetermined reference voltage comprising: a differential pair including a first pair of transistors; a current mirror circuit including a second pair of transistors, to function as a load for the differential pair; a constant current source to supply a current and drive the differential pair and the current mirror circuit; and a third transistor connected between one of the first pair of transistors constituting the differential pair and the second pair of transistors constituting the current mirror circuit, wherein the first and second transistors of the buffer circuit have the same polarity as the second pair of transistors constituting the current mirror of the error amplification circuit, a control terminal of the third transistor of the error amplification circuit is connected at a first junction node to a control terminal of the first transistor of the buffer circuit, and the first junction node is connected to a second junction node between (i) one of the first pair of transistors constituting the differential pair of the error amplification circuit and (ii) the third transistor of the error amplification circuit, and wherein the third transistor of the error amplification circuit is connected to the control terminal of the first transistor of the buffer circuit to turn on and turn off the first transistor which controls the output driver transistor.