Patent ID: 7582929

Claim:
An electronic device comprising: a substrate including a first trench that includes a wall and a bottom and extends from a primary surface of the substrate; discontinuous storage elements, wherein a first portion of the discontinuous storage elements lies within the first trench, and a second portion of the discontinuous storage elements overlies the primary surface outside of the first trench; a first gate electrode having an upper surface that lies below the primary surface of the substrate; and a second gate electrode overlying the first gate electrode and the primary surface of the substrate, wherein: within a memory cell, a first discontinuous storage element and a second discontinuous storage element lie within the first trench at elevations higher than the upper surface of the first gate electrode; all of the first discontinuous storage element lies at an elevation higher than all of the second discontinuous storage element; and the second portion of the discontinuous storage element lies between the second gate electrode and the primary surface of the substrate.