Patent ID: 8279354

Claim:
A video signal processing apparatus, comprising: a frame memory; a separator and deinterlacer circuit; a first demodulator; and a second demodulator; wherein the frame memory is configured to store an interlaced video signal, wherein the separator and deinterlacer circuit is configured to execute operations of separating and deinterlacing the interlaced video signal stored in the frame memory, wherein the separator and deinterlacer circuit outputs a chroma signal and an interpolated chroma signal, wherein the separator and deinterlacer circuit outputs the chroma signal to the first demodulator, wherein the separator and deinterlacer circuit outputs the interpolated chroma signal to the second demodulator, wherein the first demodulator outputs a horizontal component signal of the chroma signal and a vertical component signal of the chroma signal, and wherein the second demodulator outputs a horizontal component signal of the interpolated chroma signal and a vertical component signal of the interpolated chroma signal.