Patent ID: 7245115

Claim:
A low dropout voltage regulator apparatus, comprising: a low dropout voltage regulator circuit connected to a supply voltage, wherein said low drop voltage regulator circuit comprises a first transistor connected to an FET transistor and a current source and a first resistor connected to a second resistor and said capacitor, wherein said capacitor is connected to a second transistor, which in turn is connected to a third resistor and a third transistor, wherein said third transistor is connected to a fourth resistor and said first transistor and wherein said fourth resistor is connected to a ground, wherein at least one input voltage is input to said low dropout voltage regulator circuit to generate at least one output voltage from said low dropout voltage regulator circuit; and a feedback compensation component comprising a capacitor, wherein said feedback compensation component is integrated with said low dropout voltage regulator circuit, wherein said feedback compensation component is located within said low dropout voltage regulator circuit to take advantage of a Miller effect associated with said low dropout voltage regulator circuit in order to withstand high voltages associated with said supply voltage and generate said at least one output voltage from said low dropout voltage regulator circuit.