Patent ID: 6912681

Claim:
A circuit cell for data storage, test pattern generation and test pattern compression of circuits with a built-in self-test function, comprising: a test data coupling-in circuit, comprising: a test data buffer store; a data buffer store; a test data input for receiving a test data input signal from a circuit cell connected upstream, which signal can be stored in the test data buffer store; a data input for applying a data input signal which can be stored in the data buffer store; a test data output for outputting a buffer-stored test data signal; and a data output for outputting a buffer-stored data signal to a data signal path via a data signal output of the circuit cell; the test data buffer store and the data buffer store each comprising: a multiplexer having a signal input and a signal output; a feedback signal path; and a feedback multiplexer having a first input, a second input, and an output, the feedback multiplexer being configured for feeding back the signal output via the feedback signal path to the signal input of the multiplexer and the received test data input signal being coupled into the data signal path via the feedback signal path in a manner dependent on a first control signal applied to the test data coupling-in circuit; the circuit cell for data storage further comprising: a test data signal output; a switching device; and a logical comparison circuit, configured to compare the test data input signal with the test data signal output by the test data coupling-in circuit and configured to generate a comparison signal which is applied to the switching device which, in a manner dependent on a second control signal, switches through at least one of the generated comparison signal and the test data signal output by the test data coupling-in circuit to the test data signal output of the circuit cell, the feedback multiplexer configured to be controlled by the first control signal, enabling at least one of the test data signal and the data signal to be switched onto the feedback signal path.