Patent ID: 6864737

Claim:
An output circuit, comprising: a rising edge circuit, the rising edge circuit including; a first primary buffer coupled to an input of the output circuit, a first primary output driver coupled to the first primary buffer and an output of the output circuit, a plurality of rising edge supplemental buffers, each rising edge supplemental buffer coupled to the input of the output circuit, a plurality of rising edge supplemental output drivers, each rising edge supplemental output driver coupled to one of the rising edge supplemental buffers and the output of the output circuit, and a plurality of rising edge sensing and control circuits, each rising edge sensing and control circuit coupled to one of the plurality of rising edge supplemental buffers and one of the plurality of rising edge supplemental output drivers, wherein at least one of the plurality of rising edge sensing and control modules is coupled to a first supply; and a falling edge circuit coupled to the rising edge circuit, the falling edge circuit including; a second primary buffer coupled to the input of the output circuit, a second primary output driver coupled to the primary buffer, a plurality of falling edge supplemental buffers, each falling edge supplemental buffer coupled to the input of the output circuit, a plurality of falling edge supplemental output drivers, each falling edge supplemental output driver coupled to one of the falling edge supplemental buffers and the output of the output circuit, and a plurality of falling edge sensing and control circuits, each falling edge sensing and control circuit coupled to one of the plurality of falling edge supplemental buffers and one of the plurality of falling edge supplemental output drivers, wherein at least one of the plurality of falling edge sensing and control modules is coupled to a second supply.