Patent ID: 7564484

Claim:
A method for synchronizing a base unit and a camera unit, whereby a first digital video signal is being transferred from said camera unit to said base unit and a second digital video signal is being transferred from said base unit to said camera unit, said first and second digital video signals each including horizontal and vertical and F (field) synchronization signals, said method comprising the steps: in said base unit, providing from a genlock signal an F-genlock signal and a horizontal genlock signal and providing from user request or input an F-phase signal and a horizontal phase signal; in said base unit, comparing in a phase comparator said F-genlock signal and an actual F signal value received from said camera unit and providing therefrom an F value that controls together with a base unit clock signal a base unit vertical counter by setting it such that said second digital video signal is synchronized with said genlock signal, wherein said phase comparator is also controlled by said F-phase signal and wherein said vertical counter counts lines; in said base unit, generating count values output from a horizontal counter that is controlled by said base unit clock signal, wherein said horizontal counter counts clock pulses per line; in said base unit, generating said base unit clock signal under control of said horizontal genlock and horizontal phase signals and an output signal from said horizontal counter; in said base unit, combining said second digital video signal from a base unit video signal and said horizontal and vertical and F synchronization signals, wherein said horizontal and vertical and F synchronization signals are generated from said horizontal count values and the count values of said vertical counter and said base unit clock signal; in said camera unit, deriving from said second digital video signal horizontal sync and F values using the clock signal received from said second digital video signal, and generating from said horizontal sync and F values and from a camera unit clock signal horizontal count values and vertical count values using a camera unit horizontal counter and a camera unit vertical counter, respectively; in said camera unit, generating said camera unit clock signal under control of said clock signal received from said second digital video signal; in said camera unit, assembling said first digital video signal using a camera video signal, said camera unit clock signal and said camera unit horizontal count values and vertical count values; in said base unit, outputting said camera video signal in a temporally synchronized manner from a frst-in first-out memory under control of said base unit clock signal, whereby said camera video signal included in said first digital video signal as received by said base unit is fed to said first-in first-out memory under control of the clock signal obtained from said first digital video signal.