Patent ID: 7495873

Claim:
An electrostatic discharge (ESD) protection circuit for protecting a circuit from an ESD event occurring between a first voltage supply node and a second voltage supply node associated with the circuit, the first and second voltage supply nodes being electrically isolated from one another, the ESD protection circuit comprising: a metal-oxide semiconductor (MOS) device including a gate terminal, a first source/drain terminal and a second source/drain terminal, the first source/drain terminal being connected to the first voltage supply node and the second source/drain terminal being connected to the second voltage supply node; and a trigger circuit coupled to the gate terminal of the MOS device, the trigger circuit being configured to generate a control signal at the gate terminal of the MOS device for activating the MOS device during at least a portion of the ESD event, at least a portion of the trigger circuit being formed in a floating well which becomes biased to a voltage that is substantially equal to a higher one of a first voltage when the first voltage is supplied to the first voltage supply node and a second voltage when the second voltage is applied to the second voltage supply node.