Patent ID: 7993998

Claim:
A method for forming a semiconductor structure, the method comprising: providing a silicon substrate comprising an NMOS region and a PMOS region; epitaxially growing a first silicon germanium layer over the silicon substrate, wherein the first silicon germanium layer comprises a first portion over the NMOS region, and a second portion over the PMOS region; epitaxially growing a silicon-containing semiconductor layer over the first silicon germanium layer, wherein a germanium percentage in the silicon-containing semiconductor is lower than a germanium percentage in the first silicon germanium layer; forming a first gate dielectric layer over the silicon-containing semiconductor layer; forming a first gate electrode layer over the first gate dielectric layer; removing the first gate electrode layer, the first gate dielectric layer, and the silicon-containing semiconductor layer from over the PMOS region; forming a second gate dielectric layer, wherein the second gate dielectric layer comprises at least a portion over the second portion of the first silicon germanium layer; forming a second gate electrode layer over the second gate dielectric layer; patterning the first gate dielectric layer and the first gate electrode layer to form a first gate stack; and patterning the second gate dielectric layer and the second gate electrode layer to form a second gate stack.