Patent ID: 7793246

Claim:
A method for forming a matching table of inner pads and outer pads in a circuit layout, the method comprising the steps of: obtaining a pitch P i and a space S i between two neighboring inner pads, wherein P i equals a sum of S i and a width of the inner pad; computing, by using a computer, W im =m×P i −S i , wherein W im is a total width of m neighboring inner pads having the same function, m=1 to X, X is the number of the inner pads, and m and X are positive integers; obtaining a pitch P 0 and a space S 0 between the two neighboring outer pads, wherein P 0 equals a sum of S 0 and a width of the outer pad; computing W on =n×P 0 −S 0 , wherein W on is a total width of n outer pads, n=1 to Y, Y is the number of the outer pads, and n and Y are positive integers; computing R n =W on +(S o ×C), wherein C is a real number and R n defines a reference range for n=1 to Y; comparing W im with R j ; wherein R j =R n for n=j, j is a positive integer and j=2 to Y, to determine whether W im is smaller than or equal to R j and greater than R j-1 ; and recording the number of the outer pads matching with the m inner pads as j when W im is smaller than or equal to R j .