Patent ID: 8650554

Claim:
A method, in a data processing system, for improving single-thread performance in an in-order multi-threaded processor core, the method comprising: receiving, by a compiler executing on one or more processors in the data processing system, single-threaded application code; analyzing, by the compiler, the single-threaded application code to identify, instructions that can be executed in parallel; generating, by the compiler, multi-threaded application codes wherein the multi-threaded application code comprising a plurality of threads that execute the instructions that can be executed in parallel in separate threads; adding, by the compiler, a synchronization instruction to each thread of the multi-threaded application code to ensure that execution of the plurality of threads is equivalent to execution of the single-threaded application code in a single thread, wherein the in-order multi-threaded processor core supports the synchronization instruction and responsive to a calling thread encountering the synchronization instruction, blocks progress of the calling thread until all threads running within the multi-threaded application code reach the synchronization instruction; storing the multi-threaded application code in a memory of the data processing system; and outputting the multi-threaded application code to be executed in the in-order multi-threaded processor.