Patent ID: 8255718

Claim:
A power saving system employed in a computer which comprises a standby power source, comprising: a setting module communicating with the BIOS of the computer and configured for setting power saving modes on an interface provided by the BIOS for at least one function circuit, during the time the computer powered on; a detecting module configured for detecting “enable” and/or “disable” signals output from the BIOS, each “enable” signal corresponding to the “enable” of power saving mode of one of the at least one function circuit and each “disable” signal corresponding to the “disable” of power saving mode of one of the at least one function circuit; and a controlling module comprising at least one switching circuit configured for correspondingly interrupting the power supplied from the standby power source to one or more of the at least one function circuit after the computer shut down and the detecting module receiving “enable” signals corresponding to the one or more of the at least one function circuit; wherein the at least one function circuit comprises a USB circuit, a network circuit, and a clock circuit all connected to the standby power source in parallel, through the corresponding switching circuits; wherein the detecting module comprises a first detecting terminal for outputting the “enable” or “disable” signals from the BIOS and a second detecting terminal for outputting shut down signals of the computer.