Patent ID: 8817401

Claim:
A storage system, comprising: a storage device; a preamplifier connected to the storage device, the preamplifier configured for receiving a signal output from the storage device and generating and transmitting an analog signal output derived from the received signal output; and a read channel circuit connected to the preamplifier, the read channel circuit configured for receiving the analog signal output and generating and transmitting a digital signal output derived from the received analog signal output, the received analog signal output corresponding to a first sector of data received by the read channel circuit, wherein the read channel circuit is configured to calculate a zero gain start value based on a 2T target amplitude value, the 2T target amplitude value being derived from the analog signal output received by the read channel circuit, the read channel circuit configured to: calculate the 2T target amplitude value by convolving a pattern with an adaptive analog-to-digital converter target tap value, the adaptive analog-to-digital converter target tap value being associated with the first sector, receive preamble samples associated with a second sector of data, calculate an actual amplitude value based upon sine and cosine values obtained from the preamble samples, calculate an adjusted amplitude value based upon the 2T target amplitude value and the amplitude value, and apply the adjusted amplitude value to a variable-gain amplifier associated with the read channel.