Patent ID: 8686503

Claim:
A lateral high-voltage transistor, comprising: a semiconductor layer of a first conductivity type; a source region of a second conductivity type opposite to the first conductivity type in the semiconductor layer; a drain region of the second conductivity type in the semiconductor layer separated from the source region; a first isolation layer atop the semiconductor layer between the source region and the drain region; a first well region of the second conductivity type formed in the semiconductor layer surrounding the drain region, wherein the first well region has an edge extending towards the source region and separated from the source region; a second well region of the first conductivity type formed in the semiconductor layer surrounding the source region, wherein the second well region has an edge adjacent to the edge of the first well region; a gate positioned atop the first isolation layer above the second well region and an adjacent portion of the first well region; and a first buried layer of the first conductivity type formed in the semiconductor layer, and located under a portion of the first well region near the edge of the first well region, wherein the portion of the first well region has a bottom contacting the first buried layer and is overlapped by the gate, and wherein the gate, the portion of the first well region and the first buried layer form a JFET having a pinch-off voltage depending on a length of the first buried layer; a second buried layer of the second conductivity type formed in the semiconductor layer and located under the second well region, wherein the second buried layer physically contacts the first well region.