Patent ID: 8530315

Claim:
A method for fabricating a finFET device, the method comprising: forming a plurality of fin structures over a buried insulator (BOX) layer, the fin structures each comprising a semiconductor layer and extending in a first direction; forming a gate stack on the BOX layer, the gate stack being formed over the fin structures and extending in a second direction that is perpendicular to the first direction, the gate stack comprising a dielectric layer and a polysilicon layer; forming gate spacers on vertical sidewalk of the gate stack; depositing an epitaxial silicon (epi) layer over the fin structures, the epi layer merging the fin structures together; implanting ions to form source and drain regions in the fin structures; etching, after the implanting, the gate spacers so that an upper surface of the gate spacers is below an upper surface of the gate stack; and after etching the gate spacers, performing silicidation to fully silicide the polysilicon layer of the gate stack and to form silicide regions in an upper surface of the source and drain regions.