Patent ID: 6850579

Claim:
A finite impulse response filter of 1:4 interpolation with 108 taps for outputting filter output data of 8 bits with respect to filter input data of 4 bits, comprising: four shifting and storing means of 27 bits for unifying bits of the filter input data of 4 bits, which is 2's complement, to generate bi-unified input data and shifting and storing the bi-unified input data in response to a first clock signal; first selection means for selecting any one of the bi-unified input data stored in the four shifting and storing means of 27 bits in response to the first clock signal and a second clock signal; address generating means for generating addresses of lookup tables corresponding to each of a plurality of filter coefficients groups in response to the bi-unified input data selected by the first selection means; first to fourth lookup table groups for generating filter outputs of each filter coefficients group in response to the addresses generated by the address generating means; four accumulating means for shifting the filter outputs of the filter coefficients groups respectively outputted in parallel from the first to the fourth lookup table groups; second selection means for serially converting the outputs from each of the four accumulating means in accordance with the plurality of filter coefficients groups; and reversing means for reversing bits among the filter input data of 4 bits except the most significant bit to change the filter input data of 4 bits to an input of antipodal bits.