Patent ID: 8507343

Claim:
A method of manufacturing a variable resistance memory device comprising: forming an inter-insulating layer including a hole on a substrate; forming a selection device in a lower portion of the hole; forming a first electrode including a first part electrically connected to the selection device and contacting a side surface of upper portion of the hole and a second part extending from the first part to be parallel to a surface of the substrate; forming a first insulating pattern including a third part contacting the first part and a fourth part extending from the third part to contact the second part and having the same thickness as the third part, the first insulating pattern being disposed on the first electrode; forming a trench limited by the first insulating pattern and the inter-insulating layer by partly etching a sidewall of the inter-insulating layer facing the third part; forming a second insulating pattern filling the trench; and forming a variable resistance pattern and an upper electrode on the first electrode.