Patent ID: 7132685

Claim:
An asymmetry thin-film transistor comprising: a substrate; a semiconductor layer positioned on the substrate, the semiconductor layer comprising a channel region, a first lightly doped region and a first heavily doped region positioned at a side of the channel region, a second lightly doped region and a second heavily doped region positioned at the other side of the channel region, the first lightly doped region, the first heavily doped region, the second lightly doped region, and the second heavily doped region being horizontally positioned in the semiconductor layer, the first lightly doped region and the second lightly doped having different lengths; and a gate positioned on the substrate, the gate having a central line extending through the gate, the semiconductor layer, and the substrate, the channel region being asymmetric with respect to the central line of the gate, the first lightly doped region and the second lightly doped region being asymmetric with respect to the central line of the gate.