Patent ID: 7410872

Claim:
A method for sealing electronic devices formed on a semiconductor substrate comprising: forming a plurality of first electronic devices adjacent a first portion of the semiconductor substrate, each first electronic device including a first region comprising at least one first conductive layer projecting from the semiconductor substrate; forming a first sealing layer on the first regions including sidewalls thereof for sealing the plurality of first electronic devices; forming a protective layer on the first sealing layer; etching the protective layer to form protective spacers on the first sealing layer for the first regions; forming a plurality of second electronic devices adjacent a second portion of the semiconductor substrate, each second electronic device including a second region comprising a second conductive layer projecting from the semiconductor substrate; and forming a second sealing layer on the second regions including sidewalls thereof for sealing the plurality of second electronic devices, and on the first sealing layer for sealing the plurality of first electronic devices; said second sealing layer covering top portions of said second regions of said plurality of second electronic devices, with said first sealing layer between the top portions and said second sealing layer.