Patent ID: 7200846

Claim:
For maintaining data synchronization in a computer system configured to execute a scheduler and a software task that executes in a series of time slots an instruction sequence that includes at least one critical code section, a method comprising: A) employing the software task to maintain an indicator that indicates whether the task is executing the critical code section; B) using the scheduler to preempt the software task; C) after the software task has been preempted, employing the scheduler to: i) make a determination of whether the indicator is asserted using only software instructions that do not cause a context switch; ii) cause the software task to resume by using a thread-resumption instruction whose operation code does not inherently result in such an indicator's being tested and does not use a hardware trap to test the indicator; and iii) if the determination is that the indicator is asserted, deliver a signal to the software task; and D) employing the software task to perform a recovery procedure in response to the signal if the software task was preempted during the critical code section.