Patent ID: 8406351

Claim:
A compensation circuit comprising: an input configured to receive an analog signal; a high pass filter configured to receive the analog signal; analog to digital conversion circuitry configured to receive an output of the high pass filter; a finite impulse response filter configured to receive an output of the analog to digital conversion circuitry; a baseline wander equalization filter configured to receive an output of the finite impulse response filter, and operative to compensate for baseline wander in an output of the finite impulse response filter to produce an output related to the baseline wander; a combiner responsive to an output of the baseline wander equalization filter; a Viterbi-like detector responsive to the combiner; a decision feedback equalization filter responsive to an output of the Viterbi-like detector, wherein the combiner is further responsive to an output of the decision feedback equalizer; and an error feedback circuit generating an error feedback signal based on the output of the Viterbi-like detector and a direct output of the combiner, wherein the combiner is further responsive to the error feedback signal.