Patent ID: 8178421

Claim:
A method of manufacturing a semiconductor device comprising: preparing a semiconductor wafer having a first surface including a plurality of device regions and partition regions for dividing the plurality of device regions and further having a second surface opposite from the first surface, forming wires on each of the device regions of the first surface, forming metal bumps on the wires, forming a stopper film at the partition regions on the first surface of the semiconductor wafer, that limits excavation by etching, etching the semiconductor wafer from a side of the second surface to form in each of the device regions a through hole that exposes a wire, and to form a groove that exposes the stopper film in a region of the second surface corresponding to a partition region of the first surface around each of the device regions, wherein a depth of the groove is equal to or greater than a depth of the through hole, forming in the through holes penetrating electrodes that are electrically connected to the wires, and dicing the semiconductor wafer to form individual device regions by cutting the semiconductor wafer along the groove from a side of the first surface.