Patent ID: 7279798

Claim:
A method for increasing the number of signals passing between a semiconductor chip and a printed wiring board through a chip carrier, wherein the chip has a generally planar shape that creates an imaginary footprint area on a planar top surface of a carrier on which the chip is mounted and through which the signals pass between the chip and the chip carrier, wherein the chip carrier includes a core having at least one voltage/ground plane, a first signal plane spaced above and electrically isolated from the voltage/ground plane by a layer of a dielectric material, a second signal plane separated from the first signal plane and electrically isolated therefrom by a dielectric layer, and a top conductive layer electrically connected to the chip and separated from the second signal plane by a dielectric layer, the method comprising routing a first set of signals on the second signal plane to a location outside of the footprint area of the chip; routing a second set of signals on the second signal plane from within the footprint area to a location closer to an edge of the footprint area; and passing the second set of signals that have been routed closer to the edge of the footprint area on the second signal plane through microvias in the second signal plane to a surface of the first signal plane, and rerouting at least some of the second set of the circuit lines on the first signal plane to a location outside of an edge of the footprint area.