Patent ID: 8227357

Claim:
A method of fabricating a semiconductor device, comprising: forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layer using an atomic layer deposition (ALD) method, the dielectric layer structure comprising a first dielectric layer formed of silicon oxide, a second dielectric layer on the first dielectric layer formed of a material different from a material forming the first dielectric layer, and a third dielectric layer formed of the silicon oxide on the second dielectric layer; and forming a control gate on the dielectric layer structure, wherein the first and third dielectric layers formed of the silicon oxide are formed by providing a first gas comprising an inorganic silicon precursor selected from the group consisting of dichlorosilane (DCS), tischlorosilane (TCS) and hexachlorodislane (HCD), removing a first non-reacting gas by providing a first purge gas, providing simultaneously (a) a second gas comprising a hydrogen gas, and (b) a third gas comprising an oxide gas, and removing a second non-reacting gas and a third non-reacting gas by providing a second purge gas.