Patent ID: 6905931

Claim:
A method of designing an integrated circuit, comprising: providing a unit cell on a substrate, the unit cell including a first active region, which extends in a first direction to have first and second ends thereof, a second active region, which extends in the first direction to have first and second ends thereof, the first end of the second active region opposing the second end of the first active region, a pair of conductive patterns, each of which extends in the first direction across the first active region and the second active region, wherein the first active region is divided into three first regions by the pair of conductive patterns and the second active region is divided into three second regions by the pair of conductive patterns, a first contact region formed in a well region and arranged directly adjacent to first ends of each of the three first regions in the first direction, and a second contact region formed in the substrate and arranged directly adjacent to second ends of each of the three second regions in the first direction; and providing conductive lines to selectively connect the first and second regions to each other.