Patent ID: 8332795

Claim:
A non-transitory computer accessible storage medium comprising a plurality of instructions which, when executed: receive a set of signal names of signals that are to be output from a programmable logic device within a programmable logic device implementation of at least a portion of an integrated circuit described in one or more hardware description language files; for each respective signal of at least a subset of the signals, perform clock domain tracing to automatically identify a clock domain of the respective signal; select two or more of the signals to be multiplexed on a pin of the programmable logic device in response to determining that the two or more signals have matching clock domains; and store information indicating that the two or more signals can be multiplexed on the pin, wherein a programmable logic device design tool is executable to receive the information and generate a bitstream for implementing a programmable logic device design in which the two or more signals are multiplexed on the pin.