Patent ID: 8629501

Claim:
A semiconductor structure comprising: a semiconductor-on-insulator (SOI) substrate including a handle substrate, at least one buried insulator portion abutting said handle substrate, and at least one top semiconductor portion abutting said at least one buried insulator portion; a trench extending from a top surface of said at least one top semiconductor portion through said at least one buried insulator portion and into the handle substrate; and a stack of an insulator stressor plug and a silicon oxide plug located in said trench, wherein said insulator stressor plug comprises a nitride and abuts a bottom surface of said trench that is present in the handle substrate and said silicon oxide plug is substantially coplanar with said top surface of said at least one top semiconductor portion, the insulator stressor plug filling the entirety of the trench that is present between the silicon oxide plug and the bottom surface of the trench, wherein an interface between said insulator stressor plug and said silicon oxide plug is located between said top surface of said at least one top semiconductor portion and a bottom surface of said at least one top semiconductor portion, or at said bottom surface of said at least one top semiconductor portion.