Patent ID: 7109904

Claim:
A differential digital-to-analog converter comprising: a decoding stage comprising N decoders, wherein each decoder is adapted to receive M voltages associated with M tapped nodes of a different one of N equal segments of a resistor; each decoder further adapted to deliver a first and a second of the received M voltages to a pair of associated first and second nodes, wherein the first and the second delivered voltages in each of the N decoders are complementary with respect to a voltage present at the center of the resistor segment disposed in that decoder; a second decoding stage adapted to receive the N first voltages and the N second voltages and to deliver one of the N first voltages as a third voltage and one the N second voltages as a fourth voltage to a pair of third and fourth output nodes, wherein the third and fourth voltages are complementary with respect to a voltage present at the center of the resistor; and a third decoding stage adapted to deliver one of the third and fourth voltages to a first output terminal of the digital-to-analog converter, and deliver the other one of the third and fourth voltages to a second output terminal of the digital-to-analog converter.