Patent ID: 7109779

Claim:
A semiconductor integrated circuit comprising: a first circuit; and a second circuit having a breakdown voltage higher than that of said first circuit, an operation voltage of said second circuit being higher than that of said first circuit; wherein said second circuit comprises: a level shift circuit operated by said operation voltage of said second circuit and adapted to shift a level of a high level output of said first circuit to a proper level of an input of said second circuit operated by said operation voltage thereof; a bypass circuit adapted to bypass said level shift circuit by directing an input signal supplied to an input terminal thereof to an output terminal thereof along a bypass path, an amount of level shift along said bypass path from said input terminal to said output terminal being smaller than that along a level-shifting path from an input of said level shift circuit to an output of said level shift circuit; a signal selecting circuit having a first input terminal coupled to said output of said level shift circuit, a second input terminal coupled to said output terminal of said bypass circuit, a control terminal to which a selection signal for arbitrarily selecting any one of input signals supplied to said first and second input terminals, and an output terminal from which a selected signal selected by said selection signal is obtained, and an output buffer operated by said operating voltage of said second circuit having an input terminal to which an output signal of said output terminal of said signal selecting circuit is supplied.