Patent ID: 8306170

Claim:
A method of synchronizing the frequency of a local clock of a digital data decoder with the frequency of a program clock, wherein the decoder includes clock adjustment hardware for adjusting the local clock frequency and a processing unit for executing software programs and having a clock adjustment software program for adjusting the local clock frequency, the method comprising the steps of: determining the difference between the local and program clock frequencies, then adjusting the frequency at which the local clock oscillates so that said difference approaches zero, including the steps of: using the clock adjustment hardware to adjust the local clock frequency until a threshold condition occurs; and after the threshold condition occurs, using the software program executing on the processing unit to adjust the local clock frequency; wherein the adjusting the frequency at which the local clock oscillates includes switching between using said clock adjustment hardware and using said clock adjustment software program executing on the processing unit to adjust the frequency at which the local clock oscillates.