Patent ID: 8610273

Claim:
A packaged semiconductor device comprising: a semiconductor die comprising a plurality of pads arranged in a pad ring around the periphery of the die on an active face of the die; and a first dielectric layer formed on the active face, wherein the first dielectric layer comprises a first region terminated within the pad ring and a further region between the pad ring and an edge of the die, such that an area around the pad ring is clear of the first dielectric layer; a plurality of tracks formed in a conductive layer, wherein each track is connected to one of the plurality of pads and comprises an upper portion which is formed on the first dielectric layer and wherein at least one of the plurality of tracks comprises an upper portion which is formed on the further region of the first dielectric layer; a second dielectric layer arranged to encapsulate the active face; and a plurality of solder elements, each of the solder elements being electrically connected to an upper portion of a track.