Patent ID: 8706951

Claim:
A method, comprising: detecting, by at least hardware of a computing device, a fast access bit from a portion of a memory request directed to a single type of flash memory, wherein the fast access bit indicates whether to program fast access pages or slow access pages of a multi-level cell (MLC) flash memory for the memory request, wherein the fast access pages are programmed faster than the slow access pages; and programming, by at least the hardware of the computing device, data associated with the memory request, in response to the detected fast access bit, from a volatile memory: (1) to the fast access pages of the multi-level cell (MLC) flash memory while skipping the slow access pages, or (2) to the slow access pages while skipping the fast access pages; wherein the fast access pages of the multi-level cell (MLC) flash memory are formed from a group of most significant bits from the MLC flash memory and wherein the slow access pages are formed from a group of least significant bits from the MLC flash memory; and wherein programming the data from the volatile memory to the fast access pages includes programming the data into the group of most significant bits while skipping the group of least significant bits.