Patent ID: 7907463

Claim:
A non-volatile semiconductor storage device having a memory cell array to which electrically rewritable non-volatile memory cells are disposed and a controller in charge of a control for repeating an erase operation for applying an erase voltage to the memory cells to erase data, an erase verify operation for confirming whether or not data has been erased, and a step-up operation for increasing the erase voltage by a predetermined step-up voltage when erasure of the data is not finished, the controller comprising: a first storage unit configured to store a value of an erase start voltage applied first as the erase voltage in a series of the erase operations; a second storage unit configured to store a value of an erase completion voltage as the erase voltage when the data has been erased after the erase operation and the erase verify operation is executed; a first comparator for comparing the value of the erase completion voltage with the value of the erase start voltage each time the erase operation is executed; a counter for counting up a count value when the first comparator determines that the value of the erase completion voltage is larger than the value of the erase start voltage; and a second comparator for updating a value of the erase start voltage stored in the first storage unit when the count value becomes larger than a predetermined value.