Patent ID: 6870249

Claim:
A semiconductor device comprising: a wiring substrate having a first surface, a second surface opposed to the first surface, and an opening portion extending from the first surface to the second surface; a terminal formed on the first surface; a wiring formed on the second surface and having one end portion projected to the opening portion and electrically connected to the terminal; a first semiconductor element having a third surface formed with a first external terminal and an internal connection terminal outside of the first external terminal, and a fourth surface opposed to the third surface, the first semiconductor element being received in the opening portion such that the internal connection terminal is placed on and electrically connected to the inner end portion of the wiring; a second semiconductor element having a fifth surface formed with an electrode, and a sixth surface opposed to the fifth surface, the sixth surface being attached on the fourth surface; a conductor electrically connecting the electrode of the second semiconductor element and the terminal of the wiring substrate; and a sealing member sealing the first and second semiconductor elements and the conductor.