Patent ID: 8918700

Claim:
An apparatus for controlling access to a memory device configured to store code words, the apparatus comprising: encoding circuitry responsive to a write transaction to generate one or more code words for storage in the memory device, each code word comprising a plurality of symbols, said plurality of symbols comprising data symbols and associated error correction code (ECC) symbols; decoding circuitry responsive to a read transaction to decode one or more code words read from the memory device in order to generate read data for outputting in response to the read transaction, the decoding circuitry comprising error correction circuitry configured, for each read code word, to perform an error correction process to detect and correct errors in up to P symbols of said code word, where P is dependent on the number of ECC symbols in the code word; and error tracking circuitry configured to determine error quantity indication data indicative of the errors detected by the error correction circuitry; in response to the error quantity indication data indicating that an error threshold condition has been reached, the apparatus being caused to transition from a normal mode of operation to a safety mode of operation, in said safety mode of operation the encoding circuitry being configured such that the number of symbols in each code word generated by the encoding circuitry is no greater than in the normal mode of operation but each code word has a higher ratio of ECC symbols to data symbols than in said normal mode of operation.