Patent ID: 8305061

Claim:
A circuit for regulation, comprising: a buck-boost regulator controller, including: a digital error amplifier that is arranged to provide a digital error signal that is based, at least in part, on a difference between an output voltage and a reference voltage, wherein the digital error signal is a multi-bit digital signal; and buck-boost control logic that is arranged to determine switching duty cycles for switching regulation based, at least in part, on the digital error signal, wherein the buck-boost control logic includes: a buck/boost mode control logic circuit that is arranged to provide a plurality of duty cycle signals based, at least in part, on the digital error signal; and a digital loop filter that is arranged to provide a duty cycle command signal based, in part, on the digital error signal, wherein the buck/boost mode control logic circuit is arranged to provide the plurality of duty cycle signals based, in part, on the duty cycle command signal, and wherein the buck/boost mode control logic circuit is arranged to provide the plurality of duty cycle signals to control the buck/boost regulation based on the duty cycle command signal as follows; when De is less than Dbuck_max, provide the plurality of duty cycle signals such that buck regulation control is provided, where De is a value of the duty cycle command signal, and Dbuck_max is a maximum duty cycle for the buck regulation; when De is greater than 1+Dboost_min, provide the plurality of duty cycle signals such that boost regulation control is provided, where Dboost_min is a minimum duty cycle for the boost regulation; and when De is greater than Dbuck_max and less than 1+Dboost_min, provide the plurality of duty cycle signals such that buck-boost mode regulation control is provided.