Patent ID: 7902858

Claim:
A semiconductor device comprising: a calibration circuit, the calibration circuit comprising: a first replica unit including a first replica buffer that drives a calibration terminal and a first replica control circuit that controls the first replica buffer; a first pre-emphasis unit including a first pre-emphasis circuit connected in parallel to the first replica buffer and a first pre-emphasis control circuit that controls the first pre-emphasis circuit; a second replica unit including a second replica buffer having a circuit configuration substantially identical to that of the first replica buffer and a second replica control circuit that controls the second replica buffer; a third replica unit including a third replica buffer connected in series to the second replica buffer and a third replica control circuit that controls the third replica buffer; a second pre-emphasis unit including a second pre-emphasis circuit connected in parallel to the third replica buffer and a second pre-emphasis control circuit that controls the second pre-emphasis circuit; and a control unit that controls the third replica control circuit to change an impedance of the third replica buffer based on a voltage appearing at a contact node between the second replica buffer and the third replica buffer, controls the first replica control circuit to change an impedance of the first replica buffer based on a voltage appearing at least at the calibration terminal, and controls the first pre-emphasis control circuit to bring the first pre-emphasis circuit into an active state during an initial stage of an active period of the first replica buffer.