Patent ID: 8558516

Claim:
A charge-controlling semiconductor integrated circuit comprising: a current-controlling MOS transistor connected between a voltage input terminal and an output terminal, which current-controlling MOS transistor controls current flowing from the voltage input terminal to the output terminal; a substratum voltage switching circuit connected between the voltage input terminal and the output terminal, and a substratum of the current-controlling MOS transistor, wherein an input voltage or an output voltage is applied to said substratum, a voltage comparison circuit to compare the input voltage and the output voltage, wherein the voltage comparison circuit is configured to include an intentional offset in a first potential direction; and a level shift circuit to shift the output voltage to a potential direction opposite to the first potential direction, wherein: a voltage from the level shift circuit is input to a first input terminal of the voltage comparison circuit, the input voltage is input to a second input terminal of the voltage comparison circuit, and the charge-controlling semiconductor integrated circuit is configured to control the substratum voltage switching circuit based on an output of the voltage comparison circuit, such that: the substratum voltage switching circuit applies the input voltage to the substratum of the current-controlling MOS transistor when a sum of the voltage of the first input terminal and the intentional offset is lower than the voltage of the second input terminal, and the substratum voltage switching circuit applies the output voltage to the substratum of the current-controlling MOS transistor when the sum of the voltage of the first input terminal and the intentional offset is higher than the voltage of the second input terminal.