Patent ID: 8169444

Claim:
A bit block transfer (Bitblt) circuit, comprising: a read register for storing decomposition data comprising original data; a write register; a bit shifting circuit for shifting the decomposition data in the read register to the write register and shifting bits of the decomposition data in the write register so that an initial bit of the original data of the decomposition data is situated apart from an initial address of the write register by a bit-shifting amount; and an overflowing register, coupled to the write register, for storing overflowing data of the original data overflowing from a memory space of the write register when the bits of the decomposition data in the write register are being shifted, wherein the write register outputs and writes the decomposition data stored in the write register to a memory cell of a first memory; wherein the read register and the write register respectively comprise a plurality of first memory cells and a plurality of second memory cells, and the bit block transfer circuit comprises: a first multiplexer (Mux) for responding with a first select signal to output stored data stored in one of the first memory cells; a second multiplexer for responding with a second select signal to output stored data stored in one of the second memory cells; a third multiplexer for responding with a first level and a second level of a third control signal to respectively output the data, outputted from the first and second multiplexers, to the bit shifting circuit; a first de-multiplexer for responding with a first level and a second level of a fourth control signal to respectively provide the data, generated by the bit shifting circuit, to the read register and the write register; a second de-multiplexer for responding with a fifth control signal to select and store the data, generated by the bit shifting circuit, to one of the first memory cells; and a third de-multiplexer for responding with a sixth control signal to select and store the data, generated by the bit shifting circuit, to one of the second memory cells.