Patent ID: 7741682

Claim:
A semiconductor integrated circuit device comprising: a diffusion region selectively formed in a semiconductor substrate to define a channel region; a gate electrode structure disposed over the channel region with an intervention of a gate insulating film therebetween, the gate insulating film comprising an extended portion extending from an edge of the gate electrode structure toward the diffusion region; a silicon layer disposed on the diffusion region and including a contact surface contacting an edge of the extended portion of the gate insulating film; a first insulating film formed on a substantially entire upper surface of the extended portion of the gate insulating film, the first insulating film having a thickness which is less than a thickness of the silicon layer at the contact surface of the silicon layer; and a second insulating film disposed on the first insulating film and elongated over a side surface of the gate electrode structure, the second insulating film being different in material from the first insulating film, and the first insulating film being sandwiched between the second insulating film and the extended portion of the gate insulating film.