Patent ID: 7930266

Claim:
A computer implemented method for ordering a plurality of microelectronic dies, the computer implemented method comprising: computing a dissimilarity matrix based on a plurality of probabilities of classifications, wherein the classifications are determined by a characteristic of each microelectronic die of the plurality of microelectronic dies, wherein each microelectronic die of the plurality includes an integrated circuit, wherein the characteristic includes clocking speed of each microelectronic die of the plurality of microelectronic dies, and wherein the characteristic of each microelectronic die is classified by a die level cherry picking system; computing a weighted distance matrix based on the following: the dissimilarity matrix, weighted distances between at least one pair of the microelectronic dies of the plurality of microelectronic dies, and geometric distances between neighboring microelectronic dies of the plurality of microelectronic dies; generating a plurality of rank ordered sequence of candidates representing the plurality of microelectronic dies, the generating is based on the weighted distance matrix; and selecting, from the plurality of rank ordered sequence of candidates, a rank ordered sequence representing the order of the plurality of microelectronic dies, the selecting based on a sum of weighted distances between neighboring microelectronic dies in the rank ordered sequence.