Patent ID: 7788451

Claim:
A method for executing read and write commands in a memory system having a bidirectional memory bus coupling a controller to a first, second, and third memory hub, the second memory hub being downstream from the first memory hub, and the third memory hub being downstream from the second memory hub, the method comprising: the controller issuing a read command to access a first memory location in a first memory device coupled to the second memory hub; after the controller issues the read command and before receiving read data corresponding to the issued read command, the controller issuing a write command to write data to a second memory location in a second memory device coupled to the third memory hub, the controller further providing write data corresponding to the issued write command to the bi-directional memory bus; retrieving the read data from the first memory location and providing the read data to the bi-directional memory bus; the controller providing a bypass enable signal to the first memory hub; in response to receiving the bypass enable signal, the first memory hub storing the write data to allow the read data on the bidirectional memory bus to be coupled to the controller; and the first memory hub providing the write data to the bidirectional memory bus.