Patent ID: 8441012

Claim:
An array substrate comprising: a substrate; a plurality of first wiring lines provided on said substrate substantially parallel to each other; a plurality of second wiring lines provided so as to be substantially orthogonal to said plurality of first wiring lines; an insulating layer interposed at the intersecting portions between said first wiring lines and said second wiring lines; switching elements respectively electrically connected to said first wiring lines and said second wiring lines and configured by laminating a plurality of thin films; and third wiring lines which are provided so as to be respectively continuous with said first wiring lines or said second wiring lines and which respectively connect said switching elements to said first wiring lines or said second wiring lines, wherein each of said switching elements is made in an island shape by etching that makes use of a reflowed resist film obtained by reflow of a resist film formed on said switching element, the corresponding one of said third wiring lines, and on the corresponding one of said first wiring lines or second wiring lines, and each of said third wiring lines is provided with a narrow portion in which the width is narrowed in planar shape.