Patent ID: 7470924

Claim:
A phase change RAM device comprising: a semiconductor substrate; an isolation layer formed on the semiconductor substrate so as to define a substantially trapezoidal shaped active area in the semiconductor substrate; a word line formed over the active area of the semiconductor substrate including the isolation layer; a source area and a drain area formed on respective sides of the word line in the active area; a first metal pad formed in the source area, and a second metal pad formed in the drain area; a PCM cell having a stacked structure of a bottom electrode, a phase change layer, and a top electrode formed on the first metal pad; a first metal wiring for a bit line used for signal sensing, which is arranged in a direction vertical to the word line and which makes electrical contact with the top electrode of the PCM cell; and a second metal wiring for applying a supply voltage, which is arranged in a direction vertical to the word line and makes electrical contact with the second metal pad of the drain area.