Patent ID: 8680663

Claim:
A semiconductor device structure, comprising: a first integrated circuit package comprising at least one integrated circuit device mounted on a first substrate, the first integrated circuit package having a plurality of package on package connectors extending outwards from a bottom surface of the first substrate and arranged in a pattern of one or more rows proximal to an outer periphery of the first substrate; and a second integrated circuit package comprising at least another integrated circuit device mounted on a second substrate, the second substrate comprising a plurality of lands on an upper surface of the second substrate coupled to the plurality of package on package connectors, the second integrated circuit package comprising a plurality of external connectors extending from a bottom surface of the second integrated circuit package, the plurality of external connectors arranged in a grid pattern; wherein the pattern of the external connectors is staggered from the pattern of the package on package connectors so that the package on package connectors are not in vertical alignment with the external connectors.