Patent ID: 6841837

Claim:
A semiconductor device comprising: a source side offset diffusion layer region and a drain side offset diffusion layer region of a second conductivity type in a transistor formed, so as to be separated from each other, in a predetermined region in a region of a first conductivity type in a semiconductor substrate; a gate insulator film formed between said source side offset diffusion layer region and said drain side offset diffusion layer region; a gate electrode formed on said gate insulator film; and a diffusion layer of the first conductivity type of which an impurity concentration is higher than that of said region of the first conductivity type and which is formed so as to surround said source side offset diffusion layer region, said drain side offset diffusion layer region and said gate insulator film, wherein: both ends of said gate insulator film in a direction substantially perpendicular to a direction from said source side offset diffusion layer region to said drain side offset diffusion layer region form protruding portions that protrude at borders of said source side offset diffusion layer region and of said drain side offset diffusion layer region in a direction toward said diffusion layer of the first conductivity type, said gate insulator film at said protruding portions makes direct contact with said gate electrode, said diffusion layer of the first conductivity type is formed so as to surround said protruding portions, and a position of an end of said diffusion layer of the first conductivity type at each of parts surrounding said protruding portions substantially coincides with a position of an end of each of said protruding portions.