Patent ID: 6912144

Claim:
A multiple phase DC—DC converter comprising: a first series circuit comprising first and second output transistors coupled across an input voltage, a first output terminal comprising a first phase voltage being provided at a first common connection between the first and second transistors; at least one second series circuit comprising third and fourth output transistors coupled in series across the input voltage, a second output terminal comprising a second phase voltage being provided at a second common connection between the third and fourth transistors of the at least one second series circuit; a first output inductor coupled between the first output terminal and an output voltage terminal of the converter; at least one second output inductor coupled between the second output terminal and the output voltage terminal of the converter; an output capacitor coupled to the output voltage terminal; a first pulse width modulator circuit for driving the first and second transistors, the first pulse width modulator circuit comprising a first pulse width modulator comparator and a first fixed slope ramp generator, the first fixed slope ramp generator supplying a fixed slope ramp signal to one input of the first pulse width modulator comparator; at least one second pulse width modulator circuit for driving the third and fourth transistors, the at least one second pulse width modulator circuit comprising a second pulse width modulator comparator and a variable slope ramp generator, the variable slope ramp generator supplying a variable slope ramp signal to one input of the second pulse width modulator comparator; an error amplifier for comparing the output voltage of the converter to a reference voltage and providing an error amplifier output voltage to respective second terminals of each of the first and second pulse width modulator comparators; a first current sense amplifier for determining the phase current in a first phase of the converter provided by the first series circuit; at least one second current sense amplifier for determining the phase current in at least one second phase of the converter provided by the at least one second series circuit; and at least one share adjust amplifier for receiving outputs from each of the first and at least one second current sense amplifiers and adjusting the slope of the variable slope ramp signal provided by the variable slope ramp generator to adjust the current provided by the at least one second series circuit thereby to equalize the currents provided by the first and at least one second phases.