Patent ID: 8429735

Claim:
A method of securely controlling computer, including a computer on a microchip, said computer being configured to operate as a general purpose computer connected to the Internet, said computer comprising: at least one network connection configured for connection to at least a public network of computers including the Internet, said at least one network connection being located in at least one public unit of said computer, at least one additional and separate private network connection configured for connection to at least a separate, private network of computers, said at least one additional and separate private network connection being located in at least one protected private unit of said computer, and at least one inner hardware-based access barrier or inner hardware-based firewall that is located between and communicatively connects said at least one protected private unit of said computer and said at least one public unit of said computer; wherein said private and public units and said two separate network connections are separated by said at least one inner hardware-based access barrier or inner hardware-based firewall; said at least one protected private unit of the computer includes at least a first microprocessor or core or processing unit, said at least one public unit of the computer includes at least a second microprocessor or core or processing unit, configured to operate as a general purpose microprocessor or core or processing unit, and said second microprocessor or core or processing unit is separate from said inner hardware-based access barrier or inner hardware-based firewall; and at least a part of said computer is configured using active hardware configuration; and said method comprising the steps of: controlling at least a part of said active hardware configuration of said computer from said private network of computers, said controlling step including at least transmitting data and/or code from said private network of computers to said separate private network connection in said protected private unit of said computer; receiving said data and/or code by said first microprocessor or core or processing unit in said protected private unit of said computer; and transmitting data and/or code by said first microprocessor or core or processing unit in said protected private unit to at least a part of said computer to configure at least a part of said computer using said active hardware configuration of said computer.