Patent ID: 8001394

Claim:
A computer-implemented method for managing power in a multi-core microprocessor, the computer-implemented method comprising: translating a first command by a power management system for managing and controlling power on a microarchitectural level, wherein the first command comprises a power setting; sending the first command, by a global, system-level power management controller, to a command and assist unit in a selected chiplet of a plurality of chiplets of the multi-core microprocessor, wherein a chiplet comprises a core and cache memory and wherein each chiplet of the plurality of chiplets may be set to a different power setting; sending the first command, by the command and assist unit, to an override control unit; determining, by the override control unit, whether a global, system-level power management controller firmware has set an override control bit; responsive to a determination that the global, system-level power management controller firmware has set the override control bit, overriding a command from hypervisor firmware with the first command; sending the first command to the power management system; and setting microarchitectural power management techniques by the power management system according to the power setting.