Patent ID: 7703065

Claim:
A method, comprising: comparing, by routing software executing on a computing device, netlists for a plurality of custom logic functionalities to be implemented in an integrated circuit; from the netlists, identifying, by the routing software, netlist connections common to all of the plurality of custom logic functionalities and netlist connections common to some, but not all, of the plurality of custom logic functionalities; and creating, by the routing software, a layout for the integrated circuit, wherein the layout includes a plurality of logic cells, a plurality of field-programmable switches, and a plurality of hardwired metal connections, wherein the netlist connections common to all of the plurality of custom logic functionalities are implemented with a first subset of the plurality of hardwired metal connections, and wherein the netlist connections common to some, but not all, of the plurality of custom logic functionalities are implemented by a combination of a second subset of the plurality of hardwired metal connections and the plurality of field-programmable switches.