Patent ID: 7827433

Claim:
An electronic device comprising: a plurality of functional circuitries; and signal paths for linking the plurality of functional circuitries, wherein at least one of the signal paths includes serializing circuitry and deserializing circuitry for providing latency to the at least one signal path, wherein the serializing circuitry is configured to multiplex multiple functional circuitry output signals and to drive at least one time-multiplexed data signal on at least one conductor; wherein the deserializing circuitry is configured to demultiplex the at least one time-multiplexed data signal driven on the at least one conductor into parallel functional circuitry input signals; and wherein the serializing circuitry and the deserializing circuitry are clocked at a higher frequency than the electronic device reference clock frequency for scheduling the transmission of the multiple functional circuitry output signals over the at least one conductor during an electronic device reference clock cycle.