Patent ID: 8362555

Claim:
A semiconductor device, comprising: a semiconductor die comprising a circuit side and a non-circuit side; a high side lateral diffusion metal oxide semiconductor (LDMOS) field effect transistor (FET) on the circuit side of the semiconductor die; a source region of the high side LDMOS FET; a low side LDMOS FET on the circuit side of the semiconductor die, wherein each of the corresponding structures of the high side LDMOS FET and the low side LDMOS FET have the same dopant type; a buried layer that extends through the high side LDMOS FET and the low side LDMOS FET; a conductive structure which electrically couples a drain region of the low side LDMOS FET with the source region of the high side LDMOS FET; and an output node, wherein the output node is electrically connected to the source region of the high side LDMOS FET and to the drain region of the low side LDMOS FET; wherein the conductive structure includes an isolating material disposed within the conductive structure and along at least one sidewall of the conductive structure.