Patent ID: 7446775

Claim:
A graphic data processor formed on a semiconductor chip, comprising: a central processing unit; a first bus coupled to said central processing unit; a direct memory access controller for controlling a data transfer using said first bus; a bus bridge circuit for transmitting/receiving data to/from said first bus; a three-dimensional graphics module coupled to the first bus for receiving a command from said central processing unit via said first bus and performing a three-dimensional graphic process; a second bus coupled to said bus bridge circuit and a plurality of first circuit modules; a third bus coupled to said three-dimensional graphics module; and a memory interface circuit coupled to said first bus, said second bus, and said three-dimensional graphics module via said third bus directly, and capable of being coupled to an external memory, wherein said bus bridge circuit is capable of controlling a direct memory access transfer between a circuit coupled to the outside of the semiconductor chip and said second bus, and wherein said memory interface circuit arbitrates access between said external memory and said central processing unit for transferring data to/from said external memory, between said external memory and said three-dimensional graphics module for receiving data from said external memory via said third bus independently from said first bus and said second bus, and between said external memory and one of said first circuit modules for receiving data from said external memory via said second bus independently from said first bus and said third bus.