Patent ID: 7910968

Claim:
A semiconductor device, comprising: a plurality of ferroelectric capacitors formed over a semiconductor substrate, each of the ferroelectric capacitors comprising a bottom electrode, a ferroelectric film, and a top electrode; a first barrier film directly covering side surfaces of the bottom electrode, the ferroelectric film, and the top electrode of the ferroelectric capacitor and preventing diffusion of hydrogen or water; an interlayer insulating film formed over the first barrier film; and a wiring formed on the interlayer insulating film and coupled to the ferroelectric capacitor, wherein the interlayer insulating film includes one or more second barrier films covering at least one of the plurality of ferroelectric capacitors from above and a side thereof, and preventing diffusion of hydrogen or water, the one or more second barrier films cover the plurality of ferroelectric capacitors in common, the wiring is formed in a plurality of wiring layers, and the semiconductor device further comprising a third barrier film formed in a position at a height of one or more of the wiring layers, and preventing diffusion of hydrogen or water, and an insulating film formed over an uppermost wiring layer located on an uppermost position of the plurality of wiring layers, wherein a pad opening reaching the uppermost wiring layer is formed in the insulating film.