Patent ID: 8686392

Claim:
A semiconductor device, comprising: a semiconductor substrate having a main surface; a memory cell region including a plurality of magnetoresistive elements formed over the main surface of the semiconductor substrate, and changing in electrical resistance according to the direction of magnetization, disposed therein, the magnetoresistive element including a magnetization fixed layer fixed in direction of magnetization, a magnetization free layer made variable indirection of magnetization, and a tunneling insulation layer interposed between the magnetization fixed layer and the magnetization free layer; an interlayer insulation film disposed at the same layer as the magnetoresistive elements; a peripheral circuit region disposed in the periphery of the memory cell region in plan view; a plurality of first wires formed above the magnetoresistive elements, extending in the direction along the main surface, and coupled to the top surfaces of the magnetoresistive elements; and a multilayer structure disposed in the peripheral circuit region so as to overlap a second wire formed of the same layer as the first wire in plan view, the multilayer structure comprising a layer equal in material to the magnetization free layer forming the magnetoresistive element, a layer equal in material to the tunneling insulation layer, and a layer equal in material to the magnetization fixed layer, wherein the multilayer structure is disposed so as not to overlap both of a pair of the adjacent second wires in plan view in the peripheral circuit region.