Patent ID: 8495545

Claim:
A method for using direct memory access (DMA) to initialize a programmable logic device (PLD), the method comprising: manipulating a control line of the PLD to configure the PLD in a programming mode; receiving PLD programming data at a PLD interface over a bus from a DMA control at a DMA speed, the PLD interface controlling access of a processor and the DMA control to a programming port on the PLD, the PLD interface comprising a data buffer and pacing logic; writing the PLD programming data to the data buffer; reading the PLD programming data from the data buffer; and transmitting the PLD programming data to the programming port on the PLD at a PLD programming speed, wherein the pacing logic of the PLD interface controls the transmitting at the PLD programming speed, the PLD programming speed being a different speed than the DMA speed, and the DMA control is configured to perform the transmitting while the processor performs a processing task different from the transmitting.