Patent ID: 7827023

Claim:
An apparatus for emulating hardware comprising: a data array having a plurality of sub-arrays where at least one first sub-array has a first depth that stores a first amount of data and at least one second sub-array has a second depth that stores a second amount of data, where said first amount of data is greater than said second amount of data, and where the first depth equals the number of steps in an emulation cycle; control store array logic configured to provide control words; and a plurality of processors coupled to the data array and the control store array logic, the plurality of processors configured to emulate logic functions of the hardware defined by the control words, the logic functions processing data stored in said data array; wherein the second depth for each of the at least one second sub-array is set based on a probability that data stored in the data array will be requested by a processor in the plurality of processors after a selected number of the steps in the emulation cycle.