Patent ID: 8818005

Claim:
A switch controller for controlling at least one switch, comprising: a capacitor; charge/discharge circuitry configured to generate a switch control signal by charging or discharging the capacitor, the switch control signal having a ramp up or ramp down time period based on a capacitance of the capacitor; analog inverter circuitry configured to generate a complimentary switch control signal based on the switch control signal, the complimentary control signal having a ramp up or ramp down time period based on the switch control signal; switch logic circuitry configured to route the switch control signal and the complimentary switch control signal to control the conduction state of the at least one switch; and enable/disable circuitry configured to conserve power by enabling and disabling the charge/discharge circuitry and the analog inverter circuitry based on the charging or discharging state of the capacitor; the enable/disable circuitry is further configured to, based on a determination of when the ramp up or ramp down time period of at least one of the switch control signal or the complimentary switch control signal exceeds a predetermined time period, couple the switch control signal to a first voltage rail and couple the complimentary switch control signal to a second voltage rail.