Patent ID: 7902864

Claim:
A programmable logic device (“PLD”) including: at least one logic block, the one logic block including: at least one lookup table (“LUT”) based logic element (“LE”) of a first type; and at least one LUT based LE of a second type, wherein the first type of LE has a different hardware design from the second type of LE, wherein the first type of LE and the second type of LE reside at the same time within the PLD, wherein the first type of LE has a first number of inputs and uses less than the first number of inputs and the second type of LE has a second number of inputs and uses all of the second number of inputs, wherein each of the first and second type of LE is configured to perform arithmetic and the first type of LE is configured to perform a lower number of bits of arithmetic than the second type of LE.