Patent ID: 8263498

Claim:
A semiconductor device fabricating method that forms a recess for embedding a wiring material of a semiconductor device, said method comprising: providing a substrate having thereon a SiC film, a SiCOH film, an organic film, a first SiO 2 film, a SiN film, a second SiO 2 film, an antireflection film and a patterned resist film which are stacked in layers, wherein the patterned resist film has an opening having a first opening size, and wherein a total thickness of the antireflection film and the resist film is greater than a total thickness of the first SiO 2 film, the SiN film and the second SiO 2 film; processing the substrate by using a plasma of a first processing gas, thereby depositing a polymer on surfaces of the resist film including interior surfaces of the opening of the resist film, and thereby narrowing the opening of the resist film from the first opening size to a second opening size; performing non-selective etching of the resist film, the antireflection film, the second SiO 2 film, the SiN film and the first SiO 2 film down to the organic film, by using plasma of a second processing gas, and by using the resist film having the opening having the second opening size as an etch mask, thereby forming a part of a via hole; ashing the antireflection film and etching the organic film while using the SiN film as a mask by using a plasma of a third processing gas; etching the SiN film by using a plasma of a fourth processing gas, and by using the second SiO 2 film as an etch mask; etching the first SiO 2 film and the SiCOH film by using a plasma of a fifth processing gas, and by using the SiN film as an etch mask; and etching the SiN film, the SiC film and the organic film, thereby completing formation of the via hole and a trench, wherein the second processing gas is a mixed gas comprising CF 4 gas, CHF 3 gas and O 2 gas.