Patent ID: 8595420

Claim:
A data stream dispatching method for a memory storage apparatus having a rewritable non-volatile memory module and a smart card chip, the data stream dispatching method comprising: configuring a plurality of logical block addresses for the rewritable non-volatile memory module, wherein a plurality of specific logical block addresses among the logical block addresses is used for storing a specific file; receiving a read command from a host system; determining whether a start read address corresponding to the read command is one of the specific logical block addresses; when the start read address corresponding to the read command is one of the specific logical block addresses, determining whether a response data unit from the smart card chip is stored in a buffer memory; when the response data unit is stored in the buffer memory, transmitting the response data unit from the buffer memory to the host system by aligning an access unit, wherein the step of transmitting the response data unit from the buffer memory to the host system by aligning the access unit comprises: determining whether the start read address corresponding to the read command is a multiple of the access unit; when the start read address corresponding to the read command is not a multiple of the access unit, first transmitting a first data stream to the host system and then transmitting the response data unit to the host system; and when the start read address corresponding to the read command is a multiple of the access unit, transmitting the response data unit to the host system.