Patent ID: 7372100

Claim:
A semiconductor device comprising: a semiconductor layer of a first conductivity type; a plurality of first cylindrical semiconductor pillar regions of the first conductivity type periodically provided on a major surface of the semiconductor layer; a plurality of second cylindrical semiconductor pillar regions of a second conductivity type provided on the major surface of the semiconductor layer and being adjacent to the first semiconductor pillar regions; a plurality of first semiconductor regions of the second conductivity type provided in contact with the top of the second semiconductor pillar regions; second semiconductor regions of the first conductivity type selectively provided on the surface of the first semiconductor regions; a first main electrode provided on the first semiconductor region and the second semiconductor region; an insulating film provided on the first semiconductor pillar regions, the first semiconductor regions, and the second semiconductor regions; a control electrode provided on the insulating film; and a second main electrode provided on a side opposite to the major surface of the semiconductor layer, the control electrode having openings periodically provided in first and second directions substantially parallel to the insulating film, each of the first semiconductor regions being provided below the opening of the control electrode, and a period of arrangement of the plurality of second cylindrical semiconductor pillar regions being smaller than the periods of the openings in the first and second directions.