Patent ID: 7635992

Claim:
A method of delaying a signal comprising: selecting one of a plurality of delay elements using a switch circuit to create a delay signal path, wherein the plurality of delay elements comprise; a first group of stacked inverter delay elements each configured to implement a first delay by incorporating a first number of active devices per delay element; a second group of stacked inverter delay elements each configured to implement a second delay larger than the first delay by incorporating a second number of active devices per delay element, the second number larger than the first number; and a third group of stacked inverter delay elements each configured to implement a third delay larger than the second delay by incorporating a third number of active devices per delay element, the third number larger than the second number; coupling an input signal to a first delay element of the delay signal path using the switch circuit; propagating the input signal through the delay signal path; and receiving a resulting output signal from a last delay element of the delay signal path by using the switch circuit to generate a resulting output signal that is a delayed version of the input signal.