Patent ID: 7855863

Claim:
An apparatus comprising: a pin; a first power terminal; a second power terminal; an inverter having an input terminal and an output terminal, wherein the inverter is coupled between the first power terminal and ground; an electrostatic discharge element that is coupled between the first power terminal and ground; a charge pump that is coupled to the second power terminal; a biasing capacitor that is coupled to the second power terminal; a blocking N-channel metal-oxide-semiconductor (NMOS) transistor that is coupled to the output terminal of the inverter at its source and that is coupled to the to the charge pump and the capacitor at its gate, wherein the blocking NMOS transistor includes a body diode that is configured to operate as a blocking diode; and an output transistor that is coupled to the pin at its drain, to ground at its source, and the drain of the blocking NMOS transistor at its gate.