Patent ID: 7742908

Claim:
A method performed by a computer for simulating an electrical circuit, using digital wave structures, the method comprising: representing the electrical circuit by using a binary tree with a non-linear element and linear elements connected to a plurality of adapter blocks, wherein: an adapter block of the plurality of adapter blocks includes an adapted port to which another adapter block is connected; the plurality of adapter blocks are designated as nodes and the linear elements are designated as leaves; the nodes include a root node which represents a root adapter block of the plurality of adapter blocks, and wherein the root node is connected to the non-linear element; analyzing the binary tree by performing a process which includes using known incident wave values associated with the leaves connected to a first node to determine a reflected wave value of an adapted port of the first node; repeating the process for additional nodes, if present, that are connected between the root node and the first node, wherein the process is repeated by using the reflected wave value of the adapted port of the first node and additional known incident wave values associated with any additional leaves connected to the additional nodes to determine reflected wave values of adapted ports of the additional nodes; repeating the process for the root node to determine a reflected wave value of an adapted port of the root node; and determining an incident wave value of the adapted port of the root node.