Patent ID: 8361865

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first trench and a second trench in a semiconductor region of a first conductivity type simultaneously; forming a gate insulating film and a gate electrode in the first trench; forming an annular conductive layer simultaneously with the gate electrode, the annular conductive layer being located at a peripheral portion of the semiconductor region in a plan view; forming a channel region of a second conductivity type in the semiconductor region; forming a source region of the first conductivity type in the channel region; forming a diffusion region of the first conductivity type which has a higher concentration than that of a semiconductor region in a part of the semiconductor region of the first conductivity type located immediately under the second trench by implanting impurity ions of the first conductivity type through the second trench; and forming a drain electrode in a part of the second trench, wherein the drain electrode is electrically connected with the annular conductive layer.