Patent ID: 8169814

Claim:
A Schmitt trigger-based fin field effect transistor static random access memory cell comprising a first control FinFET (Fin Field Effect Transistor) having a first gate and a second gate; a second control FinFET having a third gate and a fourth gate; a first bit line connected with a drain of said first control FinFET and supplying a first voltage signal; a second bit line connected with a drain of said second control FinFET and supplying a second voltage signal; a first read/write control line connected with said first gate and said third gate and controlling conduction states of said first control FinFET and said second control FinFET; a second read/write control line connected with said second gate and said fourth gate and controlling conduction states of said first control FinFET and said second control FinFET; and a memory cell connected with sources of said first control FinFET and said second control FinFET and performing a data-read activity, a data-write activity or a data-keep activity according to said conduction states of said first control FinFET and said second control FinFET, said first voltage signal and said second voltage signal, wherein said memory cell further comprises a first inverter and a second inverter cross coupled to said first inverter, and wherein said first inverter includes a first FinFET, a second FinFET and a third FinFET, and wherein said second inverter includes a fourth FinFET, a fifth FinFET and a sixth FinFET, and wherein said first inverter has a first storage node connected with gates of said fourth FinFET, said fifth FinFET and said sixth FinFET and said source of said first control FinFET, and wherein said second inverter has a second storage node connected with gates of said first FinFET, said second FinFET and said third FinFET and said source of said second control FinFET, and wherein said third FinFET and said sixth FinFET are grounded, and wherein said first FinFET and said fourth FinFET are connected with a power source.