Patent ID: 7268403

Claim:
A power semiconductor device having an improved ruggedness, comprising: a power semiconductor possessing a drain area of conductivity type 1 ; a primary epitaxial area of conductivity type 1 , arranged on top of the drain area; multiple primary and secondary body areas of conductivity type 2 , arranged on top of the primary epitaxial area in a stripe configuration; a secondary epitaxial area of conduction type 1 , formed between primary body areas; an edge area of conduction type 2 , formed below the secondary epitaxial area to surround the second body areas and connected to the two ends of the second body areas; multiple source areas of conduction type 1 , formed within a specific area within the primary body areas, wherein a plurality of source electrodes are formed to electrically connect with the source areas and the ends of the source electrodes are arranged closer to the edge area than the ends of the source areas; and gate dielectrics formed on the source areas, primary body areas, and secondary epitaxial areas; wherein the edge area is formed with multiple sub-areas.