Patent ID: 8745440

Claim:
A computer-implemented system for providing software fault tolerance, comprising: a computer comprising a processor and memory within which code for execution by the processor is stored, comprising: an execution environment configured to execute a multithreaded program, wherein the program execution comprising a primary multithreaded process and a secondary multithreaded process; a set of inputs provided to the primary multithreaded process and copied to the secondary multithreaded process; an exploration module configured to divide the executions of the primary multithreaded process and the secondary multithreaded process into a deterministic subset of the execution that ends at a checkpoint; and a retirement module configured to, upon occurrence of a fault in one of the executions on one of the multithreaded processes prior to reaching the subset checkpoint, retire an execution path through the deterministic subset for the faulty execution, continue execution of the deterministic subset on the other multithreaded process, and choose a different path to elide the fault.