Patent ID: 7393731

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: (a) preparing an SOI substrate having a semiconductor layer which is formed with a substrate in which at least its surface is insulative disposed therebelow, said semiconductor layer having a first active region and a second active region both of a first conductivity type in a main surface thereof; (b) forming an isolation insulating film so as to surround said first and second active regions and leave a first semiconductor region which is part of said semiconductor layer therebelow; (c) forming a first interlayer insulting film on said semiconductor layer in said first and second active regions and a surface of said isolation insulating film; (d) forming a silicon nitride film on said first interlayer insulating film; and (e) forming a second interlayer insulating film on a surface of said silicon nitride film, wherein said substrate includes a semiconductor substrate and a buried oxide film, and said method further comprising the steps of: (f) forming a first impurity region of the first conductivity type on a main surface of said semiconductor layer in said second active region; (g) forming a first gate electrode on said main surface of said semiconductor layer in said first active region with a first gate insulating film interposed therebetween; (h) forming first source region and drain region of a second conductivity type in said main surfaces of said semiconductor layer of said first active region which sandwich a region opposed to said first gate electrode at a predetermined distance; (i) forming contact holes which reach said first source region and drain region and said first impurity region in said first and second interlayer insulating films and said silicon nitride film, respectively; and (j) forming a first wire, a second wire, a third wire which are connected to said first source region and drain region and said first impurity region through said contact holes, respectively.