Patent ID: 8687756

Claim:
Apparatus for controlling an oscillation frequency and phase in a receiver during a lock to reference (L2R) mode comprising: a voltage-controlled oscillator (VCO) configured to generate an output signal at the oscillation frequency and phase based on a proportional control word and an integral control word; a frequency divider configured to divide the output signal oscillation frequency of the VCO to substantially equivalent to a reference clock rate; a phase and frequency detector (PFD) configured to generate an L2R mode oscillation phase error from a comparison of the divided output signal oscillation frequency of the VCO and the reference clock; a proportional loop control configured to generate the proportional control word from the L2R mode oscillation phase error; an integral loop control having an integrator configured to integrate the L2R mode oscillation phase error to provide the integral control word to the VCO; at least one data slicer configured to sample input serial data with a sampling clock derived from the output signal of the VCO at the oscillation frequency and phase to provide a sampled data stream; a steady-state phase detector configured to generate a lock to data (L2D) mode oscillation phase error from the sampled data stream; and a multiplexer configured to provide, based on an L2R mode enable signal, either the L2R mode oscillation phase error or the L2D mode oscillation phase error to the proportional loop control and the integral loop control.