Patent ID: 8522188

Claim:
A method of designing a system-on-chip including a tapless standard cell to which body biasing is applied, the method comprising: adjusting a slow corner timing parameter to increase a slow corner of an operating speed distribution for the system-on-chip by forward body biasing, the slow corner timing parameter corresponding to a lowest value of an operating speed design window of the system-on-chip; wherein the slow corner timing parameter includes at least one of a slow corner cell delay, a slow corner setup margin and a slow corner hold margin of the tapless standard cell; adjusting a fast corner timing parameter to decrease a fast corner of the operating speed distribution for the system-on-chip by reflecting reverse body biasing, the fast corner timing parameter corresponding to a highest value of the operating speed design window of the system-on-chip; wherein the fast corner timing parameter includes at least one of a fast corner cell delay, a fast corner setup margin and a fast corner hold margin of the tapless standard cell; and implementing, by using a processor, the system-on-chip including the tapless standard cell based on the adjusted slow corner timing parameter corresponding to the increased slow corner and the adjusted fast corner timing parameter corresponding to the decreased fast corner.