Patent ID: 7191305

Claim:
A method of translating initial column storage locations defined in a first memory array structure to corresponding storage locations in a second memory array structure, the first memory array structure having X columns associated therewith and capable of storing an M-bit data word at each memory address therein, the second memory array structure having Y columns associated therewith and capable of storing an N-bit data word at each memory address therein, wherein XM=YN, X>Y, and M<N, the method comprising: dividing the N-bit date word in each column associated with the second memory array structure into N/M word slices, each of said word slices serving as an M-bit storage location, said dividing comprising receiving a set of initial column address bits corresponding to said first memory array having X columns, and translating said set of initial column address bits to a set of translated column bits corresponding to said second memory array having Y columns; and assigning each initial column storage location to one or said word slices.