Patent ID: 8103923

Claim:
A semiconductor device capable of being coupled to a first debugger and a second debugger, the first and second debuggers being capable of debugging a program in the semiconductor device, the semiconductor device comprising: a first chip; and a second chip that is coupled to the first chip, wherein the first chip comprises: a first processing unit that executes a first instruction group; and a first debug control unit capable of being coupled to the first debugger to control a communication with the first debugger, wherein the second chip comprises: a memory that stores a first data and the program including the first instruction group and a second instruction group, the first data being generated based on a second data inputted from the second debugger; a second processing unit that executes the second instruction group; a second debug control unit capable of being coupled to the second debugger to control a communication with the second debugger; and wherein the first debug control unit controls permission or prohibition of a connection configuration to the first debugger based on the second data and a third data inputted from the first debugger.