Patent ID: 7630239

Claim:
The semiconductor device comprising: a plurality of memory cells which store data based on threshold voltages thereof; a plurality of bit lines on which read signals based on the stored data of the memory cells appear, respectively; a plurality of sense amplifiers which are respectively disposed corresponding to the bit lines, and which respectively detect the read signals having appeared on the bit lines and output first and second signals respectively having logical levels different from one another from first and second nodes bases on the detected read signals; and a determination unit which determines, based on the first and second signals respectively accepted from the first and second nodes of the sense amplifiers, whether the threshold voltages of the memory cells are normal, wherein the determination unit includes: a plurality of first transistors which are respectively disposed corresponding to the, sense amplifiers and which respectively change the states to on or off, based on the first signals received from the first nodes of the sense amplifiers; a plurality of second transistors which are respectively disposed corresponding to the sense amplifiers and which respectively change the state to on or off, based on the second signals received from the second nodes of the sense amplifiers; and a current determination circuit which detects output currents of the first transistors and output currents of the second transistors, and outputs signals indicative of whether the threshold values of the memory cells are normal, based on said results of detection.