Patent ID: 8519762

Claim:
An adjusting circuit of duty cycle comprising an edge detecting circuit, a flip-flop connected to said edge detecting circuit, a feedback control circuit connected to said flip-flop and a charge pump circuit connected to said feedback control circuit, wherein said edge detecting circuit is for detecting an edge of an inputted clock signal; said flip-flop sets an outputting terminal of said flip-flop at a first level according to a clock signal outputted by said edge detecting circuit; said charge pump circuit is for controlling a duration of said first level outputted by said outputting terminal of said flip-flop by charging and discharging a capacitor; said flip-flop sets said outputting terminal of said flip-flop at a second level contrary to said first level according to a clock signal outputted by said feedback control circuit; wherein said flip-flop is a RS flip-flop; said edge of said inputted clock signal is a leading edge; said first level is a high level and said second level is a low level; said adjusting circuit of duty cycle further comprises a clock signal inputting terminal connected to said edge detecting circuit, a first outputting terminal connected to said RS flip-flop and a second outputting terminal; said inputted clock signal is inputted by said clock signal inputting terminal; said first outputting terminal is connected to said feedback control circuit; said second outputting terminal is connected to said charge pump circuit.