Patent ID: 7235838

Claim:
A semiconductor device comprising: a first semiconductor silicon wafer as a substrate; a first electrically insulating layer overlying the substrate; a first capacitor structure comprising a first electrode with trenches formed through a thickness thereof, overlying the first electrically insulating layer; a second electrically insulating layer overlying the first capacitor structure; a second semiconductor silicon wafer, which has undergone a thinning process, as a monocrystalline silicon layer bonded to the second electrically insulating layer; a word line comprising a gate electrode overlying the monocrystalline silicon layer; and a second capacitor structure neighboring the word line, overlying the monocrystalline silicon layer; wherein the second capacitor structure is entirely above the monocrystalline silicon layer and is in electrical communication to the first capacitor structure underlying the monocrystalline silicon layer by a single contact plug passing through the monocrystalline silicon layer.