Patent ID: 8724770

Claim:
A bidirectional shift register comprising a plurality of stages for outputting scan pulses forward or reversely based on a start pulse and a plurality of clock pulses with a phase difference, wherein a last one of the stages outputs a corresponding one of the scan pulses last of all in a forward mode where the bidirectional shift register outputs the scan pulses forward, the last stage comprising: a forward scan controller for making a set node of the last stage active and a reset node of the last stage inactive based on any one of the clock pulses and a scan pulse from an upstream stage; a reverse scan controller for making the set node active and the reset node inactive based on any one of the clock pulses and the start pulse; an output unit for outputting any one of the corresponding scan pulse and a deactivation voltage based on a voltage at the set node, a voltage at the reset node, and any one of the clock pulses supplied thereto; and a deactivation prevention switching device controlled by a clock pulse having a phase different from that of the clock pulse supplied to the output unit, the deactivation prevention switching device preventing the reset node from being deactivated at a time that the clock pulse supplied to the output unit is applied to the output unit.