Patent ID: 8349710

Claim:
A method of forming at least one conductive shielding layer for an integrated circuit, the integrated circuit to be formed from a first region of a wafer, the wafer comprising a second region from which a second integrated circuit is to be formed and a boundary region between the first region and the second region, the method comprising: forming the at least one conductive shielding layer on at least three sides of the first region while the first region is a part of the wafer, the forming comprising: forming a second conductive layer on a first surface of the wafer, the second conductive layer extending between the first region and the second region across the boundary region, the second conductive layer forming a portion of the at least one conductive shielding layer on a first side of the first region; forming a trench in the boundary region, the trench extending from a second surface of the wafer opposite the first surface of the wafer and through the wafer, wherein the second conductive layer extends between the first region and the second region across the boundary region following formation of the trench; and forming a third conductive layer on the second surface of the wafer, the third conductive layer forming a portion of the at least one conductive shielding layer on at least a second side and a third side of the first region.