Patent ID: 8535544

Claim:
The method of fabricating a material having nanopores comprising: providing a semiconductor on insulator substrate (SOI), having a single crystal semiconductor layer located on a dielectric layer, said dielectric layer is present on a base semiconductor substrate; patterning the single crystal semiconductor layer with a projection system to provide an array of exposed portions of the single crystal semiconductor layer having a first width that is equal to or greater than the minimum lithographic dimension, wherein the minimum lithographic dimension that the projection system can provide is equal to: CD= 0.4·(λ/ NA ) CD is the minimum lithographic dimension λ is the wavelength of light NA is the numerical aperture of the lens of a photolithography device; etching the array of exposed portion of the single crystal semiconductor layer to form an array of trapezoid shaped pores having a base with a second width that is less than the minimum lithographic dimension, wherein the etching comprises an etch chemistry that etches a first crystal plane of the single crystal semiconductor layer selective to a second crystal plane of the single crystal semiconductor layer, in which the etching terminates on the dielectric layer; and etching the dielectric layer to provide a fluidic channel between at least two pores of the array of trapezoid shaped pores.