Patent ID: 8432226

Claim:
An amplifier circuit, comprising: an input stage having a first input transistor and a second input transistor; a current mirror stage having an input node, a first current mirror transistor, and a second current mirror transistor, the first and second current mirror transistors coupled to the input node, the second current mirror transistor coupled to the second input transistor, and the input node coupled to the first input transistor; an output stage having an output transistor coupled to an output connection and to the second current mirror transistor; and a capacitive element coupled to the output connection and to the input node, wherein a current through the capacitive element is inverted relative to a current fed to the output transistor by the current mirror stage such that a Miller capacitance of the capacitive element counteracts a Miller capacitance of the output transistor, and wherein the capacitive element is configured such that the Miller capacitance of the capacitive element varies with the Miller capacitance of the output transistor thereby continuously cancelling the Miller capacitance of the output transistor across a range of voltages of the output transistor.