Patent ID: 8921982

Claim:
A semiconductor device comprising: a plurality of interlayer insulating films; a seal ring formed within said interlayer insulating films in the vicinity of an edge of a semiconductor chip so as to surround a circuit formation region of said semiconductor chip; and a plurality of conductive members formed within said interlayer insulating film between a dicing cut surface of said semiconductor chip and said seal ring, wherein said conductive members are arranged along a plurality of columns in the plan view in such a manner that said conductive members form a zigzag arrangement where said conductive members that are arranged in adjacent columns are arranged alternately, said conductive members include a plurality of dummy vias, said interlayer insulting films include a first interlayer insulating film and a second interlayer insulating film formed on said first interlayer insulating film, said conductive members include: a first dummy metal formed within said first interlayer insulating film; and a second dummy metal formed within said second interlayer insulating film, and said dummy vias are formed within said second interlayer insulating film and connect said first dummy metal and said second dummy metal.