Patent ID: 8390553

Claim:
A device comprising: a processor; a memory device operably coupled to the processor and configured to store video data; and a liquid crystal display configured to display the video data by one video frame at a time, the liquid crystal display having a pixel array including rows and columns of pixels, each pixel including: a pixel electrode; a portion of either one of a first plurality of common electrodes or one of a second plurality of common electrodes configured to generate an electric field in conjunction with the pixel electrode, wherein the electric field is configured to modulate light passing through the pixel; and a transistor having a gate connected to one of a plurality of gate lines of the pixel array and a source connected to one of a plurality of source lines of the pixel array, wherein the transistor is configured to provide a data signal from the source line to the pixel electrode when a scanning signal is received on the gate line; wherein the pixels of each row of the pixel array are configured to cause an approximately even amount of common voltage loading to be shared between one of the first plurality of common electrodes and one of the second plurality of common electrodes when the pixels of each row of the pixel array receive a scanning signal and a data signal; and wherein, for even-numbered video frames, the first plurality of common electrodes is configured to receive a first common voltage and the second plurality of common electrodes is configured to receive a second common voltage and wherein, for odd-numbered video frames, the first plurality of common electrodes is configured to receive the second common voltage and the second plurality of common electrodes is configured to receive the first common voltage.