Patent ID: 7266739

Claim:
A circuit for providing strobe markers for a plurality of pin electronics channels, the circuit comprising: a channel circuit having: a plurality of edge strobe type decoders (ESTDs), each ESTD for receiving an above comparator high (ACH) signal, a below comparator low (BCL) signal, a delay line element (DLE) signal, and type data, wherein each ESTD is operative to strobe said ACH and BCL signals at a time indicated by said DLE signal and further operative to determine whether said ACH and said BCH are consistent with said type data; a plurality of window strobe type decoders (WSTDs), each WSTD for receiving a DLE signal, and a type data, wherein said WSTD decodes an event type based on said type data and outputs said decoded event type; a window strobe fail generator (WSFG) for receiving an said ACH signal, said BCL signal, said decoded event type signals, wherein said WSFG is operative to determine whether said ACH and said BCL signals are consistent with said type data; and a plurality of outpipes, each outpipe receiving said strobed ACH, said strobed BCL, and said decoded event type and outputting a signal, such that said circuit is operable to provide strobe markers for a plurality of pin electronics channels and is further operable to provide window and edge strobe functionality.