Patent ID: 8836294

Claim:
A switching regulator, comprising: a power stage including an up-gate power transistor, a low-gate power transistor and an inductor, coupled with one another at a switching node; a pulse width modulation (PWM) signal generator for generating a PWM signal; a current sense circuit receiving a sense signal relating to a current flowing through the up-gate power transistor (up-gate current) or relating to a current flowing through the inductor (inductor current), and comparing the sense signal with a threshold to generate a low-gate OFF signal; and a driver circuit determining whether to control the low-gate power transistor according to the PWM signal or turning OFF the low-gate power transistor in the present cycle until a next cycle, according to the low-gate OFF signal, wherein when the low-gate power transistor is turned OFF until a next cycle according to the low-gate OFF signal, the up-gate power transistor is controlled according to the PWM signal in the present cycle.