Patent ID: 7952183

Claim:
A semiconductor device, comprising: a wiring board having a first surface provided with external connection terminals and a second surface provided with an element mounting section and connection pads; a first element group provided with a plurality of first semiconductor elements having first electrode pads arranged along one outline side, the first semiconductor elements being stacked in a step shape on the element mounting section of the wiring board with the outline sides directed to the same direction and the first electrode pads exposed; a second element group provided with a plurality of second semiconductor elements having second electrode pads arranged along one outline side, the second semiconductor elements being stacked in a step shape on the first element group in a direction opposite to the stepped direction of the first element group with the outline sides directed to the same direction and the electrode pads exposed; metal wires electrically connecting the first and second electrode pads of the first and second semiconductor elements and the connection pads of the wiring board; and a sealing resin layer formed on the second surface of the wiring board to seal the first and second element group together with the metal wires, wherein the second element group satisfies conditions T 1 =1.1TA to 1.5TA, T 2 =2.5TA to 3.5TA, where a thickness of the uppermost second semiconductor element in the second element group is T 1 , a thickness of the lowermost second semiconductor element in the second element group is T 2 , and a thickness of the other second semiconductor elements in the second element group is TA.