Patent ID: 8334204

Claim:
A manufacturing method for a semiconductor device, comprising the steps of: forming an interlayer over a substrate; making an opening in the interlayer; forming a conductive material layer in the opening and on the interlayer; removing a portion of the conductive material layer by a chemical mechanical polishing method until an upper surface of the interlayer is exposed; and forming a cap film on a surface of the conductive layer after the portion of the conductive material layer is removed; wherein the step of forming the cap film includes a reduction treatment to the surface of the conductive layer and a film forming treatment, which are simultaneously performed, and no additional reduction treatment step is performed to the surface of the conductive layer before the cap film is formed; wherein the interlayer includes a first insulating film, a low-permittivity film and a second insulating film, the low-permittivity film comprising a fluorocarbon film or a porous oxide silicon film, the second insulating film comprising a silicon carbonitride.