Patent ID: 6927719

Claim:
A digital-to-analog converter for converting an N bit digital signal to analog form coupled to receive a current reference signal and a cascode voltage, comprising: an input stage coupled to receive the current reference signal and the cascode voltage to provide a mirrored current; a first controllable current source coupled to receive the mirrored current to provide a current source output controllable in current increments responsive to the M least significant bits for converting of the digital signal to analog form, where M is less than N; a second controllable current source coupled to receive the mirrored current to provide a current source output controllable in current increments responsive to the N−M most significant bits for converting of the digital signal to analog form; a current matching circuit coupled between the output of the first controllable current source and the input of the second controllable current source to match the current of the first controllable current source and the second controllable current source; and an output switching network, having a plurality of switches, the output switching network coupled to the first controllable current source and the second controllable current source.