Patent ID: 8736079

Claim:
A pad structure, suitable for a circuit carrier or an integrated circuit chip, the pad structure comprising: a first inner pad; a second inner pad; a first conductive via connecting the first inner pad; a first outer pad connecting the first conductive via and suitable to connect a conductive ball or a conductive bump, wherein the outer diameter of the first outer pad is greater than the outer diameter of the first inner pad; a second conductive via connecting the second inner pad; and a second outer pad connecting the second conductive via, wherein the outer diameter of the second outer pad is greater than the outer diameter of the second inner pad, the distance between the figure center of the first inner pad and the figure center of the second inner pad is P, the largest distance from the figure center of the first inner pad to any point of the profile thereof is R 1 , the largest distance from the figure center of the second inner pad to any point of the profile thereof is R 2 , the shortest distance between the profile of the first inner pad and the profile of the second inner pad is A, and the difference between P and the summation of R 1 and R 2 is less than A, i.e., [P−(R 1 +R 2 )]<A.