Patent ID: 8495257

Claim:
A system comprising: at least a first node and a second node coupled to a network, wherein the second node comprises a local memory and a direct memory access (DMA) controller coupled to the local memory; wherein the first node is configured to transmit at least a first packet to the second node to access data in the local memory, and wherein a first local memory address identifying a location in the local memory to be accessed in response to the first packet is included in a network header of the first packet, and wherein the network header corresponds to a network layer of packet processing, and wherein the first packet further includes a data link layer header corresponding to a data link layer of packet processing, and wherein the data link layer header abuts the network header in the first packet; and responsive to the first packet, the second node is configured to extract the first local memory address directly from a field in the network header of the first packet and the DMA controller is configured to perform one more transfers with the local memory using the first local memory address to access the data at the first local memory address in the local memory.