Patent ID: 7820520

Claim:
A method comprising: providing an integrated circuit having a plurality of terminals for making electrical connection to the integrated circuit; providing at least one device adjacent an outer edge of the integrated circuit, the at least one device comprising at least one metal conductor for forming an edge seal for protecting the integrated circuit during die singulation; coupling the at least one device to one or more functional circuits within the integrated circuit by routing the at least one metal conductor to the one or more functional circuits, the at least one device providing a reactance value to the one or more functional circuits for non-test operational use; and forming a plurality of capacitors as the at least one device, wherein the plurality of capacitors comprise a common first electrode, the common first electrode comprising a continuous outer metal conductor around the outer edge of the integrated circuit, and a plurality of second electrodes of the plurality of capacitors, the plurality of second electrodes comprising an electrically discontinuous inner metal conductor located between the plurality of terminals and the first electrode.