Patent ID: 7224340

Claim:
A method of processing signals of a timing controller of a liquid crystal display module to achieve real time driving, comprising the steps of: (a) receiving a vertical synchronizing signal; (b) receiving a data enable signal DE which has a vertical blank period; (c) generating a gate clock signal CPV which has a plurality of gate clock cycles C 1 –Cn; (d) after a rising edge or a falling edge of the vertical synchronizing signal, generating a plurality of gate-on enable signals OE simultaneously according to the plurality of gate clock cycles C 1 –Cn of the gate clock signal CPV; (e) after a rising edge or a falling edge of the vertical synchronizing signal, generating start vertical signals STV before the end of the vertical blank period VB and after at least a gate clock cycle C 1 during the vertical blank period VB wherein the start vertical signals STV includes a first start vertical signal STV 1 to determine a start scan location of a frame and a second start vertical signal STV 2 to offset flicker and display brightness of the liquid display; and (f) after generating the start vertical signals STV, pausing output of CPV, STV 1 and OE until the end of the vertical blank period VB, so as to process control signals in real time so that real time driving is achieved.