Patent ID: 7521774

Claim:
A semiconductor system having a p-n junction, comprising: a substrate having an edge region, which is made up of a first layer of a first conductivity type and a second layer of an opposite conductivity type, the second layer being made up of at least two sublayers, wherein: the first sublayer has a first dopant concentration, the second sublayer has a second dopant concentration that is lower than the first dopant concentration, both sublayers together with the first layer form a p-n junction, the p-n junction of the first layer with the first sublayer being formed exclusively in an interior of the chip and the p-n junction between the first layer and the second sublayer being formed in the edge region of the chip, the second layer includes a third sublayer having a third dopant concentration that is higher than the first dopant concentration and significantly higher than the second dopant concentration, the third sublayer over a largest part of its cross-sectional area in the interior of the semiconductor system borders immediately on the first sublayer, while bordering on the second sublayer only in a comparatively narrow edge region of the cross-sectional area, wherein the first sublayer has a portion with a thickness greater than the second sublayer.