Patent ID: 7015559

Claim:
A computer system, comprising: a data input device; a data output device; a processor coupled to the data input and output devices; and a memory device including a chip package having a plurality of conductors coupled to the processor, the memory device including, a chip including memory circuitry, the memory circuitry including, an address decoder coupled to an address bus; a read/write circuit coupled to a data bus; a control circuit coupled to a control bus; a memory-cell array coupled to the address decoder, control circuit, and read/write circuit, the memory-cell array; and a first converter coupled to the address, data, and control busses, the first converter being operable to receive data signals on the data bus and operable to convert the data signals into corresponding data output electromagnetic waves, and the first converter being operable to receive address, data, and control electromagnetic waves and convert these electromagnetic waves into corresponding electric address, data, and control signals that are applied on the address, data, and control busses, respectively; and said chip package attached to the chip, the chip package including a second converter that is operable to receive the data output electromagnetic waves from the first converter and operable to convert these received electromagnetic waves into corresponding electric data output signals that are applied to corresponding conductors of the chip package, and the second converter being operable to receive electric address, data, and control signals on corresponding conductors and operable to convert these electric signals into corresponding address, data, and control electromagnetic waves that are communicated to the first converter of the chip.