Patent ID: 7900036

Claim:
A data processing system comprising: a processor; a memory, coupled to said at least one processor, for storing a first read-only memory (ROM) image that stores a first basic input output system (BIOS) program for booting said data processing system and a second ROM image that is a replica of said first ROM image that stores a second BIOS program identical to said first BIOS program; and a computer-usable medium embodying instructions executable by said at least one processor and configured for: initially selecting said first ROM image to boot said data processing system by utilizing said first BIOS program stored in said first ROM image; comparing contents of said first ROM image and said second ROM image outputted from said memory; in response to a determination that contents of said first ROM image are different contents from said second ROM image, detecting an error data pattern in said first ROM image and said second ROM image outputted from said memory; and in response to a detection of an error data pattern, selecting said second ROM image and booting said data processing system utilizing said second BIOS program stored by said second ROM image.