Patent ID: 7975096

Claim:
A non-volatile memory storage system, comprising: a transmission interface, adapted for coupling to a host; a memory module, comprising a first non-volatile memory chip and a second non-volatile memory chip, wherein the first non-volatile memory chip and the second non-volatile memory chip are simultaneously enabled by receiving a chip enable signal via a chip enable pin; and a controller, electrically connected to the transmission interface and the memory module, wherein when the controller performs a multi-channel access, the controller provides an access instruction to the first non-volatile memory chip and the second non-volatile memory chip after the first non-volatile memory chip and the second non-volatile memory chip are enabled with the chip enable signal, and when the controller performs a single channel access, the controller provides the access instruction to one of the first non-volatile memory chip and the second non-volatile memory chip and provides a non-access instruction to the other one of the first non-volatile memory chip and the second non-volatile memory chip after the first non-volatile memory chip and the second non-volatile memory chip are enabled with the chip enable signal, wherein the non-access instruction does not change data stored in the first non-volatile memory chip and the second non-volatile memory chip.