Patent ID: 6881639

Claim:
A method of manufacturing semiconductor devices, comprising the steps of: forming an n-type emitter layer, a p-type base layer and an n-type collector layer in sequence on a semiconductor substrate from a surface of the substrate; depositing a refractory metal over the entire surface of the substrate; treating the refractory metal into a predetermined shape; exposing the p-type base layer by using the refractory metal as a mask; and implanting helium ions into the base layer and the emitter layer from a direction vertical to the surface of the semiconductor substrate or within an angle of 3 degrees off the vertical, wherein in implanting helium ions into the base and emitter layers, external base regions of the base layer remain conductive and resistivity thereof does not change, and external emitter regions of the emitter layer have increased resistivity, the external base regions and the external emitter regions being constituted by portions of the base layer and of the emitter layer not positioned beneath the refractory metal having the predetermined shape.