Patent ID: 7441178

Claim:
A decoder for a low density parity check code having a processor providing a method comprising: a) defining a set of variable nodes indexed by an integer n and a set of check nodes indexed by an integer m, wherein each variable node n is associated with a set of check nodes M(n) and each check node m is associated with a set of variable nodes N(m); b) predetermining a neutral check message magnitude CK n , a weak check message magnitude CK w , a medium check message magnitude CK m and a strong check message magnitude CK s ; c) initializing all of the variable nodes to have values W n equal to initial values L n (0) computed from received symbols; d) quantizing each variable node value W n with respect to a decision threshold X and weight thresholds T 1 and T 2 to provide a quantized value Q n and a weight R n , wherein Q n is selected from predetermined values Q 0 and Q 1 , wherein Q n =Q 0 if W n <X and Q n =Q 1 if W n ≧X, and wherein R n is weak if |W n −X|≦T 1 , R n is medium if T 1 <|W n −X|≦T 2 , and R n is strong if T 2 <|W n −X|; e) providing a variable message Z n from each variable node n to each of the corresponding set of check nodes M(n), wherein the variable message Z n includes the quantized value Q n and the weight R n ; f) calculating a check node output message L mn from each check node m to each of the corresponding set of variable nodes N(m), wherein L mn is determined by a parity check function f mn [{Z n : n∈N(m)}] of the variable messages provided to check node m and wherein L mn depends partly on the predetermined check message magnitudes CK n , CK w , CK m and CK s ; g) updating the variable node values W n based on the check node output messages L mn ; h) repeating steps (d) through (g) above in sequence until a termination condition is satisfied; i) providing said updated variable node values W n as an output estimate of transmitted symbols corresponding to said received symbols.