Patent ID: 7728749

Claim:
An apparatus comprising: a digital-to-analog converter having a digital input and an analog output, wherein the analog output supplies a reference signal based on the digital input; a counter having a digital control word input, a clock input, a clock enable output and a count output connected to the digital input of the digital-to-analog converter, the counter being adapted to assert the clock enable output when the digital control word input requests an output state that is different from an actual state at the count output of the counter, wherein the counter including an XOR gate having a first input connected to the counter clock input, a second input connected to the counter clock enable output, and an output connected to an internal clock input in the counter so that the counter changes state when the clock produces clock pulses or when the counter clock enable output is asserted; and a clock having an enable input connected to the clock enable output of the counter and a clock output connected to the clock input of the counter, the clock being adapted to produce clock pulses on the clock output while the enable input is asserted.