Patent ID: 7688140

Claim:
A differential amplifier circuit comprising: an input stage comprising: a first differential pair of a first conductivity type including an input pair connected to respective first and second input terminals and an output pair connected to a load-element pair providing a load to the first differential pair; and a second differential pair of a second conductivity type including an input pair connected to the respective first and second input terminals and an output pair connected to a load-element pair providing a load to the second differential pair; an output stage comprising: a first output transistor connected between a first power supply and an output terminal and including a control terminal receiving a first output of the first differential pair, the first output transistor providing an output signal to the output terminal according to the received first output of the first differential pair; and a second output transistor connected between a second power supply and the output terminal and including a control terminal receiving a first output of the second differential pair, the second output transistor providing an output signal to the output terminal according to the received first output of the second differential pair; a first current combining circuit generating a current based upon a current that flows through a second output of the first differential pair; and a second current combining circuit generating a current based upon a current that flows through a second output of the second differential pair, wherein a first current having a value resulting from adding a current of the first output of the second differential pair and a current generated by the first current combining circuit flows in the load element connected to the first output of the second differential pair, wherein a second current having a value resulting from adding a current of the first output of the first differential pair and a current generated by the second current combining circuit flows in the load element connected to the first output of the first differential pair, and wherein the values of the first and second currents does not reach a value of approximately zero.