Patent ID: 7727896

Claim:
A method for forming a stacked-die structure comprising: forming a plurality of device layers on a face side of a semiconductor wafer that includes a buried oxide layer having a first thickness, the plurality of device layers defining a plurality of dice, each die including at least one interconnect region; forming a plurality of metal layers over the plurality of device layers, the plurality of metal layers electrically coupled to the plurality of device layers; etching openings in the interconnect regions that extend through the semiconductor wafer so as to expose portions of the buried oxide layer; depositing conductive material within the openings so as to form through-die vias; removing material from a backside of the semiconductor wafer so as to form an oxide layer having a second thickness that is less than the first thickness; etching openings within the backside of the semiconductor wafer so as to expose the through-die vias; and coupling a stacked die to the through-die vias.