Patent ID: 8218713

Claim:
A bi-directional shift register including a plurality of shift register units coupled in series, wherein: an (n−1)th stage shift register unit among the plurality of shift register units is configured to provide an (n−1) th stage output voltage according to a first clock signal and an (n−1) th stage input voltage; an n th stage shift register unit among the plurality of shift register units is configured to provide an n th stage output voltage according to a second clock signal and an n th stage input voltage; an (n+1) th stage shift register unit among the plurality of shift register units is configured to provide an (n+1) th stage output voltage according to a third clock signal and an (n+1) th stage input voltage; and the n th stage shift register unit includes: an output end for outputting the n th stage output voltage; an n th node; a pull-up circuit configured to provide the n th stage output voltage according to the second clock signal and a voltage level of the n th node; an input circuit configured to receive the (n−1) th stage output voltage and the (n+1) th stage output voltage, supply the (n−1) th stage output voltage as the n th stage input voltage when the bi-directional shift register scans in a first direction, supply the (n+1) th stage output voltage as the n th input voltage when the bi-directional shift register scans in a second direction opposite to the first direction, and conduct the pull-up circuit according to the (n−1) th stage output voltage and the (n+1) th stage output voltage, the input circuit comprising: a first switch including: a first end for receiving the (n−1) th stage output voltage; a second end coupled to the n th node; and a control end; and a second switch including: a first end for receiving the (n+1) th stage output voltage; a second end coupled to the n th node; and a control end; a third switch including: a first end for receiving a first control signal; a second end coupled to the control end of the first switch; and a control end coupled to an (n−1) th node of the (n−1) th stage shift register unit; and a fourth switch including: a first end for receiving a second control signal; a second end coupled to the control end of the second switch; and a control end coupled to an (n+1) th node of the (n+1) th stage shift register unit; and a pull-down circuit configured to turn off the pull-up circuit according to a first voltage received from an x th stage shift register unit among the plurality of shift register units when the bi-directional shift register scans in the first direction, and configured to turn off the pull-up circuit according to a second voltage received from a y th stage shift register unit among the plurality of shift register units when the bi-directional shift register scans in the second direction, wherein n is a positive integer larger than 1, x is an integer larger than n, and y is a positive integer smaller than n.