Patent ID: 7194663

Claim:
A bus isolator for coupling a bus of a first predetermined configuration and signaling protocol (collectively the “first properties”) to a peripheral via an I/O of a second predetermined configuration and signaling protocol (collectively the “second properties”), comprising: a target interface coupled to the bus according to the first properties and configured to be responsive to a bus controller for transmission of data on the bus; a master interface coupled to the I/O according to the second properties; a controller coupled to and receiving signals from the target and master interfaces; a memory coupled to the controller for storing signals received from the bus and the I/O; and a processing element coupled to the controller and the memory and configured to manage the activity of the isolator and to verify the integrity of data contained in the signals received from the master interface, wherein data is transmitted from the target interface to the bus only in response to a data request from the bus controller.