Patent ID: 8587124

Claim:
A semiconductor device comprising: a semiconductor substrate; a low dielectric film wiring line laminated structure portion which is provided on one surface of the semiconductor substrate except a peripheral portion thereof, and which comprises a laminated structure including a plurality of low dielectric films and a plurality of wiring lines, each of the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher; an insulating film formed at least on one side of the low dielectric film wiring line laminated structure portion; a connection pad portion for an electrode, arranged on the insulating film so as to be connected to a connection pad portion of an uppermost wiring line of the low dielectric film wiring line laminated structure portion; a bump electrode for external connection, provided on the connection pad portion for the electrode, a sealing film made of an organic resin and provided at least on a part of the insulating film, the sealing film surrounding the bump electrode for the external connection; and a passivation film made of an inorganic material arranged between the insulating film and the low dielectric film wiring line laminated structure portion; wherein corresponding side surfaces of the passivation film and the low dielectric film wiring line laminated structure Portion substantially form one plane, and the side surfaces of the passivation film and the low dielectric film wiring line laminated structure portion are covered with a part of the insulating film.