Patent ID: 8030695

Claim:
A semiconductor memory device having a cross point structure comprising: a plurality of upper electrodes arranged to extend in a direction; a plurality of lower electrodes on a substrate and arranged to extend in a direction substantially at a right angle to the direction of the upper electrodes; a first insulating material on the substrate and in between the plurality of lower electrodes such that surfaces of the lower electrodes and the first insulating material are substantially coplanar; and a group of memory materials arranged between the upper electrodes and the surfaces of the lower electrodes and the first insulating material for storage of data, wherein the memory materials comprise a perovskite material, and wherein each of the memory materials is disposed at the lower electrodes side of the corresponding upper electrode and extends along the corresponding upper electrode, wherein each lower electrode spans multiple upper electrodes such that each lower electrode extends beyond a cell region of a memory cell, which is an area defined by a cross-section between the lower electrode and any upper electrode spanned by the lower electrode, and wherein the memory material does not extend along the lower electrodes.