Patent ID: 7634748

Claim:
A method for correcting a plurality of violations in a circuit design, comprising the steps of: (A) implementing a first engineering change order in said circuit design to correct a first of said violations; (B) implementing a second engineering change order with a special cell to correct a second of said violations, said second engineering change order being independent of said first engineering change order, said special cell (i) replacing a current cell in a layout of said circuit design associated with said second violation such that said current cell is physically removed from said layout, (ii) comprising at least three interfaces at a boundary of said special cell and available for a signal path associated with said second violation, all of said interfaces sharing a characteristic appropriate to correct said second violation, each of said interfaces having a different one of at least three different performances of said characteristic and said interfaces being one of (a) at least three inputs into said special cell and (b) at least three outputs out of said special cell and (iii) has a same logical operation as said current cell; and (C) routing, via a computer, said signal path to only one of said interfaces to fix said second violation.