Patent ID: 8288296

Claim:
A method for fabricating a first replacement gate transistor and a second replacement gate transistor, comprising the steps of: applying an insulating layer over a semiconductor structure, the semiconductor structure comprising a plurality of horizontal surfaces, a plurality of sidewall surfaces, a plurality of active areas, and a first temporary gate structure and a second temporary gate structure disposed over the active areas of a semiconductor substrate, whereby the insulating layer is disposed upon both the horizontal surfaces and the sidewall surfaces; removing a portion of the insulating layer, whereby the insulating layer remains only on the sidewall surfaces; depositing a nitride liner on the semiconductor substrate, whereby the nitride liner is disposed upon both horizontal surfaces and sidewall surfaces of the first temporary gate structure and the second temporary gate structure; depositing an oxide layer on the nitride liner; planarizing the oxide layer, whereby the first temporary gate structure and the second temporary gate structure are exposed; removing the first temporary gate structure and second temporary gate structures; depositing a low-K dielectric on the semiconductor structure, whereby the low-K dielectric is disposed on both horizontal surfaces and sidewall surfaces; removing a portion of the low-K dielectric, whereby the low-K dielectric remains only on the sidewall surfaces of the first replacement gate transistor, and the low-K dielectric remains in a cup shape on the second replacement gate transistor; depositing a high-K dielectric on the semiconductor structure, including the low-K dielectric in a cup shape on the second replacement gate transistor, whereby the high-K dielectric is disposed upon both horizontal surfaces and sidewall surfaces of the first replacement gate transistor and second replacement gate transistor; depositing a metal layer on the high-K dielectric; and planarizing the metal layer, whereby the oxide layer is exposed, and whereby the first replacement gate transistor has a first gate, and the second replacement gate transistor has a second gate, wherein a high-K dielectric is disposed along the sides and the bottom of the first gate and a hybrid gate dielectric is disposed along the sides and the bottom of the second gate.