Patent ID: 8143093

Claim:
A thin film transistor formation method, comprising: depositing and patterning a gate electrode over a substrate; depositing a gate dielectric layer over the gate electrode; depositing a semiconductive active layer over the gate dielectric layer, the semiconductive active layer comprising oxygen, nitrogen, and one or more elements selected from the group consisting of zinc, indium, cadmium, gallium, and tin; depositing an etch stop layer over the active layer; forming a first mask over the etch stop layer; etching the etch stop layer to form a patterned etch stop layer; removing the first mask to expose the patterned etch stop layer; depositing a metal layer over the patterned etch stop layer; forming a second mask over the metal layer; etching the metal layer to define a source electrode and a drain electrode; removing the second mask; etching the active layer using the source electrode and the drain electrode as a mask; and depositing a passivation layer over the source electrode and the drain electrode.