Patent ID: 6958723

Claim:
A current mode pipeline analog-to-digital converter apparatus including a plurality of stages; each respective stage of said plurality of stages comprising: (a) a respective residue amplifier including a first amplifying unit and a second amplifying unit; each of said first and second amplifying units having an inverting input locus, a non-inverting input locus and an output locus; each of said first and second amplifying units receiving a differential input data signal at one input locus of said inverting input locus and said non-inverting input locus; the other input loci of said first and second amplifying units other than said one input locus receiving a first current signal in a first current direction providing a DC level setting signal for each of said first and second amplifying units; signals presented at said output loci substantially representing said input data signal less said DC level setting signal; and (b) a counter-current signal generating unit coupled with said other input loci at a single coupling locus; said counter-current signal generating unit presenting a second current signal in a second current direction opposite to said first current direction providing a DC level control signal for each of said first and second amplifying units.