Patent ID: 6934253

Claim:
A DIBOC-based ATM switch, comprising: a plurality of input ports for receiving data units on virtual connections, each input port physically associated with a plurality of data stores and an input control for transmitting “Requests” to release data units; a plurality of output ports, each output port operatively associated with the plurality of the data stores and physically associated with an output control for monitoring “Requests” to release data units; a switch fabric for switching data units for any of the input ports to any of the output ports; and a rate filter adapted to filter data units from the data stores in response to the output controls; wherein the data stores are arranged to buffer data units for delivery to their associated output port, and the output controls are arranged to monitor the backlog of buffered data units for delivery to their associated output ports, through information transmitted in “Requests” and, if the backlog reaches a particular level, to enforce a rate limitation against additional data units for delivery to their associated output ports, wherein the additional data units in violation of the rate limitation are filtered by the rate filter.