Patent ID: 8250258

Claim:
A hybrid serial peripheral interface (SPI) data transmission architecture having dual ports adapted in a network device for connecting a host and a network, wherein the hybrid SPI data transmission architecture comprises: a receiving (RX) buffer and a transmitting (TX) buffer connected to the network; a data receiving SPI connected to the host to receive data from the network through the RX buffer during a data receiving process such that the host receives the data from the network through the data receiving SPI; a data transmitting SPI connected to the host to transmit data from the host to the TX buffer and further to the network during a data transmitting process; a configuration and status register to generate a data transmitting interrupt and/or a data receiving interrupt to the host according to a status of the RX buffer and the TX buffer such that the host performs the data transmitting process and/or the data receiving process according to the data transmitting interrupt and/or the data receiving interrupt; and a hybrid SPI processing module to control data transmission paths between the data transmission SPI and the RX buffer and between the data transmission SPI and the TX buffer such that when the data receiving SPI is idling and the data transmitting process is performed, part of the data is transmitted through the data receiving SPI to the TX buffer and further to the network, and when the data transmitting SPI is idling and the data receiving process is performed, part of the data is received from the network through the RX buffer to the data transmitting SPI and further to the host.