Patent ID: 7274391

Claim:
A digital camera comprising: (a) a CCD having an array of pixels arranged in rows and columns with two or more phases per pixel and operating in accumulation mode clocking for capturing an electronic representation of an image; and (b) means providing two or more clocks each being operatively and respectively connected to a phase of the pixels in a row for initiating flushing of excess current, and after flushing and capturing an image by the array of pixels reading out such pixels wherein, to initiate flushing, one clock is at its high level when the other clock is at its low level and as the high level is shifted to a low level, the low level is shifted to a high level and then after transfer of a row of excess charge both clocks are at a low level for a predetermined duration which is selected to be longer than the duration that either clock is at a high level to thereby reduce power levels, the predetermined duration being selected to be between a minimum duration at which dark current starts to substantially increase and a maximum of twice the duration of image readout of a row.