Patent ID: 7576736

Claim:
A pixel structure for a vertical emissive-reflective (emi-flective) display, comprising: a first transistor, having a gate, a source, and a drain, wherein the gate and the source of the first transistor are respectively coupled to a first scan line and a first data line; a second transistor, having a gate, a source, and a drain, wherein the gate of the second transistor is coupled to the drain of the first transistor; a first storage capacitor, having one end coupled to the gate of the second transistor, and another end coupled to the source of the second transistor; a self-light emitting display unit, having an anode, a self-light emitting layer and a cathode, wherein the anode is coupled to the drain of the second transistor; a third transistor, having a gate, a source, and a drain, wherein the gate and the source of the third transistor are respectively coupled to a second scan line and a second data line; a second storage capacitor, having one end coupled, to the drain of the third transistor, and another end coupled to a common voltage; and a reflective-type display unit, having one end coupled to the drain of the third transistor and the cathode of the organic emitting unit, and another end coupled to the common voltage, wherein when operated in a self-light emitting display mode, the reflective-type display unit is turned off through the second scan line, and when operated in a reflective-type display mode, the self-light emitting display unit is turned off through the first scan line.