Patent ID: 8124473

Claim:
A method for manufacturing a strain enhanced semiconductor device comprising a semiconductor substrate, the semiconductor substrate having a surface and comprising source and drain regions formed therein that are separated by a channel region formed in the semiconductor substrate, and the semiconductor device further comprising a gate electrode overlying the surface and the channel region of the semiconductor substrate, the method comprising the steps of: forming recesses in the semiconductor substrate; epitaxially growing a strain inducing semiconductor material in the recesses to embed the strain inducing semiconductor material in the source and drain regions; depositing a layer of silicide forming metal on substantially planar surfaces of the strain inducing semiconductor material that is embedded in the source and drain regions and heating to form thin metal silicide contacts directly along the substantially planar surfaces of the strain inducing semiconductor material that is embedded in the source and drain regions; electro-lessly depositing a seed layer comprising palladium overlying the substantially planar surfaces of the strain inducing semiconductor material that is embedded in the source and drain regions, wherein the seed layer is in physical contact with the thin metal silicide contacts; electro-lessly depositing a conductive layer comprising cobalt and tungsten overlying the seed layer; then, without removing any of the conductive layer, depositing an insulating layer overlying the conductive layer; etching contact openings through the insulating layer; and forming, in the contact openings, metallized contacts that physically contact the conductive layer.