Patent ID: 8748247

Claim:
A method for fabricating a semiconductor structure, comprising: providing a semiconductor substrate having a first region and a second region; doping top of the semiconductor substrate to form a doped layer at top surface of the semiconductor substrate over the first region and the second region; etching the doped layer to form a first sub-fin in the first region and a first sub-fin in the second region; forming an insulating layer over the semiconductor substrate including the first sub-fin in the first region and the first sub-fin in the second region; removing top portions of the first sub-fin in the first region and the first sub-fin in the second region to form a corresponding first opening and second opening, respectively; and forming a second sub-fin in the first opening and a second sub-fin in the second opening such that the first sub-fin in the first region and the second sub-fin in the first opening jointly form a complete fin in the first region, and the first sub-fin in the second region and the second sub-fin in the second opening jointly form a complete fin in the second region.