Patent ID: 8634241

Claim:
A method of executing a memory operation command for accessing memory data of a plurality of memory addresses of a memory device, comprising the orderly steps of: (a) latching a first memory address of the plurality of memory addresses into stacked registers of the memory device; (b) latching a second memory address of the plurality of memory addresses into the stacked registers; (c) accessing the memory data of a current memory address in the stacked registers and removing the current memory address from the stacked registers, the current memory address being the memory address latched earliest in the stacked registers immediately before being removed; (d) checking if a last memory address of the plurality of memory addresses has been latched or not; (e) latching a next memory address of the plurality of memory addresses not latched yet into the stacked registers and returning to step (c) if the last memory address has not been latched; otherwise, proceeding to step (f); and (f) accessing the memory data of the memory address still latched in the stack registers and removing the memory address from the stacked registers to complete the memory operation command.