Patent ID: 8207584

Claim:
A semiconductor device comprising: a MISFET including: a gate insulating film formed on a semiconductor substrate; a gate electrode formed on the gate insulating film; a source region formed in the semiconductor substrate; and a drain region formed in the semiconductor substrate, wherein the gate insulating film includes: a silicon oxide layer formed on the semiconductor substrate; an oxygen deficiency adjustment layer formed on the silicon oxide layer; and a high dielectric constant layer formed on the oxygen deficiency adjustment layer, the high dielectric constant layer including a hafnium oxide film, wherein the gate electrode includes a metal film formed on the high dielectric constant layer and having a reduction catalyst effect, wherein the oxygen deficiency adjustment layer comprises an oxide containing a group 2A element, a group 3A element, a group 3B element, a group 4A element, or a group 5A element, and wherein the gate insulating film is formed such that a dipole exists between the silicon oxide layer and the oxygen deficiency adjustment layer.