Patent ID: 7781898

Claim:
An IC package comprising: a substrate having a top surface, a bottom surface, a first interconnecting finger and a second interconnecting finger disposed on the top surface, wherein the top surface includes a die-attaching area defined; a die-attaching layer formed on the die-attaching area on the top surface of the substrate; a chip disposed on the top surface of the substrate and aligned with the die-attaching area by the die-attaching layer; at least a bonding wire connecting the first interconnecting finger and the second interconnecting finger, and a plurality of electrical connecting components electrically connecting the chip to the substrate; wherein at least a portion of the bonding wire is encapsulated in the die-attaching layer; and wherein the first interconnecting finger is located outside the die-attaching area and the second interconnecting finger inside the die-attaching area, furthermore, the bonding wire has a ball bond and a wedge bond, wherein the ball bond is bonded on the first interconnecting finger and the wedge bond on the second interconnecting finger.