Patent ID: 8008163

Claim:
A method of fabricating a semiconductor device, the method comprising: forming a buffer oxide layer in a first region and a second region of a semiconductor substrate; forming a plurality of first preliminary mask patterns on the buffer oxide layer in the first region, the plurality of first preliminary mask patterns being arranged according to a first pitch in a first direction; forming a plurality of second preliminary mask patterns between every two adjacent first preliminary mask patterns from among the plurality of first preliminary mask patterns, respectively, the plurality of first preliminary mask patterns and the plurality of second preliminary mask patterns being spaced apart by a first space from one another; forming a plurality of first mask patterns and a plurality of second mask patterns by trimming the plurality of first preliminary mask patterns and the plurality of second preliminary mask patterns, where the plurality of first mask patterns are spaced apart by a second space from one another and the plurality of second mask patterns are spaced apart by the second space from one another; forming a plurality of first active region mask patterns for exposing the semiconductor substrate by etching the buffer oxide layer by using the plurality of first mask patterns and the plurality of second mask patterns as an etch mask; defining a plurality of active regions in the semiconductor substrate by forming a trench including a plurality of first trench spaces having a same width as the first space and a plurality of second trench spaces under the second space in the first region by using the plurality of first active region mask patterns as an etch mask, where the plurality of active regions are arranged according to a half pitch of the first pitch in the first direction, and wherein the plurality of second trench spaces are wider than the plurality of first trench spaces; and forming a first liner layer on the semiconductor substrate having the trench therein such that the plurality of first trench spaces are completely filled with the first liner layer.