Patent ID: 8803269

Claim:
A wafer scale arrangement of optical transceiver modules, comprising: a silicon interposer wafer for use as a platform for assembling a plurality of separate transceiver modules, the silicon interposer wafer comprising: a planar surface defining an optical reference plane, a plurality of conductive vias formed therethrough to provide electrical connections to other components, and optical wave guiding regions formed along the planar surface; and a dielectric layer formed over the planar surface of the silicon interposer wafer, the dielectric layer for supporting the placement and interconnection of electrical integrated circuit components associated with the plurality of separate transceiver modules, the dielectric layer forming a plurality of openings, thereby exposing the planar surface of the silicon interposer wafer at each opening, the plurality of openings of predetermined size and disposed in predetermined locations for properly positioning and aligning optical components of each transceiver module to permit optical signal paths between the aligned optical components along the optical reference plane, the dielectric layer further including electrical conductive paths for providing electrical connection between the supported electrical integrated circuit components and selected ones of the conductive vias of the underlying silicon interposer wafer.