Patent ID: 7116686

Claim:
A transmitter, wherein the transmitter is a Very High Speed Digital Subscriber Line (VDSL) transmitter comprising: a first input for receiving data (DATA); a second input for receiving a network timing reference signal (CLK 2 ); a third input for receiving a transmitter sampling clock signal (CLK 1 ); an output for providing data frames (FRAME) over an optical communication medium; embedding circuitry (EMBED) coupled between said first input and said output, wherein the embedding circuitry embeds said data in said data frames (FRAME) and outputs said data frames to said output; and phase measurement circuitry (PHASE) coupled to said second input and responsive to a local timing reference signal (R), said local timing reference signal (R) being derived from said transmitter sampling clock signal (CLK 1 ), wherein said phase measurement circuitry (PHASE) measures a phase offset value (P) between said network timing reference signal (CLK 2 ) and said local timing reference signal (R), and outputs said phase offset value (P) to said embedding circuitry (EMBED); wherein said embedding circuitry (EMBED) is further configured so as to embed in one of said data frames (FRAME) a change of said phase offset value (P) from a previously measured phase offset value (P).