Patent ID: 6891411

Claim:
A charge pump circuit comprising: a first plurality of serially connected transistors of a first conductivity type; a second plurality of serially connected transistors of a second conductivity type; said first plurality of serially connected transistors being serially connected to the second plurality of serially connected transistors; the interconnection of said first and second plurality of transistors providing an output; a gate of one of said first plurality of transistors being configured to receive a {overscore (DOWN)} pulse signal, a gate of another one of said first plurality of transistors being configured to receive a DC bias signal, a gate of one of said second plurality of transistors being configured to receive an UP pulse signal, and a gate of another one of said second plurality of transistors being configured to receive another DC bias signal; a first node at the interconnection of transistors of said first plurality of transistors being configured to receive a DOWN pulse signal and a second node at the interconnection of transistors of said second plurality of transistors being configured to receive an {overscore (UP)} pulse signal; and a first non-parasitic, non-MOS transistor-based capacitor connected to said first node for applying said DOWN pulse signal to said first node and a second non-parasitic, non-MOS transistor-based capacitor connected to said second node for applying said {overscore (UP)} pulse signal to said second node.