Patent ID: 7467287

Claim:
A method for execution by a microprocessor in response to receiving a single instruction, the method comprising: receiving the single instruction that includes a first index of a first vector in a first entry in a register file and a second index of a second vector in a second entry in the register file, receiving the first vector having a first plurality of numbers and the second vector having a second plurality of numbers, each of the first plurality of numbers pointing to one of a plurality of entries, each of the plurality of entries being in one of a plurality of look-up tables; and replacing simultaneously the plurality of entries in the plurality of look-up tables that are indicated by the first plurality of numbers from the first entry in the register file, with the second plurality of numbers from the second entry in the register file; wherein the receiving and the replacing operations are performed in response to the microprocessor receiving the single instruction; wherein the microprocessor comprises a media processor integrated with a memory controller for host memory on a single integrated circuit.