Patent ID: 8362600

Claim:
A method, comprising: providing a semiconductor substrate having at least one device level formed on a top surface of the substrate, the at least one device level comprising at least a portion of a plurality of devices; and forming a plurality of wiring levels on a top surface of the at least one device level, wherein at least one of the plurality of wiring levels comprises at least one alpha particle blocking shield situated between at least one of the plurality of devices and a predetermined first location where a terminal pad will be formed in one of the wiring levels, the at least one alpha particle blocking shield placed at least one second location, having at least one width, and occupying a predetermined number of the plurality of wiring levels, said predetermined first location and said at least one second location being separated laterally from one another, wherein the at least one second location, the at least one width and the predetermined number of wiring levels are sufficient to prevent a predetermined percentage of alpha particles of a selected energy or less expected to be emitted from an alpha particle emitting metallization to be formed adjacent and connected to the terminal pad from reaching the at least one device.