Patent ID: 7893434

Claim:
A method for producing a high frequency diode which has a P type region, a N type region, and an I layer as a high resistivity layer interposed between the P type region and N type region, the method comprising: growing a silicon single crystal ingot by the CZ method such that the silicon single crystal has a resistivity of 100Ωcm or more, primary interstitial oxygen concentration of 8.0×10 17 to 16.0×10 17 atoms/cm 3 , and carbon concentration of 5×10 15 to 5×10 17 atoms/cm 3 ; slicing a silicon wafer from the silicon single crystal ingot; performing a heat treatment of the silicon wafer, thereby producing a silicon wafer constituting an I layer and having a carbon concentration of 5×10 15 to 5×10 17 atoms/cm 3 , an interstitial oxygen concentration of 6.5×10 17 to 13.5×10 17 atoms/cm 3 , and resistivity of 100 Ωcm or more; forming a P type region by doping a first dopant from a first surface of the silicon wafer; and forming an N type region by doping a second dopant from a second surface of the silicon wafer; wherein the heat treatment includes a first heat treatment in an atmosphere composed of argon, nitrogen or a mixed gas of argon and nitrogen, where a temperature of the silicon wafer is increased from 700° C. to 1000° C. with a heating rate within a range of 1 to 2° C./min; and the I layer includes recombination centers made of oxygen precipitation induced defects, and an energy level is continuously formed from a top energy level of valence band to Fermi level.