Patent ID: 8530750

Claim:
A multilayer printed circuit board comprising: (A) a first conductive layer including: (i) a first signal ground; (ii) a first frame ground on which an external interface component is mounted; (iii) a first slit portion that separates the first signal ground and the first frame ground from each other; and (iv) a signal wiring arranged to extend over the first slit portion; and (B) a second conductive layer laminated on the first conductive layer through a dielectric layer, the second conductive layer including: (i) a second signal ground; (ii) a second frame ground; and (iii) a second slit portion that separates the second signal ground and the second frame ground from each other, and (C) a first connecting member and a second connecting member for connecting the second signal ground and the second frame ground to each other, wherein the first connecting member and the second connecting member are arranged along the signal wiring on a different side, such that the first connecting member and the second connecting member sandwich the signal wiring and extend over the second slit portion, wherein, in a cross section perpendicular to a wiring direction of the signal wiring, a distance between a midpoint of a side of the signal wiring that is in contact with the dielectric layer and an end of the first connecting member located closest to the second connecting member, and a distance between the midpoint and an end of the second connecting member located closest to the first connecting member, are (i) each larger than a thickness of the dielectric layer, and (ii) equal to or less than 7.5 times the thickness.