Patent ID: 8916460

Claim:
A method of manufacturing a semiconductor device comprising: providing a semiconductor substrate with a first semiconductor fin and a second semiconductor fin, the first and second semiconductor fins extending, with respect to a top down view, in a first direction and extending along a same line and defining a first recess between facing ends of the first and second semiconductor fins; forming a first insulator pattern about sidewalls of the first and second semiconductor fins and in the first recess; forming a second insulator pattern on the first insulator pattern at a location above the first recess; etching the first insulator pattern and the second insulator pattern so that the top surfaces of the first and second fins extend above a top surface of the etched first insulator pattern and so that a top surface of remaining insulator in the first recess is above the top surface of the etched first insulator pattern; forming a first gate electrode to extend over the first semiconductor fin, a second gate electrode to extend over the second semiconductor fin, and a first dummy gate to extend over the remaining insulator in the first recess.