Patent ID: 7932143

Claim:
A method for fabricating a semiconductor device, the method comprising the steps of: providing a semiconductor substrate having an active region and a shallow trench isolation region having a divot; forming an epitaxial layer on the active region of the semiconductor substrate to define a lateral overhang portion in the divot at an interface of the active region and the shallow trench isolation region; and forming a gate stack comprising a first gate stack-forming layer overlying the semiconductor substrate, wherein the step of forming the gate stack comprises directionally depositing a non-conformal layer of metal gate-forming material forming a thinned break portion thereof just below the lateral overhang portion; wherein after the step of forming the gate stack, a first portion of the non-conformal layer of metal gate-forming material is in the gate stack and a second portion is exposed with the thinned break portion at least partially isolating the first and second portions.