Patent ID: 6982482

Claim:
A packaged solid state assembly comprising: a) a first ceramic substrate and a second ceramic substrate and at least one solid state device located therebetween, each solid state device comprising a body having a coefficient of thermal expansion and a plurality of conductive contacts on a surface of the body facing the second ceramic substrate; b) the first ceramic substrate comprising: a body having a coefficient of thermal expansion matched to the coefficient of thermal expansion of at least one solid state device, a lower side and an upper side facing the solid state devices; a conductive pad covering the lower side; and one conductive pad connected to each of the solid state devices packaged, each conductive pad being bonded to the upper side of the body and connected to the solid state device with which it is associated, each pad being separated from other metal pads by a distance sufficient to prevent breakdown; c) a second ceramic substrate comprising: a body having a coefficient of thermal expansion matched to the coefficient of thermal expansion of at least one solid state device, a lower side facing the solid state devices, and an upper side; a plurality of conductive pads bonded to the upper side of the body, and a plurality of conductive pads bonded to the lower side of the body, at least one pad for each contact on the solid state devices, facing the solid state devices and connected to the conductive contacts of the solid state device; and a plurality of vias connecting at least some of the conductive pads on the lower side of the body to at least one of the conductive pads on the upper side of the body; d) a plurality of terminals connected to the conductive pads on the upper surface of the second ceramic substrate; e) a strip line comprising an insulating body, a first conductive strip and a second conductive strip, the first conductive strip being connected to a conductive pad on the first ceramic substrate or the second ceramic substrate, and the second conductive strip being connected to a different conductive pad on the first ceramic substrate or the second ceramic substrate; and f) a first encapsulant having a coefficient of thermal expansion matched to the coefficient of thermal expansion of at least one solid state device, encapsulating the solid state devices between the first ceramic substrate and the second ceramic substrate.