Patent ID: 7205783

Claim:
A semiconductor integrated circuit electrostatic withstand voltage test method, the method comprising: grounding a power supply pin or ground pin of a semiconductor integrated circuit to place said semiconductor integrated circuit in a first state; applying static electricity to one or more desired pins of said semiconductor integrated circuit while in said first state; supplying power to one of a power supply pin and ground pin of said semiconductor integrated circuit while grounding another of said power supply pin and ground pin, to place said semiconductor integrated circuit in a second state; performing pin leakage current testing for all signal pins while in said second state; grounding one of a power supply pin and ground pin of an internal circuit of said semiconductor integrated circuit and supplying one or more digital signals to one or more signal input pins, to place said semiconductor integrated circuit in a third state; and, performing power supply leakage current testing using one of the power supply pin and ground pin of said internal circuit while in said third state.