Patent ID: 8802523

Claim:
A method of forming a complementary metal-oxide-semiconductor (CMOS) device comprising: providing a semiconductor substrate including a first region and a second region; providing a first dummy gate structure including a first dummy gate over the semiconductor substrate in the first region and a second dummy gate structure including a second dummy gate over the semiconductor substrate in the second region; amorphizing a surface portion of the first dummy gate to form a first amorphous silicon layer on the first dummy gate; forming an interlayer dielectric layer on the semiconductor substrate, wherein the first amorphous silicon layer and the second dummy gate are exposed; wet etching the second dummy gate to form a second opening, while the first amorphous silicon layer protects the first dummy gate without forming a photoresist protective layer; forming a second metal gate in the second opening; removing the first amorphous silicon layer and the first dummy gate to form a first opening; and forming a first metal gate in the first opening.