Patent ID: 8504703

Claim:
A method for decreasing the number of trap-handling exceptions in a computer system executing computer code instructions, the method comprising: executing an application that invokes a first privileged instruction on a virtual machine executing on a physical computing device in a non-privileged mode; when a first trap-handling exception occurs in response to execution of the first privilege-level instruction executing in a non-privileged mode on the physical computing device, analyzing each nearby instruction of a determinable number of nearby instructions after the first privileged instruction to determine that a second instruction of the determinable number of nearby instructions would cause a trap-handling exception if executed on the physical computing device, the trap-handling exception being processed by a trap handler to emulate an implied state change of a corresponding privilege-level instruction before allowing the corresponding privilege-level instruction to be executed, execution of the application being held at the first privilege-level instruction while analyzing each nearby instruction of a determinable number of nearby instructions; and executing on the virtual machine at least one additional instruction that will cause an exception in conjunction with handling the first instruction that caused the first trap-handling exception to occur and the second instruction and preventing the at least one additional instruction from being directly executed on the physical computing device and causing its own trap-handling exception.