Patent ID: 7199051

Claim:
A method for fabricating a semiconductor device, comprising the steps of: forming a plurality of conductive structures on a substrate, each conductive structure including a conductive layer and a hard mask insulation layer formed on the conductive layer; forming a first insulation layer on the conductive structures; forming a plurality of plugs contacted to the substrate disposed between the conductive structures by passing through the first insulation layer and having a predetermined height corresponding to a height between the conductive layer and a top of the hard mask insulation layer; forming attack barrier layers covering each top portion of the hard mask insulation layers to protect the hard mask insulation layers; forming a second insulation layer on the attack barrier layer and the plugs; and selectively etching the second insulation layer to form a contact hole exposing at least one of the plugs, wherein the attack barrier layers protect the hard mask insulation layers against damage in the course of forming the contact hole.