Patent ID: 7808117

Claim:
An integrated circuit die, comprising: a first bond pad; a second bond pad; a third bond pad; a fourth bond pad; a first probe region electrically coupled to the fourth bond pad; a fifth bond pad; a sixth bond pad; a seventh bond pad, wherein the first probe region and all of the first, second, third, fourth, fifth, sixth, and seventh bond pads are arranged according to a hexagonal pattern as viewed from a top down perspective and wherein the fourth bond pad is a regular hexagon share having sides equal in length and defining equal angles, and wherein the first probe region is a hexagon shape that is not the regular hexagon shape; and a first I/O cell; wherein a maximum bond pad width of the fifth bond pad is greater than a maximum I/O cell width of the first I/O cell, wherein the maximum I/O cell width of the first I/O cell and the maximum bond pad width of the fifth bond pad are measured along parallel lines, wherein the fifth bond pad overlies, as viewed from the top down perspective, a first portion of the first I/O cell, and wherein the sixth bond pad overlies, as viewed from the top down perspective, a second portion of the first I/O cell.