Patent ID: 6940085

Claim:
A memory comprising: a first memory structure comprising: a first conductive region; a first conductive tub; a second conductive tub; a first memory storage element disposed between the first conductive region and the first conductive tub; a first control element disposed between the first conductive tub and the second conductive tub; and a first conductive via disposed in the second conductive tub; and a second memory structure comprising: a second conductive region; a third conductive tub; a fourth conductive tub; a second memory storage element disposed between the second conductive region and the third conductive tub; a second control element disposed between the third conductive tub and the fourth conductive tub; and a second conductive via disposed in the fourth conductive tub and in contact with the first conductive region, wherein the first memory structure is vertically adjacent the second memory structure.