Patent ID: 8813010

Claim:
A timing analysis program stored in a non-transitory computer readable medium, which is executed in a computing device, for causing the computing device to perform a timing analysis on a design circuit including a first circuit cell having a first delay value and a second circuit cell having a second delay value different from the first delay value, the timing analysis program comprising: a means for reading out variation range information that defines the variation width of the first delay value of the first circuit cell and the variation width of the second delay value of the second circuit cell from a memory unit; a means for reading out variation coefficient information that includes a first variation coefficient that shows the shift degree of the variation width of the first delay value and a second variation coefficient that shows the shift degree of the variation width of the second delay value from the memory unit; and a means for performing analysis condition generation processing which generates a first analysis condition in which the variation width of the first delay value is shifted on the basis of the first variation coefficient and a second analysis condition in which the variation width of the second delay value is shifted on the basis of the second variation coefficient.