Patent ID: 8765536

Claim:
A method of forming an integrated photonic semiconductor structure having a photonic device and a CMOS device comprising: depositing a first silicon nitride layer having a first stress property over an active region of the photonic device, the first silicon nitride layer in direct contact with opposing sidewalls of the active region; depositing an oxide layer having a fifth stress property over the deposited first silicon nitride layer; and depositing a second silicon nitride layer having a second stress property over the oxide layer, wherein the deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer encapsulate the photonic device, wherein the deposited first silicon nitride layer, the oxide layer, and the second silicon nitride layer comprise graded stress properties, the oxide layer including a larger stress than the first silicon nitride layer and the second silicon nitride layer having a larger stress than the oxide layer.