Patent ID: 7368799

Claim:
A semiconductor device comprising: a first semiconductor layer having a first major surface and a second major surface; a first insulator film formed selectively on the first major surface of the first semiconductor layer; a second semiconductor layer of a first conductivity type formed on the portion of the first semiconductor layer where the first insulator film is not formed; a third semiconductor layer of a second conductivity type formed on the first insulator film; a fourth semiconductor layer of the second conductivity type formed on the second semiconductor layer or in a surface portion of the second semiconductor layer; a seventh semiconductor layer of the first conductivity type extended from the surface of the third semiconductor layer down to the first insulator film; a fifth semiconductor layer of the first conductivity type formed in a surface portion of the fourth semiconductor layer; a second insulator film on an exposed surface of the fourth semiconductor layer exposed between the second semiconductor layer and the fifth semiconductor layer; a first gate electrode on the second insulator film; an eighth semiconductor layer of the first conductivity type formed in a surface portion of the third semiconductor layer, the eighth semiconductor layer being in contact with the seventh semiconductor layer; a ninth semiconductor layer of the first conductivity type formed in a surface portion of the third semiconductor layer, the ninth semiconductor layer being spaced apart from the eighth semiconductor layer; a second gate electrode above the extended portion of the third semiconductor layer extended between the eighth semiconductor layer and the ninth semiconductor layer with a second gate insulator film interposed therebetween; a first electrode connected electrically to the fourth semiconductor layer, the fifth semiconductor layer, and the seventh semiconductor layer; a second electrode formed on the second major surface of the first semiconductor layer; a third electrode connected electrically to the ninth semiconductor layer and the third semiconductor layer; and an end portion of the pn-junction between the second semiconductor layer and the fourth semiconductor layer opposite to the gate-electrode-side end portion of the pn-junction being in contact with the first insulator film.