Patent ID: 8664726

Claim:
An electronic apparatus comprising: a substrate including a device region and an electrostatic discharge (ESD) region; a pad of electrically conductive material constituting a terminal; an electrical device disposed at the device region of the substrate and including a signal line electrically connected to the pad; an external well of a first conductivity type in the (ESD) region of the substrate; an internal well of a second conductivity type in the external well, the first conductivity type opposite the second conductivity type; a first heavily doped region of the first conductivity type located at a surface of the internal well; a second heavily doped region of the second conductivity type located at a surface of the internal well; a third heavily doped region of the first conductivity type located at a surface of the external well; electrically conductive wiring extending from the pad and electrically connecting the first heavily doped region to the pad, and the third heavily doped region to the pad, and wherein the second heavily doped region is interposed between and spaced from each of the first and third heavily doped regions, and wherein at least one of a space between the first and second heavily doped regions and a space between the second and third heavily doped regions is devoid of a device isolation structure of electrical isolation material.