Patent ID: 7676808

Claim:
An information handling system comprising: a plurality of simultaneous multi-threading (SMT) processors; a memory accessible by the processors; a plurality of software threads and a plurality of run queues stored in the memory, wherein each of the run queues corresponds to one of the SMT processors; a thread scheduling tool for scheduling threads among the plurality of SMT processors, the thread scheduling tool comprising software code effective to: determine that a first thread from the plurality of software threads that is in a first run queue selected from the plurality of run queues is a poor performing thread, wherein the first run queue corresponds to a first SMT processor selected from the plurality of SMT processors, wherein the software code that performs the determination includes software code effective to: execute a plurality of threads listed in the first run queue, including the first thread, on the first SMT processor, the software code that performs the execution further including software code effective to: retrieve a number of cycles value for each thread indicating the number of cycles that occurred while each thread was executing; retrieve a number of instructions value for each thread indicating the number of instructions that were executed while each thread was executing; divide each number of cycles value by its corresponding number of instructions value, the dividing resulting in a cycles per instruction (CPI) value; and record the CPI value for each thread in the first queue; and identify the first thread as having a CPI value worse than a plurality of the other threads listed in the first run queue; and in response to the determination, the software code is effective to: write a first identifier corresponding to the first thread to a second run queue, wherein the second run queue corresponds to a second SMT processor selected from the plurality of SMT processors; and remove the first identifier from the first run queue.