Patent ID: 7130333

Claim:
A method for frame sync detection using signal combining and correlation, the method comprising the steps of: despreading PN coded signals to provide in-phase I 1 –I n , and quadrature phase Q 1 –Q n signals, wherein each I 1 –I n and each Q 1 –Q n signal contains at least one sync bit and where n≧2; summing the at least one sync bit from each I 1 –I n , and quadrature phase Q 1 –Q n signals to form sums I s1 and Q s1 , respectively; providing a reference sync, wherein the reference sync comprises at least one bit; comparing each sum I s1 and Q s1 with the at least one bit from the reference sync; accumulating the results of each I s1 and Q s1 comparison so as to form two accumulates, I A and Q A , respectively; squaring each accumulate I A and Q A , respectively, to form I A 2 and Q A 2 ; summing I A 2 and Q A 2 ; and comparing I A 2 +Q A 2 with a predetermined threshold and as a result of the comparison, making a determination whether frame sync has been achieved is made.