Patent ID: 7622967

Claim:
A phase shifting circuit, comprising: a phase-locked loop (PLL loop) in which a reference frequency signal is received and branched into first and second signals, said PLL loop including: a phase comparator comprising a first comparator input terminal for receiving the first signal and a second comparator input terminal; a phase shifter that receives the second signal and phase-shifts the second signal to output a phase-shifted signal, the phase-shifted signal output from said phase shifter being supplied to the second comparator input terminal of said phase comparator; a low-pass filter that receives an output signal from said phase comparator; a differential amplifier comprising a first amplifier input terminal connected to an output of said low-pass filter and a second amplifier input terminal; and first and second frequency dividers that divide frequency by mutually identical numbers, said first and second frequency dividers being inserted in front of respective ones of the first and second input terminals of said phase comparator, wherein an amount of phase shift by said phase shifter is controlled by an output signal from said differential amplifier, the amount of phase shift by said phase shifter being decided by a reference voltage applied to the second amplifier input terminal of said differential amplifier.