Patent ID: 7484018

Claim:
A device, comprising: a first upstream port operable to be coupled to a first serial bus, wherein the first upstream port is further operable to transfer data at a first rate; an upstream physical layer device coupled to the first upstream port; a hub controller coupled to the upstream physical layer device; a transaction translator coupled to the hub controller; a plurality of downstream physical layer devices coupled to the transaction translator; and a plurality of downstream ports coupled respectively to the plurality of downstream physical layer devices, wherein each of the plurality of downstream ports is operable to be coupled to a respective serial bus of a plurality of serial buses, wherein each of the plurality of downstream ports is further operable to transfer data at a respective rate; wherein the first upstream port is distinct from the plurality of downstream ports; wherein the transaction translator is operable to receive the data from the first upstream port at the first rate and is further operable to provide data respectively to each of the plurality of downstream ports at its respective rate; wherein the transaction translator comprises a plurality of memory devices, wherein each of the plurality of memory devices is associated with a respective downstream port of the plurality of downstream ports, and wherein the plurality of memory devices are operable to store data to be transferred between the respective downstream port and the upstream port; and wherein the device is operable to implement a Universal Serial Bus (USB) protocol.