Patent ID: 7696086

Claim:
A method for fabricating an interconnect structure, comprising: providing a substrate with a conductive part thereon; forming a lower dielectric layer; forming a hard mask layer and a patterned photoresist layer over the lower dielectric layer; using the patterned photoresist layer as a mask, performing only an etching process on the lower dielectric layer to form a contact or via opening exposing the conductive part over the substrate, directly followed by removing the patterned photoresist layer and the hard mask layer; forming a conductive material layer on the lower dielectric layer and filling up the contact or via opening; removing all of the conductive material layer higher a top surface of the lower dielectric layer to form a first contact or via plug in the contact or via opening in the lower dielectric layer to electrically connect with the conductive part; forming an upper dielectric layer on the lower dielectric layer and the first contact or via plug; and forming a second contact or via plug and a conductive line in the upper dielectric layer, wherein the second contact or via plug is formed between the first contact or via plug and the conductive line and electrically connects the first contact or via plug and the conductive line.