Patent ID: 8735986

Claim:
A substrate, comprising: an intrinsic region; a first region having a first resistivity, for accommodating a field effect transistor; a second region having a second resistivity, for accommodating an npn subcollector of a bipolar transistor device and triple well; a third region having a third resistivity, for accommodating a passive device; and a fourth region, substantially without implantation, to provide low perimeter capacitance for devices, the fourth region comprising a portion of the intrinsic region; wherein the resistivity of the first region is between 1 ohm-cm and 100 ohm-cm and includes dopant materials to lower its resistivity with respect to the intrinsic region, the resistivity of the second region is between 0.001 and 0.1 ohm-cm, the resistivity of the third region is between 500 and 5000 ohm-cm and includes dopant materials to increase its resistivity with respect to the intrinsic region, and the resistivity of the fourth region and the intrinsic region is about 1000 ohm-cm.