Patent ID: 7569464

Claim:
A method for manufacturing a semiconductor device, comprising: forming a gate structure over a substrate; forming a stack of layers on the substrate and at least partially along a sidewall of the gate structure, wherein the stack of layers includes an initial layer located over the substrate, a buffer layer located over the initial layer and an offset layer located over the buffer layer; removing horizontal segments of the offset layer and the buffer layer using a dry etch and a wet clean, wherein removing includes choosing at least one of an initial thickness of the buffer layer, a period of time for the dry etch or a period of time for the wet clean such that horizontal segments of the initial layer are exposed and substantially unaffected after the dry etch and wet clean; implanting source/drain regions through the substantially unaffected horizontal segments of the initial layer; and forming a source/drain sidewall spacer along the sidewall of the gate structure, the stack of layers comprising the initial layer, the buffer layer and the offset layer separating the source/drain sidewall spacer from the gate structure.