Patent ID: 8563446

Claim:
A method of forming a trench structure comprising: forming a trench in a semiconductor on insulator (SOI) substrate comprising a semiconductor on insulator (SOI) layer on a buried dielectric layer, wherein the buried dielectric layer is present on a base semiconductor layer; exposing sidewalls of the trench in the base semiconductor layer to an arsenic-containing gas to adsorb an arsenic containing layer on the sidewalls of the trench while sidewalls of the trench that are present along the SOI layer are protected from being exposed to the arsenic-containing gas by a dielectric spacer; depositing a material layer on the sidewalls of the trench to encapsulate the arsenic-containing layer between the material layer and sidewalls of the trench; annealing to diffuse arsenic from the arsenic-containing layer encapsulated by the material layer into the sidewalls of the trench to provide a buried plate electrode having an upper surface contacting the buried dielectric layer; forming a node dielectric within the trench; and forming an upper electrode on the node dielectric.