Patent ID: 7407823

Claim:
A manufacturing method of a semiconductor integrated circuit device, comprising the steps of: (a) preparing a semiconductor wafer partitioned into a plurality of chip regions in which individual semiconductor integrated circuits are formed, said semiconductor wafer having a plurality of first electrodes formed over a main surface thereof and electrically connected to said semiconductor integrated circuits; (b) preparing a first card comprising: a first wiring board which has first wires formed therein; a first sheet which has a plurality of contact terminals formed thereover for contact with said first electrodes and has a plurality of second wires formed therein and electrically connected to said contact terminals and to said first wires, said first sheet being held by said first wiring board such that said contact terminals have respective tips thereof opposing said main surface of said semiconductor wafer; and a pressing mechanism which has a first main surface opposing said first sheet, has a first back surface opposite to said first main surface, and has at least one first hole portion formed therein and extending therethrough from said first main surface to said first back surface, said pressing mechanism pressing, from a back surface side thereof, a first region of said first sheet which is formed with said contact terminals; and (c) performing electrical testing of said semiconductor integrated circuits by contacting said tips of said contact terminals with said first electrodes.