Patent ID: 7808222

Claim:
A high power switch-mode voltage regulator circuit, comprising: an array of Metal Oxide Semiconductor (MOS) switching transistors electrically coupled to one another at their sources and at their drains, wherein said array of MOS switching transistors comprises a high-side array of MOS switching transistors and a low-side array of MOS switching transistors electrically coupled to said high-side array of MOS switching transistors, said high-side array of MOS switching transistors and said low-side array of MOS switching transistors configured to be complementarily turned on and off, further wherein said low-side array of MOS switching transistors comprises a charging circuit; and a plurality of gate driver circuits, each electrically coupled to a respective one of said MOS switching transistors so as to form pairs of gate driver circuit and MOS switching transistor, wherein said charging circuit is electrically coupled to regulate correct voltage levels to all of said plurality of gate driver circuit coupled to said low-side MOS switching transistors.