Patent ID: 7571432

Claim:
A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains a directive that a specific loop process in the source program should be divided into a plurality of loop sub-processes so that data objects included in said loop process are laid in the data cache memory in units of a predetermined data size, and the optimization unit divides, into a plurality of loop sub-processes, the loop process according to said directive, said loop process being a target of the directive obtained by the directive obtainment unit.