Patent ID: 7446774

Claim:
A system on a single integrated circuit chip comprising: an MPEG Transport processor for receiving a plurality of MPEG Transport streams, at least one of the MPEG Transport streams including MPEG video data; an MPEG video decoder for decoding the MPEG video data using an external memory to generate video for displaying; a display engine for processing graphics to be blended with the video using the external memory; and a system bridge controller having a north bridge function disposed between a CPU and a plurality of peripheral devices for coupling the CPU to the plurality of peripheral devices, wherein the MPEG video decoder, the display engine and the system bridge controller are implemented on the single integrated circuit chip, wherein the plurality of peripheral devices are situated externally to the single integrated circuit chip, and wherein the external memory has a unified memory architecture, such that the external memory is concurrently used by the CPU through the system bridge controller as at least a part of its main memory, the display engine for processing the graphics, and the MPEG decoder for decoding the MPEG video data.