Patent ID: 8860033

Claim:
An active-matrix substrate comprising: a semiconductor layer; a thin-film transistor element including a first thin-film transistor, which has a source region, a channel region and a drain region that are included in the semiconductor layer, wherein the channel region is defined by overlap with a gate; a gate bus line; a source bus line; and a pixel electrode, wherein the source region of the first thin-film transistor includes a source contact portion, and wherein the semiconductor layer has a first gettering region adjacent to the source region of the first thin-film transistor, and wherein the semiconductor layer has a first end portion, a second end portion and an intermediate portion between the first and second end portions, and wherein the first end portion has a greater width than the intermediate portion, and wherein a part of the source region of the first thin-film transistor, including the source contact portion, and the first gettering region are located in the first end portion, and wherein the first gettering region is located in an outer periphery of the first end portion except an electrical charge path leading from the source contact portion to the channel region of the first thin-film transistor, and wherein the active-matrix substrate satisfies d2>d1≧d3 and d2+A1/2>d3+L 1 /2, where d1 is the length of the shortest line segment that connects together the channel region of the first thin-film transistor and the first gettering region in a direction corresponding to that of a line in a direction of d2 that extends at least between and connects together the channel region of the first thin-film transistor and the source contact portion, d 2 is the distance from the channel region of the first thin-film transistor to the source contact portion in the semiconductor layer, d 3 is the distance from the channel region of the first thin-film transistor to the first end portion of the semiconductor layer, wherein the direction of d2 is defined by the shortest distance between the channel region of the first thin-film transistor and the source contact portion, L 1 is the length of the first end portion along the line in the direction of d2 that connects together the channel region of the first thin-film transistor and the source contact portion, and A 1 is the length of the source contact portion along the line in the direction of d2 that connects together the channel region of the first thin-film transistor and the source contact portion.