Patent ID: 7573697

Claim:
A capacitor comprising: a plurality of laminated dielectric layers; a plurality of inner electrode layers each disposed between mutually adjacent ones of the dielectric layers; and dummy electrode layers respectively disposed between the dielectric layers, disposed on sides closer to outer peripheral sides of the dielectric layers than to the inner electrode layers and disposed apart from the inner electrode layers; wherein each of the dummy electrode layers is formed in substantially a same plane as that of each of the inner electrode layers by using a printing method, and of gaps between each of the inner electrode layers and a corresponding one of the dummy electrode layers, a width of the gap extending in a direction perpendicular to a printing direction of the dummy electrode layer and a width of the gap extending in a direction parallel to the printing direction of the dummy electrode layer are respectively 50 to 350 μm, and the width of the gap extending in the direction perpendicular to the printing direction of the dummy electrode layer is equal to or greater than the width of the gap extending in the direction parallel to the printing direction of the dummy electrode layer.