Patent ID: 7518184

Claim:
A self-aligned recessed gate structure, comprising: a gate layer which is conductive, comprising: a first region having a first width, said first region being recessed below a surface of a semiconductor substrate; and a second region having a second width, said second region extending above said surface of said semiconductor substrate; a conductive layer located above and in conductive electrical connection with said second region of said gate layer; a barrier layer separating said conductive layer from said second region of said gate layer, the barrier layer being conductive and through which said conductive layer is in conductive electrical connection with said second region of said gate layer; an insulating layer located above said second region of said gate layer; an oxide layer located on sidewalls and bottom of said gate layer; and nitride spacers located along sidewalls of said second region of the gate layer but not along sidewalls of said first region of the gate layer, wherein said nitride spacers are in contact with said insulating layer, said barrier layer, and said oxide layer located on said sidewalls of said gate layer.