Patent ID: 8423679

Claim:
A memory device comprising: a nonvolatile semiconductor memory configured to store data; and a controller that controls the nonvolatile semiconductor memory and includes a host interface module and a memory control module, wherein the host interface module is configured to receive a first command, a second command, and a third command, the memory control module returns a first response indicating whether or not the memory device supports the third command in response to the second command, the memory control module saves system data and shifts the memory device to a ready state in which a power supply to the memory device is allowed to be stopped in response to the third command, a normal termination indicating flag is not set when power supply to the memory device has been cut off before completion of the shift to the ready state; the memory control module is configured to execute a first initializing process in response to (1) the first command received after supplying a power to the memory device and (2) the shift to the ready state not being completed by the third command being received before a power supply to the memory device was stopped a previous time prior to power again being supplied to the memory device, the first initializing process includes correcting errors of data stored in the nonvolatile semiconductor memory, the memory control module is configured to execute a second initializing process in response to (1) the first command received after supplying the power to the memory device and (2) the shift to the ready state being completed by the third command being received before the power supply to the memory device was stopped the previous time prior to power again being supplied to the memory device, the second initializing process is completed quicker than the first initializing process and includes loading and restoring the saved system data without the correcting errors of data in the first initializing process, and the first initializing process and the second initializing process are alternative processes executed for the memory device to be ready to be written and read by a request from a host.