Patent ID: 7907004

Claim:
A signal processing apparatus, comprising: a variable capacitor of which the capacitance is variable; and a switching portion for switching among a sampling mode for making an input signal sampled by the variable capacitor, a holding mode for holding a charge gained by sampling the input signal in the variable capacitor, an output mode for outputting a charge stored in the variable capacitor, and a reset mode, in which a common mode voltage is applied to an input terminal of the variable capacitor, wherein the variable capacitor includes the input terminal through which the input signal is inputted at the time of the sampling mode, and a control terminal to which a first control signal which decreases a capacitance of the variable capacitor to a value below a capacitance in the sampling mode is inputted in the output mode, and a second control signal having a predetermined reference voltage is inputted in the holding mode, where an insulating layer is provided between the control terminal and the input terminal, wherein the reference voltage is the same as the common mode voltage or a voltage close to the common mode voltage.