Patent ID: 7415762

Claim:
A method of fabricating an interposer, comprising the steps of: forming first through holes at required positions in a semiconductor wafer; forming a first insulating layer on the entire surface of the semiconductor wafer, including inner walls of the first through holes, and then forming a first wiring pattern having a required shape on each surface of the semiconductor wafer, including insides of the first through holes; dicing the semiconductor wafer with the first wiring pattern formed thereon into individual shapes of first interposer portions; arranging the diced first interposer portions at a predetermined regular interval therebetween on a second insulating layer formed on one surface of a supporting body; forming an insulator layer filling respective gaps between the first interposer portions, and further forming a third insulating layer over the insulator layer and the first interposer portions; removing the supporting body, then forming second through holes piercing from the third insulating layer to the second insulating layer at required positions in the insulator layer, and forming via holes reaching pad portions delimited at required positions in the first wiring patterns; forming second wiring patterns having required shapes, the second wiring patterns electrically connecting both surfaces of the insulator layer via the second through holes and filling the via holes to be electrically connected to the pad portions of the first wiring patterns; and forming protective films on both surfaces of the first interposer portions and the insulator layer in such a manner that pad portions delimited at required positions in the second wiring patterns are exposed, and further cutting portions of the insulator layer to delimit specified areas for the second interposer portions into separate pieces, each piece including one of the first interposer portions.