Patent ID: 8868395

Claim:
A fast simulation method comprising: accessing a netlist of a circuit; identifying an output node of a power supply module of the circuit as a power node; designating the power node an ideal power node; partitioning the circuit into blocks, wherein the power supply module is designated a fan-in block and any blocks connected to the power node are designated fan-out blocks; performing DC initialization for the circuit; and for each time step: determining any inter-relationship of the fan-out blocks, the determining any inter-relationship including identifying simulation intervals for each fan-out block; calculating a sensitivity model for each fan-out block, the sensitivity model including conductance, capacitance, and current loadings; asynchronously adding results of the sensitivity model for each fan-out block to a total loadings of the power node, the total loadings including delta values calculated based on results of a previous simulation interval and added to the total loadings; loading the total loadings into a Jacobian matrix computed for the fan-in block; and outputting a simulation waveform point.