Patent ID: 7247919

Claim:
A circuit structure comprising: a semiconductor layer; an oxide layer formed on said semiconductor layer, the entire said oxide layer having a substantially uniform thickness; a gate structure formed on a portion of said oxide layer and having first and second leading edges, said oxide layer extends outwardly from both said leading edges of said gate structure; and a first overlap region of the oxide layer located only beneath said gate structure and adjacent said first leading edge and inward of said second leading edge, and a second overlap region comprising all remaining portions of the oxide layer located beneath said gate structure, said second overlap region having first and second sides, said first side being adjacent said first overlap region and said second side being adjacent said second leading edge, said first overlap region having a predetermined ion implant concentration higher than in said second overlap region and all remaining oxide layer portions extending outwardly from both said first and second leading edges of said gate structure, said predetermined implant concentration being sufficient to increase the electrical gate oxide thickness in said overlap region, and wherein said predetermined ion implant concentration is about 1E18 atoms per cubic centimeter of fluorine.