Patent ID: 7124061

Claim:
A system LSI (large scale integrated circuit) comprising: a group of external terminals to which a plurality of external devices can be connected; a processor carrying out computation and control on the basis of programs; a bus interface specifying an external device which is to be an object of access from among the plurality of external devices on the basis of a control signal outputted from the processor, and outputting access time data instructing an access time to said external device and a request signal requesting access to said external device; a register storing the access time data outputted from the bus interface; an input terminal to which is inputted, from an exterior, a wait signal which designates extension of the access time to said external device; and an external bus controller which, in accordance with the access time data stored in the register and the request signal outputted from the bus interface, accesses said external device via the group of external terminals, and extends the access time to said external device in accordance with the wait signal inputted to the input terminal, wherein the external bus controller extends the access time to said external device in units of the access time which the access time data instructs.