Patent ID: 7084354

Claim:
An electronic assembly, comprising: a lower layer; a first elongate trace on the lower layer; a first upper layer covering the first elongate trace; a first via being formed through an upper surface of the first upper layer and extending to the first elongate trace to expose a portion of the first elongate trace in a base of the first via; a second elongate trace formed on the first upper layer, the second elongate trace having a first portion and a second portion, wherein the first portion runs over a portion only of the internal sidewall of the first via, and the second portion is positioned in a base of the first via formed through the upper surface of the first upper layer on the portion of the first elongate trace, which is exposed in the base of the first via, to form a direct electrical interconnection between the first elongate trace and the second elongate trace; a second upper layer covering the second elongate trace, a second via being formed through an upper surface of the second upper layer above the first via and extending to the second elongate trace to expose the second portion of the second elongate trace; and a third elongate trace formed on the second upper layer, the third elongate trace having a third portion and a fourth portion, wherein the third portion covers only a portion of the internal sidewall of the second via, and the fourth portion is positioned in a base of the second via on the second portion of the second elongate trace on the portion of the first elongate trace in the base of the first via, to form a direct electrical interconnection between the third elongate trace, the second elongate trace, and the first elongate trace.