Patent ID: 7646840

Claim:
An electronic circuit comprising: an external signal input for carrying a non-periodic information signal; a clock node for carrying an internal system clock; a clock recovery circuit with a first input coupled to the external signal input and a second input coupled to the clock node, the clock recovery circuit including an output node carrying a strobe signal; and a latch circuit with a first input coupled to the external signal input and a second input coupled to the output node of the clock recovery circuit, wherein the non-periodic information signal is latched into the latch circuit in response to the strobe signal; wherein the clock recovery circuit comprises: a delay circuit that includes the second input of the clock recovery circuit and the output node of the clock recovery circuit, the delay circuit further including a first clock output and a second clock output and also further including a first control input and a second control input; a first regulator circuit with a first input coupled to the first clock output of the delay circuit and a second input coupled to the external signal input, the first regulator circuit having an output coupled to the first control input of the delay circuit; and a second regulator circuit with a first input coupled to the second clock output of the delay circuit and a second input coupled to the external signal input, the second regulator circuit having an output coupled to the second control input of the delay circuit.