Patent ID: 7602256

Claim:
A frequency-tuning circuit for a phase-lock loop (PLL) circuit, the circuit comprising: a voltage-controlled oscillator (VCO) having a frequency band of operation and comprising a coarse frequency tuning input, a fine frequency tuning input, and an output; a memory unit configured to store a coarse digital code corresponding to a calibration frequency; a coarse frequency tuning controller configured to access the coarse digital code, determine at least one offset corresponding to at least one of a plurality of frequency sub-bands within the frequency band of operation of the VCO, combine the coarse digital code and the offset to generate a coarse tuning output, and apply the coarse tuning output to the coarse frequency tuning input of the VCO to tune the output of the VCO to a first frequency within the sub-band; and a fine frequency tuning controller configured to produce a fine tuning output and, while the coarse tuning output is applied to the coarse frequency tuning input of the VCO, provide the fine tuning output to the fine frequency tuning input of the VCO to tune the VCO to a second frequency within the sub-band.