Patent ID: 8456256

Claim:
A passive component comprising a dielectric substrate including a plurality of stacked dielectric layers; the dielectric substrate having an inductor-forming region, in which at least one inductor is arranged in a direction perpendicular to a direction in which the dielectric layers are stacked, and a capacitor-forming region, which includes at least one capacitor electrically connected to at least one of the at least one inductor; wherein the at least one inductor in the inductor-forming region is disposed in the dielectric substrate, and the inductor is formed of at least two pairs of inductor-forming electrodes, which are electrically connected through via holes and are arranged along the direction in which the dielectric layers are stacked, the inductor-forming electrodes of each pair facing each other with a dielectric layer interposed therebetween, and wherein the two pairs of inductor-forming electrodes are electrically connected to each other through a via hole disposed therebetween, wherein a relation 0 <Da <Db is satisfied, where Da represents a shortest distance between each of the pairs of inductor-forming electrodes, and Db represents a shortest distance between pairs of inductor-forming electrodes that are adjacent to each other, wherein Da is within a range of 0 μm Da ≦20 μm, wherein the passive component further comprises: an innerlayer ground electrode disposed in the dielectric substrate and which is electrically connected to a ground terminal disposed on a surface of the dielectric substrate, and wherein the innerlayer ground electrode, the capacitor-forming region and the inductor-forming region are arranged along a direction in which the dielectric layers are stacked.