Patent ID: 7225321

Claim:
A reconfigurable digital logic unit, based on two or more logic cells, with the ability to, during the operation of the logic unit, at the same time process data signals and configuration signals, comprising: two or more reconfigurable logic cells ( 19 , 26 ), the logic cells configured so that the logic unit processes in the same clock cycle i) data signals and ii) configuration signals, the processing being done at the same time and during operation of the logic unit; a memory ( 13 ) containing two or more microprograms ( 14 , 16 ), the microprograms containing information relating to the functionality of the two or more reconfigurable logic cells ( 19 , 26 ); means for reprogramming at least one of the microprograms ( 14 , 16 ) as a function of a specific application, the reprogramming being at least during operation of the logic unit; means for selecting at least one microprogram ( 14 , 16 ) of the two of more microprograms; and means for configuring the logic cells on the basis of the functionality information contained within the selected microprogram ( 14 , 16 ), the configuring being done at least during operation of the logic unit.