Patent ID: 7732296

Claim:
A method of fabricating a metal-insulator-metal (MIM) capacitor, comprising: forming an insulating-layer pattern on a semiconductor substrate, the insulating-layer pattern having a plurality of openings that respectively define areas where capacitor cells are to be formed; forming a lower electrode conductive layer on sidewalls of the openings, an upper surface of the insulating-layer and the semiconductor substrate exposed by the openings, the lower electrode conductive layer comprising metal material; forming a first sacrificial layer on the lower electrode conductive layer to fill the openings and cover the upper surface of the insulating-layer; forming a second sacrificial layer on the first sacrificial layer, excluding filling the openings; planarizing the second sacrificial layer using a chemical mechanical polishing (CMP) process such that the second sacrificial layer remains on the first sacrificial layer; after planarizing the second sacrificial layer, exposing an upper surface of the lower electrode conductive layer using an etch-back process such that remaining portions of the first sacrificial layer remain in the openings; removing the exposed lower electrode conductive layer to form a plurality of lower electrodes that are separated from each other, each corresponding to a capacitor cell; removing the remaining portions of the first sacrificial layer in the openings; and forming dielectric layers and upper electrodes, that are separated from each other, each corresponding to a capacitor cell, on each of the lower electrodes to provide a plurality of MIM capacitor cells constituting a single capacitor to which the same electrical signal is applied.