Patent ID: 8804436

Claim:
A method of erasing a target erase area of a non-volatile memory, wherein the non-volatile memory is divided into the target erase area and an unselected area, the method comprising of the steps in an erase cycle of: conditioning the target erase area of the non-volatile memory, wherein the unselected area is an area, which is excluding the target erase area, in the non-volatile memory; erasing target cells of the target erase area, wherein the target cells are set to have a threshold voltage which is not greater than an erase verify voltage; soft-programming the target cells, wherein the target cells are set to have a threshold voltage which is not less than a soft program verify voltage, and the soft program verify voltage is less than the erase verify voltage; and refreshing a predefined portion of the unselected area, wherein the predefined portion to be refreshed in the erase cycle is less than the unselected area.