Patent ID: 7500122

Claim:
An efficiency optimization method for a hardware device with an adjustable clock frequency, comprising the steps of: providing at least a conversion table recording a plurality of correspondence relations among a plurality of work levels, a plurality of work currents, a plurality of work voltages, a plurality of clock frequencies; detecting a work current of a hardware device; obtaining a work levels, corresponding to the detected work current, of the plurality of work levels recorded in the conversion table; comparing the obtained work level with a current work level; executing an adjustment when the obtained work level differs from the current work level, the adjustment including the steps of: adjusting a current work voltage of the detected hardware device to one, corresponding to the obtained work level, of the plurality of work voltages recorded in the conversion table; and adjusting a current clock frequency of the detected hardware device to one corresponding to the obtained work level, of the plurality of clock frequency recorded in the conversion table.