Patent ID: 8874422

Claim:
A method for simulating an electronic packaging structure, the method-comprising: using a computer, providing an electromagnetic (EM) simulation framework for simulating the electronic packaging structure based on mode decomposition, wherein the electronic packaging structure includes at least two conductive planes and at least one interconnect transitional component, and the interconnect transitional component comprises at least one of a via, a strip line and a microstrip line, the EM simulation framework including: a first solver for computing an EM field at a first set of locations of the electronic packaging structure based on a parallel-plate mode; a second solver for computing an EM field at a second set of locations of the electronic packaging structure based on a strip line mode; and a microstrip line solver; defining a parallel-plate port for the interconnect transitional component if the interconnect transitional component includes a via; defining a strip line port for the interconnect transitional component if the interconnect transitional component includes a strip line; defining a microstrip line port for the interconnect transitional component if the interconnect transitional component includes a microstrip line; using a computer, computing a network function characterizing electrical properties of the interconnect transitional component based on the defined at least one of parallel-plate port, strip line port, and microstrip line port; if the interconnect transitional component includes a via, associating the defined parallel plate port of the network function with the first solver at a first location corresponding to the via of the interconnect transitional component; if the interconnect transitional component includes a strip line, associating the defined strip line port of the network function with the second solver at a second location corresponding to the strip line of the interconnect transitional component; and if the interconnect transitional component includes a microstrip line, associating the defined microstrip line port of the network function with the microstrip line solver at a third location corresponding to the microstrip line of the interconnect transitional component.