Patent ID: 8264611

Claim:
A system for downscaling video signal data to an arbitrary size, said system comprising: an antenna receiving video signal data; an analog-to-digital converter coupled to said antenna and converting said received analog signal data to digital signal data; a memory component storing video downscaling instructions; and a video downscaling processor, coupled to said memory component and said analog-to-digital converter, wherein said video downscaling processor, upon reading said video downscaling instructions from said memory component and executing said downscaling instructions: divides said digital video signal data into a plurality of blocks, wherein each block comprises a plurality of pixel elements; and cycles through said plurality of blocks, and for every block in said plurality of blocks, generates a new block, wherein said new block comprises a plurality of new pixels evenly spaced within said new block, wherein each said pixel element from said plurality of pixel elements comprises a pixel pair and each new pixel in said plurality of new pixels is generated from said pixel pair, and wherein said new pixel is calculated as (1−d)*M 1 +d*M 2 , where M 1 is a first pixel of said pixel pair, M 2 is a second pixel of said pixel pair and d is a calculated distance from a start point of said pixel pair.