Patent ID: 8261115

Claim:
A processing device, comprising: a first controlling unit configured to transit between a sleeping state and a non-sleeping state, and perform a specific process in a case where the first controlling unit is in the non-sleeping state; a second controlling unit configured to perform the specific process on behalf of the first controlling unit in a case where the first controlling unit is in the sleeping state; a first memory configured to store a first program; and a second memory configured to store a second program, wherein the second memory is set to a normal operation mode in the case where the first controlling unit is in the non-sleeping state, and the second memory is set to a low power consumption mode in the case where the first controlling unit is in the sleeping state, wherein, in the case where the first controlling unit is in the sleeping state, the second controlling unit is configured to: (a) if the second controlling unit is to perform the specific process by using the first program, perform the specific process on behalf of the first controlling unit by using the first program stored in the first memory while the first controlling unit is maintained in the sleeping state and the second memory is maintained in the low power consumption mode, and (b) if the second controlling unit is to perform the specific process by using the second program, change a mode of the second memory from the low power consumption mode to the normal operation mode, and perform the specific process on behalf of the first controlling unit by using the second program stored in the second memory, while the first controlling unit is maintained in the sleeping state.