Patent ID: 8780171

Claim:
A video signal processor comprising: a combining process section adapted to superimpose a first marker signal on a first video signal component at a specific position and superimpose a second marker signal on a second video signal component at roughly the same position as the specific position; and a control section adapted to control the condition of superimposition of the first and second marker signals so that display of (a) a first image having a predetermined depth perspective of the marker signals indicates connection cables between components of the video signal processor are correctly connected wherein the first and second marker signals are combined correctly when the first and second video signal components are combined in a correct phase relationship, and (b) a second image having another depth perspective of the marker signals, different from the first image, indicates the connection cables are incorrectly connected wherein the first and second marker signals are combined incorrectly when the first and second video signal components are combined in an incorrect phase relationship.