Patent ID: 7200283

Claim:
An apparatus for performing alpha blending calculations on a first digital image value and a second digital image value according to a digital alpha (α) value having a fractional part of n digits and having a most significant bit of α 1 and a least significant bit of α n−1 , and wherein the order of α i is related to an i th digit of α, comprising: a plurality of multiplexers, each of the plurality of multiplexers configured to receive a bit value, α i , of the digital value α, each of the plurality of multiplexers configured to receive first and second left-shifted digital image values, the first and second left-shifted digital image values shifted left according to the order of the bit values, α i , of α, each of the plurality of multiplexers configured to produce a plurality of left-shifted outputs by directing to outputs of the plurality of multiplexers either the first or second left-shifted digital image value responsive to the bit value, α i , of α; and an adder configured to receive the plurality of left-shifted outputs and further configured to produce the sum of the left-shifted outputs.