Patent ID: 8817563

Claim:
A sense amplifier in a programmable resistive memory comprises: a reference branch having at least a first MOS transistor of a first type, the first MOS transistor having a source terminal coupled to receive a first supply voltage, a gate terminal coupled to a drain terminal, and both the gate terminal and the drain terminal being coupled to a drain terminal of a second MOS transistor of a second type, the second MOS transistor having a gate terminal coupled to receive a bias supply voltage, and a source terminal coupled to a reference resistor and through the reference resistor further coupled to a diode which in turn is coupled to receive a second supply voltage; a sensing branch having at least a third MOS transistor of the first type, the third MOS transistor having a source terminal coupled to receive the first supply voltage, and a drain terminal coupled to a drain terminal of a fourth MOS transistor of the second type, the fourth MOS transistor having the gate terminal coupled to receive the bias supply voltage, and a source terminal coupled to a programmable resistance device cell and through the programmable resistance device cell further coupled to receive the second supply voltage, the programmable resistance device cell including a programmable resistance element coupled to a diode as a selector, wherein the gate terminal of the third MOS transistor is coupled to the gate terminal of the first MOS transistor; wherein the resistance difference between the reference resistor and the programmable resistance element is sensed through the drain terminal of the third MOS transistor in the sensing branch into a logic level, and wherein the magnitude of the voltage difference between the first and second supply voltages is larger than a supply voltage for core logic devices of the programmable resistive memory.