Patent ID: 7732295

Claim:
A method of forming a semiconductor substrate, comprising: providing a substrate having at least one metal wiring level within the substrate; depositing a first insulative layer on a surface of the substrate; forming a portion of a wire bond pad within the first insulative layer; depositing a second insulative layer on the first insulative layer; forming an inductor within the second insulative layer using a patterned plate process; and forming a remaining portion of the wire bond pad within the second insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor, wherein forming the inductor further comprises: forming an at least one opening within the second insulative layer; depositing a liner on the surface of the substrate and on a surface within the at least one opening within the second insulative layer; depositing a seed layer on a surface of the liner; removing a portion of the seed layer from the surface of the liner, leaving the seed layer within the at least one opening within the second insulative layer; depositing a conductive material within the at least one opening within the second insulative layer, such that the conductive material extends above the surface of the substrate; and planarizing the surface of the substrate to remove excess conductive material extending beyond the surface of the substrate, wherein between forming the at least one opening within the second insulative layer and depositing the liner, further comprising: depositing a layer of photoresist on the surface of the substrate; and forming an at least one opening within the layer of photoresist down to the second insulative layer.