Patent ID: 8099721

Claim:
A system that parses a plurality of preprocessor conditional branches of a preprocessor conditional directive statement comprising: a computer comprising a processor and a memory, the computer further comprising: a declaration serializer that: obtains tokenized input; in response to determining that the tokenized input represents a declaration, wherein the declaration is interrupted by a preprocessor conditional directive of a preprocessor conditional directive statement, wherein the preprocessor conditional directive statement comprises a plurality of mutually exclusive branches comprising at least a first branch and a second branch; labels each token of the interrupted declaration with at least a first parsing path indicator of a plurality of parsing path indicators, the at least first parsing path indicator corresponding to a first parsing path, and wherein a second parsing path indicator corresponds to a second parsing path, wherein each of the plurality of parsing paths is induced by the plurality of mutually exclusive branches of the preprocessor conditional directive statement; and returns the tokens labeled with the at least first parsing path indicator in a first pass to a caller.