Patent ID: 7580481

Claim:
A demodulator comprising: an I-channel ADC to generate an I-channel signal from an I-channel input signal obtained from a modulated carrier signal received from an antenna; a Q-channel ADC to generate a Q-channel signal from a Q-channel input signal obtained from the modulated carrier signal received from the antenna; an ADC clock coupled to the ADCs to provide a sampling signal to each of the ADCs; and means coupled to the ADC clock for correcting a mismatch between an I-channel and a Q-channel by adjustment of a timing of the sampling signal to one of the ADC's, the means including a correlator coupled to receive the I-channel signal and the Q-channel signal and to generate a correlation output corresponding to a value of a phase difference between the received I and Q-channel signals to control the adjustment of the sampling signal timing based on the received I and Q-channel signals.