Patent ID: 7018930

Claim:
A method for fabricating a semiconductor device, comprising: forming an insulating layer on an etch-target layer; forming at least one sacrificial layer on the insulating layer, wherein the sacrificial layer is at least one layer selected from the group consisting of a polysilicon layer, an Al layer, a W layer, a WSi x layer, a WN layer, a Ti layer, a TiN layer, a TiSi x layer, a TiAlN layer, a TiSiN layer, a Pt layer, an Ir layer, an IrO 2 layer, a Ru layer, a RuO 2 layer, an Ag layer, an Au layer, a Co layer, a TaN layer, a CrN layer, a CoN layer, MoN layer, a MoSi x layer, an Al 2 O 3 layer, an AlN layer, a PtSi x layer, and CrSi x layer, and wherein x is 1 or 2; forming a photoresist pattern on the sacrificial layer; and sequentially performing at least three etching processes including: (a) etching the sacrificial layer using the photoresist pattern as an etching mask and without substantially etching the insulating layer to form a sacrificial hard mask; (b) etching the insulating layer using the sacrificial hard mask as an etching mask without substantially etching the etch-target layer to form a hard mask; and (c) etching the etch-target layer using the sacrificial hard mask and the hard mask as etching masks to form a predetermined number of patterns.