Patent ID: 7420248

Claim:
A programmable, random logic device array, comprising: a substrate; a semiconductor layer above the substrate, including i) a first region of a first semiconductor type, ii) an array of spaced apart second regions of a second semiconductor type, and iii) a plurality of space-charge regions, wherein each of the space charge regions extends around a respective one of said second regions and separates said one of the second regions from the first region of the semiconductor layer, and wherein each of the second regions is contiguous with and is surrounded by a respective one of the space-charge regions; a first set of contacts, each of the first set of contacts being above and in physical and electrical contact with a respective one area of said first region of the semiconductor layer; and a second set of contacts, each of the second set of contacts being above and in physical and electrical contact with a respective one of said second regions; said first and second sets of contact facilitating connecting together the said areas of the first region and said second regions of the semiconductor layer in various, programmable ways.