Patent ID: 7398376

Claim:
A method for maximizing CPU performance in a multiprocessor comprising: configuring a computer system with multiple processors with a common physical memory address space accessible by all processors, and non-shared memory local to a processor; organizing data elements stored in a shared resource designed to support data manipulation functions, wherein said shared resource is stored in shared memory; and pipelining execution of an operation with software instructions by partitioning the operating into a series of sequential steps, said instructions comprising: executing write operations in memory local to a processor in an arbitrary order and at any time prior to storing a pointer from an existing element of said shared resource stored on a computer readable medium to a new element of said shared resource, wherein said pointer is stored in said shared resource; explicitly indicating a set of write operations to non-local memory be conducted in a specified order; and executing said write operations to non-local memory prior to storing said pointer from said existing element of said shared resource to said new element of said shared resource in response to said indicating.