Patent ID: 7687925

Claim:
An alignment mark for use in integrated circuit fabrication, the alignment mark comprising: a first plurality of elements, each element comprising a plurality of first sub elements disposed on a substrate, wherein the first sub elements have all a first orientation, are all substantially the same size and are aligned relative to each other; and a second plurality of elements, each element comprising a plurality of second sub elements disposed on the substrate, wherein the second sub elements have all a second orientation, are all substantially the same size and are aligned relative to each other, wherein the first orientation and the second orientation are substantially orthogonal, all of the first plurality of elements and all of the second plurality of elements formed on one layer, wherein the elements of the first plurality and the elements of the second plurality are arranged into a plurality of groups of four, wherein there are two elements from the first plurality and two elements from the second plurality in each group of four, wherein the groups of four are arranged into a plurality of columns, and wherein the alignment mark provides an alignment information.