Patent ID: 8520351

Claim:
A method of providing electrostatic discharge (ESD) protection for an electrical circuit device, the device including an internal circuit coupled with an input pin, the method comprising the operations of: detecting a slew rate of an input signal supplied at the input pin, where the detected slew rate at the input pin is greater than a first threshold value, generating a trigger signal of a short period of time in accordance with a first time constant; responsive to the trigger signal, generating a dissipation signal which activates a dissipation circuit and maintains the dissipation circuit in operation in accordance with a second time constant that is longer than the first time constant causing the dissipation circuit to remain active long enough to enable sufficient discharge an ESD, wherein the dissipation circuit comprises a shunt inverter and also a capacitor and transistor arranged in series between a voltage supplied at the input pin and a ground such that the gate and source of the transistor are connected with the ground, thereby forming a shunt protective circuit that protects a shunt inverter; responsive to the dissipation signal, shunting the energy associated with the ESD event away from the internal circuit for an amount of time sufficient to discharge the ESD event such that the internal circuit is not damaged; and where the detected slew rate at the input pin is less than the first threshold value, then no trigger signal is generated.