Patent ID: 7190189

Claim:
An apparatus for regulating voltage levels, the apparatus comprising: a first transistor and a second transistor, the first transistor and the second transistor each coupled to a first current source and a second current source; a third transistor coupled to the second transistor and configured to receive a first voltage from the second transistor; a fourth transistor configured to receive the first voltage from the second transistor and generate an output voltage; an adaptive system coupled to the fourth transistor, the adaptive system associated with an effective resistance in response to a second control signal; a delay system coupled to the third transistor and configured to receive a sensing current from the third transistor and generate a delayed current associated with a predetermined time delay; a current generation system coupled to the delay system, the first transistor, the second transistor and the fourth transistor; wherein the first transistor is configured to receive a reference voltage and the second transistor is configured to receive a feedback voltage, the feedback voltage being substantially proportional to the output voltage; wherein the first current source is configured to receive a first control signal and generate a first current in response to the first control signal, the first control signal being associated with either an active mode or a standby mode; wherein the first voltage is associated with a difference between the reference voltage and the feedback voltage; wherein the second control signal is associated with either the active mode or the standby mode; wherein the current generation system is configured to receive the delayed current from the delay system, output a second current to the first transistor and the second transistor, and output a third current to the fourth transistor; wherein the second current and the third current are each substantially proportional to the delayed current.