Patent ID: 7079718

Claim:
A method of in-situ die testing of photonic integrated circuit (PIC) die while still in a semiconductor wafer where the PIC includes a plurality of in-chip formed optical components including at least one photodetector, comprising the steps of: providing an in-wafer region between rows of aligned PIC die formed in the wafer; forming a groove in the in-wafer region that is in a direction transverse to at least one signal input to a row of in-wafer PIC die that permits optical access to the signal inputs of the respective in-wafer PIC die alone the groove; introducing an external interrogation beam into the respective PIC die signal inputs via the groove; checking an electrical response of the at least one photodetector in each PIC to determine if the optical components accessed by the interrogation beam via the respective PIC die signal inputs have proper optical characteristics.