Patent ID: 7868391

Claim:
A 3-D (Three dimensional) single gate inverter comprising: a semiconductor substrate; a first FET (Field Effect Transistor) of a first type and a second FET of a second type, the second type opposite of the first type; a gate electrode having a first gate dielectric for the first FET on a first surface and a second gate dielectric for the second FET on a second surface, the second surface on an opposite side of the gate electrode from the first surface, the first and second surfaces being parallel with a top surface of the semiconductor substrate, a third surface and a fourth surface of the gate electrode being electrically isolated, the third and fourth surfaces being perpendicular to the top surface of the semiconductor substrate; first source/drain regions for the first FET in the semiconductor substrate; a first epitaxial layer grown from the first source/drain regions extending above the second gate dielectric, the first epitaxial layer having an opposite doping as the first source/drain regions, the first epitaxial layer forming second source/drain regions for the second FET; and a second epitaxial layer grown from the first epitaxial layer having a doping opposite the doping of the first epitaxial layer, the second epitaxial layer covering the second gate dielectric.