Patent ID: 8481423

Claim:
A method for fabricating an interconnect structure comprising: forming an intermetal dielectric layer on a substrate; forming a via hole within said intermetal dielectric layer and filling a lower portion of said via hole with a disposable via fill material, wherein said disposable via fill material within said lower portion of said via hole is in direct contact with said intermetal dielectric layer; forming a line trench in said intermetal dielectric layer over said via hole, wherein said disposable via fill material remains in said lower portion of said via hole during the formation of the line trench; depositing a protective layer on exposed sidewalls of said intermetal dielectric layer in said line trench and on a portion of an upper surface of said disposable via fill material, said protective layer comprising an organo-silicate material and having linked carbo-silane bonds, and wherein said protective layer is absent from the lower portion of the via hole because of the presence of said disposable via fill material; performing a plasma strip to remove said disposable via fill material from said lower portion of said via hole to expose sidewalls of said intermetal dielectric layer in the lower portion of said via hole previously occupied by said disposable via fill material, while said protective layer protects said intermetal dielectric layer from damage during said plasma; and removing the protective layer from said sidewalls of said intermetal dielectric layer in said line trench.