Patent ID: 8198912

Claim:
A driver circuit comprising: a first driver arm including first transistor circuitry and a first resistance, the first transistor circuitry being connected between a pair of constant reference potentials and having control terminals connected to a first control input, the first resistance being connected between the first transistor circuitry and a first output, in a pre-emphasis mode and in a steady state mode the first transistor circuitry coupling the first resistance between the output terminal and one of the constant reference potentials; a second driver arm including second transistor circuitry and a second resistance, the second transistor circuitry being connected between the constant reference potentials and having control terminals connected to a second control input separate from the first control input, the second resistance being connected between the second transistor circuitry and the first output, in the pre-emphasis mode and in the steady state mode the second transistor circuitry coupling the second resistance between the output terminal and one of the constant reference potentials; and a first correction arm including third transistor circuitry and a third resistance, the third transistor circuitry being connected between the constant reference potentials and having control terminals connected to a first correction input separate from the first and second control inputs, the third resistance being connected between the third transistor circuitry and the first output, in the pre-emphasis mode the third transistor circuitry coupling the third resistance between the first output and one of the constant reference potentials, and in the steady state mode the second transistor circuitry de-coupling the third resistance from the constant reference potentials.