Patent ID: 7694114

Claim:
A method of processing a Single Instruction, Multiple Data (SIMD) instruction when the SIMD instruction requires a data path width greater than an active data path width in a parallel data processor, comprising: executing one or more instructions in parallel in at least two parallel arithmetic logic units of the data processor, so as to process data of a first width, said at least two parallel arithmetic logic units are SIMD type arithmetic logic units; upon execution of a mode change instruction, powering down a first one of the two parallel arithmetic logic units to conserve power; and while the first arithmetic logic unit is inactive, executing one or more instructions in a second one of the two parallel arithmetic logic units, so as to process data of a second width smaller than the first width; receiving a SIMD instruction calling for processing of data of the first width; expanding the SIMD instruction in response to the received SIMD instruction calling for processing of data of the first width to at least two instructions calling for processing of data of the second width; and executing the two instructions resulting from the expansion in sequence through the second arithmetic logic unit.