Patent ID: 8441071

Claim:
A semiconductor structure comprising: a semiconductor-on-insulator substrate including a semiconductor layer having at least one device region and at least one body contact region located therein; a first material stack located within said at least one device region, said first material stack includes, from bottom to top, a gate dielectric, a metal gate and a doped silicon-containing layer; and a second material stack located within said at least one body contact region, said second material stack includes a portion of said gate dielectric of said first material stack located on an upper surface of the semiconductor layer and a first portion of said doped silicon-containing material of the first material stack in direct contact with an upper surface of the portion of the gate dielectric that is within the least one body contact region, and wherein a second portion of said doped silicon-containing material is located directly on and covers an entirety of an upper surface of the metal gate.