Patent ID: 7432192

Claim:
A metal interconnect structure having a low concentration of impurities, comprising: (a) a seed layer formed on the sidewalls and bottom of an opening, said opening comprising a via and an overlying trench formed in a stack of dielectric layers on a substrate; (b) a first metal layer over said seed layer, said first metal layer filling said via and partially filling said trench, said first metal layer having (i) a first grain size, (ii) a first thickness on the sidewalls of the trench, and (iii) a second thickness on the bottom of the trench; and (c) a second metal layer over said first metal layer, said second metal layer filling said trench, said second metal layer having (i) a second grain size, and (ii) being coplanar with the top of said opening; wherein at least one of said first and second metal layers and said seed layer comprise impurities, said impurities being (i) carbon in a concentration of less than about 100 counts per second, (ii) sulfur in a concentration of less than about 20 counts/sec. and (iii) chloride in a concentration of less than about 10 counts/sec.