Patent ID: 7471107

Claim:
A biasing circuit for a differential driver, the biasing circuit comprising: a pre-driver circuit configured to generate a differential output signal, wherein each portion of the differential output signal is intended to be operatively coupled to gates of first and second source-coupled transistors of the differential driver, wherein each portion of the differential output signal has a single-ended voltage swing from a first voltage level to a second voltage level for inactivating and for activating, respectively, the transistors of the differential driver, wherein the pre-driver circuit is configured to receive an adjustment signal as a reference input for the second voltage level; and a feedback circuit operatively coupled to a sense signal as a first input and to a voltage reference as a second input, wherein the feedback circuit is configured to manipulate the adjustment signal such that the first input and the second input at least approximately match with respect to voltage and such that the second voltage level is adjusted to bias the activated transistor of the differential driver to a saturation region and not to a triode or linear region; wherein the sense signal corresponds to a voltage at a source node of the first and second source-coupled transistors; wherein the differential driver further includes a third transistor coupled to the sources of the first and second transistors as a current sink or current source, the biasing circuit further comprising: a fourth transistor and a resistor wherein a drain terminal of the fourth transistor is operatively coupled to a first terminal of the resistor, and a second terminal of the resistor is operatively coupled to the voltage reference such that the voltage reference at least partially tracks changes in the saturation voltage V DSAT of the third transistor.