Patent ID: 8742985

Claim:
An apparatus, comprising: receive hardware configured to receive global navigation satellite system (GNSS) signals, wherein the receive hardware includes a digital baseband (BB) pre-processor, an analog GPS radio frequency (RF) circuit and a crystal oscillator, wherein the digital BB pre-processor is configured to generate digitized GNSS signals from the received GNSS signals by processing the received GNSS signals with a set of pre-processing functions, and wherein the set of pre-processing functions includes jammer removal, converting an input signal from a first frequency to a second frequency, and converting an input signal from a first number of bits per I/Q to a second number of bits per I/Q to generate the digitized GNSS signals from the received GNSS signals; a memory to store the digitized GNSS signals; a result logic configured to produce a GNSS result from the digitized GNSS signals stored in the memory; a clock configured to provide a timing signal; and a control logic configured to control combinations of power states of the receive hardware, the memory, and the result logic based, at least in part, on the timing signal, wherein the combination of power states includes: (i) the receive hardware being in a powered up state and the result logic being in a powered down state, (ii) the receive hardware being in a powered down state and the result logic being in a powered up state, and (iii) the receive hardware being in a powered down state, the result logic being in a powered down state, and the receive hardware being scheduled to enter a powered up state at a pre-determined time point.