Patent ID: 7390974

Claim:
A multilayer printed wiring board comprising: an interlaminar insulative resin layer having at least one hole; a first conductor layer formed over the interlaminar insulative resin layer and having at least one conductor circuit; a second conductor layer formed below the interlaminar insulative resin layer and having at least one conductor circuit; and at least one filled viahole structure configured to electrically connect the at least one conductor circuit of the first conductor layer and the at least one conductor circuit of the second conductor layer, the at least one filled viahole structure comprising a first plating layer formed in the at least one hole and a second plating layer formed on the first plating layer and filling up the at least one hole, wherein the at least one conductor circuit of the first conductor layer has a thickness which is less than half of a diameter of the at least one hole and less than 25 μm, and the second plating layer of the at least one filled viahole structure forms a depression having a depth which is less than the thickness of the conductor circuit of the first conductor layer and less than 20 μm.