Patent ID: 7342283

Claim:
A semiconductor device comprising: a semiconductor substrate; a buried oxide film formed on said semiconductor substrate; and a semiconductor layer formed on said buried oxide film, wherein said semiconductor layer includes: a first island-like semiconductor layer, in which a first MOS transistor of a first conductivity type is formed, the first MOS transistor having a) a first body region, b) a first source region that is positioned in said first body region, c) and a first drain region that is positioned in the periphery of said first body region; a second island-like semiconductor layer, in which a second MOS transistor of a second conductivity type is formed, the second MOS transistor having a) a second drain region, b) a second body region that is positioned in the periphery of said second drain region, and c) a second source region that is positioned in said second body region; a first isolation trench, positioned in the periphery of said first island-like semiconductor layer, which isolates said first island-like semiconductor layer from other portions of said semiconductor layer; a second isolation trench, positioned in the periphery of said second island-like semiconductor layer, which isolates said second island-like semiconductor layer from other portions of said semiconductor layer; and a buffer region, formed between said first isolation trench and said second isolation trench, which prevents an electrical interference occurred between the first MOS transistor and the second MOS transistor, wherein an electric potential of said buffer region is fixed to one of a lowest electric potential or a highest electric potential in a circuit.