Patent ID: 6977512

Claim:
A method for measuring shared contact resistance in a memory cell design, the method comprising: providing a first test array of main test structures based on a real memory product, wherein each main test structure includes at least one shared contact and wherein the first test array builds a chain of shared contact resistance from a first contact point to a second contact point; applying voltage to the first test array from the first contact point to the second contact point; measuring shared contact resistance in the chain of shared contact resistance; providing a second test array of first supplemental test structures based on the real memory product, wherein each first supplemental test structure includes at least one shared contact and wherein the second test array builds a chain of shared contact resistance on a silicon island side of the shared contacts in the second test array from a first contact point to a second contact point; applying voltage to the second test array from the first contact point to the second contact point; and measuring silicon island side resistance in the chain of shared contact resistance on the silicon island side of the shared contacts in the second test array.