Patent ID: 7354864

Claim:
A method of producing a semiconductor device, comprising: (a) forming a planar guide having a first opening therein in an interior of a semiconductor substrate along the planar direction of the substrate, the planar guide formed by implanting and annealing ions in the interior of the semiconductor substrate and so as to have an etching rate that is slower than the etching rate of the semiconductor substrate; and (b) forming a through hole having a width that decreases in size from a first surface of the semiconductor substrate to a second surface of the semiconductor substrate by etching the semiconductor substrate from the first surface, wherein step (a) includes forming a resist on a surface of the semiconductor substrate at a position that corresponds to the first opening to be formed in the planar guide, implanting and diffusing impurities at a high density into the semiconductor substrate, and forming a high density impurity diffusion layer having the first opening therein in the interior of the semiconductor substrate by forming a semiconductor epitaxial layer on the high density impurity diffusion layer.