Patent ID: 8620638

Claim:
A method of performing a simulation of a design under test, the method comprising: implementing an input block having an adjustable output width, wherein an output of the input block has a first width corresponding to an input requirement for the design under test; coupling test data of an input frame of bits having an arbitrary dimension to the input block; transforming the test data of the input frame of bits to conform to the input requirement for the design under test; buffering the test data of the input frame of bits in the input block, wherein the buffered test data comprises a multi-dimensional sample that includes scalar values; generating, by way of the input block, an input signal comprising the buffered test data for the design under test by scanning the buffered test data in a pre-defined order, wherein the input signal comprises individual scalar values that are extracted from the scalar values of the buffered test data and provided to an input of the design under test having the first width corresponding to the input requirement for the design under test; implementing an output block having an adjustable input width for receiving data from an output of the design under test; and coupling the output of the design under test to the output block according to an output requirement of the design under test.