Patent ID: 7119624

Claim:
A phase lock loop (PLL) circuit, comprising: a plurality of fixed capacitors that can be switched in or out of the PLL circuit; a voltage controlled oscillator (VCO) assembly operatively coupled to the plurality of fixed capacitors; a charge pump; a gain compensator circuit operatively coupled to the charge pump, the gain compensator circuit generating a reference charge pump current for the charge pump, the gain compensator circuit comprising a plurality of unit current sources and a current scaler, the plurality of unit current sources being associated into a plurality of groups; a shift register; a phase detector operatively coupled to the shift register; and a capacitor control bus operatively coupled to the plurality of fixed capacitors and controlled by the shift register, the capacitor control bus providing a capacitor control signal that switches particular fixed capacitors of the plurality of fixed capacitors in or out of the PLL circuit.