Patent ID: 7338881

Claim:
A method for manufacturing a semiconductor element comprised of an SOI structure including an SOI layer, comprising the steps of: preparing the SOI layer having a transistor forming area and an element isolation area on a surface thereof; forming an oxidation-resistant mask layer on the surface of the SOI layer; forming a resist mask in an area corresponding to the transistor forming area on the oxidation-resistant mask layer; a first etching step for etching the oxidation-resistant mask layer using the resist mask in such a manner that the oxidation-resistant mask layer remains by a predetermined thickness; a second etching step for etching the oxidation-resistant mask layer allowed to remain by the predetermined thickness in accordance with the first etching step, using the resist mask and exposing the SOI layer of a portion corresponding to the element isolation area; and oxidizing the exposed SOI layer by a LOCOS method using the oxidation-resistant mask layer allowed to remain in accordance with the second etching step to thereby form an element isolation layer, wherein an etching rate of the oxidation-resistant mask layer in the first etching step is higher than that of the oxidation-resistant mask layer in the second etching step, and wherein a silicon-to-etching selection ratio in the second etching step is higher than a silicon-to-etching selection ratio in the first etching step.