Patent ID: 7288455

Claim:
A method of forming an array of non-volatile memory cells on a substrate, comprising: forming strips of charge storage material elongated in a first direction across the substrate and spaced apart in a second direction, the first and second directions being orthogonal with each other, separating the strips into segments of a given length in the first direction with a first set of spaces therebetween, implanting ions into regions of the substrate through said first set of spaces in a manner that said regions are isolated from each other in both the first and second directions, forming conductive lines elongated in the second direction and spaced apart in the first direction within the first set of spaces and that individually electrically contact a plurality of said substrate regions, separating the strip segments in the first direction into sub-segments having a second set of spaces therebetween, forming dielectric layers on edges of the sub-segments adjacent the second set of spaces, and forming conductive control gates elongated in the first direction over said sub-segments and conductive lines, and which extend into the second set of spaces adjacent to the dielectric layers on the edges of said sub-segments.