Patent ID: 7489486

Claim:
A semiconductor device, comprising at least: a plurality of first interface circuits that are electrically coupled between a first power supply line belonging to a first power supply system and a second power supply line belonging to the first power supply system, respectively; one or more first circuits comprise a first surge current path coupled to the first power supply line and a second surge current path coupled to the second power supply line, the number of the one or more first circuits being less than the plurality of first interface circuits; a plurality of second interface circuits that are electrically coupled between a third power supply line belonging to a second power supply system that is independent from the first power supply system, and a fourth power supply line belonging to the second power supply system, respectively, and further electrically coupled to a corresponding interface circuit of the plurality of first interface circuits, respectively; and one or more second circuits that comprise a third surge current path coupled to the one or more first circuits and have a first time constant derived by a first resistance coupled to the third surge current path and a first capacitance, the number of the one or more second circuits being less than the plurality of the second interface circuits.