Patent ID: 7419382

Claim:
A manufacturing method for a printed circuit board, comprising: preparing a dielectric layer comprising a plurality of electrically conductive portions for mounting a circuit component thereto, wherein the plurality of conductive portions of the dielectric layer comprise via holes in the dielectric layer, the via holes having conductive surfaces; providing a plurality of circuit components, each of the plurality of circuit components comprising a plurality of electrically conductive portions for connecting the circuit component to the plurality of conductive portions of the dielectric layer, wherein the plurality of conductive portions of each of the plurality of circuit components comprise conductive protrusions from the plurality of circuit components; detecting the positions of the plurality of conductive portions of the dielectric layer; detecting the positions of the plurality of conductive portions of each of the plurality of circuit components; selecting one of the plurality of circuit components whose plurality of conductive portions are situated in positions suitable for the plurality of conductive portions of the dielectric layer, wherein the selected circuit component comprises the conductive protrusions arranged at intervals which are relatively equivalent to distances between the via holes; and mounting the selected circuit component on the dielectric layer so that the plurality of conductive portions of the selected circuit component arc aligned with the plurality of conductive portions of the dielectric layer, and bonding the selected circuit component to the plurality of conductive portions of the dielectric layer.