Patent ID: 8652908

Claim:
A method of fabricating a semiconductor device, the method comprising: providing a semiconductor substrate having a first region and a second region; forming a nitrogen-containing lower gate insulating layer on the semiconductor substrate; forming an upper gate insulating layer on the nitrogen-containing lower gate insulating layer; forming a lower metal layer on the upper gate insulating layer; and selectively removing the lower metal layer in the first region to form a lower metal layer pattern in the second region, wherein the upper gate insulating layer in the first region prevents the nitrogen-containing lower gate insulating layer in the first region from being etched during removing of the lower metal layer in the first region the upper gate insulating layer in the first region being partially etched during removing of the lower metal layer in the first region such that at least a portion of the upper gate insulating layer remains on the nitrogen-containing lower gate insulating layer in the first region after the lower metal layer in the first region has been selectively removed.