Patent ID: 7685706

Claim:
A method for manufacturing a semiconductor device comprising the steps of: forming a conductive film over a pattern having conductivity by an electrolytic plating process, wherein the pattern is provided over a first substrate; attaching a base substance to the conductive film; separating the first substrate and the pattern from the conductive film and the base substance; forming a peeling layer over a second substrate; forming an IC chip including at least one thin film transistor over the peeling layer; attaching the base substance to the second substrate with the conductive film, the IC chip and the peeling layer interposed therebetween so that the conductive film is electrically connected to the IC chip; separating the base substance from the conductive film; covering the IC chip and the conductive film with a third substrate; and removing or separating the peeling layer from the IC chip to separate the second substrate from the IC chip.