Patent ID: 7788654

Claim:
A method for constructing a highly optimized linear-sized validation plan on a computing device, the method comprising: providing to the computing device an XML schema having a plurality of XML schema components; compiling the XML schema on the computing device in three stages: a first stage in which the XML schema is read and modeled in terms of abstract schema components; a second stage in which the XML schema components are augmented with a set of derived components and properties to form an augmented XML schema by (i) synthesizing content models from the plurality of XML schema components by adding additional XML components including one or more XML synthetic content-model components and one or more XML synthetic elements and one or more XML synthetic types to the one or more of the plurality of XML schema components and (ii) computing the derived set of properties on the XML components; and a third stage in which the augmented XML schema is traversed in order to generate recursive-descent validation code for each of the plurality of XML schema components by generating the highly optimized linear-sized validation plan directly from the plurality of XML schema components.