Patent ID: 7262433

Claim:
A semiconductor device comprising a plurality of semiconductor elements, each having a semiconductor layer, an insulation film, and an electrode formed on a predetermined substrate, wherein each of said plurality of semiconductor elements comprises a first impurity region formed at said semiconductor layer, and having a predetermined impurity concentration, a second impurity region formed at said semiconductor layer with a distance from said first impurity region, and having a predetermined impurity concentration, a channel region functioning as a channel having a predetermined channel length, formed at a region of said semiconductor layer between said first impurity region and said second impurity region with respective distances from said first impurity region and said second impurity region, a third impurity region formed in contact with said channel region at a region of said semiconductor layer between said first impurity region and said channel region, and having a constant impurity concentration in a direction parallel to the length of the channel lower than the impurity concentration of said first impurity region, and a fourth impurity region formed in contact with said channel region at a region of said semiconductor layer between said second impurity region and said channel region, and having a constant impurity concentration in a direction parallel to the length of the channel lower than the impurity concentration of said second impurity region, wherein, in each of said plurality of semiconductor elements, said insulation film is formed between said semiconductor layer and said electrode so as to come into contact with each of said semiconductor layer and said electrode, said electrode has one side and another side opposite to each other, and is formed overlapping with and facing said channel region, a portion of said third impurity region, and a portion of said fourth impurity region, and an overlapping region between said electrode and said third impurity region arranged facing each other, starting from a region where a plane including said one side intersects said semiconductor layer up to said channel region, and an overlapping region between said electrode and said fourth impurity region arranged facing each other, starting from a region where a plane including said another side intersects said semiconductor layer up to said channel region have a predetermined overlapping length in a direction of the channel length, said plurality of semiconductor elements including a first element having a first overlapping length as said predetermined overlapping length, and a second element having a second overlapping length shorter than said first overlapping length as said predetermined overlapping length.