Patent ID: 7495504

Claim:
A reference voltage generation circuit for generating a constant reference voltage at a reference voltage output terminal, comprising: a first diode element having a cathode connected to a ground potential; a second diode element which has a current density different from that of the first diode element and whose cathode is connected to the ground potential; a first resistive element having an end connected to an anode of the second diode element; a second resistive element having an end connected to the other end of the first resistive element, the other end of the second resistive element being connected to the reference voltage output terminal; a third resistive element having an end connected to an anode of the first diode element and the other end connected to the reference voltage output terminal; a first P-type transistor for supplying a current to the reference voltage output terminal; a second P-type transistor having a gate terminal connected to its own drain terminal and to a gate terminal of the first P-type transistor; a bandgap reference circuit having a feedback type control circuit for controlling a drain current of the second P-type transistor such that a voltage at the anode of the first diode element is equal to a voltage at a connection point between the first and second resistive elements; and a start-up circuit provided between the drain terminal of the second P-type transistor of the bandgap reference circuit and the ground potential, and increasing the drain current of the second P-type transistor, if the drain current of the second P-type transistor is substantially zero, wherein the start-up circuit includes: a P-type transistor having a gate terminal connected to the reference voltage output terminal; and a current generating element provided between a source terminal of the P-type transistor and a drain terminal of the second P-type transistor of the bandgap reference circuit and wherein the current generating element is a resistive element, and the current generating element is a transistor whose gate terminal is fixed to a constant voltage.