Patent ID: 7852118

Claim:
An integrated circuit device having conditional back bias virtual ground restoration circuits for preventing sneak leakage currents and shifting a virtual ground level logic “0” to a true ground level logic “0” when logic “0” signals at the virtual ground level are applied in the integrated circuit device, comprising: at least one independent voltage domain operating at a virtual ground and at least one other independent voltage domain operating at a true ground, wherein the virtual ground is at a more positive voltage than the true ground; a plurality of conditional back bias virtual ground restoration circuits, each of the plurality of conditional back bias virtual ground restoration circuits is coupled between one of a plurality of first logic circuits operating in the virtual ground voltage domain and one of a plurality of second logic circuit operating in the true ground voltage domain, wherein the plurality of first and second logic circuits operating in the virtual and true ground voltage domains, respectively, are fabricated on an integrated circuit die, and wherein each of the plurality of ground restoration circuits comprises: a level shifter circuit having a logic input and a logic output, wherein the logic output follows logic levels at the logic input; and a switch transistor having a standby input, the switch transistor is coupled between the level shifter circuit and the true ground, wherein when the logic input is at logic “0” and the standby input is at logic “1” the switch transistor is off and prevents sneak leakage current through the level shifter circuit.