Patent ID: 8897071

Claim:
A method of operating an array of memory cells, the method comprising: coupling a first end of a first string of memory cells to a first data line and coupling a second end of the first string of memory cells to a source line; coupling a first end of a second string of memory cells to a second data line and coupling a second end of the second string of memory cells to the source line; biasing the second data line to a potential of the source line by coupling the second data line to the source line regardless of states of the memory cells of the second string of memory cells; and performing a sense operation on a selected memory cell of the first string of memory cells while the second data line is biased to the potential of the source line, and while the second data line is coupled to the source line regardless of the states of the memory cells of the second string of memory cells; wherein coupling the second data line to the source line further comprises coupling the second data line to the source line by enabling a first select gate coupled between the second data line and the source line.