Patent ID: 7739467

Claim:
A semiconductor memory, comprising: a data memory part; a control circuit; and an input/output circuit, wherein said semiconductor memory is a memory that switches between a first operation mode and a second operation mode, and said first operation mode ensures higher security for a command than said second operation mode; said control circuit includes: an operation mode memory part that stores a current operation mode therein, and a command discrimination circuit that discriminates a command inputted from the outside of said semiconductor memory through said input/output circuit, said command discrimination circuit including: means for deciphering a command by loosening the security for said command inputted in at least said first operation mode, means for acquiring first address information from a command inputted in said first operation mode, and means for acquiring second address information from a command inputted in said second operation mode; said control circuit further includes an address information memory part that stores said first address information therein, which is acquired by said command discrimination circuit in said first operation mode, and an address generator circuit that generates a specified address from all or part of said second address information acquired by said command discrimination circuit in said second operation mode and all or part of said first address information stored in said address information memory part; and said control circuit accesses said data memory part by using said specified address outputted from said address generator circuit.