Patent ID: 7177328

Claim:
A cross-connect switch for a synchronous network comprising: a pointer interpreter portion having inputs coupled to each of a plurality of input channels at a predetermined level of a digital multiplex hierarchy for receiving, for each input channel, an input data signal and an input pointer, and having outputs for providing, for each input channel, a payload start marker that is active when said input data signal represents a start of a payload portion of a frame; a memory-less space switch coupled to said pointer interpreter portion, having inputs for receiving said input data signal and said payload start marker of each input channel, and outputs for providing, for each of a plurality of output channels at said predetermined level of said digital multiplex hierarchy, a selected input data signal and a corresponding selected payload start marker from any one of said plurality of input channels in response to a switching control signal; an elastic buffer portion coupled to said memory-less space switch having inputs for storing data from corresponding outputs of said memory-less space switch at an input clock rate, and outputs for providing an output data signal and a corresponding payload start marker at an output clock rate for each of said plurality of output channels; and a pointer generator portion coupled to said elastic buffer portion for receiving, for each output channel, said output data signal and said corresponding payload start maker and for providing, for each output channel, said output data signal and a corresponding output pointer indicating an alignment of said output data signal in an output frame.