Patent ID: 8314023

Claim:
In a memory comprising an array of memory cells, each memory cell comprising an antifuse and a diode coupled in series, each memory cell having an anode end coupled to an anode end of the diode, and a cathode end coupled to a cathode end of the diode, and each memory cell anode end being connected to one of first conductors and each memory cell cathode end being connected to one of second conductors, a method of programming one of the memory cells comprising: shorting the antifuse of a selected one of the memory cells by applying a first voltage to a bit line connected to the selected one of the memory cells; reducing a resistance of the shorted antifuse by applying a second voltage to the bit line connected to the selected one of the memory cells to cause current to pass through the shorted antifuse; applying to a word line connected to the selected one of the memory cells a ground voltage; applying to word lines contacting memory cells not selected a non-zero voltage less than or equal to a threshold voltage of the diodes; and applying to bit lines contacting memory cells not selected a non-zero voltage less than or equal to one threshold voltage below the voltage sufficient to short the antifuse of the memory cell, wherein the antifuse has a dielectric constant between 5 and 27, and the diode is formed from a thin film material having a band gap smaller than that of silicon.