Patent ID: 8861267

Claim:
A nonvolatile memory device comprising: a memory cell array comprising a plurality of memory blocks and a plurality of cell strings, wherein each memory block comprises a plurality of memory cells arranged at intersections of a plurality of word lines and a plurality of bit lines, and wherein each cell string comprises at least one ground select transistor, a plurality of memory cells and at least one string select transistor stacked in a direction perpendicular to a substrate, wherein at least one word line of the plurality of word lines is included in an upper word line group and at least one other word line of the plurality of word lines is included in a lower word line group, wherein a number of data bits stored in first memory cells connected to the at least one word line included in the upper word line group is different from a number of data bits stored in second memory cells connected to the at least one other word line included in the lower word line group, and wherein at least one of the first memory cells and the second memory cells stores modulated data according to a multi-dimensional modulation scheme.