Patent ID: 8441943

Claim:
A first information processing apparatus performing communication with a second information processing apparatus through one or more intermediate nodes via a network, the first information processing apparatus comprising: a data processor executing an application to prepare a first packet for transmission to the second information processing apparatus; means for generating a first time stamp indicating a first packet transmission time at which the first information processing apparatus transmits the first packet is transmitted to the network, the first packet transmission time being subsequent to an ending time of a first time period associated with the preparation of the first packet; means for generating a second time stamp indicating a second packet reception time at which a second packet is received from the second processing apparatus over the network; means for computing a round trip delay between the first information processing apparatus and the second information processing apparatus on the basis of (i) a difference between the second packet reception time and the first packet transmission time and (ii) a difference between a second packet transmission time and a first packet reception time, the round trip delay excluding the first time period and second period of time associated with a generation and processing of the second packet by the second information processing device; and means for calculating a transmission rate based on information associated with the round trip delay, the means for calculating further comprising: means for determining a bandwidth of a bottleneck link within the network, based on sizes of the first and third packets, the first packet reception time, and a time at which a third packet is received at the second information processing apparatus, the bottleneck link being disposed between adjacent ones of the intermediate nodes; and means for calculating the transmission rate based on at least the bandwidth of the bottleneck link.