Patent ID: 8115508

Claim:
A method in a computer-aided design system for generating a functional design model of a structure for time based driver output transition rate compensation, the method comprising: generating, by a processor, a functional representation of a driver circuit having an input signal and an output signal, the driver circuit structured and arranged to control the slew rate of the output signal; generating a functional representation of a delay circuit coupled to the output signal of the driver circuit, the delay circuit having a delay proportional to a desired target slew rate of the output signal; generating a functional representation of a first comparator for detecting when the output signal rises through a specified level; generating a functional representation of a second comparator for detecting when the output signal falls through a second specified level; and generating a functional representation of a phase detector directly coupled to outputs of the first and second comparators and directly coupled to an output of the delay circuit, for aligning the phases (voltage-time relationships) of the comparator outputs with the phases of delayed comparator outputs by adjusting the slew rate of the output signal.