Patent ID: 7682761

Claim:
A method of fabricating a grayscale mask, comprising: preparing a quartz wafer having a front side and a backside; depositing a layer of Si 3 N 4 directly on both sides of the quartz wafer; depositing a layer of titanium directly on the Si 3 N 4 layer on the backside of the quartz wafer, and depositing a layer of TEOS on directly on the titanium layer, forming a Ti/TEOS layer; removing the layer of Si 3 N 4 from the front side of the quartz wafer; depositing a layer of SRO directly on the front side of the quartz wafer; patterning a microlens array on the SRO layer; etching the SRO layer to form a microlens array in the SRO layer; depositing a layer of titanium on the SRO; patterning and etching the titanium layer; depositing a layer of SiO x N y on the SRO microlens array; CMP to planarize the layer of SiO x N y removing the titanium/TEOS layer from the backside of the quartz wafer; bonding the planarized SiO x N y to a quartz reticle plate to form a bonded structure; and etching to remove Si 3 N 4 from the bonded structure to form a grayscale mask reticle.