Patent ID: 7906798

Claim:
A semiconductor device comprising: an NMOS transistor including a first channel area formed in a silicon substrate, a first gate electrode formed on a first gate insulating film in correspondence with the first channel area, the first gate electrode having a pair of first sidewall insulating films, and a first source area and a first drain area formed in the silicon substrate having the first channel area situated therebetween, the first source area being formed on one side of the first gate electrode, the first drain area being formed in the silicon substrate on the other side of the first gate electrode; and a PMOS transistor including a second channel area formed in the silicon substrate, a second gate electrode formed on a second gate insulating film in correspondence with the second channel area, the second gate electrode having a pair of second sidewall insulating films, a second source area and a second drain area formed in the silicon substrate having the second channel area situated therebetween, the second source area being formed on one side of the second gate electrode, the second drain area being formed in the silicon substrate on the other side of the second gate electrode; wherein the distance between the second sidewall insulating films and the silicon substrate is greater than the distance between the first sidewall insulating films and the silicon substrate; wherein the pair of first sidewall insulating films and the pair of second sidewall insulating films include positive fixed charges; wherein the pair of first sidewall insulating films including the positive fixed charges are positioned above the first source area and the first drain area, and the pair of second sidewall insulating films including the positive fixed charges are positioned above the second source area and the second drain area.