Patent ID: 8436758

Claim:
An analog-to-digital converter (ADC) comprising: a first comparator adapted to: receive an analog signal; receive a first feedback voltage; and compare said analog signal to said first feedback voltage, and, in response, to output: a logic — 1 value if said analog signal is greater than said first feedback voltage; and a logic — 0 value if said analog signal is less than said first feedback voltage; a first feedback network adapted to develop said first feedback voltage as a function of an average of the values output by said first comparator; a second comparator adapted to: receive said analog signal; receive a second feedback voltage; and compare said analog signal to said second feedback voltage, and, in response, to output: a logic — 1 value if said analog signal is less than said second feedback voltage; and a logic — 0 value if said analog signal is greater than said second feedback voltage; a second feedback network adapted to develop said second feedback voltage as a function of an average of the values output by said second comparator.