Patent ID: 7185293

Claim:
A universal hardware device comprising: a first plurality of cells for storing data; and a first programmable matrix connected to inputs and outputs of the first plurality of cells, wherein at least one cell in the first plurality of cells comprises: a second plurality of cells for storing data; and a second programmable matrix connected to inputs and outputs of the second plurality of cells, whereby each cell of the first plurality of cells and each cell of the second plurality of cells has an architecture similar to the whole universal hardware device, and wherein at least one cell in the second plurality of cells can be directly accessed via a port of the at least one cell in the first plurality of cells and wherein a plurality of hardware applications can be implemented by selectively storing data in the first plurality of cells and the second plurality of cells and by selectively programming the first programmable matrix to connect cells in the first plurality of cells and the second programmable matrix to connect cells in the second plurality of cells.