Patent ID: 7079050

Claim:
A method of arithmetically decoding an arithmetically-encoded information signal into an information signal comprising a serial sequence of n-bit symbols, where n is an integer and n=1, the method being adapted to obtain two subsequent output symbols of the information signal in a decoding cycle, and comprising the steps of: (a) receiving the arithmetically-encoded information signal; (b) retrieving, from finite-size first and second registers, values for an A and a C parameter, respectively, the A parameter having a relationship with the size of a value interval, the C parameter having a relationship with a boundary of said interval; (c) generating a first probability value for a first symbol to be decoded, said first probability value indicating the probability that the first symbol has a least probable value, and generating a second probability value for a subsequent symbol to be decoded, said second probability value indicating the probability that the second symbol has the least probable value, the first symbol to be decoded being assumed to have the most probable value; (d) deriving the first symbol in response to the said first probability value, and in response to the values for A and C retrieved from said first and said second registers, respectively; (e) updating the A parameter so as to obtain an updated A parameter; (f) updating the value for A retrieved from said first register to a value for a temporary A parameter, using the assumption that the first symbol obtained from decoding has the most probable value; (g) deriving a temporary C parameter from the C parameter retrieved from said second register; (h) deriving the second symbol in response to the said second probability value, and in response to the values of the temporary A parameter and the temporary C parameter; (i) outputting both the first and the second symbols when the first symbol has the most probable value, or outputting the first symbol only if the first symbol has the least probable value; (j) deriving new A and C parameters; and (k) storing the new A and C parameter in the first and second registers, respectively.