Patent ID: 6924702

Claim:
A differential operational amplifier comprising: a first and second transistor of a first type, having sources coupled together, gates respectively coupled to receive a first and second input signal, and drains respectively coupled to receive a bias voltage and outputting an output signal; a third transistor of the first type having a source coupled to receive a first supply voltage, a gate coupled to receive the bias voltage and a drain coupled to the sources of the first and second transistors; a fourth and fifth transistor of the first type, and a sixth transistor of a second type, all of which are coupled in series between the first and a second supply voltage, and have gates commonly coupled to the drain of the fifth transistor, the drain of the fifth transistor outputting the bias voltage; an eighth and ninth transistor of the first type, and a tenth transistor of the second type, all of which are coupled in series between the first and second supply voltage, and have gates commonly coupled to receive the bias voltage, the drain of the ninth transistor coupled to the drain of the second transistor; and an eleventh and seventh transistor of the second type having sources commonly coupled to the drain of the second transistor, drains commonly coupled to receive the bias voltage, and gates respectively coupled to the drain of the second transistor and the bias voltage; wherein gate oxides of the first and second transistors are thicker than the other transistors.