Patent ID: 8040648

Claim:
A speed controller comprising: a rectifier module, at an input, in order to generate, on a power bus, a direct voltage from an alternating voltage available on an electrical supply network, a bus capacitor connected between a positive line and a negative line of the power bus, and an inverter module supplied by the power bus and controlled to deliver an alternating voltage to an electric load, the speed controller including a device for protecting the speed controller against overcurrents associated with voltage variations on the electrical supply network, the device including a first electronic switch of a JFET transistor type made in a wide forbidden band material and placed on the power bus in series between the rectifier module and the bus capacitor, a second electronic switch mounted on the power bus, in parallel with the JFET transistor, and means for controlling both the JFET transistor and the second electronic switch, the means for controlling configured to close the second electronic switch in order to remove a thermal memory of the JFET transistor after a strong inrush current occurs through the JFET transistor when the bus capacitor is fully charged and a voltage measured at terminals of the JFET transistor goes below a threshold value.