Patent ID: 8195887

Claim:
A method, comprising: in response to determining a first data processor device has entered a first low-power mode, initiating a first phase; in response to determining that a first cache probe has been received at the first data processor device during the first phase, transitioning the first data processor device from the first low-power mode to a first active mode; in response to determining an end of the first phase, flushing a first cache associated with the first data processor device; wherein initiating the first phase comprises resetting a first timer associated with the first data processor device, and wherein determining the end of the first phase comprises determining a value stored at the first timer matches a first threshold; in response to receiving one or more cache probes during the first phase, adjusting the value stored at the first timer while the one or more cache probes are being serviced; and maintaining the value stored the first timer during the first phase while the one or more cache probes are not being serviced.