Patent ID: 6950893

Claim:
A system comprising: a first processor including a first processor data channel; a first hybrid switching module including a first hybrid switching module processor data channel, a first hybrid switching module main data channel, a first input/output link data channel, a first crossbar switch and arbiter, and a first bridge, the first hybrid switching module processor data channel being coupled to the first processor data channel; a first main bus coupled to the first hybrid switching module main data channel allowing the first processor to access a first peripheral device coupled with the first main bus to implement a first function; a second processor including a second processor data channel; a second hybrid switching module including a second hybrid switching module processor data channel, a second hybrid switching module main data channel, a second input/output link data channel, a second crossbar switch and arbiter, and a second bridge, the second hybrid switching module processor data channel being coupled to the second processor data channel, the second input/output link data channel being coupled to the first input/output link data channel; and a second main bus coupled to the second hybrid switching module main data channel allowing the second processor to access a second peripheral device coupled with the second main bus to implement a second function that is not redundant to the first function; wherein the first hybrid switching module further comprises a failure mode that couples the first input/output link data channel with the first main bus when the first processor fails allowing the second processor to access the first peripheral device on the first main bus to implement the first function, and the second hybrid switching module further comprises a failure mode that couples the second input/output link data channel with the second main bus when the second processor fails allowing the first processor to access the second peripheral device on the second main bus to implement the second non-redundant function.