Patent ID: 8434045

Claim:
A non-transitory computer readable medium storing a computer program for assigning accesses of a first memory to accesses of a second memory, the first memory comprising first and second ports and a particular port hierarchy that specifies the first port as having a lower priority in the port hierarchy than the second port, said computer program for execution by a processor and comprising sets of instructions for: assigning a first memory access and a second memory access of a particular address in the first memory along the first port and the second port respectively during a particular clock cycle to accesses of the second memory, wherein said assigning comprises: assigning the first memory access of the particular address to a third memory access of a corresponding address of the second memory; and assigning the second memory access of the particular address to a fourth memory access of the corresponding address of the second memory to ensure that the third memory access associated with the first memory access along the lower priority first port occurs before the fourth memory access associated with the second memory access along the higher priority second port.