Patent ID: 7479669

Claim:
A transistor comprising: a mask region on a substrate; a first epitaxial laterally overgrown layer comprising semiconductor material of a first conductivity type on the substrate and a portion of the mask region and having spaced apart sidewalls; a second epitaxial laterally overgrown layer comprising semiconductor material of a second conductivity type and/or insulating on the first epitaxial laterally overgrown layer comprising semiconductor material and a portion of the mask region and that includes spaced apart portions that extend from the spaced apart sidewalls of the first epitaxial laterally overgrown layer on the mask region, the spaced apart portions having the first conductivity type; a third epitaxial laterally overgrown layer comprising unintentionally doped semiconductor material on the second epitaxial laterally overgrown layer and that includes portions that extend from the spaced apart portions and coalesce and are the first conductivity type; a channel layer comprising semiconductor material on the third epitaxial laterally overgrown layer; a barrier layer on the channel layer; a source contact on the barrier layer; a gate contact on the barrier layer; and a drain contact electrically connected to the first layer comprising semiconductor material.