Patent ID: 7592938

Claim:
An analog-to-digital converter (ADC), comprising: a plurality of stages connected in series, each deriving a stage output value from a stage input signal and generating a stage output signal as the stage input signal of a subsequent stage, wherein one of the stages is selected as a target stage for estimating a gain value thereof, a gain error correction module coupled to the stages, delivering a correction number to the target stage to affect the stage output signal of the target stage and the stage output values of subsequent stages of the target stage, receiving at least one auxiliary output value from a look-ahead module dedicated to the target stage, and deriving an error estimate of the gain value of the target stage from the stage output values and the auxiliary output value; and a look-ahead module, coupled to the target stage and the gain error correction module, generating the auxiliary output value according to the stage output value of the target stage, wherein the auxiliary output value is not affected by the correction number.