Patent ID: 7749829

Claim:
A method for fabricating a semiconductor structure, comprising: providing a first semiconductor layer having a first crystal orientation and a second semiconductor layer over at least part of the first semiconductor layer, where the second semiconductor layer has a second crystal orientation and where the second semiconductor layer is separated from the first semiconductor layer by an insulator layer; forming a first oxide layer over the second semiconductor layer; forming a mask layer over the first oxide layer; forming a trench opening by selectively removing a portion of the mask layer, first oxide layer, second semiconductor layer and insulator layer to expose the first semiconductor layer in a first region and to leave a remaining portion of the mask layer, first oxide layer, second semiconductor layer and an insulator layer in a second region; filling at least part of the trench opening by epitaxially growing a first epitaxial semiconductor material on at least an exposed surface of the first semiconductor layer to form a first epitaxial semiconductor layer in the trench opening that has a third crystal orientation that is the same as the first crystal orientation; removing the remaining portion of the mask layer before polishing the first epitaxial semiconductor layer; and polishing the first epitaxial semiconductor layer using the remaining portion of the first oxide layer as a polish stop layer so that the first epitaxial semiconductor layer is substantially coplanar with the second semiconductor layer.