Patent ID: 8717523

Claim:
An array substrate for a liquid crystal display device, the array substrate comprising: a substrate including a display region and a non-display region at one side of the display region; gate lines along a first direction and in the display region; data lines along a second direction and in the display region, the data lines crossing the gate lines to define pixel regions; auxiliary gate lines along the second direction and in the display region, the auxiliary gate lines respectively connected to the gate lines; data pad electrodes in the non-display region and electrically connected to the data lines, respectively; gate pad electrodes in the non-display region and electrically connected to the auxiliary gate lines, respectively; a first display region including first and second pixels and a second display region including third and fourth pixels in a first row of the display region; and a third display region including fifth and sixth pixels and a fourth display region including seventh and eighth pixels in a second row of the display region, wherein a first data line is disposed between the first and second pixels and between the fifth and sixth pixels, said first data line being configured to drive both of the first and second pixels and to drive both of the fifth and sixth pixels, wherein a second data line is disposed between the third and fourth pixels and between the seventh and eight pixels, said second data line being configured to drive both of the third and fourth pixels and to drive both of the seventh and eight pixels, and wherein a corresponding auxiliary gate line is disposed between the first and second display regions and between the third and fourth display regions and is connected to gate lines disposed between the first and second rows.