Patent ID: 7002075

Claim:
An intermediate substrate comprising: a substrate core comprising a main core body portion constructed of a sheet of polymer material and including a subsidiary core accommodation portion opening at a first main surface of the main core body portion as to reduce the overall transverse thickness thereof n the region of said subsidiary core accommodation portion, and a ceramic subsidiary core portion, accommodated in said subsidiary core accommodation portion and of a thickness which, together with the transverse thickness of any remaining portion of said main core body portion in said region, matches the overall transverse thickness of said main core body portion; a first terminal array formed on a first main surface side of said substrate core and comprising first side first terminals and first side second terminals some of which function as power terminals and others of which function as ground terminals, said first terminal array further comprising first side signal terminals; and a second terminal array formed on a second main surface side of said substrate core and comprising second side first terminals and second side second terminals which are conductively connected to said first side first terminals and said first side second terminals, respectively, and second side signal terminals conductively connected to said first side signal terminals; said ceramic subsidiary core portion comprising a substantially planar base body and a multilayered thin film capacitor portion formed on the first main surface side of the base body and comprising a first conductive thin film electrode and a second conductive thin film electrode separated from said first electrode by a thin film dielectric layer so as to prevent direct current flow between said electrodes, said first side first terminals and said first side second terminals of said first terminal array being conductively connected to said first electrode and said second electrode, respectively, such that direct current flow between said first side first terminals and said first side second terminals is prevented.