Patent ID: 7355571

Claim:
A display device that displays image information comprising: a display panel which comprises: a plurality of optical elements, each having a pair of electrodes including a first electrode, which is connected to a constant voltage source, and a second electrode, wherein each of the plurality of optical elements performs an optical operation according to current passing between the first and second electrodes thereof; a plurality of current lines; and a plurality of power lines, each of which is adapted to be charged with a first voltage during a selection time such that the power line does not allow a current to flow therethrough to an optical element, and to be charged with a second voltage during a non-selection time such that the power line allows a current to flow therethrough to an optical element; wherein the display panel further comprises, for each of the optical elements: a switch circuit that passes a write current with a predetermined current value through one of the current lines during the selection time and stops passing the write current during the non-selection time, and a current storage circuit which: (i) is connected to one of the power lines and to the second electrode of the optical element, (ii) stores current data according to the current value of the write current passing through the current line during the selection time, and (iii) supplies a drive current having a current value, which is obtained by subtracting a predetermined offset current from the current value of the stored write current, to the optical element during the non-selection time; and wherein each said current storage circuit comprises: a drive control transistor including a control terminal, and a current path having a first end connected to said one of the power lines and a second end connected to the second electrode of the optical element; a first capacitor device formed between the control terminal of the drive control transistor and one of the first and second ends of the current path of the drive control transistor; a write control transistor including a control terminal, and a current path having a first end connected to the control terminal of the drive control transistor and a second end connected to said one of the power lines; and a second capacitor device formed between the control terminal of the write control transistor and one of the first and second ends of the current path of the write control transistor.