Patent ID: 8263493

Claim:
A method for making a silicon chip having a through via, comprising the steps of: (a) providing a silicon chip, wherein the silicon chip comprises a silicon substrate, at least one electrical device and at least one through via, the silicon substrate has a first surface and a second surface, the electrical device is disposed in the silicon substrate and exposed to the second surface of the silicon substrate, the through via is formed in the silicon substrate, the through via comprises a barrier layer and a conductor, the through via has a first end and a second end, and the second end connects the electrical device; (b) removing a part of the silicon substrate from the first surface of the silicon substrate so as to protrude the first end of the through via, wherein a top surface of the barrier layer is substantially coplanar with a top surface of the conductor; (c) forming a passivation layer so as to cover the protruded first end of the through via, wherein the passivation layer has a planar top surface; and (d) removing a part of the passivation layer, so that the first end of the through via is exposed to the surface of the passivation layer and is coplanar with the top surface of the passivation layer.