Patent ID: 7052990

Claim:
A method of manufacturing a semiconductor device resistant to conductive metal migration, the method comprising: providing a workpiece; depositing a low-dielectric constant material over the workpiece, the low-dielectric constant material comprising a plurality of pores, each pore having an inner surface; removing a portion of the low-dielectric constant material to form a pattern in the low-dielectric constant material, exposing the inner surface of at least one pore having a diameter of between about 10 nm and 20 nm along a sidewall of the patterned low-dielectric constant material; atomic layer depositing an oxide layer having a thickness of between about 20 Å and 200 Å over the low-dielectric constant material sidewalls, the oxide layer lining but not filling the inner surface of the exposed at least one pore; and depositing a conductive metal within the patterned low-dielectric constant material including within the inner surface of the exposed at least one pore.