Patent ID: 7647532

Claim:
A trace controller for tracing on a microprocessor, wherein the trace controller associates trace information during instruction execution with trace information after instruction execution according to identification information identifying one of a plurality of load buffers used for execution of a load instruction in the microprocessor, and wherein the trace controller comprises: a data access information detection section receiving data access information during load instruction execution in the microprocessor and first identification information identifying one of the plurality of load buffers to store the data access information during load instruction execution from the microprocessor and generating trace control information based on the received data access information; a plurality of control information buffers storing the trace control information; an input selection section selecting a control information buffer to store the trace control information from the plurality of control information buffers according to the first identification information; and a control section receiving read data information after load instruction execution in the microprocessor and second identification information identifying one of the plurality of load buffers used for load instruction execution from the microprocessor and selecting a control information buffer storing the trace control information from the plurality of control information buffers according to the second identification information.