Patent ID: 7217609

Claim:
A method in the fabrication of an integrated bipolar circuit, particularly an integrated circuit for radio frequency applications, including a lateral PNP transistor, comprising the steps of: providing a p-type doped substrate having an upper surface; forming in said substrate a buried n + -type doped region for a PMOS transistor structure; forming in said substrate an n-type doped region above the buried n + -type doped region; forming field isolation areas around, in a horizontal plane, said n-type doped region; forming a PMOS gate region on said n-type doped region; forming a diffused n + -type doped contact from the upper surface of the substrate to the buried n + -type doped region; said contact being separated from, in a horizontal plane, said n-type doped region; forming a p-type doped polysilicon source region on said n-type doped region; forming a p-type doped source region in said n-type doped region by means of diffusion from said p-type doped polysilicon source region; forming a p-type doped drain region in said n-type doped region; and connecting the PMOS transistor structure to operate as a PNP transistor, wherein the source region is connected to the gate region and constitutes an emitter of the PNP transistor; the drain region constitutes a collector of the PNP transistor; and the n-type doped region constitutes a base of the PNP transistor.