Patent ID: 7528631

Claim:
A logic gate, comprising: a first driver configured to receive at least one input signal, and configured to control a connection between a first power source and a first node of the logic gate in correspondence with the at least one input signal; a second driver coupled to the first node and a second power source, and configured to control a voltage of the first node; a third driver configured to control a connection between an output terminal and the first power source in correspondence with the voltage of the first node; a control transistor configured to control a connection between the third driver and the second power source; a fourth driver configured to control a connection between a gate electrode of the control transistor and the second power source; and a second capacitor coupled between a first electrode of the control transistor and the gate electrode of the control transistor, wherein: the control transistor and all transistors in the first driver, the second driver, the third driver and the fourth driver are a same type of MOS transistor, the first driver includes a plurality of transistors coupled in series between the first power source and the first node, the transistors being configured to operate in correspondence with a plurality of input signals, and the first driver includes: a first transistor configured to operate in correspondence with a first input signal; a second transistor configured to operate in correspondence with a second input signal; and a third transistor configured to operate in correspondence with a third input signal.