Patent ID: 8161427

Claim:
A logic circuit, comprising interconnected logic elements, said logic elements comprising: a first logic input; a second logic input; a first dedicated logic terminal; a second dedicated logic terminal; a driven-gate p-type transistor, having an outer diffusion connection, a gate connection, and an inner diffusion connection; and a driven-gate n-type transistor, having an outer diffusion connection, a gate connection, and an inner diffusion connection; said first logic input being connected to said gate connection of said driven-gate p-type transistor, said second logic input being connected to said gate connection of said driven-gate n-type transistor, said first dedicated logic terminal being connected to said outer diffusion connection of said driven-gate p-type transistor, said second dedicated logic terminal being connected to said outer diffusion connection of said driven-gate n-type transistor, and said inner diffusion connection of said driven-gate p-type transistor and said inner diffusion connection of said driven-gate n-type transistor being connected to form a common diffusion logic terminal.