Patent ID: 8572472

Claim:
A fault detection apparatus comprising: a memory comprising a comparison-result storing unit; and a processor which executes a comparison unit and a judgment unit; wherein the comparison unit compares polarities of a plurality of redundant input signals, each of which indicates a detection of input to a device from a respective input source, wherein the comparison-result storing unit stores therein a comparison result from the comparison unit for each predetermined sampling cycle, wherein the judgment unit judges whether the plurality of redundant input signals are normal using a plurality of comparison results for a predetermined number of samplings in a time-series order from a latest comparison result among a plurality of comparison results stored in the comparison-result storing unit, and wherein the judgment unit counts number of comparison results showing that all the polarities of the plurality of redundant input signals match with each other among the comparison results for the number of samplings for each sampling cycle, and makes a judgment as normal when the count value is equal to or larger than a predetermined judgment threshold value and abnormal otherwise, and wherein the comparison unit compares the polarities of the redundant input signals to each other.