Patent ID: 7181599

Claim:
A method, in a data processing system, for processing instructions of a computer program, comprising: associating a performance indicator with at least one instruction of a portion of code of the computer program; enabling counting, by a processor, of a number of times instructions of the portion of code of the computer program, having an associated performance indicator, are executed to generate a first count; enabling counting, by a processor, of a number of times there is a cache miss when executing instructions of the portion of code of the computer program having associated performance indicators to generate a second count; determining if a problem condition is present in a cache based on the first count and the second count; wherein if the problem condition is determined to be present, setting a control bit in the processor indicating that a chase tail operation is to be performed with reload operations of a cache; and wherein if the problem condition is determined to be absent, terminating the processing of the at least one instruction.