Patent ID: 7232757

Claim:
A method of fabricating a semiconductor integrated circuit device comprising: (a) forming a first insulating film and second insulating film over a first major surface of a wafer; (b) forming a groove in the second insulating film and a hole in the first insulating film, the hole being connected to a bottom surface of the groove; (c) performing an ammonia plasma treatment to an exposed surface in the groove and hole and a top surface of the second insulating film, (d) forming a barrier metal film over inner surfaces of the groove and the hole and over an upper surface of the second insulating film; (e) forming a copper seed layer over the barrier metal layer inside and outside the groove and the hole by copper sputtering with a copper target having a purity of 99.999% or more; (f) forming a copper film containing copper as its principal component on the copper seed layer inside and outside the groove and the hole by electroplating so as to fill the groove and the hole; (g) removing the barrier metal film, the copper seed layer and the copper film formed on the copper seed layer outside the groove and the hole so as to leave a copper interconnection in the groove and the hole, thereby exposing the second insulating film; (h) performing an ammonia plasma treatment to the exposed surface of the second insulating film and an upper surface of the copper interconnection; and (i) forming an insulating barrier film on the exposed surface of the second insulating film and the upper surface of the copper interconnection by plasma CVD.