Patent ID: 8034679

Claim:
A method comprising: introducing first semiconductor dopant of a first conductivity type into a semiconductor body to define a principal well portion of the first conductivity type for a principal field-effect transistor (“FET”); defining, for the FET, a principal gate electrode above, and vertically separated by principal gate dielectric material from, a segment of the semiconductor body intended to be a principal channel zone of the first conductivity type; introducing first semiconductor dopant of a second conductivity type opposite to the first conductivity type into the semiconductor body to form, for the FET, a pair of principal source/drain (“S/D”) zones of the second conductivity type laterally separated by the channel zone; and performing additional processing to complete fabrication of the FET such that, subsequent to the act of performing additional processing, (a) the semiconductor body has an upper semiconductor surface, (b) the channel zone and the well portion are parts of principal body material which is of the first conductivity type and which extends laterally below the S/D zones, and (c) all semiconductor dopant of the first conductivity type in the semiconductor body has a concentration that decreases by at least a factor of 10 in moving upward to a specified one of the S/D zones from a principal underlying subsurface body-material location which is no more than 10 times deeper below the upper semiconductor surface than the specified S/D zone.