Patent ID: 8194369

Claim:
A semiconductor integrated circuit comprising: an output pad from which an output signal is outputted; an output signal line connected with said output pad; a first pad configured to function as a ground terminal or a power supply terminal; a first wiring connected with said first pad; an output driver connected with said output pad and configured to generate said output signal; an ESD (electrostatic discharge) protection device connected with said output signal line and having a function to discharge surge applied to said output pad; a first trigger MOS (metal-oxide semiconductor) transistor used as a trigger device; a first protection target device connected between said output signal line and a first interconnection; a first resistance element connected between a gate and a source of said first trigger MOS transistor; and a switching device, wherein a current flowing through said first protection target device is detected by use of said first resistance element, wherein said ESD protection device comprises a bipolar transistor, wherein said first pad comprises a VSS pad configured to function as a ground terminal, wherein said first interconnection comprises a ground interconnection, and wherein said switching device is connected between said ground interconnection and a base of said bipolar transistor, and is turned on or off in response to the voltage generated in said first resistance element.