Patent ID: 8572309

Claim:
A system, comprising: a first memory configured to store first metadata to associate logical addresses with physical addresses; a second memory having the physical addresses, wherein the second memory is configured to store first data based on the physical addresses of the second memory, and store portions of the first metadata i) in response to a status of a predetermined group of the physical addresses being changed, and ii) regardless of whether the system is being powered down; and a recovery module configured to, in response to a determination that the system was powered down improperly, update the first metadata stored in the first memory based on the portions of the first metadata stored in the second memory, wherein the first metadata includes a first lookup table to associate the logical addresses with the physical addresses of the second memory, wherein the first metadata includes a second lookup table to associate the physical addresses of the second memory with the logical addresses, wherein the predetermined group of the physical addresses is a wide erase block unit (WERU), wherein the first metadata includes identifiers for a plurality of WERUs, and wherein the identifiers correspond to respective bins, and wherein the first metadata includes an activity log to indicate when a first identifier for one of the plurality of WERUs is changed.