Patent ID: 7129776

Claim:
A bias voltage generator circuit for supplying a constant voltage comprising: a first p-channel field effect transistor having a source connected to a power source potential and a drain connected to a first resistor; a second p-channel field effect transistor having a source connected to the power source potential and a gate connected to a gate of said first p-channel field effect transistor; a third p-channel field effect transistor having a source connected to the power source potential, a gate and a drain connected to the gate; said first and second p-channel field effect transistors connected, in a current mirror, to a potential at a connecting portion of the gate and drain of said third p-channel field effect transistor; a first n-channel field effect transistor having a source connected to a ground (GND), a gate, and a drain, the gate and drain connected through a second resistor to one end of the first resistor opposite the other end thereof connected to said first p-channel field effect transistor; a second n-channel field effect transistor having a source connected to GND and a drain connected to a node of the first and second resistors through third and fourth resistors connected in series; a third n-channel field effect transistor having a source connected to GND, a drain, and a gate, the drain and gate connected to a gate of said second n-channel field effect transistor and to a drain of said second p-channel field effect transistor; and a fourth n-channel field effect transistor having a source connected to GND, a gate connected to a node of the third and fourth resistors, and a drain connected to the drain of said third p-channel field effect transistor.