Patent ID: 7863917

Claim:
A semiconductor chip comprising: a plurality of pads on a peripheral region of the semiconductor chip and configured to apply an external electric signal to circuits in the semiconductor chip; a line structure along the peripheral region of the semiconductor chip between the plurality of pads and the peripheral region of the semiconductor chip, the line structure configured to inspect a crack and having a continuous structure, wherein the line structure forms a rectangular shape enclosing in its entirety the plurality of pads; a first pad of the plurality of pads on one end portion of the line structure; a second pad of the plurality of pads on another end portion of the line structure; and an inspection device activated during a crack test mode to electrically connect the first pad, the line structure and the second pad, wherein the first and second pads are configured to receive a test signal in the crack test mode and a signal driving the semiconductor chip in a normal mode, and the inspection device is configured to detect the test signal propagating through the line structure from the first pad to the second pad in the crack test mode.