Patent ID: 8160244

Claim:
A security processing system comprising: at least one key generator for generating an identity cipher key within an integrated circuit; at least one data memory within the integrated circuit for storing the identity cipher key; at least one processor configured to: receive, in response to a need for a usage cipher key, in a stateless hardware security module of the integrated circuit, both an encrypted usage cipher key and a policy including conditions related to the use of the usage cipher key; decrypt the encrypted usage cipher key using the identity cipher key to obtain the usage cipher key; store the usage cipher key in the at least one data memory; use the usage cipher key to cryptographically process data; and enforce the received policy; a low frequency protection circuit coupled to the at least one processor, wherein the low frequency protection circuit is configured to detect and take corrective action when the operating frequency of the stateless hardware module falls below a predefined threshold; and an operating point protection circuit coupled to the at least one processor, wherein the operating point protection circuit is configured to: monitor a clock of the stateless hardware module, and detect violations of a timing path in the stateless hardware module.