Patent ID: 8683426

Claim:
A non-transitory computer-readable medium storing computer-executable instructions, the instructions comprising: one or more instructions which, when executed by a processor, cause the processor to: provide a block, of a simulatable block diagram model, that is initialized upon an introduction of first power to the provided block; store an internal, nonvolatile state of the provided block; remove the first power to the provided block, the first power being applied to the provided block at a first time; suspend, based on the removed power to the provided block, a modeling of the provided block; preserve, based on the suspension of the modeling of the provided block, the internal, nonvolatile state of the provided block; apply second power to the provided block, the second power being applied to the provided block at a second time, the second time occurring after the first time; resume, based on the application of the second power, the modeling of the provided block; and initialize, based on resuming the modeling of the provided block, an internal state of the provided block, the one or more instructions to initialize the internal state of the provided block including: one or more instructions to initialize the internal state of the provided block using the preserved internal, nonvolatile state of the provided block.