Patent ID: 8073670

Claim:
A method for calculating a delay time by a computer system, comprising: acquiring, from a data library stored in a memory, a data set which is a collection of time information corresponding to a fragmentary parameter set, which is a combination of parameters that have delay time characteristics in each circuit use condition, and put together for each of a plurality of circuit cells constituting a circuit block, each circuit use condition specifying an operation range of the circuit block; extracting either one of a minimum delay time or a maximum delay time from the data set acquired for each of the circuit cells; calculating a minimum block delay time of the circuit block by summing up the minimum delay time extracted for each of the circuit cells by the extracting or a maximum block delay time of the circuit block by summing up the maximum delay time extracted for each of the circuit cells by the extracting; and designing the circuit block in accordance with the calculated circuit block delay time.