Patent ID: 7842572

Claim:
A method of manufacturing a local recess channel transistor in a semiconductor device, the method comprising: forming a local channel impurity doped region in a semiconductor substrate by doping the substrate with a channel impurity; forming a recess trench in the substrate that exposes a portion of the local channel impurity doped region; forming a threshold voltage (V th ) adjusting impurity doped region inside the local channel impurity doped region by doping a portion of the substrate along a bottom portion of the recess trench with a threshold voltage impurity; forming a gate insulating layer on the substrate in the recess trench; forming a gate electrode layer on the gate insulating layer in the recess trench; forming a gate from the gate insulating layer and the gate electrode layer; and expanding width of a lower portion of the recess trench after forming the V th adjusting impurity doped region inside the local channel impurity doped region and before forming a gate insulating layer on the substrate in the recess trench.