Patent ID: 7190028

Claim:
A semiconductor-on-insulator construction, comprising: a substrate; an insulator layer over the substrate; a first crystalline layer comprising silicon and germanium over the insulator layer; a transistor device supported by the first crystalline layer, the transistor device comprising a gate and an active region proximate the gate; the active region including a channel region and a pair of source/drain regions; at least a portion of the active region being within the first crystalline layer; an entirety of the active region within the first crystalline layer being within a single crystal of the first crystalline layer; and a resistor in electrical connection with one of the source/drain regions; the resistor comprising a second crystalline layer and a third crystalline layer over the second crystalline layer; the third crystalline layer having a different composition than the second crystalline layer; the third crystalline layer comprising doped silicon/germanium and the second crystalline layer consisting of doped silicon.