Patent ID: 7105873

Claim:
A semiconductor device, including a plurality of first wirings disposed in parallel to each other in first direction; and a plurality of second wirings disposed in second direction so as to cross said first direction, wherein a contact is provided at one end of each of said plurality of said first wirings outside of a memory array region, and a contact is provided at one end of said plurality of second wirings outside of said memory array region, and a first pair of wirings of said first wirings are terminated differently in length in said first direction at an opposite end of said one end of each of said first wirings and corner tips of said opposite end of each of said first wirings is removed, said first pair of wirings being adjacent wirings, and a second pair of wirings of said second wirings are terminated differently in length in said second direction at an opposite end of said one end of each of said second wirings and a corner tip of said opposite end of each of said second wirings is removed, said second pair of wirings being adjacent wirings.