Patent ID: 8691642

Claim:
A method of fabricating a semiconductor device, the method comprising: forming, at an upper surface of a semiconductor substrate, a first gate structure on a PMOS transistor region of the semiconductor substrate and a second gate structure on a NMOS transistor region of the semiconductor substrate; nitridating the upper surface of the semiconductor substrate having the first and second gate structures thereon to form a first epitaxial blocking layer on first source/drain regions associated with the PMOS transistor region and a second epitaxial blocking layer on second source/drain regions associated with the NMOS transistor region, wherein the nitridating comprises forming plasma in a nitrogen-containing atmosphere and exposing the semiconductor substrate having the first and second gate structures thereon to the plasma; removing the first epitaxial blocking layer; forming a first epitaxial layer on the first source/drain regions of the PMOS transistor region while shielding the second source/drain regions of the NMOS transistor region with the second epitaxial blocking layer; nitridating the upper surface of the first epitaxial layer to form a third epitaxial blocking layer on the first source/drain regions associated with the PMOS transistor region, wherein the nitridating comprises forming plasma in a nitrogen-containing atmosphere and exposing the semiconductor substrate having the first and second gate structures thereon to the plasma; removing the second epitaxial blocking layer; and forming a second epitaxial layer on the second source/drain regions of the NMOS transistor region while shielding the first epitaxial layer with the third epitaxial blocking layer.