Patent ID: 7614024

Claim:
An integrated circuit (IC), comprising: a plurality of conductive layers, wherein the conductive layers further comprise conductive traces regularly spaced according to a set of design rules; a plurality of design rule compliant cuts in the conductive traces operable to divide the conductive traces into active segments and inactive segments, the inactive segments initially operable to be electrically isolated from circuit devices in other layers and to reduce process variation during fabrication of the IC; a plurality of dielectric layers operable to vertically isolate conductive layers; and a plurality of vias in the dielectric layers wherein the vias are operable to initially electrically couple active segments to circuit devices in other layers in order to form electrical circuits; wherein electrical circuits having blockages within active segments are operable to be rerouted to inactive segments; wherein the active segments having blockages are electrically isolated from the electrical circuit; and vias in dielectric layers adjacent to the conductive layer electrically couple the previously inactive segments with circuit devices within other layers.