Patent ID: 7671657

Claim:
A voltage level shifter, comprising: a first inverter comprising an input end for receiving an input voltage, an output end, and a power end for receiving a supply voltage; a second inverter comprising an input end coupled to the output end of the first inverter, an output end for outputting an output voltage, and a power end; a first transistor comprising a source for receiving the supply voltage, a drain coupled to the power end of the second inverter, and a gate; a second transistor comprising a source coupled to the drain of the first transistor, a drain coupled to the gate of the first transistor, and a gate coupled to the output end of the first inverter; a third transistor comprising a source coupled to the drain of the first transistor, a drain, and a gate coupled to the drain of the second transistor; a fourth transistor comprising a source coupled to the drain of the third transistor, a drain, and a gate coupled to the output end of the first inverter; a fifth transistor comprising a drain coupled to the gate of the first transistor, a gate coupled to the output end of the first inverter, and a source coupled to the input end of the first inverter; a sixth transistor comprising a drain coupled to the input end of the first inverter, a gate coupled to the output end of the first inverter, and a source coupled to the drain of the fourth transistor; a first capacitor comprising a first end coupled to the source of the fifth transistor and a second end coupled to the drain of the third transistor; and a second capacitor comprising a first end coupled to the drain of the fourth transistor and a second end coupled to the drain of the first transistor.