Patent ID: 8026921

Claim:
Method of operating a driving circuit for a display system, wherein the sequence of writing and/or reading video data into and/or from a memory is controlled by means of an address sequencer, each of the memory addresses for said video data generated in the address sequencer being composed of a picture line address part or line pointer and an address part for a pixel on said picture line, the method comprising: storing a full table of line pointers for different sequences of video data to be displayed in the memory; and operating the driving circuit in an address sequence mode wherein the address sequencer generates addresses for the video data in the memory by combining line pointers that are read out by a line counter from a block of line pointers in address table register means with the output of a pixel counter using an adder, and in a table update mode wherein a block of line pointers from the full table of line pointers that is stored in said memory is downloaded into said address table register means, wherein operating the driving circuit in the table update mode includes: setting a base address of the block of line pointers to zero; reading a line pointer that corresponds to the base address of zero from the memory into the address table register means; and successively increasing the base address by one and reading the corresponding line pointer from the memory into the address table register means until the last line pointer of the block of line pointers is downloaded into the address table register means.