Patent ID: 7257013

Claim:
A method of writing a datum in a memory cell of a conductive bridge random access memory (CBRAM), comprising a plate line, at least three bit lines that are disposed side by side, and at least three memory cells with a programmable metallization cell (PMC) in each of the at least three memory cells, and each of the at least three memory cells is connected to a respective bit line of the at least three bit lines and the plate line, comprising: applying to a selected bit line, that is connected to a selected memory cell, a writing voltage for the selected memory cell to write a datum in the selected memory cell to change the resistance value of a selected PMC of the selected memory cell; applying to a first neighboring bit line of the selected bit line, wherein the first neighboring bit line is connected to a first neighboring memory cell of the selected memory cell, a writing voltage for the first neighboring memory cell so that data are written in the selected and the first neighboring memory cells during the writing operation of the selected memory cell to reduce voltage crosstalk between the selected bit line and the first neighboring bit line; applying to a second neighboring bit line of the selected bit line, wherein the second neighboring bit line is connected to a second neighboring memory cell of the selected memory line, a writing voltage for the second neighboring memory cell, so that data are written in the selected, the first neighboring, and the second neighboring memory cells during the writing operation of the selected memory cell to reduce voltage crosstalk between the selected bit line, the first neighboring bit line, and the second neighboring bit line; wherein the voltage on the plate line is lowered when the writing voltage for the selected memory cell is arisen to increase the voltage drop across the selected PMC and to reduce the resistance value of the selected PMC; and wherein the voltage of the plate line is lowered to ground voltage.