Patent ID: 8356152

Claim:
A method comprising: counting erase cycles for each of a plurality of memory blocks of a non-volatile memory, the counting of erase cycles for each memory block including: incrementing a first count of erase cycles for a physical block address of the memory block, and if the memory block is not a spare memory block, incrementing a second count of erase cycles for a logical block address of the memory block; determining whether the non-volatile memory has uneven wear of memory blocks based at least in part on the counting of the erase cycles of the plurality of memory blocks, wherein wear refers to the usage of the memory blocks of the non-volatile memory; and if the non-volatile memory has uneven wear of memory blocks, then performing swapping of worn block groups; wherein determining whether the non-volatile memory has uneven wear of memory blocks includes comparing a slope of a regression line for the number of erase cycles for each of the memory blocks by physical block address and by logical block address with a slope threshold.