Patent ID: 8130023

Claim:
A system for providing symmetric, efficient bi-directional power flow and power conditioning for high-voltage applications, comprising: a first vertical-channel junction field-effect transistor (VJFET), wherein the first VJFET includes a gate, drain (D 1 ), and source, and has gate-to-drain and gate-to-source built-in potentials; a second VJFET, wherein the second VJFET includes a gate, drain (D 2 ), and source, and has gate-to-drain and gate-to-source built-in potentials and the first VJFET and the second VJFET are connected back-to-back in series so that the first VJFET source and the second VJFET source are shorted together at a common point S; and a gate drive coupled to the first VJFET gate and the second VJFET gate, referenced to the common point S, connected to the drain D 1 of the first VJFET only through internal circuitry of the first VJFET, and connected to the drain D 2 of the second VJFET only through internal circuitry of the second VJFET, wherein the gate drive applies an equal voltage bias (V G ) to both the first VJFET gate and the second VJFET gate and the gate drive is configured to selectively bias V G so that the system allows symmetric current to flow through the first VJFET and the second VJFET in the D 1 to D 2 direction or to flow through the second VJFET and the first VJFET in the D 2 to D 1 direction, wherein the current flowing in the D 1 to D 2 direction is symmetric to the current flowing in the D 2 to D 1 direction, or so that the system blocks voltages applied to D 1 of the first VJFET or D 2 of the second VJFET.