Patent ID: 8194493

Claim:
A method of operation within a memory device, the method comprising: receiving address information and corresponding enable information in association with a memory access request, wherein the address information includes a row address that specifies a row of storage cells within a storage array of the memory device and a column address that specifies a column of storage cells within the row, and wherein the enable information includes first and second enable values that correspond respectively to first and second storage locations within the row of storage cells; selectively transferring data between the first and second storage locations and sense amplifier circuitry according to states of the first and second enable values, including transferring data between the first storage location and the sense amplifier circuitry if the first enable value is in an enable state and transferring data between the second storage location and the sense amplifier circuitry if the second enable value is in the enable state; and wherein the states of the first and second enable values are separately controlled.