Patent ID: 7023031

Claim:
An imaging system comprising: a chip having a sensor array including a plurality of pixels which provide respective signals representative of light incident upon the sensor array; and a programmable non-volatile memory located on the chip to store information associated with the sensor array, said memory including: rows and columns of addressable fuses connected between a respective pair of row and column lines, each row line being connected to a single respective row access transistor; a first column access transistor coupled by a source/drain connection to each respective column line; a second column access transistor coupled by a source/drain connection to each respective column line; and a control circuit arranged and configured to selectively operate said row and first column transistors to provide a voltage at a first level through a respective row access transistor, a respective first column access transistor, and across a selected fuse sufficient to break the link during a programming operation and for selectively operating said row and first column access transistors to provide a voltage of a second level lower than the first level through the respective row access transistor, a respective second column access transistor, and across the selected fuse link during a read operation.