Patent ID: 7332385

Claim:
A method of manufacturing a semiconductor device comprising: forming an amorphous semiconductor film on an insulator; adding a catalytic element to the amorphous semiconductor film; conducting first heat treatment for the amorphous semiconductor film to form a crystalline semiconductor film; etching the crystalline semiconductor film to form at least first and second semiconductor layers; forming a gate insulating film on the first and second semiconductor layers; forming at least first and second gate electrodes over the first and second semiconductor layers, respectively, with the gate insulating film interposed therebetween; adding an n-type impurity element to a source region, a drain region, and a gettering region in the first semiconductor layer and a gettering region in the second semiconductor layer; adding a p-type impurity element to the gettering region in the first semiconductor layer and a source region, a drain region, and the gettering region in the second semiconductor layer; and conducting second heat treatment to move the catalytic element in the first and second semiconductor layers to the gettering regions to which the n-type impurity element and the p-type impurity element are added, wherein the source region and the drain region of the second semiconductor layer include only the p-type impurity element.