Patent ID: 8089094

Claim:
A semiconductor device comprising: a main semiconductor layer of a first conductivity type having a first major surface and a second major surface, the main semiconductor layer comprising an impurity concentration distribution, wherein the impurity concentration distribution in the main semiconductor layer comprises a relatively heavily doped layer and a relatively lightly doped layer shaped with respective stripes and alternately arranged repeatedly in a direction parallel to the first major surface of the main semiconductor layer, and wherein an interval of the impurity concentration distribution in the main semiconductor layer and an interval of arranging a gate electrode structure comprising the gate insulator film and the gate electrode are different from each other; a channel region of a second conductivity type on a side of the first major surface of the main semiconductor layer; an emitter region of the first conductivity type in the channel region; an emitter electrode connected electrically to the emitter region and the channel region; a region of the first conductivity type in the main semiconductor layer, the region of the first conductivity type being in contact with the channel region; a gate insulator film in contact with the channel region between the region of the first conductivity type and the emitter region; a gate electrode in contact with the gate insulator film; a collector layer of the second conductivity type on a side of the second major surface of the main semiconductor layer; a collector electrode connected electrically to the collector layer; and a field stop layer of the first conductivity type between the main semiconductor layer and the collector layer, wherein the field stop layer is doped more heavily than the main semiconductor layer.