Patent ID: 7049225

Claim:
A method for manufacturing a semiconductor device, comprising: forming first spacers on sidewalls of first structures, wherein each one of the first structures comprises; an insulation film pattern formed on a conductive film pattern formed on a semiconductor substrate, wherein the conductive film pattern is formed with a thickness at least four times that of the insulation film pattern; forming a first insulation film to cover the first structures including the first spacers and regions between the first structures; forming first insulation film patterns filling regions between adjacent ones of the first structures by planarizing the first insulation film until upper faces of the first structures are exposed; forming second structures on the first insulation film patterns and on the first structures, wherein each one of the second structures is substantially aligned over at least one of the first structures, such that the second structures expose first portions of the first insulation film patterns, wherein each one of the exposed first portions is spaced from adjacent ones of the first structures by a distance ranging from between about 5 to about 35 percent of a distance separating the adjacent ones of the first structures; and forming openings to expose portions of the semiconductor substrate by etching the first portions of the first insulation film patterns using the second structures and the first spacers as an etching mask.