Patent ID: 7852250

Claim:
A digital to analog converter (DAC) for converting a digital signal with a predetermined number of bits to a corresponding analog signal, the DAC comprising: a first current source element having a first control signal, the first control signal controlling the conduction current provided by the first current source element; a second current source element having a second control signal, the second control signal controlling the conduction current provided by the second current source element; and a current mirror circuit connected to both the first and the second control signals for determining a voltage ratio between the first and the second control signal, the current mirror circuit comprises: a first PMOS transistor (P 1 ) having a gate connected to the first control signal; a second PMOS transistor (P 2 ) having a gate connected to the second control signal; a first NMOS transistor (N 1 ) and a second NMOS transistor (N 2 ) connected in series and coupled to the P 1 to provide a first biasing voltage for the P 1 ; and a third NMOS transistor (N 3 ) and a fourth NMOS transistor (N 4 ) connected in series and coupled to the P 2 to provide a second biasing voltage for the P 2 , wherein a ratio of transistor sizes between a first transistor group comprising P 1 , N 1 , N 2 and a second transistor group comprising P 2 , N 3 , N 4 is adjusted such that the first and the second control signals have different voltages during operation of the DAC.