Patent ID: 7535040

Claim:
An insulated gate semiconductor device, comprising: a first semiconductor region having a first conductivity type; second semiconductor regions having a second conductivity type, formed in one principal surface of said first semiconductor region; third semiconductor regions having the second conductivity type, formed in surface regions of the other principal surface of said first semiconductor region; fourth semiconductor regions having the first conductivity type, formed in surface regions of said third semiconductor regions; a first electrode electrically connected to said fourth semiconductor regions; a control electrode disposed, via an insulating film, on the other principal surface between said first semiconductor region and said fourth semiconductor regions; and a second electrode electrically connected to said second semiconductor regions, wherein said insulated gate semiconductor device comprises; a fifth semiconductor region having the first conductivity type, formed in the one principal surface of said first semiconductor region so as to be adjacent to said second semiconductor regions; and a sixth semiconductor region having the second conductivity type, formed between said fifth semiconductor region and said first semiconductor region, said sixth semiconductor region formed such that at least a part of said fifth semiconductor region contacts said first semiconductor region.