Patent ID: 7065124

Claim:
A VCSEL system comprising: a substrate; a first mirror stack situated on the substrate; an active region situated on the first mirror stack; a second mirror stack situated on the active region; wherein: the first mirror stack comprises a plurality of pairs of AlAs and GaAs layers; at least one interface of first and second interfaces, is situated between each AlAs layer and GaAs layer; the first interface comprises: a ramp increase of Al from GaAs to Al x Ga 1−x As; and a step increase of Al from Al x Ga 1−x As to Al y Ga 1−y As; and the second interface comprises: a step decrease of Al from Al y Ga 1−y A to Al x Ga 1−x As; and a ramp decrease of Al from Al x Ga 1−x As to GaAs; and wherein x ramps to a final value that is ≦0.4 for the first and second interfaces.