Patent ID: 8368180

Claim:
A semiconductor device comprising: a substrate comprising a scribe region; a plurality of conductive layers and dielectric layers over the substrate, the plurality of conductive layers and dielectric layers comprising an upper area and a lower area; and a dummy structure located within the plurality of conductive layers, the dummy structure comprising: a plurality of dummy lines, wherein at least one of the plurality of dummy lines is in the shape of a square with a square extension extending from one corner, each of the plurality of dummy lines being located in a separate conductive layer, a first one of the plurality of dummy lines being located in the upper area and a second one of the first plurality of dummy lines being located in the lower area; and one or more vias connecting individual ones of the plurality of dummy lines to at least one other dummy line in a separate conductive layer; wherein the first one of the plurality of dummy lines has a larger dimension than the second one of the plurality of dummy lines.