Patent ID: 7514362

Claim:
A method for producing an integrated circuit having a memory, comprising: providing a selection transistor having a first terminal and a second terminal, a channel arranged between the first and second terminals, and a control terminal suitable for controlling a conductivity of the channel; and providing a memory element comprising a phase change material and a conductive contact connected to the phase change material and the second terminal of the selection transistor, the conductive contact formed in an opening having a first dimension in a patterning layer, the conductive contact being produced by a method comprising: applying a sacrificial layer made of a material that is different from that of the patterning layer in a predetermined layer thickness on a surface of the patterning layer; applying a resist layer on the resulting surface; lithographically defining an opening having a second dimension in the resist layer, the second dimension being greater than the first dimension; setting an etching angle in a manner dependent on the thickness of the sacrificial layer and the first and second dimensions; etching the sacrificial layer at the etching angle set; etching the patterning layer to produce the opening in the patterning layer; removing the sacrificial layer; and introducing a filling material into the opening produced in the patterning layer.