Patent ID: 6930934

Claim:
A yield enhancement circuit for substituting a redundant circuit for a faulty circuit of an integrated circuit, comprising: a plurality of fault indication devices, wherein each fault indication device is associated with one sub-circuit of the integrated circuit such that one fault indication device is activated to generate a fault signal to express existence of a fault within the faulty circuit of said integrated circuit, additionally each fault indication device that is associated with selected adjacent sub-circuits of the integrated circuit activates the fault signal to express existence of the fault within the faulty circuit of said integrated circuit; a fault detection device in communication with the plurality of fault indication devices to determine the existence of the faulty circuit within the integrated circuit and transmit a redundancy implementation signal upon determination of existence of the faulty circuit; and a plurality of redundancy activation circuits in communication with the fault detection device to receive the redundancy implementation signal, each redundancy activation circuit in communication with one of the fault indication devices and associated with the sub-circuit to which said fault indication device is associated and to which said fault indication device selectively transfers input/output signals of the sub-circuit associated with the fault indication device and its adjacent sub-circuit to a designated path dependent on the expression of the existence of a fault within the integrated circuit.