Patent ID: 7873936

Claim:
A method of quantifying manufacturing complexity of electrical designs, comprising: obtaining an image data representing an electrical circuit wiring design, said electrical circuit wiring design including a plurality of distinctly countable design features; determining a total number of said design features in the image data; generating defects image data representing a plurality of defects associated with said electrical circuit wiring design; combining the image data and the defects image data into a composite image; removing from the composite image, one or more defects that do not touch a design feature in the composite image; determining a total number of features in the composite image; subtracting the total number of features in the composite image from the total number of said design feature in the image data to determine shorting potential quantification; repeating the steps of generating defects image data, combining the image data and the defects image data, removing, determining a total number of features in the composite image and subtracting until one or more predetermined criteria is met; and determining a statistical average of said shorting potential quantification, wherein said steps are performed automatically by a computer processor.