Patent ID: 7035951

Claim:
A method for auto-addressing devices on a multiplexing bus having a master control module and a plurality of slave devices arranged in series, with each slave device having an address register, a bus in and a bus out, an initial content of the address register of each slave device being zero, the method comprising the steps of: a) outputting a bus signal having a high state from said master control module, said bus signal being sequentially passed to said plurality of slave devices in the series, each of said slave devices determining a content of its respective address register and inverting the bus in to an inverted bus out only if said respective address register content is zero; b) updating the address register content with each bus out value for each slave device, respectively; and c) repeating steps a and b until a resulting number of stored bus out values equals log 2 (n), where n is a number of slave devices, at which time an address of each of said slave devices has been determined.