Patent ID: 7321256

Claim:
A circuit for generating a bandgap reference voltage for an integrated circuit (IC) device, the circuit comprising: a bandgap circuit including an op-amp coupled to a resistor network, wherein the bandgap circuit is configured to maintain the bandgap reference voltage at a specified level; a start-up circuit having an output coupled to the resistor network, wherein upon power-on of the device the start-up circuit turns on and provides a start-up current to initialize the bandgap circuit to a valid state, and when the bandgap circuit enters the valid state, the start-up circuit turns off and reduces the start-up current to a negligible level; and a recovery circuit having an output coupled to the resistor network, wherein if the bandgap circuit enters an invalid state, the recovery circuit turns on and provides a recovery current to the bandgap circuit to return the bandgap circuit to the valid state, wherein the recovery current is different from the start-up current, and wherein the start-up circuit comprises: a first PMOS transistor coupled between a voltage supply and a control node, and having a gate to receive the bandgap reference voltage; a first NMOS transistor coupled between the control node and ground potential, and having a gate to receive the bandgap reference voltage; and a source-follower circuit coupled between the voltage supply and the resistor network and having a control terminal coupled to the control node.