Patent ID: 7811745

Claim:
A method of manufacturing a semiconductor device, comprising: forming a plurality of dummy line patterns arranged at a first pitch on an underlying region, the dummy line patterns having long sides and short sides; forming first mask patterns having predetermined mask portions formed on the long sides of the dummy line patterns, each of the first mask patterns having a closed-loop shape and surrounding each of the dummy line patterns; removing the dummy line patterns to form preliminary trenches, the preliminary trenches having long sides and short sides corresponding to the long sides and the short sides of the dummy line patterns; forming a second mask pattern having a first pattern portion which covers end portions of the first mask patterns, inter-end portions each located between adjacent ones of the end portions, and the short sides of the preliminary trenches; etching the underlying region using the first mask patterns and the second mask pattern as a mask to form trenches each located between adjacent ones of the predetermined mask portions; and filling the trenches with a predetermined material.