Patent ID: 8321849

Claim:
A method for defining a parallel processing operation, the method comprising: providing first program code defining a sequence of operations to be performed for each of a plurality of virtual threads in an array of cooperating virtual threads; compiling the first program code into a virtual thread program defining a sequence of per-thread instructions to be executed for a representative virtual thread of the plurality of virtual threads, the sequence of per-thread instructions including at least one instruction that defines a cooperative behavior between the representative virtual thread and one or more other virtual threads of the plurality of virtual threads, wherein the sequence of per-thread instructions is executable on a virtual parallel architecture that is defined to represent a parallel processor and a plurality of associated memory spaces, the represented parallel processor including a plurality of concurrently operating virtual processing engines, each virtual processing engine being capable of executing one virtual thread of the array of cooperating virtual threads, the number of virtual processing engines being at least as large as the number of virtual threads in the array of cooperating virtual threads, the associated memory spaces including a plurality of virtual special registers that are readable but not writeable by the virtual processing engines, the virtual special registers including a plurality of virtual thread-ID registers, each virtual thread-ID register being readable by a different one of the virtual processing engines and usable to store a unique thread identifier for the virtual thread executing on that virtual processing engine, the virtual special registers further including one or more virtual dimension registers to store dimensions of the array of cooperating virtual threads, each of the virtual dimension registers being readable by all of the virtual processing engines; and storing the virtual thread program.