Patent ID: 7737556

Claim:
An integrated circuit device with improved adhesion to an overlying dielectric layer comprising: a conductive material partially embedded in an opening formed in a dielectric layer; a first barrier layer partially embedded in said opening formed in said dielectric layer, wherein said first barrier layer comprises first portions covering sidewall portions of said conductive material; and a second barrier layer upon only a top portion of said conductive material, said second barrier layer comprising a conductive alloy having an average grain size substantially the same or greater than an average grain size of said first portion of said first barrier layer, said first and second barrier layers encapsulating said conductive material; wherein said conductive material and said first portions of said first barrier layer extend to a predetermined height above an upper surface of said dielectric layer to form a first partially embedded damascene, said predetermined height not less than about 0.63 times the thickness of said first portion of said first barrier layer; and, a second partially embedded damascene having a larger width than said first partially embedded damascene at least partially upon said first partially embedded damascene to form a dual damascene.