Patent ID: 7647483

Claim:
In a cell processor having one or more central processors and a plurality of synergistic processing elements (SPE), each SPE in the plurality comprising a synergistic processor unit and a local memory, a method for implementing multiple contexts on one or more SPE in the plurality, the method comprising: storing code and/or data for a first context in a first region of the local memory of a first SPE of the plurality; storing code and/or data for a second context in a second region of the local memory of the SPE while the code and/or data for first context is resident in the local memory of the first SPE; executing the first context with the SPE while the second context waits; and either a) transferring the code and/or data for the first context from the first region to the second region and transferring the code and/or data for the second context from the second region to the first region, and executing the second context with the SPE during a pause or stoppage of execution of the first context; or b) transferring the code and/or data for the second context to a local memory of a second SPE of the plurality; or both a) and b).