Patent ID: 8050043

Claim:
A printed circuit board, comprising: a plurality of slots sequentially formed on a predetermined location on the printed circuit board, and connected to controller terminals through a plurality of wires, each slot being constructed so that a memory module in which at least one memory device capable of receiving 2 k pieces of data in parallel can be mounted can be inserted into the slot; and the controller terminals for transmitting or receiving data to or from a processor in parallel, the controller terminals being constructed so that 2 k controller terminals are arranged for a single memory device mounted in the memory module, wherein a slot disposed in a first location with respect to the controller terminals has 2 k module terminals, which are connected to the controller terminals in a point-to-point manner and are sequentially arranged, wherein each of slots disposed in locations ranging from a (2 n−1 +1)th location (where n is a natural number equal to or less than k) to a 2 n th location with respect to the controller terminals is connected in a point-to-point manner to module terminals of a corresponding one of slots ranging from the slot disposed in the first location to a slot disposed in a 2 n−1 th location in a point-to-point manner, and each of the slots includes 2 k−n module terminals, wherein the 2 k−n module terminals are sequentially arranged, and wherein each of the module terminals can provide data to a single memory device mounted in a memory module inserted into each slot, wherein module terminals of each of slots disposed in locations ranging from the (2 n−1 +1)th location to the 2 n th location are electrically connected to (2 k−n +1)th to 2 k−n+1 th module terminals of a corresponding slot.