Patent ID: 7268639

Claim:
A pulse width modulation circuit comprises: an output signal generation means for setting an output signal to “low” level when a logical level of oscillation signal at a first input terminal changes from “low” to “high” level, for resetting the output signal to “low” level in response to an effective input signal at a second terminal; a charge and discharge means for charging a first node (node 1 ) coupled to a capacitor C 0 when the output signal OUT stays in “low” level and for discharging the stored charge of the first node when the output signal OUT stays in “high” level; a comparing means for outputting an output signal to the second input terminal according to the level of the first node signal and the level of a reference voltage level(Vref 0 ); and a discharge current controlling means for controlling the stored charge on the first node, wherein the discharge current controlling means comprises a constant current outputting means for controlling the discharge current based on constant current.