Patent ID: 7426599

Claim:
A method for writing data using a First-In First-Out (“FIFO”) interface within transmitter side circuitry contained entirely within a first single ASIC device, said method comprising receiving a data packet at an input of said FIFO interface from a first writer interface of a packet router contained entirely within said first single ASIC device; and then writing said data packet from an output of said FIFO interface back to said input of said FIFO interface; wherein each of said FIFO interface, said input of said FIFO interface, and said output of said FIFO interface are contained within said transmitter side circuitry; wherein said packet router determines a destination of said data packet from a routing code contained within a header of said data packet and transmits said data packet from said first writer interface of said packet router to said input of said FIFO interface based on said destination determined from said routing code; and wherein said packet router has multiple reader interfaces configured as packet sources and multiple writer interfaces configured as packet destinations and said packet router determines a packet destination for a given data packet from a routing code contained in a header of said given data packet.