Patent ID: 7683720

Claim:
A folded cascode amplifier circuit comprising: a first order high-pass filter coupled to a first bias voltage, a first input signal and a second input signal, the first input signal and the second input signal defining a differential input signal and the first order high-pass filter arranged to establish a first bias output and a second bias output; a full-spectrum content amplifier coupled between the first input signal, the second input signal and a current source, the full-spectrum content amplifier arranged to amplify the differential input signal and to output an amplified differential input signal; a high-frequency content amplifier comprising a first transistor having a control terminal coupled to the first bias output of the first order high-pass filter, a first terminal coupled to ground and a second terminal coupled to the output of the full-spectrum content amplifier and a second transistor having a control terminal coupled to the second bias output of the first order high-pass filter, a first terminal coupled to ground and a second terminal coupled to the output of the first order high-pass filter, the high-frequency content amplifier arranged to amplify the high-frequency content of the differential input signal and to output an amplified high-frequency component of the differential input signal; a summing circuit comprising a first transistor having a first terminal coupled to the second terminal of the first transistor of the high-frequency content amplifier and a second transistor having a first terminal coupled to the second terminal of the second transistor of the high-frequency content amplifier and a control terminal coupled to a control terminal of the first transistor of the summing circuit, the summing circuit to receive the amplified differential input signal from the full-spectrum content amplifier and to receive the amplified high-frequency component of the differential input signal from the high-frequency content amplifier, the summing circuit to output a summed output current to achieve equalization of the differential input signal; and an output conversion circuit comprising a first input coupled to a second terminal of the first transistor of the summing circuit and a second input coupled to a second terminal of the second transistor of the summing circuit, the output conversion circuit to convert the summed output current from the summing circuit to an output voltage.