Patent ID: 7315591

Claim:
A reproduced signal waveform processing apparatus, comprising: a feedback loop comprising sampling means for sampling a reproduced signal at an interval of a reproducing clock signal generated at a predetermined oscillation frequency; a first equalizer for equalizing a digital reproduced signal obtained by the sampling means; phase frequency control means for detecting a phase error at a frequency between the digital reproduced signal equalized in the first equalizer and the reproducing clock signal, and outputting a control signal in accordance with phase frequency error information between the digital reproduced signal and the reproducing clock signal; oscillation means for varying a oscillation frequency in accordance with an instruction from the phase frequency control means, wherein the feedback loop is a synchronization circuit that functions as a phase locked loop (PLL) for synchronizing frequency phase between the digital reproduced signal and the reproducing clock signal, and wherein the reproduced signal waveform processing apparatus further comprises a second equalizer connected in series with the first equalizer; and a decimation filter provided between the first and the second equalizers for absorbing a difference in operating clocks of the first and the second equalizers, and a frequency divider for dividing the reproducing clock signal in the feedback loop and generating a reproducing clock signal that is supplied to the second equalizer.