Patent ID: 7626215

Claim:
A semiconductor device, comprising: a silicon substrate; a gate insulating film formed on said silicon substrate; a gate electrode formed on said gate insulating film; two first conductivity type impurity diffused layers formed in a surface of said silicon substrate, said impurity diffused layers sandwiching said gate electrode in a plan view and each having a trench formed in a surface thereof; and two first conductivity type semiconductor layers each epitaxially grown from a bottom of the trench, wherein a conductivity type of a region of said silicon substrate immediately below said gate insulating film is a second conductivity type, and each of said first conductivity type semiconductor layers comprises: a first region including a portion located within or lower than a same plane with an interface between said silicon substrate and said gate insulating film; and a second region located closer to a bottom side of the trench than said first region, said second region having a first lattice constant closer to a second lattice constant of silicon than a third lattice constant of said first region; wherein an upper surface of said first region is located higher than the same plane with the interface between said silicon substrate and said gate insulating film, wherein a lower surface of said first region is located lower than the same plane with the interface between said silicon substrate and said gate insulating film, wherein said second region is lattice-matched to said silicon substrate, and wherein said first region is lattice-matched to said second region.