Patent ID: 8275128

Claim:
An arithmetic logical unit for outputting data to be used in checking the final result of an AES unit that encrypts a plain text block into an encrypted text block based on AES operation, comprising: a processor; and an arithmetic unit for computing parity data created based on XOR operation from an encryption key to be used as a key during AES encryption, parity data created based on XOR operation from a plain text block, and an AES operation halfway result output from said AES unit, and outputting a value that is equivalent to parity data created based on XOR operation from the final result of said AES unit; wherein said arithmetic unit includes: a RotWord parity arithmetic unit for performing rotate operation to parity data created based on XOR operation from said encryption key, or parity data created based on XOR operation from an extended key in AES operation of said AES unit so as to rotate said parity data into data units where the lower ¼ area is divided into four segments. and outputting a value that is equivalent to parity data created from output data after RotWord operation in said AES unit; and a SubWord parity arithmetic unit for outputting a value that is equivalent to parity data created from output data after SubWord operation in said AES unit; and wherein said SubWord parity arithmetic unit includes: a SubWord parity creation unit for creating parity data by performing XOR operation to output data after RotWord operation in said AES unit; and a SubWord parity check unit for comparing parity data created based on said SubWord parity creation unit and output data from said RotWord parity arithmetic unit.