Patent ID: 7071747

Claim:
An inverting zipper repeater circuit comprising: a holding subcircuit coupled to receive an input signal and coupled to an output terminal; a delay chain of inverters coupled to receive said input signal; a first pulse generator comprising said delay chain inverters coupled to receive said input signal and for generating a rising output transition at said output terminal; a first latching circuit coupled an output node of said first pulse generator and to said output terminal, wherein said first pulse generator further comprises: a NOR gate with input nodes coupled to receive a signal from said delay chain of inverters and said input signal; and an NFET coupled to an output node of said NOR gate, said NFET coupled to said first latching circuit; a second pulse generator comprising said delay chain of inverters coupled to receive said input signal and for generating a falling output transition at said output terminal; and a second latching circuit coupled an output node of said second pulse generator and to said output terminal.