Patent ID: 7422938

Claim:
A process of fabricating a semiconductor device comprising: providing a semiconductor substrate of a first conductivity type, the substrate not containing an epitaxial layer; forming a first mask on a surface of the substrate, said first mask having a first opening defining a location of a deep layer in a lateral dimension; implanting a dopant of a second conductivity type through the first opening to form the deep layer; forming a second mask on the surface of the substrate, said second mask having a second opening defining a location of a sidewall in the lateral dimension; and performing multiple implants of a dopant of the second conductivity type at differing energies through the second opening so as to form a vertical stack of wells of the second conductivity type, the stack of wells forming the sidewall, the sidewall extending from the deep layer to the surface of the substrate, the deep layer and sidewall together forming an isolation structure; wherein performing multiple implants comprises implanting a first portion of the dopant of second condictivity type at a first energy to form a first well and implanting a second portion of the dopant of second conductivity type at a second energy to form a second well, the first energy being greater than the second energy such that the first well extends to a depth greater than the second well, the energies being selected such that the first and second wells overlap; and wherein the deep layer and the sidewall together enclose an enclosed region of the substrate, the process further comprising forming a first semiconductor device in the enclosed region and a second semiconductor device in the isolation structure.