Patent ID: 8014112

Claim:
An integrated circuit comprising: a substrate of semiconductive material; a first circuit environment made from said substrate, comprising a first pair of power supply terminals to receive a first power supply voltage applicable between said terminals and also comprising an output terminal; a second circuit environment made from said substrate, comprising a second pair of power supply terminals, distinct from said first pair of terminals, to receive a second power supply voltage applicable between terminals of said second pair and also comprising an input terminal electrically coupled with said output terminal; and a resistive device operatively connected between said input and output terminals for protection against electrostatic discharges, wherein said resistive device has a resistance, the value of which is selected so as to increase a time constant of a variation in voltage of said input terminal due to the application to the first circuit environment of an electrostatic discharge voltage of the type simulated in a strength test of the Charged Device Model type.