Patent ID: 7421515

Claim:
A network interface for processing an incoming message sent by a client device to a server, comprising: a First-In-First-Out (FIFO) buffer adapted to receive the incoming message and to assemble the incoming message from a serial to a parallel form; a regular-expression pattern matching circuit connected to the FIFO buffer, the regular-expression pattern matching circuit adapted to, concurrent with the assembly of the incoming message from a serial to a parallel form, recognize a Hypertext Transfer Protocol (HTTP) message header embedded in the incoming message, parse the recognized HTTP message header into a parsed HTTP message header, provide the parsed HTTP message header in a compact form to a CPU and memory in the server, and provide to the CPU and memory in the server the incoming message that cannot be recognized by the regular-expression pattern matching circuit, wherein: the HTTP message header includes a HTTP cookie, and the regular-expression pattern matching circuit is implemented by a technique selected from the group consisting of hardware, software, and a combination thereof; and a logic circuit connected to the FIFO buffer, the logic circuit adapted to provide a response message to the client device based on a content of the recognized HTTP message header.