Patent ID: 7312498

Claim:
A method of manufacturing a nonvolatile semiconductor memory cell, comprising: forming a tunnel insulation film on a semiconductor substrate; forming on the tunnel insulation film a first conductive layer that becomes a floating gate electrode; forming on the first conductive layer an inter-electrode insulation film that includes a first oxidant barrier layer, which suppresses passage of oxidant, an intermediate insulation layer, and a second oxidant barrier layer, which suppresses passage of oxidant; forming on the inter-electrode insulation film a second conductive layer that becomes a control gate electrode; forming a stacked-gate structure by selectively etching the first conductive layer, the second conductive layer and the inter-electrode insulation film; and forming gate side-wall insulation films on side parts of the floating gate electrode by oxidizing or oxynitriding side surfaces of the stacked-gate structure, each of the gate side-wall insulation films having a thickness increasing from the inter-electrode insulation film side toward the tunnel insulation film side, wherein after formation of the gate side-wall insulation films, source/drain diffusion layers are formed by implanting dopant ions in the semiconductor substrate, using the gate side-wall insulation films as a mask.