Patent ID: 8656408

Claim:
A method for scheduling a number of threads selected from active threads in each context switch interval in a multi-threaded/multi-core processor, comprising: for one combination of threads selected from the active threads, determining whether a total expected instruction type power consumption for each instruction type during a next context switch interval equals a complement of an actual instruction type power consumption for each instruction type for a given context switch interval, wherein the expected total instruction type power consumption is determined from a sum of expected power consumptions for each instruction type of an instruction scheduled by each of the active threads of the combination, wherein the complement of the actual instruction type power consumption is based on a maximal power consumption minus the actual instruction type power consumption measured for the given context switch; in response to determining that the total expected instruction type power consumption for each instruction type during a next context switch interval equals a complement of the actual instruction type power consumption for each instruction type for the given context switch interval, determining whether the total expected power consumption for each instruction type is less than a maximal threshold for that instruction type; and in response to determining that the total expected power consumption for each instruction type is less than the maximal threshold for that instruction type, selecting the one combination of threads to be scheduled during the next context switch interval.