Patent ID: 8873315

Claim:
A method of operating a semiconductor memory device configured to divide a threshold voltage distribution of memory cells into first to eighth ranges by first to seventh read voltages, the method comprising: performing a read operation with a fourth read voltage for separating the first to eighth voltages into first to fourth ranges and fifth to eighth ranges; storing data “0” in a latch group coupled to memory cells having threshold voltages higher than the fourth read voltage and outputting the stored data as first encoding data; performing a read operation with a second read voltage for separating the first to fourth ranges into first and second ranges and third and fourth ranges and storing data “0” in a latch group coupled to memory cells having threshold voltages higher than the second read voltage; performing a read operation with a sixth read voltage for separating the fifth to eighth ranges into fifth and sixth ranges and seventh and eighth ranges and storing data “1” in a latch group coupled to memory cells having threshold voltages higher than the sixth read voltage; outputting the data stored in the latch groups as second encoding data; performing a read operation with a first read voltage for separating the first and second ranges into the first range and the second range and storing data “0” in a latch group coupled to memory cells having threshold voltages higher than the first read voltage; performing a read operation with a third read voltage for separating the third and fourth ranges into the third range and the fourth range and storing data “1” in a latch group coupled to memory cells having threshold voltages higher than the third read voltage; performing a read operation with a fifth read voltage for separating the fifth and sixth ranges into the fifth range and the sixth range and storing data “0” in a latch group coupled to memory cells having threshold voltages higher than the fifth read voltage; performing a read operation with a seventh read voltage for separating the seventh and eighth ranges into the seventh range and the eighth range and storing data “1” in a latch group coupled to memory cells having threshold voltages higher than the seventh read voltage; and outputting the data stored in the latch groups as third encoding data.