Patent ID: 6858520

Claim:
A method of manufacturing a MOS semiconductor device, comprising the steps: providing a semiconductor substrate having a silicon oxide film; providing a gate electrode on the semiconductor substrate through the silicon oxide film; disposing a resist mask pattern in contact with the silicon oxide film of the semiconductor substrate, the resist mask pattern having a fully opened pattern portion which permits introduction of impurities therethrough to form an area of higher impurity density and a partially opened pattern portion disposed between the area of higher impurity density and the gate electrode, the partially opened pattern portion having alternating masked portions and portions exposing the silicon oxide film which partly block and partly permit, respectively, the introduction of impurities therethrough to form an area of lower impurity density which partly overlaps with the partially opened pattern portion; and introducing impurities through the resist mask pattern into the semiconductor substrate to form therein the area of higher impurity density beneath the fully opened pattern portion and the area of lower impurity density beneath the partially opened pattern portion.