Patent ID: 8134207

Claim:
A semiconductor device comprising: a silicon support substrate; a silicon oxide layer stacked on said silicon support substrate; a silicon active layer stacked on said silicon oxide layer; and a high-breakdown-voltage MOS transistor provided in a region of said silicon active layer defined by use of dielectric material for isolation extending from a primary surface of said silicon active layer to said silicon oxide layer, wherein said MOS transistor shifts a voltage level of a high voltage gate driving circuit, which supplies a control signal to a gate of a top arm power element, to a high voltage level, and wherein: said MOS transistor includes: drain region implemented by said silicon active layer; a doped region located in said silicon active layer and having a conductivity type opposite to that of said silicon active layer; and a field oxide layer provided between a source electrode and a drain electrode to adjoin at least part of a surface of said silicon active layer, and wherein said doped region is formed in an electrically floating state at a position where said silicon active layer adjoins said field oxide layer and in a doughnut-shaped planar pattern in said drain region, and is overlapped partly with the source electrode.