Patent ID: 8582348

Claim:
A semiconductor device comprising: a potential switching circuit; a first memory cell and a second memory cell adjacent to the first memory cell, each of the first memory cell and the second memory cell comprising: a first transistor, the first transistor being an n-channel transistor; a second transistor, one of a source electrode and a drain electrode of the second transistor being electrically connected to a gate electrode of the first transistor; and a capacitor, one electrode of the capacitor being electrically connected to the gate electrode of the first transistor, a source line electrically connected to one of the source electrode and the drain electrode of the first transistor of each of the first memory cell and the second memory cell, and the potential switching circuit; a first bit line electrically connected to the other of the source electrode and the drain electrode of the first transistor of the first memory cell, and the other of the source electrode and the drain electrode of the second transistor of the first memory cell; a second bit line electrically connected to the other of the source electrode and the drain electrode of the first transistor of the second memory cell, and the other of the source electrode and the drain electrode of the second transistor of the second memory cell; a first word line electrically connected to a gate electrode of the second transistor of each of the first memory cell and the second memory cell; and a second word line electrically connected to another electrode of the capacitor of each of the first memory cell and the second memory cell, wherein a channel formation region of the first transistor of each of the first memory cell and the second memory cell comprises a semiconductor material other than an oxide semiconductor, and wherein a channel formation region of the second transistor of each of the first memory cell and the second memory cell comprises an oxide semiconductor layer.