Patent ID: 8455361

Claim:
A method of fabricating a semiconductor device, comprising: forming a metal contact pad over a substrate; forming a passivation layer over the substrate and over a portion of the metal contact pad; electroless depositing a nickel layer over the metal contact pad and the passivation layer, wherein the nickel layer comprises a non-porous nickel layer and a porous nickel layer, the non-porous nickel layer forming a mechanical bond with the passivation layer creating a nickel/passivation interface of the semiconductor device; electroless depositing a gold layer over the nickel layers maintaining the non-porous nickel layer at a nickel/passivation interface of the semiconductor device, said maintaining comprising: determining a thickness of the gold layer; determining an electroless plating rate and a plating time of the gold layer to reach the determined thickness; determining a thickness of the nickel layer under the gold layer to maintain the non-porous nickel layer at the nickel/passivation interface and prevent the porous nickel layer from reaching the passivation layer at a termination of an electroless gold plating process; and following the determinations, sequentially electroless plating of each of the non-porous nickel layer and the gold layer on the device layer to the determined thicknesses.