Patent ID: 8649206

Claim:
A method of programming a non-volatile storage system, comprising: programming multiple sets of data into different multi-bit memory cells of a plurality of multi-bit memory cells, each set of data includes more than one bit of data, each multi-bit memory cell includes a resistance element in a conductive condition and two or more reversible resistance-switching elements, the resistance element in the conductive condition and the two or more reversible resistance-switching elements are connected to different Y lines, the resistance element in the conductive condition and the two or more reversible resistance-switching elements are connected to a common X line, the common X line is connected to multiple multi-bit memory cells, the different Y lines are connected to multiple multi-bit memory cells, for at least a subset of the multi-bit memory cells the programming comprises applying a selected bias to a selected Y line of the different Y lines such that the selected bias is provided to multiple multi-bit memory cells, applying a bias to the common X line connected to multiple multi-bit memory cells independent of the applying the bias to the selected Y line such that the bias applied to the common X line is provided to multiple multi-bit memory cells, applying an unselected bias to unselected Y lines of the different Y lines to cause a first current to pass from the selected Y line to an unselected Y line though the resistance element in the conductive condition and one of the reversible resistance-switching elements.