Patent ID: 8154325

Claim:
A semiconductor integrated device comprising: a plurality of functional blocks; a reset signal output unit that outputs a reset signal for resetting the plurality of functional blocks; a clock mask circuit that stops a clock signal, the clock signal being supplied to the plurality of functional blocks; and a clock mask control circuit that controls the supply of the clock signal by the clock mask circuit to the plurality of functional blocks, wherein at least one of the functional blocks inputs or outputs a signal with other functional blocks, and the functional blocks are reset when the clock signal and the reset signal are supplied, the reset signal output unit supplies the reset signal to the plurality of functional blocks concurrently with or after the clock signal supply to the plurality of functional blocks is stopped, and the clock mask control circuit sequentially selects one or more of the functional block to reset among the plurality of functional blocks in which the supply of the clock signal is stopped and the reset signal is supplied.