Patent ID: 7105403

Claim:
A method for forming a semiconductor device capacitor, comprising: providing a base dielectric layer; etching said base dielectric layer to form an opening therein, said opening defined by first and second cross-sectional dielectric sidewalls; forming a first conductive cross-sectional spacer on said first dielectric sidewall wherein said first conductive spacer forms a portion of a capacitor top plate; forming a first capacitor cell dielectric layer on said first conductive spacer; forming a second conductive cross-sectional spacer on said first capacitor cell dielectric layer; forming a first conductive layer on said second conductive spacer, wherein said second conductive spacer and said conductive layer each form a portion of a capacitor bottom plate; forming a second cell dielectric layer on said first conductive layer; forming a second conductive layer on said second cell dielectric layer, wherein said second conductive layer forms a portion of said capacitor top plate; and forming a conductive feature which electrically connects said first conductive spacer and said second conductive layer.