Patent ID: 7816222

Claim:
A method for manufacturing a semiconductor device, comprising: forming a first sacrificial insulating film over a semiconductor substrate; forming a supporting layer over the first sacrificial insulating film; forming a second sacrificial insulating film over the supporting layer; etching the second sacrificial insulating film, the supporting layer, and the first sacrificial insulating film to form a bottom electrode region, the bottom electrode region exposing a contact plug formed over the semiconductor substrate; forming a bottom electrode conductive layer over the resulting structure after the bottom electrode region is formed; planarizing the bottom electrode conductive layer to expose the second sacrificial insulating film; forming a third sacrificial insulating film over the resulting structure after planarizing the bottom electrode conductive layer; etching the third sacrificial insulating film, the second sacrificial insulating film, and the supporting layer to form a third sacrificial insulating pattern, a second sacrificial pattern, and a supporting pattern between the bottom electrode and a neighboring bottom electrode; and removing the first, the second, and the third sacrificial insulating patterns to form a bottom electrode.