Patent ID: 7305322

Claim:
A method of using a virtual profile library to determine the profile of an integrated circuit structure, the method comprising: measuring a signal off the structure with a metrology device, the measurement generating a measured signal; comparing the measured signal to a plurality of signals in at least one library, and stopping the comparing if a matching criteria is met; determining a subset of a virtual profile data space associated with the virtual profile library when a matching criteria is not met, wherein the subset is determined using profile data space associated with the at least one library; selecting a virtual profile signal of the subset of the virtual profile data space, wherein a virtual profile shape and/or virtual profile parameters are determined based on the virtual profile signal; calculating a difference between the measured signal and the virtual profile signal; comparing the difference to a virtual profile library creation criteria; identifying the profile of the structure using virtual profile data, which includes the virtual profile shape and/or the virtual profile parameters, associated with the virtual profile signal if the virtual profile library creation criteria is met; and applying a corrective action if the virtual profile library creation criteria is not met; determining a processing difference by comparing the identified profile of the structure to a profile of a required structure; comparing the processing difference to a processing limit; and modifying a process recipe if the processing difference exceeds the processing limit.