Patent ID: 7495286

Claim:
A high-voltage semiconductor device structure, comprising: a substrate; a drain structure, formed on the substrate by two curved structures that are insulatedly adjacent to each other and alternatively arranged, and two first regions, two second regions, and a third region are defined between the two curved structures, wherein the first regions are adjacent to the curved structures, the second regions are adjacent to the first regions, and the third region is located between the two second regions; each of the curved structures comprises a first well, a first doped region, and a drain electrode, wherein the drain electrode is formed on the substrate, the first doped region is formed in the substrate below the drain electrode and connected with the drain electrode, and the first well is formed in the substrate and surrounds the first doped region; a drain extension structure, formed in the substrate, located in the first region, and having a drift extension region adjacent to the first well; a source structure, formed in the substrate, located in the third region, and comprising a second well, at least one second doped region, and a source electrode, wherein the source electrode is formed on the substrate, the at least one second doped region is formed in the substrate below the source electrode and connected with the source electrode, and the second well is formed in the substrate and surrounds the at least one second doped region; and a gate structure, formed on the substrate, located in the second region, and comprising a gate insulation layer and a gate electrode, wherein a field effect channel region is formed below the gate structure.