Patent ID: 7365381

Claim:
A semiconductor device with a light receiving section and a circuit section which are disposed adjacent to each other on a common semiconductor substrate, comprising: an interconnection of the circuit section formed by patterning a metal film laminated on the semiconductor substrate; an interlayer insulating film laminated on the circuit section and the light receiving section after forming the interconnection; and a planarizing pad which is formed in a region between the interconnections prior to laminating the interlayer insulating film, and reduces irregularity on a surface of the interlayer insulating film in the circuit section, wherein the circuit section includes a buffer region adjacent to a boundary between the circuit section and the light receiving section, the buffer region having the planarizing pad arranged thereon so that an area occupation ratio of the interconnection and the planarizing pad on the buffer region is lower than an area occupation ratio thereof on the entire circuit section.