Patent ID: 8700814

Claim:
An apparatus comprising: a first module comprising: at least one bus port configured to couple the first module to a bus; a first configuration port configured to receive an input indicating whether address assignment is enabled or disabled for the first module; a second configuration port configured to provide an output indicating whether address assignment is enabled or disabled for a second module; a memory configured to store a unique address, wherein the unique address is configured to identify the first module; and a controller coupled to a central management unit (CMU) via the bus and configured to receive the unique address from the CMU, determine whether address assignment is enabled for the first module, store the unique address in the memory if address assignment is enabled for the first module, and enable or disable address assignment for a second module based on a message received from the CMU, by setting a configuration state of the first module when the second module is coupled to the second configuration port of the first module, wherein the message is sent from the CMU to the first module to cause the first module to enable or disable address assignment for the second module, and the first module is configured to provide an output on the configuration state of the first module indicating address assignment is enabled or disabled for the second module based on the received message.