Patent ID: 7129743

Claim:
A digital audio system on a chip (SOC) comprises: a processing module; random access memory for storing at least one of a program instruction and data; read only memory for storing at least a portion of a boot algorithm; universal serial bus (USB) interface operable to exchange a file with an external device; an external memory interface operable to interface with a memory that stores at least one of a digital audio file and a digital video file; at least one peripheral component interface; a multimedia module operably coupled for at least one of: providing an audio output from at least one of the digital audio file and the digital video file; providing a video output from the digital video file; receiving an audio input; and receiving a video input; a bus operably coupled to the processing module, the read only memory, the random access memory, the USB interface, the external memory interface, the at least one peripheral component interface, and the multimedia module; and general purpose input/output (GPIO) module operably coupled to the bus, wherein the GPIO module includes a plurality of GPIO cells, wherein a GPIO cell of the plurality of GPIO cells is coupled to a pin of the digital audio SOC, and wherein the GPIO cell functions to: in a first state, pass an output signal from one of the processing module, the USB interface, the external memory interface, the at least one peripheral component interface, and the multimedia module to the pin when an output enable signal is activated; in a second state, pass an alternate output signal from another one of the processing module, the USB interface, the external memory interface, the at least one peripheral component interface, and the multimedia module to the pin when the output enable signal is activated; in a third state, pass the output signal to the pin when an alternate output enable signal is activated; in a fourth state, pass the alternate output signal to the pin when the alternate output enable signal is activated; and when the output enable signal or the alternate output enable signal is deactivated, receive an input signal from the pin.