Patent ID: 7129105

Claim:
A method of manufacturing a thin film transistor array panel for a liquid crystal display, the method comprising: forming a gate wire including a gate line and a gate electrode connected to the gate line; depositing a gate insulating layer; forming a semiconductor layer; forming a data wire including a data line intersecting the gate lines to define a pixel area, a source electrode connected to the data line and placed close to the gate electrode, and a drain electrode placed opposite the source electrode with respect to the gate electrodes; depositing a protective layer covering the gate wire or the data wire; forming an organic insulating layer by spin-coating an organic insulating material on the protective layer; patterning the organic insulating layer to form a first contact hole exposing the protective layer opposite the drain electrode; surface-treating the organic insulating layer by a plasma process using inactive gas; patterning the protective layer to form a second contact hole exposing the drain electrode and located inside the first contact hole; and, forming a pixel electrode electrically connected to the drain electrode through the first and the second contact holes.