Patent ID: 7571395

Claim:
A processor-implemented method for generating a circuit design, comprising: generating, by using a processor, in a memory arrangement respective instances of design blocks in response to user-entered commands that specify creation of the instances; establishing in the memory arrangement matrix-relative positions of the instances of design blocks in response to at least one user-entered command that specifies respective matrix positions of the instances; and generating in the memory arrangement representative connections between the instances in response to a user-entered command having no specification of the connections, wherein each instance of a design block has each input port assigned to a first side and each output port assigned to a second side of the instance of the design block, and wherein the step of generating representative connections includes: for each pair of adjacent rows, establishing representative connections between output ports of instances in a first row of the pair and input ports of a second row of the pair in an order in which the output ports and input ports occupy matrix positions from one end of the pair of rows to an opposite end of the pair of rows, and for each pair of adjacent columns, establishing representative connections between output ports of instances in a first column of the pair and input ports of a second column of the pair in an order in which the output ports and input ports occupy matrix positions, from one end of the pair of columns to an opposite end of the pair of columns; wherein, in response to a number of output ports of a first design block instance in a first row and a first column, being not equal to a number of input ports of a second design block instance in the first row and a second column that is adjacent to the first column, establishing a representative connection between at least one output port of the first design block instance and an input port of a third design block instance in a row other than the first row and in the second column; wherein the commands that specify matrix-relative positions include a first matrix operator that rotates each input port and output port to a different side of an instance of a specified instance of a design block.