Patent ID: 8879320

Claim:
A method of programming multi-level cells (MLC) in a non-volatile memory device, the programming method including least significant bit (LSB) programming followed by most significant bit (MSB) programming, wherein each MLC is capable of being programmed to one of a first state defined by a first threshold voltage distribution, a second state defined by a second threshold voltage distribution greater than the first threshold voltage distribution, third state defined by a third threshold voltage distribution greater than the second threshold voltage distribution, and a fourth state defined by a fourth threshold voltage distribution greater than the third threshold voltage distribution, the method comprising: receiving MSB data information and LSB data information for a plurality of MLC coupled to a current word line within the non-volatile memory; shadow-programming first MLC among the plurality of MLC to a first shadow state based on the LSB data information during LSB programming, wherein a final state following programming for each one of the first MLC is the third state or the fourth state; shadow-programming second MLC among the plurality of MLC to a second shadow state based on the MSB data information, wherein a final state following programming for each one of the second MLC is the second state; and then, main-programming the first MLC from the first shadow state to either the third state or the fourth state and main-programming the second MLC from the second shadow state to the second state during MSB programming.