Patent ID: 6882006

Claim:
A semiconductor device in which flow of a number of carriers is controlled by a voltage applied to a gate, comprising: a substrate having a main surface; a first conductive layer of a first conductivity type provided in the main surface of said substrate; to be a first portion of one of source/drain regions; a first interlayer insulating film provided on said substrate; a gate electrode provided on said first interlayer insulating film and having an upper surface and a lower surface; a second interlayer insulating film provided on said first interlayer insulating film, covering said gate electrode; a contact hole passing through said first interlayer insulating film, said gate electrode and said second interlayer insulating film to expose a part of a surface of said first conductive layer; a silicon thin film in contact with said first conductive film, covering a surface of said contact hole with a gate insulating film interposed between said gate electrode, and having a recessed portion of said contact hole; and an insulating film covering a surface of said silicon thin film and embedded in said contact hole; wherein said silicon thin film includes a channel region of a second conductivity type arranged at a portion opposing to said gate electrode with said gate insulating film interposed, a second conductive layer of the first conductivity type arranged in connection with said first conductive layer from a surface lower than said channel region, and serving as a second portion of one of said source/drain regions, and a third conductive layer arranged from an upper surface of said channel region up to an upper end portion of said contact hole, and serving as the other one of said source/drain regions of the first conductivity type.