Patent ID: 7902868

Claim:
An integrated circuit for a field programmable gate array, comprising: a substrate including active circuitry fabricated in a logic plane and an inter-layer interconnect structure; and at least one memory plane in contact with the substrate and vertically positioned over the substrate, the at least one memory plane including a plurality of non-volatile two-terminal memory elements configured in a two-terminal cross-point array, the inter-layer interconnect structure operative to electrically couple the active circuitry with the plurality of non-volatile two-terminal memory elements, and wherein the active circuitry includes sequencer logic operative to provide sequential memory addresses and write data for data operations on the plurality of non-volatile two-terminal memory elements, interface logic operative to receive the write data, memory logic operative to access the plurality of non-volatile two-terminal memory elements for the data operations, and configurable logic electrically coupled with at least a portion of the plurality of non-volatile two-terminal memory elements and operative to form a plurality of programmable cells configured to implement a programmed logic function.