Patent ID: 8324687

Claim:
A semiconductor device, comprising: a semiconductor substrate; a first layer of a first conductivity type at a surface of the semiconductor substrate and having an impurity concentration higher than an impurity concentration of the semiconductor substrate; a second layer of a second conductivity type at the surface of the semiconductor substrate to be in contact with the first layer and having an impurity concentration higher than the impurity concentration of the semiconductor substrate; a voltage fixation layer of a first conductivity type at the surface of the semiconductor substrate in the first layer and having an impurity concentration higher than the impurity concentration of the first layer; a drain layer of a second conductivity type at the surface of the semiconductor substrate in the second layer and having an impurity concentration higher than the impurity concentration of the second layer; a source layer of a second conductivity type located between and spaced apart from the voltage fixation layer and the drain layer at the surface of the semiconductor substrate in the first layer, and having an impurity concentration higher than the impurity concentration of the first layer; an electric field relaxation layer of a second conductivity type between the drain layer and the first layer in contact with the drain layer and having an impurity concentration lower than the impurity concentration of the drain layer and higher than the impurity concentration of the second layer; a withstanding voltage adjusting layer of the second conductivity type at the surface of the semiconductor substrate between the electric field relaxation layer and source layer; a gate oxide film formed on the surface of the semiconductor substrate in a portion between the electric field relaxation layer and the source layer; and a gate electrode formed on the gate oxide film.