Patent ID: 7949852

Claim:
A memory system, comprising: a plurality of first blocks provided for storing user information, to which first physical addresses which are not duplicated are assigned, respectively; a plurality of second blocks provided for storing first physical addresses of defective blocks among said plurality of first blocks; and an operation device for obtaining a first physical address corresponding to a logical address on the basis of said logical address and information stored in said plurality of second blocks, wherein second physical addresses which are not duplicated are assigned to said plurality of second blocks, respectively, said operation device retrieves a target block out of said plurality of second blocks by using said logical address, obtains a number of normal first blocks positioned before the first physical address of a defective block which is read out from said target block on the basis of the first physical address of the defective block which is read out from said target block and the second physical address of said target block and obtains the first physical address corresponding to said logical address on the basis of said logical address and said number, and said operation device determines whether a candidate block out of said plurality of second blocks is the target block based on subtracting a value of the second physical address assigned to the candidate block from a value of the first physical address stored in the candidate block, and the candidate block is determined to be the target block when the candidate block has a lowest value of a second physical address among the plurality of second blocks for which a number obtained from the subtraction is larger than the logical address.