Patent ID: 8828806

Claim:
A method for fabricating a multilayer semiconductor package comprising the steps of: placing a multilayer semiconductor chip assembly on a circuit board, applying a dam composition to mold a dam around the chip assembly on the circuit board, dispensing an underfill composition between the chip assembly and the dam so as to infiltrate between the circuit board and the chip assembly and between chips of the chip assembly, and curing both the dam composition and the underfill composition, wherein said multilayer semiconductor package is a flip chip or through-silicon-via semiconductor package, and wherein said dam composition comprises (A) 100 parts by weight of an epoxy resin, (B) 1 to 50parts by weight of a curing agent, (C) 30 to 1,000 parts by weight of an inorganic filler having an average particle size of 0.1 to 10 μm and a maximum particle size of up to 75μm, and (D) 1 to 20 parts by weight of a surface-silylated silica having an average particle size of 0.005 μm to less than 0.1 μm, said underfill composition comprises an epoxy resin, an amine curing agent, and silica, and has a viscosity of 10 to 50 Pa-s at 25° C., said dam composition and said underfill composition are cured in conditions of: an initial hot oven cure at 100 to 120° C. for at least 0.5 hour; followed by a subsequent hot oven cure at 150 to 175° C. for at least 2 hours, an initial bond strength between the cured products of the dam composition and the underfill composition is 5.9 to 7.3 MPa, a bond strength between the cured products of the dam composition and the underfill composition after a thermal test over 1000 cycles between −55° C. and 125° C. is 5.7 to 6.8 MPa, and said bond strength after said thermal test is no more than 0.5 MPa lower than said initial bond strength value.