Patent ID: 8589627

Claim:
An apparatus, comprising: a cache comprising: a tag array for storing information indicating a plurality of tags; and a data array for storing a plurality of lines, wherein the cache includes a first non-sectored portion and a second sectored portion, a first portion of the tags having a one-to-one association with a first portion of the lines in the first non-sectored portion and a second portion of the tags having a one-to-many association with a second portion of the lines in the second sectored portion, wherein the cache is operable to employ a common index portion of a physical address for accessing tags associated with the first non-sectored portion and the second sectored portion, the cache is configured to use tag bits and at least one selector bit from the physical address to determine whether a copy of the information stored at the physical address is located in the first portion of the lines, and the cache is configured to use the tag bits to determine whether the copy is located in the second portion of the lines and to use said at least one selector bit to select one of a plurality of lines indicated by the tag bits in response to determining that the copy is located in the second portion.