Patent ID: 7221766

Claim:
An input buffer circuit for a microphone, the input buffer circuit comprising: an input for receiving a voltage signal; an input transistor being operably connected between the input and an output; a biasing circuit including a current limiter being operably connected to the input and the input transistor, the biasing circuit for DC biasing the gate terminal of the input transistor; and, a resistor being operably connected to the input transistor and the output, the resistor and the input transistor cooperating to provide a buffered voltage signal to the output, wherein the biasing circuit includes a pair of anti-parallel diodes being operable connected to the input, and the current limiter comprise a first transistor and a second transistor wherein the first and second transistors cooperate to limit current flowing through the pair of anti-parallel diodes bidirectionally; a parasitic capacitance buffer circuit being operably connected to parasitic diodes associated with isolating the P-wells of one or more transistors in the current limiter.