Patent ID: 8063476

Claim:
A semiconductor device comprising: a substrate including a front surface and a back surface opposite to the front surface; a plurality of bumps formed on the back surface of the substrate; a first semiconductor chip including a first surface, a second surface opposite to the first surface, and a first electrode formed on the first surface, and mounted over the front surface of the substrate such that the second surface of the first semiconductor chip faces the front surface of the substrate; a first bonding wire electrically connecting the first electrode of the first semiconductor chip with an associated one of the bumps; a first resin seal covering the first bonding wire; a second semiconductor chip including a third surface, a fourth surface opposite to the third surface, and a second electrode formed on the third surface, and mounted over the first semiconductor chip such that the fourth surface of the second semiconductor chip faces the first surface of the first semiconductor chip, the first resin seal being interposed between the first semiconductor chip and the second semiconductor chip; a second bonding wire electrically connecting the second electrode of the second semiconductor chip with an associated one of the bumps; and a second resin seal formed on the front surface of the substrate, and covering the first semiconductor chip, the first resin seal, the first semiconductor chip, the second semiconductor chip, and the second wire, wherein a dielectric constant of the first resin seal is higher than a dielectric constant of the second resin seal.