Patent ID: 7436640

Claim:
A booster power management integrated circuit chip, comprising: first and second output pads; a transistor switch coupled between said first and second output pads, and having a gate; and a trigger circuit coupled between said first and second output pads and further coupled to said gate of said transistor switch, said trigger circuit driving said transistor switch to conduct when an instantaneous voltage larger than a trigger voltage level is present between said first and second output pads so as to enable electric current to flow through said transistor switch; wherein said trigger circuit comprises: a first transistor having a gate, a drain coupled to said first output pad, and a source coupled to said gate of said transistor switch; a first capacitor coupled between said first output pad and said gate of said first transistor; and a control switch coupled between said second output pad and said gate of said first transistor; said control switch forming a closed circuit under normal operating conditions for allowing said first capacitor to charge and for preventing said first transistor from conducting; the presence of the instantaneous voltage between said first and second output pads upon occurrence of electrostatic discharge causing said first transistor to conduct, thereby triggering conduction of said transistor switch, in view of inability of the voltage state of said first capacitor to change instantaneously.