Patent ID: 7462929

Claim:
A semiconductor device comprising: a package substrate which has a plurality of electrodes for external connection arrayed over one face and a plurality of bonding pads arranged along the edges of the other face; and a first semiconductor chip and a second semiconductor chip mounted over said other face of said package substrate stacked one over the other and having a plurality of bonding pads along each edge of the face, wherein said first semiconductor chip has a plurality of bonding pads for analog signals, wherein said second semiconductor chip has a plurality of bonding pads for high-voltage signals, and wherein the edges along which said bonding pads for analog signals are arranged and the edges along which said bonding pads for high-voltage signals are arranged are disposed along mutually different edges of the package substrate, wherein said first semiconductor chip is arranged over the package substrate and said second semiconductor chip is arranged over the first semiconductor chip, and wherein first bonding pads of the package substrate to be wire-bonded to the bonding pads of said first semiconductor chip are arranged farther from the edges of said package substrate than second bonding pads of the package substrate to be wire-bonded to the bonding pads of said second semiconductor chip, wherein said first semiconductor chip has an A/D converter circuit for converting analog signals inputted to said bonding pads for analog signals into digital signals and a timing generator circuit for generating timing signals, and wherein said second semiconductor chip has a driver circuit which inputs the timing signals generated by said timing generator circuit and supplies drive signals from said bonding pads for high-voltage signals.