Patent ID: 8298963

Claim:
A manufacturing method of a semiconductor device comprising the steps of: (a) preparing a semiconductor wafer having a main surface, a plurality of device regions formed over the main surface, a dicing region formed between the device regions, and a back surface opposed to the main surface; (b) in the dicing region of the semiconductor wafer, inserting a first dicing blade into the semiconductor wafer from the main surface side to the back surface side of the semiconductor wafer, and forming a dicing groove in the main surface of the semiconductor wafer by causing the first dicing blade to run along the dicing region; (c) after the step (b), inserting a second dicing blade into the dicing groove from the main surface side of the semiconductor wafer, and separating the semiconductor wafer into a plurality of semiconductor chips by causing the second dicing blade to run along the dicing region; (d) disposing the semiconductor chips obtained by performing the step (c) over a chip mounting portion of a chip mounting substrate; (e) after the step (d), electrically coupling the semiconductor chips to the chip mounting substrate, respectively; and (f) sealing the semiconductor chip with a resin, wherein the semiconductor wafer has a base material layer, a semiconductor element layer formed over the base material layer, a first interconnect layer formed over the semiconductor element layer, and a second interconnect layer formed over the first interconnect layer, wherein the dielectric constant of a first insulating layer placed in the first interconnect layer is lower than the dielectric constant of each of a premetal insulating layer formed in the semiconductor element layer and a second insulating layer placed in the second interconnect layer, wherein the first dicing blade used in the step (b) has a circular planar shape, wherein the cross-sectional shape of the first dicing blade at the circumferential portion thereof has a first side face, a second side face having a first side-face angle of inclination relative to the first side face, and a third side face having relative to the first side face a second side-face angle of inclination greater than the first side-face angle of inclination, wherein the width between second boundary points of the second side face and the third side face is smaller than the width between first boundary points of the first side face and the second side face, and wherein in the step (b), the first dicing blade is inserted into the semiconductor wafer such that the second boundary points of the first dicing blade reach the base material layer.