Patent ID: 8610271

Claim:
A chip package, comprising: a substrate having an upper surface and a lower surface, wherein the substrate comprises at least a first contact pad; a non-optical sensor chip disposed overlying the upper surface of the substrate, wherein the non-optical sensor chip comprises at least a second contact pad and has a first length; a protective cap disposed overlying the non-optical sensor chip, wherein the protective cap has a second length, an extending direction of the second length is substantially parallel to an extending direction of the first length, and the second length is shorter than the first length; a spacer structure disposed between the non-optical sensor chip and the protective cap; an IC chip disposed overlying the protective cap, wherein the IC chip comprises at least a third contact pad and has a third length, and an extending direction of the third length is substantially parallel to the extending direction of the first length; and a plurality of bonding wires forming electrical connections between the substrate, the non-optical sensor chip, and the IC chip, wherein the spacer structure defines a space between the protective cap and the non-optical sensor chip, and wherein the protective cap, the spacer structure and the non-optical sensor chip together surround a sealed space.