Patent ID: 8405209

Claim:
A semiconductor device comprising: a wiring board; a semiconductor chip mounted on the wiring board, the semiconductor chip including a bump formation surface; a plurality of first bumps provided within a first region of the bump formation surface, the first bumps being arranged in a first area density; a plurality of second bumps provided within a second region of the bump formation surface, the second bumps being arranged in a second area density; and a plurality of third bumps arranged between the first region and the second region of the bump formation surface, the third bumps including: a first row of the third bumps; a second row of the third bumps, the second row of third bumps being arranged between the first row of third bumps and the first bumps; and a third row of the third bumps, the third now of third bumps being arranged between the first row of third bumps and the second bumps, wherein the third bumps are arranged in a third area density being higher than the second area density and being lower than the first area density.