Patent ID: 6943431

Claim:
A semiconductor device comprising: a semiconductor element formed over a surface of a semiconductor substrate; a first insulating film formed over the surface of the semiconductor substrate, the first insulating film covering the semiconductor element, and a top surface of the first insulating film being planarized; a second insulating film formed over the first insulating film, the second insulating film having a dielectric constant lower than a dielectric constant of the first insulating film; a first wiring pattern formed over the second insulating film; and a conductive connection member buried in the second and first insulating films, the conductive connection member electrically interconnecting the first wiring pattern and the semiconductor element, wherein a surface modifying layer formed by using silane coupler or metal coupler is formed on an upper surface of the second insulating film; the semiconductor device further comprises a third insulating film formed on the surface modifying layer and having a dielectric constant lower than the dielectric constant of the first insulating film; and the first wiring pattern is buried in a trench whose bottom is defined by the surface modifying layer, the trench being formed in the third insulating film.