Patent ID: 8710582

Claim:
A semiconductor device comprising: a semiconductor substrate member with a plurality of pairs of elongated projections formed in an upper surface; an insulating member provided between each pair of the elongated projections and having an upper surface located below an upper end of each elongated projection; a gate electrode provided immediately below the insulating member; a gate insulating film provided between the semiconductor substrate member and the gate electrode; a first electrode connected to the upper surface of the semiconductor substrate member; and a second electrode connected to a lower surface of the semiconductor substrate member, the semiconductor substrate member including: a second semiconductor layer of a first conductivity type connected to the second electrode, a lower end portion of the gate electrode extending into the second semiconductor layer; a base layer of a second conductivity type provided on the second semiconductor layer, the gate electrode penetrating through the base layer; a first semiconductor layer of the first conductivity type constituting each elongated projection and connected to the first electrode; and a carrier ejection layer of the second conductivity type provided immediately below a region of an upper layer portion of the semiconductor substrate member between the pair of the elongated projections, connected to the first electrode, and having a higher effective impurity concentration than the base layer.