Patent ID: 6893954

Claim:
A method of fabricating a semiconductor device including the steps of forming a first inter-layer insulation film on a barrier film on a substrate; forming a second inter-layer insulation film on the first inter-layer insulation film; forming a first hard mask film on the second inter-layer insulation film; forming a second hard mask film different from the first hard mask film on said first hard mask film, comprising: a step of forming a first aperture in the second hard mask film to expose the first hard mask film by using a desired resist pattern formed on the second hard mask film as a mask; a step of forming a second aperture in the exposed first hard mask film by using a desired resist pattern formed on the first and the second hard mask films as a mask; a first removal step of removing the second inter-layer insulation film to form an aperture corresponding to the second aperture in the second inter-layer insulation film by using the first hard mask film as a mask; a second removal step of forming a via hole corresponding to the second aperture in the first inter-layer insulation film and removing the first inter-layer insulation film to expose the barrier film by using the first hard mask film as a mask; a third removal step of removing the first hard mask film and the barrier film exposed in a bottom of the via hole simultaneously by using the second hard mask film as a mask; and a fourth removal step of removing the second inter-layer insulation film to form a wiring groove corresponding to the first aperture in the second inter-layer insulation film by using the second hard mask film as a mask.