Patent ID: 7212442

Claim:
A structure for directly burning a program into a motherboard, comprising: a plurality of low resistance resistors coupled respectively to a power pin of a memory on the motherboard, and connected between the memory and a controller of the memory, wherein remaining pins of the memory except for the power pin, a serial clock pin (SCL), and a serial data pin (SDA), a contact between a first resistor of the plurality of low resistance resistors and the controller, and a contact between a power of the memory and a second resistor of the plurality of low resistance resistors are connected to a ground (GND), the power pin of the memory coupled to the power to provide the memory with a required power in a program burning operation; a burning plate, on which a series connected first transistor set, a third low resistance resistor, a comparator, and a series connected second transistor set are mounted, wherein the first transistor set, the third low resistance resistor, and comparator are connected to a common node, two input terminals of the first transistor set and an output terminal of the comparator are electrically connected to a burner through a connection port to enable the burner to burn the program into the memory through the two input terminals of the first transistor set and to read potentials (low potential and high potential) of the burned program in the memory through the output terminal of the comparator to check accuracy of these potentials, a reference voltage is set on the comparator which is enabled to compare the output potentials (low potential and high potential) of the burned program through the reference voltage, an output terminal of the first transistor set is coupled to the serial data pin through the common node of the memory so that the burned program outputted from the memory is inputted into the comparator through the serial data pin and the common node to perform a potential comparison, at the same time the burner burns the program into the memory through the first transistor set, the common node, and the serial data pin of the memory, the input terminal of the second transistor set is electrically connected to the burner through the connection port, and the output terminal of the second transistor set is coupled to the serial clock pin to enable the burner to transmit a burning signal level and a reading signal level to the serial clock pin of the memory; wherein, when the program is being burned into the memory a burning status of the memory is triggered by using the burner to transmit the burning signal level to the serial clock pin of the memory to enable the burner to burn the program into the memory; and wherein, after the program is burned, a reading status of the memory is triggered by using the burner to transmit the reading signal level to the serial clock pin of the memory, and the first transistor set is turned off to enable the burner to read and compare the program burned in the memory to check whether the burned program is correct or not.