Patent ID: 7208384

Claim:
A transistor manufacturing process comprising: (a) forming an ion-implanting buffer film on an active region of a semiconductor substrate; (b) forming LDD regions in the semiconductor substrate by doping the substrate with impurity ions; (c) forming a photoresist pattern wider than a gate formation region on the ion-implanting buffer film; (d) removing the LDD regions partially using a mask of the photoresist film to expose the semiconductor substrate; (e) forming offset regions at opposite sides of the LDD regions; (f) forming a channel region on the exposed semiconductor substrate through a selective epitaxial growth process; (g) forming a gate insulating film on the semiconductor substrate including the channel region; (h) forming a gate on the gate insulating film, overlapping the channel region; (i) forming gate spacers at both sidewalls of the gate; and (j) forming source and drain regions by implanting conductive impurity ions with a mask of the gate spacers.