Patent ID: 8799606

Claim:
A computer memory subsystem for enhancing signal quality, the computer memory subsystem comprising: one or more memory modules; a memory bus; and a memory controller connected to the memory modules through the memory bus, the memory controller including a reception buffer connected to the memory bus, the reception buffer capable of receiving an input signal from one of the memory modules, the memory controller including a reception characteristics table capable of storing reception characteristics for each of the memory modules connected to the memory controller, the reception characteristics of each memory module comprising a description of a modification by the memory controller of an input signal received from the memory module to correct signal distortion of the input signal introduced by the transmission path between that memory module and the memory controller, the memory controller including an equalizer connected to the reception buffer and the reception characteristics table, the equalizer capable of equalizing the received input signal in dependence upon the reception characteristics for the memory module from which the input signal was received, the memory controller including memory controller logic connected to the equalizer, the memory controller logic capable of processing the equalized input signal; wherein the memory controller includes a transmission characteristics table capable of storing transmission characteristics for each of the memory modules connected to the memory controller; wherein the memory controller logic is capable of generating an output signal for transmission to one of the memory modules; wherein the memory controller includes a pre-emphasizer connected to the memory controller logic and the transmission characteristics table, the pre-emphasizer capable of pre-emphasizing the output signal in dependence upon the transmission characteristics for the memory module for which the output signal is generated for transmission; and wherein the memory controller includes a transmission multiplexer connected to the memory controller logic, the transmission characteristics table, and the pre-emphasizer, the transmission multiplexer capable of receiving from the memory controller logic a memory module identification (MMID) signal that specifies the memory module from which the input signal was received, wherein the MMID signal is based on the memory address for the data being stored in the memory modules.