Patent ID: 8555013

Claim:
A method for memory protection in a multiprocessor system, comprising: receiving, by a first processor carrier directly from a first processor of a plurality of processors of the multiprocessor system, a first request to perform a first memory operation at a first memory address in a first specific region of a random access memory, wherein the first processor carrier is associated with the first processor and the random access memory is shared memory of the plurality of processors in the multiprocessor system, and wherein the first processor is located on a first processor die and the first processor carrier is directly connected to the first processor; determining by the first processor carrier whether the first processor is permitted to access the random access memory at the first memory address using a first carrier identification (ID) of a first memory carrier, wherein the first memory carrier is associated with a first memory controller used to access the first specific region of the random access memory; receiving, by a second processor carrier directly from a second processor of the plurality of processors, a second request at a second processor carrier to perform a second memory operation at a second memory address in a second specific region of the random access memory, wherein the second processor carrier is associated with the second processor, and wherein the second processor is located on a second processor die and the second processor carrier is directly connected to the second processor; determining, by the second processor carrier, whether the second processor is permitted to access the random access memory at the second memory address using a second carrier ID of a second memory carrier, wherein the second memory carrier is associated with a second memory controller used to access the second specific region of the random access memory; sending the first request to the first memory carrier when the first processor is permitted to access the first specific region of the random access memory at the first memory address; and sending the second request to the second memory carrier when the second processor is permitted to access the second specific region of the random access memory at the second memory address, wherein the first processor carrier is operatively connected to each of the first memory carrier, the second processor carrier, and the second memory carrier, and wherein the first memory carrier is operatively connected to each of the second processor carrier and the second memory carrier.