Patent ID: 7639034

Claim:
A flat display apparatus, comprising: a display section integrally formed on a substrate and having a plurality of pixels arranged in a matrix form, each pixel including a signal line and a gate line; a first drive circuit configured to select at least one gate line of a pixel from said plurality of pixels; a second drive circuit configured to drive at least one signal line of said pixel from said plurality of pixels, said first and second drive circuits configured to be operated to display desired images on said display section; and a precharge circuit integrally formed on said substrate, connected to a first external terminal located outside of said substrate, and configured to precharge said at least one signal line of said pixel from said plurality of pixels at a predetermined timing via a signal line-side wiring pattern connecting said at least one signal line of said pixel to said precharge circuit, wherein said pixel from said plurality of pixels includes a capacitor charged at a potential of said at least one signal line upon selection of said at least one gate line, and at least an electrode-side wiring pattern, connected to said capacitor at a side opposite to a signal line-side of said capacitor, is insulated at all times from the signal line-side wiring pattern inside said substrate, and is connected to a second external terminal located outside of said substrate, said second external terminal being connected to said first external terminal.