Patent ID: 7557554

Claim:
A voltage/current control apparatus, comprising: a low-side field effect transistor (FET) having a source, a gate and a drain, wherein the drain of the low-side FET is coupled to ground; a high-side field effect transistor (FET) having a source, a gate and a drain, wherein the drain of the high-side FET is adapted to be coupled to an input voltage source, and wherein the source of the high-side FET and the drain of the low-side FET are electrically coupled at a junction; a gate driver integrated circuit (IC) having a high-side gate driver output electrically coupled to the gate of the high-side FET and a low-side gate driver output electrically coupled to the gate of the low-side FET; a sample and hold circuit configured to sample and store a first input signal proportional to a current through the junction to a load during a portion of a cycle when an “on” voltage is applied to the gate of the low-side FET; and a comparator having an output coupled to an input of the gate driver IC, wherein the comparator is configured to receive as inputs some combination of the first input signal with second, third and fourth input signals, wherein the second input signal is proportional to a desired target voltage, wherein the third input signal is proportional to a current through the junction to a load during a current cycle, wherein the fourth input signal proportional to an output voltage across the load, wherein the comparator is configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”.