Patent ID: 7944825

Claim:
An Asynchronous Transfer Mode (ATM) cell/packet switch, comprising: a user memory configured as an input buffer, the user memory configured to require a periodic refresh; a memory controller configured to execute the periodic refresh of the user memory; a packet generator configured to generate a normality confirmation packet; a selector configured to transfer the normality confirmation packet generated by the packet generator; a processor-communication memory for storing communication data between processors; and a timing generator configured to cause the memory controller to execute a first periodic refresh and cause the selector to transfer the normality confirmation packet during the first periodic refresh, and further configured to cause the memory controller to execute a second periodic refresh and cause the processor-communication memory to perform communication between processors during the second periodic refresh, wherein the selector maintains, in a user band, a band for transferring the normality confirmation packet during a period of the periodic refresh of the user memory for comparison with a returned packet to confirm the normality of the switch.