Patent ID: 7972912

Claim:
A method of fabricating a semiconductor device, comprising: providing an insulation substrate; forming a patterned conductive layer over the insulation substrate, wherein the patterned conductive layer comprises a channel region and a plurality of protruding regions; forming a gate structure layer over the insulation substrate, wherein the gate structure layer covers a part of the patterned conductive layer, and each of the protruding regions has an exposed region; and performing a doping process to dope at least the exposed region of the patterned conductive layer to form a plurality of S/D regions, wherein the S/D regions form a plurality of S/D electrode pairs, at least one of the S/D electrode pairs extends in a first direction and at least two of the S/D electrode pairs extends in a second direction, wherein the first direction is a longitudinal direction of the channel region, and the second direction is a transverse direction of the channel region.