Patent ID: 6861721

Claim:
A semiconductor chip comprising: (a) a semiconductor substrate of a first conductivity type having an active surface having therein an interior active region containing integrated circuitry; (b) a peripheral barrier region of a second conductivity type disposed in the semiconductor substrate adjacent to the active region; (c) a voltage conductor for applying a non-foreword biasing voltage to the barrier region; (d) a plurality of solder bumps disposed on the active surface and electrically coupled to various conductors of integrated circuitry in the active region, respectively, the solder bumps being adapted for attachment to a plurality of conductive pads, respectively, of a mounting substrate; (e) wherein a substantial amount of photon-induced current caused by ambient light impinging on the exposed edges and/or surfaces of the semiconductor substrate is collected by the barrier region and substantially less of the photon-induced current is collected by any of the integrated circuitry.