Patent ID: 7816206

Claim:
A method for fabricating a semiconductor device comprising: forming a first conduction film to be a floating gate over a semiconductor substrate in a first region and in a second region with a first insulation film formed therebetween, the first insulation film having a first etching characteristic different from a second etching characteristic of the semiconductor substrate; removing the first conduction film in the second region; forming a mask over the first conduction film in the first region and over the semiconductor substrate in the second region, the mask having a first opening formed in the first region and a second opening formed in the second region; performing a first etching process etching the first conduction film exposed in the first opening until the first insulation film is exposed in the first opening while etching the semiconductor substrate exposed in the second opening; performing a second etching process etching the first insulation film exposed in the first opening until the semiconductor substrate is exposed in the first opening, while further etching the semiconductor substrate exposed in the second opening, wherein a first etching rate of the first insulation film in the second etching process is lower than a second etching rate of the semiconductor in the second etching process; performing a third etching process etching the semiconductor substrate exposed in the first opening while further etching the semiconductor substrate exposed in the second opening, forming a second insulation film over the semiconductor substrate etched by the first etching process, the second etching process, and the third etching process, forming a control gate over the floating gate with a third insulation film formed therebetween while forming a gate electrode of a transistor over the second region.