Patent ID: 7439780

Claim:
A chopper type comparator, comprising: a first switch for supplying a first voltage to a first node in an analog input period; a second switch for supplying a second voltage to the first node in a comparison period; a capacitor connected between a second node and the first node; an inverter which inverts and amplifies a voltage of the second node and outputs the voltage to a third node, the inverter being configured as a CMOS inverter including a combination of a first p-channel MOS transistor and a first n-channel MOS transistor; a third switch for short-circuiting between the second and the third nodes in the analog input period; a second p-channel MOS transistor which is connected in parallel to the first p-channel MOS transistor in the analog input period, and disconnected from the first p-channel MOS transistor in the comparison period; and a second n-channel MOS transistor which is connected in parallel to the first n-channel MOS transistor in the analog input period, and disconnected from the first n-channel MOS transistor in the comparison period.