Patent ID: 8432954

Claim:
A video processing system, comprising: a video deserializer having an input for receiving a serial data stream containing video data and a serial to pseudo-parallel converter, coupled to the serial data stream, for generating from the serial data stream a plurality of serial data output streams through a plurality of serial output lanes, wherein the video deserializer is configured to convert the serial data stream to a parallel output, perform an operation on the parallel output, and then convert the parallel output to the plurality of serial data output streams; a video serializer having a plurality of inputs for receiving the serial data output streams and a pseudo-parallel to serial converter, coupled to the serial data output streams, for generating a single serial data stream; and a programmable video processing device, coupled to the video deserializer and the video serializer, the programmable processing device having a plurality of interface pins for receiving the plurality of serial data output streams from the deserializer and for transmitting the plurality of serial data output streams to the video serializer.