Patent ID: 7679391

Claim:
A test apparatus for a semiconductor device, wherein the semiconductor device includes: a plurality of function blocks which input/output signals via a main bus, and which execute predetermined signal processing; a plurality of BIST (Built-in Self Test) circuits which are provided in increments of function blocks, and each of which tests the corresponding function block, and generates a test result signal in the form of a digital signal according to the test result; and an interface circuit which is connected to the test apparatus via a test control bus that differs from the main bus, and which receives a control signal output from the test apparatus, and which is configured such that the interface circuit controls the plurality of BIST circuits according to the control signal, and such that the test result signal specified according to the control signal can be read out via the test control bus by the test apparatus, and wherein the test apparatus includes: a test unit which transmits/receives signals to/from the semiconductor device via the main bus, and which instructs at least one of the function blocks to execute the predetermined signal processing; and a control unit which generates a first control signal for individually controlling the plurality of BIST circuits included within the semiconductor device, and a second control signal for reading out the test result signal generated by the BIST circuit from the interface circuit included within the semiconductor device, and which supplies the first control signal and the second control signal to the semiconductor device via the test control bus.