Patent ID: 8451643

Claim:
A memory system comprising: a nonvolatile semiconductor memory device, comprising: a memory cell array including a plurality of memory blocks and comprising a plurality of nonvolatile memory cells including a target memory cell; and an input/output (I/O) circuit comprising: a writing driver commonly connected to the memory blocks to selectively write data in the memory blocks and configured to apply a program current to the target memory cell during a write operation in order to write data to the target memory cell; and a sense amplifier commonly connected to the memory blocks to receive read data from the memory blocks and configured to store read data retrieved during a read operation directed to the target memory cell; and a controller configured to count a number of consecutive read operations applied to the target memory cell and provide a rewriting signal to the I/O circuit when the counted number of consecutive read operations reaches a defined read operation threshold, wherein the applied rewriting signal causes a data rewriting operation to be executed in the nonvolatile semiconductor memory device rewriting the data to the target memory cell, wherein during the data rewriting operation the writing driver sequentially rewrites read data passed from the sense amplifier in response to the rewriting signal.