Patent ID: 6951811

Claim:
A method of production of a semiconductor device comprising forming vias and other conductor parts on an electrode terminal forming surface of a semiconductor wafer, that are electrically connected with electrode terminals, and dicing the semiconductor wafer into individual semiconductor chips to form chip size semiconductor devices, comprising the steps of: electrolessly plating said electrode terminals to cover the surfaces of the electrode terminals by a protective film protecting the electrode terminals from laser beams, grinding the back side of the semiconductor wafer to reduce the thickness of the semiconductor wafer before or after forming the protective film, covering the entirety of the electrode terminal forming surface and back side of the semiconductor wafer, having the electrode terminals covered by a protective film and processed to reduce the thickness of the semiconductor wafer, by a resin to form a laminate, and focusing a laser beam toward the electrode terminal forming surface of the semiconductor wafer from outside the laminate to form via holes with said protective film exposed at their bottom surfaces, then filling said via holes by electroplating to form said conductor parts.