Patent ID: 7401302

Claim:
A semiconductor circuit on a multi-project wafer, the circuit comprising: one or more standard modules with verified functions; one reconfigurable memory module and a plurality of reconfigurable logic modules; and one or more metal and interlayer connection layers for programming the one reconfigurable memory module and the plurality of reconfigurable logic modules by making connections in the one or more metal and interlayer connection layers and connecting the standard modules with the programmed reconfigurable modules according to a predetermined design, wherein the standard modules and the one reconfigurable memory module and the plurality of reconfigurable logic modules are connected and programmed by the one or more metal and interlayer connection layers for customization, wherein the standard modules are standard validated functional modules from various vendors to provide a functionality needed to meet custom circuit functional requirements, wherein the one or more metal and interlayer connection layers include metal lines and interlayer connections formed in at least the last metal processes of a manufacturing flow.