Patent ID: 7046051

Claim:
A method of switching a power semiconductor, wherein during a switching operation of said power semiconductor, a) a voltage (U CE ; U DS ) across said power semiconductor as well as a current (I C ; I D ) flowing through said power semiconductor are measured, b) a time function (dU CE /dt; dU DS /dt) of said voltage (U CE ; U DS ) as well as a time function (dI C /dt; dI D /dt) of said current (I C ; I D ) are controlled, and c) said control of said voltage time function (dU CE /dt; dU DS /dt) and said control of said current time function (dI C /dt; dI D /dt) are effected essentially one after the other, wherein, further, d) for controlling said voltage time function (dU CE /dt; dU DS )/dt), a first signal (I soll ) corresponding to a desired value ([dU CE /dt]; [dU DS /dt]) of said voltage time function (dU CE /dt; dU DS /dt) and a second signal (I ist ) corresponding to an actual value (dU CE /dt; dU DS /dt) of said voltage time function (dU CE /dt; dU DS /dt) are generated, said first signal (I soll ) and said second signal (I ist ) are subtracted one from the other, a first difference signal (I ist −I soll ) between said first and said second signals (I ist , I soll ) is converted into a first control signal (ΔU dU ), and e) for controlling said current time function (dI C /dt; dI D /dt), a third signal (I soll ) corresponding to a desired value ([dI C /dt]; [dI D /dt]) of said current time function (dI C /dt; dI D /dt) and a fourth signal (I ist ) corresponding to an actual value (dI C /dt; dI D /dt) of said current time function (dI C /dt; dI D /dt) are generated, said third signal (I soll ) and said fourth signal (I ist ) are subtracted one from the other, a second difference signal (I ist −I soll ) between said third and said fourth signals (I ist , I soll ) is converted into a second control signal (ΔI dI ).