Patent ID: 7337443

Claim:
A method comprising: identifying a program image; generating a basic block flow graph associated with the program image; benchmarking execution of the program image; annotating the basic block flow graph with results from benchmarking execution of the program image, wherein the annotating comprises one or more of a plurality of items of information, wherein the plurality of items of information comprises: a number of times each basic block was entered; and a percentage of times the program image exited each basic block using each alternate exit path; creating a plurality of bins, wherein each bin is sized by approximating a size of a processor cache; placing, based the annotation of at least a frequency for traversing each transition leaving a particular basic block, each of the basic blocks from the basic block flow graph into one of the plurality of bins; adding a plurality of scheduling points to the program image, wherein each scheduling point will trigger a call to a drafting scheduler, the call identifying a target basic block; and generating a scheduling table representing the program image containing a plurality of scheduling points, wherein the scheduling table transforms the data describing the target basic block at a scheduling point into a representation of the bin containing the target basic block and an entry point for the target bin.