Patent ID: 7296106

Claim:
A computer system comprising: a plurality of processor circuit boards each including at least one processor; a plurality of memory circuit boards each including memory accessible by each of said at least one processor of each of said plurality of processor circuit boards; and a plurality of switch circuit boards each including a plurality of detachable connectors for directly mating each of said plurality of switch circuit boards to each of said plurality of processor circuit boards and to each of said plurality of memory circuit boards, wherein each switch circuit board of said plurality of switch circuit boards conveys a respective portion of memory access information; and at least one additional switch circuit board that is separate from said plurality of switch circuit boards, wherein said additional switch circuit board is coupled between said plurality of processor circuit boards and said plurality of memory circuit boards, and configured to, during operation, convey only redundant memory access information that is based upon the respective portion of memory access information conveyed by each of said plurality of switch circuit boards, such that, in response to removal of any one of said plurality of switch circuit boards said respective portion of memory access information conveyed by said removed switch circuit board is logically reconstructed, using an exclusive-OR function, from said redundant memory access information and remaining respective portions of memory access information.