Patent ID: 8743555

Claim:
A method of suppressing noise in at least one of a first power plane and a second power plane of a substrate, the method comprising forming a noise suppression structure between the first power plane and the second power plane, forming the noise suppression structure comprising: forming a first power plane extension extending from the first power plane generally toward the second power plane; and forming a second power plane extension extending from the second power plane generally toward the first power plane, the second power plane extension being separated from the first power plane extension by a distance that is less than the distance separating the second power plane from the first power plane; configuring the first power plane extension and the second power plane extension of the noise suppression structure to: extend parallel to one another at least substantially continuously along a path traversing the first power plane and the second power plane in a direction that is parallel to the first power plane and the second power plane, and at least partially surrounding a first region of the substrate; and suppress electrical waves propagating through at least one of the first power plane and the second power plane between the first region of the substrate and a second region of the substrate laterally separated from the first region of the substrate; and structurally and electrically coupling at least one semiconductor device to the first region of the substrate.