Patent ID: 7395376

Claim:
A computer implemented method for reducing the number of unnecessarily broadcast local requests to reduce access latency when accessing data from remote nodes in an SMP computer system, said method comprising: defining a shared invalid cache coherency protocol state that predicts whether a memory read request to read a cache line of particular shared data can be satisfied within a local node; broadcasting a memory read request to read a cache line, of said data, that is not currently in said shared invalid state first to all nodes; broadcasting a memory read request to read a cache line, of said data, that is currently in said shared invalid state first to a local node; in response to being unable to satisfy said memory read request within said local node, broadcasting said memory read request to said remote nodes; snooping, by a processor, a memory access request to access said data; determining whether a cache line of said data exists within said processor's local cache; in response to determining that said cache line of said data exists within said processor's local cache, determining whether said memory access request indicates that a valid copy of said data exists within a local node that includes said processor; in response to said cache line of said data existing within said processor's local cache, determining a current protocol state of said cache line; in response to determining that said memory access request indicates that a valid copy of said data exists within said local node and said current protocol state being an invalid state, transitioning said current state of said cache line to said shared invalid state from said invalid state; and in response to determining that said memory access request indicates that no valid copies of said data exist within said local node and said current protocol state being a shared invalid state, transitioning said current state of said cache line to said invalid state from said shared invalid state.