Patent ID: 8129275

Claim:
A process for manufacturing a semiconductor integrated circuit device, comprising: (a) forming an insulating film over a first major surface of a wafer; (b) forming a wiring groove in the insulating film by patterning the insulating film; (c) forming a metal layer including copper as its principal component, over the insulating film and in the wiring groove; (d) removing the metal layer outside the wiring groove by a chemical mechanical polishing method using a polishing slurry, so as to leave the metal layer in the wiring groove, said removing being performed in a wafer processing apparatus; (e) performing a pre-cleaning treatment to the first major surface of the wafer with pure water in order to remove the polishing slurry; (f) after (e), making the first major surface of the wafer wet by a wet treatment and transferring the wafer to a post cleaning section through a light shielding structure in the wafer processing apparatus; (g) after (f), performing a post cleaning treatment to the first major surface of the wafer with a liquid chemical or pure water in the post cleaning section; and (h) making the first major surface of the wafer dry, wherein (d) to (h) are performed in the wafer processing apparatus which processes by a single wafer processing method.