Patent ID: 7601587

Claim:
A method of forming a complementary metal-oxide-semiconductor (CMOS) device, comprising: providing a substrate having a first active region and a second active region, wherein the first active region and the second active region are isolated from each other through an isolation structure; forming a first type of metal-oxide-semiconductor (MOS) transistor and a second type of MOS transistor on the first active region and the second active region of the substrate respectively; forming a first etching stop layer over the substrate to cover conformably the first type of MOS transistor, the second type of MOS transistor and the isolation structure; forming a first stress layer and a second etching stop layer in sequence over the first etching stop layer; removing the second etching stop layer and the first stress layer in the second active region; forming a second stress layer over the substrate to cover the first etchings stop layer and the second etching stop layer; forming a third etching stop layer over the second stress layer in the second active region; and removing the third etching stop layer and the second stress layer in the first active region.