Patent ID: 8127117

Claim:
A non-transitory computer-readable medium comprising: a packing instruction to operate on non-adjacent source registers, wherein the packing instruction, when executed in a processing system, causes the processing system to: determine respective sizes of two non-adjacent source register units within a register file structure; use the determined respective sizes of the two non-adjacent source register units to identify respective widths of corresponding most significant half-word units of the two non-adjacent source register units, combine the corresponding most significant half-word units to produce a combined most significant word unit; input the combined most significant word unit into a most significant portion of a destination register unit, wherein the destination register unit is larger than either of the two non-adjacent source register units, and wherein the destination register unit comprises a single double-word destination register unit or an aligned pair of register units; combine corresponding least significant half-word units from the two non-adjacent source register units to produce a combined least significant word unit; input the combined least significant word unit into a least significant portion of the destination register unit; and store the destination register unit in the register file structure.