Patent ID: 7781835

Claim:
A lateral MOSFET comprising: a substrate of a first conductivity type; a first epitaxial layer of said first conductivity type grown on said substrate; a second epitaxial layer grown on said first epitaxial layer; and a gate electrode formed on a gate dielectric which in turn is formed on a top surface of said second epitaxial layer; wherein said second epitaxial layer comprises: a drain region of said first conductivity type which extends to a top surface of said epitaxial layer and is proximate to a first edge of said gate electrode; a source region of said first conductivity type which extends to a top surface of said second epitaxial layer and is proximate to a second edge of said gate electrode; a heavily doped body of a second conductivity type opposite to said first conductivity type under at least a portion of said source region; and a lightly doped well of said second conductivity type under said gate dielectric which extends to said heavily doped body; wherein a PN junction lying between said heavily doped body and said first epitaxial region under said heavily doped body defines a voltage clamping region, and a reverse bias voltage that is slightly less than a breakdown voltage applied to said PN junction in said voltage clamping region creates a depletion region that extends to a region of said first epitaxial layer in which the vertical dopant concentration is substantially constant.