Patent ID: 6900092

Claim:
A method of preventing the growth of an epitaxial silicon layer on a surface of a polysilicon gate electrode, said method comprising the steps of: (a) forming a polysilicon layer atop a gate dielectric layer, said gate dielectric layer being formed on a surface of a semiconductor substrate; (b) forming a nitrided surface layer by modifying a surface portion of said polysilicon layer wherein said nitrided surface layer is formed by a plasma nitridation process carried out at a temperature of from about 1000° C.-1100° C.; (c) selectively removing portions of said nitrided surface layer and said polysilicon layer stopping on said gate dielectric layer, while leaving a patterned stack of said nitrided surface layer and said polysilicon layer on said gate dielectric layer; (d) forming sidewall spacers on at least exposed vertical sidewalls of said polysilicon layer not removed in step (c) as well as a portion of said gate dielectric layer; (e) removing portions of said gate dielectric layer not protected by said sidewall spacers; and (f) growing an epitaxial silicon layer on exposed horizontal surfaces of said semiconductor substrate, wherein said epitaxial silicon layer is inhibited from growing on said polysilicon layer of said patterned stack due to the presence of said nitrided surface layer.