Patent ID: 8871641

Claim:
A method for manufacturing a wafer comprising a through-wafer via extending from an upper side to a lower side of the wafer, wherein the through-wafer via comprises a through-wafer via hole having a sidewall at least partly covered with a first conductive coating, wherein the through-wafer via hole comprises at least a first portion with a substantially vertical sidewall and a second portion forms a constriction with at least an upper sloping sidewall widening out towards an upper side in the through-wafer via hole, and wherein the second portion is arranged in between the first portion and a third portion of the sidewall, the third portion having a substantially vertical sidewall, the method comprising the steps of: defining at least a first sloping sidewall in the wafer; forming the through-wafer via hole, wherein the upper sloping sidewall of the constriction replicates the first sloping sidewall; and depositing at least the first conductive coating on the sidewall of the through-wafer via hole.