Patent ID: 8114468

Claim:
A method of forming a non-volatile resistive oxide memory array, comprising: forming a plurality of one of conductive word lines or conductive bit lines over a substrate; forming metal oxide-comprising material over the plurality of said one of the word lines or bit lines; providing a series of elongated trenches over the plurality of said one of the word lines or bit lines, the elongated trenches running generally parallel an outer major surface of the substrate, the trenches being angled relative to the plurality of said one of the word lines or bit lines, the elongated trenches respectively comprising sidewalls; forming a plurality of self-assembled block copolymer lines within individual of the trenches in registered alignment with and between the trench sidewalls; and providing a plurality of the other of conductive word lines or conductive bit lines from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.