Patent ID: 8796786

Claim:
A memory array, comprising: multiple rows of projections extending upwardly from a semiconductor substrate; the projections being semiconductor material projections comprising repeating components of a memory array; terminal semiconductor projections of each row being elongated projections; electrically conductive lines along the rows of projections, individual of the electrically conductive lines wrapping around ends of the elongated projections and bifurcating into two branches that are along opposing sides of the elongated projection and the semiconductor material projections of each row; each of the elongated projections comprising a dielectric region laterally between a pair of semiconductor material regions; the two branches along the opposing sides of the elongated projection having first sections along the semiconductor material regions, and having second sections along the dielectric region; and electrically conductive contacts extending into the dielectric regions; individual of the electrically conductive contacts being directly against the two branches along the opposing sides of the elongated projection.