Patent ID: 8193583

Claim:
A semiconductor device, comprising: a semiconductor die comprising a single semiconductor substrate; a vertical p-channel metal oxide semiconductor (PMOS) transistor overlying the single semiconductor substrate, wherein the vertical PMOS transistor comprises an active area; a vertical n-channel metal oxide semiconductor (NMOS) transistor overlying the single semiconductor substrate, wherein the vertical NMOS transistor comprises an active area; a drain of the vertical PMOS transistor electrically connected to the substrate at a location including underlying the vertical PMOS transistor active area; a drain of the vertical NMOS transistor electrically connected to the substrate at a location including underlying the vertical NMOS transistor active area; and a conductive layer which connects the drain of the vertical PMOS transistor to the drain of the vertical NMOS transistor such that the PMOS transistor and the NMOS transistor have a common drain.