Patent ID: 7385855

Claim:
A nonvolatile memory having a self-reprogramming function, comprising: a memory cell for storing a data; a sense amplifier for reading a state of the memory cell in response to a reading control signal; a latch circuit having a latch input terminal and a latch output terminal, wherein the latch input terminal receives an output from the sense amplifier for latching the state of the memory cell; and a writing amplifier, comprising a first NMOS transistor, having a gate for receiving writing control signal, a first source/drain electrically coupled to the memory cell; and a second NMOS transistor having a gate electrically coupled to the latch input terminal for coupling to the latched state of the memory cell, and the first source/drain and a second source/drain electrically coupled to a second source/drain of the first NMOS transistor and grounded, respectively, for determining whether to program the memory cell in response to a writing control signal and the latched state of the memory cell.