Patent ID: 8921859

Claim:
An array substrate for an electrophoresis type display device, comprising: a plurality of gate lines on a substrate; a gate insulating layer on the plurality of gate lines; a plurality of data lines on the gate insulating layer and crossing the plurality of gate lines to define a plurality of pixel regions; a thin film transistor corresponding to each pixel region, the thin film transistor including a gate electrode, a semiconductor layer, and source and drain electrodes; a first passivation layer on the plurality of data lines; a second passivation layer on the first passivation layer, the second passivation layer including a first hole over the data line, and a second hole over the gate line; a pixel electrode on the second passivation layer and connected to the drain electrode; and an electrophoresis ink layer over the pixel electrode, wherein a portion of the pixel electrode covers the first hole, and another portion of the pixel electrode covers the second hole, wherein the second passivation layer entirely covers the pixel region, and wherein the pixel electrode is disposed continuously over the first and second holes and the drain electrode.