Patent ID: 8311659

Claim:
Within a system comprising a processor and a memory, a method of analyzing integrated circuit (IC) product yield, the method comprising: storing, within the memory, parametric data from a manufacturing process for an IC; determining a measure of non-random variation for at least one parameter of the parametric data using a pattern detection technique; comparing, by the processor, the measure of non-random variation to a randomness criterion; and selectively outputting a notification indicating that variation in the at least one parameter is non-random according to the comparison of the measure of non-random variation to the randomness criterion; wherein determining a measure of non-random variation further comprises: determining a mean value for at least one parameter of the parametric data for each of a plurality of wafers, wherein each wafer comprises a plurality of the ICs; for each of a plurality of successive wafer pairs, determining whether the mean value for a second wafer of the successive wafer pair increases or decreases from the mean value of a first wafer of the successive pair of wafers; storing an indication of whether the mean value increases or decreases for each successive wafer pair as a sequence of indications; and calculating a measure of non-random variation according to the sequence of indications.