Patent ID: 7759922

Claim:
A controller, comprising: a pulse width modulator coupled to receive a clock signal, wherein the pulse width modulator is to be coupled to control a switch to regulate an output level of a power supply responsive to the clock signal; a current limit comparator having a first input, a second input, and an output, wherein the first input is to be coupled to receive a current sense signal representative of a current through the switch, wherein the second input is coupled to receive a reference signal, and wherein the output produces a current limit signal to indicate whether the current sense signal exceeds the reference signal; a peak load detect circuit coupled to receive the current limit signal to determine if a load of the power supply requires more than a moderate level of power; and an oscillator coupled to the pulse width modulator to generate the clock signal, wherein the clock signal has a first maximum frequency when the peak load detect circuit determines that the load of the power supply does not require more than a moderate level of power and wherein the clock signal has a second maximum frequency when the peak load detect circuit determines that the load of the power supply requires more than a moderate level of power.