Patent ID: 8373461

Claim:
A PLL frequency synthesizer comprising: a voltage controlled oscillator configured to oscillate at a frequency that corresponds to a control voltage; a local oscillator configured to generate a local signal having a local frequency; a reference signal generator configured to generate a reference signal having a reference frequency; a frequency mixer configured to perform frequency mixing of an output signal of the voltage controlled oscillator and the local signal; a first filter configured to extract a difference frequency signal obtained by the mixing operation of the mixer; a phase difference detection unit configured to make a comparison between the phase of the difference frequency signal extracted by the first filter and the phase of the reference signal, and to generate a phase difference signal that corresponds to the phase difference; a loop filter configured to perform filtering of the phase difference signal so as to generate the control signal; and a second filter configured to extract a summation frequency signal obtained by the mixing operation of the mixer, wherein the PLL frequency synthesizer is configured to output the summation frequency signal.