Patent ID: 8803142

Claim:
A semiconductor device comprising: a first line; a second line; and a memory element, the memory element comprising: a capacitor; and a transistor, the transistor comprising: a crystalline oxide semiconductor layer comprising oxygen, indium, zinc and a metal other than indium and zinc, the crystalline oxide semiconductor layer including a channel formation region; and a gate electrode with a gate insulating film interposed between the channel formation region and the gate electrode, wherein one of a source and a drain of the transistor is electrically connected to the first line, wherein the other of the source and the drain of the transistor is electrically connected to one of terminals of the capacitor, wherein the other of the terminals of the capacitor is electrically connected to the second line, wherein a carrier concentration in the crystalline oxide semiconductor layer is less than or equal to 5×10 14 cm −3 , and wherein a value of off-state current through the crystalline oxide semiconductor layer of the transistor is less than 1×10 −13 A.