Patent ID: 7895379

Claim:
A system comprising: a source bus; a component connected to the source bus, wherein the component produces a first set of electrical signals; a node controller, connected to the source bus, comprising control logic that receives the first set of electrical signals from the source bus as an input vector and produces an output vector comprising a second set of electrical signals, wherein the control logic comprises: an entry-enables register that selectively enables and disables a plurality of control store entries that include: a plurality of tied control store entries, wherein the tied control store entries each includes hard-coded logic configured to identify unique values of the input vector from the source bus and produces the second set of electrical signals from a hard-coded output vector when the input vector is identified and when the tied control store is enabled; and a plurality of spare control store entries, wherein the spare control store entries each includes programmable logic configurable to identify values of the input vector and produces the second set of electrical signals from a programmable output vector when the input vector is identified and when the spare control store is enabled, wherein at least one of the spare control store entries is configured to identify a value of the input vector for which none of the tied control store entries that are enabled by the entry-enables register are configured to identify, wherein the entry-enables register enables the at least one of the spare control store entries; and a destination bus that receives the output vector from the node controller, wherein the node controller is connected to the destination bus.