Patent ID: 8116415

Claim:
A semiconductor integrated circuit comprising: a transmitter circuit for transmitting a supplied external data signal, the transmitter circuit comprising: a transmitter flipflop circuit having a reference clock as an input for holding the external data signal in synchronization with the reference clock; a frequency divider circuit for multiplying the frequency of the reference clock by n/m, where m and n are integers equal to or more than 2 and m>n; a data signal buffer circuit for transmitting a data signal held by the transmitter flipflop circuit; and a clock buffer circuit for transmitting the output of the frequency divider circuit; a receiver circuit for receiving the external data signal transmitted from the transmitter circuit; a data signal transmission line; and a clock transmission line, wherein: the receiver circuit comprises: a data signal amplifier circuit for amplifying the external data signal; a clock amplifier circuit having a reference clock as an input for amplifying the reference clock; a receiver DLL circuit for multiplying the frequency of the output of the clock amplifier circuit by m/n; and a receiver flipflop circuit for holding the output of the data signal amplifier circuit in synchronization with the output of the receiver DLL circuit, the data signal transmission line transmits the output of the data signal buffer circuit to the data signal amplifier circuit, the clock transmission line transmits the output of the clock buffer circuit to the clock amplifier circuit, and the data signal transmission line and the clock transmission line run in parallel with each other.