Patent ID: 8841769

Claim:
A semiconductor device, comprising: a first insulating layer on a substrate; a first contact hole passing through the first insulating layer and exposing an upper surface of the substrate; a first barrier metal layer on a sidewall and at a bottom of the first contact hole; a first metal plug on the first barrier metal layer and in the first contact hole; a recess region between the first insulating layer and the first metal plug, the recess region defined by an upper surface of the barrier metal layer and sidewalls of the first metal plug and the first insulating layer, the upper surface of the first barrier metal layer being lower than upper surfaces of the first insulating layer and the first metal plug; a gap-fill layer filling the recess region; a second insulating layer on the gap-fill layer; a second contact hole passing through the second insulating layer and exposing the upper surface of the first metal plug, a bottom of the second contact hole overlapping with the recess region; a second barrier metal layer on a sidewall and at the bottom of the second contact hole; and a second metal plug on the second barrier metal layer, the second metal plug filling the second contact hole.