Patent ID: 7474723

Claim:
A Dedicated Short Range Communication (DSRC) communication circuit comprising: a unique word detector that detects, in a plurality of slots forming a frame, respective unique words in accordance with a unique word detection window; a first bit counter that performs a frame synchronization in response to a unique word detection signal corresponding to a first slot in the frame, said detection signal being outputted from the unique word detector, counts a period until a unique word detection signal corresponding to a first slot in a next frame arrives as an input, and generates a frame timing; a second bit counter that, in response to unique word detection signals corresponding to all slots including the first slot, said detection signals being outputted from the unique word detector, performs a slot synchronization on a per unique word detection signal basis and counts a period until a unique word detection signal corresponding to the next slot arrives as an input, and generates a slot timing; and a timing generator that generates a unique word detection window based on the frame timing, generates a processing timing of received data based on the slot timing, and generates a processing timing of transmission data based on one of the frame timing and the slot timing.