Patent ID: 8207605

Claim:
A semiconductor device, comprising: an interconnect component having a first surface and a second surface opposing to said first surface, said interconnect component comprising: an insulating film having an upper surface in a side of said first surface; a first via penetrating said insulating film, said first via having a first top edge exposed from said upper surface, and a first lower edge; a second via penetrating said insulating film, said second via having a second top edge exposed from said upper surface, and a second lower edge; and an interconnect provided on said upper surface of said insulating film, said interconnect having one end contacted with said second top edge of said second via; a first semiconductor chip provided on said first surface of said interconnect component, said first semiconductor chip contacted with said first top edge of said first via; an encapsulation resin covering said first surface of said interconnect component; a second semiconductor chip provided on said second surface of said interconnect component, said second semiconductor chip contacting with both of said first lower edge of said first via and said second lower edge of said second via; a first electrode terminal provided on said second surface of said interconnect component, said first electrode terminal electrically connected to another end of said interconnect; and an underfill resin filling a gap between said second surface of said interconnect component and said second semiconductor chip, said underfill resin covering a side surface of said second semiconductor chip, wherein said underfill resin is provided in an interior side of said interconnect component from said first electrode terminal in a plan view.