Patent ID: 8278687

Claim:
An apparatus, comprising: a semiconductor substrate; a first buffer layer formed directly on the semiconductor substrate, the first buffer layer being a nucleation buffer layer formed from GaAs; a second buffer layer formed directly on the first buffer layer, the second buffer layer being a graded buffer layer formed from In x Al 1-x As, in which x has a value between 0 and 1; a first barrier layer formed directly on the second buffer layer; a back gate layer formed directly on the first barrier layer, the back gate layer comprising a group III-V semiconductor material, a group II-VI semiconductor material, or combinations thereof, the back gate layer comprising a first bandgap; a second barrier layer formed directly on the back gate layer, the second barrier layer comprising a single layer formed from aluminum arsenide (AlAs), the second barrier layer comprising a second bandgap that is relatively larger than the first bandgap; a quantum-well channel formed directly on the second barrier layer, the quantum-well channel comprising a third bandgap that is relatively smaller than the second bandgap; a spacer layer formed directly on the quantum-well channel; a doped layer formed on the spacer layer; a third barrier layer formed on the doped layer; an etch stop layer formed on the third barrier layer; a contact structure formed on the etch stop layer; a source structure coupled to the contact structure; a drain structure coupled to the contact structure; a first gate electrode structure coupled to a first recessed area in the third barrier layer, the etch stop layer, and the contact structure; a spacer dielectric structure coupled to a second recessed area in the second barrier layer, quantum-well channel, the spacer layer, the doped layer, the third barrier layer, the etch stop layer, and the contact structure; and a second gate electrode structure coupled to the back gate layer and the spacer dielectric structure in the second recessed area, the quantum-well channel being a channel of a transistor and the back gate layer allowing modulation of charge carrier density in the quantum-well channel to decrease short-channel effects of the transistor.