Patent ID: 7067929

Claim:
A method for manufacturing a semiconductor device comprising the steps of: (a) forming a wiring layer on a semiconductor substrate having an integrated circuit and a pad electrically connected to the integrated circuit, the wiring layer being electrically connected to the pad; (b) forming a resin layer covering the wiring layer; (c) forming a first concave portion at an area of the resin layer, the area overlapping the wiring layer, by a first process, the first process comprising an exposure step wherein a portion of the resin layer is irradiated with a dose of radiation to form a region with increased solubility and a development step wherein a portion of the region with increased solubility is removed to form the concave portion; (d) forming a through-hole in the resin layer by removing a bottom of the first concave portion by a second process, the second process differing from the first process, and forming a second concave portion in the wiring layer in such a way that an angle between an osculating plane at any point of a surface of the second concave portion and a top surface of the wiring layer, with the angle being defined outside the second concave portion is 90° or more; and (e) providing an external terminal in the second concave portion of the wiring layer.