Patent ID: 8817435

Claim:
A method for making a semiconductor device, the method comprising: providing a semiconductor substrate comprising a surface region, the semiconductor substrate being characterized by a first conductivity type; forming a well region within the semiconductor substrate, the well region being characterized by a second conductivity type, the well region being also characterized by a first depth; adding a gate dielectric layer overlying the surface region; adding a gate layer overlying the gate dielectric layer; forming a first lightly-doped-drain (LDD) region within the well region, the first LDD region being of the first conductivity type, the first LDD region being characterized by a second depth; forming an emitter region within the first LDD region, the emitter region being characterized by the second conductivity type; forming a drain region within the first LDD region, the drain region being characterized by the first conductivity type; forming a second lightly-doped-drain (LDD) region of the first conductivity type within the well region, the second LDD region being separated from the first LDD region by a channel region; forming a source region within the second LDD region, the source region being characterized by the first conductivity type; and adding an output pad coupled to both the drain region and the emitter region; wherein the first LDD region, the well region, and the substrate are associated with a first bipolar transistor, the first bipolar transistor being characterized by a first trigger voltage, and wherein the emitter region, the first LDD region, and the well region are associated with a second bipolar transistor, the second bipolar transistor being characterized by a second trigger voltage.