Patent ID: 8667333

Claim:
A computer implemented system for conducting testing of electronic devices, including: a nontransitory computer readable storage medium storing a plurality of machine readable processing sequences, said plurality of processing sequences comprising: a first processing sequence that retrieves a first data specification for a first electronic device species according to a first plurality of commands specified by a user; a second processing sequence that retrieves a first test protocol according to a second plurality of commands specified by a user, the first test protocol being configured to test any species of electronic device within a genus of electronic devices; a third processing sequence that executes the first test protocol to generate a first data structure, the first data structure being generic with respect to species within the genus of electronic devices; a fourth processing sequence that interprets the first data specification for the first electronic device species and extracts data from the first data structure according to the interpretation of the first data specification; a fifth processing sequence that generates a second data structure specific to the first electronic device species using data extracted from the first data structure and according to instruction contained within the first data specification for the first electronic device species; a sixth processing sequence that outputs the second data structure to a first device of the first electronic device species; a seventh processing sequence that receives a third data structure from the first device of the first electronic device species; and an eighth processing sequence that interprets the data specification for the first electronic device species and extracts data from the third data structure according to the interpretation of the first data specification.