Patent ID: 8278154

Claim:
A method of fabricating a semiconductor package, the method comprising: forming a die pad and a lead pattern from a conductive plate, the lead pattern being contiguously spaced apart from an edge of the die pad and including a first conductive pattern having a first thickness and extending higher than the die pad, and a second conductive pattern having a second thickness less than the first thickness and disposed between the first conductive pattern and the die pad; forming a plating layer on the second conductive pattern; mounting a semiconductor chip having at least one chip pad on the die pad using an adhesive layer; connecting a conductive metal line between the plating layer and a corresponding chip pad; forming a heat radiation plate from a conductive material, the heat radiation plate having a third thickness and a groove formed therein to a fourth thickness less than third thickness; and aligning the heat radiation plate on the lead pattern such that end portions of the heat radiation plate contacting the first conductive pattern are higher than a height of the semiconductor chip, and a portion of the conductive metal line is located in the groove and isolated from the heat radiation plate.