Patent ID: 7880308

Claim:
A semiconductor device comprising: at least two substrates, at least one wiring being provided in each of the substrates, the substrates being stacked such that major surfaces on one side of each thereof oppose each other and the wirings being connected between the major surfaces; a plurality of connecting portions, the connecting portions being provided adjacent to each other while connected to each wiring on the major surfaces opposing each other, at least one of the connecting portions provided on the same major surface being formed smaller than the adjacent other connecting portion, the connecting portions being provided at positions opposing each other one to one on the major surface, the connecting portions being connected so that the wirings are connected between the major surfaces, one connecting portion of a pair of the connecting portions connected one to one being formed smaller than the other connecting portion; and a plurality of inter-substrate connecting electric conductors provided between the pair of the connecting portions and configured to connect the pair of the connecting portions, each of inter-substrate connecting electric conductors integrally provided on the at least one of the connecting portions formed smaller than the adjacent other connecting portion, wherein the connecting portion formed smaller is formed in a size equal to or smaller than the width of the wiring, and the other connecting portion is formed in a size larger than the width of the wiring.