Patent ID: 7763969

Claim:
A structure with semiconductor chips embedded therein, comprising: a carrier board having a first surface and an opposing second surface, therewith a plurality of through openings formed in the carrier board, and through trenches surrounding the through openings formed in the same; a plurality of semiconductor chips having an active surface and an opposing inactive surface each, received in the through openings of the carrier board; a first dielectric layer formed on the first surface of the carrier board, and filling the gap between the semiconductor chip and the carrier and parts of the through trenches; a second dielectric layer formed on the second surface of the carrier board and on the active surface of the semiconductor chip, also filling the residual spaces of the through trenches; a circuit layer formed on the second dielectric layer, together with a plurality of conductive vias formed in the same, to thereby electrically connect to the active surface of the semiconductor chip; and a built-up structure formed on the second dielectric layer and on the circuit layer, wherein the built-up structure includes: at least a dielectric layer, at least a built-up circuit layer, a plurality of connecting pads, and a plurality of conductive vias, to thereby electrically connect to the circuit layer on the second dielectric layer.