Patent ID: 8222649

Claim:
A semiconductor device comprising: a substrate formed of silicon carbide including a first conductivity type impurity; a first drift layer formed of silicon carbide including a first conductivity type impurity of first concentration, being disposed entirely on a surface of said substrate; a second drift layer formed of silicon carbide including a first conductivity type impurity of second concentration higher than said first concentration, being disposed on a surface of said first drift layer; a plurality of well regions containing a second conductivity type impurity, being disposed in said second drift layer; a current control region disposed in second drift layer between a pair of said well regions; a gate electrode disposed above said current control region; and a gate insulating film disposed between said gate electrode and said current control region, wherein the concentration of the first conductivity type impurity of said second drift layer varies in a region having a depth no greater than a depth of said well region from a surface of said second drift layer in accordance with the depth from said surface of said second drift layer, said depth comprising the distance from said gate electrode, and wherein said region in which the concentration of the first conductivity type impurity of said second drift layer varies includes a region in said well region in which a channel is formed.