Patent ID: 7299339

Claim:
A system comprising: a super reconfigurable fabric architecture module, comprising: a configurable very long instruction word controller that receives a control word from a host processor over a standard I/O bus; a reconfigurable communication and control fabric having a very long instruction word interface to said configurable very long instruction word controller; and a single instruction-multiple data processing element cell controlled by said configurable very long instruction word controller through said reconfigurable communication and control fabric via said very long instruction word interface; and a virtual bus interface to the super reconfigurable fabric architecture module, wherein the virtual bus interface comprises: a virtual memory port that maps a standard bus protocol to virtual bus interface signals provided between said virtual bus interface and the super reconfigurable fabric architecture module, wherein said virtual memory port provides a port signal having a type chosen from “data”, “control”, “fifo”, or “bit”, wherein each port signal type has a self-processor that performs distinct operations producing processed data, and wherein said processed data is stored in a memory location attached to said virtual memory port.