Patent ID: 8898049

Claim:
A method of generating system level power information for an embedded application configured to execute on a multi-core system-on-chip (SoC), the method comprising: configuring a simulation model of hardware sub-components of the SoC that executes the embedded application; breaking down the embedded application into software sub-components; loading the software sub-components of the embedded application into the simulation model; executing the software sub-components of the embedded application on the simulation model, and extracting state information about the software sub-components of the embedded application and state information about hardware sub- components of the SoC, the hardware sub-components including individual processor cores, one or more buses, one or more memories, and one or more peripheral devices; determining, from the hardware state information, per-cycle energy values for multiple of the hardware sub-components of the SoC; and creating, a power profile for each of the hardware components, including each individual processor core of the multi-core SoC, and assigning the per-cycle energy values of the hardware subcomponents to corresponding software sub-components.