Patent ID: 7986725

Claim:
A module for providing code phase time signalling, the module for providing code phase time signalling comprising at least one processor and at least one memory comprising computer code, the at least one memory and the computer program code configured to, with the at least one processor, cause the module for providing code phase time signalling to: provide, to an output, code phase time signalling representing an offset time of a synchronisation code from a reference time, wherein: the code phase time signalling is configured to be used by a module for receiving signalling to synchronise the phase of a synchronisation code provided from within the module for receiving signalling with the phase of a modulation code of direct sequence spread spectrum signalling received by the module for receiving signalling, a sequence of the synchronisation code corresponding to a sequence of the modulation code; the reference time is associated with the time of transmission of a particular reference portion of a modulation code of the direct sequence spread spectrum signalling; and the offset time is associated with the time of transmission of a subsequently transmitted offset portion of the modulation code of the direct sequence spread spectrum signalling.