Patent ID: 8525562

Claim:
A recursion loop system for generating a clock signal, the system comprising: a mixing device including: a set of input channels configured to generate a set of input signals; a mixing circuit configured to receive and combine the set of input signals from the set of input channels into a mixed harmonized input signal; a splitter circuit configured to receive the mixed harmonized input signal and to provide a set of output signals; a set of output channels configured to receive output signals from the splitter circuit and to generate output signals based on the input signals; and a clock output channel configured to output a mixed harmonized periodic signal based on the mixed harmonized input signal, wherein the mixed harmonized periodic signal is usable as a clock signal; a set of output devices coupled to the set of output channels and configured to generate output based on the output signals; and a set of input devices coupled to the set of input channels and configured to generate input signals based on the output generated by the set of output devices, thereby forming a recursion loop.