Patent ID: 7920637

Claim:
A transmitter apparatus, comprising: a module that maps a first sequence of bits onto a first real valued envelope signal of the form m 1 (t)=A 1 cos(α 1 (t)+θ 1 ) and that maps a second sequence of bits onto a second real valued envelope signal of the form m 2 (t)=A 2 cos(α 2 (t)+θ 2 ), where α 1 (t) and α 2 (t) are real-valued digitized representations of continuous phase modulation phase functions, A 1 , A 2 , θ 1 , and θ 2 are real numbers, and α 1 (t) and α 2 (t) are respectively related to the first and second sequences of bits and follow respective first and second sequences of phase states that are each constrained to be allowable sequences of phase states in accordance with a respective phase trellis; and an I/Q modulator that maps the first real-valued envelope signal, m 1 (t), into an in-phase channel, and maps the second real-valued envelope signal, m 2 (t), into a quadrature-phase channel for transmission onto a communication channel.