Patent ID: 7161835

Claim:
A non-volatile semiconductor memory device comprising: a cell array with electrically rewritable and non-volatile memory cells arranged therein; a sense amplifier circuit configured to read data of and write data into said cell array; and a controller configured to control read, write and erase said cell array, wherein said controller executes an erase sequence for erasing a selected block in said cell array in response to erase command and address input, the erase sequence including executing a first erase-verify operation for verifying an erase state of the selected block on receiving an erase command; executing a first erase operation of the selected block after the first erase-verify operation if the first erase-verify operation acknowledges that a previous erasing was not successful; and ending the erase sequence without executing the first erase operation if the first erase-verify operation acknowledges that the previous erasing was successful.