Patent ID: 8195890

Claim:
A method of efficiently transferring data between a head cache and a tail cache in a two-entry list comprising: allowing each head and tail cache to write a cache line in the other cache; providing distinct states in a non-owning cache corresponding to no-data shared and no-data unshared; providing a distinct sharing list structure for each line of memory based on an associated state of a memory-tag and for each line of cache data based on a state of an associated cache-tag; providing a pointer within each line of memory and within each line of cache data, wherein the pointer within each line of memory allows the memory to redirect accesses from other caches to a current cache line, wherein the pointer within each line of cache data allows the cache to inform each line of memory when its line of cache storage is recycled in favor of a more-recently accessed line address; and providing at least one command, wherein the at least one command is placed within a returned response packet and initiation of the returned response packet is deffered when a responder queue is full to avoid deadlock.