Patent ID: 8637113

Claim:
A method of forming a non-volatile memory array, comprising: forming a plurality of one of conductive word lines or conductive bit lines over a substrate; forming programmable multi-resistive state material over the plurality of said one of the word lines or bit lines; providing a series of elongated trenches over the plurality of said one of the word lines or bit lines, the elongated trenches running generally parallel an outer major surface of the substrate, the trenches being angled relative to the plurality of said one of the word lines or bit lines, the elongated trenches respectively comprising sidewalls; forming a plurality of self-assembled block copolymer lines within individual of the trenches in registered alignment with and between the trench sidewalls; and providing a plurality of the other of conductive word lines or conductive bit lines from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said programmable multi-resistive state material where the word lines and bit lines cross one another.