Patent ID: 8443023

Claim:
In a frequency synthesis device, a method for synthesizing signal frequencies using rational division, the method comprising: employing a processor that facilitates execution of computer executable instructions stored in a memory to perform operations, comprising: accepting a reference frequency value; accepting a synthesized frequency value; in response to dividing the synthesized frequency value by the reference frequency value, determining an integer value numerator (dp) and an integer value denominator (dq); reducing a ratio of dp/dq to an integer N and a ratio of p/q (dp/dq=N(p/q)), where p/q<1 (decimal); defining a resolution limit of j radix places; setting q=dq; determining p; and supplying N(p/q) to a flexible accumulator module enabled for rational division when p can be represented as an integer using j, or less, radix places.