Patent ID: 6890835

Claim:
A method of preparing a relaxed SiGe layer on an insulator and a SiGe/Si heterostructure comprising the steps of: forming a graded Si 1-x Ge x epitaxial layer on a first single crystalline semiconductor substrate, forming a relaxed Si 1-y Ge y epitaxial layer over said graded Si 1-x Ge x layer, wherein y, the germanium content of the relaxed Si 1-y Ge y epitaxial layer, is equal to or substantially equal to the value of x at an upper surface of the graded Si 1-x Ge x epitaxial layer, smoothing the surface of said relaxed Si 1-y Ge y epitaxial layer to provide a surface roughness in the range from about 0.3 nm to about 1 nm root mean square (RMS), selecting a structure having an upper surface and comprising a second substrate-having a surface roughness in the range from about 0.3 nm to about 1 nm RMS and an intermediate agent layer comprising a metal selected from the group consisting of W, Co Ti and any other metal that can react with silicon to form a metal silicide, and bonding said smoothed surface of said relaxed Si 1-y Ge y epitaxial layer on said first substrate to the upper surface of said structure including said second substrate, said step of bonding including the step of annealing to form sufficiently strong bonds across the bonding interface to form a single mechanical structure, whereby during said bonding said intermediate agent layer is converted into a metal silicide which includes germanium.