Patent ID: 8216906

Claim:
A method comprising: providing a semiconductor substrate; forming a gate structure over the substrate; forming a lightly doped source and drain (LDD) region in the substrate, the LDD region being interposed by the gate structure; forming offset spacers on sidewalls of the gate structure; removing portions of the substrate, including portions of the LDD regions, at either side of the gate structure, thereby forming a first recess in the substrate; epitaxially (epi) growing a first semiconductor material to fill the first recess, thereby forming epi features; forming main spacers for the gate structure; removing portions of the substrate, including portions of the epi features, at either side of the gate structure, thereby forming a second recess in the substrate that defines a source and drain region in the substrate; and epitaxially (epi) growing a second semiconductor material to fill the second recess, the second semiconductor material being different than the first semiconductor material.