Patent ID: 7024440

Claim:
A method of efficiently processing a discrete time input signal having a plurality of input signal samples that occur at a first clock rate into a discrete time output signal having a second clock rate that is R times the first clock rate, the method comprising the steps of: receiving the input signal; and filtering the input signal with an N-taps finite impulse response (FIR) filter having N filter coefficients according to ∑ i = k ceil ⁡ [ ( N + 1 - k ) / R ] - 1 ⁢ b iR - k ⁢ u ⁡ ( ( m - i + k ) ⁢ T s ) wherein b iR−k is one of the N filter coefficients, u((m−i+k)T s ) is one of the input signal samples, T s is a slow clock sampling period, m equals (0, 1, 2, 3, . . . ), and k equals (0, 1, 2, . . . , R−1).