Patent ID: 7295043

Claim:
A differential output circuit comprising: a monolithic semiconductor integrated circuit including a first input receiving a first logic signal; a second input receiving a second logic signal complementary to said first logic signal; first and second outputs; a resistive element connected between said first and second outputs; a first N-channel MISFET having a source connected to said first input, a gate receiving a power supply potential, and a drain connected to said first output; a second N-channel MISFET having a source connected to said second input, a gate receiving said power supply potential, and a drain connected to said second output; a first P-channel MISFET having a source receiving said power supply potential, a gate connected to said second input, and a drain connected to said first output; and a second P-channel MISFET having a source receiving said power supply potential, a gate connected to said first input, and a drain connected to said second output, wherein frequency bandwidth of said differential output circuit is spread by said resistive element.