Patent ID: 8191026

Claim:
A semiconductor integrated circuit comprising: a circuit block having a first power supply line to which a power supply voltage and a reference voltage is applied, an internal voltage line, and a circuit cell connected between said first power supply line and said internal voltage line; and a plurality of switch cells each including two voltage cell lines each connected electrically to said internal voltage line, two power cell lines each connected electrically to a second power supply line to which another power supply voltage and said reference voltage is applied, a control cell line electrically connected to a switch control line, and a transistor electrically connected between said internal voltage line and said second power supply line; wherein said switch cells are arranged on all of four sides of a periphery of said circuit block, in each of said plurality of switch cells, said control cell line passes through a cell center, and is disposed in one direction, said two voltage cell lines are arranged in parallel with said control cell line and in parallel with each other at positions equally distant from said control cell line with said control cell line interposed between said two voltage cell lines, and said two power cell lines are arranged in parallel with said control cell line and in parallel with each other at positions equally distant from said control cell line with said control cell line interposed between said two power cell lines.