Patent ID: 8009406

Claim:
A capacitance arrangement, comprising: at least one parallel-plate capacitor having: a first electrode means; a dielectric layer; and a second electrode means substantially in a parallel manner disposed on either side of said dielectric layer and partly overlapping each other; wherein the equivalent capacitance of the capacitance arrangement is dependent on the size of the overlapping area of said first and second electrode means and a misalignment limit defining the maximum allowable extent of misalignment between a respective first and second electrode means being given; wherein said first electrode means further comprises a first and a second electrode arranged symmetrically with respect to a longitudinal axis, that said first and second electrodes each have a respective first edge, which respective first edges face each other, are linear and parallel such that a gap is defined therebetween; wherein said second electrode means further comprises a third electrode, said third electrode having a first section and a second section disposed on opposite sides of said gap and interconnected by means of an intermediate section which is delimited by a first curved edge and a second curved edge which first and second curved edges are symmetrical and oppositely directed with respect to said longitudinal axis, and the shape of which being given by a function (F(x)) depending on a first parameter (k) and a second parameter (A) and in that one of said two parameters is adapted to be selected hence allowing calculation of the other parameter to determine the shape and size of the second electrode means such that the capacitance of the capacitance arrangement will be misalignment invariable within the misalignment limit.