Patent ID: 7196414

Claim:
A semiconductor package, comprising: a substrate having an upper surface and a lower surface opposed to the upper surface; at least one chip mounted on the upper surface of the substrate and electrically connected to the substrate by a plurality of conductive elements; a heat sink mounted on the upper surface of the substrate and covering the chip, the heat sink having a flat portion and a support portion extending from an edge of the flat portion to the substrate, making the flat portion elevated above the chip by the support portion, wherein the support portion is formed with a plurality of flanges coming into contact with the upper surface of the substrate, and each of the flanges is formed with at least one hole at a position in contact with the substrate; an adhesive material applied between the flanges of the heat sink and the upper surface of the substrate and filled into the holes of the heat sink for attaching the heat sink onto the substrate; and a plurality of solder balls implanted on the lower surface of the substrate.