Patent ID: 8455980

Claim:
A semiconductor structure comprising: a bulk region; an isolation layer that touches the bulk region; a plurality of single-crystal silicon regions that touch the isolation layer, each single-crystal silicon region having a first conductivity type and being horizontally spaced apart and horizontally electrically isolated from each other single-crystal silicon region, the plurality of single-crystal silicon regions including a single-crystal silicon region, the single-crystal silicon region having a top surface; an isolation region that touches the single-crystal silicon region; a Schottky structure that touches the single-crystal silicon region; and a bipolar transistor that touches the single-crystal silicon region, the Schottky structure and the bipolar transistor lying on opposite sides of the isolation region; wherein a bottom surface of the isolation region is spaced apart from a top surface of the isolation layer; wherein the bipolar transistor includes a buried layer of the first conductivity type that touches the top surface of the isolation layer, the buried layer having a dopant concentration, and lying below the bottom surface of the isolation strip; wherein a top surface of the buried layer is spaced apart from the bottom surface of the isolation strip; wherein the Schottky structure includes a metal region that touches a portion of the single-crystal silicon region; and wherein the metal region of the Schottky structure lies directly vertically over a portion of the buried layer.