Patent ID: 8212603

Claim:
A mixer circuit comprising: a first adder configured to output a first output signal by adding a first voltage signal and a second voltage signal; a second adder configured to output a second output signal by adding an inverted signal of the first voltage signal and an inverted signal of the second voltage signal; a third adder configured to output a third output signal by adding the inverted signal of the first voltage signal and the second voltage signal; a fourth adder configured to output a fourth output signal by adding the first voltage signal and the inverted signal of the second voltage signal; a first square circuit configured to output a fifth output signal by squaring the first output signal; a second square circuit configured to output a sixth output signal by squaring the second output signal; a third square circuit configured to output a seventh output signal by squaring the third output signal; and a fourth square circuit configured to output a eighth output signal by squaring the fourth output signal.