Patent ID: 7379859

Claim:
An emulator circuit provided on one or more circuit boards of a circuit emulator, comprising: a first programmable logic device configured to emulate a first partition of a circuit, and a second programmable logic device configured to emulate a second partition of the circuit, said first programmable logic device having pins configurable for providing output signals and said second programmable logic device having pins configurable for receiving input signals; a serializer, coupled to said pins of said first programmable logic device, configured to receive said output signals from said first programmable logic device and provide a serialized data stream; a cross point switch configured to receive said serialized data stream at a first input/output pin of said cross point switch and route said data stream onto a second input/output pin of said cross point switch; a deserializer, coupled to said second input/output pin of said cross point switch and said pins of said second programmable logic device, configured to receive said data stream from said cross point switch and deserialize said data stream onto said pins of said second programmable logic device as said input signals; a circuit partitioner configured to synthesize the first circuit partition and the second circuit partition from the circuit; and a configurer arranged to configure (a) said first circuit partition in said first programmable logic device and said second circuit partition in said second programmable logic device, and (b) said cross point switch for routing said data stream between said first input/output pin and said second input/output pin.