Patent ID: 8912630

Claim:
An integrated circuit, comprising: a substrate; an insulation layer over the substrate; a resistor over the insulation layer; a first thermal gate over the resistor without contact thereof; a second thermal gate over the resistor without contact thereof; a heat sink contact having a top surface that is level with a top surface of the first thermal gate and a bottom surface that is over the resistor; a first metal layer interconnect having a bottom surface with a first portion that contacts the top surface of the first thermal gate and a second portion that contacts the top surface of the heat sink contact; a heat sink connected to the first thermal gate via the heat sink contact and the first metal layer interconnect, the heat sink formed in a portion of the resistor, wherein the heat sink is adapted to receive thermal energy that dissipates from the resistor through a flow path that includes the first thermal gate, the first metal layer interconnect, and the heat sink contact, the flow path terminating in the heat sink; and a substrate contact having a top surface that is level with a top surface of the second thermal gate, a bottom surface in contact with the substrate, and sidewalls having a portion in contact with the resistor, wherein the substrate contact is adapted to dissipate the thermal energy from the resistor to the substrate via the second thermal gate.