Patent ID: 7050346

Claim:
A non-volatile semiconductor memory device comprising a cell array in which electrically rewritable and non-volatile memory cells are arranged, and a sense amplifier circuit configured to read and write data in association with said cell array, wherein said sense amplifier circuit comprises: a differential amplifier having first and second input nodes and configured to amplify a difference voltage between said first and second input nodes; a data transfer circuit configured to selectively connect said first input node to a bit line of said cell array; a reference voltage setting circuit configured to apply a reference voltage to said second input node of said differential amplifier; and a data storing circuit configured to temporarily hold a loaded write data at said first input node of said differential amplifier, and control the reference voltage at said second input node of said differential amplifier in correspondence with the write data held therein before bit line data is transferred to said differential amplifier in a data write cycle.