Patent ID: 8238136

Claim:
A logic device, comprising: an array of memory cells each having a diode; a first wordline connected to the cathodes of the diodes in a row of the array; a second wordline connected to the anodes of the diodes in said row of the array; a first set of bitlines connected to the anodes of the diodes whose cathodes are connected to the first wordline; a second set of bitlines connected to the cathodes of the diodes whose anodes are connected to the second wordline; and wherein the diodes connected to the first wordline and the first set of bitlines store therein a digital bit “0;” and the diodes connected to the second wordline and the second set of bitlines store therein a digital bit “1” such that an output of the memory cell array corresponds to a logic function of a collection of a plurality of input signals that are connected to the memory cells for accessing the memory cells.