Patent ID: 8065545

Claim:
An electronic device having a low power sleep mode, comprising: circuits capable of being placed into a sleep mode; input-output (I/O) capable of being placed into the sleep mode, the I/O coupled to the circuits; sleep/wake-up logic for controlling when the circuits and the I/O are in the sleep mode or in an operational mode; a frequency differentiator having an output coupled to the circuits, the output presenting output values representative of frequencies at an input of the frequency differentiator; a frequency controllable oscillator coupled to the input of the frequency differentiator; an external sensor connection adapted for coupling to an external sensor and coupled to the frequency controllable oscillator; wherein the frequency controllable oscillator is at a first frequency when the external sensor is not activated and is at a second frequency when the external sensor is activated, and the frequency differentiator generates a first output value when receiving the first frequency and a second output value when receiving the second frequency; and a watchdog timer coupled to the sleep/wake-up logic, wherein the watchdog timer periodically causes the sleep/wake-up logic to wake up the circuits and the I/O from the sleep mode to the operational mode for a certain time so that the circuits can sample the output values from the frequency differentiator, wherein when a present output value sample is different then a prior output value sample, then the circuits and the I/O will remain in the operational mode.