Patent ID: 8864518

Claim:
A stacked connector component comprising: a housing having a bottom side, a top side opposite the bottom side, a back side perpendicular to the bottom side and the top side, and a front opening opposite the back side and perpendicular to the bottom side and the top side; a plurality of connectors at the front opening and arranged in a stacked formation within one or more columns; and a plurality of pins for and exposed at the connectors, including a plurality of high-speed signal pins and a plurality of low-speed signal pins, the high-speed signal pins to carry signals at a data rate greater than a data rate of signals that the low-speed signal pins are to carry, wherein the high-speed signal pins are routed within the housing to the bottom side to connect to a circuit board, and the low-speed signal pins are routed within the housing to the back side or to the top side to connect to the circuit board; wherein each connector is a type of quad small form-factor pluggable (QSFP/QSFP+/zQSFP+) connector, speed signal pins for the given connector are located within a middle of the given connector between the pair of ends and wherein for each connector as a given connector, the high-speed signal pins for the given connector are located at a pair of ends of the given connector and the low-speed signal pins for the given connector are located within a middle of the given connector between the pair of ends.