Patent ID: 6949432

Claim:
A method of making a semiconductor device comprising: (a) providing a first region of semiconductor material of a first conductivity type wherein said first region is non-epitaxial; (b) etching a gate trench and a drain access trench within said first region; (c) forming a second semiconductor region within said first region, said second region being of said first conductivity type and having a higher dopant concentration than said first semiconductor region, and said second region extending from said gate trench to said drain access trench and being self-aligned to both said gate trench and said drain access trench; (e) forming a layer of gate dielectric material within said gate trench; (f) depositing a gate electrode within said gate trench adjacent said layer of gate dielectric material; (g) depositing a drain access region of conductive material within said drain access trench; (h) forming a body region within said first region above said second region and adjacent said gate trench, said body region having a second conductivity type opposite said first conductivity type; and (i) forming a source region of said first conductivity type above said body region and adjacent said gate trench.