Patent ID: 8255624

Claim:
A storage apparatus for providing a host system with a storage area, wherein user data is read from or written to the storage area, the storage apparatus comprising: one or more disk devices for providing the storage area; and a controller, wherein the controller comprises: a channel adapter serving as an interface with the host system; a disk adapter serving as an interface with the one or more disk devices; a processor for controlling reading/writing the user data from/to the one or more disk devices; and a cache memory for storing the user data sent and received between the channel adapter and the disk adapter and control data used by the processor, wherein the cache memory includes: a nonvolatile memory; a volatile memory; and a memory control circuit for controlling reading/writing the user data or the control data from/to the nonvolatile memory and the volatile memory, wherein the memory control circuit sorts and stores at least the control data in the nonvolatile memory when an update frequency of the control data is high and sorts and stores at least the control data in the volatile memory when the update frequency of the control data is low, wherein a determination of whether the update frequency is high or low is based on pre-designated information regarding a data type of the control data, wherein the memory control circuit comprises a nonvolatile memory control unit, which retains a mapping table that associates a first address with a second address, wherein the first address is an address of a storage area in the nonvolatile memory as recognized by the processor, and the second address is an address of the storage area in the nonvolatile memory as recognized by the nonvolatile memory control unit, and wherein when the nonvolatile memory control unit receives a packet including the first address, the nonvolatile memory control unit refers to the mapping table, converts the first address contained in the packet into the second address, and stores the user data or the control data, to which the first address is added at the position of the second address in the nonvolatile memory.