Patent ID: 8341565

Claim:
A computer-implemented method of optimizing a logic design, the method comprising: executing a parent process and a plurality of child processes on at least one processor; in the parent process, generating a set of objects from the logic design upon which to perform a transform; in each of the plurality of child processes: performing the transform on each of a subset of objects from the set of objects, including determining whether performance of the transform on each of the subset of objects has been successful; undoing the transform performed on each of the subset of objects regardless of whether performance of the transform has been successful; and notifying the parent process whether performance of the transform on each of the subset of objects has been determined to be successful; and in the parent process, performing the transform on each object for which the parent process has been notified that performance of the transform on such object has been determined to be successful, wherein performing the transform on each object for which the parent process has been notified that performance of the transform on such object has been determined to be successful includes determining whether performance of the transform on such object in the parent process has been successful, and if not, undoing the transform in the parent process.