Patent ID: 7154351

Claim:
A k-th order component generating circuit, comprising: a plurality i (i is an integer of 5 or more) of differential amplifiers for having a common linear input signal inputted to one input terminal, having a constant level signal of a predetermined level inputted to the other input terminal, outputting an reversed or non-reversed signal to the linear input signal and having a limiter function of limiting an output signal to predetermined maximum and minimum values; and a constant level signal generating circuit for providing the constant level signal to each of the i differential amplifiers, wherein: first, second and third differential amplifiers of the i differential amplifiers are set to have the constant level signals at increasingly higher levels inputted in order, and the output signals of the first and third differential amplifiers and those of the second differential amplifier are set to be of mutually reverse polarity; a fourth differential amplifier of the i differential amplifiers has the constant level signal to be inputted set as the signal at the same level as the constant level signal to be inputted to the second differential amplifier, and has the output signal thereof set to be of the same polarity as the output signals of the first and third differential amplifiers and also has a range of the input signal to be the maximum value and the input signal to be the minimum value set larger than that of the second differential amplifier; each of (i−4) differential amplifiers other than the first, second, third and fourth differential amplifiers of the i differential amplifiers has the constant level signal to be inputted set to be either lower than a level of the constant level signal to be inputted to the first differential amplifier or higher than a level of the constant level signal to be inputted to the third differential amplifier, and the output signals of the (i−4) differential amplifiers and those of the second differential amplifier are set to be of mutually reverse polarity; and thus constituted to form the output signal of the component of a k-th order function (k is an odd number of 3 or more) on adding up the output signals of the first, second, third and (i−4) differential amplifiers; and the fourth differential amplifier is constituted to form the output signal of a linear component for offsetting the linear component of the k-th order function component so as to generate the component of the k-th order function including no linear component by adding the output signals of the i differential amplifiers.