Patent ID: 6867069

Claim:
A method of making a plurality of semiconductor devices, comprising: preparing a semiconductor wafer having a first surface and a second surface opposite to the first surface, wherein a plurality of semiconductor chip regions are formed on the first surface of the semiconductor wafer and wherein an interval between the semiconductor chip regions neighboring each other is approximately equal to a cutting line having a dicing width; forming a plurality of electrodes on each of the semiconductor chip regions; preparing a wiring substrate having a first surface and a second surface opposite to the first surface of the wiring substrate, wherein a plurality of device mounting areas are defined on the first surface of the wiring substrate; mounting the semiconductor wafer on the wiring substrate so that the semiconductor chip regions and the device mounting areas face each other; filling a sealing resin between the semiconductor wafer and the wiring substrate, wherein the second surface of the semiconductor wafer and the second surface of the wiring substrate are exposed from the sealing resin; and dividing the semiconductor wafer and the wiring substrate at the cutting line into a plurality of the semiconductor devices, wherein the semiconductor devices each have a semiconductor chip and a divided wiring substrate, and wherein a peripheral edge of the semiconductor chip is aligned with a peripheral edge of the divided wiring substrate.