Patent ID: 7737023

Claim:
A method of manufacturing a semiconductor integrated circuit device, comprising steps of: (a) forming a first wiring over a semiconductor substrate, wherein the first wiring is formed of a copper-containing material as a main component; (b) forming a first insulating film over the first wiring; (c) forming a second insulating film over the first insulating film, wherein the second insulating film is formed of an organosiloxane as a main component, and wherein a thickness of the second insulating film is thicker than a thickness of the first insulating film; (d) forming a first patterned masking layer over the second insulating film; (e) after the step (d), forming a through hole in the second insulating film with the first patterned masking layer thereover, by plasma etching in a first gas atmosphere containing a fluorocarbon gas and a nitrogen gas; (f) after the step (e), removing the first patterned masking layer; (g) after the step (f), forming a second patterned masking layer over the second insulating film; (h) after the step (g), forming a trench in the second insulating film with the second patterned masking layer thereover, by plasma etching in a second gas atmosphere containing a fluorocarbon gas and a nitrogen gas, wherein a depth of the trench is shallower than a depth of the through hole; and (i) after the step (h), removing the first insulating film of the bottom of the through hole, thereby a surface of the first wiring is exposed.