Patent ID: 8594609

Claim:
A sub-harmonic mixer comprising, a first transistor having a source and a drain; a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor; a mixing transistor configured to be biased in a linear operating region, the mixing transistor having a drain coupled to the sources of the first transistor and the second transistor, the mixing transistor having its drain driven by a signal at twice a local oscillator (LO) frequency and its gate driven by a radio frequency (RF) signal while the mixing transistor is biased in the linear region such that a process of frequency doubling and mixing are performed simultaneously, wherein the drains of the first transistor and the second transistor are coupled to a transmission line stub to provide isolation between a doubled local oscillator (LO) frequency signal and an intermediate frequency (IF) signal and wherein the drains of the first transistor and the second transistor are coupled to a parallel RLC network to provide direct current (DC) bias and to tune out the IF signal.