Patent ID: 7933341

Claim:
A receiver comprising: a plurality of parallel analog-to-digital converters operable to convert an analog signal into a plurality of digital data streams; a plurality of parallel forward equalizers, each coupled to an output of one of the analog-to-digital converters to receive a digital data stream; and a plurality of parallel trellis decoders, each coupled to an output of one of the forward equalizers and operable to produce a decoded data stream, wherein the plurality of parallel trellis decoders are interleaved with respect to each other, wherein the plurality of trellis decoders comprises m trellis decoders operable to receive a block of n samples, and wherein a first of the plurality of trellis decoders processes the first n/m samples, a second of the plurality of trellis decoders processes the second n/m samples, and the mth trellis decoder processes the last n/m samples of the block of samples, wherein m and n are positive integers.