Patent ID: 7410871

Claim:
A method of manufacturing a split gate type flash memory device, the method comprising: forming a device-isolating insulating film defining an active region in a bulk silicon substrate; forming a disturbance-preventing insulating film in the active region; forming a silicon epitaxial layer on the active region of the bulk silicon substrate; and, forming a coupling insulating film on at least the silicon epitaxial layer; forming a floating gate and an inter-gate insulating film on the coupling insulating film; forming a tunneling insulating film on the floating gate; forming a source region with an outer portion overlapping the floating gate in the active region of the bulk silicon substrate and the silicon epitaxial layer using an ion implantation process; forming a control gate overlapping a portion of the floating gate opposite the source region such that the inter-gate insulating film and the tunneling insulating film are interposed between the control gate and the floating gate; and, forming a drain region in the silicon epitaxial layer and the active region of the bulk silicon substrate opposite the source region with respect to the disturbance-preventing insulating film.