Patent ID: 7485920

Claim:
A method of fabricating a semiconductor device comprising the steps of: a) providing a semiconductor die, having a semiconductor body with a top surface and a bottom surface, and a plurality of spaced PN junctions formed in said top surface thereof; b) creating a lattice defect region under at least one of said PN junctions and limited to an area below said at least one PN junction by particle beam implantation through said bottom surface, said lattice defect region comprising lattice defects having a varying concentration in said semiconductor body of said die at a predetermined depth below the top surface, said lattice defect region having a thickness within which the concentration of the lattice defects is between a maximum concentration level and a minimum concentration level; c) diffusing heavy metal atoms into the semiconductor die; and d) applying heat for a predetermined time sufficient to drive the heavy metal atoms into the lattice defects to form a region of lattice defect and heavy metal diffusion that has a concentration profile which ranges between a minimum level and a maximum level; wherein said at least one PN junction is disposed between two other PN junctions, and wherein said lattice defect region does not extend to regions below said two other PN junctions.