Patent ID: 8688896

Claim:
A memory controller for controlling writing of data to a nonvolatile memory, the memory controller comprising: a host IF unit that transmits and receives a command for controlling data writing to the nonvolatile memory, to or from an external unit; a high-speed writing preparation unit that sets a mode of data writing to the nonvolatile memory to a high-speed writing mode when the host IF unit receives a high-speed writing preparation command instructing to prepare for performing a data writing process in the high-speed writing mode, the high-speed writing preparation command being a different command from a write command for writing data to the nonvolatile memory, from the external unit; a high-speed writing processing unit that sequentially records write-target data to be written to the nonvolatile memory that has been received by the host IF unit from the external unit into a physical block of the nonvolatile memory from which data has been erased without using a logical address indicating a recording position of the write-target data when the mode of data writing is set to the high-speed writing mode; and a data relocation unit that relocates, based on the logical address, the data that has been recorded into the physical block by the high-speed writing processing unit into a physical block corresponding to the logical address when the host IF unit receives a command indicating termination of the high-speed writing mode from the external unit.