Patent ID: 7260700

Claim:
A method for allowing native, functional, and test configurations of a memory to be independent of one another, comprising: providing a memory having a native configuration including k words and n data output pins, each of said k words having a width of n bits, k and n being positive integers; connecting said n data output pins to a programmable multiplexer for multiplexing said n data output pins into at least one group of data output pins of said programmable multiplexer, each of said at least one group of data output pins having no more than n data output pins and being suitable for enabling said memory to have at least one of a test configuration or a functional configuration; and selecting a group of data output pins from said at least one group of data output pins where said selected group of data output pins have m data output pins, so that said memory has a test configuration including t words, each of said t words having a width of m bits, m being an positive integer not greater than n, t being a positive integer; and connecting test logic to input pins of said memory to test said memory in said test configuration.