Patent ID: 8071462

Claim:
A method of forming an isolation structure in a semiconductor substrate of a first conductivity type, the substrate not comprising an epitaxial layer and having a top surface, the method comprising: implanting a dopant of a second conductivity type opposite to the first conductivity type through the top surface of the substrate to form a floor isolation region, the dopant being implanted with sufficient energy such that an upper junction of the floor isolation region is located below the top surface of the substrate; forming a mask layer directly on the top surface of the substrate, the mask layer being in physical contact with the substrate; patterning the mask layer to form an opening in the mask layer; etching the substrate through the opening in the mask layer to form an annular trench in the substrate, a bottom of the annular trench being located above the floor isolation region; implanting a dopant of the second conductivity type through the opening in the mask layer and through the bottom of the trench to form a sidewall isolation region, the sidewall isolation region extending downward at least to the floor isolation region; and after implanting the dopant of the second conductivity type to form a sidewall isolation region, depositing a layer of dielectric material so as to fill the annular trench with the dielectric material and to form an isolated pocket of the substrate.