Patent ID: 7202115

Claim:
A method of manufacturing a thin film transistor comprising the steps of: (e) laminating a first insulating buffer layer, a first silicon layer, a second insulating buffer layer and a second silicon layer on an insulating substrate in a recited order from a bottom; (f) removing said second silicon layer and said second insulating buffer layer in a first area to expose said first silicon layer; (g) patterning a lamination structure of said second insulating buffer layer and said second silicon layer in a second area; (h) applying a pulsated laser beam to said exposed first silicon layer in the first area to crystallize said first silicon layer in the first area; (i) applying a continuously oscillating laser beam to said patterned second silicon layer in the second area to melt, solidify and crystallize said second silicon layer in the second area; and (j) forming thin film transistors by using said crystallized first and second silicon layers.