Patent ID: 7864910

Claim:
A phase looked loop, comprising: a phase detector; an oscillator which generates an output signal; a frequency divider for dividing the output signal based on a variable input code for determining a dividing integer which is input to said phase detector as a feedback signal; an encoding unit for-encoding the input code to generate an encoded code a plurality of signals, each being one of a logic high and a logic low based on the input code; a loop filtering unit including a plurality of selecting units, each of said selecting units having a plurality of inputs which correspond to said plurality of signals and a plurality of series connected resistors and series connected capacitors, each corresponding to said plurality of inputs, wherein each of said capacitors and resistors operates according to the logic level of the signal provided to its corresponding selecting unit input, wherein said loop filtering unit receives an input signal based on an output from said phase detector and filters said received input signal based on an operating state of said resistors and capacitors, and provides said filtered received signal to said oscillator; wherein the loop filtering unit further comprises: a plurality of first transmission gates in series wherein the first transmission gates correspond to the first capacitors; a plurality of second transmission gates in series wherein the second transmission gates correspond to the second capacitors; and a plurality of third transmission gates in series wherein the third transmission gates correspond to the resistors; and further wherein the plurality of series connected capacitors comprises: a plurality of first capacitors in series; a plurality of second capacitors in series wherein the second capacitors are coupled to the first capacitors in parallel and coupled to the resistors in series.