Patent ID: 7120836

Claim:
A method for processing cache memory accesses in a computing system having a requester to submit memory access addresses for requested data, and having a tag memory to store tag addresses corresponding to addresses stored in the cache memory, the method comprising: retrieving a stored tag address from the tag memory in response to the requester submitting a memory access address; performing a first comparison of only the memory access address to the stored tag address, without regard to any error correction code associated with the stored tag address, to determine whether the requested data is stored in the cache memory and storing in a first latch a result of the first comparison; monitoring for an error in the stored tag address contemporaneously with the first comparison of the memory access address and the stored tag address and storing in a second latch a result of the monitoring for errors, wherein monitoring for errors in the stored tag address comprises identifying at least one error using a single error correction code associated with the stored tag address in the tag memory, wherein the single error correction code is coded to provide error detection for the stored tag address and a plurality of configuration fields; if a tag address error is detected in the stored tag address, blocking output from the first latch in response to output from the second latch, correcting the tag address error using an error correction code associated with the stored tag address, and performing a second comparison of the memory access address and the corrected tag address to determine whether the requested data is stored in the cache memory, wherein the second comparison compares only the corrected tag address with the memory access address, and disregards comparison of any stored error correction code bits; and if no tag address error is detected in the stored tag address, passing output from the first latch in response to output from the second latch to determine whether the requested data is stored in the cache memory.