Patent ID: 8148181

Claim:
A method for manufacturing a flat display device, the method comprising: providing a substrate divided into an active region, a peripheral region, and a pad region, wherein the active region includes a plurality of pixel regions, and the peripheral region includes a plurality of dummy pixel regions around the active region; forming a metal layer on the substrate, and forming a gate electrode, a common electrode, a dummy common electrode, a gate line, a common line, and a gate pad using a photolithography method including a mask; forming a gate insulating layer, an amorphous silicon layer, a doped amorphous silicon layer, and another metal layer on the substrate including the gate electrode, and forming a channel layer, source and drain electrodes, a storage electrode, a data line, a dummy data line, a dummy storage electrode and a data pad using a photolithography method including one of a diffraction mask and a half-tone mask; forming a first passivation layer, a dielectric layer, and a second passivation layer on the substrate including the source and drain electrodes, and removing portions of the dielectric layer corresponding to the gate pad and the data pad while forming first and second contact holes on the storage electrode and the dummy storage electrode respectively; and forming a transparent conductive material on the substrate including the first and second contact holes, and forming a pixel electrode, a dummy pixel electrode, a gate pad electrode, and a data pad electrode using a photolithography method including a mask, wherein the dummy pixel electrode is integrally formed on the dummy pixel regions of the peripheral region, and wherein the dummy storage electrode is branched off from the dummy data line and is formed in each of the dummy pixel regions of the peripheral region.