Patent ID: 7084453

Claim:
A method of making an electrically programmable and erasable memory device, comprising: forming an electrically conductive floating gate disposed over and insulated from a memory area of a substrate; forming an insulating layer that has a first portion formed over the memory area of the substrate and a second portion formed over a peripheral area of the substrate, wherein the insulating layer first portion has a thickness permitting Fowler-Nordheim tunneling of charges therethrough; changing a thickness of one of the insulating layer first and second portions such that the insulating layer first and second portions have unequal thicknesses; forming an electrically conductive control gate disposed adjacent to the floating gate and insulated therefrom by the first portion of the insulating layer; and forming an electrically conductive poly gate disposed over the peripheral area of the substrate and insulated therefrom by the second portion of the insulating layer.