Patent ID: 8661455

Claim:
A method of performance event triggering through direct interthread communication (‘DITC’), the method implemented on a network on chip (‘NOC’), the NOC comprising integrated processor (‘IP’) blocks distributed throughout the NOC, routers, memory communications controllers, and network interface controller, each IP block adapted to a router through a memory communications controller and a network interface controller, each memory communications controller controlling communication between an IP block and memory, and each network interface controller controlling inter-IP block communications through routers, the method comprising: enabling performance event monitoring for performance-specific intrablock events occurring within an IP block of the IP blocks distributed throughout the NOC, each IP block using one or more event counters positioned within the IP block to count the performance-specific intrablock events; collecting performance results from the one or more event counters; returning performance counting results from the one or more event counters to a destination repository, the returning being initiated by a triggering event occurring within the NOC and the returning including routing a collection packet through the IP block of the IP blocks, wherein the IP block of the IP blocks adds its performance counting results to the collection packet; and wherein if the collection packet is parallelized at a pipeline stage within the IP block of the IP blocks, a stage instance identifier is associated with a stage instance result, the stage instance identifier also being added with its associated stage instance result to the collection packet.