Patent ID: 7864618

Claim:
A device comprising: first and second banks that are elongated in a first direction and substantially parallel to each other; each of said first and second banks including a plurality of memory cell arrays that are arranged in line in the first direction, said memory cell arrays forming a plurality of first blocks that each includes one of said memory cell arrays of said first bank and one of said memory cell arrays of said second bank, wherein said one of the memory cell arrays of the first bank and said one of the memory cell arrays of the second bank in each of said first blocks are arranged in a second direction substantially perpendicular to the first direction; and a plurality of sets of first DQ pads, each of said sets of first DQ pads being in line with an associated one of said first blocks in the second direction and each of said sets of first DQ pads being electrically connected to said memory cell arrays of the associated one of said first blocks.