Patent ID: 8378935

Claim:
A display device having a pixel comprising a first transistor, a second transistor, a third transistor, a capacitor, a first wiring, a second wiring, a third wiring, a fourth wiring, a fifth wiring, a sixth wiring, and a light emitting display element, wherein one of a source and a drain of the first transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to the fifth wiring, wherein a gate of the first transistor is electrically connected to the third wiring, wherein one of a source and a drain of the second transistor is electrically connected to the second wiring, wherein the other of the source and the drain of the second transistor is electrically connected to the light emitting display element, wherein a gate of the second transistor is electrically connected to the fifth wiring, wherein one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor and the fifth wiring, wherein the other of the source and the drain of the third transistor is electrically connected to the fourth wiring through the sixth wiring, wherein a gate of the third transistor is electrically connected to the fourth wiring, wherein one electrode of the capacitor is electrically connected to the gate of the second transistor, wherein the other electrode of the capacitor is electrically connected to the one of the source and the drain of the second transistor, wherein the first wiring, the second wiring, the fifth wiring, and the sixth wiring are formed using a first same wiring layer, wherein the third wiring and the fourth wiring are formed using a second same wiring layer which is different from the first same wiring layer, wherein a semiconductor layer in the first transistor and a semiconductor layer in the third transistor are included in a first same semiconductor layer, wherein the gate of the first transistor is included in the third wiring, wherein the gate of the third transistor is included in the fourth wiring, and wherein the fifth wiring intersects with the fourth wiring and does not intersect with the third wiring, wherein the first wiring correspond to a signal line, the second wiring correspond to a power source line, the third wiring correspond to a first gate line and the fourth wiring correspond to a second gate line, and wherein the third transistor functions as a diode.