Patent ID: 7968396

Claim:
A semiconductor device, comprising: an insulating layer; a semiconductor layer formed on the insulating layer, the semiconductor layer including a channel region and defining a first crystal face and a second crystal face; a gate insulating film disposed on the semiconductor layer; a gate electrode disposed on the gate insulating film; a source layer including a first alloy layer or a first metal layer, and having a bottom surface, the bottom surface of the source layer being in contact with the insulating layer, the source layer defining a joint surface of the source layer adjacent to the channel region disposed along the first crystal face of the semiconductor layer; a drain layer including a second alloy layer or a second metal layer, and having a bottom surface, the bottom surface of the drain layer being in contact with the insulating layer, the drain layer defining a joint surface of the drain layer adjacent to the channel region disposed along the second crystal face of the semiconductor layer; a first impurity doped layer along an interface of the first alloy layer or the first metal layer of the source layer, and the semiconductor layer; and a second impurity doped layer along an interface of the second alloy layer or the second metal layer of the drain layer, and the semiconductor layer, the first crystal face and the second crystal face being (111) plane.