Patent ID: 8013424

Claim:
A semiconductor device, comprising: a semiconductor substrate; a gate electrode formed on the semiconductor substrate via a gate insulating film; a channel region formed in a region of the semiconductor substrate below the gate electrode; an epitaxial crystal layer containing a conductive impurity, which is formed sandwiching the channel region and has a function as a source region and a drain region, and formed on a recess in the semiconductor substrate, each of the source and drain regions including first and second regions divided by a boundary plane perpendicular to a channel direction; and a growth suppressing portion formed on the recess in the semiconductor substrate, and configured to suppress an epitaxial growth of a crystal in the epitaxial layer from the semiconductor substrate; wherein the first region is located on a channel region side, and has a conductive impurity concentration continuously increasing with a distance from the channel region in the channel direction; the second region has a conductive impurity concentration which is constant in the channel direction; the conductive impurity concentration in the first region and the conductive purity concentration in the second region are equal at the boundary plane; conductive impurity concentrations in the source and drain regions are lowest at a first edge of the first region on the channel region side, and highest at a second edge of the second region on an opposing side of the channel region side; the epitaxial crystal layer is formed on the recess via the growth suppressing portion so as to epitaxially grow only in the channel direction from the first edge of the first region; and the epitaxial crystal layer is formed to epitaxially grow so that the conductive impurity concentration in the first region continuously increases with the distance from the channel region in the channel direction, and the conductive impurity concentration in the second region is constant in the channel direction.