Patent ID: 7525470

Claim:
A system comprising: a plurality of interleaved analog-to-digital converters, each associated with a corresponding conversion rate at which an input analog signal is converted to an output digital signal; a timing recovery module configured to receive the output digital signals and configured to determine a sampling phase, based thereon, the timing recovery module comprising a coarse timing recovery module configured to determine a coarse sampling phase associated with all of the analog-to-digital converters, and a fine timing recovery module configured to individually determine a fine sampling phase for each of the analog-to-digital converters, wherein the timing recovery module is configured to output a plurality of interpolator control signals, each corresponding to one of the plurality of analog-to-digital converters and generated based on the coarse sampling phase and a corresponding fine sampling phase; a plurality of interpolators corresponding to the plurality of analog-to-digital converters, each configured to receive a corresponding one of the interpolator controller signals and output a corresponding splitter control signal; and a splitter configured to receive the splitter control signals and configured to sample the input analog signal at an interval determined by the corresponding splitter control signals to thereby output individual analog signals to corresponding analog-to-digital converters.