Patent ID: 6888222

Claim:
A semiconductor device, comprising: a first semiconductor chip that includes a first main surface, a second main surface which is located on the reverse side of the first main surface and whose surface area is larger than that of the first main surface, and a side wall surface that connects between the first and second main surfaces; a first pad provided on the first main surface of the first semiconductor chip; a semiconductor chip carrying portion that includes a third main surface which faces the second main surface of the first semiconductor chip and which has a first region and a second region that surrounds the first region, and a fourth main surface which is located on the reverse side of the third main surface; a first wiring layer which is electrically connected to the first pad and which extends from the first pad, along the first main surface and the side wall surface, to above the second region; an external terminal which is provided over the second region and electrically connected to the first pad via the first wiring layer; and a post portion, which is provided on the first wiring layer.