Patent ID: 7783809

Claim:
A method comprising: transmitting from an input/output control hub (ICH) to one or more destination processors via a host controller a first set of one or more bits each of which correspond to a pin defined to provide the functionality not included in a physical interface of the ICH, wherein the first set of bits are included in a first message also having a first field to indicate whether the message is directed to a selected destination processor or to all of the one or more destination processors; transmitting from the ICH to the selected processor or all of the one or more destination processors second set of one or more bits each of which correspond to a change in a respective bit in the first set of one or more bits; and receiving, with the ICH, one or more acknowledgement messages from the selected processor or all of the one or more destination processors that acknowledge receiving the second set of one or more bits, wherein the one or more acknowledgement messages indicate that the one or more destination processors have asserted a signal of a corresponding pin not included in the physical interface of the ICH.