Patent ID: 8154901

Claim:
A memory module comprising: a printed circuit board comprising at least one connector configured to be operatively coupled to a memory controller of a computer system; a plurality of memory devices on the printed circuit board; a circuit, comprising: a first set of ports comprising a plurality of bi-directional ports, each port of the first set of ports operatively coupled to at least one memory device of the plurality of memory devices; and a second set of ports comprising one or more bi-directional ports, each port of the second set of ports operatively coupled to the at least one connector; and a switching circuit configured to selectively operatively couple one or more ports of the second set of ports to one or more ports of the first set of ports, wherein the one or more ports of the first set of ports and the one or more ports of the second set of ports each comprises a correction circuit which reduces noise in one or more signals transmitted between the one or more ports of the first set of ports and the one or more ports of the second set of ports, wherein the correction circuit comprises at least one coarse correction element to provide coarse correction of the noise and wherein the correction circuit further comprises at least one fine correction element to provide fine correction of the noise.