Patent ID: 7675120

Claim:
A composite integrated circuit incorporating a first and a second semiconductor device, comprising: (a) a substrate of a semiconductor material having a first and a second opposite major surface, the substrate having defined therein a first region of a first conductivity type exposed at the second major surface of the substrate, a second region of a second conductivity type, opposite to the first conductivity type, formed on the first substrate region and exposed at the first major surface of the substrate, a third region of the first conductivity type formed in the second substrate region, a fourth region of the second conductivity type formed in the third substrate region, the second, third and fourth substrate regions being all for the first semiconductor device, an additional region of the second conductivity type formed on the first substrate region for the second semiconductor device, and separator means for electrically isolating the first and the second semiconductor device from each other; (b) a first electrode formed on the first major surface of the substrate and electrically coupled to the fourth region of the substrate; (c) a second electrode formed on the first major surface of the substrate and electrically coupled to the second region of the substrate; (d) control means formed on the third region of the substrate for controlling current flow between the first and the second electrode; (e) an insulating layer formed on the first major surface of the substrate; (f) a resistor formed on the insulating layer and electrically coupled to the second electrode; and (g) a bonding pad on the resistor, the bonding pad being connected to the first major surface of the substrate via the resistor and the second electrode and being not directly connected to the first major surface of the substrate, wherein the resistor is connected between the bonding pad and the second electrode.