Patent ID: 7633477

Claim:
A gate driver using a multiple power supplies voltages and having a shift resister comprising a plurality of stages sequentially outputting shifted signals, each of the stages including: a first controller for controlling a first node voltage in response to an output signal from a previous stage and an output signal from a next stage; a second controller for controlling second and third nodes voltages in response to the output signal from the previous stage and the voltage at the first node; and an output unit for selectively outputting one of a plurality of clock signals and a first power supply voltage in response to the voltages at the first, second and third nodes, wherein second and third power supply voltages different from each other change their polarities at n frame periods(where n is a positive integer) and are supplied to the second and third nodes, wherein each of the second and third power supply voltages oscillates between a high voltage and a low voltage, and the second and third power supply voltages different from each other are switched be supplied to the second and third nodes, wherein the low voltage is lower than or equal to the voltage of the first power supply, wherein the high voltage is higher than the voltage of the first power supply, wherein the first controller comprises a first transistor for supplying a fourth power supply voltage to the first node in response to the output signal from the previous stage, a second transistor for supplying the first power supply voltage to the first node in response to the voltage at the second node, a third transistor for supplying the first power supply voltage to the first node in response to the voltage at the third node and a fourth transistor for supplying the first power supply voltage to the first node in response to the output signal of the next stage.