Patent ID: 8042087

Claim:
A computer implemented method to design a Networks on Chips-based communication system for connecting on-chip components in a multicore system, said multicore system comprising processors, and hardware blocks communicating through the communication system, said communication system comprising at least switches, said communication system supporting different types of messages, said method comprising the steps of: obtaining predefined communication characteristics modeling the applications running on the multicore system; establishing the number and configuration of switches to connect the elements; establishing physical connectivity between the elements and the switches for an associated first message type; for each of at least two pairs of communicating elements: a. defining on a computer a communication path comprising a sequence of switches to be traversed to connect the aforementioned pair of communicating elements; b. calculating on a computer metrics as affected by the need to render said path into physical connectivity, said metrics being selected among one or a combination of power consumption of the involved switches, area of the involved switches, number of inputs and outputs of the involved switches, total length of wires used, maximum possible speed of operation of the system and number of switches to be traversed, taking into account any previously defined physical connectivity, wherein the calculating includes considering the establishment of alternate physical connectivity if the previously established physical connectivity is associated with a first message type different from a current message type; c. iterating on a computer the steps a and b for a plurality of possible paths; d. choosing on a computer the path having the optimal metrics; and e. establishing on a computer any missing physical connectivity between the switches so that the selected optimal path occurs across physically connected switches.