Patent ID: 8153463

Claim:
A method of manufacturing a thin film transistor, the method comprising: a first process of forming a gate line pattern including a gate line and a gate electrode with a first conductive material on a substrate using a first mask; a second process of forming a first insulating layer on the substrate and forming a data line pattern including a data line, a source electrode, and a drain electrode with a second conductive material on the insulating layer using a second mask; and a third process of forming a second insulating layer on the substrate and forming a pixel electrode connected to the drain electrode with a third conductive material on the second insulating layer, wherein the third process further comprises: forming a sacrificial layer on the second insulating layer; forming a photoresist layer on the sacrificial layer; exposing the photoresist layer to a light and developing the photoresist layer to form a photoresist layer pattern: partially removing the sacrificial layer and the second insulating layer using the photoresist layer pattern as a mask to partially expose the drain electrode; etching the substrate to form an undercut on the sacrificial layer under the photoresist layer pattern; forming a pixel electrode layer with the third conductive material over an entire surface of the substrate; and removing the photoresist layer pattern and the pixel electrode layer on the photoresist layer pattern to form the pixel electrode.