Patent ID: 8386713

Claim:
A memory apparatus comprising: a nonvolatile memory configured to allow data to be written thereto and read therefrom in units of a cluster and to permit data to be deleted therefrom in units of a block made up of a plurality of sectors; and a control circuit configured to control access operations to said nonvolatile memory; wherein said nonvolatile memory includes a management area in which to record management information, a user data area in which to record data from a user, and a cache area in which to hold temporarily data to be written and read to and from said user data area; and said management area includes a logical/physical table which stores the addresses of logical blocks in said user data area in association with the addresses of physical blocks allocated to said logical blocks, and the addresses of physical blocks in said cache area which correspond to the addresses of said physical blocks in said logical/physical table; wherein, upon writing of data of which the size is smaller than a designated logical size constituting a logical space size in units of a plurality of sectors in a user block in said user data area, said control circuit saves said data into a suitably selected cache block while writing part of the management information into the cache block which retains said data, said control circuit determines whether additional data can be written to the selected cache block in view of said management information in the cache block and, if it is found possible to write additional data to said cache block, said control circuit updates said management information in said management area of the nonvolatile memory before writing additional management information to said cache block and adding the write data to said cache block.