Patent ID: 7471270

Claim:
A display controller for controlling first and second data drivers that drive data lines of a display panel including a plurality of scan lines and the data lines, the display controller comprising: a blanking adjustment signal generation section that generates first and second horizontal blanking adjustment signals for respectively setting first and second horizontal blanking periods, the display controller outputting first and second latch pulse signals to the first and second data drivers during the first and second horizontal blanking periods, respectively, the first and second latch pulses respectively specifying first and second start timings of one horizontal scan period; first and second horizontal blanking period setting registers in which periods from the first and second start timings of one horizontal scan period changes of the first and second horizontal blanking adjustment signals are respectively set; and a grayscale clock signal generation section that generates a first grayscale clock signal and a second grayscale clock signal, the first grayscale clock signal having first to N-th grayscale pulses within a predetermined period specified by the first horizontal blanking adjustment signal, where N is an integer larger than one, and the second grayscale clock signal having first to N-th grayscale pulses within a predetermined period specified by the second horizontal blanking adjustment signal, the blanking adjustment signal generation section changing the first horizontal blanking adjustment signal when a period corresponding to a value set in the first horizontal blanking period setting register has elapsed from the first start timing, and changing the second horizontal blanking adjustment signal when a period corresponding to a value set in the second horizontal blanking period setting register has elapsed from the second start timing, and the display controller outputting the first horizontal blanking adjustment signal and the first grayscale clock signal to the first data driver that drives the data lines by using a signal that has been pulse-width-modulated based on the first horizontal blanking adjustment signal and the first grayscale clock signal, and outputting the second horizontal blanking adjustment signal and the second grayscale clock signal to the second data driver that drives the data lines by using a signal that has been pulse-width-modulated based on the second horizontal blanking adjustment signal and the second grayscale clock signal.