Patent ID: 7741213

Claim:
A method of producing a semiconductor device, comprising the steps of: forming a first interlayer insulating film on a substrate; forming an opening in the first interlayer insulating film, the opening penetrating the first interlayer insulating film, so as to expose a first conductive region formed on the substrate; forming a second conductive region in the opening in such a manner that the second conductive region has an upper surface located in a higher position than a third conductive region that is formed on the substrate; forming a second interlayer insulating film on the first interlayer insulating film, so as to cover the second conductive region; forming a wiring groove in the second interlayer insulating film, the wiring groove exposing the upper surface of the first interlayer insulating film, so as to expose the second conductive region; forming a contact hole or a plurality of contact holes in the wiring groove by etching the first interlayer insulating film, so as to expose the third conductive region; filling the wiring groove, including the contact hole or the plurality of contact holes, with a conductive material; and forming a wiring pattern made of the conductive material in the wiring groove, and a contact plug or a plurality of contact plugs made of the conductive material in the contact hole or in the plurality of contact holes, after removing the conductive material on the second interlayer insulating film by a chemical mechanical polishing technique.