Patent ID: 8716756

Claim:
A semiconductor device comprising: a substrate; a nitride semiconductor layer formed above the substrate and having a laminated structure including at least three layers; a heterojunction bipolar transistor formed in a first region of the nitride semiconductor layer; a field-effect transistor formed in a second region of the nitride semiconductor layer, the second region being different from the first region in which the heterojunction bipolar transistor is formed, wherein: the nitride semiconductor layer includes: a first nitride semiconductor layer formed above the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer; and an isolation region which separates each of the first nitride semiconductor layer and the second nitride semiconductor layer into the first region in which the heterojunction bipolar transistor is formed and the second region in which the field-effect transistor is formed, the first region and the second region being electrically isolated from each other, a collector electrode of the heterojunction bipolar transistor is electrically connected to the first nitride semiconductor layer in the first region, a base electrode of the heterojunction bipolar transistor is electrically connected to the second nitride semiconductor layer in the first region, an emitter electrode of the heterojunction bipolar transistor is electrically connected to the third nitride semiconductor layer in the first region, a source electrode and a drain electrode of the field-effect transistor are electrically connected to one of the first nitride semiconductor and the second nitride semiconductor layer in the second region, and a gate electrode of the field-effect transistor is formed on one of the first nitride semiconductor and the second nitride semiconductor layer in the second region.