Patent ID: 8218676

Claim:
A circuit for use with an amplification circuit having: a predistortion datapath portion, a power amplifier portion, and a gain portion, the predistortion datapath portion being operable to output a predistorted signal based on an input signal, the power amplifier portion being operable to output an amplified signal based on the predistorted signal, the gain portion being operable to output a gain output signal based on the amplified signal, said circuit comprising: a digital predistortion adaptation portion operable to output a predistortion adaptation portion update signal to the predistortion datapath portion; and a combiner operable to output an error signal to the digital predistortion adaptation portion, wherein an input of the combiner is coupled to both an output of the digital predistortion datapath portion and an input of the power amplifier portion, wherein the digital predistortion adaptation portion receives three inputs: a) the input signal, b) the gain output signal, and c) the error signal, wherein the error signal is an output of the combiner, and the digital predistortion adaptation portion trains the predistortion datapath portion based on the three inputs.