Patent ID: 7009607

Claim:
A transform system for graphics processing, comprising: (a) an input buffer adapted for being coupled to a vertex attribute buffer for receiving vertex data therefrom; (b) a multiplication logic unit having a first input coupled to an output of the input buffer; (c) an arithmetic logic unit having a first input coupled to an output of the multiplication logic unit; (d) a register unit having an input coupled to an output of the arithmetic logic unit; (e) an inverse logic unit including an input coupled to the output of the arithmetic logic unit or the register unit for performing an inverse or an inverse square root operation; (f) a conversion module coupled between an output of the inverse logic unit and a second input of the multiplication logic unit, the conversion module adapted to convert scalar vertex data to vector vertex data; (g) memory coupled to the multiplication logic unit and the arithmetic logic unit, the memory having stored therein a plurality of constants and variables for being used when processing the vertex data; and (h) an output converter coupled to the output of the arithmetic logic unit and adapted for being coupled to a lighting module to output the processed vertex data thereto.