Patent ID: 7767568

Claim:
A method of manufacturing a phase change memory device, comprising: forming an interlayer insulating layer on a substrate; forming a first contact hole and a second contact hole both passing through the interlayer insulating layer; forming a first electrode having a first surface; forming a second electrode having a second surface at a different level from the first surface, wherein the second electrode is spaced apart from the first electrode on the interlayer insulating layer; forming a first phase change pattern in contact with the first surface of the first electrode; and forming a second phase change pattern in contact with the second surface of the second electrode, wherein the first surface and the first phase change pattern are formed in the first contact hole and the second surface and the second phase change pattern are formed in the second contact hole, wherein forming the first and second electrodes includes: forming a lower electrode layer that fills the first and second contact holes, the lower electrode layer being formed over the substrate, planarizing the lower electrode layer, forming a first preliminary electrode filling the first contact hole, forming a second preliminary electrode filling the second contact hole, forming a sacrificial electrode on the second preliminary electrode, and etching-back the first preliminary electrode, the sacrificial electrode and the second preliminary electrode.