Patent ID: 8039994

Claim:
A method for the reduction of inrush current to an electrical load due to voltage sags on an input power voltage, comprising the steps of: providing a current-limiting circuit coupled between the input power voltage and the electrical load, the current-limiting circuit comprising a parallel arrangement of (a) a relay and (b) a semiconductor switch; applying the input power voltage to the electrical load through the current-limiting circuit; detecting a sag in the input power voltage during steady-state operation of the electrical load; in response to detecting a sag in the input power voltage, actuating the relay to disconnect the input power voltage from the electrical load; subsequent to the disconnection of the input power voltage from the electrical load, detecting that the input power voltage has returned to a nominal voltage; in response to detecting return of the input power voltage to the nominal voltage, detecting a predefined point in the power voltage cycle; in response to detecting the predefined point in the power voltage cycle, reconnecting the input power voltage to the electrical load through the semiconductor switch; and subsequent to the reconnection of the input power voltage to the electrical load through the semiconductor switch, actuating the relay to reconnect the input power voltage to the electrical load.