Patent ID: 8829949

Claim:
A driving circuit for at least one voltage controlled power switch device, comprising: a driver signal generating circuit configured to receive a pulsed signal and to generate a logical pulse signal as: a first driving signal in response to a rising edge of said pulsed signal a second driving signal in response to a falling edge of said pulsed signal; at least one trigger signal generating circuit, each trigger signal generating circuit configured to generate a trigger signal for said at least one voltage controlled power switch device, said at least one trigger signal generating circuit comprising: a first driving transistor configured to be switched on by the first driving signal such that an on-voltage of the trigger signal is supplied to a control electrode of said at least one voltage controlled power switch device, and a second driving transistor configured to be switched on by the second driving signal such that an off-voltage of the trigger signal is supplied to the control electrode of said at least one voltage controlled power switch device; and at least one energy buffer component coupled between the at least one trigger signal generating circuit and the control electrode of said at least one voltage controlled power switch device, wherein each of said at least one energy buffer component is adapted to: store signal energy of the trigger signal until a threshold voltage of said at least one voltage controlled power switch device is reached, and to release the stored signal energy to said control electrode of said at least one voltage controlled power switch device when said threshold voltage of said power switch device has been reached, wherein the signal energy stored in said at least one energy buffer component provides a voltage oversway on the control electrode of said at least one voltage controlled power switch device which accelerates switching transitions between on and off states of said at least one voltage controlled power switch device, wherein the driver signal generating circuit is adapted to add maintenance pulses to said first driving signal in case that said pulsed signal is stable in an active state and to add maintenance pulses to said second driving signal in case that said pulsed signal is stable in an non-active state, and wherein first driving signal and second driving signal are not active at the same time.