Patent ID: 8310307

Claim:
An amplifying circuit comprising: a first stage amplifying circuit for amplifying a first input signal to be input into an inverting input terminal and a second input signal to be input into a non-inverting input terminal, and for outputting a first stage amplification signal, wherein the first stage amplifying circuit includes a first transistor forming a first emitter follower circuit whose input is a positive component of the first input signal, a predetermined first potential being applied to a collector of the first transistor, a second transistor forming a second emitter follower circuit whose input is a negative component of the first input signal, a predetermined second potential being applied to a collector of the second transistor, a third transistor forming a third emitter follower circuit whose input is a positive component of the second input signal, a predetermined third potential being applied to a collector of the third transistor, a fourth transistor forming a fourth emitter follower circuit whose input is a negative component of the second input signal, a predetermined fourth potential being applied to a collector of the fourth transistor, a fifth transistor having an emitter to be connected to an output of the first emitter follower circuit, a base to be connected to an output of the third emitter follower circuit, and a collector to which an electric potential of a positive power source is applied via a first collector resistor and from which a positive component of the first stage amplification signal is output, and a sixth transistor having an emitter to be connected to an output of the second emitter follower circuit, a base to be connected to an output of the fourth emitter follower circuit, and a collector to which an electric potential of a negative power source is applied via a second collector resistor and from which a negative component of the first stage amplification signal is output.