Patent ID: 7667287

Claim:
A thin film transistor (TFT) substrate comprising: a gate line and a data line defining a pixel region; a pixel electrode formed in the pixel region; and a TFT including a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode connected to the pixel electrode, and a polysilicon active layer defining a channel between the source electrode and the drain electrode, wherein the polysilicon active layer comprises: a channel region on which the gate electrode is superposed; source and drain regions respectively connected to the source and drain electrode; and at least two lightly doped drain (LDD) regions formed between the source region and the channel region and between the drain region and the channel region, the LDD regions having an impurity concentration different from each other, wherein the gate electrode includes a first gate electrode superposed on the channel region, and a second gate electrode completely covering the first gate electrode and having a width larger than a width of the first gate electrode.