Patent ID: 8101447

Claim:
A method for fabricating the light emitting diode element comprising steps: (a) providing a substrate, forming a passivation layer on said substrate and defining a plurality of polygonal etch areas; (b) etching said substrate to form on said etch areas a plurality of basins, each basin including inclined natural crystal planes inwardly extended from a surface of said substrate and a bottom plane, parallel to said surface of said substrate, connected to the inclined planes, and pattern-etching said bottom plane of said basin to obtain a rugged surface; (c) forming a light emitting diode structure on said bottom plane of said basin via epitaxially growing on said bottom plane in said basin an n-type III-V group compound layer, an active layer and a p-type III-V group compound layer in sequence, wherein said active layer is interposed between said n-type III-V group compound layer and said p-type III-V group compound layer and functions as a light emitting zone; (d) vapor-depositing a p-type ohmic contact metal layer on said p-type III-V group compound layer, and connecting said p-type ohmic contact metal layer with a heat-conduction substrate; (e) removing said substrate; (f) vapor-depositing an n-type ohmic contact metal layer on said n-type III-V group compound layer to allow the said n-type III-V group compound layer to be interposed between said n-type ohmic contact electrode and said substrate; and (g) cutting and splitting the total structure into light emitting diode chips.