Patent ID: 7103624

Claim:
A binary data comparison method comprising: (a) receiving all 4 bits of each of a first binary data A 3 A 2 A 1 A 0 and a second binary data B 3 B 2 B 1 B 0 in a binary comparator circuit; and (b) comparing the first binary data and the second binary data received by the binary comparison circuit to determine which of the first binary data and the second binary data is larger according to the following equation: F ( A≦B )= A 3 ′·B 3 +( A 3 ′+B 3 )·{ A 2 ′·B 2 +( A 2 ′+B 2 )·{ A 1 ′·B 1 +( A 1 ′+B 1 )·( A 0 ′+B 0 )}}, where A 3 ′ denotes an inverted MSB of the first binary data, A 2 ′ denotes an inverted second bit from the LSB of the first binary data, A 1 ′ denotes an inverted first bit from the LSB of the first binary data, A 0 ′ denotes an inverted LSB of the first binary data, B 3 denotes an MSB of the second binary data, B 2 denotes a second bit from the LSB of the second binary data, B 1 denotes a first bit from the LSB of the second binary data, and B 0 denotes an LSB of the second binary data, and outputting a signal from the binary comparator circuit corresponding to the comparison result.