Patent ID: 7795722

Claim:
A substrate structure comprising: a core substrate comprising a top surface and a bottom surface opposite the top surface, wherein a first circuit pattern is disposed on the top surface; a first interconnection portion disposed on the top surface, wherein the first interconnection portion comprises: a first surface dielectric layer; a first surface circuit layer and a dummy pattern disposed on the first surface dielectric layer, wherein the dummy pattern has no circuit connection with the first surface circuit layer; a first inner circuit layer disposed below the first surface dielectric layer, wherein the first inner circuit layer is electrically connected to the first circuit pattern and the first surface circuit layer; and a first inner dielectric layer disposed below the first inner circuit layer; and a first solder mask disposed on the first interconnection portion, wherein the first solder mask has at least one hole disposed above the dummy pattern, and the hole exposes a part of the dummy pattern for identifying the substrate structure.