Patent ID: 8607182

Claim:
A method of layout migration for generating at least one placement for an integrated circuit (IC) based on a new technology, wherein the integrated circuit (IC) comprises a plurality of device modules, the method comprising the steps of: a. providing an existing layout; b. providing a first set of constraints according to the existing layout, wherein each of the constraints has a corresponding set of device modules subject to the constraint; c. analyzing the existing layout to generate at least one relative placement pattern for each set of the device modules according to its corresponding constraint of the first set of constraints respectively, wherein said at least one relative placement pattern comprises the relative placement pattern extracted from the existing layout; d. forming, by using a computer, a constraint hierarchy tree comprising a root node, a plurality of internal nodes and a plurality of leaf nodes according to the first set of constraints, wherein the root node represents the placement of the integrated circuit (IC), each of the internal nodes represents a constraint for its corresponding set of the device modules with the associated at least one relative placement pattern respectively and each of the leaf nodes represents its corresponding device module respectively; and e. generating at least one placement for the integrated circuit (IC) according to the constraint hierarchy tree based on the new technology, wherein at least one dimension is defined for each of the device modules and a cost function is defined to measure a placement quality according to the dimensions of the device modules, further comprising the sub-steps of: e1. generating a plurality of placements that satisfy the constraint at a node if the constraint is not a matching or symmetry constraint; generating a placement according to the relative placement pattern extracted from the existing layout if the constraint is a matching or symmetry constraint; and e2. selecting a placement from the plurality of placements at the node according to the cost function if the constraint is not a matching or symmetry constraint.