Patent ID: 8388824

Claim:
A method for metalizing a via feature in a semiconductor integrated circuit device substrate, wherein the semiconductor integrated circuit device substrate comprises a front surface, a back surface, and the via feature and wherein the via feature comprises an opening in the front surface of the substrate, a sidewall extending from the front surface of the substrate inward, and a bottom, the method comprising: contacting the semiconductor integrated circuit device substrate with an electrolytic copper deposition chemistry comprising (a) a source of copper ions and (b) a leveler compound, wherein the leveler compound comprises a reaction product of a dipyridyl compound and an alkylating agent and the alkylating agent comprises the following structure (IIIb): Y—(CH 2 ) p —B—(CH 2 ) q —Z Structure (IIIb) wherein B is selected from among: a single bond, an oxygen atom (—O—), a methenyl hydroxide a carbonyl an amino an imino a sulfur atom (—S—), a sulfoxide a phenylene and a glycol and p and q may be the same or different, are integers between 0 and 6, wherein at least one of p and q is at least 1; X is an integer from one to about four; Y and Z are leaving groups selected from among chloride, bromide, iodide, tosyl, triflate, sulfonate, mesylate, methosulfate, fluorosulfonate, methyl tosylate, brosylate, or nosylate; and R 1 through R 14 are each independently hydrogen, substituted or unsubstituted alkyl having from one to six carbon atoms, substituted or unsubstituted alkylene having from one to six carbon atoms, or substituted or unsubstituted aryl; and supplying electrical current to the electrolytic deposition chemistry to deposit copper metal onto the bottom and sidewall of the via feature, thereby yielding a copper filled via feature.