Patent ID: 8268686

Claim:
A method for manufacturing a semiconductor memory device comprising: forming a first well of a second conductivity type on a semiconductor substrate of a first conductivity type; forming a second well of the second conductivity type and a third well of the second conductivity type simultaneously, the second well being formed to reach a top of the first well, and depth from a top surface of the semiconductor substrate to a bottom face of the second well being shallower than a depth from the top surface of the semiconductor substrate to a bottom surface of the first well, and depth from a top surface of the semiconductor substrate to a bottom face of the third well being shallower than a depth from the top surface of the semiconductor substrate to the bottom surface of the first well; forming a fourth well of the first conductivity type, the fourth well being surrounded by the first well and the second well; and forming first transistors on the fourth well and a second transistor on the third well.