Patent ID: 7324376

Claim:
A method of operating a nonvolatile memory array storing data as charge storage states, the nonvolatile memory including nonvolatile memory cells arranged in columns, each of the nonvolatile memory cells including a first and a second current carrying node in a substrate region, and including a charge storage structure, and one or more dielectric structures at least partly between the charge storage structure and a source of gate voltage and at least partly between the substrate region and the charge storage structure, the method comprising: performing one or more memory operations comprising: applying a bit line bias to a bit line electrically connected to a first end of a column of nonvolatile memory cells, the column arranged in series such that adjacent first and second current carrying nodes of adjacent memory cells in the column are electrically connected; floating a second end of the column of nonvolatile memory cells; and applying the gate voltage to word lines electrically connected to the nonvolatile memory cells of the column.