Patent ID: 7262669

Claim:
A circuit for controlling a refresh oscillator circuit, comprising: an oscillation signal generation circuit for generating an oscillation signal depending upon a basic oscillation cycle, according to a refresh signal generating when a refresh command is issued; a clock signal generation circuit for generating a first clock signal having the same phase as that of the oscillation signal and a second clock signal having an opposite phase to that of the oscillation circuit, according to the refresh signal and the oscillation signal; a divider circuit having a plurality of dividers, for sequentially counting a plurality of divider signals, and generating the divider signals that increases in a sequential manner, according to the second clock signal; a fuse set circuit having a fuse, for generating a plurality of fuse signals for deciding a refresh cycle, according to a cutting state of the fuse; a control circuit for outputting a control signal depending upon the fuse signals, according to a test mode enable signal; an adder for outputting a plurality of output signals depending upon the fuse signals, according to the control signal; and a refresh cycle signal generation circuit for comparing the plurality of the divider signals and the plurality of the output signals of the adder, respectively, and if the divider signals and the output signals of the adder are the same, generating a refresh cycle signal whenever the first control signal is generated.