Patent ID: 7706630

Claim:
A video data interface device configured to receive a video data stream at a first clock frequency to select data pertaining to a selected portion of each video frame of the received video data stream and to transport the selected data to a microprocessor unit or to a memory at a second clock frequency, the video data interface device comprising: an input interface configured to receive at the first clock frequency video data, and to generate a decoded data stream relative to pixels of video frames and relative synchronization signals; a data selector circuit configured to extract a predefined portion of each video frame without the use of the microprocessor unit, and to receive as input the decoded data stream at the first clock frequency and coordinate values of vertex pixels and border pixels of the portion of data to be extracted, and to generate the selected data stream relative to pixels belonging to the selected portion of each video frame, said data selector circuit comprising a queue management circuit configured to receive as input the selected data stream and to generate an output data stream; and an output interface configured to receive as input the output data stream, and to transfer to the microprocessor unit or to the memory the output data stream at the second clock frequency, and to synchronize data exchange with the microprocessor and to manage interrupt and direct memory access requests.