Patent ID: 7084477

Claim:
A semiconductor device comprising: a semiconductor substrate; an element isolating region having a trench formed in said semiconductor substrate and an insulating film which is embedded into said trench; and an active region formed in said semiconductor substrate and including a well region in which a gate insulating film is formed thereon and a gate electrode is formed on the gate insulating film, said well region having ion implanted source and drain diffusion regions provided in correspondence to said gate electrode, wherein the embedded insulating film in said trench has a bottom surface plane extended deeper into said semiconductor substrate than said diffusion regions and surrounds said active region, in a plan view thereof, wherein the embedded insulating film has a recessed upper plane surface surrounding at least said source and drain diffusion regions to prevent crystalline defects caused by said element isolation region at vicinity of said diffusion regions, the recessed upper plane surface defining a depth, extended from a plane surface of said semiconductor substrate, substantially the same as or greater than that of the depth of the peak concentration of the impurity profile of each of said source and drain diffusion regions, and wherein an oxynitride film is formed along side and bottom surface planes of the embedded insulating film in said trench and interfacing with said silicon substrate.