Patent ID: 8264283

Claim:
A single side band mixer comprising: a first quadrature generator, a second quadrature generator, and a mixer-splitter circuit; said first quadrature generator having an LO input and producing LO quadrature outputs; said LO quadrature outputs being a first LO 0 degree phase shifted signal, a second LO 0 degree phase shifted signal, a first LO 180 degree phase shifted signal, and a second LO 180 degree phase shifted signal; said second quadrature generator having an IF input and producing IF quadrature outputs; said IF quadrature outputs being a first IF 0 degree phase shifted signal, a second IF 0 degree phase shifted signal, a first IF 180 degree phase shifted signal, and a second IF 180 degree phase shifted signal; said mixer-splitter circuit further comprising; a first FET with a first FET gate terminal, a first FET drain terminal and a first FET source terminal; said first LO 0 degree phase shifted signal connected to said first FET gate terminal and said first IF 0 degree phase shifted signal connected to said first FET drain terminal; a second FET with a second FET gate terminal, a second FET drain terminal and a second FET source terminal; said first LO 180 degree phase shifted signal connected to said second FET gate terminal and said first IF 180 degree phase shifted signal connected to a second FET drain terminal; a third FET with a third FET gate terminal, a third FET drain terminal and a third FET source terminal; a second LO 0 degree phase shifted signal connected to said third FET gate terminal and a second IF 0 degree phase shifted signal connected to said third FET drain terminal; a fourth FET with a fourth FET gate terminal, a fourth FET drain terminal and a fourth FET source terminal; said second LO 180 degree phase shifted signal connected to said fourth FET gate terminal and said second IF 180 degree phase shifted signal connected to said FET drain terminal; and, said first, second, third and fourth FET source terminals are connected commonly and to a load resistor, whereby said mixer RF output signal is present as a voltage across said load resistor.