Patent ID: 7157939

Claim:
A quad state memory comprising: A. a voltage input; B. a voltage output; C. a clock input; D. four voltage supply inputs of different voltages; E. a voltage to state converter having supply inputs connected to the four voltage supply inputs and having an voltage input, the voltage to state converter having four state outputs; F. state feedback circuitry having four state inputs connected to the four state outputs, having four supply inputs connected to the four voltage supply inputs, and having a voltage input; G. state output circuitry having four state inputs connected to the four state outputs, four supply inputs connected to the four voltage supply inputs, and an output connected to the voltage output; H. transmission circuitry having an input connected to the voltage input, and having outputs connected to the voltage to state converter and to the voltage input of the state feedback circuitry; and I. clock circuitry having an input connected to the clock input and having outputs connected to the voltage input transmission circuitry.