Patent ID: 8566639

Claim:
A memory device, comprising: volatile memory; an interface for connecting to a backup power source arranged to power the volatile memory upon a loss of power of a primary power source; non-volatile memory; a first configuration data bus for accessing parameters describing substantially permanent characteristics of the volatile memory, wherein the parameters are stored in a first address space; a second configuration data bus for accessing state of health information of the backup power source comprising an indication of whether the backup power source has failed, wherein the state of health information is stored in a second address space, wherein the first configuration data bus and the second configuration data bus implement a same bus protocol, and wherein the first address space is separate from the second address space; a controller, in communication with the first configuration data bus, the second configuration data bus, the volatile memory, and the non-volatile memory, that is programmed to detect the indication of whether the backup power source has failed by retrieving the state of health information from the second address space and in response, alert a host of failure of the backup power source and in response to a command from the host based on the alert of the failed backup power source, move data from the volatile memory to the non-volatile memory in order to prevent data loss, wherein the data to be moved includes at least one of cache data, user data, and operating system data; wherein first configuration information of the controller is at least one of readable and writable through the first configuration data bus; and wherein the state of health information is at least one of readable and writable through the second configuration data bus.