Patent ID: 7697340

Claim:
A method of trimming a reference cell in a semiconductor memory device, the method comprising: generating an internal bias current capable of being trimmed; trimming an internal bias cell such that the internal bias current is within a given range; and trimming the reference cell based on the internal bias current, wherein the trimming the reference cell includes, programming the reference cell based on a variable program voltage, verifying a current flowing in the programmed reference cell based on the internal bias current, and fine trimming a verified current flowing in the reference cell based on a plurality of reference currents, the plurality of reference currents being generated based on the internal bias current, and wherein the fine trimming includes, generating a first reference current and a second reference current based on the internal bias current, the first reference current being greater than the internal bias current and the second reference current being less than the internal bias current, comparing each of the first reference current and the second reference current with the verified current, and performing the fine trimming of the reference cell based on a result of the comparison.