Patent ID: 8411216

Claim:
An active matrix substrate, comprising a scanning signal line extending in a row direction, a data signal line extending in a column direction, a transistor connected with the scanning signal line and the data signal line, and a retention capacitor line, each pixel region including a first pixel electrode, a second pixel electrode, a first capacitor electrode, a second capacitor electrode, a first connection line, and a second connection line, each of the first capacitor electrode and the second capacitor electrode being positioned on a layer where the data signal line is positioned, the first connection line being connected with the first capacitor electrode, and the second connection line being connected with the second capacitor electrode, the first capacitor electrode and the second capacitor electrode being aligned in the row direction in such a manner as to overlap the retention capacitor line via a first insulating film and to overlap the second pixel electrode via a second insulating film, one conductive electrode of the transistor, the first pixel electrode, the first connection line, and the second connection line being electrically connected with one another, and at least a part of the first connection line and at least a part of the second connection line not overlapping the retention capacitor line.