Patent ID: 7888798

Claim:
A semiconductor device comprising: a first insulating layer on an underlying contact region of the semiconductor device, the first insulating layer having an upper surface; a first conductive pattern in a first opening through the first insulating layer, an upper portion of the first conductive pattern being of a first width, an upper surface of the first conductive pattern being recessed relative to the upper surface of the first insulating layer so that the upper surface of the first conductive pattern has a height relative to the underlying contact region that is less than a height of the upper surface of the first insulating layer relative to the underlying contact region; a second insulating layer on the first insulating layer; a second conductive pattern contacting the upper surface of the first conductive pattern, wherein the second conductive pattern is in a second opening through the second insulating layer, a lower portion of the second conductive pattern being of a second width that is less than the first width; and insulating line spacers between sidewalls of the second opening and sidewalls of the second conductive pattern.