Patent ID: 7088173

Claim:
An apparatus for phase correction of a parallel amplifier arrangement, the apparatus comprising: N amplifiers configured in a parallel arrangement, each of the amplifiers including an input port and an output port, where N is an even integer greater than two; N, or fewer, input ports of the apparatus, where N equals the number of amplifiers; N, or fewer, output ports of the apparatus, where N equals the number of amplifiers; N, or fewer, phase shifters coupled to the N amplifiers, each phase shifter being coupled to one of the N amplifiers; M input hybrids coupled to the input ports of the apparatus and to the N input ports of the amplifiers, where M=(N/2)Int(log 2 N), and where Int(log 2 N) is defined as a greatest integer less than or equal to log 2 N; M output hybrids coupled to the N output ports of the amplifiers and to the output ports of the apparatus; one or more test signal injection sites coupled to the M input hybrids, each of the test signal injection sites being coupled to selected ports of the input hybrids, each of the test signal injection sites being configured to receive an RF test signal to associate a phase relationship of at least two of the N amplifiers; and one or more test signal monitoring sites coupled to selected ports of the output hybrids, the one or more test signal monitoring sites being adapted to provide an output signal associated with the RF test signal for the phase relationship of at least two of the N amplifiers.