Patent ID: 7446368

Claim:
A floating gate transistor, comprising: a first source/drain region and a second source/drain region separated by a channel; a horizontally oriented first gate formed adjacent a body region that includes the channel; a gate oxide separating the first gate from the channel; a second gate adjacent the first gate; and a graded, asymmetrical low tunnel barrier intergate insulator formed by multiple monolayer deposition separating the second gate from the first gate, the first gate including a polysilicon floating gate having a metal layer formed thereon in contact with the asymmetrical low tunnel barrier intergate insulator, and the second gate includes a polysilicon control gate having a metal layer formed thereon in contact with the asymmetrical low tunnel barrier intergate insulator, wherein the metal layer includes a metal layer that has a different work function than the metal layer formed on the floating gate and the metal layer is formed of the same material as the asymmetrical low tunnel barrier intergate insulator.