Patent ID: 8160110

Claim:
A device for generating sampled ramp signals representative of synchronization signals, the device i) being devised to recover in received synchronization signals a reference clock signal and content pips, and to deliver first and second synchronous ramp signals representative of the number of ticks of the reference clock signal that have been delivered respectively since the last recovered content pip and since a last reference pip, each content pip triggering the setting to zero of the first ramp signal and each reference pip being defined when the number of zero settings of the first ramp signal is equal to a chosen threshold; and ii) comprising a sampler devised to sample the second ramp signal according to a sampling frequency so that the resulting samples are transmitted in frames of packet(s); wherein the sampler is furthermore devised to sample the first ramp signal according to the sampling frequency and to inter-associate the samples of the first ramp signal and the second ramp signal which correspond to the same sampling period so that the samples of the first ramp signal and the second ramp signal are transmitted in an associated manner in packet frames.