Patent ID: 8854750

Claim:
A data processing system comprising: an analog to digital converter operable to sample an analog signal to yield digital samples; at least one positive saturation detector operable to determine whether the digital samples are above a threshold; at least one negative saturation detector operable to determine how many of the digital samples are below a lower threshold; an accumulator operable to determine how many of the digital samples are above the threshold within a sliding window; a second accumulator operable to determine how many of the digital samples are below the lower threshold within the sliding window, and a loop correction signal generating circuit operable to generate a loop correction signal based at least in part on an output of the accumulator, further comprising an adder operable to add the output of the accumulator and an output of the second accumulator, wherein the loop correction signal generating circuit is operable to generate the loop correction signal based on an output from the adder.