Patent ID: 8330254

Claim:
A semiconductor device, comprising: a semiconductor wafer having a plurality of semiconductor chip forming regions, and a scribe region located between said semiconductor chip forming regions; a semiconductor chip circuit portion provided in each of said semiconductor chip forming regions of said semiconductor wafer; a plurality of first conductive layers, provided in each of said semiconductor chip forming regions, which is electrically connected to each of said circuit portions respectively; a first connecting portion that electrically connects said first conductive layers to each other across a portion of said scribe region; and a communication portion, connected to said circuit portion, that performs communication with the outside by capacitive coupling or inductive coupling, wherein an external power supply or grounding pad is connected to at least one of said first conductive layer and said first connecting portion, wherein said first conductive layers are seal rings, each of which surrounds each of said circuit portions, wherein an insulating film is provided over said semiconductor wafer, wherein said seal rings are disposed over said insulating film, wherein second conductive layers are provided over said insulating film, each of said second conductive layers is provided inside of each of the semiconductor chip forming regions and is provided outside of each of said seal rings, wherein said circuit portion and said second conductive layer are connected to each other through a polysilicon film passing the inside of said insulating film past the lower side of said seal ring, and wherein said second conductive layers are electrically connected to each other by a second connecting portion disposed across a portion of said scribe region.