Patent ID: 8859375

Claim:
A manufacturing method of a high voltage device comprising: providing a substrate having a first conductive type well and a device region defined by at least one isolation region; forming a drift region in the device region by doping second conductive type impurities, wherein from top view, a concentration of the second conductive type impurities of the drift region is distributed in a pattern of a plurality of concentric loops and substantially periodically along horizontal and vertical directions, wherein the concentric loops includes a plurality of first loops doped with a relatively lower concentration of the second conductive type impurities and a plurality of second loops doped with a relatively higher concentration of the second conductive type impurities, wherein the first loops and the second loops are arranged in an alternating order; forming a gate in the device region on a surface of the substrate; and forming a second conductive type source and a second conductive type drain at two sides of the gate in the device region respectively, wherein the source and the drain are separated by the drift region.