Patent ID: 8102357

Claim:
A display device comprising: an insulating substrate; a drive circuit on the insulating substrate, the drive circuit including an inverter circuit, the inverter circuit having: first to fifth transistors of an identical conductivity type, each of the transistors including a semiconductor layer made of polycrystalline silicon; and a high-resistance element, wherein a first terminal of the first transistor is coupled to a first node, a gate terminal thereof is coupled to a second node, and a second terminal thereof is coupled to a third node, a first terminal of the second transistor is coupled to a fifth node, a gate terminal thereof is coupled to the third node, and a second terminal thereof is coupled to a sixth node, a first terminal of the third transistor is coupled to the first node, a gate terminal thereof is coupled to the second node, and a second terminal thereof is coupled to the fifth node, a first terminal of the fourth transistor is coupled to a seventh node, a gate terminal thereof is coupled to the fifth node, and a second terminal thereof is coupled to an eighth node, a first terminal of the fifth transistor is coupled to the first node, a gate terminal thereof is coupled to the second node, and a second terminal thereof is coupled to the seventh node, a first terminal of the high-resistance element is coupled to a fourth node and a second terminal thereof is coupled to the third node, a first power supply voltage is provided between the fourth node and first node, a second power supply voltage is provided between the sixth node and first node, a third power supply voltage is provided between the eighth node and first node, an input clock is inputted into the second node and an output clock obtained by inverting the input clock is outputted from the seventh node, the first power supply voltage is larger than a sum of the third power supply voltage and twice a threshold voltage of the transistors, and the second power supply voltage is larger than a sum of the third power supply voltage and the threshold voltage of the transistors.