Patent ID: 7249209

Claim:
A system for dynamically allocating inter integrated circuits (I 2 C) addresses to multiple slaves, the system comprising a host, an I 2 C bus and a plurality of slaves, wherein: the host comprising an I 2 C interface for sending I 2 C signal to each slave via the I 2 C bus; each slave comprising a processor for executing an I 2 C address allocating program, wherein the I 2 C address allocating program comprises: a signal setting module for setting an I 2 C signal value of an input pin of each slave, and checking the I 2 C signal value of an output pin of each slave; a delay controlling module for controlling a synchronous booting error time for each slave, and setting a security time for allocating a unique I 2 C address to each slave; and an I 2 C address calculating module for calculating the unique I 2 C address for each slave, and obtaining the corresponding I 2 C address from the host.