Patent ID: 8171284

Claim:
An apparatus, comprising: a main board, which includes: a packet input unit for inputting a packet in a series of packets, a memory for buffering a received packet from the packet input unit, and an encryption/decryption processing deciding section for decrypting a designated portion of the received packet to obtain a value of a header field of an inner-packet, which is encapsulated as a data portion of the received packet, and determining a selected destination of two destinations to which the received packet, including the designated portion of the received packet, is to be sent and decrypted, based on the header field in the decrypted designated portion, and a first decryption engine, which is one of the two destinations, for decrypting the received packet; and an external board, which includes: a second decryption engine, which is another one of the two destinations, for decrypting the received packet.