Patent ID: 8200939

Claim:
A method of operating a memory management unit in a microprocessor memory system, in which the memory management unit acts to translate virtual addresses used in memory accesses to physical addresses used by the microprocessor memory system and has access to a cache memory storing associations between virtual addresses and physical addresses for this purpose, the method comprising: the memory management unit: receiving a memory access request; determining whether address association data for performing an address translation required for the memory access request is stored in the cache memory; if the address association data is not stored in the cache memory, placing the memory access request in a first-in, first-out queue at the end of the first-in, first-out queue, for later return to the memory management unit for processing; and returning memory access requests placed in the first-in, first-out queue to the memory management unit for processing in serial order from a head of the first-in, first-out queue; wherein when the memory management unit receives a memory access request returned from the head of the first-in, first-out queue for processing, the memory management unit: determining whether address association data for performing an address translation required for the memory access request is stored in the cache memory; if the address association data is not stored in the cache memory, placing the memory access request back in the first-in, first-out queue at the end of the first-in, first-out queue so that the memory access request must reach the head of the queue before the memory access request will be tried again; and if the address association data stored in the cache memory, completing the memory access request.