Patent ID: 8241967

Claim:
A fabrication method of a semiconductor package with a support structure, the fabrication method comprising the steps of: preparing a carrier; forming a plurality of recessed portions on a surface of the carrier; applying a resist layer on the surface of the carrier, the resist layer covering the recessed portions, and forming a plurality of openings in the resist layer by a patterning process to expose a part of the carrier; performing an electroplating process to form a plurality of electrical contacts on the exposed part of the carrier according to a predetermined circuit layout; removing the resist layer; mounting at least one chip on the carrier and electrically connecting the chip to the electrical contacts; performing a molding process to form an encapsulant on the carrier for encapsulating the chip and the electrical contacts and filling the recessed portions of the carrier; and removing the carrier such that the electrical contacts are exposed from the encapsulant and the part of the encapsulant filling the recessed portions forms outwardly protruded portions.