Patent ID: 8790956

Claim:
A method for fabricating a diode, comprising the steps of: providing a substrate; forming a backside electrode on the substrate; electrodepositing one or more layers on the backside electrode, wherein at least one of the layers comprises copper, at least one of the layers comprises zinc and at least one of the layers comprises tin, by the steps of: electrodepositing a first copper metal layer on the backside electrode; electrodepositing a first selenium semiconductor layer on the first copper metal layer; annealing the first selenium semiconductor layer at a temperature of from about 80° C. to about 100° C., for a duration of from about 30 minutes to about 60 minutes; electrodepositing a second copper metal layer on the first selenium semiconductor layer; electrodepositing a zinc metal layer on the second copper metal layer; electrodepositing a second selenium semiconductor layer on the zinc metal layer; annealing the second selenium semiconductor layer at a temperature of from about 80° C. to about 100° C., for a duration of from about 30 minutes to about 60 minutes; electrodepositing a third copper metal layer on the second selenium semiconductor layer; and electrodepositing a tin metal layer on the third copper metal layer; annealing the layers in an environment containing a sulfur source to form a p-type CZTS absorber layer on the backside electrode; forming an n-type semiconductor layer on the CZTS absorber layer; and forming a transparent conductive layer on the n-type semiconductor layer.