Patent ID: 7732274

Claim:
A method for fabricating a deep trench capacitor, comprising: providing a first semiconductor layer and a second semiconductor layer over at least part of the first semiconductor layer, where the second semiconductor layer is separated from the first semiconductor layer by an insulator layer; forming a first trench opening having substantially vertical sidewalls by selectively removing at least a portion of the second semiconductor layer in a first region to leave a remaining portion of the second semiconductor layer in a second region; forming a trench oxide region on at least one of the sidewalls of the first trench opening; forming a second trench opening that exposes a portion of the first semiconductor layer in the first region; forming a doped semiconductor layer in the second trench opening that is tied to the first semiconductor layer; and planarizing the doped semiconductor layer and the remaining portion of the second semiconductor layer; where the second semiconductor layer is doped with impurities to form a first capacitor plate, and where the doped semiconductor layer is doped with impurities to form a second capacitor plate that is separated from the first capacitor plate by the trench oxide region.