Patent ID: 8488606

Claim:
A system controller capable of connecting to at least an external device, for realizing packet transfer with the external device, the system controller comprising: a synchronization circuit, wherein the synchronization circuit is implemented inside of the system controller and includes, a synchronization buffer capable of holding a packet to be transferred to and from the external device; a storage management device capable of storing packet information into the synchronization buffer, the packet information including an address of an access destination in a memory and a type of request indicating contents of requested access; a selection device that selects a piece of packet information stored in the synchronization buffer; a packet generation device that artificially generates a packet to be transferred from an I/O controller to the memory according to the packet information selected by the selection device; an analysis device that analyzes a response packet from the memory in response to the artificially generated packet and verifies an interface for the I/O controller without connecting to the I/O controller; and a storage device including a storage area for each value available as a request ID as identification information stored in the packet, and storing state information indicating for each storage area whether or not a value corresponding to the storage area is being used as the request ID; wherein the packet generation device refers to state information stored in each storage area of the storage device, specifies an available value as the request ID, generates a packet storing the specified value, and storing state information indicating whether the storage area corresponding to the value stored as the request ID is used; and the analysis device specifies a value of a request ID corresponding to the response from the memory, and stores state information indicating the storage area corresponding to the specified value is not used.