Patent ID: 7425488

Claim:
A method for forming a semiconductor integrated circuit device comprising: providing a semiconductor substrate; forming a dielectric layer overlaying the semiconductor substrate; forming a gate layer overlying the dielectric layer, the gate layer overlying a channel region in the semiconductor substrate; forming a substantially pure silicon dioxide layer overlying the gate layer, the pure silicon dioxide layer being substantially free from any nitride bearing species; patterning the gate layer, including the pure silicon dioxide layer, to form a first gate structure including edges and a second gate structure including edges; forming a dielectric layer overlying the first and second gate structures and pure silicon dioxide layer to protect the gate structures including the edges; patterning the dielectric layer to form sidewall spacer structures on the first and second gate structures, including the edges, and exposing a portion of the pure silicon dioxide layer; etching a first source region and a first drain region adjacent to the first gate structure, and etching a second source region and a second drain region adjacent to the second gate structure using the dielectric layer and portion of the pure silicon dioxide layer as a protective layer; masking the second gate structure; depositing a silicon germanium material into the first source region and the first drain region to fill the etched first source region and the etched first drain region; causing an N-type channel region between the first source region and the first drain region to be strained in compressive mode from at least the silicon germanium material formed in the first source region and the first drain region; unmasking the second gate structure; masking the first gate structure; depositing a silicon carbide material into the second source region and the second drain region to fill the etched second source region and the etched second drain region; and causing a P-type channel region between the second source region and the second drain region to be strained in tensile mode from at least the silicon carbide material formed in the second source region and the second drain region.