Patent ID: 8237257

Claim:
A structure of semiconductor device package, comprising: a first substrate with a die metal pad, a first wiring circuit on a top surface of said first substrate and a second wiring circuit on a bottom surface of said first substrate; a die disposed on said die metal pad; a second substrate with a die opening window for receiving said die, a third wiring circuit on a top surface of said second substrate and a fourth wiring circuit on a bottom surface of said second substrate; an adhesive material filled into the gap between a back side of said die, a bottom side of said second substrate and said top surface of said first substrate, and between a side wall of said die and a side wall of said die opening window; and conductive through holes formed by passing through said first substrate and said second substrate to connect said third and said fourth wiring circuit of said second substrate and said first and said second wiring circuit of said first substrate.