Patent ID: 6958637

Claim:
A phase lock loop circuit, comprising: a voltage controlled oscillator adapted to provide a first signal comprising a first frequency; a phase comparator adapted to compare the first signal comprising the first frequency to a reference signal comprising a reference frequency, the phase comparator being further adapted to provide a control signal representing a phase difference between the first signal and the reference signal; and a charge pump circuit comprising, a current source, a first field effect transistor (FET), a second field effect transistor (FET), and a first capacitor, wherein the first FET is electrically coupled to the second FET, wherein the first capacitor is electrically coupled to the second FET, wherein the current source is directly connected to a source on the first FET, wherein the current source is coupled between the source on the first FET and ground, wherein the second FET comprises a parasitic capacitance, wherein the charge pump circuit is adapted to receive the control signal and control the voltage controlled oscillator such that a phase of the first signal equals a phase of the reference signal, wherein the second FET is adapted to be operated such that a spark current resulting from a switching mode of the control signal is directed through the parasitic capacitance to ground and wherein the second FET is adapted to operate in a saturation mode.