Patent ID: 8248350

Claim:
An analog sampling apparatus of a liquid crystal display device, comprising: a data driver to generate an analog data voltage; a data output bus line to receive the analog data voltage; an output node to output the analog data voltage; a first sampling and holding circuit connected to the data output bus line to compensate the analog data voltage for an offset voltage to control a voltage of the output node with the compensated analog data voltage; a second sampling and holding circuit connected to the data output bus line to sample the analog data voltage while the voltage of the output node is controlled by the first sampling and holding circuit, wherein the first and second sampling and holding circuits are arranged to alternately control the voltage of the output node and to sample the analog data voltage; a shift register to sequentially generate a sampling signal; and a timing controller to generate a first control signal having a pulse width of one horizontal period and a period of two horizontal periods, and a second control signal having an opposite phase to the first control signal; an HSP signal generated with an interval of one horizontal period; a B∩HSP signal generated to be at a logic high value at a sampling point of time when the second control signal is a logic high value; a A∩HSP signal generated to be at a logic high value at a sampling point of time when the first control signal is a logic high value, and an RSP signal indicating a pre-charge period and a data supply period of the data line, to control the sampling and holding circuits and to control the data driver and the shift register.