Patent ID: 7099963

Claim:
A history module for recording transaction information on a first bus and/or a second bus in an embedded disk controller with a first main processor operationally coupled to the first bus and a second processor operationally coupled to the second bus, comprising: a register map used for setting up the history module for recording transaction information on the first bus and/or the second bus, wherein the register map includes a register that stores a break point condition value, which is set by the first main processor and based on the break point condition value, the history module stops recording transaction information, stores a trigger mode field value, which when set allows the history module to continue recording a certain number of entries after a break point condition is reached; stores a read mask field value and a write mask field value, wherein if the read mask field value and the write mask field value are set then the history module stops recording read and/or write operations on the first and second bus; and the register stores a masking field value so that the history module can exclude transactions involving components coupled to the first bus and/or the second bus.