Patent ID: 6902951

Claim:
A method for producing an electronic device, the method which comprises: producing a first panel with a plurality of leadframe positions configured in rows and columns, each one of the plurality of leadframe positions having at least two semiconductor chips embedded in a material of the first panel such that a plurality of active top sides of the semiconductor chips are flush with a top side of the first panel; applying a common fine wiring structure to the plurality of active top sides of the semiconductor chips and to the top side of the first panel in each of the plurality of leadframe positions, and configuring a plurality of contact pads in edge regions of the plurality of leadframe positions; separating the first panel into a plurality of individual leadframes; producing a rewiring plate with a plurality of device positions configured in rows and columns, configuring a plurality of bonding areas in edge regions of each of the plurality of device positions, and distributing a plurality of external contact areas on an underside of the rewiring plate in each one of the plurality of the device positions; applying a leadframe separated from the first panel in each one of the plurality of device positions of the rewiring plate while not covering the edge regions configured with the plurality of bonding areas; producing a plurality of bonding connections between the plurality of contact pads in the edge regions of the plurality of leadframe positions and the plurality of bonding areas in the edge regions of each one of the plurality of device positions; producing a second panel by covering the plurality of device positions with a plastic housing composition; applying a plurality of external contacts on the plurality of external contact areas of the rewiring plate; and separating the second panel into a plurality of individual electronic devices.