Patent ID: 8853036

Claim:
A method of manufacturing a semiconductor device having a first memory cell, wherein a process of forming the first memory cell comprises: (a) depositing a first insulating film over a semiconductor substrate to form a first gate insulating film; (b) forming a first conductive film over the first gate insulating film; (c) forming a second insulating film over the first conductive film; (d) processing the second insulating film and the first conductive film to form a selection gate electrode made of the first conductive film and a cap insulating film made of the second insulating film over the selection gate electrode; (e) removing the cap insulating film over the selection gate electrode in a region in which a first plug supplying a voltage to the selection gate electrode is formed, while leaving the cap insulating film over the selection gate electrode in a region in which the first memory cell is formed; (f) after the step (e), forming a second gate insulating film made of a third insulating film over the semiconductor substrate; (g) forming a second conductive film over the second gate insulating film; (h) subjecting the second conductive film to anisotropic etching to form a memory gate electrode over a side surface of a stacked film made up of the cap insulating film and the selection gate electrode; (i) after the step (h), forming a first source region and a first drain region in the semiconductor substrate in the region in which the first memory cell is formed; and (j) after the step (i), forming a silicide layer over an upper surface of the memory gate electrode, an upper surface of the selection gate electrode in the region in which the first plug supplying the voltage to the selection gate electrode is formed, and upper surfaces of the first source region and the first drain region in the region in which the first memory cell is formed.