Patent ID: 7859077

Claim:
A semiconductor device, comprising: an n-type MOS transistor and a p-type MOS transistor connected in series; and a first gate extending via an insulating film above a channel of the n-type MOS transistor and a channel of the p-type MOS transistor, the first gate being made of a material in which electrons and holes are generated by providing light, one end of the first gate being connected to a high-level interconnect, the other end of the first gate being connected to a low-level interconnect, the channels of the n-type and the p-type MOS transistors being provided between the one end and the other end, by providing the light to the first gate, the electrons and the holes being generated, at least one of either of the electrons and the holes passing through the first gate above the channel of the n-type MOS transistor and the at least one of either of the electrons and holes passing through above the channel of the p-type MOS transistor, whereby the n-type MOS transistor and the p-type MOS transistor are switched, the at least one of either of the electrons and the holes being absorbed by one of the high-level interconnect and the low-level interconnect after passing through above the channels of the n-type and the p-type MOS transistors.