Patent ID: 7443905

Claim:
A circuit for spread spectrum clock generation, comprising: a spread spectrum clock generator that is arranged to provide an output clock signal, wherein the spread spectrum clock generator is arranged such that the output clock signal is a clock signal that is a spread-spectrum signal, and wherein the spread spectrum clock generator includes: a phase detection circuit that is configured to provide an error signal from a reference signal and a feedback signal; a voltage controlled oscillator circuit that is configured to provide a synthesized signal from the error signal, wherein the synthesized signal is a clock signal, and wherein the output clock signal is based, at least in part, on the synthesized signal; a modulating waveform generator circuit that is configured to provide a modulating waveform signal that varies over time as a modulating waveform; an accumulator circuit that is configured to provide a carry signal from the modulating waveform signal; and an adjustable clock divider circuit that is configured to provide an adjustable clock divider output signal from an adjustable clock divider input signal, wherein the adjustable clock divider input signal is based at least in part on the synthesized signal, the feedback signal is based at least in part on the adjustable clock divider output signal, and wherein the adjustable clock divider circuit is configured to provide the adjustable clock divider output signal such that a frequency that is associated with the adjustable clock divider signal corresponds to the frequency associated with the adjustable clock divider input signal divided by: a first number, if the carry signal is associated with a first logic level, and a second number, if the carry signal is associated with a second logic level.