Patent ID: 7839199

Claim:
A circuit for implementing frequency tripled I/Q signals, wherein a first input signal with a frequency f 0 and a second input signal with a frequency f 0 and in quadrature with the first input signal are inputted to the circuit, the circuit comprising: a first input terminal for inputting the first input signal; a second input terminal for inputting the second input signal; a first frequency multiplier electrically connected to the second input terminal for receiving the second input signal so as to generate a second frequency multiplied signal with a frequency of 2f 0 ; a second frequency multiplier electrically connected to the first input terminal for receiving the first input signal so as to generate a first frequency multiplied signal with a frequency of 2f 0 ; a first mixer electrically connected to the first input terminal and the first frequency multiplier for receiving and mixing the first input signal and the second frequency multiplied signal so as to generate a first output signal with a frequency of 3f 0 ; a second mixer electrically connected to the second input terminal and the second frequency multiplier for receiving and mixing the second input signal and the first frequency multiplied signal so as to generate a second output signal with a frequency of 3f 0 ; a first output terminal electrically connected to the first mixer for outputting the first output signal; and a second output terminal electrically connected to the second mixer for outputting the second output signal.