Patent ID: 8318544

Claim:
A method for manufacturing a plurality of thin chips, whose functionality is implemented in a layer structure starting from a surface layer of a semiconductor substrate, comprising: producing at least one cavity below the surface layer and a plurality of trenches, each opening into at least one of the at least one cavity, wherein individual thin chips are defined by the trenches, and are connected via support elements in an area of the at least one cavity to the substrate below the cavity, and provided with at least one through contact; producing a contact hole, which extends through a thin chip and into a support element connecting the thin chip to the substrate, for each through contact; applying at least one dielectric layer to the thus structured layer structure and to a wall of the contact holes in accordance with electrical connections to be created between chip surface areas and respective through contacts; applying a metal plating to the wall of the contact holes and the surface areas of the layer structure adjoining the contact holes in accordance with the electrical connections to be created, wherein the metal plating is applied after applying the at least one dielectric layer; separating the thin chips from the substrate; and filling the contact holes with a solder after separating the thin chips from the substrate.