Patent ID: RE41235

Claim:
A phase locked loop circuit, for use in a magnetic disk unit that generates a clock signal in phase-synchronization with a reproduced data pulse read from a magnetic disk, said phase locked loop circuit comprising: a frequency comparator operable to detect a difference in frequencies between the reproduced data pulse and the clock signal, and to output a frequency comparison error signal based on the difference, said frequency comparison error signal indicating a frequency error level; a phase comparator operable to detect a difference in phases between the reproduced data pulse and the clock signal and to produce an output based on the difference; a selector operable to output said frequency comparison error signal when the frequency error level indicated by said frequency comparison error signal is greater than or equal to a predetermined value and to prevent outputting of said frequency comparison error signal when the frequency error level indicated by said frequency comparison error signal is less than the predetermined value; a first charge pump operable to output a first voltage, and to increase or decrease the first voltage based on the output of said selector; a second charge pump operable to output a second voltage, and to increase or decrease the second voltage based on the output of said comparator; a loop filter operable to eliminate unnecessary components included in a sum of the outputs of said first and second charge pumps and to produce a filtered output voltage; and a voltage controlled oscillator operable to generate a clock of a frequency corresponding to the filtered output voltage from said loop filter.