Patent ID: 7721065

Claim:
A memory management unit, comprising: a first memory portion in which a memory area necessary for operating a device is allocated; a memory allocation processor for allocating a memory area in the first memory portion in accordance with an allocation request inputted when the device is operated, and releasing the memory area allocated in the first memory portion in accordance with a releasing request inputted when the operation of the device is terminated; a second memory portion for storing reserve area information regarding a memory area which should be reserved in an upper or lower address area of the first memory portion for operation of a device; and a learning reservation processor for monitoring the memory area allocation and release executed by the memory allocation processor, determining a memory area which is necessary for the operation of a device and fragments the first memory portion, and allowing information regarding the determined memory area to be stored as the reserve area information in the second memory portion, wherein the learning reservation processor gives an instruction to the memory allocation processor to reserve a memory area according to the reserve area information in the upper or lower address area of the first memory portion when the first memory portion is initialized, and the memory allocation processor reserves the memory area according to the reserve area information in the upper or lower address area of the first memory portion in accordance with the instruction given by the learning reservation processor.