Patent ID: 7944246

Claim:
A reception circuit comprising: a signal detecting circuit connected to complementary signal lines, detecting whether the complementary signal lines are in a non-signal state or not and outputting a detection signal; and a reception buffer connected to the complementary signal lines and transferring data on the complementary signal lines to a subsequent circuit in accordance with the detection signal, the signal detection circuit including: a first n-type transistor having a first gate electrode coupled to receive a first signal corresponding to one of the signals on the complementary signal lines, a first drain electrode coupled to a first node and a first source electrode coupled to a second node, the first n-type transistor flowing current from the first drain electrode to the first source electrode in response to a voltage on the first gate electrode, a second n-type transistor having a second gate electrode coupled to receive a second signal corresponding to another of the signals on the complementary signal lines, a second drain electrode coupled to the first node and a second source electrode coupled to the second node, the second n-type transistor flowing current from the second drain electrode to the second source electrode in response to a voltage on the second gate electrode, a third n-type transistor having a third gate electrode coupled to receive a first reference voltage, a third drain electrode coupled to a third node and a third source electrode coupled to the second node, the third n-type transistor flowing current from the third drain electrode to the third source electrode in response to the first reference voltage, a fourth n-type transistor having a fourth gate electrode coupled to receive a second reference voltage, a fourth drain electrode coupled to the third node and a fourth source electrode coupled to the second node, the fourth n-type transistor flowing current from the fourth drain electrode to the fourth source electrode in response to the second reference voltage, and a voltage comparing circuit coupled to the first and third nodes, comparing voltages at the first and third nodes to determine whether the voltage at the first node is larger than that at the third node for obtaining the detection signal.