Patent ID: 7508080

Claim:
A semiconductor device comprising: a wiring board which includes an interconnect pattern and a protective film, the protective film being disposed on the interconnect pattern and including a plurality of groove recesses, an opening being formed in the protective film and exposing a part of the interconnect pattern; a semiconductor chip which includes a plurality of electrodes and is mounted on the wiring board so that the plurality of electrodes face the exposed part of the interconnect pattern; and a resin section disposed between the wiring board and the semiconductor chip to extend to the protective film in a region around the opening, wherein the plurality of groove recesses are formed around a perimeter of the opening except in a region which overlaps the interconnect pattern, the plurality of groove recesses being disposed to extend along the interconnect pattern from an edge of the opening in the protective film to outside of a region for providing the resin section, the plurality of groove recesses being formed so that a thickness of the protective film under a bottom section of the plurality of groove recesses is thinner than the interconnect pattern, and the bottom section of the plurality of groove recesses extends continuously in a straight line along the interconnect pattern from an edge of the opening in the protective film to outside of a region for providing the resin section.