Patent ID: 7157775

Claim:
A semiconductor construction comprising: a pair of channel regions within a semiconductive material, each of the channel regions being boron-doped, at least a portion of each of the channel regions being an indium doped sub-region; a pair of transistor constructions separated by an isolation region which isolates the transistor constructions from one another, each transistor construction being disposed over a channel region comprised by the pair of channel regions, each of the transistor constructions comprising: a transistor gate stack laterally centered over the corresponding channel region and indium doped sub-region; and a pair of sidewall spacers disposed along and extending outwardly from opposing sidewalls comprised by the gate stack; and a first pair of conductively-doped diffusion regions associated with a first transistor construction comprised by the pair of transistor constructions, the indium comprised by the corresponding sub-region extending laterally less than the width of the gate stack and less than the lateral distance to the conductively-doped diffusion regions.