Patent ID: 7382629

Claim:
A circuit substrate, comprising: a stack layer having a first surface and a second surface, wherein the stack layer has a linear slot with a central extension line and the linear slot passes through the stack layer; a first upper conductive plane disposed on the first surface of the stack layer; at least a second upper conductive plane disposed on the first surface of the stack layer around the first upper conductive plane; a first lower conductive plane disposed on the second surface of the stack layer; at least a second lower conductive plane disposed on the second surface of the stack layer, and the first lower conductive plane is around the second lower conductive plane; a first slot conductive wall disposed on an inner wall of the linear slot for connecting the first upper conductive plane with the first lower conductive plane; and at least a second slot conductive wall disposed on the inner surface of the linear slot independent from the first slot conductive wall for connecting the second upper conductive plane with the second lower conductive plane.