Patent ID: 7053452

Claim:
A metal-oxide-semiconductor (MOS) device for an electrostatic discharge (ESD) protection circuit with the MOS device serving as a clamping device in the ESD protection circuit, comprising: a first conductive type substrate; a gate structure, disposed over the substrate; a second conductive type source region and a second conductive type drain region, separately disposed in the substrate on each side of the gate structure; a second conductive type doped layer, disposed in the substrate underneath the source region and the drain region but apart from the source region and the drain region; and a second conductive type extended doped region, disposed in the substrate directly adjacent to the doped layer and the source region; wherein, under a circuit connection, the drain region, the substrate and the source region together form a first parasitic bipolar junction transistor (BJT) and the drain region, the substrate and the doped layer together form a second parasitic bipolar junction transistor so that a current flowing into the drain region is channeled to a same common voltage terminal via the first parasitic BJT and the second parasitic BJT.