Patent ID: 7763934

Claim:
A nonvolatile semiconductor memory comprising: a semiconductor substrate having a source region, a drain region, and a channel region between the source region and the drain region; a first insulating layer formed on the channel region; a charge accumulating layer formed on the first insulating layer and having an oxide dielectric film including a Ti oxide film, a Zr oxide film or a Hf oxide film, and the oxide dielectric film containing an element α selected from a first group consisting of Tc, Re, Ru, Os, Rh, Ir, Pd, Pt, Co, Ni, W, Mo, Cr, Mn and Fe, and an element β selected from a second group consisting of nitrogen, carbon, boron, Mg, Ca, Sr, Ba, Al, Sc, Y, La and Lantanoide, the element α and the element β being distributed in the oxide dielectric film; a second insulating layer formed on the charge accumulating layer; and a control gate electrode formed on the second insulating layer.