Patent ID: 6867105

Claim:
A method for fabricating a bipolar transistor, the method which comprises: producing a first layer on a substrate and forming a collector in the first layer; applying an intermediate layer on the first layer; applying a second layer on the intermediate layer, the intermediate layer being composed of a material that is selectively etchable with respect to a material of the second layer; forming a third layer on the second layer, the third layer being configured such that the third layer forms a lead for a base; processing the second layer and the third layer such that a base cutout for the base is formed in the second layer and an emitter cutout for an emitter is formed in the third layer, and such that the base cutout is provided above a collector and the emitter cutout is provided above the base cutout; forming an undercut in the second layer such that the undercut adjoins the base cutout between the first layer and the third layer and such that the intermediate layer, due to being selectively etchable with respect to the second layer, is not removed when forming the undercut; producing a base terminal region in contact with the lead in a transition region between the lead and the undercut such that the base terminal region at least partly fills the undercut and a cavity remains between the base terminal region and the intermediate layer such that the base terminal region is not in direct contact with the intermediate layer; removing a contact region of the intermediate layer, wherein the contact region is not covered with material of the base terminal region in the undercut and wherein the contact region is in direct contact with the base cutout; forming the base in the base cutout and in a region of the undercut and the cavity not filled with material of the base terminal region; and forming the emitter above the base.