Patent ID: 8400781

Claim:
An integrated circuit apparatus, comprising: a substrate; an active circuit and interconnect layer provided on said substrate and including a plurality of constituent metal layers; a plurality of vias extending through said substrate from said active circuit and interconnect layer to a surface of said substrate opposite said active circuit and interconnect layer; a plurality of bond pads provided on said surface, said bond pads respectively axially aligned with and electrically connected to said vias; and a plurality of terminals provided on said active circuit and interconnect layer, said terminals respectively axially aligned with said vias, a first subset of said terminals electrically connected to the associated vias, and a second subset of said terminals including one said terminal provided as an electrically distinct node relative to the associated axially aligned via, wherein said one terminal is an output of circuitry in said active circuit and interconnect layer, and the associated axially aligned via is an input of said circuitry.