Patent ID: 8623704

Claim:
A method for adhering first and second die to one another at a chosen separation in a multiple-die semiconductor chip package, the method comprising: connecting a wire between a bond pad of a first die and a substrate with the wire having a wire loop height extending from the bond pad; selecting an adhesive/spacer material having pliable spacer elements within an adhesive; depositing the adhesive/spacer material onto a first surface of the first die, the adhesive/spacer material covering 20-50 percent of the first surface of the first die; providing an electrically non-conductive second surface of a second die with a dielectric layer; locating the second surface of the second die opposite the first surface of the first die and in contact with the adhesive/spacer material therebetween thereby: securing the first and second die to one another at the chosen separation; and encapsulating the first die, the second die, and the adhesive/spacer material with an encapsulating material of a filled epoxy containing 80-90 percent filler material.