Patent ID: 8897092

Claim:
A memory storage device, comprising: a connector, configured to be coupled with a host system; a voltage detection circuit, having a first voltage detector and a circuit component voltage detector, wherein the first voltage detector is configured to detect whether a first working voltage is lower than a first voltage threshold and the circuit component voltage detector is configured to detect whether a circuit component working voltage is lower than a circuit component voltage threshold; a rewritable non-volatile memory module, coupled to the voltage detection circuit and operated at the first working voltage; and a memory controller, coupled to the voltage detection circuit, wherein if the first working voltage is lower than the first voltage threshold, the voltage detection circuit transmits a first signal to the memory controller, and the memory controller enters a power saving mode in response to the first signal, wherein the memory controller stops executing a command from the host system and stops giving a command to the rewritable non-volatile memory module in the power saving mode, wherein if the circuit component working voltage is lower than the circuit component voltage threshold, a reset signal is enabled by the voltage detection circuit, wherein the memory controller is unable to receive and execute a command from the host system when the reset signal is enabled.