Patent ID: 8742829

Claim:
A circuit for driving an MOS device, the MOS device having an input terminal configured to receive a first signal in phase with an input signal and an output terminal configured to provide an output signal, the circuit comprising: a first inverter having an input terminal configured to receive a second signal indicative of an inverse of the input signal and an output terminal configured to provide the first signal coupled to drive the input terminal of the MOS device, the first inverter having a power terminal and a ground terminal; a first diode having an anode terminal connected to a first supply rail providing a first supply voltage and a cathode terminal connected to the power terminal of the first inverter; a second diode having an anode terminal connected to the ground terminal of the first inverter and a cathode terminal connected to a second supply rail providing a second supply voltage; and first and second capacitors connected in series between the power terminal and the ground terminal of the first inverter, a first node between the first and second capacitors being configured to receive a third signal in phase with the input signal.