Patent ID: 8185652

Claim:
A data switch comprising: a plurality of ingress/egress ports for transmitting data packets including a MAC destination address and a MAC origin address, the plurality of ingress/egress ports including a first ingress/egress port and a plurality of other ingress/egress ports; and address table construction means for generating a table containing associations between the ingress/egress ports of the switch and MAC addresses of any devices connected to the switch via those ingress/egress ports, wherein the address table construction means is switchable between a first operating state and a second operating state, the address table construction means being operable to: insert said associations into said table for each of the first and the plurality of other ingress/egress ports when in the first operating state, stop generation of the table with respect to the first ingress/egress port before MAC addresses of at least some devices operably coupled through the first ingress/egress port are associated with the first ingress/egress port in the table when in the second operating state; a switching fabric; and a control unit operable to control the switching fabric, the control unit being arranged, upon receiving a data packet from any of the other ingress/egress ports having a destination address which is not stored in the table, to control the switching fabric to transmit the data packet to the first ingress/egress port.