Patent ID: 7541251

Claim:
A method of connecting exposed wire bond pads of a semiconductor apparatus to external connection lines comprising the steps of: providing a semiconductor substrate, the substrate including a plurality of devices, some of which are electrically connected, some of which are ESD protection devices and some of which are filtering devices; disposing a plurality of layers over the semiconductor substrate, at least one of the layers and a top layer being insulating layers and at least another of the layers being a conducting aluminum layer, the conducting aluminum layer including aluminum wiring that electrically interconnects at least some of the plurality of devices, a plurality of internal wire bond pads and a plurality of external wire bond pads; disposing a copper redistribution line located within an insulating redistribution layer over the top layer, the copper redistribution line interconnecting at least some of the internal wire bond pads and including a copper inductor therein; removing vertical portions of the insulating redistribution layer and corresponding vertical portions of the insulating layer in order to expose the plurality of external wire bond pads yet maintain the copper redistribution line and the copper inductor covered; and filling each of the vertical portions with a conducting material to connect the external wire bond pads to the external connection lines.