Patent ID: 8605228

Claim:
A display panel comprising: a plurality of gate lines, each extending in a first direction; a plurality of source lines, each extended in a second direction interlacing with the first direction; and a plurality of pixel units arranged to form a display array, each coupled to three sequentially disposed gate lines among the plurality of gate lines and three sequentially disposed source lines of the plurality of source lines and comprising pixels; wherein, for each pixel unit, the pixels between any set of the two adjacent gate lines are coupled to different gate lines and different source lines, wherein, for each pixel unit, the pixels between one set of the two adjacent source lines are coupled to the same gate line and different source lines, and the pixels between the other set of the two adjacent source lines are coupled to different gate lines and different source lines wherein each pixel unit is coupled to sequential first, second, and third gate lines and sequential first, second, and third source lines and comprises first, second, third, and fourth pixels disposed in a sub-array, wherein for each pixel unit, the first and second pixels are disposed between the first and second gate lines, respectively coupled to the second and first gate lines, and respectively coupled to the second and third source lines, and wherein for each pixel unit, the first and third pixels are disposed between the first and second source lines, and the third pixel is coupled to the second gate line and the first source line.