Patent ID: 8058693

Claim:
A semiconductor device having a switching element, comprising: a first semiconductor layer with a first conductive type, the first semiconductor layer including a first surface, a second surface opposed to and in parallel to the first surface, and a third surface arranged between the first and the second surfaces; a first electrode configured at a side of the second surface and electrically connected to the first semiconductor layer; a plurality of second semiconductor layers selectively configured on a surface region of the first surface, each second semiconductor layer having a second conductive type; a third semiconductor layer with the first conductive type selectively configured on a surface region of the second semiconductor layer; a second electrode configured to be contacted with a surface of the second semiconductor layer and a surface of the third semiconductor layer; a gate electrode formed over the first semiconductor layer via a gate insulator; a first region extended to a direction along the first surface, the first region formed perpendicularly to the first surface including a first tale region, a peak region and a second tale region, wherein a density distribution of crystalline defects in the first region gradually increases, the peak region formed in the first semiconductor layer crosses a current path applying to a forward direction in a p-n junction between the first semiconductor layer and the second semiconductor layer, and the density distribution of the crystalline defects in the second tale region gradually decreases; and a second region adjacent to the first region and extended to a direction along the third surface, the second region including a third tale region formed perpendicularly to the third surface, wherein the density distribution of the crystalline defects in the third tale region gradually increases, and the crystalline defect density in the second region is not over the crystalline defect density of the adjacent first tale region.