Patent ID: 8415239

Claim:
A method for manufacturing a power semiconductor device, which comprises a first electrical contact on a first main side and a second electrical contact on a second main side opposite the first main side and at least a two-layer structure with layers of different conductivity types, the method comprising: providing an n-doped wafer; creating a surface layer of palladium particles on the first main side of the n-doped wafer; irradiating the wafer on the first main side with ions; after irradiating the wafer with ions, diffusing the palladium particles into the wafer at a temperature of not more than 750° C., by which diffusion a first p-doped layer is created; and after diffusing the palladium particles, creating the first and second electrical contacts, wherein during at least the irradiating step, the irradiation ions enter the wafer through an opening in a first mask, or at least one of radiation ion energy and intensity of the irradiation ions is lowered by at least one of the surface layer and the first mask.