Patent ID: 7176815

Claim:
A method of binary arithmetic encoding renormalization, comprising: (a) providing an input M-bit current interval range and an input N-bit current interval endpoint where M and N are positive integers and N is at least M+K+1 where K is an integer greater than 1; (b) providing an input bit count for said endpoint; (c) left shifting said range by the number of leading 0s of said range, and updating said range as the M least significant bits of said shifted range; (d) left shifting said endpoint by said number of leading 0s of said range; (e) increasing said bit count by said number of leading 0s of said range; (f) when said increased bit count is at least N: (1) decrementing said increased bit count by K and updating said bit count as said decremented increased bit count, (2) forming a (K+1)-bit Word as the K+1 least significant bits of a right shift of said left shifted endpoint where said right shift is by said updated bit count number of bits, and (3) updating said endpoint as the updated-bit-count least significant bits of said left shifted endpoint together with any needed left padding 0s; (g) when said Word has a most significant bit=1: (1) adding 1 to an outstanding K-bit number; (2) outputting the results of (1); (3) outputting a set of K-bit 0 s according to an outstanding counter; (4) updating said outstanding K-bit number as the K least significant bits of said Word; and (5) resetting said outstanding counter to 0; (h) when said Word has a most significant bit=0 and all other bits=1, incrementing said outstanding counter; and (i) when said Word has a most significant bit=0 and another bit=0: (1) outputting said outstanding K-bit number; (2) outputting K-bit numbers according to said outstanding counter; (3) updating said K-bit number as the K least significant bits of said Word; and (4) resetting said outstanding counter to 0.