Patent ID: 6975003

Claim:
A semiconductor device which includes a semiconductor layer provided on a buried insulating film on a substrate, and device-isolation regions dividing the semiconductor layer into a plurality of active regions, and in which a first transistor having a channel of a first conductivity type is provided in a first active region of the active regions, and a second transistor having a channel of a second conductivity type is provided in a second active region of the active regions, wherein the first transistor includes: a first source region of the first conductivity type, which is formed within the first active region; a first drain region of the first conductivity type, which is formed within the first active region so as to be spaced apart from the first source region; a first body region of the second conductivity type, which is formed within the first active region so as to be located adjacent to the first source region; a first gate insulting film, which is formed on the active region and has a thin film portion and a thick film portion, wherein the thin film portion is formed closer to the source by a gate oxidation process, and the thick film portion is formed closer to the drain by a LOCOS technique and connected to the thin film portion; a first drain offset region of the first conductivity type, which is formed adjacent to the first drain region within the first active region, and has an impurity-concentration peak in a deep portion located a certain depth-extent below the lower face of the thick film portion of the first gate insulating film; and a gate electrode, which extends over the thin film portion and a part of the thick film portion of the first gate insulating film.