Patent ID: 7767569

Claim:
A method of manufacturing a semiconductor device, comprising at least the steps of: (1) forming multiple word lines on a semiconductor substrate and forming a first interlayer insulating film which covers the whole surface of the word lines; (2) forming a first contact plug which establishes a connection to the semiconductor substrate in multiple prescribed regions of the first interlayer insulating film; (3) forming a second interlayer insulating film on the whole surface of the first contact plug and the first interlayer insulating film and forming a bit line contact plug which establishes a connection to part of the first contact plug in multiple prescribed regions of the second interlayer insulating film; (4) forming a bit line on the bit line contact plug; (5) forming a sacrificial interlayer film which covers the whole surface of the bit line; (6) forming a capacitance contact plug which establishes a connection to part of the first contact plug by piercing through the sacrificial interlayer film and the second interlayer insulating film in multiple prescribed regions of the sacrificial interlayer film; (7) removing the sacrificial interlayer film after forming the capacitance contact plug, to form a column of the capacitance contact plug; (8) forming a third interlayer insulating film on the whole surface of the column of the capacitance contact plug after forming the column and removing part of the third interlayer insulating film from a surface thereof, to expose a surface of the capacitance contact plug; (9) forming a fourth interlayer insulating film on the whole surface of the capacitance contact plug and the third interlayer insulating film and forming a cylinder hole in a prescribed region of the fourth interlayer insulating film, to expose a surface of the third contact hole; (10) forming a lower electrode of a capacitor on an inner surface of the cylinder hole; and (11) forming a capacitance insulating film and an upper electrode of the capacitor on the whole surface including the surface of the lower electrode, wherein the sacrificial interlayer film is made of amorphous carbon.