Patent ID: 7300848

Claim:
A method of manufacturing a semiconductor device, the method comprising the steps of: i) forming a first recess having two sidewalls in an area below a upper surface of a semiconductor substrate, wherein a source area of a gate is defined at or near one recess sidewall and a drain area of the gate is defined at or near the other recess sidewall; ii) forming a recess spacer in the recess contacting each recess sidewall, wherein the recess spacer is made from polysilicon; iii) forming an impurity doping area in the source area of the semiconductor substrate by implanting first conductive impurities through an inclined ion implantation process, wherein the first conductive impurities are implanted in the source area at an angle through the recess; iv) forming a first lightly doped drain(LDD) area in the drain area by implanting second conductive impurities through an inclined ion implantation process, wherein the second conductive impurities are implanted in the drain area at an angle through the recess; v) forming the gate comprising a gate insulating layer formed on surfaces of the recess and recess sidewalls and a gate conductive layer formed on the gate insulating layer such that the gate having two gate sidewalls extends above the upper surface of the semiconductor substrate; vi) implanting impurity ion on the upper surface of the semiconductor substrate corresponding to each side of the gate by performing an impurity ion implantation; viii) forming a gate spacer at each sidewall of the gate; and ix) forming a second source area in the source area and a second drain area in the drain area by implanting impurity ions in the source and drain areas, wherein the depths of the source and drain areas in the semiconductor substrate are asymmetrical.