Patent ID: 8031285

Claim:
A method of manufacturing a thin film transistor substrate, comprising; forming gate lines extending in a first direction on a substrate and comprising gate electrodes; forming common voltage lines on the substrate such that are spaced apart from the gate lines; sequentially forming a gate insulating film, an active layer, and an ohmic contact layer on the gate lines and the common voltage lines to form active regions of thin film transistors; forming first contact holes in the gate insulating film, the first contact holes exposing a part of each common voltage line; disposing data lines, drain electrodes, and common electrodes on the substrate, the data lines extending in a second direction crossing the gate lines and comprising source electrodes and the common electrodes being connected to the common voltage lines through the first contact holes; forming a passivation film on the data lines, the common voltage lines, and the common electrodes, the passivation film comprising second contact holes exposing a part of each drain electrode; and forming pixel electrodes on the substrate, the pixel electrodes being connected to the drain electrodes through the second contact holes, wherein the passivation film contacts the drain electrode.