Patent ID: 7227200

Claim:
A metal input/output (I/O) ring structure for a semiconductor device, comprising: a first metal layer; a second metal layer located below the first metal layer; a plurality of power metal lines formed on the first metal layer and connected to a power supply; a plurality of ground metal lines formed on the first metal layer and connected to ground; a plurality of power metal lines formed on the second metal layer and connected to the power supply; a plurality of ground metal lines formed on the second metal layer and connected to ground; and, an insulating layer interposed between the first metal layer and the second metal layer, providing a decoupling capacitance between the power metal lines and the ground metal lines, wherein: the power metal lines and the ground metal lines on the first and second metal layers each comprise saw-toothed protrusions; wherein the saw-toothed protrusions of horizontally adjacent power metal lines and ground metal lines are interdigitated with each other; the saw-toothed protrusions of the power metal lines on the first metal layer are connected to the saw-toothed protrusions of the power metal lines on the second metal layer; and, the ground metal lines on the first metal layer and the ground metal lines on the second metal layer are connected to each other through groove spaces formed between the connected saw-toothed protrusions of the power metal lines on the first and second metal layers.