Patent ID: 7868466

Claim:
A semiconductor device, comprising: a substrate that has a first region and a second region, the second region surrounding the first region; an interconnect pattern that is formed on the substrate, the interconnect pattern being formed on the first region and the second region; a protective layer that is formed on at least a part of the second region and a first part of the interconnect pattern, the protective layer having an opening such that a second part of the interconnect pattern is within the opening; a semiconductor chip that is mounted within the first region, the semiconductor chip having a first surface that is on a side of the substrate and a second surface that is directly adjacent to the first surface, the semiconductor chip being electrically connected to the interconnect pattern, the semiconductor chip overlapping the opening; and an adhesive that has a first portion and a second portion, the first portion being disposed within the first region, the second portion being disposed on the protective layer on the second region, the adhesive entirely covering the second part of the interconnect pattern, the adhesive being in contact only with the first surface and not being in contact with the second surface, the first portion and the second portion being cured.