Patent ID: 7452771

Claim:
A method for fabricating a semiconductor device comprising a transistor including a control gate and a floating gate electrode, the method comprising the steps of: forming a first well of an impurity region of a first conduction type in a semiconductor substrate; forming a second well of an impurity region of a second conduction type in the first well; forming a control gate of an impurity region of the first conduction type in the second well; forming a first gate insulation film on a channel region outside the first well, and a second gate insulation film on the control gate; forming a floating gate electrode over a region from the channel region to the control gate; and forming a first impurity diffused layer of the first conduction type on one side of the channel region and a second impurity diffused layer of the first conduction type on the other side of the channel region, wherein in the step of forming the floating gate electrode, the floating gate is formed so that an area of a region where the control gate and the floating gate electrode are opposed to each other is 40 or more times as large as an area of a region where the channel region and the floating gate electrode are opposed to each other.