Patent ID: 7408379

Claim:
An impedance calibration circuit comprising: a reference voltage selection signal generation unit configured to receive a test mode signal and output a plurality of reference voltage selection signals; a reference voltage generation unit coupled to the reference voltage selection signal generation unit and configured to output a first reference voltage, the first reference voltage having a voltage level based on the plurality reference voltage selection signals; a comparison unit coupled to the reference voltage comparison unit and configured to compare the voltage level of the first reference voltage with a voltage level of a second reference voltage at an impedance calibration terminal, the comparison unit further configured to output a control signal based on the comparison; an impedance calibration unit coupled to the comparison unit and configured to output an impedance control code in response to the control signal, the impedance calibration unit further configured to generate a calibration impedance based on the impedance control code; and an impedance matching unit coupled to the impedance calibration unit and configured to adjust a circuit interface impedance in response to the impedance control code.