Patent ID: 6911372

Claim:
A method of fabricating a storage capacitor of a semiconductor memory device, said method comprising: depositing a first dielectric film and a second dielectric film on a substrate in an area where a memory cell transistor has been formed, and forming a defined first photoresist pattern on an upper part of the second dielectric film; anisotropically etching the second and first dielectric films by using the first photoresist pattern as an etch mask, to form a first contact hole for exposing an activation region of the transistor; removing the first photoresist pattern, wet-etching the substrate with an etching solution having a difference in an etch ratio between the first and second dielectric films to form a second contact hole having a negative slope; depositing a conductive film to form within the second contact hole a contact plug of the storage capacitor having a void therein; performing an etchback to open an upper part of the void of the contact plug; covering a structure produced by the preceding steps with a third dielectric film, and then forming a second photoresist pattern for defining a region where a storage capacitor electrode is to be formed; dry-etching the third dielectric film exposed through the second photoresist pattern; and removing the second photoresist pattern, and covering a surface of the device with material to form the storage capacitor electrode, to obtain the storage capacitor electrode having a double cylindrical structure.