Patent ID: 7501342

Claim:
A method for manufacturing a device having a via structure, the method comprising the following steps of: providing a substrate; forming a seed metallic layer on the substrate; forming a patterned metallic-trace layer on the seed metallic layer; forming a positive-type photoresist layer on the patterned metallic-trace layer and the seed metallic layer; patterning the positive-type photoresist layer for defining at least one through hole which exposes a part of the patterned metallic-trace layer, wherein the through hole has a predetermined aspect ratio; electroplating a metallic material in the through hole so as to form a metallic pillar, wherein the metallic pillar has a top surface; removing the positive-type photoresist layer; etching a part of the seed metallic layer, whereby traces of the patterned metallic-trace layer are electrically isolated from each other; and forming a dielectric material layer on the substrate for sealing the patterned metallic-trace layer and a part of the metallic pillar and exposing the top surface of the metallic pillar.