Patent ID: 7217915

Claim:
A method for detecting light which is incident to a first semiconductor die to facilitate in aligning the first semiconductor die, the method comprising: biasing a gate voltage of an integrating transistor to be close to a threshold voltage of the integrating transistor; generating light from a light source located on a second semiconductor die which is in close proximity to the first semiconductor die, so that the light is received at the photo-detector on the first semiconductor die; receiving the light at a photo-detector on the first semiconductor die, wherein the photo-detector converts the received light into a current; applying the current to the gate of the integrating transistor so that the current causes a charge to collect at the gate of the integrating transistor, which eventually causes the integrating transistor to switch, thereby indicating that light has been received by the photo-detector on the first semiconductor die; receiving light at a second photo-detector on the first semiconductor die, wherein the second photo-detector is part of an array of photo-detectors on the first semiconductor die; applying the current from the second photo-detector to a corresponding integrating transistor in a corresponding array of integrating transistors; and determining an alignment of the first semiconductor die relative to the second semiconductor die based upon which photo-detectors in the array of photo-detectors received the light, wherein the alignment is to a precision that would allow capacitive communication between the first semiconductor die and the second semiconductor die.