Patent ID: 8198105

Claim:
A method for monitoring critical dimension (CD) variations of a reticle, comprising: providing a reticle layer over a reticle substrate, said reticle layer including each of: a patterned feature area corresponding to a desired circuitry pattern; and a test pattern area, wherein a portion of said test pattern area is within a step-distance of a portion of said patterned feature area; patterning a resist material by stepping said reticle, the patterning including each of the patterned feature area and test pattern area incorporated in said reticle layer; visually inspecting said resist material for light and dark regions within said test pattern area, said light and dark regions representing a corresponding variance in said patterned feature area of the resist material, using said resist material as patterned by said reticle to form the feature of a semiconductor device after said visually inspecting.