Patent ID: 7886174

Claim:
An apparatus to train a memory link, comprising: a signal alignment unit, coupled to a plurality of signal lines of the link, operable to align a read data strobe signal of the link on a center of a read data eye of the link; align a receive enable signal of the link with a time that data returns on one or more data lines of the link after a column address strobe signal is sent to a memory coupled to the link; align a write data strobe signal of the link with a clock signal of the link; and align a center of a write data eye of the link with a write data strobe of the Link; an alignment timeout timer to time out of one or more of the align operations if one or more of the align operations takes longer than a predetermined maximum time designated for an align operation; and an alignment error register to store one or more alignment error flags, each alignment error flag being designated to report an alignment error for one of the one or more align operations, wherein an alignment error flag is set if the time spent on its designated align operation exceeds the predetermined maximum time.