Patent ID: 8143120

Claim:
A process for forming bipolar junction transistors in a semiconductor substrate, the process comprising: forming a first doped tub region of a first dopant type within the substrate; forming first, second, third and fourth doped sinker regions of a second dopant type within the substrate; forming second and third tub regions of the second dopant type in the substrate; concurrently forming first, second, third and fourth subcollector regions and a triple well region all of the second dopant type, wherein the triple well region and the second and the third tub regions cooperate to electrically isolate the first doped tub region from the substrate, and wherein each one of the first, second, third and fourth subcollector region cooperates with a respective one of the first, second, third and fourth doped sinker regions; doping the second and the fourth subcollector regions with the second dopant type; and doping a portion of the third and the fourth subcollector regions with the second dopant type.