Patent ID: 7755529

Claim:
An AD converter comprising: a delta-sigma modulation circuit configured to perform delta-sigma modulation for an analog signal from a bridge circuit, and output a delta-sigma modulated signal as a quantized signal, the bridge circuit being configured to output the analog signal according to physical quantity to be measured; a switch circuit configured to switch between a first state and a second state based on a logic level of a control signal, the first state being a state where a voltage of a first level is applied to one terminal of the bridge circuit and a voltage of a second level different from the first level is applied to the other terminal of the bridge circuit, the second state being a state where the voltage of the second level is applied to the one terminal and the voltage of the first level is applied to the other terminal; and an up-down counter configured to increase a count value based on a rate of the quantized signal being one logic level, during a predetermined period, when the bridge circuit is in the first state, and decrease the count value based on a rate of the quantized signal being one logic level, during the predetermined period, when the bridge circuit is in the second state, the count value being a value to be a digital signal according to the physical quantity.