Patent ID: 6915405

Claim:
In a host computer system including a host processor, a host memory and an addressable main memory coupled to the host processor, the main memory storing data pages, at least one data page storing a page table, a process, carried out by the host computer system, for emulating a target computer system running target system software comprising: A) establishing a representation of a target system processor in the host memory; B) establishing a representation of a target system associative memory in the host memory, the target system associative memory storing a plurality of entries, each entry in the target system associative memory being stored in accordance with a low order virtual address component, each entry in the target system associative memory including fields respectively holding: 1) a high order virtual address component; 2) a real page address; and 3) a multi-digit validity count; C) establishing a representation of a target system multi-digit counter in the host memory, the target system multi-digit counter storing a current validity count; D) when, during the ongoing data processing activity of the target system running target system software, access to a specified data page in main memory is requested: 1) using a low order virtual address component of the requested data page to specify an entry in the target system associative memory; 2) comparing a high order virtual address component of the requested data page to the high order virtual address component read from the specified target system associative memory entry; and 3) comparing the multi-digit validity count read from the specified target system associative memory entry to the multi-digit current validity count in the target system counter; E) if there are matches: 1) between the requested high order virtual address component and the high order address component read from the target system associative memory; and 2) between the multi-digit validity count in the target system multi-digit counter and the multi-digit validity count read from the target system associative memory; then concatenating the real page address in the specified entry in the target system associative memory with an appended offset value to access a main memory block in the requested data page in main memory.