Patent ID: 7622801

Claim:
A semiconductor device comprising: a wiring layer including a first wiring, said wiring layer having a first surface and a second surface opposed to said first surface; an IC chip having an electrode on a front surface, the IC chip mounted on said first surface to be electrically connected to said first wiring via said electrode; a plurality of conductive posts provided on said first surface to be electrically connected to said first wiring; and insulating resin filling a space between said IC chip and the plurality of conductive posts to form an upper surface opposite to said first surface and to expose an end surface of the plurality of conductive posts; wherein said insulating resin forms a single under surface; wherein said wiring layer is formed by a continuous film so that all of the single under surface of said insulating resin is covered completely with said wiring layer; wherein the second surface of the wiring layer comprises a solder resist layer and a plurality of exposed portions; wherein at least one of the exposed portions is located opposite at least one of the conductive posts along an axis perpendicular to the wiring layer.