Patent ID: 7943493

Claim:
A method of forming a semiconductor structure comprising: forming a first semiconductor layer comprising a first semiconductor material on an insulator region in a substrate; forming a second semiconductor layer comprising a second semiconductor material directly on said first semiconductor layer, wherein said second semiconductor material is different from said first semiconductor material; patterning a contiguous block of containing said first semiconductor layer and said second semiconductor layer; masking a stack of a first semiconductor portion and a second semiconductor portion, wherein said first semiconductor portion is a portion of said first semiconductor layer and said second semiconductor portion is a portion of said second semiconductor layer, while exposing another portion of said second semiconductor layer; etching said another portion of said second semiconductor layer to expose a top surface of another portion of said first semiconductor layer, while protecting said stack; and fully metallizing said another portion of said first semiconductor layer to form a first metal semiconductor alloy portion and partially metallizing said second semiconductor portion to form a second metal semiconductor alloy portion, wherein said second metal semiconductor alloy region abuts said first metal semiconductor alloy portion and said second semiconductor portion.