Patent ID: 8710637

Claim:
A semiconductor device comprising: a wiring board including an upper surface, a plurality of bonding leads formed on the upper surface, a lower surface opposite to the upper surface, and a plurality of lands formed on the lower surface, a shape in a plan view of the upper surface being comprised of a quadrangle; a semiconductor chip including a front surface, a plurality of bonding pads formed on the front surface, and a rear surface opposite to the front surface, and mounted over the upper surface of the wiring board, a shape in the plan view of the front surface being comprised of a quadrangle; a plurality of wires electrically connecting the bonding pads with the bonding leads, respectively; and a sealing body sealing the semiconductor chip and the wires, wherein the bonding leads have a plurality of first row bonding leads arranged along a first substrate side of the upper surface of the wiring board in the plan view, and a plurality of second row bonding leads arranged along the first substrate side of the upper surface of the wiring board and arranged between the first row bonding leads and the first substrate side in the plan view, wherein the bonding pads have a plurality of first row bonding pads arranged along a first chip side of the front surface of the semiconductor chip in the plan view, and a plurality of second row bonding pads arranged along the first chip side of the front surface of the semiconductor chip and arranged on the side closer to the central part of the front surface than the first row bonding pads in the plan view, wherein the semiconductor chip is mounted over the upper surface of the wiring board such that the first chip side of the semiconductor chip aligns with the first substrate side of the wiring board, wherein the wires have a plurality of first wires electrically connecting the first row bonding pads with the first row bonding leads, respectively, and a plurality of second wires electrically connecting the second row bonding pads with the second row bonding leads, respectively, and wherein each of the second wires has a part farther from the upper surface of the wiring board than the first wires, and wherein the diameter of a corner part wire of the second wires, which is coupled to a bonding pad arranged at the corner part on the front surface of the semiconductor chip, is larger than the diameter of each of the first wires and the second wires other than the corner part wire.