Patent ID: 8232147

Claim:
A fabricating method of a thin film transistor, comprising: forming a gate on a substrate; forming a gate insulating layer on the substrate to cover the gate; sequentially forming a channel material layer, an ohmic contact material layer, and a patterned photoresist layer on the gate insulating layer, wherein the patterned photoresist layer is located above the gate; patterning the channel material layer and the ohmic contact material layer by using the patterned photoresist layer as a mask, so as to form a channel layer and an ohmic contact layer between the channel layer and the patterned photoresist layer; forming a dielectric layer to completely cover the patterned photoresist layer, a sidewall of the channel layer, a sidewall of the ohmic contact layer, and the gate insulating layer, wherein the dielectric layer is a continuous layer; removing the patterned photoresist layer and a portion of the dielectric layer that is in contact with the patterned photoresist layer, so as to expose the ohmic contact layer; and forming a source and a drain on a portion of the dielectric layer and on a portion of the ohmic contact layer, and removing a portion of the ohmic contact layer that is not covered by the source or the drain.