Patent ID: 8778757

Claim:
A method of manufacturing a dynamic random access memory (DRAM) device, comprising: forming a buried-type gate in a substrate including at least one first pad region and at least one second pad region, the buried-type gate extending in a first direction; forming a capping insulating layer pattern over the buried-type gate, the capping insulating layer pattern protruding from the substrate; forming a conductive layer pattern filling up a gap between portions of the capping insulating layer pattern, the conductive layer pattern contacting a surface of the substrate; forming an insulating interlayer over the conductive layer pattern and the capping insulating layer pattern; etching the insulating interlayer, the conductive layer pattern, the capping insulating layer pattern and an upper portion of the substrate to form an opening extending in the first direction and to form a first pad electrode having an island shape, the first pad electrode contacting the first pad region of the substrate; forming a first spacer on a sidewall of the opening such that a gap remains in an inner portion of the opening corresponding to the second pad region of the substrate and a remaining portion of the opening is completely filled; forming a second pad electrode in the gap remaining in the inner portion of the opening; forming a bit line electrically connected to the second pad electrode; and forming a capacitor electrically connected to the first pad electrode.