Patent ID: 7509223

Claim:
A circuit comprising: control circuitry having a first output that transmits a data test signal and having a second output that transmits a strobe test signal; one or more data channels, each including: a data input buffer that receives a data signal from an input pad; a data calibration timing device having a data input coupled with the first output of the control circuitry; a data delay having an input coupled with the data input buffer and coupled with the data calibration timing device; and an input timing device having a data input coupled with the data delay and having an output coupled with the control circuitry; and a strobe channel including: a strobe input buffer that receives a strobe signal from an input pad; a strobe calibration timing device having a data input coupled with the second output of the control circuitry; a strobe delay having an input coupled with the strobe input buffer and coupled with the strobe calibration timing device and having an output coupled with a clock input of each input timing device; wherein the control circuitry is adapted to: determine, for each data channel, a relative timing between a data test signal at the data input of the input timing device and a strobe test signal at the clock input of the input timing device, wherein the relative timing is based on the output of the input timing device; and align a first edge of the data test signals and the strobe test signal by adjusting at least one of the delays.