Patent ID: 7960290

Claim:
A method of fabricating a semiconductor device, comprising: providing a semiconductor substrate having a front surface and a back surface; forming a via in the semiconductor substrate, wherein the via is co-planar with the front surface of the semiconductor substrate; filling the via with a disposable material, the disposable material being co-planar with the front surface of the semiconductor substrate, wherein the disposable material comprises at least one of amorphous carbon, low-k dielectric material, and polysilicon; thinning the substrate such that the via is co-planar with the back surface of the semiconductor substrate, while the via is filled with the disposable material; forming a first dielectric layer on the filled via; removing a portion of the first dielectric layer providing a small opening, wherein the small opening exposes a portion of the disposable material of the filled via; etching the disposable material through the small opening; after etching the disposable material, filling the via with a permanent fill material; and forming a second dielectric layer over the first dielectric layer so as to close the small opening.