Patent ID: 7906841

Claim:
An encapsulation chip, comprising: a device substrate; a circuit module mounted on the device substrate; a bonding layer deposited on a predetermined area of the device substrate; a protection cap forming a cavity over the circuit module and bonded to the device substrate by the bonding layer; a connection pad formed on a lower surface of the protection cap and connected with one or more vias passing through the protection cap, the connection pad extending to a recessed region of the protection cap; and encapsulation portions passivated connectively using a same material on an upper area and a side area of the protection cap and a side area of the bonding layer, wherein the protection cap comprises: a first beveled peripheral edge; a second beveled peripheral edge; one or more vias passing through the protection cap; and one or more electrodes electrically connected to the one or more vias over an upper surface of the protection cap, and wherein the encapsulation portions are passivated on the one or more vias and a part of the one or more electrodes without passivation to another part of the one or more electrodes, wherein the encapsulation portions are formed by spreading the same material at one time on the upper area and the side area of the protection cap and the side area of the bonding layer, and wherein the encapsulation portions are configured to prevent moisture from entering through gaps between the vias and the electrodes due to a thermal expansion coefficient difference between the vias and the electrodes.