Patent ID: 7209002

Claim:
An audio amplifier comprising: a sampling rate converter circuit for converting a sampling rate of a first digital audio signal with a first clock synchronized thereto and with a second clock having a stable and predetermined frequency into a second digital audio signal synchronized with the second clock; a ΔΣ modulation circuit for re-quantizing the second digital audio signal into a bit-reduced third digital audio signal; a PWM modulation circuit for converting the third digital audio signal to a PWM signal; a D-class power amplifier supplied with the PWM signal outputted from the PWM modulation circuit; a dither signal forming circuit for superimposing a dither signal on the third digital audio signal by supplying the dither signal to the ΔΣ modulation circuit; and a muting signal forming circuit; wherein an input side of the sampling rate converter circuit is stopped by the muting signal upon muting.