Patent ID: 8760371

Claim:
A drive circuit comprising: first and second P-channel MOS transistors connected with a first voltage; a first N-channel MOS transistor connected between said first P-channel MOS transistor and a second voltage which is lower than the first voltage, and having a gate configured to receive a first input signal, wherein a gate of said second P-channel MOS transistor is connected with a first node between said first P-channel MOS transistor and said first N-channel MOS transistor; a second N-channel MOS transistor connected between said second P-channel MOS transistor and said second voltage and having a gate configured to receive a second input signal, wherein a gate of said first P-channel MOS transistor is connected with a second node between said second P-channel MOS transistor and said second N-channel MOS transistor; an output P-channel MOS transistor connected between said first voltage and an output node and having a gate connected with said second node; an output N-channel MOS transistor connected between said output node and said second voltage and having a gate supplied with an input signal having a same polarity as that of the first input signal; and a P-channel MOS transistor having a source connected directly to said first node, a drain connected directly to said output node, and a gate connected directly to said second node, wherein the P-channel MOS transistor is turned on and off according to a voltage of the second node.