Patent ID: 8407556

Claim:
An apparatus, comprising: a plurality of symbol demappers that is operative to demap each of a plurality of input signals that corresponds to the plurality of streams using at least one constellation that has a corresponding mapping thereby generating a plurality of x-bit labels that corresponds to the plurality of streams, wherein each symbol demapper corresponds to one respective stream of the plurality of streams, wherein x is an integer; a MUX (multiplexor) that is operative to combine the plurality of x-bit labels thereby generating an LDPC (Low Density Parity Check) code block; a deinterleaver that is operative to perform symbol to bit deinterleaving on the LDPC code block thereby generating a deinterleaved LDPC code block; and an LDPC decoder that is operative to employ an LDPC matrix of a GRS (Generalized Reed-Solomon)-based irregular LDPC code to decode the deinterleaved LDPC block thereby making a best estimate of an information bit encoded therein; and wherein: the GRS-based irregular LDPC code is generated using GRS code.