Patent ID: 8636458

Claim:
A wafer processing system comprising: a lithography tool; a local track connected with the lithography tool; a transfer device handler configured and arranged to handle a transfer device and transfer wafers from and to the transfer device; an interface unit configured and arranged to transfer wafers between one or more of the transfer device and the lithography tool, the lithography tool and the local track, and the local track and transfer device, wherein the interface unit comprises: a plurality of processing units each having a first side with an access opening, arranged about a common fixed axis such that the first side of each unit faces the axis, wherein each of the processing units comprise one or more of: a soak unit, a post expose bake unit, a post expose bake and chill unit, and an input/output buffer, and wherein the plurality of processing units are densely arranged with portions of some units positioned behind other units while allowing access to all openings; and two or more robots centrally located with respect to, and external to, the plurality of processing units and configured to move vertically on respective guides co-located along a single, common, axis that is permanently fixed relative to the plurality of processing units; a distant track separated from the lithography tool and the local track, wherein the transfer device handler is configured to transfer wafers between the distant track and the local track; and a controller configured and arranged to schedule processing by the lithography tool, local track, distant track, interface unit and transfer device handler, such that the local track is used for time critical processes and the distant track is used for non-critical processes, wherein the length of time that elapses before the wafer begins the non-critical process does not affect the outcome of the non-critical process.