Patent ID: 7966506

Claim:
A method comprising: promoting a processor core from a first power saving state to a second power saving state in response to receiving a first power state promote signal, the second power saving state to a third power saving state in response to receiving a second power state promote signal, the third power saving state to a fourth power saving state in response to receiving a third power state promote signal, wherein the first power-state promote signal, the second power state promotion signal, and the third power state promotion signal are generated in response to occurrence of a state changing parameter and the first, second, third, and the fourth power saving state represents C states of an automatic core C-state promotion (ACCP) policy, and demoting the processor core from one of the first, second, third, or fourth power saving state to a working state if an event occurs during the time in which the processor core is in one of the first, second, third, or fourth power saving state, wherein the working state is a higher power consumption state than any one of the first, second, third, or fourth power saving state.