Patent ID: 7795958

Claim:
An apparatus comprising: a switched capacitor amplifier circuit that samples an input signal during a sample phase, that receives a first reference voltage during a hold phase, that receives a first input common mode voltage during the sample phase voltage, and that receive an output common mode voltage during the sample phase; and a reference signal generator having: a reference amplifier having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the reference amplifier receives a second input common mode voltage, and wherein the output terminal of the reference amplifier is coupled to the switched capacitor reference amplifier circuit so as to provide the first reference voltage to the switched capacitor reference amplifier circuit during the hold phase; and a switched capacitor network having a plurality of switches and a plurality of capacitors, wherein the switched capacitor network is coupled to the second input terminal of the reference amplifier and the output terminal of the reference amplifier, wherein at least one of the capacitors receives at least a portion of the input signal during the sample phase and a second reference voltage during the hold phase, and wherein at least one of the capacitors receives the output common mode voltage during the sample phase and the second input common mode voltage during the sample phase.