Patent ID: 8143877

Claim:
A semiconductor circuit, comprising: a main circuit receiving an input signal and comprising: a first current source coupled between a first node and a first power voltage to generate a first current according to a first bias voltage; and a replica circuit coupled to the main circuit to duplicate a variation in a voltage at the first node caused by a variation in the input signal and dynamically adjust the first bias voltage according to the duplicated variation such that the first current is maintained at a constant, wherein the replica circuit comprises: a second current source coupled between a second power voltage and a second node; a differential pair coupled between the second node and a third node, receiving the input signal; a third current source coupled between the third node and the first power voltage, wherein bias control terminals of the first and third current sources are coupled to the second node; and a level shifter coupled between the second node and the bias control terminals of the first and the third current sources.