Patent ID: 8253138

Claim:
A thin film transistor comprising: a gate electrode; a gate insulating layer covering the gate electrode; a microcrystalline semiconductor layer over the gate insulating layer; an amorphous semiconductor layer having a recession portion over the microcrystalline semiconductor layer; a source region and a drain region which are provided over the amorphous semiconductor layer; and a source electrode and a drain electrode which are in contact with and over the source region and the drain region, respectively, wherein a thickness of a part of the amorphous semiconductor layer overlapping the source region and the drain region is 60 nm or more and less than 80 nm, and a thickness of a part of the amorphous semiconductor layer overlapping a channel formation region is 10 nm or more and less than 30 nm, wherein a side face of the drain region is present in substantially the same plane as a side face of the recession portion, wherein the side face of the recession portion is tapered, and wherein a taper angle which is made by a plane of a bottom surface of the recession portion and the side face of the recession portion and is defined in the amorphous semiconductor layer is within the range of 10° to 50°.