Patent ID: 6977207

Claim:
A method for fabricating a dual-gate semiconductor device, the method comprising the steps: forming field oxide films defining an active region and field region on a semiconductor substrate; forming a polysilicon layer on the semiconductor substrate having the field oxide films formed therein; forming a first photoresist pattern on the semiconductor substrate such that a portion of the polysilicon layer placed on the active region between the field oxide films is exposed; performing a first N + ion implantation process in the polysilicon layer using the first photoresist pattern as a mask; removing the first photoresist pattern; forming a second photoresist pattern on the polysilicon layer such that the same portion of the polysilicon layer to which the first N+ ion implantation process is performed is exposed; performing a second N + ion implantation process in same portion of the polysilicon layer to which the first N+ ion implantation process is performed using the second photoresist pattern as a mask; removing the second photoresist pattern; and subjecting the resulting substrate to a thermal diffusion process.