Patent ID: 8802537

Claim:
A method for forming a memory device, the method comprising: forming a barrier oxide layer over a substrate; forming a nitride layer over the barrier oxide layer; etching the nitride layer, the barrier oxide layer and the substrate to form a trench, the trench including sidewalls that slope inward from an upper surface of the nitride layer; pre-cleaning the memory device to prepare an exposed surface of the sidewalls of the trench for oxide formation thereon, pre-cleaning the memory device including: removing first portions of the barrier oxide layer on opposite sides of the trench to reduce a width of the barrier oxide layer, the first portions of the barrier oxide layer undercutting portions of the nitride layer; trimming, after pre-cleaning the memory device, the nitride layer to remove portions of the nitride layer on opposite sides of the trench and to expose second portions of the barrier oxide layer on the opposite sides of the trench, the exposed second portions of the barrier oxide layer being adjacent to the sidewalls, a distance that the nitride layer is trimmed being less than a width of the nitride layer, the distance that the nitride layer is trimmed being between about 500 Å and about 2000 Å, and the width of the nitride layer being between about 1000 Å and about 1700 Å, trimming the nitride layer after pre-cleaning the memory device preserving an integrity of a region of the substrate adjacent to the sidewalls, and the first portions of the barrier oxide layer being different from the second portions of the barrier oxide layer; forming a liner oxide layer on the sidewalls of the trench; filling the trench with a field oxide material over the liner oxide layer; planarizing the field oxide material to form a planar top surface that is aligned with a top surface of the trimmed nitride layer; stripping the trimmed nitride layer to form a mesa from the field oxide material, the mesa extending above a top of the trench, stripping the trimmed nitride layer exposing third portions of the barrier oxide layer positioned beneath the nitride layer, the third portions of the barrier oxide layer being different from the first portions of the barrier oxide layer and the second portions of the barrier oxide layer; and cleaning the memory device to strip the barrier oxide layer and to remove portions of the field oxide layer, removing the portions of the field oxide layer reducing a width of the mesa, and cleaning the memory device including: forming a fourth oxide layer on the substrate adjacent the mesa, and removing the fourth oxide layer, removing the fourth oxide layer reducing the reduced width of the mesa.