Patent ID: 8796690

Claim:
A thin film transistor substrate comprising: a substrate comprising a plurality of grooves having different depths, respectively, to have a multi-step structure; gate and data lines alternatively crossed in the grooves to form a plurality of pixel areas; thin film transistors formed in the grooves of the substrate to be formed in cross portion of the gate and data lines, wherein the substrate comprises first to fourth grooves having different heights, respectively, and a first horizontal surface of the substrate is exposed by the first groove and a second horizontal surface of the substrate is exposed by the second groove having a lower depth than the first groove and a third horizontal surface of the substrate is exposed by the third groove having a lower depth than the second groove and a fourth horizontal surface of the substrate is exposed by the fourth groove having a lower depth than the third groove, and the active layers of the thin transistors are formed along the gate lines and gate electrodes, and the active layers are separated from active layers of neighboring pixel areas by the first groove located on both sides of the data lines, where the first groove has inclined surface on both inner sides.