Patent ID: 8909997

Claim:
A semiconductor device comprising: an arithmetic and logic unit; a first watchdog timer used for runaway monitoring of the arithmetic and logic unit; a second watchdog timer used for runaway monitoring of the arithmetic and logic unit; first to third clock sources, and first to third diagnosis circuits, wherein the first diagnosis circuit monitors the second watchdog timer and generates a first diagnosis result signal indicating whether a monitoring result is abnormal or not, the third diagnosis circuit monitors the first watchdog timer and generates a second diagnosis result signal indicating whether a monitoring result is abnormal or not, the second diagnosis circuit determines whether the first diagnosis circuit is abnormal or not based on the first diagnosis result signal, and determines whether the third diagnosis circuit is abnormal or not based on the second diagnosis result signal, the first clock source supplies a clock to the first watchdog timer and the second diagnosis circuit, the second clock source supplies a clock to the first diagnosis circuit and the arithmetic and logic unit, and the third clock source supplies a clock to the second watchdog timer and the third diagnosis circuit.