Patent ID: 8617944

Claim:
A method for manufacturing a thin film transistor array panel, comprising: forming a gate line on a substrate; forming a gate insulating layer covering the gate line; forming a semiconductor layer on the gate insulating layer; forming a data line and a drain electrode on the semiconductor layer; forming a passivation layer having a contact hole on the data line; forming a first pixel electrode connected to the drain electrode through the contact hole on the passivation layer; removing the first pixel electrode by using an etchant; and forming a second pixel electrode connected to the drain electrode through the contact hole on the passivation layer, wherein the etchant comprises an inorganic acid, an ammonium (NH 4 + )-containing compound, a cyclic amine compound, and water, wherein the inorganic acid comprises H 2 SO 4 and another inorganic acid, and a concentration of H 2 SO 4 is less than half of a concentration of the another inorganic acid.