Patent ID: 7301824

Claim:
Apparatus for communication, comprising: an integrated circuit including a first logic circuit, a second logic circuit, first first-in-first-out (FIFO) logic, second FIFO logic, and an interconnection network; wherein said first FIFO logic and said second FIFO logic each comprise: a dual-port memory having a write port and a read port; an asynchronous receiver in communication with said write port; an asynchronous driver in communication with said read port; and a multiplexer having a first input port in communication with said asynchronous receiver, a second input port in communication with a respective one of said first logic circuit and said second logic circuit, and an output port in communication with said write port; wherein said first FIFO logic and said second FIFO logic are configured for asynchronous serial communication over said interconnection network; and said first FIFO logic and said second FIFO logic are configured to respectively communicate with each said first logic circuit and said second logic circuit in respective synchronous time domains.