Patent ID: 8242944

Claim:
A Digital-to-Analog (DA) conversion circuit comprising: a gradation voltage generation circuit which generates a plurality of main voltages corresponding to most significant bits of an inputted data and a plurality of sub voltages corresponding to least significant bits of the inputted data; a most-significant-bits decoder which selects one of the main voltages in accordance with the most significant bits; a least-significant-bits decoder which selects one of the sub voltages in accordance with the least significant bits; and a calculation circuit which performs calculation processing, based on a first main voltage selected by the most-significant-bits decoder, a first sub voltage selected by the least-significant-bits decoder, and a reference voltage, wherein: the calculation circuit includes an amplifier circuit; the reference voltage is inputted to a non-inverting input terminal of the amplifier circuit, and the first main voltage and the first sub voltage are inputted to an inverting input terminal of the amplifier circuit; the calculation circuit includes a first capacitor and a second capacitor having substantially the same capacity values, the most-significant-bits decoder is connected to one end of the first capacitor while the inverting input terminal of the amplifier circuit is connected to an other end of the first capacitor; the least-significant-bits decoder is connected to one end of the second capacitor, and the inverting input terminal of the amplifier circuit is connected to an other end of the second capacitor, and the calculation circuit includes a second switch device connected between the most-significant-bits decoder and the first capacitor, and a third switch device connected between the least-significant-bits decoder and the second capacitor.