Patent ID: 7585742

Claim:
A semiconductor device manufacturing method comprising: covering a surface of a substrate structure including a semiconductor layer with a first film including first and second openings, the first opening being configured as an alignment mark, and the second opening being configured as an opening for introducing an impurity into a first predetermined position of the semiconductor layer; introducing a first impurity into the semiconductor layer through the second opening; forming a third opening in the first film while using a photo mask aligned with the first opening used as an alignment mark, the third opening being configured as an opening for introducing an impurity into a second predetermined position of the semiconductor layer; introducing a second impurity into the semiconductor layer through the third opening; forming a trench in the semiconductor layer through the first opening at substantially the same time as forming the third opening; and after removal of the first film, forming a device isolation area in the semiconductor layer while using a photo mask aligned with the trench used as an alignment mark, wherein, after removal of the first film and before formation of the device isolation area, the method further includes, covering a surface of the substrate structure with a second film, forming a fourth opening in the second film while using a photo mask aligned with the trench used as an alignment mark, the fourth opening being configured as an opening for introducing an impurity into a third predetermined position of the semiconductor layer, and introducing a third impurity into the semiconductor layer through the fourth opening.