Patent ID: 8859374

Claim:
A method of forming a semiconductor device comprising: forming an oxide-nitride-oxide (ONO) dielectric stack on a surface of a semiconductor substrate in at least a first region in which a non-volatile memory transistor is to be formed by forming at least a substantially trap free bottom oxynitride layer followed by forming a charge trapping top oxynitride later, wherein the ONO dielectric stack includes a multi-layer charge storage layer; forming an oxide layer on the surface of the substrate in a second region in which a metal oxide semiconductor (MOS) logic transistor is to be formed; and forming a doped polysilicon layer on the surface of a ONO dielectric stack and on a surface of the oxide layer of the MOS logic transistor to form a first high work function gate electrode on the surface of the ONO dielectric stack while concurrently forming a second high work function gate electrode on the oxide layer of the MOS logic transistor.