Patent ID: 8101461

Claim:
A method of manufacturing a semiconductor device, the method comprising: (a) half-dicing a semiconductor wafer comprising a plurality of semiconductor chips, thereby forming dicing grooves in the semiconductor wafer, wherein each of the semiconductor chips includes a semiconductor integrated circuit and pads and wherein the semiconductor wafer includes: a first surface on which the semiconductor integrated circuit and the pads are formed; and a second surface opposite to the first surface, (b) connecting the pads to each other by conductive connectors; (c) sealing the first surface of the semiconductor wafer, the dicing grooves and the conductive connectors with a resin; (d) grinding the second surface of the semiconductor wafer, thereby forming a group of sealed chips, in which bodies of the semiconductor chips are separated from each other and are bonded by the resin; (e) dividing the group of sealed chips into individual sealed chips; (f) mounting and stacking the individual sealed chips on a wiring substrate having connection terminals thereon, thereby forming a semiconductor chip stack; and (g) electrically-connecting the conductive connectors and the connection terminals using a conductive member, wherein the conductive connectors are extended through side surfaces of each of the individual sealed chips.