Patent ID: 8769074

Claim:
An apparatus for constructing a logical, regular axis topology from an irregular topology of a subcommunicator's compute nodes in a parallel computer, the subcommunicator comprising a subset of a communicator's compute nodes, the communicator's compute nodes organized into a regular topology comprising a plurality of axial dimensions, the subcommunicator's topology comprising an irregular topology within the regular topology, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that, when executed, cause the apparatus to carry out the steps of: for each axial dimension: recursively, for each compute node in the subcommunicator beginning with a first compute node and ending upon a return to the first compute node: adding, by the compute node, to a logical line of the axial dimension a neighbor for the axial dimension specified in a nearest neighbor list of the compute node, the compute node's nearest neighbor list comprising a list of the compute node's nearest neighbors in the subcommunicator for each axial dimension; calling the added compute node; determining, by the called compute node, whether any neighbor in the called compute node's nearest neighbor list is available to add to the logical line; if a neighbor in the called compute node's nearest neighbor list is available to add to the logical line, adding, by the called compute node to the logical line, any neighbor in the called compute node's nearest neighbor list for the axial dimension not already added to the logical line; and if no neighbor in the called compute node's nearest neighbor list is available to add to the logical line, returning to the calling compute node.