Patent ID: 7723239

Claim:
A method for fabricating a capacitor in a semiconductor device, comprising: forming a sacrificial layer over a substrate; forming a mask pattern over the sacrificial layer; etching the sacrificial layer in two steps with differentiated top and bottom power levels using the mask pattern as an etch mask to form an opening; and forming a bottom electrode over the opening, wherein the etching the sacrificial layer in two steps comprises: performing a first etch on the sacrificial layer applying a high top power and a low bottom power; and performing a second etch on a portion of the sacrificial layer applying a top power lower than the top power in the first etch and a bottom power higher than the bottom power in the first etch, wherein the first etch is performed with a top power ranging from about 720 W to 880 W and a bottom power ranging from about 1,080 W to 1,320 W.