Patent ID: 8409953

Claim:
A method of manufacturing a semiconductor device, comprising: forming an insulation layer on a first substrate; forming at least one buffer film on the insulation layer; forming a metal film on the buffer film; forming a semiconductor layer on the metal film; forming a conductive layer on the insulation layer by reacting the metal film with at least one of the buffer film and the semiconductor layer; forming a conductive structure including at least one metal silicide film pattern on the insulation layer by patterning the conductive layer; forming a semiconductor pattern on the conductive structure by patterning the semiconductor layer such that the semiconductor pattern protrudes upwardly from the conductive structure and has an upper portion and a lower portion; forming a gate electrode at least partially enclosing the semiconductor pattern; forming a first impurity region at the lower portion of the semiconductor pattern; and forming a second impurity region at the upper portion of the semiconductor pattern.