Patent ID: 7804325

Claim:
An integrated circuit comprising: a dedicated function block having (1) first and second multiplier circuits for respectively producing first and second pluralities of signals indicative of products of first and second multiplications, and (2) first and second pluralities of output terminals; first and second general purpose blocks having respective first and second pluralities of input terminals; interconnection circuitry that is configurable to connect the output terminals to the input terminals with any of a plurality of different routings, the interconnection circuitry including (1) first interconnection circuitry that is sufficient to make connections between the first output and first input terminals but not between the second output and first input terminals, and (2) second interconnection circuitry that must be used to make connections between the second output and first input terminals; and routing circuitry internal to the dedicated function block for routing a first subplurality of each of the first and second pluralities of signals to the first output terminals, and for routing a second subplurality of each of the first and second pluralities of signals to the second output terminals; wherein the interconnection circuitry further includes sneak connections from a subplurality of the first output terminals that are usable only to apply signals from the subplurality of the first output terminals to the first input terminals, and wherein the routing circuitry internal to the dedicated function block includes routing, to the subplurality of the first output terminals, signals that are needed by early stages of signal processing chains in the first general purpose block.