Patent ID: 8149974

Claim:
A phase comparator comprising: a comparison period detecting unit for receiving a data signal of data having a one-bit length of T, a first clock signal having a period of nT (n is an integer of 2 or more), and a second clock signal having a period of nT and a phase delayed by h (0<h≦1 T) from the first clock signal, defining, as a comparison period, a period between a rising edge of the first clock signal and a rising edge of the second clock signal, and detecting the presence or absence of transition of the data signal during the comparison period; and a phase relationship detecting unit for receiving the data signal, and a reference clock signal having a period of nT and a phase delayed by i (0<i<h) from the first clock signal, detecting a phase relationship between the data signal and the reference clock signal, and outputting a result of detection of the phase relationship when transition of the data signal is detected by the comparison period detecting unit during the comparison period.