Patent ID: 7135366

Claim:
A lateral metal-insulator-metal capacitor produced by a manufacturing method, said manufacturing method comprising: selecting a predetermined number of metal layers for an integrated circuit process; selecting a subset of layers, said subset comprising a first layer, from the predetermined number of metal layers for use in fabricating a lateral metal-insulator-metal capacitor; imparting an active interdigitated finger pattern on the selected subset of layers, said interdigitated finger pattern having a first terminal and a second terminal; defining a first consistent dummy pattern on said first layer within the confines of the active interdigitated finger pattern; defining a second consistent dummy pattern around the periphery of the active interdigitated finger pattern; and imparting the second consistent dummy pattern to all metal layers wherein defining said second consistent dummy pattern comprises: defining a border region free of metal of approximately one to four times the thickness of the dielectric layer between the topmost metal layer in the selected subset and the layer directly above that layer, said border region extending about the periphery of the interdigitated finger pattern and along interconnect feed-lines to the terminals thereof; defining an alternating metal pattern outward from the border region; and imparting the alternating metal pattern onto all of the layers in an offset manner consistent with process design rules; and imparting the first consistent dummy pattern on the remaining metal layers.