Patent ID: 8159879

Claim:
A method for programming a memory device, the method comprising: applying a plurality of incrementally increasing programming pulses to a selected row of memory cells, each pulse increasing by a step voltage from a previous pulse; applying a plurality of first pass voltage pulses to a first unselected row of memory cells, the first unselected row of memory cells located a predetermined quantity of rows from the selected row of memory cells on a drain side of the selected row of memory cells, wherein the predetermined quantity of rows is at least one row of memory cells; applying a plurality of second pass voltage pulses to a second unselected row of memory cells, the second unselected row of memory cells located at the predetermined quantity of rows from the selected row of memory cells on a source side of the selected row of memory cells; applying a different pass voltage to each of a predetermined quantity of unselected source side rows of memory cells, wherein each different pass voltage is determined in response to its distance from a source line; and applying a third pass voltage to remaining unselected rows of memory cells wherein the first and second pass voltages are less than the third pass voltage.