Patent ID: 8572350

Claim:
A memory management and writing method, for managing a memory module, wherein the memory module includes a first memory unit, a first data input/output bus for the first memory unit, a second memory unit and a second data input/output bus for the second memory unit, and wherein the first memory unit and the second memory unit have a plurality of physical blocks, the memory management and writing method comprising: configuring a plurality of logical units, and dividing each of the logical units into a first logical part corresponding to the first data input/output bus and a second logical part corresponding to the second data input/output bus; mapping the logical units to at least a portion of the physical blocks of the first memory unit and the second memory unit, wherein the first logical part of each of the logical units maps to one of the physical blocks of the first memory unit and the second logical part of each of the logical units maps to one of the physical blocks of the second memory unit; establishing a first mapping table corresponding to the first input/output bus to record a first mapping relationship between the first logical parts of the logical blocks and the physical blocks of the first memory unit; establishing a second mapping table corresponding to the second input/output bus to record a second mapping relationship between the second logical parts of the logical blocks and the physical blocks of the second memory unit; receiving a write command and data corresponding to the write command, wherein the data is written into one of the first logical parts of the logical units; and only using the first input/output bus to write the data corresponding to the write command into the first memory unit based on the first mapping table.