Patent ID: 8536653

Claim:
A metal oxide semiconductor transistor, comprising: a substrate comprising at least a first well, at least a second well, and an insulation between the first well and the second well; a first gate structure disposed on the first well; a second gate structure disposed on the second well; four first dopant regions disposed in the substrate at two sides of the first gate structure and right below the first gate structure, and in the substrate at two sides of the second gate structure respectively; two second dopant regions disposed in the substrate at two sides of the first gate structure respectively; two first epitaxial layers disposed in the substrate at two sides of the first gate structure respectively; and two first source/drain regions disposed entirely in the second dopant regions at two sides of the first gate structure respectively and not in direct contact with one of the first dopant regions, wherein each of the first source/drain regions only overlaps with one of the first epitaxial layers partly and each of the first source/drain regions overlaps one of the second dopant regions, wherein a first buffer region is disposed between the first bottom of a first remaining portion of each of the second dopant regions and the second bottom of each of the first source/drain regions and between the first side of the first remaining portion of each of the second dopant regions and the second side of each of the first source/drain regions.