Patent ID: 7676608

Claim:
A system for providing Multiple Independent Levels of Security (MILS) partitioning, the system comprising: a memory; a bus controller communicatively coupled to the memory via a memory bus; a MILS controller communicatively coupled to the bus controller via a host-side bus, the MILS controller configured for monitoring and controlling system transactions; a plurality of input/output (I/O) devices communicatively coupled to the MILS controller via a plurality of corresponding device-side buses; a MILS separation kernel, the MILS separation kernel being embodied in a computer-readable medium having computer-executable instructions to be executed by the system for mapping regions of the memory to a plurality of user partitions, each I/O device included in the plurality of I/O devices being allocated to a partition included in the plurality of partitions and being isolated from MILS separation kernel space, the MILS separation kernel further including computer-executable instructions to be executed by the system for guaranteeing isolation of the partitions of the memory and a processor connected to the bus controller via a processor front-side bus, wherein the MILS controller is configured for extending MILS partitioning to the plurality of I/O devices, the MILS controller being further configured for preventing DMA transactions during a partition time slice when an active partition included in the plurality of partitions requests that DMA transactions not be permitted.