Patent ID: 7619549

Claim:
For a sigma-delta digital-to-analog converter that includes a voltage output and a low-pass filter having a given order, a method for reducing a sign-bit pulse at the voltage output of the sigma-delta digital-to-analog converter without requiring use of a higher order low-pass filter, the method comprising: receiving a first waveform and a second waveform, the first and second waveforms having a first phase relationship, wherein the first waveform comprises a plurality of rising edges and falling edges; setting the first phase relationship between the first and second waveforms to a second phase relationship, wherein setting the first phase relationship to the second phase relationship comprises aligning at least one of the first and second waveforms such that a transition of the second waveform is approximately half way between a rising edge and adjacent falling edge of the first waveform; upon setting the second phase relationship between the first and second waveforms, multiplying the first and second waveforms to produce a digital input; and providing the digital input to the sigma-delta digital-to-analog converter.