Patent ID: 8022482

Claim:
A trenched semiconductor power device comprising a plurality of trenched gates insulated by a gate insulation layer and surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a semiconductor substrate, further comprising: a source-body contact trench disposed substantially in a middle portion between two of said trenched gates; each of said trenched gates is covered on top by a spacer cap with vertical cap edges substantially aligned with gate sidewalls of said trenched gates, and said source region surrounding said trenched gates comprising a metal silicide layer extends between said sidewalls of said trenched gates and a sidewall of a the source-body contact trench; and a low resistance metal layer covering a top surface of said source region comprising said metal silicide layer and also covering the sidewalls and a bottom surface of said source-body contact trench and wherein said source body contact trench is filled with a source contact metal layer directly contacting said low-resistance metal layer whereby said source region comprising said silicide layer contacts said low resistance metal layer on the top surface and on the sidewalls of said source body contact trench.