Patent ID: 8030207

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first wiring layer over a semiconductor substrate; forming a dielectric film over the first wiring layer; forming, in the dielectric film, a first opening and a second opening within the first opening which reaches the first wiring layer; forming a first metal film containing a first metal over a surface of the first opening, the second opening, and the dielectric film; etching the first metal film at a bottom of the second opening using a sputtering process and forming a second metal film containing a second metal over the surface of the first opening, the second opening, and the dielectric film; burying a conductive material in the second opening and the first opening; and in said forming the second metal film, a first Vd/Ve at the bottom of the second opening is smaller than a second Vd/Ve at the surface of the dielectric film, where Vd is a deposition rate and Ve is an etching rate.