Patent ID: 8713222

Claim:
An information processing apparatus comprising: a processor configured to execute a BIOS and an OS; a first controller having a buffer and configured to control a first external device through the buffer, the first external device having a USB plug; a second controller having a buffer and configured to control a second external device through the buffer, the second external device having an eSATA plug; and a shared connector having: an opening portion configured to receive both of the USB plug and the eSATA plug in an exclusive manner; an USB terminal disposed inside the opening portion so as to be connectable with the USB plug being inserted into the opening portion, the USB terminal being connected with the buffer of the first controller; and an eSATA terminal disposed inside the opening portion so as to be connectable with the eSATA plug being inserted into the opening portion, the eSATA terminal being connected with the buffer of the first controller; wherein the BIOS operates to: upon insertion of neither the USB plug nor the eSATA plug into the opening portion of the shared connector, turn ON both the buffer of the first controller and the buffer of the second controller; upon insertion of the USB plug into the opening portion of the shared connector, turn OFF the buffer of the second controller while leaving the buffer of the first controller turning ON; and upon insertion of the eSATA plug into the opening portion of the shared connector, turn OFF the buffer of the first controller while leaving the buffer of the second controller turning ON, and wherein the BIOS controls turning ON/OFF of the buffer of the first controller and the buffer of the second controller via the OS if the OS is activated.