Patent ID: 7788672

Claim:
An information processing apparatus comprising: a plurality of execution modules being either central processing unit (CPU) cores built in a CPU or a plurality of CPUs formed individually of each other; and a scheduler configured to control assignment of a plurality of basic modules to the execution modules based on a restriction of an execution sequence in order to execute a program in parallel using the execution modules, the program being divided into the basic modules executable asynchronously with each other, the program defining the restriction of the execution sequence for sequentially executing the basic modules; the scheduler including: a speculative execution control module configured to assign, when the execution modules contain an execution module to which no basic modules are assigned, one of the basic modules to the execution module independently of the parallel execution of the program to experimentally execute the one basic module, the one basic module standing by for completion of execution of one of the other basic modules in accordance with the restriction of the execution sequence; a basic module load measurement module configured to measure an execution time of each of the basic modules; a runtime load measurement module configured to measure an execution time required for assigning each of the basic modules to the execution modules; and a granularity adjustment module configured to perform granularity adjustment by linking at least two of the basic modules to be successively executed according to the restriction of the execution sequence so as to be assigned as one set to the execution module and by redividing the at least two linked basic modules, based on the execution time measured by the basic module load measurement module and the execution time measured by the runtime load measurement module.