Patent ID: 7502660

Claim:
A method for correcting a deviation of a dimension of a feature from a target in a semiconductor process, the method comprising the steps of: first measuring the feature prior to conducting a process relative to the feature to obtain an incoming feature dimension; conducting the process based on a process model; second measuring the feature after conducting the process to obtain an outgoing feature dimension; determining an origin of any deviation of the outgoing feature dimension from a target structure dimension, wherein the determining step includes: conducting the process on a first process reference wafer of a process reference wafer set, each process reference wafer of the set having been generated at a first point in time; establishing a baseline outgoing feature dimension of the feature from the first process reference wafer at the first point in time; conducting the process on a second process reference wafer of the process reference wafer set at a later second point in time; measuring an outgoing feature dimension of the feature on the second process reference wafer; determining whether a deviation exists between the baseline outgoing feature dimension and the outgoing feature dimension of the second process reference wafer, and in the case that a deviation exists, determining that the origin is the first measuring step, and in the case that a deviation does not exist, determining that the origin is at least one of the processing step and the first measuring step; and adjusting, according to the origin, at least one of the measuring steps and the process conducting step to correct for any deviation.