Patent ID: 8278746

Claim:
A semiconductor package, comprising: a set of stacked semiconductor devices including: a first semiconductor device having an active surface and an inactive surface; and a second semiconductor device coupled to the inactive surface of the first semiconductor device; a set of connecting elements circumscribing the set of stacked semiconductor devices, the set of connecting elements including: a first connecting element including an upper end; and a second connecting element that is electrically connected to the second semiconductor device; a package body encapsulating the set of stacked semiconductor devices and the second connecting element, the package body having a lower surface that is substantially coplanar with the active surface of the first semiconductor device, wherein the upper end of the first connecting element is substantially exposed from the package body; and a redistribution layer that is formed over at least a portion of the active surface of the first semiconductor device and at least a portion of the lower surface of the package body, that is electrically connected to the active surface of the first semiconductor device, and that is electrically connected to the first connecting element.