Patent ID: 8536650

Claim:
A semiconductor structure comprising: a transistor formed in a semiconductor substrate, said semiconductor substrate having a semiconductor-on-insulator (SOI) layer; a channel associated with said transistor and formed on a first portion of said SOI layer; a source/drain region associated with said transistor and formed in a second portion of said SOI layer and in a recess at each end of said channel, wherein said second portion of said SOI layer is substantially thicker than said first portion of said SOI layer; and wherein said source/drain region includes a stressor material; and a BOX layer formed in said semiconductor substrate, wherein said SOI layer is formed over said BOX layer, said BOX layer includes a first surface under said first portion of said SOI layer and a second surface under said second portion of said SOI layer, wherein said first surface and said second surface form a right angle step.