Patent ID: 8754459

Claim:
A semiconductor memory device, comprising: a substrate; a stacked body including a plurality of electrode layers provided above the substrate and a plurality of insulating layers provided respectively in each space between the electrode layers; a plurality of insulative separating films extending in a stacking direction of the electrode layers and the insulating layers inside the stacked body to separate the stacked body into a plurality; a channel body extending in the stacking direction inside the stacked body between the plurality of insulative separating films; and a memory film provided between the channel body and the electrode layers, and including a charge storage film, a width of an electrode layer of a lower layer side between the insulative separating film and the memory film being greater than a width of an electrode layer of an upper layer side between the insulative separating film and the memory film, an electrical resistivity of the electrode layer being higher for the electrode layer of the lower layer side having the greater width than for the electrode layer of the upper layer side having the lesser width.