Patent ID: 8686517

Claim:
A semiconductor device comprising: a semiconductor substrate; a metal gate structure on the semiconductor substrate, wherein the metal gate structure has a top surface and substantially vertical sidewalls; non-conductive spacer layers adjacent to the substantially vertical sidewalls of the metal gate structure, said non-conductive spacer layer having a height substantially equal to a height of the top of the metal gate structure; a non-conductive metal oxide layer in direct contact with the top surface of the metal gate structure but not in contact with the non-conductive spacer layers; an oxide layer over the non-conductive metal oxide layer and the substrate; a channel region of the semiconductor substrate, wherein the channel region is underneath the metal gate structure; a source/drain region of the semiconductor substrate, wherein the source/drain region is adjacent to the channel region; and a metal source/drain contact extending from the surface of the oxide layer to the source/drain region and contacting the non-conductive metal oxide layer.