Patent ID: 8253436

Claim:
A semiconductor integrated circuit comprising: a data transmitting circuit; and a data receiving circuit that receives data transmitted from the data transmitting circuit, wherein the data transmitting circuit comprises: a data output circuit that outputs the data or sets an output to a high impedance state; and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data, wherein the predetermined period is decided based on a data transmission interval of the data transmitting circuit, wherein the data transmission interval is decided based on a period between a time when the data transmitting circuit outputs a command for transmitting data to the data receiving circuit and a time when the data transmitting circuit further outputs a command for transmitting another data to the data receiving circuit.