Patent ID: 7851310

Claim:
A method of forming a semiconductor device, comprising: providing a semiconductor substrate, the semiconductor substrate comprising a gate electrode conducting region, a trench MOS transistor device region, and an embedded SBD device region defined thereon, and the semiconductor substrate having a first dopant type; forming an insulating layer on a top surface of the gate electrode conducting region of the semiconductor substrate; forming at least a trench in the trench MOS transistor device region of the semiconductor substrate; forming at dielectric thin film on the top surface of the semiconductor substrate and an inner wall of the trench; forming a doped semiconductor layer on the insulating layer and the dielectric thin film, and filling the doped semiconductor layer in the trench; removing a portion of the doped semiconductor layer and forming a gate electrode in the trench and a gate linking line in the gate electrode conducting region, the gate linking line being electrically connected to the gate electrode; performing a doping process upon the embedded SBD device region of the semiconductor substrate out of the trench to form at least a doped body in the embedded SBD device region, the doped body having a second dopant type; forming a patterned mask on the doped body, the patterned mask covering a portion of the doped body, and performing a doping process upon the exposed doped body to form two source regions in the doped body, the source regions having the first dopant type; removing the patterned mask; forming a dielectric layer on the semiconductor substrate, the dielectric layer having at least a source opening to expose the doped body between the source regions; forming a source contact in the doped body in the trench MOS transistor device region between the source regions and forming a voltage bearing dopant region in the embedded SBD device region of the semiconductor substrate, the source contact and the voltage bearing dopant region having the second dopant type; and forming a gate line in the gate electrode conducting region and forming a source electrode in the trench MOS transistor device region and the embedded SBD device region, the gate line being electrically connected to the gate linking line disposed in the gate electrode conducting region, the source electrode being electrically connected to the source contact disposed in the trench MOS transistor device region and the embedded SBD device region of the semiconductor substrate.