Patent ID: 7436041

Claim:
An electrostatic discharge (ESD) protection circuit using a double-triggered silicon controlling rectifier, fabricated in an integrate circuit and disposed between an input/output (I/O) pad and an internal circuit thereof, the ESD protection circuit comprising: a first double-triggered silicon controlling rectifying module, having a first terminal, a second terminal, a N-type trigger terminal and a P-type trigger terminal, the first terminal coupled to a high-voltage external power terminal, the second terminal coupled to the I/O pad and the internal circuit of integrate circuit; a first electrostatic detecting module, having a first output terminal, a second output terminal, a first input terminal and a second input terminal, the first output terminal coupled to the first N-type trigger terminal, the second output terminal coupled to the first P-type trigger terminal, the first input terminal coupled to the high-voltage external terminal, the second input terminal coupled to the internal circuit of the integrate circuit and the I/O pad, wherein when a negative ESD voltage attacks the I/O pad, the first double-triggered silicon controlling rectifying module directs ESD current from the first N-type trigger terminal to the first electrostatic detecting module and directs ESD current from the second output terminal to the first double-triggered silicon controlling rectifying module; a second double-triggered silicon controlling rectifying module, having a third terminal, a fourth terminal, a second N-type trigger terminal and a second P-type trigger terminal, the third terminal coupled to the I/O pad and the internal circuit of the integrate circuit, the second terminal coupled to a low-voltage external power terminal; and a second electrostatic detecting module, having a third output terminal, a fourth output terminal, a third input terminal and a fourth input terminal, the third output terminal coupled to the second N-type trigger terminal, the fourth output terminal coupled to the second P-type trigger terminal, the third input terminal coupled to the internal circuit of the integrate circuit and the I/O pad, the fourth input pad coupled to the low-voltage external power terminal, wherein when a positive ESD voltage attacks the I/O pad, the second double-triggered silicon controlling rectifying module directs ESD current form the second N-type trigger terminal to the second electrostatic detecting module, and the directs ESD current from the fourth output terminal to the second double-triggered silicon controlling rectifying module.