Patent ID: 7728945

Claim:
A structure for a circuit assembly, comprising: a first substrate having a plurality of first terminals and an array of thin film transistors formed thereon; a first alignment mark disposed on said first substrate and located in the vicinity of said plurality of first terminals; a second alignment mark disposed on said first substrate and located in the vicinity of said plurality of first terminals and said first alignment mark, wherein a distance between said first alignment mark and said second alignment mark is ranged from about 50 μm to about 150 μm; and a second substrate having a plurality of second terminals thereon, and a transmissive area located in the vicinity of said plurality of second terminals; whereby, when said first substrate is assembled with said second substrate so as to have an edge of said transmissive area located between said two alignment marks and said first alignment mark located outside said transmissive area, said plurality of first terminals are normally connected with said plurality of second terminals.