Patent ID: 7202567

Claim:
A semiconductor device comprises: a semiconductor substrate; a lower interconnection provided on the semiconductor substrate; a first interlayer insulation film in which the lower interconnection is buried; an MIM capacitive element which is provided on the first interlayer insulation film and has a lower electrode, an upper electrode, and a dielectric film sandwiched between the lower electrode and the upper electrode; a second interlayer insulation film in which the MIM capacitive element is buried; an upper interconnection provided on the second interlayer insulation film; a third interlayer insulation film provided between said first interlayer insulation film and said second interlayer insulation film, and said third interlayer insulation film is made from a material selected from a group consisting of SiO 2 , SiOC and SiOF or a combination of materials selected from a group consisting of SiO 2 , SiOC and SiOF; and a connecting part which electrically connects the lower electrode and the upper interconnection.