Patent ID: 8115464

Claim:
An apparatus comprising: an inductor that is coupled between an input node and a switching node; a first switch that is coupled between the switching node and ground; a second switch that is coupled between the switching node and an output node; a first comparator that is coupled to the output node; a signal generating circuit that is coupled to the first comparator; a first logic circuit that is coupled to the first switch and the signal generating circuit, wherein the first logic circuit actuates and deactuates the first switch; a second logic circuit that is coupled to the second switch and the signal generating circuit, wherein the second logic circuit actuates and deactuates the second switch, and wherein the second logic circuit includes: an AND gate that is coupled to the second comparator and the third comparator; a first NOR gate that is coupled to the third comparator and the signal generating circuit; and a second NOR gate that is coupled to the AND gate, the first NOR gate, and the second switch; a second comparator that is coupled to the output node, the input node, and the second logic circuit; and a third comparator that is coupled to the output node, the first logic circuit, and the second logic circuit.