Patent ID: 8633464

Claim:
A phase change memory device including a plurality of in via phase change memory cells comprising: a substrate having a contact surface corresponding to an array of conductive contacts to be connected to access circuitry; a first dielectric layer formed on the substrate, a first cap layer formed on the first dielectric layer, a second dielectric layer formed on the first cap layer, and a second cap layer formed on the first dielectric layer; a plurality of recessed pillar heaters formed within the first dielectric layer and corresponding to each of the array of conductive contacts; a plurality of vias formed in the first dielectric layer, the first cap layer, and the second dielectric layer, each corresponding to a recessed pillar heater and filled with recessed phase change material; and a top electrode formed within each via and contacting the recessed phase change material, and a top electrode connection layer formed on an upper surface of the top electrode and the second cap layer.