Patent ID: 8064226

Claim:
A control circuit with frequency compensation, which is applied to an open-loop control system, comprising an oscillator which periodically generates a set signal; a first comparator which includes a first input end for inputting a sampling current, a second input end for inputting a total voltage of a reference voltage and a DC (Direct Current)-level voltage; a first output end generating a down-conversion signal to the oscillator when the sampling current is larger than the total voltage depending on comparison of the first input end with the second input end, so as to reduce a frequency at which the oscillator generates the set signal; a second comparator which includes a third input end for inputting the sampling current, a fourth input end for inputting the reference voltage, and a second output end generating a reset signal for output when the sampling current is larger than the reference voltage depending on comparison of the third input end with the fourth input end; and a flip-flop which includes a set end, a reset end and an output end, with the set end receiving the set signal generated by the oscillator, the reset end receiving the reset signal generated by the second output end, and the output end conducting a switch between a high-level voltage and a low-level voltage depending on the set signal and the reset signal.