Patent ID: 8489357

Claim:
A method of determining junction temperature (Tj) and drain-source current (Ids) of a standard three-terminal FET, wherein said standard three-terminal FET is disposed in a module containing a plurality of standard three- terminal FETs, and wherein each FET in said module is thermally and electrically coupled to a common case terminal, with a thermal resistance interconnecting the case and the surrounding module ambient, said method comprising the steps of: sampling the ambient temperature (Ta) for the module; sampling the drain to source voltage (Vds) for each FET which is electrically and thermally coupled to the common case within the module; loading a Tj-dependant equation for each FET on-resistance (Rds(Tj)); loading a value for the thermal resistance (Rth,ca) between the case and module ambient; solving for a single Tj value for all thermally-coupled FETs in said common case; using the solved Tj value to calculate a separate value for the drain to source on-resistance (Rds) and drain to source current (Ids) for each of the thermally-coupled FETs in said common case; and using the solved value for Rds for each FET and a maximum allowed transient current (Idsf) to determine if the FET is in a transient over-current condition by monitoring the FET Vds.