Patent ID: 8841678

Claim:
A thin-film transistor device comprising: a gate electrode above a substrate; a gate insulating film above the gate electrode; a crystalline silicon thin film above the gate insulating film, the crystalline silicon thin film including a channel region; a plurality of semiconductor films above at least the channel region; an insulating film over the channel region and above the semiconductor films, the insulating film being composed of an organic material; a source electrode over at least an end portion of the insulating film; and a drain electrode over at least an other end portion of the insulating film, the drain electrode facing the source electrode, wherein the semiconductor films include at least a first semiconductor film and a second semiconductor film provided above the first semiconductor film, E CP <E C1 where E CP denotes an energy level at a lower end of a conduction band of the crystalline silicon thin film and E C1 denotes an energy level at a lower end of a conduction band of the first semiconductor film, the first semiconductor film is provided on the crystalline silicon thin film, and the energy level E CP at the lower end of the conduction band of the crystalline silicon thin film and the energy level E C1 at the lower end of the conduction band of the first semiconductor film are adjusted to suppress a spike at a junction between the crystalline silicon thin film and the first semiconductor film.