Patent ID: 7524699

Claim:
A method for production of a panel for a plurality of electronic components comprising: producing a leadframe with component positions arranged in rows and columns, whereby each component position comprises a chip island and flat conductors which surround the chip island, as well as contact pillars, which are arranged on the flat conductors and are aligned orthogonally with respect to the flat conductors, and wherein the flat conductors extend between neighboring chip islands; applying a plurality stacked semiconductor chips to the chip islands of the component positions; producing bonding wire connections between the flat conductors and contact pads on active first faces of the stacked semiconductor chips; applying first semiconductor chips with their active first faces to a carrier with adhesive bonding on one side, with the first semiconductor chips being arranged in rows and columns which correspond to the rows and columns of the component positions; applying the leadframe with a plurality of stacked semiconductor chips to the carrier in such a way that the contact pillars of the leadframe are adhesively bonded by their first faces to the carrier and the first semiconductor chips are arranged on the carrier underneath the chip islands of the leadframe and are surrounded by contact pillars; embedding the leadframe with stacked semiconductor chips and bonding wire connections in a plastic compound to form a composite body on the carrier; removing the carrier exposing an overall first face composed of active first faces of the first semiconductor chips, pillar contact pads of the contact pillars, and an first face of the plastic compound; applying a wiring layer to the overall first face, forming wiring lines and outer contact pads; and wherein the wiring lines connect the outer contact pads to the contact pads of the first semiconductor chip, and/or to the pillar contact pads of the contact pillars.