Patent ID: 8327065

Claim:
A memory system comprising: a volatile first storing unit; a nonvolatile second storing unit; and a controller that transfers data between a host apparatus and the second storing unit via the first storing unit, wherein the first storing unit stores therein first management information used for correlating a logical address designated by the host apparatus with a data storage location in the first storing unit, and second management information used for correlating the logical address and a data storage location in the second storing unit, the controller further includes a read-write control unit that performs data reading and data writing between the host apparatus and the first storing unit and between the first storing unit and the second storing unit, by using the first management information and the second management information; a management-information updating unit that updates the first or the second management information when the data storage location in the first or the second storing unit is changed by the read-write control unit; and a data monitoring unit that monitors whether data written in the first storing unit from the host apparatus has a specific pattern with respect to each specific management unit, wherein when the data monitoring unit detects that data having the specific pattern is written in the first storing unit, the management-information updating unit adds specific pattern identification information indicating that the data has the specific pattern to the first management information corresponding to the data, and when data written in the first storing unit is flushed to the second storing unit, and if the specific pattern identification information is added for the data, the read-write control unit does not write the data in the second storing unit, and the management-information updating unit sets an invalid address value to the second management information corresponding to the data.