Patent ID: 8072232

Claim:
A test apparatus that tests a device under test having a test function for sequentially outputting, from a single test terminal, signals that are output from a plurality of terminals of the device under test during actual operation of the device under test, the test apparatus comprising: a test section that supplies the device under test with a test signal and receives signals that are sequentially output from the test terminal in response to the test signal; an identifying section that identifies a correspondence between each signal sequentially received by the test section and one of the terminals of the device under test; and a counting section that counts a number of signals judged to be unacceptable from among the signals sequentially received by the test section for each terminal of the device under test, based on the correspondence identified by the identifying section, wherein the counting section includes: a plurality of count registers that are provided to correspond one-to-one with the plurality of terminals of the device under test, and that each store a number of unacceptable signals from among the signals identified by the identifying section as corresponding to the corresponding terminal; and an adding section that, when a signal received by the test section is judged to be unacceptable, increases a stored value in each of the count registers corresponding to the terminal identified by the identifying section as corresponding to the signal judged to be unacceptable.