Patent ID: 7834456

Claim:
A semiconductor structure, comprising: a substrate; a seed layer over the substrate; a silicon layer disposed on the seed layer; a transistor device in the silicon layer; a III-V layer disposed on the seed layer; a III-V device disposed in the III-V layer; a plurality of electrical contacts, each one of the electrical contacts having a layer of TiN or TaN and a layer of metal on the layer of TaN or TiN, one of the electrical contacts being electrically connected to the transistor device in the silicon layer and another one of the electrical contacts being electrically connected to the III-V device, said another one of the electrical contacts having a layer of Ge/W, Ni/Ge/W, Pd/Ge/Al or Pd/Ge/W in contact with the III-V layer and wherein the TaN or TiN layer is disposed on the layer of Ge/W, Ni/Ge/W, Pd/Ge/Al or Pd/Ge/W.