Patent ID: 7176717

Claim:
A programmable logic structure, comprising: a first logic and routing block; a second logic and routing block; and first one or more dedicated lines extending through the first logic and routing block and the second logic and routing block, the first logic and routing block having a first dedicated logic cell including: a first multiplexer having a first input connected to the first one or more dedicated lines and a second input connected to a look-up table, the first multiplexer having at least one configurable line for selecting from one of the two inputs and generating an output connected to a second dedicated logic cell in the first logic and routing block; and a second multiplexer having a first input connected to the first one or more dedicated lines and a second input connected to the look-up table, the second multiplexer having at least one configurable line for selecting from one of the two inputs and generating an output connected to the second logic and routing block.