Patent ID: 8499293

Claim:
A method, executed by a processor, of optimizing a sequence of operations and where the method comprises: associating with each of a set of registers a symbolic expression selected from a set of possible symbolic expressions; locating an operation that is next within the sequence of operations and setting that operation to be a working operation, where the working operation has associated therewith a destination register and one or more source registers; processing the working operation as follows: a) when the working operation and any symbolic expressions of the one or more source registers match at least one of a set of rules, where each rule specifies that the working operation must match a subset of the operation set, where each rule also specifies that the symbolic expressions of the one or more source registers of the working operation must match a subset of the possible symbolic expressions, and where the rule also specifies a result, then posts the result as the symbolic expression of the destination register.