Patent ID: 7612839

Claim:
An active matrix substrate comprising: a plurality of data signal lines; a plurality of scanning signal lines intersecting with the data signal lines; and a pixel array including a plurality of pixel circuits disposed in a matrix pattern correspondingly to the respective intersections defined by intersecting of the data signal lines and the scanning signal lines, each of the plurality of pixel circuits including: a field-effect transistor having a source electrode connected, directly or via a predetermined element, with the data signal line which passes through a corresponding one of the intersections, and a gate electrode connected with the scanning signal line which passes through the corresponding intersection; and a voltage holding electrode connected, directly or via a predetermined element, with a drain electrode of the field-effect transistor and constituting a voltage holding capacitor; wherein the pixel circuits in the pixel array include: a first number of the pixel circuits whose field-effect transistor is provided by a first-type field-effect transistor which gives an increasingly large electrostatic capacitance between the drain electrode and the gate electrode in accordance with an increase in a positional shift between a pattern for the drain electrode and a pattern for the gate electrode in a predetermined direction; and a second number, that is substantially the same as the first number, of the pixel circuits whose field-effect transistor is provided by a second-type field-effect transistor which gives an increasingly small electrostatic capacitance between the two electrodes in accordance with the increase in the positional shift in the predetermined direction; and the pixel circuits including the first-type field-effect transistor and the pixel circuits including the second-type field-effect transistor are disposed in substantially uniform dispersion in the pixel array.