Patent ID: 7943445

Claim:
A method of manufacturing a semiconductor structure comprising: forming a stack, from bottom to top, of a lower gate region, a body layer, and an upper gate region in a semiconductor substrate comprising a semiconductor material, wherein said body layer has a doping of a first conductivity type, wherein said lower gate region and said upper gate region have a doping of a second conductivity type, and wherein said second conductivity type is the opposite of said first conductivity type; forming an upper source region and a drain region having a doping of said first conductivity type by doping portions of said body layer with additional dopants of said first conductivity type; and forming a lower source region having a doping of said first conductivity type by doping another portion of said body layer with additional dopants of said first conductivity type, wherein said lower source region and said upper source region constitute a source region of integral construction, and wherein a bottom surface of said upper source region abuts a top surface of said lower source region.