Patent ID: 7082107

Claim:
An apparatus comprising: a counter to count packet errors in a wireless transmission, said counter to count a number of packet errors in a short observation window and to count a number of packet errors in a long observation window and wherein the counter comprises: a plurality of registers coupled in a serial chain, said plurality of registers to receive a stream of packet status indications at a head of the serial chain, said plurality of registers to clock the stream of packet status indications through the plurality of registers; a first adder to add the number of packet errors in the short observation window from among packet status indications at a first set of the plurality of registers comprising the short observation window and to provide a first result to the comparator; a second adder to add the number of packet errors in the long observation window from among packet status indications at a second set of the plurality of registers comprising the long observation window and to provide a second result to the comparator; a comparator to compare the number of packet errors in the short observation window to a first threshold and to compare the number of packet errors in the long observation window to a second threshold; and a controller, using power control that is capable of being open loop or capable of being closed loop, wherein said open loop power control enables a transmitter to unilaterally modify the power based on packet errors to increase a power level of the wireless transmission if the number of packets in the short observation window exceeds the first threshold and to decrease the power level of the wireless transmission if the number of packet errors in the long observation window falls below the second threshold.