Patent ID: 7572683

Claim:
A method of manufacturing the semiconductor device including a semiconductor substrate, an n-type drift region in the semiconductor substrate, p-type base regions formed selectively in the surface portion of the drift region, one or more n-type emitter regions in the surface portion of each of the base regions, a gate electrode over a part of each of the base regions and a part of the one or more emitter regions, with a gate insulation film interposed beneath the gate electrode, an emitter electrode in contact with the base regions and the emitter regions, second p-type semiconductor regions in the surface portion of the drift region, the second p-type semiconductor regions being shaped as islands arranged as a ring surrounding the base regions, a p-type collector region on the back surface of the drift region, a p-type separation region in contact with the side faces of the collector region and the side faces of the drift region, and a collector electrode on the collector region, the method comprising: extending the drift region between the base regions; implanting boron ions at a dose amount between 1×10 11 cm −2 and 1×10 14 cm −2 into portions of the drift region that extend between the base regions to form first p-type semiconductor regions and into portions of the drift region that extend between the island-shaped second p-type semiconductor regions, thereby forming third p-type semiconductor regions; making the first p-type semiconductor regions and the emitter electrode contact each other; and making the second p-type semiconductor regions and the third p-type semiconductor regions contact the peripheral portion of the emitter electrode simultaneously with making the first p-type semiconductor regions and the emitter electrode contact each other.