Patent ID: 7366884

Claim:
A context switching system for a multi-thread execution pipeline ioop having a pipeline latency, comprising: i. A single miss fulfillment first-in-first-out buffer (FIFO); ii. A context switch requesting subsystem configured to: (1) Detect a device request from a first thread executing within said multi-thread execution pipeline loop for access to a device having a fulfillment latency exceeding said pipeline latency, and (2) Generate a context switch request for said first thread; and iii. A context controller subsystem configured to receive said context switch request and, based thereon, store said first thread in said single miss fulfillment FIFO to prevent said first thread from executing until said device request is fulfilled, said first thread sequencing entirely through said single miss fulfillment FIFO at a rate equivalent to said pipeline latency before exiting therefrom.