Patent ID: 8624675

Claim:
An RF amplifier circuit comprising: a FET for receiving a RF input signal and generating an amplified RF output signal, the FET having a gate, drain, and source; a control circuit, connected to the gate and drain of the FET, for controlling the current at the drain; a bias circuit comprising a means for biasing and variably compensating drift in the gate threshold voltage required to set the quiescent drain current, the bias circuit being connected to the control circuit and controlling operation of the control circuit to maintain an essentially constant current at the drain; a deriving means for deriving a negative voltage signal; and a regulating means having an input and an output, and operably connected at the input to the deriving means and operably connected at the output to the gate of the FET, and supplying a regulated negative voltage signal to the gate of the FET, whereby the regulating means supplies a regulated negative voltage signal to the gate of the FET.