Patent ID: 8872255

Claim:
A semiconductor device, comprising: an active region in a semiconductor substrate having a top surface; a first charge storage layer on the top surface; a first conductive line on the first charge storage layer; a second charge storage layer on the top surface; a second conductive line on the second charge storage layer; a third charge storage layer on the top surface; a third conductive line on the third charge storage layer; a fourth charge storage layer having a first side adjoining a first sidewall of the first conductive line and a second side adjoining a first sidewall of the second conductive line; a fifth charge storage layer having a first side adjoining a second sidewall of the second conductive line and a second side adjoining a first sidewall of the third conductive line; a source region in the substrate in a first portion of the active region that is below a second sidewall of the first conductive line and away from the second and third conductive lines, wherein the second sidewall of the first conductive line is away from the second conductive line; and a drain region in the substrate in a second portion of the active region that is below a second sidewall of the third conductive line and away from the first and second conductive lines, wherein the second sidewall of the third conductive line is away from the second conductive line.