Patent ID: 7447894

Claim:
A microcomputer formed on a single chip semiconductor substrate, the microcomputer comprising: a central processing unit coupled to an address bus and to a data bus; a nonvolatile memory coupled to said address bus and said data bus, said nonvolatile memory including a first area that stores a first BIOS program which controls said microcomputer, a second area that stores a second BIOS program which controls an input device coupled to said microcomputer, and a third area that stores a third BIOS program which is to be executed by an external CPU of a host machine coupled to said microcomputer; and a Low Pin Count (“LPC”) interface circuit coupled to said address bus, to said data bus, and configured to be coupled to an external LPC bus outside said microcomputer, wherein said central processing unit accesses said nonvolatile memory to execute said first BIOS program via said address bus and said data bus, and wherein said LPC interface circuit is configured to access said nonvolatile memory to read said third BIOS program and to provide said third BIOS program to the external LPC bus coupled thereto for execution by the external CPU of the host machine.