Patent ID: 8438457

Claim:
A nonvolatile memory apparatus comprising: a nonvolatile memory section that includes a data area to store data, a standard error correction code area to store standard error correction codes, and an extended error correction code area to store extended error correction codes; a standard error correction code processing section configured to generate a standard error correction code to perform an error correction process on data in said data area per access unit; an extended error correction code processing section configured to generate an extended error correction code to perform an error correction process on data in said data area per integral multiple of said access unit; and a control section configured to control access to said nonvolatile memory section, and respective processes of said standard error correction code processing section and said extended error correction code processing section, wherein said control section provides: a standard error correction code area write function that, upon receipt of a write instruction, causes said standard error correction code processing section to generate a standard error correction code per access unit from received data, write the data to said data area of said nonvolatile memory section, and write the generated standard error correction codes to said standard error correction code area, a read function to, upon receipt of a read instruction, read data from said data area of said nonvolatile memory section, read the standard error correction codes from said standard error correction code area, cause said standard error correction code processing section to perform error detection and correction of the read data per access unit, and output the corrected data, an extended error correction code area write function to read data composed of an integer multiple of said access unit starting from an instruction-designated address in said data area of said nonvolatile memory section, and cause said extended error correction code processing section to generate an extended error correction code to write the generated extended error correction code to said extended error correction code area, the extended error correction code being added to one of the standard error correction codes prior to being written to said extended error correction code area, and a function to read data composed of the integer multiple of said access unit starting from the instruction-designated address in said data area of said nonvolatile memory section, read the extended error correction code from said extended error correction code area, cause said extended error correction code processing section to perform error detection and correction of the read data, and output the corrected data.