Patent ID: 7868418

Claim:
A semiconductor device, comprising: a first semiconductor layer of the first conduction type; a first main electrode formed on one surface of said first semiconductor layer; a second semiconductor layer of the first conduction type and a third semiconductor layer of the second conduction type formed above the other surface of said first semiconductor layer, said third semiconductor layer arranged periodically along the surface in association with said second semiconductor layer; a fourth semiconductor layer of the second conduction type formed on the surfaces of said second semiconductor layer and said third semiconductor layer; a fifth semiconductor layer of the first conduction type formed on a surface of said fourth semiconductor layer; a control electrode formed in first trench with an insulator interposed therebetween, said first trench passing through said fourth and fifth semiconductor layers and reaching said second semiconductor layer; a sixth semiconductor layer of the first conduction type extended from the bottom of said first trench; a second trench passing through said fifth semiconductor layer and reaching said fourth semiconductor layer, said second trench being formed between adjacent ones of said first trench and above said third semiconductor layer; and a second main electrode connected to said fourth and fifth semiconductor layers.