Patent ID: 7051302

Claim:
A method for reducing pin overhead in a non-scan design for testability, said method comprising: connecting control signals of test points l 1 , l 2 , . . . , l h to a first primary input PI 1 through AND gate switch; connecting control signals of test points l j , . . . , l q to a kth primary input PI k through AND gate switch until every test point is connected to either primary inputs PI 1 , PI 2 , . . . , PI k , where k is no more than n and n is the number of the primary inputs: connecting a 1-control point to AND gate directly for a 1-control point circuit architecture; connecting a 0-control point to AND gate through inverter 0-control point circuit architecture; sharing one AND gate among all control points that are connected to the same primary input; controlling all control points by an uniform signal test; and checking whether the test points and the primary inputs produce new re-convergent fan-out while reducing inputs of the control signals; wherein the checking stop comprises: setting parameters to describe a circuit architecture, said parameters including number, type, predecessor table and successor table of each signal line l, wherein for test point set {l 1 , l 2 , . . . , l j },i and j are subscripts of test point l j and the primary input Pl j respectively; the checking step further comprises sub-steps of: setting i=1, and j=1 while n≧j; calling program converge(l j , Pl j ) to judge whether the test point l j converges with the primary input Pl j ; putting all direct successors of l j into a stack Q and marking said direct successors of l j as visited; popping an element I from the stack Q, and marking all its direct successors that are not visited and put them into the stack Q; repeating until all elements in the stack Q are checked; checking all lines that are accessible from Pl j , if one of them is in the stack Q, then putting it into set C; and judging that the lines in set C are the converge points of the test point l i and pl j , if C is empty, judging that l i does not converge with Pl j .