Patent ID: 7876165

Claim:
A ring-based multi-push voltage-controlled oscillator, for receiving a control voltage and tuning a frequency of a multi-push output signal, comprising: a plurality of delay cells, comprising at least a first delay cell, a second delay cell, and a last delay cell, wherein the first, second, and last delay cells receive the control voltage, a power source terminal of the first delay cell connects with a power voltage, a ground terminal of the first delay cell is grounded, a power source terminal of the second delay cell connects with the power voltage, a ground terminal of the second delay cell is grounded, a power source terminal of the last delay cell connects with the power voltage, a ground terminal of the last delay cell is grounded, an output of the first delay cell connects with an input of the second delay cell, an output of the second delay cell connects with an input of the last delay cell, and an output of the last delay cell connects with an input of the first delay cell; a plurality of buffer amplifiers, comprising at least a first buffer amplifier, a second buffer amplifier, and a last buffer amplifier, wherein an input of the first buffer amplifier connects with the output of the first delay cell, an input of the second buffer amplifier connects with the output of the second delay cell, an input of the last buffer amplifier connects with the output of the last delay cell, and an output of the first buffer amplifier, an output of the second buffer amplifier, and an output of the last buffer amplifier connect with a common node; and a bias unit, having a first side connecting with the common node, a second side supplied with a buffered supply voltage, and a third side outputting the multi-push output signal; wherein each buffer amplifier comprises an open drain buffer transistor and a first thin-film microstrip (TFMS) line, a drain of the open drain buffer transistor connects with one side of the first TFMS line, the other side of the first TFMS line connects with the output of the buffer amplifier, a source of the open drain buffer transistor is grounded, and a gate of the open drain buffer transistor connects with the output of the delay cell connected to the buffer amplifier.