Patent ID: 6933755

Claim:
An output driving circuit comprising: a first level shifter for receiving an input signal to be provided to an outside of an integrated circuit and shifting a voltage level of the input signal to a voltage level required at the outside of the integrated circuit while maintaining a duty ratio of the output signal constant; a second level shifter for receiving an output enable signal, and shifting a voltage level of the output enable signal to a voltage level required at the outside of the integrated circuit while maintaining a duty ratio of the output enable signal constant; and an output driving unit for forwarding the output signal to the outside of the integrated circuit under the control of the output enable signal from the second level shifter, wherein the first or second level shifter comprises: an input signal splitting unit for providing the input signal in two signals having the same delay time periods; a sense amplifier for amplifying voltage levels of the two signals into a voltage level required at the outside of the integrated circuit; and a delay compensating unit for making delay time periods of the two signals amplified at the sense amplifier to be the same, and forwarding the two signals, selectively, and wherein the input signal slitting unit comprises: first and second inverters for delaying the input signal for a preset time period and providing to one side input terminal of the sense amplifier, and a first transmission gate for delaying a signal from the first inverter for a time period the same with a delay time period at the second inverter, and providing to the other side input terminal of the sense amplifier.