Patent ID: 8324920

Claim:
A display device comprising: a gate line; a source line; a pixel portion driven by potentials of the gate line and the source line; a first wiring disposed in parallel with the gate line; a second wiring disposed in parallel with the source line; a test circuit connected to the first wiring and the second wiring; and a first connection terminal and a second connection terminal connected to the test circuit, wherein the test circuit includes a first circuit connected to the first wiring and the second wiring, a second circuit connected to the second wiring, and a third circuit connected to the first wiring and the second circuit; wherein the first circuit compares a potential of the first wiring and a potential of the second wiring and outputs a first potential to the first connection terminal when the potential of the second wiring is lower than the potential of the first wiring; wherein the second circuit inputs a second potential which is obtained by subtracting a reference potential from the potential of the second wiring to the third circuit; and wherein the third circuit compares the potential of the first wiring and the second potential and outputs a third potential to the second connection terminal when the second potential is lower than the potential of the first wiring.