Patent ID: 8144045

Claim:
A timing signal generator circuit for converting an input digital value into a timing signal having a delay time corresponding to the input digital value, the timing signal generator comprising: a digital-to-analog converter for converting the input digital value into an analog voltage corresponding to the input digital value; and an analog voltage-to-time converter for converting the analog voltage into a delay time corresponding to the analog voltage, wherein the digital-to-analog converter comprises: a first resistor for generating a predetermined reset voltage; a second resistor connected in series to the first resistor, the second resistor generating the analog voltage with the first resistor; and a current source circuit for supplying an n-fold current (n×Is) (where “n” is a number corresponding to the input digital value) as a first current from among a total supply current (N×Is) to the first and second resistors, and supplying a remaining current (N−n)×Is as a second current to the first resistor, wherein the digital-to-analog converter outputs a reset voltage generated by a sum of a first current flowing through the first resistor and a second current, and outputs an analog voltage of a sum of the reset voltage and a voltage generated by the first current flowing through the second resistor, and wherein the analog voltage-to-time converter comprises: a comparison voltage charging capacitor for charging the analog voltage; a first constant current source for supplying a predetermined constant current; an integration capacitor for charging the constant current from the first constant current source by using the reset voltage as an initial voltage; and a comparator for comparing an integral voltage of the integration capacitor with the analog voltage charged in the comparison voltage charging capacitor, and outputting a predetermined timing signal when the integral voltage exceeds the analog voltage.