Patent ID: 7435673

Claim:
A method of forming a metal interconnect structure, comprising the steps of: forming a first electrically insulating layer on a semiconductor substrate; forming a second electrically insulating layer on the first electrically insulating layer; selectively etching the second and first electrically insulating layers in sequence to define a contact hole therein; depositing a first metal layer that extends on the second electrically insulating layer and into the contact hole; patterning the first metal layer to expose the second electrically insulating layer; selectively etching the second electrically insulating layer for a sufficient duration to expose the first electrically insulating layer and expose a metal plug within the contact hole, using the patterned first metal layer as an etching mask; filling a seam within the exposed metal plug with an electrically conductive filler material; and forming a second metal layer on the exposed metal plug containing the electrically conductive filler material.