Patent ID: 8184700

Claim:
An image decoder which decodes an encoded video stream and outputs the decoded images, comprising: a stream dividing module by which an input video stream is divided in units of frames as a plurality of frame rows for distribution; a plurality of decoders each of which generates decoded images by decoding a frame row distributed from the stream dividing module; a reference image frame memory where of the decoded images generated by the plural decoders, reference images to be referred to when a subsequent frame is decoded is stored; a display image frame memory where the decoded images generated by the plural decoders are accumulated; an image display output module which outputs the decoded images from the display image frame memory in the order that the images are displayed; and a timing control module which receives information about stream distribution from the stream dividing module and controls the respective timings of decoding frames distributed to the plural decoders; wherein the timing control module provides timing control so that decoding of a distributed frame is started immediately after the reference image to be referred to by the distributed frame is partly stored in the reference image frame memory.