Patent ID: 7019569

Claim:
An integrated circuit having a phase-lock loop (PLL) comprising: a phase/frequency detector (PFD) for generating error signals based on comparing an input signal and a PLL feedback signal; a charge pump-based loop filter for generating a filtered voltage corresponding to the error signals; a state machine capable of determining a state condition based on comparing the input signal and the PLL feedback signal; and a voltage controlled oscillator (VCO) with a plurality of operating curves, comprising: a current cell for selecting one of the operating curves according to the state condition and generating a first current accordingly; a voltage-to-current converter (V2C) for selecting an operating point on a selected operating curve and converting the filtered voltage to a second current; and a current-controlled oscillator (CCO) for generating an oscillating signal according the operating point; wherein the oscillating signal is used to generate the PLL feedback signal.