Patent ID: 8053901

Claim:
An interconnect structure comprising: a lower metal wiring level comprising first metal lines positioned within a dielectric stack including a lower low-k dielectric and a first rigid dielectric layer located atop said lower low-k dielectric, wherein each of said first metal lines has an upper surface that is coplanar with an upper surface of the first rigid dielectric layer; a mechanically rigid dielectric positioned on said lower metal wiring level, said mechanically rigid dielectric comprising a plurality of metal filled vias; and an upper metal wiring level atop said mechanically rigid dielectric, said upper metal wiring level comprising second metal lines positioned within a dielectric stack including an upper low-k dielectric and a second rigid dielectric layer located atop said upper low-k dielectric, said first and second rigid dielectric layers comprising silicon nitride or silicon carbide, where said plurality of metal vias electrically connect said lower metal wiring level and said upper metal wiring level, wherein said plurality of metal filled vias comprise a set of rigid dielectric sidewall spacers, wherein at least some of the rigid dielectric sidewall spacers have an upper surface that is coplanar with an upper surface of said plurality of metal filled vias, wherein a dielectric material for said rigid dielectric sidewall spacer is selected from the group consisting of SiCH, SiC, SiNH, SiN, and SiO 2 .