Patent ID: 8836618

Claim:
A pixel circuit of a light emitting diode display, comprising: a first transistor having a first terminal, a control terminal and a second terminal, wherein the first terminal of the first transistor is configured to receive a data signal, the control terminal of the first transistor is a configured to receive a first control signal; a first capacitor having a first terminal and a second terminal, wherein the first terminal of the first capacitor is electrically connected to the second terminal of the first transistor, the second terminal of the first capacitor is electrically connected to a connecting node; a second transistor having a first terminal, a control terminal and a second terminal, wherein the first terminal of the second transistor is configured to receive a first reference voltage, the control terminal of the second transistor is electrically connected to the connecting node; a third transistor having a first terminal, a control terminal and a second terminal, wherein the first terminal of the third transistor is electrically connected to the connecting node, the control terminal of the third transistor is configured to receive a second control signal, the second terminal of the third transistor is electrically connected to the second terminal of the second transistor; a fourth transistor having a first terminal, a control terminal and a second terminal, wherein the first terminal of the fourth transistor is electrically connected to the connecting node, the control terminal of the fourth transistor is configured to receive a third control signal, the second terminal of the fourth transistor is configured to receive a second reference voltage; a fifth transistor having a first terminal, a control terminal and a second terminal, wherein the first terminal of the fifth transistor is electrically connected to the first terminal of the second transistor, the control terminal of the fifth transistor is configured to receive the second control signal, the second terminal of the fifth transistor is electrically connected to the first terminal of the first capacitor; a second capacitor having a first terminal and a second terminal, wherein he first terminal of the second capacitor is electrically connected to the first terminal of the fifth transistor, the second terminal of the second capacitor is electrically connected to the connecting node; a sixth transistor having a first terminal, a control terminal and a second terminal, wherein the first terminal of the sixth transistor is electrically connected to the second terminal of the second transistor, the control terminal of the sixth transistor is configured to receive a fourth control signal; and a light emitting diode having a first terminal and a second terminal, wherein the first terminal of the light emitting diode is electrically connected to the second terminal of the sixth transistor, the second terminal of the light emitting diode is configured to receive a third reference voltage.