Patent ID: 7174014

Claim:
A method of performing an arbitrary permutation in a programmable processor comprising the steps of: a. defining bit positions in a source sequence of bits to be permuted in a source register; b. determining a permutation instruction with said bit positions to assemble bits from said source sequence of bits; c. performing said permutation instruction for inserting said assembled bits into a destination register as determined by said bit positions, said permutaion instruction comprises a first parameter indicating which k bits in said destination register will change, a reference to said source register which contains said source sequence of bits to be permuted, a reference to a configuration register which contains configuration bits for indicating which said bits in said source register are assembled and a reference to said destination register wherein in said destination register said k bits specified by said first parameter are updated and all other bits in said destination register are set to zero; and d. repeating steps a. through c. for different groups of bits in said destination register, wherein after a final permutation instruction a desired permutation of said source register is determined and said determined permutation instructions form a permutation instruction sequence.