Patent ID: 8723327

Claim:
A microelectronic package comprising: a first microelectronic unit including a semiconductor chip having first chip contacts, an encapsulant contacting an edge of the semiconductor chip, and first unit contacts exposed at a surface of the encapsulant and electrically connected with the first chip contacts; a second microelectronic unit including a semiconductor chip having second chip contacts at a surface thereof, an encapsulant contacting an edge of the semiconductor chip of the second microelectronic unit and having a surface extending away from the edge, the surfaces of the semiconductor chip and the encapsulant of the second microelectronic unit defining a face of the second microelectronic unit; bond wires electrically connected with the first unit contacts; and package terminals at the face of the second microelectronic unit electrically connected with (i) the first unit contacts through the bond wires and (ii) the second chip contacts through metallized vias and traces formed in contact with the second chip contacts.