Patent ID: 6876586

Claim:
An integrated semiconductor apparatus comprising: at least one fuse box device comprising fuses for storing trimming data, a fuse box trimming output, and a timer emitting a clock signal; a parallel/serial converter connected to the fuses and to the timer; the parallel/serial converter being configured to read, in parallel, the trimming data from the fuses and to emit, in serial, the trimming data from the fuse block trimming output based on the clock signal; generators, each generator generating a generator signal, each generator comprises: a trimming unit having a trimming signal input, the trimming unit being configured to trim the generator signal of the generator based on the trimming data received; a trimming signal output; memory flip-flops connecting the trimming input signal to the trimming output signal; and wherein each of the memory flip-flops connects each trimming unit to the fuse block trimming output to form a shift register chain for serial transmission of the trimming data from the at least one fuse block device to the generators.