Patent ID: 7485891

Claim:
A multi-bit phase change memory cell, comprising: a stack of a plurality of conductive layers including a first outer conductive layer disposed at one side of the memory cell and a second outer conductive layer disposed at a side opposite to the one side of the memory cell, the plurality of conductive layers including a plurality of intermediate conductive layers disposed between the first and second outer conductive layers, each of the intermediate conductive layers having the same dimensions as an adjacent phase change material layer, wherein the plurality of conductive layers are made of at least one of Cu and Pt and wherein each of the plurality of conductive layers are made of the same material as one another; a plurality of phase change material layers, each of the phase change material layers disposed between a corresponding pair of conductive layers and having electrical resistances that are different from one another, and wherein each of said plurality of phase change material layers has a different height from one another and wherein the height of each of the plurality of phase change layers increases along a direction from the first outer conductor layer to the second outer conductive layer and a surface area of each of the plurality of phase change layers decreases along the direction from the first outer conductor layer to the second outer conductive layer, and wherein the multi-bit phase change memory cell is adapted such that when each of the plurality of phase change material layers are in an amorphous state then each of the plurality of phase change material layers each have the same resistivity and the electrical resistance of each of the plurality of phase change material layers increases along the direction from the first outer conductive layer to the second outer conductive layer.