Patent ID: 6937106

Claim:
A built-in jitter measurement circuit for a voltage-controlled oscillator (VCO) and a phase-locked loop (PLL) comprising: a divider for dividing frequency of a signal to be measured by n; a state controller as a controller for components in the built-in jitter measurement circuit; a variance calculator for calculating variance of the signal to be measured; a mean calculator for calculating mean of the signal to be measured; a time to digital converter (TDC) for converting the period of the signal to be measured into digital values; and a encoder and counter for counting and encoding the digital values output from TDC; wherein, the divider divides the frequency of the signal to be measured, the period of the divided signals to be measured are converted into digital values by TDC, encoder and counter, the digital values are calculated by the variance calculator and the mean calculator, and period means and jitter of the divided signal are determined.