Patent ID: 8575494

Claim:
A printed circuit board (PCB), comprising: a mounting surface defining an outline; a ground layer; a power layer positioned between the mounting surface and the ground layer, the power layer comprising a region, the region being configured to allow current streams to flow into the outline; a plurality of multi-layer ceramic capacitors (MLCCs) mounted to the mounting surface within the outline and arranged in a matrix, wherein the columns of the MLCCs are substantially parallel to the flowing direction of the current streams, each MLCC comprises a positive electrode and a negative electrode; a plurality of groups of positive vias, each group of positive vias running from the mounting surface to the power layer to connect a corresponding positive electrode to the power layer; and a plurality of groups of negative vias, each group of negative vias running from the mounting surface, through the power layer, to the ground layer to connect a corresponding negative electrode to the ground layer; wherein a portion of the positive vias and a portion of the negative vias corresponding to the same column of MLCCs are arranged in two separated lines along the flowing direction of the current streams.