Patent ID: 8426926

Claim:
A semiconductor device comprising: a device isolation pattern disposed in a semiconductor substrate to define an active area; a gate line intersecting the active area; and an epitaxial pattern that completely fills a recess region in the active area at one side of the gate line, the epitaxial pattern including a different constituent semiconductor element than the semiconductor substrate, wherein the recess region includes a first inner sidewall that extends in the lengthwise direction of the gate line, a second inner sidewall that extends in the direction perpendicular to the lengthwise direction of the gate line and a third inner sidewall that is opposite the first inner sidewall and that is between the active area under the gate line and the first inner sidewall, wherein the active area comprises the first inner sidewall and the device isolation pattern comprises at least a portion of the second inner sidewall, wherein the epitaxial pattern directly contacts the first inner sidewall and the second inner sidewall of the recess region, and wherein the first inner sidewall is spaced apart from the device isolation pattern.