Patent ID: 7193270

Claim:
A semiconductor device comprising: a semiconductor substrate; a tower-like gate pillar formed on said semiconductor substrate via an insulation layer, said gate pillar including a channel region formed so as to be positioned between impurity diffusion regions in a vertically extending direction with respect to a principal side of said semiconductor substrate; a gate insulation film formed on an outer surface of said gate pillar; and a gate electrode film formed on an outer surface of said gate insulation film; wherein a wiring layer is formed below said gate electrode film on the principal side of said substrate; wherein said gate electrode film is formed of a plurality of stacked layers including a first electrode film and a second electrode film formed on an outer circumferential side of said first electrode film; and wherein said first electrode film has an end thereof spaced from said wiring layer, and said second electrode film is formed so as to electrically connect with said wiring layer.