Patent ID: 7427539

Claim:
A method of manufacturing a thin film transistor, comprising: a) forming an amorphous silicon layer on an insulating substrate; b) forming a first photoresist layer on the amorphous silicon layer while exposing edge portions of the amorphous silicon layer; c) forming a capping layer and a metal layer over an entire first surface of the insulating substrate; d) removing the first photoresist layer to expose a portion of the amorphous silicon layer under the first photoresist layer; e) crystallizing the amorphous silicon layer by diffusing metals in the metal layer through the capping layer into the amorphous silicon layer to form a poly silicon layer; f) forming a second photoresist layer having first and second photoresist patterns on the poly silicon layer, wherein the first and second photoresist patterns are spaced apart from each other; g) etching the poly silicon layer using the first and second photoresist patterns as a mask to form first and second semiconductor layers; and h) removing the first and second photoresist patterns.