Patent ID: 8188899

Claim:
An apparatus comprising: a first resistor segment having a plurality of sub-segments, each sub-segment comprising one or more resistor elements; a second resistor segment having a plurality of sub-segments, each sub-segment comprising one or more resistor elements; a plurality of switches interconnecting the sub-segments of the first and second segments; at least one sub-segment having an upper additional resistor element and a lower additional resistor element, the upper additional resistor element being disposed between a first switch and a first adjacent sub-segment, and the lower additional resistor element being disposed between a second one of the switches and a second adjacent sub-segment; and further wherein the resistor elements in each of the sub-segments of the first resistor segment further each comprise a plurality, N 1 , of unit resistors, each unit resistor having a unit resistance R U ; the resistor elements in each of the sub-segments of the second resistor segment further each comprise a plurality, N 2 , of unit resistors, each unit resistor also having a unit resistance R U , and where m 2 is the number of sub-segments in the second resistor segment; and the upper and lower additional resistor elements further comprise a plurality, NT, of unit resistors where NT depends on N2·2 m2 N1+2.