Patent ID: 8703609

Claim:
A method of fabricating a semiconductor device, comprising: providing a semiconductor substrate having a front surface and an opposing back surface, and wherein the substrate has an interconnect structure formed on the front surface of the substrate, and wherein the interconnect structure has a first surface opposite the front surface of the substrate, and wherein the interconnect structure includes a first conductive layer, a second conductive layer overlying the first conductive layer, and an isolation layer interposing the first conductive layer and the second conductive layer; depositing a hard mask layer on the interconnect structure; forming a first opening in the hard mask layer; depositing a layer of photoresist on the hard mask layer; forming a second opening in the photoresist, wherein the second opening is aligned with the first opening and has a greater width than the first opening; and etching a tapered profile via in the substrate aligned with the first and the second openings, wherein the tapered profile via extends from the hard mask layer to the back surface of the semiconductor substrate, wherein a width of the tapered profile via is defined by at least one of the first opening and the second opening.