Patent ID: 8254168

Claim:
A nonvolatile semiconductor memory device comprising: a plurality of nonvolatile memory cells configured to enable data to be rewritten; a plurality of bit lines connected to the plurality of nonvolatile memory cells; a write circuit configured to control write voltages provided to the plurality of nonvolatile memory cells to write data to a selected memory cell; and a plurality of sense amplifiers configured to bias the bit line to which the selected memory cell is connected, to a first voltage until a threshold of the selected memory cell reaches the value of a first write state, and when the threshold of the selected memory cell reaches the value of the first write state, to bias the bit line to which the selected memory cell is connected, to a second voltage higher than the first voltage, and when the threshold of the selected memory cell reaches the value of a second write state, to continuously bias the bit line to which the selected memory cell is connected, to a third voltage higher than the second voltage, while continuously biasing bit lines connected to unselected memory cells corresponding to the memory cells other than the selected one, to the third voltage.