Patent ID: 7586148

Claim:
A power semiconductor device comprising: a substrate of a first conductivity type; a voltage sustaining region disposed on said substrate, said voltage sustaining region including: an epitaxial layer having a first or second conductivity type; at least one terraced trench located in said epitaxial layer, said terraced trench having a trench bottom and a plurality of terrace portions that differ in width to define a plurality of annular ledges therebetween; at least one doped column having a dopant of a conductivity type opposite to the conductivity type of the epitaxial layer, said doped column being formed from at least one annular doped region and another doped region diffused into one another, said at least one annular doped region and said another doped region being located in said epitaxial layer adjacent to and below said plurality of annular ledges and said trench bottom, respectively, wherein the trench bottom and the plurality of terrace portions each have a same total charge; a filler material substantially filling said terraced trench; and at least one active region of a conductivity opposite to the conductivity type of the epitaxial layer disposed over said voltage sustaining region to define a junction therebetween, wherein said epitaxial layer has a given thickness and wherein said plurality of annular ledges are separated by a space substantially equal to 1/(x+1) of said given thickness, where x is equal to or greater than a number of said plurality of annular ledges formed in the voltage sustaining region.