Patent ID: 6925625

Claim:
A method for placing flip-flops in an integrated circuit based upon timing, comprising: receiving a netlist specifying flip-flop connectivity, wherein receiving the netlist includes receiving a hierarchical block placement for blocks on the integrated circuit, and wherein the hierarchical block placement includes a repeater placement in a channel area of the integrated circuit; determining a metal layer class definition for a flip-flop in the netlist based upon timing requirements of the flip-flop; classifying a flip-flop instance using the metal layer class definition; defining a flip-flop type for each flip-flop instance; associating the flip-flop with a group of other flip-flops that have a same metal layer class definition; searching for available flip-flop positions based on the repeater placement; and determining a position for the group of flip-flops by replacing an existing repeater in the integrated circuit with the group of flip-flops.