Patent ID: 8710905

Claim:
A bias voltage generating circuit, comprising: a) a first control circuit configured to compare a drain-source voltage of a first switch against a bias voltage across a capacitor; c) a second control circuit configured to control said first switch, wherein said second control circuit is configured to be enabled when said bias voltage is at least as high as an expected bias voltage; d) wherein said first control circuit is configured to control said first capacitor to charge when said drain-source voltage of said first switch is greater than said bias voltage, said first control circuit comprising: (i) a first comparator configured to receive said bias voltage and said drain-source voltage of said first switch, (ii) a second comparator configured to receive said bias voltage and an overvoltage protection voltage, (iii) an AND-gate configured to receive an output of said first comparator, an output of said second comparator, and an inverted control signal of said first switch, said AND-gate being configured to output a second control signal, and (iv) a second switch having a control terminal coupled to said second control signal, a first terminal coupled to a power terminal of said first switch, and a second terminal coupled to said capacitor; and e) wherein said bias voltage is less than said overvoltage protection voltage when said capacitor charges, and wherein said overvoltage protection voltage comprises a voltage that is a predetermined amount higher than said expected bias voltage.