Patent ID: 7515629

Claim:
A high-speed serial bit stream interface that communicatively couples a line side media to a communication Application Specific Integrate Circuit (ASIC), the high-speed serial bit stream interface comprising: a line side interface that communicatively couples to the line side media, that receives a RX signal therefrom, and that transmits a conditioned TX signal thereto; a board side interface that communicatively couples to the communication ASIC, that receives a TX signal therefrom, and that transmits a conditioned RX signal thereto; a first signal conditioning circuit communicatively coupled between the line side interface and the board side interface; wherein the first signal conditioning circuit receives the RX signal from the line side interface, conditions the RX signal, and provides the conditioned RX signal to the board side interface, wherein the signal conditioning circuit is controllable to spectrally shape the RX signal using first spectral shaping control settings that are determined based upon a spectral shape of the RX signal prior to conditioning caused by RX signal path attenuation properties corresponding to deterministic jitter in the RX signal relative to reference spectral characteristics; a second signal conditioning circuit communicatively coupled between the line interface and the board side interface; and wherein the second signal conditioning circuit receives the TX signal from the board side interface, conditions the TX signal, and provides the conditioned TX signal to the line side interface, wherein the second signal conditioning circuit is controllable to spectrally shape the TX signal using second spectral shaping control settings that are determined based upon a spectral shape of the TX signal prior to conditioning caused by TX signal path attenuation properties corresponding to deterministic jitter in the TX signal relative to reference spectral characteristics.