Patent ID: 7952435

Claim:
A phase locked loop comprising: an R-divider configured to output a signal having a frequency obtained by dividing a frequency of an input signal by R; an N-divider configured to output a signal having a frequency obtained by dividing a phase locked loop output frequency by N; a phase detector configured to output a signal corresponding to a difference obtained by comparing a phase of the signal being outputted by the R-divider with a phase of the signal being outputted by the N-divider; a loop filter configured to output a tuning voltage having a high frequency component of the signal being outputted by the phase detector removed therefrom; a VCO configured to output a signal having the phase locked loop output frequency corresponding to the tuning voltage and a tuning digital value, wherein the VCO comprises: an inductor; a variable capacitor configured to vary a capacitance according to the tuning voltage; a plurality of switched capacitors configured to form an LC resonance circuit with the inductor and the variable capacitor, the plurality of switched capacitors configured to discretely vary a capacitance according to the tuning digital value; and an active element configured to maintain the LC resonance circuit to resonate continuously; a coarse tuning controller configured to output an initial tuning digital value corresponding to a desired phase locked loop output frequency; and a temperature compensator configured to initially output the initial tuning digital value as the tuning digital value and to output a compensated digital value compensated according to a temperature change as the tuning digital value to vary the capacitance when the temperature change occurs, wherein the temperature compensator comprises: a lookup table configured to output the compensated digital value; and a logic circuit configured to output a combination of the compensated digital value and the initial digital value as the tuning digital value, and wherein the phase locked loop is configured to send and receive data in frames that each include an upstream interval, a downstream interval, a first gap interval between the upstream interval and downstream interval, and a second gap interval between a downstream interval end and an upstream interval start; wherein the lookup table is configured to change the compensating digital value either during the first gap interval or during the second gap interval, and wherein the frames are one of Wibro (wireless broadband), OFDMA (orthogonal frequency division multiple access) or TDD (time division duplexing) frames, and the temperature compensator is configured to determine the compensating digital value and the tuning digital value in less than 150 μsec.