Patent ID: 7436683

Claim:
A manufacturing method of a wafer level package structure with inductors comprising: providing a first substrate; forming a second substrate, the second substrate comprising a plurality of inductors; bonding the first substrate and the second substrate through a plurality of pads to form a gap between the first substrate and the second substrate, wherein the gap is between the first substrate and the plurality of inductors, and wherein the plurality of pads electrically connect the plurality of inductors to the first substrate; and cutting the first substrate and the second substrate to form a plurality of wafer level package structures, wherein the step of forming the second substrate comprises: providing a dielectric layer having a first and a second surface, wherein a first metal layer is formed on the first surface of the dielectric layer, and a second metal layer is formed on the second surface of the dielectric layer, wherein the dielectric layer is flexible material, and wherein the flexible material comprises polyimide or polyester; etching the first metal layer and the second metal layer to form the plurality of inductors and a plurality of metal wires; forming a plurality of via holes in the dielectric layer; forming a plurality of metal conductors in the via holes, wherein the metal conductors connects the first metal layer and the second metal layer; forming a plurality of solder bumps on the first metal layer; forming a first insulation layer and a second insulation layer wherein the first insulation layer covers the first metal layer and the second insulation layer covers the second metal layer; and etching the first insulation layer and the second insulation layer to expose a plurality of joints of the metal wires.