Patent ID: 7129127

Claim:
A method of fabricating a semiconductor device comprising: growing a poly oxide layer over gate electrodes formed on a semiconductor body and active regions defined within the semiconductor body in PMOS and NMOS regions; forming a nitride containing cap oxide layer over the grown poly oxide layer; forming offset spacers adjacent to sidewalls of the gate electrodes; forming extension regions within the PMOS region and the NMOS region; forming sidewall spacers adjacent to the sidewalls of the gate electrodes; implanting an n-type dopant into the NMOS region to form the active regions; implanting a p-type dopant with an overdose amount into the PMOS region to form the active regions within the PMOS region; forming a poly cap layer over the device, wherein the poly cap layer includes hydrogen; and performing an anneal that diffuses a portion of the implanted p-type dopant into the nitride containing cap oxide layer and obtaining a selected dopant profile having a selected lateral abruptness.