Patent ID: 8476631

Claim:
A thin film transistor (TFT) comprising an active region divided into a first active region and a second active region, the active region comprising: a gate electrode; an active layer comprising a first active layer corresponding to the first active region, and a second active layer corresponding to the second active region, the first active layer and the second active layer overlapping with the gate electrode; a gate insulating layer between the gate electrode and the active layer; and a source/drain electrode layer comprising a first source/drain electrode and a second source/drain electrode that are electrically connected to the first active layer, and a third source/drain electrode and a fourth source/drain electrode that are electrically connected to the second active layer, wherein: two source/drain electrodes selected from among the first to fourth source/drain electrodes overlap partially with the gate electrode, an other two source/drain electrodes from among the first to fourth source/drain electrodes are offset from the gate electrode, and the first to fourth source/drain electrodes and the gate electrode are in a symmetrical arrangement.