Patent ID: 7850486

Claim:
An electrical connector for mounting on a circuit board for mating with a complementary connector, comprising: an insulative housing comprising a base portion, inserting portions extending forwardly from the base portion and a bottom wall extending forwardly from a bottom of the base portion, at least one receiving slot being defined on a front end of the bottom wall; a plurality of contacts inserted into the insulative housing, each contact comprising a mating section and a tail section for conjoining with the circuit board; two first retaining patches fixed on two opposite ends of the insulative housing; and at least one second retaining patch received in said at least one receiving slot; wherein said at least one receiving slot runs through the front end of the bottom wall and comprises a perforating portion perforating the bottom wall and facing the circuit board and two stop slots on two opposite sides of the perforating portion; wherein said at least one second retaining patch comprises a retaining portion inserted in the stop slot of the at least one receiving slot, a conjoint portion protruding out of the perforating portion and a connecting portion within the perforating portion for connecting the retaining portion and the conjoint portion; wherein said retaining portion of the at least one second retaining patch is formed on two sides thereof with a right angle retaining portion and each of the right angle retaining portions having a plurality of protruding points mating with the stop slot of the at least one receiving slot; wherein the inserting portion of the insulative housing is formed with a L shape, which comprises a power inserting area and a signal inserting area; wherein the insulative housing has a top wall parallel with said bottom wall extending from the top end of the base portion, and said top wall, bottom wall and two side walls together form a receiving space with said inserting portion formed therein; and wherein there are two second retaining patches, and the two second retaining patches are separately fixed on the bottom wall under corresponding two inserting areas, the retaining patches being sandwiched between the bottom wall and the circuit board and located under a middle region of the respectively inserting portions.