Patent ID: 8557696

Claim:
A method for forming a floating gate transistor comprising: providing a floating gate transistor substructure including an oxide disposed over a silicon gate disposed over a gate oxide disposed on a substrate; forming nitride spacers along sidewalls of said floating gate transistor substructure by first forming a nitride film on and directly contacting said floating gate transistor substructure including on and directly contacting sidewalls of said silicon gate and over said substrate, then performing a nitride etch operation that creates said nitride spacers and removes other portions of said nitride film from over said substrate and from over said floating gate transistor substructure, said nitride spacers covering end portions of said gate oxide that terminate at said sidewalls; performing an oxide etch that laterally recedes opposed edges of said oxide inwardly such that a width of said oxide is less than a width of said silicon gate; and forming an inter-gate dielectric over said floating gate transistor substructure and forming a silicon layer over said inter-gate dielectric.