Patent ID: 8183147

Claim:
A method of fabricating a semiconductor device comprising: forming a semiconductor chip portion having an electrode on a main surface of a wafer; forming a passivation film covering the semiconductor chip portion, the passivation film having an opening exposing an upper surface of the electrode; forming a lower base seed layer on the semiconductor chip portion, the lower base seed layer being in contact with both an upper surface of the passivation film and the upper surface of the electrode; forming a first resist pattern having a first opening on the electrode after the lower base seed layer is formed; filling the first opening with a first electrically conductive material, thereby forming an electrically conductive post; removing the first resist pattern after said forming of the electrically conductive post; forming an interlayer dielectric film having a second opening positioned on the electrically conductive post; and forming an electrically conductive layer extending from an upper surface of the electrically conductive post over an upper surface of the interlayer dielectric film.