Patent ID: 8088666

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a gate electrode comprising semiconductor over a partial surface area of a semiconductor substrate; (b) forming a mask member over a surface of the semiconductor substrate over both sides of the gate electrode; (c) implanting impurities into the gate electrode after said (b) forming the mask member; (d) removing the mask member after said (c) implanting impurities; (e) implanting impurities into a surface layer of the semiconductor substrate on both sides of the gate electrode to form source and drain regions after said (d) removing the mask member, wherein said step (e) includes the steps of: (e1) forming first sidewall spacers on sidewalls of the gate electrode, said sidewall spacers being disposed in an area narrower than the surface of the semiconductor substrate which had been covered with the mask member; (e2) implanting impurities into the surface layer of the semiconductor substrate by using the gate electrode and the first sidewall spacers as a mask; (e3) removing the first sidewall spacers; and (e4) implanting impurities into the surface layer of the semiconductor substrate by using the gate electrode as a mask, under a condition that an impurity concentration distribution in a depth direction takes a maximum value at a position shallower than a position where an impurity concentration distribution of the impurities implanted at said step (e2) takes a maximum value; after the step (e), forming second sidewall spacers on the sidewalls of the gate electrode, the second sidewall spacers reaching at least boundaries of areas implanted with the impurities in side step (e2); and after forming the second sidewall spacers, forming a metal silicide film on an upper surface of the gate electrode and on a surface of the areas implanted with the impurities in said step (e2) and not covered with the second sidewall spacers.