Patent ID: 7690110

Claim:
A method for making plural plated through hole conductors in a circuit board via comprising plating a first layer in the walls of a circuit board via to, said first layer in said circuit board via comprises a first plated through hole conductor, applying a second layer in said circuit board via bonded to said first layer, the second layer in said circuit board comprises a first adhesive, vacuum depositing a third layer in said circuit board via bonded to said second layer, the third layer in said circuit board via comprises an organic layer having a relatively high dielectric strength, applying a fourth layer in said circuit board via bonded to said third layer, the fourth layer in said circuit board comprises a second adhesive, and plating a first layer in said circuit board via bonded to said fourth layer, said fifth layer comprises a second plated through hole conductor electrically isolated from said first plated through hole conductor in said circuit board via.