Patent ID: 7366002

Claim:
A permanent storage device comprising: a plurality of memory cells, each of the plurality of memory cells operative to assume a first state or a second state; a plurality of wordlines connected to the plurality of memory cells; a plurality of bitlines connected to the plurality of memory cells; a plurality of inverters, connected to the plurality of bitlines, each of the plurality of inverters operative to selectively invert a value of at least one bitline of the plurality of bitlines; and a multiplexer coupled with the plurality of bitlines, the multiplexer comprising a switching device activated by a control signal, the switching device operative to connect at least one of the plurality of bitlines to an output structure connected to the multiplexer at a connection point; wherein each of the plurality of memory cells is addressable through at least one wordline of the plurality of wordlines and at least one bitline of the plurality of bitlines; and wherein a first stored value comprises a first non-inverted or inverted assignment of the first or second state of each the plurality of memory cells and a second stored value comprises a second non-inverted or inverted assignment of the first or second state of each the plurality of memory cells.