Patent ID: 8306177

Claim:
A gate drive circuit in which a plurality of stages are connected in series to each other, the gate drive circuit sequentially activating a plurality of gate lines, a present stage comprising: a pull-up driving part maintaining a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage in the series or a vertical start signal; a pull-up part outputting a clock signal of a first clock terminal through an output terminal in response to the signal of the first node; a first holding part maintaining a signal of a second node at a high level in response to a low level of the signal of the first node and maintaining the signal of the second node at a low level in response to a high level of the signal of the first node, during a period in which a delayed signal of the clock signal is high; and a second holding part maintaining the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or an inverted signal of the delayed signal of the clock signal, wherein the first holding part comprises: a first transistor comprising a drain and a gate, each of the drain and the gate connected to a third clock terminal to receive a delayed first clock signal; a second transistor comprising a drain connected to a source of the first transistor, a gate connected to the first node, and a source receiving the ground voltage; a third transistor comprising a drain connected to the third clock terminal, and a gate connected to a source of the first transistor; a fourth transistor comprising a drain connected to a source of the third transistor forming the second node, and a gate connected to the gate of the second transistor and connected to the first node, and a source receiving the ground voltage; a first capacitor being connected between the drain of the third transistor and the gate of the third transistor; and a second capacitor being connected between the gate of the third transistor and the source of the third transistor.