Patent ID: 8178967

Claim:
A chip package comprising: a ball grid array (BGA) substrate having a first side and a second side opposite to said first side; a semiconductor device comprising a passivation layer, a polymer layer on said passivation layer and a metal pad having a contact point at a bottom of a first opening in said passivation layer, wherein said opening is over said contact point, wherein a second opening in said polymer layer is over said contact point; a copper pillar between said semiconductor device and said first side, wherein said copper pillar is connected to said contact point through said first and second openings, wherein said copper pillar has a thickness between 10 and 100 micrometers; a solder between said copper pillar and said first side, wherein said solder joins said first side; a nickel layer between said copper pillar and said solder, wherein said nickel layer has a thickness between 1 and 10 micrometers, wherein said copper pillar has a sidewall recessed from that of said nickel layer, wherein said nickel layer comprises a first portion over said copper pillar and a second portion overhanging said copper pillar; an underfill between said semiconductor device and said first side, wherein said underfill contacts said semiconductor device and said first side, said wherein said copper pillar has a sidewall with a region not covered by said solder bu covered by said underfill; and a contact ball on said second side.