Patent ID: 8704373

Claim:
A method for manufacturing a semiconductor integrated circuit device, the method comprising: (a) forming over a semiconductor substrate a first interconnect including copper as a main component; (b) forming on a surface of the first interconnect a first barrier insulating film that prevents diffusion of copper; (c) forming a second barrier insulating film on a surface of the first barrier insulating film; (d) forming a first interlayer insulating film on a surface of the second barrier insulating film; (e) forming over the first interlayer insulating film a second interconnect including copper as a main component; (f) forming on a surface of the second interconnect a third barrier insulating film that prevents diffusion of copper; and (g) forming a second interlayer insulating film on a surface of the third barrier insulating film, wherein the first barrier insulating film is formed between the first interconnect and the second barrier insulating film, wherein the second barrier insulating film is formed between the first barrier insulating film and the first interlayer insulating film, wherein a thickness of each of the first and second barrier insulating films is smaller than a thickness of the first interlayer insulating film, wherein a thickness of the third barrier insulating film is smaller than a thickness of the second interlayer insulating film, wherein the first interlayer insulating film includes Si, O and C, wherein the second interlayer insulating film includes a silicon oxide film or a fluorinated silicon oxide film, and wherein a nitrogen concentration of the first barrier insulating film is larger than a nitrogen concentration of the second barrier insulating film.