Patent ID: 7622761

Claim:
A non-volatile memory device comprising: a semiconductor substrate having a body, and a pair of fins projecting from the body and spaced apart opposite each other; and a bridge insulating layer non-electrically connecting upper portions of the pair of fins to define a void between the pair of fins, at least one control gate electrode covering at least a portion of the outer surfaces of the pair of fins, extending over the bridge insulating layer, and isolated from the semiconductor substrate; at least one pair of gate insulating layers between the at least one control gate electrode and the pair of fins; and at least one pair of storage nodes between the at least one pair of gate insulating layers and the at least one control gate electrode, wherein outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void.