Patent ID: 6909852

Claim:
A method of recovering a clock and data from a data signal comprising: receiving the data signal having a first data rate; receiving a clock signal having a first clock frequency, and alternating between a first level and a second level; storing the data signal when the clock signal alternates from the first level to the second level, and providing the stored data signal as a first signal a first amount of time later; storing the first signal when the clock signal alternates from the first level to the second level, and providing the stored first signal as a second signal a second amount of time later; providing a third signal by delaying the first signal for a third amount of time; storing the third signal when the clock signal alternates from the second level to the first level, and providing the stored third signal as a fourth signal a fourth amount of time later; providing a fifth signal by delaying the data signal a fifth amount of time; providing an error signal by taking the exclusive-OR of the first signal and the fifth signal; and providing a reference signal by taking the exclusive-OR of the second signal and the fourth signal, wherein the first data rate is equal to the first clock frequency.