Patent ID: 7179730

Claim:
A method of fabricating a static memory cell comprising: forming a plurality of isolation trenches in a base substrate; forming a first dielectric layer over said base substrate; forming a first damascene trench having a first gate area, a first local interconnect area, a second gate area, and a second local interconnect area; forming a second damascene trench having a first gate area, a first local interconnect area, a second gate area, and a second local interconnect area; forming a gate oxide on said base substrate in said first and second gate areas of both said first and second damascene trenches; forming a patterned mask over said static memory cell, said patterned mask arranged to expose at least a portion of said gate oxide within said first and second local interconnect areas of both said first and second damascene trenches; etching away the exposed portion of said gate oxide within said damascene trenches; providing at least one contact implant within a plug area in said base substrate, wherein said plug area is located at least partially beneath and in contact with said damascene local interconnect structure; stripping said patterned mask from said static memory cell; filling said first and second damascene trenches with a conductive material; removing said first dielectric layer; doping said base substrate with a first active area between said first gate area of said first damascene trench and said first local interconnect area of said second daniascene trench; doping said base substrate with a second active area between said first local interconnect area of said first damascene trench and said first gate area of said second damascene trench; doping said base substrate with a third active area between said second gate area of said first damascene trench and said second local interconnect area of said second damascene trench; and, doping said base substrate with a fourth active area between said second local interconnect area of said first damascene trench and said second gate area of said second damascene trench.