Patent ID: 7482241

Claim:
A method for fabricating a metal-insulator-metal (MIM) capacitor of a semiconductor device, comprising steps of: (a) forming a structure in which a lower metal film pattern and a dielectric film pattern are sequentially deposited on a first insulating film on a semiconductor substrate; (b) simultaneously patterning the lower metal film pattern and the dielectric film pattern to form a first structure in a MIM capacitor region, in which a lower metal electrode film pattern and the dielectric film pattern are sequentially deposited on the first insulating film, and a second structure in a metal line region, in which a lower metal line film pattern and the dielectric film pattern are sequentially deposited on the first insulating film, wherein the lower metal electrode film pattern and the lower metal line film pattern are in direct contact with and formed on top of the first insulating film; (c) removing the dielectric film pattern in the metal line region using a wet etching process to expose the lower metal line film pattern; (d) forming a second insulating film to cover the dielectric film pattern in the MIM capacitor region and the lower metal line film pattern in the metal line region; (e) simultaneously forming a trench that exposes the dielectric film pattern in the MIM capacitor region and a via hole that exposes the lower metal line film pattern in the metal line region by passing through the second insulating film; and (f) forming an upper metal electrode film pattern and a via contact to respectively bury the trench and the via hole.