Patent ID: 8553164

Claim:
A method of fabricating a liquid crystal display device, comprising: forming first and second polycrystalline semiconductor patterns in p-type and n-type regions of a non-display region of a substrate, respectively, third and fourth polycrystalline semiconductor patterns in switching and storage regions of a display region of the substrate, respectively, and a storage pattern on the fourth polycrystalline semiconductor pattern, wherein the fourth polycrystalline semiconductor pattern is extended from the third polycrystalline pattern, and the storage pattern is made of metal material; forming a gate insulating layer on the first to fourth polycrystalline semiconductor patterns and the storage pattern; forming a first gate electrode in the p-type region, a first metal pattern in the n-type region, a second metal pattern in the switching and storage regions, a gate line connected to the second metal pattern, on the gate insulating layer; doping first source and drain portions of the first polycrystalline semiconductor pattern with p+ ions after forming the first gate electrode and the first and second metal patterns; forming a second gate electrode from the first metal pattern in the n-type region, and a third gate electrode and a first storage electrode from the second metal pattern in the switching and storage regions, respectively; doping second source and drain portions of the second polycrystalline semiconductor patterns and third source and drain portions of the third polycrystalline semiconductor patterns with n+ ions after forming the second and third gate electrodes and the first storage electrode; forming an interlayer insulating film on the first to third gate electrodes and the first storage electrode; forming a contact hole of the interlayer insulating film exposing each of the first source and drain portions, the second source and drain portions, the third source portion, and one of the third drain portion, the fourth polycrystalline semiconductor pattern and the storage pattern; forming source and drain electrodes in each of the n-type, p-type and switching regions, a second storage electrode in the storage region, and a data line connected to the source electrode of the switching region, on the interlayer insulating film; and forming a pixel electrode on the drain electrode of the switching region and the second storage electrode, a shield pattern on the source and drain electrodes of the n-type and p-type regions, and a shield line on the data line and the source electrode of the switching region.