Patent ID: 7600202

Claim:
A method, performed by electronic circuitry, for providing a Failures In Time (FIT) rate for a product, the method comprising: receiving a Mean Time To Failure (MTTF) target for the product and a Mean Time To Repair (MTTR) target for the product; establishing the FIT rate based on the MTTF target and the MTTR target; and outputting the FIT rate to a design process for the product, the FIT rate being a number of product failures expected per amount of time of product operation; wherein establishing the FIT rate based on the MTTF target and the MTTR target includes generating an overall product availability target based on the MTTF target and the MTTR target, the overall product availability target indicating a percentage of time that the product is expected to be in operable condition; and wherein establishing the FIT rate based on the MTTF target and the MTTR target further includes: identifying a number of product subsystems of the product, and formulating a generic subsystem availability target based on (i) the overall product availability target and (ii) the identified number of product subsystems, the generic subsystem availability target indicating a percentage of time that a product subsystem is expected to be in operable condition on average.