Patent ID: 8668553

Claim:
A method for manufacturing a semiconductor device, comprising step of: forming a groove in an insulating film, the insulating film being formed over a semiconductor substrate; forming a barrier film and a metal film sequentially over the insulating film after forming the groove; performing a first chemical mechanical polishing (CMP), with a first polishing pad, on the metal film to remove a portion of the metal film in a region other than the groove; and performing a second CMP, with a second polishing pad, on the barrier film and the insulating film to remove a portion of the barrier film in the region other than the groove and an upper portion of the insulating film, wherein: a pore area ratio of a polishing pad is defined as a proportion, represented in percent, of an area of a wafer that does not contact the polishing pad to a total area of the wafer, a polishing surface of the first polishing pad has a first pore area ratio and a polishing surface of the second polishing pad has a second pore area ratio, and the first pore area ratio is larger than the second pore area ratio.