Patent ID: 7910933

Claim:
A structure of a multi-gate thin film transistor (TFT) for an LCD, comprising: a polycrystalline silicon layer formed on a substrate having a horizontal section and a vertical section, wherein the horizontal section includes a source region, and the vertical section is formed sequentially with a first doped region, a first gate channel, a second doped region, a second gate channel, a third doped region, and a drain region, wherein the source region connects with the first doped region and the drain region is disposed at an end of the vertical section; a multi-gate, including a portion of a scanning line and an extension portion in every pixel formed on said substrate, wherein said extension portion has a vertical portion extending from the portion of the scanning line and a horizontal portion extending from an end of the vertical portion toward a source line, and the portion of the scanning line and the horizontal portion intersected with said vertical section of said polycrystalline silicon layer where the first gate channel and the second gate channel are disposed, respectively; and a gate oxide layer formed in between said multi-gate and said polycrystalline silicon layer.