Patent ID: 8120423

Claim:
An amplifying apparatus comprising: a four-input operational amplifier (OP-AMP); wherein said four-input OP-AMP receives a first and a second pair of differential input signals and outputs a pair of differential output signals; wherein each of the first and second pair of differential input signals comprises a first and a second signal; timing circuitry for generating a first and a second non-overlapping clock; an input switched-capacitor (SC) network controlled by the first and second non-overlapping clocks and configured such that the first pair of the differential input signals is amplified by the OP-AMP during a first phase, that the second pair of the differential input signals is amplified by the OP-AMP during the second phase, the first phase non-overlapping and alternating with the second phase; first input reset switch devices coupled between the first signal and the second signal of the first pair of differential input signals and a reference signal, and second input reset switch devices coupled between the first signal and the second signal of the second pair of differential input signals and the reference signal; wherein each of said input reset switches is controlled by a signal selected from the group consisting of a first and a second control signals; and said first and second control signals are non-overlapping.