Patent ID: 8513977

Claim:
A semiconductor device comprising: a first transistor; a second transistor; a third transistor; a capacitor; and a buffer, wherein one of a source and a drain of the second transistor is electrically connected to an input terminal, wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the first transistor and one of a source and a drain of the third transistor at a first node, wherein the other of the source and the drain of the first transistor is electrically connected to one electrode of the capacitor and an input of the buffer at a second node, wherein the other electrode of the capacitor is electrically connected to a reference voltage terminal, wherein an output of the buffer is electrically connected to an output terminal and the other of the source and the drain of the third transistor, and wherein the first node has a lower capacitance than the capacitor.