Patent ID: 7817548

Claim:
An apparatus comprising: groups of storage members having an associated output rate; and a hardware-implemented arbiter circuit including sets of arbitration members linked in multi-stage subordinate-superior relation to arbitrate data transfer from the storage members, where one of the sets of the arbitration members includes first arbitration members to respectively connect to the storage members of one of the groups, each first arbitration member having an associated transfer rate corresponding to a sum of the output rates associated with the storage members of the group to which the first arbitration member connects, where one or more other sets of the arbitration members includes arbitration members that are superior to the first arbitration members and have an associated transfer rate corresponding to a sum of the transfer rates associated with immediately subordinate arbitration members and have information identifying a rank order of a first one of the immediately subordinate arbitration members, having a lowest associated transfer rate among transfer rates of the immediately subordinate arbitration members, and a second one of the immediately subordinate arbitration members, having a lowest associated transfer rates among the transfer rates of immediately subordinate arbitration members, and where the superior arbitration members successively select one of the first immediately subordinate arbitration members or the second immediately subordinate arbitration member having the lowest associated transfer rate, rather than the other one of the first immediately subordinate arbitration members or the second immediately subordinate arbitration member not having the lowest associated transfer rate, based on the information identifying the rank orders.