Patent ID: 8495589

Claim:
An apparatus comprising: at least one processor; a memory coupled to the at least one processor; a program residing in the memory and executed on a plurality of threads executed by the at least one processor, wherein the plurality of threads execute user code within the program and system code external to the program, wherein the system code performs services on behalf of the program; a debugger residing in the memory and executed by the at least one processor, the debugger debugging the program, the debugger comprising: a thread holding mechanism that analyzes the plurality of threads when the debugger halts execution of the program and determines whether any of the plurality of threads are currently executing the system code external to the program, immediately halting each of the plurality of threads that are executing user code within the program, and for each of the plurality of threads that are currently executing the system code external to the program, delaying the halting of the thread by the debugger until at least one condition is satisfied.