Patent ID: 8008689

Claim:
A MIS gate structure type HEMT device comprising: (a) a semiconductor layer including: (a-1) a base layer made of a first Group III nitride and having conductivity of N-type and a specific resistance of 1×10 7 Ωcm or more, or having conductivity of P-type; (a-2) a barrier layer made of a second Group III nitride having a wider band gap than said first Group III nitride; and (a-3) a P-type region having conductivity of P type; (b) a source electrode and a drain electrode, formed on said barrier layer; (c) a gate electrode; and (d) an insulating layer located between said gate electrode and said semiconductor layer, wherein said barrier layer is formed adjacent to said base layer and said insulating layer, said base layer has a two-dimensional electron gas region in a periphery of an interface with said barrier layer, and said P-type region is formed immediately under said insulating layer and penetrates said barrier layer and said two-dimensional electron gas region in a range substantially concealed in said gate electrode when said gate electrode is observed in plane view from a surface side.