Patent ID: 7404020

Claim:
A fibre channel switch element, comprising: a plurality of ports to receive and transmit fibre channel frames: and a fabric controller embedded on a same chip as the plurality of ports to configure and to initialize the fibre channel switch element, to configure the plurality of ports, to monitor the fibre channel switch element, to manage at least a link state machine and a loop state machine and to process name server requests, the embedded fabric controller comprising: a processor module to control a plurality of switch element functions, wherein the processor module includes a core module, a trace module to trace program counters, a first cache to store program instructions and a second cache to enable data transfers; a serializer/de-serializer to convert parallel data to serial data for transmission; and to convert received serial data to parallel data; a device control register (DCR) bus that transfers data between the processor module and a plurality of registers to configure a static dynamic random access memory (SDRAM) controller, an external bus controller and (EBC), an arbitration module, a universal interrupt controller, an Ethernet Controller and a real time clock module; a processor local bus to access an external memory via the EBC; an on-chip peripheral bus to allow communication between the processor module and at least one or more of a universal asynchronous receiver transmitter (UART) module, a general purpose input and output interface (GPIO), the Ethernet controller, a plurality of modules coupled to the processor local bus; a bus that couples a control port of the fibre channel switch element to the processor local bus via a bridge; a processor local bus and the universal interrupt controller interfacing with the DCR bus provides interrupts to the processor module regarding control, status and communication between a plurality of the fibre channel switch element modules.