Patent ID: 7060603

Claim:
A formation method of metal wiring of a semiconductor device comprising: forming a metal wire on a pre metal dielectric (“PMD”) on a semiconductor substrate; patterning and sintering the metal wire; forming an insulating layer on the metal wire and the PMD; forming a via hole in the insulating layer; forming a barrier metal layer made of multiple metal layers on inner wall of the via hole and upper surface of the insulating layer using physical vapor deposition and chemical vapor deposition; filling up inside the via hole by forming a metallic material on the metal layer; and forming a metallic material via by chemical mechanical polishing of the metallic material and the barrier metal layer until the sectional surface of the barrier metal and the surface of the insulating layer are exposed wherein the metal layer comprising aluminum and an upper titanium layer, and wherein the sintering is performed at the temperature of 400–450° C. for 20–50 minutes in an electric furnace is performed for reaction of the aluminum and the upper titanium after the metal wire patterning.