Patent ID: 7284307

Claim:
A method for manufacturing a wiring board to which a semiconductor chip is to be connected, comprising the steps of: forming a first electrode layer having first and second opening portions, forming a dielectric layer formed on the first electrode layer and having third and fourth opening portions, forming a second electrode layer formed on the dielectric layer and having fifth and sixth opening portions, wherein the first electrode layer, the dielectric layer, and the second electrode layer form a capacitor; forming an insulating layer inside a first opening defined by the first, third, and fifth opening portions, and a second opening defined by the second, fourth, and sixth opening portions; using a laser beam having a processing diameter to form first and second via holes extending through the insulating layer formed inside the first and second openings, respectively; and forming first and second via wiring portions in the first and second via holes, respectively, the first via wiring portion being connected to the first electrode layer and extending through the capacitor, and the second via wiring portion being connected to the second electrode layer and extending through the capacitor; wherein a diameter of the first opening portion formed in the first electrode layer is smaller than the processing diameter, and a diameter of the second opening portion formed in the first electrode layer is greater than the processing diameter.