Patent ID: 7768320

Claim:
A process variation tolerant sense amplifier flip-flop circuit, the circuit comprising: a differential subsystem that includes a first path from a first intermediate node to ground, a second path from the first intermediate node to ground, a third path from a second intermediate node to ground, and a fourth path from the second intermediate node to ground; and a control subsystem configured to control the second path to ground via a first N-channel field effect transistor (N-FET) and the third path to ground via a second N-FET, the control subsystem including: a cross-coupled latch that is coupled to the first intermediate node and the second intermediate node and that is configured to produce a differential control signal at a first node and a second node; a first inverter that is coupled to the first node and configured to produce a first delayed and inverted signal; and a second inverter that is coupled to the second node and configured to produce a second delayed and inverted signal, wherein the first delayed and inverted signal and the second delayed and inverted signal are a delayed version of the differential control signal, wherein the second path to ground is enabled based on the second delayed and inverted signal produced by the control subsystem and the third path to ground is enabled based on the first delayed and inverted signal produced by the control subsystem.