Patent ID: 8777343

Claim:
An image processor for processing image data used in printing an image on a print medium using a print head provided with a first chip and a second chip, the first chip including a first nozzle array and a second nozzle array in each of which a plurality of nozzles for ejecting ink are arranged in a first direction, the second chip including a third nozzle array and a fourth nozzle array in each of which a plurality of nozzles for ejecting ink are arranged in the first direction, wherein the first, second, third and fourth nozzle arrays are arranged in order as the first, the second, the third and the fourth in a second direction intersecting the first direction, and an end of the first nozzle array and an end of the third nozzle array are overlapped and an end of the second nozzle array and an end of the fourth nozzle array are overlapped, the image processor comprising: an assigning unit configured to assign image data corresponding to the overlap region to the nozzle arrays of the first chip and the second chip; and a supplying unit configured to supply the image data assigned by the assigning unit to the print head, wherein the assigning unit assigns image data corresponding to a first range of the overlap region, to nozzles of the first nozzle array, the second nozzle array and the third nozzle array, and does not assign the first image data to nozzles of the fourth nozzle array, wherein the assigning unit assigns second image data corresponding to a second range of the overlap region which does not overlap with the first range, to nozzles of the second nozzle array, third nozzle array and the fourth nozzle array, does not assign the second image data to nozzles of the first nozzle array, and wherein the assigning unit assigns third image data, corresponding to non-overlap region which is not the overlap region of the first chip, to nozzles of the first nozzle array and the second nozzle array and assigns the fourth image data, corresponding to non-overlap region which is not the overlap region of the second chip, to nozzles of the third nozzle array and the fourth nozzle array.