Patent ID: 7821484

Claim:
A data driving circuit comprising: a plurality of shift registers for generating first sampling signals in sequence; a plurality of sampling latches arranged as first sampling latches and second sampling latches, the sampling latches being adapted to receive data when the first sampling signals are supplied and the first sampling latches being configured to receive data via the second sampling latches; and a plurality of holding latches controlled by a first source output enable signal and a second source output enable signal, the holding latches being adapted to receive the data stored in the sampling latches, wherein the second sampling latches are configured to supply data to the holding latches via the first sampling latches and wherein a first shift register of the plurality of shift registers is configured to supply the corresponding first sampling signal to a first one of the first sampling latches and a second shift register of the plurality of shift registers is configured to supply the corresponding first sampling signal to a first one of the second sampling latches.