Patent ID: 8427580

Claim:
A method for synchronizing data collected from asynchronously clocked circuitry, the method comprising: providing an apparatus having inputs to accept a first clock signal and a synchronous trigger signal, and a circuit block including a plurality of devices, the plurality of devices synchronously timed to a third clock that is asynchronous from the first clock signal; supplying the first clock signals at a first clock repetition rate, and trigger signals to the apparatus; simultaneously collecting data frames for the plurality of devices at a second clock repetition rate synchronous to the first clock, of device output detection events responsive to the trigger signal, where the second clock repetition rate is greater than the first clock repetition rate; saving high contrast data frames of device output detection events; determining a first device in the circuit block acting as the third clock trigger; recognizing saved data frames with first device output detection events as synchronization frames; and, organizing the saved data frames around the synchronization frames.