Patent ID: 7074669

Claim:
A method of manufacturing a semiconductor integrated circuit device comprising the steps of: (a) forming a second insulating film on a first insulating film; (b) removing said second insulating film partially; (c) forming at least one lower electrode on said first insulating film exposed after said second insulating film is removed partially, said lower electrode having a crown structure and comprising a plurality of conductive films, wherein an outermost film of said lower electrode is a ruthenium (RU) film, and a portion of said lower electrode other than said outermost film is a central film, and said central film has higher selective growth of said ruthenium film than said ruthenium film formed on said second insulating film; (d) forming a dielectric film on a surface of said crown structure and on said second insulating film between crown structures of lower electrodes formed in step (c); and (e) forming an upper electrode on said dielectric film, wherein said step of (b) removing comprises the steps of: (f) forming a third insulating film on said second insulating film; and (g) forming a plurality of holes passing through said second insulating film and said third insulating film to said first insulating film, and said step of (c) forming said lower electrode comprises the steps of: (h) forming said central film on an inner wall of each of said plurality of holes on said third insulating film; (i) removing said central film on said third insulating film; (J) removing said third insulating film; and (k) forming said ruthenium film on said central film, and wherein said step of (h) forming said central film comprises the steps of: forming an amorphous silicon film on said inner wall of each of said plurality of holes and on said third insulating film; and forming a conductive polysilicon film by heat-treating said amorphous silicon film.