Patent ID: 8592264

Claim:
A method to fabricate a field effect transistor, comprising: forming on a surface of a semiconductor a dummy gate structure comprised of a plug; forming a first spacer surrounding the plug, the first spacer being a sacrificial spacer; after forming the first spacer, performing an angled ion implant to implant a dopant species into the surface of the semiconductor adjacent to an outer sidewall of the first spacer to form a source extension region and a drain extension region, where the dopant species extends under the outer sidewall of the first spacer by an amount that is a function of an angle of the angled ion implant and defines an inner edge of the source extension region and an inner edge of the drain extension region, where each inner edge extends partially but not completely beneath the first spacer; performing a laser anneal to activate the source extension region and the drain extension region implant; forming a second spacer surrounding the first spacer after performing the angled ion implant and the laser anneal; removing the first spacer and the plug to form an opening surrounded by the second spacer, where the inner edge of the source extension region and the inner edge of the drain extension region extend in the semiconductor beyond sidewalls of the opening; and depositing a gate dielectric and gate metal into the opening to form a gate stack.