Patent ID: 7371612

Claim:
A method of stacking semiconductor wafers for the segmenting thereof, each of the semiconductor wafers including integrated circuitry, comprising: placing a first semiconductor wafer having a first side including integrated circuitry thereon and a back side on a surface; placing a second semiconductor wafer having a first side including a plurality of integrated circuits thereon, having a back side, and having a notch from the first side having an angled portion extending from the first side and terminating in a perpendicular portion extending to the back side, the notch extending between and substantially perpendicular to a circuitry side and a back side of the second semiconductor wafer; stacking a first semiconductor wafer in a superimposed relationship with the second semiconductor wafer to form a multi-level stack of semiconductor wafers having portions thereof attached to each other; separating the multi-level stack of semiconductor wafers to form at least two semiconductor wafer segment stacks, each multi-level stack of the at least two semiconductor wafer segment stacks comprising a first semiconductor wafer segment having a side including integrated circuitry and a back side and at least one second semiconductor wafer segment having a side including integrated circuitry and a back side; and stacking the at least two semiconductor wafer segments in at least a partially superimposed relationship having bond pads on the first semiconductor wafer segment of at least one of the at least two semiconductor wafer segment stacks on a side adjacent the at least one second semiconductor wafer segment of the at least one semiconductor wafer segment stack at a periphery thereof.