Patent ID: 8003897

Claim:
A printed wiring board comprising: a wiring substrate having a conductor circuit; a build-up multilayer structure formed over the wiring substrate and having an outermost conductor circuit and an outermost insulative resin layer; a plurality of viahole conductors formed through the outermost insulative resin layer; a solder resist layer formed over the outermost conductor circuit and outermost insulative resin layer; a plurality of first conductor pads formed on the outermost conductor circuit, respectively; a plurality of second conductor pads formed in inner spaces of the viahole conductors, respectively; and a plurality of solder bumps including a plurality of first solder bumps and a plurality of second solder bumps, the first solder bumps being formed on the first conductor pads, respectively, the second solder bumps being formed on the second conductor pads and extending to the inner spaces of the viahole conductors, respectively, wherein the first solder bumps are formed through a plurality of first openings formed through the solder resist layer, the second solder bumps are formed through a plurality of second openings formed through the solder resist layer and aligned with the inner spaces of the viahole conductors, the solder bumps are positioned with a pitch of about 200 μm or less, the solder bumps have a height H from a surface of the solder resist layer, the first and second openings have an opening diameter D, and a ratio H/D is about 0.55 to about 1.0.