Patent ID: 8638603

Claim:
A data storage system comprising: a nonvolatile memory device including a memory cell array; and a memory controller configured to control the nonvolatile memory device, wherein the memory cell array includes a first region configured for storing up to N−1-bit data (N being an integer greater than 1) per memory cell and a second region configured for storing N-bit data per memory cell, the first region including N memory blocks; wherein the memory controller is configured to control the nonvolatile memory device to perform a buffer program operation in which N-bit data to be stored in the second region is divisionally stored in the N memory blocks of the first region, and a main program operation in which the N-bit data stored in the first region is stored in the second region; and wherein the memory controller is configured to control the nonvolatile memory device to divisionally store, during the buffer program operation, the N-bit data at a word line of each of the N memory blocks of the first region disposed at the same relative location, with respect to each block, as a word line of the second region in which the N-bit data is to be stored.