Patent ID: 7861097

Claim:
A tamper-resistant electronic circuit for implementation in a device, said tamper-resistant electronic circuit comprising: a storage device for tamper-resistantly storing, during manufacture of the tamper-resistant electronic circuit, a random secret not accessible over any external circuit interface to the tamper-resistant electronic circuit and unknown after being stored in the storage device; trigger data generating circuitry for, during configuration of the tamper-resistant electronic circuit, generating trigger data by cryptographically combining the random secret and device-specific security data that is different from the random secret and outputting the trigger data outside of the tamper-resistant electronic circuit; a receiver for, during operation of the configured tamper-resistant electronic circuit by a user, receiving external to the tamper-resistant electronic circuit from the user via an external circuit interface the trigger data; a cryptographic processing engine, in response to the externally received trigger data from the user, for performing cryptographic processing at least partly in response to said stored secret and the externally received trigger data from the user to generate a temporarily available instance of the device-specific security data internally confined within said electronic circuit during usage of said device and such that the temporarily available instance of the device-specific security data is only available when the externally received trigger data is received; and electronic circuitry, connected to the cryptographic processing engine and configured to perform a security-related operation in response to said internally-confined, temporarily available instance of device-specific security data.