Patent ID: 7977186

Claim:
A method for reducing program disturb in a non-volatile storage system, comprising: implanting a shallow implantation of ions along a length of an area of a substrate; implanting a deep implantation of ions in a first interval along the length of the area of the substrate but not in a second interval along the length of the area of the substrate, the deep implantation of ions is implanted deeper in the substrate than the shallow implantation of ions; and forming a NAND string along the length of the area of the substrate, where the shallow implantation of ions extends along a length of the NAND string, from one end of the NAND string to another end of the NAND string, in a bit line direction of the NAND string, a first portion of the NAND string is formed directly over the first interval but not the second interval, a second portion of the NAND string is formed directly over the second interval but not the first interval, the first portion of the NAND string is adjacent to the second portion of the NAND string in the bit line direction, and the first interval is adjacent to the second interval in the bit line direction.