Patent ID: 8289766

Claim:
A nonvolatile semiconductor memory device, comprising a memory unit and a control unit, the memory unit including: a charge storage film; and a memory cell transistor provided for each of a plurality of storage regions configured to store charge in the charge storage film, a threshold of the memory cell transistor fluctuating due to information set in the storage region, the control unit being configured to: set the memory cell transistors to an erase threshold by setting erase information in the plurality of storage regions; subsequently set the memory cell transistors provided in the storage regions to thresholds corresponding to information having n (n being an integer not less than 2) values by programming the information having the n values to at least one of the storage regions in which the erase information is set; and control information of at least one storage region before being programmed adjacent to the storage regions programmed with the information to have a value providing a threshold of the memory cell transistor nearer than the erase threshold to the thresholds corresponding to the information having the n values in the state of the memory cell transistors provided in the storage regions being set to the thresholds corresponding to the information having the n values.