Patent ID: 7190216

Claim:
A demodulation circuit comprising: sampling means for sampling a modulated signal; signal synthesis means for synthesizing and holding the signals sampled by the sampling means; polarity adjustment means for matching polarities of the signals synthesized by the signal synthesis means, with each other; and demodulation control means for driving the sampling means to sample the modulated signal at a frequency of the modulated signal multiplied by “1/(m+0.25)” or “1/(m+0.75)” (m: 0 or natural number) and also driving the signal synthesis means to synthesize and hold the signals having phase difference “π” from each other to allow a demodulated signal to be generated by the signal synthesis means, wherein the polarity adjustment means supplies the modulated signal having an inverted polarity to the sampling means, thereby matching polarities of the signals synthesized by the signal synthesis means.