Patent ID: 8329522

Claim:
A method for fabricating a semiconductor device, the method comprising: forming a first insulation layer over a substrate; forming first to third conductive members which extend through the first insulation layer and are spaced apart from one another in a first direction; forming a first photoresist pattern and a second photoresist pattern which overlap the first and third conductive members and extend in a direction substantially perpendicular to the first direction; forming an insulation layer for a spacer over a structure including the first photoresist pattern and the second photoresist pattern; forming a plurality of spacers on sidewalls of the first photoresist pattern and the second photoresist pattern by anisotropically etching the insulation layer, and forming a first opening through which the second conductive member is exposed; and forming second openings, through which the first and third conductive members are exposed, by removing the first photoresist pattern and the second photoresist pattern.