Patent ID: 8067971

Claim:
A latch circuit for retaining and transmitting an input data value, said latch circuit comprising: a primary input for receiving a data value; an output for outputting said data value; a data transmission path comprising a data transmitting device for transmitting said data value from said primary input to said output; a further device; and a multiplexer, said multiplexer being configured to connect either: said data transmitting device to said further device and form a feedback loop for retaining said data value; or to connect a secondary input to said further device and form a secondary data transmission path from said secondary input through said further device and said transmitting device to said output, wherein said feedback loop comprises said multiplexer, said data transmitting device and said further device, said further device configured to turn on in response to assertion of an activating signal and to turn off in response to no assertion of said activating signal, said feedback loop not retaining said data value when said further device is turned off.