Patent ID: RE39697

Claim:
A method for making a nonvolatile, floating-gate memory with logic transistors in a face of a semiconductor body having a first conductivity type , comprising the steps of: forming first and second opposite-conductivity-type diffusion regions having a first depth at a first time in said semiconductor body, said first and second opposite-conductivity-type diffusion regions doped to have primarily a second conductivity-type opposite said first conductivity-type; forming first and second same-conductivity-type diffusion regions having a second depth at a second time in said semiconductor body, said first same-conductivity-type diffusion region encased in said first opposite-conductivity-type diffusion region, said second same-conductivity-type diffusion region separate from said first and second opposite-conductivity-type diffusion regions, said first and second same-conductivity-type diffusion regions doped to have primarily said first conductivity-type; forming at least one floating-gate memory cell in and on said first same-conductivity-type diffusion region; forming at least one high-voltage logic transistor in said second opposite-conductivity-type diffusion region; and forming at least one low-voltage logic transistor in said second same-conductivity-type diffusion region.