Patent ID: 7365668

Claim:
A continuous-time delta-sigma analog-digital converter ( 10 ) for the conversion of an analog input signal (Vin) into a digital output signal (Vout), comprising: an analog filter ( 20 ), which filters the analog input signal and has at least one externally circuited (R, C) operational amplifier (OPAMP 1 , OPAMP 2 , OPAMP 3 ) for the formation of an integration stage ( 22 - 1 , 22 - 2 , 22 - 3 ), a clock-driven quantiser ( 30 ), which quantises the filtered analog signal outputted by the analog filter ( 20 ) for the generation of the digital output signal, and a feedback arrangement ( 40 ) with at least one digital-analog converter (DAC 1 , DAC 2 , DAC 3 ), which supplies to the analog filter ( 20 ) at least one analog feedback signal on the basis of the digital output signal (Vout), characterised in that the operational amplifier (OPAMP 1 , OPAMP 2 , OPAMP 3 ) has a first amplifier path (gm 3 ) and parallel to this a second amplifier path (gm 2 , gm 5 ), wherein the transit frequency of the second amplifier path (gm 2 , gm 5 ) is lower than the transit frequency of the first amplifier path (gm 3 ).