Patent ID: 7936350

Claim:
A display control circuit for controlling a display of a display device, the display control circuit comprising: a data transfer circuit that stores data which is sequentially inputted thereto and transmits the stored data to the display device in accordance with an inputted clock signal; a clock mask circuit that transmits the inputted clock signal to the display device as a display clock signal while data to be transmitted is stored in the data transfer circuit, and transmits an edge-masked and fixed level signal to the display device as the display clock signal while no data to be transmitted is stored in the data transfer circuit; a clock counter circuit that performs a count operation of counting a number of clocks of the inputted clock signal while data to be transmitted is stored in the data transfer circuit, and stops the count operation while no data to be transmitted is stored in the data transfer circuit; and a horizontal synchronizing signal generating circuit that generates a horizontal synchronizing signal having a first level when a counter value of the clock counter circuit is in a predetermined range and a second level when the counter value is out of the predetermined range, the first level being different from the second level, and transmits the generated horizontal synchronizing signal to the display device.