Patent ID: 7321145

Claim:
A nonvolatile memory, comprising: a substrate region including source and drain regions, wherein a bulk part of the substrate region has a first band structure, and a measurement part of the substrate region has a second band structure different from the first band structure; a charge storage structure; one or more dielectric structures at least partly between the charge storage structure and the substrate region and at least partly between the charge storage structure and a source of gate voltage; a gate providing the gate voltage; and logic applying a first bias arrangement to determine a charge storage state of the charge storage structure and measuring current flowing between the substrate region and at least one of the source region or the drain region to determine the charge storage state of the charge storage structure, wherein at least part of the current flows through the measurement part of the substrate region, wherein said logic further performs: applying a second bias arrangement to adjust the charge storage state by increasing a net positive charge in the charge storage structure; and applying a third bias arrangement to adjust the charge storage state by increasing a net negative charge in the charge storage structure.