Patent ID: 8486770

Claim:
A method of forming a CMOS FinFET device, comprising: providing a substrate including first and second regions; forming a fin structure including first and second fins over the substrate, the first fin being formed in the first region and the second fin being formed in the second region; depositing an insulation material over the fin structure such that the first fin is interposed between the insulation material in the first region and the second fin is interposed between the insulation material in the second region; etching back the first fin interposed between the insulation material in the first region and the second fin interposed between the insulation material in the second region; epitaxially (epi) growing a III-V semiconductor material over the etched-back first fin and between the insulation material in the first region; epi growing a germanium (Ge) material over the etched-back second fin and between the insulation material in the second region; and etching back the insulation material thereby defining the a first height of the first fin and a second height of the second fin, the first height being measured from a top surface of the insulation material to a top surface of the III-V semiconductor material of the first fin and the second height being measured from the top surface of the insulation material to a top surface of the Ge material of the second fin.