Patent ID: 7057287

Claim:
A dual damascene interconnect structure, comprising: a patterned multilayer of dielectrics on a substrate, comprising: a cap layer; a first non-porous via level low-k dielectric layer having thereon metal via conductors with a bottom portion and sidewalls; an etch stop layer; a first porous low-k line level dielectric layer having thereon metal line conductors with a bottom portion and sidewalls; a polish stop layer over said first porous low-k dielectric; a second thin non-porous low-k dielectric layer for coating and planarizing the line and via sidewalls; and a liner material between said metal via and line conductors and said dielectric layers; wherein the second thin non-porous low-k dielectric layer has a composition that is covalently bonded with the first non-porous via level low-k dielectric layer and the first porous low-k line level dielectric layer for enhanced adhesion; and wherein said second thin non-porous low-k dielectric layer is selected from the group consisting of: HOSP™, HOSP BESt™, Ensemble™ Etch Stop, Ensemble™ Hard Mask, AP 6000™, organo silsesquioxanes, hydrido-organo silsesquioxanes, siloxanes, silicon oxides, SILK™, GX-3™ and a combination thereof.