Patent ID: 7890560

Claim:
A random number generating circuit, comprising: an input that receives a first digital random number signal generated at a first generating rate; a continuous signal processing unit to process the first digital random number signal so that any of its high and low levels do not repeat more than or equal to a predetermined number of times; a high-rate signal introducing unit to introduce a signal component corresponding to a second generating rate that is twice as high as the first generating rate into the first digital random number signal; a smoothing unit to control a frequency of occurrence for the high and low levels in a data sequence of the first digital random number signal; and an output to thereby output the second digital random number signal having a second generating rate, the second digital random number signal generated by outputs from the continuous signal processing unit, the high-rate signal introducing unit, and the smoothing unit, wherein the high-rate signal introducing unit introduces the signal component corresponding to the second generating rate by detecting a rising and falling edge of the levels in the first digital random number signal generated at the first generating rate by using a clock having a frequency that is twice as high as a frequency of a clock used to generate the first digital random number signal at the first generating rate.