Patent ID: 7651950

Claim:
A method for forming a fine pattern of a semiconductor device, comprising: defining a cell region and a peripheral circuit region of a semiconductor substrate: forming a gate material layer over the semiconductor substrate: forming a sacrificial pattern over the gate material layer in the cell region: forming a spacer on sidewalls of the sacrificial pattern, wherein the spacer is formed by: forming a spacer pattern including two adjacent line-type spacer patterns which are connected with each other, forming a first photoresist pattern that exposes both end portions of a line pattern formed by the spacer over the semiconductor substrate, and etching the exposed spacer using the first photoresist pattern as a mask to separate the connected spacer patterns, removing the sacrificial pattern; forming a mask pattern that defines a peripheral circuit pattern over the gate material layer in the peripheral circuit region; and patterning the gate material layer of the cell region and the peripheral circuit region with the spacer pattern and a second photoresist pattern to obtain a cell pattern and a peripheral circuit pattern.