Patent ID: 8138525

Claim:
An integrated circuit, comprising: a gate electrode level region including at least three linear-shaped conductive structures formed to extend lengthwise in a first direction, each of the at least three linear-shaped conductive structures having a lengthwise centerline, the at least three linear-shaped conductive structures positioned according to an equal pitch as measured in a second direction perpendicular to the first direction, such that a distance as measured in the second direction between lengthwise centerlines of different ones of the at least three linear-shaped conductive structures is an integer multiple of the equal pitch, the at least three linear-shaped conductive structures including— a first linear-shaped conductive structure including a gate portion that forms a gate electrode of a first transistor, a second linear-shaped conductive structure including a gate portion that forms a gate electrode of a second transistor, and a third linear-shaped conductive structure including a gate portion that forms a gate electrode of a third transistor, wherein the first, second, and third linear-shaped conductive structures have different lengths as measured in the first direction.