Patent ID: 7595234

Claim:
A method of fabricating a metal oxide semiconductor (MOS) transistor, comprising: providing a substrate; forming a gate structure on the substrate; forming an offset spacer on respective sidewalls of the gate structure; performing a first ion implantation process to form a lightly doped drain (LDD) in the substrate beside the gate structure; forming a spacer on respective sidewalls of the offset spacer; performing a second ion implantation process to form a source and a drain in the substrate beside the spacer; forming a metal silicide layer on the surface of the source and the drain; forming an oxide layer only on the surface of the metal silicide layer, wherein the oxide layer fully covers the surface of the metal silicide layer; removing the spacer after the oxide layer is formed; and forming an etching stop layer over the substrate to cover the oxide layer, the offset spacer and the gate structure.