Patent ID: 7089517

Claim:
A method of validating design of complex integrated circuits (IC) where a design process is carried out under electronic design automation (EDA) environment, comprising the following steps of: building prototype silicon based on IC design data produced under the EDA environment; preparing event based test vectors based on the IC design data produced in the EDA environment; applying the event based test vectors derived from the IC design data to the prototype silicon by an event based test system and evaluating the response output of the prototype silicon, where the event based test vectors are test vectors in an event format in which an event is any change in a signal which is described by its timing which represents a time difference between two adjacent events and the event based test system is a test system for testing an IC by utilizing the event based test vectors; modifying the event based test vectors by the event based test system to acquire desired response outputs from the silicon prototype; and feedbacking the modified event based test vectors to the EDA environment to modify the IC design data, thereby correcting design errors in the IC design data.