Patent ID: 7937757

Claim:
A trusted computer system comprising: at least one processor having a multi-domain architecture defining a plurality of processor domains, each processor domain limited to a corresponding set of processor privileges associated therewith; at least one data storage unit; at least one memory unit; a secure operating system configured to run on the trusted computer system, the secure operating system comprising a plurality of security policies and a plurality of security domains, the security domains to host a plurality of processes, each process having a security level associated therewith, and the secure operating system causing the trusted computer system to enforce the security policies in the trusted computer system to prevent a first process from accessing a second process having a different security level, wherein the processes hosted in each security domain are mapped into a processor domain, and the at least one processor having the multi-domain architecture enforces the resource privileges of each processor domain to prevent processes mapped into a first processor domain from modifying processes mapped into a second less privileged processor domain, and wherein the trusted computer system meets or exceeds the minimal security features and assurance requirements to meet a TCSEC B3 rating or Common Criteria EAL-5 rating; and a covert channel mechanism to prevent a first process at a first security level from determining the existence or status of a second process at a second security level by limiting the number and capacity of covert storage channels.