Patent ID: 8873298

Claim:
A nonvolatile semiconductor storage device comprising: a memory cell array including a plurality of memory cells each of which stores data by a plurality of different threshold voltages in a nonvolatile manner; and a control circuit that repeatedly performs a write loop including a program operation to cause the threshold voltage of the memory cell to transition and a verify operation to check whether the threshold voltage of the memory cell in the program operation transitions to a first value in data write performed to the memory cell, the verify operation including a preverify step to check whether the threshold voltage of the memory cell transitions to a preverify voltage, which is set to a value lower than that of a real verify voltage indicating a lower limit of a first threshold voltage of the memory cell, and a real verify step to check whether the threshold voltage of the memory cell transitions to the real verify voltage, the write loop including one or at least two verify operations corresponding to pieces of the data, the control circuit performing the write loop in which the preverify step of the verify operation corresponding to a first data is omitted after obtaining a first condition.