Patent ID: 7725688

Claim:
A graphics processing unit comprising: a processing pipeline having multiple sections, wherein each section has multiple stages, and each stage is configured in accordance with various states; a first memory unit for receiving data to be processed in the processing pipeline along with a tag that specifies a configuration of the processing pipeline associated with the data and a state command; and a state pipeline having multiple sections, wherein each section of the state pipeline has multiple stages, the state pipeline further including: a plurality of state decoders, wherein each state decoder corresponds to a different one of the sections of the state pipeline and is configured to receive the state command and to decode the state command into states that specify a configuration of the stages of the corresponding section of the processing pipeline, a plurality of second memory units, wherein each second memory unit corresponds to a different one of the sections of the state pipeline and is configured to store sets of states, including states specified by the state command, wherein a set of states is related to the tag and the data being processed in the processing pipeline, and a plurality of selectors, wherein each selector corresponds to a different one of the sections of the state pipeline and is configured to use the tag to select one of the sets of states that is stored in the corresponding second memory unit and transmit the selected set of states to the stages of the corresponding section of the state pipeline.