Patent ID: 8749267

Claim:
A device comprising: a first controlled chip; and a control chip operable to control the first controlled chip, the first controlled chip being stacked on the control chip, the first controlled chip comprising: a first output circuit, a first replica output circuit having the same configuration as the first output circuit, a first ZQ terminal electrically connected to the first replica output circuit, a first through electrode connected to the first ZQ terminal, the first through electrode extending through the first controlled chip, and a first control circuit operable to set an impedance of the first replica output circuit, the control chip comprising: a second ZQ terminal connected to the first through electrode, a comparator circuit operable to compare a voltage of the second ZQ terminal with a reference voltage, a second control circuit operable to perform a process according to a comparison result from the comparator circuit, and a DQ input/output circuit operable to receive data from and transmit data to the first output circuit, wherein the first control circuit and the second control circuit receive a common input signal to operate, adjust the impedance of the first replica output circuit according to the comparison result in a state in which an external resistance element is connected to the second ZQ terminal, and set the adjusted impedance to the first output circuit.