Patent ID: 8294190

Claim:
A semiconductor device comprising: a semiconductor substrate, an impurity diffusion layer being formed at a top layer portion of the semiconductor substrate; a tunnel insulation film provided on a surface of the semiconductor substrate; and at least one charge storage layer provided on the tunnel insulation film, a charge supplied from the semiconductor substrate via the tunnel insulation film being accumulated in the charge storage layer, wherein: the tunnel insulation film comprises a first charge-trap region covering at least part of the impurity diffusion layer and a second charge-trap region covered by the charge storage layer, charge trap states at which an electron potential energy is higher than a Fermi level of the semiconductor substrate are formed in the first and second charge-trap regions, the first charge-trap region is located closer to the impurity diffusion layer than the second charge-trap region, and a distance between the first charge-trap region and the surface of the semiconductor substrate is different from a distance between the second charge-trap region and the surface of the semiconductor substrate.