Patent ID: 6987325

Claim:
A semiconductor device assembly, comprising: a first semiconductor device including a surface with a plurality of bond pads located adjacent to at least three peripheral edges of the surface; a rerouting element positioned over the first semiconductor device, the rerouting element comprising: a base substrate; a plurality of conductive vias positioned adjacent at least three peripheral edges of the base substrate, each conductive via of the plurality of conductive vias being located so as to align with a corresponding, peripherally located bond pad of the first semiconductor device upon assembly of the rerouting element with the first semiconductor device; a plurality of conductive traces; and a plurality of rerouted bond pads located adjacent to another, single edge or two adjacent peripheral edges of the base substrate, each conductive trace of the plurality of conductive traces extending from a corresponding conductive via of the plurality of conductive vias toward the another, single peripheral edge or the two adjacent peripheral edges of the base substrate to a corresponding rerouted bond pad of the plurality of rerouted bond pads; and a second semiconductor device positioned over a portion of the rerouting element, each of the plurality of rerouted bond pads being exposed beyond a periphery of the rerouting element.