Patent ID: 8263463

Claim:
A method of making a split gate nonvolatile memory cell on a semiconductor layer, comprising: forming a gate dielectric over the semiconductor layer; depositing a first layer of polysilicon gate material over the gate dielectric; etching the first layer of polysilicon gate material to remove a portion of the first layer of polysilicon gate material over a first portion of the semiconductor layer and to leave a select gate portion having a sidewall adjacent to the first portion; applying a treatment over the semiconductor layer to reduce a relative oxide growth rate of the sidewall to the first portion, wherein the applying the treatment is performed prior to the step of etching; growing oxide on the sidewall to form a first oxide on the sidewall and on the first portion to form a second oxide on the first portion after the applying the treatment; forming a charge storage layer over the first oxide and along the second oxide; and forming a control gate over the second oxide and adjacent to the sidewall.