Patent ID: 8745296

Claim:
An apparatus comprising: circuitry to at least one of: convert, at least in part, at least one serial storage protocol compatible frame into at least one packet that is compatible, at least in part, with a multi-lane input/output (I/O) protocol, the at least one packet to be transmitted via a physical layer that is compatible, at least in part, with the multi-lane I/O protocol, the at least one packet comprising frame information structure (FIS) information of the at least one frame; and convert, at least in part, the at least one packet into the at least one frame; wherein: the at least one frame is compatible, at least in part, with serial advanced technology attachment (SATA) protocol; the at least one packet is compatible, at least in part, with a peripheral component interconnect express (PCIe) protocol; and the circuitry is to execute at least one conversion process to convert the at least one frame into the at least one packet, the at least one conversion process being executed as part of a protocol stack that includes a SATA transport layer and a PCIe transaction layer.