Patent ID: 8088665

Claim:
A method of forming a semiconductor device comprising: providing a substrate having a source region, a drain region, a gate electrode, and spacers on the sidewalls of gate electrode; selectively depositing an amorphous semiconductor layer onto each of the source and drain regions by alternatingly exposing the substrate to a first precursor and a second precursor; comprising: exposing the substrate to the first precursor to deposit the amorphous semiconductor layer on the source region and drain region, and deposit a plurality of amorphous semiconductor deposits on the spacers; and exposing the substrate to the second precursor to remove the plurality of amorphous semiconductor deposits formed on the spacers; depositing a metal layer onto the amorphous semiconductor layer on each of the source and drain regions; and annealing the substrate so that the metal layer reacts with the amorphous semiconductor layer on each of the source and drain regions to form a low resistance contact layer on each of the source and drain regions.