Patent ID: 7198998

Claim:
A method of manufacturing a bipolar-complementary metal oxide semiconductor (BiCMOS), comprising: defining a CMOS area and a bipolar transistor area on a substrate; forming a gate oxide layer on the substrate; forming a gate conductive layer on the gate oxide layer; simultaneously forming a gate in the CMOS area and a conductive layer pattern defining an opening which opens an active region in the bipolar transistor area by patterning the gate conductive layer; simultaneously forming gate spacers on side walls of the gate and spacers on inner walls of the opening; forming a base conductive layer on a resultant structure having the spacers; forming an insulating layer on the base conductive layer; forming an emitter window by etching the insulating layer; forming an emitter conductive layer above the emitter window; forming an emitter by patterning the emitter conductive layer and the insulating layer; forming a base by patterning the base conductive layer; and forming source/drain regions at opposite sides of the gate.