Patent ID: 7117280

Claim:
A system comprising: a housing; a mainboard disposed within the housing to which memory and a first processor are connected, said mainboard providing a first network interface operatively coupled to the first processor having a first network port and a first network address; a first peripheral device disposed within the housing; a second network interface operatively coupled to the mainboard, providing a second network port and a second network address, the second network interface linked in communication with the first peripheral device; and a communications link between the first and second network interfaces substantially disposed within the housing, the communications link using packetized messages based on a network transmission protocol to provide communication between the first processor and the first peripheral device, wherein the first and second network interfaces are both coupled to insert data received from the processor and the first peripheral device, respectively, into the packetized messages prior to transmitting the data onto the communications link and to extract the data from the packetized messages received from the communications link prior to providing the data to the processor and the first peripheral device, respectively.