Patent ID: 8312230

Claim:
A computer-implemented method of dynamically controlling memory affinity of a shared memory logical partition, the method comprising: determining at least one home node assignment for a shared memory logical partition of a plurality of shared memory logical partitions in a shared memory partition data processing system, the plurality of shared memory logical partitions of the shared memory partition data processing system sharing availability of a defined amount of memory in a shared pool of physical memory absent concurrent access to any physical page of the physical memory, the shared memory logical partition running on a plurality of nodes of the shared memory partition data processing system, with each assigned home node being one node of the plurality of nodes; determining a desired physical page level per node for the shared memory logical partition; allowing the shared memory partition to run and using the at least one home node assignment and its desired physical page levels for the plurality of nodes in the dispatching of tasks to physical processors in the plurality of nodes and in hypervisor page memory management to dynamically control memory affinity of the shared memory logical partition in the shared memory partition data processing system; and further comprising, after allowing the shared memory logical partition to run for a period of time, re-determining the at least one home node assignment for the shared memory logical partition, and re-determining the desired physical page level per node for the shared memory logical partition running on the plurality of nodes wherein the re-determining of the at least one home node assignment employs actual physical processor utilization and memory utilization of the shared memory logical partition as input, and the re-determining of the desired physical page levels is based, in part, on current actual shared memory partition page levels for the shared memory logical partition across the plurality of nodes, and wherein the method further comprises employing the re-determined at least one home node assignment and the re-determined desired physical page levels in dispatching of tasks to physical processors, and in hypervisor page memory management within the shared memory partition data processing system.