Patent ID: 7411829

Claim:
A method for programming a single-poly pFET-based nonvolatile memory cell, comprising: providing a single-poly pFET-based non-volatile memory cell having a single-poly pFET including a source, a drain and a floating gate; applying a reverse-bias voltage across a p-n junction formed between the drain and an n-type semiconductor region within which the drain is formed, said reverse-bias voltage sufficient to generate electrons by band-to-band tunneling (BTBT); injecting electrons generated by BTBT onto the floating gate; comparing a source current of said single-poly pFET to a reference current; upon the source current becoming greater than the reference current, biasing the single-poly pFET to induce impact-ionized hot-electron injection (IHEI); and injecting electrons generated by IHEI onto the floating gate.