Patent ID: 8900887

Claim:
A method for etching a polysilicon gate, the polysilicon gate comprising an undoped polysilicon portion and a doped polysilicon portion, the doped polysilicon portion being situated on the undoped polysilicon portion, the method comprising: obtaining a thickness of the undoped polysilicon portion and a thickness of the doped polysilicon portion by using an optical linewidth measurement device; and etching the undoped polysilicon portion and the doped polysilicon portion by using two respective steps with different parameters, respective etching time for the undoped polysilicon portion and the doped polysilicon portion of every wafer being adjusted in real time by using an advanced process control system, wherein obtaining a thickness of the undoped polysilicon portion and a thickness of the doped polysilicon portion includes: measuring a total thickness of the polysilicon gate and a thickness of the doped polysilicon portion in a step of measuring a linewidth of the polysilicon gate by using an optical linewidth measurement device; and obtaining a thickness of the undoped polysilicon portion by subtracting the thickness of the doped polysilicon portion from the total thickness of the polysilicon gate.