Patent ID: 8009173

Claim:
A video processor, comprising: a housing, the housing including: first and second video connectors for receiving video signals from a first computer and a second computer, respectively, both the first and second computers being external to the housing; a first information connector for receiving informational signals representing status or configuration information from a first processor in the first computer but other than a main processor of the first computer; a second information connector for receiving informational signals representing status or configuration information from a second processor in the second computer but other than a main processor of the second computer; and an IP-based communications controller for transmitting via a communications port first signals representing at least a portion of the video signals received from the first and second computers across the first and second video connectors and second signals representing at least a portion of the informational signals received from the first and second computers across the first information connector and the second information connector, wherein the IP-based communications controller comprises priority determination logic for determining that the first signals take priority over the second signals when the second signals indicate normal operation of the first and second computers.