Patent ID: 8901651

Claim:
A power semiconductor device having an active cell region, a diode region formed outside the active cell region and a termination region formed outside the diode region, the power semiconductor device comprising: a semiconductor layer of a first conductivity type and a plurality of columns of a second conductivity type, formed in the active cell region, the diode region and the termination region, the plurality of second conductivity type columns spaced apart from each other to have a predetermined depth on the first conductivity type semiconductor; a first well region of second conductivity type, formed in the diode region to have a predetermined depth on the first conductivity type semiconductor layer and the plurality of second conductivity type columns; a second well region of second conductivity type, formed at a side adjacent to the active cell region to have a predetermined depth on the second conductivity type first well region; and a third well region of second conductivity type, formed to have a predetermined depth on locations of the second conductivity type columns in the diode region, the locations corresponding to the second conductivity type columns adjacent to the termination region, wherein the second conductivity type first well region has an impurity concentration lower than the second conductivity type second well region and higher than the second conductivity type third well region.