Patent ID: 7339415

Claim:
A linear SC circuit arrangement using integrated deep submicron technology, the circuit arrangement comprising: at least one switched capacitor circuit including an input, an output, at least one switchable capacitor and at least one first transistor, wherein the input is operable to receive an input signal; a control circuit operable to actuate the at least one first transistor; and an output stage connected to the output of the at least one switched capacitor circuit, the output stage comprising at least one second transistor; wherein the at least one first transistor is at least one thick oxide transistor and the at least one first transistor has a higher withstand voltage than the at least one second transistor; the at least one first transistor comprises a plurality of first transistors; and the plurality of first transistors comprises at least one transistor arranged between the input of the at least one switched capacitor circuit and a first electrode of the at least one switchable capacitor, wherein the plurality of first transistors further comprise at least one additional transistor arranged between a second electrode of the switchable capacitor and the output of the at least one switched capacitor circuit, and wherein the at least one transistor and the at least one additional transistor are each operable to be actuated by a clock signal clocked in antiphase.