Patent ID: 6919244

Claim:
A method of making a semiconductor device, the method comprising: providing a semiconductor substrate having a patterned interconnect layer formed thereon; depositing a first dielectric material over the patterned interconnect layer; patterning the first dielectric material to form a first opening and a second opening in the first dielectric material; depositing a first electrode material on the first dielectric material and in the first and second openings; depositing a second dielectric material on the first electrode material; depositing a second electrode material on the second dielectric material; depositing a third dielectric material on the second electrode material; depositing a third electrode material on the third dielectric material; patterning the third electrode material to form a top electrode of a first capacitor; patterning the third dielectric material and the second electrode material to form a middle electrode of the first capacitor and a top electrode of a second capacitor; and patterning the second dielectric material and the first electrode material to form a bottom electrode of the first capacitor and a bottom electrode of the second capacitor.