Patent ID: 8099271

Claim:
An apparatus, comprising: design instrumentation circuitry embedded within an electronic system, to assist a debugger system in debugging the electronic system, the design instrumentation circuitry embedded within the electronic system specified by a modified hardware description language (HDL) description of the electronic system, the modified HDL description including an original HDL description of the electronic system with a HDL description of the design instrumentation circuitry embedded therein, the design instrumentation circuitry comprising: one or more symbolic probe circuits comprising combinatorial encoding logic to couple a signal of the electronic system with a memory block to store symbolically encoded signal values upon predetermined events; one or more trigger registers coupled to one or more trigger detection signals, the one or more trigger detection signals corresponding to control flow paths in the electronic system; and one or more trigger processing units, coupled to one or more clock signals of the electronic system, each trigger processing unit comprising one or more inputs and one or more outputs, a first one or more inputs coupled to a first one or more trigger registers to provide trigger detection signals to the trigger processing unit, and a first one or more outputs coupled to a first one or more symbolic probe circuits to control the storage of one or more symbolically encoded signal values, wherein the trigger processing units trigger sampling of symbolically encoded signal values upon detecting trigger detection signals by hardware to monitor the electronic system at the normal non-debugging operating speed of the electronic system during debugging operation.