Patent ID: 8735205

Claim:
A method of fabricating a microelectronic unit, comprising: providing a semiconductor chip having a front surface and a rear surface remote from the front surface, a microelectronic device including an active semiconductor region in a region of semiconductor material below the front surface, a plurality of conductive pads each having a top surface exposed at the front surface and having a bottom surface remote from the top surface, and a first opening extending from the rear surface towards the front surface, the first opening having an interior surface and a first layer formed on the surface; removing semiconductor material through an opening in the first layer to form at least one second opening extending from the first opening towards the bottom surface of a respective one of the pads; forming a second dielectric layer at least lining the second opening; removing at least a portion of a third dielectric layer contacting the bottom surface of the pad; and forming a conductive via, a conductive interconnect, and a contact, the conductive via in registration with and in contact with the conductive pad and extending within the second opening, the contact exposed at an exterior of the microelectronic unit, the conductive interconnect electrically connecting the conductive via with the contact and extending away from the via at least partly within the first opening, wherein the first opening has a first width in a lateral direction along the rear surface, the second opening has a second width in the lateral direction where the second opening meets the first opening, and the second opening has a third width in the lateral direction adjacent the conductive pad, the first width being greater than the second width, and the second width being greater than the third width.