Patent ID: 7463052

Claim:
A driver adjustment circuit, comprising: a counter circuit operable to receive a drive adjustment signal that represents bits of data and configured to develop a drive adjustment count responsive to the drive adjustment signal, the counter circuit further operable to develop the drive adjustment count according to a pre-determined value irrespective of the drive adjustment signal, the counter circuit having a current value of a drive count set therein, the counter circuit comprising: a pull-up counter circuit configured to receive selected bits of the drive adjustment signal, and operable to develop a pull-up drive count responsive to the selected bits; a pull-down counter circuit configured to receive selected bits of the drive adjustment signal, and operable to develop a pull-down drive count responsive to the selected bits; and an output driver circuit coupled to the counter circuit configured to receive the drive adjustment count and being adapted to receive a data signal, the output driver circuit operable to develop an output signal responsive to the data signal and adjust a drive strength as a function of the drive adjustment count.