Patent ID: 8338943

Claim:
A semiconductor package, comprising: a substrate having a first surface; a stiffener having a bottom and an inner surface, wherein the bottom of the stiffener is coupled to the first surface of the substrate and the inner surface of the stiffener and the first surface of the substrate are configured to form a well; a semiconductor die positioned in the well and coupled to the first surface of the substrate; and a heat spreader coupled to the stiffener and at least partially positioned in the well, the heat spreader including: a substantially slab-shaped top portion coupled to the stiffener; a substantially slab-shaped bottom portion extending from the top portion of the heat spreader into the well and having a perimeter smaller than a perimeter of the top portion of the heat spreader; and a rectilinear ring extending from the slab-shaped bottom portion of the heat spreader; and a thermal interface thermally coupling the die to the bottom portion of the heat spreader.