Patent ID: 7146513

Claim:
An information processing system including a processor, a hardware timer built in said processor or provided outside said processor, and a clock pulse generator for supplying a clock to both of said processor and said hardware timer, wherein said hardware timer measures a processing time between starting and ending points of an application task; wherein said application task is divided into a plurality of processing units; wherein said processor compares a time required to process a predetermined one of said plurality of processing units of said application task with the worst case execution time of said plurality of processing units and changes the clock frequency output from said clock pulse generator according to a result of said comparison; and wherein said processor counts the number of application tasks set in a ready state when a different application task started up by an interruption during a former application task processing occupies the computing resource of said processor so as to enable said ready state watching task to raise both of said clock frequency and said source voltage when there is any application task set in the ready state other than said different application task to be executed and lower both of said clock frequency and said source voltage when there is no task set in the ready state.