Patent ID: 6943082

Claim:
A method for manufacturing a nonvolatile memory device, the method comprising: forming, as a first intermediate structure, a gate layer on which a stopper layer is disposed above a semiconductor layer; forming an ONO film on the first intermediate structure; forming a side wall control gate on the ONO film and aside each of both side surfaces of the gate layer resulting in a second intermediate structure; forming an insulating layer on the second intermediate structure; polishing the insulating layer so as to expose the stopper layer; removing the stopper layer, and thereby exposing the top surface of the gate layer; forming a conductive layer above the gate layer and the insulating layer; forming a word line and a word gate by removing portions of the conductive layer and first portions of the gate layer, the word line extending in a first direction; after forming the word line and the word gate, further removing second portions of the gate layer, the further removing of the second portions of the gate layer exposing portions of the semiconductor substrate and then removing material from the exposed portions resulting in a groove being formed in the semiconductor substrate, the groove being adjacent to the word gate and extending in a second direction, the second direction intersecting with the first direction; and filling a second insulating layer within the groove.