Patent ID: 8810142

Claim:
A circuit comprising: a rectified signal having a property, said property being a duty cycle; a converter for converting a first duty cycle close to said duty cycle into a constant signal; a first comparator for comparing said constant signal with a first reference level and providing a first output signal in response to the comparison between said constant signal and said first reference level: wherein the first comparator is configured to have an input hysteresis, thereby preventing fast toggling of the first output signal when the constant signal and the first reference level are about the same level; a first switching device, said first switching device being controlled by said first output signal for switching between either one amongst at least one set signal level or said constant signal; wherein said converter comprises: a comparing device for comparing said rectified signal with at least one reference level and providing a comparison signal in response to the comparison between said rectified signal and said at least one reference level, said comparison signal having a set amplitude and a duty cycle equal to said first duty cycle; an integrating device for integrating said comparison signal and providing an integrated signal from which said constant signal is derived; wherein said comparison signal is derived from a second output signal provided by a second comparator in response to the comparison between said rectified signal and a second reference level amongst said at least one reference level and further said comparison signal is derived from a sum signal generated by a logical sum of said second output signal and a third output signal provided by a third comparator in response to the comparison between said rectified signal and a third reference level amongst said at least one reference level.