Patent ID: 6914462

Claim:
A power-on reset method of an integrated circuit device, comprising the steps of: providing a power-on reset pulse whenever a plurality of respective power source voltages supplied from individual power sources reach a plurality of predetermined detection voltages, respectively; and initializing internal circuits of the integrated circuit device in response to the power-on reset pulse, wherein the step of providing the power-on reset pulse comprises the steps of: receiving the power source voltages corresponding to the respective power sources; generating a plurality of voltage detection signals corresponding to a plurality of predetermined detection voltages; generating a plurality of power-on reset pulses corresponding to the plurality of predetermined detection voltages; and providing the power-on reset pulses as output, wherein at least one of the internal circuits is initialized whenever at least one of the plurality of power-on reset pulses is provided, and finally initialized by a last occurrence one of the plurality of power-on reset pulses.