Patent ID: 8643896

Claim:
An image processing apparatus having a plurality of processors, for outputting a raster image in a unit of block, comprising: a first processor including a unit that interprets a display list and generates pieces of edge information of objects contained in one line, and a unit that sorts the pieces of edge information for each line, and transfers level data containing link information linking to width information of between the edges of the objects, the pieces of edge information and overlapping information of the objects; a DMA controller including an acquisition unit that acquires information about a pixel count of the block in a main scanning direction and a pixel count of the block in a sub-scanning direction, a management unit that receives the level data transferred from the first processor, and manages a storage location in a memory for the level data at a start of each line in accordance with the pixel count in the sub-scanning direction, a readout control unit that, when the level data corresponding to the pixel count in the sub-scanning direction is stored in the memory, controls a readout order of the level data to read out the level data from the memory, and a transmission unit that transfers the level data read out by the readout control unit to a second processor; and the second processor including a unit that extracts level information serving as the overlapping information of the objects from the level data transferred from the DMA controller, and a unit that sorts an overlapping order of the objects and transfers color information of the objects to a subsequent processor.