Patent ID: 8520426

Claim:
A method for driving a semiconductor device, the semiconductor device comprising: a first to m-th memory cells which are connected in series between a source line and a bit line; a first selection transistor whose gate terminal is electrically connected to a first selection line; and a second selection transistor whose gate terminal is electrically connected to a second selection line, wherein each of the first to m-th memory cells comprises: a first transistor provided on a substrate including a semiconductor material, the first transistor comprising a first source terminal, a first drain terminal, and a first gate terminal electrically connected to a first signal line; a second transistor including an oxide semiconductor layer, the second transistor comprising a second source terminal, a second drain terminal, and a second gate terminal electrically connected to a second signal line; and a capacitor of which one terminal is electrically connected to one of m word lines, wherein the source line is electrically connected to the first source terminal of the m-th memory cell via the second selection transistor, wherein the bit line is electrically connected to the first drain terminal of the first memory cell via the first selection transistor, and wherein the second source terminal, the first gate terminal, and the other terminal of the capacitor are electrically connected to one another to form a node, the method comprising: detecting a potential of the bit line by supplying potentials to the first selection line and the second selection line to turn on the first selection transistor and the second selection transistor in a writing operation where a potential is supplied to the second signal line to turn on the second transistors, and a potential is supplied to the first signal line to supply a potential to the nodes.