Patent ID: 7262615

Claim:
A method for testing a semiconductor structure having a set of top-side connections and having a set of bottom-side connections, the method comprising: providing a device socket having an interconnecting side for connecting the set of top-side connections and the set of bottom-side connections to a tester; providing a device hood for connecting each top-side connection of the set of top-side connections to a corresponding interconnect of a plurality of interconnects in the device hood, and for connecting each interconnect to a corresponding top-side connection, wherein the plurality of interconnects in the device hood connects the set of top-side connections to the device socket, and wherein the plurality of interconnects are routed through the device hood and through the device socket to the interconnecting side of the device socket, such that both the set of top-side connections and the set of bottom-side connections are accessible in a single plane parallel to the interconnecting side of the device socket; and testing the semiconductor structure using the tester.