Patent ID: 7164291

Claim:
A combination header switch for use in providing power to circuitry in an integrated circuit, the combination header switch comprising: a PMOS (P-type Metal Oxide Semiconductor) transistor having a gate terminal coupled to a first control signal line, the PMOS transistor also having a first source/drain terminal and a second source/drain terminal; an NMOS (N-type Metal Oxide Semiconductor) transistor having a gate terminal coupled to a second control signal line, the NMOS transistor also having a first source/drain terminal and a second source/drain terminal; wherein the first source/drain terminal of the PMOS transistor and the first source/drain terminal of the NMOS transistor are coupled to a voltage supply and wherein the second source/drain terminal of the PMOS transistor and the second source/drain terminal of the NMOS transistor are coupled to an output of the combination header switch; and wherein the PMOS transistor is an I/O (input/output) transistor and the NMOS transistor is a core transistor.