Patent ID: 7460727

Claim:
A system for performing threshold stamping, the system comprising: a threshold memory comprising a plurality of threshold values; an error memory comprising a plurality of error values; a register array, wherein the register array comprises a plurality of register blocks, wherein a first register block is in communication with the threshold memory and the error memory, wherein a second register block comprises an error diffusion block, wherein a third register block is in communication with the error memory, wherein the third register block outputs a stamped threshold value; and a threshold damping circuit, wherein the threshold damping circuit is in communication with the third register block and the threshold memory, wherein the threshold damping circuit reduces the stamped threshold value, wherein each register block comprises a register, a look-up table (LUT), and a multiplexer in communication with the register and the LUT, wherein the register outputs a threshold value for a local pixel, wherein the LUT outputs a threshold delta value based on a pixel value of a pixel analyzed by the error diffusion block, wherein the multiplexer selects either the threshold value or a sum of the threshold value and the threshold delta value to send to the next register block.