Patent ID: 8012849

Claim:
A manufacturing method of a semiconductor device, comprising the steps of: forming trenches at plural element isolation regions of a semiconductor substrate respectively, and filling inside of the respective trenches with insulators; defining active regions on the semiconductor substrate by forming a first element isolation structure in a first trench and a second element isolation structure in a second trench respectively by removing a part of the insulator only from inside of the second trench; simultaneously forming a first impurity region at least at a lower portion of the first element isolation structure and a second impurity region at a first portion aligned to and under the second element isolation structure and deeper than the first impurity region by doping a first impurity into a portion including the first element isolation structure and the second element isolation structure of the semiconductor substrate; and simultaneously forming a third impurity region at a surface layer portion of the active region and a fourth impurity region at a matched portion under the second element isolation structure and between the second element isolation structure and the second impurity region by doping a second impurity into a portion including the first element isolation structure and the second element isolation structure of the semiconductor substrate.