Patent ID: 8416114

Claim:
An A/D conversion circuit comprising: a pulse transit circuit including inverting circuits, each inverting circuit including a logical element in which a delay time of an output pulse signal is changed with a size of an applied analog signal, the inverting circuits being connected as odd stages, an output signal from the inverting circuit of a last stage being input to an inverting circuit of a first stage, and an output signal from the inverting circuit of arbitrary stage being input to both the inverting circuit of a first subsequent stage and the inverting circuit of any other subsequent stage; a first pulse transit position detection circuit detecting a transit position of the pulse signal output from the pulse transit circuit and generating a logical signal according to the transit position; a second pulse transit position detection circuit detecting a circling number of the pulse signal output from the pulse transit circuit and generating a logical signal according to the circling number; and a digital signal generation circuit synthesizing the logical signals output from the first and second pulse transit position detection circuits and generating a digital signal according to the size of the analog signal, wherein the pulse transit circuit is configured so that a sum of the number of the inverting circuits that the pulse signal transits in an N-th period and the number of the inverting circuits that the pulse signal transits in an (N+1)-th period is a power of 2, wherein the N denotes a natural number.