Patent ID: 8564754

Claim:
A liquid crystal display, comprising: a first substrate, a first gate line, a second gate line, a first data line, a second data line, and a reference voltage line on the first substrate; a first thin film transistor connected to the first gate line and the first data line, and including a first source electrode and a first drain electrode; a second thin film transistor connected to the second gate line and the second data line, and including a second source electrode and a second drain electrode; a first pixel electrode which contacts a portion of the first drain electrode, and a second pixel electrode which contacts a portion of the second drain electrode; a passivation layer on the first pixel electrode, the second pixel electrode, the first thin film transistor, and the second thin film transistor; and a reference electrode on the passivation layer, and overlapping the first pixel electrode and the second pixel electrode, wherein the reference electrode includes a plurality of branch electrodes, wherein the first thin film transistor is right of the first data line, and the second thin film transistor is left of the second data line, in a plan view of the liquid crystal display, wherein the reference voltage line directly contacts the reference electrode through a contact hole passing through the passivation layer, wherein the reference voltage line comprises a connection unit contacting the reference electrode through the contact hole and extended from the reference voltage line, and wherein an array of the connection unit in pixel areas of the liquid crystal display, are alternately disposed at the left and right of the first data line or the second data line, respectively.