Patent ID: 7851926

Claim:
A semiconductor device, comprising: a plurality of first underlying lines in an underlying wiring layer electrically connected to and shaped similar to a first semiconductor region; a plurality of second underlying lines in the underlying wiring layer electrically connected to and shaped similar to a second semiconductor region; a first intermediate line in an intermediate wiring layer electrically connected to the plurality of first underlying lines, the first intermediate line including a plurality of finger regions shaped similarly to the plurality of first underlying lines, and a coupling section to electrically connect the finger regions with each other; a second intermediate line in the intermediate wiring layer electrically connected to the plurality of second underlying lines, the second intermediate line including a plurality of finger regions shaped similarly to the plurality of second underlying lines, and a coupling section to electrically connect the finger regions with each other; a first overlying line in an overlying wiring layer electrically connected to the first intermediate line; and a second overlying line in the overlying wiring layer electrically connected to the second intermediate line.