Patent ID: 7259593

Claim:
A unit circuit, comprising: a capacitive element having a first electrode, a second electrode, and a dielectric layer interposed between the first electrode and the second electrode; and a transistor having a gate electrode coupled to the first electrode, an electric potential of the first electrode being set to a first electrical potential by supplying a first operation signal to the second electrode, the supplying of the first operation signal to the second electrode being carried out after the first electrode is set to a first predetermined electric potential, and the supplying of the first operational signal to the second electrode being carried out during at least a part of a period in which the first electrode is electrically disconnected from the first predetermined electric potential, after a first step during which the electrical potential of the first electrode is set to the first electrical potential is completed, a second step during which the electrical potential of the first electrode is set to a second predetermined electric potential while a second operation signal is supplied to the second electrode being carried out, and the electrical potential of the first electrode being set to a second electrical potential by supplying a third operation signal to the second electrode after the first step is completed, the supplying of the third operation signal to the second electrode being carried out during at least a part of a period in which the first electrode is electrically disconnected from the second predetermined electric potential.