Patent ID: 8010864

Claim:
A parameter setting system, comprising: at least one analog circuit, each of which has at least one associated parameter that is set in response to a plurality of data bits provided to said circuit, comprising: a memory device which stores: a plurality of data bits representing said at least one parameter to be set; and a first set of error correction bits derived from the values of said data bits in accordance with a predefined algorithm which enables the detection of at least one data bit error; and at least one error correction circuit connected between said memory device and said at least one analog circuit, said at least one error correction circuit arranged to: receive said data bits and said first set of error correction bits; derive a second set of error correction bits from the values of said received data bits in accordance with said predefined algorithm; compare said first and second sets of error correction bits to detect the presence of said at least one data bit error in said received data bits; correct said at least one data bit error in said received data bits if detected; and provide said corrected received data bits to said at least one analog circuit to set said at least one associated parameter.