Patent ID: 7838995

Claim:
A semiconductor device comprising: a first semiconductor layer having a first conductivity type; a p-n column portion stacked over the first semiconductor layer and including a plurality of second semiconductor layers and a plurality of third semiconductor layers, wherein each second semiconductor layer has the first conductivity type and provides a drift layer, each third semiconductor layer has a second conductivity type, and the second and third semiconductor layers are alternately and adjacently arranged in a juxtaposing direction perpendicular to a stacking direction of the p-n column portion; and a peripheral portion disposed adjacently to the p-n column portion in the juxtaposing direction and including at least a fourth semiconductor layer with the first conductivity type, wherein the fourth semiconductor layer has an impurity concentration lower than each second semiconductor layer, wherein the second semiconductor layers include an end second semiconductor layer, which contacts the peripheral portion in the juxtaposing direction, wherein the end second semiconductor layer has an impurity amount, which is equal to or larger than a half of an impurity amount of other second semiconductor layers, wherein the third semiconductor layers include a large impurity amount portion adjacent to the end second semiconductor layer, wherein the large impurity amount portion includes at least one third semiconductor layer having an impurity amount, which is larger than an impurity amount of other third semiconductor layers, wherein all of the third semiconductor layers including the at least one third semiconductor layer have substantially a same impurity concentration, and wherein the at least one third semiconductor layer in the large impurity amount portion has a width, which is larger than a width of the other third semiconductor layers.