Patent ID: 8278697

Claim:
A semiconductor device comprising: a semiconductor substrate; a first insulating film formed on the semiconductor substrate; a charge storage layer formed on the first insulating film; a second insulating film formed on the charge storage layer; and a control electrode formed on the second insulating film, the second insulating film having one of a first film structure, and a second film structure, the first film structure including a lower silicon oxide film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, and an upper silicon oxide film formed on the intermediate insulating film, the second film structure including a lower silicon nitride film, a lower silicon oxide film formed on the lower silicon nitride film, an intermediate insulating film formed on the lower silicon oxide film and containing a metal element, the intermediate insulating film having a relative dielectric constant of greater than 7, an upper silicon oxide film formed on the intermediate insulating film, and an upper silicon nitride film formed on the upper silicon oxide film, the intermediate insulating film having a nitrogen concentration of at least 1×10 19 atoms/cm 3 and at most 2×10 22 atoms/cm 3 , and at least one of the lower silicon oxide film and the upper silicon oxide film containing an impurity element selected from carbon, nitrogen, and chlorine at a peak dopant concentration of at least 1×10 19 atoms/cm 3 .