Patent ID: 7701022

Claim:
A semiconductor device, comprising: a first heat resistant plate layer; a second heat resistant plate layer; a pressure chamber defined between the first and second heat resistant plate layers; a semiconductor substrate disposed between the first and second heat resistant plate layers in which a plurality of through holes have been formed, the holes extending between opposite surfaces of the semiconductor substrate; a planar first guide formed within the semiconductor substrate, the planar first guide having a first planar surface and a second planar surface that are parallel to one another, the first and second planar surfaces being spaced apart from both the first and second heat resistant plate layers, the planar first guide being an impurity diffusion layer in an interior of the semiconductor substrate along a planar direction of the semiconductor substrate, the first guide having a plurality of openings therein that correspond to the plurality of through holes; and at least one valve attached to one of the surfaces of the semiconductor substrate spaced apart from the planar first guide at one of the plurality of holes configured and arranged to selectively control the flow of a fluid through the one of the plurality of through holes and the pressure chamber; wherein at least one of the plurality of through holes at one surface of the semiconductor substrate has a first diameter, and at an opposing surface of the semiconductor substrate the at least one of the plurality of through holes has a second diameter greater than the first diameter, the diameter of a corresponding opening in the first guide is approximately intermediate between the first and second diameters such that a portion of the semiconductor substrate between the one surface of the semiconductor substrate and the first planar surface of the first guide surrounding the opening completely covers the first planar surface, and another portion of the semiconductor substrate between the opposing surface of the semiconductor substrate and the second planar surface of the first guide leaves a section of the second planar surface surrounding the opening exposed within in the at least one of the plurality of through holes of the semiconductor substrate.