Patent ID: 8404529

Claim:
A method of manufacturing a thin film transistor, the method comprising: providing a substrate having a pixel portion and a peripheral portion; forming a buffer layer on the substrate; forming a gate electrode and a gate interconnection on the buffer layer, the gate electrode being located at the pixel portion, the gate interconnection being located at the peripheral portion; forming a gate insulating layer on the gate electrode and the gate interconnection; forming an amorphous semiconductor layer and patterning the amorphous semiconductor layer to form a semiconductor layer pattern on the gate electrode of the pixel portion; forming a metal layer on the substrate to be electrically connected to the semiconductor layer pattern and the gate interconnection; applying an electric field to the metal layer to crystallize the semiconductor layer pattern to form a semiconductor layer; and patterning the metal layer to form source and drain electrodes electrically connected to the semiconductor layer of the pixel portion and a metal pattern on the gate interconnection.