Patent ID: 7514333

Claim:
A process of forming a CMOS power sensor, wherein said CMOS power sensor is applied to detect a power magnitude of a given voltage source, comprising: providing a semiconductor wafer with a Hall device and at least one CMOS device, wherein on the top of said semiconductor wafer is a passivation layer which covers at least one bonding pad; opening a contact window over said at least one bonding pad by performing a photolithography process and an etching process; coating a photo resist layer on said semiconductor wafer; patterning said photo resist layer by using a photo mask during an exposure process, wherein said photo mask comprises patterns for forming at least one gold bump and a current coil; wherein said current coil is connected to said voltage source and able to induce a magnetic field which can induce said Hall device to generate a Hall voltage; and Forming said at least one gold bump and said current coil by performing an electroplating process.