Patent ID: 7608471

Claim:
A system for fabricating silicon substrate semiconductor devices comprising III-V semiconductor structures, comprising: a semiconductor wafer comprising a sapphire substrate, a separation layer, and an epitaxial layer disposed above the separation layer, a plurality of III-V semiconductor structures being formed in the epitaxial layer and arranged atop and attached too the separation layer, each of the plurality of III-V semiconductor structures being separated from the other III-V semiconductor structures by score lines etched therebetween and down to the underlying sapphire substrate through the separation layer disposed between the epitaxial layer and the sapphire substrate; a host substrate comprising silicon; a transfer mechanism configured to transfer, in succession, first and second subsets, respectively, of the plurality of III-V semiconductor structures from the semiconductor wafer to the host substrate, the transfer mechanism comprising means for positioning, in succession, the epitaxial layers and sapphire substrate corresponding to the first and second subsets of the semiconductor wafer such that the epitaxial layers face downwardly in respect of, and are positioned adjacent to, the silicon substrate, and means for aligning, in succession, each of the first and second subsets with corresponding metal bonding pads disposed at first and second locations on the silicon substrate, where the first location is different from the second location; means for fusing, in succession, the epitaxial layers of the first and second subsets to the metal bonding pads disposed at the first and second locations on the silicon substrate, and focused laser pulse means for selectively decomposing, in succession, the separation layers disposed between the first and second subsets and the sapphire substrate, and means for removing from the silicon substrate those portions of the semiconductor wafer that are not fused to the silicon substrate.