Patent ID: 7965741

Claim:
A method comprising: generating an idle packet formed of a plurality of words in which the idle packet has the same binary bit value in each of the plurality of words for each respective lane of a plurality of lanes of a link coupled between a transmitter and a receiver, the idle packet generated in a physical layer of the transmitter responsive to another layer of the transmitter not needing the physical layer; transmitting the idle packet from the physical layer of the transmitter along the link; identifying the idle packet with a first row of the plurality of words designated as a header; powering down or clock gating a first portion of the transmitter including a transmitter equalizer (TX EQ) and a pre-driver circuit for at least the idle packet duration responsive to the identification; and powering down or clock gating a first portion of the receiver for at least the idle packet duration responsive to identifying the idle packet in the receiver, wherein the first portion of the receiver includes a sampler, a variable offset comparator, an alignment register and an interpolator.