Patent ID: 7447834

Claim:
Data storage equipment, comprising: a first storage processor comprising a processing circuit and a collection of packaged integrated circuit devices which has a first set of ports and a second set of ports; a second storage processor; and an interconnect coupled between the first and second storage processors; wherein the processing circuit of the first storage processor is adapted to: configure the collection of packaged integrated circuit devices of the first storage processor to provide (i) communications to a set of storage devices through the first set of ports of the collection of packaged integrated circuit devices and (ii) other communications to the second storage processor through the second set of ports of the collection of packaged integrated circuit devices; pass communications between the first storage processor and the set of storage devices through the first set of ports of the collection of packaged integrated circuit devices; and pass communications between the first storage processor and the second storage processor through the second set of ports of the collection of packaged integrated circuit devices; wherein the collection of packaged integrated circuit devices are configured to operate concurrently as a SAS initiator through one port and as a SAS target through another port; the second storage processor includes another collection of packaged integrated circuit devices; and wherein the first and second storage processors are adapted to perform direct memory access (DMA) operations outside of multiple cache mirroring interface (CMI) links to isolate the collection of packaged integrated circuit devices from DMA operations.