Patent ID: 7415494

Claim:
An apparatus for dividing a first binary number (N), having a number of significant bits, by a second binary number (D), having a number of significant bits, to output an integer result (Y), comprising: a first circuit arranged to calculate the numbers of significant bits in N and D, the first circuit including a plurality of sequentially connected decrementers arranged to be disabled by a first occurrence of a binary ‘1’ in N, such that the output of a last in the plurality of sequentially connected decrementers outputs a number representing a bit position in N of a most significant bit of N; a second circuit arranged to align the most significant bit of N with a most significant bit of D according to a difference (K) between the numbers of significant bits of N and D; and a third circuit arranged to initialize Y and repeat K times: multiplying Y by 2; dividing D by 2; increasing Y by 1, and setting N equal to N-D, if N is greater than or equal to D.