Patent ID: 7943515

Claim:
A method of manufacturing a three dimensional semiconductor device comprising: using a first bit line mask of at least two bit line masks to form a first bit line layer in a first device level of a plurality of device levels, wherein the first bit line layer comprises first bit lines; using the first bit line mask to form a second bit line layer in a second device level of the plurality of device levels, wherein the second bit line layer comprises second bit lines, and wherein the first bit lines and the second bit lines have different electrical connections to a bit line connection level; using the at least two bit line masks to form bit line layers in the plurality of device levels, wherein the bit line layers comprise bit lines, wherein the bit lines of the respective device levels have different electrical connections to the bit line connection level; using a first device mask set to form a first device layer in the first device level, wherein the first device layer comprises first devices, wherein the first devices are electrically connected to the first bit lines; using the first device mask set to form a second device layer in the second device level, wherein the second device layer comprises second devices, wherein the second devices are electrically connected to the second bit lines, and wherein the first device mask set comprises at least one device mask; and using a first word line mask to form a first word line layer, wherein the first word line layer comprises first word lines, and wherein the first word lines are shared by the first device level and second device level; wherein the first devices and second devices comprise a one time programmable or a rewritable cell selected from at least one of antifuse, fuse, diode and antifuse arranged in a series, polysilicon memory effect cell, metal oxide memory, switchable complex metal oxide, carbon nanotube memory, phase change material memory, conductive bridge element, switchable polymer memory, or thin deposited carbon switchable resistor.