Patent ID: 7919414

Claim:
A method for forming fine patterns in a semiconductor device, the method comprising: forming an etch stop layer and a sacrificial layer over an etch target layer; forming photoresist patterns over the sacrificial layer; etching the sacrificial layer by using the photoresist patterns as an etch barrier to form sacrificial patterns; forming spacers on both sidewalls of the sacrificial patterns; forming a first material layer including a material used for the etch stop layer to have a thickness to sufficiently compensate for portions of the etch stop layer which are lost when forming the spacers; forming a second material layer including a material used for the sacrificial layer over the first material layer to have a thickness sufficient to cover the sacrificial patterns; performing a planarization process until the sacrificial patterns are exposed; removing the sacrificial patterns and the second material layer; and etching the etch stop layer and the etch target layer by using the spacer as an etch barrier to form etch target patterns having a fine linewidth.