Patent ID: 8751094

Claim:
A computer-based method for hierarchically validating a graphically based logic control specification including a plurality of ECU models, the method comprising: identifying, by a processor for hierarchically validating the graphically based logic control specification, a functional hierarchy of a first ECU model of the plurality of ECU models, the first ECU model including a plurality of applications being at a lower layer or level than the first ECU model, each of the plurality of applications including a plurality of features, each of the plurality of features being at a lower layer or level than each of the plurality of applications; performing, by the processor, an open of the plurality of features; performing, by the processor, an open loop validation of the plurality of applications in response to completing successful validation of the plurality of features; performing, by the processor, a closed loop validation of the first ECU model in response to completing successful validation of the plurality of applications; and performing, by the processor, a closed loop validation of the plurality of ECU models in response to completing successful validation of the first ECU model.