Patent ID: 7418576

Claim:
A multi-threaded graphics processor executing pixel threads, vertex threads, and computational threads, comprising: a thread pool of the different types of threads, each thread corresponding to a set of instructions required to perform one or more operations, the pixel threads, vertex threads, and computational threads being unsynchronized with respect to each other such that there is a statistical distribution over time of instructions associated with the different types of threads; a plurality of operation-dedicated execution units for servicing different classes of operations and implemented as execution pipelines, each operation-dedicated execution unit adapted to execute instructions required to perform one or more operations for their corresponding thread, the one or more operations within the class of operations serviced by the each operation-dedicated execution unit; a common instruction buffer buffering a set of current instructions for a plurality of threads from the pool of threads, each of the current instructions in the common instruction buffer tagged with a tread tagger to indicate an execution unit to execute the instruction so that an instruction required to perform a particular operation can only be executed by its tagged execution unit, the tagged execution unit dedicated to perform a class of operations including the particular operation; and an instruction scheduler for scheduling instructions to improve the utilization of the operation-dedicated execution units, said instruction scheduler prioritizing said set of current instructions and issuing on each issue cycle a set of instructions from said common instruction buffer to said plurality of operation-dedicated execution units such that each issued current instruction is assigned to its tagged execution unit and on each cycle a number of issued instructions is not greater than a maximum number, the buffering capacity of the common instruction buffer selected so that the instruction buffer has at least as many slots as the number of threads.