Patent ID: 7872347

Claim:
An integrated circuit (IC) package, comprising: an integrated circuit die having a plurality of terminals on a first surface of the integrated circuit die; a first layer of an insulating material that covers the first surface of the die and fills a space adjacent to at least one side of the die; a plurality of first vias through the first layer of the insulating material to provide access to the plurality of terminals; a redistribution interconnect on the first layer of the insulating material that has a first portion coupled to a terminal of the die through a first via through the first layer and a second portion that extends away from the first portion over the insulating material filling the space adjacent to the die; a second layer of insulating material over the first layer of insulating material and the redistribution interconnect; a second via through the second layer of insulating material to provide access to the second portion of the redistribution interconnect; an under bump metallization (UBM) layer on the second layer of insulating material in contact with the second portion of the redistribution interconnect though the second via; a ball interconnect formed on the UBM layer over the second via; a substrate material having opposing first and second surfaces and that forms a surface of the integrated circuit package; and an adhesive material that attaches a second surface of the die to the first surface of the substrate material, the adhesive material being positioned between the first surface of the substrate material and the second surface of the integrated circuit die and not covering the first surface of the substrate material outside of a periphery of the second surface of the integrated circuit die.