Patent ID: 7613970

Claim:
An integrated circuit comprising: A. plural TAP domains, each domain having a TDI input terminal, a TDO output terminal, a TCK input terminal, a TMS input terminal, and a RCK output terminal; and B. a TAP domain selection circuit, the selection circuit having a separate set of outputs and at least one input for each TAP domain, each set including a TDI output connected to a TDI input terminal, a TDO input connected to a TDO output terminal, a TCK output connected to a TCK input terminal, a TMS output connected to a TMS input terminal, and a RCK input connected to a RCK output terminal, the selection circuit including an interface select circuit including: i. an instruction control bus input; ii. a TDI output lead coupled to the TDI output of each set; iii. an AUXOUT 1 output lead; iv. an AUXIN 1 input lead; v. an AUX I/O 1 or TDI lead; vi. a first buffer having an input connected to the AUXOUT 1 output lead, a control input connected to the instruction control bus input, and an output connected to the AUX I/O 1 or TDI lead; vii. a second buffer having an input connected to the AUX I/O 1 or TDI lead, and an output connected to the AUXIN 1 input lead; and viii. a multiplexer having one lead connected to the output of the second buffer, a control input connected to the instruction control bus input, and an output connected to the TDI output lead.