Patent ID: 8693269

Claim:
A method of performing write operations in a memory device including a plurality of banks in which a plurality of memory cells are arranged, each bank including two or more sub-banks including at least a first sub-bank and a second sub-bank, the method comprising: performing a first row cycle for writing to a first word line of the first sub-bank, the first row cycle including a plurality of first sub-periods, each sub-period for performing a particular action; and performing a second row cycle for writing to a first word line of the second sub-bank, the second row cycle including a plurality of second sub-periods of the same type as the plurality of first sub-periods; wherein the first row cycle overlaps with the second row cycle, and a first type sub-period of the first sub-periods overlaps with a second type sub-period of the second sub-periods, the first type and second type being different types.