Patent ID: 7076583

Claim:
A multiprocessor system comprising: a plurality of processors which send and receive predetermined information to and from each other; a shared memory which is shared and accessed by each of said plurality of processors; and an access manager which manages access to said shared memory by each of said plurality of processors, wherein, when said plurality of processors are in contention to access said shared memory, said access manager selects one of said plurality of processors and permits said one of said plurality of processors to access said shared memory, wherein, once each of said plurality of processors has accessed said shared memory, when said one of said plurality of processors updates a predetermined data in said shared memory, said one of said plurality of processors requests others of said plurality of processors to access said updated predetermined data from said shared memory, and wherein, when a predetermined period of time has elapsed without being selected by said access manager, said one of said plurality of processors requests others of said plurality of processors and said access manager to perform a predetermined reset operation for resetting themselves.