Patent ID: 7623984

Claim:
A test apparatus for testing a device under test, comprising: first and second period generators that respectively generate test period signals indicating test periods for testing the device under test; a plurality of input/output sections that are provided in correspondence with a plurality of terminals of the device under test, each of the plurality of input/output sections, in accordance with a test period signal supplied thereto, outputting a test signal to a corresponding one of the plurality of terminals and receiving an output signal output from the corresponding terminal; a plurality of selecting sections that are provided in correspondence with the plurality of input/output sections, each of the plurality of selecting sections selecting one of the test period signals generated by the first and second period generators to be supplied to a corresponding one of the plurality of input/output sections; and a third period generator that generates a period equal to a least common multiple of the test periods generated by the first and second period generators, wherein the first, second and third period generators synchronously start generating the test periods and the period equal to the least common multiple of the test periods, and each of the plurality of selecting sections switches the selection between the test period signals generated by the first and second period generators in synchronization with the period generated by the third period generator, and supplies the selected test period signal to the corresponding input/output section.