Patent ID: 8426946

Claim:
A laminated semiconductor substrate laminated a plurality of semiconductor substrates having a plurality of scribe-groove parts formed along scribe lines, the plurality of semiconductor substrates each comprising: a plurality of device regions insulated from each other, each of which is in contact with at least one of the plurality of scribe-groove parts and has a semiconductor device formed therein; and a first wiring electrode and a second wiring electrode which are connected to the respective semiconductor devices in a first device region and a second device region adjacent to each other with at least one interposed groove part of the plurality of scribe-groove parts among the plurality of device regions, and extend to the inside of the interposed groove part from the first device region and the second device region respectively, and are separated from each other, and the laminated semiconductor substrate comprising: a through hole formed therein which penetrates the interposed groove parts of the plurality of semiconductor substrates laminated in a laminated direction in which the plurality of semiconductor substrates are laminated, and in which a plurality of the first wiring electrodes, constituting a laminated electrode group laminated in the laminated direction among the first wiring electrodes, appear; a through electrode which penetrates all of the plurality of semiconductor substrates through the through hole and is in contact with all of the first wiring electrodes appearing in the through hole; and a plurality of laminated chip regions each of which is composed of the device regions laminated in the laminated direction in all of the plurality of semiconductor substrates.