Patent ID: 7015585

Claim:
An integrated circuit on a package substrate, comprising: a first integrated circuit pad on the integrated circuit; a first via in the package substrate; a first wire having a first end bonded to the first integrated circuit pad and having a second end bonded directly to the first via, wherein neither a wire bond finger nor a trace is interposed between the second end of the first wire and the first via and wherein the first wire comprises an outer insulating layer; a second integrated circuit pad on the intergrated circuit; a second via in the package substrate; a second wire having a first end bonded to the second integrated circuit pad and having a second end bonded directly to the second via, wherein neither a wire bond finger nor a trace is interposed between the second end of the second wire and the second via, and wherein the first wire crosses the second wire; and a molding compound encapsulating the first wire, the second wire, the first via, the second via, the first intergrated circuit pad, and the second intergrated circuit pad.