Patent ID: 7490276

Claim:
A method for testing one or more memories of a device, comprising: receiving one or more first repair records from one or more built-in self-testers of a device, the device comprising one or more memories, a built-in self-tester associated with a memory, a first repair record describing a first repair at a memory; generating a first repair signature from the one or more first repair records, wherein generating the first repair signature comprises mathematically reducing the one or more first repair records from one or more repair registers, the first repair signature corresponding to the first repairs at the one or more memories; recording the first repair signature; receiving one or more second repair records from the one or more built-in self-testers, a second repair record describing a second repair at a memory; generating a second repair signature from the one or more second repair records, the second repair signature corresponding to the second repairs at the one or more memories; comparing the second repair signature with the first repair signature; and evaluating the device in response to the comparison.