Patent ID: 8704806

Claim:
A display device comprising: a judging and image-data-processing circuit including a judging circuit and a judge data storing circuit; a data storing circuit operationally connected to the judging and image-data-processing circuit; and a gate signal generating circuit and a source signal generating circuit, each operationally connected to the judging and image-data-processing circuit, wherein the data storing circuit is configured to store a first image data of a first frame, a second image data of a second frame, and a third image data of a third frame, wherein the judging circuit is configured to divide the first image data of the first frame, the second image data of the second frame, and the third image data of the third frame into a first plurality of image data, a second plurality of image data, and a third plurality of image data respectively, judge whether each of the first plurality of image data matches with corresponding one of the second plurality of image data, output a first judge data of the first image data including the first plurality of image data and the second image data including the second plurality of image data, judge whether each of the second plurality of image data matches with corresponding one of the third plurality of image data, and output a second judge data of the second image data including the second plurality of image data and the third image data including the third plurality of image data, wherein the judge data storing circuit is configured to store the first judge data and the second judge data, wherein the gate signal generating circuit and the source signal generating circuit are configured to control writing of each the second plurality of image data in accordance with the first judge data, and control writing of each the third plurality of image data in accordance with the second judge data, wherein the first judge data and the second judge data in sequential frame periods of the first frame, the second frame, and the third frame are accumulated in the judge data storing circuit, and wherein the first judge data and the second judge data are output from the judge data storing circuit at once.