Patent ID: 7020807

Claim:
A circuit arrangement for generating test-traffic on a digital data path having at least one other traffic source, comprising: a data-generation circuit adapted to provide a first data stream; a memory arrangement adapted to buffer a plurality of programmable commands, the programmable commands indicative of at least one of test-traffic type, pattern and behavior-in-time; state machine circuitry coupled between the memory arrangement, the data-generation circuit and the digital data path, the state machine circuitry adapted to assemble portions of the first data stream into test-traffic wherein at least one of type, pattern and behavior-in-time is selected responsive to the programmable commands, and further adapted to generate test-traffic on the digital data path; and a status and feedback circuit adapted to monitor the digital data path for test-traffic and generate a feedback signal indicative of at least one of test-traffic throughput and test-traffic quality.