Patent ID: 7401208

Claim:
A method of processing multiple threads of instructions in a data processor, the method including: (a) interleaving instructions from a first thread of instructions in the data processor with instructions from at least one additional thread of instructions in the data processor, the instructions from the first thread of instructions and the at least one additional thread of instructions being interleaved according to a priority rule between the first thread of instructions and the at least one additional thread of instructions to produce an interleaved stream of instructions in the data processor; and (b) inserting a randomization into the interleaving step while preserving the priority rule by (i) generating a thread selection signal indicating a thread to be processed (ii) generating a mask from a first thread priority signal associated with the first thread of instructions and from a respective additional thread priority signal associated with each additional instruction thread; (iii) generating a random number or a pseudo random number; and (iv) comparing the mask to the random number or the pseudo random number to generate a randomized mask.