Patent ID: 7579690

Claim:
A semiconductor package structure, comprising: a first packaging substrate having a first surface, a second surface, and at least a first cavity penetrating through the first surface and the second surface, wherein the first surface and the second surface have a plurality of first and second conductive pads, respectively, formed thereon; a first semiconductor component having at least an active surface on which a plurality of first electrode pads are disposed, wherein the first semiconductor component is disposed in the first cavity; a first build-up circuit structure comprising a plurality of third and fourth conductive pads, and a plurality of conductive vias for electrically connecting to the first conductive pads of the first packaging substrate and the first electrode pads of the first semiconductor component, wherein the first build-up circuit structure is disposed on the first surface of the first packaging substrate and the active surface of the first semiconductor component; a second semiconductor component comprising a plurality of second electrode pads, wherein the second semiconductor component is disposed on surfaces of the third conductive pads of the first build-up circuit by a plurality of first conductive elements; a plurality of second conductive elements disposed on the fourth conductive pads of the first build-up circuit structure of the first packaging substrate; and a stacked structure comprising a plurality of fifth conductive pads, wherein the fifth conductive pads correspond to the second conductive elements disposed on the surfaces of the fourth conductive pads, so as to electrically connect the stacked structure to the first build-up circuit structure disposed on the first packaging substrate.