Patent ID: 7465996

Claim:
A semiconductor device, comprising: a semiconductor substrate divided into a first region and a second region; a first MIS transistor formed in the first region of the semiconductor substrate and including a stack of a first gate insulating film and a fully-silicided first gate electrode; and a second MIS transistor formed in the second region of the semiconductor substrate and including a stack of a second gate insulating film and a fully-silicided second gate electrode, wherein the second gate electrode has a gate length larger than that of the first gate electrode, a middle portion in a gate length direction of the second gate electrode has a thickness smaller than the thickness of the first gate electrode, first sidewalls made of an insulating film are formed on both sides of the first gate electrode, second sidewalls made of an insulating film are formed on both sides of the second gate electrode, and a height of an upper surface of the middle portion in the gate length direction of the second gate electrode is lower than heights of upper ends of the second sidewalls, and heights of the second sidewalls measured from the surface of the second region are substantially identical with heights of the first sidewalls measured from the surface of the first region.