Patent ID: 8062923

Claim:
A method for manufacturing a memory device, comprising: forming an electrode layer, the electrode layer including a first electrode and a second electrode, and an insulating member between the first and second electrodes, the first and second electrodes having top surfaces exposed at a top surface of the electrode layer, the insulating member extending above the top surfaces of the first and second electrodes to form an insulating wall, and the insulating member has a width between the first and second electrodes at the top surfaces of the first and second electrodes; forming a bridge of memory material on the top surface of the electrode layer across the insulating member, the bridge comprising first and second pads of thermally insulating material contacting the top surfaces of the first and second electrodes respectively, and a strip of memory material extending between the first and second pads, the bridge defining an inter-electrode path between the first and second electrodes across the insulating member having a path length defined by the width of the insulating member, wherein the memory material has at least two solid phases.