Patent ID: RE44848

Claim:
An interleaving apparatus for an orthogonal frequency division multiplexing transmitter, comprising: a memory unit including a plurality of memory banks each having memory cells arranged in an N×M matrix structure, the memory banks being capable of being independently controlled so that data can be written or read in or from the memory banks; a memory write/read control unit for generating controller configured to generate control signals to write/read data in/from the memory unit, according to a constellation mapping scheme related to a data transmission rate , and outputs output the control signals to the memory unit; , and configured to receive signals indicating the data transmission rate and a valid interval of the input data and generate the control signals to write/read data existing in the valid interval; a memory access address generation unit for generating generator configured to generate a memory access address used to write/read data in/from the memory unit in response to the memory write/read control signals; and a second permutation and output selection unit for rearranging processor configured to rearrange positions of data bits output from the memory unit and outputting the position-rearranged data bits.