Patent ID: 7410881

Claim:
A method of manufacturing a flash memory device, the comprising: forming an insulating layer over a semiconductor substrate in which a junction region is defined; etching a part of the insulating layer to form a contact hole exposing the junction region; filling the contact hole with a first conductive material, the first conductive material contacting the junction region and extending above an upper surface of the contact hole; etching the first conductive material to partly fill the contact hole, so that the first conductive material fills a lower portion of the contact hole, wherein an upper portion of the contact hole remains not filled, wherein the etched first conductive material defines a contact plug; forming a nitride layer and an oxide layer over the contact plug and filling the upper portion of the contact hole, the nitride layer being provided below the oxide layer; etching part of the nitride layer and the oxide layer to expose the contact plug and the upper portion of the contact hole; and forming a second conductive material on the contact plug and filling the upper portion of the contact hole to form a bit line, the bit line at least partly extending into the upper portion of the contact hole.