Patent ID: 7043518

Claim:
A method for performing parallel integer multiply accumulate operations on packed data comprising: a) inputting to a MAC two z-bit words containing a number of m-bit operands; b) multiplying the m-bit operands in a number of m×m operations to obtain a number of n-bit products; c) adding the content of at least one of a number of j-bit accumulator to the n-bit product of each multiplier performing the m×m operation producing each n-bit product to obtain a number of n-bit results; d) outputting the number of n-bit results into a number of k-bit accumulator registers, wherein the number of n-bit results are output in the same cycle; and e) accessing at least one k-bit accumulator register to retrieve results of MAC operations, wherein the results of MAC operations may be individually retrieved and the j-bit accumulator corresponding to the accessed k-bit accumulator register cleared after retrieval if the at least one k-bit accumulator register accessed is a postclear register.