Patent ID: 8880853

Claim:
A method, in a data processing system, for performing a wake-and-go operation, the method comprising: detecting, by a wake-and-go engine, that a thread is spinning on a lock associated with a target address, wherein the wake-and-go engine comprises hardware logic associated with a bus and a content addressable memory; responsive to the wake-and-go engine detecting that the thread is spinning on the lock, storing an entry in the content addressable memory with the target address, a thread identifier associated with the thread, and a lock bit indicating the thread is spinning on the lock associated with the target address; placing the thread in a sleep state; snooping, by the wake-and-go engine, the bus; responsive to the wake-and-go engine detecting a transaction on the bus associated with the target address, accessing, by the wake-and-go engine, the content addressable memory using the target address; responsive to the wake-and-go engine finding the entry containing the target address in the content addressable memory, determining, by the wake-and-go engine, whether the thread associated with the entry is waiting for a lock-related event based on whether the lock bit is set for the entry in the content addressable memory; responsive to the wake-and-go engine determining the thread associated with the entry is waiting for a lock-related event, determining, by the wake-and-go engine, whether the transaction causes the lock associated with the target address to be released; and responsive to the wake-and-go engine determining the transaction causes the lock associated with the target address to be released, placing the thread in a non-sleep state.