Patent ID: 8455987

Claim:
A packaged power semiconductor device comprising: a ceramic substrate having an upper and lower surface on opposite sides thereof; an upper electrically conductive layer bonded to the upper surface of the ceramic substrate; a lower electrically conductive layer bonded to the lower surface of the ceramic substrate; a plurality of electrically conductive leads attached along an edge of the upper electrically conductive layer; a generally rectangular power semiconductor device having a pair of longer sides and a pair of shorter sides, the generally rectangular power semiconductor device being attached to the upper electrically conductive layer in an orientation with the longer sides being parallel to the edge of the upper electrically conductive layer to which the plurality of electrically conductive leads are attached; a region of encapsulating material disposed to cover the semiconductor device, the ceramic substrate and the upper electrically conductive layer, the encapsulant not covering a major surface of the lower electrically conductive layer, and leaving at least a portion of each of the plurality of electrically conductive leads exposed and extending from the encapsulant; the encapsulating material extending away from the plurality of electrically conductive leads in a direction parallel to the edge of the upper electrically conductive layer to thereby provide an extended region of encapsulant having an upper surface, a lower surface, an end surface opposite the edge of the upper electrically conductive layer, and side surfaces; a hole extending through the extended region of encapsulant from the upper surface to the lower surface of the extended region of encapsulant thereof to enable attachment of the packaged power semiconductor device to a mount; and a first notch in the extended region of the encapsulant, the first notch extending into the encapsulant from the upper surface of the extended region of encapsulant and one of the side surfaces toward the hole, and extending toward the ceramic substrate.