Patent ID: 7799626

Claim:
A method of fabricating a lateral DMOS device having a transistor region, a Schottky diode region and a field region, comprising: forming a second conductive type well in a first conductive type semiconductor substrate; forming a Schottky contact in contact with the second conductive type well in the Schottky diode region; forming a drain region in the second conductive type well; forming a first conductive type body region and in the second conductive type well and in the transistor region; forming a first conductive type impurity region in the first conductive type body region and forming a first conductive type guard ring in the second conductive type well in the Schottky diode region; forming a source region adjacent to the first conductive type impurity region; forming a field insulating layer in the transistor region, the Schottky diode region, and the field region; and then forming a gate insulating layer and a gate electrode in the transistor region and the Schottky diode region, wherein the Schottky contact is formed on the gate electrode, the drain region and the source region.