Patent ID: 8050423

Claim:
An n-channel integrated circuit device (n is an integer of 1 or greater) for muting an audio signal, the device comprising: a control circuit configured to generate a control signal for controlling to switch between a sound output state and a mute state, and a delayed control signal obtained by delaying the control signal; a charging and discharging circuit configured to charge or discharge a time constant control terminal according to the control signal, to change a voltage on the time constant control terminal from a first reference voltage to a second reference voltage, and to discharge or charge the time constant control terminal according to the delayed control signal, to change the voltage on the time constant control terminal from the second reference voltage to the first reference voltage; an N-th voltage-to-current converting circuit (N is an integer from 1 to n) configured to compare the voltage on the time constant control terminal with an intermediate voltage which is between the first reference voltage and the second reference voltage, and generate a (2N−1)-th current corresponding to the voltage on the time constant control terminal and a (2N)-th current corresponding to the intermediate voltage, the N-th voltage-to-current converting circuit being configured to switch between a value of the (2N−1)-th current and a value of the (2N)-th current within a period for charging or discharging the time constant control terminal; a (2N−1)-th mirror circuit configured to copy the (2N−1)-th current to generate (4N−3)-th and (4N−2)-th intermediate currents; a (2N)-th mirror circuit configured to copy the (2N)-th current to generate (4N−1)-th and (4N)-th intermediate currents; a (2N−1)-th selecting and combining circuit configured to cut off or select the (4N−3)-th intermediate current and cut off or select the (4N−1)-th intermediate current, according to the control signal and the delayed control signal, to combine a (2N−1)-th mute control current; and a (2N)-th selecting and combining circuit configured to cut off or select the (4N−2)-th intermediate current and cut off or select the (4N)-th intermediate current, according to the control signal and the delayed control signal, to combine a (2N)-th mute control current.