Patent ID: 8909855

Claim:
A storage system comprising: a Central Processing Unit (CPU) responsive to one or more commands including user data and logical addresses identifying the user data, the CPU including a PCIe controller; a plurality of physically-addressed solid state disk (SSDs) configured to store the user data and individually coupled, through a PCIe bus, to the CPU and individually responsive to one or more queued commands, each of the queued commands including a physical address and using the physical addresses to identify the location of the user data to be stored in or retrieved from at least one of the plurality of physically-addressed SSDs in blocks, each of the plurality of physically-addressed SSDs being located externally to the CPU, the PCIe controller coupled to the plurality of physically-addressed SSDs; a non-volatile memory module coupled to the CPU, the non-volatile memory module including flash tables used to manage blocks in the physically-addressed SSD, the flash tables including tables used to map logical to physical addresses for identifying the location of stored user data in physically-addressed SSD; and a network interface controller coupled through a second PCIe bus to the CPU, the network interface controller further coupled to the PCIe controller, wherein the flash tables are maintained in the non-volatile memory modules thereby avoiding reconstruction of the flash tables upon power interruption.