Patent ID: 8482989

Claim:
A semiconductor device comprising: a fuse array that comprises a first portion of fuses and a second portion of fuses; a first group of sense amplifier circuits that senses information stored in the first portion of fuses in the fuse array and outputs a first group of fuse data; a second group of sense amplifier circuits that senses information stored in the second portion of fuses in the fuse array and outputs a second group of fuse data; a first register unit including a first group of registers that receives and transfers the first group of fuse data in response to a first transfer clock and a second group of registers that receives and transfers the second group of fuse data in response to a second transfer clock; a multiplexer that selectively outputs the first and second group of fuse data; and a second register unit that receives the fuse data from the multiplexer in response to a third transfer clock.