Patent ID: 8823006

Claim:
A semiconductor structure, comprising: a crystalline substrate, with trenches etched therein to form at least three crystalline semiconductor fins from the substrate, wherein each of the at least three crystalline semiconductor fins has a cross-sectional dimension that is less than a minimum feature size (F), and wherein for each of the at least three crystalline semiconductor fins the respective fin includes: a first source/drain region in the crystalline substrate at a bottom of the fin, and a second source/drain region in a top portion of the fin to define a vertically-oriented channel region in the fin between the first and second source/drain regions; a gate insulator formed around the fin; and a surrounding gate formed around and separated from the fin by the gate insulator; and the at least three crystalline semiconductor fins including a first fin, a second fin, and a third fin, wherein the second fin is between the first and third fins, the first and second fins have a center-to-center spacing of the minimum feature size (F) less the cross-sectional dimension of the fins (ΔT), and the second fin and the third fin have a center-to center spacing of the minimum feature size (F) plus the cross-sectional dimension of the fins (ΔT) .