Patent ID: 7919822

Claim:
A semiconductor device, comprising: an isolation region formed in a semiconductor substrate; a gate electrode formed over an element region of the semiconductor substrate defined by the isolation region with a gate insulating film between, the gate electrode having a sidewall on its sides; low impurity concentration regions formed in the element region of the semiconductor substrate on both sides of the gate electrode; an insulating film which is formed over at least one of the low impurity concentration regions, which has an opening region; a high impurity concentration region formed in said low impurity concentration region beneath the opening region; and an interlayer dielectric film formed over the semiconductor substrate; wherein the gate insulating film is provided beneath the gate electrode and the sidewall, and is extended and provided over said low impurity concentration region and reaches the isolation region on a side of said low impurity concentration region; the insulating film includes the gate insulating film as a lower portion of the insulating film; the opening region of the insulating film is provided in a region separated from both the sidewall and the isolation region and penetrates through the gate insulating film; and the insulating film has a thick portion surrounding the opening region, and is covered with the interlayer dielectric film.