Patent ID: 8659732

Claim:
An in-plane switching (IPS) liquid crystal display device which drives a liquid crystal layer by an electric field generated between a common electrode and a pixel electrode, comprising: a thin film transistor (TFT) substrate in which a great number of sub-pixels having display regions are provided in matrix, each display region being associated with a corresponding sub-pixel; a counter substrate provided by opposing to the TFT substrate; the liquid crystal layer sandwiched between the counter substrate and the TFT substrate; a scan signal wiring and a common signal wiring provided on the TFT substrate; a first insulating film provided on the TFT substrate, the scan signal wiring, and the common signal wiring; a source electrode provided on the first insulating film; a second insulating film provided on the first insulating film and the source electrode; a flattening film provided on the second insulating film; the common electrode made with a transparent conductive film, which is provided on the flattening film and connected to the common signal wiring; and the pixel electrode made with a transparent conductive film, which is provided on the flattening film and connected to the source electrode, wherein: the flattening film is formed in all areas of the display regions; a recessed region constituted with a region on the second insulating film where the flattening film is not provided includes a part on the source electrode; and the common electrode is extended inside the recessed region, the liquid crystal display device further comprising: a first storage capacitor constituted with a structure in which the first insulating film is sandwiched between the common signal wiring and the source electrode; and a second storage capacitor provided inside the recessed region, which is constituted with a structure in which the second insulating film is sandwiched between the common electrode and the source electrode, the liquid crystal display device further comprising: a columnar spacer provided on the counter substrate for keeping a gap between the counter substrate and the TFT substrate; a sub-pixel in which the columnar spacer is placed; and a sub-pixel in which the columnar spacer is not placed, wherein a recessed region in the sub-pixel in which the columnar spacer is placed is continuously formed to a region that supports the columnar spacer, and the common electrode inside the recessed region covers the scan signal wiring, the source electrode, and an area between the scan signal wiring and the source electrode via the second insulating film.