Patent ID: 6906749

Claim:
A sensor comprising: a column bus; a column of pixels; a first plurality of switches, each switch being coupled between the column bus and a corresponding pixel of the column of pixels; a column of accumulators; a second plurality of switches, each switch being coupled between the column bus and a corresponding accumulator of the column of accumulators; a first switch control circuit operable to control a switch of the first plurality of switches to connect the signal from the pixel of the column of pixels to the column bus while controlling all remaining switches of the first plurality of switches to isolate the column bus from all remaining pixels of the column of pixels; a second switch control circuit operable to control a switch of the second plurality of switches to connect the signal on the column bus to the accumulator of the column of accumulators while controlling all remaining switches of the second plurality of switches to isolate the column bus from all remaining accumulators of the column of accumulators; a first increment control circuit operable to increment the first switch control circuit to control a next in succession switch of the first plurality of switches to connect a signal from a next in succession pixel of the column of pixels to the column bus while controlling all remaining switches of the first plurality of switches to isolate the column bus from all remaining pixels of the column of pixels; a second increment control circuit operable to increment the second switch control circuit to control a next in succession switch of the second plurality of switches to connect the signal on the column bus to a next in succession accumulator of the column of accumulators while controlling all remaining switches of the second plurality of switches to isolate the column bus from all remaining accumulators of the column of accumulators; a first repeat control circuit operable to repetitively operate the first increment control circuit, the first switch control circuit, the second increment control circuit, and the second switch control circuit; and a second repeat control circuit operable to operate the first increment control circuit and then operate the first repeat control circuit each time the second repeat control circuit is operated.