Patent ID: 8054710

Claim:
A driver comprising: first to Nth circuit blocks (N is an integer of two or more) disposed along a first direction when a direction from a first side that is a short side of the driver toward a third side opposite to the first side is a first direction and a direction from a second side that is a long side of the driver toward a fourth side opposite to the second side is a second direction; a first interface region provided along the fourth side and on the second direction side of the first to Nth circuit blocks; and a second interface region provided along the second side and on a fourth direction side of the first to Nth circuit blocks, the fourth direction being opposite to the second direction, a local line formed using a wiring layer lower than an Ith layer, the local line being provided as at least one of a signal line and a power supply line between adjacent circuit blocks among the first to Nth circuit blocks, and a plurality of global lines formed using at least one of the Ith or higher wiring layer, the plurality of global lines being provided as a plurality of signals lines between nonadjacent circuit blocks among the first to Nth circuit blocks, the plurality of global lines being provided along the first direction, the plurality of global lines being provided over a circuit block disposed between the nonadjacent circuit blocks, the first to Nth circuit blocks including: at least one data driver block that drives data lines; and a logic circuit block that controls the at least one data driver block, the logic circuit block and the at least one data driver block being disposed along the first direction, and the plurality of global lines including: a driver global line for supplying a driver control signal from the logic circuit block to the at least one data driver block, the driver global line being provided along the first direction between the logic circuit block and the at least one data driver block, the first interface region being disposed on the second direction side of the at least one data driver block without another circuit block interposed therebetween, and the second interface region being disposed on the fourth direction side of the at least one data driver block without another circuit block interposed therebetween.