Patent ID: 7627742

Claim:
A method of operating a processor, the method comprising: fetching, by a fetcher instructions from an instruction source to provide an instruction stream that includes one or more fetched branch instructions; storing, by a branch instruction queue having a plurality of entries, the one or more branch instructions from the instruction stream, wherein each of the one or more branch instructions occupies one of the entries, and wherein the recently stored one or more branch instructions is designated as valid, meaning that the branch instruction is in process; in response to a branch instruction being stored in the branch instruction queue, dynamically pointing, by the branch instruction queue, a head pointer to a newest, valid, branch instruction stored in one of the entries, and dynamically pointing a tail pointer to an oldest, valid, branch instruction stored in one of the entries, such that any branch instructions positioned between the head pointer and the tail pointer are valid; speculatively executing, by a branch execution unit, one or more fetched branch instructions by using branch prediction information and resolving whether or not a branch in the speculatively executed branch instruction is taken, thus providing one or more executed branch instructions; designating as invalid the one or more executed branch instructions in the branch instruction queue and moving the tail pointer such that the tail pointer points to the oldest, valid, branch instruction stored in the branch instruction queue; storing, by a confidence storage memory, a confidence value describing an amount of confidence in the branch prediction information for each fetched branch instruction stored in the branch instruction queue; summing the confidence values of the branch instructions positioned from the head pointer to the tail pointer stored in the branch instruction queue, thus generating a confidence value total for valid branch instructions only; throttling, by a throttle circuit, the fetching of instructions from the instruction source if the confidence value total indicates confidence less than a predetermined confidence threshold, wherein the throttling reduces power consumption by the processor; and repeating the above steps.