Patent ID: 7402911

Claim:
A multi-chip package, comprising: a substrate having opposing first and second surfaces and a plurality of contact areas disposed on the second surface of the substrate; a first integrated circuit positioned in a face-down position over the substrate, wherein a first surface of the first integrated circuit and the first surface of the substrate are in facing relationship with respect to one another, a second surface of the integrated circuit faces away from the substrate, and the first integrated circuit comprises a first plurality of contact pads disposed on the first surface of the first integrated circuit; a second integrated circuit positioned face-down over at least a portion of the first integrated circuit, wherein the second surface of the first integrated circuit is facing at least a portion of a first surface of the second integrated circuit and the second integrated circuit comprises a second plurality of contact pads disposed on the first surface of the second integrated circuit; and electrical conductors coupling the first and second plurality of contact pads to the plurality of contact areas disposed on the second surface of the substrate, wherein the first and second integrated circuits are cascaded, wherein: the first plurality of contact pads is located along a first edge of the first integrated circuit; the second plurality of contact pads is located along a first edge of the second integrated circuit; the first edge of the first integrated circuit is positioned such that the first edge of the first integrated circuit extends beyond a first edge of the substrate; and the first edge of the second integrated circuit is positioned such that the first edge of the second integrated circuit extends beyond the first edge of the first integrated circuit.