Patent ID: 7602166

Claim:
A digital self-adjusting minimum power supply apparatus for use with an adaptable voltage scaled (AVS) power supply node, said apparatus comprising: a slack time detector configured to be coupled to said AVS power supply node; a voltage adjuster coupled to said slack time detector, said voltage adjuster configured to receive a propagation delay word from the slack time detector and to generate a duty cycle clock signal and a pulse width word that represents a value of supply voltage; and a digital pulse width modulation (DPWM) modulator coupled to said voltage adjuster, said DPWM modulator configured to receive the duty cycle clock signal and the pulse width word from said voltage adjuster and to generate a pulse modulated signal; wherein said slack time detector, said voltage adjuster, and said DPWM modulator form a closed-loop controller configured to perform discrete time compensation defined by D(n+1)=F(n)+αE(n)+A(n), where D(n+1) denotes a next value of a duty ratio associated with the pulse modulated signal, F(n) denotes a frequency compensation factor, E(n) denotes a detected error, α denotes an error scaling factor implemented using a shift function, and A(n) denotes an accumulated compensation.