Patent ID: 7262660

Claim:
A variable gain amplifier comprising: a first MOS transistor having a gate to which a positive differential input signal is applied, and having a drain coupled to a first output node; a first current source, coupled between a source of the first MOS transistor and a ground, configured to provide a first current; a second MOS transistor having a gate to which the positive differential input signal is applied, and having a drain coupled to a second output node; a third MOS transistor having a gate to which a negative differential input signal is applied, and having a drain coupled to the first output node; a second current source, coupled between the ground and a junction of a source of the second MOS transistor and a source of the third MOS transistor, and configured to provide a second current I; a fourth MOS transistor having a gate to which the negative differential input signal is applied, and having a drain coupled to the second output node; a third current source, coupled between a source of the fourth MOS transistor and the ground, and configured to provide a third current 2×I; and a variable resistor coupled between the first MOS transistor and the fourth MOS transistor; wherein the first current is defined as 2×I.