Patent ID: 7892885

Claim:
A method of fabricating a modular chip structure, the method comprising the steps of: providing a carrier wafer; forming a plurality of conductive vias in the carrier wafer; forming a wiring layer on the carrier wafer in contact with one or more of the conductive vias, wherein the carrier wafer having the conductive vias and the wiring layer comprises a carrier platform, and wherein the wiring layer is configured to divide the carrier platform into a plurality of voltage islands; providing a plurality of pre-designed chip circuits selected from the group consisting of chips, chip macros, chips in combination with at least one chip macro and chip macros in combination with at least one chip; thinning at least one of the pre-designed chip circuits; assembling the pre-designed chip circuits on the carrier platform with two or more of the chips or chip macros being in a stacked configuration; and attaching the carrier platform to a substrate to form the modular chip structure.