Patent ID: 7872668

Claim:
A system comprising: a video signal processing system, comprising: a video signal input port to receive an input video signal; a digital video signal output port to provide a processed output video signal to a digital television display panel; an image processing pipeline, comprising a plurality of different image analysis or processing stages to alter pixel data of the input video signal to produce the processed output video signal, the pipeline coupled to the video signal input port to receive information from the input video signal, the pipeline coupled to the digital video signal output port to provide information indicative of the processed output video signal; at least one memory comprising: instruction code storage to store compiled default instructions for performing a default operation mode of the video signal processing system; script storage to store a script for performing a modified operation mode of the video signal processing system, in which the modified operation mode includes a diagnostic or debug mode that modifies operation of the video signal processing system by adjusting a processing time allocation of one or more image analysis or processing stages responsible for creating a display anomaly in the processed output video signal to process the video input signal and/or adjusting a processing time allocation of an available image analysis or processing stage to process the video input signal to thereby correct the display anomaly; a display debug buffer to store, during the diagnostic or debug mode, a version of the processed output video signal that is provided to the digital television display panel; and a stage-adjunct data buffer corresponding to each of the plurality of different image analysis or processing stages to store, during the modified operation mode, data from its corresponding stage of the plurality of different image analysis or processing stages, and wherein the stage-adjunct data buffer is accessible to a user to acquire data from its corresponding stage of the plurality of different image analysis or processing stages, and wherein the one or more image analysis or processing stages responsible for creating the display anomaly is identified based on the data stored in the stage-adjunct data buffer corresponding to the one or more image analysis or processing stages.