Patent ID: 8473644

Claim:
A method comprising: instantiating in non-transient storage accessible to an I/O memory management unit (IOMMU) a mapping data structure that separately codes for each of plural device-specific I/O domains, mapping information for mapping transactions from the device-specific input/output (I/O) domains to a host domain, the mapping information including (i) address translations and, for at least some of the device-specific I/O domains, (ii) operation translations to be applied to transactions associated with an address translation window for a respective one of the device-specific I/O domains; specifying for at least a portion of an address translation window for a first one of the device-specific I/O domains, a first operation translation; and specifying for at least a portion of an address translation window for a second one of the device-specific I/O domains, a second operation translation, the second operation translation differing from the first; wherein the method is performed by a hypervisor in correspondence with a partitioning of physical I/O resources into logical I/O devices corresponding to the device-specific input/output (I/O) domains.