Patent ID: 7424315

Claim:
A relay circuit for use in a communication bus system including a plurality of node circuits, the relay circuit coupling the node circuits and being operable in a sleep mode and a normal mode, the relay circuit comprising: a transceiver circuit for relaying messages between the node circuits in the normal mode, the transceiver circuit including a transmitter and a receiver which are both powered down in the sleep mode and powered up in the normal mode; a detector circuit for detecting an incoming message at least when the relay circuit is in the sleep mode; a mode control circuit arranged to power up the transceiver in response to detection of an incoming message by the detector circuit, wherein the mode control circuit is arranged to cause the transceiver to relay a remainder of the incoming message after power up; a power supply circuit with a charge-up capacitor, the power supply circuit being operable in at least a sleep mode and a normal mode, the power supply circuit being arranged to charge-up the charge-up capacitor in the sleep mode at a lower rate than in the normal mode under control of the mode control circuit; the detector receiving power from the charge-up capacitor in the sleep mode; the transceiver circuit being coupled to the charge-up capacitor, the transceiver circuit comprising an interrupter circuit for interrupting power consumption from the power supply circuit by the transceiver; the mode control circuit being arranged to lift said interruption upon said detection of the incoming message, the mode control circuit causing the transceiver circuit to start relaying the remaining part of the incoming message in advance of a time at which the power supply circuit starts providing a higher recharge rate during switch-over from the sleep mode to the normal mode.