Patent ID: 8076221

Claim:
A method for fabricating a thin film transistor, comprising: providing a substrate; forming a patterned polysilicon layer on the substrate; forming a metal layer over the patterned polysilicon layer and the substrate; removing a portion of the metal layer while retaining a portion of the metal layer on the respective sides of the patterned polysilicon layer to form a source and a drain; forming a gate insulation layer over the substrate to cover the source, the drain and the patterned polysilicon layer; forming a gate on the gate insulation layer; forming a first dielectric layer over the substrate to cover the gate insulation layer and the gate; forming a first contact opening and a second contact opening in the first dielectric layer and the gate insulation layer to expose the source and the drain respectively; and forming a first metal contact layer and a second metal contact layer over the first dielectric layer to fill the first contact opening and the second contact opening and connect electrically with the source and the drain respectively.