Patent ID: 8685850

Claim:
A method of making a semiconductor device comprising: forming a transistor by: forming a gate electrode over a semiconductor substrate; forming source and drain regions adjacent to the gate electrode in the semiconductor substrate; selectively forming a metal gate contact directly connected to the gate electrode, the gate contact being positioned over the gate electrode, the gate electrode being positioned over a channel region that is positioned between the source region and the drain region; performing a blanket etch of the substrate, without a mask present, and including performing the blanket etch on an exposed surface of the gate contact; forming a first insulating layer as a conformal deposition over the substrate and the gate contact; forming a second insulating layer as a planarizing layer over the first insulating layer; forming a pattern masking layer overlying the second insulating layer, the pattern masking layer having a patterned opening that extends as a single opening overlying the gate electrode and the source and the drain regions of the transistor; etching a single opening in the second insulating layer that extends across the source region, the drain region, and the gate electrode to provide access to the source and drain regions with the single mask opening.