Patent ID: 8742423

Claim:
A thin-film transistor array, wherein a thin-film transistor is disposed in a matrix array, the thin-film transistor including a gate electrode that is formed on a substrate, a gate insulating layer that is formed on the gate electrode, a source electrode that is formed on the gate insulating layer, a pixel electrode that is formed on the gate insulating layer, a drain electrode that is connected to the pixel electrode via a connection electrode, and a semiconductor layer that is formed between the source electrode and the drain electrode, the gate electrode is connected to a gate line while the source electrode is connected to a source line, the thin-film transistor is formed within a region of the source line and the thin-film transistor array includes a stripe insulating film that covers the source line and the semiconductor layer, wherein the source line includes a notch in part thereof, the drain electrode is formed in the notch, and the source line doubles as the source electrode, wherein the drain electrode has a linear shape along a substantial center line in the source line region, the linear shape has a long side and a short side, a direction of the long side is parallel to a direction of the source line, the source line is formed so as to double as the source electrode, and the source electrode has a shape in which the source electrode substantially surrounds the drain electrode, wherein a combined body of the drain electrode and the connection electrode has a T-shape or an L-shape, and wherein four sides of the drain electrode other than a connection part of the drain electrode and the connection electrode are surrounded by the notch of the source line, the four sides including a pair of the long sides and a pair of the short sides.