Patent ID: 7385260

Claim:
A semiconductor device, comprising: a gate insulation layer on an active region of a semiconductor substrate; a gate electrode on the gate insulation layer; a lightly-doped source/drain region at both sides of the gate electrode in the active region; a first spacer on sidewalls of the gate electrode and on at least a portion of the lightly-doped source/drain regions, wherein the first spacer is L-shaped and comprises silicon oxide; a second spacer on the first spacer, wherein the second spacer comprises silicon nitride; a heavily-doped source/drain region at both sides of the gate electrode and adjacent to the second spacer; a cobalt silicide layer on the heavily-doped source/drain regions; and a subsidiary layer covering the cobalt silicide layer, the first spacer and the second spacer, wherein the subsidiary layer has a higher oxygen concentration in a lower portion of the subsidiary layer contacting the cobalt silicide layer than in another portion of the subsidiary layer not contacting the cobalt silicide layer.