Patent ID: 8288896

Claim:
A voltage inverter comprising: two input voltage terminals (V + , V âˆ’ ); Nâˆ’1 direct voltage generators which are connected in series between the two input voltage terminals (V + , V âˆ’ ) and are connected together by a middle point (B i , i being an integer and 1â‰¦iâ‰¦(Nâˆ’2)), two terminal generators of the Nâˆ’1 generators being connected directly to one of the two input voltage terminals, wherein the Nâˆ’1 generators include 3Nâˆ’5 series connected elementary direct voltage generators, the two terminal generators of the Nâˆ’1 generators connected directly to one of the two input voltage terminals (V + , V âˆ’ ) including two elementary direct voltage generators and the other generators of the Nâˆ’1 generators including three elementary generators, the elementary generators of one generator being series connected by a middle point (A i , i being an integer and 1â‰¦iâ‰¦2Ã—(Nâˆ’2)); two first commutation branches each connected between an output terminal (V S ) and one of the two input voltage terminals (V + , V âˆ’ ), each commutation branch comprising Nâˆ’1 series connected commutation cells connected together by a middle point (C i , i being an integer and 1â‰¦iâ‰¦2Ã—(Nâˆ’2)); a controller for the commutation cells of the two first commutation branches; 2Nâˆ’4 other commutation branches which are each connected between one of the middle points (A i ) connecting two elementary generators of one generator and one of the middle points (C i ) connecting two commutation cells of one commutation branch, each branch of the 2Nâˆ’4 other commutation branches comprising a pair of commutation cells bidirectional in terms of voltage and current, the two commutation cells of one pair of commutation cells bidirectional in terms of voltage and current being connected by a middle point (D i , i being an integer and 1â‰¦iâ‰¦2Ã—(Nâˆ’2)); Nâˆ’2 pairs of diode cells, each pair of diode cells being connected between a middle point (Di) of one of the 2Nâˆ’4 other commutation branches and a middle point (Dnâˆ’2+i) of a different one of the 2Nâˆ’4 other commutation branches, each diode cell of the Nâˆ’2 pairs of diode cells including at least one diode; the diodes of the diode cells of one pair of diode cells being series connected, in the same direction, and being connected together by a middle point (Bi) connecting two consecutive generators of the Nâˆ’1 direct voltage generators; and a controller for effecting commutation of the commutation cells of said 2Nâˆ’4 other commutation branches.