Patent ID: 7154941

Claim:
In a modem that selectably operates upon digital data, an improvement of apparatus for transforming and coding of the digital data, said apparatus comprising: an instruction memory device containing indicia associated with algorithms that operate to effectuate the transforming and coding of the digital data; a vector processor formed of a first processing device and at least a second processing device positioned in parallel with one another to permit parallel operation, said vector processor for executing the algorithms, indicia of which are stored at said instruction memory device, that effectuate the transforming and coding of the digital data; and a scalar processor coupled to said instruction memory device, said scalar processor for selectably retrieving the indicia contained at said instruction memory device and selectably providing the indicia to said vector processor, wherein said indicia are formatted according to a formatting scheme, and said scalar processor is configured to examine unclassified fields in said indicia to determine whether to forward said indicia to said vector processor for processing, or to process the indicia at the scalar processor.