Patent ID: 8497536

Claim:
An apparatus comprising: a first imaging system including a frontside illuminated (FSI) array of imaging pixels disposed within a first semiconductor die, wherein each FSI imaging pixel includes a photodiode region for accumulating an image charge in response to light incident upon a frontside of the FSI array of imaging pixels; a first metal stack disposed on a first side of the first semiconductor die and including FSI readout circuitry coupled to the first imaging system to readout image data from each of the FSI imaging pixels of the FSI array of imaging pixels; a second imaging system including a backside illuminated (BSI) array of imaging pixels disposed within a second semiconductor die, wherein each BSI imaging pixel includes a photodiode region for accumulating an image charge in response to light incident upon a backside of the BSI array of imaging pixels; a second metal stack disposed on the second semiconductor die and including BSI readout circuitry coupled to the second imaging system to readout image data from each of the BSI imaging pixels of the BSI array of imaging pixels; and a bonding layer to bond the second metal stack to a second side of the first semiconductor die.