Patent ID: 8094109

Claim:
A multilevel voltage generating circuit comprising: a first resistance element; a first input node provided on said first resistance element and supplied with a first reference voltage; a second input node provided on said first resistance element and supplied with a second reference voltage, wherein a static current substantially flows in a first specific area for a line between said first and second input nodes on said first resistance element based on a difference between said first and second reference voltages; and a first group of output nodes provided for said first resistance element to output a portion of a plurality of level voltages based on said first and second reference voltages, wherein a first one of said first group of output nodes for one of said plurality of level voltages, which is closest to said first reference voltage, is separated from a direct connection with the first input node via the first resistance element, such that the first one of said first group of output nodes is provided in an area without any static current outside said first specific area.