Patent ID: 8751987

Claim:
A method of resistor matching in analog integrated circuit layout, comprising the following stages: analyzing shapes of mismatching resistor blocks to obtain geometrical information for deforming the mismatching resistor blocks; deforming the mismatching resistor blocks into centrosymmetrical blocks according to the obtained geometrical information, each said mismatching resistor block being decomposed to a plurality of unit-resistors; and placing the unit-resistors into matching resistor blocks to return a resulting layout with improved matching quality by reducing centroid offset between a centroid of the unit-resistors and a centroid of the matching resistor block; wherein a step of evaluating degree of centrosymmetry of the mismatching resistor block is performed by rotating the mismatching resistor block 180 degrees and then comparing the rotated mismatching resistor block to the original mismatching resistor block.