Patent ID: 7273786

Claim:
A method for fabricating a semiconductor memory cell for nonvolatile information storage, the method which comprises: providing a memory gate configuration having a plurality of memory gate regions in which each one of the plurality of the memory gate regions is constructed for substantially independently storing information such that a corresponding plurality of information units can be stored independently of one another; providing a source/drain configuration constructed for accessing the memory gate configuration; providing a control gate configuration for controlling access to the memory gate configuration; and constructing the plurality of the memory gate regions to replace at least a part of an original gate of a conventional MOSFET, by: first, using self-aligning polysilicon technology to form a conventional MOSFET having an original gate embedded in an insulation region; second, removing the original gate of the MOSFET to create a recess in the insulation region embedding the original gate; and third, forming the plurality of the memory gate regions in the recess embedding the plurality of the memory gate regions in an insulating manner, and providing the control gate configuration.