Patent ID: 7701431

Claim:
A display device being characterized in that gate signal lines which are extended in the x direction and are arranged in parallel in the y direction, a scanning signal driving circuit which supplies scanning signals to respective gate signal lines, drain signal lines which are extended in the y direction and are arranged in parallel in the x direction, and a video signal driving circuit which supplies video signals to respective drain signal lines are formed on one surface of an insulating substrate, the display device includes a first thin film transistor which is driven by the scanning signals from one side of the gate signal line and a pixel electrode to which the video signals from one side of the drain signal line are supplied through the first thin film transistor in each pixel region which is surrounded by the respective signal lines, the video signal driving circuit includes a dynamic memory which is comprised of a plurality of other thin film transistors formed in parallel with the first thin film transistor, wherein each of the plurality of other thin film transistors includes a gate electrode, a first electrode and a second electrode, wherein the plurality of other thin film transistors include a second thin film transistor, a third thin film transistor and a fourth thin film transistor, wherein the first electrode of the second thin film transistor is electrically connected with one of the drain signal lines, wherein the second electrode of the second thin film transistor electrically is connected with the gate electrode of the third thin film transistor, wherein the first electrode of the third thin film transistor is electrically connected with the second electrode of the fourth thin film transistor, wherein the second electrode of the third thin film transistor is electrically connected with the gate electrode of the fourth thin film transistor, wherein the first electrode of the fourth thin film transistor is electrically connected with the one of the drain signal lines, and wherein the third thin film transistor is covered with a conductive film having a potential which is fixed through an insulation film.