Patent ID: 7176871

Claim:
A digital data driver, comprising: a plurality of data lines, each transferring first data during a first period and second data during a second period; a first shift register outputting a first enable signal during the first period; a second shift register outputting a second enable signal during the second period; and a plurality of transmission controllers coupled to the plurality of data lines respectively, each having first to fourth latches connected in series and a first inverter; wherein each transmission controller stores the first data and the second data in the second latch and the first latch respectively according to the first enable signal and the second enable signal; each transmission controller outputs the first data stored in the second latch to the fourth latch and outputs to a first DAC according to a third enable signal; each transmission controller outputs the second data stored in the first latch to the third latch and outputs to a second DAC through the first inverter according to a fourth enable signal.