Patent ID: 8495349

Claim:
A method of administering computer processor execution of Basic Input/Output Services (‘BIOS’) code, the BIOS code comprising a primary BIOS code and a recovery BIOS code, the primary and recovery BIOS code stored in read-only memory (‘ROM’), the ROM operatively coupled to a control module and the processor, the control module configured to control startup operations of the processor, the method comprising: determining, by the control module, a size of the ROM; generating, by the control module in dependence upon the size of the ROM, an address for the primary BIOS code and an address for the recovery BIOS code; wherein the generating of the recovery address comprises: generating a first available memory address comprising a bit pattern of all ones as the address of the primary BIOS code; determining a masking code in dependence upon the size of the ROM, the masking code comprising a bit pattern for inverting a most significant bit of the address of the primary BIOS code; and inverting, by use of the masking code, to generate the address of recovery BIOS code, the most significant bit of the address of the primary BIOS code by performing a bitwise XOR operation with the masking code and address of the primary BIOS code, a bit of the masking code corresponding in location to the most significant bit of the address of the primary BIOS code, the bit of the masking code having a value of one and all other bits of the masking code having a value of zero; starting, by the control module, operation of the processor for execution of the primary BIOS code including providing, to the processor, the address for the primary BIOS code; and if executing the primary BIOS code fails, restarting, by the control module, operation of the processor for execution of the recovery BIOS code including providing, to the processor, the address for the recovery BIOS code to the processor.