Patent ID: 7294544

Claim:
A method for fabricating a metal-insulator-metal capacitor comprising: providing an insulating layer overlying a conducting line on a semiconductor substrate; etching through said insulating layer to form contact/via openings to said conducting line; filling said contact/via openings with metal plugs; depositing a first metal layer overlying said insulating layer and said metal plugs; depositing a capacitor dielectric layer overlying said first metal layer wherein said capacitor dielectric layer is deposited as a dual layer, each layer deposited within a separate chamber whereby pinholes within said capacitor dielectric layer are eliminated; depositing a second metal layer overlying said capacitor dielectric layer; patterning said second metal layer to form a top plate electrode; and thereafter patterning said capacitor dielectric layer and said first metal layer to form a bottom plate electrode completing said fabrication of said metal-insulator-metal capacitor.