Patent ID: 6934789

Claim:
A bus data interface that transmitting data on a PCI bus, comprising: a high-bit transmitting buffer, to buffer a high-bit data; a low-bit transmitting buffer, to buffer a low-bit data; a multiplexer, coupled to the high-bit transmitting buffer and the low-bit transmitting buffer and receiving an internal bus clock, wherein the multiplexer alternatively outputs the high-bit transmitting data or the low-bit transmitting data to the PCI bus in response to a high potential level and a low potential level of the internal bus clock; a strobe generator, to generate a data strobe signal in response to the internal bus clock when the bus data interface outputs data to the PCI bus; and a data distributor, coupled to the PCI bus, for receiving the high-bit receiving data and the low-bit receiving data from the PCI bus in repines to the data strobe signal; wherein the strobe generator uses either a bus grant signal pin or a bus request signal pin as an output pin to transmit the data strobe signal.