Patent ID: 7535105

Claim:
A structure comprising: a first chip including a first circuit and a first metal pad abutting a front surface of a first inter-layer dielectric layer thereupon; a second chip including a second circuit and a second metal pad abutting a front surface of a second inter-layer dielectric layer thereupon; an intermediate insulator layer consisting of silicon oxide, silicon nitride, or a combination thereof and abutting front surfaces of said first and second inter-layer dielectric layers, wherein the first and second circuits and said intermediate insulator layer form a chip-to-chip wireless signal transmission path for transmitting signals through said intermediate insulator layer through inter-chip capacitive coupling; a conductive interconnect embedded in said intermediate layer and vertically abutting said first metal pad and said second metal pad; and an electrostatic discharge (ESD) protection path between the first and second chips through said intermediate insulator layer and including said conductive interconnect, said first metal pad, and said second metal pad.