Patent ID: 7382153

Claim:
A circuit for calibrating a resistance value on an integrated circuit comprising: a resistor network comprising: a plurality of resistor and switch pairs in parallel, wherein each resistor and switch pair comprises a resistor and a controllable switch in series; a servo resistor in series with a servo resistor switch, wherein the servo resistor and servo resistor switch are in parallel with the plurality of resistor and switch pairs; and a non-switched resistor in parallel with the servo resistor and the plurality of resistor and switch pairs, wherein current flowing through the resistor network produces a calibration voltage; a reference voltage generator for producing a reference voltage; a comparator for comparing the reference voltage with the calibration voltage; a servo loop for generating a shift register gating signal, the servo loop comprising: a current sample register for storing a current comparator output data value; a previous sample register for storing a previous comparator output data value; a first control logic for generating a preliminary gating signal responsive to the current comparator output data value and the previous comparator output data value; a second control logic for generating the shift register gating signal responsive to the preliminary gating signal and a reference clock; a shift register which upon receipt of a shift register gating signal at a first state inputs the current comparator output data value to shift data bits through the shift register, the shift register comprising a plurality of serially coupled flip-flops, wherein a data output of each flip flop of the plurality of serially coupled flip-flops is coupled to and controls an associated controllable switch at the plurality of resistor and switch pairs, and wherein the current comparator output data value is output to and controls the servo resistor switch.