Patent ID: 8184738

Claim:
A clock reproducing apparatus comprising: a data detection unit which receives data of a duobinary transmission signal which has a data eye size Veye, a reproducing clock, a first reference potential and a second reference potential, detects the data of the duobinary transmission signal using the first reference potential which is for determining an intermediate data level and a maximum data level of the duobinary transmission signal and the second reference potential which is for determining the intermediate data level and a minimum data level of the duobinary transmission signal, and decodes the detected data; a phase comparison unit which outputs a signal for advancing a phase of the reproducing clock or a signal for delaying the phase of the reproducing clock on a basis of the decoded data; a reference clock generator which generates a reference clock; and a phase adjustment circuit which receives the reference clock, adjusts a phase of the reference clock based on the signal for advancing the phase of the reproducing clock or the signal for delaying the phase of the reproducing clock, and outputs the adjusted reference clock as the reproducing clock, wherein, when a potential difference between an intermediate potential indicating the intermediate data level and a maximum potential indicating the maximum data level is Veye, the first reference potential is set higher than the intermediate potential and less than Veye from the intermediate potential.