Patent ID: 8836102

Claim:
A multilayered semiconductor device, comprising: a first semiconductor package, comprising: a first semiconductor element; and a first wiring board having the first semiconductor element mounted on one surface thereof and having a plurality of connection pads for electric connection to an outside formed on another surface thereof; a second semiconductor package, comprising: a second semiconductor element; a second wiring board having the second semiconductor element mounted on one surface thereof; and a first encapsulating resin for encapsulating the second semiconductor element therein; and a plate member disposed between the first semiconductor package and the second semiconductor package, wherein: the first semiconductor package, the plate member, and the second semiconductor package are stacked in this order; the first wiring board and the second wiring board are electrically connected to each other via a metal wire through one of a notch and an opening formed in the plate member; and the first semiconductor element, the second semiconductor package, and the metal wire are encapsulated in a second encapsulating resin.