Patent ID: 7936012

Claim:
A semiconductor device, comprising: a substrate; a first recessed channel transistor in an active region of the substrate, the first recessed channel transistor comprising a first recessed gate structure having an upper surface that is recessed below an upper surface of the substrate, a first contact region and a second contact region; a second recessed channel transistor in the active region of the substrate, the second recessed channel transistor comprising a second recessed gate structure having an upper surface that is recessed below the upper surface of the substrate, a third contact region and the first contact region; a first conductive pad on and electrically connected to the first contact region; a second conductive pad on and electrically connected to the second contact region, the second conductive pad also being on the first recessed gate structure; a third conductive pad on and electrically connected to the third contact region, the third conductive pad also being on the second recessed gate structure; a first spacer between a first sidewall of the first conductive pad and a sidewall of the second conductive pad; and a second spacer between a second sidewall of the first conductive pad and a sidewall of the third conductive pad.