Patent ID: 8079528

Claim:
A chip for a smart card including a plurality of electrical contacts for communication of data with a smart card reader, said chip comprising: a core circuit; a plurality of input/output pads corresponding to the electrical contacts, wherein said input/output pads including a power supply pad and a ground pad are divided into at least a first column and a second column placed immediately adjacent to the first column, such that the first and second columns form a cluster, wherein the cluster further comprises at least one or more edge cells having a guard-ring structure to prevent latch-up; and an electrostatic discharge network including at least one VDD bus coupled to the power supply pad and at least one GND bus coupled to the ground pad, such that the VDD bus and the GND bus are placed substantially parallel to the first and second columns, and wherein the at least one VDD bus is placed on each side of the cluster and the GND bus is placed between the first and second columns, and each of the input/output pads is coupled to the at least one GND bus or to the at least one VDD bus through an electrostatic discharge unit, thereby providing a shortened ESD discharge path.