Patent ID: 8525293

Claim:
A semiconductor structure comprising: a semiconductor substrate; a collector located in said semiconductor substrate; a shallow trench isolation (STI) structure adjoining and surrounding said collector; at least one pad layer located directly on said STI structure; an intrinsic base layer located directly on said collector and directly on said at least one pad layer; an emitter located directly on said intrinsic base layer; an extrinsic base layer self-aligned to said emitter and directly contacting said intrinsic base layer; a contiguous structure that is topologically homomorphic to a torus and including a dielectric material and laterally surrounding said emitter and contacting inner sidewall surfaces of said emitter, wherein outer sidewalls of said contiguous structure and outer sidewalls of said emitter are within same vertical planes; and a mesa structure having substantially planar and vertical sidewall surfaces, wherein each of said sidewall surfaces contains a surface of said at least one pad layer, a surface of said intrinsic base layer, and a surface of said extrinsic base layer.