Patent ID: 7630237

Claim:
In a non-volatile memory including an array of multi-state storage elements connected in a plurality of columns along bit lines and along one or more rows each connected to a corresponding word line, a method of concurrently programming a plurality of the storage elements connected along a common word line from an initial condition to one of a plurality of data states, comprising: providing for each of said plurality of the storage elements connected along the common word line a corresponding target state from said plurality of data states; and biasing said plurality of the storage elements, wherein the biasing includes: independently limiting the current on each of the respective bit lines to which said plurality of the storage elements are connected to not exceed a value selected from a plurality of values dependent upon the corresponding target state of the respective storage element; and subsequently applying a programming waveform to the common word line while the respective bit lines are concurrently so limited to two or more different ones of said values.