Patent ID: 8729937

Claim:
A coarse lock detector comprising first through p-th detection cells which receive first through p-th multiphase clocks generated by incrementally delaying a reference clock, wherein the first through p-th detection cells are divided into a first detection cell group comprising the odd-numbered detection cells and a second detection cell group comprising the even-numbered detection cells, where p is an integer equal to or greater than three, and wherein each detection cell in the first detection cell group is directly connected to at least one other detection cell in the first detection cell group, and each detection cell in the second detection cell group is directly connected to at least one other detection cell in the second detection cell group, wherein the first detection cell receives a first input signal and generates an output signal, and each of the second through p-th detection cells receives first and second input signals and generates an output signal, and wherein the second input signal of the second detection cell is the output signal of the first detection cell.