Patent ID: 7696064

Claim:
A method for manufacturing a package, comprising: providing a semiconductor substrate having a first surface and a second surface opposed to the first surface; forming a void through a portion of the semiconductor substrate, the void extending from the first surface of the semiconductor substrate in the direction of the second surface; forming a recess in the first surface of the semiconductor substrate in the direction of the second surface; filling partially the void from a first opening in the first surface of the semiconductor substrate with a first conductive fill material to enclose the void within the semiconductor substrate; applying a bond layer on the first surface of the semiconductor over the first conductive fill material; bonding a wafer to the semiconductor substrate using the bond layer, such that a semiconductor device mounted on the wafer is received in the recess in the first surface of the semiconductor substrate; exposing the void by removing material from the second surface of the semiconductor substrate in the direction of the first surface; and filling the void from a second opening created by the exposing the void in the second surface with a second conductive fill material, wherein the filling partially the void from the first opening in the first surface and the filling the void from the second opening created by the exposing the void produce a continuously filled electrically conductive via in two filling steps.