Patent ID: 7368331

Claim:
A method of manufacturing a thin-film transistor comprising a substrate, and provided thereon, a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode, the method comprising: a) forming the gate insulating layer on the substrate; b) providing a semiconductive material on the gate insulating layer to form the semiconductor layer on the gate insulating layer; c) providing an electrode material-repellent material onto the semiconductor layer to form on the semiconductor layer a first area on which the electrode material-repellent material is provided and second and third areas on which the electrode material-repellent material is not provided, whereby an insulating area comprised of the electrode material-repellent material is formed on the first area, the second area being on one end of the first area and the third area on the other end of the first area; and then d) providing an electrode material onto the insulating area, whereby the electrode material is separated by the insulating area to form a source electrode on the second area of one end of the insulating area and a drain electrode on the third area of the other end of the insulating area.