Patent ID: 8527842

Claim:
A rate adjustment apparatus, comprising: a memory; and a processor coupled to the memory, configured to: calculate a first parameter for use as one of a plurality of judgment values; sequentially and recursively calculate a second parameter for each of a plurality of processing units into which input data is divided, the second parameter being used as another of the plurality of judgment values; the second parameter being based upon a relationship between two processing units of the plurality of processing units; receive the judgment values with respect to a set of bits forming each of the processing units, and deletes bits from or adds bits to the set of bits based on the judgment values; judge comparative magnitudes of an increment value included in the first parameter, and a computation portion of a recurrence equation corresponding to one of the two processing units with respect to which the relationship between the judgment values is represented by the recurrence equation; and obtain the second parameter for the other processing unit by subtracting the increment value from the computation portion, when it is judged as a result of judgment that the computation portion is larger than the increment value.