Patent ID: 8887027

Claim:
A solid-state mass storage device comprising: a controller; at least one nonvolatile memory device comprising pages that are organized into memory blocks, at least a first memory block of the memory blocks being assigned as wear indicator means that is excluded from use as data storage for the nonvolatile memory device, and a plurality of the memory blocks being used as data blocks for data storage whereby data are written to and erased from each of the data blocks in program/erase (P/E) cycles; means for performing wear leveling to maintain substantially the same level of usage across the data blocks; means for subjecting the wear indicator means to P/E cycles so that the wear indicator means is subjected to a number of P/E cycles that is greater than the number of P/E cycles encountered by the data blocks; means for performing integrity checks of the wear indicator means and monitoring a bit error rate thereof; and means for analyzing failure patterns over consecutive P/E cycles of the wear indicator means.