Patent ID: 6888369

Claim:
An integrated circuit comprising a differential impedance termination circuit, the differential impedance termination circuit comprising: first and second resistors; first and second transistors coupled in parallel, wherein drains of the first and second transistors are coupled to a first terminal of the first resistor, and sources of the first and second transistors are coupled to a first terminal of the second resistor; third and fourth transistors coupled in parallel, wherein drains of the third and fourth transistors are coupled to a second terminal of the first resistor, and sources of the third and fourth transistors are coupled to a second terminal of the second resistor; a third resistor having a first terminal coupled to the second terminal of the first resistor; and a fourth resistor having a first terminal coupled to the second terminal of the second resistor, the impedance termination circuit being coupled between first and second differential pins of the integrated circuit.