Patent ID: 8373226

Claim:
A device comprising: a semiconductor substrate; an isolation region formed on the semiconductor substrate; a semiconductor region surrounded with the isolation region on the semiconductor substrate and prolonged in a first direction, the semiconductor region including a first active region, a channel region, and a second active region arranged in that order and in the first direction, the channel region including a top surface, a first side surface, and a second side surface, the first side surface being extended downwardly from a first end of the top surface in a second direction different from the first direction, the second side surface being extended downwardly from a second end of the top surface in the second direction, the first side surface facing to the second side surface, and a gate electrode covering the top, first, and second side surfaces; a first diffusion layer formed in the first active region; and a second diffusion layer formed in the second active region, wherein a width from the first and second side surfaces of the channel region in the second direction is a width of the first active region in the second direction, and wherein the channel region is smaller in width by the second direction than one-half of that of the first active region.