Patent ID: 7412584

Claim:
A system for aligning data, the system comprising: a memory unit; a shifter communicatively coupled to the memory unit; control logic operable to route data from the memory unit to the shifter and to send an indication to the shifter of an amount by which the data is to be shifted, the control logic being further operable to permit at least one big endian data alignment operation to be multiplexed with at least one little endian data alignment operation, the shifting by the control logic being achieved by: (1) if the data is big endian form, directing a first part of the data to a first input of the shifter if an offset is equal to zero and directing the first part of the data to a second input of the shifter and a second part of the data to the first input of the shifter if the offset is not equal to zero, and (2) if the data is little endian form, directing the first part of the data to the first input of the shifter and directing the second part of the data to the second input of the shifter, and shifting the data on the first and second shifter circuit inputs by an amount derived from the offset.