Patent ID: 7885132

Claim:
A semiconductor memory device comprising: memory cells arranged at least in one row, each memory cell including a transistor having a gate and exhibiting gate-voltage to drive-current characteristics having temperature dependency, and said each storing data according to a threshold voltage of the transistor; voltage generating circuitry for generating a word line drive voltage having temperature dependency for compensating for the temperature dependency of the gate-voltage to drive-current characteristics of the transistors of said memory cells, said word line drive voltage having the temperature dependency changeable both in a positive direction and in a negative direction according to a control signal; at least one word line arranged corresponding to the memory cells arranged in the row, and connected to the gates of the memory cell transistors; and word line select circuitry for transmitting the word line drive voltage generated by said voltage generating circuit to said one word line when said one word line is selected, wherein said voltage generating circuitry includes: a voltage producing circuit for producing said word line drive voltage through a charge pump operation when made active, a voltage dividing circuit for dividing the word line drive voltage produced by said voltage producing circuit, a reference voltage generating circuit for generating a reference voltage having a temperature dependency, a control circuit for adjusting the temperature dependency of the reference voltage produced by said reference voltage generating circuit, and adjusting a voltage-division ratio of said voltage dividing circuit, and a level determining circuit for selectively activating said voltage producing circuit based on a comparison between the reference voltage generated from said reference voltage generating circuit and a divided voltage generated from said voltage dividing circuit.