Patent ID: 7746416

Claim:
A pixel array substrate, comprising: a support substrate; a first conductor layer, a second conductor layer, and a third conductor layer, the first, second, and third conductor layers on said support substrate; a plurality of pixel areas arranged on the support substrate, wherein each pixel area contains a pixel electrode that is part of said third conductor layer, and a capacitor electrode that is part of said second conductor layer; and scan lines and common lines that are part of said first conductor layer, wherein each common line has portions provided in respective pixel areas, wherein each pixel area has a storage capacitance defined by an overlapping area between the respective capacitor electrode and a respective one of the scan line and the common line, wherein the storage capacitances of pixel areas along each scan line varies with increasing distance from a first end of each scan line, and wherein the first conductor layer and second conductor layer are formed of metal that is electrically conductive and non-transparent.