Patent ID: 6930042

Claim:
A method for producing a semiconductor component, which comprises the steps of: providing a polymer stud grid array substrate, the substrate having an encapsulation region and a chip mounting location in the encapsulation region; coating the substrate with a metalization or metalization layer; structuring or patterning the metalization or metalization layer with a laser radiation to form interconnects at least in the encapsulation region, the interconnects having chip contact-making locations in the encapsulation region and having extensions extending a distance in a direction toward adjacent interconnections without directly adjoining the adjacent interconnections outside the encapsulation region, the distance between the extensions being small enough and a number of the extensions being large enough to inhibit a molding compound for the encapsulation from escaping; applying at least one chip to the chip mounting location and connecting the chip to the chip contact-making locations; and applying an encapsulation in the encapsulation region around the chip.