Patent ID: 7479904

Claim:
An encoder, comprising: a buffer that stores data associated with a communication signal; a DC-Check circuit that generates a metric as a function of the data; a DC tracking block to generate an invert signal as a function of the metric, wherein the invert signal has an inverted state and a non-inverted state; and an inverter unit that controls an inverter bit of an output of the buffer based on the invert signal such that an average DC value of the data approaches zero, wherein the metric is selected from a group consisting of a maximum absolute value of a running digital sum of the data, a maximum DC offset introduced by a filtering operation, a maximum DC offset of a DC correction circuit, a maximum absolute value of a filtered output of the data, a maximum DC offset slope change of the running digital sum of the data, a count of the quantity of times the metric is above or below a threshold, and combinations thereof.