Patent ID: 8183845

Claim:
A buck regulator for converting an input DC voltage, V + , into an output DC voltage level comprising: a coupled inductor for outputting the DC voltage level, a pulse width modulator (PWM) with an error amplifier for sensing an error in the outputted DC voltage level and providing a pulsed waveform having a duty cycle responsive to the error, a V + supply voltage driver for outputting the V + voltage level responsive to the pulsed waveform, the V + supply voltage being the input DC voltage, a super voltage driver for outputting a super voltage level responsive to the pulsed waveform, wherein the super voltage level is approximately twice the V + voltage level, the outputted super voltage level being complementary to the outputted V + voltage level, dual MOSFETs having gates for, respectively, receiving the super voltage level and the V + voltage level, and the dual MOSFETs driving the coupled inductor for outputting the DC voltage level, wherein the dual MOSFETs include upper and lower MOSFETs, a gate of the upper MOSFET receives the super voltage level, and a gate of the lower MOSFET receives the V + voltage level.