Patent ID: 7076744

Claim:
A circuit design method executed by a computer for designing a processing circuit for applying a plurality of different first processings to predetermined data comprising: a first step of identifying second processings performing the same processing on the same data in pluralities of second processings forming each of said plurality of different first processings; a second step of designing a processing circuit comprising a first processing circuit shared by said plurality of different first processings and performing said second processings identified in said first step, and a second processing circuit for performing processings other than said second processings identified in said first step in said pluralities of second processings forming each of said plurality of different first processings; and when said plurality of different first processings are processings applying first linear transforms to said predetermined data different predetermined number of times, a third step of defining a second linear transform by combining a number of first linear transforms corresponding to a predetermined number of times of processing for each of the plurality of different first processings, wherein said first step further comprises identifying said second processings performing the same processing on the same data among said plurality of second processings forming said second linear transform defined for each of said plurality of different first processings at said third step.