Patent ID: 8250557

Claim:
A method of configuring a data dependency graph (DDG) for dynamic by-pass instruction scheduling, said DDG including at least one by-pass pair of nodes (A i P , A i S ) comprising a predecessor node A i P and a successor node A i S connected by a by-pass edge, said method comprising: (i) annotating each successor node A i S with a set of immediate predecessor nodes A i P to form a by-pass list BPL(A i S ) of by-pass pairs (A i P , A i S ); (ii) for each by-pass list BPL(A i S ) selecting from said each by-pass list BPL(A i S ) a given predecessor node A i P for which early seceduling would not result in an efficiency gain, and labeling said given predecessor node A i P as being bonded to its corresponding successor node A i S , such that said corresponding successor node A i S is scheduled immediately after said given predecessor node A i P ; (iii) before (ii), setting a full delay DAi for all by-pass pairs (A i P , A i S ) in said by-pass list BPL(A i S ); and (iv) after (iii) and before (ii), removing from said by-pass list BPL(A i S ) any by-pass pair (A i P , A i S ) that is a predecessor to any other by-pass pair (A i P , A i S ).