Patent ID: 7668979

Claim:
An integrated circuit comprising: a plurality of tiles, each tile comprising a processor; a switch including switching circuitry to forward data over data paths from other tiles to the processor and to switches of other tiles; a first buffer that stores data from the switch; a memory accessible to the processor; a second buffer that stores a plurality of data words retrieved from the memory; and a multiplexer that selectively provides data to the processor from the first buffer or the second buffer based on a refill signal that indicates one of multiple modes of operation, with, in a first mode of operation data words that have been received by the switch being stored in the first buffer and the multiplexer providing the data words to the processor from the first buffer, and in a second mode of operation data words that have been moved from the first buffer to the memory being retrieved from the memory and stored in the second buffer and the multiplexer providing the data words to the processor from the second buffer.