Patent ID: 7348211

Claim:
A method for fabricating semiconductor packages, comprising the steps of: preparing a plurality of substrates, wherein length and width of each of the substrates are similar to predetermined length and width of the semiconductor package respectively, and each of the substrates is mounted with at least one chip thereon; and preparing a carrier having a plurality of openings, wherein each of the openings is larger in length and width than each of the substrates; positioning the plurality of substrates in the plurality of openings of the carrier respectively, and sealing gaps between the substrates and the carrier; performing a molding process to form an encapsulant over each of the openings to encapsulate the corresponding chip, wherein an area on the carrier covered by the encapsulant is larger in length and width than the corresponding opening; performing a mold-releasing process; and performing a singulation process to cut along substantially edges of each of the substrates according to the predetermined length and width of the semiconductor package, so as to form a plurality of the semiconductor packages.