Patent ID: 8498373

Claim:
A count value generator for generating an output count value comprising: an input for receiving a synchronising count value that increments at a synchronising frequency; a counter configured to increment in response to a local clock signal running at a local frequency, said local frequency being faster than said synchronising frequency; and an interpolator for determining a frequency ratio between said local frequency and said synchronising frequency and for determining an increment value for said counter dependent on a relative amount of a maximum value of said counter with respect to said frequency ratio; wherein said counter is configured to generate a count value comprising a plurality of bits, said plurality of bits comprising a predetermined number of bits representing integer values and being output as said lower order bits of said output count value, said counter being configured to be incremented by said increment value in response to said local clock signal such that said counter attains said maximum value or a value close to said maximum value prior to said synchronising count value incrementing, said counter being configured to be reset in response to said synchronising count value incrementing; and output circuitry for outputting said synchronising count value as higher order bits of said count value and said predetermined number of bits representing integer values generated by said counter as said lower order bits of said count value.