Patent ID: 7868797

Claim:
A sample-and-hold circuit comprising: an operational amplifier including an inverting input terminal, a non-inverting input terminal, an inverting output terminal, and a non-inverting output terminal; and a first and second groups of capacitors, each being operated in first to third modes periodically, wherein positive and negative input signals being input to charge an electric charge in the first mode, the electric charge being held while positive and negative output signals being output from the operational amplifier by connecting between the inverting input terminal and the non-inverting output terminal and by connecting between the non-inverting input terminal and the inverting output terminal in the second mode, and the electric charge being discharged in the third mode; wherein the second group of capacitors shifts to the third mode when the first group of capacitors is in the first or second mode, and shift to the first or second mode when the first group of capacitors is in the third mode.