Patent ID: 8766403

Claim:
A semiconductor device, comprising: a capacitor array formed in a plurality of cells of a two-dimensional grid, comprising: a plurality of operational capacitors formed in a first subset of the plurality of cells along a diagonal of the array wherein a first operational capacitor is formed in a cell at a first edge of the capacitor array and at a first edge of the diagonal of the capacitor array; and a plurality of dummy capacitors formed about the plurality of operational capacitors in the capacitor array in a second subset of the plurality of cells to achieve symmetry in the grid about the diagonal, wherein the plurality of dummy capacitors comprise a dummy capacitor formed in a cell at a second edge of the capacitor array and at a second edge of the diagonal of the capacitor array; and wherein each one of the plurality of operational capacitors is electrically coupled to a non-adjacent other one of the plurality of operational capacitors.