Patent ID: 7424664

Claim:
A duplicate detection circuit for a receiver, comprising: a cyclic redundancy check (CRC) generator having an input for receiving frame header information, the CRC generator for generating a CRC value of the frame header information; a control circuit having an input coupled to an output of the CRC generator, the control circuit having a first output, a second output, and a control input; wherein when the control input is not set, the control circuit outputs the CRC value at the first output; and when the control input is set, the control circuit outputs the CRC value at the second output; a buffer having an input coupled to the first output of the control circuit, the buffer for storing at least a CRC value; and a compare circuit having an input coupled to an output of the buffer and another input coupled to the second output of the control circuit, the compare circuit for comparing a CRC value output at the second output of the control circuit with at least a CRC value stored in the buffer, and outputting a duplicate indication when the compared CRC values match.