Patent ID: 8171235

Claim:
A processor system, comprising: a main memory; a first processor and a second processor that operate on different sized memory access capabilities, wherein the first processor is configured to notify the second processor to perform a compare and swap operation on an address in the main memory, wherein a size of the address is less than or equal to a maximum memory transfer size for the second processor and greater than a maximum memory transfer size for the first processor, wherein the maximum memory transfer size for the second processor is larger than the maximum memory transfer size for the first processor; wherein the second processor is configured to atomically perform the compare and swap operation; and wherein the second processor is configured to notify the first processor of the success or failure of the compare and swap operation, wherein the compare and swap operation includes: performing a read-with-reservation of a stored value in the address with the second processor, performing a comparison with the second processor, wherein the comparison involves the stored value and one or more reference parameters, if the comparison is successful, performing a conditional write of a swap value to the address with the second processor.