Patent ID: 8759920

Claim:
A semiconductor device comprising: a semiconductor substrate including an active region including a plurality of device regions; a first device disposed in a first device region of the plurality of device regions, the first device including a first gate structure, first gate spacers disposed on sidewalls of the first gate structure, and first source and drain features; a second device disposed in a second device region of the plurality of device regions, the second device including a second gate structure, second gate spacers disposed on sidewalls of the second gate structure, and second source and drain features, the first and second source and drain features having a source and drain feature in common; and a contact feature disposed on the common source and drain feature and interposed between the first and second gate spacers, the contact feature including a first surface in electrical contact with the common source and drain feature and an opposing second surface; wherein a first sidewall of the contact feature is in continuous contact with a gate spacer of the first gate spacers from the first surface to the second surface, and wherein a second sidewall of the contact feature is in continuous contact with gate spacer of the second gate spacers from the first surface to the second surface, wherein a portion of the first gate structure extends beyond the active region and is in contact with a gate contact feature that extends vertically over the portion of the first gate structure without extending vertically over the active region.