Patent ID: 8085067

Claim:
A differential-to-single ended converter circuit, comprising: an input section that includes: an input differential transistor pair including a first input transistor having a control terminal coupled to a first differential input and a controllable impedance path coupled to a first detect node, and a second input transistor having a control terminal coupled to a second differential input and a controllable impedance path coupled to a second detect node; a first current path and a second current path separate from the first current path; a latching transistor pair including a first latch transistor and a second latch transistor, the first latch transistor having a control terminal coupled to the second detect node, the first latch transistor including a controllable impedance path coupled between the first current path and the first detect node only through the controllable impedance path of the first input transistor, wherein the controllable impedance path of the first latch transistor extends to a first power supply potential node via said first current path only to apply the first power supply potential directly to the controllable impedance path of the first latch transistor, and the second latch transistor having a control terminal coupled to the first detect node, the second latch transistor including a controllable impedance path coupled between the second current path and the second detect node only through the controllable impedance path of the second input transistor, wherein the controllable impedance path of the second latch transistor extends to the first power supply potential node via said second current path only to apply the first power supply potential directly to the controllable impedance path of the second latch transistor; and an output stage that enables and disables impedance paths between an output node and the first power supply node and a second power supply node according to the potentials at the first detect node and the second detect node.