Patent ID: 7990667

Claim:
A semiconductor device comprising: a first circuit block powered by voltages at first and second power supply terminals; a second circuit block powered by voltages at third and fourth power supply terminals; a first ESD (electrostatic discharge) protection circuit including a first field effect transistor having a source, a drain, and a gate, wherein the gate and one of the source and the drain are connected to said first power supply terminal, and the other of the source and the drain is connected to said third power supply terminal; and a first back gate potential adjusting circuit adapted to adjust a potential at a back gate of said first field effect transistor, wherein said first field effect transistor comprises a first conductivity type transistor formed in a first well of a second conductivity type serving as the back gate of said first field effect transistor, and wherein said first well is surrounded by a second well of the first conductivity type connected to said second power supply terminal.