Patent ID: 6875686

Claim:
Method for fabricating a damascene type structure of interconnections on a semi-conductor device, with the structure of interconnections including at least a first level of electric conductors covered by a second level of electric conductors ensuring some electric links with the electric conductors in the first level, the structure of interconnections including an electric insulation associating the material with low electric permittivity and the air or vacuum gaps, with the procedure including the following, successive steps: formation of the first level of electric conductors in a first electric insulating layer and of the second level of electric conductors in a second electric insulating layer, with the electric conductors in the first level being arranged with a predetermined spacing in order to allow, in a later step, the formation of air or vacuum gaps between the electric conductors in the first level, elimination of the second electric insulating, layer, elimination, at least partial, of the first electric insulating layer in order to eliminate at least some parts of the first layer corresponding to the air or vacuum gaps to be formed, deposit, over the structure thus obtained, of a material with low permittivity, with this deposit not filling die space between the electric conductors in the first level, whose spacing has been planned to allow the formation of air or vacuum gaps.