Patent ID: 7800402

Claim:
An integrated circuit comprising: a logic circuit that produces unboosted data signals; at least one interconnect path that receives the unboosted data signals, wherein the unboosted data signals have an associated maximum voltage level; a look-up table having a plurality of look-up table input lines; and level shifting circuitry that receives the unboosted data signals and that boosts the unboosted data signals to produce boosted data signals that have an associated maximum voltage level that is greater than the maximum voltage level of the unboosted data signals, wherein the boosted data signals are applied to the look-up table input lines by the level shifting circuitry, wherein the look-up table comprises: a plurality of programmable elements, each of which stores a look-up table entry and produces a static control signal; and a plurality of level shifters, each of which is directly connected to a respective one of the programmable elements and reduces the voltage level of the static control signal produced by that programmable element to a voltage level that is less than the maximum voltage level of the boosted data signals that are applied to the look-up table input lines.