Patent ID: 7564972

Claim:
A calculating device, comprising: first means for latching input data; a calculation unit configured to perform a calculation on asynchronous data input from an asynchronous calculation circuit, the calculation unit including an expanded transposition circuit configured to transpose and expand data from a first predetermined number of bits to a second predetermined number of bits larger than the first predetermined number, and a XOR circuit configured to receive the asynchronous data and data output from the expanded transposition circuit and to provide a calculated output; second means for latching the calculated output; means for performing a calculation on data output from the second means for latching; third means for latching data output from said means for performing the calculation; and means for selecting the input data latched in said first means for latching or the data latched in said third means for latching, based on a number of selections performed by said means for selecting, wherein said calculation unit is configured to execute a predetermined calculation on the data selected by said means for selecting, which is either the input data latched in said first means for latching or the data latched in said third means for latching, and the asynchronous data input from said asynchronous calculation circuit.