Patent ID: 7126572

Claim:
An image display method for expressing gray levels in accordance with a frame-rate-control (FRC) method using a display device having a plurality of pixels including P (P is a positive integer) sub-pixels, said method comprising: supplying K-bit (K is positive integer) input image data to a signal processing circuit; generating M (M is positive integer) time-shared frame data in time series each having P J-bit (J is positive integer of J<K and M<2 K−J ) data from K-bit input image data; and supplying said time-shared frame data to a source driver as driving data, wherein said signal processing circuit generates 2 K−J gray levels insufficient due to a difference between numbers of bits of the K-bit input image data and the J-bit time-shared frame data by using at least some of combinations of said time-shared frame data of (P×M) ways performed for each of the pixels in accordance with the 2 K−J gray levels, and when a total number of combinations of (P×M) ways of the time-shared frame data to the P sub-pixels is less than 2 K−J gray levels, i.e., P×M<2 K−J , a shortage is compensated by using at least some of (Q×M) {Q is a positive integer of (Q×M)<2 K−J } time-shared frame data values.