Patent ID: 7804320

Claim:
A system to prevent the propagation of a single event transient glitch from a driving logic cell to a driven logic cell, the system comprising: a resistor-capacitor (RC) differentiator circuit electrically coupled to an output of the driving logic cell, the RC differentiator circuit comprising a resistive circuit and a capacitive circuit, the resistive circuit coupled between the output of the driving logic cell and the capacitive circuit; and a depletion mode metal oxide semiconductor (MOS) circuit electrically coupled between the output of the driving logic cell and an input to the driven logic cell, the depletion mode MOS circuit comprising at least one depletion mode MOS transistor and the resistive circuit of the RC differentiator circuit coupled across a gate and a body of the at least one depletion mode MOS transistor such that the transient glitch voltage across the resistive circuit puts the at least one depletion mode MOS transistor in cut-off, thereby disconnecting the driving logic cell from the driven logic cell to prevent the propagation of the transient glitch.