Patent ID: 8161270

Claim:
A packet modification system comprising: a packet slicer to receive a complete packet at the packet modification system and slice the complete packet into a plurality of packet portions; a transmit-in-data buffer to receive and store the plurality of packet portions from the packet slicer and to further pass, in parallel, the plurality of the packet portions to a modification engine of the packet modification system; the packet modification engine to modify, via a programmable processor core coupled with the packet modification engine, one or more of the plurality of packet portions by implementing the following operational stages to be performed by the programmable processor core: a command fetch stage to fetch one or more commands to implement a modification on the one or more of the plurality of packet portions, a command decode stage to decode the one or more commands, an address and mask generation stage to generate, for each of the decoded one or more commands, a first pointer to packet data designating a location for data to be replaced and/or inserted within the one or more of the plurality of packet portions, the address and mask generation stage to further generate a second pointer to insertion and/or replacement data, the address and mask generation stage to further identify associated masks for respective packet portions to be applied by logically ANDing shifted data with the associated masks, a data fetch stage to fetch the insertion and/or replacement data based on the second pointer, a shift and mask stage to modify the one or more packet portions with the fetched insertion and/or replacement data based on the mask for the respective packet portion by shifting left or right by a number of bytes, the location designated by the first pointer to packet data to be replaced and/or inserted, equal to a number of bytes added or deleted from the one or more packet portions based on the one or more commands, and the shift and mask stage to further apply the associated mask for the respective packet portion; and a packet assembler to re-assemble the plurality of packet portions into a modified complete packet for egress transmission from the packet modification system.