Patent ID: 8207612

Claim:
A semiconductor device comprising: a substrate having a first edge and a second edge opposing each other in a first direction and a third edge and a fourth edge opposing each other in a second direction which intersects the first direction; a plurality of first semiconductor regions arranged in the second direction on the substrate and exposing a first main surface and having a first conductivity: a plurality of second semiconductor regions arranged in the second direction within the first semiconductor region and exposing a second main surface on the first main surface of the first semiconductor region and having a second conductivity: a control electrode arranged between the second semiconductor region of the first semiconductor region and other second semiconductor regions of other first semiconductor regions which are adjacent in the second direction; an interlayer insulation film having an aperture part which exposes the first main surface of the first semiconductor region and the second main surface of the second semiconductor region, the aperture part having an aperture shape defined by a connection part which connects at fixed intervals in the first direction extension parts adjacent in the second direction, the extension part extending in the first direction and covering a top of the control electrode; and an electrode arranged on the interlayer insulation film and which electrically connects the first main surface of the first semiconductor region and the second main surface of the second semiconductor region via the aperture part of the interlayer insulation film.