Patent ID: 7964501

Claim:
A method of fabricating a semiconductor device, the method comprising: providing a semiconductor substrate including a first landing plug and a second landing plug; forming a bit line over the semiconductor substrate, wherein the bit line is electrically coupled to the first landing plug; forming a stacked structure including a first insulating film, an etch stop film, and a second insulating film over the semiconductor substrate and the bit line; forming a mask pattern over the stacked structure to define a contact hole region; selectively etching the stacked structure with the mask pattern to form a first contact hole exposing the second landing plug; forming a second contact hole by cleaning a surface of the first contact hole, wherein an upper part of the second contact hole has a width that is larger than that of a lower part of the second contact hole, wherein the upper part of the second contact hole is surrounded by the second insulating film above the etch stop film and the lower part of the second contact hole is surrounded by the first insulating film below the etch stop film, the second contact hole exposing the second landing plug; removing the mask pattern; and forming a contact plug by filling the second contact hole, wherein the contact plug is electrically coupled to the second landing plug.