Patent ID: 8560901

Claim:
An error correction circuit comprising: a determination unit configured to determine whether a number of errors in a read word being read and extracted from a multi-level cell (MLC) is within an error correcting capability range; a read voltage control unit configured to either increase or decrease a read voltage applied to the MLC when the number of errors is outside the error correcting capability range; a codeword determination unit configured to analyze a bit error based on the increase or decrease of the read voltage, and to select a codeword corresponding to the analyzed bit error based on a selected read error pattern; and a decoding unit configured to decode a codeword for the read word when the number of errors is less than or equal to the error correcting capability range, or to decode the codeword selected by the codeword determination unit, thereby correcting the errors, wherein the codeword determination unit is configured such that the codeword determination unit analyzes frequency information for the read error pattern, the frequency information includes information indicating a number of times the read error pattern has occurred for each of one or more codewords, and the selected codeword is a codeword for which the number of times the read error pattern has occurred exceeds a reference number of times.