Patent ID: 8067804

Claim:
A semiconductor device having an SOI structure, comprising: a silicon substrate; a buried insulating layer which is formed on said silicon substrate; and a semiconductor layer which is formed on said buried insulating layer, wherein said semiconductor layer includes a body region of a first conduction type, a source region of a second conduction type and a drain region of the second conduction type, a gate electrode is formed on said body region between said source region and said drain region via a gate oxide film, said source region includes an extension layer of the second conduction type, said semiconductor layer being between the bottom surface of said extension layer and said buried insulating layer, and a silicide layer on top of said extension layer wherein the upper surface of said silicide layer is higher than the upper surface of said gate oxide film and the bottom surface of said silicide layer is higher than the upper surface of said body region between said source region and said drain region, said silicide layer is electrically connected to said body region via a diffusion layer of the first conduction type formed in said semiconductor layer, the diffusion layer extending entirely from one end of said source region to another end in a channel width direction, said drain region includes a drain diffusion region in contact with said buried insulating layer, and an extension layer of the second conduction type arranged not to reach said buried insulating layer, and said first conduction type and said second conduction type are different from each other.