Patent ID: 8195903

Claim:
A memory controller comprising: a memory interface configured to couple to a memory; and a control unit coupled to the memory interface, wherein the control unit is configured to store a first parameter indicating a maximum number of carry-over memory requests that are allowed to be executed during a predetermined time period, and a second parameter indicating a maximum number of new memory requests that are allowed to be executed during the predetermined time period; wherein the control unit is further configured to determine a memory request limit indicating a maximum number of memory requests that are allowed to be executed during the predetermined time period based on at least the first parameter and the second parameter; wherein the control unit is configured to determine the memory request limit for the predetermined time period based on the first parameter, the second parameter, and an updated memory request limit from a previous predetermined time period indicating the number of memory requests that are available to be carried over from the previous predetermined time period; and wherein the memory request limit for the predetermined time period is equal to the minimum of the updated memory request limit from the previous predetermined time period and the first parameter, plus the second parameter.