Patent ID: 7401177

Claim:
A data storage device, comprising: a memory including a plurality of memory banks; a data storage processor configured to initially arrange data in the plurality of memory banks of the memory based on an access pattern which indicates positions of desired pixels, which are access candidates, so that pixels of data between the access candidates constituting the access pattern are stored in an identical memory bank, the access pattern including a plurality of the desired pixels of data to be read simultaneously; and a data read and storage processor configured to read the data initially arranged in the plurality of memory banks of the memory so as to read pixels of data from the memory banks, wherein the access pattern is supplied to the data storage processor and the data read and storage processor are configured to read a pixel of data from a memory bank, and store the read pixel of data in a memory bank in which pixels of data in an adjacent range are stored, the adjacent range being defined in ranges based on a direction in which the access pattern is moved, the ranges being defined by locations of the access candidates of the access pattern, and wherein the data storage processor is configured to initially arrange all of the data in the plurality of memory banks of the memory by determining whether or not a pixel of data to be stored is matched to one of the plurality of desired pixels constituting the access pattern, when the pixel of data is matched to the access pattern, a current value of a bit line address and a current value of a word line address are stored as a write bit line address and write word line address of a current memory bank, a bank address allocated to the memory bank is incremented, and the pixel of data is stored at the incremented bank address, a number of the plurality of desired pixels constituting an access pattern is smaller than or equal to a number of the plurality of memory banks, and when the pixel of data is not matched to one of the plurality of desired pixels constituting the access pattern, the pixel of data is stored at a current bank address at a location corresponding to the value of the bit line address being incremented.