Patent ID: 7709878

Claim:
A capacitor structure, comprising: a substrate, comprising a capacitor region and a non-capacitor region, and having a first dielectric layer and a first metal interconnect layer located in the first dielectric layer in the non-capacitor region; a butting conductive layer, disposed over the first dielectric layer in the capacitor region; a second dielectric layer, disposed over the first dielectric layer and covering the butting conductive layer; a plurality of openings, passing through the second dielectric layer, and comprising: a first opening, exposing a portion of the butting conductive layer in the capacitor region; a second opening, exposing a portion of the first metal interconnect layer in the non-capacitor region; and a third opening, exposing another portion of the butting conductive layer in the capacitor region; a bottom electrode layer, disposed on an inner walls and a bottom surface of the first opening along a contour of the first opening; a capacitor dielectric layer, conformally disposed on the bottom electrode layer in the first opening; a top electrode layer, conformally disposed on the capacitor dielectric layer in the first opening; and a second metal interconnect layer, disposed in the openings and filling the openings, wherein the second metal interconnect layer in the first opening and the second metal interconnect layer in the third opening are disconnected, and there is no dielectric layer between the butting conductive layer and the second metal interconnect layer located in the third opening.