Patent ID: 8315338

Claim:
A sampling quadrature demodulator comprising: a sampling quadrature demodulation circuit section which samples in-phase components and quadrature components of an input signal at 1/n of the carrier frequency of the input signal, and outputs, via an output terminal, the sampled in-phase and quadrature components as the sampled in-phase digital signals and quadrature digital signals; and a group delay difference compensator connected to the output terminal of the sampling quadrature demodulation circuit section, and which differentiates the delay difference between the in-phase digital signals and the quadrature digital signals, and compensates the group delay difference between the demodulated in-phase components and quadrature components, wherein sampling timing between the in-phase and quadrature components differs by ¼ of a sample period, and wherein the group delay difference compensator is configured to compensate for the sampling timing difference between the in-phase and quadrature components of ¼ the sample period.