Patent ID: 7484116

Claim:
An apparatus to access redundant data, the apparatus comprising: a verification value module comprising executable code stored on a semiconductor device, executed by a processor, and configured to calculate a first verification value for a first redundant memory and a second verification value for a second redundant memory, wherein the first redundant memory comprises a first generation count and the second redundant memory comprises a second generation count; a validation module comprising executable code stored on the semiconductor device, executed by the processor, and configured to validate the first and second verification values; and a selection module comprising executable code stored on the semiconductor device, executed by the processor, and configured to access the first redundant memory if the first verification value is equivalent to the second verification value, else identify and access the redundant memory with a most advanced generation count if the first and second verification values are valid and are not equivalent, else access the first redundant memory if the first verification value is valid and the second redundant memory is not in communication, else access the second redundant memory if the second verification value is valid and the first redundant memory is not in communication.