Patent ID: 8661664

Claim:
A method for fabricating a copper-filled via, comprising the steps of: etching a via in a dielectric; lining the via with a diffusion barrier comprising tantalum; conformally depositing a thin ruthenium layer onto the diffusion barrier in a manner by which uniform coverage of the ruthenium layer on the diffusion barrier is achieved preventing exposure and oxidation of any tantalum from the diffusion barrier and thus preventing oxidation of the diffusion barrier; depositing a thin seed copper layer on the ruthenium layer; performing a first anneal to increase a grain size of the seed copper layer, wherein the first anneal is performed in a forming gas comprising hydrogen; filling the via with additional copper; and performing a second anneal to increase the grain size of the additional copper, wherein following the second anneal the additional copper has an average cross-sectional grain width of at least 0.5 times a cross-sectional width of the via.