Patent ID: 7056828

Claim:
A method for forming a semiconductor device, the method comprising: forming adjacent conductive patterns overlying a semiconductor substrate, the conductive patterns each having a conductive line and a capping layer; forming a first spacer formation layer between the adjacent conductive patterns, the first spacer formation layer formed between the top surface of the capping layer and the bottom surface of the conductive line; conformally forming a second spacer formation layer on the conductive patterns; forming a first interlayer insulating layer on the conformal second spacer formation layer including un-etched top flat portions; forming an opening, in the first interlayer insulating layer, which extends to a portion of the first spacer formation layer; and etching the portion of the first spacer formation layer, using the second spacer formation layer including the un-etched top flat portions as an etch mask, to form a single-layer spacer on sidewalls of the conductive patterns.