Patent ID: 7135378

Claim:
A method of fabrication of a semiconductor device, comprising the steps of: die bonding of a plurality of semiconductor chips on a substrate; forming a target mark in the substrate, the target mark corresponding to the semiconductor chips; forming of a first insulation film on said substrate, wherein a top surface and at least a portion of side surfaces of said plurality of semiconductor chips are incrusted in said first insulation film; forming a second insulation film directly on and contacting the first insulation film, the minimum height of a top surface of the second insulation film exceeding the maximum height of a top surface of the first insulation film; grinding flat the second insulation film; forming a third insulation film directly on and contacting the flatly ground second insulation film; forming of a connection hole reaching a semiconductor chip of said plurality of semiconductor chips though said first insulation film, said second insulation film, and said third insulation film; and forming of wiring on said third insulation film, wherein said wiring is connected to said semiconductor chip through said connection hole.