Patent ID: 7575946

Claim:
A method for making a compound semiconductor including a substrate and a compound semiconductor layer having a lattice mismatch ratio of 2% or more relative to the substrate, the method comprising: a first crystal growth step of forming a buffer layer on the substrate, the buffer layer having a plurality of laminated buffer sublayers and a predetermined distribution of lattice mismatch ratios in the thickness direction so as to reduce strain; and a second crystal growth step of forming the compound semiconductor layer on the buffer layer, wherein, the buffer layer and the compound semiconductor layer each comprises a group III-V compound semiconductor, the entire buffer layer is formed during the first crystal growth step, the first crystal growth step of forming the entire buffer layer is carried out by metal organic chemical vapor deposition at a deposition temperature of 600° C. or less, the feed ratio of a group V raw material to a group III raw material is about 0.7, and the second crystal growth step of forming the compound semiconductor layer is carried out at a deposition temperature of 600° C. or less.