Patent ID: 7701237

Claim:
A semiconductor chip comprising: a test target circuit to which a given burn-in stress is applied; and a burn-in counter; wherein said burn-in counter acquires a first parameter indicating a test voltage applied to the test target circuit and a second parameter indicating a temperature of the test target circuit; estimates the given burn-in stress from the first parameter and the second parameter; and outputs burn-in stress information corresponding to the estimated burn-in stress; wherein the burn-in counter includes: a constant voltage circuit that outputs a reference voltage; an oscillator that receives the reference voltage and generates an oscillation signal having an oscillation frequency that is varied according to the temperature of the test target circuit; a frequency counter that receives the oscillation signal and obtains the second parameter from the oscillation signal; an A/D converter that receives the reference voltage and the test voltage and obtains the first parameter from a voltage difference between the reference voltage and the test voltage; a frequency controller that receives the first parameter and the second parameter and generates a frequency multiplication signal; a PLL circuit that receives the oscillation signal and the frequency multiplication signal and generates a multiple-frequency signal by multiplying the oscillation frequency of the oscillation signal based on the frequency multiplication signal; a frequency divider that receives the multiple-frequency signal and generates a carry signal from the multiple-frequency signal; and a counter that receives the carry signal, counts up the number of times receiving the carry signal as the burn-in stress information and outputs the burn-in stress information.