Patent ID: 8836091

Claim:
A semiconductor package, comprising: a lead frame including: a first frame member and a second frame member spaced apart from the first frame member, each frame member having an inner peripheral edge and an opposing outer peripheral edge, a plurality of spaced apart lead pads disposed between the inner peripheral edges of the first and second frame members, wherein a first set of the plurality of spaced apart lead pads are arranged in a first row along the inner peripheral edge of the first frame member and a second set of the plurality of spaced apart lead pads are arranged in a second row along the inner peripheral edge of the second frame member, wherein the first and second rows are spaced from each other, and at least one conductive lead disposed proximate the outer peripheral edge of at least one of the first and second frame members; a first semiconductor die mounted on at least one of the plurality of lead pads; at least one wire providing an electrical connection between the first semiconductor die and the lead frame; and a mold compound encapsulating the lead frame, the first semiconductor die and the at least one wire.