Patent ID: 7138690

Claim:
A metal-oxide-semiconductor (MOS) device, comprising: a semiconductor layer of a first conductivity type; a first source/drain region of a second conductivity type formed in the semiconductor layer; a second source/drain region of the second conductivity type formed in the semiconductor layer and spaced apart from the first source/drain region; a gate formed proximate an upper surface of the semiconductor layer and at least partially between the first and second source/drain regions; and a shielding structure formed proximate the upper surface of the semiconductor layer and between the gate and the second source/drain region, the shielding structure being electrically connected to the first source/drain region by way of a connection comprising a substantially vertical conductor formed in a region of the device overlying an active area of the device between the gate and the second source/drain region, the shielding structure being spaced laterally from the gate and being non-overlapping relative to the gate.