Patent ID: 7723231

Claim:
A semiconductor device comprising a first semiconductor element device and a second semiconductor element device disposed on a semiconductor substrate and insulated by a shallow trench isolation with each other, wherein the first semiconductor element device including: a first gate electrode disposed on a first gate dielectric on the semiconductor substrate; first diffusion layers disposed in the semiconductor substrate to sandwich the first gate electrode, and having a first junction depth; and a first silicide layer disposed in each of the first diffusion layers and having a first thickness, and the second semiconductor element device including: a second gate electrode disposed on a second gate dielectric on the semiconductor substrate; second diffusion layers disposed in the semiconductor substrate to sandwich the second gate electrode, and having a second junction depth greater than the first junction depth; and a second silicide layer disposed in each of the second diffusion layers and having a second thickness greater than the first thickness; the semiconductor device further comprising: first sidewall insulators disposed on side surfaces of the first gate electrode and side surfaces of the second gate electrode; and second sidewall insulators disposed on side surfaces of the shallow trench isolation.