Patent ID: 8253478

Claim:
An internal voltage generating circuit of a semiconductor device, comprising: a control signal generating circuit for generating a control signal; a first CMOS transmission gate for receiving an external power voltage and outputting the external power voltage when the control signal is inactivated, wherein the control signal is applied to gates of the first CMOS transmission gate; a second CMOS transmission gate for receiving the external power voltage and outputting the external power voltage when the control signal is activated, wherein the control signal is applied to gates of the second CMOS transmission gate; a first internal voltage generating circuit for receiving the external power voltage through the first CMOS transmission gate, and receiving a reference voltage and an internal voltage to turn the internal voltage to a reference voltage level; and a second internal voltage generating circuit for receiving the external power voltage through the second CMOS transmission gate to turn the internal voltage to an external power voltage level, wherein when the control signal is inactivated, the first CMOS transmission gate supplies the external power voltage to the second internal voltage generating circuit, and the second CMOS transmission gate does not supply the external power voltage to the second internal voltage generating circuit, wherein when the control signal is activated, the second CMOS transmission gate supplies the external power voltage to the second internal voltage generating circuit and the second CMOS transmission gate does not supply the external power voltage to the first internal voltage generating circuit, and wherein the first internal voltage generating circuit comprises a driving transistor with a power input connected to the external power voltage through the first CMOS transmission gate.