Patent ID: 7015099

Claim:
A method of manufacturing a flash memory cell comprising: forming a pad oxide film and a pad nitride film on a semiconductor substrate; forming a trench in the semiconductor substrate; forming a trench insulating film on an entire structure including the trench and then implementing a first chemical mechanical polishing (CMP) process to isolate the trench insulating film; removing the pad nitride film, by which a given portion of the trench insulating film forms a protrusion; performing an etch process to etch the protrusion of the trench insulating film a given width; forming a screen oxide film having a thickness ranging from about 30 Å to about 100 Å on an active region of the semiconductor substrate; implementing an ion implantation process for forming a well and an ion implantation process for controlling a threshold voltage on the semiconductor substrate to form a well region and an impurity region; implementing an etch process to remove the screen oxide film; implementing a wet oxidization process on the active region at a temperature ranging from about 750° C. to about 800° C. and then implementing an annealing process to form a tunnel oxide film; forming a first polysilicon layer on the entire structure and then implementing a second CMP process to form a floating gate; and forming a dielectric film and a second polysilicon layer on the entire structure and then implementing an etch process to form a control gate.