Patent ID: 7279797

Claim:
A semiconductor assembly comprising: a plurality of first substrates, each of the plurality having a first side, a second side, an aperture therethrough, a plurality of circuits located on the first side and on the second side thereof, and a plurality of connection areas on the first side thereof; a plurality of semiconductor devices, each having an active surface and a plurality of bond pads thereon, a portion of the active surface of each semiconductor device of the plurality secured to the first side of a first substrate of the plurality, a wire extending through the aperture in the first substrate of the plurality and connected to a portion of at least one circuit of the plurality of circuits on the second side of the first substrate of the plurality and a bond pad of the plurality on the active surface of a semiconductor device of the plurality of semiconductor devices; a second substrate having a first side, having a second side, and having portions of a plurality of circuits on the first side having a portion of a circuit connected to a portion of a circuit on the second side of a first substrate of the plurality; a connection between a circuit on the first substrate of the plurality and a circuit of the second substrate; a bus bar substrate having a first side, a second side, and a circuit therein; and a connection between a connection area on the first side of a first substrate of the plurality of first substrates and the circuit of the bus bar substrate.