Patent ID: 8146064

Claim:
A method, in a data processing system, for dynamically controlling a prefetching range of a software controlled cache, the method comprising: receiving source code that is to be compiled; analyzing the source code to identify at least one of a plurality of loops that contain irregular memory references; for each irregular memory reference, determining whether if the irregular memory reference within the at least one of the plurality of loops is a candidate for optimization; responsive to an indication that the irregular memory reference may be optimized, determining whether the irregular memory reference is valid for prefetching; responsive to an indication that the irregular memory reference is valid for prefetching, inserting a store statement for an address of the irregular memory reference into the at least one of the plurality of loops; and inserting a runtime library call into a prefetch runtime library to dynamically prefetch the irregular memory references associated with the at least one of the plurality of loops, wherein data associated with the irregular memory references are dynamically prefetched into the software controlled cache when the runtime library call is invoked and wherein the irregular memory references are dynamically prefetched for a lower boundary to an upper boundary of the at least one of the plurality of loops.