Patent ID: 8400066

Claim:
A magnetic logic circuit comprising: a plurality of magnetic switching cells (mCells), each mCell comprising: first and second programming terminals connected to respective ends of a low-resistance programming path; first and second evaluation terminals connected to respective ends of an evaluation path whose resistance can switch between at least a first, lower-resistance state and a second, higher-resistance state in response to signals magnetically coupled from said programming path, said programming and evaluation paths being electrically isolated; at least one of said plural mCells configured as a logic-driving cell with one of its evaluation terminals coupled, directly or indirectly, to a supply terminal and the other of its evaluation terminals connected to a programming terminal of at least two respective fanout-receiving mCells, such that when said logic-driving cell is in its lower-resistance state, current(s) coupled from said supply terminal through the evaluation path of said logic-driving cell and through the programming paths of said fanout-receiving cells set the resistance states of said fanout-receiving cells.