Patent ID: 8281222

Claim:
A microprocessor, comprising: a first plurality of fuses, selectively blown with control values; a second plurality of fuses, selectively blown collectively with an error correction value computed from the control values; control hardware, configured to receive the control values and to provide the control values to circuits of the microprocessor for controlling operation of the microprocessor; and a state machine, serially coupled to the control hardware and to the first and second plurality of fuses, the state machine configured to serially scan the control values from the first plurality of fuses to the control hardware and to serially scan the control values and the error correction value to a first register; wherein the microprocessor is configured to: read the control values and error correction value from the first register; detect and correct an error in the control values using the error correction value; write the corrected control values to a second register; and cause the state machine to serially scan the corrected control values from the second register to the control hardware.