Patent ID: 7707538

Claim:
A computer-implemented method comprising: simulating, by the computer, a photolithography process using a mask layout to produce a first simulated resist image; perturbing each edge segment in the mask layout by a predetermined amount to produce an initial perturbed layout; simulating, by the computer, the photolithography process using the initial perturbed layout to produce a second simulated resist image; determining, by the computer, a difference resist image value between the first simulated resist image and the second simulated resist image for each edge segment; creating, by the computer, a multisolver matrix that includes the difference resist image values for all edge segments; determining, by the computer, a correction delta vector using a pseudoinverse of the multisolver matrix, wherein the correction delta vector includes a correction delta value for each edge segment; perturbing each edge segment in the perturbed layout by the corresponding correction delta value in the correction delta vector to create a further perturbed layout; simulating, by the computer, the photolithography process using the further perturbed layout to produce a third simulated resist image; updating, by the computer, the multisolver matrix based on the third simulated resist image values for each edge segment; and updating, by the computer, the correction delta vector using a pseudoinverse of the updated multisolver matrix.