Patent ID: 7385853

Claim:
A data processing device having nonvolatile memory which is capable of rewriting stored information, wherein said nonvolatile memory has plural nonvolatile memory cell transistors formed in well regions having drain electrodes and source electrodes respectively coupled to bit lines and source lines and gate electrodes coupled to word lines and storing information based on a difference between threshold voltages to a word line select level in read operation, and a word driver selectively driving said word lines to a circuit ground voltage, a positive voltage or a negative voltage thereto in accordance with an operating mode, wherein said word driver has in an output stage a CMOS inverter arranged between a first terminal to which the circuit ground voltage or the positive voltage is supplied and a second terminal to which said negative voltage is supplied, and an n-channel MOS transistor connected in parallel with a p-channel MOS transistor of the CMOS inverter and switch controlled in phase, wherein in a read operation mode, when charging the read-unselected word line to be read-selected from said negative voltage to said ground voltage, the voltage of said first terminal is increased to the positive voltage while the word line at the negative voltage has the ground voltage.