Patent ID: 7217602

Claim:
method of manufacturing a semiconductor device comprising: in a SOI substrate having a silicon layer over a buried insulating layer on a silicon wafer, forming isolating layers adjacent to the silicon layer in contact with the buried insulating layer; forming a body layer having a first conductivity type in the silicon layer between the isolating layers; forming a hard mask exposing a portion of the body layer, etching the exposed portion of the body layer, and removing the hard mask to form a trench in the body layer; forming a gate insulating layer on the entire surface of the trench; forming a gate electrode on the gate insulating layer, the gate electrode being narrower than the trench; forming LDD regions having a second conductivity type in the body layer of both sides of the gate electrode, in contact with the buried insulating layer under the trench, and aligned to sidewalls of the gate electrode; forming a spacer on the sidewalls of the gate electrode; forming source and drain regions having the second conductivity type in the body layer of both sides of the spacer, in contact with the buried insulating layer; and after forming the source and drain regions, forming silicide layers on the surfaces of the gate electrode and the LDD regions.