Patent ID: 7827389

Claim:
A method, in a data processing system, for enhancing the execution of independent loads in a processing unit, the method comprising: fetching, by the processing unit, a first set of instructions into a first buffer in order until the first buffer is full, wherein the processing unit is operating in a single-threaded mode; responsive to the first buffer being filled in order, fetching, by the processing unit, a second set of instructions into a second buffer in order until the second buffer is full, wherein the second set of instructions are in order from the first set of instructions and wherein a first initial instruction of the second set of instructions has a first_bit set; dispatching, by the processing unit, the first set of instructions in order from a first buffer for execution; receiving, by the processing unit, updated results from the execution of the first set of instructions; updating, by the processing unit, in a first register, at least one register entry associated with each instruction in the first set of instructions, with the updated results; determining, by the processing unit, whether the first set of instructions from the first buffer have completed execution; and responsive to the completed execution of the first set of instructions from the first buffer; copying, by the processing unit, the set of entries from the first register to a second register; and dispatching, by the processing unit, the second set of instructions in order from the second buffer.