Patent ID: 7288968

Claim:
Circuit element, comprising: N pairs of transistor units, each pair including a first (MP) and a second (MN) complementary transistor unit with at least four nodes, where the first transistor unit includes a first node, which is connected to an upper (V DD ) voltage level, a second node connected to the second node of a complementary transistor unit, an input node that controls the current through, and the voltage over the first and second node, a control input node that controls the current/voltage characteristics of the transistor unit, and the second transistor unit includes a first node, which is connected to a lower (V SS ) voltage level, a second node connected to the second node of a complementary transistor unit, an input node that controls the current through, and the voltage over the first and second node, a control input node that controls the current/voltage characteristics of the transistor unit, where the second nodes of the respective paired transistor units also are connected to each other, and the upper and lower voltage levels (V DD , V SS ) are such that the transistor units operate in subthreshold, N input terminals (X 1 , X 2 , . . . X N ) connected to input nodes of the respective paired transistor units, an output terminal (CN) connected to input the interconnected second nodes of the paired transistor units, and at least one of the following: a control terminal (BP) connected to the control input nodes of the first transistor units, of the N paired transistors, a control terminal (BN) connected to the control input nodes of the second transistor units, of the N paired transistors, where N is an integer.