Patent ID: 8143987

Claim:
A dual inductor structure implemented within a semiconductor integrated circuit (IC), the dual inductor structure comprising: a first inductor comprising a first plurality of coils; wherein each coil of the first plurality of coils is disposed within a different one of a plurality of conductive layers, wherein the first plurality of coils is vertically stacked and concentric to a vertical axis; a second inductor comprising a second plurality of coils, wherein each coil of the second plurality of coils is disposed within a different one of the plurality of conductive layers; wherein the second plurality of coils are vertically stacked and concentric to the vertical axis; wherein a line-width of the first plurality of coils is greater than a line-width of the second plurality of coils; wherein the first plurality of coils of the first inductor is coupled in series with at least one via and the second plurality of coils of the second inductor is coupled in series with at least one via; and wherein, within each conductive layer, a coil of the second plurality of coils is disposed within an inner perimeter of a coil of the first plurality of coils.