Patent ID: 7479806

Claim:
A semiconductor integrated circuit device having a pulse generator outputting according to a differential input signal, a set pulse signal and a reset pulse signal, and a latch circuit outputting according to the set pulse signal and the reset pulse signal, a differential output signal, the pulse generator comprising: a first charge/discharge path and a second charge/discharge path sharing part of a path; a charge unit, connected to the first charge/discharge path and the second charge/discharge path, and configured to pre-charge first nodes acting as an output end of each of the set pulse signal and the reset pulse signal; two first switching units, disposed between the first nodes and a second node on the shared path, and configured to control according to the input signal, conduction and non-conduction of the first charge/discharge path and the second charge/discharge path, respectively; and a second switching unit, disposed between the second node and a reference voltage node, and configured to be turned on in a period prior to capturing the input signal to allow an electric charge accumulated at the second node to be discharged to the reference voltage node, and at the same time, configured to be turned on in a period of capturing the input signal to allow the first node to discharge, wherein: the latch circuit has a status transition circuit allowing the logical status of the output signal to transit according to the set pulse signal and the reset pulse signal, and a status holding circuit for holding the logical status of an output node of the output signal of the latch circuit according to the set pulse signal and the reset pulse signal; and the status holding circuit has a third switching unit configured to control the connection status with the output node according to a clock signal for indicating a period of capturing the input signal.