Patent ID: 6906359

Claim:
A BiFET situated on a substrate, said BiFET comprising: an HBT situated over said substrate, said HBT comprising: an emitter layer segment situated over said substrate, said emitter layer segment comprising a semiconductor of a first type; a first segment of an etch stop layer situated over said emitter layer segment, said first segment of said etch stop layer comprising InGaP; a FET situated over said substrate, said FET comprising: source and drain regions, a second segment of said etch stop layer situated under said source and drain regions, said second segment of said etch stop layer comprising InGaP; a semiconductor layer of a second type situated under said second segment of said etch stop layer in said FET; wherein said etch stop layer increases a linearity of said FET and wherein said etch stop layer does not degrade electron current flow in said HBT.