Patent ID: 7302620

Claim:
A method for sequentially storing N input bit symbols in a memory at an address from 0 to N−1 and for reading the stored bit symbols from the memory, comprising the steps of: sequentially storing input bit symbols of a given interleaver size N in a memory at an address from 0 to N−1; providing a first variable m and a second variable J satisfying the equation N=2 m ×J; and reading a Kth (0≦K≦(N−1)) bit symbol at an address determined by 2 m (K mod J)+BRO m (K/J) where BRO m (y) is the bit-reversed m-bit value of y, where y=K/J, and / is a function in which a quotient of K divided by J is obtained, the quotient being an integer.