Patent ID: 8193833

Claim:
A semiconductor integrated circuit, comprising: a first terminal supplied with a first voltage; a second terminal supplied with a second voltage having a value different from that of the first voltage; and an inverter chain circuit including a plurality of inverters connected in cascade, each of the plurality of inverters being including: a first transistor having one end connected to the first terminal; and a second transistor having one end connected to the second terminal and the other end connected to the other end of the first transistor, the plurality of inverters being connected in cascade with an output terminal of the inverter at a preceding stage connected to a control terminal of the second transistor in the inverter at a succeeding stage, the first transistors included in the inverters located at either odd-number orders or even-number orders counted from an input terminal side of the inverter chain circuit being functioning as pre-charge transistors configured to become conductive when a pre-charge signal has a first state to pre-charge the other end of the first transistors and to become non-conductive when the pre-charge signal has a second state, the first transistors other than the pre-charge transistors being configured to become non-conductive when the pre-charge signal has the first state and to become conductive when the pre-charge signal has the second state, and the pre-charge transistors having a conductivity type different from that of the first transistors other than the pre-charge transistors.