Patent ID: 7847779

Claim:
A display system using a low voltage differential signal (LVDS) interface for transmitting data signal and control signals comprising: a display panel for displaying images; a panel control circuit; a timing controller including a decoder for generating corresponding output signals based on received image signals, synchronization signals and control signals; an LVDS interface coupled to the panel control circuit and the timing controller comprising: an LVDS transmitter coupled to the panel control circuit and including a plurality of transmitting channels for outputting the image signals, the synchronization signals and the control signals generated by the panel control circuit; and an LVDS receiver coupled to the timing controller and including a plurality of receiving channels for receiving the image signals, the synchronization signals and the control signals transmitted via the plurality of transmitting channels, wherein a control signal of the timing controller is transmitted via a reserved bit of a channel TX 3 of the LVDS interface for changing a setting of the timing controller, the reserved bit of the channel TX 3 of the LVDS interface being a bit that is not officially used for signal transmission according to the LVDS bus specification; and a plurality of source drivers coupled to the timing controller for generating corresponding panel control signals based on the output signals generated by the timing controller.