Patent ID: 7636802

Claim:
A method for transferring communication data through at least one pin of a programmable logic device (PLD), comprising: sequentially transferring a plurality of portions of the communication data between the at least one pin of the PLD and at least one input/output register of an input/output block that is associated with the at least one pin; for each portion of the communication data, transferring a respective frame of configuration data, which includes the portion of the communication data, between the at least one input/output register and a frame register of a configuration port used to program programmable logic and interconnect resources of the PLD including the input/output block; and for each portion of the communication data, converting format between the portion of the communication data and the respective frame of the configuration data in the frame register of the PLD; wherein the converting format between the portion of the communication data and the respective frame of the configuration data includes implementing a low-bandwidth communication protocol by merging or extracting the portion of the communication data into or out from the respective frame of the configuration data, and wherein a particular one of the at least one input/output register of the input/output block is a three-state register that enables or disables a driver.