Patent ID: 7713820

Claim:
A method for manufacturing a non-volatile memory, the method comprising: forming a shallow trench isolation structure in a trench of a substrate; defining a recess between a top portion of the trench and the shallow trench isolation structure; forming a first dielectric layer on the substrate; forming a first conductive layer on the first dielectric layer and in the recess; forming a plurality of bar-shaped cap layers on the substrate to be oriented in a direction perpendicular to that of the isolation structure; forming a plurality of first gate structures by partially removing the first conductive layer; forming a second dielectric layer on sidewalls of the first gate structures; forming a third dielectric layer on the substrate between two adjacent first gate structures; forming a second conductive layer on the third dielectric layer; forming a plurality of second gate structures by removing the bar-shaped cap layers and a portion of the first conductive layer; and forming a doped region in the substrate at two opposite sides of each of the second gate structures.