Patent ID: 7443331

Claim:
A CMOS image sensor system comprising: (a) a first group of CMOS sensors each responsive to a periodic first clock signal edge to present an output signal representative of sampled light intensity; (b) a second group of CMOS sensors each responsive to a periodic second clock signal edge to present an output signal representative of sampled light intensity, the second clock signal edge being out-of-phase with respect to the first clock signal edge; (c) a first group of sampling switches for coupling output terminals of the first group of CMOS sensors to a first group of sampling capacitors, respectively; (d) a second group of sampling switches for coupling output terminals of the second group of CMOS sensors to a second group of sampling capacitors, respectively; (e) a sample/hold circuit having an output coupled to an input of an ADC (analog-to-digital converter); and (f) a switching circuit including an output coupled to an input of the sample/hold circuit, and also including a first group of inputs coupled to the sampling switches of the first group, respectively, and a second group of inputs coupled to the sampling switches of the second group, respectively, the switching circuit sequentially coupling sampled signals on the first group of sampling capacitors to the input of the sample/hold circuit between the first and second clock signal edges and sequentially coupling sampled signals on the second group of sampling capacitors to the input of the sample/hold circuit after the second clock signal edge.