Patent ID: 8243831

Claim:
An image deblocking filter, comprising: an instruction memory operable to store a plurality of instructions of which a first instruction represents a complex of three arithmetic operations and two bitwise operations for three variable operands and two constant operands; an execution unit operable to execute the plurality of instructions stored in the instruction memory, wherein the execution unit comprises a first arithmetic logic unit operable to execute the first instruction in a clock cycle; and a decision unit operable to decide one of a first and a second path of fetching the plurality of instructions from the instruction memory to the execution unit, wherein the execution unit when executing instructions according to the first or second path respectively realizes a deblocking formula of a first or a second image compression standard, and the chosen of the first and the second paths comprises the first instruction; wherein the first instruction when executed by the execution unit directs the deblocking filter to perform the three arithmetic operations and two bitwise operations comprising: a left shifting operation as a first bitwise operation on a first variable operand; a first adding operation as a first arithmetic operation on the shifted first variable operand and a second variable operand; a second adding operation or a subtraction operation as a second arithmetic operation based on a second mode bit in the instruction, wherein the second adding operation comprises adding the result of the first adding operation and a third variable operand, and the subtraction operation comprises subtracting the third variable from the result of the first adding operation; a third adding operation as a third arithmetic operation on the result of the second arithmetic operation and a first constant operand; and a right shifting operation as a second bitwise operation on the result of the third adding operation by the value of a second constant operand.