Patent ID: 7282931

Claim:
A method of electrically accessing a plurality of integrated circuits, each integrated circuit having a plurality of terminals, the method comprising: providing a wafer having a first and a second major surface, the plurality of integrated circuits disposed on a first major surface thereof, each of the plurality of integrated circuits having a plurality of terminals, and the plurality of integrated circuits disposed over at least a portion of the first major surface; providing a full wafer contacter having a first major surface and a second major surface, a first plurality of contact terminals disposed on the first major surface of the full wafer contacter in a pattern that corresponds to the terminal layout of the plurality of integrated circuits; and removably attaching the full wafer contacter to the wafer such that the first major surface of the wafer and the first major surface of the full wafer contacter are facing each other, the sealing ring is in contact with the full wafer contactor and the wafer, and such that at least a portion of the terminals of the integrated circuits are in electrical contact with the first plurality of contact terminals; wherein each of the first plurality of contact terminals is electrically coupled to a corresponding one of a second plurality of contact terminals disposed on the second major surface of the full wafer contacter.