Patent ID: 6855600

Claim:
A method for manufacturing a capacitor comprising the steps of: forming a field region and an active region on a semiconductor substrate, thereafter forming first contact holes for connecting with the active region by stacking a first interlayer insulating layer on an entire region; stacking a first connecting layer on the resultant structure; filling metal in such a way that the first contact holes are buried to improve contact characteristics with the active region; forming first plugs in the first contact holes by front etching; forming a metal layer in the resultant structure; forming a first photoresist layer by patterning on a portion for forming the capacitor and thereafter forming a capacitor by etching the metal layer; forming a capacitor insulating layer on a top surface and a side surface of the capacitor and thereafter forming a second connecting layer; forming a first metal line, patterning by stacking a second photoresist layer so as to block a capacitor region; exposing the first interlayer insulating layer by sequentially etching the first metal line and the second connecting layer through the patterned second photoresist; forming a second interlayer insulating layer on the resultant structure and thereafter forming second contact holes connected to the first metal line by a photolithography process; and forming second plugs in the second contact holes and thereafter forming a second metal line for use in an interconnection.