Patent ID: 7723176

Claim:
A method for manufacturing a semiconductor device with a MOS transistor, comprising: forming a gate insulating film, a first region made of a component S1, and a mask in this order in such a way that the gate insulating film, the first region, and the mask jut out from a semiconductor layer; providing gate sidewalls on both sides of the gate insulating film, the first region, and the mask; forming source/drain regions in the semiconductor layer on both sides of the first region; exposing the first region by removing the mask; depositing a metal layer at least on the exposed first region, the metal layer containing an amount of metal M1 more than an amount of metal M1 necessary to react to all the component S1 in the first region to form a first alloy made of a crystalline phase expressed by M1 x1 S1 y1 (x1 and y1 are natural numbers); converting the entire first region into a region (1) made of the first alloy through a reaction between the component S1 in the first region and the metal M1 using heat treatment; removing the metal layer containing the metal M1 that has not reacted with the component S1 in the converting of the entire first region into the region (1); depositing a second region in such a way that the second region comes into contact with at least part of the region (1), the second region containing an amount of component S1 more than an amount of component S1 necessary to react to all the first alloy to form a second alloy made of a crystalline phase expressed by M1 x2 S1 y2 (x2 and y2 are natural numbers, y2/x2>y1/x1); converting the entire region (1) into a region (2) made of the second alloy to form a gate electrode through a reaction between the component S1 in the second region and the first alloy by using heat treatment; and removing the second region made of the component S1 that has not reacted with the first alloy in the converting of the entire region (1) into the region (2).