Patent ID: 7132335

Claim:
A method of making an array of transistors, comprising: first forming an active region or a word line film; second forming a charge storage dielectric layer over the active region or the word line film; third forming a first mask over a first plurality of regions on the charge storage dielectric layer; fourth patterning the charge storage dielectric layer using the first mask to form a plurality of localized charge storage dielectrics; and fifth forming the word line film over the plurality of localized charge storage dielectrics if the active region was formed first, or forming the active region over the plurality of localized charge dielectrics if the word line film was formed first; wherein each transistor of the array of transistors comprises: a first lateral transistor portion comprising (i) a source; (ii) a first channel portion located adjacent to the source; and (iii) one of the localized charge storage dielectrics; and a second lateral transistor portion comprising (i) a drain and (ii) a second channel portion located adjacent to the drain, wherein the second transistor portion excludes a localized charge storage dielectric.