Patent ID: 8059178

Claim:
In a complementary metal oxide semiconductor (CMOS) imager, the CMOS imager comprising: a photodiode (PD) having a cathode to supply a detected voltage, and an anode connected to a first reference voltage; a transistor set having an interface connected to the PD cathode, a reset signal interface, a select signal interface, a read signal interface, and a power interface, the transistor set supplying an output signal representative of the PD detected voltage; a flush reset circuit having no more than two reference voltage interfaces including a second interface to receive a second reference voltage, with a higher potential than the first reference voltage and a first interface connected to the first reference voltage, the flush reset circuit further including a flush signal interface and a third interface connected to the power interface of the transistor set to supply a Vflush 1 signal having at least one threshold voltage different than a reset signal voltage in response to receiving a flush signal; and, wherein the transistor set supplies the Vflush 1 voltage to the PD cathode in response to receiving a reset, first read, and select signals, concurrently with the flush reset circuit receiving the flush signal in a first portion of a reset period.