Patent ID: 7826564

Claim:
A complex digital phase locked loop for use in a demodulator, comprising: a phase detector connected to receive a complex digital input signal and a complex digital feedback signal, wherein the phase detector is operable to produce a phase error indicative of a difference in phase between the complex digital input signal and the complex digital feedback signal; a controller connected to receive the phase error, wherein the controller is operable to multiply the phase error by a gain factor selected to stabilize and optimize the complex digital phase locked loop and produce an output signal for use in extracting a frequency deviation present in the complex digital input signal by another component of the demodulator; and a numerically controlled oscillator connected to receive the output signal, wherein the numerically controlled oscillator is operable to track the phase of the complex digital input signal based on the output signal and produce the complex digital feedback signal; wherein the gain factor is selected from a set of gain parameters such that the steady-state response of the phase locked loop to a frequency-step change to the complex digital input signal is proportional to the magnitude of the frequency-step.