Patent ID: 8595675

Claim:
A method of data processing, comprising: during a global placement phase of physical design of an integrated circuit, a data processing system iteratively performing: spreading a plurality of modules comprising the integrated circuit within a die area based on density of the plurality of modules; wherein the spreading comprises spreading the plurality of modules based on a density metric computed for a predetermined percentage of densest subareas of the die area; optimizing module placement by preserving global module density while improving a local objective including at least one of local wirelength and local density in individual subareas among a plurality of subareas of the die area; wherein the optimizing module placement comprises optimizing module placement utilizing force-directed placement; wherein optimizing module placement utilizing force-directed placement includes generating fixed points for the plurality of modules from module placements obtained from local objective improvement; and thereafter, performing detailed placement of modules in the plurality of subareas to obtain a placed physical design.