Patent ID: 8879608

Claim:
A single lane to multilane digital interface translator, comprising: a single receiver lane configured to receive a single input data channel at a first data rate encoded in accordance with an input digital interface standard, where the input data channel includes packets, and auxiliary data and idle data inserted between the packets, and where each packet contains encoded code groups, where the encoded code groups are encoded in accordance with the input digital interface standard and all of the encoded code groups in each packet are of the same type; multiple transmitter lanes, where at least one of the transmitter lanes is configured to transmit an output data channel encoded in accordance with an output digital interface standard; and an auxiliary channel output configured to transmit an auxiliary data channel; wherein the single lane to multilane digital interface translator is configured to extract auxiliary data inserted between received packets and output the auxiliary data via the auxiliary channel; wherein the single lane to multilane digital interface translator is configured to decode the data within the packets received on the single receiver lane to produce the encoded code groups; wherein the single lane to multilane digital interface translator is configured to deinterleave the encoded code groups and discarding the idle data so that deinterleaved encoded code groups of the same type are on each of the transmitter lanes at any given time and to decode the deinterleaved encoded code groups to obtain at least one output stream at a second data rate; and wherein the single lane to multilane digital interface translator is configured to encode the deinterleaved decoded code groups according to the type of the code group and encode the at least one output stream in accordance with the output digital interface standard.