Patent ID: 8811459

Claim:
A wireless-to-wire subsystem comprising: (a) a controller having a radio module port adapted to connect to a radio module, the controller comprising logic circuitry to receive a sequence of data packets over the radio module port, the data packets further comprising at least one data field encoding a signal value; the controller comprising logic for detecting an interruption of the sequence of data packets and the controller further comprising a subsystem interconnect bus; (b) at least a first I/O module comprising at least one physical switch and circuitry emitting at least one electrical output signal, the first I/O module adapted to communicate with the controller via the subsystem interconnect bus where communication comprises the first I/O module receiving at least a portion of the data fields of the sequence of the data packets from the controller; the first I/O module further comprising logic circuitry configured to reflect the encoded value in a first data field to a first output signal, and to update the value of the first output signal repeatedly as data packets are received; and further, the subsystem configured to force the first output signal to a default state associated with the first output signal upon detection of an interruption of the sequence of data packets by the controller; the default state associated with the first output signal being determined by the settings of the at least one physical switch, a first setting indicating a first predetermined electrical state, a second setting indicating a second predetermined electrical state, and a third setting designating the default state as the state that was encoded in the first data field of the last packet received prior to the interruption.