Patent ID: 8022856

Claim:
A successive approximation type A/D converter comprising: a reference signal generating section that generates a reference signal; a comparator that compares an analog signal input thereto with the reference signal and converts the analog signal into a digital signal; a data memory in which the digital signal resulting from the comparison is stored; a control section that controls the generation of the reference signal to perform oversampling by executing an A/D conversion process on the analog signal at the comparator plural times such that the analog signal is A/D-converted into a digital value of N bits at the first A/D conversion process and such that the second and subsequent A/D conversion processes are performed starting with a lower bit of the (N−n)-th or lower order with upper n bits of the N-bit digital value obtained at the first A/D conversion process fixed; and a data converter in communication with the data memory and that generates a digital output signal, wherein, the control section includes (a) a computing element that generates a bit string based on the results of the comparison, (b) a memory in which the bit string is stored, and (c) a redundant data memory into which redundant data can be stored, the redundant data memory being in communication with the computing element, the reference signal generating section includes (a) a thermometer code converter in communication with the memory into which the bit string is stored, (b) a capacity array, (c) a reference signal control circuit coupled between the thermometer code converter and the capacity array, the reference signal being output by the capacity array, and the data converter is in communication with the redundant data memory and converts the digital signal in the data memory based on the redundant data to eliminate redundancy and correction calculations based on the number of times oversampling is performed.