Patent ID: 7101444

Claim:
A semiconductor device comprising a substrate, a plastically relaxed layer grown on top of the substrate wherein a thickness of the plastically relaxed layer exceeds a critical thickness for plastic strain relaxation, and a defect-free layer grown on top of the plastically relaxed layer; wherein at least a part of the device is manufactured by a method of fabrication of defect-free epitaxial layers on top of a surface of the plastically relaxed layer having a first thermal evaporation rate and a plurality of defects, wherein the surface comprises at least one defect-free surface region, and at least one surface region in a vicinity of the defects, the method comprising the steps of: a) depositing a cap layer comprising a second material having a second thermal evaporation rate different from the first thermal evaporation rate, wherein the cap layer is selectively deposited on the defect-free surface region, such that at least one of the regions of the surface in the vicinity of the defects remains uncovered; b) annealing a structure created in step a) at a temperature and duration such that at least one of the surface regions in the vicinity of the defects that is uncovered evaporates, while defect-free surface regions covered by the cap layer remain unaffected, and at least one annealed region is formed; and c) depositing a third material, latticematched or nearly lattice matched to the plastically relaxed layer, such that the third material overgrows both the cap layer and annealed regions of the plastically relaxed layer forming the defect-free-layer.