Patent ID: 6928525

Claim:
A method of arbitrating a plurality of cache access requests to a cache memory having a plurality of cache lines and a plurality of access ports, comprising: detecting requests to access said cache memory from a plurality of requesters; determining whether at least two of said plurality of requesters are seeking access to an identical one of said plurality of cache lines; allowing, if said at least two of said plurality of requesters are not seeking access to said identical one of said plurality of cache lines, said plurality of requesters to concurrently access said cache memory through said plurality of access ports; selecting, if at least two of said plurality of requesters are seeking access to said identical one of said plurality of cache lines, a selected one of said plurality of requester that is seeking access to said identical cache line; allowing, said selected one of said plurality of requesters and other ones of said plurality of requesters that are not seeking said identical one of said plurality of cache lines to concurrently access said cache memory; receiving a signal indicating a completed access of said cache memory from said selected one of said plurality of requesters; selecting another one of said plurality of requesters seeking access to said identical one of said plurality of cache lines; and allowing, said selected one of said plurality of requesters and other ones of said plurality of requesters that are not seeking said identical one of said plurality of cache lines to concurrently access said cache memory.