Patent ID: 6912161

Claim:
A nonvolatile semiconductor memory device provided with a memory cell constructed of a floating-gate field-effect transistor, which has a control gate, a drain, a source and a floating gate and is able to electrically execute write and erase of information, and a read device, which has a first reference cell, the device comprising: a second reference cell; a threshold value comparing device for comparing a threshold value of the first reference cell with a threshold value of the second reference cell; and a threshold value setting device for setting the threshold value of the first reference cell based on a result of comparing the threshold value of the first reference cell with the threshold value of the second reference cell by the threshold value comparing device, wherein the read device has the first reference cell and a first sense amplifier and reads the memory cell by using the first reference cell and the first sense amplifier, and the threshold value comparing device has a second sense amplifier and compares the threshold value of the first reference cell with the threshold value of the second reference cell by means of the second sense amplifier.