Patent ID: 7137036

Claim:
A microcontroller comprising: a power-on reset circuit for issuing a power-on reset signal in response to said microcontroller being powered on; a CPU (Central Processor Unit) for executing a first initialization phase in response to the power-on reset signal, a second initialization phase in response to a start signal, and usual processing following the second initialization phase, said CPU outputting a timer run signal once in the first initialization phase and repeatedly outputting the timer run signals during the usual processing; a watchdog timer for starting timing in response to the timer run signal and outputting a first overflow signal upon a preselected period of time elapsing from starting the timing; an error detector operative in response to the power-on reset signal and the first overflow signal following the power-on reset signal for feeding said CPU with the start signal, the error detector passing the power-on reset signal therethrough, the error detector causing said CPU to stop the usual processing upon receiving the first overflow signal a plurality of times; and a decision circuit, operative in response to the first overflow signal and the power-on reset signal passing through the error detector, for feeding a second overflow signal to the CPU, whereby an error can be discriminated between said power-on reset circuit, CPU, watchdog timer, and error detector.