Patent ID: 6861324

Claim:
A method for forming a super self-aligned bipolar transistor, comprising the steps of: providing a semiconductor substrate having a buried collector region; providing multiple layers above said collector region; providing an emitter window mask above said multiple layers; providing three vertical etchings of said multiple layers; providing a doping of said collector region wherein the doped collector region is determined by the emitter window mask; providing a horizontal etching of one of said multiple layers, wherein said horizontally etched layer is a polysilicon layer and is etched a distance greater than a thickness of said polysilicon layer; providing a wet etching to remove a final one of said multiple layers; providing a base region above said collector region in the horizontally etched area; and providing an emitter region above the base region so that the emitter, base and collector regions are super self-aligned wherein said horizontal etching determines that a dimension of said base region is wider than a dimension of said doped collector region and a dimension of said emitter region.