Patent ID: 7863175

Claim:
A method for forming a zero angstrom oxide interface dual poly gate structure for a flash memory device comprising a core region and a periphery region on a substrate, the method comprising: forming a dielectric layer over the substrate only in the periphery region; forming a first poly layer over the dielectric layer only in the periphery region; contacting the first poly layer with an oxide removing ambient that consists of at least 20% nitrogen and remaining gases selected from a group consisting of helium, neon, argon, krypton, xenon, and combinations thereof at a temperature of 500 degrees Celsius or more and 850 degrees Celsius or less, at a pressure of about 6 Torr or less, and for about 10 seconds or more and about 5 minutes or less to remove an oxide and/or oxide layer on the first poly layer in the processing chamber; and forming a second poly layer over the first poly layer in the processing chamber, wherein an interface of the first poly layer and the second poly layer comprises substantially no oxide.