Patent ID: 7716546

Claim:
A method for improved Logic Built-In Self Test (LBIST), comprising: providing a plurality of control signal sets, by an LBIST controller, to an LBIST domain comprising a plurality of LBIST satellite modules; wherein each of the plurality of LBIST satellite modules receives an individual one of the plurality of control signal sets; and interleaving LBIST channel scan operations for each of the LBIST satellite modules, by the LBIST controller, though the plurality of control signal sets; wherein each LBIST satellite module includes: a pseudo random pattern generator (PRPG), a plurality of scan latches coupled to the PRPG, the plurality of scan latches arranged into at least two LBIST channels, and a multiple input shift register (MISR) coupled to the plurality of scan latches; and wherein interleaving comprises: for a first period, enabling scan operations for a first group of LBIST satellite modules and disabling scan operations for a second group of LBIST satellite modules, and for a second period, disabling scan operations for the first group of LBIST satellite modules and enabling scan operations for the second group of LBIST satellite modules.