Patent ID: 7793015

Claim:
An isochronous circuit, for controlling data transmission between a first device and a second device, wherein the first device outputs a set of data packets to the isochronous circuit at a first data rate and the second device pulls the set of data packets from the isochronous circuit at a second data rate, and the isochronous circuit comprising: a buffer, coupled to the first device through a bus, buffering the set of data packets bounded to the second device; a rate calculator, coupled to the buffer, monitoring occupation of the buffer to estimate the second data rate, wherein the rate calculator comprises counting a time counter (Tc) starting from a base time point, calculating a capacity variation (Cv) since the base time point, calculating a variation rate (Rv) based on the capacity variation and the time counter if the capacity variation exceeds a predetermined threshold, and estimating an estimation of the second data rate based on the first data rate and the variation rate; and a register, coupled to the rate calculator for storage of the second data rate stored by the rate calculator, and accessed periodically by the first device, whereby the estimation of the second data rate is used to update the first data rate of the first device; wherein the rate calculator checks whether the occupation of the buffer converges to a desired level such that if it is not converged, the rate calculator repeat the estimation of the second data rate immediately, and if it is converged, the rate calculator holds until the occupation of the buffer meets or crosses the desired level, and repeat the estimation of the second data rate.