Patent ID: 7506099

Claim:
A semiconductor storage apparatus comprising: a ferroelectric memory including a plurality of unit storage areas that store data therein; a cache memory including a plurality of unit storage areas each of which stores a copy of data stored in a unit storage area of the ferroelectric memory, and which are less in number than the plurality of unit storage areas included in the ferroelectric memory; a counter operable to indicate a count value that corresponds to one of the plurality of unit storage areas in the cache memory; a judging unit operable to judge whether or not a block of data requested to be read out from a unit storage area of the ferroelectric memory is stored in a unit storage area of the cache memory, as a copy of the block of data; a storage control unit operable to, if a result of the judgment by the judging unit is negative, perform a control to read out the requested block of data from the ferroelectric memory and store a copy of the read-out block of data into a unit storage area in the cache memory that corresponds to the count value indicated by the counter; and a counter control unit operable to cause the counter to update the count value each time a result of the judgment by the judging unit is negative.