Patent ID: RE40112

Claim:
A method for fabricating semiconductor packages, the method comprising: providing a circuit board strip including a plurality of unit circuit boards, each unit circuit board having a plurality of first ball lands formed at a first major surface thereof, a plurality of bond fingers formed at an opposite second major surface thereof, vias through the circuit board each electrically connected between a bond finger and a first ball land, and a through hole between the first and second major surfaces; receiving in each through hole a semiconductor chip having a first major surface, and an opposite second major surface provided with a plurality of input/output pads thereon, wherein the second major surface of the chip faces in the same direction as the first second major surface of the respective circuit board; electrically connecting the input/output pads of each semiconductor chip with associated ones of the bond fingers of the respective circuit board; encapsulating the semiconductor chips, and filling the through holes of each unit circuit board of the circuit board strip using an encapsulating material; fusing conductive balls on the first ball lands of each unit circuit board; singulating the circuit board strip into semiconductor packages respectively corresponding to the unit circuit boards.