Patent ID: 7423608

Claim:
A high impedance surface comprising: a printed circuit board having a first surface and a second surface; a continuous electrically conductive plate disposed on the second surface of the printed circuit board; a plurality of electrically conductive plates disposed on the first surface of the printed circuit board; a plurality of elements, each element comprising at least one of: at least one multi-layer inductor electrically coupled between at least two of the electrically conductive plates and embedded within the printed circuit board; at least one capacitor electrically coupled between at least two of the electrically conductive plates, wherein the at least one capacitor comprises at least one of: a dielectric material disposed between adjacent electrically conductive plates, wherein the dielectric material has a relative dielectric constant greater than 6: a mezzanine capacitor embedded within the printed circuit board, wherein the mezzanine capacitor comprises: at least two first electrodes disposed below the first surface of the printed circuit board, each first electrode being electrically coupled to a different one of the conductive plates disposed on the first surface of the printed circuit board, a second electrode capacitively coupled to the at least two first electrodes, and a dielectric disposed between the second electrode and the at least two first electrodes.