Patent ID: 7808281

Claim:
A differential CML (common mode logic) driver, comprising: an output stage, comprising: a first loading component, having a first node coupled to a first reference voltage and a second node for outputting a first output voltage; a second loading component, having a first node coupled to the first reference voltage and a second node for outputting a second output voltage; a bias component, having a first node for conducting a bias current and a second node coupled to a second reference voltage; a first metal-oxide-semiconductor (MOS) transistor, having a control node for receiving a first driving signal, a first node coupled to the second node of the first loading component and a second node coupled to the first node of the bias component; and a second MOS transistor, having a control node for receiving a second driving signal, a first node coupled to the second node of the second loading component and a second node coupled to the first node of the bias component; a control circuit, coupled to the output stage, for receiving a reference bias voltage, a first input signal and a second input signal to make one of the first MOS transistor and the second MOS transistor enter a cut-off region and the other of the first MOS transistor and the second MOS transistor enter a saturation region; and a reference circuit, coupled to the output stage and the control circuit, for generating a common-mode voltage according to the first output voltage and the second output voltage of the output stage, and outputting the reference bias voltage to the control circuit according to the common-mode voltage.