Patent ID: 7400520

Claim:
A CAM, comprising; a plurality of memory cells grouped to store a word, wherein the memory cells are organized into a plurality of ripple groups, each ripple group's memory cells being configured to assert a mismatch output if a content for the memory cell mismatches a corresponding bit of a comparand word, and wherein each ripple group includes: a NOR gate adapted to NOR the mismatch outputs of the memory cells in its ripple group; an inverter adapted to invert a NOR output from the NOR gate to provide an OR output representing the logical OR of the ripple group's mismatch outputs; and pre-charge circuitry for pre-charging the NOR output to a power supply voltage VDD; wherein the ripple groups are arranged from a first ripple group to a last ripple group such that a NOR output from the second ripple group can only be discharged if all the second ripple group's mismatch outputs are false and the first ripple group's OR output is false, and so on such that a NOR output from the last ripple group can only be discharged if all the last ripple group's mismatch outputs are false and a next-to-last ripple group's OR output is false.