Patent ID: 7560771

Claim:
A semiconductor device comprising: a semiconductor substrate of a first conductive type having a first main surface and a second main surface that are opposed to each other; and an element that includes an insulating gate type field effect transistor portion, having an insulating gate structure directly on and in contact with said first main surface side, and an emitter region of the first conductive type extending from said first main surface toward an inner part of said semiconductor substrate, in which a main current flows between said first main surface and said second main surface, the insulating gate type field effect transistor portion is a plane gate-type field effect transistor portion and the first main surface of the semiconductor substrate does not include a trench in the insulating gate type field effect transistor portion, wherein: the thickness of said semiconductor substrate is no less than 50 μm and no greater than 250 μm; a gate electrode layer included in said insulating gate type field effect transistor portion is formed on said first main surface, with a gate insulating film being interposed; a conductive layer attaining an emitter potential is formed on said first main surface with the gate insulating film being interposed and sandwiched between two said insulating gate type field effect transistor portions, with an insulating film being interposed between the conductive layer and said insulating gate type field effect transistor portions; a barrier metal layer is interposed between said conductive layer and an emitter electrode; the insulating gate type field effect transistor has a body region of a second conductive type opposite to that of the substrate formed within the substrate at the first main surface; the emitter region of the first conductive type is formed within the body region; the gate electrode layer is located on the first main surface where the body region is formed, with the gate insulating film being interposed; and the gate insulating film continuously extends from a region under one of two gate electrodes to a region under another of the two gate electrodes through a region under the conductive layer attaining an emitter potential.