Patent ID: 8367444

Claim:
A method of manufacturing a display substrate, the method comprising: forming a gate metal pattern comprising a gate line and a gate electrode and a sacrificial metal pattern formed on the gate metal pattern by patterning a gate metal layer and a first sacrificial metal layer formed on a substrate; forming a gate insulation layer comprising a first hole exposing an end portion of the gate line, the first hole being formed by using the first sacrificial metal pattern formed on the end portion of the gate line; forming a semiconductor pattern on a portion of the gate insulation layer corresponding to an area where the gate electrode is formed; forming a data metal pattern on the semiconductor pattern, the data metal pattern comprising a source electrode connected to a data line, a drain electrode spaced apart from the source electrode, and a first gate pad electrode that contacts the end portion of the gate line through the first hole; forming a protection insulation layer comprising a second hole and a third hole, the second hole exposing the first gate pad electrode and the third hole exposing an end portion of the data line; and forming a second gate pad electrode that contacts the first gate pad electrode through the second hole, a data pad electrode that contacts the end portion of the data line through the third hole, and a pixel electrode electrically connected to the drain electrode.