Patent ID: 8237881

Claim:
An array substrate comprising data lines, gate lines, common electrode lines, thin film transistors and pixel electrodes formed on a base substrate, wherein pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors (TFTs) are formed at the intersections of the data lines and the gate lines, and the data lines extend across the respective pixel units in the middle of the pixel units; wherein the common electrode lines are parallel to the data lines and provided between and separating adjacent pixel units in an extension direction of the gate lines, and wherein each pixel unit comprises a pixel electrode and at leas two TFTs, and the data line corresponding to the pixel unit overlaps with the middle portion of the pixel electrode of the pixel unit, gate electrodes of the at least two TFTs are connected with the gate line corresponding to the pixel unit, drain electrodes of the at least two TFTs are connected with the pixel electrode of the pixel unit, and source electrodes of the at least two TFTs are connected with the data line corresponding to the pixel unit, and the at least two TFTs are respectively formed on both sides of the data line corresponding to the pixel unit.