Patent ID: 7622364

Claim:
A method of forming an electronic package including a semiconductor chip having a plurality of electrically connected layers arranged on a substrate and at least one bond pad positioned on an upper surface of said semiconductor chip, wherein said method comprises equipping said electronic package with structure extending between said at least one bond pad and said substrate for protecting electrical connections and components contained therein from an ingress of moisture and contaminants, wherein said protective structure includes an edge seal and a crack stop each forming a ring-shaped arrangement extending in a mutually spaced relationship about the periphery of said at least one bond pad, wherein the at least one bond pad comprises a bond pad array, and wherein said peripheral crack stop extends externally about said bond pad array, and said edge seal extends interiorly of said bond pad array; and wherein a through-via for packaging leads extends though said substrate layer and active layers of said semiconductor chip to said bond pads.