Patent ID: 8706978

Claim:
A memory system configured to be coupled to a host, the memory system comprising: a nonvolatile semiconductor flash memory comprising a plurality of blocks, each of the blocks being a unit for erasure of data, each of the blocks comprising a plurality of pages, each of the pages comprising a plurality of first memory cells; a nonvolatile semiconductor random access memory having a plurality of second memory cells, a memory capacity of the random access memory being smaller than a memory capacity of the flash memory; and a controller configured to receive first data and a request for writing the first data from the host, the controller being configured to perform in response to the request: receiving the first data from the host and writing the first data to the random access memory, copying second data stored in the flash memory to the random access memory, and copying the first and second data stored in the random access memory to the flash memory, wherein: a plurality of logical sector addresses are assigned to a storage region of the memory system, the memory system is configured to store management information and file data, the management information indicates which ones of the logical sector addresses are allocated to store the file data, and the management information is accessible from the host; the first and second data are associated with consecutive addresses which are included in the logical sector addresses, and the controller is configured to receive third data from the host simultaneously with the copying the first and second data stored in the random access memory.