Patent ID: 8643812

Claim:
A display substrate having a display area and one or more peripheral areas and comprising: a base substrate; a pixel transistor disposed in the display area, the pixel transistor comprising a first electrode disposed directly on the base substrate and a second electrode disposed above the first electrode, the first electrode forming at least a gate electrode portion of the pixel transistor and connecting to a corresponding gate line of the pixel transistor; an integrated gate-lines driving circuit disposed in at least one of the peripheral areas, the integrated gate-lines driving circuit being operatively coupled to drive the corresponding gate line of said pixel transistor and comprising an active components part, a first wiring part electrically connected to the active components part, and a second wiring part also electrically connected to the active components part, where the second wiring is disposed above the first wiring and where the first wiring part is disposed directly on the base substrate; an insulation layer disposed directly on the first electrode and also directly on the first wiring part so as to electrically separate the first electrode from the second electrode and so as to electrically separate the first wiring part from the second wiring part; a protection layer disposed directly on the second electrode and also directly in contact with the second wiring part; and a supplemental buffer layer disposed over the protection layer at least where the protection layer is disposed in direct contact with the second wiring part, the supplemental buffer layer being formed from an alignment material operable to align predetermined liquid crystal molecules that are to be disposed on the display substrate.