Patent ID: 8343803

Claim:
A method for manufacturing a through-silicon via stack package comprising the steps of: providing a plurality of package units, the method of manufacturing each package unit comprising the steps of: defining at least one groove on an upper surface of a semiconductor chip; forming a metal layer in each groove and a first metal line on at least the upper surface of the semiconductor chip such that the first metal line is in contact with a portion of the metal layer filling the groove; removing a lower portion of the semiconductor chip from the lower surface thereof to expose the lower end of the groove filled with the metal layer to form a through-silicon via; and forming a second metal line on the lower surface of the semiconductor chip such that the second metal line contacts a portion of the metal layer of the through-silicon via exposed through the bottom surface of the semiconductor chip; and stacking a plurality of package units, wherein the top package unit among any two stacked package units is referred to as “the upper stacked package unit” and wherein the lower package unit among any two stacked package units is referred to as “the lower stacked package unit,” and wherein the package units are stacked such that the second metal line of the upper stacked package unit electrically connects the metal layer of the through-silicon via of the lower stacked package unit, and such that the first metal line of a lower stacked package unit electrically connects metal layer of the through-silicon via of the upper stacked package unit wherein each of the first and second metal lines is semicircular in shape such that the first and second metal lines form a fitted circular shape.