Patent ID: 7705409

Claim:
A high voltage transistor comprising: a semiconductor substrate; a device isolation film defining an active region in the semiconductor substrate; a gate electrode extending along a central portion of the active region while maintaining a predetermined width on the semiconductor substrate; and a second well formed on both sides of the gate electrode in the semiconductor substrate, and partially extending to a bottom surface of the device isolation film; a source region and a drain region separated from the gate electrode within the second well; wherein the active region in the semiconductor substrate comprises: a first active region disposed under the gate electrode, and separating the device isolation film; and a second active region defined by the first active region and the device isolation film, wherein the first active region extends outwardly around a central portion of the second active region; and wherein the second active region includes both the source region and the drain region and has an edge with no discontinuous portion from the source region to the drain region.