Patent ID: 6943079

Claim:
A method for manufacturing a semiconductor device, the semiconductor device having a DRAM including a first capacitor formed in a DRAM region of a semiconductor substrate, and a second capacitor formed in an analog element region of the semiconductor substrate, the method comprising the steps of: (a) simultaneously forming a storage node of the first capacitor and a lower electrode of the second capacitor; (b) simultaneously forming a dielectric layer of the first capacitor and a dielectric layer of the second capacitor; (c) simultaneously forming a cell plate of the first capacitor and an upper electrode of the second capacitor; and (d) forming a first resistance element and a second resistance element in the analog element region, wherein the step (d) is carried out simultaneously with step (c), and wherein a number of ion-implantations of impurity in a region where the first resistance element is to be formed is greater than a number of ion-implantations of impurity in a region where the second resistance element is to be formed so that a resistance value of the first resistance element is lower than a resistance value of the second resistance element.