Patent ID: 8161493

Claim:
A method of measuring usage of a processor operating at a clock cycle, the processor being operable to simultaneously process multiple instructions via at least one thread during a clock cycle, said method comprising: determining an initial usage for each thread of the at least one thread, each corresponding thread of the at least one thread being in one of a run state wherein the thread therein is executing non-idle code and is using a first amount of processor usage, an idle state wherein the thread therein is executing idle code and is using a second amount of processor usage that is lower than the first amount of processor usage, or a nap state wherein the thread therein is suspended and is using a third amount of processor usage that is lower than the second amount of processor, each instruction on a corresponding thread of the at least one thread additionally being in one of a dispatch state using a fourth amount of processor usage or a non-dispatch state using a fifth amount of processor usage that is lower than the fourth amount of processor usage; determining whether each thread of the at least one thread is in a run state or an idle state: multiplying a first weighting factor to the initial usage for each thread determined to be in a run state to generate corresponding fractional run state portions of usage; multiplying a second weighting factor to the initial usage for each thread determined to be in an idle state to generate corresponding fractional idle state portions of usage; determining whether each thread in a run state is in a dispatch state or a non-dispatch state; multiplying a third weighting factor to the initial usage for each thread determined to be in a dispatch state to generate corresponding fractional dispatch state portions of usage; and multiplying a fourth weighting factor to the initial usage for each thread determined to be in a non-dispatch state to generate corresponding fractional non-dispatch state portions of usage.