Patent ID: 8031545

Claim:
A device for reading data, comprising: a stacked two-terminal cross-point memory array including a plurality of memory layers, each memory layer including a plurality of bit lines, a plurality of word lines, and a plurality of two-terminal memory elements, each two-terminal memory element is positioned at an intersection of one of the word lines with one of the bit lines, each two-terminal memory element including a first terminal electrically coupled with its respective word line and a second terminal electrically coupled with its respective bit line, and two-terminal memory elements positioned in adjacent memory layers electrically share one of the plurality of word lines or one of the plurality of bit lines; pre-charge circuitry operative to apply a first voltage to the plurality of bit lines; word line circuitry operative to apply a second voltage to only one of the plurality of word lines and to apply the first voltage to a remainder of the plurality of word lines, wherein the word line having the second voltage applied to it is a selected word line and the word lines having the first voltage applied to them are un-selected word lines; bit line circuitry operative to electrically disconnect the first voltage from the plurality of bit lines so that the plurality of bit lines are floating, each bit line is charge by a select current flow between the selected word line and each bit line while the second voltage is applied to the selected word line, the select current flow operative to progressively charge each bit line from its voltage while floating, to an intermediate voltage, to a final voltage; and sense amp circuitry operative to sense the intermediate voltage on each bit line and to output read data indicative of the intermediate voltage on each bit line.