Patent ID: 8281268

Claim:
A method of detecting metal line failures in a full-chip, the method comprising: converting a first net-list to a second net-list, the first net-list having first information related to elements and metal lines, and the second net-list having second information susceptible to direct current analysis; calculating current densities for the metal lines by performing the direct current analysis on the second net-list; and detecting, using a computer, defective metal lines among the metal lines based on the current densities of the metal lines, wherein a current source provides a current having a maximum value of discharge currents caused by an electro static discharge (ESD) event, wherein converting the first net-list to the second net-list comprises: transforming the field effect transistors to second resistors; transforming the capacitors to open circuits; and adding the current source between an input pin and a ground pin, and wherein transforming the field effect transistors to the second resistors comprises: calculating drain currents for the field effect transistors; calculating voltage differences between drain terminals and source terminals of the field effect transistors; and determining resistances of the second resistors by dividing the drain currents by the voltage differences.