Patent ID: 7005893

Claim:
A digital system for receiving an input digital signal and for generating an output digital signal that is related to the input digital signal comprising: a) a signal level booster having an input configured to be in communication with a signal that is reflective of the input digital signal and an output that is reflective of the input to said signal level booster, but of greater magnitude; b) a first latch having an input in communication with the output of said signal level booster, configured to be toggled by the output of said signal level booster and by a first clock signal, and having an output; c) digital logic having an input in communication with a signal that is reflective of the output of said first latch and having an output; and d) a second latch having an input in communication with the output of said digital logic, configured to be toggled by the output of said digital logic and by the first clock signal, and having an output configured to deliver the output digital signal, whereby the digital system is configured to operate in conjunction with a second clock signal that is substantially complementary to and substantially non-overlapping with the first clock signal.