Patent ID: 7573088

Claim:
A DRAM array comprising: a first row of contact plugs, a midpoint to midpoint distance between adjacent plugs within the first row defining a plug pitch; a second row of contact plugs spaced from the first row of contact plugs by a first gap distance; a third row of contact plugs spaced from the second row of contact plugs by a second gap distance, the second gap distance being greater than the first gap distance; a first plurality of six-sided bottom plates, each bottom plate comprised by the first plurality being orthogonal relative to the plug rows and in electrical contact with a single contact plug and spanning the second distance, the single contact plug being within the second row of contact plugs; and a second plurality of bottom plates, each of the bottom plates comprised by the second plurality being in electrical contact with a single contact plug in the third row and spanning the second gap distance and being disposed between two bottom plates comprised by the first plurality, a plate pitch between adjacent plates being equivalent to half the plug pitch.