Patent ID: 8090001

Claim:
A transmitter, comprising: a baseband circuit arranged on a first chip; a RF circuit arranged on a second, different chip including a memory; a controller for programming a plurality of chip settings into the memory, wherein the plurality of chip settings respectively correspond to a plurality of time slots in a frequency hopping sequence; a bidirectional data and control interface operably coupled between the baseband circuit on the first chip and the RF circuit on the second chip, the bidirectional data and control interface having at least one data line for data communication, at least one control line for controlling the data communication, and at least one clock line for providing a clock signal; wherein, after the controller has programmed the plurality of chip settings into the memory, the baseband circuit provides corresponding data and control information over the data line and control line, respectively, to the RF circuit, wherein the control information reflects a chip setting which is programmed in the memory and which corresponds to a timeslot in the frequency hopping sequence during which the corresponding data is to be transmitted.