Patent ID: 7514332

Claim:
A method for manufacturing a semiconductor device, comprising the steps of: (a) forming a first region by selectively ion-implanting a second conductive type impurity into a first conductive type semiconductor layer without conducting any thermal diffusion of impurities, wherein step (a) comprises the step of selectively ion-implanting the second conductivity type impurity by using a first mask having an opening therein; (b) forming a gate electrode that includes an edge vicinity region that is aligned with the first region in the horizontal position, wherein step (b) comprises the step of defining the edge of the gate electrode by means of a first edge of the opening; and (c) forming a body layer that includes the first region and a second region that is formed adjacent to the first region, and self-aligned with the first region and an edge of the gate electrode, by forming the second region by selectively ion-implanting the second conductive type impurity into the first conductive type semiconductor layer without conducting any thermal diffusion of impurities, wherein step (c) comprises the step of selectively ion-implanting the second conductive type impurity by using the edge vicinity portion as a mask, and self-aligning a boundary between the first region and the second region with the edge of the gate electrode, wherein the opening is extended by selectively eliminating the first mask after the step of forming the first region without eliminating the first edge of the opening; wherein an insulating film is formed on the first region; wherein the extended opening is completely filled with a gate electrode substance that comprises the gate electrode after the step of forming the insulating film; and wherein the gate electrode substance is planarized, so that the gate electrode is disposed in the extended opening and has a planarized upper surface.