Patent ID: 7994567

Claim:
A semiconductor device including an MOSFET, comprising: source regions and drain regions formed in a semiconductor substrate of a first conductivity type and being spaced apart, in a first direction, by channel regions of a second conductivity type, the source and the drain regions each having the second conductivity type; semiconductor regions of the second conductivity type formed in the semiconductor substrate and arranged between the source regions adjacent to each other in the first direction; gate electrodes formed over the semiconductor substrate and extending in a second direction crossing the first direction; metal wirings formed over the semiconductor substrate; and a plurality of sinker layers formed in the semiconductor substrate, wherein each of the sinker layers is buried in a trench formed in the semiconductor substrate such that at least one of the semiconductor regions is arranged in a vicinity of a surface the sinker layer, such that the sinker layer is electrically connected to the semiconductor region and to the channel region and such that the sinker layer has a plane pattern having a long side in the second direction and is electrically connected to the metal wiring through a plurality of first contact holes arranged in the second direction.