Patent ID: 7012304

Claim:
A method of forming an integrated circuit comprising: forming a performance circuit occupying a first well of an integrated circuit substrate; forming a protection circuit occupying a second well of the integrated circuit substrate separate from the first well, wherein forming the protection circuit includes: forming a plurality of unit cells, the plurality of unit cells separated from each other to form a plurality of islands in the second well surrounded by the second well, each of the plurality of unit cells comprised of: a block of a first doped region of a first dopant in the second well of the integrated circuit substrate occupying an area of the substrate sufficient to support a contact to the doped region, the first doped region forming an anode of a diode, a junction region completely surrounding the first doped region, and a contact to the doped region, wherein the second well is doped with a first concentration of a second dopant, forming a third doped region in the second well adjacent the junction region, the third doped region surrounding the plurality of cells and doped with a greater concentration of the second dopant, the third doped region forming a cathode of the diode; and coupling the protection circuit to the performance circuit.