Patent ID: 7512762

Claim:
A method for providing positional read data latency in a cascaded interconnect memory subsystem, the method comprising: receiving a read request for a target memory module; calculating a delay period for the read request, with the delay period selected to prevent a collision with other returned read data on a cascade interconnected bus used to communicate with the target memory module and an additional memory module, wherein the calculating of the delay period is responsive to one or more outstanding read commands previously issued to the memory subsystem and to a minimum read latency associated with the target memory module in consideration of the one or more outstanding read commands; transmitting a read command to the target memory module, the read command including the delay period, wherein the target memory module comprises one or more memory devices and one or more read data buffers to hold read data from the one or more memory devices corresponding to the read request; and receiving the read data at a memory controller from the target memory module in response to the read command via a cascade interconnected bus, wherein the target memory module has transmitted the read data to the memory controller after the delay period has expired.