Patent ID: 7115466

Claim:
A method of fabricating a heterojunction bipolar transistor, comprising the steps of: a) growing a graded base layer comprising a Group III–V material over an n-doped GaAs collector layer from, wherein the base layer is p-doped with carbon from an external carbon source, and wherein the base layer has an essentially linear grade of band gap and an essentially constant doping-mobility product, from a first surface through the layer to a second surface, the growth of the base layer including the steps of: i) comparing the doping-mobility product of calibration layers, each of which is formed at a distinct flow rate of one of either an organometallic compound depositing an atom from Group III or V of the Periodic Table, or of a carbon tetrahalide compound depositing carbon, whereby the relative organometallic compound and carbon tetrahalide flow rates required to form an essentially constant doping-mobility product are determined; and ii) flowing the organometallic and carbon tetrahalide compounds over a surface at said relative rates to form an essentially constant doping-mobility product, said flow rates changing during deposition to thereby form an essentially linear grade of band gap through the graded base layer; and b) growing an n-doped emitter layer over the base layer.