Patent ID: 7352766

Claim:
A high-speed memory having a write port and a read port, comprising: N memory modules, N>1, each of the said N memory modules having M memory addresses for storing fixed size cells which are grouped into one or more groups of cells destined for the same port of an external device using the high-speed memory, each group including up to N cells; a read-write control block for receiving cells from the write port and storing each cell, which belongs to the same group, in a selected different one of the N memory modules at a memory address, the memory address being selected for each different one of the N memory modules from said M memory addresses according to a first relationship, and for retrieving each of said cells from the memory modules and sending said cells to the read port; a multi-cell pointer (MCP) storage for storing an MCP for each group of cells, each MCP having N memory module identifiers to record the order in which said cells of said each group are stored in each of the selected different one of the N memory modules; and the MCP being stored in the MCP storage at an MCP storage address, which is related to one of the memory addresses that have been selected according to the first relationship, according to a second relationship, wherein the cells are segments of a variable size packet divided into X cells, the packet including ┌X/N┐ groups of cells.