Patent ID: 6870788

Claim:
A semiconductor static random access memory which includes a memory cell array comprised of a plurality of static memory cells, the semiconductor memory device comprising: a plurality of local blocks which are arranged in a column direction, said plurality of local blocks being formed by dividing said memory cell array in the column direction and data being read or written by the local blocks; a divided bit line which is provided for each of the local blocks; a plurality of word lines which are shared by the local blocks; a common bit line which is shared by the local blocks; a first selection circuit which controls the word lines to select one or more of the cells one at a time from each of the local blocks; a second selection circuit which selects a predetermined local block from the plurality of local blocks; and a data detection circuit which receives the divided bit line connected to a selected memory cell detects data held in the selected memory cell based on a level of the divided bit line and drives the common bit line to a level corresponding to the detected data, said data detection circuit being provided between the divided bit line and the common bit line, said selected memory cell being selected by said first selection circuit and included in the local block selected by said second selection circuit.