Patent ID: 7440093

Claim:
A method of providing selective defect sensitivity for inspection of semiconductor reticles, the method comprising: a) providing a target portion of a reticle, wherein the target portion comprises a plurality of design pattern portions; b) analyzing the design pattern portions of the reticle to thereby determine a characteristic of defect susceptibility for each design pattern portion, wherein each characteristic of defect susceptibility is a quantification of the predicted impact of a defect in the corresponding design pattern portion of the reticle on a corresponding portion of a wafer that is to be fabricated with such each design pattern portion of the reticle; and c) determining and storing a sensitivity level for inspection of each design pattern portion of the reticle, wherein determining the sensitivity level is based on the determined defect susceptibility characteristic of such each design pattern portion; wherein determining the defect susceptibility characteristics for the design pattern portions is based on a pseudo Mask Error Enhancement Factor (MEEF) map having a plurality of MEEF values for such each design pattern portions and wherein the sensitivity levels for inspection are in the form of a threshold mad specifying a plurality of threshold values for corresponding reticle portions, wherein high MEEF values result in low threshold values and low MEEF values result in high threshold values.