Patent ID: 8830094

Claim:
An integrated circuit, comprising: a first subtractor having inputs coupled to outputs of a plurality of channels of an interleaved analog-to-digital-converter; wherein the first subtractor computes distances between samples of a signal that are measured consecutively by pairs of channels in the plurality of channels; an array of averaging circuits; wherein at least some averaging circuits in the array of averaging circuits compute an average of those of the distances corresponding to a respective one of the pairs of channels; wherein one averaging circuit in the array of averaging circuits computes an average of all of the distances; an array of subtractors, separate from the first subtractor; wherein each subtractor in the array of subtractors computes a difference between an average computed by one of the at least some of the averaging circuits and the average of all of the distances; and wherein the difference is proportional to a time skew between one of the pairs of the channels corresponding to the average computed by one of the at least some of the averaging circuits.