Patent ID: 7250668

Claim:
A method of fabricating an integrated circuit including a power diode in a semiconductor body comprising the steps of: a) providing a semiconductor substrate including a surface layer of a first conductivity type. b) forming a dielectric material in a surface of the semiconductor substrate around a first region in which a power diode is to be fabricated and separated from a second region in which an integrated circuit is to be fabricated, c) forming semiconductor material of a second conductivity type in the first region, d) fabricating an integrated circuit in the second region, e) fabricating a plurality of MOS source/drain elements and associated gate elements in a surface of a device region and in the semiconductor material of a second conductivity type, f) forming a first diode electrode contacting the plurality of MOS source/drain elements and associated gate elements, and g) forming a conductive via front the surface of the device region to the semiconductor material of the second conductivity type as a second diode electrode.