Patent ID: 8669142

Claim:
A method of manufacturing a package structure, comprising: providing a metal substrate having an upper surface and a lower surface opposite to each other, the upper surface having a seed layer formed thereon; forming a patterned dry film layer on the lower surface of the metal substrate and the seed layer, wherein the patterned dry film layer exposes a portion of the seed layer; plating a circuit layer on the portion of the seed layer exposed by the patterned dry film layer by using the patterned dry film layer as an electroplating mask; removing the patterned dry film layer; bonding a chip to the circuit layer, wherein the chip is connected to the circuit layer; forming a molding compound on the metal substrate, the molding compound encapsulating the chip, the circuit layer, and the portion of the seed layer; and removing a portion of the metal substrate and a portion of the seed layer to expose a portion of the molding compound.