Patent ID: RE38955

Claim:
A memory-cell array formed in a semiconductor substrate, comprising: a plurality of memory cells arranged in rows and columns . , the memory cells formed in an array region of the substrate; a plurality of complementary pairs of digit lines formed in the array region . , each complementary pair coupled to a plurality of memory cells in an associated column; a plurality of word lines formed in the array region, each word line coupled to each memory cell in an associated row; a plurality of sense amplifiers formed in a sense amplifier region of the substrate adjacent the array region, each sense amplifier coupled to an associated pair of complementary digit lines; a plurality of input/output lines formed above the array region, each input/output line coupled to at least a pair of the sense amplifiers through a respective switch; and at least one column select line formed above the sense amplifier region, each column select line coupled to a control input of a plurality of the switches of respective sense amplifiers.