Patent ID: 8581250

Claim:
A semiconductor device, comprising: a substrate that includes a first region and a second region different from the first region; a first passivation layer formed over the first region and the second region; a plurality of bond pads embedded in the first passivation layer located over the first region; and a plurality of probe pads embedded in the first passivation layer located over the second region; a conductive feature continuously extending over the first passivation layer from one of the plurality of bond pads to one of the plurality of probe pads to electrically couple the one of the plurality of bond pads to the one of the plurality of probe pads; and a second passivation layer disposed directly on a portion of the conductive feature such that the second passivation layer physically contacts the portion of the conductive feature, wherein the plurality of bond pads are separated from the plurality of probe pads, and wherein at least some of the bond pads are electrically coupled together with at least some of the probe pads.