Patent ID: 8274119

Claim:
A hybrid material accumulation mode GAA (Gate-All-Around) CMOSFET (Complementary Metal Oxide Semiconductor Field Effect Transistor) comprising: a semiconductor substrate, an NMOS region stacked up above the semiconductor substrate, having a second channel, and including a source region and a drain region located at two opposite ends of the second channel respectively thereof, a PMOS region stacked up above the NMOS region, having a first channel, and including a source region and a drain region located at two opposite ends of the first channel respectively thereof, a gate region surrounding two surfaces of the first channel and the second channel substantially, a first buried oxide layer disposed between the PMOS region and the NMOS region other than the gate region, and a second buried oxide layer disposed between the NMOS region and the semiconductor substrate other than the gate region, wherein the first channel and the second channel each has a racetrack-shaped cross section having a rectangular central portion and two substantially semicircular end portions at the opposite ends of the rectangular central portion, the first channel is stacked up above the second channel and each of them is parallel to the semiconductor substrate, and the first channel is formed of p-type Ge and the second channel is formed of n-type Si.