Patent ID: 7537943

Claim:
A method of manufacturing a semiconductor integrated circuit device, comprising the steps of: (a) preparing a semiconductor wafer, the wafer being partitioned into a plurality of chip areas, each of which has a semiconductor integrated circuit formed thereover, the wafer having a plurality of first electrodes formed over a main surface thereof and electrically coupled to the semiconductor integrated circuits; (b) preparing a first card, the card including: a first wiring substrate having a plurality of first wirings formed thereover; a first sheet having a plurality of contact terminals to be electrically coupled to the first electrodes and a plurality of second wirings electrically coupled to the contact terminals, the second wirings being electrically coupled to the first wirings, the first sheet being held by the first wiring substrate with tips of the contact terminals being opposed to the main surface of the wafer; and a pressing mechanism for pressing a first area of the first sheet with the contact terminals formed thereover, from a back side of the sheet; and (c) performing electric inspection of the semiconductor integrated circuit by bringing the tips of the contact terminals into contact with the first electrodes, wherein the pressing mechanism includes a first pressing portion and a second pressing portion located under the first pressing portion and opposed to the first sheet, the second pressing portion having a relatively smaller plane size than that of the first pressing portion, and wherein the pressing mechanism is in contact with the first sheet at the second pressing portion.