Patent ID: 7552405

Claim:
A method, comprising: specifying a name and input or output size for a first state machine; writing first code for the first state machine using a high-level language, the first code being independent of a processor implementation; and executing computer-implemented code to implement a processor subsystem including the first state machine, the executing comprising: providing first variable declarations for the first code; constructing a complete software application including the first code and the first variable declarations; assembling the complete software application wherein assembled and unlinked code is generated; applying a source-to-source transformation to the assembled and unlinked code, the source-to-source transformation inserting a jump address into the assembled and unlinked code; re-assembling the assembled and unlinked code after applying the source-to-source transformation, wherein assembled and linked code is generated; extracting the jump address from the assembled and linked code; generating an implementation of a physical interface for a processor in the processor subsystem utilizing the extracted jump address and the specified name and input or output size for the first state machine; and outputting the implementation of the processor subsystem utilizing the assembled and linked code and the implementation of the physical interface.