Patent ID: 7035332

Claim:
A DCT/IDCT circuit for enabling forward and inverse discrete cosine transform of a data block, comprising: a plurality of cores, each having input data and output data, wherein the input data includes external data and feedback data output from selected ones of the cores, and wherein the plurality of cores includes a first core having a first input, a second input and an output for performing forward DCT and IDCT operations, the first input of the first core coupled to receive external data; a second core having a first input, a second input and an output for performing forward DCT and IDCT operations, the first input of the second core coupled to receive external data, and the second input of the second core coupled to the output of the first core; and a third core having a first input, a second input and an output for performing forward DCT and IDCT operations, the first input of the third core coupled to receive external data, the second input of the third core coupled to the output of the second core and the output of the third core coupled to the second input of the first core to provide feedback data.