Patent ID: 7839105

Claim:
A delayed braking circuit comprising: a first series circuit comprising a first electric load connected in series with a first capacitor in the same direction of polarity; a second series circuit comprising a second capacitor connected in series with a second electric load in the same direction of polarity; both first and second capacitors and both first and second electric loads in the first and second series circuits are connected in series in opposite sequence before being connected in parallel and in which the same polarity is controlled by a source switch; and a diode coupled to a coupling point of the first electric load and the first capacitor in the first series circuit and that of the second electric load and the second capacitor in the second series circuit and in series in the same direction of polarity with the first and second electric loads for flow of DC power; wherein the DC power charges both first and second capacitors connected in series via the first and second electric loads in the first and second series circuits, the first and second electric loads are subjected to 100% voltage and the charging voltage of a first or second capacitor rises to create balanced division voltage respectively, between both first and second electric loads connected in parallel with the first and second capacitor; wherein both electric loads in the first and second series circuits have high resistance and low amperage to achieve delayed braking and the electric load includes an EM effect load or resistance load.