Patent ID: 8547159

Claim:
A switch circuit defining an on-state and an off-state that, when in the on state, couples a first node to a second node, the circuit comprising: a MOSFET device including: a gate, a source coupled to the first node; and a drain coupled to the second node; wherein, when the MOSFET device is in the on state, a signal can pass between the source and the drain; a summing circuit having an output coupled to the gate of the MOSFET device, the summing circuit including: a current source coupled to the output; a diode network coupled between the current source and the first node, the diode network configured to receive current from the current source during the on-state and to maintain a substantially constant control voltage between the gate of the MOSFET device and the source of the MOSFET device during the on-state; and a control switch coupled to the output, the control switch configured to divert the current from the diode network during the off state; and a low voltage monitoring circuit configured to couple a node of the control switch to a reference voltage, the low voltage monitoring circuit including first and second transistors coupled to the control switch, wherein the first and second transistors are cross coupled to each other, and wherein the reference voltage is the lower of ground or a voltage at one of the first or second nodes.