Patent ID: 8772114

Claim:
A method, comprising: forming a first work function metal layer on a first region of the substrate, wherein the first region is defined to include devices of one of a p-type and an n-type; forming a metal layer on the first work function metal layer in the first region and on a second region of the substrate, wherein the second region is defined to include devices of the other of a p-type and an n-type; forming a dummy layer on the metal layer in the first region and the second region; patterning the dummy layer, first work function metal layer, and the metal layer to form a first gate structure in the first region and a second gate structure in the second region of the substrate, wherein the first gate structure includes the dummy layer, the first work function metal layer and the metal layer and the second gate structure includes the dummy layer and the metal layer; after forming the first gate structure and the second gate structure, removing the dummy layer to expose the metal layer; and treating the metal layer in the first region and the second region.