Patent ID: 8765600

Claim:
A semiconductor device, comprising: a gate structure on a semiconductor substrate; source/drain regions laterally adjacent to the gate structure in the semiconductor substrate; a first dielectric layer overlying the gate structure and the source/drain regions, wherein the first dielectric layer has first contact holes over the source/drain regions; first contact plugs formed of a first conductive material filling the first contact holes, wherein the first contact plugs are electrically coupled to the respective source/drain regions; a second dielectric layer overlaying the first dielectric layer and the first contact plugs; a second contact hold formed in the first and the second dielectric layers; a second contact plug formed of a second conductive material filling the second contact hole at least in the first dielectric layer, wherein the second contact plug is electrically coupled to the gate structure; and interconnect structures formed substantially in the second dielectric layer, the interconnect structures electrically couple to the first contact plugs; wherein the second conductive material is different from the first conductive material, and the second conductive material has an electrical resistance lower than that of the first conductive material; wherein the second contact hole and the second contact plug formed of the second conductive material extend continuously from the first dielectric layer to the second dielectric layer.