Patent ID: 8495278

Claim:
A controller comprising: an instruction table memory in which a first instruction code obtained by coding a sequence to access a nonvolatile semiconductor memory is stored; a program counter to which a read address in the instruction table memory to access the nonvolatile semiconductor memory is set; a first decoder which decodes the first instruction code read from the instruction table memory to output a first decode signal; and a first executing unit which executes access to the nonvolatile semiconductor memory on the basis of the first decode signal output from the first decoder, wherein the sequence to access the nonvolatile semiconductor memory includes a sequence of a plurality of commands to be sent to the nonvolatile semiconductor memory, the instruction table memory stores a second instruction code and a plurality of instruction codes, the first instruction code is included in the plurality of instruction codes, each of the plurality of instruction codes is obtained by coding sequences to access the nonvolatile semiconductor memory, and the second instruction code continuously accesses the plurality of instruction codes in an arbitrary order.