Patent ID: 7394320

Claim:
A phase-locked loop suitable for mobile communications, comprising: a digitally controlled oscillator, having an oscillator signal at an output thereof; a counter, comprising a first input connected to the output of the oscillator; a second input, which is connected to a reference frequency terminal and to which a reference frequency signal can be sent; and an output from which a counter signal can be transmitted; a digital comparator, comprising a first input; a second input, which is connected to the output of the counter; and an output, to which the input side of the oscillator is connected; and a delay arrangement, connected between the oscillator and the first input of the counter or between the reference frequency terminal and the second input of the counter, wherein the delay arrangement is operable to delay an input signal as a function of a sequence signal, the input signal being sent to an input of the delay arrangement, and wherein the delay arrangement is operable to transmit a delayed signal from an output of the delay arrangement.