Patent ID: 8884359

Claim:
A field-effect transistor integrated in a chip of semiconductor material of a first type of conductivity having a first main surface and a second main surface opposed to each other, wherein the transistor includes: a plurality of body regions of a second type of conductivity each one extending from the second main surface in the chip, a plurality of drain columns of the second type of conductivity each one extending from a body region towards the first main surface at a predefined distance therefrom, a plurality of drain channels being defined in the chip each one extending longitudinally between a pair of adjacent drain columns, a plurality of source regions of the first type of conductivity each one extending from the second main surface in a body region, a plurality of channel areas being defined each one in a body region between a source region of the body region and each drain channel being adjacent to the body region, a gate terminal contacting gates extending over the channel areas, the gates being insulated from the second main surface, a source terminal contacting the source regions on the second main surface, and a drain terminal contacting the chip on the first main surface, wherein each drain channel includes a residual first portion having a first transversal width that is configured to limit an amount of current flowing through the drain channel and a prevalent second portion having a second transversal width higher than the first transversal width, and wherein the first portion of each drain channel has a first resistivity and the second portion of each drain channel has a second resistivity lower than the first resistivity and wherein the chip includes a substrate with a resistivity lower than the first resistivity and the second resistivity having an exposed surface defining the first main surface, at least one first epitaxial layer with the first resistivity being grown on a further surface of the substrate opposite the first main surface, and at least one second epitaxial layer with the second resistivity being grown on the at least one first epitaxial layer, wherein each drain column includes a first basic drain region of the second type of conductivity crossing each at least one first epitaxial layer, the first portion of each drain channel including a portion of each at least one first epitaxial layer between the first basic drain regions of a corresponding pair of adjacent drain columns, and wherein each drain column includes a second basic drain region of the second type of conductivity crossing each at least one second epitaxial layer, the second portion of each drain channel including a portion of each at least one second epitaxial layer between the second basic drain regions of the corresponding pair of adjacent drain columns.