Patent ID: 8502719

Claim:
An apparatus comprising: a continuous-time sigma-delta analog-to-digital converter comprising: a first integrator stage to integrate a difference between a first differential signal derived from a differential analog input signal and a second differential signal derived from a quantized output signal, the first integrator stage having a differential operational amplifier, a first input resistor, a second input resistor, a third input resistor, a fourth input resistor, and a first pair of integrating capacitors, in which the differential analog input signal is received by a first input node and a second input node of the converter, the first and third input resistors are coupled in series between a first input of the operational amplifier and the first input node, the second and fourth input resistors are coupled in series between a second input of the operational amplifier and the second input node, the first input resistor is coupled to the third input resistor at a third node, the second input resistor is coupled to the fourth input resistor at a fourth node; a quantizer to quantize a third signal derived at least in part from an output of the first integrator stage to generate the quantized output signal; and a low pass filter to reduce high frequency components of the differential analog input signal provided to the first and second inputs of the operational amplifier, the low pass filter having a cutoff frequency selected to reduce voltage variations at the first and second inputs of the operational amplifier, the low pass filter comprising the first, second, third, and fourth input resistors and a filter capacitor coupled between the third and fourth nodes.