Patent ID: 6885214

Claim:
An apparatus for characterizing an insulating layer constructed between a conductive gate and a substrate, comprising: at least one test structure formed at a surface of a substrate, each test structure comprising: a bulk region formed of a semiconductor within said surface, at least one source region within the bulk region, at least one drain region within the bulk region such that each drain region is placed at a distance from one of the source regions, a thin insulating layer placed above the each source region, each drain region, and the bulk region between said source region and said drain region, and the conductive gate placed above the thin insulating layer, and a capacitance-voltage measuring device having a sense probe in contact the conductive gate of each test structure, a stimulus probe in contact with the source and drain region of each test structure to measure a capacitance value of said test structure, and a bulk biasing probe to force said bulk region between said source and drain region to a second voltage level, whereby said second voltage level forces said bulk region to an inversion, said capacitance-voltage measuring device varying a first voltage at said source and drain region to force said test structure into the inversion state and measuring a first capacitance of said test structure.