Patent ID: 8274467

Claim:
A liquid crystal display (LCD) comprising: an LCD panel comprising a plurality of display regions arranged consecutively in a line; a plurality of gate driving circuits respectively connected to the plurality of display regions and configured for providing scanning signals to scan the display regions; at least one data driving circuit configured for generating gradation voltages and providing the gradation voltages to a corresponding display region when the display region is being scanned; and a delay control circuit connected between the at least one data driving circuit and the display regions and configured for delaying the gradation voltages provided to each display region, the delay control circuit comprising a plurality of delay transistors for delaying the gradation voltages, each one of the plurality of delay transistors comprising a gate electrode for receiving a control voltage, a drain electrode connected to the display region, and a source electrode connected to the data driving circuit; wherein a first delay value of the gradation voltages is generated by the delay control circuit when the gradation voltages are applied to one of the display regions, a second delay value of the same gradation voltages being generated when the gradation voltages are transmitted from the gate driving circuit to the same one of the display regions, and a sum of the first delay value and the second delay value of the gradation voltages is finally provided to the same one of the display regions; and the sum of the first delay value and the second delay value for each of the display regions is approximately constant for all of the display regions.