Patent ID: 8468551

Claim:
A computer system comprising: a physical input-output adapter; and at least one processor and memory, the memory having instructions for execution by the at least one processor, wherein the system is configured with the instructions and the at least one processor to: generate logical partitions, including local logical partitions and an input-output logical partition; provide the local logical partitions with respective local virtual adapters; and provide a shared virtual adapter for the input-output logical partition, the shared virtual adapter being configured to communicate with the physical input-output adapter, such that a plurality of the local logical partitions share the physical input-output adapter via the shared virtual adapter; and communicate for ones of the local virtual adapters of the local logical partitions directly with the physical input-output adapter by a hypervisor; wherein the system includes a layer comprising: virtual adapters for the local logical partitions, wherein the local logical partition virtual adapters and the physical input-output adapter have respective media access control addresses; and a data structure providing associations of the media access control addresses to virtual local area network identifiers of the respective virtual and physical adapters for exposing the associations directly to the hypervisor; wherein the communicating for the ones of the local virtual adapters of the local logical partitions directly with the physical input-output adapter by the hypervisor comprises: the hypervisor accessing the data structure.