Patent ID: 7809052

Claim:
A test circuit arranged within or upon a monolithic substrate, the test circuit comprising: a jitter generator configured to receive an input signal, wherein the jitter generator is configured for generating a jittered test signal by modulating a phase of the input signal in accordance with a periodic signal, wherein the periodic signal comprises a set of precomputed data points, and wherein the jitter generator comprises: a digital-to-analog converter (DAC) configured to generate an adjustable reference voltage that changes in accordance with the periodic signal; a comparator configured to receive the adjustable reference voltage and a linearly increasing voltage signal generated in response to the input signal, wherein the comparator is configured for generating the jittered test signal by shifting the phase of the input signal each time the linearly increasing voltage signal exceeds the adjustable reference voltage; and a programmable device configured for storing the periodic signal, wherein the programmable device is coupled to the DAC for controlling the changes made to the adjustable reference voltage; and a first multiplexer configured to supply either the input signal or the jittered test signal to one or more components arranged within or upon the monolithic substrate.