Patent ID: 8174327

Claim:
For use with a phase-locked loop circuit having a first frequency-divider, a feedback-divider and a fractional-N mode, a method for determining a low power configuration for the phase-locked loop circuit which meets a set of desired phase-locked loop circuit characteristics, the method comprising the steps of: determining a subset of first frequency-divider configuration values from a range of possible first frequency-divider configuration values; determining a fraction corresponding to a desired gain of the phase-locked loop circuit and based upon the subset of first frequency-divider configuration values; determining whether the fraction can be represented using the subset of first frequency-divider configuration values and a range of possible feedback-divider configuration values; in response to the determination as to whether the fraction can be represented, computing a set of values for the first frequency-divider configuration value and a set of values for the feedback-divider configuration value based upon the fraction; and selecting, from said sets of values and based upon at least one of the set of desired phase-locked loop circuit characteristics, a set of configuration values indicative of low power operation in comparison to other ones of said sets of values.