Patent ID: 7569477

Claim:
A method for fabricating a fine pattern in a semiconductor device, the method comprising: forming an etch target layer over a substrate; forming a plurality of first photoresist patterns over a portion of the etch target layer; forming a first hard mask layer over a resultant structure including the first photoresist patterns, filling a cap between neighboring first photoresist patterns; planarizing the first hard mask layer to form first hard mask patterns and expose the first photoresist patterns; removing the first photoresist patterns; forming second photoresist patterns enclosing the first hard mask patterns; forming a second hard mask layer over a resultant structure including the second photoresist patterns, filling a gap between neighboring second photoresist patterns; planarizing the second hard mask layer to form second hard mask patterns and expose the first hard mask patterns; removing the second photoresist patterns; and etching the etch target layer using the first hard mask patterns and the second hard mask patterns.