Patent ID: 7337266

Claim:
A data structure design system for prolonging the life of an FRAM (Ferroelectric Random Access Memory), the system comprising: an FRAM divided into a plurality of fixed-size blocks for storing data; an SDRAM (Synchronous Dynamic Random Access Memory) for storing data that need to be written to the FRAM, the SDRAM being divided into a plurality of fixed-size blocks, and comprising three data structures: queue one comprising blocks that are either void or for storing unused data, queue two comprising blocks that will not be used any more and have not been deleted from the FRAM, and a hash table containing blocks storing data that are being used and have been recorded in the FRAM; a CPU (Central Processing Unit) for reading data from external storages, for storing the data in the SDRAM, for reading the data from the SDRAM, for writing the data to the FRAM via the three data structures, and for putting the blocks storing the data into the hash table; and a clock for recording a predetermined time used to determine the blocks in the FRAM in which data have not been read up to the predetermined time.