Patent ID: 7282399

Claim:
A method for forming a silicon-on-insulator FET providing a contact to be given a fixed potential to a substrate, the method comprising: providing a substrate having a semiconductor substrate, an insulating layer located on the semiconductor substrate and a silicon layer located on the insulating layer; forming a mask layer over the silicon layer, the mask layer having an opening that exposes the silicon layer; forming an isolating layer in a part of the silicon layer exposed by the opening; forming a conductive layer extending through the isolating layer and the insulating layer, and on an upper surface of the mask layer, the conductive layer electrically connected to the semiconductor substrate; removing the conductive layer from the upper surface of the mask layer, the conductive layer that remains being a first conductive contact layer; removing the mask layer; forming an interlayer-insulating layer overlying the silicon layer and the first conductive contact layer; forming a through-hole in the interlayer-insulating layer, the through-hole formed so as to correspond to the first conductive contact layer; and filling a second conductive contact layer in the through-hole.