Patent ID: 8625351

Claim:
A nonvolatile memory device, comprising: a memory cell array including a plurality of memory blocks on a substrate, each of the plurality of memory blocks including strings arranged in rows and columns, the strings including a plurality of memory cells stacked vertical on each other and on the substrate, the plurality of memory blocks including at least one memory block including a read-only-memory (ROM) data region and a replica ROM data region, the ROM data region including first strings of one first row of the rows in the one memory block, the replica ROM data region including second strings of one second row of the rows in the one memory block, the first row being different than the second row, the plurality of memory cells in each of the first strings being connected with word lines, the word lines including two first word lines and a plurality of second word lines; and a plurality of bit lines connected to the memory cell array, strings of each of the rows connected with the bit lines, and strings of each of the columns connected in common with a corresponding one of the bit lines, wherein the nonvolatile memory device is configured to store ROM data in memory cells connected to the two first word lines, and to maintain memory cells connected to the second word lines in an erase state, and the nonvolatile memory device is configured to, at a read operation, drive the two first word lines using a ground voltage, drive word lines of the second word lines that are adjacent to the two first word lines using a voltage higher than a read voltage, and drive the second word lines other than the adjacent second word lines using the read voltage.