Patent ID: 8413163

Claim:
A program control device which switches, per timeslot, between threads to be executed, said program control device comprising: a plurality of processors; an interrupt creator configured to cause a first processor to create a first interrupt signal that contains information which designates, as a destination, timeslot assigned to one of the first processor and a second processor, the first processor and the second processor being included in the plurality of processors, the second processor being different than the first processor; a receiver configured to control one of the first processor and the second processor assigned with the timeslot designated as the destination, in the information contained in the first interrupt signal, not to receive the first interrupt signal if the timeslot designated as the destination in the information is not a current timeslot and to receive the first interrupt signal if the timeslot is the current timeslot; a storage in which thread information regarding a thread and timeslot information regarding a timeslot are stored, the thread information including an identifier of a timeslot to which the thread is allocated, and the timeslot information including information indicating a thread which is allocated to the timeslot; a specifier configured to specify the timeslot as the destination of the first interrupt signal, based on the thread information and the timeslot information, wherein said interrupt creator is configured to create the first interrupt signal which designates, as the destination, the timeslot specified by said specifier; a receive processor configured to receive a system call from a current thread which is being executed in the current timeslot; a scheduler configured to change one of a state of a thread and a state of a timeslot in response to the system call, the thread and the timeslot being included among threads and timeslots including the current thread and the current timeslot, respectively, a first dispatcher configured to switch between threads to be executed in the timeslot as the destination, in response to the first interrupt signal received by said receiver; and a second dispatcher configured to change the timeslot information regarding a thread in response to the second interrupt signal received by said receiver, the thread being included among threads including the thread relating to the change; wherein said interrupt creator is configured: when said scheduler changes the state of the thread, to create the first interrupt signal which designates, as the destination, a timeslot to which a thread relating to the change is allowed, the thread relating to the change being included among threads including the thread with the state being changed by said scheduler, when said scheduler changes the state of the timeslot, to create a second interrupt signal.