Patent ID: 8193456

Claim:
An electrical inspection substrate unit comprising: a multi-layer ceramic substrate; and electrodes formed on a surface of the multi-layer ceramic substrate, each electrode including at least one of a Ti or a Cr layer formed by sputtering, each electrode for electrical communication with a respective electrically conductive probe to thereby form an IC chip inspection jig; the multi-layer ceramic substrate having a mean coefficient of linear thermal expansion having a value of 3.0 to 4.0 ppm/° C. between −50° C. and 150° C.; and a thermal expansion coefficient, α1, of the multi-layer ceramic substrate as determined at a particular temperature and a thermal expansion coefficient, α2, of a to-be-inspected silicon wafer as determined at the same temperature satisfying a relation: 0 ppm/° C. <α1−α2≦2.5 ppm/° C. through the temperature of −50° C. to 150° C.