Patent ID: 7908504

Claim:
A smart batteryless emergency backup device, comprising: a control block (CB), a volatile random access memory block (VMB), a data array of non-volatile memory cells for data storing (DNVM), a parameter array of non-volatile memory cells for parameter storing (PNVM), a non-volatile memory block (NVMB), comprising at least one (DNVM) array of non-volatile memory cells, at least one external interface port for connection between external equipment, including external computerized apparatus, and said backup device by an external interface bus, an interface conversion block, a power conversion block, an electricity accumulating block, comprising at least one capacitor, one terminal of which is grounded, an element of unidirectional conductivity, means for power failure detecting having one or more outputs, means for backup controlling having one or more outputs; said backup device, wherein: said interface and power conversion blocks are connected to one or more external interface ports, said control block includes one or more control inputs, a power supply input, an internal interface port that couples said interface conversion block and said control block one to another, two memory interface ports that couple said control block to said volatile memory block (VMB) and said non-volatile memory block (NVMB), said power conversion block outputs are coupled via said element of unidirectional conductivity to a first ungrounded terminal of said accumulating block and to a power supply input of the control block, one or more inputs of said means for power failure event detecting are coupled to corresponding outputs of said power conversion block, one or more inputs of said means for backup controlling are coupled to the ungrounded terminal of said accumulating block; said backup device, wherein further: each of said means has at least one output, said outputs are coupled to corresponding inputs of said control block, said parameter array includes at least a size of information that has been written to said DNVM, said control block and said memories have minimum operating voltages that are designated as VminCB, VminVMB, VminPNVM and VminDNVM correspondingly.