Patent ID: 8236606

Claim:
A method for providing a semiconductor assembly, comprising: providing a substrate having a first surface; disposing a plurality of barricades on the first surface of the substrate, the barricades comprising a plurality of non-conductive protrusions extending from the first surface of the substrate; coupling a chip to the substrate, the chip having a second surface facing the first surface of the substrate, the chip spaced apart from the substrate forming a gap, wherein at least a portion of the substrate is coupled to the chip by a plurality of solder bumps; the plurality of solder bumps comprising a deformable material, such that as a height of the gap between the chip and the substrate increases, the plurality of solder bumps are operable to deform into a stretched state; increasing the height of the gap between the chip and the substrate such that the plurality of solder bumps enter the stretched state; applying an underfill material between the substrate and the chip, the underfill material operable to substantially fill the gap between the chip and the substrate and surround the plurality of solder bumps in the stretched state; and decreasing the height of the gap between the chip and the substrate such that the plurality of solder bumps enter a compressed state, the plurality of barricades being configured to confine the plurality of solder bumps in the compressed state.