Patent ID: 8421527

Claim:
A semiconductor integrated circuit device comprising: a first power wire to receive a power supply voltage; a second power wire to receive a reference voltage; a third power wire to receive a reference potential; a first terminal coupled to the second power wire; a second terminal to output an enable signal; a power region coupled between the first and second power wires and controllable to operate in different low-power-consumption modes, including a low-speed mode and a standby mode; a power switch control unit coupled between the second and third power wires and operative to make the second and third power wires conductive or non-conductive based on a connection control signal; and a power consumption control unit to determine an operation state of the power region, to control the power switch control unit, and to enable an external reference voltage regulator coupled to the first terminal to supply the reference voltage to the second power wire based on the enable signal, wherein, in the low-speed mode, the power consumption control unit controls the reference voltage regulator to supply the reference voltage to the second power wire, controls the power switch control unit to make the third power wire non-conductive, and makes the power region operating in the low-speed mode operate between the power supply voltage and the reference voltage, wherein, in the standby mode, the power consumption control unit stops operation of the reference voltage regulator, controls the power switch control unit to make the second and third power wires non-conductive, and interrupts supply of the reference voltage and the reference potential to the power region operating in the standby mode, and wherein, in a normal operation mode, the power consumption control unit stops operation of the reference voltage regulator, controls the power switch control unit to make the second and third power wires conductive, and makes the power region operating in the normal operation mode operate between the power supply voltage and the reference potential.