Patent ID: 8751749

Claim:
A computer system comprising: a cache memory hierarchy comprising at least one lower cache memory coupled to a higher cache memory, wherein the computer system is configured to perform a method, said method comprising: receiving by the higher cache memory a fetch request to provide a first line of data; based on receiving the fetch request, determining by the higher cache memory a state of an entry to be replaced next, the entry being for a second line of data different from the requested first line of data; and based on the state of the entry to be replaced next indicating that the entry is exclusively owned or modified, initiating, by the higher cache memory, changing of the state of the entry to be replaced next, wherein based on a subsequent request received by the higher cache memory to provide a third line of data, which is to replace the second line of data in the higher cache memory, an access to replace the second line of data with the third line of data in the higher cache memory will be processed at higher speed compared to an access to replace the second line of data with the third line of data in the higher cache memory responsive to the state of the entry for the second line of data staying unchanged.