Patent ID: 7858517

Claim:
A method of manufacturing a semiconductor device, comprising: a first step of forming a gate electrode over a silicon substrate, with a gate insulation film between said gate electrode and silicon substrate; a second step of removing portions of a surface layer of said silicon substrate to create dug-down regions on opposite sides of the gate electrode by etching said surface layer using said gate electrode as a mask; a third step of epitaxially growing a first layer including a silicon-germanium layer over the dug-down regions of said silicon substrate until said dug-down regions are completely filled and the surface of the first layer is flush with the surface of the silicon substrate; a fourth step of forming over said first layer an intermediate layer including (1) a silicon-germanium layer having a germanium concentration that is higher than that of said first layer or (2) a germanium layer; a fifth step of forming over said intermediate layer a second layer including (1) a silicon-germanium layer having a germanium concentration that is lower than that of said first layer or (2) a silicon layer, over said first layer and at or above the surface of the substrate; and a sixth step of siliciding at least a surface side of said second layer facing away from said first layer to form a silicide layer, wherein, the substrate accommodates a channel region therein beneath the gate electrode, and the manufacturing steps cause the channel region to be strained, said second layer is formed over said intermediate layer in said fifth step and the germanium concentration of the intermediate layer is sufficient to ensure that only the second layer is silicided in the sixth step.