Patent ID: 8830732

Claim:
A Static Random Access Memory (SRAM) cell comprising: a first long boundary and a second long boundary parallel to a first direction; a first short boundary and a second short boundary parallel to a second direction perpendicular to the first direction, wherein the first and the second long boundaries are longer than, and form a rectangle with, the first and the second short boundaries; a CVss line carrying a VSS power supply voltage crossing the first long boundary and the second long boundary, wherein the CVss line is parallel to the second direction; a bit-line and a bit-line bar on opposite sides of the CVss line, wherein the bit-line and the bit-line bar are configured to carry complementary bit-line signals; a word-line parallel to the first direction; and a first CVdd line and a second CVdd line parallel to the first direction and on opposite sides of the word-line, wherein the first CVdd line and the second CVdd line are configured to carry a positive power supply voltage.