Patent ID: 7289350

Claim:
An electronic device, comprising: a memory cell and a control circuit, the memory cell comprising: a resistive storage element having a first terminal and a second terminal, wherein the resistive storage element is switchable between a first storage state having a first conductivity and a second storage state having a second conductivity; an access switch coupled to the first terminal of the resistive storage element and to a node, the access switch connecting the first terminal of the resistive storage element to the node in an access state of the memory cell and insulating the first terminal of the resistive storage element from the node in an idle state of the memory cell; a protecting switch connected to the resistive storage element, the protecting switch, in the idle state of the memory cell, reducing the voltage across the resistive storage element and, in the access state of the memory cell, enabling reading and writing of the storage states of the resistive storage element; and a read and write circuit connected to the node, allowing data to be written to and read from the node via a common bit line, wherein the control circuit is operatively coupled to the access switch and to the protecting switch and is configured to control the access switch and the protecting switch to switch respectively in the access state and in the idle state of the memory cell, wherein the protecting switch is coupled to the first terminal of the resistive storage element and a reference potential line, and wherein the second terminal of the resistive storage element is connected to a ground connection.