Patent ID: 8018447

Claim:
A semiconductor integrated circuit device comprising: a first high-speed serial interface circuit which has one differential serial data channel; a second high-speed serial interface circuit which has a plurality of differential serial data channels; a control circuit which controls an internal operation in accordance with control information that is input to the first high-speed serial interface circuit from the outside; a RAM to which data information that is input to the first high-speed serial interface circuit from the outside and data information that is input to the second high-speed serial interface circuit from the outside can be supplied; and a display driver circuit which generates a display driving signal on the basis of the data information read from the RAM, wherein whether the first high-speed serial interface circuit or the second high-speed serial interface circuit is used when receiving the data information to be supplied to the RAM is determined by the control circuit in accordance with the control information that is input to the first high-speed serial interface circuit.