Patent ID: 8785225

Claim:
A method for manufacturing a thin-film transistor (TFT) pixel structure, the method comprising the steps of: forming a first conducting layer on a substrate; patterning the first conducting layer for generating a plurality of scan lines, a gate electrode layer electrically connected to the scan lines, and a shielding layer on the substrate; forming a gate insulation layer on the substrate for covering the scan lines, the gate electrode layer and the shielding layer; forming a channel layer on the gate insulation layer wherein the channel layer corresponds to the gate electrode layer; forming a second conducting layer on the substrate and patterning the second conducting layer for generating a plurality of data lines, a drain layer coupled to the data lines, and a source layer on the channel layer to allow the gate electrode layer, the channel layer, the source layer, the drain layer to construct a plurality of thin-film transistors, the channel layer being disposed between the shielding layer and the source layer, wherein when a light beam illuminates on the substrate, the shielding layer is correspondingly disposed to the channel layer along an emitting direction of the light beam for shielding the channel layer from the light beam by using the shielding layer; and forming a transparent conducting layer to be coupled to the source layer for generating a plurality of pixel electrodes.