Patent ID: 8022549

Claim:
A standard cell for forming a semiconductor device, the standard cell having a wiring pitch of 170 nm or less, comprising: a first signal wire formed in a first wiring layer and extending in a first direction; second and third signal wires formed in the first wiring layer and extending in a second direction substantially perpendicular to the first direction, the second and third signal wires facing each other across the first signal wire; a fourth signal wire formed in the first wiring layer and extending in the first direction; and a fifth signal wire formed in the first wiring layer and extending in the second direction, the fifth signal wire being adjacent to the fourth signal wire, wherein at least one of a space between the first signal wire and an end of the second signal wire and a space between the first signal wire and an end of the third signal wire is larger than a space between the fourth signal wire and an end of the fifth signal wire.