Patent ID: 6865636

Claim:
A multitasking processor system comprising: a program controller which has an evaluating unit for monitoring an occurrence of interrupt events and a control unit which is provided for controlling an execution of an interrupt routine when the evaluating unit detects the occurrence of said interrupt events, said processor system further comprising different memory circuits which are provided for different tasks in the multitasking processor system, wherein the control unit is designed in such a manner that, on the occurrence of interrupt events which causes a change from a current task to a new task and which have a particular predetermined priority level, the control unit initiates, for executing the new task, a switchover from a memory circuit allocated to the current task to a memory circuit allocated to the new task, wherein the memory circuit exhibiting in each case one memory for a program counter of an associated task, at least one register for temporarily storing data which are produced during execution of the associated task, and at least one status register for storing status information of the associated task, wherein individual priorities are allocated to the individual interrupt events and at least one particular priority is provided for change to a new task, and wherein the evaluating unit, on detection of the occurrence of interrupt events having the particular predetermined priority forwards a corresponding request for a change from the current task to the corresponding new task to the control unit.