Patent ID: 8384571

Claim:
An analog-to-digital conversion circuit comprising: a plurality of comparators to compare an input analog signal and one of a plurality of reference voltages corresponding to each of a plurality of operations which is used in an analog-to-digital conversion; an interpolating comparator to compare the input analog signal and a determination voltage between a first reference voltage and a second reference voltage corresponding to two of the plurality of comparators respectively; a correction value acquisition circuit to calculate a correction value for correcting a match determination error between the input analog signal and the determination voltage; a correction value application circuit to set the correction value in the interpolating comparator; a test voltage generation circuit to supply the two of the plurality of comparators with a first test voltage corresponding to one of the determination voltages in the plurality of operations; a common voltage generation circuit to supply the two of the plurality of comparators with a second test voltage; and a correction value calculation circuit to calculate respective correction values corresponding to the determination voltages in the plurality of operations based on a match determination error obtained in accordance with an input of the first test voltage and a match determination error obtained in accordance with an input of the second test voltage.