Patent ID: 7157940

Claim:
A system for driving a data signal, comprising: a plurality of bit lines; a data bus having a plurality of bus lines, wherein each bus line is connectable to a respective portion of the plurality of bit lines; a charging circuit coupled to at least one of the bus lines of the data bus, wherein the charging circuit is configured to pre-charge the at least one of the bus lines of the data bus to a first voltage level in advance of driving a first type of data signal or a second type of data signal across the at least one of the bus lines; and a pull-down circuit coupled to the at least one of the bus lines of the data bus, wherein the pull-down circuit is configured to pull the at least one of the bus lines of the data bus to a second voltage level, wherein the pull-down circuit comprises: a transistor coupled at one end to the at least one of the bus lines of the data bus and at the other end to ground; and logic circuitry coupled to a gate of the transistor, wherein an output signal from the logic circuitry controls the transistor, wherein the logic circuitry comprises a first input terminal for receiving an equilibration signal and a second input terminal for receiving a data signal.