Patent ID: 7649781

Claim:
A device, comprising: a trimmable current source comprising an output to provide a trimmed current, the trimmed current sensitive to changes in operating and process characteristics similar to a current of a bit cell of a memory array of the device; a non-trimmable current source comprising an output to provide an untrimmed current substantially insensitive to the changes in operating and process characteristics; a summing module comprising: a first input coupled to the output of the trimmable current source; a second input coupled to the output of the non-trimmable current source; a summer coupled to the first input and the second input; and an output to provide a reference current based on a current at the summer; and a current comparison module comprising an input coupled to the output of the trimmable current source, and an output to provide a control signal based on a comparison of the trimmed current to a threshold; wherein the non-trimmable current source further comprises an input coupled to the output of the current comparison module, and wherein a level of the untrimmed current is based on the control signal.