Patent ID: 7262101

Claim:
A method of manufacturing a semiconductor integrated circuit device having a p-type MISFET, comprising the steps of: (a) forming a silicon oxide film, for a gate insulating film of said p-type MISFET, on a main surface of a semiconductor substrate made of monocrystalline silicon, by heating the semiconductor substrate; (b) introducing nitrogen into the silicon oxide film by heating the semiconductor substrate in an atmosphere containing an NO gas or N 2 O gas; (c) after step (b), introducing nitrogen into the silicon oxide film by exposing the semiconductor substrate to a nitrogen plasma atmosphere; and (d) forming a gate electrode of said p-type MISFET, doped with a p-type impurity, over the main surface after the steps (b) and (c); and (e) forming p-type semiconductor areas for source and drain regions of said p-type MISFET, in said semiconductor substrate, such that, in the semiconductor integrated circuit device formed, the nitrogen introduced into the silicon oxide film has a first peak concentration near the interface between the semiconductor substrate and the gate insulating film and a second peak concentration near the surface of the gate insulating film, and the second peak concentration of nitrogen is made higher than 10 atomic %.