Patent ID: 7705841

Claim:
A display system capable of embeddedly transmitting data signals, control signals, clock signals and setting signals via an EDDS (embedded-all in data lines differential signaling) interface comprising: a source driver having: an outputting means for outputting embedded signals including data signals, control signals, clock signals and setting signals, the setting signals including DATAPOL signals, SHL signals and SHR signals for respectively setting the data-inversion pins, the shift-left pins and the shift-right pins of the source driver; a first receiving means operative based on a first embedded signal that includes a first setting signal, the data signals, the control signals, and the clock signals, and comprising a first decoding means for decoding the first embedded signal and thereby generating a corresponding driving signal; and a second receiving means operative based on a second embedded signal that includes a second setting signal, the data signals, the control signals, and the clock signals, and comprising a second decoding means for decoding the second embedded signal and thereby generating the corresponding driving signal; and a controller having an EDDS interface comprising: a first pair of differential data lines for transmitting the first embedded signal outputted by the outputting means to the first receiving means; and a second pair of differential data lines for transmitting the second embedded signal outputted by the outputting means to the second receiving means.