Patent ID: 7123052

Claim:
A programmable logic integrated circuit device comprising: a plurality of conductors operative to convey signals between any of the logic regions of the first plurality of logic regions; a first plurality of programmable logic regions; a second plurality of programmable logic regions, wherein the second plurality of logic regions is a subset of the first plurality; a third plurality of programmable logic regions, wherein the third plurality of logic regions is a subset of the first plurality; a first interconnection conductor extending from a particular logic region of the first plurality to each of the logic regions in the second plurality and operative to convey signals between the particular logic region and each of the logic regions in the second plurality; and a second interconnection conductor extending from the particular logic region the first plurality each of the logic regions in the third plurality and operative to convey signals between the particular logic region and each of the logic regions in the third plurality, wherein the first and second interconnection conductors convey signals at higher speeds than the plurality of conductors operative to convey signals between any of the logic regions of the first plurality.