Patent ID: 8044716

Claim:
An adjustable, segmented amplifier architecture, comprising: a first fixed stage configured to amplify an analog signal in accordance with a fixed amplification, and provide the analog signal amplified in accordance with the fixed amplification to a first common node; an adjustable stage in communication with the first fixed stage, the adjustable stage comprising a plurality of independently selectable parallel amplifier segments, each of the parallel amplifier segments having (i) an input at the first common node and (ii) an output at a second common node, wherein the adjustable stage is configured to amplify the analog signal provided to the first common node in accordance with an adjustable amplification that is adjustable depending upon a number of the independently selectable parallel amplifier segments having been selected to amplify the analog signal provided to the first common node, and provide the analog signal amplified in accordance with the fixed amplification and amplified in accordance with the adjustable amplification to the second common node; and a matching network coupled to the first fixed stage and to the adjustable stage, wherein the matching network is configured to receive an output signal in one of a plurality of power ranges corresponding to the selected number of the independently selectable parallel amplifier segments.