Patent ID: 8525251

Claim:
A nonvolatile programmable logic switch comprising: a device isolation region formed in a semiconductor substrate; first and second semiconductor regions of a first conductivity type, the first and second semiconductor regions being formed in the semiconductor substrate and being separated from each other by the device isolation region; a memory cell transistor including: a first source region and a first drain region of a second conductivity type, the first source region and the first drain region being formed at a distance from each other in the first semiconductor region; a first insulating film formed on a portion of the first semiconductor region, the portion being located between the first source region and the first drain region; a charge storage film formed on the first insulating film; a second insulating film formed on the charge storage film; and a control gate formed on the second insulating film; a pass transistor including: a second source region and a second drain region of the second conductivity type, the second source region and the second drain region being formed at a distance from each other in the second semiconductor region; a third insulating film formed on a portion of the second semiconductor region, the portion being located between the second source region and the second drain region; and a gate electrode formed on the third insulating film, the gate electrode being electrically connected to the first drain region; and an electrode for applying a substrate bias to the first and second semiconductor regions, the electrode being formed in the semiconductor substrate.