Patent ID: 8225243

Claim:
A concurrent development system for concurrent development of an ASIC and a programmable logic device used by a user from a computer connected to a network, comprising: an ASIC logic synthesis unit that executes logic synthesis of the ASIC in response to a request from the user, to obtain a first logic synthesis result; an ASIC logic synthesis result determining unit that determines whether the first logic synthesis result satisfies a speed performance required by the user, to obtain a determination result; a programmable logic device logic synthesis unit that executes logic synthesis of the programmable logic device, based on the determination result to obtain a second logic synthesis result; a logic synthesis result displaying unit that displays the first logic synthesis result and the second logic synthesis result on the computer; and a logic synthesis informing unit that informs the user by an e-mail, of start of the logic synthesis of the ASIC and the first logic synthesis result, and of start of the logic synthesis of the programmable logic device and the second logic synthesis result.