Patent ID: 8527727

Claim:
A semiconductor storage device comprising: a first storing unit as a cache memory; a second storing unit and a third storing unit included in a nonvolatile semiconductor memory in which data reading and writing is performed by a page unit and data erasing is performed by a block unit larger than the page unit; and a controller that allocates storage areas of the nonvolatile semiconductor memory to the second storing unit and the third storing unit by a logical block unit associated with one or more blocks, wherein the controller includes a write control unit that writes a plurality of data in a sector unit into the first storing unit, a flush control unit that flushes a plurality of data written in the first storing unit to the second storing unit as data in a first management unit having a size N times a size of the sector unit, wherein N is a natural number 2 or greater, and flushes a plurality of data written in the first storing unit to the third storing unit as data in a second management unit having a size M times a size of the first management unit, wherein M is a natural number 2 or greater, an organizing unit that, when a resource usage of the nonvolatile semiconductor memory exceeds a predetermined threshold, increases a resource by organizing data in the nonvolatile semiconductor memory, and an organizing-state notifying unit that, when an organizing-state notification request is input from a host, analyzes an organizing state by the organizing unit and outputs an analysis result to the host as an organizing-state notification.