Patent ID: 7876855

Claim:
A mixer circuit for reducing the power level of spurious output signals, the mixer comprising: a first mixer stage which includes a first mixer with first and second input ports and a first output port, said first input port for receiving an input signal and mixing said input signal with a modulated first local oscillator signal to generate a first output signal having a first frequency and spurious output signals at frequencies other than said first frequency; a second mixer stage which includes a second mixer with third and fourth input ports and a second output port, said first output port of said first mixer electrically coupled to said third input port of said second mixer for mixing said first output signal from said first mixer with a modulated second local oscillator signal and generating a second output signal at a second frequency and spurious output signals at frequencies other than said first frequency and said second frequency; a phase modulator for phase modulating a first local oscillator signal, modulated by a pseudorandom number defining said modulated first oscillator signal, said phase modulator electrically coupled to said second input port of said first mixer; and an inverse phase modulator for inverse phase modulating a second local oscillator signal, modulated by the same pseudorandom number defining said modulated second oscillator signal, said inverse phase modulator electrically coupled to said fourth input port of said second mixer to produce an output signal at said second output port with reduced spurious signals.