Patent ID: 6890852

Claim:
A method for manufacturing a semiconductor device that has a substrate with an interlayer insulation film thereon, the interlayer insulation film having therein a contact hole, a via hole, or a trench for a plug electrode or buried wiring, wherein the contact hole, via hole, or trench is lined with a tantalum oxide film, a tantalum-base barrier film, an amorphous metal film, and a copper-based conductive film and is filled with the copper-based conductive film to form a plug electrode or buried wiring, the method comprising the steps of: preparing a semiconductor substrate, formed in which is the interlayer insulation film provided with the contact hole, via hole, or trench; forming the tantalum-base barrier film in the contact hole, via hole or trench; forming the copper-based conductive film on the tantalum-base barrier film; and forming the tantalum oxide film between the interlayer insulation film and the tantalum-base barrier film at an interface surface therebetween and at a same time forming the amorphous metal film comprising tantalum and copper between the tantalum-base barrier film and the copper-based conductive film at an interface surface therebetween by heat treating the semiconductor substrate with the tantalum-base barrier film and the copper-based conductive film in a non-oxidizing atmosphere.