Patent ID: 8772772

Claim:
A tool for use in analyzing results of one or more processes comprising: a reactor array comprising a pattern of isolated reaction areas for performing a semiconductor process in each reaction area to deposit a substantially uniform layer within each reaction area, wherein the reactor array has openings which have removable sleeves disposed therein; a semiconductor substrate aligned with the reactor array, the semiconductor substrate forming a surface of the plurality of the reaction areas, a plurality of test structures being fabricated on the semiconductor substrate, at least some of the test structures having a location corresponding to a reaction area of the reactor array; each test structure comprising a structure that facilitates testing of the results of the semiconductor process performed in a reaction area; and a plurality of process devices for performing the semiconductor processes in the reaction areas, each of the process devices forming a seal with a top surface of the removable sleeve, wherein a bottom surface of the removable sleeve seals with a top surface of the semiconductor substrate, the removable sleeve removably coupled to the top surface of the semiconductor substrate and a surface of the reactor array, wherein the reactor array is operable to form multiple layers of different material in different isolated reaction areas without changing orientation of the reactor array; wherein a support tray aligns the reactor array and the semiconductor substrate; wherein the reactor array is affixed to the semiconductor substrate by the support tray after alignment of the semiconductor substrate to the reactor array.