Patent ID: 7360199

Claim:
An iterative optical proximity correction (OPC) method for refining an integrated circuit (IC) layout, the IC layout having a plurality of edge fragments, the method comprising: determining a directional orientation of each edge fragment; grouping edge fragments of the same directional orientation to form mutually exclusive directional orientation sets; selecting an edge fragment from one of the mutually exclusive sets; calculating an edge placement error (EPE) of the selected edge fragments; shifting the selected edge fragment based on the calculated EPE to a new position; updating the orientation of the shifted edge fragment; selecting an edge fragment from another one of the mutually exclusive sets; and reiterating calculating the EPE of the edge fragment, shifting edge fragment and updating orientation and selecting of an edge of a different directional orientation to attain a predetermined limit; wherein the reiterating calculating the EPE of the edge fragment alternates between mutually exclusive sets; and wherein the mutually exclusive sets contain edge fragments of non-opposing directional orientation.