Patent ID: 6874045

Claim:
A digital signal processor comprising: reception means for receiving 1-bit audio signals acquired by delta-sigma modulation and sent over a transmission line; memory means for temporarily storing the 1-bit audio signals received by the reception means; monitoring means for monitoring an amount of data stored in the memory means based on relations between a data amount in the memory means and predetermined values; mute signal generating means for generating a 1-bit digital signal indicative of a mute signal; changeover means for making a changeover between the 1-bit audio signals read from the memory means and the 1-bit digital signal indicating the mute signal received from the mute signal generating means; D-A conversion means for converting the 1-bit digital signal supplied from the changeover means into an analog signal; and control means for making a changeover between the 1-bit digital signal indicating the mute signal received from the mute signal generating means and 1-bit audio signals read from the memory means based on the relations between the data amount in the memory means and the predetermined values and monitored by the monitoring means and supplying the signal having been changed over to the D-A conversion means.