Patent ID: 8124511

Claim:
A method of manufacturing a semiconductor device, comprising: forming gate electrodes over a semiconductor substrate comprising silicon; amorphizing the semiconductor substrate with a neutral species, the amorphizing creating amorphous regions adjacent the gate electrodes having a first depth in the semiconductor substrate; forming shallow source/drains adjacent the gate electrodes by placing conductive dopants in the semiconductor substrate to a second depth less than the first depth, wherein displaced silicon atoms and the conductive dopants are substantially contained within the first depth such that only trace amounts less than 1E17 atoms/cm 3 of displaced atoms extend past the first depth; forming sidewall spacers adjacent the gate electrodes; forming deep source/drains adjacent the gate electrodes; conducting a first anneal subsequent to forming the deep source drains; and conducting a second anneal subsequent to the first anneal, wherein the first and second anneals re-crystallize the amorphous regions.