Patent ID: 7875509

Claim:
A manufacturing method of semiconductor device, the semiconductor device comprising: a first semiconductor layer of a first conductivity type formed as an SOI substrate serving as an active layer; a second semiconductor layer of a second conductivity type formed in a first main surface of the first semiconductor layer; a third semiconductor layer of the first conductivity type formed in a surface of the second semiconductor layer; a fourth semiconductor layer of the first conductivity type formed in the first main surface of the first semiconductor layer at a distance from the second semiconductor layer; a fifth semiconductor layer of the first or second conductivity type formed in a surface of the fourth semiconductor layer, wherein the fifth semiconductor layer has a higher impurity concentration than the fourth semiconductor layer; a first electrode in contact with the second semiconductor layer and the third semiconductor layer; a second electrode in contact with the fourth semiconductor layer; a gate electrode formed so as to spread over the first, second and third semiconductor layers; and the first semiconductor layer being formed so as to have a second main surface on a support substrate via an insulation film, wherein impurities are introduced into the SOI substrate serving as the active layer of the semiconductor device by using an ion implantation method and thereby the first semiconductor layer is formed, and wherein, in the SOI substrate serving as the active layer, a concentration of p-type or n-type impurities is 2E14 cm −3 or less.