Patent ID: 8671126

Claim:
A linear interpolator which performs operations to calculate a linear interpolated value C expressed by an expression of C=(1−α)*A+α*B based on two interpolation target values A and B and an interpolation rate α (0≦α≦1), comprising: first interpolation target value input means for inputting an interpolation target value A as digital data of n bits in total including bits a n−1 , a n−2 , . . . , a 1 , and a 0 in order from the most significant bit side; second interpolation target value input means for inputting an interpolation target value B as digital data of n bits in total including bits b n−1 , b n−2 , . . . , b 1 , and b 0 in order from the most significant bit side; interpolation rate determining value input means for inputting an interpolation rate determining value D having a relationship of “α=D/(2 n −1)” with the interpolation rate α, as digital data of n bits in total including bits d n−1 , d n−2 , . . . , d 1 , and d 0 in order from the most significant bit side; arithmetic means for generating digital data of 2n bits in total composed of, in order from the most significant bit side, n bits in total of c 2n−1 , c 2n−2 , . . . , c n+1 , and c n composing an integer part, and n bits in total of c n−1 , c n−2 , . . . , c 1 , and c 0 composing a decimal part by performing arithmetic operations based on an arithmetic expression of C=(Σ j=0˜n−1 e j 2 (j−n) +e n−1 2 −n )*Σ i=0˜n−1 a i 2 i +(Σ j=0˜n−1 d j 2 (j−n) +d n−1 2 −n )*Σ i=0˜n−1 b i 2 i (e i is a logically inverted bit of d i ); and calculated value output means for outputting “digital data of 2n bits in total obtained by arranging the bits c 2n−1 , c 2n−2 , c 2n−3 , . . . , c 1 , and c 0 in sequence in order from the most significant bit side” or “digital data corresponding to a necessary number of significant figures of the digital data of 2n bits” as digital data indicating a linear interpolated value C, wherein the arithmetic means comprises: a selector which selects and outputs either bit a i or b i (i=0, 1, 2, . . . (n−1)) based on a logical value of a predetermined bit of digital data indicating an interpolation rate determining value D; and a counter which inputs the bit a i or b i (i=0, 1, 2, . . . (n−1)), an output value of the selector or output value of another counter, and outputs a result of addition of the inputted values.