Patent ID: 8045304

Claim:
A semiconductor circuit, comprising: a first pad for a first power source; a second pad for a second power source; a third pad for an input/output signal; a silicon controlled rectifier (SCR) arranged between the third pad and the second pad; and a transistor functioning as a trigger element to flow a trigger current to a gate of the SCR, the transistor including a gate and a backgate being connected to the first pad, wherein an anode of the SCR is connected to the third pad, wherein a cathode of the SCR is connected to the second pad, wherein the gate of the SCR is connected to the source of the transistor, wherein the SCR comprises: a member of a P-type substrate or a P-well; a first P + region formed in the member and connected to the second pad; a first N + region formed in the member and connected to the second pad; an N-well formed in the P- type substrate or adjacent to the P-well; a second P + region formed in the N-well and connected to the third pad; and a second N + region formed in the N-well and connected to the source of the transistor, and wherein the first N + region and the second P + region are formed adjacent to each other and are formed between the first P + region and the second N + region.