Patent ID: 7564456

Claim:
A graphics pipeline, comprising: a raster processor to rasterize graphical primitives, said raster processor generating a raster output in the form of a stream of groups of pixels, each group of pixels comprising a first pre-selected number of contiguous pixels and at least one sample per pixel identifying a source primitive covering the sample location; and a tile coalesce unit, said tile coalesce unit receiving said stream of groups of pixels from said raster processor and coalescing accumulated groups of pixels into pixel tiles comprising a second pre-selected number of groups of pixels such that an individual pixel tile covers a region of pixel locations greater than an individual group of pixels; wherein said pixel tiles permit at least one downstream pixel processing stage to perform at least one transaction on tile-sized regions of pixels; wherein said tile coalesce unit comprises a tile cache for storing sample information for a plurality of pixel locations and wherein said tile cache is operative to maintain different versions of pixel tiles having the same (x, y) coordinates.