Patent ID: 8338219

Claim:
A method of making a multi-pixel, photo detector array of Schottky photodiodes on a semiconductor substrate having a dopant concentration between 10 18 and 10 19 atoms/cm 3 , comprising: a) growing a first relatively thin epitaxial layer with a dopant concentration between 10 17 and 10 18 atoms/cm 3 of a same conductivity type as a dopant of the substrate, on a front side thereof; b) growing a second relatively thick epitaxial layer with a dopant concentration between 10 13 and 10 15 atoms/cm 3 of same conductivity type as the dopant of the substrate and a thickness between 3 and 150 μm, over the first relatively thin epitaxial layer; c) depositing a sacrificial metal hardmask layer; d) defining an array of uniformly spaced parallel openings through the sacrificial metal hardmask layer by a first lithography step of a given spacing and width of the uniformly spaced parallel openings; e) anisotropically etching the second relatively thick epitaxial layer through the uniformly spaced parallel openings of the metal hardmask layer, forming trenches of a given depth, and removing residual metal of the metal hardmask layer; f) depositing a metal layer of Schottky contact by a conformal metal deposition technique for completely filling the trenches, and etching the deposited metal layer for removing it from a planar front surface; g) repeating steps c) d) e) and f) for each other pixel of the array for as many different depths of the metal filled trench contacts as the number of pixels of the array of respective spacing and width of the metal filled trenches; h) depositing a metal layer on the planer front surface in contact with the Schottky contact metal filler of all the trenches of all the array pixels; i) defining a common anode current distributor grid from the deposited metal layer for connecting, in common, the Schottky contact metal filler of all the trenches and forming a connectable anode terminal pad, by a second lithography step and selective wet etch process; j) depositing a passivating layer conformally over the planar front surface for coating the defined parts of the metal layer; k) removing the passivating layer in areas of separation among coated parallel stripes of the common anode current distributor defined over the metal filled trenches by a third lithography step and dry etch process; and l) depositing a metallization layer over the rear surface of the semiconductor substrate to define a connectable cathode terminal.