Patent ID: 7687381

Claim:
A method of forming an integrated circuit device, comprising: forming an electrically insulating layer on a substrate; forming a hard mask on the electrically insulating layer; selectively etching the hard mask and the electrically insulating layer in sequence to define an opening therein that exposes inner sidewalls of the hard mask and the electrically insulating layer recessing the inner sidewall of the hard mask relative to the inner sidewall of the electrically insulating layer, using a sacrificial first layer on the hard mask as an etching mask; removing the sacrificial first layer while concurrently forming a reaction layer on the inner sidewall of the electrically insulating layer that recesses the inner sidewall of the electrically insulating layer; selectively etching a portion of the substrate in the opening using the reaction layer as an etching mask; and then removing the reaction layer from the recessed inner sidewall of the electrically insulating layer.