Patent ID: 7880289

Claim:
A semiconductor package comprising: a semiconductor wafer having first and second opposite surfaces, and an outer peripheral sidewall surface extending between the first and second opposite surfaces; a plurality of conductive pads disposed along an edge of the first surface of the semiconductor wafer proximate the outer peripheral sidewall surface; an insulating layer disposed on the first surface of the semiconductor wafer, the insulating layer covering only one portion of each conductive pad, wherein an opening in the insulating layer exposes another portion of the conductive pad; a plurality of connection terminals each extending through an opening in the insulating layer so as to be disposed on and electrically connected to a respective one of the conductive pads; and a reinforcing member disposed on the insulating layer and in contact with each connection terminal, and wherein each connection terminal has a side surface substantially coplanar with the outer peripheral sidewall surface of the semiconductor wafer such that the side surface of each connection terminal is exposed at a side of the package.