Patent ID: 7189654

Claim:
A manufacturing method for wiring, comprising: forming a first conductive layer and a second conductive layer over a substrate having a dielectric surface in a selective manner with a CVD method, an evaporation method, or a sputtering method; discharging a compound to selectively form a first resist layer over the first conductive layer and to selectively form a second resist layer over the second conductive layer wherein the first resist layer comprises a first resist mask selectively provided over the first conductive layer and wherein the second resist layer comprises a second resist mask selectively provided over the second conductive layer; etching the first conductive layer and the second conductive layer with plasma generating means using the first resist mask and the second resist mask under an atmospheric pressure or a pressure close to the atmospheric pressure; and ashing the first resist mask and the second resist mask with the plasma generating means under the atmospheric pressure or a pressure close to the atmospheric pressure.