Patent ID: 8088653

Claim:
A method of manufacturing a thin-film transistor comprising: forming a gate electrode on a base substrate; forming a gate insulation layer on the substrate to cover the gate electrode; forming an active layer on the gate insulation layer to cover the gate electrode; forming a buffer layer on the active layer to suppress oxidation of the active layer, the buffer layer comprising a first connection layer; forming the first connection layer using at least a first gas in a deposition process; gradually increasing a flow rate of the first gas as the deposition process progresses; primarily etching first predefined portions of the buffer layer and the active layer; forming a source electrode and a drain electrode on the primarily etched active layer, wherein the source electrode and the drain electrode are separated from each other by a predetermined distance; and secondarily etching second predefined portions of the buffer layer and the active layer, using as an etching mask at least one of the source electrode and the drain electrode.