Patent ID: 7211485

Claim:
A method of fabricating a flash memory device, the method comprising the steps of: forming an isolation layer defining an active region in a semiconductor substrate, wherein the isolation layer is formed to have protrusion higher than a top surface of the active region, and to provide a groove in the active region; forming a conductive layer pattern in the groove; forming a buffer layer on the semiconductor substrate having the conductive layer pattern; forming an oxidation barrier layer pattern having a line-shape opening across the active region on the buffer layer; selectively oxidizing the buffer layer and an upper portion of the conductive layer pattern, which are exposed by the opening, to form a mask oxide layer at a cross region of the opening and the active region, and simultaneously to form a buffer oxide layer on the isolation layer adjacent to the mask oxide layer; removing the oxidation barrier layer pattern; and etching the buffer layer and the conductive layer pattern using the mask oxide layer, the buffer oxide layer and the isolation layer as etch masks, so as to form a floating gate on the active region.