Patent ID: 7572681

Claim:
A method of forming an encased electronic component package comprising: providing a substrate, the substrate having a substrate first surface and a substrate second surface, opposite the substrate first surface; providing a first dielectric layer, the first dielectric layer having a first dielectric layer first surface and a first dielectric layer second surface, opposite the first dielectric layer first surface; applying the first dielectric layer second surface to the substrate first surface; forming first via apertures and first trace trenches in the first dielectric layer first surface; filling the first via apertures and first trace trenches with an electrically conductive material to form first electrically conductive vias and first electrically conductive traces electrically coupled to selected locations on the substrate first surface; providing an electronic component, the electronic component having an electronic component first surface and an electronic component second surface, opposite the electronic component first surface, a plurality of bond pads being formed on the electronic component; attaching the electronic component second surface to an attachment region formed on the first dielectric layer first surface; providing a second dielectric layer, the second dielectric layer having a second dielectric layer first surface and a second dielectric layer second surface, opposite the second dielectric layer first surface and a die hole; applying the second dielectric layer second surface to the first dielectric layer first surface such that the electronic component is positioned inside the die hole of the second dielectric layer; providing a third dielectric layer, the third dielectric layer having a third dielectric layer first surface and a third dielectric layer second surface, opposite the third dielectric layer first surface; applying the third dielectric layer second surface to the second dielectric layer first surface such that the third dielectric layer second surface covers the electronic component, thereby forming an encasement around the electronic component; forming second via apertures through the encasement to expose selected bond pads of the plurality of bond pads, selected first electrically conductive vias of the first electrically conductive vias and selected first electrically conductive traces of the first electrically conductive traces; and filling the second via apertures with an electrically conductive material to form electrically conductive second vias electrically coupled to the selected bond pads, the selected first electrically conductive vias and the selected first electrically conductive traces.