Patent ID: 7096472

Claim:
A computer in which a plurality of programs, each including at least one user process, are executed by a single processor, the computer comprising: an operating system operable to manage the single processor; means for executing first and second user processes; means for detecting requests to interrupt the first and second user processes; means for switching context between the first and second user processes in response to a selected interrupt request; memory employed for storing data during execution of the first and second user processes; a memory management mechanism included in the operating system; and means for ensuring atomicity of the first user process, including: a memory protection function included in the memory management mechanism for controlling access to the memory; a predetermined register; means for initiating execution of the first user process, wherein the means for switching context is operable to switch the context from the first user process to the second user process in response to the selected interrupt request; means for overwriting an invalid address in the predetermined register in response to a further interrupt request to switch the context back to a re-execution of the first user process, the memory protection function being responsive to detection of the invalid address for preventing the first user process from being active; and means for returning processing of the first user process to the means for initiation execution, whereby atomicity of the first user process may be ensured.