Patent ID: 8278988

Claim:
A semiconductor device comprising: timer logic for generating a first modulated waveform signal; delay logic operably coupled to the timer logic and arranged to provide a first delay in a rising edge of the first modulated waveform signal generated by the timer logic and provide a second delay in a falling edge of the first modulated waveform signal generated by the timer logic, such that the first delay and second delay of the first modulated waveform signal form a second, refined modulated waveform signal that comprises a higher frequency resolution than a frequency resolution of the first modulated waveform signal; wherein the delay in the rising edge of the first modulated waveform signal ‘td1[k]’ comprises a rising edge delay increment ‘dtL’, falling edge delay increment ‘dtH’ and a rising edge delay value calculated in the preceding waveform cycle ‘td1[k−1]’.