Patent ID: 8453080

Claim:
A method of data processing, said method comprising: a data processing system receiving one or more hardware description language (HDL) files describing: a plurality of hierarchically arranged design entities defining a digital design to be simulated, wherein said plurality of hierarchically arranged design entities contain a plurality of configuration latches; and a plurality of configuration entities not belonging to the digital design that logically control settings of the plurality of configuration latches; the data processing system compiling the one or more HDL files to obtain a simulation executable model of the digital design and an associated configuration database representing the plurality of configuration entities and instances thereof, wherein the compiling includes: parsing a configuration statement that specifies an association between an instance of a configuration entity among the plurality of configuration entities and a specified configuration latch; determining whether or not the specified configuration latch is described in the one or more HDL files; and in response to determining that the specified configuration latch is not described in the one or more HDL files: creating an indication in the configuration database that the instance of the configuration entity had a specified association to a configuration latch to which it failed to bind, wherein said creating comprises creating the indication in the configuration database in response to the one or more HDL files indicating that failure of the configuration statement to bind is not an error; and flagging the configuration statement as containing an error in response to the one or more HDL files not indicating that failure of the configuration statement to bind is not an error.