Patent ID: 7975094

Claim:
A programmable interface comprising: a register file having a plurality of registers, each register having a type; a run control register; a microcontroller configured to bidirectionally communicate with the register file and the run control register; a Code Store SRAM configured to bidirectionally communicate with the microcontroller; and executable code including one or more instructions; wherein the Code Store SRAM and the run control register are configured to bidirectionally communicate with a system processor that is external to the programmable interface; and wherein the system processor is configured to load the executable code onto the Code Store SRAM and is further configured to signal the microcontroller, via the run control register, to begin execution of the one or more instructions included in the executable code; and wherein the plurality of registers includes (i) a general-purpose microcontroller register, (ii) a timer register, (iii) an external input/output (I/O) interface register, (iv) an internal I/O register, (v) a shared register, (vi) an interrupt register, and (vii) a first-in, first-out (FIFO) register configured to communicate with a direct memory access (DMA) controller.