Patent ID: 7679129

Claim:
A memory device, comprising: a semiconductor substrate; a first dielectric layer formed over the semiconductor substrate; at least two charge storage elements formed over the first dielectric layer, where the semiconductor substrate and the first dielectric layer include a shallow trench filled with an oxide material, the shallow trench having opposing sidewalls, and where the oxide material, formed in a center portion of the shallow trench below an upper surface of the semiconductor substrate and between the opposing sidewalls, is removed to provide a region with a substantially rectangular cross-section, and where the oxide material is removed, so that a top surface of the oxide material is in contact with the at least two charge storage elements and does not extend past a top surface of the first dielectric layer; and an intergate dielectric formed over at least one of the at least two charge storage elements, the intergate dielectric extending into the center portion of the shallow trench.