Patent ID: 8242613

Claim:
A semiconductor die, comprising: a first row of bond pads disposed along a first edge of the device; a second row of bond pads disposed along a second edge of the device, wherein the second row is perpendicular to the first row; wherein each bond pad includes at least an input/output (IO) pad area for providing an IO connection to circuitry of the device and an IO probe area for receiving a tip of a test probe; wherein the IO pad areas of the bond pads of the first row are aligned with each other, the IO probe areas of the bond pads of the first row are aligned with each other, and the IO probe areas of the bond pads of the second row are aligned with each other; a first corner keep out area, located between the first and second rows at a first corner of the device, wherein design layout rules specify that a bond pad that is to be probed cannot be placed in the first corner keep out area; and a first L-shaped additional bond pad located between the first corner keep out area and a first bond pad in the first row of bond pads, wherein the additional bond pad has an IO pad area that is aligned with the IO pad areas of the bond pads of the first row and an IO probe area that is aligned with the IO probe areas of the bond pads of the second row, and wherein the IO probe area extends into the first corner keep out area.