Patent ID: 7218616

Claim:
An interconnection network for routing data packets comprising: eight switching circuits capable of transferring data packets with each other; eight sequential data links bidirectionally coupling said eight switching circuits in sequence to thereby form an octagonal ring configuration; and only four crossing data links, wherein a first crossing data link bidirectionally couples a first switching circuit to a fifth switching circuit, a second crossing data link bidirectionally couples a second switching circuit to a sixth switching circuit, a third crossing data link bidirectionally couples a third switching circuit to a seventh switching circuit, and a fourth crossing data link bidirectionally couples a fourth switching circuit to an eighth switching circuit, wherein said first switching circuit has switch address 0 (S 0 ), said second switching circuit has switch address 1 (S 1 ), said third switching circuit has switch address 2 (S 2 ), said fourth switching circuit has switch address 3 (S 3 ), said fifth switching circuit has switch address 4 (S 4 ), said sixth switching circuit has switch address 5 (S 5 ), said seventh switching circuit has switch address 6 (S 6 ), and said eighth switching circuit has switch address 7 (S 7 ), wherein each of said eight switching circuits is associated with a processing node capable of processing said data packets, wherein a selected one of said eight switching circuits having switch address S(i) transfers a received data packet to a next sequential one of said eight switching circuits having switch address S(i+1) (modulo 8) if a destination switch address associated with said received data packet exceeds said switch address S(i) of said selected switching circuit by no more than 2.