Patent ID: 8502363

Claim:
An electronic device, comprising: a semiconductor device package including a die pad; a plurality of leads disposed about the die pad; a plurality of enhancement elements disposed about the die pad, wherein each of the enhancement elements has a substantially triangular outer surface and three side surfaces; a chip disposed on the die pad and electrically connected to the leads; and a package body encapsulating the chip, at least portions of the leads and at least portions of the enhancement elements, but leaving exposed at least two of the side surfaces of each enhancement element, wherein the exposed side surfaces of the enhancement elements are coplanar with side surfaces of the package body; a substrate including a plurality of first pads corresponding to the leads and a plurality of second pads corresponding to the enhancement elements; a plurality of first solder joints disposed between the first pads and the leads; and a plurality of second solder joints disposed between the second pads and the enhancement elements; wherein a surface area of each of the second pads is larger than a surface area of a corresponding one of the enhancement elements; and wherein the second solder joints contact the side surfaces of the enhancement elements.