Patent ID: 8164163

Claim:
A semiconductor device, comprising: an interlayer insulating film formed on a substrate; a first seal wiring formed in the interlayer insulating film in a periphery of a chip region and surrounding the chip region; and a first protective film formed on the interlayer insulating film having the first seal wiring formed therein, wherein the first protective film is provided with a first opening such that at least a part of the first seal wiring and at least a part of the interlayer insulating film are exposed from the first protective film, the first opening includes a first region and a second region located outside the first region when viewed from the chip region, a part of the first protective film is located outside the second region when viewed from the chip region, the first region is provided with a cap layer so as to be in contact with the first seal wiring, and the second region is not provided with the cap layer and exposes the interlayer insulating film from the first protective film.