Patent ID: 7739423

Claim:
A network device for processing packets, the network device comprising: a CPU processing module for transmitting information between at least one memory location on the network device and an external CPU memory location, wherein the CPU processing module comprises: a first engine for performing bulk transfer of information from the at least one memory location on the network device to the external CPU memory location, wherein all entries of the at least one memory location on the network device are transferred to the external CPU memory location, and a second engine for performing bulk transfer of information from the external CPU memory location to at least one memory location on network device, wherein a plurality of entries from the external CPU memory location is transferred to the memory locations on the network device and the second engine uses a bit received from a CPU in communication with the CPU processing module to determine whether entries will be added in a forward direction or a backwards direction in the at least one memory location on the network device, wherein the CPU processing module is configured to receive the bit that is set to one of a forward insertion when a value is being deleted from the at least one memory location on the network device or a backward insertion when a value is being added to the at least one memory location on the network device.