Patent ID: 8424202

Claim:
A process for fabricating a circuit board, the process comprising: providing a circuit substrate having a first surface and a first circuit layer; forming a first dielectric layer on the circuit substrate, the first dielectric layer having a second surface and covering the first surface and the first circuit layer; forming an antagonistic activation layer on the second surface of the first dielectric layer; irradiating the antagonistic activation layer by a laser beam to form an intaglio pattern and at least a blind via extending from the antagonistic activation layer to the first circuit layer; forming a first conductive layer in the at least a blind via; and forming a second conductive layer in the intaglio pattern and the at least a blind via, the second conductive layer covering the first conductive layer and electrically connecting the first circuit layer via the first conductive layer; and removing the antagonistic activation layer to expose the second surface of the first dielectric layer.