Patent ID: 7440861

Claim:
A method of generating an output signal of a circuitry on a semiconductor circuit chip, comprising: generating, by means of a first functional element, a first output signal based on a first electronic functional-element parameter of the first functional element, and on a mechanical stress in the semiconductor circuit chip, wherein the first electronic functional-element parameter exhibits a dependence on the mechanical stress in the semiconductor circuit chip in accordance with a first functional-element stress influence function; and generating, by means of a second functional element, a second output signal based on a second electronic functional-element parameter of the second functional element, and on a mechanical stress in the semiconductor circuit chip, wherein the second electronic functional-element parameter exhibits a dependence on the mechanical stress in the semiconductor circuit chip in accordance with a second functional-element stress influence function; and combining the first and second output signals to obtain the output signal of the circuitry, wherein the output signal has a predefinable dependence on the mechanical stress in the semiconductor circuit chip, wherein the first functional element and the second functional element are integrated on the semiconductor circuit chip and arranged, geometrically, such that the first and second functional-element stress influence functions are identical within a tolerance range.