Patent ID: 8581312

Claim:
A thin film transistor array panel comprising: a substrate comprising a display area in which a plurality of pixels are formed and a drive region in which a driving chip for transmitting a driving signal to the pixels is located; a gate line in the display area; a storage electrode line in the display area and separated from the gate line; a gate driving pad in the drive region and coupled to the driving chip; a gate insulating layer for covering the gate line, the storage electrode line, and the gate driving pad; a first semiconductor layer on the gate insulating layer and overlapped with a gate electrode protruding from the gate line; a second semiconductor layer on the gate insulating layer and overlapped with a sustain electrode protruding from the storage electrode line; a data line on the gate insulating layer and crossing the gate line in an insulated manner and a drain electrode separated from the data line; and a pixel electrode coupled to the drain electrode, wherein the drain electrode comprises a drain bar protruding from the data line and facing a source electrode, and a drain extender overlapped with the second semiconductor layer.