Patent ID: 7370126

Claim:
An apparatus for providing storage, comprising: a jitter buffer element that includes: a primary jitter buffer storage that includes a primary low water mark and a primary high water mark; and a secondary jitter buffer storage that includes a secondary low water mark and a secondary high water mark, wherein a first data segment within the primary jitter buffer storage is held for a processor, and wherein a playout point may advance from a bottom of the primary jitter buffer storage to the primary low water mark, when the playout point reaches the primary low water mark, the processor communicates a message for the secondary jitter buffer storage to request a second data segment up to the secondary high water mark associated with the secondary jitter buffer storage, and wherein the secondary jitter buffer storage maintains a third data segment stored in a tertiary jitter buffer storage, and wherein the tertiary jitter buffer storage includes a tertiary low water mark and a tertiary high water mark.