Patent ID: 8726211

Claim:
A method for use during static timing analysis of an integrated circuit design to produce an equivalent waveform model encoded in a computer readable storage device to represent a complex waveform provided during the analysis as input signal to a design cell coupled as a delay stage of an integrated circuit design comprising: configuring a computer to, use an analog model of an inner component, wherein the analog model is stored in a computer readable storage device, to simulate the inner component to produce multiple analog simulation output characterization waveforms as a function of multiple input waveforms used to characterize the design cell coupled as a delay stage of an integrated circuit design, wherein the analog simulation output characterization waveforms are stored in a computer readable storage device; use the analog model of the inner component to simulate the inner component to produce an analog simulation output waveform as a function of the complex waveform, wherein the analog simulation output waveform is stored in a computer readable storage device; and produce the equivalent waveform model as a function of the multiple analog simulation output characterization waveforms and the analog simulation output waveform, wherein the equivalent waveform model is stored in a computer readable storage device.