Patent ID: 7737553

Claim:
A semiconductor device, comprising: a plurality of package pins to be connected to external circuits, said package pins including a first package pin; a chip of a polygonal shape which includes a semiconductor integrated circuit; a first bonding pad formed at a peripheral part of said chip; a second bonding pad formed in a region on said chip inside said peripheral part; and a signal line connecting one of said plurality of package pins to said first and second bonding pads, said signal line including a first bonding wire which connects said first package pin directly to said first bonding pad, and a second bonding wire which directly connects said first package pin connected to said first bonding wire to said second bonding pad, said second bonding wire being longer than said first bonding wire, said first bonding pad being arranged between said second bonding pad and said first package pin, said first bonding pad, said second bonding pad, and said first package pin being aligned.