Patent ID: 8093623

Claim:
A semiconductor integrated circuit comprising: a protected circuit; a protection element formed on the same semiconductor substrate as the protected circuit and adapted to protect the protected circuit, and a well-in-well structure formed in the semiconductor substrate for a complementary metal-insulator-smeiconductor transistor circuit, wherein: the protection element includes two diodes having their anodes connected together to form a floating node and two cathodes connected to the protected circuit, the two diodes are formed in a well-in-well structure on the semiconductor substrate, and the well-in-well structure with the two diodes formed therein includes: a P-type well forming a floating gate, an N-type well which surrounds the surfaces of the P-type well other than that on the front side of the substrate with the deep portion side of the substrate so as to form the cathode of one of the diodes, and a first N-type region formed in the P-type well so as to form the cathode of the other diode, wherein the well-in-well structure with the two diodes formed therein has the same structure along the depth of the substrate (depth of the impurity region and concentration profile) as the well-in-well structure for a complementary metal-insulator-semiconductor transistor circuit.