Patent ID: 7994811

Claim:
A test device comprising: a first test region and a second test region defined on a semiconductor substrate; a first test element in the first test region, the first test element including a pair of first secondary test regions in the semiconductor substrate extending in a first direction and a pair of first test gate lines on the semiconductor substrate extending in a second direction, wherein one of the first test gate lines overlaps one of the first secondary test regions and the other first test gate line overlaps the other first secondary test region; and a second test element in the second test region, wherein the second test element includes structures corresponding to structures of the first test element except the second test element does not include structures corresponding to the pair of first secondary test regions and the pair of first test gate lines, wherein the first test element further includes, a pair of first primary test regions in the semiconductor substrate extending in the first direction, wherein one of the first primary test regions is separated from the other first primary test region by an isolation region and both of the first primary test regions are separated from the pair of first secondary test regions, a pair of first test shared contacts, wherein one of the first test shared contacts is at least partially on one of the first test gate lines and one of the first secondary test regions and the other first test shared contact is at least partially on the other first test gate line and the other first secondary test region, a pair of first test nodes, wherein one of the first test nodes is electrically connected to one of first test shared contacts and the other first test node is electrically connected to the other first test shared contact, and a first current detection part configured to measure a current between the pair of first test nodes, and the second test element includes a pair of second primary test regions in the semiconductor substrate, wherein one of the second primary test regions is separated from the other second primary test region by an isolation region and the pair of second primary test regions corresponds to the pair of first primary test regions, a pair of second test shared contacts corresponding to the pair of first test shared contacts, and a pair of second test nodes, wherein one of the second test nodes is electrically connected to one of the second test shared contacts and the other second test node is electrically connected to the other of the second test shared contacts and the pair of second test nodes corresponds to the pair of first test nodes of the first test element.