Patent ID: 7002831

Claim:
A magnetic semiconductor memory device comprising: a semiconductor substrate; first and second word lines arranged in parallel to each other on the semiconductor substrate; first and second bit lines crossing the first and second word lines via an insulator layer; and a first memory cell including a first transistor controlled by the first word line and a first magnetic resistance element disposed between the first transistor and the first bit line; a second memory cell including a second transistor controlled by the first word line and a second magnetic resistance element disposed between the second transistor and the second bit line; wherein each of the first and second magnetic resistance elements is formed into a pillar-like shape by patterning a plurality of layered structures formed on the semiconductor substrate, and at least the side surface is covered with the second word line via the insulator layer, wherein the magnetic semiconductor memory device further comprises a gap between a first part of the second word line along a side surface of the first magnetic resistance element and a second part of the second word line along a side surface of the second magnetic resistance element.