Patent ID: 7551059

Claim:
A hybrid imaging array comprising an array of infrared (IR) detector elements coupled to a CMOS readout integrated circuit having pixels arranged in a plurality of rows and columns, wherein each infrared detector element in the array of infrared detector elements is electrically coupled to a corresponding pixel in the array of CMOS pixel elements in the readout circuit, and wherein each of the pixels comprises: a) a detector input node for receiving a signal from the IR detector element and generating a signal output; b) a first relatively lower gain, wide dynamic range amplifier circuit coupled to the detector input node, the first circuit having a first sense node and a first amplifier, the first circuit optimized for a linear response to high light level input signals; c) a second, independent, relatively higher gain, lower dynamic range amplifier circuit coupled to the detector input node, the second circuit having a second sense node and a second amplifier, the second circuit optimized to provide a high signal to noise ratio for low light level input signals; d) a first output select circuit for directing the output of the first amplifier circuit to a first output multiplexer; e) a second, independent, output select circuit for directing the output of the second independent amplifier circuit to a second output multiplexer; wherein separate outputs of the first and second circuits are provided for each of the individual pixels of the CMOS readout integrated circuit such that a signal from each of the first and second amplifier circuits can be independently and simultaneously read out from the pixel.