Patent ID: 8683416

Claim:
A method, comprising: identifying, by a device, a plurality of signal channels for connecting circuit blocks, each circuit block, of the circuit blocks, being associated with a block implementation area corresponding to a substrate; assigning, by the device, a channel priority to each signal channel, of the plurality of signal channels, based on one or more channel criteria; allocating, by the device, a channel implementation area, corresponding to the substrate, for each signal channel of a plurality of signal channels, based on the channel priority assigned to the signal channel and based on the block implementation areas associated with the circuit blocks; identifying a set of signal wires corresponding to one signal channel of the plurality of signal channels; selecting a wire pattern for the set of signal wires, the wire pattern being selected based on each signal wire corresponding to the set of signal wires; allocating a wire implementation area, based on the wire pattern, for each signal wire corresponding to the set of signal wires; and generating, by the device, an integrated circuit design comprising the channel implementation area allocated for each signal channel of the plurality of signal channels, the integrated circuit design comprising the wire implementation areas allocated for the set of signal wires.