Patent ID: 8154068

Claim:
A non-volatile semiconductor storage device comprising a plurality of memory strings each having a plurality of electrically rewritable memory cells connected in series, each of the memory strings comprising: a first semiconductor layer having a pair of columnar portions extending in a vertical direction to a substrate and a joining portion formed to join lower ends of the pair of columnar portions; an electric charge accumulation layer formed to surround a side surface of the first semiconductor layer; and a first conductive layer formed to surround a side surface of the electric charge accumulation layer and functioning as a control electrode of a respective one of the memory cells, the columnar portions being aligned at a first pitch in a first direction orthogonal to the vertical direction, and being arranged in a staggered pattern at a second pitch in a second direction orthogonal to the vertical and first directions, the first conductive layers being configured to be arranged at the first pitch in the first direction, and extend to curve in a wave-like fashion in the second direction along the staggered-pattern arrangement.