Patent ID: 8796124

Claim:
A method, comprising: providing a semiconductor substrate having a first fin defined by sidewalls and a top surface and a second fin spaced a distance from the first fin and defined by sidewalls and a top surface; performing a first doping process on the top surface of the first fin to form a doped top first fin, wherein at least a portion of the sidewalls of the first fin are not doped during the first doping process; depositing a first doping film of a first thickness over the sidewalls of the doped top first fin, wherein the first doping film has a direct interface with the sidewalls of the doped top first fin; performing a second doping process over the top surface of the second fin to form a doped top second fin, wherein at least a portion of the sidewalls of the second fin are not doped during the second doping process, depositing a second doping film of a second thickness on the sidewalls of the doped top second fin, wherein the second doping film includes a different dopant type than the first doping film, and wherein the second doping film has a direct interface with the sidewalls of the doped top second fin; removing the first doping film and the second doping film from the top surfaces of the first and second fins respectively such that a top surface of the first doping film, a top surface of the second doping film, the top surface of the first fin and the top surface of the second fin are all co-planar, after removing the first and second doping films, performing an anneal process wherein the anneal process includes: driving dopants of a first type from the first doping film into a region adjacent the sidewalls of the first fin; and driving dopants of a second type from the second doping film into a region adjacent the sidewalls of the second fin; and forming a gate structure on the first fin, wherein the gate structure interfaces the sidewalls and the top surface of the doped top first fin.