Patent ID: 8453096

Claim:
A computer-implemented method for delaying a data strobe, said method comprising: initializing via at least one computer, a common coarse delay and a fine delay to a quarter-cycle delay for shifting a read output data queue strobe associated with a memory device in order to sample a read output data queue within a physical layer; determining via said at least one computer, an optimum delay size of said coarse delay and said fine delay based on an application slowest frequency of operation in order to preserve said fine delay accuracy; and training via said at least one computer, said common coarse delay in association with said fine delay in order to thereafter update said fine delay to monitor and process, voltage, and temperature variation effect, wherein determining via said at least one computer, said optimum delay size of said coarse delay and said fine delay, further comprises: determining a minimum delay required in said fine delay to address voltage and temperature compensation in order to thereafter add said minimum delay to a course increment delay for determining a cutoff point; setting at least one cutoff tap based on a fast process corner so that said cutoff delay is at least one coarse increment greater than said minimum delay; and determining a fine delay limit by summing said minimum delay to said cutoff point in order to calculate a size of said common coarse delay.