Patent ID: 8780935

Claim:
A communication system for interfacing a first synchronous circuit with a second synchronous circuit comprising: a first interface system configured for: a) receiving data from said first synchronous circuit according to a synchronous communication protocol; b) converting said data received from said first synchronous circuit in data encoded according to an asynchronous communication protocol; and c) transmitting said encoded data over a communication channel; a second interface system configured for: a) receiving said data transmitted over said communication channel; b) converting said data transmitted over said communication channel in data decoded according to said asynchronous communication protocol; and c) transmitting said decoded data to said second synchronous circuit, wherein said first interface system comprises a first first-in first-out memory for storing temporarily said data received from said first synchronous circuit and said second interface system comprises a second first-in first-out memory for storing temporarily said data transmitted over said communication channel, and wherein said communication system is configured for transmitting to said first synchronous circuit a control signal determined as a function of the state of said first and said second memory such that the first synchronous circuit in communication with, in the first interface system, a converter and the first first-in first-out memory, provides the asynchronous data, and the asynchronous data is received by the second first-in first-out memory in the second interface system, together with a second converter circuit, which in turn is in communication with the second synchronous circuit.