Patent ID: 8270195

Claim:
A system including embedded non-Flash re-writeable two-terminal non-volatile memory, comprising: a silicon substrate including active circuitry fabricated on a logic plane; at least one memory plane fabricated directly over the silicon substrate and in direct contact with the silicon substrate such that the at least one memory plane is positioned directly over the logic plane; a non-volatile two-terminal cross-point memory array embedded in the memory plane and including a plurality of first and second conductive array lines that are electrically coupled with a portion of the active circuitry, the non-volatile two-terminal cross-point memory array including a plurality of two-terminal non-volatile memory elements, each memory element is positioned between a cross-point of a unique pair of first and second conductive array lines and is directly electrically in series with its unique pair of first and second conductive array lines, each two-terminal non-volatile memory element is operative to store data as a plurality of conductivity profiles that can be non-destructively determined by applying a read voltage across its two terminals, the data is retained in the absence of electrical power, the data is written by applying a write voltage across its two terminals without performing a prior erase operation, and the read voltage is less than the write voltage; and a control unit included in the active circuitry and in electrical communication with the non-volatile two-terminal cross-point memory array, data operations on the non-volatile two-terminal cross-point memory array are executed exclusively by the control unit, and the non-volatile two-terminal cross-point memory array is used exclusively by the control unit for data storage purposes.