Patent ID: 8008146

Claim:
A method comprising: simultaneously patterning at least two wires of semiconductor material in a manner that forms a first wire for a first transistor and a second wire for a second transistor and wherein a first wire of the wires has a larger perimeter than a second wire of the wires; performing an oxidation process simultaneously on said first wire and said second wire to simultaneously form a first gate oxide around said first wire and a second gate oxide around said second wire, said first gate oxide being thicker than said second gate oxide; simultaneously forming gate conductors over said first gate oxide and said second gate oxide; simultaneously forming sidewall spacers on said gate conductors; and simultaneously doping portions of said first wire and said second wire not covered by said sidewall spacers and said gate conductors to form source and drain regions within said first wire and said second wire and to form said first transistor and said second transistor.