Patent ID: 8030130

Claim:
A method for fabricating a phase change memory device including a plurality of memory cells, the method comprising: patterning, for each of an array of conductive contacts to be connected to access circuitry, a corresponding via to a contact surface of a substrate; lining each via with a conformal conductive seed layer to the contact surface of the substrate; forming a first dielectric layer covering the conformal conductive seed layer; etching the first dielectric layer at a center region of each via to the contact surface to expose the conformal conductive seed layer at the contact surface; electroplating phase change material on exposed portions of the conformal conductive seed layer; recessing the phase change material within the center region of each via; forming a conductive material that remains conductive upon oxidation, on the recessed phase change material; oxidizing edges of the conformal conductive seed layer formed within sides of each via; and forming a top electrode over each memory cell.