Patent ID: 8390635

Claim:
A graphics accelerator comprising: an integrated circuit comprising: a local memory operable to store graphics data, the graphics data comprising a plurality of pixels; a coprocessor operable to perform operations on n-tuple vectors comprising a plurality of components of each of the plurality of pixels of the graphics data; and a direct memory access (DMA) engine operable to, at least: transfer the graphics data in at least one direction between an external memory and the local memory while the graphics accelerator is using the local memory for its load and store operations, wherein the external memory is shared by the graphics accelerator and a central processing unit (CPU); and transfer data from the external memory to a plurality of processing pipelines of the integrated circuit by directing data separately to each of the plurality of processing pipelines; and an interface to a memory arbiter configured to perform real-time scheduling of memory requests to the external memory based on at least priority assigned to the graphics processor and the CPU.