Patent ID: 8138077

Claim:
A method of fabricating a flash memory device, comprising; providing a semiconductor substrate having active regions that are isolated by an isolation layer, wherein a tunnel oxide layer and a first conductive layer are stacked on the semiconductor substrate in each of the active regions, and the highest surface of the first conductive layer is higher in height than the highest surface of the isolation layer with respect to the semiconductor substrate; forming a dielectric layer along an entire surface of a structure including the isolation layer and the first conductive layer; etching the dielectric layer formed on the isolation layer to form a first trench in the dielectric layer; etching a portion of the isolation layer exposed through the first trench to form a second trench in the isolation layer; and forming a second conductive layer over a resulting structure after etching the portion of the isolation layer to fill the first trench, the second trench and a space between the first conductive layers of the active regions.