Patent ID: 6895482

Claim:
A method to process commands in a computer memory subsystem, comprising: (a) receiving a plurality of memory commands on a bus connected to said computer memory subsystem and determining the physical location of the memory command in memory, and further determining if any of said received memory commands have an address dependency and passing said physical location and said address dependency, if any, corresponding to said memory command along with said memory command; (b) categorizing said received commands into command types based on one of the following: STORE, FETCH, INTERVENTION STORE; the source or destination of said received memory commands; the program or application from which said memory commands originate or are otherwise required; (c) determining memory cycle performance penalties of said categorized commands by comparing a number of oldest received categorized commands with each other, with a currently chosen command, and with a previously chosen command; (d) reordering said categorized commands so that said categorized commands having the least memory cycle performance penalty are selected for execution and if more than one categorized command has the least memory cycle performance penalty, then selecting the oldest of said reordered commands for execution; (e) determining if said reordered commands are valid; (f) granting priority to said type of command having said least memory cycle performance penalty; (g) executing sequential valid commands of the same command type until a valid command of the same type is not received or until a predetermined number has been executed, or until a memory command of another type has higher priority; (h) avoiding deadlock when an address dependency exists between commands of different types by executing commands having the command type of the oldest memory command.