Patent ID: 7633813

Claim:
A method of performing an erase operation in a non-volatile memory device having a memory cell array which includes at least one blocks having multi level cells, the method comprising: shifting every threshold voltage distribution into a threshold voltage distribution having highest level by pre-programming every cell in a block selected for erase; performing an erase operation on the pre-programmed memory block; performing a soft program and a verifying operation on the memory block; dividing the memory block into a first group and a second group in case that the memory block is passed in accordance with the verifying result; performing a verifying operation on the first group, and performing a soft program and a verifying operation on the first group in case that the first group is not passed; and performing a verifying operation on the second group in case that the first group is passed, and performing a soft program and a verifying operation on the second group in case that the second group is not passed in accordance with the verifying result.