Patent ID: 8889446

Claim:
A method of fabricating a polysilicon thin film transistor device, comprising: forming a gate metal pattern made of a single layer of a singular metal material having a stepped portion formed on a substrate, wherein either side of the stepped portion of the gate metal pattern has a different thickness; forming a gate insulating film on the gate metal pattern; forming a polysilicon semiconductor layer on the gate insulating film; forming an active region, lightly doped drain regions, a source region and a drain region on the polysilicon semiconductor layer by implanting an impurities; forming a source electrode electrically connected to the source region and forming a drain electrode electrically connected to the drain region; and forming a pixel electrode connected to the drain electrode, wherein the gate metal pattern comprises a gate electrode and a gate line, wherein the gate electrode and the gate line are formed of the same singular metal material in the same single layer, and wherein the gate electrode has a thickness less than a thickness of the gate line.