Patent ID: 8327069

Claim:
A storage system that is coupled to a host device, comprising: a plurality of physical storage devices; and a storage control apparatus that is coupled to the plurality of physical storage devices and the host device, the storage control apparatus comprising: a first cache memory group provided with a first volatile memory and a first nonvolatile memory; a second cache memory group provided with a second volatile memory and a second nonvolatile memory; a second secondary power source that supplies an electrical power to the second volatile memory in the case in which an electrical power supply from a primary power source to the second volatile memory is stopped; and a controller that is coupled to the first and second cache memory groups, the plurality of physical storage devices, and the host device, wherein: (A) the controller receives a write command that specifies a write destination from the host device, and executes the following (W1) to (W3): (W1) receives the write target data according to the received write command from the host device; (W2) executes a double write for writing the write target data to both of the first volatile memory and the second volatile memory; and (W3) notifies the host device of a write completion in the case in which the double write is completed, (B) the controller backs up data from the first volatile memory to the first nonvolatile memory while an electrical power is supplied from the primary power source, (C) the controller writes the write target data that has been stored into the first nonvolatile memory or the second volatile memory to a physical storage device that is a basis of an area that is specified by a write destination that is specified by the write command that has been received in the above (A) among the plurality of physical storage devices while an electrical power is supplied from the primary power source, and (D) the controller backs up data from the second volatile memory to the second nonvolatile memory while an electrical power is supplied from the second secondary power source to the second volatile memory in the case in which an electrical power supply from the primary power source is stopped.