Patent ID: 8094422

Claim:
An integrated circuit comprising: a signal pin; an internal circuit including a high-frequency circuit; and an input protection circuit cell that is placed between the signal pin and the internal circuit and performs a protection operation when a signal at the signal pin is applied to the high-frequency circuit, wherein the input protection circuit cell includes: an input terminal coupled to the signal pin; an output terminal that is coupled to the high-frequency circuit and to the input terminal via a coupling node: a first diode that is provided between the coupling node and a high-voltage power supply and makes an electric current flow from the coupling node to the high-voltage power supply; a second diode that is provided between the coupling node and a low-voltage power supply and makes an electric current flow from the low-voltage power supply to the coupling node; and a clamp circuit that is coupled parallel to the first and second diodes between the high-voltage power supply and the low-voltage power supply, wherein the clamp circuit includes an NMOS transistor having a drain terminal coupled to the high-voltage power supply, a gate terminal and a source terminal coupled to the low-voltage power supply, and the gate terminal and the source terminal connected to each other.