Patent ID: 8694704

Claim:
An apparatus comprising: a multinodal processor including: a plurality of nodes of a network-on-chip, wherein each node of the plurality of nodes includes: a processor unit configured to perform processing tasks; a plurality of output channels configured to provide output data from the node; a local status hardware unit configured to provide local status information regarding congestion for each of the plurality of output channels; an aggregation hardware unit configured to receive non-local status information provided by at least one other node of the plurality of nodes, wherein the aggregation hardware unit is configured to combine the non-local status information and the local status information to provide aggregate status information; and a router device configured to route data between the plurality of nodes, wherein the router device is configured to select one of the plurality of output channels for data output based on the aggregate status information; a first set of interconnections configured to transmit the data between the plurality of nodes, wherein the first set of interconnections includes interconnections coupled to the plurality of output channels of each of the plurality of nodes; and a second set of interconnections, separate from the first set of interconnections, configured to provide the non-local status information and the aggregate status information between the plurality of nodes.