Patent ID: 7262458

Claim:
The A semiconductor memory device comprising: a single gate electrode formed on a semiconductor layer via a gate insulating film; a channel region disposed under the gate electrode; first and second diffusion regions disposed on first and second sides of the channel region and having a conductive type opposite to that of the channel region; and memory functional units formed on the semiconductor layer adjacent to the gate insulating film on both sidewalls of the gate electrode and having the function of retaining charges, wherein each of the diffusion regions has: a high-concentration impurity region overlapping one of the memory functional units in a gate length direction and disposed so as to be offset from the gate electrode in the gate length direction; and a low-concentration impurity region having a first end disposed in contact with the high-concentration impurity region and a second end contacting the gate insulating film under the gate electrode, and an amount of current flowing from the first diffusion region to the second diffusion region is changed when a voltage is applied to the gate electrode in accordance with an amount of charges retained in the memory functional units; wherein the memory functional unit has an insulating film separating a film having the function of retaining charges and the channel region or the semiconductor layer from each other, and the insulating film is thinner than the gate insulating film and has a thickness of 0.8 nm or more.