Patent ID: 7643259

Claim:
An integrated circuit chip assembly comprising: A. a substrate carrying conducting lines, at least two of the conducting lines having one end connected to circuit ground and an opposite end connected to a bond pad, the at least two conducting lines being closely spaced and parallel with one another on the substrate to provide for magnetic coupling of currents flowing in the at least two conducting lines, the substrate carrying additional conducting lines, each having an end connected to a bond pad; B. a product integrated circuit chip having a bottom side bound to the substrate and a top side carrying bond pads; C. a passives integration chip having a bottom side bound to the top side of the product integration circuit chip and a top side carrying bond pads; D. first conducting wires extending between the bond pads on the substrate connected to the at least two conducting lines and bond pads on the passives integration chip; E. second conducting wires extending between the bond pads on the substrate connected to the additional conducting lines to bond pads on the product integrated circuit chip; and F. third conducting wires extending between the bond pads on the product integrated circuit chip and the bond pads on the passives integration chip.