Patent ID: 7895289

Claim:
A system of several data processing units that each includes a memory apparatus for receiving and supplying objects, comprising multidimensionally addressed electronic data, wherein each of the several data processing units comprises a processor and physical data interchange connections between the several data processing units, wherein: a virtual network is formed in the system in which the several data processing units are represented as a torus arrangement of several memories (S 1 , . . . , S n ; n>1) with dimensions (d>1) and in which an associated routing table with d sub tables is formed in each of the several memories (S 1 , . . . , S n ), which sub tables include entries E Sx,a [j,i] (1≦j<b; 1<b; 1≦a≦d; 0<i≦n) comprising electronic reference information and concerning communication connections of a particular memory of the several memories (S 1 , . . . , S n ) to other memories of the several memories (S 1 , . . . , S n ); one or several name ranges of a name space for names of the objects are associated with each of the several memories (S 1 , . . . , S n ), a total order being defined via the ranges of values of the name space that are used in d dimensions; the names of the objects can be represented as tuples (n 0 , . . . , n g ) (g<d); and the entries E Sx,a [j,i] (1≦j<b; 1<b; 1≦a≦d; 0<i≦n) comprising electronic reference information are formed as follows for each of the several memories (S x ;x=1, 2, . . . ; 1≦x≦n) of the several memories (S 1 , . . . , S n ) in the virtual network using a base b for the a-th dimension of the torus arrangement in the associated routing table: Entry E Sx,a [l,1]=Reference to the communication connection to a memory adjacent in the a-th dimension of the torus arrangement; Entry E Sx,a [j,l]=Entry E Sv,a [k,l] in another memory (S v ) to which an entry E Sx,a [m,l] in the memory (S x ) refers, with 2≦j<b, 0<k, m and in which k, m selectively correspond to a valid whole number occupancy of the equation k+m=j; Entry E Sx,a [l,i]=Entry E Sv,a [k, i-l] in another memory (S v ) to which an entry E Sx,a [m, i-l] in the in the memory (S x ) refers, with 1<i,0<k, m and in which k, m selectively correspond to a valid whole number occupancy of the equation k+m=b; and Entry E Sx,a [j,i]=Entry E Sv,a [k,i] in another memory (S v ) to which an entry E Sx,a [m,i] in the memory (S x ) refers, with 2≦j<b, 1<i, 0<k, m and in which k, m selectively correspond to a valid whole number occupancy of the equation k+m=j.