Patent ID: 8313986

Claim:
A manufacturing method for a power semiconductor device, comprising the steps of: (a) preparing a power semiconductor device prior to resin sealing, the power semiconductor device including an insulating substrate, a circuit pattern formed on an upper surface of said insulating substrate, a power semiconductor formed on said circuit pattern, and a plurality of electrode terminals formed perpendicularly to one of said circuit pattern and said power semiconductor so as to be in conduction with external terminals; (b) arranging an integral resin sleeve formed by integrating a plurality of sleeve parts so that said sleeve parts are respectively fitted with said electrode terminals corresponding thereto, the plurality of sleeve parts being disposed correspondingly to said plurality of electrode terminals and having openings at both ends thereof; (c) press-fitting said sleeve parts to said electrode terminals by performing mold clamping on molds to apply a stress downward on said integral resin sleeve; (d) filling a molding resin into a hollow (cavity) of said molds in a state in which upper surfaces of said sleeve parts are in contact with an inner wall of said mold; and (e) removing said molds after said molding resin is cured, wherein in said step (c), said sleeve parts are press-fitted to said electrode terminals so that the upper-most upper surfaces of said electrode terminals are located below the upper surfaces of said sleeve parts.