Patent ID: 6961829

Claim:
A data carrier ( 2 ) comprising communication means ( 50 ) for communication with at least one communication station ( 1 ) in accordance with a communication sequence executed during the communication, the communication sequence comprising several communication steps, and in the data carrier ( 2 ) an intermediate operating state occurs as a result of a communication step of specific communication steps, and in the data carrier ( 2 ) intermediate operating state information significant for an intermediate operating state of specific intermediate operating states (ZS, CI 16 , CI 20 , BRS) occurs, and the data carrier ( 2 ) comprising detection means ( 46 ) to detect the existence of at least one operating variable (V) required for the operation of the data carrier ( 2 ), and the data carrier ( 2 ) comprising memory means ( 54 ) for storing information, the memory means ( 54 ) being designed for storing the intermediate operating state information (ZS, CI 16 , CI 20 , BRS) significant for an intermediate operating state, and the data carrier ( 2 ) comprising memory control means ( 51 ) which are designed so that after the occurrence of an intermediate operating state information (ZS, CI 16 , CI 20 , BRS) significant for an intermediate operating state they ensure that this intermediate operating state information (ZS, CI 16 , CI 20 , BRS) significant for an intermediate operating state is stored in the memory means ( 54 ), and the data carrier ( 2 ) comprising control means ( 51 ), which are designed so that—after the detection of the non-existence of the at least one operating variable (V) during the interrupted execution of the communication sequence due to this non-existence of the at least one operating variable (V) and the subsequent detection of the re-existence of the at least one operating variable (V) by the detection means ( 46 )—they ensure that the data carrier ( 2 ) is controlled in an intermediate operating state for which intermediate operating state an intermediate operating state information (ZS, CI 16 , CI 20 , BRS) stored in the memory means ( 54 ) is significant.