Patent ID: 8581666

Claim:
An integrated circuit, comprising: a first amplifier transistor configured to amplify an input signal; a second amplifier transistor connected in series to the first amplifier transistor; a biasing circuit configured to set a bias voltage in such a manner as to allow the first and second amplifier transistors to perform amplification based on current mirror operation of a biasing transistor; a first switching transistor configured to make turning on and off between a gate and a source of the first amplifier transistor; a second switching transistor configured to make turning on and off between a gate and a source of the second amplifier transistor; a third switching transistor configured to make turning on and off between a gate and a source of the biasing transistor; first resistance configured to detect voltage to be applied to a power source for the biasing circuit; a first inverter configured to drive gates of the first, second, and third switching transistors in such a manner as to make the first, second, and third switching transistors to turn on based on the voltage to be detected through the first resistance; and a switching circuit configured to drive the gates of the first, second, and third switching transistors through the first inverter in such a manner as to make the first, second, and third switching transistors to turn off based on a power supply condition.