Patent ID: 6873032

Claim:
A semiconductor package, comprising: a substrate comprising: at least one land defining opposed top and bottom land surfaces; a plurality of lead fingers disposed about the land, each of the lead fingers defining opposed top and bottom lead surfaces and an outer end; a semiconductor chip comprising: an active surface defining a central region and a peripheral region; and a plurality of connection pads disposed on the central and peripheral regions of the active surface; at least one of the connection pads being positioned over and electrically connected to the land, with at least one of the connection pads being positioned over and electrically connected to at least one of the lead fingers; a package body at least partially encapsulating the substrate and the semiconductor chip such that the bottom lead surfaces of the lead fingers are each substantially flush with a bottom surface of the body, and the outer end of each of the lead fingers is substantially flush with a respective one of multiple side surfaces defined by the body.