Patent ID: 7944415

Claim:
An OLED display device including a scan line driving circuit configured to apply sequentially a selecting signal or a non-selecting signal to a plurality of scan lines; a data line driving circuit configured to apply a voltage corresponding to image information to a plurality of data lines; and a pixel circuit arranged in each point where the scan lines and the data lines are intersected, wherein the pixel circuit comprises: an OLED having two terminals; a first transistor of which a source terminal is connected to an anode terminal of the OLED without any intervening connections to other terminals of the first transistor and the OLED, and a drain terminal is connected to a power supply without any intervening connections to other terminals of the first transistor, for providing a current to the OLED according to an applied voltage; a second transistor of which a gate terminal is connected to an N th first scan line and a drain terminal is connected to the data line; a third transistor of which a drain terminal is connected to the drain terminal of the first transistor and the power supply without any intervening connections to other terminals of the first and third transistors, and a gate terminal is connected to an (N−1) th first scan line, and a source terminal is connected to the gate terminal of the first transistor without any intervening connections to other terminals of the first and third transistors; a fourth transistor of which a drain terminal is connected to the source terminal of the second transistor, a source terminal is connected to a common electrode, and a gate terminal is connected to an N th second scan line; a fifth transistor of which a drain terminal is connected to the gate terminal of the first transistor without any intervening connections to other terminals of the first and fifth transistors and the source terminal of the third transistor without any intervening connections to other terminals of the third and fifth transistors, and a gate terminal is connected to the N th second scan line and the gate terminal of the fourth transistor without any intervening connections to other terminals of the fourth and fifth transistors; a capacitor of which one terminal is connected to the gate terminal of the first transistor, the source terminal of the third transistor and the drain terminal of the fifth transistor, and the other terminal is connected to the source terminal of the second transistor and the drain terminal of the fourth transistor; and a photo sensor of which one terminal is connected to the source terminal of the fifth transistor, and the other terminal is connected to the common electrode.