Patent ID: 7320937

Claim:
Method of electroless-plating at least one integrated circuit die, comprising the steps of: (a) receiving the at least one integrated circuit die, where each at least one integrated circuit die has a pad side and a backside; (b) attaching the at least one integrated circuit die backside to a holder, where the holder has a dielectric adhesive layer applied thereto; (c) cleaning the at least one integrated circuit die with more than one cleaning solution; (d) rinsing each at least one integrated circuit die in de-ionized water after each cleaning in the more than one cleaning solution; (e) immersing the at least one integrated circuit die into a first metal oxide etchant for a user-definable time; (f) cleaning the at least one integrated circuit die in de-ionized water; (g) immersing the at least one integrated circuit die into a first metal solution for a user-definable time, where the first metal solution is at a user-definable temperature; (h) cleaning the at least one integrated circuit die in de-ionized water; (i) immersing the at least one integrated circuit die into a second metal etchant solution for user-definable time; (j) cleaning the at least one integrated circuit die in de-ionized water; (k) immersing the at least one integrated circuit die into the first metal solution for a user-definable time, where the first metal solution is at a user-definable temperature; (l) cleaning the at least one integrated circuit die in de-ionized water; (m) plating a user-definable thickness of a second metal onto the padside of the at least one integrated circuit die; (n) cleaning the at least one integrated circuit die in de-ionized water; and (o) immersing the at least one integrated circuit die in a third metal solution for a user-definable time, where the third metal solution is at a user-definable temperature, and where the third metal solution is stirred at a user-definable rate.