Patent ID: 8552759

Claim:
A programmable logic cell, comprising: a magnetic diode having a non-magnetic semiconductor layer and a magnetic semiconductor layer disposed on the non-magnetic semiconductor layer, wherein the magnetic diode is configured such that under a forward bias, when a magnetic field applied to the magnetic diode is less than a threshold value, the magnetic diode is in a conductive state in which electric current flows through the magnetic diode, and when the magnetic field applied to the magnetic diode is greater than the threshold value, the magnetic diode is in a resistive state in which the electric current flowing through the magnetic diode is substantially reduced; a first input wire for receiving a first input current, and a second input wire for receiving a second input current, wherein the first and second input wires are oriented along a first direction parallel to the magnetic semiconductor layer of the magnetic diode and positioned spaced-apart along a second direction perpendicular to the first direction over the magnetic semiconductor layer of the magnetic diode, such that when either of the first input current and the second input current flows through a respective input wire of the first input wire and the second input wire and no current flows through the other input wire, a magnetic field B generated in the magnetic diode is less than the threshold value, and when both the first input current and the second input current flow through the first input wire and the second input wire, respectively, along the same direction, the magnetic field generated in the magnetic diode is greater than the threshold value; and an output wire oriented along a third direction perpendicular to the first and second directions and positioned under the non-magnetic semiconductor layer of the magnetic diode for outputting a logic “0” or “1” responsive to the first input current and the second input current.