Patent ID: 6897510

Claim:
A method for making stacked metal-insulator-metal (MIM) capacitors on a semiconductor substrate comprising the steps of: providing said semiconductor substrates having partially completed circuits; depositing an insulating layer and forming openings for node contacts; forming said node contacts in said openings; depositing sequentially a first metal layer, a dummy layer, and a second metal layer on said insulating layer and over said node contacts; patterning said second metal layer, said dummy layer, and said first metal layer and leaving portions over said node contacts; depositing a blanket third metal layer on said substrate and over said portions, and etching back to form sidewall spacers on said portions to provide lower electrodes for said capacitors; depositing a blanket conformal interelectrode dielectric layer (IDL) on said substrate and over said lower electrodes; depositing a blanket fourth metal layer on said IDL and patterning said fourth metal layer and said IDL to form upper electrodes to complete said MIM capacitors.