Patent ID: 7514308

Claim:
A method for manufacturing a complementary metal oxide semiconductor (CMOS) device, comprising: forming a p-channel metal oxide semiconductor (PMOS) device having a first gate dielectric layer and a first gate electrode layer over a substrate, wherein the first gate dielectric layer has an amount of nitrogen located therein; and forming an n-channel metal oxide semiconductor (NMOS) device having a second gate dielectric layer and a second gate electrode layer over the substrate, wherein the second gate dielectric layer has a different amount of nitrogen located therein, wherein forming the PMOS device and forming the NMOS device includes forming a blanket layer of gate dielectric material over the substrate and subjecting the blanket layer of gate dielectric material to a first nitridation process; removing at least a portion of the nitrided gate dielectric material; forming a second layer of gate dielectric material over at least a portion of the area where the nitrided gate dielectric material was removed; and subjecting the second layer of gate dielectric material to a second nitridation process.