Patent ID: 7091583

Claim:
A method for manufacturing a substrate strip for semiconductor packages comprising: providing a substrate strip including an edge portion and a plurality of units the substrate strip having a surface; forming a patterned metal layer on the surface of the substrate strip, the patterned metal layer including at least one plating bus extended to the edge portion, a plurality of plating lines at the units, a plurality of contact pads at the units, and a plurality of fiducial marks at the edge portion, wherein the contact pads are electrically connected to the plating bus via the plating lines, the plating bus has an extended trail having one exposed end; forming a solder mask on the surface of the substrate strip, the solder mask having a plurality of first openings exposing the contact pads and the fiducial marks; forming a surface layer on the contact pads and the fiducial marks; and forming a breaking hole at the edge portion to electrically isolate the extended trail from the contact pads.