Patent ID: 8866461

Claim:
A power circuit comprising: a DC/DC converter which includes a first switch that is turned on according to a first switching signal and a second switch that is turned on according to a second switching signal, and in which an on state period of the first switch does not overlap an on state period of the second switch; an A/D converter that performs A/D conversion on an analog monitoring value of the DC/DC converter in synchronization with a conversion timing signal to generate a digital monitoring value; a control unit that performs PWM control on each of the first switching signal and the second switching signal using the generated digital monitoring value; a determining unit that receives a signal associated with the PWM control and a signal associated with a conversion candidate timing signal that serves as a candidate for the conversion timing signal and determines whether a transition timing of the conversion candidate timing signal overlaps a transition timing of the first switching signal or a transition timing of the second switching signal; and a conversion timing adjusting unit that adjusts the conversion candidate timing signal so that the transition timing of the conversion candidate timing signal does not overlap the transition timing of the first switching signal and the transition timing of the second switching signal when the transition timing of the conversion candidate timing signal overlaps the transition timing of the first switching signal or the transition timing of the second switching signal to thereby generate the conversion timing signal.