Patent ID: 8402184

Claim:
An apparatus comprising: a difference computation module; one or more coalescing memory buffers; wherein the difference computation module is enabled to receive from a host processor a command initiating an operation to be applied to storage devices, identify the operation as a write operation directed to one or more of a plurality of blocks of the storage devices, reconstruct a current state of data of the one or more blocks, compute a difference between the current state and a state that would result from the write operation, and populate at least one of the coalescing memory buffers with difference information associated with the difference and to be used to update an associated one of the blocks; wherein the coalescing memory buffers are separate from the storage devices; and wherein the difference computation module is further enabled to determine whether the coalescing memory buffers are full, and to selectively write the difference information in the coalescing memory buffers to the storage devices, based on the determination of whether the coalescing memory buffers are full.