Patent ID: 7536658

Claim:
A method of synthesizing pads for an integrated circuit device, the method being performed in a computer, the method comprising: automatically placing a plurality of pads around a periphery in a design of said integrated circuit device, based on a limit on an attribute of said design regardless of location, said design comprising a network interior to said periphery; automatically identifying from among a plurality of locations in the design, a specific location for having a value of said attribute satisfying a predetermined condition; automatically placing a first pair of additional pads on said periphery, at a first pair of additional locations identified based on a first coordinate of the specific location; automatically placing a second pair of additional pads on said periphery, at a second pair of additional locations identified based on a second coordinate of the specific location; and storing in a memory of the computer, said plurality of pads, said first pair of additional pads and said second pair of additional pads.