Patent ID: 7693233

Claim:
An integrated circuit for parallel Tomlinson-Harashima precoder, comprising: first and second computation units to precode symbols in parallel corresponding to sequential samples of a modulated signal; wherein the first computation unit includes a first modulo device to precode a first symbol from a combination of a first one of the sequential samples and first and second precoded symbols previously output in parallel from the first and second computation units, and to generate a compensation signal having N possible values; wherein the second computation unit includes N modulo devices, each to receive a combination of the first sequential sample, a second one of the sequential samples, the first and second precoded symbols previously output in parallel from the first and second computation units, and a corresponding one of N precomputed values of the compensation signal, and to output a corresponding modulo output; and wherein the second computation unit further includes a multiplexer to select one of the N modulo outputs in response to the compensation signal and to output the selected modulo output as a second precoded symbol in parallel with the first precoded symbol.