Patent ID: 7791936

Claim:
A memory device comprising: a substrate having a flat face; a bit line formed in a first direction on the substrate; a lower word line and a trap site that are isolated from the bit line and formed in a second direction intersecting the first direction; a pad electrode electrically isolated from a sidewall of the trap site and the lower word line and connected to the bit line; a cantilever electrode suspended in the first direction above a lower void and an upper part of the trap site, and connected to the pad electrode and curved in a third direction that is vertical with respect to the first and second direction by an electrical field induced by a first charge applied to the lower word line; a contact part that concentrates a second charge induced from the cantilever electrode in response to the first charge applied to the lower word line and the trap site, the contact part protruding from an end part of the cantilever electrode, the contact part having a thickness in the third direction so as to reduce a curved distance of the cantilever electrode in the lower void; and an upper word line formed in the second direction with an upper void above the cantilever electrode.