Patent ID: 8151034

Claim:
A method of handling multi-level cells that are likely to contain marginally programmed data due to an aborted write operation in a nonvolatile memory array, comprising: identifying that marginally programmed data is likely present in a lower page of a plurality of multiple-level cells of the nonvolatile memory array as a result of an aborted write to such lower page, the multiple-level cells further having unused capacity in an upper page that was not written to during the aborted write, wherein each multiple-level cell has two bits that are programmable via separate writes to the lower and upper pages; and in response to the identifying that marginally programmed data is likely present in the lower page, maintaining the marginally programmed data in the identified lower page of the multiple-level cells and marking the upper page of the multiple-level cells as being unusable so that subsequent writes to the upper page of the multiple-level cells are prohibited.