Patent ID: 7517732

Claim:
A method for forming a thin semiconductor device package, comprising: providing at least one electrically conductive element at a first surface of at least one thin die; coupling a second surface of the die with the first surface of a thin substrate having a perimeter dimension greater than a perimeter dimension of the die, the substrate having a second surface lying within a substantially parallel plane as the first surface of the substrate; providing a mold material at the first substrate surface adjacent to at least one side of the die, the mold material having a first surface and a second surface, the first surface being substantially parallel with the second surface and coplanar with the first surface of the die, and the second surface being coupled with the first surface of the substrate; and providing at least one electrically conductive pathway at the first surface of the die and the first surface of the mold material, wherein at least a first terminal end of the pathway is formed at the first surface of the die and provides electrical continuity with the conductive element, and at least a second terminal end of the pathway is formed at the first surface of the mold material at least partially outside the perimeter of the die.