Patent ID: 7739252

Claim:
A system, comprising: one or more processors; memory coupled to the one or more processors and configured to store program instructions executable by the one or more processors to implement: one or more applications configured to initiate one or more atomic transactions, wherein each of the one or more atomic transactions comprises requests to access one or more data sources; a transaction manager configured to control state changes of the one or more atomic transactions initiated by the one or more applications; wherein for each given atomic transaction, the transaction manager is configured to request permission to change the state of the given atomic transaction; and a transaction freeze manager configured to pause the transaction manager in response to a pause request by withholding said permission to change the state of the given atomic transaction; wherein the transaction manager is configured to not change the state of the given atomic transaction without said permission; wherein the transaction freeze manager is configured to resume the transaction manager in response to a resume request by granting said permission to change the state of the given atomic transaction.