Patent ID: 8838017

Claim:
A peak detector block comprising: a first transistor, a second transistor, a first capacitor, a second capacitor and a comparator circuit, wherein: a gate terminal of the first transistor is coupled to a signal input; a source terminal of the first transistor is coupled to a first power source; a drain terminal of the first transistor is coupled to a first terminal of the first capacitor and a first input terminal of the comparator circuit; a second terminal of the first capacitor is coupled to a ground source; a gate terminal of the second transistor is coupled to the signal input; a source terminal of the second transistor is coupled to the ground source; a drain terminal of the second transistor is coupled to a first terminal of the second capacitor and a second input terminal of the comparator circuit, wherein the comparator circuit is configured to compare a first signal provided to the first input terminal of the comparator to a first threshold signal and to compare a second signal provided to the second input terminal of the comparator to a second threshold signal; and a second terminal of the second capacitor is coupled to the ground source.