Patent ID: 7180158

Claim:
A method of manufacturing a semiconductor component comprising: providing a composite substrate comprising a semiconductor epitaxial layer above a semiconductor substrate, the composite substrate having a first conductivity type; forming a buried semiconductor region in the epitaxial layer, having a second conductivity type; forming a first semiconductor region in the epitaxial layer, having the first conductivity type and located above the buried semiconductor region; forming a plurality of second semiconductor regions in the epitaxial layer, having the first conductivity type and located above the first semiconductor region; forming a third semiconductor region in the epitaxial layer, having the second conductivity type and located above the first semiconductor region; forming a sinker region disposed in the first semiconductor region and the third semiconductor region, thereby defining a plurality of first semiconductor regions and a plurality of third semiconductor regions; disposing an emitter having the first conductivity type in one of the second semiconductor regions in the epitaxial layer; disposing a collector having the first conductivity type in one of the other of the second semiconductor regions in the epitaxial layer; and forming a poly field plate above a portion of the second semiconductor region having the collector formed therein and a portion of the third semiconductor region, wherein the plurality of third semiconductor regions and the buried semiconductor region deplete the plurality of first conductor regions in response to a reverse bias potential applied between the plurality of second semiconductor regions and the plurality of third semiconductor regions.