Patent ID: 7545131

Claim:
A power converter comprising: error generation circuitry configured to generate an error signal based on the difference between a power converter output voltage and a reference voltage; transient detection circuitry configured to detect whether the error signal exceeds at least a first threshold; and timing control logic coupled to the transient detection circuitry, wherein in response to the error signal exceeding the first threshold, the timing control logic is configured to generate a low band timeout correction pulse to adjust the power converter output voltage, and thereby adjust the error signal to a level within the first threshold; wherein in response to the error signal exceeding a second threshold during the low band timeout correction pulse, the timing control logic is configured to generate a high band timeout correction pulse following the low band timeout correction pulse to adjust the power converter output voltage, and thereby adjust the error signal to a level within the second threshold; wherein the timing control logic is further configured to initiate a high band blanking period following the high band timeout correction pulse.