Patent ID: 8877551

Claim:
A method of manufacturing a thin film transistor, the method comprising: forming a gate electrode and a gate line on a first surface of a base substrate; forming an oxide semiconductor layer, an insulation layer and a photo resist layer on the first surface of the base substrate having the gate electrode and the gate line, in sequence; irradiating a second surface of the base substrate with light, the light passing through the base substrate and into the photo resist layer to form a first photo resist pattern, the second surface being opposite to the first surface; patterning the insulation layer and the oxide semiconductor layer by using the first photo resist pattern to form an insulation pattern and an oxide semiconductor pattern, the insulation pattern being disposed on the gate electrode and the gate line, the oxide semiconductor pattern being disposed between the gate electrode and the insulation pattern and between the gate line and the insulation pattern; forming a data metal layer on the base substrate having the active pattern and the insulation pattern; forming a second photo resist pattern on the data metal layer, firstly patterning the data metal layer to form a data line crossing the gate line and to partially expose the insulation pattern; patterning the insulation pattern and the oxide semiconductor pattern to form an active pattern overlapping with the gate electrode, an etch stopper on the active pattern and a dummy pattern only where the gate line overlaps with the data line; secondly patterning the data metal layer to form a source electrode and a drain electrode, end portions of the source electrode and the drain electrode being overlapped with end portions of the etch-stopper, the source and drain electrodes being spaced apart from each other.