Patent ID: 8217444

Claim:
A floating gate non-volatile semiconductor memory device, comprising: source/drain regions formed in a semiconductor substrate; a first gate insulating layer formed on a channel region located between the source/drain regions; a floating gate electrode functioning as a first charge trapping layer and formed on the first gate insulating layer; a second gate insulating layer including a first silicon nitride film formed on the floating gate electrode and a first silicon oxide film formed on the first silicon nitride film; a second charge trapping layer formed on the second gate insulating layer, comprising an insulating film comprising Al and O as major elements and having defect pairs formed of a complex of an interstitial O atom and a tetravalent cationic atom substituting for an Al atom, or a defect pair formed of a complex of an oxygen vacancy and N atom substituting for an O atom, said insulating film also having electron unoccupied levels within a range of 2 eV-6 eV from the valence band maximum of Al 2 O 3 ; a third gate comprising layer comprising a second silicon oxide film formed on the second charge trapping layer and a second silicon nitride film formed on the second silicon oxide film; and a controlling electrode formed on the third gate insulating layer, wherein the memory devices is capable of electrically writing, erasing, reading and retaining data.