Patent ID: 8524554

Claim:
A method of manufacturing a dual work function semiconductor device having a substrate with a first region and a second region, the method comprising: forming a first gate stack having a first effective work function; forming a second gate stack having a second effective work function; wherein the forming of a first gate stack and the forming of a second gate stack comprise: forming a host dielectric on and in contact with a substrate in a first and a second region of the substrate; selectively forming a first dielectric capping layer and a dielectric buffer layer on the second region but not on the first region, wherein the first dielectric capping layer is over and in direct contact with the host dielectric, wherein the dielectric buffer layer is over the first dielectric capping layer; forming a second dielectric capping layer overlying the host dielectric on the first region and the dielectric buffer layer on the second region; and forming a gate electrode comprising a metal layer overlying and in contact with the second dielectric capping layer on the first region and the second region, wherein the dielectric buffer layer is selected to prevent intermixing between the first and second dielectric capping layer, wherein the metal layer is selected to determine in combination with the second dielectric capping layer and the host dielectric the first effective work function of the first gate stack, and wherein the first dielectric capping layer is selected to determine in combination with the second dielectric capping layer, the host dielectric and the metal layer the second effective work function of the second gate stack.