Patent ID: 7937673

Claim:
A computer implemented method for implementing an electronic design, comprising: designing the electronic design at a higher level of abstraction; refining at least a portion of the electronic design on at least one successively lower level of abstraction by considering at least a first resolution for the at least the portion or another portion of the electronic design at the higher level of abstraction in the act of refining the electronic design, wherein the act of refining further comprises determining whether one or more stubs in a higher abstraction version in the at least the portion of the electronic design that comprises the one or more stubs are to be refined as corresponding detailed design encodings at a lower abstraction version of the electronic design based at least in part on maintaining the first resolution and a second resolution for the at least the portion of the electronic design at the at least one successively lower level of abstraction at approximately a same level; and verifying one or more properties at some or all of different abstraction levels of the electronic design by using at least one processor, wherein a property verified at first abstraction level of the design will remain true at a second abstraction level of the design.