Patent ID: 8779435

Claim:
A semiconductor structure comprising: a semiconductor substrate having an edge and a surface; a plurality of laminated semiconductor layers disposed on the surface of the semiconductor substrate, wherein the plurality of laminated semiconductor layers includes an upper layer, a lower layer, and an InGaAs layer, the lower layer is located closer to the semiconductor substrate than is the upper layer, and the InGaAs layer is sandwiched between the upper layer and the lower layer; an array of optical semiconductor devices in the plurality of laminated semiconductor layers, wherein optical semiconductor devices of the array of optical semiconductor devices have resonator end faces when divided from the semiconductor substrate, and the semiconductor substrate is divided into bars of the optical semiconductor devices of the array of optical semiconductor devices by cleaving the semiconductor substrate along cleaving lines that separate the bars of the optical semiconductor devices of the array of optical semiconductor devices on the semiconductor substrate before the cleaving; and an opening in the plurality of semiconductor layers, wherein the opening extends into the plurality of laminated semiconductor layers, toward the surface of the semiconductor substrate, through the upper semiconductor layer and the InGaAs layer, exposing the lower layer, extends through the plurality of laminated semiconductor layers, parallel to the surface of the semiconductor substrate, from the edge of the semiconductor substrate along one of the cleaving lines along which the resonator end faces of the optical semiconductor devices array of optical semiconductor devices are to be formed when separated into bars by cleaving of the semiconductor substrate, and terminates before reaching the resonator end face of the optical semiconductor device array of optical semiconductor devices that is located along the cleaving line and closest to the edge of the semiconductor substrate from which the opening extends, parallel to the surface of the semiconductor substrate.