Patent ID: 8243511

Claim:
A method of decoding data stored in memory cells of a memory device, comprising: receiving information from a nominal reference read operation of the memory cells indicative of data stored in the memory cells, the nominal reference read operation comparing analog voltages of the memory cells to at least one nominal reference voltage; receiving information from a shifted reference read operation of the memory cells indicative of the data stored in the memory cells, the shifted reference read operation comparing the analog voltages of the memory cells to at least one shifted reference voltage that is shifted from the nominal reference voltage to compensate for an expected change in the analog voltages of the memory cells; decoding the data stored in the memory cells by a first decoding process that uses the information from either the nominal reference read operation or the shifted reference read operation; decoding the data stored in the memory cells by a second decoding process that uses the information from both of the nominal reference read operation and the shifted reference read operation; and generating an output of the data decoded by one or both of the first decoding process and the second decoding process.