Patent ID: 6859814

Claim:
A finite impulse response filter cell, having at least three inputs and at least two outputs, the finite impulse response filter cell coupled to receive a clocking signal, comprising: a multiplexer having at least two multiplexer inputs and an output, the multiplexer operable at substantially half the clocking signal rate, each of the at least two multiplexer inputs coupled to one of the at least three inputs of the finite impulse response filter cell; a multiplier including an output and at least two multiplier inputs, the first multiplier input receiving a coefficient signal representing a FIR coefficient, the second multiplier input coupled to one of the at least three inputs of the finite impulse response filter cell; a summer having at least two summer inputs and an output, the first and second summer inputs coupled to receive the multiplexer output and the multiplier output; at least two slave sample and hold circuits each having a slave input and a slave output, the at least two slave inputs of the plurality coupled to the summer output, the at least two slave outputs couple to form the at least two outputs of the finite impulse response filter cell, each slave sample and hold circuit operable at substantially half the clocking signal rate; and a conversion circuitry coupled to the second multiplier input, the conversion circuitry operable to convert a digital value at the second multiplier input into an analog signal.