Patent ID: 7898084

Claim:
A semiconductor device comprising: a semiconductor substrate; a first interlayer insulating film formed on the semiconductor substrate, the first interlayer insulating film including a first groove; a lower-layer interconnection formed in the first groove of the first interlayer insulating film, the lower-layer interconnection including a first upper surface having a first and second upper portions; a second interlayer insulating film formed above the first interlayer insulating film and the lower-layer interconnection; a normal plug formed in the second interlayer insulating film, the normal plug including a first bottom surface connected to the first upper portion of the lower-layer interconnection; a dummy plug formed in the second interlayer insulating film, the dummy plug including a second bottom surface connected to the second upper portion of the lower-layer interconnection; a third interlayer insulating film formed on the second interlayer insulating film, the normal plug, and the dummy plug, the third interlayer insulating film including a second groove; and an upper-layer interconnection formed in the second groove of the third interlayer insulating film, the upper-layer interconnection including a third bottom surface connected to a second upper surface of the normal plug, wherein a third upper surface of the dummy plug is connected to a fourth bottom surface of the third interlayer insulating film without connection to the upper-layer interconnection, and the second upper portion of the lower layer interconnection includes a recess located under the dummy plug.