Patent ID: 7430024

Claim:
An active matrix substrate, comprising: a thin film transistor disposed at the crossing point of a scanning signal line with a data signal line on the substrate, with a gate electrode of the transistor being connected to the scanning signal line, a source electrode thereof being connected to the data signal line, and a drain electrode thereof being connected to a pixel electrode; and a storage capacitor upper electrode disposed so as to oppose a storage capacitor wiring pattern at least via an insulating layer, wherein the storage capacitor upper electrode comprises at least three divided electrodes in a region opposing the storage capacitor wiring pattern, each divided electrode is connected to the pixel electrode, the pixel electrode extends over the at least three divided electrodes, wherein the storage capacitor upper electrode is connected to the pixel electrode via at least one contact hole disposed on at least one of the divided electrodes, and wherein the contact hole is disposed on at least one of the divided electrodes not including the divided electrodes occurring at both ends.