Patent ID: 7650526

Claim:
An integrated circuit device to compensate for intra-pair skew, the integrated circuit device comprising: a signal pair, including a first signal node and a second signal node, for transmitting signals from the integrated circuit device to another device; a transmitter coupled to the signal pair to transmit a first data signal on the first signal node and a second data signal on the second signal node, wherein a combination of the first data signal and the second data signal corresponds to a first sequence of data bits during a sequence of bit times; and a first clock circuit coupled to the transmitter to control a transmit time of the first data signal with respect to the second data signal, wherein the first clock circuit includes a first phase adjustment element that provides intra-pair skew compensation for a first timing offset between the first data signal and the second data signal, wherein the first timing offset comprises intra-pair skew and is less than a bit time in the sequence of bit times.