Patent ID: 8647920

Claim:
A method for the fabrication of at least one electrical interconnect in a substrate, comprising: providing a substrate comprising a substrate material and having a first main surface; producing at least one hollow trench-like structure in the substrate from the first main surface, the trench-like structure surrounding an inner pillar structure of the substrate material, wherein the hollow trench-like structure has sloped sidewalls such that an upper width of the hollow trench-like structure is larger than a lower width of the hollow trench-like structure; depositing a dielectric liner which pinches off the hollow trench-like structure at the first main surface such that an airgap is created in the center of hollow trench-like structure, wherein an airgap pinch-off by the dielectric liner is positioned below the first main surface; thereafter creating a hole in the inner pillar, thereby creating a through silicon via hole having a bottom surface and an additional surrounding structure made of a material which is situated in between the through silicon via hole and the airgap in the trench-like structure; and at least partly filling the through silicon via hole with a conductive material, thereby creating an electrical interconnect structure forming an electrical path from the bottom surface of the through silicon via hole up to the first main surface of the substrate.