Patent ID: 7038495

Claim:
A circuit comprising: a first pair of active devices having (i) control terminals thereof respectively forming first and second circuit input ports, the first and second circuit input ports being configured to receive first level external input signals having first and second phases respectively, (ii) sources common terminals thereof being connected together, and (iii) output terminals thereof being connected together and forming at least a first circuit output port configured to output a second level signal having a first phase; and a second pair of active devices having (i) control terminals thereof respectively forming third and fourth circuit input ports, the third and fourth input ports being configured to receive first level external input signals having third and fourth phases respectively, (ii) common terminals thereof being connected together, and (iii) output terminals thereof being connected together and forming at least a second circuit output port configured to output a second level signal having a second phase; wherein the common terminals of the first pair of active devices are connected to the common terminals of the second pair of active devices.