Patent ID: 6864179

Claim:
A method of fabricating a semiconductor device, comprising: forming first conductive regions and second conductive regions on a substrate; forming a lower insulating film on the first conductive regions and the second conductive regions; forming conductive intermediate strips on a portion of the lower insulating film; forming mask-defining patterns on the other portion of the lower insulating film to overlap the first conductive regions in plan view, wherein forming mask-defining patterns comprises: forming upper capping strips on corresponding ones of the intermediate strips; forming a mask-defining layer on the upper capping strips and the other portion of the lower insulating film; planarizing an upper portion of the mask-defining layer to expose the upper capping strips; removing the upper capping strips; and isotropically etching a portion of the planarized mask-defining layer; forming a mask on the intermediate strips to overlap the second conductive regions in plan view; and etching the mask-defining patterns and the lower insulating film by using the mask as an etch mask to form lower hollows which expose the first conductive regions.