Patent ID: 7812752

Claim:
A digital-to-analog converter circuit comprising: first to third reference voltage groups, into which first to (2×h+1)th reference voltages are grouped, where h is a prescribed positive integer, the first reference voltage group including h-number of (2×j−1)th reference voltages, the second reference voltage group including h-number of (2×j)th reference voltages, and the third reference voltage group including h-number of (2×j+1)th reference voltages, where j is a prescribed positive integer of 1 to h; a first selecting circuit that receives the h-number reference voltages of the first reference voltage group and selects a first reference voltage based upon an input digital signal supplied thereto; a second selecting circuit that receives the h-number reference voltages of the second reference voltage group and selects a second reference voltage based upon the input digital signal supplied thereto; a third selecting circuit that receives the h-number reference voltages of the third reference voltage group and selects a third reference voltage based upon the input digital signal supplied thereto; a fourth selecting circuit that receives the first to third reference voltages, respectively selected by the first to third selecting circuits, selects two of the reference voltages from the first to third reference voltages, inclusive of selecting the same voltage redundantly, based upon an input digital signal supplied thereto, and outputs the selected two reference voltages; and an amplifier circuit that receives the two reference voltages selected by the fourth selecting circuit and outputs a result of an operation applied to the two reference voltages.