Patent ID: 7362152

Claim:
A digital PWM generator unit, the unit comprising; a counter responsive to a system clock, the counter providing a time base for PWM output signals; a first register having a first value stored therein; a first comparator, the first comparator having the first value applied to a first input terminal thereof and a count from the counter applied to a second input terminal thereof, a reset signal being generated by the first comparator when the first value and the count are equal; the reset signal setting the counter to zero; a second register having a second value stored therein; a second comparator, the second comparator having the count applied to a first input terminal and the second value applied to a second terminal, the second comparator providing a set signal when the count and the second value are equal; and a phase register coupled to the counter, the phase register having a third value stored therein; the third value over-writing the current counter value in response to a control signal.