Patent ID: 8913436

Claim:
A word line driver comprising: a first stack of transistors, the first stack including: a plurality of decode transistors coupled in a stack between a first node of the first stack of transistors and a first voltage supply terminal for supplying a first supply voltage, wherein each of the decode transistors includes a control electrode to receive a decode signal of a plurality of decode signals; a cascode transistor having a first current electrode connected to the first node, the cascode transistor including a control electrode coupled to a source voltage terminal for providing a source voltage; a third transistor, a first current electrode of the third transistor is connected to a second node of the first stack of transistors, wherein the second current electrode of the third transistor is coupled to a second supply voltage terminal for supplying a second supply voltage, the second node is coupled to a second current electrode of the cascode transistor; a pull up transistor having a first current electrode coupled to the first node, a second current electrode coupled to a third supply voltage terminal for supplying a third supply voltage, and a control electrode coupled to a decode signal of the plurality of decode signals, wherein the second supply voltage is higher than the first supply voltage and higher than the third supply voltage, wherein the third supply voltage is higher than the first supply voltage; and an inverting circuit including an input and an output, the input is coupled to the second node, wherein inverting circuit provides at its output, and inverted logic state of the second node; wherein the plurality of decode transistors are characterized as lower voltage transistors; and wherein the third transistor is characterized as a higher voltage transistor.