Patent ID: 8581317

Claim:
A semiconductor on insulator (SOI) multi-gate field effect transistor-based erasable programmable read-only memory (MuGFET-EPROM), comprising: a substrate having a dielectric surface; a first semiconducting region in or on said dielectric surface, a source region, a drain region and a channel region of said MuGFET-EPROM interposed between said source and said drain formed in said first semiconducting region; a tunneling dielectric layer on said channel region; at least a second semiconducting region in or on said dielectric surface spaced apart from said first semiconducting region, and a first electrode layer comprising a first electrode portion including a transistor gate electrode and a second electrode portion including a control gate electrode electrically isolated from one another, said transistor gate overlying said tunneling dielectric layer to form a MOS transistor, and said control gate overlaying a portion of said second semiconducting region; wherein said transistor gate and said control gate are capacitively coupled to one another by at least one MOS coupling capacitor having a capacitor dielectric, one plate of said at least one MOS coupling capacitor ohmically coupled to or including said second semiconducting region.