Patent ID: 8384406

Claim:
A method for testing a first device as a device under test in a state where the first device provided with a transmitter transmitting a signal and a second device provided with a receiver receiving the signal transmitted by the transmitter, are connected together, wherein the transmitter includes an equalizer circuit that shapes the waveform of a signal to be transmitted, and wherein the receiver includes a latch circuit that latches data corresponding to the signal thus received with the use of a clock, the timing of which is variable, and wherein the method comprises: outputting a signal corresponding to a pattern sequence by the transmitter; latching data corresponding to the signal at the clock edge by the latch circuit; and comparing the data latched by the latch circuit with an expected value corresponding to the pattern sequence, and the method being executed by varying, in a matrix, a parameter of the equalizer circuit and an edge timing of the clock supplied to the latch circuit.