Patent ID: 8736059

Claim:
An interconnecting mechanism used in a three-dimensional integrated circuit, and formed in a dielectric layer, comprising: a paired first sub-interconnecting mechanism including a first spiral conductive element formed in the dielectric layer with a first axis perpendicular to a planar direction of the dielectric layer, and a second spiral conductive element formed in the dielectric layer with a second axis perpendicular to the planar direction of the dielectric layer, wherein the first spiral conductive element is axially symmetrical to the second spiral conductive element and has a first upper through-silicon via, a first lower through-silicon via, a first connection section, a first upper section and a first lower section, and wherein the first connection section is connected to the first upper through-silicon via and the first lower through-silicon via, and the first connection section is arc-shaped; and a paired second sub-interconnecting mechanism including a third spiral conductive element formed in the dielectric layer with a third axis perpendicular to the planar direction of the dielectric layer, and a fourth spiral conductive element formed in the dielectric layer with a fourth axis perpendicular to the planar direction of the dielectric layer, wherein the third spiral conductive element is axially symmetrical to the fourth spiral conductive element, wherein the third spiral conductive element and the fourth spiral conductive element are located beside the first spiral conductive element and the second spiral conductive element.