Patent ID: 7470947

Claim:
A semiconductor memory comprising: a semiconductor substrate; memory cell transistors disposed on the semiconductor substrate, each memory cell transistor comprising: a tunnel insulating film on the semiconductor substrate and in contact with a device isolating film, a floating gate electrode on the tunnel insulating film, a first insulating film on the floating gate electrode, and a control gate electrode on the first insulating film; and a transistor disposed on the semiconductor substrate, the transistor comprising: a first source region of a first conductive type and a first drain region of the first conductivity type surrounded by the device isolating film, a first gate insulating film between the first source region and the first drain region, a first conductive film on the first gate insulating film, a second conductive film of the second conductivity type provided on the first conductive film and having the same dose of the first conductivity type impurity as the first source region, and a second insulating film on the first conductive film and having a first trench penetrating the second insulating film, and the second conductive film connects to the first conductive film via the first trench.