Patent ID: 8575762

Claim:
A package, comprising: a) a first semiconductor die; b) a formed lead frame having a plurality of formed leads each having a first end positioned near but spaced apart from the first semiconductor die and substantially in a first planar level and a second end substantially in a second planar level, wherein the second planar level is higher than the first planar level by an amount that is substantially the same as the vertical thickness of the first end, wherein the first and second planar levels are electrically exposed to an exterior surface of the package, and wherein the first semiconductor die is electrically coupled to at least one of the first ends; c) one or more bond wires electrically coupling the first semiconductor die to one or more of the formed leads, wherein the bond wires each have at least one bend forming a corner for minimizing the distance the bond wires extend above the top of the first semiconductor die; d) a second semiconductor die stacked on and electrically insulated from the first semiconductor die wherein at least one pad on the second semiconductor die is electrically coupled to the one or more of the formed leads; and e) a resin formed around the first semiconductor die and between the leads such that the package has a thickness substantially equal to a thickness of the lead frame.