Patent ID: 8751693

Claim:
A data processing apparatus comprising: a plurality of signal processing units, each of the plurality of signal processing units including a register that stores intrinsic identification (ID) information and stores a parameter to be used for a signal processing operation, the plurality of signal processing units operatively connected to one another and operative to transmit respective output data signals in a predetermined sequential order and to select any one of a first processing operation of storing the parameter in the register based on an input data signal and a second processing operation of sequentially processing the input data signal using the parameter stored in the register in response to a first mode control signal that corresponds to the first processing operation or a second mode control signal that corresponds to the second processing operation; a storage unit that stores parameter information indicating parameters to be stored in the respective signal processing units and that stores signal processing data to be processed by the plurality of signal processing units; a data reading unit that selects the parameter information or the signal processing data from the storage unit, reads a first data signal that includes the parameter information or the signal processing data, and outputs the first data signal as the input data signal to an initial signal processing unit of the plurality of signal processing units; a data writing unit that selectively writes a second data signal corresponding to an output data signal of a final signal processing unit of the plurality of signal processing units in the storage unit; and a control unit that outputs the first mode control signal to each of the plurality of signal processing units to select the first processing operation, outputs the second mode control signal to each of the plurality of signal processing units to select the second processing operation, controls the data reading unit to selectively read the first data signal from the storage unit, and controls the data writing unit to selectively write the second data signal in the storage unit, wherein when the first processing operation is performed, each of the plurality of signal processing units determines whether a parameter ID included in the input data signal corresponds to the intrinsic ID information and writes a corresponding parameter included in the input data signal in the register when the parameter ID of the input data signal corresponds to the intrinsic ID information.