Patent ID: 7755290

Claim:
A Plasma Display Panel (PDP), comprising: a dielectric layer having a plurality of dielectric-layer perforated holes arranged in a matrix; and upper and lower electrode layers having electrode-layer perforated holes connected to the dielectric-layer perforated holes and arranged on both surfaces of the dielectric layer; wherein the upper electrode layer includes a plurality of first electrodes extending in a first direction, the plurality of first electrodes surrounding a group of electrode-layer perforated holes arranged in the first direction; wherein the lower electrode layer includes a plurality of second electrodes extending in a second direction different from the first direction, the plurality of second electrodes surrounding a group of electrode-layer perforated holes arranged in the second direction; wherein upper and lower substrates are directly attached to the upper and lower electrode layers, respectively, and wherein a phosphor layer is arranged on the inner surfaces of the electrode-layer perforated holes of at least one of the upper and lower electrode layers and the inner surfaces of the substrates facing the electrode-layer perforated holes, the inner surface of the electrode-layer perforated hole being a surface of the electrode-layer perforated hole that is facing a longitudinal axis of the electrode-layer perforated hole.