Patent ID: 7277969

Claim:
A design method for a bus system equipped with a plurality of device units, a data bus to which the plural device units are connectible, a timing-signal supply source supplying a timing signal to said plural device units through a timing-signal bus, a bus switch connecting and disconnecting a signal between said plural device units and said data bus, and a bus switch controller controlling connecting and disconnecting operations performed by said bus switch, comprising: computing, for each of said plurality of device units, noise propagation timing at which, when each one of said plurality of device units is connected to said data bus being active, a noise propagates to another one or more of said plural device units or another one or more devices connected to said data bus based on a period of said timing signal, a signal propagation delay in each one of said plurality of device units, signal propagation delays in said timing-signal bus and said data bus, and a setup time in the other one or more of said plurality of device units or in the other one or more devices connected to said data bus; and computing, based on said noise propagation timing computed in said noise propagation computing, connection timing at which each one of said plural device units is to be connected to said data bus, wherein in said computing connection timing, said connection timing is computed by computing a delay time needed for said bus switch to connect each one of said plurality of device units to said data bus after each one of said plurality of device units is connected to said timing-signal bus.