Patent ID: 8658496

Claim:
A method comprising: forming a memory cell on a substrate of a memory device, forming the memory cell including: forming a first dielectric layer on the substrate of the memory device, forming a floating gate on the first dielectric layer, forming a second dielectric layer on the floating gate, and forming a control gate on the second dielectric layer; forming a first film over a top surface of the control gate, the first film including a conformal film, a thickness, of the conformal film, being substantially uniform, the conformal film substantially directly contacting: a portion of the substrate, and the top surface of the control gate, the conformal film filling gaps and crevices along the memory cell, and the conformal film filling the gaps and the crevices to improve memory cell data retention of the memory device, forming the first film including: depositing the conformal film using a low pressure chemical vapor deposition (LPCVD) process or using an atomic layer deposition (ALD) process; and forming a second film on the first film, the second film including a non-conformal film, a thickness, of the non-conformal film, being non-uniform, and a portion of the non-conformal film formed over a top surface of the memory cell being thicker than another portion of the non-conformal film formed adjacent side surfaces of the memory cell.