Patent ID: 8218389

Claim:
A semiconductor storage device comprising: a timing allocation unit that sets refresh timing to perform a refresh operation for maintaining data and data access timing to perform a data access operation for reading or writing the data in accordance with a clock signal with respect to each memory bank including a plurality of memory cells; and a waiting unit that waits start of the data access operation until the data access timing is started in a case where a request for the data access operation is made during the refresh timing, and waits start of the refresh operation until the refresh timing is started in a case where a request for the refresh operation is made during the data access timing, wherein the semiconductor storage device is configured so that a clock edge at which the request for the refresh operation is made according to tRC=n*tCK where tRC is a memory access time, tCK is a clock cycle and n is a positive number selected in accordance with memory capacity.