Patent ID: 7345939

Claim:
A sense amplifier, comprising: a pair of sense bit lines; a first MOS sense amplifier having a first pair of MOS transistors of first conductivity type therein electrically coupled across said pair of sense bit lines so that each of the first pair of MOS transistors has a first source/drain terminal electrically connected to a corresponding one of said pair of sense bit lines and the second source/drain terminals of the first pair of MOS transistors are electrically connected together, said first pair of MOS transistors of first conductivity type configured to have different threshold voltages or support different threshold voltage biasing; a second MOS sense amplifier having a first pair of MOS transistors of second conductivity type therein electrically coupled across said pair of sense bit lines; a first sense amplifier enable line electrically coupled to source terminals of the first pair of MOS transistors of first conductivity type; a second sense amplifier enable line electrically coupled to source terminals of the first pair of MOS transistors of second conductivity type; a third sense amplifier enable line electrically coupled to a substrate terminal of a first one of the first pair of MOS transistors of first conductivity type; a fourth sense amplifier enable line electrically coupled to a substrate terminal of a second one of the first pair of MOS transistors of first conductivity type; and a controller configured to independently drive said first, second, third and fourth sense amplifier enable lines during an operation to amplify a differential voltage established across said pair of sense bit lines.