Patent ID: 8304819

Claim:
A method of fabricating a semiconductor device, comprising: a) amorphousizing a surface layer of a silicon substrate within a first region, wherein the amorphousized silicon layer of the silicon substrate within the first region has a first depth; b) forming an insulating layer directly on the amorphousized silicon layer in the first region of the silicon substrate and over a second region of the silicon substrate adjacent to the first region; c) crystallizing the amorphous silicon layer in said first region to form a first vacancy in the first region between the insulating layer and the silicon substrate, wherein during crystallization, the amorphous silicon layer shrinks in the first region and the adjacent second region does not shrink; d) forming a first hole through the insulating layer wherein the first hole connects with the first vacancy; e) depositing metal into the first vacancy through the first hole; and f) applying a second heat treatment to the metal deposited in the first vacancy.