Patent ID: 7068316

Claim:
A selectable resolution image capture system comprising: an imager having a plurality of photocells that produce an analog electrical response to light exposure; a circuit that converts the electrical responses of the plurality of photocells into digital signals; the circuit having a full-resolution mode and a low-resolution mode; an image processor that operates the circuit and selects between the full-resolution and low-resolution modes of the circuit to capture an image, where the image processor detects whether there is a low incident light condition, and in response to detecting the low incident light condition, the image processor switches from the full-resolution mode to the low-resolution mode of the circuit and captures the image using the low-resolution mode of the circuit; a row clock signal operating at a first clock rate; a column clock signal operating at a second clock rate; and a charge accumulator configured to accumulate charges from selected photocells during first clock cycles; wherein the image processor increases the first clock rate and the second clock rate during second clock cycles when the charge accumulator is not accumulating charges.