Patent ID: 8704308

Claim:
A semiconductor device comprising a static electricity discharge protection circuit that protects an integrated circuit, the protection circuit comprising: an RC timer comprising a resistor element and a capacitor element which are connected in series; a PMOS transistor comprising a gate electrode connected to a connection point of the resistor element and the capacitor element of the RC timer, a source electrode connected to a terminal of the resistor element which is different from a terminal of the resistor element connected to the capacitor element, and a drain electrode connected to a terminal of the capacitor element which is different from a terminal of the capacitor element connected to the resistor element; a first NMOS off transistor comprising a drain electrode connected to the drain electrode of the PMOS transistor, a source electrode and a gate electrode connected to the source electrode of the first NMOS off transistor, and a second NMOS off transistor comprising a drain electrode connected to the source electrode of the first NMOS off transistor, a source electrode connected to a ground line that always supplies a ground voltage to the protected integrated circuit, and a gate electrode connected to the source electrode of the second NMOS off transistor so that the first and second NMOS off transistors are connected in series between the PMOS transistor and the ground line.