Patent ID: 8643077

Claim:
A non-volatile memory device comprising: a semiconductor substrate; a tunnel insulation layer on the semiconductor substrate; a charge storage pattern on the tunnel insulation layer so that the tunnel insulation layer is between the charge storage pattern and the semiconductor substrate; and a blocking insulation pattern on the charge storage pattern so that the charge storage pattern is between the tunnel insulation layer and the blocking insulation pattern, wherein the blocking insulation pattern comprises a first blocking insulation sub-layer, a second blocking insulation sub-layer, and a third blocking insulation sub-layer, wherein the second blocking insulation sub-layer is between the first and third blocking insulation sub-layers, and wherein an energy band gap of the second blocking insulation sub-layer is greater than energy band gaps of the first and third blocking insulation sub-layers, and wherein a trap density of the second blocking insulation sub-layer is less than trap densities of the first and third blocking insulation sub-layers.