Patent ID: 8426948

Claim:
A laminated semiconductor wafer, comprising: a plurality of semiconductor substrates having a plurality of scribe-groove parts formed along scribe lines, each of the plurality of semiconductor substrates including: a plurality of device regions insulated from each other, each of which is in contact with at least one of the plurality of scribe-groove parts and has a semiconductor device formed therein; and an electromagnetic shielding layer formed in regions other than the scribe-groove parts using a ferromagnetic body, provided in each of an uppermost substrate laminated on the top side and a lowermost substrate laminated on the bottom side among the plurality of semiconductor substrates, a through hole formed in the scribe-groove part which penetrates the plurality of semiconductor substrates laminated in a laminated direction in which the plurality of semiconductor substrates are laminated; and a through electrode penetrating the plurality of semiconductor substrates through the through hole.