Patent ID: 8309406

Claim:
A method for manufacturing a semiconductor device, comprising the steps of: forming a gate electrode over a substrate; forming a gate insulating layer over the gate electrode; forming a microcrystalline semiconductor layer comprising an acceptor impurity element over the gate insulating layer; forming an amorphous semiconductor layer over the microcrystalline semiconductor layer; forming an island-shaped insulating layer over the amorphous semiconductor layer; etching the microcrystalline semiconductor layer and the amorphous semiconductor layer with use of a mask; forming an n-type or p-type semiconductor layer over the microcrystalline semiconductor layer, the amorphous semiconductor layer and the island-shaped insulating layer; forming a conductive layer over the n-type or p-type semiconductor layer; performing a first etching of the conductive layer so that a source electrode and a drain electrode are formed; performing a second etching of the n-type or p-type semiconductor layer so that a source region and a drain region are formed; and performing a third etching of peripheral portions of the source electrode and the drain electrode, wherein the microcrystalline semiconductor layer is formed by a plasma-enhanced chemical vapor deposition method using a process gas comprising at least a dopant gas comprising the acceptor impurity element, wherein the process gas is supplied with high-frequency electric power having frequencies more than or equal to 3 MHz from two or more power supply units to generate plasma, and wherein the frequencies include at least a first frequency and a second frequency which are different from each other.