Patent ID: 7647576

Claim:
A computer-readable medium encoded with a computer program for a wiring selection method for selecting, from among wirings wired on the basis of layout information, a wiring whose layout is to be changed with priority in order to improve a delay, the program when executed by a computer causes the computer to perform a method comprising: a wiring capacitance lower limit computation step for computing wiring capacitance lower limits of respective wirings, on the basis of said layout information; an inter-wiring capacitance computation step for computing, as an inter-wiring capacitance, a difference between a real wiring capacitance and said wiring capacitance lower limit computed in said wiring capacitance lower limit computation step; a parallel wiring length extraction step for extracting a parallel wiring length existing between adjacent wirings of said respective wirings, on the basis of said layout information; a first wiring selection step for selecting a wiring whose slack value is less than a predetermined value, as said wiring whose layout is to be changed; a second wiring selection step for selecting a wiring as said wiring whose layout is to be changed, wherein said inter-wiring capacitance of said wiring computed in said inter-wiring computation step is greater than or equal to a predetermined value; and a third wiring selection step for selecting, as said wiring whose layout is to be changed, a wiring whose wiring length extracted in said parallel wiring length extraction step is greater than or equal to a predetermined value.