Patent ID: 8665960

Claim:
A method of encoding/decoding a digitized sequence of video frames in a multi-core system, the method comprising: encoding the sequence of video frames by performing core motion estimation and weighted texture prediction; and decoding encoded sequence of video frames using high motion update and low motion update for error resilience; wherein the error resilience comprises: defining each macroblock as a high motion macroblock or a low motion macroblock; defining for each macroblock of a current frame a set of macroblocks including the macroblock of the current frame and at least one macroblock located at the same position in previous frames; and making a choice between INTRA and INTER coding mode for each macroblock of high motion update frame and each macroblock of low motion update frame; wherein the choice between INTRA and INTER coding mode for the error resilience is based on the following: the INTRA coding mode is used for high motion update frames, when cost_intra·K H <cost_inter, and set C(D) contains at least one high motion macroblock; and the INTRA coding mode is used for low motion update frames, when cost_intra·K L <cost_inter, and set C(T L ) contains at least one high or low motion macroblock; where K H —INTRA cost scaling factor for high motion frames; K L —INTRA cost scaling factor for low motion frames; T H —high motion INTRA update period; T L —low motion INTRA update period; and D—high motion INTRA update depth.