Patent ID: 7321593

Claim:
A data transfer system comprising: a channel; a transmission unit comprising a first host adapted to transmit parallel data and a first clock signal, and a serialization unit comprising a buffer adapted to receive the parallel data from the serialization unit according to the first clock signal, and to transmit the parallel data according to a second clock signal, wherein the buffer comprises a plurality of storage cells adapted to store the parallel data received by the buffer, a buffer controller adapted to cause the buffer to transmit an additional predetermined amount of the parallel data when a number of the storage cells storing the parallel data received by the buffer but not yet transmitted by the buffer is less than or equal to a first threshold; wherein the buffer controller is further adapted to cause the buffer to delete a predetermined amount of the parallel data when a number of the storage cells storing the parallel data received by the buffer but not yet transmitted by the buffer is greater than or equal to a second threshold, and a serializer adapted to convert the parallel data transmitted by the buffer to serial data, and to transmit the serial data to the channel according to the second clock signal, wherein the first and second clock signals are independent; and a reception unit comprising a deserialization unit comprising a deserializer adapted to receive the serial data from the channel, and to convert the serial data to the parallel data, and a second host adapted to receive the parallel data from the deserialization unit.