Patent ID: 8078778

Claim:
An image processing apparatus comprising: a memory bus provided to access a memory; a compression unit which compresses an image input and writes a compressed data into said memory thorough said memory bus; a decompression unit which reads and decompresses the compressed data of an adjacent image of said image written by said compression unit, from said memory through said memory bus, to obtain a decompressed image of the adjacent image; a memory bus monitoring unit which monitors a degree of congestion of said memory bus; a bandwidth calculation unit which calculates a memory bus bandwidth used by any of said compression unit and said decompression unit, to obtain a calculated bandwidth; and a control unit which controls whether to permit any of said compression unit and said decompression unit to access said memory, based on said calculated bandwidth and the degree of congestion of said memory bus, wherein said memory comprises a shared memory and, said compression unit and said decompression unit conduct an access processing to said shared memory in parallel, wherein said control unit allows said compression unit and said decompression unit to continue the access processing on a condition that said calculated bandwidth is equal to or less than a first threshold value, and allows said compression unit and said decompression unit to continue the access processing free from adjusting a compression ratio for the compressed data on a condition that said calculated bandwidth is within a tolerance corresponding to said degree of congestion of said memory bus when said calculated bandwidth is greater than said first threshold value, and wherein said control unit stops conducting said access processing of said decompression unit whereas said compression unit continues to access said memory and write compressed data into said memory when said calculated bandwidth is greater than said first threshold value and outside said tolerance.