Patent ID: 8576599

Claim:
A method of operating a multi-operational-mode multi-wafer device configured for operation in a first mode as a CAM cell and for operation in a second mode as a register, said method comprising: providing a multi-operational-mode multi-wafer device comprising first semiconductor components and second semiconductor components, wherein said first semiconductor components are configured as a match circuitry and comprise at least one compare element and a first power distribution structure comprising first power wires located in a first dielectric material layer, and wherein said second semiconductor components are configured as a storage circuitry vertically stacked on top of, or below, said first semiconductor components, said second semiconductor components comprising at least one storage element and a second power distribution structure comprising second power wires located in a second-dielectric material layer, wherein said second power distribution structure overlies or underlies said first power distribution structure, and said first semiconductor components and said second semiconductor components are interconnected by at least one vertically conductive filled via hole, and said first power distribution structure does not contact said second power distribution structure; operating a combination of said first semiconductor components and said second semiconductor components as said CAM cell in a first mode, wherein said first power distribution structure provides a first non-zero power supply voltage to said first semiconductor components during operation in said first mode; and operating said second semiconductor components as a register in a second mode, wherein said first power distribution structure turns off said match circuitry during operation in said second mode, and wherein said second power distribution structure provides a second non-zero power supply voltage to said second semiconductor components.