Patent ID: 7214562

Claim:
A method of encapsulating a plurality of integrated circuit chips attached to a lead frame strip, the lead frame strip including an outer frame and a plurality of vertical and horizontal connecting bars attached to the outer frame in a manner defining a plurality of inner frames arranged in a matrix pattern within the outer frame, each inner frame including an area where an IC chip from the plurality of IC chips is attached, the method comprising: for each inner frame, encasing the IC chip attached to the inner frame along with a portion of the inner frame within a package cavity of a mold sized to form a single integrated circuit package; injecting encapsulant material into each package cavity, wherein the encapsulant material is delivered to the package cavity through a series of runners and gates that includes at least one runner positioned on a plane above the package cavity, a lead frame runner positioned along a first connecting bar of the lead frame strip and a vertical gate that couples a runner positioned on a plane above the package cavity to the lead frame runner and wherein each lead frame runner delivers encapsulant material to a plurality of package cavities positioned adjacent to the lead frame runner.