Patent ID: 8324955

Claim:
A level shifter configured to receive an input voltage signal and produce an output voltage signal comprising: a first inverter, configured to operate at a potential difference between a first voltage V 1 received at a voltage V 1 signal node and a second voltage V 2 received at a voltage V 2 signal node, the first inverter having an input terminal connected to an input node of the level shifter, and further having an output terminal; a capacitor having a first terminal connected to the output terminal of the first inverter, and further having a second terminal; a resistor having a first terminal connected to a third voltage V 3 at a voltage V 3 signal node and a second terminal; and a latch circuit, configured to operate at a potential difference between a fourth voltage V 4 received at a voltage V 4 signal node and a fifth voltage V 5 received at a voltage V 5 signal node, the latch having an input node connected to the second terminal of the resistor and the second terminal of the capacitor, and further having an output node connected to an output node of the level shifter.