Patent ID: 7170136

Claim:
An ESD-protection structure, comprising: a plurality of PNP transistors, having common collectors comprising a P− well, common bases comprising a first N− well located in the P− well, and emitters comprising a plurality of P+ diffusions located in the first N− well, wherein the plurality of P+ diffusion emitters are coupled to an integrated circuit pad and the P− well is coupled to an integrated circuit common; and a diode having a cathode comprising an N+ diffusion in a second N− well located in the W well and an anode comprising a P+ diffusion in the second N− well located in the P− well, wherein the N+ diffusion cathode is coupled to the first N− well common bases I of the plurality of PNP transistors and the P+ diffusion anode is coupled to the P− well, whereby the plurality of PNP transistors conduct between the integrated circuit pad and the integrated circuit common when a controlled breakdown voltage of the diode is exceeded and the plurality of PNP transistors do not conduct otherwise.