Patent ID: 7388397

Claim:
A testing method for an array substrate including a pixel section having a plurality of row electrodes and a plurality of line electrodes which mutually intersect one another, a plurality of pixel electrodes disposed at respective intersecting points between both of these electrodes, a plurality of supplemental capacitors electrically connected to the respective pixel electrodes, and a plurality of pixel switching elements adapted to allow a line selection signal supplied to the line electrodes to provide conductance between the row electrodes and the pixel electrodes for thereby permitting a video signal supplied to the row electrodes to be written in the supplemental capacitors, a line electrode driver circuit which supplies the line selection signal to the line electrodes, and a row electrode driver circuit having a video bus adapted to supply the video signal, and a plurality of analog switches operative to provide conductance between the video bus and the row electrodes to allow the video signal supplied to the video bus to be supplied to the row electrodes, the testing method comprising: first controlling the pixel switching elements and the analog switches into conductive states in a normal display mode, writing a test video signal supplied to the video bus in the supplemental capacitors from the row electrodes via the pixel switching elements, and subsequently reading out the test video signal from the same circuit line; second controlling the pixel switching elements and the analog switches into non-conductive states, and applying the test video signal to the video bus and subsequently reading out the video signal from the video bus; and detecting electric defects of the pixel section and the row electrodes from a differential component between the signal read out in the first controlling and the signal read out in the second controlling.