Patent ID: 8284776

Claim:
An apparatus comprising: an ingress port configured to receive a packet that comprises a data portion and a header portion, wherein the header portion comprises at least one header; a header cache configured to store at least a part of the header portion of the packet, but not the data portion of the packet; and a plurality of ingress recursion engines, wherein each ingress recursion engine is configured to process a header from the header portion, and wherein the plurality of ingress recursion engines, collectively, are configured to recursively process the header portion, at least partially, from outer-most header to inner-most header, until an adjacency value for the packet is determined; and wherein the recursively processing by the plurality of ingress recursion engines, collectively, comprises: partially examining an outer header to determine if an inner header should be processed first; if so, processing the inner header, returning to the outer header, processing the outer header, and skipping over the previously processed inner header to process another header.