Patent ID: 8352814

Claim:
An electronic control apparatus comprising: a nonvolatile memory that stores predetermined data and has a memory region which is divided into a plurality of sub-regions; operating means that executes a check operation for each of the sub-regions in order to check whether the data stored in the nonvolatile memory are normal or not; determining means that determines whether the check operation has resulted in normal or not; first retrying means that allows the operating means to retry a second check operation as the check operation, the second check operation being executed for the sub-region that a first check operation as the check operation has been executed for and determined to be in error, and the second check operation being different from the type of the first check operation; and second retrying means that allows the operating means to retry the first check operation for the sub-region that the second check operation has been executed for and determined to be in normal, wherein: if the second check operation for the sub-regions executed by the operating means has detected no errors and if the first check operation retried by the operating means has resulted in data error, the determining means determines that the first check operation executed by the operating means detected an error; and if the first check operation retried by the operating means has resulted in normal, the determining means determines that the sub-regions in question and the operation executed by the operating means are normal.