Patent ID: 8222065

Claim:
A method comprising: forming oxide features over a capacitive micromachined ultrasonic transducer (CMUT) control chip that is in or over a silicon wafer, the CMUT control chip configured to control a capacitive micromachined ultrasonic transducer; planarizing the oxide features; bonding a silicon-on-insulator (SOI) wafer to the planarized oxide features; depositing a first metal layer over the silicon wafer and the CMUT control chip, wherein the first metal layer forms first and second plate couplers in electrical contact with the CMUT control chip; depositing a second metal layer over the first metal layer, wherein the second metal layer forms a first plate of a CMUT capacitor, wherein the first plate is in electrical contact with the first plate coupler; and depositing a third metal layer over the second metal layer, wherein the third metal layer forms a second plate of the CMUT capacitor, wherein the second plate is in electrical contact with the second plate coupler.