Patent ID: 7795620

Claim:
A dynamic random access memory (DRAM) structure comprising: a substrate comprising a donut-type pillar formed in the substrate and having a cavity defined in a central portion of the donut-type pillar, wherein the donut-type pillar has a toroid shape; a transistor disposed inside and immediately surrounding the donut-type pillar and comprising: a gate filled in the cavity inside the donut-type pillar, an upper source/drain disposed in the upper portion of the donut-type pillar, and a lower source/drain disposed in the lower portion of the donut-type pillar; a bit line disposed in the substrate beneath the transistor and electrically connected to the lower source/drain, and electrically isolated from the gate; a word line disposed above the gate and electrically connected to the gate; and a capacitor disposed above the word line and the gate and electrically connected to the upper source/drain.