Patent ID: 7344915

Claim:
A method for manufacturing a semiconductor package comprising the steps of: providing a board having at least a region for forming a chip cavity inwall being defined; providing a metal foil with a layer of adhesive resin formed over one surface thereof, the adhesive resin having a first adhesive surface attached to the metal foil and a second adhesive surface exposed; attaching the second adhesive surface of the adhesive resin to the board by lamination of the board with the metal foil; forming a through opening corresponding to the region, the through opening passing through the board, the adhesive resin and the metal foil in a manner that the board has the chip cavity inwall in the through opening; removing the metal foil to expose the first adhesive surface of the adhesive resin; attaching the first adhesive surface of the adhesive resin to a carrier plate to connect with the board via lamination; and disposing a chip on the carrier plate within the chip cavity inwall of the board.