Patent ID: 7227912

Claim:
A receiver comprising: an RF front end circuit, quadrature phase detectors, a quadrature IF oscillator, an amplitude error detector, a phase error detector, a quadrature frequency doubler, an amplitude correction circuit, and a phase correction circuit, wherein the RF front end circuit is configured for selection and conversion of an RF input signal into a pair of quadrature signals that are supplied through in-phase and phase quadrature signal paths to signal inputs of the quadrature phase detectors, which are included in a (PLL) phase locked loop, an output of the quadrature phase detectors are coupled through a loop filter to a control input of the quadrature IF oscillator, the quadrature IF oscillator is configured to supply a pair of quadrature IF oscillator signals through in-phase and phase quadrature IF carrier paths to carrier inputs of the quadrature phase detectors, the quadrature phase detectors are coupled to the amplitude and phase error detectors for a detection of amplitude and phase errors in the output signal of the quadrature phase detectors, the quadrature frequency doubler is coupled between the quadrature IF oscillator and carrier inputs of the amplitude and phase error detectors to supply thereto respectively, in-phase and phase quadrature error detection carrier signals at twice the frequency of the quadrature IF oscillator signals, and the amplitude and phase error detectors are coupled respectively through first and second low-pass filters to the amplitude correction circuit and the phase correction circuit for a negative feedback of the amplitude and phase errors to the in-phase and phase quadrature signal paths.