Patent ID: 7328506

Claim:
A method for forming a plated microvia interconnect, comprising: mounting an external dielectric layer (EDL) on a surface of a substrate such that the EDL is in direct mechanical contact with a conductive element comprised by the surface of the substrate; forming an opening in the EDL to expose the conductive element and create a microvia in the EDL; treating a sidewall surface and a bottom wall surface of the microvia to promote adhesion of copper to the sidewall surface and the bottom wall surface; plating the sidewall surface and the bottom wall surface of the microvia to form a layer of copper on the sidewall surface and the bottom wall surface, wherein the layer of copper is in direct mechanical and electrical contact with the conductive element, wherein said plating comprises: depositing a copper seed layer on the sidewall surface and the bottom wall surface of the microvia; and plating a copper layer on the copper seed layer such that the layer of copper comprises the copper seed layer and the copper layer; depositing a wet solder paste on the layer of copper to overfill a remaining portion of the microvia; and reflowing the solder paste to form a solder bump in and over the remaining portion of the microvia to form the plated microvia interconnect.