Patent ID: 7755934

Claim:
A resistance change memory device comprising: a substrate; a plurality of cell arrays stacked above the substrate, each cell array including a matrix layout of memory cells, each of which stores a resistance value as data; a write circuit configured to write a pair cell constituted by two neighboring memory cells within the cell arrays in such a manner as to store complementary data; and a read circuit configured to read complementary resistance value states of the pair cell as one bit of data, wherein the memory cell includes a variable resistance element for storing as information a resistance value, and wherein the variable resistance element has a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d”-orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less, and wherein each cell array has first wiring lines and second wiring lines disposed to cross the first wiring lines as being isolated from the first wiring lines, and wherein each memory cell has the variable resistance element and a diode stacked at each cross portion of the first wiring lines and the second wiring lines, and wherein the pair cell is made up of two upper and lower neighboring memory cells between upper and lower neighboring cell arrays sharing the second wiring lines, and wherein the pair cell is connected to the write circuit via the first wiring lines and connected to the read circuit via the sharing second wiring lines in such a way that a read and write current is flowed from the sharing second wiring lines to the first wiring lines via the pair cell.