Patent ID: 6996032

Claim:
An apparatus for carrying out a measurement process for measuring a delay through a signal path within an integrated circuit (IC), the apparatus comprising: a strobe generator, for receiving an OSC signal that may be either logically true or logically false, for receiving TUNE data, and for receiving a STROBE signal, for generating a signal A and a signal B when the OSC signal is logically false, each having an edge produced in delayed response to an edge of a STROBE signal supplied as input to the strobe generator, wherein the strobe generator provides a fixed delay between the STROBE signal edge and the signal A edge and provides a variable delay between the STROBE signal edge and the signal B edge, and wherein the variable delay is selected by TUNE data supplied as input to the strobe generator, and for generating an OSCOUT signal when the OSC signal is logically true, wherein the OSC output signal has a period that is proportional to the variable delay selected by the TUNE data; and a path probe implemented on the IC for receiving, a TEST signal and a CAL signal that may be either logically true or logically false, for generating a signal C at the signal path input in response to signal A when the TEST signal is logically true such that the signal path produces a signal D at its output, wherein each of signals C and D change state in response to each signal A edge; for receiving signals B and D; for responding to each signal B edge when the CAL signal is logically true by generating at least one indicating signal indicating whether signal C changed state before the path probe received the signal B edge, and for responding to each signal, B edge when the CAL signal is logically false by generating said least one indicating signal indicating whether signal D changed state before or after the path probe received the signal B edge.