Patent ID: 6987296

Claim:
A semiconductor device comprising: a semiconductor substrate; a lower conductive layer formed over the semiconductor substrate, the lower conductive layer having an upper convex portion and a lower flat portion; a first intermediate insulating layer formed over the upper convex portion and the lower flat portion of the lower conductive layer; a second intermediate insulating layer formed on the first intermediate insulating layer over the upper convex portion and the lower flat portion of the lower conductive layer; an upper conductive layer formed over the first intermediate insulating layer, and crossing the lower conductive layer; and a contact hole formed at a crossing portion of the upper convex portion of the lower conductive layer and the upper conductive layer through the first and second intermediate insulating layers, wherein a thickness of the second intermediate insulating layer is selected as dependent on a depth of the contact hole, and wherein the second intermediate insulating layer is patterned layer formed on the first intermediate insulating layer as substantially located over only the upper convex portion and the lower flat portion.