Patent ID: 8760192

Claim:
A programmable circuit comprising: a first path and a second path connected in parallel between a first voltage node and a second voltage node; wherein the first path includes a first programmable element, a first node, a first pull-up transistor, a second node, and a first pull-down transistor connected in series between the first voltage node and the second voltage node; the second path includes a second programmable element, a third node, a second pull-up transistor, a fourth node, and a second pull-down transistor connected in series between the first voltage node and the second voltage node; a drain electrode of a first input transistor is electrically connected to the third node; a gate electrode of the first pull-up transistor, a gate electrode of the first pull-down transistor, and the fourth node are electrically connected to one another; and a gate electrode of the second pull-up transistor, a gate electrode of the second pull-down transistor, and the second node are electrically connected to one another.