Patent ID: 8010855

Claim:
A semiconductor device capable of being coupled to first and second debuggers, the first and second debuggers being capable of debugging a program in the semiconductor device, the semiconductor device comprising: a first chip; and a second chip that is coupled to the first chip, wherein the first chip comprises: a first processing unit that executes a first instruction group; and a first debug control unit capable of being coupled to the first debugger to control a communication with the first debugger, wherein the second chip comprises: a nonvolatile memory that stores an ID code and the program including the first and second instruction groups and, the ID code stored in the nonvolatile memory being compared with an ID code inputted from the second debugger to control permission or prohibition of a connection configuration to the second debugger; a second processing unit that executes the second instruction group; a second debug control unit capable of being coupled to the second debugger to control a communication with the second debugger; and wherein the first debug control unit controls permission or prohibition of a connection configuration to the first debugger based on whether the connection configuration to the second debugger is permitted or not.