Patent ID: 8903226

Claim:
A recording device comprising: a plurality of tuners, each tuner configured to receive a different program for recording; a storage device configured to store recorded programs; and a processor in communication with the tuners and the storage device to receive and record the different programs, wherein the processor is configured to: output a timer conflict display comprising a two dimensional grid of cells having a time axis representing particular show times and a tuner axis representing each of the plurality of tuners, wherein each of the different programs to be received by each tuner is presented on the tuner axis associated with that tuner at its particular show time so that all of the programs to be recorded at the particular show times are simultaneously presented on a common display; output a representation of a first timer on the timer conflict display for a first program to received by a first one of the plurality of tuners within the two dimensional grid of cells, the representation of the first timer having a first graphical length along the time axis corresponding to a first temporal length of the first program to be recorded; and output a representation of a second timer on the timer conflict display for a second program to be received by a second one of the plurality of tuners within the two dimensional grid of cells, the representation of the second timer having a second graphical length along the time axis corresponding to a second temporal length of the second program to be recorded; the first timer and the second timer extending along at least a same portion of the time axis, illustrating a recording conflict between the first and second timers; wherein the first program is associated with first packets and the second program is associated with second packets, and wherein the processor is further configured to: identify that the first and second packets are multiplexed on a common carrier frequency; responsive to identifying that the first program and the second program are transmitted on the common carrier frequency, control the recording of the first and second packets by the storage device; reassemble the first packets related to the first program into a first data stream; and reassemble the second packets related to the second program into a second data stream.