Patent ID: 6853027

Claim:
A device including a nonvolatile memory having write, erase and read modes, comprising: a) a first conductive type semiconductor region; b) a pair of second conductive type diffusion regions formed within said first conductive type semiconductor region forming source and drain diffusion regions separated by a channel region comprised of at least a portion of said first conductive type semiconductor region; c) a first gate insulating layer formed on said first conductive type semiconductor region; d) a floating gate conductive layer formed on said first gate insulating layer; e) a second gate insulating layer having a high dielectric constant of not less than 50 and formed on said floating gate conductive layer, said second gate insulating layer being comprised of a layer of insulating material selected from the group comprising: strontium titanate (SrTiO 3 ), PbTiO 3 , PZT, or PLZT; and f) a conductive control electrode formed on said second gate insulating layer; and wherein said first gate insulating layer is thin enough given the thickness and dielectric constant of said second gate insulating layer to permit Fowler-Nordheim tunneling when either a write or erase voltage between 7 and 13 volts is applied said between said drain diffusion region and said control electrode.