Patent ID: 7586551

Claim:
A method of manufacturing an array substrate of an LCD device, comprising: forming a gate line, a gate electrode, and a lower storage electrode on the substrate with a first mask process; sequentially forming an insulating layer, a semiconductor layer, an impure semiconductor layer, and a metal layer on the gate line, the gate electrode, and the lower storage electrode; with a second mask process, etching the metal layer, the impure semiconductor layer and the semiconductor layer in a pixel region, etching the metal layer and the impure semiconductor layer a source/drain electrode in a channel region, and etching the metal layer and the impure semiconductor layer in a storage capacitor region, thereby exposing the semiconductor layer on the lower storage electrode; forming a protection layer on the data line, the source/drain electrode, and the exposed semiconductor layer on the lower storage electrode; etching the protection layer with a third mask process to form a contact hole and a through hole above a part of the drain electrode and the exposed semiconductor layer on the lower storage electrode, and depositing a transparent electrode thereon; and patterning the transparent electrode with a fourth mask process so as to electrically connect the transparent electrode to the drain electrode through the contact hole, and forming a pixel electrode as an upper storage electrode corresponding to the lower storage electrode, wherein the array substrate includes a storage capacitor having a lower storage electrode across a data line and in parallel with the gate line on the same layer as the gate line, wherein the lower storage electrode divides the pixel region into two equal sub-regions, and a semiconductor layer interposed between the lower storage electrode and the pixel electrode, wherein the pixel electrode is directly connected to the semiconductor layer by a through hole formed on an upper region of the semiconductor layer.