Patent ID: 7951629

Claim:
A method of manufacturing a pixel structure, comprising: forming a first patterned conductive layer comprising a gate, a connection layer located at one side of the gate and a data line on a substrate; forming a gate insulating layer on the substrate to cover the first patterned conductive layer; forming a semiconductor channel layer on the gate insulating layer above the gate; forming a second patterned conductive layer comprising a scan line, a common line, a source and a drain on the gate insulating layer and the semiconductor channel layer, wherein the scan line is electrically connected to the gate, the common line is located above the data line, the source and the drain are located on the semiconductor channel layer, and the source is electrically connected to the data line; forming a passivation layer on the substrate to cover the second patterned conductive layer; and forming a pixel electrode on the passivation layer and electrically connected to the drain.