Patent ID: 8290759

Claim:
A computer-implemented method of determining a Negative Bias Temperature Instability (NBTI) effect that combines degradation and recovery for dynamic operation of an integrated circuit (IC), comprising: specifying one or more parameters for a degradation model for the IC during a stressed portion of a voltage cycle; specifying one or more parameters for a recovery model for the IC during an unstressed portion of the voltage cycle by extracting the one or more recovery-model parameters from measurements for the IC under unstressed conditions for a range of voltage bias values, a range of temperature values, and a range of IC geometric values; determining, by using a computer, a degradation value for the voltage cycle from the degradation model; determining, by using the computer, a recovery value for the voltage cycle from the recovery model that includes the extracted one or more recovery-model parameters by evaluating the recovery model at an operational setting that includes a first voltage bias value, a first temperature value and a first IC geometric value; determining an NTBI value that combines the degradation value and the recovery value for the voltage cycle; and saving the NBTI value in the computer's memory.