Patent ID: 7533375

Claim:
A program parallelization device including a processor comprising: a control/data flow analysis unit which analyzes the control flow and the data flow of a sequential processing program; a fork point candidate determination unit which determines the fork point candidates of the sequential processing program by referring to the results of the analysis of the control flow and the data flow by said control/data flow analysis unit; a parallel execution performance evaluation unit which evaluates, with respect to an input data, a parallel execution performance when the sequential processing program has been parallelized by a test combination of fork point candidates that were given; a best fork point candidate combination determination unit which generates a test combination of the fork point candidates that were determined by said fork point candidate determination unit, provides the test combination to said parallel execution performance evaluation unit, and by taking the parallel execution performance of the test fork point candidate combination evaluated thereby as the reference, determines the best fork point candidate combination; and a parallelized program output unit which generates and outputs a parallelized program by inserting a fork command at each fork point candidate of the best combination determined by said best fork point candidate combination determination unit, wherein the program parallelization device transforms the sequential processing program into the parallelized program.