Patent ID: 8762900

Claim:
A method for making a mask for an integrated circuit (IC) design, the method comprising: receiving an IC design layout, the IC design layout including: an IC feature with a first outer boundary, and first target points assigned to the first outer boundary; generating, using a computing system, a second outer boundary for the IC feature; moving all the first target points to the second outer boundary to form a modified IC design layout; and providing the modified IC design layout for fabrication of the mask, wherein the second outer boundary is generated by applying convolution of the IC design layout with a predetermined function, and wherein the predetermined function includes a Sinc function in a form of [sin 2 (x/σ)/(x/σ) 2 ]×[sin 2 (y/σ)/(y/σ) 2 ], where x and y are positions in an x direction and a y direction, respectively, and σ is a resolution blur size of an exposure system.