Patent ID: 8468532

Claim:
A computer-implemented method in an information handling system comprising a plurality of heterogeneous processors, wherein the plurality of heterogeneous processors includes one or more processors of a first processor type, wherein the first processor type is based on a first instruction set architecture (ISA), and one or more processors of a second processor type, wherein the second processor type is based on a second ISA that is different from the first ISA, the method comprising: receiving a performance selection from a user, wherein the performance selection indicates the first processor type as a processor type to monitor; selecting one or more first processors based upon the received performance selection, wherein the first processors are of the first processor type; gathering thread performance data corresponding to a first plurality of threads running on the one or more selected first processors; storing the gathered thread performance data corresponding to the first plurality of threads in a storage area; identifying, by a scheduler, a next thread to be scheduled, wherein the next thread is selected from the first plurality of threads; identifying an ISA corresponding to the next thread, wherein the identified ISA is the first ISA; identifying, based on the identified ISA, a central processing unit (CPU) to execute the next thread, wherein the identified CPU is of the first processor type, and wherein the identified CPU is associated with a utilization threshold; determining whether a current utilization threshold for the identified CPU is below the associated utilization threshold for the identified CPU; in response to determining that the current utilization threshold is below the associated utilization threshold for the identified CPU, analyzing thread performance data gathered for the next thread, wherein the analyzing includes reading the thread performance data for the next thread from the stored thread performance data for the first plurality of threads; and based on the analyzing, adjusting an amount of CPU time allocated to the next thread, the adjusting including modifying a priority value corresponding to the next thread.