Patent ID: 8349717

Claim:
A method of making a lateral DMOS semiconductor device having a drift region comprising: providing a semiconductor substrate of a first conductivity type; producing a buried well of a second conductivity type in said semiconductor substrate; producing a shallow buried layer of a first conductivity type inside said buried well; producing a source laterally spaced from a drain; producing a drift region with pillars of alternating conductivity between the source and the drain; providing at least one junction field effect transistor proximate the drain; producing, an epitaxial layer of a second conductivity type on said buried well; etching spaced, parallel trenches in said epitaxial layer and buried well; wherein the width of said trenches is equal or less than the width of the width of the regions between said etched trenches; and at least partially filling said trenches with material of said first conductivity type, resulting in alternating pillars of said first and second conductivity type.