Patent ID: 7749838

Claim:
A fabricating method of a super-silicon-rich oxide (SSRO) non-volatile memory cell, comprising: forming a source/drain in a substrate; forming a tunneling dielectric layer on the substrate; implementing a plasma enhanced chemical vapor deposition (PECVD) process to form a SSRO layer serving as a charge trapping layer on the tunneling dielectric layer, wherein a reactive gas which is flowed during the implementation of the PECVD process comprises N 2 O and SiH 4 having a flow ratio between 0.5 and 1 and a refractive index at 248 nm wave length of the SSRO layer ranges from 1.7 to 2 and a method of forming the SSRO layer comprises: forming a silicon oxide layer on the tunneling dielectric layer; and forming a plurality of cluster of silicon atoms in the silicon oxide layer; forming an upper-dielectric layer on the SSRO layer; and forming a gate conductive layer on the upper-dielectric layer.