Patent ID: 7340023

Claim:
A circuit comprising: a pin onto which a frame of an incoming asynchronous serial signal is received, the frame including a plurality of bits, the plurality of bits including a start bit, a number of data bits, and at least one stop bit; a receiver having an input lead that is coupled to the pin; an auto-baud detector/generator that has an input lead that is coupled to the pin, the auto-baud detector/generator counting a number A of reference clocks during a time that a number N of the plurality of bits is being received onto the pin, wherein N is greater than one, wherein the reference clocks are reference clocks of a reference clock signal, wherein each cycle of the reference clock signal has a reference clock period T, the auto-baud detector/generator dividing the number A by the number N and obtaining a baud rate value C and a remainder value R, the auto-baud detector/generator using the baud rate value C and the remainder value R to generate an output clock signal, the output clock signal comprising the number N of bit periods, each bit period having a duration of either a first duration or a second duration, wherein the first duration is a time substantially equal to the reference clock period T times the baud rate value C, wherein the second duration is a time substantially equal to the reference clock period T times the baud rate value C plus one, wherein there are approximately R bit periods of the second duration in the N bit periods, and wherein the bit periods of the second duration are spread over the N bit periods; and a transmitter that has an output lead that is coupled to the pin, the transmitter receiving the output clock signal from the auto-baud detector/generator and using the output clock signal to supply an outgoing asynchronous serial signal onto the pin.