Patent ID: 8829593

Claim:
A semiconductor memory device comprising: a semiconductor substrate; a first select transistor formed on the semiconductor substrate; memory cell transistors stacked on the first select transistor and connected in series; and a second select transistor formed on the memory cell transistors, wherein the memory cell transistors include: a tapered semiconductor pillar which increases in diameter from a first side of the semiconductor pillar near the first select transistor toward a second side of the semiconductor pillar near the second select transistor, a tunnel dielectric film formed on a side surface of the semiconductor pillar, a charge storage layer formed on a side surface of the tunnel dielectric film and including a silicon nitrogen-containing film which increases in a composition ratio of silicon from a first side of the silicon nitrogen-containing film near the first select transistor toward a second side of the silicon nitrogen-containing film near the second select transistor, and contains a silicon nitride film as a main component, a block dielectric film formed on a side surface of the charge storage layer, and conductor films which are formed on a side surface of the block dielectric film and which serve as gate electrodes.