Patent ID: 7394831

Claim:
A time-division bit-interleave multiplexing method comprising: (a) a step of generating a plurality of first signals and a plurality of second signals to set in a second area of a low speed frame different from a first area of said low speed frame used for frame synchronization, and said second area of said low speed frame not used for frame synchronization; (b) a step of generating low speed frames accommodating low speed signals of plural channels including said first and second signals and transmission signals; (c) a step of converting said first and second signals in said second area of each channel into either of “1/0” alternating signals, said “1/0” alternating signals being repeated patterns of bits “10”, and “0/1” alternating signals, said “0/1” alternating signals being repeated patterns of bits “01”; and (d) a step of time-division bit-interleave multiplexing said low speed frames accommodating said low speed signals after said step (c), thereby producing a high speed frame accommodating high speed signals; wherein main reiteration pattern of a pattern concatenated by a first reiteration pattern of a bit ‘1’ or a bit ‘0,’ a reiteration number of times of the first reiteration pattern being a number of the plurality of channels, and a second reiteration pattern of a bit ‘0’ or a bit ‘1,’ the reiteration number of times of the second reiteration pattern being the number of the plurality of channels, is mapped to a third area of said high speed frame by bit-interleave, and a mark rate in said third area becomes 50%.