Patent ID: 7026850

Claim:
A vernier for delaying an input main signal with an adjustable delay, the vernier having an input terminal for receiving said input main signal and output terminal at which a delayed output signal is provided, wherein the vernier comprises: a first tapped delay line for delaying the input main signal by an adjustable delay time to produce a plurality of first tapped signals, the delay between said tapped signals being adjusted by the magnitude of a BIAS signal, said first tapped delay line comprising N delays connected to a first multiplexer for selecting one of the plurality of said tapped delayed signals in response to a control input signal, to provide said delayed output signal, an auxiliary second tapped delay line, for delaying a periodic reference signal by an adjustable delay time which is adjusted by the BIAS signal and is equal substantially to a period value or an integer number of period values of the reference signal, to produce a delayed reference signal, and a feedback loop for producing said BIAS signal with a magnitude depending on a phase difference between said input reference signal and a delayed reference signal, so as to compensate for the temperature and supply voltage variations in said vernier, wherein the feedback loop comprises a phase detector, wherein the feedback loop further comprises a low pass filter.