Patent ID: 8711862

Claim:
A system, comprising: a processor that receives content and tracks the content reception and playback while buffering the content to allow pausing of the content playback without interrupting reception of the content, and wherein the processor is a packet processor connected to at least one tuner, the processor configured for processing and transmitting audio and video data packets received from the tuner to a plurality of receivers, the processor comprising: an input component including an incoming timestamp counter for providing a time-based marker value to mark when each incoming packet arrives from the tuner and an outgoing timestamp counter for providing a time-based marker value for each outgoing packet to the receivers, the outgoing counter configured for controlling when to release each outgoing packet; and at least one memory device for storing each received packet, wherein the input component is configured to stop the outgoing counter from incrementing in response to an activation of a pause signal for a duration of the pause mode and provides a count number representative of the pause duration.