Patent ID: 8912103

Claim:
A method of fabricating a nanoimprint lithography template, comprising: fabricating a first nanoimprint lithography template having a plurality of chip areas; forming a plurality of pattern areas corresponding to the plurality of chip areas on a semiconductor wafer using the first nanoimprint lithography template; determining a deviation of a layout of the pattern areas from a desired layout of the pattern area; and fabricating a second nanoimprint lithography template that corrects the deviation, wherein fabricating the second nanoimprint lithography template that corrects the deviation comprises: installing a reticle on a reticle stage of scanning lithography equipment having a light source, the reticle stage, and a template stage; mounting a template substrate on the template stage; and exposing regions on the template substrate with light emitted by the light source in a scanning process performed by the scanning lithography equipment, characterized in that at least one part of the scanning lithography equipment is inclined such that a line passing through a center of light exposing each of the regions, respectively, in a first direction in which the light propagates towards the template substrate is incident on the exposure region at an oblique angle.