Patent ID: 7471126

Claim:
A phase locked loop, comprising: a phase-frequency detector, receiving and detecting a phase difference between a reference clock signal and a feedback clock signal, and outputting a phase detection signal corresponding to the phase difference; a controller, receiving the phase detection signal, determining a folded period and an integer unfolding divisor according the phase detection signal and a basic period range, and outputting a first control signal corresponding to the folded period and a second control signal corresponding to the integer unfolding divisor, wherein the basic period range comprises a plurality of sub-periods, and the folded period is one of the sub-periods; an oscillator, receiving the first control signal and outputting a first output clock signal with a period equal to the folded period; and a first loop divider, receiving the second control signal and the first output clock signal, dividing the frequency of the first output clock signal by the integer unfolding divisor corresponding to the second control signal and outputting a second output clock signal, wherein the feedback clock signal is provided according to the second output clock signal.