Patent ID: 8893137

Claim:
A machine-readable medium comprising instructions for thread recovery in a multi-threaded environment with at least one thread operating on memory shared with at least one other thread, the instructions when executed on a computing device, cause the computing device to: execute a thread, wherein the thread is configured to: access a multi-stage critical section, the multi-stage critical section having a first and second stage, the first stage to store in a staging area a plurality of operations to be executed in the memory shared with at least one other thread, and the second stage to execute the operations from the staging area; determine whether the staging area includes an indication of successfully completing the first stage; execute the operations when there is an indication of successfully completing the first stage; and reset the staging area when there is no indication of successfully completing the first stage to ensure no stale entries exist before it is used; wherein the instructions to access the multi-stage critical section comprise instructions to: read a reference to the staging area from a memory location; and dereference the reference to access the staging area.