Patent ID: 8129292

Claim:
A method for producing an integrated circuit arrangement, the method comprising: doping an anode region in accordance with a p doping type, wherein the anode region is located in a substrate; doping a cathode region in accordance with a n doping type, wherein the anode region is located in a substrate, and wherein the cathode region is spaced apart from the anode region; doping an n-type inner region in accordance with a n doping type and with a lower dopant concentration in comparison with the anode region, wherein the n-type inner region adjoins the anode region in the substrate; doping a p-type inner region in accordance with a p doping type and with a lower dopant concentration in comparison with the cathode region, wherein the p-type inner region adjoins the cathode region and the n-type inner region in the substrate; and doping a p-type well containing a maximum dopant concentration along a first path running counter to the direction of the normal to a surface of the substrate and through or at the cathode region down to a depth at which the maximum dopant concentration of the p-type well is situated, wherein the maximum dopant concentration of the p-type inner region remains below the maximum p-type dopant concentration of the p-type well, wherein doping the p-type well further comprises: shielding the p-type inner region during the doping of the p-type well.