Patent ID: 7800151

Claim:
A semiconductor integrated circuit comprising: a decoupling capacitance circuit; a first output terminal; a second output terminal; a first power supply wiring; and a second power supply wiring, wherein the decoupling capacitance circuit comprises: a TDDB control circuit comprising a first transistor and a second transistor; and a third transistor, wherein the first transistor and the second transistor are different in conductivity type thereof from each other, a source of the first transistor is connected to the first power supply wiring, and a drain of the first transistor is connected to a gate of the second transistor, a source of the second transistor is connected to the second power supply wiring, and a drain of the second transistor is connected to a gate of the first transistor, a conductivity type of the third transistor is the same as that of the first transistor, a source and a drain of the third transistor are connected to the first power supply wiring, and a gate of the third transistor is connected to the drain of the second transistor, the first output terminal is connected to the drain of the first transistor, the second output terminal is connected to the drain of the second transistor, the first power supply wiring is a high-voltage power supply wiring, and a decoupling capacitance cell and an input terminal are further provided, the decoupling capacitance cell comprises a transistor of the P-channel type, a source and a drain of the transistor of the P-channel type are connected to the first power supply wiring, and a gate of the transistor of the P-channel type is connected to the input terminal, and the input terminal is connected to the second output terminal through an inter-cell wiring.