Patent ID: 8669802

Claim:
A wide range level shift system, comprising: a first NMOS transistor, having a gate connected to an input terminal for receiving an input signal, and a source connected to a first voltage level, in which the input signal has the first voltage level and a second voltage level; a first PMOS transistor, having a gate connected to the input terminal for receiving the input signal, and a source connected to the second voltage level; a second PMOS transistor, having a drain connected to a drain of the first NMOS transistor, and a source connected to a third voltage level; a second NMOS transistor, having a drain connected to a drain of the first PMOS transistor, and a source connected to a fourth voltage level; a third PMOS transistor, having a gate connected to the drain of the second PMOS transistor, a source connected to the third voltage level, and a drain connected to the gate of the second PMOS transistor; an impedance circuit, having a first terminal connected to the drain of the third PMOS transistor; and a third NMOS transistor, having a gate connected to the drain of the second NMOS transistor, a source connected to the fourth voltage level, and a drain connected to the gate of the second PMOS transistor and also connected to a second terminal of the impedance circuit.