Patent ID: 7936363

Claim:
A data receiver circuit comprising: a differential pair including first and second transistors with first and second inputs for differentially receiving an input signal; a first converter circuit that receives a first current signal output from a first output of said differential pair and outputs a third current signal; a second converter circuit that receives a second current signal output from a second output of said differential pair and outputs a fourth current signal; a first current mirror circuit that receives the third current signal from said first converter circuit, and outputs a mirror current of the third current signal; a second current mirror circuit that receives the fourth current signal from said second converter circuit, and outputs a mirror current of the fourth current signal; a third current mirror circuit that receives the output current of said first current mirror circuit, and outputs a mirror current of the output current; and a current supply circuit that receives a bias signal, and supplies a current to each of an input side transistor of said first current mirror circuit and an input side transistor of said second current mirror circuit; a connection node between an output terminal of said second current mirror circuit and an output terminal of said third current mirror circuit being connected to an output terminal of said data receiver circuit.