Patent ID: 8013682

Claim:
A frequency synthesizer, comprising: a phase comparator circuit that compares the phases of a reference clock and feedback clock; a low-pass filter that smoothes an output signal of said phase comparator circuit and generates a control voltage signal; a voltage-controlled oscillator that includes a first variable capacitance diode whose DC bias voltage is controlled by said control voltage signal and a compensation variable capacitance diode; a feedback circuit that generates said feedback clock from an output signal of said voltage-controlled oscillator; a monitor circuit that monitors said control voltage signal, outputs a control signal for said compensation variable capacitance diode, and changes the voltage levels of said control signal upon the voltage level of said control voltage signal being out of a predetermined voltage range; a time constant circuit that, upon the voltage level of said control signal changes, supplies a DC bias voltage to said compensation variable capacitance diode, slowing down the voltage change so that a locked state that said frequency synthesizer is in not being canceled; and a lock detection circuit and a lock cancellation signal output inhibiting circuit that inhibits said lock detection circuit from outputting a lock cancellation signal upon said monitor circuit detecting that said control voltage signal has gone out of said predetermined voltage range.