Patent ID: 7189622

Claim:
A method for fabricating a semiconductor device, comprising the steps of: (a) etching a predetermined region of a semiconductor substrate, wherein the predetermined region includes a storage node contact region and a portion of a gate region adjacent thereto; (b) sequentially forming a lower pad oxide film, a lower pad nitride film, an upper pad oxide film and an upper pad nitride film on the semiconductor substrate; (c) etching a predetermined region of the upper pad nitride film, the upper pad oxide film, the lower pad nitride film, the lower pad oxide film and the semiconductor substrate to form a trench defining an active region; (d) depositing a HDP oxide film filling up the trench; (e) subjecting the HDP oxide film to a CMP process to expose the upper pad nitride film; (f) removing the upper pad nitride film, the upper pad oxide film, the lower pad nitride film and the lower pad oxide film; and (g) depositing and patterning a gate oxide film, a gate polysilicon layer, a gate silicide layer and a hard mask nitride film to form a gate.