Patent ID: 8787034

Claim:
A system, comprising: a microelectronic assembly which includes a set of terminals and a microelectronic element having a memory storage array having a given number of storage locations, the microelectronic element of the assembly having inputs connected with the terminals for receiving command and address information specifying one of the storage locations; and a component for connection with the microelectronic assembly, the component including: a support structure bearing a set of conductors configured to carry the command and address information; and a plurality of contacts coupled to the set of conductors, the contacts electrically connected with corresponding ones of the terminals of the microelectronic assembly, wherein the contacts have address and command information assignments arranged in (a) a first predetermined arrangement for connection with a first type of the microelectronic assembly in which the microelectronic element is configured to sample the command and address information coupled thereto through the contacts at a first sampling rate, the contacts having a first number thereof, and in (b) a second predetermined arrangement for connection with a second type of the microelectronic assembly in which the microelectronic element is configured to sample the command and address information coupled thereto through a subset of the contacts including a second number of the contacts at a second sampling rate being greater than the first sampling rate, the subset including some contacts occupying identical positions with the contacts that are assigned to the first predetermined arrangement, the second number being fewer than the first number.