Patent ID: 7050034

Claim:
A display apparatus comprising: a panel having gate lines in a form of rows, signal lines in a form of columns, and pixels arranged in a matrix manner at intersections of the gate lines and the signal lines; a vertical driving circuit connected to the gate lines for sequentially selecting a row of the pixels; a horizontal driving circuit connected to the signal lines for operating on the basis of a clock signal having a predetermined cycle and sequentially writing a video signal to the pixels of the selected row; and first clock generating means for generating a first clock signal serving as a basis for the operation of the horizontal driving circuit, and second clock generating means for generating a second clock signal having a same cycle as, but having a lower duty ratio than, the first clock signal; wherein a pulse width of the second clock signal is narrower than a pulse width of the first clock signal, and wherein said horizontal driving circuit comprises: a shift register for receiving said first clock signal and a start pulse and performing shift operation in synchronism with said first clock signal and sequentially outputting a shift pulse from each shift stage thereof; a first switch group for extracting a pulse to serve as a sampling pulse from said second clock signal in response to said shift pulse; and a second switch group for sequentially sampling the input video signal in response to said sampling pulse, and supplying the sampled video signal to each of the signal lines; and wherein said first clock generating means is disposed external to the panel and supplies the horizontal driving circuit with the first clock signal; and said second clock generating means is disposed within the panel and supplies the horizontal driving circuit with the second clock signal.