Patent ID: 6955929

Claim:
A method of measuring a gate channel length of a metal-oxide semiconductor transistor (MOS transistor) on a silicon substrate comprising: forming a first MOS transistor, the first MOS transistor comprising a first gate with a known channel length and a known channel width, within a first region on a surface of the silicon substrate; forming a second MOS transistor, the second MOS transistor comprising a second gate with an unknown channel length and a known channel width, within a second region on the surface of the silicon substrate; applying a predetermined voltage on both the first gate and the second gate; measuring a first inverse gate leakage current of the first MOS transistor and a second inverse gate leakage current of the second MOS transistor; and using the first inverse gate leakage current, the second inverse gate leakage current, the channel widths of the first and the second gates, the channel length of the first gate and an equation to obtain the channel length of the second gate.