Patent ID: 7667199

Claim:
A method of operating an imaging system that includes a field programmable gate array comprises: implementing on the field programmable gate array: an n-phase clock having a frequency of operation, wherein the clock is selectable to provide n-clock signals that each vary at the frequency, wherein n is greater than one; an n-phase counter including n counter elements coupled to the clock, wherein a first counter element receives a first clock signal and in response provides at least a first count signal that varies at the frequency, and wherein a second counter element receives a second clock signal, and in response provides a second count signal; an n-phase status detection circuit including n pulse reject filters, each pulse reject filter coupled to the n-phase clock, wherein each of the pulse reject filters receives the first clock signal and an event detection signal and in response generates a flag indicative of whether the event detection signal is active for a predetermined time, the flags being used to generate respective n valid event detection signals; and an n-phase output circuit including n-registers coupled to the n-phase clock, the n-phase counter and the n-phase status detection circuit, wherein n- registers respectively receive the n-clock signals, the n-count signals, and the n valid event detection signals, and in response respectively provide n-output signals that collectively form an overall output signal indicative of a time at which at least one of the n valid event detection signals is detected.