Patent ID: 7145920

Claim:
An SDH or SONET transmission apparatus, comprising: a plurality of interface units ( 2 ) for accommodating main signal frames including channel data of a plurality of channels and compliant with an SDH transmission system; and a main signal processing unit ( 3 A) accommodating said interface units ( 2 ) for performing predetermined main signal processing for the main signal frames; that said main signal processing unit ( 3 A) includes a frame timing production section ( 32 - 9 ) for producing an intra-apparatus reference frame timing based on an intra-apparatus reference clock; a frame timing distribution section ( 32 - 9 ) for distributing the intra-apparatus reference frame timing produced by said frame timing production section to said interface units; and a main signal timing re-clocking section ( 32 - 2 ) for synchronizing frame timings of the main signal frames with the intra-frame reference frame timing using a main signal memory section ( 32 A) for temporarily storing the main signal frames; and that each of said interface units ( 2 ) includes a main signal signaling processing section ( 21 ) for performing signaling a main signal frame to said main signal processing unit based on the intra-apparatus reference frame timing distributed from said frame timing distribution section ( 32 - 9 ) of said main signal processing unit.