Patent ID: 8884354

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate; an element isolation insulating film buried in the semiconductor substrate so as to isolate adjacent element; a memory cell having a layered structure in which a first insulating film and a charge accumulation film are sequentially layered on the semiconductor substrate; a second insulating film formed on the charge accumulation film and the element isolation insulating film and directly contacting an upper surface of the charge accumulation film; and a control electrode film formed on the second insulating film, wherein an upper surface of the element isolation insulating film is lower than the upper surface of the charge accumulation film; a side surface of the charge accumulation film contacts the element isolation insulating film and contacts a third insulating film disposed on the upper surface of the element isolation insulating film; and the second insulating film includes a cell upper portion on the charge accumulation film and an inter-cell portion above the element isolation insulating film, and a dielectric constant of the cell upper portion of the second insulating film is lower than a dielectric constant of the third insulating film.