Patent ID: 8471339

Claim:
A semiconductor device, comprising: a semiconductor substrate; a device isolation pattern defining an active portion in the semiconductor substrate, the active portion having first and second sidewall surfaces each extending in a first direction, the first and second sidewall surfaces being in face to face contact with surfaces of the device isolation pattern at opposite ends of the active portion, respectively; and a gate pattern extending in a second direction, perpendicular to the first direction, over and across the first and second sidewall surfaces of the active portion so as to also overlap the device isolation pattern; and wherein the active portion of the substrate comprises a first source/drain region and a first barrier region disposed to one side of the gate pattern, the first barrier region is interposed, in the second direction, between the first source/drain region and part of the device isolation pattern that contacts the first sidewall surface; and the first barrier region is a doped region of a first conductivity type and the first source/drain region is a doped region of a second conductivity type opposite the first conductivity type.