Patent ID: 7172853

Claim:
A method of manufacturing semiconductor integrated circuit devices, comprising the steps of: (a) forming a photoresist film on a main surface of a wafer; (b) mounting the wafer provided with the photoresist film on a wafer stage of an exposure apparatus; (c) exposing a first phase shift mask pattern having phase errors or random defects on a first region of the main surface of the wafer mounted on the wafer stage by reduction projection exposure using ultraviolet light; and (d) after the step (c), exposing a second phase shift mask pattern formed over the same main surface of the same wafer as the first phase shift mask pattern, on the first region of the main surface of the wafer mounted on the wafer stage by reduction projection exposure using ultraviolet, the second phase shift mask pattern having phase errors or random defects; wherein the first phase shift mask pattern has a first layout pattern comprising a plurality of hole patterns and a hole pattern surrounded by auxiliary patterns, wherein the second phase shift mask pattern has a second layout pattern comprising a plurality of hole patterns and a hole pattern surrounded by auxiliary patterns, wherein the first layout pattern is the same as the second layout pattern, and wherein a phase of the light passing through all of the hole patterns of the first layout pattern is inverted from a phase of the light passing through all of the hole patterns of the second layout pattern corresponding to the hole pattern of the first layout pattern.