Patent ID: 8508704

Claim:
A pixel array, comprising: a plurality of scan lines; a plurality of data lines intersected with the scan lines to define a plurality of sub-pixel regions; and a plurality of sub-pixels disposed in the sub-pixel regions, wherein each of the sub-pixels is electrically connected to one of the scan lines and one of the data lines correspondingly, and each of the sub-pixels arranged in the n th row comprises: a first switch; a second switch, wherein the first switch and the second switch are electrically connected the n th scan line and the m th data line, and the first switch has a signal output terminal; a first pixel electrode electrically connected to the first switch; a second pixel electrode electrically connected the second switch and having an opening for accommodating the first pixel electrode, wherein the first pixel electrode is surrounded by the second pixel electrode in each of the sub-pixels, and each second pixel electrode comprises: a first sub-electrode portion; a second sub-electrode portion; and at least one connection line connected to the first sub-electrode portion and the second sub-electrode portion, wherein in each of the sub-pixels, the first pixel electrode is disposed between the first sub-electrode portion and the second sub-electrode portion, and the first pixel electrode is surrounded by the first sub-electrode portion, the second sub-electrode portion and the connection line; a plurality of first common lines disposed under the first sub-electrode portions and the first pixel electrodes; a plurality of second common lines disposed under the second sub-electrode portions; and a third switch electrically connected to the (n+1) th scan line and the second pixel electrode and having a floating terminal.