Patent ID: 8334580

Claim:
A semiconductor device comprising: a semiconductor chip including a power amplifier circuit, a semiconductor substrate, wherein the semiconductor chip is disposed over the semiconductor substrate and has: (a) a transistor constituting the power amplifier circuit disposed over the semiconductor substrate; wherein the transistor comprises: (a1) a plurality of drain wires coupled to a drain region of the transistor; and (a2) a plurality of source wires coupled to a source region of the transistor, wherein the drain wires and source wires extend in a predetermined direction, and the drain wires and the source wires are arranged by turns in parallel to each other; and (b) a directional coupler disposed over the semiconductor substrate and that detects power output from the power amplifier circuit; wherein the directional coupler includes: (b1) a main line using one of the drain wires of the transistor; and (b2) a sub-line, adjacent to the main line, having a first terminal and a second terminal, the first terminal of which is electrically coupled with a detector circuit that converts an output from the directional coupler into a voltage or current and the second terminal is electrically coupled with a GND via a passive element; and wherein the main line and the sub-line are arranged in parallel to each other and no conductor exists between the main line and the sub-line, wherein the main line and the sub-line are disposed in a same horizontal plane of a wire layer, wherein the power amplifier circuit and the directional coupler are disposed integrally in the semiconductor chip, and wherein the sub-line is disposed in a region in place of a part of one of the source wires coupled to the transistor.