Patent ID: 7571371

Claim:
A method for remedying data corruption in a first circuit, said first circuit representing one of a content addressable memory (CAM) and a ternary content addressable memory (TCAM), said first circuit having a plurality of word compare circuits, each of said plurality of word compare circuits having a set of combined stored data bits that includes a set of stored data bits and an extra parity bit, comprising: programming a first extra parity bit associated with a first word compare circuit of said plurality of word compare circuits to cause a first combined stored data bit pattern that includes a first set of stored data bits of said first word compare circuit and said first extra parity bit to conform to a parity checking policy; performing a parity check on said first combined stored data bit pattern during a comparison cycle of said first circuit; and generating an error signal if a result of said parity check on said first combined stored data bit pattern fails said parity checking policy.