Patent ID: 8509373

Claim:
An apparatus comprising: a pre-divider which generates a reference clock signal by dividing an external clock signal; a phase frequency detector which detects frequency and phase differences between the reference clock signal and a comparison clock signal and outputs the detected frequency and phase differences as error signals; a charge pump which outputs current in accordance with the error signals; a loop filter which outputs a controlled voltage corresponding to the current received from the charge pump; a modulation controller which generates a modulation magnitude in accordance with a modulation control signal; a modulator which modulates the controlled voltage in accordance with the modulation magnitude; a voltage controlled oscillator which outputs an oscillation clock signal having a frequency oscillated in accordance with the modulated controlled voltage as a spectrum-spread version of the external clock signal; a feedback divider which generates the comparison clock signal by dividing the oscillation clock signal; a demodulation controller which generates a demodulation magnitude for use in compensating for the modulation magnitude; and a demodulator which compensates for the modulation of the controlled voltage output from the loop filter in accordance with the demodulation magnitude.