Patent ID: 7791416

Claim:
A PLL circuit comprising a voltage controlled oscillator oscillating a frequency corresponding to a control voltage, a reference frequency oscillator oscillating a constant frequency, a phase comparator comparing the output frequency of the reference frequency oscillator with the output frequency of the voltage controlled oscillator and outputting a phase difference, and a loop filter generating the control voltage on the basis of the phase difference, wherein loop gain varying means for varying a loop gain of the PLL circuit is disposed at an output stage of the phase comparator, wherein the loop gain varying means includes a first register storing a first parameter for adjusting a loop gain and a first multiplier multiplying the first parameter output from the first register by the output of the phase comparator, and wherein the PLL circuit further includes a controller setting the first parameter to compensate for an individual difference of the PLL circuit depending on a temperature in the first register on the basis of a device state and a use condition.