Patent ID: 8595667

Claim:
A computer-implemented method for processing an electronic circuit design, said computer-implemented method comprising: accessing, utilizing a computer, data which represents said electronic circuit design; identifying a via metallization feature on a tab metallization feature, wherein the tab metallization feature extends laterally from at least one bus interconnect metallization feature of said electronic circuit design utilizing said data which represents said electronic circuit design; and evaluating a spacing design rule check on said via metallization feature of said electronic circuit design utilizing an area occupied by said at least one interconnect metallization feature, wherein: the area is defined by multiplying a lesser of an actual length or threshold length of the bus interconnect metallization feature with a width of the at least one bus interconnect metallization feature; and the threshold length is a length at which a probability of vacancies originating in the bus metallization feature will migrate to the via metallization feature is below an acceptable threshold.