Patent ID: 6927129

Claim:
A method of manufacturing a semiconductor device comprising: a) depositing a first layer over a periphery transistor comprising a gate stack, a drain side sidewall and a source side sidewall and over a core transistor comprising a gate stack, a source side sidewall and a drain side sidewall; b) etching said first layer wherein a portion of said first layer remains on said source side sidewall and on said drain side sidewall of said periphery transistor and on said source side sidewall and on said drain side sidewall of said core transistor; c) etching said first layer from said source side sidewall of said core transistor while preserving said first layer on said drain side sidewall of said core transistor; d) depositing a second layer over said periphery transistor and said core transistor; and e) etching said second layer wherein a portion of said second layer remains on said first layer formed on said source side sidewall and on said drain side sidewall of said periphery transistor and wherein said second layer remains on said source side sidewall and on said drain side sidewall of said core transistor.