Patent ID: 8481392

Claim:
A method of fabricating a semiconductor device, comprising: forming a gate electrode on a substrate; sequentially forming a first buffer layer, a second buffer layer and a third buffer layer on side surfaces of the gate electrode and on the substrate near the gate electrode, the third buffer layer being a material layer having a higher dielectric constant than the second buffer layer; forming a first spacer covering the side surfaces of the gate electrode on the third buffer layer, the third buffer layer on the substrate near the gate electrode being exposed; exposing the second buffer layer on the substrate by removing the exposed third buffer layer; exposing the first buffer layer on the substrate by removing the exposed second buffer layer; forming a deep junction in the substrate using the first spacer as an ion implantation mask; and removing the first spacer, wherein the first buffer layer remains over the deep junction when removing the first spacer, and the first spacer includes a material layer different than the third buffer layer, the second buffer layer, and the first buffer layer.