Patent ID: 8900931

Claim:
A method of flip chip semiconductor component packaging, the method comprising: providing a die having a first surface; forming a dielectric barrier on the first surface of the die, the dielectric barrier at least partially surrounding a designated location on the first surface of the die; forming a plurality of bumps on the first surface of the die, the plurality of bumps being located on an opposite side of the dielectric barrier from the designated location; bonding the die to a substrate in a flip chip configuration, the substrate including a plurality of bonding pads on a second surface of the substrate, and bonding the die to the substrate is achieved by connecting the plurality of bumps to the plurality of bonding pads, the bonding causing contact between the dielectric barrier and the substrate to provide a cavity defined by the first surface of the die, the dielectric barrier and the substrate, the cavity being proximate the designated location on the first surface of the die; and overmolding the die and at least a portion of the substrate using a molding compound to create the flip chip semiconductor component packaging that encapsulates the die and the portion of the substrate, the molding compound thereby also underfilling a portion of the die, flow of the molding compound being blocked by the dielectric barrier which prevents the molding compound from entering the cavity.