Patent ID: 8670557

Claim:
A system, comprising: a host hardware processor; a memory communicatively coupled to the processor, the memory having stored therein computer-executable instructions configured to implement: a cryptographic component that facilitates encryption and decryption of a data; a randomized exponentiation component embedded in the cryptographic component, the randomized exponentiation component is configured to: generate a first random number that corresponds to a bit number associated with an exponent associated with the data; divide the exponent associated with data into two vectors, a first subexponent and a second subexponent, based on the first random number; exponentiate the first subexponent associated with the exponent based on a first type of exponentiation algorithm; initiate values for a second type of exponentiation based on an intermediate value related to the first type of exponentiation; exponentiate the second subexponent associated with the exponent based on a second type of exponentiation algorithm; generate a second random number; alternate between: execution of the first type of exponentiation for a number of iterations equal to the second random number and storing of the partial result related to the first type of exponentiation; execution of the second type of exponentiation for a number of iterations equal to the second random number and storing a partial result related to the second type of exponentiation; generate a final result by combining the partial result related to the first type of exponentiation and the partial result related to the second type of exponentiation; and secure the data in accordance with a cryptographic protocol based on at least one of an exponentiation or an elliptic curve point multiplication associated with the data through use of an exponent.