Patent ID: 8179827

Claim:
A data processing apparatus comprising: at least one data input for receiving radio signals as data, a processor configured to process data, wherein the processor is coupled to a power supply during a quiescent condition and comprises at least one input, a data supply suppression unit connected between the data input and the at least one input, and configured to suppress or permit supplying of data from the data input to the at least one input, a control unit coupled to the data supply suppression unit and configured to permit supply of data to the processor during predetermined timeslots and suppress data otherwise by producing a control signal representing at least one operating condition or the quiescent condition for the processor, the at least one operating condition or the quiescent condition for the processor depending on transmission conditions, and the data supply suppression unit is configured to suppress the supplying of data from the data input to the at least one input when the control signal represents the quiescent condition for the processor, at least one second processor configured to process data, said at least one second processor comprising a second input, and a second data supply suppression unit connected between the data input and the second input and coupled to the control unit, wherein the control unit is configured to permit supply of data to the second processor during predetermined timeslots and suppress data otherwise by producing at least one second control signal representing at least one operating condition or a quiescent condition for the second processor, the at least one operating condition or quiescent condition for the second processor depending on transmission conditions, the second data supply suppression unit configured to suppress the supplying of the data from the data input to the second input when the control signal represents a quiescent condition for the second processor, wherein the processor is in the quiescent condition when the second processor is in the at least one operating condition.