Patent ID: 7701261

Claim:
A digital output buffer having an input and an output coupled to a pad for supplying a pad voltage, said digital output buffer comprising: a first controlled output drive circuit having an input coupled to the input of the buffer, an output coupled to the output of the buffer, and providing a first drive capability during a deep saturation region of operation; a second controlled output drive circuit having an input coupled to the input of the buffer, an output coupled to the output of the buffer, and providing a second drive capability during a deep linear region of operation; a third controlled output drive circuit having an input coupled to the input of the buffer, an output coupled to the output of the buffer, and providing a third drive capability during a transition region of operation; and an output impedance of the digital output buffer that is substantially constant across the deep saturation region of operation associated with the first controlled output drive circuit, deep linear region of operation associated with the second controlled output drive circuit and transition region of operation associated with the third controlled output drive circuit as the pad voltage is varied.