Patent ID: 7277542

Claim:
An encryption accelerator arranged to encrypt and decrypt data formed of a plurality of bytes using an RC4 stream cipher, comprising: a combinational logic block arranged to perform a pre-determined logic operation on selected input values; a state memory array coupled to the combinational logic block having a plurality of memory locations wherein the state memory is configured to store a plurality of substitution values associated with the RC4 stream cipher, each substitution value stored in a separate memory location; and a state machine coupled to the combinational logic block and the state memory, the state machine configured to: initialize via hardware an incrementing pattern of substitution values in the state memory, each substitution value stored in a separate memory location, direct a first RC4 shuffling operation using a portion of a key array received from a system memory via an interface external to the encryption accelerator, by which the plurality of substitution values are moved to different memory locations within the state memory, wherein the first RC4 shuffling operation is performed concurrently with the receipt of the portion of the key array, wherein the first RC4 shuffling operation is completely performed within the encryption accelerator, generate a random byte as a result of a second RC4 shuffling operation; byte-wise transfer a portion of the data to the combinational logic block as a first input value, transfer the generated random byte to the combinational logic as a second input value, logically operate on the first and second input values by the combinational logic to form a resulting data byte, and outputting the resulting data byte, wherein the encryption accelerator uses substantially no central processing unit resources to perform the RC4 stream cipher.