Patent ID: 8509369

Claim:
A frequency synthesis system with self-calibrated loop stability and bandwidth, comprising: a detector, producing a detection signal based on a logic level difference between an input signal and a feedback signal; a charge pump, connected to the detector to produce a control signal based on the detection signal; a filter, connected to the charge pump to produce a tuning signal based on the control signal; a controllable oscillator, connected to the filter to produce the output signal based on the tuning signal; a programmable frequency divider, connected to the controllable oscillator to produce the feedback signal based on the output signal; a current mirror circuit, receiving a source current to produce a charge pump reference current to the charge pump; and a compensation circuit, connected to the charge pump to produce a compensation current based on the charge pump reference current for compensating the variation of the damping factor and the bandwidth to reference frequency ratio when the controllable oscillator selectively outputs the output signal; wherein the filter is a discrete time loop filter.