Patent ID: 7391825

Claim:
A comparator circuit having reduced pulse width distortion, the comparator circuit comprising: a differential amplifier operative to receive at least first and second signals and to amplify a difference between the at least first and second signals, the differential amplifier generating a difference signal at an output thereof which is a function of the difference between the at least first and second signals; an output stage for receiving the difference signal and for generating an output signal of the comparator circuit, the output signal being representative of the difference signal, the output stage having a switching point associated therewith; and a voltage source coupled to the output of the differential amplifier and operative to generate a reference signal for establishing a common-mode voltage of the difference signal generated by the differential amplifier, the reference signal being substantially centered about the switching point of the output stage and substantially tracking the switching point over variations in at least one of process, voltage and temperature conditions to which the comparator circuit is subjected.