Patent ID: 7683870

Claim:
A liquid crystal display device comprising: a data line connected to drive a liquid crystal cell; an output driver connected to selectively provide a pixel drive signal to the data line, where the pixel drive signal corresponds to a video data signal provided to the liquid crystal display device; a pre-charging circuit connected to selectively pre-charge the data line to one or more of a plurality of voltage levels depending on the value of the video data signal, wherein the pre-charging circuit comprises: a comparator providing an output signal indicative of whether a digital video data signal has a value at or above or below a predetermined threshold; and a pre-charge controller operating to initially pre-charge a data line of a liquid crystal cell to a charge share voltage, the pre-charge controller further operating to initiate a second pre-charge of the data line with a further pre-charge voltage depending on the output signal of the comparator, wherein the further pre-charge voltage has a magnitude greater than the magnitude of the charge share voltage, and wherein the pre-charge controller comprises: a plurality of input lines for receiving a first source output enable signal, a second source output enable signal having a later phase than the first source output enable signal, and a polarity control signal for controlling a polarity of the data; a demultiplexer which outputs the second source output enable signal to any one of a plurality of output terminals in accordance with an output of the comparator and an output of the polarity control signal; a first transistor responsive to an active state of an output of the demultiplexer or an active state of the first source output enable signal for supplying the charge share voltage to the data line; a second transistor responsive to an output of the demultiplexer for supplying a positive pre-charge voltage if the value of the digital video data signal is at or above the predetermined threshold value and the polarity control signal directs a positive voltage output state; and a third transistor responsive to an output of the demultiplexer for supplying a negative pre-charge voltage to the data line in if the value of the digital video data signal is below the predetermined threshold value and the polarity control signal directs a negative voltage output.