Patent ID: 8866278

Claim:
A semiconductor device, comprising: a generally planar die pad having multiple peripheral edge segments each defining a peripheral edge region, wherein each pair of peripheral edge regions is separated by a corner region, wherein at least one corner region is devoid of a tie bar, a plurality of first lands that are segregated into at least two sets that extend along respective ones of at least two peripheral edge segments of the die pad in spaced relation thereto; a plurality of second lands that are segregated into at least two sets that extend along respective ones of at least two peripheral edge segments of the die pad in spaced relation thereto; a plurality of corner connect bars that are segregated into at least two pairs, each pair extending generally diagonally and substantially within respective ones of the corner regions in spaced and generally parallel side by side relation to each other, each of the corner connect bars defining at least one corner land; a semiconductor die attached to the die pad and electrically connected to the first and second lands and the corner lands of the corner connect bars; and a package body defining a generally planar bottom surface, the package body at least partially encapsulating the first and second lands, the corner connect bars, and the semiconductor die such that at least portions of the first and second lands and the corner lands of the corner connect bars are exposed in and substantially flush with the bottom surface of the package body.