Patent ID: 8642988

Claim:
A non-volatile memory device comprising: a substrate; a first line extending in a first direction, the first direction being parallel to a main surface of the substrate; a stack comprising N+1 layers (where N≧1) of first insulator films and N layers of first semiconductor layers, the first insulator films and the first semiconductor layers being alternately stacked above the first line; a second line formed above the stack and extending in a second direction, the second direction being parallel to the main surface of the substrate and orthogonal to the first direction; a select element provided at a point where the first line and the second line intersect; a second insulator film provided along a side surface of the stack; a channel layer provided along the second insulator film; an adhesion layer provided along the channel layer; and a variable resistance material layer provided along the channel layer with the adhesion layer in-between, wherein the first line and the second line are electrically connected with each other via the select element and the channel layer, and a contact resistance via the adhesion layer between the channel layer and the variable resistance material layer is low, and a resistance of the adhesion layer in a direction in which the channel layer extends is high.