Patent ID: 7432918

Claim:
A video signal processing circuit comprising: a clamp circuit clamping a composite video signal including a copy guard signal which comprises a first predetermined synchronization signal, a brilliant signal and a second predetermined synchronization signal, the first predetermined synchronization signal having the same frequency as a horizontal synchronization signal and the second predetermined synchronization signal having a frequency shorter than the same frequency; a synchronization signal separation circuit separating the first and second predetermined synchronization signals from the composite video signal clamped by the clamp circuit; and a synchronization signal discrimination circuit blocking the second predetermined synchronization signal and allowing the first predetermined synchronization signal to pass, an output signal of the synchronization signal discrimination circuit being used as a third predetermined synchronization signal synchronically separated, wherein the synchronization signal discrimination circuit comprises a charging circuit charging a capacitor based on the first and second predetermined synchronization signals from the synchronization signal separation circuit, a discharging circuit discharging the capacitor and a comparator comparing a level of a charging voltage of the capacitor with a reference voltage.