Patent ID: 8188607

Claim:
A physical layout structure for chip coupling, the physical layout structure being disposed on a substrate which is defined with a first orientation and a second orientation substantially perpendicular to the first orientation, the physical layout structure having at least one unit comprising: a plurality of lines, being substantially parallel and extending along the second orientation; and a plurality of conductive pads, respectively disposed in the plurality of lines, in which each of the plurality of conductive pads is distributed along the first orientation and staggered along the second orientation corresponding to the adjacent conductive pad; wherein each of the plurality of lines has at least one shifting portion stepping aside and departing from a corresponding one of the adjacent conductive pads in the first orientation, and wherein each of the shifting portions comprises a main section substantially disposed parallel to the second orientation and two connecting sections respectively connecting with two ends of the main section, in which two included angles being formed by the main section and the connecting sections are both substantially greater than 90 degrees and facing towards the corresponding one of the adjacent conductive pads; wherein each of the conductive pads has two connecting ends respectively disposed on two sides of the conductive pad along the second orientation, in which the two connecting ends are staggered apart from each other on the first orientation to separately connect with a line.