Patent ID: 7192838

Claim:
A method of producing complementary SiGe bipolar transistors, comprising the steps of: providing a support wafer; forming a first collector zone on the support wafer in epitaxial silicon of a first conductivity type; forming a second collector zone on the support wafer adjacent the first collector zone in epitaxial silicon of a second conductivity type; forming a first base layer over the first collector zone from crystalline SiGe; forming a second base layer over the second collector zone from crystalline SiGe; forming an insulating layer over the base layers; selectively exposing the first base layer; depositing a first emitter interface oxide layer optimized for the first conductivity type on the exposed first base layer; forming a first emitter structure over the first interface oxide layer and covering the first emitter structure with a first protective layer; after covering the first emitter structure, selectively exposing the second base layer; then, depositing a second emitter interface oxide layer optimized for the second conductivity type on the exposed second base layer; and then, forming a second emitter structure over the second interface oxide layer.