Patent ID: 7725637

Claim:
A method comprising: determining, using a monarch processor of a plurality of processors of a system, during initialization of the system a plurality of memory addresses, each memory address being different from one another and corresponding to a relocation address of the corresponding processor at which it is to execute system management interrupt handler code; generating, using the monarch processor, a plurality of system management interrupt interprocessor interrupts, each system management interrupt interprocessor interrupt having a corresponding processor of the plurality of processors in the system and each system management interrupt interprocessor interrupt including one of the plurality of memory addresses; directing each system management interrupt interprocessor interrupt to the corresponding processor from the monarch processor; and verifying with a processor having a system management interrupt interprocessor interrupt directed thereto that an associated interrupt control register of the processor is set to a default address, and loading the associated interrupt control register set to the default address with the memory address included in the system management interrupt interprocessor interrupt directed to the associated processor, and otherwise not loading the interrupt control register with the memory address, and instead ignoring the memory address.