Patent ID: 8796128

Claim:
A method for forming two transistors having different threshold voltages comprising: forming a first gate cavity in a first transistor and a second gate cavity in a second transistor; depositing a gate dielectric film in the first gate cavity and the second gate cavity; depositing a first workfunction metal in the first gate cavity and the second gate cavity; depositing a titanium layer in the first gate cavity and the second gate cavity; removing the titanium layer from the second gate cavity, thereby leaving a remaining portion of the titanium layer disposed in the first gate cavity; depositing a first fill metal of aluminum on the remaining portion of the titanium layer via a selective deposition process without depositing a mask on the second gate cavity, wherein the first fill metal of aluminum is not deposited above the second gate cavity; depositing a second workfunction metal in the second gate cavity; depositing a second fill metal in the second gate cavity; and planarizing the first and second transistors.