Patent ID: 6886092

Claim:
A method for processing data within a programmable gate array, the method comprises: detecting, by a fixed logic processor embedded within the programmable gate array, a custom operational code; providing, by the fixed logic processor, an indication of the custom operational code to the programmable gate array in response to detecting the custom operational code; and performing, by at least a portion of the programmable gate array configured as a dedicated processor, a fixed logic routine in response to receiving the indication of the custom operational code, wherein the providing the indication of the custom operational code further comprises at least one of: providing data for processing to a portion of the programmable gate array; providing a co-processing instruction to the at least a portion of the programmable gate array, wherein the co-processing instruction indicates co-processing of the data; providing a second co-processing instruction to the at least a portion of the programmable gate array, wherein the second co-processing instruction indicates fetching second data for co-processing; providing an interrupt instruction to the at least a portion of the programmable gate array, wherein the interrupt instruction indicates interrupt processing of the data; providing a second interrupt instruction to the at least a portion of the programmable gate array, wherein the second interrupt instruction indicates fetching the second data for interrupt processing; and providing a system management instruction to the at least a portion of the programmable gate array.