Patent ID: 7007221

Claim:
A data reproducing controller for controlling reproduction of recording data, wherein the recording data is in sectors with each sector including a predetermined number of rows of scrambled data with each row having a predetermined number of bytes, a first error correction code added to each row of the scrambled data, a second correction code added to the predetermined number of rows of scrambled data, the data reproducing controller comprising: a first error correction circuit for performing a first error correction process on each row of the scrambled data in accordance with the first error correction code and for generating a completion signal whenever the first error correction process of each row of the scrambled data is completed; a descrambling circuit connected to the first error correction circuit for performing a descrambling process on the scrambled data that has undergone the first error correction process to generate descrambled data; a counter connected to the first error correction circuit for counting the completion signal to generate a count value; and a determination circuit connected to the counter to detect a timing at which the second error correction code is provided to the descrambling circuit from the count value, wherein the determination circuit inactivates the descrambling process when the second error correction code is provided to the descrambling circuit.