Patent ID: 8819518

Claim:
A method for performing error correction comprising the steps of: reading data from a first memory, said data being arranged in an initial configuration; forward shifting said data from the first memory, said forward shifting arranging said data in a second configuration; processing said forward shifted data using a first portion of an error correction process; reverse shifting said processed data, said reverse shifting returning said processed data from said second configuration to said initial configuration, said step of reverse shifting being by passed if said processed data is an intermediate result; writing said intermediate result into a second memory if said processed data is an intermediate result; and writing said reverse shifted data into said first memory if said processed data is not an intermediate result, wherein said reverse shifted data in said initial configuration is a configuration used for processing in a second portion of an error correction process and wherein said first memory receives a signal containing data bits and error correction bits from a carrier tracking loop and outputs a signal containing error corrected data bits to an interleaver and only stores data in said initial configuration.