Patent ID: 7577050

Claim:
A semiconductor memory device, comprising a plurality of internal voltage measuring units, each for driving data input from a memory bank to output the data when a test signal is deactivated, and outputting a corresponding one of internal voltages used in the semiconductor memory device when the test signal is activated wherein each of the plurality of internal voltage measuring units includes: an input/output (I/O) pad; a data output driving unit for pulling up an input voltage to a first voltage level or pulling down the input voltage to a second voltage level in response to logic levels of the data input from the memory bank, and outputting the pulled-up or pull-down voltage to the I/O pad; and a voltage output unit, connected to the data output driving unit, for receiving the corresponding one of the internal voltages and outputting the corresponding internal voltage to the I/O pad when the test signal is activated, wherein the voltage output unit receives a first power supply voltage lower than the first voltage level and higher than the second voltage level, and outputs the first power supply voltage to the I/O pad when the test signal is activated.