Patent ID: 8536685

Claim:
A shielded semiconductor device comprising: a semiconductor substrate having a plurality of semiconductor devices with active regions of the plurality of semiconductor devices formed therein, the semiconductor substrate having a surface; an inter-layer dielectric overlying the surface of the semiconductor substrate; a first plurality of conductors overlying the inter-layer dielectric and electrically connected to at least one semiconductor device of the plurality of semiconductor devices wherein the first plurality of conductors conduct one of power, a common reference for the power, or electrical signals that are formed by the plurality of semiconductor devices; a passivation layer used to protect the shielded semiconductor device from contaminants, the passivation layer overlying the first plurality of conductors and the inter-layer dielectric; a first dielectric layer overlying the first plurality of conductors; a metal layer on the first dielectric layer, the metal layer overlying the passivation layer and overlying the first plurality of conductors wherein the metal layer is not connected to conduct electrical signals that are formed by the plurality or semiconductor devices; a second dielectric layer overlying the metal layer; and a second plurality of conductors overlying the second dielectric layer wherein a first portion of the second plurality of conductors is electrically connected to a portion of the first plurality of conductors to electrically conduct electrical signals formed by at least a portion of the plurality of semiconductor devices.