Patent ID: 7986499

Claim:
A current limiting circuit for limiting a current passing through an output pass circuit of a voltage regulator, the current limiting circuit comprising: a current sampling circuit for sampling the current passing through the output pass circuit to obtain a duplicated current being proportional to the current passing through the output pass circuit, wherein the output pass circuit is a P-channel MOSFET MPass, the current sampling circuit is a P-channel MOSFET MP 1 ; a current mirror circuit for producing a mirror current being proportional to the duplicated current with the duplicated current as a reference current; a current to voltage converter for producing a voltage being proportional to the mirror current, wherein the current to voltage converter is formed by a resistor connected between a gate terminal and a source terminal of a MOSFET, the voltage is being produced when the mirror current goes though the resistor; and a voltage comparator for comparing the voltage produced by the current to voltage converter with a threshold voltage and turning off the output pass circuit when the voltage produced by the current to voltage converter is larger than or equal to the threshold voltage, wherein the voltage comparator includes the MOSFET, wherein the voltage comparator is a P-channel MOSFET MP 4 , the resistor is referred to as a resistor R 1 , and the current mirror circuit is formed by a pair of N-channel MOSFETs MN 1 and MN 3 , and wherein a source terminal of the MOSFET MPass is coupled to an input voltage, and a drain terminal of the MOSFET MPass is coupled to an output voltage; a gate terminal of the MOSFET MP 1 is coupled to a gate terminal of the MOSFET MPass, and a source terminal of the MOSFET MP 1 is coupled to the source terminal of the MOSFET MPass; a drain terminal of the MOSFET MN 1 is coupled to a drain terminal of the MOSFET MP 1 , a source terminal of the MOSFET MN 1 is grounded, and a gate terminal of the MOSFET MN 1 is coupled to a gate terminal of the MOSFET MN 3 and the drain terminal of the MOSFET MN 1 . a source terminal of the MOSFET MN 3 is grounded, and a drain terminal of the MOSFET MN 3 is coupled to a gate terminal of the MOSFET MP 4 ; one terminal of the resistor R 1 is coupled to the gate terminal of the MOSFET MP 4 , and the other terminal of the resistor R 1 is coupled to a source terminal of the MOSFET MP 4 ; and the source terminal of the MOSFET MP 4 is coupled to the input voltage VCC, and a drain terminal of the MOSFET MP 4 is coupled to the gate terminal of the MOSFET MPass.