Patent ID: 7859095

Claim:
A semiconductor device comprising: a wiring substrate having a main surface, a first electrode pad formed on the main surface, a second electrode pad formed on the main surface, and a back surface opposite the main surface; a first semiconductor chip having a first main surface, a first bonding pad formed on the first main surface, and a first back surface opposite the first main surface, and mounted over the main surface of the wiring substrate such that the first main surface of the first semiconductor chip faces the main surface of the wiring substrate; a bump electrically connecting the first bonding pad with the first electrode pad; a second semiconductor chip having a second main surface, a second bonding pad formed on the second main surface, and a second back surface opposite the second main surface, and mounted over the first semiconductor chip such that the second back surface of the second semiconductor chip faces the first back surface of the first semiconductor chip; a wire electrically connecting the second bonding pad with the second electrode pad; a first resin sealing the bump and between the first main surface of the first semiconductor chip and the main surface of the wiring substrate; and a second resin sealing the first semiconductor chip, the second semiconductor chip, and the wire; wherein a part of the second back surface of the second semiconductor chip is exposed from the first semiconductor chip in a plan view; and wherein the second resin is contacted with the part of the second back surface of the second semiconductor chip.