Patent ID: 7888923

Claim:
An apparatus comprising: a current sensor; an error amplifier that is adapted to receive a reference voltage and a feedback voltage; a comparator having a first input terminal and a second input terminal, wherein the sum of at least a first portion of a common mode voltage and an output of the error amplifier is input into the first input terminal, and wherein the sum of at least a second portion of the common mode voltage and an output of the current sensor is input into the second input terminal; an analog-to-digital converter (ADC) that receives the sum of the second portion of the common mode voltage and the output of the current senor, wherein the ADC has a plurality of internal threshold voltage that are between the common mode voltage and an overcurrent limit adjustment voltage; control logic that receives an output from the comparator and the ADC; and a plurality of drivers, wherein each driver is adapted to receive at least one control signal from the control logic, and wherein the plurality of drivers are adapted to provide drive signals to a converter.