Patent ID: 7982264

Claim:
A semiconductor device comprising: a semiconductor substrate; an insulating layer laminated on the semiconductor substrate; a semiconductor layer, doped with an impurity, laminated on the insulating layer; an annular deep trench having a depth reaching the insulating layer from the surface of the semiconductor layer; a source region formed on the surface layer of the semiconductor layer in a transistor forming region enclosed with the deep trench; a gate electrode provided in a gate trench formed in the transistor forming region adjacent to the source region; a gate insulation film interposed between the gate electrode and the semiconductor layer; a drain region formed on the surface layer of the semiconductor layer in the transistor forming region; an isolation region formed on the surface layer of the semiconductor layer between the source region and the drain region for electrically isolating the source region and the drain region from each other; and a current path formed on the transistor forming region for guiding a current from the drain region to a position opposite to the source region in the vertical direction perpendicular to the surface of the semiconductor device, wherein the current path includes a lateral conductive layer formed on the insulating layer and a vertical conductive layer formed along the deep trench and connected to the drain region and the lateral conductive layer, and the lateral conductive layer is made of silicon, doped with the impurity at a higher concentration than the semiconductor layer.