Patent ID: 7811872

Claim:
A method for manufacturing a field effect transistor having a field plate, comprising the steps of: forming a source electrode and a drain electrode on a surface of a GaN semiconductor substrate; forming an insulating film on the surface of the GaN semiconductor substrate between the source electrode and the drain electrode; forming a first resist pattern for providing an opening corresponding to a gate electrode on the insulating film; using the first resist pattern as a mask to apply anisotropic reactive ion etching by inductively coupled plasma to the insulating film to thereby form the opening exposing the surface of the GaN semiconductor substrate through the insulating film; depositing a gate metal in the opening by self-aligned process using the first resist pattern to thereby form the gate electrode; removing the first resist pattern, and the gate metal; forming a second resist pattern for forming a field plate overhanging the insulating film from the gate electrode toward the drain electrode in a visored shape; using the second resist pattern as a mask to deposit Ti and another metal for the field plate in series on the gate electrode and the insulating film to thereby form the field plate; and removing the second resist pattern, and the Ti and the other metal for the field plate deposited on the Ti.