Patent ID: 7691743

Claim:
A method of manufacturing a semiconductor device having a capacitance element including a dielectric film disposed between a first electrode layer and a second electrode layer, wherein formation of said capacitance element comprises the steps of: forming a laminated film comprising at least one pair of amorphous films on said first electrode layer, said amorphous films being a first two-element amorphous metal oxide film and a second two-element amorphous metal oxide film formed in the order named or in the reverse order; wherein said first two-element amorphous metal oxide film and said second two-element amorphous metal oxide film are each deposited to a thickness of one to ten atomic layers, and heat-treating said laminated film at a temperature close to a crystallization start temperature, thereby converting said laminated film to a single-layer three-element amorphous metal oxide film covering a plurality of crystal grains therein.