Patent ID: 8557636

Claim:
A method for forming a semiconductor system in a package comprising the steps of: modifying a pre-existing circuit design for a semiconductor integrated circuit to add a plurality of through-silicon-vias along at least one peripheral edge of the circuit, fabricating a first integrated circuit in a first semiconductor substrate in accordance with the modified design, said first semiconductor substrate having first and second major surfaces with circuits defined in the first major surface and through-silicon-vias extending through a peripheral region of the first semiconductor substrate between the first and second major surfaces of the first semiconductor substrate, forming a redistribution layer on the second major surface of the first semiconductor substrate that is connected to the through-silicon-vias in the peripheral region of the first semiconductor substrate, mounting the first semiconductor substrate on a package substrate with the first major surface of the first semiconductor substrate facing the package substrate, and mounting a second integrated circuit in a second semiconductor substrate on the first semiconductor substrate and in mechanical and electrical connection therewith wherein circuits in the second integrated circuit are connected to circuits in the first integrated circuit through the redistribution layer and the through-silicon-vias.