Patent ID: 7749830

Claim:
A semiconductor structure fabrication method, comprising: providing a structure which includes (a) a first semiconductor region and a second semiconductor region, (b) a first gate dielectric region on top of the first semiconductor region and a second gate dielectric region on top of the second semiconductor region, (c) a high-K dielectric region having a dielectric constant K on top of the first gate dielectric region, K being greater than 4, (d) an electrically conductive layer on top of the high-K dielectric region, (e) a poly-silicon layer on top of the electrically conductive layer and the second gate dielectric region, and (f) a hard mask layer on top of the poly-silicon layer, wherein the second semiconductor region includes a first top surface shared by the second semiconductor region and the second gate dielectric region, and wherein the first top surface defines a reference direction perpendicular to the first top surface and pointing from inside to outside of the second semiconductor region; patterning the hard mask layer resulting in a first hard mask region and a second hard mask region; and etching the poly-silicon layer with the first and second hard mask regions as blocking masks until a second top surface of the electrically conductive layer and a third top surface of the second gate dielectric region are exposed to a surrounding ambient resulting in a first poly-silicon region and a second poly-silicon region, wherein the first poly-silicon region and the second poly-silicon region are exposed to a surrounding ambient, wherein said patterning the hard mask layer comprises: forming a first photoresist region and a second photoresist region on top of and in direct physical contact with the hard mask layer, wherein the entire first photoresist region overlaps the first semiconductor region in the reference direction, and wherein the entire second photoresist region overlaps the second semiconductor region in the reference direction; and patterning the hard mask layer with the first and second photoresist regions as blocking masks resulting in the first and second hard mask regions.