Patent ID: 8059443

Claim:
A memory module comprising: a memory-controller layer including at least one memory controller; at least one memory layer in a stack with the memory-controller layer; an optical layer adjacent to the memory-controller layer and including a bus waveguide that lies within the optical layer, the bus waveguide having a first end to receive optical channels and a second end to send optical channels; at least one electro-optic interface to convert optical channels input to the first end of the bus waveguide into electronic signals to be sent to the at least one memory controller and convert electronic signals received from the at least one memory controller into optical channels to be output from the second end of the bus waveguide, wherein the at least one electro-optic interface is within both the optical layer and the memory-controller layer; and at least one set of through vias extending approximately perpendicular to a surface of the least one memory controller through the stack, each set of through vias including: data through vias through which data is transmitted to and from the at least one memory layer; address through vias through which a physical address of data stored in the at least one memory layer is transmitted to the at least one memory layer; and control through vias through which commands and status signals are transmitted to and from the at least one memory layer, wherein the at least one set of at least one through vias provide electronic communication between the at least one memory controller and one of the at least one memory layers.