Patent ID: 7423450

Claim:
An integrated circuit having an on-chip termination (OCT) calibration control circuit, the OCT calibration control circuit comprising: a first group of transistors coupled in parallel to a first terminal; a first extra transistor coupled to the first terminal; a first feedback loop circuit comprising a first comparator coupled to the first terminal, the first feedback loop circuit generating first calibration codes to control the first group of transistors and a first control signal to control the first extra transistor, wherein the first feedback loop circuit turns on the first extra transistor after an output signal of the first comparator changes state, and the OCT calibration control circuit selects one of the first calibration codes to control a termination impedance based on whether the output signal of the first comparator changes state after the first extra transistor is turned on; a second group of transistors coupled in parallel to a second terminal; a second extra transistor coupled to the second terminal; and a second feedback loop circuit comprising a second comparator coupled to the second terminal, the second feedback loop circuit generating second calibration codes to control the second group of transistors and a second control signal to control the second extra transistor, wherein the second feedback loop circuit turns on the second extra transistor after an output signal of the second comparator changes state, and the OCT calibration control circuit selects one of the second calibration codes to control a termination impedance based on whether the output signal of the second comparator changes state after the second extra transistor is turned on.