Patent ID: 7145240

Claim:
A semiconductor device comprising: a semiconductor substrate having a first region where a memory device is formed and a second region where a logic device is formed; a first insulating layer formed on said semiconductor substrate; first and second contact plugs which are including a first high-melting metal, and formed in said first insulating layer to be electrically connected to said semiconductor substrate, in said first region and whose upper surfaces are exposed from said first insulating layer; a third contact plug which is including said first high-melting metal, and formed in said first insulating layer to be electrically connected to said semiconductor substrate in said second region and whose upper surface is exposed from said first insulating layer; a second insulating layer formed over said first insulating layer; a metal-insulator-metal capacitor having a electrode including a second high-melting metal, and formed in said second insulating layer to be electrically connected to said first contact plug; a fourth contact plug including said first high-melting metal, and formed in said second insulating layer to be electrically connected to said second contact plug; a fifth contact plug including said first high-melting metal, and formed in said second insulting layer to be electrically connected to said third contact plug; a first copper interconnection having a first barrier metal layer on a side surface and on a lower surface of said first copper interconnection, and formed in said second insulating layer, to be electrically connected to said fourth contact plug through said first barrier metal layer; and a second copper interconnection having a second barrier metal layer on a side surface and on a lower surface of said second copper interconnection, and formed in said second insulating layer, to be electrically connected to said film contact plug through said second barrier metal layer; wherein said first copper interconnection is a bit line of said memory device and located above said capacitor.