Patent ID: 8106465

Claim:
A semiconductor device, comprising: an element isolation film formed in a semiconductor layer, the element isolation film defining an element formation region; a gate electrode formed above the element formation region, the gate electrode having ends respectively extending above the element isolation film; and a source region and a drain region which are formed in the element formation region to sandwich therebetween a channel formation region under the gate electrode, wherein the gate electrode comprises at each of the ends thereof a high work function region in which a work function is higher than a work function in other regions over at least a part of an interface between the element formation region and the element isolation film, wherein the semiconductor layer located in the channel formation region is of a first conductivity type; wherein the gate electrode is of a second conductivity type, wherein the high work function region comprises a region of the first conductivity type which is formed in a part of the gate electrode and is located over the interface, and wherein the gate electrode comprises: a semiconductor pattern of the second conductivity type; the region of the first conductivity type which is formed in the semiconductor pattern and which comprises the high work function region; and a conductive layer formed over the semiconductor pattern.