Patent ID: 7276786

Claim:
A stacked board-on-chip package comprising: a first package including a first semiconductor chip installed on a first substrate, wherein first electrode pads connected to first contact pads of the first semiconductor chip are connected to first via holes that penetrate the first substrate and are filled with metal; a second package including a second semiconductor chip installed on a second substrate, disposed so that a bottom surface of the second semiconductor chip faces a bottom surface of the first semiconductor chip, wherein second electrode pads connected to second contact pads of the second semiconductor chip are connected to second via holes that penetrate the second substrate and are filled with the metal; a first surface formed on the first semiconductor chip that contains the first contact pads, the first surface being mounted on a lower surface of the first substrate; a second surface formed on the second semiconductor chip that contains the second contact pads, the second surface being mounted on an upper surface of the second substrate; an interposer connecting the first via holes to the second via holes; and solder balls connected to the first electrode pads of the first package or the second electrode pads of the second package.