Patent ID: 8742966

Claim:
A output device, comprising: an output buffer including a first buffer switch connected between a first supply voltage and an output terminal that outputs an output signal and a second buffer switch connected between the output terminal and a second supply voltage; a driving unit that receives a clock signal and a data signal and drives the output buffer in synchronization with the clock signal, the driving unit including: a first and a second driving circuit that operate with the same power supply, the first and second driving circuit driving the first and second buffer switches, respectively; and a signal, switching device that selects one of the first and second driving circuits in accordance with a logical level of the data signal and supplies a selection signal to the selected one of the driving circuits, the selection signal having a selection signal level that changes in synchronization with a change of a logical level of the clock signal, wherein the selected one of the first and second driving circuits outputs a driving signal having a driving signal level that changes in synchronization with the logical level of the clock signal to a corresponding one of the first and second buffer switches.