Patent ID: 7157371

Claim:
A method for avoiding impurities in layers and structures in a semiconductor wafer caused by extraneous substances in a course of manufacturing semiconductor devices, which comprises the steps of: providing a base substrate formed at least in places from a primary material; using one of a sequential gas phase deposition process and a molecular beam epitaxy process for forming a dielectric layer on at least sections of one substrate surface of the base substrate formed of the primary material, the dielectric layer formed of a material selected from the group consisting of silicon nitride, a metal oxide, and an oxide of rare earths, the dielectric layer functioning as a barrier layer composed of a barrier material being substantially impermeable to the extraneous substances; and subjecting the base substrate provided with the barrier layer to one of the following further processing steps: an annealing step in an environment containing oxygen, and the barrier layer preventing oxidation of the primary material, an annealing step in an environment containing hydrogen, and the barrier layer preventing a reduction of the primary material, a heat-treatment step in an environment containing ammonia, and the barrier layer preventing the formation of nitrides of the primary material, and a heat-treatment step in an environment containing arsenic, and the barrier layer preventing the primary material from being doped with the arsenic.