Patent ID: 7915695

Claim:
A semiconductor device comprising: a pair of first conductive type first source/drain regions formed on the main surface of a semiconductor region at a prescribed interval to hold a first channel region therebetween; a first gate electrode formed on said first channel region through a first gate insulating film; a pair of second conductive type second source/drain regions formed on the main surface of said semiconductor region at a prescribed interval to hold a second channel region therebetween; and a second gate electrode formed on said second channel region through a second gate insulating film, wherein at least either said first gate electrode or said second gate electrode includes a metal-containing layer which contains a metal other than a semiconductor material so formed as to partially cover the upper surface of corresponding said first gate insulating film or corresponding said second insulating film and a semiconductor layer formed on said metal-containing layer to come into contact with both a portion of the upper surface of corresponding said first gate insulating film or corresponding said second gate insulating film not covered with said metal-containing layer and said metal-containing layer, said first gate electrode and said second gate electrode contain metals different from each other, said first gate electrode includes a first metal-containing layer so formed as to partially cover said first gate insulating film and a first semiconductor layer formed on said first metal-containing layer to come into contact with a portion of said first gate insulating film not covered with said first metal-containing layer, said second gate electrode includes a second metal-containing layer so formed as to partially cover said second gate insulating film and a second semiconductor layer formed on said second metal-containing layer to come into contact with a portion of said second gate insulating film not covered with said second metal-containing layer, said first metal-containing layer and said second metal-containing layer contain metals different from each other, said first source/drain regions are n-type regions while said second source/drain regions are p-type regions, said first metal-containing layer contains a first metal forming a level on a side closer to a conduction band of said first semiconductor layer than an intermediate energy level between said conduction band and a valence band of said first semiconductor layer, and said second metal-containing layer contains a second metal forming a level on a side closer to a valence band of said second semiconductor layer than an intermediate energy level between a conduction band and said valence band of said second semiconductor layer, and said first metal-containing layer further contains a third metal forming a level around said intermediate energy level between said conduction band and said valence band of said first semiconductor layer in addition to said first metal.