Patent ID: 7129583

Claim:
A multi-chip package structure comprising: a first substrate having a top surface and a bottom surface; a sub-package having a top surface and a bottom surface, wherein the bottom surface of the sub-package is attached to the top surface of the first substrate directly, the sub-package including: a second substrate having a top surface and a bottom surface, the second substrate being electrically connected to the first substrate; a second chip attached to the bottom surface of the second substrate and electrically connected to the second substrate; and a second molding compound used for encapsulating the second chip and part of the bottom surface of the second substrate; a first chip attached to the top surface of the sub-package and electrically connected to the first substrate, the first chip having a top surface; a third chip attached to the top surface of the first chip and electrically connected to the first chip; and a first molding compound used for encapsulating the first chip, the third chip, the sub-package completely and the top surface of the first substrate.