Patent ID: 6912618

Claim:
A storage device comprising: a. a volatile memory device having a plurality of volatile memory locations each of which is uniquely addressable by a logical block address, each of the volatile memory locations being configured to store a physical block address without requiring the storage of a corresponding logical block address; b. one or more nonvolatile memory devices, coupled to the volatile memory, each of said one or more nonvolatile memory devices being organized into a plurality of nonvolatile data blocks, wherein each block is selectively programmable and erasable and further wherein each block is uniquely addressable by one of the physical block addresses, and further wherein the plurality of blocks have stored therein status information indicative of the status of the information stored in each block; and c. circuitry for receiving a block of data to be stored in the one or more nonvolatile memory devices, for receiving a target logical block address, for identifying a free particular block within the nonvolatile blocks having no data stored therein, and for storing the physical block address of the particular block in the volatile memory location that corresponds to the target logical block address, wherein the status information stored in the one or more nonvolatile memory devices which correlate to the physical block addresses of the plurality of nonvolatile data blocks are copied to the volatile memory locations during power-up.