Patent ID: 7772905

Claim:
A flip-flop circuit comprising: a flip-flop configured to operate based on a rising edge or a falling edge of a first clock signal; a control circuit configured to receive a second clock signal from outside and generate the first clock signal; and a decision circuit configured to operate based on the first clock signal, and an input and an output of the flip-flop, compare the input of the flip-flop with the output thereof, and output a request signal when the input of the flip-flop is different from the output thereof, and wherein when the request signal is sent from the decision circuit after the flip-flop has been activated, the control circuit makes the first clock signal an inverted state, sends the first clock signal in the inverted state to the decision circuit, and makes the decision circuit cancel the request signal, and the control circuit cancels the inverted state of the first clock signal when the request signal is canceled.