Patent ID: 8392793

Claim:
A Low Density Parity Check (LDPC) encoder used to code data, the LDPC encoder generating parity bits of LDPC codes from input data comprising a plurality of information bits, the LDPC encoder comprising: a plurality of parallel accumulators, a number of the plurality of parallel accumulators equal to M; and a parity bit check matrix, wherein a first information bit is accumulated at a first set of specific parity bit addresses using the plurality of parallel accumulators; the parity bit addresses for each member of the first set of specific parity bit addresses are increased by a pre-determined offset for each new information bit; subsequent information bits are accumulated at parity bit addresses that are offset from the specific parity bit addresses by the pre-determined offset until an M+1 information bit is reached; a next M information bits are accumulated at a second set of specific parity bit addresses using the plurality of parallel accumulators, wherein the parity bit addresses for each member of the second set of specific parity bit addresses are increased by the pre-determined offset for each new information bit; and each information bit in the plurality of information bits is accumulated using additional sets of specific parity bit addresses and pre-determined offsets until all information bits in the plurality of information bits are accumulated.