Patent ID: 7670904

Claim:
A nonvolatile memory device, comprising: a substrate including a cell array region, a first dummy pattern region and a second dummy pattern region; a word line extending lengthwise in a first direction in the cell array region, and including a first insulating layer and a first conductive layer; a first dummy pattern formed in the first dummy pattern region, the first dummy pattern extending lengthwise parallel to the first direction and including the first insulating layer, the first conductive layer and a first butting contact formed from a portion of the first conductive layer, wherein the first butting contact provides an electrical connection path connecting the first conductive layer to the substrate; and a second dummy pattern formed in the second dummy pattern region, the second dummy pattern extending lengthwise perpendicular to the first direction and including the first insulating layer, the first conductive layer and a second butting contact formed from a portion of the first conductive layer, wherein the second butting contact provides an electrical connection path connecting the first conductive layer to the substrate.