Patent ID: 8639859

Claim:
A method of processing a data-set on a computer having a central processing unit (CPU) for processing data, using an accelerator coupled to the computer, the accelerator including a programmable logic device for processing the data-set, the method comprising: setting a milestone in the data-set transferring data of the data-set from the CPU to the accelerator, wherein the accelerator comprises a DMA controller; processing the transferred data on the accelerator in parallel with processing data of the data-set on the CPU wherein processing in parallel further comprises: as a result of reaching the milestone, activating the CPU and processing data of the data-set positioned before the milestone on the CPU; and continuing to process data of the data-set after the milestone on the accelerator such that the overall latency of a combined CPU and accelerator computation is reduced, wherein processing data of the data-set comprises executing a 3 dimensional convolution wherein the CPU performs the boundary conditions of the convolution and the accelerator performs other parts of the convolution.