Patent ID: 8410614

Claim:
A semiconductor element mounting structure comprising: a semiconductor element having a first surface including an electrode terminal formed thereon, and a second surface located opposite to the first surface; a first insulating layer in which the semiconductor element is embedded, wherein the second surface of the semiconductor element and a surface of the second surface side of the first insulating layer constitute the same surface; a second insulating layer contacting the second surface of the semiconductor element and the surface of the second surface side of the first insulating layer, and formed on them, wherein no wiring layer intervenes between the second surface of the semiconductor element and the second insulating layer; a first via formed in the first insulating layer, and connected to the electrode terminal; a first wiring layer formed on a surface of the first surface side of the first insulating layer, and connected to the electrode terminal through the first via; a second via formed in the first insulating layer and second insulating layer located outside the semiconductor element, and connected to the first wiring layer; and a second wiring layer formed on a surface of the second surface side of the second insulating layer, and connected to the first wiring layer through the second via, wherein the second wiring layer extends to a region corresponding to the semiconductor element from the second via.