Patent ID: 7969210

Claim:
An electronic circuit to be connected to a master-slave mode D flip flop constituting a frequency divider, comprising: a first circuit element, in which a free run frequency when the first circuit element is used as a load circuit of the D flip flop is provided as a first free run frequency, wherein the first circuit element is composed of a first inductor; and a second circuit element, in which the free run frequency when the second circuit element is used as a load circuit of the D flip flop is provided as a second free run frequency different from the first free run frequency, wherein the second circuit element is composed of a first LC parallel resonance circuit; wherein the first and second circuit elements are connected in series to each other; wherein the electronic circuit further comprises: a master stage including: a first load circuit composed of the first inductor and the first LC parallel resonance circuit connected in series to each other; and a second load circuit composed of a second inductor and a second LC parallel resonance circuit connected in series to each other; and a slave stage including: a third load circuit composed of a third inductor and a third LC parallel resonance circuit connected in series to each other; and a fourth load circuit composed of a fourth inductor and a fourth LC parallel resonance circuit connected in series to each other.