Patent ID: 7994056

Claim:
A method for forming a pattern in a semiconductor device, the method comprising: forming an etch-target layer over a substrate, wherein the substrate includes a first region having a first pattern size and a second region having a second pattern size that is larger than the first pattern size; forming a sacrificial layer and a passivation layer over the etch-target layer in the first region and the second region; etching the passivation layer and the sacrificial layer to form stack structures including a sacrificial pattern and a passivation pattern in the first region and the second region; forming spacers against sidewalls of the stack structures in the first region and the second region; forming a mask pattern over the sacrificial pattern, the passivation pattern, and the spacers in the second region to cover the second region; removing the passivation pattern in the first region by using the mask pattern to expose the sacrificial pattern in the first region; removing the exposed sacrificial pattern in the first region; and etching the etch-target layer to form an etch-target pattern using the spacers in the first region and the stack structure and the spacers in the second region.