Patent ID: 7969194

Claim:
A semiconductor device comprising: a first semiconductor integrated circuit having a predetermined function, the first semiconductor integrated circuit outputting a required output signal; and a second semiconductor integrated circuit in which a plurality of MOS elements each of which is independently controllable to and from a conducting state and a non-conducting state in accordance with a plurality of gate signals are provided, the plurality of MOS elements is connected in parallel, and outputs of the plurality of MOS elements are coupled to an output or an input of the first semiconductor integrated circuit, wherein: each of said plurality of MOS elements is capable of generating an output signal which is independent of the output signal of the other MOS elements, and the plurality of MOS elements are controlled so that: at least one of the plurality of MOS elements is in conducting state during an operation of the second semiconductor integrated circuit, there is no situation in which all of the plurality of MOS elements are simultaneously in non-conducting state, and a resistance value of the plurality of MOS elements becomes substantially constant regardless of values of the plurality of gate signals.