Patent ID: 7859926

Claim:
A semiconductor memory device comprising: a plurality of word lines and a plurality of bit lines; a plurality of memory cells arranged at intersections of the bit lines and the word lines; a plurality of column select transistors having first terminals thereof connected to the plurality of bit lines, respectively, having second terminals thereof coupled in common, and having control terminals thereof, respectively supplied with a plurality of column select signals, each column select transistor being controlled to be turned on and off by associated column select signal; a sense amplifier having an input node connected to the commonly coupled second terminals of the column select transistors; a discharge circuit that discharges the plurality of bit lines responsive to a control signal supplied thereto; and a charge circuit that has an output connected to the input node of the sense amplifier and, responsive to the control signal, charges the bit line via the column select transistor which is selected and turned on; the plurality of bit lines being discharged to a ground potential by the discharge circuit in a predetermined time interval different from a time interval during which a selected word line is activated, wherein in a read operation of the memory cell, the bit line connected to a selected memory cell is charged from a side of an input node of the sense amplifier by the charge circuit via the column select transistor that is turned on, when the input node of the sense amplifier and the bit line are charged by the charge circuit to a predetermined potential, the selected column select transistor that connects the bit line connected to the selected memory cell to the input node of the sense amplifier is turned off, then after, the input node of the sense amplifier is charged by the charge circuit with the selected column select transistor being turned off and with the bit line connected to the memory cell electrically disconnected from the input node of the sense amplifier, and the reading is performed by the sense amplifier, based on a result of the charging of the input node thereof.