Patent ID: 8228561

Claim:
An image processing system, comprising: an image type classification circuit to identify inputted image data as picture image data, text image data, or graphics image data; a halftone circuit, operatively connected to said image type classification circuit, to convert the inputted image data, identified as picture image data, to halftone image data; a tile pattern circuit, operatively connected to said image type classification circuit, to replace the inputted image data, identified as text image data or graphics image data, with tile patterns; an encoding circuit, operatively connected to said tile pattern circuit, to encode the tile patterns with a high frequency checkerboard pattern; a bitmap rendering circuit, operatively connected to said encoding circuit and said halftone circuit, to combine the halftone image data from said halftone circuit with the encoded tile patterns from said encoder circuit to render a bitmap; a buffer to store said bitmap; a filter bitmap circuit, operatively connected to said buffer, to create a decode mask, said decode mask identifying an encoded area of said bitmap; and said filter bitmap circuit decoding the area of said bitmap corresponding to said decode mask; an edge process circuit, operatively connected to said filter bitmap circuit, to identify edge pixel candidates in said decode mask, the identified edge pixel candidates corresponding to pixels located at an edge of said decode mask; said edge process circuit determining if an identified edge pixel candidate is located adjacent an un-encoded gray area; said edge process circuit filtering out the identified edge pixel candidate when said edge process circuit determines that the identified edge pixel candidate is located adjacent an un-encoded gray area; said edge process circuit determining an identified edge pixel candidate is located between clusters of pixels in the decoded area of said bitmap corresponding to said decode mask; said edge process circuit filtering out the identified edge pixel candidate when said edge process circuit determines that the identified edge pixel candidate is not located between clusters of pixels in the decoded area of said bitmap corresponding to said decode mask; said edge process circuit adding pixels to the decoded area of said bitmap corresponding to said decode mask at locations corresponding to the non-filtered out identified edge pixel candidates.