Patent ID: 7286410

Claim:
A semiconductor integrated circuit comprising: a central processing unit; and a rewritable nonvolatile memory area provided in an address space in the central processing unit, wherein the rewritable nonvolatile memory area includes a first nonvolatile memory area and a second nonvolatile memory area, each of which stores information in accordance with a difference in threshold voltages, at least one condition out of the following conditions is made different between the first nonvolatile memory area and the second nonvolatile area: erase verify voltage, erase verify current, write verify voltage, write verify current, erase voltage, erase voltage application time, write voltage, and write voltage application time, a speed of reading information stored in the first nonvolatile memory area is faster than a speed of reading information stored in the second nonvolatile memory area, and an assured number of rewriting times in the second nonvolatile memory area is greater than an assured number of rewriting times in the first nonvolatile memory area.