Patent ID: 8492220

Claim:
A method for making independently controllable vertically stacked Field Effect Transistors (FETs) and a bipolar junction transistor (BJT) comprising: forming, on a semiconductor substrate, a vertical structure comprising a first gate dielectric layer, a first conductor layer, a second dielectric layer, a second conductor layer, and a third dielectric layer; implanting into the semiconductor substrate a first source and a first drain, each having a first doping type, for a first FET of the vertically stacked FETs, the semiconductor substrate forming a first body for the first FET, the first conductor layer forming a gate electrode for the first FET; growing, over the first source and the first drain, a first epitaxial layer having a doping type similar to the first doping type; growing, over the first epitaxial layer, a second epitaxial layer having a second doping type opposite the first doping type, thereby forming a base for the BJT; growing, over the second epitaxial layer, a third epitaxial layer having a third doping of similar type as the first doping type, thereby forming a drain and a source for a second FET of the vertically stacked FETs, the second conducting layer forming a gate electrode for the second FET; creating an isolation between the first source and an overlying portion of the first epitaxial layer; connecting the drain of the first FET to a contact for an output; connecting the source of the first FET to a collector of the BJT; connecting an emitter of the BJT to the drain of the second FET; connecting the first conductor layer to a first signal source; connecting the second conductor layer to a second signal source; connecting the base of the BJT to a third signal source and connecting the source of the second FET to a voltage supply.