Patent ID: 7970984

Claim:
A method for booting a computerized system, the method comprising: (a) providing a flash memory device that includes a plurality of memory cells grouped into a plurality of blocks, the flash memory device being configured so that at least one of the blocks is operated in a mode in which M bits are stored per cell, and so that remaining blocks of the plurality of blocks are operated in a mode in which N>M bits are stored per cell, where M and N are integral numbers; (b) upon powering up the computerized system: (i) retrieving an initialization program for the booting from the at least one of the blocks which is operated in the mode in which only M bits are stored per cell, (ii) correcting at least one error in the initialization program, using a flash controller's circuitry for correcting bit errors, and (iii) executing the initialization program; and (c) upon completing the executing: (i) accessing data from at least one of the remaining blocks storing N bits per cell, and (ii) correcting the data accessed from the at least one of the remaining blocks storing N bits per cell, using a software error correction code (ECC) routine of a processor, the software error correction code (ECC) routine corrects more errors per block than the flash controller's circuitry for correcting bit errors, and the processor is integrated with the flash controller and is connected to the flash memory device.