Patent ID: 7781769

Claim:
A transistor array panel comprising: a substrate; a plurality of first conductive lines and a plurality of second conductive lines arranged on one side of the substrate to cross one another at right angles; an insulating film interposed between the plurality of first conductive lines and the plurality of second conductive lines; a plurality of first switching elements provided in intersecting portions between the plurality of first conductive lines and the plurality of second conductive lines on said one side of the substrate, respectively; a plurality of display electrodes connected to the first switching elements, respectively; at least one conductive film pattern provided to be electrically insulated from the plurality of first conductive lines, the plurality of second conductive lines and the plurality of display electrodes, and to be overlapped on the display electrodes, thereby forming a storage capacitance between each of the display electrodes and the conductive film pattern; a protection circuit electrically connected to each of the first conductive lines and the second conductive lines, and disposed, in a plane direction of the substrate, in an outer peripheral portion of a display region in which the plurality of first switching elements and the plurality of display electrodes are formed on said one side of the substrate; and a first conductive common line which is: (i) provided in the outer peripheral portion of the display region, (ii) connected to the at least one conductive film pattern, (iii) provided to be insulated from the protection circuit, (iv) arranged to be at least partially overlapped on the protection circuit, and (v) disposed on said one side of the substrate.