Patent ID: 7442586

Claim:
A method for forming a semiconductor-on-insulator (S 01 ) substrate, comprising: forming a semiconductor substrate having a substantially planar upper surface with predetermined first and second implantation regions; conducting at least a first ion implantation step to selectively implant oxygen ions, nitrogen ions, or both oxygen and nitrogen ions into the first, but not the second, implantation region of the semiconductor substrate at a first depth from the substantially planar upper surface; conducting at least a second ion implantation step to selectively implant oxygen ions, nitrogen ions, or both oxygen and nitrogen ions into the second, but not the first, implantation region of the semiconductor substrate at a second, different depth from the substantially planar upper surface; conducting one or more annealing steps to convert the implanted oxygen ions, nitrogen ions, or both oxygen and nitrogen ions in the first and second implantation regions of the semiconductor substrate into first and second patterned buried insulator layers, respectively, which are located at different depths from the substantially planar upper surface and are separated from each other by one or more interlayer gaps; and forming a field effect transistor (FET) that comprises: (1) source and drain regions located in the SOI substrate above the first patterned buried insulator layer, and (2) a channel region located in the SOI substrate between the source and drain regions and above the second patterned buried insulator layer.