Patent ID: 7034594

Claim:
A differential input latch comprising: a first power rail and a second power rail for providing power to said differential input latch; a first input-stage amplifier for receiving a first input signal; a second input-stage amplifier for receiving a second input signal, said second input signal being the logical compliment of said first input signal; a first inverting amplifier coupled to the output of said first input-stage amplifier; a second inverting amplifier coupled to the output of said second input-stage amplifier; wherein said first and second inverting amplifiers are selectively configured in a cross-coupled feedback loop, whereby the output of said first inverting amplifier is coupled to the input of said second inverting amplifier and the output of said second inverting amplifier is coupled to the input of said first inverting amplifier; a loop breaking component for selectively breaking said feedback loop; and a shunting component for selectively coupling the input of said second inverting amplifier to said second power rail; wherein said loop breaking component and said shunting component operate in conjunction with each other such that said shunting component couples the input of said second inverting amplifier to said second power rail when said loop breaking component is breaking said feedback loop; wherein said first input-stage amplifier, second input-stage amplifier, first inverting amplifier, second inverting amplifier, loop breaking component, and shunting component constitute a first latching stage, said differential input latch further having a second latching stage duplicating the components constituting said first latching stage; and wherein: the output of the first input-stage amplifier of said first latching stage is coupled to the input of the second input-stage amplifier of said second latching stage; the output of the second input-stage amplifier of said first latching stage is coupled to the input of the first input-stage amplifier of the second latching stage; the output of the second input-stage amplifier of the second latching stage is a true output node of said differential input latch; and the output of the first input-stage amplifier of the second latching stage is a complement output node of said differential input latch.