Patent ID: 8745316

Claim:
A system of managing indexation of memory, said system comprising: a microprocessor, and a flash memory including an indexed area containing indexed items, and an index structured in a plurality of index areas including a plurality of entries, wherein: said flash memory further includes an index summary containing a plurality of elements, each index summary element being linked to a respective index area of said index, each index summary element is built from all entries belonging to said linked index area and is built using k hash functions, where 1≦k, without overwriting existing data in said flash memory, and wherein each index area of the index includes a plurality of entries, and all of the entries within each index area are sequentially consecutive to each other, the entries are linked to respective indexed items, and are created without overwriting existing data in said flash memory, wherein each index summary element is a Bloom filter, and wherein each element of the index summary includes m bits, with m>0, and wherein the index summary is split into a first group of P partitions with 1<P≦m, so that the consecutive bits E(((i−1)×(m/p))+1) to E(i×(m/p)) of every element of the index summary belong to the i th partition, with 1<i≦m.