Patent ID: 8174875

Claim:
An integrated circuit memory device comprising: an integrated circuit substrate; a memory cell on the integrated circuit substrate, wherein the memory cell includes, a magnetic memory element including a free magnetic layer and a fixed magnetic layer wherein the magnetic memory element is programmable to at least two different magnetoresistive states determined by a magnetic polarization of the free magnetic layer relative to the fixed magnetic layer, and a resistive memory element including a layer of a resistive memory material wherein the resistive memory element is programmable to at least two different resistance states determined by a resistance characteristic of the layer of the resistive memory material to provide at least four different memory states for the memory cell, wherein the free magnetic layer, the fixed magnetic layer and the layer of the resistive memory material are electrically coupled in series, and wherein one of the fixed magnetic layer and the free magnetic layer is between the layer of the resistive memory material and the other of the fixed magnetic layer and the free magnetic layer.