Patent ID: 8338192

Claim:
A method for manufacturing an integrated circuit having an electronic component on a semiconductor substrate, comprising: forming a plurality of integrated circuit elements on the semiconductor substrate; forming a first contact node; forming a second contact node; forming a plurality of electrically conductive structures on the semiconductor substrate during a manufacturing process of the integrated circuit substrate, each structure being positioned between the first contact node and the second contact node, each structure having a first parameter, the first parameter of each structure being a different value from a corresponding first parameter in each other structure within the plurality of structures, each structure being physically integral with the first contact node and each structure have a substantial portion of it being physically integral with each of the other electrically conductive structures; sensing a value of a second parameter in each structure, the second parameter being one which correlates with the value of the first parameter in each structure of the plurality of structures, wherein the second parameter is substantially the same for each of the plurality of structures; selecting only one structure within the plurality of structures based upon the value of the second parameter, the selected structure having a value of the first parameter approximating a desired target value for the first parameter for an electrical connection between the first contact node and a third contact node; forming the electrical connection between the first contact node and the selected structure within the plurality of structures to the third contact node and maintaining electrical isolation between the second contact node and any of the other of the plurality of structures.