Patent ID: 7371672

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first insulating film on a semiconductor substrate; forming an electrode layer on the first insulating film; forming a second insulating film in the semiconductor substrate so that the second insulating film extends in a predetermined direction; forming a third insulating film, a conductive layer and a low-resistivity metal film sequentially so that the second insulating film and the electrode layer are covered by the third insulating film, the conductive layer and the low-resistivity metal film; forming a gate forming pattern on the low-resistivity metal film so that the gate forming pattern corresponds to a plurality of gate electrode formation regions extending in a direction perpendicular to a predetermined direction on the principal surface of the semiconductor substrate; removing the low-resistivity metal film, the conductive layer, the third insulating film and an upper part of the electrode layer in a gate electrode isolation region interposed between the neighboring gate electrode formation regions with the gate forming pattern serving as a mask; forming a protecting film so that the protecting film covers the low-resistivity metal film, the conductive layer, the third insulating film and an upper surface of the electrode layer all exposed as a result of execution of the removing step; removing the protecting film formed on the upper surface of the electrode layer located on the upper surface of the electrode layer in the gate electrode isolation region; removing the electrode layer in the gate electrode isolation region, the electrode layer being exposed as a result of execution of the protecting film removing step; and removing residue of the protecting film.