Patent ID: 7649484

Claim:
An analog to digital conversion system implemented in a single integrated circuit having an analog input and a digital output, comprising: an analog to digital converter that converts an analog signal received at the analog input to a sampled signal at a sample rate of S samples per second and at a sample width of W bits per sample for an original bit rate that is a product of S and W, wherein the sample rate is at least 1 megasample per second; compression logic coupled to the analog to digital converter, the compression logic applying lossless compression operations to the sampled signal to produce a compressed signal at a rate at least as fast as the sample rate, wherein the compressed signal has a compressed bit rate that is less than the original bit rate; and a digital interface receiving the compressed signal from the compression logic and transferring the compressed signal over the digital output at a data rate, wherein the data rate is less than the original bit rate and greater than or equal to the compressed bit rate.