Patent ID: 7778093

Claim:
A memory control circuit receiving an original data strobe signal of a memory, the memory control circuit comprising: a setting circuit for setting at least three deglitch windows respectively having different beginning time points; a deglitch circuit, coupled to the setting circuit, for deglitching according to the original data strobe signal by utilizing the at least three deglitch windows to derive at least three deglitch results; and a determining circuit, coupled to the deglitch circuit and the setting circuit, for determining a latest value of a span period between the at least three deglitch windows set by the setting circuit according to the at least three deglitch results, in order to adjust the span period of the at least three deglitch windows; wherein according to the original data strobe signal, the deglitch circuit utilizes one of the at least three deglitch windows to generate a deglitched data strobe signal for accessing the memory.