Patent ID: 7663412

Claim:
A current mirror circuit having subthreshold current compensation comprising: a first transistor having a first drain terminal, first gate terminal, and a first source terminal, the first drain terminal being connected to the first gate terminal, the first source terminal being connected to a first voltage; a second transistor to mirror a current associated with the first transistor, the second transistor having a second drain terminal, second gate terminal, and a second source terminal, the second gate terminal being connected to both the first gate terminal and the first drain terminal, the second source terminal being connected to the first voltage; and a third transistor having a third drain terminal, a third gate terminal, and a third source terminal, the third transistor being connected with the first transistor such that the third drain terminal is connected to the first drain terminal, the third source terminal being connected to both the third gate terminal and a second voltage that is lower than the first voltage, wherein the first transistor, the second transistor, and the third transistor are all of a common transistor type of one of an NMOS and PMOS type.