Patent ID: 7277038

Claim:
A microcomputer comprising: a central processing unit which carries out a predetermined operation process according to a program; an external terminal for receiving an analog signal; an A/D converter capable of converting the analog signal received from said external terminal into a digital signal; an internal bus; and a bus state controller for bus state control of the internal bus, the internal bus being coupled to the central processing unit, the bus state controller and the A/D converter, said A/D converter including a ladder-type resistor, a first operational amplifier, and a first switch, and a comparator circuit, the operational amplifier being on a first path between the ladder-type resistor and the comparator circuit and receiving a reference voltage of the ladder-type resistor selected by a decoder, and the first switch being on a second path between the ladder-type resistor and the comparator circuit to switchably couple the ladder-type resistor and the comparator circuit, wherein the comparator circuit compares an output voltage of the first operational amplifier with an analog signal.