Patent ID: 8749175

Claim:
An integrated controller, comprising: a filter configured to provide an output current signal; a ramp generator configured to generate a reference ramp signal; a first comparator coupled to the filter and to the ramp generator, wherein the first comparator is configured to compare the output current signal to the reference ramp signal and provide a first signal; a second comparator coupled to the ramp generator, wherein the second comparator is configured to compare an output current set signal to the reference ramp signal and provide a second signal; an error generator configured to provide an error signal based on a timing count between generation of the first and second signals; a regulator configured to use the error signal to provide a control signal to control a dual phase cycle of a power converter at a constant frequency; and a third comparator configured to compare the control signal with a sensed peak current level and to turn off a power switch when the sensed peak current level exceeds the control signal.