Patent ID: 7076752

Claim:
A method for determining unmatched P-FETs and N-FETs in a circuit comprising the steps of: determining instances of said P-FETs and said N-FETs that are connected to a specific node in the circuit; storing a gate signal name for each determined said instance of one of said P-FETs in a first list; storing the gate signal name for each determined said instance of one of said N-FETs in a second list; storing a cumulative value representing a source current for each determined said instance of said P-FETs and said N-FETs; performing a set difference operation on the first list and the second list to determine orphan gate signal names that appear in either one of the lists but not in both; and determining a cumulative value for said source current, by summing the source current value corresponding to each said P-FET gate signal name that matches one of said orphan gate signal names, to produce a total source current value.