Patent ID: 7785916

Claim:
A method, comprising: forming a semiconductor substrate including a pixel part and a peripheral part; forming an interlayer dielectric film including a metal wire in the pixel part and a metal wire in the peripheral part over the semiconductor substrate; forming a photo diode pattern over the interlayer dielectric film and connected to the metal wire in the pixel part; forming a device isolation dielectric layer over the photo diode pattern in the pixel part and over the interlayer dielectric film in the peripheral part, the device isolation dielectric layer having via holes to at least partially expose the photo diode pattern and the metal wire in the peripheral part; forming a metal film over the device isolation dielectric layer including the via holes; forming a planarization layer over the metal film to planarize the pixel part and the peripheral part; and forming simultaneously a first metal film pattern connected to the photo diode pattern and a second metal film pattern connected to the metal wire in peripheral part by patterning the planarization layer and metal film.