Patent ID: RE44303

Claim:
A method for manufacturing an integrated circuit comprising: providing a substrate having a substrate surface; forming an electrical component comprising at least a transistor or a capacitor on the substrate surface; coating the substrate surface and electrical component with a first protective dielectric layer made of alumina, the first protective dielectric layer having a thickness that is in the range of approximately 50 to 2000 angstroms; etching a portion of the first protective dielectric layer from the substrate surface or the electrical component in order to form a contact surface; forming an air bridge on the contact surface; coating the first protective dielectric layer, the electrical component, and the air bridge with a second protective dielectric layer made of alumina, the second protective dielectric layer having a thickness that is in the range of approximately 50 to 2000 angstroms; applying an adhesion promoter to the second protective dielectric layer; and coating the second protective dielectric layer with a third dielectric layer made of a material selected from the group consisting of alumina, silica, parylene F, aromatic-fluorinated VT-4, and parylene HT®, the third dielectric layer having a thickness that is in the range of approximately 100 to 1000 angstroms.