Patent ID: 8598908

Claim:
A processing system, comprising: a memory coupled to a system bus; a configuration register set coupled to the system bus, the configuration register set to store configuration data for a programmable logic function; a processing device coupled to the system bus, the processing device to retrieve the configuration data from the memory and load the configuration data into the configuration register set over the system bus, wherein each unit of configuration data in the configuration register set is individually addressable over the system bus; and a programmable logic system coupled to the system bus, the programmable logic system comprising a plurality of programmable logic blocks to implement the programmable logic function based on the configuration data, wherein the processing device to access a first configuration register in the configuration register set to program a first programmable logic block of the plurality of programmable logic blocks using configuration data from the first configuration register, without affecting a configuration of a second programmable logic block of the plurality of programmable logic blocks, wherein the programmable logic system comprises a sum of products array.