Patent ID: 8549745

Claim:
A circuit substrate process, comprising: providing a base layer, a first patterned conductive layer, a dielectric layer, a patterned mask layer and a metal mask layer, wherein the first patterned conductive layer is disposed on the base layer and has a first pad, the dielectric layer is disposed on the base layer and covers the first patterned conductive layer, the patterned mask layer is disposed on a surface of the dielectric layer and exposes a portion of the surface and the metal mask layer is disposed on the portion of the surface exposed by the patterned mask layer; removing a portion of the patterned mask layer and a portion of the dielectric layer to form a first opening, wherein the first opening exposes the first pad; simultaneously forming a conductive block and a second patterned conductive layer, wherein the conductive block is located within the first opening, the second patterned conductive layer is located on a portion of the surface exposed by the metal mask layer and has a second pad, the conductive block is connected between the first pad and the second pad and the conductive block and the second pad are formed in one piece; and removing the metal mask layer.