Patent ID: 8462308

Claim:
An array substrate having on an insulative substrate, a plurality of display areas to be portions of a plurality of display panels, each display area being constituted with a plurality of pixels arranged in a matrix, the pixels having pixel electrodes formed at intersection portions of plural scan wirings and plural signal wirings; a common wiring formed outside each display area, for applying a reference voltage to the pixels; and a plurality of external-connection terminals formed outside each display area, to be connected with a driver circuit that drives the display panel; the array substrate comprising: connection wirings located so as to intersect a cutting line along which the insulative substrate is to be cut, for connecting the external-connection terminals in one of the display panels on the insulative substrate with a common wiring in another one of the display panels adjacent to the external-connection terminals, wherein the connection wirings and the external-connection terminals are connected via transit portions comprising conductive material, the transit portions comprising elements other than the external-connection terminals and the connection wirings, the transit portions being joined to the external-connection terminals at a joint and joined to the connection wirings at another joint, and wherein the connection wirings are formed from a conductive layer superior in corrosion resistance to at least one of the conductive layers constituting the scan wirings and the signal wirings, wherein at least one of said joints comprises a contact hole.