Patent ID: 8183629

Claim:
An integrated circuit comprising: a drain-side-gate trench metal-oxide-semiconductor field effect transistor including; a source region; a plurality of gate regions disposed above said source region, wherein said plurality of gate regions are formed as substantially parallel elongated structure; a plurality of gate insulator regions, wherein each of said plurality of gate insulator regions are disposed about a periphery of a respective one of said plurality of gate regions; a plurality of body regions disposed above said source region and between said plurality of gate insulator regions; a plurality of source-body contacts disposed between and electrically coupled to said source region and said plurality of body regions; a plurality of drift regions disposed above said plurality of body regions and between said plurality of gate insulator regions; and a plurality of drain regions disposed above said plurality of drift regions and between said plurality of gate insulator regions; a source-side-gate trench metal-oxide-semiconductor field effect transistor; and a metal lead coupling a drain of said source-side-gate trench metal-oxide-semiconductor field effect transistor to a source of said drain-side-gate trench metal-oxide-semiconductor field effect transistor.