Patent ID: 7859305

Claim:
An input/output circuit, operable in an input mode and an output mode, for receiving data and an enable signal, the input/output circuit comprising: an input/output terminal; a pull-up output transistor including a gate; a first logic circuit including an output node coupled to the gate of the pull-up output transistor, with the first logic circuit activating the pull-up output transistor in accordance with the data and the enable signal when the input/output circuit is in the output mode, and the first logic circuit inactivating the pull-up output transistor when the input/output circuit is in the input mode; a pull-down output transistor including a gate; a second logic circuit coupled to the gate of the pull-down output transistor, with the second logic circuit operating the pull-down output transistor in a complementary manner with respect to the pull-up output transistor in accordance with the data and the enable signal in the output mode, and the second logic circuit inactivating the pull-down output transistor in the input mode; and a gate signal generation unit configured to generate a gate signal for inactivating the pull-up output transistor in accordance with the enable signal and an input signal provided from an external device to the input/output terminal in the input mode, wherein the gate signal generation unit includes: a switch circuit coupled between a high potential power supply and the gate of the pull-up output transistor; a transfer gate coupled between a gate of the switch circuit and the input/output terminal; and a control circuit which controls the transfer gate and the switch circuit in accordance with both the enable signal and the input signal provided to the input/output terminal in the input mode.