Patent ID: 8823480

Claim:
A planar electronic device comprising: a planar substrate having a cavity configured to receive a ferrite material body therein, the planar substrate having an upper side and a lower side; conductive vias extending through the substrate; top conductors on the upper side of the planar substrate and electrically connected to corresponding conductive vias; bottom conductors on the lower side of the planar substrate and electrically connected to corresponding conductive vias, wherein the bottom conductors, the top conductors and the conductive vias define a primary conductive loop and a secondary conductive loop; and an upper cover layer covering the upper side, the upper cover layer comprising a material having a high permittivity with a dielectric constant at least two times a dielectric constant of the planar substrate, the upper cover layer being positioned relative to the top conductors to increase capacitance between the primary and secondary loops.