Patent ID: 7049186

Claim:
A method of manufacturing an insulated gate type semiconductor, comprising: preparing a substrate having a collector layer of a second conductive type formed with a first base layer of a first conductive type; forming a second base layer of a second conductive type in a selected region in the surface of the first base layer; forming a plurality of emitter layers each of a first conductive type in an intermittently selected region in the surface of the second base layer; forming a plurality of first trenches over a range from the surface of the second base layer to the first base layer to contact with the plurality of emitter layer while forming a plurality of second dummy trenches over a range from the surface of the second base layer to the first base layer at a position near to each of the plurality of first trenches; implanting impurity ions of a second conductive type to each bottom surface of the plurality of second trenches; forming a gate insulator on each inner peripheral surface of the plurality of first and second trenches; and forming a conductor in each of the plurality of first and second trenches.