Patent ID: 6970980

Claim:
A computer system comprising: a plurality of active devices including a first active device that includes a first cache; a directory configured to indicate which of the plurality of active devices has an ownership responsibility for a given coherency unit; an address network configured to convey address packets between the plurality of active devices and the directory; a data network configured to convey data packets between the plurality of active devices; wherein depending upon whether the directory indicates that at least one active device included in a first subset of the plurality of active devices has a shared access right to a first coherency unit, the directory is configured to send an invalidating address packet on the address network to each active device included in the first subset; wherein the first active device is configured to transition an ownership responsibility for a first coherency unit cached in the first cache upon receipt of a first address packet and to transition an access right to the first coherency unit cached in the first cache upon receipt of a corresponding data packet, wherein the ownership responsibility transitions at a different time than the access right transitions.