Patent ID: 8476139

Claim:
A method of fabricating a semiconductor structure comprising: providing a semiconductor structure having an oxide layer and at least one patterned material stack located on an active area of a semiconductor substrate, said semiconductor substrate having at least one trench isolation region that extends above the surface of said oxide layer; performing an angled implantation process which forms a well region of a first conductivity type within the semiconductor substrate at an interface with said oxide layer, wherein the well region has a central portion and two horizontally abutting end portions, said central portion having a higher concentration of a first conductivity type dopant than the two horizontally abutting end portions; removing a lower portion of said at least one patterned material stack, while maintaining an upper portion of said at least one patterned material stack; removing said oxide layer to expose said semiconductor substrate within said active area; forming an epitaxial semiconductor layer on said exposed semiconductor substrate; forming a gate dielectric on said epitaxial semiconductor layer and on exposed sidewalls and bottom wall of said upper portion of said at least one patterned material stack; forming a first gate electrode portion on a surface of said epitaxial semiconductor layer, wherein a top surface of said first gate electrode portion abuts said gate dielectric on said bottom wall of said upper portion of said at least one patterned material stack; removing the upper portion of said at least one patterned material stack and said gate dielectric located on said sidewalls and said bottom wall of said upper portion of said at least one patterned material stack; and forming a second gate electrode portion on an upper surface of said first gate electrode portion.