Patent ID: 7948912

Claim:
A semiconductor integrated circuit comprising: A signal input terminals which include control input pads, A being an integer greater than or equal to 2; an internal circuit; a clock signal input terminal to which a clock signal is input; and an input signal control block which, in a test mode, separates time-division multiplexed data having a multiplicity of X, the time-division multiplexed data being input from Y signal input terminals among the A signal input terminals, into individual data in accordance with the clock signal, and outputs the separated individual data to the internal circuit, X being an integer greater than or equal to 2, wherein, if A/X results in an integer, then Y equals A/X; and wherein, if A/X results in a non-integer, then Y equals A/X rounded up to a closest higher integer, wherein in a normal operation mode, the input signal control block outputs data input from the A signal input terminals to the internal circuit.