Patent ID: 8375558

Claim:
A semiconductor apparatus, having a plurality of semiconductor chip through-lines, each through-line having a first end and a second end, for transmitting signals commonly to a plurality of stacked semiconductor chips, comprising: a first test pulse signal transmission unit configured to transmit first test pulse signals to the first ends of the semiconductor chip through-lines during a power-up operation; a second test pulse signal transmission unit configured to transmit second test pulse signals to the second ends of the semiconductor chip through-lines after the first test pulse signal is transmitted; a first signal reception unit coupled to at least one of the first ends of the semiconductor chip through-lines, and configured to receive the first and second test pulse signals transmitted from the first and second test pulse signal transmission units, respectively; and a second signal reception unit coupled to at least one of the second ends of the semiconductor chip through-lines, and configured to receive the first and second test pulse signals transmitted from the first and second test pulse signal transmission units, respectively.