Patent ID: 7231487

Claim:
An automatic decoding method for mapping and selecting a non-volatile memory device having a LPC serial communication interface, wherein the memory is equipped with a plurality of addressing pins and mounted on a motherboard together with other memories of the same type bidirectionally connected with a controller putting it into communication with a processor housed in turn on the motherboard, comprising: a processor that compares the addressing pins of each memory with a portion of a plurality of addressing coding bits both to identify an addressing type to be used, top-down or bottom-up, and to determine which memory is polled by the controller for a given operation; wherein the addressing coding is a thirty-two-bit coding and the most significant bits A<31:25> are used to identify the addressing type, while some intermediate bits A<24:21> are used for being compared with the addressing pins to determine which memory is polled by the controller.