Patent ID: 8438509

Claim:
A method of generation of oxide pillar (PX) slot shapes of a PX layer within silicon-on-insulator (SOI) structures, the method comprising: generating, using a computer, a placement grid on recess oxide (RX) shapes; creating PX placement markers on the placement grid along a perimeter of the RX shapes; filtering the PX placement markers; generating a PX slot shape corresponding to each filtered PX placement marker on the RX shapes; correcting location errors associated with the generated PX slot shapes; generating PX slot shapes on RX shapes of a predetermined size for which PX slot shapes were not generated; performing a verification operation of the PX slot shapes; and outputting the PX layer including the verified PX slot shapes; wherein correcting location errors associated with the generated PX slot shapes comprises merging PX slot shapes that do not intersect or have a common border but which are perpendicular to each other and within a predetermined distance each other.