Patent ID: 8722519

Claim:
A semiconductor fabrication method, comprising: creating a data set which defines a set of tiles for a polysilicon deposition process; deriving a polysilicon deposition mask set from the data set, wherein the polysilicon deposition mask set includes a plurality of polysilicon tiles overlying inactive regions of a substrate; deriving an epitaxial growth mask set from the data set, wherein the epitaxial growth mask set includes a plurality of epitaxial tiles overlying inactive regions of a substrate; and using the polysilicon deposition mask set and the epitaxial growth mask set to make a semiconductor device; wherein the epitaxial growth mask set is derived from the data set by using at least a portion of the tile pattern defined in the data set for at least a portion of the tile pattern defined in the polysilicon deposition mask set; reconfiguring the epitaxial growth mask set, thereby defining a reconfigured epitaxial growth mask set; wherein reconfiguring the epitaxial growth mask set includes modifying an aspect of the tiles defined therein for an epitaxial process.