Patent ID: 8507887

Claim:
A resistance change memory comprising: a first interconnect line extending in a first direction; a second interconnect line extending in a second direction intersecting with the first direction; a cell unit which is provided at the intersection of the first interconnect line and the second interconnect line and which includes a memory element and a non-ohmic element that are connected in series; the non-ohmic element having a first semiconductor layer and a conductive layer adjacent to the first semiconductor layer, the first semiconductor layer including a first semiconductor region, a second semiconductor region and at least one diffusion buffering region, the first semiconductor region provided between the conductive layer and the second semiconductor region, wherein the diffusion buffering region is different in crystal structure from the first semiconductor layer except for the diffusion buffering region in the first semiconductor layer, the concentration of an impurity in the first semiconductor region is higher than the concentration of an impurity in the second semiconductor region, and the diffusion buffering region is disposed in the first semiconductor region.