Patent ID: 7992120

Claim:
A computer-implemented method of estimating signal congestion in routing resources of a programmable logic device (PLD), wherein the routing resources comprise a plurality of nodes and a plurality of wires which may be selectively interconnected to provide a plurality of signal paths through the PLD, the method comprising: determining in a computing device a plurality of wire congestion values, wherein each of the wire congestion values identifies a relative likelihood of a corresponding one of the wires being used to provide the signal paths in comparison with the other wires; detecting in the computing device a selection of a first region of the routing resources; determining in the computing device a first congestion density estimate for the first region using the wire congestion values associated with the wires of the first region; detecting in the computing device a selection of a second region of the routing resources; determining in the computing device a second congestion density estimate for the second region using the wire congestion values associated with the wires of the second region; and comparing the first and second congestion density estimates to determine the relative congestion density of the first and second regions.