Patent ID: 7170153

Claim:
A semiconductor device manufactured by the method comprising the steps of: preparing a semiconductor chip of an integrated circuit with connecting terminals formed on the chip; preparing a wiring substrate having a main surface, a rear surface opposite to the main surface, a plurality of wiring layers disposed along the periphery of the main surface, and via-holes formed underneath the plurality of wiring layers, wherein said wiring substrate is arranged to have a thickness less than that of said semiconductor chip; forming conductors connected to the wiring layers, extending through the via-holes and protruding from the rear surface to form external terminals; fixing said semiconductor chip to the main surface of the wiring substrate; electrically connecting terminals on the semiconductor chip with corresponding wiring layers on the main surface of the wiring substrate by connecting means, respectively; and encapsulating said semiconductor chip, the main surface of said wiring substrate and said plurality of connecting means with insulating material, wherein said conductors are formed by selectively printing material including conductors so as to fill the via-holes and to protrude from the rear surface of the wiring substrate to a predetermined height less than the thickness of said wiring substrate and hardening the printed material, and the thickness of the semiconductor device between the top surface of the encapsulation and the tip of the external terminals is about 0.5 mm or smaller.