Patent ID: 7327361

Claim:
A three-dimensional image generating apparatus which generates a three-dimensional image according to an operator's operation input, comprising: operation input detecting programmed logic circuitry which detects the operator's operation input; object data storage which stores object data for rendering objects forming a three-dimensional image; virtual three-dimensional space generating programmed logic circuitry which generates a virtual three-dimensional space based on the operation input detected by said operation input detecting programmed logic circuitry and the object data stored in said object data storage; viewpoint controlling programmed logic circuitry which controls a viewpoint within the virtual three-dimensional space generated by said virtual three-dimensional space generating programmed logic circuitry; display image generating programmed logic circuitry which generates an image of said virtual three-dimensional space seen from the viewpoint controlled by said viewpoint controlling programmed logic circuitry, which is projected within said three-dimensional space; depth value storage which stores a depth value of each pixel of the image generated by said display image generating programmed logic circuitry; object arrangement position storage which stores at least an arrangement position of a specific object in said virtual three-dimensional space; determination point setting programmed logic circuitry which sets a predetermined number of determination points around a predetermined perimeter containing the arrangement position of said specific object in said image; determining programmed logic circuitry which determines whether or not a first depth value of the predetermined number of determination points set by said determination point setting programmed logic circuitry is smaller than a second depth value of said specific object; and a degree-of-hiding calculator which calculates a degree of hiding of said specific object according to the number of said determination points where it is determined by said determining programmed logic circuitry that said first depth value is smaller than said second depth value.