Patent ID: 8058683

Claim:
An access device adapted for use in a semiconductor device and comprising: a vertically oriented channel separating a lower source/drain region and an upper source/drain region; a gate dielectric disposed on the channel; a unified gate electrode/connection line coupled to the channel across the gate dielectric, wherein the unified gate electrode/connection line is formed on a first interlayer insulating layer and over the lower source/drain region, and comprises; a descending lip portion having a vertical edge disposed directly on the gate dielectric, and a lower lateral edge extending from the vertical edge away from the channel to overlay at least a portion of the lower source/drain region, and a lateral portion extending laterally from the descending lip portion away from the channel and having a flat lateral lower surface disposed on the interlayer insulating layer, wherein an upper surface of the lower source/drain region is lower than an upper surface of the first interlayer insulating layer.