Patent ID: 7421022

Claim:
An error mixer for an electronic dispersion compensation system including a feed forward equalizer for producing delayed output signals, and a decision feedback equalizer, said error mixer comprising: a plurality of N series-connected delay circuits for delaying the input signal S(t) a selected number of times, where N is a selected integer; a plurality of N+1 taps connected to carry said input signal S(t) and to carry N delayed versions of S(t), each tap except the last being separated from the next following tap by one of said N series-connected delay circuits; a plurality of N+1 multipliers connected to receive S(t) and said N delayed versions of S(t) for multiplying the value of the input signal S(t) from the input terminal and the delayed versions of S(t) from each of the N+1 taps by the value of an error signal e(t) to produce thereby a plurality of N+1 output signals; a plurality of N+1 amplifiers connected to amplify the N+1 output signals produced by the N+1 multipliers; a plurality of N+1 low-pass filters connected to receive and filter the N+1 output signals from the N+1 amplifiers to produce a plurality of N+1 filtered output signals; a plurality of N+1 output leads from the N+1 low-pass filters for transmitting said plurality of N+1 filtered output signals, each filtered output signal representing a coefficient C i to be used to multiply and weight corresponding delayed output signals from the feed forward equalizer to provide an output signal D(t) for use in generating the error signal e(t); a selected number of adders, each adder having at least two input leads, and an output lead; a switch corresponding to each adder, each switch having an input lead and an output lead, the input lead of each switch being connected to an output lead from a corresponding one of said low pass filters, the output lead from each switch being connected to one input lead of a corresponding one of said selected number of adders; and a voltage source connected to a second input lead of each of said selected number of adders for causing the output signal from the output lead of each of said selected number of adders to assume a selected value.