Patent ID: 7035269

Claim:
A method of providing synchronized clock signals at “N” distributed nodes in a synchronous system, the nodes comprising a master node and a plurality of slave nodes interconnected by first and second propagation channels, comprises the steps of: at the master node, (i) generating a first pulse train and a second pulse train each being regular and having a period (T), (ii) propagating the first pulse train around the plurality of slave nodes via the first propagation channel; (iii) propagating the second train of pulses around the plurality of slave nodes via the second propagation channel such that the pulses of the second train of pulses arrive at respective ones of the plurality of slave nodes in reverse order to the pulses of the first pulse train; and (iv) maintaining the rate of each of the first and second pulse trains such that there are “pN” pulses in each propagation channel at any time, where “N” is the number of nodes, including the master node, and “p” is an integer, the pulses of the first train of pulses arrive at respective ones of the plurality of slave nodes substantially simultaneously, and the pulses of the second train of pulses arrive at respective ones of the plurality of slave nodes substantially simultaneously; and at each of the slave nodes, (v) detecting arrival at a predetermined detection point of a pair of pulses, the pair comprising one pulse from each of the first pulse train and the second pulse train; and (vi) generating a clock signal event in dependence upon the pair of pulses both arriving at the detection point with a phase difference below a preset level.