Patent ID: 8102210

Claim:
An amplifier circuit comprising: a differential pair of first type transistors at input, wherein a source or emitter of each transistor of the differential pair is connected to receive a current generated by a current source, a gate or base of a first transistor of the differential pair defines a non-inverting input and a gate or base of a second transistor of the differential pair defines an inverting input, wherein a drain or collector of the first transistor of the differential pair is connected to a first second-type diode-connected transistor of a first current mirror, and a drain or collector of the second transistor of the differential pair is connected to a first second-type diode-connected transistor of a second current mirror, wherein a first first-type diode-connected transistor of a third current mirror is connected to a drain or collector of a second second-type transistor, of the second current mirror, while a drain or collector of a second first-type transistor of the third current mirror is connected to a drain or collector of a second second-type transistor of the first current mirror to define an output of the amplifier circuit, wherein the third current mirror is connected in series with the first current mirror and with the second current mirror between two terminals of a supply voltage source to allow the output signal to operate rail to rail, wherein the amplifier circuit further comprises a first complementary second-type transistor, connected in parallel with the first second-type diode-connected transistor of the first current mirror and connected in the form of a reverser with the first transistor of the differential pair, wherein a gate or base of the first complementary second-type transistor is connected to the gate or base of the first transistor of the differential pair, and wherein the amplifier circuit further comprises a second second-type complementary transistor, connected in parallel with the first second-type diode-connected transistor of the second current mirror, and connected in the form of a reverser with the second transistor of the differential pair, wherein a gate or base of the second second-type complementary transistor is connected to the gate or base of the second transistor of the differential pair.