Patent ID: 7094620

Claim:
A semiconductor device manufacturing method comprising: (a) forming an interconnection in a surface of an insulating layer provided on a semiconductor substrate; (b) selectively removing said insulating layer to form a first opening that exposes said semiconductor substrate; (c) after said selectively removing (b), forming, over said insulating layer, a sacrificial layer having a second opening that exposes a center portion of said interconnection and a third opening that includes said first opening and is larger than said first opening; (d) forming a conductive semiconductor all over the structure obtained in said forming (c); (e) forming a first mask on said conductive semiconductor; (f) etching said conductive semiconductor using said first mask to form a first electrode connected to said interconnection; (g) forming a conductive film all over the structure obtained in said etching (f); (h) selectively removing said conductive film to form a second electrode in contact with said semiconductor substrate in said first opening; and (i) removing said sacrificial layer.