Patent ID: 7996602

Claim:
An apparatus comprising a translator that selects one or more ranks of parallel memory devices from a plurality of available ranks of parallel memory devices in a plurality of double data rate registered and/or unbuffered dual in-line memory modules (DDR registered and/or unbuffered DIMMs) through employment of a native fully buffered dual in-line memory module protocol (native FB-DIMM protocol), said protocol allowing a selection of at most two ranks of parallel memory devices on an FB-DIMM, wherein the translator employs one or more signals from a plurality of signals received under the native FB-DIMM protocol to allow selection of any of more than two ranks of parallel memory devices from the plurality of available ranks of parallel memory devices in the plurality of DDR registered and/or unbuffered DIMMs; wherein the plurality of available ranks of parallel memory devices comprises sixteen ranks of parallel memory devices, wherein the plurality of DDR registered and/or unbuffered DIMMs comprises four DDR registered and/or unbuffered DIMMs, wherein the native FB-DIMM protocol comprises DIMM select bits (bits DS0 to DS2) and rank select bit (bit RS); and wherein the translator interprets the bits RS and DS0 to DS2 of the native FB-DIMM protocol to select any corresponding rank of the sixteen ranks of parallel memory devices in the four DDR registered and/or unbuffered DIMMs.