Patent ID: 7888806

Claim:
A semiconductor package comprising: a package substrate having first terminals and second terminals; a semiconductor chip mounted on the package substrate, the semiconductor chip comprising: a semiconductor substrate; internal circuitry formed on the semiconductor substrate; a dielectric layer formed on the internal circuitry; a plurality of chip pads disposed on the dielectric layer and in electrical communication with the internal circuitry; a passivation layer formed on the dielectric layer and the chip pads, the passivation layer having an opening to expose a portion of one of the chip pads; and a conductive line disposed on the dielectric layer, the conductive line being substantially electrically isolated from the internal circuitry and any other circuits internal to the semiconductor chip; a first electrical connection formed between the conductive line and one of the first terminals; and a second electrical connection connecting one of the chip pads to one of the second terminals through the opening.