Patent ID: 7268362

Claim:
A semiconductor device comprising: a substrate, the substrate comprising a material having a lattice constant greater than or equal to silicon; a first layer on the substrate, wherein the first layer comprises a material having a lattice constant greater than the substrate; a gate above the first layer, the gate comprising a gate electrode and a gate dielectric underlying the gate electrode; a spacer, the spacer formed on a sidewall of the gate electrode, a sidewall of the gate dielectric, and a portion of a top surface of the first layer; and a second layer formed on the first layer, the second layer comprising a top surface, a bottom surface, and a lateral surface connecting the top surface and the bottom surface, the second layer further comprising a material having a lattice constant less than the first layer, wherein the second layer underlies the gate electrode and at least a portion of the spacer, and wherein the top, bottom, and lateral surfaces of the second layer contact the first layer whereby the first layer fully encapsulates the second layer.