Patent ID: 8681307

Claim:
A method for producing an insulated gate transistor, said method comprising the steps of: (a) forming at least one metal layer on a main surface of a transparent insulating substrate; (b) forming a photosensitive resin pattern on the at least one metal layer so that the photosensitive resin pattern has a thickness which is thicker in an area corresponding to a gate electrode than in an area corresponding to source and drain formation areas; (c) selectively forming a gate electrode pattern, made up of the at least one metal layer, with use of the photosensitive resin pattern; (d) exposing the at least one metal layer in the source and drain formation areas above respective edge parts of the gate electrode, by reducing a thickness of the photosensitive resin pattern; (e) fluorinating a surface of the photosensitive resin pattern, whose thickness has been reduced, by dry etching with fluorine gas; (f) applying transparent inorganic insulating resin onto the surface which has been fluorinated in the step (e); (g) removing the photosensitive resin pattern, which has been fluorinated; (h) forming at least a gate insulating layer and a semiconductor layer; and (i) forming source and drain lines so that (a) the source and drain lines and (b) the source and drain formation areas, respectively, overlap each other.