Patent ID: 8791524

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor layer containing an impurity element; a stacked body provided above the semiconductor layer and including a plurality of electrode layers stacked in a first direction perpendicular to the semiconductor layer; a channel body layer including a pair of vertical portions each extending in the first direction through the stacked body and a horizontal portion provided between the stacked body and the semiconductor layer, each of the vertical portions being provided through the electrode layers stacked in the first direction and connected via the horizontal portion to each other; a multi-layer insulating film provided around the channel body layer, the multi-layer insulating layer including a first portion provided between the vertical portion and each electrode layer, and a second portion provided around the horizontal portion; a first insulating wall provided between the pair of vertical portions of the channel body layer, and extending in the first direction through the stacked body; and a second insulating wall provided outside the vertical portions of the channel body layer and extending in the first direction from the semiconductor layer through the stacked body, and the second portion of the multi-layer insulating film extending in a second direction parallel to the semiconductor layer so as to contact the second insulating wall under the stacked body.