Patent ID: 6996650

Claim:
Apparatus for implementing multiple configurable sub-busses of a point-to-point bus comprising: a plurality of bus interconnects, each bus interconnect including a transmit interface and a receive interface connected to said point-to-point bus; each said transmit interface including a transmit buffer and a serializer coupled between said transmit buffer and said point-to-point bus; said transmit buffer providing an asynchronous interface between a transmit source and said serializer; said serializer receiving data and control signals from said transmit buffer at a first frequency and transmitting data and control signals over said point-to-point bus at a higher frequency; transmit steering logic coupled between said transmit source and each said transmit buffer of said plurality of bus interconnects; said transmit steering logic directing data and control signals from said transmit source to each selected one of said transmit buffers based upon a selected bus configuration; first control logic coupled to said transmit steering logic for operatively controlling said transmit steering logic for said selected bus configuration; each said receive interface including a deserializer connected to said point-to-point bus and a receive buffer coupled between said deserializer and a receive destination; said receive buffer providing an asynchronous interface between said deserializer and said receive destination; said deserializer receiving data and control signals from said point-to-point bus at said higher second frequency and applying data and control signals to said receive buffer at a third frequency of said receive destination; receive steering logic coupled between said receive destination and said receive buffer of each of said plurality of bus interconnects directing data to said receive destination from each selected one of said receive buffers based upon said selected bus configuration; and second control logic coupled to said receive steering logic for operatively controlling said receive steering logic for said selected bus configuration.