Patent ID: 8796102

Claim:
A method of forming a resistive device for a non-volatile memory device, comprising: providing a substrate having a surface region; forming a first dielectric material overlying the surface region of the substrate; forming a first wiring material overlying the first dielectric material; forming a junction material comprising a p-doped silicon-bearing material overlying the first wiring material; subjecting the first wiring material and the junction material to a first pattern and etch process to form one or more bottom wiring structures and expose a portion of the first dielectric material, the one or more bottom wiring structures comprising the first wiring material and the junction material; forming a second dielectric material overlying the one or more bottom wiring structure; forming an opening structure in a portion of the second dielectric material to expose a portion of the junction material; forming a resistive switching material comprising an amorphous silicon-bearing material overlying at least the portion of the junction material in the opening structure, the amorphous silicon-bearing material having an intrinsic semiconductor characteristic; forming a conductive material overlying the resistive switching material, the conductive material being in physical contact and electric contact with the resistive switching material; removing concurrently a portion of the conductive material and a portion of the resistive switching material to expose a portion of second dielectric material, sidewalls of the conductive material and sidewalls of the resistive switching material, while maintaining conductive material and resistive switching material in the opening structure in physical contact and electric contact with the junction material, and forming a second wiring structure overlying the conductive material in the opening structure and overlying the portion of the second dielectric material.