Patent ID: 7870458

Claim:
A decoding system, comprising: a plurality of serial concatenated convolutional code (SCCC) decoders arranged in parallel and configured for concurrently decoding a codeblock which has been encoded using a convolutional code; and a single common address generating means including an address generator and a data store comprising a plurality of memory blocks, said address generator operatively coupled to said plurality of SCCC decoders and responsive to requests for memory addresses of a plurality of data segments needed by said plurality of SCCC decoders for permutation and depermutation, said address generator operatively coupled to said data store and configured to retrieve data stored in said plurality of memory blocks of said data store, said data including information needed by said address generator in order to generate said memory addresses; wherein said data comprises groups of data types, selected ones of said groups of data types stored in separate ones of said plurality of memory blocks based on a predetermined likelihood that data from particular groups will be concurrently needed by said address generator.