Patent ID: 7561089

Claim:
An apparatus for digital to analogue conversion of an input signal (D o ) to an output signal (U d , OUT) comprising: a control circuit comprising: a capacitor coupled to a switch circuit for charging said capacitor to a reference voltage value (V ref ) during a first phase (φ 1 ) of a clock signal, and for discharging said capacitor through a discharge circuit during a second phase (φ 2 ) of said clock signal, said discharge circuit regulating a discharge of said capacitor to produce a control discharge current, wherein said discharge circuit provides a discharge path including a discharge transistor, wherein a voltage across said capacitor determines an operating mode of said discharge transistor such that in said second phase said discharge transistor operates in a first mode to provide an approximately constant discharge current, and subsequently operates in a second mode for discharging said capacitor before an end of said second phase; and an output circuit coupled to receive said input signal (D o ), and coupled to said control circuit, for responding to said control discharge current for producing said output signal (U d , OUT) as a function of said control discharge current and said input signal (D o ).