Patent ID: 8621401

Claim:
A method of selecting a set of illumination conditions of a lithographic apparatus, in a process for transferring an integrated circuit layout to a target substrate, the layout comprised of a number of polygon patterns having a predetermined geometrical relation relative to each other, the method comprising: providing, with a processor, an initial set of illumination conditions; providing a plurality of polygon patterns requiring illumination conditions critical for circuit functionality; calculating for the initial set of illumination conditions a local cost number, defining a difference measure of at least one critical dimension, between the polygon pattern and a transferred polygon pattern as a function of illumination condition; aggregating for each polygon pattern the cost numbers; and varying the illumination conditions so as to select an optimal set of illumination conditions having an optimized aggregated cost number, wherein the method further comprises: identifying polygon patterns as predefined complex circuit elements and wherein the cost numbers are expressed as circuit element cost number functions that are individually associated with said identified complex circuit elements, so as to express circuit design intent.