Patent ID: 7809285

Claim:
A receiving circuit comprising: a transimpedance amplifier including an inversion amplifier for amplifying an input current, and a feedback resistance connected in parallel between an input and an output of the inversion amplifier, wherein a gain of the transimpedance amplifier is adjusted in accordance with a control signal; a comparison circuit for comparing an output value of the transimpedance amplifier with a first comparative value set for determining an output level of the transimpedance amplifier, and outputting a result of the comparison; and a control circuit for holding the comparison result output from the comparison circuit, generating the control signal based on the held comparison result, and transmitting the generated control signal to the transimpedance amplifier, wherein the control circuit includes: a plurality of latch circuits for holding the comparison result output from the comparison circuit; a control signal generating circuit for generating the control signal for adjusting the gain of the transimpedance amplifier based on output results of the plurality of latch circuits, and transmitting the control signal to the transimpedance amplifier; and a reset signal generating circuit for generating, based on the reset signal, the held-value resetting signal which is transmitted to the plurality of latch circuits to cause the latch circuits to go to a non-operating state, and which is successively caused not to be transmitted to the latch circuits so that the latch circuits are successively caused to go to an operating state in which the comparison result output from the comparison circuit is held, and the control circuit outputs the control signal so as to adjust the gain of the transimpedance amplifier until the output of the transimpedance amplifier exceeds the first comparative value, wherein the control signal generating circuit generates the control signal for adjusting the gain of the transimpedance amplifier based on the comparison results output by the plurality of latch circuits, and when the output of the transimpedance amplifier exceeds the first comparative value, transmits a stop signal to the reset signal generating circuit to hold a state at that time, and does not generate a new signal.