Patent ID: 8559238

Claim:
A processor-based system comprising: at least one processor; a user interface coupled to the processor; a display coupled to the processor; at least one communications port coupled to the processor; a memory operably coupled to the processor, wherein the processor controls the system by implementing software programs stored in the memory; the memory comprising a plurality of dies in a stacked configuration, the die comprising: a top surface and a bottom surface separated by a thickness, the die configured to receive a control signal and provide a first path for the control signal disposed through the die from the top surface to the bottom surface in a direction generally parallel to the thickness and a second path disposed through the die from the top surface to the bottom surface in the direction generally parallel to the thickness; a circuit included in the die, the circuit configured to be enabled by the control signal via the first path or the second path; and a path selector comprising a multiplexer to select the first path or the second path for transmission of the control signal.