Patent ID: 7834701

Claim:
A bias circuit which outputs the same bias voltage through a plurality of output terminals thereof, the bias circuit comprising: an operational amplifier having a differential amplifier circuit and a built-in CMOS output amplifier circuit including a first transistor and a second transistor with a gate to which an output voltage of the differential amplifier circuit is given; and a plurality of CMOS output amplifier circuits each including third and fourth transistors each of which has the same configuration as that of the built-in CMOS output amplifier circuit, wherein in the differential amplifier circuit of the operational amplifier, a constant voltage is supplied to a non-inverting input circuit and an output of the built-in CMOS output amplifier circuit of the operational amplifier is fed back to an inverting input terminal, the built-in CMOS output amplifier circuit and the plurality of CMOS output amplifier circuits are connected in parallel, a gate of the third transistor of each of the plurality of CMOS output amplifier circuits is connected to a gate of the first transistor of the built-in CMOS output amplifier circuit and a gate of the fourth transistor of each of the plurality of CMOS output amplifier circuits is connected to the gate of the second transistor of the built-in CMOS output amplifier circuit, and a drain connection point of the third and fourth transistors of each of the plurality of CMOS output amplifier circuits is connected to an associated one of the plurality of output terminals.