Patent ID: 8034659

Claim:
A method of manufacturing semiconductor devices, comprising the steps of: preparing a layered product in which a dicing tape, an adhesive layer, and a semiconductor wafer are stacked in this order so that a circuit surface of the semiconductor wafer may face the dicing tape side; recognizing a cutting position by recognizing a circuit pattern in the circuit surface from a surface opposite to the circuit surface of the semiconductor wafer; cutting at least the semiconductor wafer and the adhesive layer in a thickness direction of the layered product after recognizing the cutting position; fabricating a semiconductor chip, upon which the adhesive layer is adhered, by curing the dicing tape after the cutting step, and then peeling off the dicing tape and the adhesive layer; aligning a terminal in the circuit surface of the semiconductor chip, upon which the adhesive layer is adhered, with a wiring of a wiring substrate; and bonding the wiring substrate and the semiconductor chip via the adhesive layer so that the wiring of the wiring substrate and the terminal of the semiconductor chip may be electrically connected to each other.