Patent ID: 8098083

Claim:
An off-chip driver (OCD), comprising: a time domain stage, coupled to a logic input, comprising: a plurality of buffers, for generating at least a first delayed voltage signal and a second delayed voltage signal in response to a logic signal; and a mechanism to provide at least a first delayed voltage and a second delayed voltage, whereby a delay between the first and second delayed voltages reverse tracks process, voltage, and temperature (PVT) variations; a pre-driver stage, coupled to the time domain stage, for receiving at least the first delayed voltage signal and the second delayed voltage signal and generating at least a first driving voltage and a second driving voltage according to the first delayed voltage signal and the second delayed voltage signal, respectively; a final driver stage, coupled to the pre-driver stage, for utilizing the first driving voltage and the second driving voltage to generate a slew rate controlled final output voltage; and a bias circuit, coupled to the time domain stage, for providing bias voltages to the second delayed voltage signal that compensate for the PVT variations on the time domain stage.