Patent ID: 8098098

Claim:
An amplifier circuit comprising: an amplifier section that includes a P-type differential section that includes P-type transistors, an N-type differential section that includes N-type transistors, and an output section that outputs an output signal based on an output from the P-type differential section and an output from the N-type differential section; an offset adjustment section that adjusts an offset of the amplifier section; a first offset adjustment register that stores a first offset adjustment value for the P-type differential section; a second offset adjustment register that stores a second offset adjustment value for the N-type differential section; a control section that performs an offset setting process that sets the first offset adjustment value stored in the first offset adjustment register into the offset adjustment section in a first operation mode in which the P-type differential section operates, and sets the second offset adjustment value stored in the second offset adjustment register into the offset adjustment section in a second operation mode in which the N-type differential section operates; and a detection section that detects a first timing at which an operation mode of the amplification section is switched from the first operation mode to the second operation mode, and a second timing at which the operation mode is switched from the second operation mode to the first operation mode, the detection section detecting the first timing using a first reference voltage, detecting the second timing using a second reference voltage that is lower in potential than the first reference voltage, and the control section performing the offset setting process based on a detection result of the detection section.