Patent ID: 7625791

Claim:
A method for forming a semiconductor device comprising: providing a semiconductor substrate having a PMOS, region and an NMOS region; forming a high-k gate dielectric over said semiconductor substrate in said PMOS and NMOS regions; and forming a gate structure in said PMOS region and a gate structure in said NMOS region including: forming a PMOS gate structure in said PMOS region, said PMOS gate structure including at least said high-k gate dielectric, a work function tuning layer over said high-k gate dielectric and a first, metal layer over said work function tuning layer, and forming an NMOS gate structure in said NMOS region, said work function tuning layer and said first metal layer absent from said NMOS gate structure and said NMOS gate structure including said high-k gate dielectric with at least one dopant incorporated therein and a second metal layer over said high-k gate dielectric, said high-k dielectric in said PMOS region being deficient of said at least one dopant.