Patent ID: 7260662

Claim:
A method of controlling an I2C bus which connects an IC for communication control to either a non-volatile external memory or an MCU, the method comprising: causing an I2C interface circuit of the IC for communication control to output a serial clock signal and to read initial setting data from the non-volatile external memory or MCU via the I2C bus in response to a hardware RESET signal from a host; causing the host to output a RESET command to the IC for communication control to software-reset the IC for communication control, thereby stopping the output of the serial clock signal from the I2C interface circuit; and causing the I2C interface circuit of the IC for communication control to forcedly output a serial clock signal including a series of pulses in a number corresponding to length of remaining data which the non-volatile external memory or MCU originally output to the IC, to make the non-volatile external memory or MCU recognize interrupted I2C communications as if properly completed, and free the I2C bus.