Patent ID: 8760828

Claim:
A circuit with an electro-static discharge clamp coupled to a first power source and second power source, comprising: an NMOS transistor stack comprising: a first NMOS transistor with gate node ng 1 and a drain connected to the first power source; a second NMOS transistor with gate node ng 2 , the second NMOS transistor being stacked with the first NMOS transistor and a source connected to ground; and an electro-static discharge detector configured to control the NMOS transistor stack, wherein the electro-static discharge detector further comprising: a first switch configured to switch the gate node ng 1 to the first power source; a second switch configured to switch the gate node ng 1 to the gate node ng 2 ; a third switch configured to switch the gate node ng 2 to the ground; and an electro-static discharge sensor coupled to and configured to control the second switch and the third switch but not the first switch.