Patent ID: 7613961

Claim:
A method for testing a central processing unit (CPU) register, the method comprising: scheduling user code instructions during a compiling of a software program to be executed on a target CPU; and opportunistically scheduling diagnostic testing of CPU registers during said compiling so that testing of the CPU registers occurs within normal running of the user code instructions during execution of the program after said compiling, wherein all of the CPU registers are scheduled for some level of diagnostic testing, the opportunistically scheduling diagnostic testing comprising: checking a predetermined level of aggressiveness for the scheduling of a register diagnostic; determining a next register to be tested; determining if there is sufficient opportunity to schedule a register diagnostic instruction to test the next register without substantially impacting performance of the program, wherein if there is the sufficient opportunity, then scheduling the register diagnostic instruction to test the next register, and if there is insufficient opportunity to schedule the register diagnostic instruction, then scheduling the user code instructions; and if an error in a CPU register of the CPU registers is indicated, jumping to a fault handler routine.