Patent ID: 6970982

Claim:
A method for maintaining Translation Lookaside Buffer (TLB) consistency in a system comprising a shared memory and a plurality of processing elements coupled to said shared memory, wherein each of said plurality of processing elements comprises a processing unit, a direct memory access controller and a plurality of attached processing units, wherein each of said plurality of direct memory access controllers comprises a TLB, the method comprising the steps of: invalidating a copy of a page table entry that was updated in a particular TLB of a direct memory access controller associated with a particular processing unit by said particular processing unit; broadcasting a TLB invalided entry instruction to each of said plurality of processing units other than said particular processing unit by said particular processing unit; determining whether to invalidate any entries in the TLB's associated with each of said plurality of direct memory access controllers other than the direct memory access controller associated with said particular processing unit; and issuing a synchronization instruction to each of said plurality of processing units other than said particular processing unit by said particular processing unit.