Patent ID: 7279923

Claim:
An LSI inspection method, comprising: a first step of identifying, after a front-end process is completed, a chip having a defect among all chips formed on a wafer and determining a type of defect for each defect that the identified chip has, on the basis of inspection data obtained by inspecting the wafer for a defect by means of a defect inspection apparatus after processing is performed in each of predetermined process steps among a plurality of process steps in the front-end process; a second step of judging, for each chip identified in said first step, whether the chip is a non-conforming article or not according to non-conforming article judgment criteria corresponding to the type of defect for each defect that the chip has and obtaining position information within a surface of the wafer of a chip judged as being a non-conforming article, the non-conforming article judgment criteria for each predetermined type of defect being pre-set on the basis of design data of the wafer, according to which criteria whether a chip formed on the wafer is a non-conforming article or not is judged; a third step of transmitting the position information within the surface of the wafer of each chip judged as being a non-conforming article in said second step to a test apparatus that tests an electric property of each chip formed on the wafer; and a fourth step of not running a test on a chip identified on the basis of the position information transmitted in said third step and running the test on chips other than the identified chip, by means of said test apparatus.