Patent ID: 7386042

Claim:
A method of measuring jitter in a digital signal comprising: forming a jitter-free offset reference clock signal from said digital signal being offset by a predetermined frequency amount from said digital signal, wherein the jitter-free offset reference clock signal moves relative to a transition point for bits of the digital signal; sampling said digital signal with only a reference clock signal at sampling times determined by an integer multiple of the frequency of said jitter-free offset reference clock signal, such that, in the absence of jitter and said offset by a predetermined frequency, there are a predetermined number of sampling times in each bit of said digital signal; detecting occasions when the number of sampling times in any bit of said digital signal is different from said predetermined number; counting said occasions over a predetermined time, and deriving at least one measure of jitter from said counting of said occasions; wherein one of said at least one measure of jitter is obtained by counting up one value for each of said occasions representing sampling times greater than the predetermined number within a bit to a maximum value, counting down one value for each of said occasions representing sampling times less than the predetermined number within a bit to a minimum value and determining a difference between the maximum count value and the minimum count value.