Patent ID: 8654231

Claim:
A semiconductor device comprising: a plurality of pixels arranged in a matrix, each of the plurality of pixels comprising: a photodiode; a signal charge accumulation portion; a charge accumulation control transistor, wherein one of a source and a drain of the charge accumulation control transistor is electrically connected to the photodiode and the other of the source and the drain of the charge accumulation control transistor is electrically connected to the signal charge accumulation portion; a reset transistor, wherein one of a source and a drain of the reset transistor is electrically connected to the signal charge accumulation portion; and an amplifying transistor, wherein a gate of the amplifying transistor is electrically connected to the signal charge accumulation portion, wherein a channel formation region in at least one of the charge accumulation control transistor and the reset transistor comprises an oxide semiconductor, wherein after a reset operation of the signal charge accumulation portion is performed in the plurality of pixels at substantially the same time, a charge accumulation operation by the photodiode is performed in the plurality of pixels at substantially the same time, and a read operation of a signal from each of the plurality of pixels is performed per row, and wherein gates of the reset transistors in the plurality of pixels are electrically connected to each other.