Patent ID: 8039323

Claim:
A method for manufacturing a semiconductor device, comprising the steps of: forming a device isolation layer surrounding a device forming area in a semiconductor layer with an impurity of a first conductivity type being diffused therein and forming a local insulating layer therein at a position separated from the device isolation layer, lying inside the device isolation layer; implanting, in a low concentration, an impurity of a second conductivity type opposite to the first conductivity type in the semiconductor layer located between one side of the local insulating layer and the device isolation layer and lying in a region adjacent to the other side of the local insulating layer thereby to form a low-concentration implantation layer; forming a second gate insulating film in the region adjacent to the other side of the local insulating layer lying over the low-concentration implantation layer; forming a first gate insulating film thinner than the second gate insulating film over the semiconductor layer with the first gate insulating film being connected to the second gate insulating film; forming a gate electrode over the first and second gate insulating films and the local insulating layer; diffusing the second conductivity type impurity implanted in the low-concentration implantation layer by heat treatment thereby to form a low-concentration diffusion layer in the semiconductor layer lying below a region between one side of the local insulating layer and the device isolation layer, below the local insulating layer and below the gate electrode; and diffusing, in a concentration higher than the low-concentration diffusion layer, the second conductivity type impurity in the low-concentration diffusion layer located on one side of the local insulating layer and the semiconductor layer lying in a source layer forming region adjacent to the side of the gate electrode, which is opposite to the local insulating layer thereby to form a drain layer and a source layer.