Patent ID: 7115491

Claim:
A method for forming a self-aligned contact in a semiconductor device, comprising the steps of: (a) providing a substrate having at least one gate structure and at least one diffusion region adjacent said gate structure; (b) forming a thin layer along a profile of said gate structure, including an entire top portion of said gate structure, and said diffusion region; (c) forming a first insulating layer at least covering said gate structure and said diffusion region; (d) removing a portion of said first insulating layer to expose the entire portion of said thin layer atop said gate structure; (e) forming a first part of a contact hole through said first insulating layer and exposing at least a portion of said diffusion region; (f) forming a first part of a contact in said first part of said contact hole; (g) forming a second insulating layer at least covering said gate structure and said first part of said contact; (h) forming a second part of said contact hole through said second insulating layer and exposing at least a portion of said first part of said contact; and (i) forming a second part of said contact in said second part of said contact hole.