Patent ID: 7760756

Claim:
An arbiter, comprising: a combination logic unit to: receive a plurality of input vectors, and logically combine the plurality of the input vectors into a combination vector; a plurality of input vector arbiters to develop a plurality of input vector results, where each of the plurality of the input vector arbiters is to: receive one of the plurality of the input vectors, and arbitrate on the received one of the plurality of input vectors to develop one of a plurality of input vector results; a combination arbiter to: receive the combination vector, and arbitrate on the combination vector to develop a combination vector result; and a plurality of comparison elements, each of the plurality of the comparison elements to: receive the combination vector result and one of the plurality of the input vector results, compare the received one of the plurality of the input vector results with the combination vector result, and identify when the received one of the plurality of the input vector results corresponds to the combination vector result, where a resource associated with the identified received one of the plurality of the input vector results that corresponds to the combination vector result is selected to be serviced.