Patent ID: 7296185

Claim:
A method for debugging in a computer system including a central processing unit connected to a North-bridge chipset and a South-bridge chipset, said method comprising: sending a system management interrupt signal from said South-bridge chipset to said central processing unit, thereby triggering a debugging tool program; executing said debugging tool program to pop out a debugging operation window upon said central processing unit entering a system management mode; selecting, in said debugging operation window, and executing at least one debugging item; setting a trap address for said debugging operation window; and leaving the debugging operation window upon an execution of said at least one debugging item has been completed; wherein, once the debugging tool program has been executed, said central process unit returns to execution of a next queued instruction, and wherein, after leaving said debugging operation window upon the execution of said at least one debugging item has been accomplished, said debugging operation window is popped out repeatedly from said trap address each time when said South-bridge chipset is triggered.