Patent ID: 8709896

Claim:
A method for fabricating a semiconductor device, the method comprising: forming a gate electrode on a first region of a semiconductor substrate formed of a first semiconductor, forming a first side wall insulating film on a first side surface of the gate electrode and forming a second side wall insulating film on a second side surface of the gate electrode; forming a first opening part and a second opening part with the first region interposed therebetween; forming a first insulating film on side surfaces and a bottom surface of the first opening part and also on side surfaces and a bottom surface of the second opening part; removing the first insulating film while allowing at least parts of the first insulating film to remain on the side surfaces of the first and the second opening parts; forming a first semiconductor layer and a second semiconductor layer in the first opening part and the second opening part, respectively, the first and the second semiconductor layers being formed of a second semiconductor which has etching selectivity to the first semiconductor; removing the first insulating film from the side surface of the first opening part and also from the side surface of the second opening part; forming a third semiconductor layer and a fourth semiconductor layer on the first semiconductor layer and the second semiconductor layer, respectively, after removing the first insulating film from the side surface of the first opening part and also from the side surface of the second opening part, the third and the fourth semiconductor layers being formed of the first semiconductor; exposing respective parts of the first semiconductor layer and the second semiconductor layer after forming the third semiconductor layer and the fourth semiconductor layer on the first semiconductor layer and the second semiconductor layer, respectively; removing the first and second semiconductor layers to form a third opening part and a fourth opening part after exposing the respective parts of the first semiconductor layer and the second semiconductor layer; forming a second insulating film in the third opening part and the fourth opening part; and implanting an impurity element in the third semiconductor layer and the fourth semiconductor layer to form a first diffusion region and a second diffusion region, respectively.