Patent ID: 8089526

Claim:
A circuit for processing video signal from a video sensor, the video signal comprising video content signal and synchronization signals, the circuit comprising: a data register storing the video content signal of the video signal; a status register providing a sampling clock signal to the data register and the video sensor, the sampling clock signal being synchronized with the synchronization signals to sample the video signal, the status register storing the synchronization signals of the video content signal; a processor coupled to the status register and the data register, the processor capable of reading the video content signal from the data register according to the synchronization signals in the status register; and wherein the status register has a state bit; when the data register stores data, the state bit is set to one; when the processor reads data from the data register, the state bit is set to zero; wherein the processor is allowed to read data from the data register when the state bit is set to one, and disallowed to read data from the data register when the state bit is set to zero; and wherein the processor is coupled to the data register and status register via a control bus capable of controlling the data register and the status register; the data register and the status register are coupled to the processor via a data bus capable of transferring data to the processor.