Patent ID: 8631266

Claim:
A method of a non-transitory computer-readable storage medium tuning a phase of a clock signal, the method comprising: performing data training on a plurality of data pins through which data are input and output, in synchronization with a data clock signal using a memory controller; determining one of the data pins to be a representative pin using the memory controller; performing clock and data recovery (CDR) on read data of the representative pin using the memory controller; and adjusting a phase of the data clock signal based on the CDR using the memory controller, wherein performing the CDR comprises: sampling an edge of the read data to determine a sampled edge of the read data using a sampler in the memory controller; detecting a phase difference of the sampled edge of the read data and the data clock signal using a decoder in the memory controller; and adjusting the phase of the data clock signal according to the detected phase difference using a phase interpolator in the memory controller.