Patent ID: 7932851

Claim:
A method for generating a signal in a device including processing circuitry, the method comprising the steps of: forming, in the processing circuitry, a plurality of blocks including a first block and a second block from sequences of components A 0 and A 1 , each of components A 0 and A 1 being of N bits, respectively, the first block including components A 0 and A 1 and the second block including components A 0 and −A 1 ; forming, in the processing circuitry, at least a pair of sequences from components B 0 and B 1 , each of B 0 and B 1 being of 2N bits, respectively; including the pair of sequences from components B 0 and B 1 in the first block and the second block, respectively; permuting, in the processing circuitry, the components A 0 , A 1 of the first block with the component B 0 ; permuting, in the processing circuitry, the components A 0 , −A 1 of the second block with the component B 1 ; generating a signal in the processing circuitry; and embedding, in the processing circuitry, the first and second permuted blocks in the generated signal.