Patent ID: 7501694

Claim:
A semiconductor device comprising: a semiconductor integrated circuit; an external connection terminal connecting the semiconductor integrated circuit to an external device; and a plurality of tin or tin-alloy plating layers formed on the external connection terminal as multiple unleaded metal plating layers, wherein the layers comprise: a first layer made of a tin alloy and provided as an inner layer of the multiple unleaded metal plating layers, the tin alloy of the first layer containing as a second element one of bismuth, silver, indium, and zinc; and a second layer made of a tin alloy and provided as an outer surface layer of the multiple unleaded metal plating layers, the tin alloy of the second layer having a percentage of tin content greater than that of the first layer, wherein the tin alloy of the first layer has a grain size equal to or below 1 micrometer and the tin alloy of the second layer has a grain size larger than the grain size of the tin alloy of the first layer.