Patent ID: 8871640

Claim:
A method of manufacturing a semiconductor chip including an integrated circuit and a through-electrode penetrating a semiconductor layer, the method comprising the steps of: preparing a first substrate including a release layer and a semiconductor layer formed on the release layer; forming an integrated circuit in the semiconductor layer; forming, in the semiconductor layer, a hole or groove having a depth which may be a half or more of a thickness of the semiconductor layer such that a remaining portion having a thickness of one-twentieth or more of the thickness of the semiconductor layer remains at the lower portion of the hole or groove; filling the hole or the groove with an electrical conductor; bonding a second substrate to the semiconductor layer to form a bonded structure; separating the bonded structure at the release layer to prepare the second substrate to which the semiconductor layer is transferred; and removing at least a portion of the reverse surface side of the semi-conductor layer exposed by the separation so as to expose the bottom of the electrical conductor, wherein the second substrate includes an integrated circuit and a bonding pad, and the semiconductor chip is stacked on the integrated circuit of the second substrate so that the through-electrode formed on a surface of the semiconductor layer of the first substrate is electrically connected to the bonding pad of the second substrate to form a three-dimensionally mounted semiconductor chip.