Patent ID: 7772650

Claim:
A layout structure of an electrostatic discharge protection circuit, comprising: a substrate; a protection element, disposed on the substrate, wherein the protection element is used to receive an electrostatic discharge current to protect an internal circuit from being damaged by the electrostatic discharge current, the protection element comprising: a transistor having a gate area, a first drain/source area, and a second drain/source area, the gate area coupled to the first drain/source area and the second drain/source area coupled to the internal circuit for receiving the electrostatic discharge current; and a resistor, disposed on the substrate, wherein a part of or all of an area of the resistor is disposed in a region which is encircled by the first and the second drain/source areas of the transistor, and one end of the resistor is coupled to one of the first and the second drain/source areas, wherein the area of the resistor and the first and the second drain/source areas are non-overlapping.