Patent ID: 7675273

Claim:
An apparatus for generating a regulated output voltage from an unregulated voltage, the apparatus comprising: a secondary source follower comprising a secondary native NMOS transistor, the secondary source follower having a drain, gate, and source voltage, the drain voltage coupled to the unregulated voltage; a primary source follower comprising a primary native NMOS transistor, the primary source follower having a drain, gate, and source voltage, the drain voltage of the primary source follower coupled to the source voltage of the secondary source follower, the source voltage of the primary source follower being the regulated output voltage; a secondary internal regulator comprising an amplifier and a feedback network, the feedback network comprising a secondary internal native NMOS transistor, the secondary internal regulator configured to regulate a gate-source voltage of the secondary internal native NMOS transistor, an output voltage of the secondary internal regulator comprising the gate or source voltage of the secondary internal native NMOS transistor, the output voltage of the secondary internal regulator coupled to the gate voltage of the secondary source follower; and a primary internal regulator comprising an amplifier and a feedback network, the feedback network comprising a primary internal native NMOS transistor, the primary internal regulator configured to regulate a gate-source voltage of the primary internal native NMOS transistor, an output voltage of the primary internal regulator comprising the gate or source voltage of the primary internal native NMOS transistor, the output voltage of the primary internal regulator coupled to the gate voltage of the primary source follower.