Patent ID: 8890618

Claim:
A zero-voltage-switching contour based outphasing power amplifier apparatus, comprising: (a) a first power amplifier configured to receive a first drive signal at an input and having an output configured for connection to a first side of a load, said first power amplifier comprising: a first transistor switching stage configured to be driven by said first drive signal; a first zero voltage switching inductance having a fixed value on the drain of said first transistor switching stage; a first variable drain capacitor array coupled in parallel to an output from said first transistor switching stage; a first bandpass filter in series with the output from said first transistor switching stage; a first variable load capacitor array coupled in parallel to an output from said first bandpass filter; and a first load inductance having a fixed value coupled in parallel to the output from said first bandpass filter; (b) a second power amplifier configured to receive a second drive signal at an input and having an output configured for connection to a second side of the load, said second power amplifier comprising: a second transistor switching stage configured to be driven by said second drive signal; a second zero voltage switching inductance having a fixed value on the drain of said first transistor switching stage; a second variable drain capacitor array coupled in parallel to an output from said second transistor switching stage and having capacitance which is varied as a function of duty cycle; a second bandpass filter in series with said output from said second transistor switching stage; a second variable load capacitor array coupled in parallel to an output from said second bandpass filter; and a second load inductance having a fixed value coupled in parallel to an output from said second bandpass filter; (c) means for generating said first drive signal and said second drive signal at a desired duty cycle and varying the phase difference between said first drive signal and said second drive signal to maintain efficiency of said power amplifier apparatus in response to a varying output load; (d) means for varying capacitances of said first variable drain capacitor array and said second variable drain capacitor array in response to duty cycle; and (e) means for differentially varying capacitances of said first variable load capacitor array and said second variable load capacitor array in response to determining impedance values for said first power amplifier and said second power amplifier.