Patent ID: 8039303

Claim:
A method of making a semiconductor device, comprising: providing a temporary carrier; forming a first conductive layer over the temporary carrier; forming a conductive pillar over the first conductive layer; mounting an active surface of a semiconductor die to the temporary carrier with an adhesive layer, the semiconductor die being vertically offset from the first conductive layer by the adhesive layer; depositing an encapsulant over the semiconductor die and around the conductive pillar; removing the temporary carrier and adhesive layer; forming a stress relief insulating layer over the active surface of the semiconductor die and a first surface of the encapsulant, the stress relief insulating layer having a first thickness over the semiconductor die and a second thickness less than the first thickness over the encapsulant; forming a first interconnect structure over the stress relief insulating layer; and forming a second interconnect structure over a second surface of the encapsulant opposite the first interconnect structure, the first and second interconnect structures being electrically connected through the conductive pillar.