Patent ID: 7051326

Claim:
A multi-node network of processors, comprising: a network; a plurality of processors coupled in said network, each of said processors comprising a non-volatile memory configured to store program code of a minimally operational state, said program code comprising only boot program code, said minimally operational state absent an operating code image required to become fully operational, said boot program code sufficient to operate said processor to provide a code image request; and comprising a volatile memory configured to store said operating code image, said operating code image configured to place said processor in a fully operational state; said processors, when in said minimally operational state, employing said boot program code to request said operating code image from said network by means of said code image request; and a master source coupled in said network, said master source configured to provide at least said operating code image for broadcasting said operating code image on said network, said master source, upon receiving said code image request, waiting a predetermined time period, said predetermined time period allowing any additional said processor to reach said minimally operational state, and, upon completion of said predetermined time period, broadcasting said operating code image on said network.