Patent ID: 6989686

Claim:
A logic circuit comprising: a first supply line supplied with a first potential; a first local supply line; a first switch coupled between the first supply line and the first local supply line; a second supply line supplied with a second potential; a second local supply line: a second switch coupled between the second supply line and the second local supply line; a flip-flop circuit arranged to input a first signal and a status signal and to output a second signal; a combination logic circuit arranged to input the second signal, the combination logic circuit comprising a first logic gate and a second logic gate; wherein the first logic gate is coupled to the first local supply line and the second supply line; wherein the second logic gate is coupled to the first supply line and the second local supply line; wherein when the status signal is in a first state, a state of the second signal is determined by the state of the first signal; wherein when the status signal is in a second state, the state of the second signal is in a second state regardless of the state of the first signal; wherein when the status signal is in the second state, an input of the first logic gate is at the first potential, and an input of the second logic gate is at the second potential.