Patent ID: 8835995

Claim:
A semiconductor device, comprising: a semiconductor substrate; a gate electrode structure comprising a gate electrode located on an upper surface of an active region of the semiconductor substrate; first and second epitaxial regions located in the active region at opposite sides of the gate electrode structure, respectively, each of the first and second epitaxial regions having a top surface parallel with the upper surface of the active region, and at least one inclined surface extending at a downward inclination from the top surface; an interlayer dielectric layer in which the gate electrode structure is disposed and covering the first and the second epitaxial regions, the interlayer dielectric layer having contact holes therein; and silicon layers interposed between the interlayer dielectric layer and the first and second epitaxial regions, the silicon layers contacting the inclined surfaces of the first and second epitaxial regions; and first and second silicide layers disposed in the contact holes in contact with the top surfaces of the first and second epitaxial regions, respectively, and wherein both of the first and second epitaxial regions comprise Si—X, where X is one of germanium and carbon, and wherein each of the first and second silicide layers is devoid of X, and both of the first and second silicide layers comprise Si—Y, where Y is a metal or metal alloy.