Patent ID: 8670285

Claim:
A method for performing a read operation in a 3D stacked non-volatile memory device comprising multiple levels of memory cells, the read operation is performed on selected memory cells in a selected level of the multiple levels, the method comprising: increasing a pass voltage from an initial level to at least a first elevated level, for memory cells in unselected levels of the multiple levels, the memory cells in the multiple levels of memory cells are arranged in at least one selected string of memory cells and at least one unselected string of memory cells, the at least one selected string of memory cells includes at least one of the selected memory cells, and comprises a drain end with an associated first select gate and a source end with an associated second select gate, and the at least one unselected string of memory cells does not include any of the selected memory cells, and comprises a drain end with an associated third select gate and a source end with an associated fourth select gate; during the increasing, providing the first select gate in a conductive state; while providing the first select gate in the conductive state, transitioning at least one of the third or fourth select gates between a non-conductive state and the conductive state; and applying a control gate read voltage to the selected memory cells, and sensing whether a threshold voltage of the at least one of the selected memory cells is above the control gate read voltage.