Patent ID: 8592895

Claim:
A MOSFET, comprising: a trench having a lower portion and an upper portion, the trench being disposed in a semiconductor region; a shield electrode disposed in the lower portion of the trench, the shield electrode being insulated from the semiconductor region by a shield dielectric, the shield electrode having a curved bottom surface; a gate electrode disposed in the upper portion of the trench, the gate electrode being over but insulated from the shield electrode, the lower portion of the trench having a width narrower than a width of the upper portion of the trench, at least a portion of a top surface of the gate electrode having a slope non-parallel to a bottom surface of the gate electrode; and an inter-poly dielectric disposed between the shield electrode and the gate electrode, the semiconductor region, which defines at least a portion of a mesa, including: a substrate of a first conductivity type, a first silicon region of a second conductivity type over the substrate, the first silicon region having a first portion extending to a depth intermediate a top surface and a bottom surface of the gate electrode, the first silicon region having a second portion extending to a depth intermediate a top surface and a bottom surface of the shield electrode, a second silicon region of the first conductivity type between the lower trench portion and the second portion of the first silicon region, and a source region of the first conductivity type in the first silicon region, the source region being adjacent the upper trench portion.