Patent ID: 7093080

Claim:
A non-homogeneous multiprocessor system, comprising: a first processor coupled to a first local store; a first cache associated with said first processor; one of a second processor or other device non-homogeneous with said first processor; multiprocessor bus means connected to said first cache of said first processor and to said one of a second processor or other device non-homogeneous with said first processor for providing cache coherent communications via said bus means; and a system memory having a coherent memory space, the system memory being shared by the first processor and the one of a second processor or other device non-homogeneous with said first processor, wherein the coherent memory space in system memory includes a local store alias portion that maps a local store address space into a real address space of the system memory, and wherein the one of a second processor or other device non-homogeneous with said first processor accesses the first local store of the first processor using the local store alias portion of the coherent memory space in the system memory.