Patent ID: 8732438

Claim:
A method for executing an anti-prefetch instruction, comprising: decoding instructions in a decode unit in a processor to prepare the instructions for execution; upon decoding an anti-prefetch instruction, stalling the decode unit to prevent the decoding of subsequent instructions; executing the anti-prefetch instruction, wherein executing the anti-prefetch instruction involves: sending a prefetch request for a cache line in an L1 cache; determining if the prefetch request misses in the L1 cache; if the prefetch request hits in the L1 cache, determining if the cache line contains a predetermined value; and conditionally performing subsequent operations based on whether the prefetch request missed in the L1 cache or the value of the data in the cache line, wherein stalling the decode unit to prevent the decoding of the subsequent instructions comprises preventing the decoding of subsequent instructions for a thread that comprises the anti-prefetch instruction and preventing the decoding of all instructions for another thread, the another thread causing the predetermined value to be written to the cache line.