Patent ID: 8063622

Claim:
A circuit, comprising: a regulator circuit to regulate a supply voltage across a capacitance circuit during a normal operation mode of the circuit; the capacitance circuit coupled between a first node and a second node and coupled to the regulator circuit, the regulator circuit coupled to charge a capacitance of the capacitance circuit with a charge current; and a slew rate control circuit coupled to the regulator circuit and the capacitance circuit, the slew rate control circuit to set a slew rate of a voltage between the first and second nodes during a power up mode of the circuit, wherein the slew rate control circuit includes a transistor coupled between the first and second nodes to shunt excess current from the charge current to the second node that is not used to charge the capacitance, wherein the slew rate control circuit further includes a switch and a resistor coupled to the capacitance circuit, wherein the slew rate control circuit is coupled to switch the switch in response to a voltage between the first and second nodes, wherein a voltage drop across the resistor is limited to a base-emitter voltage drop of the transistor to set the slew rate.