Patent ID: 8164547

Claim:
A semiconductor device comprising: a first transistor; a second transistor; a third transistor; a fourth transistor; a first wiring; a second wiring; and a capacitor, wherein one of a source or drain of the first transistor is electrically connected to the first wiring, wherein the other of the source or drain of the first transistor is electrically connected to a gate of the second transistor, wherein one of a source or drain of the second transistor is electrically connected to one of a source or drain of the third transistor, wherein one of a source or drain of the fourth transistor is electrically connected to the gate of the second transistor, wherein the other of the source or drain of the fourth transistor is electrically connected to the other of the source or drain of the third transistor, wherein one electrode of the capacitor is electrically connected to the gate of the second transistor, wherein the other electrode of the capacitor is electrically connected to the other of the source or drain of the second transistor, wherein the other of the source or drain of the second transistor is electrically connected to a pixel electrode, and wherein the other of the source or drain of the third transistor is electrically connected to the second wiring.