Patent ID: 7557618

Claim:
A complementary logic circuit with improved electrical characteristics comprising: a. a primary pull up logic circuit block that consists of all electrical switching elements necessary to pull the output of said logic circuit high in response to a set of logic inputs that determine when said primary pull up logic circuit block is activated to pull said output of said logic circuit high, and b. a scaled pull up logic circuit block that replicates said primary pull up logic circuit block except for a scaling factor, s 1 , that multiplies the pull up strength of said scaled pull up logic circuit block and is connected in parallel with said primary pull up circuit block and is connected in series with a first block switch controlled by a first binary feedback signal that determines whether said scaled pull up circuit block is activated, and c. a primary pull down logic circuit block that consists of all electrical switching elements necessary to pull said output of said logic circuit low in response to said set of logic inputs that determine when said primary pull down logic circuit block is activated to pull said output of said logic circuit low, and d. a scaled pull down logic circuit block that replicates said primary pull down logic circuit block except for a scaling factor, s 2 , that multiplies the pull down strength of said scaled pull down logic circuit block and is connected in parallel with said primary pull down circuit block and is connected in series with a second block switch controlled by a second binary feedback signal that determines whether said scaled pull down circuit block is activated, and e. a first binary feedback signal that has two states, one state turns said scaled pull up logic circuit block on and the other state turns said scaled pull up logic circuit block off, and f. a second binary feedback signal that has two states, one state turns said scaled pull down logic circuit block on and the other state turns said scaled pull down logic circuit block off, and whereby said scaled pull up and said scaled pull down circuit blocks can be turned on and off in proper synchronism with said inputs and output of said logic circuit so as to achieve improved electrical characteristics including any desired combination of improved speed, reduced power dissipation, and improved timing robustness of said logic circuit by turning scaled pull up circuit blocks on during low to high transitions and off during high to low transitions on outputs and by turning scaled pull down circuit blocks on during high to low transitions and off during low to high transitions.