Patent ID: 8766668

Claim:
An integrated circuit chip comprising: a first single ended type buffer configured to receive a first signal through a first pad; a second single ended type buffer configured to receive a second signal through a second pad; a differential type buffer configured to receive a third signal through the first pad and the second pad; a strobe input unit configured to receive a strobe signal synchronized with the third signal inputted to the first pad and the second pad; and a buffer control unit configured to control activation of the first and second single ended type buffers and the differential type buffer in response to the strobe signal, wherein the third signal includes a signal and an inverted signal of the signal inputted to the first and second pads, respectively, wherein the strobe signal pulses, when the third signal is inputted to the first pad and the second pad, and has preamble and postamble periods before and after a pulsing period, respectively, and wherein the buffer control unit activates the differential type buffer in response to the preamble period of the strobe signal and deactivates the differential type buffer in response to the postamble period of the strobe signal.