Patent ID: 7888682

Claim:
A thin film transistor, comprising: a substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region between the source region and the drain region, wherein the source region and the drain region each have upper, lower and side surfaces; a gate insulating layer disposed on the semiconductor layer and on the substrate; a gate electrode disposed on the insulating layer over the channel region; a passivation layer disposed on the gate electrode and the gate insulating layer; a source electrode disposed in contact with the upper, lower and side surfaces of the source region via a first contact hole through the passivation layer, the gate insulating layer and the semiconductor layer; and a drain electrode disposed in contact with the upper, lower and side surfaces of the drain region via a second contact hole through the passivation layer, the gate insulating layer and the semiconductor layer.