Patent ID: 7613913

Claim:
An apparatus comprising: a digital signal processor (DSP); a controller coupled to the DSP to provide control signals to the DSP; a one-time programmable (OTP) memory coupled to the DSP and the controller, the OTP memory including a first code block to control the DSP and a second code block to control the controller; and a memory controller coupled to the OTP memory and a plurality of volatile memories including a first program volatile memory and a first data volatile memory associated with the DSP and a second program volatile memory and a second data volatile memory associated with the controller, wherein the memory controller is to download firmware to the plurality of volatile memories, wherein the OTP memory is blank and the memory controller is to thereafter burn the firmware to the OTP memory, wherein the memory controller is to load boot loader code to the second program volatile memory while the controller is in a sleep mode and to thereafter wake up the controller to execute the boot loader code.