Patent ID: 8729551

Claim:
A flat panel display, comprising: a first substrate on which a plurality of pixel domains is defined, each of the plurality of pixel domains comprising a thin film transistor domain and a display domain; a gate line and a gate electrode disposed on the first substrate; at least one gate insulating layer disposed on the gate line and the gate electrode; a semiconductor layer disposed on the gate insulating layer; a data line which crosses the gate line; a source electrode electrically connected to the data line a drain electrode disposed substantially opposite to the source electrode with respect to the semiconductor layer; a passivation layer disposed on the data line, the source electrode, and the drain electrode; a pixel electrode disposed on the passivation layer and connected to the drain electrode; a second substrate disposed substantially opposite to the first substrate; a common electrode disposed on the second substrate; and an electrooptic layer disposed between the pixel electrode and the common electrode, wherein the drain electrode overlaps with the pixel electrode in the thin film transistor domain and the display domain and the drain electrode comprises an upper drain electrode and a lower drain electrode and the upper drain electrode is reflective.