Patent ID: 8334576

Claim:
A MOS device comprising: a semiconductor body having a first conductivity type and a surface; a first current-conduction region, having a second conductivity type, formed in the semiconductor body and facing the surface; a second current-conduction region, having said second conductivity type, formed in the semiconductor body and facing the surface; a channel region, having one and only one said first conductivity type, formed in the semiconductor body between said first current-conduction region and said second current-conduction region and having at least a portion facing said surface; a gate region, formed on top of said surface, electrically insulated from and overlying said channel region; and a conductive region extending only on one side of said gate region, facing said first current-conduction region, said conductive region being electrically insulated from said gate region, wherein said conductive region extends over the portion of said channel region that is facing the surface; and wherein said gate region comprises lateral surfaces extending between respective bottom and top edges, and a dielectric layer surrounds said gate region, said dielectric layer having a thickness near said bottom edges that is smaller than at said top edges.