Patent ID: 6915335

Claim:
A system for transferring control and data information between a host and daughtercard, with the daughtercard providing the functionality of interfacing the host to a network, and with the daughtercard including memory, and with the daughtercard for processing and formatting network data received from the network and processing and formatting data received from the host prior to transmission on the network, said system comprising: a low-speed, legacy parallel bus for coupling the host with legacy daughtercards utilizing only a parallel interface to exchange information between the motherboard and legacy daughtercard and with the low-speed, legacy parallel interface utilized to perform low-bandwidth data exchanges between the motherboard and a non-legacy daughtercard coupled the low-speed, legacy parallel bus; a high bandwidth serial link coupling the host and non-legacy daughtercard; on the host: a host serial communication controller for transmitting and receiving data over the serial link; a host processor programmed to implement a serial messaging protocol for transmitting commands and data to the non-legacy daughtercard, over the serial link, including a write memory command that writes data to the memory on the daughtercard and a read memory command that identifies data to be read from the memory on the non-legacy daughtercard; on the non-legacy daughtercard: a daughtercard serial interface for transmitting and receiving data over the serial link; a daughtercard protocol controller programmed to implement a serial messaging protocol to respond to commands received from the host, including responding to memory read and write commands and for forwarding formatted data received from the network to the host.