Patent ID: 8536576

Claim:
An array substrate comprising: a plurality of display areas, which plurality of display areas is disposed on an insulation substrate, and which respectively configures a display panel, wherein a plurality of pixels is provided in a matrix form in the display areas and respectively includes a switching element and a pixel electrode disposed in a region in which a scanning wiring and a signal wiring cross each other; an outer area of the display area, in which outer area a common wiring which is configured to apply a reference potential to the pixels, and an external connection terminal which is connected to one of the scanning wiring, the signal wiring and the common wiring, are provided; a connection wiring which connects the external connection terminal with the common wiring of an adjacent display panel; and a connection part, which has a contact hole, provided at the common wiring of the adjacent display panel, wherein the connection wiring is provided between the external connection terminal and the connection part; a sealing member provided adjacent the outer area of the display area to bond the insulation substrate with an opposite substrate disposed to face the display area, wherein the connection wiring is disposed across a cutting position of the insulation substrate and is connected to the contact hole at the connection part, and wherein the connection part is disposed at an area at which the sealing member is provided, or at an inner, display area side of the sealing member.