Patent ID: 8843795

Claim:
A system for testing a reconfigurable device including a plurality of programmable blocks, and programmable wires for programmably making a connection between these programmable blocks, wherein: each of said programmable blocks comprises a configuration memory which previously stores a plurality of test configuration data and transfer configuration data, and a register; said reconfigurable device includes a data memory which previously and simultaneously stores, prior to carrying out a test, a plurality of test input data for each of the plurality of test configuration data, and holds data in a normal operation; and said system, in a test configuration, addresses a selected test configuration data from among the plurality of test configuration data in said configuration memory to set said programmable blocks in the test configuration state so as to carry out the test of said reconfigurable device in which each of the plurality of test data, which correspond to the selected test configuration data, is input to the plurality of programmable blocks, and holds the test results in said registers, and in a transfer configuration, addresses the transfer configuration data in said configuration memory to connect said registers in series so as to sequentially read the test results, and alternately executes the test configuration state and the transfer configuration state a number of times equal to the number of pieces of test input data for each of the plurality of test configuration data.