Patent ID: 7485487

Claim:
A method of making a memory device comprising: providing a first dielectric layer including at least one via containing a metal stud; providing a second dielectric layer on the first dielectric layer, wherein an upper surface of the metal stud is exposed; recessing the metal stud to expose a sidewall of the at least one via in the first dielectric layer; etching the sidewall of the at least one via in the first dielectric layer by a substantially isotropic etch step to produce an undercut region extending beneath a portion of the second dielectric layer; forming a conformal insulating layer on a recessed surface of the metal stud, the undercut region, and the portion of the second dielectric layer overlying the undercut region to provide a keyhole; etching the conformal insulating layer with a substantially anisotropic etch, wherein the keyhole provides a mask to provide a collar that exposes the recessed surface of the metal stud; forming a barrier metal within the collar in contact with the metal stud to provide an electrode; and forming a phase change material in contact with the electrode.