Patent ID: 7071047

Claim:
A method of forming a semiconductor structure, comprising: (a) providing a single crystal silicon substrate; (b) forming a hard mask layer on a top surface of said substrate; (c) forming a nano-mask layer on a top surface of said hard mask layer without performing a photolithographic process, said nano-mask layer having a masking pattern; (d) etching said masking pattern into said hard mask layer to form a patterned hard mask layer having openings, said openings extending from a top surface of said patterned hard mask layer to said top surface of said substrate, wherein said openings, distances between said openings, or both said openings and said distances between said openings independently have at least one spatial extent extending parallel to said top surface of said patterned hard mask layer; and (e) after removing said nano-mask layer, forming a single crystal group IV semiconductor layer on a top surface of said patterned hard mask layer, said single crystal group IV semiconductor layer filling said openings in said patterned hard mask layer.