Patent ID: 8307169

Claim:
A host computer system comprising a processor and program code operative on said processor, said program code comprising program code of: a hypervisor defining at least one virtual machine, wherein an address space of said at least one virtual machine resides on physical memory of said host computer system under control of said hypervisor; and a guest operating system of said at least one virtual machine; wherein at least one of said hypervisor and a host operating system of said host computer system is operative to set parts of an address space of said host computer system corresponding to part of the address space of said at least one virtual machine to a locked state in which said parts of the address space of said host computer system can be read but not written to; wherein said guest operating system comprises a component operative to signal to said hypervisor after other components of said guest operating system or of a program running under said guest operating system are loaded into working memory of said at least one virtual machine and before said other components start running, and wherein said hypervisor is responsive to said signaling to set to said locked state parts of the address space of said host computer system containing program code of said other components.