Patent ID: 8441575

Claim:
An audio clock regenerator for an HDMI (High-Definition Multimedia Interface) sink device receiving a video clock, and initial parameters including a cycle time stamp value and an initial factor, the audio clock regenerator comprising: a parameter transformer configured to: compute an equation X=−P×(N/CTS) to derive an intermediate parameter, wherein X represents the intermediate parameter, P is a predetermined first integer, N represents the initial factor, and CTS represents the cycle time stamp value; derive a new factor as an integral portion of the sum of the initial factor and the intermediate parameter; derive a fine tune parameter as a decimal portion of the sum of the initial factor and the intermediate parameter; and derive a second integer as containing higher bits of the cycle time stamp value; a first frequency divider configured to divide the video clock by the second integer; a fractional frequency synthesizer configured to receive a result of the division of the video clock by the second integer, and to phase lock a reference clock based on the new factor and the fine tune parameter; and a second frequency divider configured to divide the reference clock by the first integer to generate an audio clock.