Patent ID: 7441110

Claim:
In a system including a high speed buffer logically placed between memory and at least one processor unit, a method for executing an instruction stream stored in the memory, wherein the instruction stream comprises a sequence of instructions including at least one prefetch instruction that prefetches information from the memory into the high speed buffer, the method comprising the steps of: deriving first path data from a compiler by analyzing control flow information during compilation, wherein the first path data represents a first path from the prefetch instruction to an instruction that uses information prefetched by the prefetch instruction; obtaining a branch history defining a path from information generated by branches encountered prior to a subsequent encounter of the prefetch instruction; generating second path data, wherein the second path data represents a predicted second path of execution; determining whether the first path is consistent with the predicted second path; and prefetching instructions and data when the first path is consistent with the predicted second path.