Patent ID: 8059475

Claim:
A reference voltage regulator for an embedded dynamic random access memory (eDRAM) employing VSS-sensing with a reference level, comprising: an oscillator; a control block; a reference generator; a comparator; a pulse generator; a driver; and a reference voltage output; wherein the oscillator is configured to send requests for sampling and correction to the control block between accesses of the eDRAM, the control block is configured to send a pulse defining a time interval during which sampling and correction occurs to the pulse generator, the reference generator is configured to provide the reference level for comparison by the comparator with a sampling of the reference voltage output, the comparator is configured to decide if the reference voltage output requires correction and based on the decision send a correction request to the pulse generator, the pulse generator is configured to produce a correction pulse for the driver according to the correction request from the comparator, and the driver is configured to adjust the reference voltage output during the correction pulse.