Patent ID: 7618858

Claim:
A method for fabricating a heterojunction bipolar transistor, the method comprising: providing a protrusion on a first collector region of a first semiconductor material, the protrusion having a sidewall and comprising a portion of the first semiconductor material, a base region of a second semiconductor material and a sacrificial region of a third semiconductor material, of forming a base connecting region of the second semiconductor material on the sidewall of the protrusion, the base connecting region having a top surface and an outer sidewall, selectively removing the sacrificial region relative to the base region and the base connecting region, thereby forming a space region with a sidewall comprising a portion of the base connecting region and a bottom comprising the base region; forming spacers of an insulating material covering the sidewall of the space region; depositing a sacrificial layer of a fourth semiconductor material filling the space region and covering the spacers, the base connecting region and the base region, and partly removing the sacrificial layer to expose the top surface of the base connecting region thereby forming an emitter region in the space region comprising the fourth semiconductor material.