Patent ID: 7005905

Claim:
A circuit providing a stable timing clock comprising: a) an antenna inducing an AC voltage; b) an AC/DC rectifier electrically connected to the antenna; c) a filter electrically connected to the AC/DC rectifier; d) a voltage limiter electrically connected to the filter, the AC/DC rectifier, the filter and the voltage limiter converting the AC voltage into a first DC voltage; e) a step-down clamping circuit electrically connected to the voltage limiter and converting the first DC voltage into a second DC voltage; f) an oscillating circuit electrically connected to the step-down clamping circuit and utilizing the second DC voltage as an operating voltage, the oscillating circuit generating a first timing clock signal having a voltage potential lower than a voltage potential of the second DC voltage; and g) a voltage potential-converting circuit electrically connected to the oscillating circuit and converting the first timing clock signal into a second timing clock signal having a voltage potential higher than a voltage potential of the first timing clock signal, wherein the second timing clock signal is produced from the AC voltage induced by the antenna.