Patent ID: 8619915

Claim:
A receiver comprising: a first amplifier for amplifying an input differential data signal and outputting an output differential data signal; a clock generator for generating a differential clock signal corresponding to a period of the output differential data signal on the basis of a first positive-phase component signal and a first negative-phase component signal of the output differential data signal; a judger for outputting a first logical value or a second logical value as a judgment signal in accordance with a phase lead or phase lag which has been occurred at a crossing point of the first positive-phase component signal and the first negative-phase component signal upon rising or falling of the differential clock signal; a detector for measuring periodically in a fixed period comprising a first period for which the judgment signal has the first logical value and a second period for which time the judgment signal has the second logical value and outputting a different value between the first period and the second period as detection signal; and an adjustor for adjusting each reference voltage of a second positive-phase component signal of the input differential data signal and a second negative-phase component signal of the input differential data signal in accordance with the detection signal.