Patent ID: 7816264

Claim:
A wafer processing method for forming a rewiring layer on a back side of a wafer having a substantially circular device forming area whose front side is formed with a plurality of devices and a remaining peripheral area surrounding said device forming area, said wafer processing method comprising: a via hole forming step of forming a plurality of via holes in the devices in said device forming area from the front side of said wafer; an insulating film forming step of forming an insulation film on an inner surface of said via holes; an electrode embedding step of embedding a plurality of metal electrodes in said via holes to a depth greater than or equal to the thickness of each device from the front side of said wafer; a back side recess forming step of reducing the thickness of said device forming area by grinding the back side of said wafer following the electrode embedding step to form a first recess on the back side of said wafer, and an annular projection in said remaining peripheral area so as to surround said first recess; a metal electrode exposing step of reducing the thickness of said device forming area from the back side of said wafer to form a second recess on the back side of said wafer for exposing said metal electrodes from a bottom surface of said second recess; and a rewiring layer forming step of forming an insulating film on the bottom surface of said second recess except an exposed portion of each metal electrode and next forming said rewiring layer on said insulating film.