Patent ID: 7972956

Claim:
A method for manufacturing a wire structure of a semiconductor device, the method comprising: obtaining a layout of an active region in a semiconductor substrate, the layout extending in a direction diagonally intersecting a layout of a bit line; forming an isolation layer that delimits the active region; forming over the semiconductor substrate a stack of a first insulation layer, an etch stop layer, and a second insulation layer; forming a contact hole penetrating the stack; forming over the second insulation layer a first mask layer, the first mask layer comprising a filler that fills the contact hole; patterning the first mask layer to expose a portion of the second insulation layer according to the layout of the bit line; selectively etching the exposed portion of the second insulation layer using the first mask pattern and the filler as an etch mask to form a trench exposing a surface of the etch stop layer over a bottom thereof and partially overlapping with the contact hole; selectively removing the first mask pattern and the filler; forming a spacer over a side wall of the trench and a side wall of the contact hole; forming a bit line contact which fills the contact hole and the bit line which partially fills the trench to expose an upper side part of the spacer; and, forming a capping layer over the bit line, the capping layer filling the trench to be connected to the spacer and protecting the upper part of the bit line, wherein forming the contact hole comprises: forming over the first insulation layer a second mask layer comprising a carbon layer and a first interfacial separation layer comprising silicon oxynitride (SiON); forming over the first interfacial separation layer a first photoresist pattern exposing the portion where the bit line and the active region intersect with each other; selectively etching the second mask layer using the first photoresist pattern as an etch mask to form a second mask pattern; and selectively etching the first insulation layer using the second mask pattern as an etch mask to form the contact hole.