Patent ID: 7715814

Claim:
A blocking signal reduction system for a virtual local oscillator receiver receiving an RF input signal and providing a corresponding base band signal, comprising: a synthesizer circuit for generating a first mixer signal and a second mixer signal, the virtual local oscillator receiver receiving the first mixer signal and the second mixer signal for down converting the RF input signal to an effective local oscillator frequency, the down converted RF input signal being provided as the corresponding base band signal evaluation means for receiving the down converted RF input signal and for generating an enable signal when the down converted RF input signal is determined to be deficient; a dynamic correction circuit for sensing a power of the corresponding base band signal, and for providing a new frequency value in response to the enable signal, the synthesizer circuit adjusting a frequency of the second mixer signal to correspond with the new frequency value; wherein the evaluation means includes a blocker detection circuit coupled to the virtual local oscillator receiver for sensing a characteristic corresponding to the down converted RF input signal, the blocker detection circuit generating the enable signal in response to the sensed characteristic exceeding a predetermined threshold; wherein the down converted RF input signal includes RF input frames, and the corresponding base band signal includes base band frames; and, wherein the dynamic correction circuit includes a rower detector circuit for receiving and sensing the power of a first base band frame and the power of a second base band frame in response to the enable signal, a comparator circuit for comparing the power of the second base band frame to the power of the first base band frame, the comparator circuit generating a memory access signal when the rower of the first base band frame is less than or equal to the power of the second base band frame, and a memory for storing a plurality of new frequency values and for providing one of said new frequency values to the synthesizer circuit in response to the memory access signal.