Patent ID: 8784931

Claim:
A method of manufacturing ULSI wiring in which wiring layers are separately formed via a single diffusion prevention layer formed on a surface of a hollowed portion of an insulating interlayer made of SiO 2 , said method comprising the steps of: treating a SiO 2 surface on the hollowed portion of the insulating interlayer with an organic silane compound to form an organic silane monomolecular layer; performing catalyzation of the treated SiO 2 surface with an aqueous solution containing a palladium compound; thereafter forming the single diffusion prevention layer by a electroless plating method using a plating bath selected from the group consisting of an electroless nickel-tungsten-phosphorous bath, and an electroless nickel-rhenium-phosphorous bath, wherein in the nickel-tungsten-phosphorus bath and the nickel-rhenium-phosphorus bath the tungsten or rhenium content is 40-80 wt %, the phosphorous content is 0.1 to 1.0 wt %, and the residual is nickel; and then forming the wiring layer on the single diffusion prevention layer.