Patent ID: 8275579

Claim:
An integrated circuit comprising: a functional processing circuit for processing a functional signal; a diagnostic circuit for processing a diagnostic signal; a signal interface providing a communication path between said integrated circuit and at least one external device; and a signal interface controller having a monitoring circuit for monitoring a signal associated with at least one of said functional circuit and said diagnostic circuit wherein said signal interface controller, responsive to said monitored signal, is configured to selectively communicate said functional signal and said diagnostic signal on said interface, wherein said signal interface controller performs said selective communication by time-division multiplexing said diagnostic signal and said functional signal; wherein said signal interface samples data with respect to a clock having a plurality of clock cycles; and said monitoring circuit monitors one of said functional signal and said diagnostic signal and identifies available ones of said clock cycles when said signal interface is not being used to communicate data of said monitored signal and wherein said signal interface controller controls said time-division multiplexing such that data associated with the other of said functional signal and said diagnostic signal is communicated using said available clock cycles.