Patent ID: 7863150

Claim:
A method to fabricate a very low effective dielectric constant interconnect structure comprising: a. depositing on a substrate at least one layer of dielectric having copper interconnects with a top layer and with spaces between the copper interconnects; b. depositing at least one cap layer on the dielectric layer; c. depositing an antireflective coating layer and a resist layer; d. applying a lithographic blockout mask with perforations forming a pattern in the resist layer overlying the spaces between the copper interconnects and not overlying the copper interconnects; e. reducing the perforations size in the resist layer by using chemically assisted shrinks such that the perforations become sublithographic; f. transferring the sublithographic perforation pattern into the cap layer such that the sublithographic nature of the pattern is preserved and no copper interconnect top layer is exposed; g. extracting the underlying dielectric layer between the copper interconnects through the perforated cap layer via etching; h. depositing an at least second dielectric layer; and i. pinching-off the perforations with the at least second dielectric layer.