Patent ID: 8171121

Claim:
A method for on-line deletion of a processor node comprising: requesting the removal of the processor node to an operating system through system management channels; moving applications away from processors and memory being offlined with respect to the processor node that is requested for removal with the operating system; moving interrupts away from the processor node and disabling interrupts to the processors being offlined with the operating system; stopping prefetches and speculative accesses by removal of translation lookaside buffers (TLBs) to avoid errors due to references to memory that are mapped out by address decoder; performing a quiesce operation to ensure that in-transit snoop operations are completed, wherein a quiesced state is a state where there are no protocol transactions in the full system or a subset thereof except those generated by firmware and/or service system processors; removing the processor node that is requested for removal from one or more participant lists; and generating a signal that the processor node that is requested for removal can be physically removed.