Patent ID: 7135374

Claim:
A method of forming a MOS transistor, comprising: forming an insulating film and a first silicon layer on a semiconductor substrate in order; after forming the first silicon layer, forming a trench by selectively etching the first silicon layer and burying insulating material inside thereof to define remainder regions of the first silicon layer as active region of a semiconductor device; forming an impurity region by injecting inpurity ions into a predetermined region of the first silicon layer; forming a common source line by forming a second silicon layer on the impurity region, and then injecting impurity ions into the second silicon layer; forming a gate oxide over whole surfaces of the first silicon layer and the common source line; forming side walls made of insulating film on the gate oxide film positioned at sides of the common source line; forming drain regions by injecting impurity ions into the first silicon layer being positioned at a predetermined distance from the common source line; and forming gate electrodes on sides of the side walls.