Patent ID: 8093145

Claim:
A method for making a radiation-hardened integrated circuit (RHIC) product, said method comprising: forming a first well of a first conductivity type in a substrate region of a first substrate impurity concentration and of the first conductivity type; forming a drain region and a source region for a first transistor within the first well; forming a second well of a second conductivity type opposite the first conductivity type; forming a buried layer having the first conductivity type and having a buried layer impurity concentration greater than the first substrate impurity concentration, said buried layer disposed within the substrate below the first well and extending continuously beneath the drain and source regions of the first transistor and extending continuously beneath a portion of both the first and second wells; and forming a conductive region disposed between the buried layer and one of a first well contact region and a substrate surface terminal within the first well, said conductive region having a smaller lateral extent than that of the first well, and providing a higher conductance between the buried layer and said one of the first well contact region and the substrate surface terminal than a conductance that otherwise would be provided by the first well and the substrate region in the absence of said conductive region.