Patent ID: 7982482

Claim:
A method of manufacturing a probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer, the method comprising: attaching a first thin film of a double structure to a rigid ring, the first thin film having an electrically conductive layer and an insulating layer superposed on each other; simultaneously forming, on the first thin film attached to the rigid ring, a plurality of first bumps and a plurality of second bumps, electrically connecting the first bumps to a wiring substrate, wherein the second bumps are not electrically connected to a wiring substrate, and at least two of the second bumps comprise an alignment mark, and forming a second thin film larger than the alignment mark on a surface of the first thin film opposite the alignment mark, the second thin film producing a light-dark contrast among the first bumps and the second bumps for image processing using a recognition camera.