Patent ID: 6927800

Claim:
A video signal processing circuit a frame memory for storing successive frames of a video signal; a writing controller for writing a portion of effective scan lines of a video signal of a first video system having a first number of vertical scan lines into said frame memory in synchronism with vertical and horizontal synchronous signals corresponding to the video signal of the first video system; a reading controller for reading the portion of the effective scan lines of the video signal written in an effective scan line section of said frame memory in synchronism with vertical and horizontal reference signals corresponding to a video signal of a second video system having a second number of vertical scan lines; a signal selector for selectively outputting one of the video signal read out from said frame memory and a pedestal level signal, wherein said reading controller controls said signal selector so as to select the output from said frame memory in the effective scan line section or select the pedestal level signal out of the effective scan line section; and a vertical size controller for changing a vertical deflection width in accordance with ratio of a repetitive frequency of the horizontal reference signal corresponding to the video signal of the second video system and repetitive frequency of a signal achieved by multiplying the horizontal synchronous signal corresponding to the video signal of the first system.