Patent ID: 7821819

Claim:
A semiconductor memory device comprising: a plurality of magnetic memory elements; a control line group; and a read driving circuit; wherein each of said magnetic memory elements, which are arranged to form a matrix including a plurality of rows and a plurality of columns, is provided for one of memory cells and includes a storage layer for holding bit data as a direction of the magnetization state of said storage layer, said control line group includes a plurality of first common lines each used for connecting one terminal of each of said memory cells to each other in the row or column direction and includes a plurality of second common lines each used for connecting the other terminal of each of said memory cells to each other in the row or column direction, and said read driving circuit controls electric potentials appearing on said control line group in order to apply a read voltage to selected one of said magnetic memory elements as a voltage resulting in a difference in electric potential between a pair of said first and second common lines connected to said memory cell including said selected magnetic memory element from which bit data is to be read out and controls a field current flowing to said control line group in order to apply an external magnetic field to said selected magnetic memory element in a direction parallel to the direction of the magnetization state of said storage layer included in said selected magnetic memory element, wherein said read driving circuit generates said external magnetic field in a direction opposite to a direction in which said direction of said magnetization state of said storage layer included in said selected magnetic memory element is to be changed inadvertently by a read current flowing to said selected magnetic memory element as a current resulting from application of said read voltage to said selected magnetic memory element.