Patent ID: 8163607

Claim:
A method of making a semiconductor device, comprising: providing a substrate; forming a gate and a pair of source/drain doped regions on the substrate, wherein the gate and the pair of source/drain doped regions each independently comprise a doped silicon layer; blanketly depositing a NiPt layer to cover the gate and the pair of source/drain doped regions; blanketly depositing a cap layer on the NiPt layer; performing a first rapid thermal process on the substrate to allow Ni of the NiPt layer to react with silicon of the silicon layer to form a Ni x Si layer, wherein x represents a number in a range from 1.5 to 3; performing a selective etching process to remove unreacted NiPt or the cap layer; performing a second rapid thermal process on the substrate to allow the Ni x Si layer to further react with silicon to form a NiSi layer and a NiSi 2 layer disposed between the NiSi layer and the silicon layer; and performing an ion implantation to implant a dopant into the Ni x Si layer at a depth ranging from a middle height of the Ni x Si layer down to a front of the Ni x Si layer after performing the selective etching process and before performing the second rapid thermal process or after performing the first rapid thermal process and before performing the selective etching process, or to implant the dopant into each silicon layer at a depth ranging from a half of a predetermined thickness of the NiSi layer to a predetermined front of the NiSi layer after depositing the cap layer and before performing the first rapid thermal process.