Patent ID: 7140531

Claim:
A method of fabricating a substantially zero signal degradation electrical connection on a printed circuit board, the method comprising: providing a printed circuit board defined by a dielectric structure core having a first surface, the first surface including a first conducting pad having a first edge and a second conducting pad having a second edge separated from and adjoining the first edge of the first conducting pad, the adjoining edges of the first and second conducting pads defining therebetween a surface area of the first surface; and applying a solder paste on the first and second conducting pads and on the first surface of the dielectric structure core, the solder paste forming a solder bridge extending between the adjoining edges of the first and second conducting pads that covers less than an entirety of the surface area between the adjoining edges of the first and second conducting pads to form a substantially zero signal degradation electrical connection between the first and second conducting pads.