Patent ID: 8133818

Claim:
A method of forming a hard mask pattern in a semiconductor device, the method comprising: forming first etching mask patterns over a hard mask layer formed on a semiconductor substrate; forming second etching mask patterns including first patterns and second patterns over the semiconductor substrate, the first patterns intersecting the first etching mask patterns, each second pattern being disposed between the first etching mask patterns; forming third etching mask patterns over the semiconductor substrate after forming the second etching mask patterns including the first patterns and the second patterns, each third etching mask pattern being disposed between the first patterns and intersecting the first etching mask patterns; performing a first etching process such that the first etching mask patterns remain on regions at which the first patterns intersect the first etching mask patterns and the second patterns remain on regions at which the first patterns intersect the second patterns; and patterning the hard mask layer through a second etching process utilizing the remaining first etching mask patterns and the second patterns as an etching mask to form hard mask patterns.