Patent ID: 7253057

Claim:
A method of fabricating an electronic integrated circuit device on a first surface of a substrate, comprising: forming a first dielectric film layer over the first surface of the substrate; forming an at least one further dielectric film layer over the first dielectric and creating a first aperture in the at least one further dielectric film layer, the first aperture having sidewalls that are non-parallel to the first surface of the substrate; forming spacers on the sidewalls of the first aperture such that a distance between spacers on opposing sidewalls of the first aperture is less than a limit of optical photolithography, the opposing spacers thus forming a second aperture; creating a dopant region formed substantially within an upper portion of the substrate underlying the first aperture; and etching a portion of the first dielectric film layer and an upper portion of the first surface of the substrate underlying the second aperture thus forming a tunneling window.