Patent ID: 7841076

Claim:
A method of manufacturing a plurality of semiconductor devices, each semiconductor device including a multilayer wiring structural body having a laminated wiring pattern and an insulating layer, an antenna disposed on one surface of said multilayer wiring structural body, and an electronic component disposed on another surface of said multilayer wiring structural body opposite to the one surface of the multilayer wiring structural body, the electronic component being electrically connected to the multilayer wiring structural body, the manufacturing method comprising: providing a first metal plate and a second metal plate; pasting the first metal plate to the second metal plate such that a surface opposite to a surface of the first metal plate on which the multilayer wiring structural body is to be formed is opposed to a surface opposite to a surface of the second metal plate on which the multilayer wiring structural body is to be formed; simultaneously forming the multilayer wiring structural bodies on the first and second metal plates such that the first and second metal plates support the respective multilayer wiring structural bodies while forming the respective multilayer wiring structural bodies; and patterning the first and second metal plates to form the antennas in the first and second metal plates.