Patent ID: 7960789

Claim:
An integrated field-effect transistor, having a substrate region surrounded: by two terminal regions, one terminal region being a source region and the other terminal region being a drain region, the source region being arranged at a first side of the substrate region and the drain region being arranged at a second side of the substrate region, the first and second sides being opposite sides of the substrate region; by two electrically insulating layers, which are arranged at a third and fourth side of the substrate region, the third and fourth sides being mutually opposite sides of the substrate region and the insulating layers being adjoined by control regions, the control regions being located along the third and fourth sides with an insulating layer of the insulating layers between each of the control regions and the substrate region, the first and second sides being narrower than the third and fourth sides; by two electrically insulating regions, the insulating regions being arranged at mutually opposite sides of the substrate region, a first insulating region of the insulating regions being arranged at a fifth side of the substrate region and a second insulating region of the insulating regions being arranged at a sixth side of the substrate region, and by an electrically conductive connecting region or a part of an electrically conductive connecting region which produces an electrically conductive connection between one of the terminal regions and the substrate region, the connecting region comprising a metal-semiconductor compound, part of a covered area of the substrate region being covered by the connecting region, the connecting region also covering a covered area of the source region such that the connecting region extends across the first side of the substrate region to the source region, the part of the covered area of the substrate region being located between the insulating layers and between the control regions.