Patent ID: 8686551

Claim:
A microelectronic substrate having a plurality of traces configured for coupling with external contacts of a microelectronic element mountable thereto, comprising: a plurality of solid metal first contact pins, each first pin having a base and a tip; a plurality of first conductive elements including conductive traces and conductive contact areas configured for electrical connection with the microelectronic element mountable thereto, at least some of the first conductive elements being coupled to the bases of the first pins so that the first pins project downwardly from the first conductive elements; and a molded dielectric layer disposed in regions around the first pins and contacting the first pins, the molded dielectric layer having an exposed bottom surface coplanar with the tips of the first pins, and a top surface opposed to the bottom surface, wherein the first conductive elements extend along the top surface of the molded dielectric layer, and at least some of the tips of the first pins are exposed at the bottom surface of the dielectric layer, wherein the molded dielectric layer comprises epoxy.