Patent ID: 7376767

Claim:
A distributed buffering system comprises: input buffer that includes a plurality of input memories, wherein the input buffer stores at least one data block and wherein each of the plurality of input memories stores a corresponding portion of the at least one data block; plurality of serializing modules operably coupled to the plurality of input memories, wherein each of the plurality of serializing modules serializes the corresponding portion of the at least one data block to produce a plurality of streams of data; programmable logic device operably coupled to distribute the plurality of streams of data to at least one of a plurality of output buffers based on a distribute instruction, wherein each of the plurality of output buffers includes a plurality of output memories; plurality of deserializing modules, wherein each of the plurality of deserializing modules is operably coupled to a corresponding one of the plurality of output memories of each of the plurality of output buffers, wherein corresponding ones of the plurality of deserializing modules deserializes a corresponding one of the plurality of streams of data to recapture the corresponding portions of the at least one block of data, wherein the plurality of output memories of the at least one of the output buffers stores the recaptured corresponding portions of the at least one block data; and controller operably coupled to the input buffer, the programmable logic, and the plurality of output buffers, wherein the controller generates the distribute instruction, generates a plurality of read instructions, and a plurality of write instructions, wherein the plurality of read instructions are provided to the plurality of input memories, and wherein the plurality of write instructions are provided to the plurality of output memories of the at least one of the plurality of output buffers wherein the controller further comprises: aligning module operably coupled to align access to the recaptured corresponding portions of the at least one data block from the plurality of output memories of the at least one of the plurality of output buffers.