Patent ID: 8889554

Claim:
A method for manufacturing a semiconductor structure, comprising: providing a substrate, wherein the substrate is made of silicon, forming an active region on the substrate, sequentially forming a gate stack, a source/drain extension region with the gate stack as a mask, a first spacer surrounding the gate stack, and a source/drain region by taking the gate stack and the first spacer as a mask on the active region, and then partially exposing the active region; forming a metal spacer at a position of the exposed active region close to the gate stack, wherein the metal spacer is made of a material comprising one of Ti, Pt and Co, or combinations thereof; performing an annealing operation so that the metal spacer reacts with a surface of the active region that supports the metal spacer to form the first contact layer; and removing the un-reacted metal spacer; forming a second spacer at a region of the first contact layer close to the gate stack to partially cover the exposed active region; and forming a second contact layer in the uncovered exposed active region, wherein the first contact layer has a thickness less than that of the second contact layer, the second contact layer is made of NiSi or Ni(Pt)Si2-y.