Patent ID: 7037788

Claim:
A method of manufacturing a semiconductor device comprising: forming a second conductivity type region in a semiconductor substrate having a principal surface of a first conductivity type by implanting impurities of a second conductivity type two or more times; forming a first conductivity type region inside the island of said second conductivity type region, said first conductivity type region having a higher impurity concentration than said semiconductor substrate; forming a trench in a depth direction of said semiconductor substrate by anisotropic etching; forming a sacrificed oxide film on an inner wall surface of the trench by thermal oxidation; removing said sacrificed oxide film; forming an insulation film in an interior of said trench; filling said trench formed said insulation film with a polycrystalline silicon film; forming a plurality of electric field alleviating regions by introducing impurities of the second conductivity type in a strip-wise shape so as to enclose a peripheral portion of said second conductivity type region; forming a plurality of strip-wise highly doped second conductivity type regions each formed inside each of the electric field alleviating regions; forming a plurality of strip-wise third trenches each formed inside each of the strip-wise second conductivity type regions in a depth direction of said semiconductor substrate by anisotropic etching; forming a plurality of deeper second conductivity type regions each formed inside each of said third trenches by introducing impurities of the second conductivity type by two or more ion implantation steps; forming a metal electrode which electrically connects each of said strip-wise second conductivity type region to each of said deeper second conductivity type region; and forming a protection film at least on a surface of the semiconductor substrate except a region where said second conductivity type region underlies.