Patent ID: 7875493

Claim:
A method for making a memory cell device comprising: providing a subassembly comprising a memory cell access layer and a first dielectric material over the memory cell access layer, the memory cell access layer comprising an electrical contact; forming an opening through the first dielectric material to expose the electrical contact; depositing a first memory material into the opening to form a first memory material layer in electrical contact with the electrical contact; depositing a second dielectric material into the opening in a manner to create a void therein; etching the second dielectric material within the opening to create an etched opening, the etched opening comprising a larger, upper open region and a smaller, constricted lower open region, the constricted lower open region being adjacent to the first memory material layer; depositing a second memory material into the opening to create a memory material structure by: at least substantially filling the constricted lower open region to create a memory material element within the constricted lower open region, the memory material element electrically contacting the first memory material layer; and at least partially filling the upper open region to create an upper memory material portion within the upper open region, the memory material structure comprising the first memory material layer, the memory material element and the upper memory material portion; and forming a top electrode in electrical contact with the upper memory material portion.