Patent ID: 6890768

Claim:
A method of fabricating an integrated circuit, said method comprising: providing a substrate and a first precursor containing metal moieties in effective amounts for forming a thin film of a layered superlattice material upon heating said precursor; applying said first precursor to said substrate to form a first coating; treating said first coating to form said thin film of said layered superlattice material, and completing the fabrication of said integrated circuit to include at least a portion of said thin film layered superlattice material in said integrated circuit; said method characterized by: providing a second precursor containing metal moieties in effective amounts for forming a non-ferroelectric material upon heating said second precursor; applying said second precursor to said substrate to form a second coating; and said treating said first coating comprising: applying ultraviolet radiation to said first coating; and treating said second coating; thereby forming said thin film of paid layered superlattice material on said substrate and an ultra-thin film of said non-ferroelectric material on said layered superlattice material; and said completing comprising completing the fabrication of said integrated circuit to include at least a portion of ultra-thin film of said non-ferroelectric material on said layered superlattice material in said integrated circuit.