Patent ID: 6900124

Claim:
A method of forming a contact in a flash memory device that improves the depth of focus (DOF) margin and the overlay margin between a plurality of stacked gate layers and the respective contact, comprising the steps of: forming a plurality of stacked gate layers on a semiconductor substrate, wherein each stacked gate layer extends in a predefined direction and is substantially parallel to other stacked gate layers; depositing an interlayer insulating layer over the plurality of stacked gate layers; patterning a contact hole between a first stacked gate layer of the plurality of stacked gate layers and a second stacked gate layer of the plurality of stacked gate layers, wherein the contact hole is an elliptical shape having a major axis and a minor axis, and the contact hole is dimensioned along the major axis so as to maintain focus of an image of the contact hole as the minor axis is reduced in size towards a DOF limit; and depositing a conductive layer in the contact hole.