Patent ID: 7790589

Claim:
A method of manufacturing an extended drain of a high voltage field-effect (HVFET) transistor, the method comprising: a) implanting a first dopant in a substrate of a first conductivity type to form a first region of a second conductivity type in the substrate; b) providing a mask having an open portion over a center portion of the substrate, and a plurality of outer open portions and blocking portions disposed over the substrate between the center portion and an edge of the substrate; c) implanting with the mask a second dopant into the substrate at a surface to form a second region of the first conductivity type, the second region having a region of reduced doping concentration of the implanted second dopant between the center portion and the edge; d) forming an epitaxial layer of the first conductivity type on the surface, wherein the surface is covered by the first epitaxial layer; and e) implanting the epitaxial layer with a third dopant and forming a third region of the second conductivity type in the epitaxial layer, wherein this third region forms a pn junction with the second region.