Patent ID: 8114784

Claim:
A method of forming an integrated circuit, comprising the steps of: providing a substrate; forming field oxide in said substrate; forming an n-well in said substrate; forming a p-well in said substrate; forming an n-channel MOS transistor in said p-well by a process comprising the steps of: forming a first gate dielectric on a top surface of said p-well; forming a first gate structure on a top surface of said first gate dielectric; forming n-type source and drain regions in said p-well adjacent to said first gate structure; and forming a first set of silicide regions on, and in contact with, top surfaces of said n-type source and drain regions; forming a p-channel MOS transistor in said n-well by a process comprising the steps of: forming a second gate dielectric on a top surface of said n-well; forming a second gate structure on a top surface of said second gate dielectric; forming p-type source and drain regions in said n-well adjacent to said second gate structure; and forming a second set of silicide regions on, and in contact with, top surfaces of said p-type source and drain regions; forming a pre-metal dielectric liner layer stack on said n-channel transistor and said p-channel transistor, by a process comprised of the steps of: providing a deposition chamber; inserting said substrate into said deposition chamber; depositing a first silicon nitride layer on said n-channel transistor and said p-channel transistor by a process comprising the steps of: flowing SiH4 gas at 5 to 80 sccm into the deposition chamber; flowing NH3 gas at 20 to 320 sccm into the deposition chamber; flowing N2 gas at 2500 to 40,000 sccm into the deposition chamber; maintaining a pressure of 1 to 100 ton in the deposition chamber; maintaining a temperature of 300 C to 400 C in the deposition chamber; and forming a plasma in the SiH4 gas, NH3 gas, and N2 gas by supplying 10 to 150 watts RF power; exposing said first silicon nitride layer to a nitrogen-containing plasma in said deposition chamber; and repeating said steps of depositing a silicon nitride layer and exposing the silicon nitride layer to a nitrogen-containing plasma for a plurality of iterations; forming a pre-metal dielectric layer on said pre-metal dielectric liner layer stack; and forming contacts in said pre-metal dielectric layer stack and in said pre-metal dielectric liner layer stack, on, and electrically connected to, said n-type source and drain regions and said p-type source and drain regions.