Patent ID: 7720189

Claim:
A method for automatically acquiring a serial data stream clock, the method comprising: receiving a serial data stream with an unknown clock frequency; coarsely determining the clock frequency by: initially determining the coarse clock frequency using a first sampling measurement as follows: counting the number of data transitions in a first time segment of the serial data stream at a plurality of sample frequencies equal to Fref 1 /n, where n is an integer>1, wherein Fref 1 is a high frequency first reference clock frequency; comparing the count for each sampling frequency to a count for Fref 1 (n=1); determining the highest sampling frequency Fref 1 /x (n=x) having a lower count than Fref 1 ; and, setting the coarse clock frequency to Fc 1 =Fref 1 /(x−1); and, finally determining the coarse clock frequency using a second sampling measurement; adjusting a phase-locked loop (PLL) in response to the coarsely determined clock frequency; supplying the serial data stream to the PLL as an input signal; using the PLL, acquiring the clock frequency; tracking a phase of the acquired clock frequency; and, supplying a recovered data clock.