Patent ID: 8589852

Claim:
A method of designing a circuit, comprising: receiving values for a circuit design, the circuit-design values including design parameters (DPs) that specify a circuit design and statistical parameters (SPs) that model an uncertainty in the circuit design, the statistical parameters being characterized by reference SP values and corresponding SP-variation values that determine a statistical variation for the statistical parameters; receiving values that specify one or more performance goals that restrict the circuit design based on DP values and SP values; receiving, for each performance goal, a specified tolerance from the reference SP values for the statistical parameters; receiving first DP values for the design parameters; using at least one computer to determine for each performance goal a corresponding worst-case distance (WCD) in the statistical parameters along a WCD line that connects the reference SP values with SP values at a closest point of failure in a failure region, the failure region characterizing SP values where the corresponding performance goal is not satisfied for the first DP values; determining a WCD corner for each performance goal along its corresponding WCD line by scaling the worst-case distance so that the WCD corner has a statistical variation that corresponds to the specified tolerance for the corresponding performance goal; and determining second DP values for the design parameters by adjusting the first DP values so that at least one WCD corner has an improved value for satisfying the corresponding performance goal.