Patent ID: 8796844

Claim:
A package structure comprising: at least one first semiconductor element having a plurality of first conductive bumps; at least one second semiconductor element having a plurality of second conductive bumps; and a semiconductor interposer comprising: a connection motherboard having a first surface and a second surface opposite the first surface and composed of at least one insulating layer; a first conductive layer disposed in the connection motherboard and including a plurality of wires; and a second conductive layer disposed in the connection motherboard and including a plurality of conductive columns; wherein the first conductive layer and the second conductive layer are electrically connected in the connection motherboard, at least one wire is exposed on the first surface and at least one conductive column is exposed on the second surface for electrically connecting the first surface to the second surface; wherein at least one wire is electrically connected to one of the plurality of first conductive bumps and one of the plurality of second conductive bumps and at least one conductive column is electrically connected to the at least one wire.