Patent ID: 7737759

Claim:
A logarithmic linear variable gain CMOS amplifier comprising: a first differential pair of transistors forming a differential input comprising a common source node, each transistor of said first differential pair of transistors comprising a control node; a pair of diode-connected load transistors connected to said first differential pair of transistors; a second differential pair of transistors connected to said pair of diode-connected load transistors, and comprising a common source node and respective control nodes connected to the control nodes of said first differential pair of transistors; first and second current mirrors respectively connected to the common source nodes of said first and second differential pairs of transistors for programmably injecting respective bias currents thereto, with a sum of the respective bias currents remaining constant; and a digital-to-analog converter connected to said first and second current mirrors for setting the respective bias currents therefrom, with the respective bias currents output by said digital-to-analog converter respectively having values (A+x) and (B−x), with A and B not being equal to one another and with A and B being programmed constant bias current values and x being a variable factor.