Patent ID: 7254074

Claim:
An open digit line array architecture, comprising: a first plurality of sense of amplifiers, each sense amplifier of the first plurality coupled to a respective pair of digit lines; a second plurality of sense amplifiers, each sense amplifier of the second plurality coupled to a respective pair of digit lines, the second plurality of sense amplifiers having at least a first group of sense amplifiers and a second group of sense amplifiers, the first and second groups of sense amplifiers independently couplable to a power supply; a common reference line; a first plurality of switches coupled to a respective first digit line of the pair of digit lines coupled to the first plurality of sense amplifiers and further coupled to the common reference line, each switch configured to selectively couple the respective first digit line to the common reference line; and a second plurality of switches coupled to a respective first digit line of the pair of digit lines coupled to the second plurality of sense amplifiers and further coupled to the common reference line, the second plurality of switches having at least first and second groups of switches, the first group of switches coupled to the first digit lines of the pairs of digit lines coupled to the first group of sense amplifiers and configured to selectively couple the respective first digit lines to the common reference line, the second group of switches coupled to the first digit lines of the pairs of digit lines coupled to the second group of sense amplifiers and configured to selectively couple the respective first digit lines to the common reference line, the first and second groups of switches independently activatable to independently couple the first digit lines of the respective group of sense amplifiers to the common reference line.