Patent ID: 7196581

Claim:
An amplifier circuit comprising: (a) first and second amplifiers connected in a parallel configuration; (b) first and second input resistances, a first terminal of the first input resistance being coupled to one input of both of the first and second amplifiers, a first terminal of the second input resistance being coupled to another input of both of the first and second amplifiers, a differential input signal having both an upper and a lower common mode range being applied between a second terminal of the first input resistance and a second terminal of the second input resistance; (c) a circuit for combining output signals of the first and second amplifiers to produce an output signal representative of feedback currents produced in the first and second input resistances in response to output signals of the first and second amplifiers, respectively; and (d) an offset adjustment amplifier receiving a differential signal representative of a difference between offset voltages of the first and second amplifiers for generating offset adjustment signals and applying the offset adjustment signals to adjust the offset voltage of at least one of the first and second amplifiers to cause the first and second amplifiers to operate seamlessly as a common mode component of the differential input signal undergoes a transition between its upper and lower common mode ranges.