Patent ID: 7447884

Claim:
A branch prediction circuit comprising: a program counter to indicate an address of an instruction; a first storage unit provided in a stage after the program counter and configured to store the address of a first branching instruction and a branched address branched to by said first branching instruction; a first detection circuit provided in a stage after the first storage unit and configured to detect whether the address of the first branching instruction stored in the first storage unit is the same as an address of a second branching instruction output from the program counter, and if so, to output the branched address corresponding to the detected address from the first storage unit; a second storage unit configured to store the branched address supplied from said first detection circuit and an address of an instruction which is unrelated to the second branching instruction and executed immediately after said second branching instruction; and a second detection circuit provided in the same stage as the second storage unit and configured to detect the branched address from said second storage unit, wherein when an address output from said program counter is the address of an instruction to be executed immediately after a third branching instruction, the branched address detected by the second detection circuit is supplied to the program counter.