Patent ID: 8796795

Claim:
A memory cell comprising: a memory device stack including a top electrode, a memory element having a plurality of layers, and a bottom electrode; a sidewall protection sleeve of a first dielectric material encircling sidewalls of the memory element, the bottom electrode, and a lower portion of the top electrode, the sidewall protection sleeve generally conforming to a shape of the memory element in a plane parallel to a surface of a substrate and having a generally conical shape with an open top through which an upper surface of the top electrode protrudes; and a metal bit line interconnect in electrical contact with the upper surface of the top electrode, the metal bit line interconnect being formed in a via that is wider than the upper surface of top electrode and extends below an upper edge of the sidewall protection sleeve, the metal bit line interconnect covering the upper surface of the top electrode and extending down below a plane of the upper surface of the top electrode to make contact with and surround an upper portion of the sidewall protection sleeve.