Patent ID: 6852606

Claim:
A method of forming an isolation layer of a semiconductor device, comprising: a) forming a first insulating layer on a substrate; b) partially etching the first insulating layer to expose a surface of the substrate to form a narrow first isolation region and a second isolation region wider than the first isolation region; c) forming a single first recess in said first isolation region of the substrate and the first insulating layer and a plurality of second recesses in said second isolation region of the substrate and the first insulating layer; d) forming a third recess, deeper than the first recess, in a center area of the first recess; e) filling the first, second, and third recesses with a second insulating material such that the second insulating material filling the plurality of second recesses is connected; and f) removing the first insulating layer such that the second insulating material filling the second recesses remains connected after the first insulating layer has been removed.