Patent ID: 7388939

Claim:
A fractional-R synthesizer, comprising: a reference frequency source capable of generating a reference frequency signal; a controllable oscillator for generating a controlled frequency signal, the controllable oscillator responsive to an error signal; a variable rational divider for generating an output frequency signal, the variable rational divider coupled to the controllable oscillator to receive the controlled frequency signal, the variable rational divider having a divide ratio of the controlled frequency signal to the output frequency signal that is variable by sub-integer rational steps; a comparator coupled to the variable rational divider to receive the output frequency signal and coupled to the reference frequency source to receive the reference frequency signal, the comparator operable to generate the error signal upon comparison of the output frequency signal and the reference frequency signal; where the controllable oscillator, variable rational divider, and comparator connect to form a phase locked loop where an instantaneous ratio of the controlled frequency to the reference frequency is a rational number variable by sub-integer rational steps.