Patent ID: 7701263

Claim:
An apparatus comprising: one or more cascode drivers configured to drive one or more devices coupled to the apparatus, wherein each of the one or more cascode drivers includes a plurality of cascode transistors; a bias voltage generator coupled to the one or more cascode drivers, wherein the bias voltage generator is configured to control cascode bias voltages provided to the cascode transistors of the one or more cascode drivers, wherein the bias voltage generator is configured to control the cascode bias voltages provided to the cascode transistors based on a plurality of programmable control bits received by the bias voltage generator; wherein the cascode bias voltages provided to the cascode transistors of each of the one or more cascode drivers include a first cascode bias voltage (V TN ) provided to a first cascode transistor of each cascode driver and a second cascode bias voltage (V TP ) provided to a second cascode transistor of each cascode driver; and a voltage supply (V DD ) coupled to the bias voltage generator and the one or more cascode drivers, wherein the bias voltage generator is configured to maintain the first cascode bias voltage (V TN ) at a designated voltage level that is below a breakdown voltage associated with the first cascode transistor, and maintain the second cascode bias voltage (V TP ) at a voltage level that is equal to the difference between the voltage supply (V DD ) and the first cascode bias voltage (V TN ).