Patent ID: 8609502

Claim:
A method of manufacturing a semiconductor device including an IGBT forming region and a diode forming region, the semiconductor device comprising: a first conductivity type layer of a first conductivity type disposed in the diode forming region; a collector layer of a second conductivity type disposed in the IGBT forming region; a drift layer of the first conductivity type disposed above the first conductivity type layer and the collector layer; a base region of the second conductivity type disposed above the drift layer; a plurality of trenches penetrating the base region into the drift layer so as to divide the base region into a plurality of portions; an emitter region of the first conductivity type disposed in one of the plurality of portions of the base region divided by the plurality of trenches and being in contact with a sidewall of one of the plurality of trenches; a gate insulating layer disposed on a surface of the plurality of trenches; a gate electrode disposed on the gate insulating layer in the plurality of the trenches; a first electrode electrically coupled with the base region and the emitter region; and a second electrode disposed on an opposite side of the collector layer from the drift layer, wherein: in the IGBT forming region, the collector layer, the drift layer, the base region, the emitter region, and the gate electrode provide an IGBT; in the diode forming region, the first conductivity type layer and the drift layer have a PN junction with the base region so as to provide the diode; and the IGBT and the diode are integrated, the method comprising: preparing a semiconductor substrate of the first conductivity type having first and second surfaces opposing each other; forming the collector layer and the first conductivity type layer on the second surface of the semiconductor substrate; attaching a support base to a side of the semiconductor substrate where the collector layer and the first conductivity layer are formed; reducing a thickness of the semiconductor substrate from the first surface in a state where the semiconductor substrate is attached with the support base; forming an element part including the base region, the emitter region, the plurality of trenches, the gate insulating layer, the gate electrode, and the first electrode on the first surface of the semiconductor substrate after reducing the thickness of the semiconductor substrate; attaching a heat sink substrate including a plurality of heat sinks to the semiconductor substrate by bonding the plurality of heat sinks to the first electrode; removing the support base from the semiconductor substrate; dividing the plurality of heat sinks into individual heat sinks; and dicing the semiconductor substrate into a plurality of chips in a state where the individual heat sinks are attached to the semiconductor substrate.