Patent ID: 7378887

Claim:
A semiconductor integrated circuit comprising: an external terminal; an external input/output buffer circuit; a power on reset circuit; and an internal circuit, wherein the power supply detecting circuit outputs a power supply voltage detection signal indicating that a power supply voltage supplied from the outside enters a predetermined state, wherein the power on reset circuit receives the power supply voltage detection signal, instructs an initial setting operation on the internal circuit at a predetermined timing and, in response to completion of the initial setting operation on the internal circuit, sets a predetermined initial state of any of a high-level output, a low-level output, and a high impedance of the external input/output buffer circuit to a state where input/output operation can be performed, wherein the power on reset circuit outputs a signal for ensuring an initial state of a predetermined circuit node until the initial setting operation is instructed to the internal circuit, wherein a first power supply voltage is supplied to the external input/output buffer circuit, the power supply detecting circuit, and the power on reset circuit, and a second power supply voltage is supplied to the internal circuit, and wherein the power supply detecting circuit has a first circuit for detecting supply of the first power supply voltage and a second circuit for detecting supply of the second power supply voltage and sets, as the power supply voltage detection signal, an AND signal between a detection result of the first power supply voltage by the first circuit and a detection result of the second power supply voltage by the second circuit.