Patent ID: 7436906

Claim:
A synchronous detector detecting a boundary position between a short preamble including symbols forming a specific pattern and a long preamble used in channel estimation as symbol synchronization timing, said synchronous detector, comprising: an arithmetic circuit for receiving a complex baseband signal represented in a complex number and for obtaining a correlation value between the complex baseband signal and a pre-stored pattern signal positioned at a top of the complex baseband signal; a peak detector for comparing the correlation value to a threshold value which is to be used among a plurality of threshold values, and for determining, when one of the correlation values is detected which is larger than the threshold value to be used, a peak of the correlation values; and a synchronization determining circuit operative in response to the peak determined for estimating a timing at which a peak of the correlation values comes next, and for monitoring determination of a peak of the correlation values at the timing estimated to determine a synchronization timing with the pattern signal to output a sync detection signal, wherein the threshold value to be used is set to a value under a severer condition in a first period of time than in a second period of time, the second period of time extending from the peak determination to an elapse of a predetermined period of time, and the first period of time being a time period other than the second period of time, whereby the threshold value to be used is different between the first and second periods of time.