Patent ID: 7463650

Claim:
A segmentation and reassembly circuit, comprising: a switching fabric; an ingress block operably coupled to the switching fabric, wherein the ingress block receives a first packet, wherein the first packet includes a destination that determines forwarding parameters, wherein the ingress block includes: an ingress buffer, wherein the ingress buffer stores portions of received packets, wherein each received packet has a corresponding ingress buffer index and a corresponding ingress buffer count; an ingress context table, wherein the ingress context table stores ingress status information for at least the first packet, wherein the ingress status information includes an ingress buffer index and an ingress buffer count for the first packet; a segmentation processor operably coupled to the ingress buffer and the ingress context table, wherein while the first packet is being received, the segmentation processor creates segmentation cells from portions of the first packet received, wherein each segmentation cell is provided to the switching fabric as it is completed, wherein when an end portion of the first packet is received, the segmentation processor verifies that the first packet was received successfully to produce a destination decision for the first packet, wherein the destination decision is included in a final segmentation cell provided to the switching fabric; an egress block operably coupled to the switching fabric, wherein the egress block receives the segmentation cells for the first packet from the ingress block via the switching fabric, wherein the egress block reassembles the first packet to produce a reassembled first packet from the segmentation cells, wherein the egress block forwards the reassembled first packet based on at least a portion of the forwarding parameters.