Patent ID: 7064071

Claim:
A method of forming spacer elements, the method comprising: forming a conductive line above a semiconductor region; conformally forming a spacer layer stack over said conductive line and said semiconductor region, said spacer layer stack comprising an etch stop layer separating a first spacer layer from a second spacer layer formed above said first spacer layer, said first and second spacer layers comprised of a material that may be etched selectively to said etch stop layer by a predefined etch chemistry; anisotropically etching said second spacer layer to form sacrificial sidewall spacers; removing portions of said etch stop layer that are exposed during the formation of said sacrificial sidewall spacers; and removing said sacrificial sidewall spacers and exposed portions of said first spacer layer by an etch process using said specified etch chemistry to form said spacer elements, wherein the steps of anisotropically etching said second spacer layer to form sacrificial sidewall spacers, removing portions of said etch stop layer that are exposed during the formation of said sacrificial sidewall spacers, and removing said sacrificial sidewall spacers and exposed portions of said first spacer layer by a common etch process using said specified etch chemistry are all performed in a single etch chamber as an in situ process.