Patent ID: 8161482

Claim:
A multi-core structure for an operating system, comprising: a first operating system (OS) core for providing kernel services, the first OS core comprising a first physical memory for storing one or more threads and a virtual memory for storing processes associated with the kernel services, wherein the processes are associated with the threads; a first memory manager for performing first address translations for the first OS core, wherein the first address translations provide a memory map which correlates a virtual address to physical addresses of the threads stored in the first physical memory; a first scheduler for scheduling processes for execution by the first OS core, the first scheduler further comprising a pipeline for receiving the threads that are associated with the scheduled processes for execution; a second OS core comprising a second physical memory; a second memory manager for performing second address translations for the second OS core, wherein the second address translations are used to access the memory map of the first memory manager to obtain the physical addresses of the threads stored in the first physical memory; a second scheduler for removing one or more of the received threads from the pipeline and for placing the removed threads into a schedule for execution on the second OS core; and a third OS core comprising a third physical memory, wherein the second memory manager provides the third OS core with physical addresses for use by the third OS core to access the threads stored in the first physical memory, and wherein the second scheduler removes one or more of the received threads from the pipeline and places the removed threads into a schedule for execution on the third OS core.