Patent ID: 7664168

Claim:
A data communication apparatus comprising: a signal terminal for inputting a receiving signal including portions that have different duty ratios and that have a constant pulse frequency on the whole; a reference voltage terminal for inputting a reference voltage; a clock generating circuit for generating a clock signal based on the receiving signal; a data signal generating circuit for generating a data signal based on a recognition of a duty ratio of the receiving signal; a level shift circuit for level shifting the receiving signal to produce a level shifted receiving signal, wherein the clock generating circuit generates the clock signal based on the level shifted receiving signal, and the data signal generating circuit generates the data signal based on a recognition of a duty ratio of the level shifted receiving signal; and an internal circuit for inputting the clock signal generated by said clock generating circuit and the data signal generated by said data signal generating circuit, and outputting a transmission signal to said signal terminal, wherein electric source power for said clock generating circuit, said data signal generating circuit, and said internal circuit is generated based on the receiving signal and the reference voltage.