Patent ID: 7701260

Claim:
A phase-to-sinusoid converter, comprising: a lookup table associated with input mapping circuitry; the lookup table having at least one quadrant of values for a sinusoidal signal stored therein; the at least one quadrant of values being reduced from associated predetermined values thereof; the lookup table configured to have two address ports and two data out ports respectively associated with the address ports; the lookup table coupled to receive a first portion of a phase-accumulated signal to the address ports and configured to map the first portion of the phase-accumulated signal to an associated quadrant for providing a cosine value and a sine value obtained from the at least one quadrant of values; control circuitry coupled to receive the cosine value and the sine value for selective inverting thereof for quadrant mapping, the cosine value being inverted for the phase-accumulated signal being in the second or third quadrants, the sine value being inverted for the phase accumulated signal being negatively signed; a first multiplier coupled to receive at least a portion of the sine value output from the lookup table and to receive a phase adjustment; and the first multiplier configured to multiply at least the portion of the sine value received with the phase adjustment to generate a first correction factor, wherein the first correction factor is proportional to phase error.