Patent ID: 7768328

Claim:
A semiconductor circuit, comprising: a differential input section to receive input differential signals; a load resistance section to output a voltage according to a current output by the differential input section; differential signal output terminals to output a differential signal corresponding to the voltage output from the load resistance section; a low-pass filter to extract a direct-current component of the differential signal output from the differential signal output terminals; and a load adjustment section to feed back the direct-current component extracted by the low-pass filter to adjust a resistance value of the load resistance section, wherein the differential input section includes: a first transistor having a gate receiving one of the input differential signals; and a second transistor having a gate receiving another of the input differential signals, wherein the load resistance section includes: a third transistor connected between a first node connected to a drain of the first transistor, and one of the differential signal output terminals; a fourth transistor connected between a second node connected to a drain of the second transistor, and another of the differential signal output terminals; a fifth transistor having a drain connected to the one of the differential signal output terminals, and a gate connected to the second node; and a sixth transistor having a drain connected to the another of the differential signal output terminals, and a gate connected to the first node.