Patent ID: 7619470

Claim:
A power amplifier comprising: a plurality of field effect transistors connected in parallel and each having a first and second ends, the first end being connected to ground, and channel widths of the field effect transistors being different from each other, a gate of each of the field effect transistors being divided into a plurality of gate fingers; an amplifying unit which comprises at least one of an inductor, a capacitor and a band pass filter and has a third and fourth ends, the third end being connected to the second ends of the field effect transistors, and the fourth end outputting an amplified output signal; and an amplitude controller which sends control signals respectively to gates of the field effect transistors to turn on or off the field effect transistors based on an address signal for performing selection on the field effect transistors and a clock signal, wherein selection is performed on the field effect transistors so as to make an output power of the amplifying unit proportional to the number of field effect transistors which are in their on-state among the field effect transistors, the field effect transistors are formed on a same substrate, and the field effect transistors are arranged so as to prevent a field effect transistor selected for the first time at time of an output of Nth (where N≧2) lowest output power and a field effect transistor selected for the first time at time of an output of(N+1)th lowest output power from being adjacent to each other.