Patent ID: 6951818

Claim:
A method of manufacturing an electronic device provided with a substrate having a first side, at which first side are provided in that order a first electrically conducting region, an intermediate layer of electrically insulating material, and a second electrically conducting region, an electrically conducting vertical interconnect being present between said regions, characterized in that the method comprises the following steps: modifying a surface at the first side of the substrate in accordance with a desired pattern, which pattern defines the via, thus forming a modified portion and a remaining portion of the surface; providing a composition on the surface, which composition comprises a first and a second polymer and a solvent, said solvent substantially wetting the surface, whereby a first and a second sub-layer are formed under phase separation, each of said sub-layers comprising substantially one of the polymers, while the first sub-layer lies on the first electrically conducting region; etching the first sub-layer with a first etchant; and providing the vertical interconnect and the second electrically conducting region.