Patent ID: 8906762

Claim:
A method for manufacturing a non-volatile memory, comprising: forming a first layer of charge storage material; forming a dielectric layer over the first layer of charge storage material; forming a first control gate layer over the dielectric layer; forming one or more cutout regions extending through the first control gate layer and the dielectric layer; forming one or more diffusion barriers within the one or more cutout regions, the forming one or more diffusion barriers within the one or more cutout regions includes depositing a diffusion barrier layer and etching the diffusion barrier layer to form one or more sidewall diffusion barriers within the one or more cutout regions; and forming a second control gate layer over the first control gate layer subsequent to the forming one or more diffusion barriers, the second control gate layer fills the one or more cutout regions such that the second control gate layer shares a common boundary with the first layer of charge storage material, the first layer of charge storage material includes material of a first conductivity type and the first control gate layer includes material of a second conductivity type different from the first conductivity type, the forming a second control gate layer over the first control gate layer includes depositing the second control gate layer on the first control gate layer, the second control gate layer directly contacts the first control gate layer without any intervening layers between the second control gate layer and the first control gate layer.