Patent ID: 7696085

Claim:
A method of forming a metal interconnect structure comprising: forming a hard mask layer over a dielectric layer; patterning said hard mask layer to form a recessed region comprising a first portion and a second portion, wherein said first portion has a first width between a first pair of parallel edges and said second portion has a second width between a second pair of parallel edges, and wherein said first pair of parallel edges is parallel to said second pair of parallel edges and said second width is greater than said first width; applying self-assembling block copolymers within said recessed region; annealing said self-assembling block copolymers and inducing formation of a cylindrical polymeric block and a polymeric block matrix surrounding said cylindrical polymeric block; removing said cylindrical polymeric block selective to said polymeric block matrix; and forming a via cavity in said dielectric layer by etching said dielectric layer employing said polymeric block matrix as an etch mask.