Patent ID: 7573513

Claim:
An image processing apparatus comprising: a random access memory image storage unit operable to store an image as a plurality of lines, each line having a plurality of pieces of pixel data sequentially arranged; a first reading out unit operable to sequentially read out, from said random access memory image storage unit, the plurality of pieces of pixel data of each line of the plurality of lines and operable to sequentially output the plurality of pieces of pixel data sequentially read out; a second reading out unit operable to read out one or more pieces of pixel data located at a head of each line of the plurality of lines and operable to output the one or more pieces of pixel data read out; and an arithmetic unit operable to execute an arithmetic process for generating output pixel data using the pixel data output from said first reading out unit and said second reading out unit, wherein: before said arithmetic unit completes the arithmetic process for generating a last output pixel data for one of the plurality of lines using the pixel data output from said first reading out unit, said second reading out unit is operable to read out the one or more pieces of the pixel data located at the head of a next line; and said arithmetic unit is operable to use the pixel data output from said second reading out unit when executing the arithmetic process to generate a first output pixel data for the next line.