Patent ID: 7095271

Claim:
A bias circuit comprising: an output node for outputting an output current; an internal node; a feedback amplifier comparing a first reference voltage with a voltage on the internal node and outputting a feedback signal; a current source controlled by the feedback signal; a first differential transistor connected to the current source, the first differential transistor receiving a second reference voltage; a second differential transistor connected to the current source, the second differential transistor receiving the second reference voltage, the second differential transistor having a dimension that is different from that of the first differential transistor; a first resistive transistor connected to the first differential transistor; a second resistive transistor connected to the second differential transistor, the second resistive transistor having a first gate; a first mirror transistor having a second gate connected to the first gate, the first mirror transistor connected to the internal node; and a second mirror transistor having a third gate connected to the first gate, the second mirror transistor connected to the output node.