Patent ID: 7505515

Claim:
A continuous time equalizer for equalizing an input signal using a feedforward equalizer portion and a feedback equalizer portion, wherein the feedforward equalizer portion uses a first set of coefficients and the feedback equalizer portion uses a second set of coefficients, comprising: a slicer operable to make bit decisions on a combined output from the feedforward and feedback equalizer portions to form a slicer output; a first adaptive delay circuit operable to delay the combined output to form a delayed output; a feedforward error mixer configured to process an error signal representing the difference between the slicer output and the delayed output to form the first set of coefficients in a closed mode of operation, the feedforward error mixer forming a first set of open loop coefficients in an open loop mode of operation; a first switch operable to couple the combined output to the adaptive delay circuit; a second switch operable to couple the combined output to the slicer; and a controller operable to control the delay provided by the first adaptive delay circuit such that a first group delay through the slicer and a second group delay through the first adaptive delay circuit are substantially equal in response to a sinusoidal form of the input signal by performing the following acts; setting the feedforward error mixer into the open loop mode of operation; setting a first coefficient C 0 in the first set to 1 and the remaining coefficients in the first set to zero; setting the coefficients in the second set to be all equal; setting the first switch ON and the second switch OFF and determining a first phase of the error signal; setting the first switch OFF and the second switch ON and determining a second phase of the error signal; and controlling the delay such that the first phase equals the opposite of the second phase.