Patent ID: 6906648

Claim:
A dual slope: analog-to-digital converter, comprising: an input circuit; an integrator; a comparator; an offset cancellation logic; a hysteresis logic; a control logic; and a data counter, wherein the input circuit selectively supplies a plurality of input voltages and a plurality of reference voltages to the integrator, the control logic determines a first reference voltage for providing for the input circuit during initialization, being integrated by the integrator, a residual voltage is determined as a second reference voltage is provided during discharge period, the data counter converts an input voltage to a digital data corresponding to the discharge period, the offset cancellation logic determines an offset value from the first reference voltage during an offset cancellation cycle and compares which with input value that is to be converted, the hysteresis logic updates the output value comparing a newly converted value during the current measurement cycle and a previous value converted in a previous measurement cycle.