Patent ID: 8472193

Claim:
A semiconductor device comprising: an insulation substrate having a first surface and a second surface that is opposite to the first surface; a metal wiring layer joined to the first surface of the insulation substrate; a semiconductor element joined to the metal wiring layer; a heat sink arranged on the second surface of the insulation substrate; and a stress relaxation member made of a material having a high thermal conductivity, the stress relaxation member being located between the insulation substrate and the heat sink in such manner as to couple the insulation substrate and the heat sink such that heat can be conducted therebetween, wherein the heat sink has a plurality of partitioning walls that extend in one direction and are arranged at intervals, wherein the stress relaxation member has a stress absorbing portion that is formed by a through hole, the through hole extending through the entire thickness of the stress relaxation member, and wherein the through hole is an elliptic hole having a major axis, which extends along the longitudinal direction of the partitioning walls, and a minor axis, which extends along the arranging direction of the partitioning wall, such that its dimension along the longitudinal direction of the partitioning walls is greater than its dimension along the arranging direction of the partitioning walls to equalize the thermal stress along the longitudinal direction of the partitioning walls with the thermal stress along the arranging direction of the partitioning walls.