Patent ID: 8879652

Claim:
One or more computer-readable hardware storage memory devices comprising processor-executable instructions which, responsive to execution by one or more processors, are configured to enable a device to: receive data symbols for a resource of a transmit frame; receive the one or more pilot symbols from the pilot symbol generation circuitry; and insert the one or more pilot symbols into the resource of the transmit frame according to a predetermined staggered pilot symbol pattern including one or more of a group comprising: pilot symbol locations located at or near each time boundary of the resource; and pilot symbol locations located at or near each frequency boundary of the resource, wherein the pilot symbol locations located at or near each time boundary of the resource comprises one of: pilot symbol locations less than or equal to two Orthogonal Frequency Division Multiplexing (OFDM) symbols from a first time boundary of the resource and pilot symbol locations less than or equal to two OFDM symbols from a second time boundary of the resource; or pilot symbol locations in an OFDM symbol at a first time boundary of the resource and pilot symbol locations in an OFDM symbol at a second time boundary of the resource; and wherein the pilot symbols located at or near each frequency boundary of the resource comprises one of: pilot symbol locations less than or equal to three sub-carriers from a first frequency boundary of the resource and pilot symbol locations less than or equal to three sub-carriers from a second frequency boundary of the resource; or pilot symbol locations at a sub-carrier at a first frequency boundary of the resource and pilot symbol locations at a sub-carrier at a second frequency boundary of the resource.