Patent ID: 8823074

Claim:
A semiconductor device comprising a memory circuit, the memory circuit comprising: a transistor; and a capacitor, wherein the transistor comprises: a semiconductor layer; a source electrode and a drain electrode over and electrically connected to the semiconductor layer; a first sidewall over the semiconductor layer, the first sidewall in contact with a side surface of the source electrode; a second sidewall over the semiconductor layer, the second sidewall in contact with a side surface of the drain electrode; a first insulating layer over the semiconductor layer, the source electrode, the drain electrode, the first sidewall and the second sidewall; and a first gate electrode over the first insulating layer, the first gate electrode overlapping with the semiconductor layer, wherein each of the first sidewall and the second sidewall overlaps with the first gate electrode, and wherein one of the source electrode and the drain electrode is electrically connected to the capacitor.