Patent ID: 7352444

Claim:
A method for processing a semiconductor wafer, comprising: positioning the semiconductor wafer in a pre-alignment unit of a first photolithography tool; moving the semiconductor wafer from the pre-alignment unit to an exposure unit of the first photolithography tool; rotating the semiconductor wafer with respect to its position in the pre-alignment unit prior to arranging the semiconductor wafer upon a stage of the exposure unit; imaging alignment marks from a patterned mask plate arranged within the exposure unit upon the semiconductor wafer; positioning the semiconductor wafer within a deposition chamber relative to a crystal orientation marker of the semiconductor topography subsequent to the step of imaging the alignment marks, wherein the step of imaging the alignment marks comprises imaging the alignment marks at locations within the semiconductor wafer relative to the crystal orientation marker and corresponding to respective positions of fixed shadow clamps within the deposition chamber such that the step of positioning the semiconductor wafer within the deposition chamber comprises aligning the alignment marks with the fixed shadow clamps; and repeating the steps of arranging, moving and rotating the semiconductor wafer within a second photolithography tool for a subsequent lithography process step after depositing a material upon the semiconductor wafer in the deposition chamber.