Patent ID: 7987222

Claim:
A method for performing multiplication of a first number with a second number on a target device, the method comprising: generating a product by multiplying a first plurality of bits associated with the first number and a first plurality of bits associated with the second number using a single digital signal processor (DSP) where a largest dimension of multiplication supported by the DSP is under that which supports multiplying the first and second numbers; retrieving a stored value designated as a product of a second plurality of bits associated with the first number and a second plurality of bits associated with the second number from a memory, wherein a number of bits in the second plurality of bits associated with the first number is less than a number of bits of the first number, and wherein a number of bits in the second plurality of bits associated with the second number is less than a number of bits of the second number, wherein the memory resides outside of the DSP; scaling the product with respect to a position of the first plurality of bits associated with the first number and a position of the first plurality of bits associated with the second number to form a scaled product, and scaling the stored value with respect to a position of the second plurality of bits associated with the first number and a position of the second plurality of bits associated with the second number; and summing the scaled product and the scaled stored value to generate a value representing a product of the first number and the second number, wherein the first number and the second number each have a number of bits equal to or greater than a total of the first and second plurality of bits.