Patent ID: 8154309

Claim:
A circuit for use in measuring a frequency dependent capacitance of a signal transmission structure on an integrated circuit device, the circuit comprising: (a) a number of PSRO (performance scan-ring oscillator) stages each including: (i) an input stage circuit including two input terminals and a switch for selectively coupling a signal from one of the two input terminals to an input terminal of a signal delay circuit; (ii) the signal delay circuit including a PFET control terminal and an NFET control terminal, and at least one delay element, the signal delay circuit operable for applying the signal to the PFET and NFET control terminals such that they are not on at the same time; (iii) a driver stage circuit including first and second drivers each having an output and PFET and NFET transistors, the PFET control terminal connected to control the PFET transistors of both drivers, and the NFET control terminal connected to control the NFET transistors of both drivers; (iv) the output of the first driver connected in parallel to a first variable resistor and to a PSRO stage output terminal, the first variable resistor connected in series to a first measured capacitance, the first measured capacitance including a first parasitic capacitance portion and a second target capacitance portion; and (v) the output of the second driver connected to a second variable resistor, the second variable resistor connected in series to a second measured capacitance, the second measured capacitance including a parasitic capacitance portion; (b) the number of PSRO stages connected in series with their PSRO stage output terminal connected to the first input terminals of a subsequent PSRO stage circuit in the series; (c) an enable signal connected the first input terminal of a first PSRO stage; (d) an oscillating control signal connected to a second input terminal of each PSRO stage; and (e) current measurement circuitry operable to measure the current in the first and second drivers of each PSRO stage.