Patent ID: 8471745

Claim:
An apparatus, comprising: a plurality of digital to analog converters (DACs), wherein: a first of the plurality of DACs for processing a first number of bits of a codeword thereby generating a first analog signal; and a second of the plurality of DACs for processing a second number of bits of the codeword thereby generating a second analog signal; and a combiner for combining the first analog signal and the second analog signal thereby generating a third analog signal; and wherein: each of the plurality of DACs respectively including a plurality of ternary or tri-state current or voltage sources operative in accordance with a DAC encoding table based on a probability density function (PDF) of a plurality of codewords such that each of the plurality of ternary or tri-state current or voltage sources respectively operative based on one respective bit of the codeword, such that each bit of the codeword respectively having a value of +1, −1, or 0; and the PDF of the plurality of codewords having an approximately Gaussian distribution.