Patent ID: 7633423

Claim:
A circuit comprising: at least one sampling capacitor having a first end and a second end, each sampling capacitor configured to sample at least one respective signal during a sampling phase via the second end; an differential amplifier, having at least one input node and at least one output node, the amplifier being configured to receive at least one signal from the first end of the at least one sampling capacitor via the at least one differential input node; at least one decoupling switch configured to isolate the at least one first end of the at least one sampling capacitor from the amplifier during the sampling phase and to connect the at least one first end of the at least one sampling capacitor to the at least one input node of the amplifier during an amplifying phase following the sampling phase; and at least one reset switch configured to connect the at least one differential amplifier input node to a reference voltage when the sampling phase starts, to reset the at least one amplifier input node, and to disconnect the at least one amplifier input node from the reference voltage when the sampling phase ends wherein the reset switch is configured to cancel charge injected into the differential input when the reset switch is opened.