Patent ID: 7453386

Claim:
A digital to analog converter (DAC) converting digital data into a corresponding analog voltage, the digital data having upper bit data and lower bit data, the DAC comprising: a first resistor circuit dividing first and second reference voltages to output a plurality of first division voltages; a first decoder selecting one of the first division voltages in response to the upper bit data; a second resistor circuit dividing third and fourth reference voltages to output a plurality of second division voltages; a second decoder selecting one of the second division voltages in response to the lower bit data; and a sample and hold circuit including a first capacitor and a second capacitor, and outputting the analog voltage in response to an output voltage from the first decoder and an output voltage from the second decoder, wherein the sample and hold circuit samples the output voltage of the first decoder during a sample mode, and adds the output voltages of the first and second decoders through the first and second capacitors to output a combined voltage during a hold mode.