Patent ID: 7426124

Claim:
A Direct Current to Alternating Current (DC-AC) converter comprising: a Direct Current (DC) power source; a switching unit which includes a plurality of Field Effect Transistors (FETs) for changing paths of Direct Current (DC), so as to convert the DC to Alternating Current (AC); a transformer for transforming a voltage input from the switching unit; a load unit connected to the transformer; and a signal control unit for simultaneously parallel control of the FETs in the switching unit; wherein the FETs in the switching unit include a first P channel FET and a first N channel FET, which are interconnected in series and connected in parallel to the DC power source, and a second P channel FET and a second N channel FET, which are interconnected in series and connected in parallel to the DC power source; further comprising a feedback control unit connected between the switching unit and the load unit, so as to generate and output a predetermined signal by using a feedback signal from the load unit and a clock signal from an oscillator; wherein the signal control unit outputs four control signals by using the predetermined signal from the feedback control unit and the clock signal of the oscillator, so as to simultaneously control the first P channel FET, the first N channel FET, the second P channel FET, and the second N channel FET in parallel; wherein, in order to control the first P channel FET, the signal control unit comprises: a toggle switch to which a clock signal of the oscillator is input; a first AND gate to which the reference signal output from the feedback control unit and the clock signal output from the toggle switch are inputs; a time delay unit which delays a signal from the first AND gate for a predetermined time interval and then outputs a delayed signal; a first inverter for inverting a signal from the time delay unit and outputting an inverted signal; a second AND gate to which a signal from the first AND gate and the inverted signal from the first inverter are inputs; and a second inverter to which a signal from the second AND gate is input.