Patent ID: 8314025

Claim:
A method of forming a semiconductor device, comprising: forming a lower conductive pattern on a substrate; covering the lower conductive pattern with an electrical insulating material; forming a contact hole through the insulating material at such a location as to expose the lower conductive pattern, wherein the contact hole is formed out of alignment with respect to the lower conductive pattern so as to expose a portion of an upper surface of the lower conductive pattern and a portion of a side surface of the lower conductive pattern, and wherein the contact hole has a lower section adjacent the lower conductive pattern and an upper section open at an upper surface of the insulating material; subsequently forming a first contact spacer of electrical insulating material on sides of the contact hole; forming a contact plug in the contact hole that is electrically connected to the lower conductive pattern; and forming an upper conductive pattern in the electrical insulating material, wherein the forming of the contact spacer comprises forming a spacer of electrical insulating material that extends alongside the upper conductive pattern and in self-alignment therewith such that when the contact plug is formed the contact spacer is interposed between the contact plug and the upper conductive pattern.