Patent ID: 7629251

Claim:
A manufacturing method of a semiconductor integrated circuit device, comprising the steps of: (a) forming a first interconnect made of a first metal film over a semiconductor substrate; (b) forming a first interlayer insulating film over the first interconnect; (c) forming a first via hole for connecting to the first interconnect in the first interlayer insulating film; (d) forming a first interconnect trench for connecting to the first via hole in the first interlayer insulating film; (e) filling a second metal film in the first interconnect trench and in the first via hole, to form a second interconnect and a first connection portion together; (f) forming a third interconnect made of a third metal film over the second interconnect and the first interlayer insulating film; (g) forming a second interlayer insulating film over the third interconnect; (h) forming a second via hole for connecting to the third interconnect in the second interlayer insulating film; (i) forming a second interconnect trench for connecting to the second via hole in the second interlayer insulating film; and (j) filling a fourth metal film in the second interconnect trench and in the second via hole, to form a fourth interconnect and a second connection portion together, wherein a thickness of the second interlayer insulating film is larger than a thickness of the first interlayer insulating film, wherein a depth of the second interconnect trench is greater than a depth of the first interconnect trench, wherein the second interlayer insulating film is divided by a stopper film formed therein, wherein the step (i) includes using the stopper film as an etching stopper, wherein, in the step (d), the first interconnect trench is formed without an etching stopper, wherein a dielectric constant of the first interlayer insulating film is lower than a dielectric constant of the second interlayer insulating film, wherein a diameter of the second via hole is greater than a diameter of the first via hole, wherein the first interlayer insulating film has a first barrier insulating film which prevents diffusion of copper, the first barrier insulating film being in contact with a surface of the first interconnect and including silicon, carbon, and nitrogen, and wherein the second interlayer insulating film has a second barrier insulating film which prevents diffusion of copper, the second barrier insulating film being in contact with a surface of the third interconnect.