Patent ID: 7725513

Claim:
A communications processor for implementing scheduling processes and reducing the processing effort for determining a minimum value of a plurality of values stored in source registers and determining an index value of a source register having the minimum value, the communications processor comprising: a destination register; a first source register storing a first value, wherein the first source register comprises S bits, and wherein the first value comprises N lower bits of the first source register; a second source register storing a second value, wherein the second source register comprises S bits, and wherein the second value comprises N lower bits of the second source register; means for comparing the first value stored in the first source register with the second value stored in the second source register, wherein the first source register and the second source register each include an active status bit to indicate a status of the respective register; means for storing the first value in the destination register when the first value is less than or equal to the second value; means for concatenating the index value with the second value into a concatenated value and storing the concatenated value in the destination register when the second value is less than the first value; and means for overriding a result from the comparing means based on the active status bits of the first and second source registers, wherein the index value is stored in an upper (S−N) bits of the concatenated value and the second value stored in the N lower bits of the concatenated value.