Patent ID: 8582340

Claim:
A memory cell for storing one of more bits of data, said memory bit cell comprising: a substrate; and a sequence of metal layers disposed over said substrate, said sequence including at least a first metal layer disposed over and proximal to said substrate, a second metal layer disposed over and proximal to said first metal layer and one or more further metal layers disposed over said second metal layer; wherein said one or more further metal layers includes a subject metal layer, said subject metal layer including: a word line configured to carry a word line signal for controlling access to said memory cell, said word line extending continuously across said memory bit cell; power supply conductors configured to supply electrical power to said memory cell, said power supply conductors having of a plurality of separate power line sections disposed along a line spaced from and parallel to said word line; and said sequence of metal layers includes a further metal layer proximal to said subject metal layer and including a plurality of continuous power lines disposed perpendicular to said word line and said plurality of separate power line sections, each of said plurality of separate power line sections being conductively connected to one of said plurality of continuous power lines.