Patent ID: 7647489

Claim:
Apparatus for processing data comprising: processing logic operable to perform data processing operations; and an instruction decoder operable to decode program instructions to control said processing logic to perform data processing operations specified by said program instructions; wherein said instruction decoder is responsive to a handler branch instruction: (i) to calculate a handler pointer from a base address stored within a base address register and an index value specified by an index value field within said handler branch instruction; (ii) to branch to execution of a program instruction of a handler program stored within a memory at location indicated by said handler pointer; and (iii) to store a return address pointing a memory location storing a program instruction to be executed upon a return from said handler program, wherein said handler branch instruction includes an immediate value field and said instruction decoder is responsive to said handler branch instruction to control said processing logic to store an immediate value stored within said immediate value field into a predetermined register such that said immediate value is accessible to said handler program, wherein said immediate value field is an immediate value field separate from said index value field, wherein said index value is subject to a left logical shift before being used to calculate said handler pointer, said handler pointer being calculated as a sum of the base address and a logically left shifted version of the index value.