Patent ID: 7812756

Claim:
A pipeline A/D converter having a plurality of stages connected in cascade, each performing A/D conversion for each part of bits, so as to convert an analog signal input to a first stage into a digital signal sequentially in descending order of bit significance through the plurality of stages, each of the stages comprising: an AD conversion portion that quantizes the input analog signal of a current stage so as to generate the digital signal corresponding to the part of bits; a DA conversion portion that generates an analog reference signal based on the digital signal output from the AD conversion portion; and a remainder operation portion that adds/subtracts the analog reference signal to/from the input analog signal of the current stage and amplifies the obtained analog signal by a predetermined factor so as to generate a remainder analog signal, and supplies the reminder analog signal to a subsequent stage as the input analog signal, wherein the first stage among the plurality of stages is configured to perform A/D conversion of a plurality of bits, the DA conversion portion of the first stage includes: a plurality of primary voltage supply portions capable of selectively outputting a reference voltage at one of a plurality of predetermined levels; and at least one auxiliary voltage supply portion capable of outputting a reference voltage at an auxiliary level different from the level of the reference voltage output from the primary voltage supply portions, and the reference voltages output respectively from the primary voltage supply portions and the auxiliary voltage supply portion are controlled so as to be selected based on the digital signal generated by the AD conversion portion, and based on a combination of the outputs from the primary voltage supply portions and the auxiliary voltage supply portion, the analog reference signal in accordance with the digital signal is generated.