Patent ID: 8247277

Claim:
A method for manufacturing a thin film transistor, comprising: forming an insulating pattern layer on a substrate, wherein the insulating pattern layer has at least a protrusion; forming at least a spacer and a plurality of amorphous semiconductor patterns separated from each other on the insulating pattern layer, wherein the spacer is formed at a side of the protrusion and connected between the amorphous semiconductor patterns; crystallizing the spacer and the amorphous semiconductor patterns; removing the protrusion and the insulating pattern layer under the spacer so that the spacer is suspended over the substrate as a beam structure having a plurality of corners; sequentially forming a carrier tunneling layer, a carrier trapping layer and a carrier blocking layer over the substrate, wherein the carrier tunneling layer, the carrier trapping layer and the carrier blocking layer sequentially compliantly wrap the corners of the beam structure; and forming a gate over the substrate, wherein the gate covers the beam structure and wraps the carrier blocking layer.