Patent ID: 7539825

Claim:
A multi-port memory device comprising: a first port and a second port connected to a first and second external device, respectively; a first bank group having at least one memory bank, the first bank group configured to be accessed by the first external device through the first port; a second bank group having at least one memory bank, the second bank group configured to be accessed by the second external device through the second port; a third bank group having at least one memory bank, wherein the third bank group is configured to be selectively accessed by the first external device through the first port and the second external device through the second port; and a selection circuit that receives requests from the first port and the second port to access a same bank of the third bank group and grants access to the requested bank in the third bank group to one of the first and second external devices and denies access to the other device according to a priority value stored in the multi-port memory device, wherein the priority value indicates which of the first and second ports has a higher priority, and wherein the requests comprise a first bank selection signal and a second bank selection signal and the selection circuit transfers a first protection signal to the device that is granted access and a second protection signal to the device that is denied access according to the priority.