Patent ID: 8085062

Claim:
An apparatus for enabling a multi-core/multi-package environment on a bus, the bus requiring active termination impedance control, the apparatus comprising: a configuration array, disposed within said processor core and configured to generate a plurality of location/protocol signals that each direct one of a corresponding plurality of drivers on the bus to employ location-based bus termination or protocol-based bus termination, wherein said processor core is disposed on a multi-core substrate; and said corresponding plurality of drivers, coupled to said plurality of location/protocol signals, a plurality of location signals, a bus ownership signal, and a multi-package signal, each of said corresponding plurality of drivers configured to control how one of a corresponding plurality of nodes is driven responsive to a first state of a corresponding one of said plurality of location/protocol signals, said each of said corresponding plurality of drivers comprising: configurable multi-core/multi-package logic, configured control pull-up logic, first pull-down logic, and second pull-down logic according to location-based termination rules if said first state indicates said location-based termination, and configured control said pull-up logic, said first pull-down logic, and said second pull-down logic according to protocol-based termination rules if said first state indicates said protocol-based termination.