Patent ID: 7868665

Claim:
A hybrid pixel detector comprising: at least one integrated circuit with a plurality of channels arranged in a plurality of rows and a plurality of columns; and at least one detector comprising a plurality of pixels arranged in a plurality of rows and a plurality of columns, wherein said plurality of pixels is directly connected to said plurality of channels, and wherein at least one channel of said plurality of channels further comprises: at least one input that receives at least one signal from at least one pixel of said at least one detector, wherein said at least one input is adjacent to at least two other inputs; at least one amplifier to amplify said at least one signal; at least one gain control circuit, and at least one offset control circuit connected to at least one of said at least one amplifier; at least one comparator circuit connected to at least one of said at least one amplifier to produce at least one digital signal from said at least one signal, wherein said at least one digital signal is produced when said at least one signal is above at least one threshold of said at least one comparator circuit; at least one threshold control circuit connected to said at least one comparator circuit; at least one counter connected to said at least one comparator for counting said at least one digital signal; and at least one output circuit to output at least one of said at least one counter.