Patent ID: 7611973

Claim:
A method of fabricating a semiconductor device, comprising: forming a non-single crystalline semiconductor pattern on a single crystalline semiconductor substrate; forming an insulating spacer on sidewalls of the non-single crystalline semiconductor pattern; loading the substrate with the insulating spacer into a reaction chamber; injecting a main semiconductor source gas and a main etching gas into the reaction chamber to selectively grow a single crystalline epitaxial semiconductor layer on the semiconductor substrate and to selectively grow a non-single crystalline epitaxial semiconductor layer directly on the semiconductor pattern; and injecting a selective etching gas into the reaction chamber to selectively remove the non-single crystalline epitaxial semiconductor layer selectively grown directly on the semiconductor pattern, wherein the main gases and the selective etching gas are alternately and repeatedly injected at least two times to selectively form an elevated single crystalline semiconductor layer having a desired thickness only on the semiconductor substrate.