Patent ID: 8650528

Claim:
An electric information processing method in CAD system, comprising: for a plurality of objects being constituent parts for designing an electronic product, a design work to connect between each of a plurality of substrates by a connector and a flex substrate displayed on a design screen that is equipped with a first display that displays design information logically expressed in a symbolic figure, a second display that displays the contents of a physical mounting in a two-dimensional shaped figure, and a third display that displays the contents of a physical mounting by a three-dimensional shaped figure on a single display screen is performed, wherein: when a user designates an object on said first display of the design screen, and said object is arranged to a substrate of the second display or the connection information between each of the substrates is inputted by a user, by using a computer: a first processing for deciding an optimum connector and a flex substrate corresponding to a number of said signal lines, according to electric information that signal lines crossing said each substrate, which electrically connect between the plurality of substrates, a second processing for connecting between said each substrate by said connector and said flex substrate decided in said first processing, and allocating a connect destination of said signal lines to pins which said connector and said flex substrate have in order, and a third processing for generating the connector and the flex substrate at a position where the sum of the total of a signal route length of all connector signals existed in one substrate, and the total of signal length of all connector signals existed in an other substrate, and a signal route length between connectors of said each substrate becomes minimum, by using a signal route length of connector signals being signal lines converged in each substrate connected to a connector out of signal lines crossing between said each substrate are divided into two by using said connector as a boundary.