Patent ID: 8489888

Claim:
A processor apparatus capable of operating in a security mode, the processor apparatus comprising: a hash value storage unit that stores a plurality of hash values including a user authentication hash value and a plurality of access authentication hash values; a security control unit that checks whether a plurality of boot codes transmitted from a boot memory and at least one hash value from among the hash values, which corresponds to the plurality of boot codes, are identical, and that determines whether a boot operation is allowed, wherein the security control unit checks whether a second boot code transmitted from the boot memory and at least one hash value from among the hash values, which corresponds to the second boot code, are identical, and that selectively determines whether a debugging operation of the processor apparatus is allowed, wherein the security control unit checks whether a third boot code transmitted from the boot memory and at least one hash value from among the hash values, which corresponds to the third boot code, are identical, and that determines whether an external user is allowed to have access to a predetermined intellectual property (IP) block, and wherein the access authentication values are not output external to the processor apparatus, and are read by the security control unit, wherein the security control unit comprises: a security algorithm unit storing a hardwired type security algorithm; a security level control unit determining whether the boot code is identical to a hash value corresponding to the boot code of the hash values; and a security level authentication unit determining whether a hash value from among the hash values, which corresponds to the boot code, is identical to the boot code, according to a result of the determination and adjusting and controlling an operation corresponding to the boot code.