Patent ID: 6888243

Claim:
A semiconductor device comprising: a substrate having a principal plane; an insulation layer formed on said principal plane; a heat generating layer embedded in said insulation layer and opposing to said principal plane with a part of said insulation layer interposed between the heat generating layer and the substrate; a first wiring layer disposed on said insulation layer; a second wiring layer disposed on said insulation layer; a first plug embedded in said insulation layer, a lower end of the first plug being connected to one end of said heat generating layer and an upper end of the first plug being connected to said first wiring layer, said first plug having a rectangular cross sectional shape along said principal plane of which short sides are parallel to a main direction connecting said one end and the other end of said heat generating layer and long sides are parallel to a direction perpendicular to said main direction; a second plug embedded in said insulation layer, a lower end of the second plug being connected to said other end of said heat generating layer and an upper end of the second plug connected to said second wiring layer; and a third plug embedded in said insulation layer, an upper end of the third plug being connected to said first wiring layer or said first plug and a lower end of the third plug reaching said principal plane, wherein each of the first, second and third plugs is conductive.