Patent ID: 8493393

Claim:
An apparatus for displaying graphics, comprising: a bus; a graphics data memory to store graphics data and output the graphics data to the bus in series, the graphics data memory comprising: an output port to generate a read-empty signal based on the content of the graphics data memory, and an output control selector to cause the graphics data memory to output the graphics data to the bus based on an output control signal; a display memory; a plurality of transform modules, wherein, each transform module is configured to transform a corresponding type of graphics data from the bus into image information for the display memory in turn, and wherein each transform module comprises a transform control selector to selectively enable the respective transform module in response to receiving a transform module control signal; and a control module to receive a plurality of acknowledgement signals, each acknowledgement signal provided by a respective transform module after a transform operation is executed therein, and the read-empty signal, the control module comprising: a first OR logic circuit configured to generate the output control signal based on the plurality of acknowledgement signals; and a second OR logic circuit configured to generate the transform module control signal based on the output control signal and the read-empty signal.