Patent ID: 7286381

Claim:
A method of carrying out the search for a binary word stored in a content addressable memory comprising the following operations: associating an element of a comparison register with each column of the matrix; inserting in the register a word that is to be searched; comparing the content of the register bit by bit with the content of memory cells in every row by carrying out the following operations for each row: applying a first pre-determined voltage to a ground line; applying a second pre-determined voltage to a word line; applying to a ground control line a third pre-determined voltage sufficient to close a first electronic switch and to discharge a match node of the cells of the row and immediately afterwards applying the first pre-determined voltage to the ground control line; applying to the match control line a fourth pre-determined voltage sufficient to close a second electronic switch and to discharge output terminals of the cells of the row and immediately afterwards applying the first pre-determined voltage to the match control line; applying a fifth pre-determined voltage to a search activation terminal; subsequently biasing first and second bit lines of every column by applying a pre-determined search voltage to the first or the second bit line according to whether the respective bit of the comparison register is in a first or a second logic state; monitoring the voltage of a match indication terminal; and generating a match signal whenever the voltage on the match indication terminal varies or a no-match signal when the voltage on the match indication terminal does not vary.