Patent ID: 8321597

Claim:
A Smart Storage Switch flash device comprising: a smart storage switch connected upstream to an upstream device and downstream to a plurality of endpoint flash memories; a flash memory which comprises a plurality of multiple Input/Outputs (I/Os) and a plurality of chip enables; wherein the smart storage switch comprises: downstream means for connecting to a plurality of downstream flash memories; upstream means for connecting to an upstream device; controller means for dividing upstream data received from the upstream device into a plurality of stripes, each stripe being sent to a different downstream flash memory; structure register means for storing wear-level counts and bad-block counts of downstream flash memories; upstream reporting means for reporting a maximum of the wear-level counts to the upstream device and for reporting a maximum of the bad-block counts to the upstream device; and wear leveling means for using a direct-memory access (DMA) engine to swap physical blocks of two downstream flash memory blocks in two different ones of the downstream flash memories selected using the wear-level counts and bad-block counts stored in the structure register means.