Patent ID: 8692293

Claim:
A semiconductor device comprising: a substrate; a group III nitride semi-insulating buffer layer overlying the substrate, wherein the group III nitride layer comprises Al x In y Ga 1-x-y N, wherein 0≦x≦1, 0≦y≦1 and 0<x+y≦1; a group III nitride channel layer overlying the buffer layer, wherein the group III nitride layer comprises Al x In y Ga 1-x-y N, wherein 0≦x≦1, 0≦y≦1 and 0<x+y≦1; a group III nitride barrier layer overlying the channel layer, wherein the group III nitride layer comprises Al x In y Ga 1-x-y N, wherein 0≦x≦1, 0≦y≦1 and 0<x+y≦1; a drain electrode, a source electrode, and a gate overlying the group III nitride barrier layer; a high dielectric strength insulating material deposited over at least a portion of one of the source electrode, the drain electrode or the gate; and a multi stack drain field plate formed above said high dielectric strength insulating material, and connected to said drain electrode.