Patent ID: 8248352

Claim:
A driving circuit of a liquid crystal display device, comprising: a timing controller to output a gate control signal and a data control signal to control driving of a gate driving unit and a data driving unit and to output digital video data; a pair of gate driving units to be alternately driven by using at least one frame as a period to supply gate signals to gate lines of a liquid crystal panel in response to the gate control signal; and a data driving unit to supply pixel signals to data lines of the liquid crystal panel in response to the data control signal, wherein the pair of gate drivers include gate drivers driven like a shift register, respectively, and are alternately selected to be driven by using at least one frame as a period by an enable signal supplied from the timing controller, wherein the gate driver comprises: an RS flipflop that outputs the opposite logic signals to an output terminal and an inversion output terminal according to a set signal and a reset signal; an AND gate that ANDs a signal outputted from the inversion output terminal of the RS flipflop and the enable signal to validate it with an odd number of even number frame period; and a gate signal output unit driven by an output signal of the RS flipflop and the AND gate to generate a gate signal.