Patent ID: 6960490

Claim:
A method for manufacturing composite substrates for semiconductor devices, the method comprising: providing a metal substrate, the metal substrate having first diameter and having a bonding surface; bonding a plurality of tiles overlying the bonding surface, each of the tiles being coupled to a portion of the bonding surface, each of the tiles having a shape and size to be able to form an array configuration; elevating a temperature of the plurality of tiles and metal substrate; forming a eutectic bond between each of plurality of tiles and portion of the bonding surface, whereupon the elevating of the temperature is provided while each of the tiles is substantially stationary relative to the metal substrate; forming a plurality of active devices on each of the plurality of tiles; forming a plurality of openings through each of tiles, each of the openings traversing through a portion of one of the tiles through a portion of the eutectic bond to a portion of the metal substrate to form a via structure; forming an interconnect layer to connect the portion of the one of the active devices through the portion of the tile through the eutectic bond to the portion of the metal substrate; whereupon the interconnect layer that connects the portion of one of the active devices through the portion of one of the tiles through the portion of the eutectic bond to the portion of the metal substrate.