Patent ID: 8476714

Claim:
A semiconductor device comprising: a semiconductor substrate including a p-type layer and an n-type layer in an upper portion; an n-channel MOS transistor including a first gate insulating film provided on the p-type layer, a first gate electrode provided on the first gate insulating film and made of TiN, and a first upper gate electrode provided on the first gate electrode and made of semiconductor doped with impurities; and a p-channel MOS transistor including a second gate insulating film provided on the n-type layer, a second gate electrode provided on the second gate insulating film and made of TiN, and a second upper gate electrode provided on the second gate electrode and made of semiconductor doped with impurities, wherein the second gate electrode has a thickness of about 15 nm to about 25 nm, and the second gate electrode includes a first TiN layer, the first TiN layer is made of TiN crystal in which the ratio of (111) orientation/(200) orientation is about 1.5 or more.