Patent ID: 8903010

Claim:
A system for low power multimode interconnect, the system comprising: a receiver for receiving in parallel via a multi-channel interconnect a plurality of input signals that have been encoded by a multimode encoding equation to produce multilevel signals that have voltage levels according to the multimode encoding equation and for decoding the received signals according to a multimode decoding equation to produce binary data as output, wherein the receiver comprises: a plurality of frequency-compensated amplifiers for emphasizing high-frequency components of the received input signals; a plurality of latches for receiving amplified signals from the frequency-compensated amplifiers and for decoding the amplified signals according to the multimode decoding equation to produce binary data as output; and a plurality of multilevel transistor drivers, wherein each of the plurality of input signals that have been encoded by the multimode encoding equation to have voltage levels according to the multimode encoding equation is generated by one of the multi-level transmitter drivers.