Patent ID: 7970949

Claim:
A communication interface for providing an interface between a data link and first data processing apparatus including a memory, the communication interface being arranged to support a plurality of first mappings each of a respective first range of one or more virtual memory locations in the first data processing apparatus on to a respective second range of one or more memory locations in a second data processing apparatus connected to the communication interface by the link, and for each such first mapping a respective further mapping of the respective one or more virtual memory locations on to one or more physical memory locations in the memory of the first data processing apparatus, the communication interface comprising: a translation interface for translating accesses to or from each of the said ranges of one or more virtual memory locations into accesses to or from the respective one or more physical memory locations in the memory of the first data processing apparatus and for translating accesses to or from each of the one or more physical memory locations in the memory of the first data apparatus into accesses to or from the respective ranges of one or more virtual memory locations; and a mapping memory arranged to store specifications of the said further mappings, the mapping memory comprising a first mapping memory local to the translation interface and storing specifications of a number of the further mappings, and a second mapping memory less local to the translation interface than the first mapping memory and storing specifications of all of the further mappings; wherein the communication interface is arranged to establish each first mapping of a first range of one or more virtual memory locations in the first data processing apparatus on to a second range of one or more memory locations in the second data processing apparatus, and to establish each further mapping of the one or more virtual memory locations on to one or more physical memory locations in the memory of the first data processing apparatus, the communication interface establishing each first mapping by: allocating an identity to an aperture representing a first range of virtual memory locations, the identity being reusable for subsequent mappings of the aperture to different data processing apparatuses; generating random number check data for the second data processing apparatus; and transmitting the identity and the check data to the second data processing apparatus and a request to connect to the second data processing apparatus; wherein the communication interface is arranged to reject subsequent communications over the first mapping which do not indicate the check data.