Patent ID: 7951658

Claim:
A method for manufacturing a diode-connected transistor, comprising: forming a silicon layer on a substrate; forming a first insulation film on the silicon layer; forming a gate electrode on the first insulation film; forming a source region, a channel region, and a drain region in the silicon layer in a lengthwise direction from the source region to the drain region; forming a second insulation film on the gate electrode; forming a source electrode and a drain electrode on the second insulation film to project through the first and second insulations films so that the source electrode and the drain electrode are coupled to the source region and the drain region, respectively; and coupling the drain electrode to the gate electrode through a contact hole in the second insulation film, wherein the contact hole is formed above the channel region, wherein a width of at least one of the source region or the drain region in a widthwise direction is wider than a respective width of at least one of the source electrode or the drain electrode in the widthwise direction.