Patent ID: 6876560

Claim:
A content addressable memory which detects whether p (where p is an integer of 2 or more) bit sequences coincide respectively with reference bit sequences, said content addressable memory comprising: q comparison units which compare bit groups obtained by dividing the p bit sequences into q (where q is an integer of 2 or more) parts with corresponding bit groups in the reference bit sequences in p times; a precharge unit which precharges output lines of said q comparison units; and a comparison control unit responsive to a decision of noncoincidence in at least one of said q comparison units while said q comparison units are conducting an rth (where r is an integer variable that is 1 or more and that is at most p−1, and p is an integer of 2 or more) comparison operation, which stops precharging to be performed by said precharge unit at time of an (r+1)th comparison operation and subsequent comparison operations, wherein said q comparison units compare bit groups in different bit sequences with corresponding bit groups in the reference bit sequences, respectively, in each of first to pth comparison operations.