Patent ID: 7760584

Claim:
A semiconductor memory device configured to connect to an external memory device, comprising: a memory cell array in which a plurality of memory cells each including a charge storage layer and a control gate formed on the charge storage layer are arranged in a matrix; a word line which connects the control gates of the memory cells on the same row in the memory cell array; an output buffer which outputs, to the external memory device, an enable signal which makes the external memory device operable; an address buffer which outputs, to the external memory device, an address of data to be read out from the external memory device; an input buffer which receives the data held at the address output from the address buffer, from the external memory device made operable by the enable signal; and a write data buffer which holds the data received by the input buffer, and writes the data in the memory cells connected to the same word line at once, wherein whenever the write data buffer writes data in the memory cells, the input buffer receives, from the external memory device, the data having a size which is written in the memory cells at once.