Patent ID: 8754469

Claim:
An integrated circuit, comprising: a substrate; an extended drain metal oxide semiconductor (MOS) transistor, said extended drain MOS transistor including: an extended drain in said substrate, said extended drain including a drift region, said drift region including alternating field gap drift regions and active gap regions; a channel region in said substrate, said channel region abutting said drift region; field oxide elements in said extended drain located adjacent to said field gap drift regions and opposite from said channel region, such that said extended drain extends below said field oxide elements; a gate dielectric layer on said substrate over said channel region and said drift region; a gate on said gate dielectric layer over said channel region, said gate including field plates over said field gap drift regions, said field plates extending onto said field oxide elements; a drain contact diffused region in said extended drain abutting said active gap regions and said field oxide elements; drain contacts on said drain contact diffused region, in which there is at least one said drain contact adjacent to each said active gap region, and at least one said drain contact adjacent to each said field oxide element opposite said field plate overlapping said field oxide element; and a source in said substrate abutting said channel region and adjacent to said gate.