Patent ID: 7451174

Claim:
A circuit that, given a value y and a set of M>2 values s i with i=0 . . . M−1, calculates M values f(y, s i )∝exp((2yhs i −(hs i ) 2 )/(2σ 2 )) for given constants h and σ, where “∝” denotes equality up to a scale factor that does not depend on i, said circuit comprising at least one set of M transistors T 0 . . . T M−1 , each of said transistors having a control terminal and two current terminals, wherein a voltage V gate at said control terminal essentially gives rise to a current i 0 ·exp((κ·V gate −V source )/U T ) through said current terminals, wherein V source is a voltage at a first of said current terminals and i 0 , κ and U T are constants dependent on transistor technology and design, a current source associated with said set of M transistors, wherein the first current terminals of said transistors are connected to said current source, a multiplier/adder associated with said set of M transistors and having an input for said value y and M outputs O 1 . . . O M−1 carrying voltages U 0 . . . U M−1 , wherein, for all i=0 . . . M−1, said voltage U i at output O i is U i =α i ·y+V i with α i =hs i U T /(σ 2 κ)+ c and V i =−( hs i ) 2 U T /(2σ 2 κ)+ c′, wherein c and c′ are arbitrary constants, and wherein said multiplier/adder and said transistors are connected to apply said voltages U 0 . . . U M−1 to said control terminals of said transistors.