Patent ID: 7572702

Claim:
A method comprising: sequentially forming a first conductive layer and a capping insulating layer on a substrate; forming first insulating layers on an outer sidewall of the first conductive layer and gate insulating layers on the active region of the substrate by performing a first thermal oxidation process on the first conductive layer and the substrate; forming a second conductive layer on the substrate including directly on and contacting the gate insulating layer and the capping insulating layer; forming second conductive layer patterns directly contacting the outer sidewall of the first insulating layers and the capping insulating layer by performing a first etching process to expose the entire uppermost surface of the capping insulating layer; forming capping layer patterns and first conductive layer patterns after forming the second conductive layer patterns by performing a second etching process on the capping insulating layer and the first conductive layer to thereby expose a portion of the uppermost surface of the substrate; forming second sidewall insulating layers on an inner sidewall of the first conductive layer patterns and an oxide layer on the exposed portion of the substrate.