Patent ID: 7790360

Claim:
A method comprising: providing a semiconductor assembly that includes a base, an electrically conductive material over the base, a first masking material over the electrically conductive material, and at least two patterned masking structures over the first masking material; one of the patterned masking structures being a first masking structure and another being a second masking structure; the first masking structure being narrower than the second masking structure along at least one cross section; the patterned masking structures comprising core material and peripheral material along the core material; the peripheral and core materials of the first masking structure being first peripheral and core materials, and the peripheral and core materials of the second masking structure being second peripheral and core materials; the first peripheral material forming sidewall spacers along the first core material, and not forming a cap over the first core material; the second peripheral material forming sidewall spacers along the second core material, and also forming a cap over the second core material; removing the first core material to leave the first peripheral material as a pair of spaced narrow line patterns; the second core material remaining after the first core material is removed; the remaining second core material and second peripheral material together forming a wide line pattern; transferring the narrow and wide line patterns to the first masking material; transferring the narrow and wide line patterns from the first masking material to the electrically conductive material to form at least three lines comprising the electrically conductive material; wherein the core material consists essentially of silicon, carbon or photoresist; and wherein the peripheral material consists essentially of polymer.