Patent ID: 7199036

Claim:
A method of forming solder bumps for a flip chip on a wafer or substrate with semiconductor devices, the method comprising: forming a first continuous electrically conductive metal layer on bond pads of an integrated circuit wafer or a semiconductor substrate; forming a thin film called a Bump-Reflow-Control (BRC) Layer overlying said first metal layer; forming a desired pattern on said BRC layer to expose said first metal layer on said bond pads; forming a thick photoresist film with designed holes on said BRC layer using a hermetic cover and a photolithography process; after forming the photoresist film, forming a metal stud and solder material through an electroplating process at said designed holes of thick photoresist film wherein the metal stud and solder material are formed on a surface of said first metal layer; reflowing said solder material to form said solder bumps; and after reflowing said solder material removing said BRC layer and then etching said first metal layer among said solder bumps.