Patent ID: 8319265

Claim:
A semiconductor device comprising a plurality of non-volatile memory cells, wherein each non-volatile memory cell comprises: a first gate insulating film formed over a semiconductor substrate; a control gate formed over the first gate insulating film; a second gate insulating film formed over the semiconductor substrate and over a side wall of the control gate, and including a charge storage film; a memory gate formed over the second gate insulating film, adjacent with the control gate through the second gate insulating film; a drain region formed in the semiconductor substrate and positioned on a control gate side of the memory cell; and a source region formed in the semiconductor substrate, positioned on a memory gate side of the memory cell, and wherein, a pair of the non-volatile memory cells are formed adjacent to one another in a first direction with the source region interposed between them, wherein, in the pair of the non-volatile memory cells, the source region is common, a pair of the drain regions are connected by a wiring, and a pair of the memory gates are not electrically connected and are capable of being applied with a gate signal independently, wherein each of the control gates of the plurality of non-volatile memory cells extends in a second direction perpendicular to the first direction such that each of the control gates is common to ones of the non-volatile memory cells that are adjacent to one another in the second direction, wherein each of the memory gates of the plurality of non-volatile memory cells extends in the second direction such that each of the memory gates is common to ones of the non-volatile memory cells that are adjacent to one another in the second direction, wherein the source region extends in the second direction such that the source region is common to the ones of the non-volatile memory cells that are adjacent to one another in the second direction, and wherein the only source region extending in the second direction comprises a common source line to the source regions of the plurality of non-volatile memory cells that are adjacent to one another in the second direction.