Patent ID: 7523152

Claim:
A method, machine implemented according to micro-operations responsive to decoding of a macroinstruction specifying an extended precision integer division operation of a first L bits wide integer dividend by an N bits wide integer divisor, to execute the specified extended precision integer division operation, the method comprising: separating said first L bits wide integer dividend into two equal width portions, wherein a first integer format portion comprises lower M bits of said first integer dividend and a second integer format portion comprises upper M bits of said first integer dividend, wherein M is equal to ½ L; converting said first integer format portion into a first floating point format portion; converting said N bits wide integer divisor from an integer format into a floating point format divisor; dividing said first floating point format portion by said floating point format divisor to obtain a first floating point format quotient; converting said first floating point format quotient into a first integer format quotient; converting said second integer format portion into a second floating point format portion; dividing said second floating point format portion by said floating point format divisor to obtain a second floating point format quotient; converting said second floating point format quotient to a second integer format quotient; and summing together said first and said second integer format quotients to generate a third integer format quotient.