Patent ID: 8422261

Claim:
A semiconductor device comprising: a first chip mounting portion having a top surface and a bottom surface opposite the top surface; a first semiconductor chip including a first MOSFET; the first semiconductor chip having a first main surface and a second main surface opposite the first main surface, and the first semiconductor chip having a first gate electrode pad and a first source electrode pad formed over the first main surface, and a first drain electrode formed over the second main surface, a second semiconductor chip including a second MOSFET; the second semiconductor chip having a first main surface and a second main surface opposite the first main surface, and the second semiconductor chip having a second gate electrode pad and a second source electrode pad formed over the first main surface, and a second drain electrode formed over the second main surface, a first conductive member having a first surface and a second surface opposite the first surface; and electrically connecting to the first and second semiconductor chips; a second conductive member having a first surface and a second surface opposite the first surface and electrically connecting to the second semiconductor chip; a first external terminal electrically connecting to the first conductive member, a second external terminal electrically connecting to the second conductive member, and a sealing body having a top surface, a bottom surface opposite the top surface, and a plurality of side surfaces between the top and bottom surfaces in a thickness direction of the sealing body, and the sealing body sealing a part of the first chip mounting portion, the first and second semiconductor chips, the first and second conductive members, and parts of the first and second external terminals, wherein the first semiconductor chip is disposed over the top surface of the first chip mounting portion, and the first drain electrode of the first semiconductor chip is electrically connected to the top surface of the first chip mounting portion, wherein the first conductive member is disposed over the first main surface of the first semiconductor chip, and the second surface of the first conductive member is electrically connected to the first source electrode pad of the first semiconductor chip, wherein the second semiconductor chip is disposed over the first surface of the first conductive member, and the second drain electrode of the second semiconductor chip is electrically connected to the first surface of the first conductive member, wherein the second conductive member is disposed over the first main surface of the second semiconductor chip, and the second surface of the second conductive member is electrically connected to the first source electrode pad of the second semiconductor chip, and wherein the first and second external terminals are disposed at different side surfaces of the sealing body, respectively.