Patent ID: 7486216

Claim:
A multi-bit pipeline analog-to-digital converter (ADC) capable of altering an operating mode, comprising: a sample-and-hold amplifier (SHA) for sampling and holding an input analog voltage; an n+1 number of B-bit flash ADCs for receiving an analog signal and converting the analog signal into a digital signal to output the digital signal; an n number of B-bit multiplying digital-to-analog converters (MDACs) for converting a difference between the digital signal output from the B-bit flash ADC and the front-stage output signal into an analog signal to output the analog signal to the next stage; and a mode control circuit for generating n-bit control signals to control the B-bit flash ADC and the B-bit MDAC according to required resolution and operating frequency, wherein the mode control circuit converts the resolution value into a binary thermometer code, converts the operating frequency value into a 1 of n code, and passes the binary thermometer code through a switch array in which the position in n-bit determined by the 1 of n code to generate the n-bit control signals.