Patent ID: 8861659

Claim:
A data receiving circuit comprising: an amplification processing stage that supplies an amplified data signal on a first line, said amplified data signal being obtained by performing an amplification process on a received data signal; and a level converting processing stage that transmits a level converted data signal via a second line, said level converted data signal being obtained by performing a level conversion processing on said amplified data signal, wherein said data receiving circuit further comprises an amplitude controlling part that feeds back an increase or decrease of one of said amplified data signal and said level converted data signal transmitted from one of said amplification processing stage and said level converting processing stage to a stage preceding said one of said amplification processing stage and said level converting processing stage, wherein said amplitude controlling part is configured to change a level of said received data signal or a data signal supplied to either one of said amplification processing stage and said level converting processing stage so that the lower an instantaneous level of another data signal transmitted from either one of said amplification processing stage and said level converting processing stage is, the larger an increase amount of an instantaneous level of said received data signal or the data signal supplied to either one of said amplification processing stage and said level converting processing stage is.