Patent ID: 6972803

Claim:
A video processing circuit for generating clock and timing signals from an incoming video signal, comprising; a timing reference circuit for generating a reference clock signal; a video format detector coupled to the reference clock signal and to synchronization data derived from the incoming video signal for generating a format signal indicating the format of the incoming video signal; and a clock and timing generator circuit coupled to the format signal and the reference clock signal for generating clock and timing signals that emulate the incoming video signal; wherein the video format detector comprises: a video timing measurement circuit for receiving the synchronization data and the reference clock signal and for measuring one or more parameters of the synchronization data; and a video format lookup table storing video parameters regarding a plurality of video formats, each of the plurality of video formats being associated with one or more stored video parameters; wherein the video processing circuit compares the measured parameters from the video tinting measurement circuit with the stored video parameters in the video format lookup table in order to generate the format signal.