Patent ID: 8230275

Claim:
A system for detecting a memory card installation defect, comprising: a detection tool configured to be implemented in a system having at least one memory card with a memory coupled to a processor via a bus, wherein the bus comprises at least one control line employed to control an operation of the memory on the memory card, the detection tool comprising: logic that generates a test value to be applied to the memory card over the bus through a plurality of interconnects; logic that generates a first parity bit for the test value; logic that transmits the test value to the memory card over the bus through the interconnects, wherein at least a portion of the test value is transmitted to the memory card over the control lines; and logic that compares the first parity bit with a second parity bit to determine if a fault exists in one of the interconnects, wherein the second parity bit is generated for the test value in the memory card.