Patent ID: 7620837

Claim:
A data transmission system, comprising: a master device including a master side clock signal generation section coupled to generate a master side clock signal; a phase shift circuit coupled to receive the master side clock signal and provide a shifted master side clock signal; a clock signal switching circuit coupled to select the shifted master side clock signal or the master side clock signal for outputting as a select clock signal; a data switching circuit coupled to select a transmission data or phase adjusting data for outputting as select data; and a master side output section coupled to output a master side output signal, based on the select data, in response to the master side clock signal; a slave device including a slave side clock signal generator section coupled to generate a slave side clock signal; a slave side input section coupled to sample the master side output signal, transmitted through a bus line, in response to the slave side clock signal; and a phase adjusting circuit coupled to control a phase of the slave side clock signal wherein when the phase adjusting data is selected as the select data, the shifted clock signal is selected as the select clock signal and the slave side input section is coupled to generate a phase adjustment instruction signal based upon the master side output signal and the slave side clock signal, and the phase adjusting circuit adjusts the phase of the slave side clock signal in response to the phase adjustment instruction signal.