Patent ID: 7824982

Claim:
A method of forming a semiconductor construction, comprising: providing a substrate comprising monocrystalline upper surface and having a doped upper region comprising the upper surface; etching the substrate to form a series of pillars, each of the pillars being disposed between a first trench and a second trench, a first side of each of the pillars intersecting a base surface of the first trench and a second side of each of the pillars intersecting a base surface of the second trench; providing a patterned masking material over the substrate, the patterned masking material covering the first side of each of the pillars and extending over a portion of the base surface of the first trench from the first side less than an entirety of the width of the first trench along the length of the first trench, a portion of the base surface of the second trench extending from the second side of the pillars being exposed along the length of the second trench; while the masking material remains over a portion of the base surface of the first trench, providing a dopant into the exposed portion of the base surface of the second trench to form a doped region, the masked portion of the base surface of the first trench remaining essentially free of the dopant; removing the masking material; and forming a gate material surrounding each pillar.