Patent ID: 8510629

Claim:
A memory module comprising: a module substrate having a first surface and a second surface; a plurality of external terminals provided along a side of the module substrate extending to a first direction; a plurality of memory chips mounted on the module substrate; and a memory buffer mounted on the module substrate, the memory buffer at least buffering a data signal transferred between the memory chips and the external terminals, wherein the data signal includes a user data and an error correction code to correct an error of the user data, the memory chips include: a plurality of regular chips including at least first to fourth regular chips that store the user data; and a plurality of error-correction chips including first to fourth error-correction chips that store the error correction code, the module substrate has first and second mounting areas, coordinates of the first and second mounting areas in the first direction being different from each other, the second mounting area has third and fourth mounting areas, coordinates of the third and fourth mounting areas in a second direction that is different from the first direction being different from each other, the first and second regular chips are oppositely arranged on the first and second surfaces of the module substrate, respectively, in the first mounting area, the third and fourth regular chips are oppositely arranged on the first and second surfaces of the module substrate, respectively, in the first mounting area, the first and second error-correction chips are oppositely arranged on the first and second surfaces of the module substrate, respectively, in the third mounting area, the third and fourth error-correction chips are oppositely arranged on the first and second surfaces of the module substrate, respectively, in the third mounting area, the first error-correction chip and the third error-correction chip are adjacently arranged in the first direction, the second error-correction chip and the fourth error-correction chip are adjacently arranged in the first direction, and the memory buffer is arranged on the first surface of the module substrate in the fourth mounting area, the fourth mounting area being interposed between a boundary of the third mounting area and a portion of the side of the module substrate nearest to the boundary, so that the memory buffer is located nearer to the external terminals than the first to fourth error-correction chips.