Patent ID: 8327309

Claim:
A system for designing a system on a chip, the system comprising: a computer configured to: generate a plurality of interface programs, each interface program configured to enable a processor in the system on a chip to access a register in each of a plurality of circuit blocks in the system on a chip via a communication circuit by having the processor issue a standardized access call to a corresponding circuit block, at least two of the plurality of circuit blocks having a direct connection with each other, wherein the direct connection does not include the communication circuit or the processor; generate a verification program executable by the processor for verifying operation of one of the at least two circuit blocks having the direct connection, the verification program configured to select another of the at least two circuit blocks having the direct connection and to issue the standardized access call to an interface program associated with the selected circuit block to observe or control a signal via the direct connection; and monitor operation of the system on a chip during execution of the verification program using the communication circuit.