Patent ID: 7511973

Claim:
A method for limiting an output current of a power supply over multiple switching cycles in a constant current mode using pulse width modulation and attenuating a voltage ripple on a digital feedback signal, said power supply having a primary and secondary side, the method comprising the steps of: generating a sense voltage signal on the primary side that is proportional to an output voltage signal on the secondary side; measuring a reset time on the primary side using said sense voltage signal, said reset time representing a duration of a current pulse on the secondary side; generating a ripple compensation signal representing a output voltage ripple signal; generating a first digital voltage signal used to maintain a substantially constant current on the secondary side, said first digital voltage signal representing the on-time for a subsequent switching cycle, wherein a product of said on-time for a subsequent switching cycle and said reset-time for a present switching cycle is a first value, wherein said first value is substantially constant for multiple switching cycles; generating the digital feedback voltage signal by combining said first digital signal and said ripple compensation signal.