Patent ID: 8896111

Claim:
A semiconductor device, comprising: a circuit board including a core material having a thermal expansion coefficient in a range of 8 to 10 ppm/° C. and a room temperature modulus of elasticity in a range of 30 to 40 GPa; a first semiconductor chip disposed on the circuit board; an adhesive layer fixing the first semiconductor chip to the circuit board and having a thickness in a range of 95 to 150 μm, a thermal expansion coefficient in a range of 70 to 470 ppm/° C., and a room temperature modulus of elasticity in a range of 2 to 3 GPa; a second semiconductor chip, at least a part of which is embedded in the adhesive layer, having an outer shape smaller than that of the first semiconductor chip; a first connecting member electrically connecting the circuit board and the first semiconductor chip; a second connecting member electrically connecting the circuit board and the second semiconductor chip; and a sealing resin layer provided on the circuit board to seal the first and second semiconductor chips with the first and second connecting members, wherein a thickness of the sealing resin layer on the first semiconductor chip is in a range of 190 to 440 μm.