Patent ID: 8315112

Claim:
A current detection circuit for detecting a current flowing into one memory cell selected from a plurality of memory cells in a memory device which is quipped with the plurality of memory cells, including a current detection part which comprises: first and second MOS transistors of a same channel type and third to sixth MOS transistors of a channel type different from the channel type of said first and second MOS transistors, wherein a first electrode of each of said first and second MOS transistors is connected to a high side application terminal of a power supply voltage, a second electrode of said first MOS transistor is connected to a first electrode of said third MOS transistor to form a first node which constitutes a first detection output, a second electrode of said second MOS transistor is connected to a first electrode of said fourth MOS transistor to form a second node which constitutes a second detection output, a second electrode of said third MOS transistor is connected to a first electrode of said fifth MOS transistor to form a third node to which a reference current is supplied, a second electrode of said fourth MOS transistor is connected to a first electrode of said sixth MOS transistor to form a fourth node to which a current is supplied from said one memory cell, a second electrode of each of said fifth and sixth MOS transistors is connected to a low side application terminal of said power supply voltage, and said second node is connected to a control electrode of said sixth MOS transistor; and a MOS gate control part which supplies, to a control electrode of each of said first and second MOS transistors, a voltage which is obtained by subtracting an absolute value of a threshold voltage of each of said first and second MOS transistors from said power supply voltage when said power supply voltage is equal to or lower than the absolute value of said threshold voltage.