Patent ID: 7580420

Claim:
An interface circuit for connecting a device to a first communication bus, the interface circuit comprising: a physical layer section and a data link layer section, wherein the physical layer section includes a buffer memory in which self-identification packets received via a wireless bridge from a second communication bus are collected, means for generating artificial self-identification packets from said self-identification packets collected in the buffer memory, wherein the artificial self-identification packets are generated under consideration of the topology which would result if the wireless bridge would be replaced by a bus cable, means for sending said artificial self-identification packets in order to be able to forward them to said first communication bus after a bus reset, a first and second control register in which a start value and an end value of a specific range in said buffer memory are stored for facilitating determination of a memory location that needs to be read out during a self-configuration phase of said network of bus stations of said first and second communication bus, and means for calculating an offset value for the modification of node ID numbers in the stored self-identification packets each time after a bus reset, wherein the offset value is calculated as the difference of the number of received self-identification packets after a bus reset on either the first or second communication bus plus one and the start or end value in the first and second control register depending on whether the interface circuit is part of a cluster or remote bus.