Patent ID: 7687333

Claim:
A method of fabricating a thin film transistor, comprising: forming a gate electrode on a substrate; forming a gate insulating layer on the gate electrode; forming a semiconductor layer on the gate insulating layer, the semiconductor layer corresponding to the gate electrode; forming first and second barrier patterns on the semiconductor layer, the first and second barrier patterns including copper nitride; and forming source and drain electrodes on the first and second barrier patterns, respectively, the source and drain electrodes including pure copper, wherein each of the source and drain electrodes has a single layer, wherein the step of forming the first and second barrier patterns and the step of forming the source and drain electrodes are performed by a single mask process, wherein the single mask process includes sequentially forming a first metal layer of copper nitride and a second metal layer of pure copper on the semiconductor layer; and patterning the first and second metal layers by a wet-etching process with a single etchant, and wherein the single etchant includes a mixture of phosphoric acid (H3PO4), nitric acid (HNO3), and acetic acid (CH3COOH) with water (H2O) such that ends of each of the first and second barrier patterns has a taper angle of with range of about 30 degrees to about 60 degrees.