Patent ID: 8281203

Claim:
A communication method in a PCI.Express communication system, being an improvement in a transmission protocol in an event of generation of an error in said PCI.Express communication system, comprising: detecting an error in respect of transmission data in a circuit of a transaction layer and setting error information in a preset format without an addition of an ECRC in a TLP digest of a transaction layer packet; transmitting a memory read request TLP by a transmission device; performing return transmission, without nullifying a returned completion TLP, and setting in said TLP digest as said error information following bits: existence of an error, whether this is an address level single error or block level single error, and an error location, by a receiving device that receives said TLP, if an error is detected during transmission of first data corresponding to said requested TLP; making a memory read request in respect of said receiving device in which is set a minimum data length of a respective preset error identification level in respect of said address level single error or said block level single error in regard to said address where said error is generated by said transmission device, based on said received error information; performing a return transmission of second requested data in respect of said memory read request by said receiving device; and completing a transaction on receiving said requested data and overwriting with said second data a first data error location that was held, by said transmission device.