Patent ID: 7612433

Claim:
A semiconductor device having self-aligned contacts, comprising: a substrate; a plurality of isolation structures, wherein a top of each of the isolation structures keeps a distance to above a top surface of the substrate, and the plurality of the isolation structures is composed of dielectric materials; a plurality of gate structures, disposed over the substrate; a plurality of doped areas, disposed in the substrate at each side of the gate structure, a dielectric layer, covering over the substrate, the isolation structures and the gate structures; a plurality of conductive plugs, disposed in the dielectric layer and electrically connected with the doped areas; a plurality of first spacers, disposed on a sidewall of each of the gate structures and between each of the conductive plugs and each of the gate structure; and a plurality of second spacers, disposed on an entire sidewall surface of each of the isolation structures and between each of the conductive plugs and each of the isolation structures, wherein a material of the second spacers has different etch selection from the isolation structures, wherein the conductive plugs are surrounded by the first spacers and the second spacers.