Patent ID: 7788455

Claim:
A multi-processor data processing system having a virtual memory manager for managing memory page requests, comprising: a bus; a processor connected to the bus; real memory divided into a plurality of pages; a first mechanism for determining a threshold value of available memory; a second mechanism for dynamically adjusting an allocation time to fulfill a page request if the available memory is below the threshold value, wherein dynamically adjusting an allocation time comprises: calculating an allocation wait time using a weighted page free time, wherein the allocation wait time is a delay before allocating a page in response to a page request; determining an average time to steal a page, wherein the average time includes a time for performing a scan for selectable pages by a page stealer; and applying a tunable value to the average time to determine the allocation wait time; and a third mechanism for allocating the page in response to the page request in response to an expiration of the allocation wait time.