Patent ID: 8418118

Claim:
A method to automatically determine an optimal number format representation for a model or code to be implemented in a custom integrated circuit (IC), comprising: a. determining a ratio of dynamic range to static range in the model or code, and selecting a floating point or a fixed point number representation based on the ratio; b. determining an optimal number representation format based on a cost function that includes hardware area cost and power cost associated with a predetermined bit precision arithmetic and taking into consideration a signal to noise ratio (SNR) and an estimated precision needed to accommodate a set of arithmetic operations with minimal decrease in the SNR, including: identifying arithmetic operations on variables using a static parsing of a system model description; estimating a precision needed to accommodate the arithmetic operations with minimal decrease in SNR; evaluating the cost function and if the cost is higher than a threshold, marching along a variable axis that decreases the cost; c. automatically and iteratively generating a processor architecture customized to the optimal number representation format; and d. synthesizing the generated processor architecture into a computer readable description of the custom integrated circuit for semiconductor fabrication by using a computer.