Patent ID: 7093260

Claim:
A method of saving a state of a task and executing the task by a processor in a multiprocessor system having at least first and second processors, said method comprising: following termination of execution of a first task in a first processor, said first processor having private internal registers providing low latency storage inaccessible to said second processor, maintaining at least a portion of a state of said first task in said private internal registers of said first processor until said first processor executes a second task; thereafter, in response to said first processor executing a second task, selecting said second processor to execute said first task and prior to executing said first task on the second processor, determining if said state of said first task is at least partially stored in said private internal registers of said first processor; in response to a determination that said state of said first task is at least partially stored in said private internal registers of said first processor, storing contents of said private internal registers in said first processor from said private internal registers into a shared memory system having higher latency than said private internal registers with respect to accesses by said first processor; and thereafter, executing said first task in said second processor.