Patent ID: 8488396

Claim:
A static random access memory (SRAM) macro, comprising: a first power supply voltage; a second power supply voltage different from the first power supply voltage; a precharge control connected to the second power supply voltage, the precharge control coupled to a bit line through a bit line precharge; at least one level shifter, wherein the at least one level shifter is adapted to: (a) receive an input voltage closer to the first power supply voltage than the second power supply voltage, (b) convert the input voltage to a level shifter output having a voltage closer to the second power supply voltage than the first power supply voltage, and (c) provide the level shifter output to the precharge control; and a word line driver connected to the second power supply voltage, wherein the level shifter output is provided to the word line driver, the word line driver includes at least one first PMOS transistor, and the level shifter output is provided to a gate of the at least one first PMOS transistor, and wherein the precharge control includes a second PMOS transistor, and the level shifter output is arranged to be concurrently provided to a gate of the second PMOS transistor and the gate of the first PMOS transistor.