Patent ID: 8519396

Claim:
An array for an in-plane switching (IPS) mode liquid crystal display device, comprising: a gate line formed on a substrate to extend in a first direction; a common line formed on the substrate to extend in the first direction; a data line formed to extend in a second direction; a thin film transistor formed at an intersection between the gate line and the data line, wherein the thin film transistor includes a gate line, a gate insulating layer, an active layer, a source electrode, and a drain electrode; a passivation film formed on the substrate including the thin film transistor; a pixel electrode formed on the passivation film located on a pixel region defined by the gate line and the data line, the pixel electrode being electrically connected to the drain electrode; a common electrode formed on the passivation film; and a common electrode connection line connected to the common electrode and the common line, wherein the common electrode connection line overlaps with the common line and the drain electrode.