Patent ID: 7091551

Claim:
A semiconductor device, comprising: a fin body having opposite first and second ends and opposite first and second sidewalls, said first and second sidewalls disposed between said first and second ends; a first gate dielectric stack disposed on said first sidewall and a second gate dielectric stack disposed on said second sidewall, said first and second stacks each comprising at least a first, a second and a third dielectric layer, said first dielectric layer of said first dielectric stack in direct physical contact with said first sidewall and said first dielectric layer of said second dielectric stack in direct physical contact with said second sidewall; a first gate electrode in direct physical contact with said third dielectric layer of said first gate dielectric stack and a second gate electrode in direct physical contact with said third dielectric layer of said second gate dielectric stack, said first and second gate electrodes not in direct physical contact with each other; a first source/drain in said first end of said fin body and a second source/drain in said second end of said fin body; and a channel region in said fin body between said first and second source/drains and aligned between said first and second gate electrodes.