Patent ID: 7852136

Claim:
A network, comprising: an integrated circuit chip, such chip having formed thereon: a current mirror comprising: an output transistor having a gate electrode for controlling a first current between a first electrode and a second electrode, the first electrode being coupled to a positive reference potential relative to ground reference potential and the second electrode being connected to the ground reference potential; and a second transistor having a gate electrode for controlling a second current between a first electrode and a second electrode of the second transistor; wherein the gate electrodes of the output and second transistors are connected together to produce the first current and the second current with equal current densities; a current source; and a bias voltage producing circuit; and wherein a first portion of current from the current source is fed to the first electrode of the second transistor through a first path and a second portion of current from the current source is fed to the bias voltage producing circuit through a second path, such second portion of the current passing through the bias voltage producing circuit producing a bias voltage at the gate electrode of the output transistor, such bias voltage tracking variations in the first current passing through the output transistor; and wherein the bias voltage producing circuit is connected between the current source and a negative reference potential relative to ground potential.