Patent ID: 8004332

Claim:
A duty ratio control apparatus for altering a duty ratio of a clock signal to output an altered clock signal, comprising: a first variable delay section that outputs a first delayed clock signal generated by delaying the clock signal by a predetermined first delay time; and a phase comparing section that compares, in terms of phase, an edge of the clock signal and an edge of the first delayed clock signal and generates the altered clock signal having a pulse width determined by a phase difference obtained by the comparison, wherein the phase comparing section includes: a phase comparator that compares in terms of phase the edge of the clock signal and the edge of the first delayed clock signal, the phase comparator outputting a first phase difference signal having a pulse width determined by a phase difference obtained when the edge of the clock signal is ahead the edge of the first delayed clock signal, the phase comparator outputting a second phase difference signal having a pulse width determined by a phase difference obtained when the edge of the clock signal is behind the edge of the first delayed clock signal; and a selecting section that selects one of the first and second phase difference signals to be output as the altered clock signal.