Patent ID: 8599635

Claim:
A fuse circuit in a semiconductor memory device, comprising: a program unit configured to be programmed in response to a program signal and configured to output a program output signal in response to a sensing enable signal; a sensing unit including a variable resistor unit, the variable resistor unit having a resistance that varies based on a control signal, the sensing unit generating a sensing output signal based on the resistance of the variable resistor unit and the program output signal; and a control unit configured to generate the control signal having a value changed depending on operation modes and configured to perform a verification operation with respect to the program unit based on the sensing output signal to generate a verification result for determining whether the program unit is to be re-programmed, the operation modes including a first operation mode, a second operation mode and a third operation mode, the fuse circuit performing a program operation in the first operation mode, the fuse circuit verifying the program operation in the second operation mode, and the fuse circuit performing a normal operation according to programmed or unprogrammed state of the program unit.