Patent ID: 7304395

Claim:
A semiconductor chip package comprising: a first semiconductor chip including: a frame section having a top face and a bottom face, a movable structure having a movable section formed in said frame section, a plurality of first electrode pads arranged on said top face of said frame section, a first sealing section formed on the top face of said frame section and having a closed loop shape surrounding said movable structure, and a thin plate member provided on said first sealing section for sealing said movable structure; a second semiconductor chip having a first surface, a second surface, and a plurality of second electrode pads arranged on said first surface, the first surface being in parallel to the second surface; a substrate including a first main surface having a semiconductor chip mounting area, a second main surface, and a plurality of third electrode pads formed along one edge of said first main surface outside said semiconductor chip mounting area, said first and second semiconductor chips being mounted on said semiconductor chip mounting area, and said first main surface being in parallel to the second main surface; first bonding wires for connecting said plurality of first electrode pads to said plurality of second electrode pads respectively; and second bonding wires for connecting said plurality of second electrode pads to said plurality of third electrode pads respectively.