Patent ID: 7889514

Claim:
A semiconductor device comprising; a flat wiring board; a first semiconductor element disposed on one surface of said wiring board; and a second semiconductor element disposed on another surface of said wiring board, said wiring board comprising: a wiring layer including conductor wiring; and a sealing resin for covering said one surface and a side face of said first semiconductor element; a support layer for supporting said wiring layer, and a through-electrode that passes through said wiring layer and said support layer; and a plurality of lands on which external connection terminals are provided, wherein said first semiconductor element and said second semiconductor element are electrically connected; a connection point is formed between a first land from among said plurality of lands and said wiring layer through said conductor wiring, the first land provided in the vicinity of an outer peripheral edge of the first semiconductor element, and the conductor wiring formed in the same plane as the first land, said conductor wiring, which forms said connection point, extends beyond a center line of the first land, the center line being parallel to outer peripheral edge-edges of the first semiconductor element, when viewed from vertically above.