Patent ID: 7940862

Claim:
A data decoding method in a data decoding device for decoding data of a bit series which judges a signal state where there is a transition from a low level to a high level or from a high level to a low level at the center portion of a bit interval as logical “1” or “0”, and a signal state where a low level continues or a high level continues over the entire bit interval as logical “0” or “1” according to the above logical “1” or “0”, comprising the steps of: measuring an interval in which said bit series signal transitions from a low level to the next low level as a first time duration by a first duration measurement portion of the data decoding device; measuring an interval in which said bit series signal transitions from a high level to the next high level as a second time duration by a second duration measurement portion of the data decoding device; and deciding a logical “0” or “1” value for a single bit to be decided in said bit series, based on the combination of said first time duration and said second time duration measured for said bit to be decided, according to a decision result of an immediately preceding said bit, by a decision portion of the data decoding device.