Patent ID: 8675770

Claim:
A transmitter circuit with output power control comprising: a buffer amplifier stage having an input and an output; a signal source coupled to said input of said buffer amplifier; a MOSFET having a gate coupled to said output of said buffer amplifier, a source coupled to ground, and a drain comprising a power output; and a DAC having a digital input and an analog output, wherein said analog output of said DAC is an exponential function PA VDD =ke qn of said digital input where PA VDD is a D.C. voltage on said drain of said MOSFET, k and q are constants and n is a number of significant bits input into said DAC, and wherein said DAC comprises (a) logic including at least N inputs, (b) a reference voltage source controllable by said logic to provide a variable reference voltage, (c) a regulator having a first input coupled to said variable reference voltage, (d) an electronic valve having a control input coupled to an output of said regulator and a first node coupled to a voltage source, and (e) a variable voltage divider circuit comprising a series connection of at least two resistors, at least one of which is controllable by said logic, where a node between said at least two resistors is coupled to a second input of said regulator.