Patent ID: 8148710

Claim:
A phase-change memory device comprising: a first contact region and a second contact region on a semiconductor substrate; a first insulating interlayer on the semiconductor substrate; a first contact hole and a second contact hole disposed in the first insulating interlayer so as to expose the first and second contact regions; a first contact and a second contact, wherein the first and the second contacts fill the first contact hole and the second contact hole, respectively, and are disposed so as to connect to the first and second contact regions; a first electrode and a lower wiring, wherein the first electrode and the lower wiring are in contact with the first and second contacts, respectively, and on the first insulating interlayer; a first protection layer pattern and a lower wiring protection pattern in contact with the first electrode and the lower wiring, respectively, the first protection layer pattern and the lower wiring protection pattern being separate from the first electrode and the lower wiring, respectively; a second protection layer in contact with the first protection layer pattern and the lower wiring protection pattern; a second electrode in contact with the second protection layer; and a via filled with a phase-change material disposed between the first electrode and the second electrode, wherein the first contact and the first electrode are integrally formed, and the second contact and the lower wiring are integrally formed.