Patent ID: 7351661

Claim:
A method of forming a trench isolation layer of a semiconductor device, comprising the steps of: forming a trench-etching pattern for defining an active area on a substrate; forming an isolation trench on the substrate using the trench-etching pattern as an etching mask; forming a silicon nitride liner on inner walls of the trench; forming a silicon oxide liner on inner sides of the silicon nitride liner; performing heat treatment for hardening and densifying the silicon oxide liner; filling the trench having the silicon oxide liner by depositing a first buried layer of silicon oxide; partially etching the hardened and densified silicon oxide liner formed under the first buried layer of silicon oxide during recessing an upper surface of the first buried layer by etching; and filling a remaining portion of the trench by depositing a second buried layer of silicon oxide on the first buried layer whose upper surface has been partially recessed by the etching.