Patent ID: 8088692

Claim:
A method for fabricating a multilayer microstructure with balancing residual stress capability comprising: forming a multilayer microstructure on a substrate, wherein the material of the substrate comprises silicon and the multilayer structure comprises: a first metal layer; a metal via layer disposed on the first metal layer; a second metal layer disposed on the metal via layer, wherein the first metal layer and the second metal layer are patterned and aligned symmetrically to form a plurality of etching through holes; and the metal via layer surrounds each of the etching through holes; and an insulating layer filling the etching through holes and the remaining space between the first metal layer and the second layer, and disposed on the substrate for the first metal layer to stack thereon; and conducting a step of isotropic chemical plasma etching to remove the insulating layer in the etching through holes, the insulating layer between the first metal layer and the substrate, and a portion of the substrate and form a suspended multilayer microstructure on the substrate, wherein in the step of isotropic chemical plasma etching, a chamber pressure larger than vacuum is used, and a ratio between a lateral etching rate and a vertical etching rate under the chamber pressure is between 0.5 to 1; and the reaction gases comprise a gaseous fluoride and oxygen.