Patent ID: 7635641

Claim:
A method of fabricating an electronic substrate comprising the steps of fabricating a full stack by: (A) selecting a first base layer; (B) depositing a first etchant resistant barrier layer comprising tantalum or nickel onto said first base layer; (C) building up a first half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers; (D) applying a second base layer onto said first half stack; (E) applying a protective coating of photoresist to said second base layer; (F) etching away said first base layer by exposing said first base layer to a solution of ammonium hydroxide at an elevated temperature; (G) removing the protective coating of photoresist; (H) removing said first etchant resistant barrier layer; (I) building up a second half stack of alternating conductive layers and insulating layers, the conductive layers being interconnected by vias through the insulating layers, wherein second half stack has a substantially symmetrical lay up to first half stack; (J) applying an insulating layer onto said second half stack of alternating conductive layers and insulating layers, and (K) removing said second base layer.