Patent ID: 7456421

Claim:
A memory device, comprising: a first electrode having a principal surface, the principle surface having a perimeter; a second electrode vertically separated from the first electrode and having a sidewall, at least a portion of the sidewall of the second electrode positioned over the principle surface with a lateral offset from the perimeter of the first electrode; an insulating member disposed between the first and second electrodes, the insulating member overlying at least a portion of the principal surface of the first electrode, the insulating member having a side wall, the sidewall of the insulating member positioned over the principle surface with a lateral offset from the perimeter of the first electrode; and a memory element comprising a programmable resistive material, the memory element having a side wall portion extending along the side wall of the insulating member and contacting the sidewall of the second electrode, the side wall portion of the memory element having a bottom surface in contact with the principal surface of the first electrode.