Patent ID: 8242580

Claim:
A semiconductor device, comprising: a semiconductor substrate; a first insulating film on the semiconductor substrate; a plurality of resistors having a same shape, which are disposed on the first insulating film and comprising polycrystalline silicon each having a low concentration impurity region and a high concentration impurity region abutting end portions of the low concentration impurity region; a second insulating film overlying the plurality of resistors; a contact hole extending through the second insulating film and exposing a portion of the high concentration impurity region; a first metal portion comprising a metal wiring layer traversing the contact hole and connecting the plurality of resistors; a second metal portion disposed on the second insulating film so as to cover the low concentration impurity region of a resistor group including one of a single resistor and more than two resistors connected to one another selected from the plurality of resistors; and a third metal portion provided adjacent to the second metal portion and coupled to the second metal portion by a severable connection, such that the effective area of the second metal portion includes the third metal portion, wherein the third metal portion is subject to electrical separation from the second metal portion upon breaking the severable connection.