Patent ID: 8499325

Claim:
A method, comprising: in a processing device comprising a demodulation module, a multiplexed transport interface, and a video processing system-on-chip (SoC), wherein said demodulation module comprises a plurality of demodulator chips: concurrently demodulating, via at least a portion of said plurality of demodulator chips, a plurality of modulated input data streams; multiplexing corresponding demodulated data, which is generated by said at least a portion of said plurality of demodulator chips, via said multiplexed transport interface during communication of said demodulated data to said video processing SoC; timestamping packets communicated via said multiplexed transport interface; generating, matching, or generating and matching timestamps utilized during said timestamping of said packets based at least in part on timestamp counters in said demodulation module and said video processing SoC; synchronizing operations of said timestamp counters by way of a reset signal sent from said demodulation module to said video processing SoC; and demultiplexing, in said video processing SoC, said multiplexed demodulated data received via said multiplexed transport interface.