Patent ID: 7138285

Claim:
A method of performing quantum well intermixing in a semiconductor device structure, comprising the steps of: a) forming a layered quantum well structure including a doped cap layer; b) forming an etch stop layer over said cap layer; c) forming a sacrificial layer over said etch stop layer, said etch stop layer having a substantially lower etch rate than said sacrificial layer when exposed to predetermined etch conditions; d) carrying out a quantum well intermixing process on the device structure, which process induces significant damage to at least a portion of the sacrificial layer; e) removing at least the sacrificial layer in at least a contact region of the device using an etch procedure selective against the etch stop layer to expose said etch stop layer in the contact region; and f) forming a contact, over the patterned quantum well structure and directly on the surface exposed by the removal of step e), in at least said contact region.