Patent ID: 8661232

Claim:
A data processing apparatus comprising: data processing circuitry for executing a data processing operation for generating a result value; a plurality of registers for storing a plurality of register values, one of said plurality of registers being a destination register for storing said result value generated during execution of said data processing operation by said data processing circuitry; a backup data store for storing a backup copy of a subset of said plurality of register values; and state saving control circuitry responsive to an occurrence of a state saving trigger event while said result value is still to be written to said destination register to: (i) detect which of said plurality of registers is said destination register; (ii) select a state saving sequence defining a temporal order for saving each of said subset of register values to said backup data store, said state saving control circuitry selecting said state saving sequence in dependence on which of said plurality of registers is said destination register to provide said destination register with a position within said state saving sequence corresponding to a time after said result value has been written to said destination register by said data processing circuitry; and (iii) after selecting said state saving sequence, save each of said subset of register values to said backup data store in the order of the selected state saving sequence.