Patent ID: 8298861

Claim:
A manufacturing method of a package structure of a compound semiconductor device, comprising the steps of: providing a sheet; forming at least one slot on the sheet to divide the sheet into a first conductive film and a second conductive film; filling an insulating dielectric material in the slot, thereby the first conductive film, the second conductive film and the insulating dielectric material cooperatively constituting a thin film substrate; stacking a patterned insulating material layer on the thin film substrate to cover the first conductive film, the insulating dielectric material and the second conductive film, the patterned insulating material layer comprising a die-bonding groove and two wire-bonding grooves, a portion of the first conductive film being exposed at a bottom of the die-bonding groove, another portion of the first conductive film being exposed at a bottom of one of the wire-bonding grooves and a portion of the second conductive film being exposed at a bottom of the other of the wire-boding grooves; mounting a die onto the portion of the first conductive film exposed at a bottom of the die-bonding groove, electrically connecting an anode of the die to the another portion of the first conductive film exposed at a bottom of one of the wire-boding grooves, and electrically connecting a cathode of the die to the portion of the second conductive film exposed at a bottom of the other of the wire-boding grooves; and overlaying a transparent encapsulation material on the die.