Patent ID: 8189308

Claim:
An integrated circuit, comprising: an input/output pad for signal exchange with an external circuit; an electrostatic discharge (ESD) protection unit coupled to the input/output pad and configured to form an ESD path between a first voltage line and a second voltage line; a first drive transistor coupled between the first voltage line and the input/output pad; a first driving control unit coupled to a gate of the first drive transistor and configured to control the first drive transistor; a first dummy drive transistor coupled between the first voltage line and the input/output pad; and a first auxiliary driving control unit configured to supply a first voltage of the first voltage line to a gate of the first dummy drive transistor in a normal operation mode, and float the gate of the first dummy drive transistor in a non-operation mode in which no power is supplied, wherein the first auxiliary driving control unit comprises: a first transistor coupled between the first voltage line and an output terminal; and a second transistor coupled between the output terminal and the second voltage line, gates of the first transistor and the second transistor being commonly and directly coupled to the second voltage line.