Patent ID: 7432178

Claim:
A method of performing a bit line implant, the method comprising: forming a first structure and a second structure on an oxide-nitride-oxide stack on a substrate of a semiconductor device, the first structure and the second structure each including a polysilicon portion and a hard mask portion, the hard mask portions including opposing sidewalls, wherein the first structure and the second structure are separated by a gap having a width ranging from about 500 to about 1,000 Å; forming a first spacer adjacent a sidewall of the hard mask portion of the first structure and a second spacer adjacent a sidewall of the hard mask portion of the second structure; etching, using the first and second spacers, the oxide-nitride-oxide stack to form a trench to a width ranging from about 40 to about 70 nanometers to expose a top surface of a portion of the substrate; and implanting, in the trench, a dopant at a dosage ranging from about 1×10 12 atoms/cm 2 to about 1×10 15 atoms/cm 2 and an implantation energy ranging from about 5 KeV to about 30 KeV.