Patent ID: 7051150

Claim:
A scalable network for supporting an application using a plurality of processing elements for operation at a selectable clock frequency, comprising: a plurality of ports, each corresponding to one of the processing elements and each conforming to a consistent port interface protocol regardless of number of ports, frequency of operation, maximum datum width or data path concurrency; an interconnect, coupled to each of the plurality of ports and having a scalable maximum datum width at selected ones of said plurality of ports and a scalable data path concurrency based on the application, that includes selectable data paths between any two ports to enable transfer of datums between the ports; a plurality of port interfaces, each coupled to a corresponding one of the plurality of processing elements and to a corresponding one of the plurality of ports, that formulates packets for transmission and that receives packets via the corresponding port and the interconnect, each packet comprising one or more datums; and an arbiter, coupled to the interconnect and to each of the plurality of ports, that controls packet transfer via the interconnect between source and destination ports.