Patent ID: 6992340

Claim:
A semiconductor device comprising: first and second element formation regions formed to be spaced apart from each other in a main surface of a semiconductor substrate; a dielectric film formed on the main surface of said semiconductor substrate at a location between said first and second element formation regions; first electrode patterns being formed above said first and second element formation regions respectively and each having an end portion extended to overlie said dielectric film, said first electrode patterns being formed by patterning of a first electrode layer; second electrode patterns formed above said first electrode patterns respectively; a passivation film formed above said first electrode patterns to be positioned adjacent to said second electrode patterns while covering part of said dielectric film exposed during patterning of said first electrode layer; said first and second element formation regions are structural components of first and second cells respectively; said first electrode patterns are formed to have a first groove with a first width between the end portions thereof; said second electrode patterns are formed to have a second groove with a second width greater than said first width between their end portions to thereby permit partial exposure of upper surfaces of said first electrode patterns; and said passivation film is formed to bury said first groove and at least part of said second groove.