Patent ID: 8749725

Claim:
A flat panel display apparatus, comprising: a gate electrode disposed on a substrate; a first insulating layer disposed on the gate electrode; a semiconductor layer disposed on the first insulating layer and including a transparent conductive oxide; a capacitor first electrode extending on a same plane as that on which the gate electrode extends, and a capacitor second electrode extending on a same plane as that on which the semiconductor layer extends and including a same material as the semiconductor layer, wherein the first insulating layer is interposed between the capacitor first electrode and the capacitor second electrode; a second insulating layer on the semiconductor layer and on the capacitor second electrode; source and drain electrodes that are separated by the second insulating layer and are connected to the semiconductor layer and the capacitor second electrode; a third insulating layer covering the source electrode and the drain electrode; and a pixel electrode disposed on the third insulating layer and electrically connected to one of the source electrode and the drain electrode, wherein the pixel electrode directly contacts the capacitor second electrode through a via-hole in the second insulating layer and third insulating layer.