Patent ID: 8022476

Claim:
A semiconductor device comprising: a high-density first conduction-type substrate; a low-density first conduction-type epitaxial layer formed over the high-density first conduction-type substrate; a plurality of first low-density second conduction-type base regions and second low-density second conduction-type base regions formed spaced apart in the low-density first conduction-type epitaxial layer; a high-density first conduction-type source region formed in the first and second low-density second conduction-type base regions; a high-density first conduction-type drain region formed in the epitaxial layer disposed outside of the first and second low-density second conduction-type base regions; a high-density second type dopant region formed in the first low-density second conduction-type base regions; a first gate electrode formed extending through the high-density first conduction-type source region of the second low-density second conduction-type base regions, the second low-density second conduction-type base regions and the first low-density second conduction-type base regions; forming a field oxide layer over the low-density first conduction-type epitaxial layer between the first and second base region and a respective high-density first conduction-type drain region; and a second gate electrode formed over the first and second low-density second conduction-type base regions between the high-density first conduction-type source region and the high-density first conduction-type drain region.