Patent ID: 8275596

Claim:
A method for execution in a processor of a computer, said method for robust statistical semiconductor device modeling, said method comprising the steps of: building a semiconductor device model using at least one standard device parameter and at least one new device parameter variation, wherein said at least one new device parameter variation is obtained, at least in part, from a data set acquired by measurement, and is related to a work function variation, a line edge roughness, or a random dopant fluctuation; constructing a variation library for said semiconductor device model, wherein said variation library is constructed based on changes in at least one new device parameter; running simulations using said semiconductor device model and said variation library, wherein said variation library is used to adjust parameters of said semiconductor device model; verifying said variation library based on a comparison between results of said simulations and measured data from a physical semiconductor device; fine-tuning said variation library based on said comparison.