Patent ID: 7099992

Claim:
A content addressable memory (CAM) device comprising: a plurality of CAM blocks, each of said plurality of CAM blocks comprising: a plurality of CAM slices, wherein each of said plurality of CAM slices comprises: a plurality of memory storage locations for storing data to be matched with a search word, and an integral priority encoder for determining a highest priority match address for those storage locations of a CAM slice which match a search word, said integral priority encoder being a programmable priority encoder coupled to said plurality of memory storage locations, said integral priority encoder having: an address program register coupled to said plurality of memory storage locations; a slice priority encoder circuit coupled to said address program register; and a programmable priority indicator block coupled to said slice priority encoder circuit, wherein said programmable priority indicator block is used to set a priority level for each memory storage location in said plurality of memory storage locations within said CAM slice; and a block level priority encoder for receiving input from each of said integral priority encoders of said plurality of CAM slices for determining a highest priority match address for the storage locations within the CAM block.