Patent ID: 8420458

Claim:
A method of manufacturing a semiconductor device, comprising: forming a conductive film and a first wiring layer that is thicker than said conductive film on an insulating substrate; forming an inorganic film covering the first wiring layer and the conductive film over the insulating substrate; forming a photoresist film on a surface of the inorganic film; exposing the photoresist film to form a resist mask having an opening in a region in which the conductive film is formed; etching the resist mask and the inorganic film simultaneously to form a recessed portion in a surface of the inorganic film in a region that has been exposed by the opening, and to form a planarizing layer from the inorganic film by planarizing the surface of the inorganic film in a region that has been covered by the resist mask; forming an interlayer insulating film over the insulating substrate so as to cover the planarizing layer; forming, on the first wiring layer, a first contact hole penetrating through at least the interlayer insulating film and reaching said first wiring layer; forming, on the conductive film, a second contact hole penetrating through at least the interlayer insulating film and reaching said conductive film so as to run through an inside of the recessed portion; and on the interlayer insulating film, a second wiring layer electrically connected to the conductive film through the second contact hole, and a third wiring layer electrically connected to the first wiring layer through the first contact hole.