Patent ID: 8227794

Claim:
A complementary logic gate device, comprising: a first FET and a second FET with an electron channel layer formed by a graphene material, the first FET and the second FET having an ambipolar characteristic, and different threshold values, wherein a gate electrode of said first FET and a gate electrode of said second FET are short-circuited to have an input terminal, a source electrode of said first FET is set at a low potential, a drain electrode of said first FET and a source electrode of said second FET are connected to have an output terminal, a drain electrode of said second FET is set at a high potential, a threshold value of said first FET is set at a first level, a threshold value of said second FET is set at a second level higher than said first level, and a logic low level and a logic high level of the input signal are matched with said first level and said second level, respectively.