Patent ID: 7115517

Claim:
A method of fabricating an interconnect structure, comprising: (a) providing a substrate having a film stack formed thereon; (b) patterning and etching a first feature in the film stack, wherein the first feature is a trench etched in the film stack to a pre-determined depth; (c) forming a bi-layer mask comprising an organic film and an imaging film on the film stack; (d) patterning the bi-layer mask; (e) etching a second feature in the film stack using the patterned bi-layer mask as an etch mask, wherein the second feature is a contact hole, and wherein a portion of the organic film in the trench is used as an etch mask so as to remove lithographic misalignment between the contact hole and the trench when the contact hole is etched; and (f) metallizing the first and second features to form the interconnect structure.