Patent ID: 8015427

Claim:
A method for adjusting power consumed by a multi-core processor comprising: measuring an instruction arrival rate for each of a plurality of cores of the multi-core processor for a time period, the instruction arrival rate determined for a particular core of the plurality of cores by measuring a number of instructions arriving at the particular core for processing by the particular core during the time period; assigning a maximum permissible power usage by the processor; calculating an optimal instruction arrival rate for each core of the plurality of cores, the optimal instruction arrival rate for the each core selected in response to the core measured instruction arrival rate for all cores of the plurality of cores and selected to limit a total power used by the processor to be less than the maximum permissible power usage by the processor, so that a sum of power used by all cores of the plurality of cores is less than the maximum permissible power usage of the processor; and setting the each core of the plurality of cores to the calculated optimal instruction arrival rate for the each core for a next time period.