Patent ID: 8705416

Claim:
An apparatus comprising: a port configured to, while the port is operating in a full-duplex mode, (i) transmit, to a link partner, first frames of data over a communication channel, and (ii) receive, from the link partner, second frames of the data over the communication channel, wherein the port comprises a cyclic redundancy check (CRC) error detect circuit configured to detect CRC errors in the second frames of the data; a duplex mismatch circuit configured to declare a duplex mismatch in response to the CRC error detect circuit detecting a CRC error in one of the second frames of the data while the port is transmitting one of the first frames of the data, wherein the duplex mismatch indicates that the link partner is operating in a half-duplex model; and a collision forcing circuit configured to cause the port to transmit one of the first frames of the data while receiving one of the second frames of the data (i) after receiving a predetermined amount of the data in the one of the second frames of the data and (ii) in response to the duplex mismatch circuit declaring the duplex mismatch, to force one or more collisions on the communication channel.