Patent ID: 8281262

Claim:
A computer implemented method for providing a photolithography mask set for printing an automatically placed and routed metal layer of an integrated circuit having adjacent features spaced at less than a given minimum separation distance, the method comprising: generating a routing configuration for the metal layer using automatic place-and-routing tools, the routing configuration comprising longitudinal segments extending parallel at a given minimum pitch providing target separation distances of less than the given minimum separation distance; using a computer, applying a first partitioning window to the generated routing configuration to select a first series subset of the longitudinal segments, the first partitioning window having a pitch of twice the minimum pitch and the first series segments extending parallel at first separation distances of at least the given minimum separation distance; generating a first photolithography mask with a pattern for printing the first series segments; using a computer, applying a second partitioning window to the generated routing configuration to select a second series subset of the longitudinal segments not selected by the first partitioning window, the second partitioning window having a pitch of twice the minimum pitch and the second series longitudinal segments extending parallel at second separation distances of at least the given minimum separation distance; and generating a second photolithography mask with a pattern for printing the second series segments; wherein an integrated circuit layer collectively patterned using the first and second masks will apply the routing configuration comprising the longitudinal segments at the target separation distances less than the given minimum separation distance.