Patent ID: 6982488

Claim:
A stack of semiconductor packages comprising: first and second semiconductor packages, wherein each of the first and second semiconductor packages comprises an insulative substrate including a central opening extending through the substrate from a first surface to an opposite second surface of the substrate, circuit patterns on the first and second surfaces, vias through the substrate electrically coupling at least some of the circuit patterns of the first and second surfaces, stacked first and second semiconductor chips within the opening without contacting the substrate, with each said semiconductor chip having an active surface with bond pads thereon and an opposite inactive surface, bond wires electrically coupling the bond pads of the semiconductor chips to the circuit patterns, conductive balls fused to the circuit patterns of the second surface of the substrate, and an encapsulant within the opening and covering the first and second semiconductor chips and at least one of the first and second surfaces of the substrate without covering the inactive surface of one of the first and second semiconductor chips, and wherein the first semiconductor package is stacked on the second semiconductor package so that the conductive balls of the first semiconductor package face and are fused to the circuit patterns of the first surface of the substrate of the second semiconductor package.