Patent ID: 8283251

Claim:
A method for manufacturing a wafer level package comprising: forming a redistribution line connected to a top surface of a die pad on a wafer with the die pad; additionally preparing a carrier film including a metal post with a concave central portion on one surface; wherein preparing the carrier film includes separately preparing a first silicon substrate and a second silicon substrate separately forming first and second metal post filling spaces which include curved side surfaces and are spread upward by etching portions of the first and second silicon substrates; forming a silicon mold with a metal post filling space of which a central portion is concave by bonding the first silicon substrate to the second silicon substrate to contact bottom surfaces thereof to each other; adhering a carrier film coated with metal to one surface of the silicon mold; forming a metal post by plating the metal post filling space of the silicon mold with metal; and selectively removing the silicon mold; bonding the metal post to a top surface of the redistribution line; molding a space between the metal posts with a molding resin; and removing the carrier film.