Patent ID: 8208387

Claim:
A signal detection circuit for an Ethernet physical layer transceiver device comprising: a first capacitor coupled between a first receive terminal of the Ethernet physical layer transceiver and a first node, the first capacitor AC coupling a signal on the first receive terminal to the first node; a second capacitor coupled between a second receive terminal of the Ethernet physical layer transceiver and a second node, the second capacitor AC coupling a signal on the second receive terminal to the second node; a first gain stage having an input terminal coupled to the first node and an output terminal; a second gain stage having an input terminal coupled to the second node and an output terminal; a first diode having an anode coupled to the output terminal of the first gain stage and a cathode coupled to a third node; a second diode having an anode coupled to the output terminal of the second gain stage and a cathode coupled to the third node; a third capacitor coupled between the third node and the ground voltage; and a comparator having an input terminal coupled to the third node and for comparing the voltage on the third capacitor to a reference voltage, the comparator providing an output signal being indicative of the presence or absence of a signal on the first and second receive terminals of the Ethernet physical layer transceiver device.