Patent ID: 7596705

Claim:
An apparatus for controlling a power management mode of a multi-core processor in a computer system, the apparatus comprising: a monitoring unit configured to monitor conditions relating to the power management mode of the multi-core processor; and an automatic mode change unit operatively connected to the monitoring unit for receiving the monitored conditions, wherein the automatic mode change unit is configured for setting the power management mode of the multi-core processor to a single-core mode or a multi-core mode based on the monitored conditions and is configured to set the power management mode to the single-core mode if an amount of memory usage is equal to or less than a predetermined threshold value, and is configured to set the power management mode to the multi-core mode if the amount of memory usage exceeds the predetermined threshold value, wherein the amount of memory usage is determined by at least one of an available free memory and a level or number of read and write accesses to the memory, and wherein the memory is loaded with an operating system.