Patent ID: 8179165

Claim:
A precision sampling circuit, comprising: a plurality of inputs, each input having a corresponding data line and a corresponding data complement line, a signal on each input includes a transition on the data input line and a transition on the data complement, wherein the transition on the data line begins at substantially a same time as the transition on the data complement line, and the transition on the data line includes substantially a same duration as the transition on the data complement line; a plurality of output lines; a plurality of flip-flops comprising at least one crossed-wired flip-flop and at least one non cross-wired flip-flop, wherein each of the at least one crossed-wired flip-flop and the at least one non-cross wired flip-flop is connected to one of the plurality of input lines, wherein: the at least one crossed-wired flip-flop comprises: a data input connected to the corresponding data complement line; and a data complement input connected to the corresponding data line; and the at least one non crossed-wired flip-flop comprises: another data input connected to the corresponding data line; and another data complement input connected to the corresponding data complement line; and each of the at least one crossed-wired flip-flop and the at least one non cross-wired flip-flop comprises an output line connected to one of the plurality of output lines; and a clock line connected to each of the plurality of flip-flops to supply the clock signal.