Patent ID: 7937615

Claim:
In a virtualization environment in which a virtualization mechanism for generating and controlling a virtual server operates in a server including a plurality of multi-core processors each having a plurality of arithmetic cores and the virtualization mechanism is managed by a management server, a multi-core processor controlling method, wherein: the management server includes: arithmetic core management information which includes correspondence information between a multi-core processor and an arithmetic core, and state information indicating any fault preecho detected in the multi-core processor or the arithmetic core, and virtualization mechanism management information which indicates correspondence between an arithmetic core which is not assigned to any virtual server and a multi-core processor having the unassigned arithmetic core, and correspondence between an arithmetic core assigned to a virtual server and a multi-core processor having the assigned arithmetic core; and the virtualization mechanism includes: a fault preecho detection mechanism for detecting a fault preecho in a multi-core processor, and a schedule control mechanism for changing a use schedule of a multi-core processor or an arithmetic core to prevent use of the multi-core processor or the arithmetic core, when the management server generates a new virtual server, the management server performs method steps comprising: selecting a plurality of different multi-core processors each having an arithmetic core which is not assigned to any virtual server based on the arithmetic core management information and the virtualization mechanism management information; and issuing a first order to the virtualization mechanism for assigning the unassigned arithmetic cores owned by the selected multi-core processors to the new virtual server, and when the fault preecho detection mechanism detects a fault preecho in a multi-core processor or an arithmetic core, the management server performs a method step comprising issuing a second order to the schedule control mechanism to change an execution schedule such that no virtual server is executed on the multi-core processor or the arithmetic core in which the fault preecho is detected.