Patent ID: 7678611

Claim:
A method for assembling a multi-chip semiconductor package comprising: obtaining a first subassembly comprising a semiconductor spacer wafer having first and second sides, a backgrinding tape layer and a spacer adhesive layer between the first side and the backgrinding tape layer; backgrinding the second side of the spacer wafer to create a second subassembly; securing the second subassembly to a dicing tape with the backgrinding tape layer exposed; removing the backgrinding tape from the spacer adhesive layer; forming an array of grooves extending from the spacer adhesive layer to at least the dicing tape layer and thereby creating spacers/adhesive die structures, the spacer/adhesive die structures comprising spacer die and adhesive; securing a spacer/adhesive die structure to a support surface with the spacer adhesive layer exposed; and positioning a second, circuit die against the adhesive of the spacer/adhesive die structure to secure the second, circuit die to the spacer die.