Patent ID: 8522054

Claim:
A stand-by mode management module applied in a computer system having a BIOS (basic input/output system), a graphic module and a display module, wherein the computer system is operated in a working state and at least one stand-by state, comprising: a timer, starting a count period when detecting that the computer system is idle; and an interrupt generation unit, generating an interrupt request to the BIOS to request the computer system to prepare to enter to a specific state when the count period is reached, wherein when the specific state is entered, the computer system enters a first stand-by state, a PLL (phase lock loop) of the display module keeps turning on, and PLLs other than the PLL of the display module are turned off and the graphic module acquires a frame stored in a fixed area of a storing unit and displays the acquired frame on the display module, wherein the acquired frame is the last stored frame stored in the storing unit before the computer system enters the first stand-by state, and wherein the stand-by mode management module further returns the state of the computer system to the working state in response to a predetermined wake-up event in the specific state, and wherein the predetermined wake-up event is triggered by a request for switching from the specific state to a second stand-by state, wherein the second stand-by state is a deeper sleep state compared with the first stand-by state.