Patent ID: 7827445

Claim:
A method of fault injection in dynamic random access memory (‘DRAM’) modules for performing built-in self-tests (‘BISTs’), the DRAM modules managed by a memory controller, each DRAM module comprising a mode register, the mode registers of the DRAM modules connected to the memory controller through a shared address bus, each mode register comprising a segment indicating whether to inject a fault into one or more signal lines of a DRAM module, a segment identifying one or more signal lines of a DRAM module on which to inject a fault, and a segment including a fault type, the method comprising: establishing, in the mode registers of the DRAM modules by the memory controller through the shared address bus, an injection of a fault into one or more signal lines of a DRAM module, the fault characterized by a fault type; writing data by the memory controller through a data bus to the DRAM modules, the data identifying a particular DRAM module; and responsive to receiving the data, injecting, by the particular DRAM module, the fault characterized by the fault type into the one or more signal lines of the particular DRAM module.