Patent ID: 8426230

Claim:
A thin film transistor substrate comprising: a substrate; a gate line arranged on the substrate in a first direction; a data line arranged in a second direction crossing the gate line to define adjacent first and second pixel regions, the data line being used in common by the first and second pixel regions; an entire common line arranged in the second direction substantially parallel with the data line; a thin film transistor including a gate electrode connected with the gate line, a source electrode connected with the data line, a drain electrode formed to face the source electrode, and an active layer formed to be overlapped with the gate electrode by interposing a gate insulating film between the active layer and the gate electrode; a pixel electrode connected with the drain electrode; a passivation film formed on an entire surface of the gate insulating film including the thin film transistor; and common electrodes formed on the passivation film and connected with the common line through a common contact hole formed by selectively removing the passivation film.