Patent ID: 7933735

Claim:
A semiconductor integrated circuit comprising: a communication circuit conducting serial communication with an external source; and a test circuit that collects data for testing an internal function from a circuit-under-test based on data received via the communication circuit, wherein a frame of the received data includes at least a HEADER data portion, an ADDRESS data portion, a COMMAND data portion, a DATA data portion, a CYCLE data portion, and a REDUNDANCY data portion; the test circuit includes: a data buffer that stores data received and transferred by the communication circuit, the data buffer capable of transferring the stored data to the communication circuit; a test execution unit that is supplied with the HEADER data portion, the ADDRESS data portion, and the COMMAND data portion transferred from the data buffer; and a counter that is supplied with a count value corresponding to the CYCLE data portion transferred from the data buffer and begins a count operation based on a system clock when the CYCLE data portion is transferred; the test execution unit, upon completion of the count operation, outputs a decode result to the circuit-under-test based on the ADDRESS data portion when the HEADER data portion indicates that the contents of the DATA data portion includes test data and the COMMAND data portion includes a data collection command; the data buffer is supplied with the ADDRESS data portion so as to store data transferred from the circuit-under-test; the test circuit further includes a mode determination circuit configured to output a mode signal for specifying an operation mode of the semiconductor integrated circuit, the test circuit mounted on the semiconductor integrated circuit and supplying the mode determination circuit with mode configuration data allocated to a portion other than the HEADER portion of the frame of the received data when the HEADER portion specifies the transfer data as mode configuration data; the mode determination circuit is further configured to decode the mode configuration data and output a corresponding mode signal; and the mode determination circuit outputs a mode signal for specifying an operation mode of another externally connected semiconductor integrated circuit.