Patent ID: 7092979

Claim:
A random data generating apparatus which receives m bits, comprising: a first random data generator comprising: an m×2 m look up table which receives m bits and outputs n bits, selection output circuits which receive the n bits output from the m×2 m look up table as selection signals, and which provide a predetermined value with respect to valid bits among the n bits output from the m×2 m look up table and provide respective bits of feedback bits with respect to invalid bits among the n bits output from the m×2 m look up table, to generate selected n bits; logic circuits which perform XOR operations on the selected n bits from the selection output circuits and respective ones of feedback bits; and registers arranged in series which shift values output from a least significant one of the logic circuits to generate the feedback bits, wherein the logic circuits feed the results of the XOR operations back to a least significant one of the registers only in a case of valid bits among the n bits output from the m×2 m look up table; and wherein the registers output the feedback bits as random data.