Patent ID: 8729637

Claim:
A method of forming a semiconductor device comprising: forming a high-k gate dielectric layer on a semiconductor substrate including an n-type semiconductor device region and a p-type semiconductor device region; forming at least one metal containing layer in direct physical contact with a topmost surface of the high-k gate dielectric layer in the n-type semiconductor device region and the p-type semiconductor device region, wherein the at least one metal containing layer in the n-type semiconductor device region comprises at least one n-type threshold voltage shift dopant and the at least one metal containing layer in the p-type semiconductor device region comprises a p-type threshold voltage shift dopant; diffusing the at least one n-type threshold voltage shift dopant from the at least one metal containing layer in the n-type semiconductor device region to the semiconductor substrate; selectively implanting a carbon dopant through the at least one metal containing layer to an interface between the high-k dielectric layer and the semiconductor substrate in the n-type semiconductor device region, wherein the carbon dopant is present across an entirety of an upper surface of the semiconductor substrate in the n-type semiconductor device region, wherein the carbon dopant provides a threshold voltage shift for an n-type semiconductor device and the carbon dopant is not present in the p-type semiconductor device region; forming a first gate structure in the n-type semiconductor device region and a second gate structure in the p-type semiconductor device region, wherein each of the first gate structure and the second gate structure comprise a portion of the high-k gate dielectric layer; and forming source regions and drain regions on opposing sides of the first gate structure and the second gate structure.