Patent ID: 7777525

Claim:
An input buffer for interfacing an input voltage to an Ultradeep Sub Micron (UDSM) process having a core capable of operating at a core voltage, lower than the input voltage, the input buffer comprising: first transistor for receiving the input voltage; a second transistor for degenerating the first transistor, wherein the second transistor is connected to a source of the first transistor at its drain; a third transistor that is connected to a gate of the second transistor at its source and that is coupled to the drain of the first transistor at its gate, wherein the third transistor, in combination with the second transistor, causes the first transistor to enter linear mode when the input signal is high and to enter subthreshold mode when the input signal is low; and a capacitor that is connected between the gate of the second transistor and the gate of the third transistor.