Patent ID: 8633091

Claim:
A method for forming a chip package, comprising: providing a semiconductor substrate having a plurality of die regions and predetermined scribe regions, wherein each of the die regions comprise at least a contact pad region and at least a device region, and the predetermined scribe regions surround the die regions, wherein each of predetermined scribe region comprises an actual scribe region, and a remained scribe region is between the predetermined scribe region and the actual scribe region; forming a signal contact pad structure and an EMI ground pad structure on the contact pad region; forming a first opening and a second opening through the substrate in the die region to expose the signal contact pad structure and the EMI ground pad structure; forming a first conducting layer and a second conducting layer in the first opening and the second opening to electrically contact with the signal contact pad structure and the EMI ground pad structure, respectively, wherein the first conducting layer and the signal contact pad structure are separated from a periphery of the predetermined scribe region or the remained scribe region by an interval, and the second conducting layer and/or a portion of the EMI pad structure at least extend(s) to an interface between the remained scribe region and the actual scribe region; and dicing the semiconductor substrate along the actual scribe region to separate a plurality of chip packages, wherein the second conducting layer and/or a portion of the EMI ground pad structure extend(s) to a periphery of the remained scribe region.