Patent ID: 8314725

Claim:
A method, comprising: operating a digital-to-analog converter in an integrated circuit of an integrated circuit die, to convert each of a plurality of digital input values of a step function, to a corresponding analog output value for each digital input value of the step function, at an output of the digital-to-analog converter; and testing the linearity of the digital-to-analog conversion using an integrated testing circuit having an input coupled to the output of the digital-to-analog converter and being on-die with the same integrated circuit die as the digital-to-analog converter, wherein the testing by the integrated testing circuit includes comparing a first conversion output value corresponding to a first digital input value of the step function to a second conversion output value corresponding to a second digital input value of the step function, and wherein the conversion value comparing by the integrated testing circuit includes converting each analog output value of the output of the digital-to-analog converter to a digital output value using an analog-to-digital converter of the integrated testing circuit, and computing the difference between two digital output values using an integrated adder/subtractor circuit of the integrated testing circuit to provide a digital output difference value, wherein the first conversion output value is converted to a first digital output value and the second conversion output value is converted to a second digital output value, and the difference between the first and second digital output values is computed to provide a first digital output difference value.