Patent ID: 7061269

Claim:
A programmable device having programmable input/output (I/O) circuitry and programmable logic connected to receive incoming signals from and provide outgoing signals to the I/O circuitry, the programmable I/O circuitry comprising: one or more single-ended I/O buffers with PCI clamps; one or more single-ended I/O buffers without PCI clamps; and one or more differential I/O buffers without PCI clamps, wherein each I/O buffer is adapted to be programmably coupled to the programmable logic, wherein: the single-ended I/O buffers with PCI camps are located only on first and third sides of the device; the single-ended I/O buffers without PCI clamps are located only on second and fourth sides of the device; and the differential I/O buffers without PCI clamps are located only on the second and fourth sides of the device.