Patent ID: 7808049

Claim:
A semiconductor device comprising: a first MIS transistor of a first conductivity type including a first gate electrode which is formed above a first active region made of a semiconductor layer and first source/drain regions which are formed in parts of the first active region located at the sides of the first gate electrode; a second MIS transistor of a second conductivity type including a second gate electrode which is formed above a second active region made of the semiconductor layer and second source/drain regions which are formed in parts of the second active region located at the sides of the second gate electrode; a third MIS transistor of a first conductivity type including a third gate electrode which is formed above a third active region made of the semiconductor layer and third source/drain regions which are formed in parts of the third active region located at the sides of the third gate electrode; a single-layer first insulating film which covers the first gate electrode, the first active region, the second gate electrode and the second active region and applies first stress; a single-layer second insulating film which covers the third gate electrode and the third active region and applies second stress; and an interlayer insulating film which is formed above the first insulating film and the second insulating film, wherein the absolute value of the first stress of the first insulating film is smaller than the absolute value of the second stress of the second insulating film, and the interlayer insulating film is formed in contact with the second insulating film, and on the first gate electrode in the first active region and the second gate electrode in the second active region through the first insulating film.