Patent ID: 7977182

Claim:
A method of manufacturing a semiconductor device having an MISFET on a semiconductor substrate, comprising: forming a gate insulating film on a semiconductor substrate; forming a gate electrode on the gate insulating film; depositing a first metal on the semiconductor substrate; reacting the first metal and the semiconductor substrate with each other by a first heat treatment to form metal semiconductor compound layers, each being provided on the surface of the semiconductor substrate on one of both sides of the gate electrode; implanting ions having a mass equal to or larger than atomic weight of Si into the metal semiconductor compound layer; depositing a second metal on the metal semiconductor compound layer; and forming an interface layer by making the second metal segregated at an interface between the metal semiconductor compound layer and the semiconductor substrate by diffusing the second metal through the metal semiconductor compound layer by a second heat treatment, wherein in the case where the MISFET is an n-type MISFET, Schottky barrier height for an electron in the interface layer is set to be lower than Schottky barrier height for an electron in the metal semiconductor compound layer, and in the case where the MISFET is a p-type MISFET, Schottky barrier height for a hole in the interface layer is set to be lower than Schottky barrier height for a hole in the metal semiconductor compound layer.