Patent ID: 6841449

Claim:
A method of manufacturing a semiconductor device, which method comprises the steps of: (a) providing a semiconductor substrate of a first conductivity type and having a surface; (b) forming a gate insulator layer in contact with the substrate surface; (c) forming a gate electrode on a portion of the gate insulator layer, the gate electrode comprising first and second opposing side surfaces and a top surface; (d) forming a blanket layer of an insulative material on exposed portions of the gate insulator layer on the substrate surface and on the first and second opposing side surfaces and the top surface of the gate electrode; (e) removing the blanket layer of insulative material from the substrate surface portions and from the top surface of the gate electrode, thereby forming a tapered width insulative sidewall spacer on each of the first and second opposing side surfaces of the gate electrode; and (f) forming a blanket layer of nickel in contact with the exposed portions of the substrate surface adjacent the sidewall spacers, the top surface of the gate electrode, and the sidewall spacers, wherein the blanket layer of nickel is formed by the sequential steps of: (i) forming a first layer of nickel by sputtering in a oxygen gas atmosphere; and, (ii) forming a second layer of nickel on the first layer by sputtering in an argon gas atmosphere, whereby undesirable nickel silicide formation on the sidewall spacers during subsequent processing is substantially eliminated.