Patent ID: 7880241

Claim:
A gate electrode structure comprising: a patterned material stack located on a surface of a gate dielectric, said patterned material stack comprising, from bottom to top, a Ge rich-containing layer and a Si rich-containing layer, said Ge rich-containing layer consisting of a Ge rich-containing semiconductor material and said Si rich-containing layer consisting of a Si rich-containing semiconductor material, wherein said Ge rich-containing semiconductor material is an alloy of Si and Ge having a composition of Si (1-x) Ge x , and wherein x is a number between 0.4 and 1.0; and a surface passivation layer located directly on sidewalls of said Ge rich-containing layer, wherein said surface passivation layer comprises a silicon-germanium oxynitride, a silicon-germanium oxide, or a silicon-germanium nitride, and said surface passivation layer contacts sidewalls of said Ge rich-containing layer and does not contact sidewalls of said Si rich-containing layer, and all sidewalls of said Si rich-containing layer are exposed surfaces that are located above an interface between said Ge rich-containing layer and said Si rich-containing layer.