Patent ID: 7928757

Claim:
An integrated circuit device comprising: a receiver circuit including a differential amplifier to receive a pair of complementary input signals via respective first and second nodes; a first termination element, exhibiting a first impedance, coupled to the first node; a second termination element, exhibiting a second impedance, coupled to the second node; and a control circuit to set a termination value for each of the first and second termination elements, the control circuit comprising: a digitally adjustable termination element exhibiting a third impedance; a comparator having first and second inputs, the first input to receive a reference voltage and the second input to receive a voltage developed by drawing a first current through the digitally adjustable termination element; and a first counter circuit to provide a first digital value that is updated based on an output of the comparator, wherein the first digital value is used to set the first, second, and third impedances.