Patent ID: 7774666

Claim:
An analyzer having a scan test function, comprising: scan paths, each including flip-flops which function as a shift register when a scan test is performed; a switcher operable to switch between a first connection state and a second connection state, wherein in the second connection state said scan paths are connected in series forming a series scan path, and an output from said series scan path at a last stage is connected to an input of said series scan path at a first stage; an oscillator operable to oscillate a clock used at a time of actual operation; an oscillation controller operable to stop an oscillation of said oscillator when an operation mode performed by said analyzer is shifted from the actual operation to the scan test; and a clock controller operable to wait for a stabilization of the oscillation of said oscillator and resume a supply of the clock used in the actual operation when an operation mode performed by said analyzer is returned from the scan test to the actual operation.