Patent ID: 7696053

Claim:
A method comprising: forming a gate stack comprising a gate and a gate insulating layer over a semiconductor substrate, wherein forming the gate stack comprises: sequentially laminating an insulating layer and a polysilicon layer on an upper portion of an active region of the semiconductor substrate; forming a photoresist layer on the polysilicon layer; implanting p-type ions on the polysilicon layer using the photoresist layer as a mask, wherein, in implanting the p-type ions, boron ions are implanted, wherein the boron ions are implanted with an energy of 40 to 50 keV; and forming the gate stack by etching the gate insulating layer and the polysilicon layer; forming a first gate spacer layer on at least one side of the gate stack; forming a first shallow impurity region in the semiconductor substrate after the gate stack and the first gate spacer layer are formed by implanting impurity ions using the first gate spacer layer as a mask; forming a second gate spacer layer on at least one side of the first gate spacer layer; and forming a second deep impurity region in the semiconductor substrate by implanting impurity ions using the second gate spacer layer as a mask, wherein the second deep impurity region is formed by implanting ions equal to the p-type ions implanted on the polysilicon layer.