Patent ID: 7820456

Claim:
A manufacturing method of a semiconductor device comprising the steps of: forming a conductive plug above a semiconductor substrate; forming a conductive film to cover an upper surface of the conductive plug; forming an interlayer insulating film to cover the conductive film; forming a connecting portion formed by a conductive material in a buried manner in the interlayer insulating film to be electrically connected with the conductive film; and forming a capacitor structure formed by stacking the lower electrode, a dielectric film with ferroelectric characteristics and the upper electrode sequentially at a portion aligned with a portion above the conductive plug so that the lower electrode is electrically connected with the connecting portion, wherein, the conductive film has a longer width than a width of the lower electrode in cross-sectional view; the connecting portion is electrically connecting the conductive plug and the lower electrode via the conductive film, and the connecting portion is located in a peripheral region of the lower electrode in plan view.