Patent ID: 8482942

Claim:
A bridgeless power factor correction circuit configured to couple to an alternating current source and a direct current load, the circuit comprising: a first transistor configured to control first current flow through a first inductor coupled to the (AC) source; a second transistor configured to control second current flow through a second inductor coupled to the (AC) source; a control circuit configured to provide a switching cycle, to generate a carrier signal as a function of the switching cycle, to generate a first control signal for the first transistor, and to generate a second control signal for the second transistor; wherein the control circuit is configured to receive a first signal indicative of current through the first transistor, and to generate an duty cycle for the first transistor using a comparison of the first signal and the carrier signal; wherein the control circuit is configured to receive a second signal indicative of current through the second transistor, and to generate an duty cycle for the second transistor using a comparison of the second signal and the carrier signal; wherein the control circuit is configured to initiate the carrier signal at the beginning of the switching cycle, wherein a carrier signal duration corresponds to a fraction of a duration of the switching cycle; wherein the first transistor is configured to conduct the first current flow during a first polarity state of a voltage of the AC source; and wherein the second transistor is configured to conduct the second current flow during a second polarity state of the voltage of the AC source, the second polarity state indicative of a voltage polarity of the AC source that is opposite of the first polarity state.