Patent ID: 7725864

Claim:
Circuit design source data stored in a machine readable storage medium used in a design process for a multi-layer structure of a semiconductor device, comprising: an upper layer comprising multiple minimum-spaced wires; a lower layer comprising a dishing-prone structure, wherein the multiple minimum-spaced wires of the upper layer are disposed over the dishing-prone structure of the lower layer; an increased space between at least two wires of the multiple minimum-spaced wires in a region over the dishing-prone structure; a dummy hole in the wide wire under at least one wire of the multiple minimum-spaced wires if the dishing-prone structure includes a wide wire; and a widened region of the narrow trench under at least one wire of the multiple minimum-spaced wires if the dishing-prone structure includes a narrow trench between two wide wires, wherein the upper layer and the lower layer are arranged on a multi-layer structure of a semiconductor device implementing the circuit design source data.