Patent ID: 8010867

Claim:
An error correction code decoding device decoding a first coding block based on first information regarding to a decoded result of the first coding block and decoding a second coding block based on second information regarding to a decoded result of the second coding block, the decoding device comprising: a first memory storing the first information; a second memory storing the second information; a first decoding unit coupled to the first and second memories respectively to receive the first coding block, to read the second information from the second memory along a first direction in a memory space of the second memory, to decode the first coding block based on the second information read from the second memory, and to write the first information into the first memory along the first direction in a memory space of the first memory; and a second decoding unit coupled to the first and second memories respectively to receive a second coding block, to read the first information from the first memory along a second direction being a different direction in the memory space of the first memory, to decode the second coding block based on the first information read from the first memory, and to write the second information into the second memory along the second direction in the memory space of the second memory, wherein the second decoding unit comprises a first decoder that decodes a first sub-block included in the second coding block and a second decoder that decodes, in partially parallel with the first decoder, a second sub-block included in the second coding block, and wherein the first decoder starts accessing the first memory to read the first information therefrom and to decode the first sub-block whereas the second decoder starts accessing the first memory later than the first decoder to read the first information therefrom and to decode the second sub-block.