Patent ID: 7743172

Claim:
An integrated circuit (IC) package, comprising: a first semiconductor die mounted within the IC package and including an interface for interfacing with a memory-mapped device that is physically external to the IC package; a plurality of physical connection points coupled to said interface and physically accessible externally of the IC package, said physical connection points adapted to be coupled to the memory mapped device; a second semiconductor die not comprising an interface to the memory-mapped device, the second semiconductor die also mounted within the IC package; and a data bus coupling the first semiconductor die to the second semiconductor die, the data bus used to transfer a control word and a data word; wherein the control word comprises a data word start address that corresponds to a location in the memory-mapped device, the data word transferred from the second semiconductor die to the first semiconductor die and stored by the interface at the location in the memory-mapped device when the memory-mapped device is coupled to said physical connection points.