Patent ID: 7026194

Claim:
A method of manufacturing a semiconductor device comprising: forming a semiconductor film over a substrate; etching the semiconductor film into a semiconductor layer; forming an insulating film in contact with the semiconductor layer; forming a conductive layer on the an insulating film; forming a gate electrode having a tapered cross section and a gate insulating film having a cross section by selectively etching the conductive layer and the insulating film; forming a low n-type impurity concentration region in the semiconductor layer by adding an n-type impurity element through the tapered portion of the gate-insulating film, the low n-type impurity concentration region having a gradient of concentration of the n-type element in a direction parallel with a surface of the substrate; forming a high n-type impurity concentration region in the semiconductor layer by adding an n-type impurity element using the gate electrode as a mask; forming a first interlayer-insulating film comprising an inorganic insulating material over the semiconductor layer, the gate insulating film, and the gate electrode; forming a second interlayer-insulating film comprising an organic insulating material in contact with the first interlayer-insulating film; and forming a pixel electrode electrically connected to the semiconductor layer on the second interlayer-insulating film.