Patent ID: 8501503

Claim:
A method of manufacturing a plurality of semiconductor wafers, wherein each wafer has plural dies, wherein the plural dies include corresponding pattern fields in which microstructures are arranged according to a same arrangement pattern, and wherein the method comprises: micro-inspecting at least one location within at least one micro-inspected pattern field and determining at least one parameter value representing a property of the wafer at the micro-inspected location, wherein the micro-inspecting comprises directing measuring radiation to the location and detecting radiation emerging from the location using magnifying optics; macro-inspecting a plurality of locations within the at least one micro-inspected pattern field, wherein the macro-inspecting comprises directing measuring light to plural pattern fields, imaging the illuminated plural pattern fields onto an array of detector elements using demagnifying optics and recording light intensities detected by the detector elements, wherein each of the locations is simultaneously imaged onto one or more adjacent detector elements, and wherein a number of the macro-inspected locations within each of the at least one micro-inspected pattern fields is at least 5 times greater than a number of the micro-inspected locations within this pattern field; and determining, for each macro-inspected location of the macro-inspected pattern field, at least one parameter value representing the property of the wafer at the macro-inspected location based on the light intensity recorded for the macro-inspected location and on the at least one parameter value representing the property of the wafer at the micro-inspected location of this pattern field.