Patent ID: 6981166

Claim:
A method for performing clocked operations in an electronic device, the method comprising the steps of: performing, in the electronic device, first and second operations responsive to a timing clock having a primary frequency f, wherein the electronic device is capable of performing the operations within X and Y cycles of the clock, respectively, and wherein X cycles of the clock correspond to a time interval T 1 with the clock operating at the primary frequency f, and, accordingly, the device is capable of performing X/Y instances of the second operation within time interval T 1 with the clock operating at the primary frequency f; generating, during the time interval T 1 , at least one extra cycle of the clock, to selectively reduce performance time for the first operation; and masking a certain effect of the at least one extra cycle of the clock for the second operation, so that instances of the second operation during the interval T 1 remain no greater in number than X/Y, wherein a first clock signal has the primary frequency f and a second clock signal has a frequency greater than the primary frequency f, and wherein generating the at least one extra cycle of the clock comprises selecting, during some of the time T 1 , the second clock signal for output as the timing clock, wherein instances of the second operation are initiated by asserting an operation-initiating control signal in conjunction with asserting the timing clock, and wherein masking the effect of the at least one extra cycle of the clock comprises altering timing of the control signal, so that assertion of the control signal occurs during a different time interval than does assertion of the at least one extra cycle of the clock.