Patent ID: 7397310

Claim:
A pipelined analog to digital converter, comprising: a first stage that receives an input voltage, that generates a first sampled digital value and a first residue voltage, and that includes a first amplifier that amplifies said first residue voltage and generates a first amplified residue voltage; and a second stage that receives said first amplified residue voltage, that generates a second sampled digital value and a second residue voltage, and that includes a second amplifier that amplifies said second residue voltage; wherein at least one of said first amplifier and said second amplifier comprises: a first transistor having a control terminal, a first terminal, and a second terminal; a second transistor having a control terminal, a first terminal, and a second terminal that communicates with said second terminal of said first transistor; a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output; and a differential output amplifier comprising at least one of a differential operational amplifier, a differential telescopic cascoded amplifier and a differential push-pull amplifier and having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output.