Patent ID: 7823274

Claim:
A method of making a multilayered circuitized substrate assembly, said method comprising: providing a first circuitized substrate including at least one high temperature dielectric layer having first and second opposing surfaces and at least one opening within said at least one high temperature dielectric layer, extending from said opposing surface to said second opposing surface; positioning a quantity of low temperature conductive paste within said at least one opening of said first circuitized substrate, said low temperature conductive paste including an organic binder component and at least one metallic component including a plurality of flakes; and bonding a second circuitized substrate including at least one high temperature dielectric layer to said first circuitized substrate by lamination over a time period of approximately 300 minutes and at a pressure within the range of from about 1700 PSI to about 2300 PSI, whereby said flakes within said low temperature conductive paste are sintered during said lamination process and are of sufficient density to form at least one electrical path through said paste, from said first opposing surface to said second opposing surface.