Patent ID: 7403558

Claim:
A semiconductor integrated circuit for processing a plurality of received broadcast signals, the broadcast signals being of a type each having a different respective digital code, the semiconductor integrated circuit comprising: a digital sampler; a memory arrangement; and a plurality of correlators, being arranged to be operable in two modes wherein: in an acquisition mode; the digital sampler is adapted to sample the received broadcast signals to produce a digital bit stream at a first bit rate; the memory arrangement is adapted to receive the digital bit stream and to output at a second bit rate, being higher than the first bit rate; the plurality of correlators is adapted to receive the digital bit stream at the second bit rate, and each of the plurality of correlators is adapted to correlate the digital bit stream with a same locally generated version of one of the different digital codes; and in a track mode: the digital sampler is adapted to sample the received broadcast signals to produce a digital bit stream at the first bit rate and to provide the digital bit stream direct to each of the plurality of correlators, each correlator is adapted to correlate the digital bit stream with a different locally generated version of one of the digital codes, wherein the memory arrangement includes two shift registers arranged to alternately receive the digital bit stream at the first bit rate while another of the shift registers circulates at the second bit rate.