Patent ID: 7315438

Claim:
An electrostatic discharge circuit comprising: a first power rail; a signal node; an electrostatic-discharge-protection diode having a first end coupled to said signal node, and having a second end opposite said first end and coupled to a junction node; a capacitance reduction circuit coupled to said junction node, said capacitance reduction circuit being effective for providing a compensation voltage at said junction node when the magnitude of the voltage potential at said signal node is not greater than a predetermined value, said compensation voltage being of greater magnitude than said first power rail, said capacitance reduction circuit being further effective for coupling said junction node to said first power rail when the magnitude of the voltage potential at said signal node is greater than said predetermined value; wherein said capacitance reduction circuit includes a voltage pump for providing said compensation voltage to said junction node, said voltage pump having: an inverter responsive to a pumping signal; a first capacitive device coupled between the output of said inverter and a charge collection node; an MOS device coupled between said first power rail and said charge collection node; a second capacitive device for holding an output charge; and a pump diode for coupling said charge collection node to said second capacitive device; wherein said MOS device is a PMOS device, and the control gate of said PMOS device is responsive to logic transitions of said pumping signal.