Patent ID: 8184740

Claim:
A signal processing circuit for compensating for an I/Q mismatch including an I/Q amplitude mismatch representative of a discrepancy between the amplitudes of I/O components of an output signal from an orthogonal modulator and an I/Q phase mismatch representative of a deviation from 90 degrees of the phase difference between the I/O components of the output signal from the orthogonal modulator, comprising: test signal generating means for successively generating test signals represented by four points, which comprise two sets of two points positioned in point symmetry with respect to an origin of an I/Q orthogonal coordinate system, and outputting the test signals to a baseband port of said orthogonal modulator; detecting means for detecting and outputting the amplitude of an envelope of the output signal from said orthogonal modulator when said test signals represented by four points are generated; calculating means for calculating and outputting an average value of output signals from said detector when the test signals represented by the two points of each set are generated; and control means for adjusting the amplitudes and/or phases of said test signals so that the average values produced when the test signals represented by the two sets of the two points are generated are equal to each other.