Patent ID: 8653527

Claim:
A method of manufacturing a thin film transistor including a source electrode, a drain electrode, a gate electrode, and a semiconductor layer formed in a channel portion between the source electrode and the drain electrode, the method comprising the steps of: forming a pair of underlying electrodes on a surface of an underlying layer; forming a partition layer on both the surface of the underlying layer and a first part of a surface of the respective underlying electrode such that the partition layer surrounds an area in which the source electrode, the drain electrode, and the channel portion are to be formed; forming the source electrode and the drain electrode, in the area surrounded by the partition layer, by covering a second part of the surface of the respective underlying electrode, the second part being an area on the surface of the respective underlying electrode not covered by the partition layer, forming the source electrode and the drain electrode thereby defining the channel portion between the source electrode and the drain electrode; and applying a semiconductor solution to the area surrounded by the partition layer to form the semiconductor layer, the semiconductor solution containing a solvent and a semiconductor material dissolved or dispersed in the solvent.