Patent ID: 7111028

Claim:
A data conversion method for generating output data by converting input data to decrease memory storage of a circuit for storing converted data, comprising the steps of: a step (a) of obtaining first data of m-bits width, which indicates bit number L corresponding to a position of a pre-selected “1” bit located within the input data; a step (b) of obtaining second data of n-bits width from bit numbers (L- 1 ) to (L-n); a step (c) of generating a first address of (m+n)-bits width by combining the first data with the second data; a step (d) of generating a second address by incrementing or decrementing the first address; a step (e) of reading a first converted data corresponding to the first address and a second converted data corresponding to the second address by a memory means storing converted data, obtained by predetermined-converting the input data, corresponding to the address generated from the input data; and a step (f) of generating the output data based on the first and the second converted data and at least one of storing the output data in the memory means and outputting the output data to a data output line.