Patent ID: 8762126

Claim:
A method of analyzing operation of a simulated computer, the method comprising: loading, for execution on an executing computer simulating operation of the simulated computer, one or more user-defined dynamically linked analysis libraries, each analysis library comprising one or more specifications of events to be traced for analysis and one or more analysis function to be carried out by one or more trace buffer handlers; aggregating the one or more specifications of events to be traced for analysis from the one or more analysis libraries into a set of specifications, wherein the set of specifications is filtered to remove duplicates; translating static binary instructions for the simulated computer into binary instructions for the executing computer, including: inserting, into the translation, implementing code for each specification of an event to be traced; executing the translation, including executing the implementing code thereby generating, in a trace buffer, one or more trace records for each specified event; and processing, by the trace buffer handlers, the trace buffer including calling, by each trace buffer handler, analysis functions associated with the trace buffer handler.