Patent ID: 7035953

Claim:
A computer system comprising: a microprocessor; a first memory board comprising random access memory (RAM); a second memory board comprising RAM; a first bridge device coupled to the microprocessor, the first bridge device also coupled to the first and second memory boards by way of a memory bus; a switch device coupled between the first bridge device and each of the first and second memory boards, the switch device selectively couples each of the first and second memory boards to the memory bus; a logic device coupled to the switch device and the first bridge device that controls the selective coupling of each of the first and second memory devices by the switch device; a read only memory (ROM) device coupled to the first bridge device, and wherein the ROM device stores programs executable by the microprocessor to configure the memory boards; and wherein either of the first and second memory boards may be selectively removed from and added to the computer system during operation of the computer system.