Patent ID: 8546247

Claim:
A manufacturing method of a semiconductor device comprising: forming a gate insulating film on a semiconductor substrate; depositing an amorphous silicon layer on said gate insulating film; etching said amorphous silicon layer to form a gate pattern by; implanting a first impurity of the same conductivity type as a channel region from a diagonal direction into the surface of said semiconductor substrate and into said amorphous silicon layer of said gate pattern; implanting a second impurity of the conductivity type opposite to that of the channel region at a dose of 1×10 14 /cm 2 to 3×10 15 /cm 2 from a diagonal direction into the surface of said semiconductor substrate and into said amorphous silicon layer of said gate pattern defined after the implanting the first impurity; covering the gate pattern with an insulating layer under a condition not to crystallize the amorphous silicon layer; crystallizing the covered gate pattern to convert the amorphous silicon layer of the covered gate pattern to a polycrystal silicon layer with an annealing process; forming a side wall spacer by etching the insulating layer after said crystallizing and the annealing process; and implanting a third impurity of the conductivity type opposite to that of the channel region into the polycrystal silicon layer.