Patent ID: 8766104

Claim:
A multi-layer printed circuit board (PCB), comprising: a first layer stack including a first electrically-insulating layer, a second electrically-insulating layer, and a first electrically-conductive layer disposed between the first and second electrically-insulating layers; a second layer stack coupled to the first layer stack, the second layer stack including a third electrically-insulating layer and a second electrically-conductive layer, wherein at least one of the first layer stack or the second layer stack includes a cut-out area defining a void that extends therethrough; a first signal layer disposed in association with one of the first electrically-insulating layer of the first layer stack and the third electrically-insulating layer of the second layer stack; a second signal layer disposed in association with the second electrically-insulating layer of the first layer stack; a device at least partially disposed within the cut-out area and electrically-coupled to at least one of the first signal layer and the second signal layer; and a sheet of electrically-conductive material including a first portion covering the cut-out area and a second portion disposed on at least a portion of one of the first electrically-conductive layer and the second electrically-conductive layer, wherein the sheet of electrically-conductive material is disposed in spaced relation relative to a top surface of the device.