Patent ID: 8692383

Claim:
A semiconductor device, comprising: a wiring substrate having a first resin layer and a second resin layer, the first resin layer having a first main surface and a second main surface opposite the first main surface, a plurality of leads arranged on the first main surface of the first resin layer, the second resin layer laminated on the first main surface of the first resin layer; a semiconductor chip having a first surface over which a plurality of electrode pads are arranged and a second surface opposite the first surface and mounted over the second resin layer of the wiring substrate via an adhesive material such that the second surface thereof faces to the second resin layer; a plurality of metal wires electrically connected to the plurality of electrode pads of the semiconductor chip and leads of the wiring substrate, respectively; and a sealing body sealing the semiconductor chip and the plurality of metal wires, wherein, in a cross-section view of the wiring substrate and the semiconductor chip, a part of the second surface of the semiconductor chip is bonded to a part of the sealing body, and wherein the wiring substrate can mount semiconductor chips having different planar sizes.