Patent ID: 7279357

Claim:
A method for fabricating a semiconductor device, comprising: a first step of forming a first insulating film, having a plurality of regions, over the entire main surface of a semiconductor wafer including the surfaces of a plurality of pad electrodes, the semiconductor wafer having a plurality of integrated circuits formed on the main surface of the chip and the plurality of pad electrodes formed on the main surface of the chip and electrically connected to the corresponding integrated circuits; a second step of masking only an inductor formation region of the first insulating film while leaving the other regions of the first insulating film unmasked, and removing upper portions of the first insulating film so that a thickness of the inductor formation region is greater than a thickness of a land formation region; a third step of forming a plurality of contact holes exposing therein the respective pad electrodes in portions of the first insulating film whose upper portions have been selectively removed and which are located on the respective pad electrodes; and a fourth step of forming, on the inductor formation region of the first insulating film, an inductor of which both terminals are connected to the pad electrodes through the contact holes, respectively, and forming a land on the land formation region on the first insulating film.