Patent ID: 7781869

Claim:
A semiconductor device comprising: a base layer of a first conductivity type having a first main surface and a second main surface opposite the first main surface; a first main electrode area formed in the upper portion of the base layer, the upper portion of the base layer including the first main surface, the first main electrode area including a barrier layer of the first conductivity type, formed on the base layer, and having a higher impurity concentration than that of the base layer, and a first main electrode region of a second conductivity type formed on the barrier layer, the first main electrode region being separated from the base layer via the barrier layer such that the first main electrode region does not directly contact the base layer; a plurality of control regions formed in the upper portion of the base layer and arranged inside grooves extending from the first main surface of the base layer and extending into the base layer past a bottom of the first main electrode area, the first main electrode region being disposed between a pair of adjacent control regions of the plurality of control regions and contacting both of the pair of adjacent control regions; a second main electrode layer of the first conductivity type, configured to contact the second main surface; and a first main electrode electrically connected to the first main electrode region and Schottky-contacted to the base layer at the first main surface.