Patent ID: 7064694

Claim:
A method of producing a digital representation of an analog input signal comprising the steps of: a. in response to a first control signal, producing a timing signal that defines a sampling window having a time interval timed by a clock having a plurality of clock cycles; b. responsive to the start of said sampling window enabling a first current source that produces a first current that is proportional to said analog input signal and performing a first integration function to produce a ramp voltage on an integration capacitor coupled to said first current source, wherein said ramp voltage has a starting voltage at the start of said sampling window and said ramp voltage generally has a first slope of a first direction during a first ramp voltage portion, wherein said first current source ceases to perform said first integration function at the end of said sampling window; c. at least in part in response to said first ramp voltage portion intersecting a first threshold voltage during said sampling window, performing a second integration function by enabling a second current source that produces a predetermined reference current and coupling said second current source to said integration capacitor so that both said first and second current sources are coupled to said integration capacitor to produce a second ramp voltage portion, wherein said reference current is greater than said first current and said ramp voltage during said second ramp voltage portion has a slope opposite in direction to said first ramp voltage portion; d. at least in part in response to said second ramp voltage portion intersecting a second threshold voltage, disabling said second current source; and e. counting all clock pulses produced by a clock with a first counter while said second current source is enabled to produce a digital value indicative of the magnitude of said analog input signal.