Patent ID: 8030652

Claim:
A method for fabricating a pixel structure, comprising: providing a substrate, comprising a light-shielding layer and a flat layer covering on the light-shielding layer thereon; sequentially forming a semiconductor layer and a first metal layer on the flat layer; patterning the first metal layer and the semiconductor layer utilizing a first halftone photomask to form a source, a drain, a channel layer, a data line and a first pad, wherein the channel layer is located above the light-shielding layer and connected to the source and the drain, and the data line is connected the source and the first pad; sequentially forming a gate dielectric layer, a second metal layer and a protection layer; patterning the protection layer, the second metal layer and the gate dielectric layer utilizing a second halftone photomask to form a gate, a scan line, and a second pad, expose a part of the drain, and remove portions of the protection layer located over the first pad and the second pad simultaneously, the gate being located above the channel layer, wherein the gate and the channel layer are stacked on each other, and the scan line is connected the gate and the second pad; forming a transparent conductive layer on the substrate; and patterning the transparent conductive layer to form a pixel electrode and retain portions of the transparent conductive layer located over the first pad and the second pad, respectively, wherein the pixel electrode is electrically connected to the exposed drain.