Patent ID: 7518143

Claim:
A solid-state imaging device having an integrated array of a plurality of pixels, each pixel comprising: a photodiode that receives light and that generates photoelectric charges; a transfer transistor coupled to the photodiode and that transfers the photoelectric charges received from the photodiode; and a storage capacitor element coupled to the photodiode at least through the transfer transistor; a floating region, provided between the transfer transistor and the storage capacitor element, to which the photoelectric charges are transferred via the transfer transistor; and a storage transistor, provided between the transfer transistor and the storage capacitor element, that couples or splits potentials of the floating region and the storage capacitor element, said device further having a transfer transistor controlling circuit that generates at least a control signal that controls the transfer transistor in such a manner that the transfer transistor passes the photoelectric charges overflowing from the photodiode during an accumulating operation; wherein the storage capacitor accumulates the photoelectric charges overflowing from the photodiode during the accumulating operation, the transfer transistor controlling circuit comprising: a first driveline that is connected to a gate of the storage transistor, the first driveline being capable of taking on either a first or a second voltage level at any point in time, the first voltage level corresponding to an ON state of the storage transistor and the second voltage level corresponding to an OFF state of the storage transistor, and a second driveline that is connected to a gate of the transfer transistor, the second drive being capable of taking on either the first, the second, or a third voltage level at any point in time, the first voltage level corresponding to an ON state of the transfer transistor, the second voltage level corresponding to an OFF state of the transfer transistor, and the third voltage level corresponding to a floating state of the transfer transistor, the third voltage level being a level greater than the second voltage level and less than the first voltage level, wherein the second driveline is set to the third voltage level by the transfer transistor controlling circuit to thereby cause the transfer transistor and the floating region to capture and accumulate the photoelectric charges overflowing from the photodiode during the accumulating operation.