Patent ID: 8592283

Claim:
A semiconductor device manufacturing method for manufacturing a semiconductor device having a transistor mounted in a wiring of a plural-layer structure, said method comprising: in manufacturing the semiconductor device that is formed on a semiconductor element and comprises a barrier insulating film, a porous interlayer insulating film, a wiring, a via plug formed by embedding a metal wiring material in a wiring trench, and a via hole formed in said porous interlayer insulating film, etching said porous interlayer insulating film to form an opening in said porous interlayer insulating film; irradiating an electron beam or an ultraviolet ray onto a side wall of said opening to form a porous modified layer on the side wall; forming another opening in said barrier insulating film; and forming a barrier metal so as to contact with the porous modified layer, wherein a size of pores contained in the porous modified layer is greater than a size of pores contained in said porous interlayer insulating film before the irradiation of electron beam or ultraviolet ray, wherein the porous modified layer is formed as a support so as to surround the metal wiring material, and wherein concave/convex portions are formed by an increase in the size of the pores contained in the porous modified layer so as to improve adhesion between said porous interlayer insulating film and the barrier metal by an anchoring effect.