Patent ID: 7873879

Claim:
A data processing system comprising: a processing unit of a local node; a local memory with real address (RA) space allocated to a subset of effective addresses (EAs) of a local task executing on the processing unit; a host fabric interface (HFI) having processing logic for completing operations that enable parallel job execution via a plurality of distributed tasks that have a global shared memory (GSM) accessible by effective addresses, wherein only a first portion of effective addresses within a global address space (GAS) is mapped to the local memory, while other portions of the EAs within the GAS are mapped to other physical memory of other nodes within a GSM environment; a memory management unit (MMU) coupled to the HFI and which provides an effective address to real address (EA-to-RA) translation utilized by the HFI to evaluate when effective addresses being referenced by a GSM operation that is processed by the HFI is memory-mapped to the local memory for a task associated with the effective addresses; wherein the MMU provides EA-to-RA translations for GSM operations received from remote nodes, when the GSM operations received include at least one EA corresponding to the EAs associated with the task executing on the processing unit of the data processing system, and wherein the EA is memory mapped to a RA within the local memory; wherein the processing logic further completes the functions of: detecting a receipt of a GSM packet from a network fabric to which the HFI is connected; parsing the GSM packet for an EA associated with one or more of a GSM operation and data within the GSM packet; comparing an EA of operations within the GSM packet with EAs mapped to RAs within the local memory for the local task for which a HFI window is allocated; and enabling processing of the GSM packet when the EA of the GSM operation and data within the GSM packet is an EA that is mapped to a RA within the local memory for the local task.