Patent ID: 8021957

Claim:
A process of forming an electronic device comprising: forming a field isolation region within a substrate to define a first active region and a second active region, wherein: the first active region lies immediately adjacent to the field isolation region; and the second active region lying immediately adjacent to the field isolation region and is spaced apart from the first active region; forming a p-channel transistor within the first active region; forming an n-channel transistor within the second active region; forming a first insulating layer over the field isolation region and having a first strain, wherein from a top view, an island portion of the first insulating layer lies entirely within the field isolation region, and wherein a second portion of the first insulating layer overlies the p-channel transistor; and forming a second insulating layer over the field isolation region, having a second strain different from the first strain, and including a first opening, wherein from a top view, the island portion of the first insulating layer lies within the first opening in the second insulating layer, and wherein the second insulating layer overlies the n-channel transistor.