Patent ID: 8125070

Claim:
A semiconductor component comprising: at least one semiconductor chip in which an electrical circuit is integrated, wherein the semiconductor chip has a top surface extending parallel to a main plane of extension of the semiconductor chip, and has a first termination surface at a first location on said top surface and a second termination surface at a second location on said top surface, said first termination surface constructed to receive a test signal and said second termination surface connected to a connecting point of the semiconductor chip; an electrically insulating encapsulating compound that entirely covers the first and the second termination surface, the encapsulating compound having a first exposed surface, spaced a first distance above the top surface, and a second exposed surface spaced a second distance above the top surface and displaced from said second termination surface in a direction parallel to said main extension surface, said second distance being greater than said first distance; and an analysis contact electrically connected with the first termination surface, projecting above the first exposed surface of the encapsulating compound, said analysis contact functioning to receive said test signal on said first exposed surface, whereby in the event of a defect in said semiconductor chip, said first termination surface for said test signal is contacted on said first exposed surface from a point exterior to said chip while contacts to said second termination surface remain encapsulated in said encapsulating compound below said second exposed surface, wherein the analysis contact is located transverse to the main plane of extension of the semiconductor chip across a portion of a surface of the semiconductor chip that borders the first termination surface.