Patent ID: 7776658

Claim:
A semiconductor package comprising: a circuit substrate; a plurality of semiconductor dies whose bottom surfaces are electrically bonded atop the circuit substrate, said semiconductor dies further comprise: a die one bordered by first die one longitudinal edge and second die one longitudinal edge plus first die one transverse edge and second die one transverse edge; and a die two bordered by first die two longitudinal edge and second die two longitudinal edge plus first die two transverse edge and second die two transverse edge; wherein said die one and die two are located next to but separated, with an inter-die distance, from each other along their respective second die one longitudinal edge and first die two longitudinal edge; and an elevation-adaptive electrical connection for connecting a top metalized contact atop the surface of die two to the bottom surface of die one while accommodating for elevation difference between the surfaces, said elevation-adaptive electrical connection further comprises: a) an L-shaped circuit route, being part of and coplanar with the circuit substrate, extending transversely from the second die one longitudinal edge near the second die one transverse edge and terminating with an exposed intermediate contact area atop the circuit substrate and next to the second die two transverse edge for electrically routing the bottom surface of die one to the exposed intermediate contact area; and b) an interconnection plate connecting the top metalized contact area of die two with said exposed intermediate contact area while being three dimensionally formed to accommodate for elevation difference between the contact areas whereby the presence of said L-shaped circuit route and exposed intermediate contact area allow reduction of the inter-die distance from an otherwise straight transverse circuit routing between the second die one longitudinal edge and the first die two longitudinal edge.