Patent ID: 7631313

Claim:
A system, comprising: a first processor, comprising: a first socket interface configured to communicate with a second socket interface of a second processor over a computer network, wherein the first socket interface includes a plurality of registers and is configured to: transmit a data synchronization frame to the second socket interface, wherein the data synchronization frame includes a first transaction identifier and wherein the data synchronization frame indicates that a first set of data is available for transmission from the first socket interface to the second socket interface, wherein the first transaction identifier is usable by the first socket interface to determine a physical memory address of the first set of data within a first address space accessible to the first socket interface; receive a data request frame from the second socket interface, wherein the data request frame includes the first transaction identifier and a second transaction identifier, wherein the data request frame indicates that the second processor has storage space to accept transmission of the first set of data, wherein the second transaction identifier is usable by the second socket interface to determine a physical memory address of a storage location for the first set of data within a second address space accessible to the second socket interface, wherein the second address space is distinct from the first address space; in response to receiving the data request frame, use the first transaction identifier to retrieve the first set of data from the first address space; transmit a data reply frame to the second socket interface in response to the data request frame, wherein the data reply frame includes the second transaction identifier and at least a portion of the first set of data.