Patent ID: 7466024

Claim:
A method for manufacturing a semiconductor device, comprising the steps of: (a) preparing a lead frame which has a chip mounting section comprising a first chip mounting section and a second chip mounting section disposed alongside of the first chip mounting section and has a plurality of leads disposed around the chip mounting section; (b) mounting a first semiconductor chip over the first chip mounting section in such a manner that a plurality of electrodes of the first semiconductor chip are disposed over the first chip mounting section, and mounting a second semiconductor chip over the second chip mounting section in such a manner that a plurality of electrodes of the second semiconductor chip are disposed over the second chip mounting section; (c) in a state in which the first chip mounting section and second chip mounting section of the lead frame are supported by the same flat surface of a heating jig, electrically connecting the plurality of electrodes of the first semiconductor chip and the plurality of electrodes of the second semiconductor chip by a plurality of conductive first wires respectively, and electrically connecting the plurality of electrodes of the first semiconductor chip and the plurality of leads by a plurality of conductive second wires respectively; (d) resin-sealing the first and second semiconductor chips, the chip mounting section and the plurality of first and second wires to form an encapsulating body; and (e) separating the plurality of leads from the lead frame to bring the same into fractionization.