Patent ID: 7385274

Claim:
A high-voltage metal-oxide-semiconductor device, comprising: a semiconductor substrate of first conductivity type comprising a high-voltage device area thereon and shallow trench isolation (STI) structure that further divides said high-voltage device area into a first sub-area and a second sub-area; a first doping region of second conductivity type and a second doping region of second conductivity type doped in said semiconductor substrate within said high-voltage device area, a channel region being defined between said first doping region and said second doping region; a third doping region encompassed by said first doping region; a fourth doping region encompassed by said second doping region, wherein said fourth doping region is formed within said second sub-area; a gate electrode situated on the channel region; and a gate dielectric layer interposed between said gate electrode and said channel region, wherein said gate dielectric layer comprises an extended portion laterally protruding from bottom of said gate electrode and overlying a portion of said first doping region between said third doping region and said channel region and said gate dielectric layer is not completely aligned with said gate electrode, wherein a difference in height between a top surface of said STI structure and top surface of said semiconductor substrate is smaller than a thickness of said gate dielectric layer.