Patent ID: 7932738

Claim:
A method for reading a programmable anti-fuse block of a high-voltage integrated circuit (HVIC) comprising: applying a first voltage to a first pin of the HVIC, the first pin being coupled to a drain of a high-voltage field-effect transistor (HVFET); lowering the first voltage to a second voltage, the second voltage being substantially less than the first voltage, the second voltage being provided at a first node; coupling the second voltage to a common node of the programmable anti-fuse block, the common node being coupled to a plurality of anti-fuses, each anti-fuse having a programmed state; generating a read signal that turns on a plurality of selector switches, each selector switch having a drain coupled to a corresponding one of the anti-fuses, each selector switch also having a gate and a source; and latching a voltage potential at the source of each selector switch, the voltage potential being representative of the programmed state of each anti-fuse.