Patent ID: 7864155

Claim:
A display control circuit for a display panel in which a plurality of liquid crystal pixels are arrayed substantially in a matrix, comprising: a timing control circuit that generates a start signal for gradation display and a start signal for non-gradation display; a panel driving unit that sequentially drives the liquid crystal pixels in units of one row under the control of the start signal for gradation display to hold pixel voltages for gradation display in the liquid crystal pixels of the driven row, and that sequentially drives the liquid crystal pixels in units of at least one row under the control of the start signal for non-gradation display to hold pixel voltages for non-gradation display in the liquid crystal pixels of the driven row; and a light source driving unit that drives a plurality of backlight sources arranged substantially in parallel to the rows of liquid crystal pixels; wherein the light source driving unit is configured to start, in synchronism with the start signal for gradation display, an operation for sequentially blinking the backlight sources with a predetermined duty ratio, and the predetermined duty ratio is determined in accordance with a dimmer signal from outside such that the predetermined duty ratio, at a maximum value thereof, is not greater than a ratio of a holding period of the pixel voltage for gradation display to a sum of the holding period of the pixel voltage for gradation display and a holding period of the pixel voltage for non-gradation display, and wherein the light source driving unit includes a plurality of voltage conversion inverters that generate driving voltage for the backlight sources, a dimmer signal converting circuit that converts the dimmer signal from the outside such that the dimmer signal represents a duty ratio that is not greater than the ratio of the holding period of the pixel voltage for gradation display to the sum of the holding period of the pixel voltage for gradation display and the holding period of the pixel voltage for non-gradation display, and an inverter control circuit that generates, in response to the start signal for gradation display, a pulse width modulation signal with a duty ratio corresponding to a conversion result of the dimmer signal converting circuit, and outputs the pulse width modulation signal to the voltage conversion inverters with a phase difference corresponding to a pitch of the backlight sources.