Patent ID: 8430620

Claim:
A wafer processing system comprising: a dual end effector robot said dual end effector robot comprising a) a first end effector for supporting a semiconductor substrate, said first end effector having a first top surface configured to contact a semiconductor substrate during substrate transfer, wherein said first top surface comprises a first material having a first coefficient of friction, and b) a second end effector for supporting a semiconductor substrate, said second end effector having a second top surface configured to contact a semiconductor substrate during substrate transfer, wherein said second top surface comprises a second material having a second coefficient of friction, wherein the first and second coefficients are different and wherein the first and second end effectors are on different arms; at least one processing chamber; a transfer chamber connected to said at least one processing chamber; and a loadlock connected to said transfer chamber, wherein said dual end effector robot is located within said transfer chamber and is configured to transfer wafers directly between said loadlock and said at least one processing chamber such that the first and second end effectors are both configured to transfer wafers directly between said loadlock and said at least one processing chamber, and further wherein transferring a wafer between a loadlock and a processing chamber includes pick and place moves to or from the loadlock and processing chamber.