Patent ID: 8826081

Claim:
A data processing apparatus, comprising processing circuitry, which in use, generates data, debug circuitry arranged to debug operation of the processing circuitry and an interface unit containing a controller arranged to control operation of the interface unit, wherein each of the processing circuitry and the interface unit constitute a single processing system and wherein the processing apparatus includes bus circuitry arranged to pass data into and/or out of the processing apparatus over a communication bus capable of connecting a plurality of devices; wherein the communication bus is controlled by a protocol for data interchange requiring data interchange from any device on the communication bus to be controlled by a single processing system; the debug circuitry comprises monitoring circuitry arranged to monitor the data generated, in use, by the processing circuitry and generate a stream of trace elements; and the interface unit being arranged to interface, using the bus circuitry, the trace elements generated by the monitoring circuitry onto the communication bus to be output, in use, from the processing apparatus using the communication bus such that each of the processing circuitry and the interface unit are arranged to independently control data interchange from the data processing apparatus.