Patent ID: 8208467

Claim:
An apparatus for modulating a width of a high-speed link, comprising: a transmitter circuit coupled to the high-speed link, wherein the high-speed link includes N lanes, and wherein the high-speed link is used to transmit frames of data that each comprise a constant number of cells, each cell containing a separate portion of the data in the frame; wherein while using a first number of lanes to transmit frames on the high-speed link with each of the first number of lanes being used to transmit a corresponding separate portion of the cells in each frame in parallel, wherein the portion of the cells in each frame that is transmitted using each lane is determined in accordance with the first number of lanes, the transmitter circuit is configured to: determine a second number of lanes to be used to transmit frames on the high-speed link based on a bandwidth demand on the high-speed link; and send an indicator of the second number of lanes to a receiver on the high-speed link; and in response to an acknowledgement of the indicator received from the receiver, transmit subsequent frames on the high-speed link using the second number of lanes from a predetermined frame with each of the second number of lanes being used to transmit a corresponding separate portion of the cells in each frame in parallel, wherein the portion of the cells in each frame that is transmitted using each lane is determined in accordance with the second number of lanes; and receive an error signal from the receiver in response to the indicator and, in response to the error signal, resend the indicator of the second number of lanes to the receiver until the error signal is received in response a predetermined number of times, whereupon the transmitter circuit is configured to terminate attempting to change the number of lanes and continue transmitting frames on the high-speed link using the first number of lanes.