Patent ID: 7600076

Claim:
A method of performing a cacheline polling operation in an information handling system, said method comprising: storing data by a processor within a data buffer disposed within a memory which includes a plurality of cacheable memory locations, such that the data buffer is accessible to an external device for retrieval of said data from said data buffer; storing a buffer flag busy indicator data value within a first cacheable memory location within said memory and setting a load/store operation reservation associated with said first cacheable memory location via execution of a store and reserve (STAR) instruction, such that said storing of said buffer flag busy indicator value via said execution of said STAR instruction signals an external device having access to said memory that said data has been stored within said memory and may be accessed by said external device; executing a load when reservation lost (LDRL) instruction to determine whether said load/store operation reservation has been reset corresponding to a modification of data within said first cacheable memory location by said external device; comparing a present data value stored within said first cacheable memory location to said buffer flag busy indicator data value in response to an access by said external device to said first cacheable memory location; stalling execution of said LDRL instruction until a determination that said load/store operation reservation associated with said first cacheable memory location has been reset with a “not busy” indicator data value being stored in said first cacheable memory location by said external device; and storing additional data in said data buffer by said processor in response to said “not busy” indicator data value being stored within said first cacheable memory location by said external device.