Patent ID: 8736311

Claim:
A semiconductor integrated circuit comprising: a first transistor of a first conductivity type including a source connected to a first power supply node that supplies a first voltage, a gate, and a drain, the gate and drain being connected to a first node; a second transistor of the first conductivity type including a source connected to the first power supply node, a drain connected to a signal output node, and a gate connected to the first node; a third transistor of a second conductivity type including a drain connected to the drain of the first transistor, and a gate provided with either a first external input signal with a variable voltage level, or a second external input signal with a fixed level; a fourth transistor of the second conductivity type including a drain connected to the drain of the second transistor, a source connected to a source of the third transistor, and a gate provided with either the first external input signal or the second external input signal, the signal provided to the gate of the fourth transistor being a signal other than a signal provided to the gate of the third transistor; a first constant current source circuit including one end connected to a second node as sources of the third and fourth transistors, and the other end connected to a second power supply node that supplies a second voltage different from the first voltage; and a charge/discharge accelerating circuit connected to form a current path between the first node and the second power supply node, and configured to connect the first node and the second power supply node to accelerate charging or discharging of the first node when the first external input signal is switched from a first state to a second state, the charge/discharge accelerating circuit including: a fifth transistor of the first conductivity type, the fifth transistor being formed in the current path, and a gate thereof being connected to the signal output node; a capacitor having one end connected to a source of the fifth transistor and the other end provided with the first external input signal; and a sixth transistor of the second conductivity type connected to form a current path between a source of the fifth transistor and the second power supply node and having a gate provided with a first control signal, the first control signal being generated based on an output signal from the signal output node.