Patent ID: 8739008

Claim:
A method for determining a parity check matrix utilized in a flash memory system, wherein the flash memory system reads data from a flash memory and decodes the data with the parity check matrix, and the parity check matrix defines a low-density parity check code and comprises M×N blocks, M being a number of blocks of a column in the parity check matrix and N being a number of blocks of a row in the parity check matrix, the method comprises: generating a first set of candidate blocks as candidates of a first set of blocks of the M×N blocks; calculating a plurality of first estimated results corresponding to the first set of candidate blocks; determining content of at least a first block of the M×N blocks according to a best result of the first estimated results; generating a second set of candidate blocks as candidates of a second set of blocks of the M×N blocks; calculating a plurality of second estimated results corresponding to the second set of candidate blocks by considering the content of the first block; determining content of a second block of the M×N blocks according to the second estimated results.