Patent ID: 7286386

Claim:
A semiconductor device comprising: a wiring substrate including a plurality of bonding leads; a memory chip mounted over said wiring substrate, said memory chip having a plurality of first bonding pads; a microcomputer chip mounted over said memory chip, said microcomputer chip having a plurality of second bonding pads, an address output circuit for memory access, a data input/output circuit for memory access and a signal processing circuit having a data processing function, a plurality of first wires electrically connecting said plurality of first bonding pads of said memory chip with a first predetermined group of said bonding leads of said wiring substrate; a plurality of second wires electrically connecting said plurality of second bonding pads of said microcomputer chip with a second predetermined group of said bonding leads of said wiring substrate; and a resin body sealing said memory chip, said microcomputer chip, said plurality of first wires and said plurality of second wires; wherein said first and second predetermined groups of bonding leads, said plurality of first bonding pads, and said plurality of second bonding pads are arranged along corresponding first sides of said wiring substrate, said memory chip, and said microcomputer chip, wherein said plurality of first bonding pads of said memory chip are exposed from said microcomputer chip, and wherein said first and second predetermined groups of bonding leads include bonding leads of substantially rectangular configuration with longer sides arranged at acute angles with respect to the first side of said wiring substrate.