Patent ID: 7770179

Claim:
A method for multithread processing of messages using an integrated circuit, comprising: configuring configurable logic of said integrated circuit to have a plurality of thread circuits and an interconnection topology amongst said plurality of thread circuits, each of said plurality of thread circuits comprising a state machine and providing a control signal to each other of said plurality of thread circuits through said interconnection topology; concurrently processing messages using said plurality of thread circuits; controlling operation of at least one thread circuit of said plurality of thread circuits in accordance with control data of a respective control signal from at least one other thread circuit of said plurality of thread circuits over said interconnection topology by at least one of activating, deactivating, or suspending said at least one thread circuit in response to said control data, wherein said control data comprises status data associated with said at least one other thread circuit of said plurality of thread circuits; and communicating data from a first thread circuit of said plurality of thread circuits to a second thread circuit of said plurality of thread circuits through said interconnection topology.