Patent ID: 7884396

Claim:
A semiconductor structure comprising: a semiconductor substrate; a first transistor comprising a first gate electrode on said semiconductor substrate and a first sidewall spacer adjacent to said first gate electrode; a second transistor adjacent to said first transistor and comprising a second gate electrode on said substrate and a second sidewall spacer on said second gate electrode, wherein said first sidewall spacer and said second sidewall spacer are separated by a space; and a contact comprising: a self-aligned lower portion extending laterally from said first sidewall spacer to said second sidewall spacer and filling said space such that side edges of said self-aligned lower portion contact and follow contours of said first sidewall spacer and said second sidewall spacer; and an upper portion on said lower portion, wherein said self-aligned lower portion comprises a top surface that is adjacent to said upper portion and that is further approximately level with top surfaces of said first gate electrode and said second gate electrode.