Patent ID: 7732840

Claim:
A semiconductor device comprising at least two inverter circuits, the inverter circuits each including a second-conductivity-type transistor in which a source and drain are formed by a second-conductivity-type diffusion layer formed on a first-conductivity-type semiconductor layer, and a gate is formed on the first-conductivity-type semiconductor layer sandwiched between the second-conductivity-type diffusion layers through an insulating film, and a first-conductivity-type transistor in which a source and drain are formed by a first-conductivity-type diffusion layer formed on a second-conductivity-type semiconductor layer, and a gate is formed on the second-conductivity-type semiconductor layer sandwiched between the first-conductivity-type diffusion layers through an insulating film, wherein the second-conductivity-type diffusion layer for configuring a single second-conductivity-type transistor is divided into a plurality of second regions, each of the plurality of second regions being separated by a trench isolation region formed on the first-conductivity-type semiconductor layer, the trench isolation region penetrating the second-conductivity-type diffusion layer to reach the first-conductivity-type semiconductor layer, and the first-conductivity-type diffusion layer for configuring a single first-conductivity-type transistor is divided into a plurality of first regions, each of the plurality of first regions being separated by a trench isolation region formed on the second-conductivity-type semiconductor layer, the trench isolation region penetrating the first-conductivity-type diffusion layer to reach the second-conductivity-type semiconductor layer.