Patent ID: 7112852

Claim:
An electrostatic protection device provided between an input/output terminal and an internal circuit of a semiconductor device, comprising: a first metal oxide semiconductor field effect transistor (MOS transistor); and a second MOS transistor connected mutually in parallel between an input/output wiring connected to said input/output terminal and an electrode wiring of a prescribed voltage such that a back gate of said first MOS transistor and a back gate of said second MOS transistor are mutually interconnected through a resistance to said electrode wiring and a source and a gate of said first MOS transistor and a source of said second MOS transistor are connected to said electrode wiring without intervention of said resistance, wherein said first MOS transistor and said second MOS transistor comprise MOS transistors of the same channel type, said second MOS transistor has a higher drive capability than said first MOS transistor, and the electrostatic protection device is formed such that its operation is triggered by said first MOS transistor, wherein a sum of a resistance per unit channel width during operation of said first MOS transistor under application of an excessive input voltage to said input/output terminal and an additional resistance which is in series with said first MOS transistor is larger than a sum of a resistance per unit channel width during operation of said second MOS transistor and an additional resistance which is in series with said second MOS transistor.