Patent ID: 7429786

Claim:
A semiconductor package assembly, comprising at least one die mounted upon and electrically connected to, a die attach side of a first package assembly substrate, and comprising a second substrate mounted over the first package die, the side of the first package substrate opposite the die attach side being a land side of the substrate, the second substrate having a first side facing the die attach side of the first package substrate, and a second side, being the land side, facing away from the die attach side of the first package substrate, so that the land sides of the substrates face away from one another, wherein z-interconnection between the first package substrate and the second substrate is by wire bonds between wire bond sites in a marginal area on the land side of the first package substrate and peripherally located wire bond sites in a marginal area on the first side of the second substrate and connecting the first package assembly substrate and the second substrate, and wherein the package is encapsulated so that both at least a portion of the second substrate at one side of the package and at least a portion of the first package substrate at an opposite side of the assembly are exposed.