Patent ID: 8507991

Claim:
A semiconductor, comprising: a semiconductor substrate having a first region and a second region, wherein the first region and the second region are isolated from each other by an isolation region; a first gate stack formed on the first region, and a second gate stack formed on the second region; and a source region and a drain region belonging to the first region and the second region, respectively; wherein the first gate stack comprises: a first high-k interface layer on the semiconductor substrate in the first region; a first high-k gate dielectric layer on the first high-k interface layer; and a first metal gate layer on the first high-k gate dielectric layer; the second gate stack comprises: a second high-k interface layer on the semiconductor substrate in the second region; a second high-k gate dielectric layer on the second high-k interface layer; and a second metal gate layer on the second high-k gate dielectric layer; and the material of the first and second high-k interface layers comprises elements of the material of the substrate, and dielectric constants of the first and second high-k gate dielectric layers are higher than those of the first and second high-k interface layers, respectively.