Patent ID: 8546949

Claim:
A semiconductor device comprising: an interlayer insulating film formed over a semiconductor substrate, the interlayer insulating film being made of a single material from a bottom surface thereof to an upper surface thereof; a wiring trench formed in the interlayer insulating film, the wiring trench having a bottom in the interlayer insulating film, and extending in a first direction; a via hole formed from the bottom of the wiring trench and reaching the bottom surface of the interlayer insulating film; a barrier metal film covering inner surfaces of the wiring trench and the via hole; and a wiring formed on the barrier metal film, and filling an inside of the wiring trench and the via hole, wherein the bottom of the wiring trench includes a bottom plane parallel to the upper surface of the interlayer insulating film and an inclined plane disposed between the bottom plane and a sidewall of the via hole, and a length of a first portion of the inclined plane having an inclination angle range of 40° to 50° relative to a surface of the semiconductor substrate in a cross section which is parallel to the first direction of the wiring trench, passes a center of the via hole and perpendicular to the surface of the semiconductor surface, is equal to or shorter than a maximum size of the via hole in plan view, and wherein the upper surface of the interlayer insulating film is located at a level higher than the bottom plane of the wiring trench.