Patent ID: 8198676

Claim:
A p-channel silicon carbide MOSFET comprising: a silicon carbide semiconductor substrate; a high-concentration p-type layer containing silicon carbide semiconductor provided on one principal surface of the silicon carbide semiconductor substrate; a low-concentration p-type base layer containing silicon carbide semiconductor provided on the high-concentration p-type layer; an n-type base layer containing silicon carbide semiconductor provided on the low-concentration p-type base layer; p-type source regions selectively formed on a surface layer of the n-type base layer; first trenches extending from the p-type source regions, passing through the n-type base layer and reaching the p-type base layer; control electrodes packed through gate insulating films on surfaces of the p-type base layer exposed from inner surfaces of the first trenches; second trenches extending from the surface of the n-type base layer, passing through the n-type base layer and reaching the p-type base layer; source electrodes in contact with inner surfaces of the second trenches while being in contact with the n-type base layer and the p-type source layer as contact regions located in the substrate surface around opening portions of the second trenches; and a drain electrode in contact with the other principal surface of the silicon carbide semiconductor substrate, wherein a plane pattern of the first trenches has a wide-interval first trench pattern portion where the second trench and the contact region are disposed between the first trenches, and a narrow-interval first trench pattern portion where the second trench and the contact region are not disposed between the first trenches; wherein each second trench has a depth not smaller than each first trench; wherein a distance between center lines of the first trench and the second trench is not larger than 10 μm; wherein each of the source electrodes has a Schottky junction between the source electrode and a surface of the p-type base layer in a bottom portion of the second trench; wherein third trenches are provided so as to extend from the other principal surface of the silicon carbide semiconductor substrate and reach the high-concentration p-type layer; and wherein the drain electrode is in contact with p-type layer surface-containing inner surfaces of bottom portions of the third trenches.