Patent ID: 8519451

Claim:
A semiconductor device comprising: a first source region having p-type conductivity; a first drain region having p-type conductivity; a first channel region provided between the first source region and the first drain region and having n-type conductivity; a first lower gate insulating film provided on the first channel region; a first lower gate electrode provided on the first lower gate insulating film; a first upper gate insulating film provided on the first lower gate electrode; a first upper gate electrode provided on the first upper gate insulating film; a first switching element directly connected between the first lower gate electrode and the first source region; a second source region having n-type conductivity; a second drain region connected to the first drain region and having n-type conductivity; a second channel region provided between the second source region and the second drain region and having p-type conductivity; a second lower gate insulating film provided on the second channel region; a second lower gate electrode provided on the second lower gate insulating film; a second upper gate insulating film provided on the second lower gate electrode; a second upper gate electrode provided on the second upper gate insulating film; and a second switching element directly connected between the second lower gate electrode and the second source region.