Patent ID: 7432581

Claim:
A semiconductor device comprising: a plurality of MIS transistors located in a semiconductor layer provided on an insulating layer, said MIS transistors each including at least one gate electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a first conductivity type and a third semiconductor region of a second conductivity type which is opposite to a first conductivity type interposed between said first semiconductor region and said second semiconductor region, said first semiconductor and said second semiconductor regions being located on both sides of said gate electrode in a gate length direction and each reaching said insulating layer; and a first-element isolation insulating film located in said semiconductor layer and reaching said insulating layer, wherein said first element isolation insulating film abuts on said first semiconductor region and said second semiconductor region and isolates MIS transistors of the same conductivity type from one another; said semiconductor device further comprising, a second element isolation insulating film located in said semiconductor layer, and a fourth semiconductor region of a second conductivity type being provided between said second element isolation insulating film and said insulating layer.