Patent ID: 7836422

Claim:
A method for routing wires in an integrated circuit design comprising: using a computer for: selecting a first routing channel from a plurality of routing channels in a first conductive layer of a plurality of conductive layers of the integrated circuit, wherein the selected routing channel includes a Vss wire on a first edge and a Vdd wire on an opposite edge; and determining a wire routing for the selected routing channel including: defining an even number n of initial width routing tracks in a selected routing channel, wherein each of the n initial width routing tracks have a first pitch, wherein the first pitch includes each of the n initial width routing tracks is separated by a substantially equal first separation distance from the other routing tracks, Vss and Vdd in the routing channel, wherein each of the n initial width routing tracks and the substantially equal first separation distance have an initial width about equal to the minimum design width allowed by a manufacturing process used to form the integrated circuit; selecting an odd number of routing tracks less than n, wherein the odd number of routing tracks have a second pitch that is greater than the first pitch; assigning the odd number of routing tracks in the routing channel; analyzing a routing requirement for the routing channel; and defining a third routing pitch wider than the second routing pitch for alternating routing tracks of the odd number of routing tracks when the routing channel requires a routing pitch wider than the second pitch.