Patent ID: 7615409

Claim:
A method of assembling a semiconductor package assembly, comprising the steps of: (a) forming a first integrated circuit assembly by the steps of: i) defining a plurality of contact pads on a first surface of a substrate, ii) mounting two or more semiconductor die on the first surface of the substrate; (b) affixing a plurality of electrical connectors to the plurality of contact pads, a first portion of the electrical connectors connected to the contact pads and a second portion of the electrical connectors spaced from the contact pads; (c) encapsulating the first integrated circuit assembly and plurality of electrical connectors in a mold compound; (d) grinding a surface of the mold compound so that surfaces of the second portions of the electrical connectors are exposed through the surface, said grinding step not impacting the two or more semiconductor die mounted on the substrate; (e) forming a second integrated circuit assembly including a substrate having a surface on which one or more semiconductor die mounted and on which a plurality of contact pads are defined; (f) encapsulating the second integrated circuit in a mold compound; (g) affixing the first and second encapsulated integrated circuits to each other with the exposed surfaces of the second portions of the electrical connectors being electrically coupled to a plurality of contact pads on the second integrated circuit.