Patent ID: 8871586

Claim:
A method, comprising: forming a plurality of isolation structures comprised of silicon dioxide in a semiconducting substrate, said isolation structures defining first and second active regions where first and second transistor devices, respectively, will be formed; forming a hard mask layer on a surface of said substrate above said first and second active regions and above at least one isolation structures, said hard mask layer comprising at least one of carbon, fluorine, xenon or germanium ions such that the hard mask layer exhibits an etch rate that is greater than said silicon dioxide when exposed to an etch process designed to remove a portion of said silicon dioxide; performing a first etching process to remove a portion of said hard mask layer and to thereby expose a surface of one of said first and second active regions; after performing said first etching process, forming a channel semiconductor material on said surface of said active region that was exposed by performing said first etching process; and after forming said channel semiconductor material, performing a second etching process to remove remaining portions of said hard mask layer that were not removed during said first etching process.