Patent ID: 7466250

Claim:
Analog digital conversion device receiving an analog signal at its input and outputting a digital signal at a required sampling frequency, said device comprising: a number N of analog digital converters distributed in N channels, each a-analog digital converter having a sampling frequency N times lower than the required sampling frequency, said analog digital converters having clock signals controlling their sampling frequency, offset in time from each other by one period of a signal at the required sampling frequency, the digital signal being built up from samples delivered to the output from each channel, said analog digital conversion device comprising a reference channel, said reference channel comprising an analog digital converter generating samples of the analog signal, each channel comprising an equalizer filter, said filter receiving a digital signal at its input output by the analog digital converter on the channel on which it is located and an error signal, said filter outputting a filtered digital signal s(n) corrected for errors deduced from the error signal, the error signal corresponding to the difference at a given time between firstly the digital signal corrected by the filter and secondly by the digital signal output by the analog digital converter of the reference channel, the coefficients of said filter being adjusted to present the response that best minimizes the error signal.