Patent ID: 8010875

Claim:
A method of detecting memory chip failure in a computer memory system, the memory system including a first set of user data memory chips and a second set of system data memory chips, the method comprising the steps of: accessing user data from the user data chips, testing the user data for errors using error detection data from the system data chips, including the steps of i) generating a sequence of check symbols from the user data, ii) grouping the user data into a sequence of data symbols, iii) computing a sequence of syndromes using said sequence of data symbols and said sequence of check symbols, iv) if all the syndromes are zero, identifying the user data as having no error, and v) if one of the syndromes is non-zero, then (1) computing a set of discriminator expressions, and (2) using said discriminator expressions to determine whether a single symbol error has occurred or a double symbol error has occurred.