Patent ID: 8378658

Claim:
A circuit having an input terminal and an output terminal comprising: a transistor having a gate, source, and drain, said drain of said transistor coupled to said input terminal and said source coupled to said output terminal; a gain element with a defined AC and DC response having an inverting input, a non-inverting input, and an output, wherein said output of said gain element is coupled to said gate of said transistor; and an optimized drop reference generating circuit having two replica transistors scaled in size against said transistor, wherein all three elements are connected to said gate and source, said reference generating circuit maintaining said pass element just within saturation; wherein drains of said replica transistors are connected to two separate current mirrors tied to a voltage higher than an input voltage of said pass element's drain, wherein said current mirrors are established inversely to a load and in conformance with a current/voltage drop characteristic coincident with operation in saturation at said load for a first replica device and in triode or on a parabolic knee for a second replica device, wherein a loop adjusts output voltage at said transistors sources until a drop across said pass element is optimized, said optimized drop recognized as a point just before an operating point of said two replica devices that can no longer be maintained or a voltage on a drain of said first replica device reaches said input voltage.