Patent ID: 7050521

Claim:
A receiver comprising: a variable controlled oscillator; an analog-to-digital converter to receive an analog pilot signal and convert the pilot signal to a digital signal, wherein a clock for said analog-to-digital converter is produced from an output of said variable controlled oscillator; a post filter to receive said digital signal and apply a Fourier transform to successive data frames of said digital signal to produce successive phase outputs, said post filter using the successive phase outputs to determine a frequency offset between the frequency of the variable controlled oscillator and a frequency of an oscillator at a transmitter, said post filter shifting the digital signal in time before applying the Fourier transform so as to produce a shift in the phase outputs; and a loop filter to produce an output that controls the frequency of said variable controlled oscillator output, wherein said loop filter has a preload register such that said loop filter output depends on a value loaded into said preload register when the input to said loop filter is held at zero, said value loaded into the preload register being based on the determined frequency offset; said loop filter, based upon said value loaded into the preload register, changing a frequency of the output of said variable controlled oscillator to substantially eliminate the frequency offset; said post filter, subsequent to and independent of the elimination of the frequency offset, determining a phase offset from a phase output and a known phase and shifting the digital signal in time before applying the Fourier transform so as to produce a shift in the phase outputs, thereby substantially eliminating the phase offset subsequent to and independent of the elimination of the frequency offset.