Patent ID: 8759185

Claim:
A method of making a MOSFET, which comprises: forming a high-k gate dielectric layer on a semiconductor substrate and a conductive layer on the dielectric layer; patterning the layers to form a gate having a gate electrode atop the gate dielectric, the footprint of the gate dielectric being larger than the footprint of the gate electrode so that the gate dielectric protrudes beyond the gate electrode; forming a first spacer on sides of the gate, on a free surface of the protruding gate dielectric and on the substrate to a selected distance away from the gate, and then etching portions of the substrate not covered by the spacer to form first deep recesses in the substrate; forming a deep source and a deep drain in respective first recesses by selective in-situ doped epitaxy; removing the first spacer and forming a second spacer on respective sides of the gate and on the free surface of the protruding gate dielectric; etching free surfaces of the source, the drain and the substrate and an upper surface of the substrate beneath the gate dielectric to produce second shallow recesses therein; and forming shallow source and drain extensions in respective second recesses by selective in-situ doped epitaxy so that termini of the shallow extensions lie beneath and in contact with the gate dielectric.