Patent ID: 7149242

Claim:
A system comprising: a driver device adapted to transmit a data signal, the data signal having transmission rates at least as high as 44.736 Mbps; a communications link coupled to the driver device and the receiver device, the data signal being susceptible to distortions of phase and amplitude during transmission across the communications link, the communications link being at least 18,000 feet long; and a receiver system adapted to receive, regenerate and transmit the data signal, the receiver system including: a receiver device adapted to receive the data signal from the communications link, and a processor electrically coupled to the receiver device and adapted to receive the distorted data signal from the receiver device, regenerate the data signal to compensate for effects of the communications link on the data signal, and output the regenerated data signal, wherein the processor includes: (a) a decoding mechanism configured to: (i) produce a corrected data signal from the data signal, (ii) split the corrected data signal into component data signals, (iii) generate a data clock reference signal based on the data signal and a clock reference signal substantially matching a transmission rate of the received distorted data signal, and (iv) convert said component data signals into digital component data signals synchronized to said data clock reference signal, and (b) an encoding mechanism configured to: (i) receive said digital component data signals synchronized to said data clock reference signal; (ii) convert said synchronized digital component data signals as output signals; and (iii) transmit at least one of the output signals as the regenerated data signal.