Patent ID: 7332370

Claim:
A method of manufacturing a phase change RAM device, the method comprising the steps of: i) forming a plurality of metal pads on a semiconductor substrate; ii) forming an oxide layer on the semiconductor substrate covering the metal pads formed on the semiconductor substrate; iii) forming a plurality of nano-sized copolymer patterns, each having diblock copolymer, on the oxide layer such that each nano-sized copolymer pattern is aligned above one of the metal pads; iv) etching the oxide layer by using the nano-sized copolymer patterns as an etching barrier thus forming a plurality of oxide layer patterns; v) removing the nano-sized copolymer patterns; vi) depositing a nitride layer on the resultant semiconductor substrate covering the metal pads and the oxide layer patterns; vii) etching the nitride layer exposing at least the top surface of each of the oxide layer patterns; viii) removing the oxide layer patterns to form a plurality of nano-sized holes exposing the metal pads through the nano-sized holes; ix) filling the nano-sized holes with a conductive material to form a plurality of nano-sized plug type bottom electrodes; and x) forming a phase change layer on each of the plug type bottom electrodes and a top electrode on the phase change layer.