Patent ID: 7777737

Claim:
An active matrix type liquid crystal display device configured to display images as a series of frames and configured to operate under a normal display mode and a partial display mode, comprising: a plurality of pixels arranged in a matrix form comprising rows and columns; a pixel electrode disposed in each of the pixels; a common electrode; a liquid crystal layer disposed between the common electrode and the pixel electrodes; a switching device disposed in each of the pixels, receiving a gate signal and connected with a corresponding pixel electrode; a vertical drive circuit outputting the gate signals to the switching devices based on a vertical clock; a first auxiliary capacitor line and a second auxiliary capacitor line that are disposed along each row of the matrix; an auxiliary capacitor line inversion drive circuit that performs an inversion drive to invert electric potentials at the first and second auxiliary capacitor lines at a predetermined interval so that the electric potentials at the first and second auxiliary capacitor lines are opposite in phase to each other; a plurality of first auxiliary capacitors connected with the first auxiliary capacitor line and a plurality of second auxiliary capacitors connected with the second auxiliary capacitor line, each of the pixel electrodes being connected with one of the first auxiliary capacitors or one of the second auxiliary capacitors; and a horizontal drive circuit that under the partial display mode provides each of pixels selected according to a partial display area control signal with an image signal that is supplied to a corresponding pixel electrode through a corresponding switching device, wherein under the partial display mode the auxiliary capacitor line inversion drive circuit is configured to perform the inversion drive for the selected pixels and halt the inversion drive for pixels not selected by the partial display area control signal over two or more consecutive frames, and each of the pixels includes a first auxiliary capacitor or a second auxiliary capacitor and does not include both of the first and second auxiliary capacitors.