Patent ID: 7852751

Claim:
An apparatus comprising: one or more processors; a network interface communicatively coupled to the one or more processors and configured to communicate one or more packet flows among the one or more processors in a network; memory coupled to the processors and comprising a forwarding information base (FIB) for a routing protocol; logic operable in a network as a network node and coupled to the one or more processors and comprising one or more stored sequences of instructions which, when executed by the one or more processors, cause the one or more processors to perform: while each node and each link in the network are operational: initiating a not-via approach for creating and storing repair path information for a first link between a first network node and a second network node; creating and storing a list of not-via-first-link-repair-path-network nodes that form a not-via-first-link-repair path from the first network node to the second network node; wherein the not-via-first-link-repair path traverses the not-via-first-link-repair-path-network nodes; wherein the not-via-first-link-repair path does not traverse the first link between the first network node and the second network node; creating and storing entries in the FIB identifying repair addresses for network nodes and that cause (a) packets directed to all addresses normally reachable through the first link to be encapsulated to the second node not via the first node, (b) packets directed to a not-via address that is normally reachable through the first link to be encapsulated to the second node not via the first node, and (c) dropping packets directed to the not-via address that is normally reachable through the first link when the not-via address is in the list; repeating the initiating, creating and storing the list and creating and storing entries for all other links of the network node.