Patent ID: 7303962

Claim:
A method of forming a complementary metal-oxide-semiconductor (CMOS) device, comprising: providing a substrate having a first active region and a second active region, wherein the first active region and die second active region are isolated from each other through an isolation structure; forming a first type of metal-oxide-semiconductor (MOS) transistor and a second type of MOS transistor on the first active region and die second active region of the substrate respectively; forming a first etching stop layer over the substrate to cover conformably the first type of MOS transistor, the second type of MOS transistor and the isolation structure; forming a first stress layer over the first etching stop layer; performing a first curing process to the first stress layer; forming a second etching stop layer over the first stress layer; forming a first photoresist layer over the second etching stop layer in the first active region after the first curing process; removing a portion of the second etching stop layer and a portion of the first stress layer using the first photoresist layer as a mask to expose the first etching stop layer; removing the first photoresist layer; forming a second stress layer over the substrate to cover the first etchings stop layer and the second etching stop layer; performing a second curing process to the second stress layer; forming a second photoresist layer over the second stress layer in the second active region after the second curing process; removing a portion of the second stress layer using the second photoresist layer as a mask to expose the second etching stop layer; and removing the second photoresist layer and the second etching stop layer.