Patent ID: 8901721

Claim:
A semiconductor die package, comprising: a die pad; a first set of lead fingers that are spaced from and project outwardly from the die pad, wherein the lead fingers have proximal ends close to the die pad and distal ends spaced from the die pad; a second set of lead fingers that are spaced from and project outwardly from the die pad, wherein the second set of lead fingers have proximal ends close to the die pad and distal ends spaced from the die pad, a semiconductor die attached to the die pad, wherein bonding pads on the semiconductor die are selectively electrically coupled to the proximal ends of the first and second sets of lead fingers with bond wires; and an encapsulation material covering the bond wires, the semiconductor die and the proximal ends of the first and second sets of lead fingers, wherein the encapsulating material forms a housing with edges from which the first and second sets of lead fingers extend, the housing having an underside that has a least one slot formed therein and wherein the distal ends of the first set of lead fingers are located away from the housing and the distal ends of the second set of lead fingers are located at least partially in the slot.