Patent ID: 7338837

Claim:
A method of assembling an IC device; comprising the steps of: providing a chip having an active surface, central contact pads, and peripheral contact pads; depositing an interconnection element on at least some of said chip contact pads; providing a first package part having a cavity and I/O terminals on its top surface and its bottom surface; mounting said chip into said cavity; providing a second package part having on its bottom surface a first plurality of I/O terminals aligned with said peripheral chip contact pads, and a second plurality of I/O terminals aligned with said top surface I/O terminals of said first package part; connecting said first plurality of I/O terminals of said second package part to said peripheral contact pads on said active chip surface; connecting said top surface I/O terminals of said first package part with said second plurality of I/O terminal of said second package part; and wherein said second package part comprises an opening sized to expose said central chip contact pads, and the top surface having I/O terminals distributed around said opening.