Patent ID: 6903420

Claim:
Silicon-on-insulator comprising integrated circuitry, comprising: a substrate comprising a semiconductive silicon-comprising layer of silicon-on-insulator circuitry, the semiconductive silicon-comprising layer comprising a pair of source/drain regions formed therein and a channel region formed therein which is received intermediate the source/drain regions; a transistor gate received operably proximate the channel region; and an insulator layer of the silicon-on-insulator circuitry received on the semiconductive silicon-comprising layer, the insulator layer comprising a first silicon dioxide-comprising region in contact with the semiconductive silicon-comprising layer and running along at least a portion of the channel region between the source/drain regions, a silicon nitride-comprising region in contact with the first silicon dioxide-comprising region and running along only a portion of the channel region, and a second silicon dioxide-comprising region in contact with the silicon nitride-comprising region, the silicon nitride-comprising region being received intermediate the first and second silicon dioxide-comprising regions.