Patent ID: 7705462

Claim:
A semiconductor integrated circuit device comprising: a semiconductor substrate having a main surface; a first insulating film formed over the main surface; an external terminal formed over the first insulating film and including aluminum as a main component; a first guard ring formed over the first insulating film and arranged as a frame in a plane along an outer periphery of the semiconductor substrate, the first guard ring is arranged such that it is nearer an outer peripheral edge of the semiconductor substrate, over the entirety of the frame, than are the external terminals, and being comprised of a same metal wiring layer as that of the external terminal; a passivation film formed over the first insulating film and over the first guard ring and having a first opening exposing the external terminal; a bonding wire or a bump electrode being in contact with the external terminal through the first opening; and wherein further guard rings are formed under the first guard ring and are comprised of the same level wiring layers in a plurality of wiring layers and are in contact with each other through second openings, the plurality of wiring layers are formed in interlayer insulating films and include copper as a main component.