Patent ID: 8085840

Claim:
An apparatus for processing a signal over a plurality of stages, the apparatus comprising a processor configured to: determine at least two equalizer taps based on at least one of a covariance and a channel impulse response of the signal; estimate at least one additional equalizer tap based on the at least two equalizer taps; and at each of the plurality of stages, reduce at least a portion of an interference of the signal using the at least one additional equalizer tap, wherein the at least two equalizer taps comprise an LMMSE equalizer tap and a matched equalizer tap, wherein the LMMSE equalizer tap is based on the covariance and the channel impulse response and wherein the matched equalizer tap is based on the channel impulse response, wherein the processor is configured to estimate the at least one additional equalizer tap by interpolating between the LMMSE equalizer tap and the matched equalizer tap to determine an interpolated equalizer tap corresponding to each of the plurality of stages, and wherein the processor is configured to reduce the at least a portion of the interference of the signal at each of the plurality of stages using the corresponding interpolated equalizer tap.