Patent ID: 6975189

Claim:
In the environment of a chip having a plurality of circuit elements, an on-chip multi-layer metal-shielded monolithic transmission line for connecting one of said plurality of circuit elements to another of said plurality of circuit elements, said on-chip multi-layer metal-shielded monolithic transmission line comprising: a plurality of parallel planar thin film conductive layers; and a plurality of planar thin film nonconductive separator layers disposed such that each adjacent pair of the conductive layers is separated by at least one of said plurality of planar thin film nonconductive layers to provide a stack of alternating conductive and nonconductive layers, wherein an initial one and a final one of said conductive layers provide a top conductive plane and a bottom conductive plane, wherein a center one of the conductive layers comprises three laterally spaced apart conductive strips, said conductive strips separated by nonconductive material such that two laterally spaced terminal strips of the three conductive strips are spaced at a selected width from the center conductive strip thereof, wherein each of the nonconductive separator layers include a plurality of vias between the two laterally spaced terminal conductive strips of the three conductive strips and the top and bottom conductive planes, said plurality of vias filled with conductive material.