Patent ID: 6917656

Claim:
A communications network comprising: a plurality of network nodes, each node including a synchronization circuit for generating a global clock signal from a local clock signal (LT) formed by a clock generator in dependence on a time of reception of a message; a divider arrangement included in the synchronization circuit, for dividing the local clock signal in dependence on at least one divider factor produced by a scaler arrangement, and a correction term (KT), and a comparator circuit for forming the correction term by comparing the time of reception of a message and of the local clock signal LT wherein the synchronization circuit further comprises a divider control, which is provided for changing at least one divider factor when the correction term (KT) exceeds a predefined first threshold and wherein the divider control includes a control unit which is provided for applying a control signal to a divider factor generator, for changing the divider factors when the control signal occurs included in the divider control when the correction term exceeds the predefined first threshold.