Patent ID: 8705667

Claim:
A circuit for demodulating an RF signal to baseband comprising: a sampling clock generator configured to generate an in-phase sampling clock, having an in-phase sampling clock frequency, and a quadrature sampling clock, having a quadrature sampling clock frequency; a quadrature bandpass-sampling analog-to-digital demodulator (QBS-ADD), configured to receive an RF signal, having an RF carrier frequency, quantize the RF signal based on the in-phase sampling clock to generate an in-phase digital signal, and quantize the RF signal based on the quadrature sampling clock to generate a quadrature digital signal; a code generator configured to generate first through P th coefficients, each having M bits of accuracy; a rake processor configured to receive first through P th coefficients based on the in-phase digital signal to generate an in-phase rake signal; receive first through P th coefficients based on the quadrature digital signal to generate a quadrature rake signal; wherein both the in-phase sampling clock frequency and the quadrature sampling clock frequency being equal to the RF carrier frequency, the quadrature sampling clock being ninety degree out of phase with respect to the in-phase sampling clock, both the in-phase rake signal and the quadrature rake signal having M bits of accuracy, both the in-phase digital signal and the quadrature digital signal being bi-level digital signals, P is a positive integer, and M is a positive integer.