Patent ID: 7855671

Claim:
An analog to digital converter, comprising: an input unit to receive a variable analog input signal and to produce a constant analog signal; a first pipeline stage to receive the constant analog signal and to produce a first digital output number and a first analog remainder signal; at least one subsequent pipeline stage to receive the first analog remainder signal and to produce a second digital output number and a second analog remainder; a summing unit to sum the first and second digital output numbers to generate a digital output signal; and a bias current generation unit, comprising: a constant bias current generator, separately coupled to said input unit and each pipeline stage, to generate a constant current; a variable bias current generator, separately coupled to said input unit and each pipeline stage, to generate a variable current that is related to the selectable data rate; and and a reference current generator, coupled to the constant bias current generator and the variable bias current generator, for generating a reference current.