Patent ID: 7435634

Claim:
A method of forming a semiconductor device, the method comprising: forming an interlayer insulating layer on a semiconductor substrate, wherein the interlayer insulating layer has a contact hole therein exposing a portion of the semiconductor substrate; forming a single crystal semiconductor plug in the contact hole and on portions of the interlayer insulating layer adjacent the contact hole opposite the semiconductor substrate, wherein portions of the interlayer insulating layer opposite the semiconductor substrate are free of the single crystal semiconductor plug; removing portions of the single crystal semiconductor plug in the contact hole while maintaining portions of the single crystal semiconductor plug on portions of the interlayer insulating layer adjacent the contact hole as a single crystal semiconductor contact pattern; after removing portions of the single crystal semiconductor plug, forming a single crystal semiconductor layer on the interlayer insulating layer and on the single crystal semiconductor contact pattern; forming a second interlayer insulating layer on the single crystal semiconductor layer; forming a common contact hole through the second interlayer insulating layer, through the single crystal semiconductor layer, and through the first interlayer insulating layer to expose a portion of the semiconductor substrate; and forming a conductive contact plug in the common contact hole in contact with the semiconductor substrate.