Patent ID: 8617942

Claim:
A method of producing a transistor comprising: providing a substrate including in order a first electrically conductive material layer; depositing a resist material layer over the first electrically conductive material layer; patterning the resist material layer to expose a portion of the first electrically conductive material layer; removing some of the first electrically conductive material layer to create a reentrant profile on opposing sides of the first electrically conductive material layer to form a gate and to expose a portion of the substrate; and conformally coating the first electrically conductive material layer, and at least a portion of the substrate with an electrically insulating material layer, the electrically insulating material layer conforming to the reentrant profile of the first electrically conductive material layer and having a uniform thickness at least in the region where the reentrant profile and the gate are located; conformally coating the electrically insulating material layer with a semiconductor material layer; and directionally and nonconformally depositing discontinuous portions of a second electrically conductive material layer to form discrete source and drain electrodes that are positioned on and in contact with different regions of the semiconductor material layer.