Patent ID: 8263448

Claim:
A method of manufacturing a thin film transistor, comprising: forming a silicon layer on a substrate; forming a gate insulating layer on the silicon layer and the substrate; forming a gate electrode on the gate insulating layer over the silicon layer; and implanting impurities into the silicon layer to define source and drain regions and to define a channel region under the gate electrode; forming a passivation layer on the gate electrode and the gate insulating layer; performing a first etch process to form first and second contact holes through the passivation layer, the gate insulating layer, and the silicon layer; performing a second etch process to widen the first and second contact holes at the passivation layer and the gate insulating layer by an amount greater than at the silicon layer; forming a source electrode in contact with the source region via the first contact hole; and forming a drain electrode in contact with the drain region via the second contact hole.