Patent ID: 7589548

Claim:
A packaged integrated circuit comprising: first and second chips having external pins that are accessible from outside the packaged integrated circuit; an electrical connection between the first and second chips, the electrical connection providing a communication pathway along which an internal signal propagates between the first chip and the second chip, the internal signal being inaccessible from an external pin on a package that includes the first and second chips; and a probe configured to measure the internal signal, the probe comprising: a first conductive portion connected to the communication pathway; a second conductive portion configured to be attached to testing equipment; and a resistive component coupled to the first and second conductive portions, the resistive component having an impedance to: substantially isolate a load of the testing equipment from the electrical connection during testing, the load being communicatively coupled to the test probe; and substantially isolate signals propagating through the second conductive portion of the test probe.