Patent ID: 7619503

Claim:
A power semiconductor apparatus comprising: a first power controlling semiconductor module for driving a first power semiconductor device; and a second power controlling semiconductor module for driving a second power semiconductor device, wherein the first and second power controlling semiconductor modules are connected to each other in parallel, wherein the first power controlling semiconductor module comprises: a first detection protector circuit for generating a first protection alarm signal for protecting the first power semiconductor device; a first error signal generator circuit; and a first error signal communication circuit, wherein the second power controlling semiconductor module comprises: a second detection protector circuit for generating a second protection alarm signal for protecting the second power semiconductor device; a second error signal generator circuit; and a second error signal communication circuit, wherein, when the first detection protector circuit generates the first protection alarm signal, the first error signal generator circuit generates a first error signal based on the first protection alarm signal to stop driving the first power semiconductor device, generates a second error signal, and outputs the second error signal to the first error signal communication circuit; the first error signal communication circuit transmits a first communication error signal to the second error signal communication circuit based on the second error signal; the second error signal communication circuit receives the first communication error signal, generates a third error signal based on the first communication error signal, and outputs the third error signal to the second error signal generator circuit; and the second error signal generator circuit generates a fourth error signal based on the third error signal to stop an operation for driving the second power semiconductor device, and wherein, when the second detection protector circuit generates the second protection alarm signal, the second error signal generator circuit generates the fourth error signal based on the second protection alarm signal to stop driving the second power semiconductor device, generates a fifth error signal, and outputs the fifth error signal to the second error signal communication circuit; the second error signal communication circuit transmits a second communication error signal to the first error signal communication circuit based on the fifth error signal; the first error signal communication circuit receives the second communication error signal, generates a sixth error signal based on the second communication error signal, and outputs the sixth error signal to the first error signal generator circuit; and the first error signal generator circuit generates a seventh error signal based on the sixth error signal to stop an operation for driving the first power semiconductor device.