Patent ID: 7737798

Claim:
A system for generating clock pulses, the system comprising: a phase/frequency control circuit, wherein the phase frequency control circuit provides a feedback control; a defined current path, wherein the defined current path includes a first diode connected transistor; a multi-range selector circuit including a plurality of current paths in parallel with the defined current path, wherein selection of a subset of the plurality of current paths is based at least in part on the feedback control, wherein selection of a first subset of the plurality of current paths yields a control output exhibiting a first current corresponding to a first frequency range, wherein selection of a second subset of the plurality of current paths yields the control output exhibiting a second current corresponding to a second frequency range, wherein the first frequency range differs from the second frequency range, and wherein the multi-range selector circuit has at least one other transistor selectably configurable to be a second diode connected transistor in parallel with the first diode connected transistor; a controlled oscillator, wherein the controlled oscillator provides an output with a phase and frequency at least in part governed by the control output; and wherein the system for generating clock pulses is capable of locking to a frequency within the first frequency range when the control output exhibits the first current, and wherein the system for generating clock pulses is capable of locking to a frequency within the second frequency range when the control output exhibits the second current.