Patent ID: 7187313

Claim:
A frequency synthesizer, comprising: a phase detector, coupled to a reference signal and a feedback signal, for generating a phase difference signal representing a phase difference between the reference signal and the feedback signal; a loop filter, coupled to the phase detector, for filtering the phase difference signal and generating a control voltage; a controllable oscillator, coupled to the loop filter, for generating an output signal according to the control voltage; a frequency divider, coupled to the controllable oscillator and the phase detector, for dividing the frequency of the output signal according to a division factor to generate the feedback signal; and a sigma-delta modulator, coupled to the frequency divider, for providing the division factor according to an integral part and a fractional part, the sigma-delta modulator comprising: a controller for providing a first digital value, a second digital value and a third digital value, wherein the first digital value represents the integral part, the second digital value represents a first portion of the fractional part, and the third digital value represents a second portion of the fractional part; a first adder, coupled to the controller, for combining the second digital value, the third digital value, and a digital feedback value to generate a combination result; a low-pass filter, coupled to the first adder, for outputting a filtering result according to the combination result; a quantizer, coupled to the low-pass filter, for quantizing the filtering result to generate a quantization value; a second adder, coupled to the quantizer, for combining the first digital value and the quantization value to generate the division factor; and a multiplier, coupled to the first adder and the quantizer, for multiplying the quantization value by a constant multiplication factor; wherein the controller adjusts the third digital value in response to the reference signal for making an output frequency resolution substantially fixed.