Patent ID: 8847318

Claim:
A device comprising: a substrate defined with a device region, the device region comprises an ESD protection circuit having at least first and second transistors, wherein each of the transistors includes a gate having first and second sides, a first diffusion region in the device region adjacent to the first side of the gate, a second diffusion region in the device region displaced away from the second side of the gate, the second diffusion region is disposed between adjacent second sides of the gates of the first and second transistors, wherein the first and second diffusion regions comprise dopants of a first polarity type, and a drift isolation region disposed between the gate and the second diffusion region; a first device well encompasses the device region; a drift well which encompasses the second diffusion region, wherein edges of the drift well do not extend below the second sides of the gates of the first and second transistors and is displaced away from channels of the transistors, the drift well comprises first polarity type dopants; and a drain well having dopants of the first polarity type is disposed under the second diffusion region and disposed completely within the drift well.