Patent ID: 8441302

Claim:
A circuit, comprising: a first part and a second part, the first part comprising at least one transistor pair with common emitters, said transistor pair each comprising a first transistor and a second transistor, the first part further comprising a further transistor, wherein all emitters in the first part are connected to a first input connection, wherein the collectors of each first transistor and the further transistor in the first part are connected to a first output connection, wherein the second part comprises at least one transistor pair with common emitters, said transistor pair each comprising a first transistor and a second transistor, the second part further comprising a further transistor, wherein all emitters in the second part are connected to a second input connection, wherein the collectors of each second transistor and the further transistor in the second part are connected to a second output connection, wherein furthermore the base of the first transistor in each transistor pair in the first part and the base of the second transistor in each transistor pair in the second part are connected, respectively, and the base of the second transistor in each transistor pair in the first part and the base of the first transistor in each transistor pair in the second part are connected, respectively, and wherein the bases of the further transistors are connected, wherein the transistor pairs are connected such that they are arranged to be fed with at least one input signal, and such that they are arranged to output at least two currents, and wherein at least two transistors are arranged to be biased in such a way that desired signal paths are obtained in the circuit, such that a desired output current ratio is obtained.