Patent ID: 7813162

Claim:
A static random access memory (SRAM) cell structure comprising: a pair of pull-up p-type field effect transistors (PFETs); a pair of pull-down n-type field effect transistors (NFETs), wherein each pull-down NFET comprises: a pull-down NFET drain region electrically connected to a pull-up PFET drain region of one of said pull-up PFETs; a pull-down NFET body region laterally adjacent said pull-down NFET drain region; a pull-down NFET halo region laterally adjacent said pull-down NFET body region and disjoined from said pull-down NFET drain region; and a pull-down NFET source region laterally adjacent said pull-down NFET halo region, wherein said pull-down NFET halo region and said pull-down NFET body region have a p-type doping, and wherein said pull-down NFET halo region has a higher dopant concentration than said pull-down NFET body region; and a pair of pass gate transistors, wherein each pass gate transistor is an n-type field effect transistor comprising a first source/drain region, a pass gate halo region abutting said first source/drain region, a body region abutting said pass gate halo region, and a second source/drain region abutting said body region and disjoined from said pass gate halo region, wherein said pass gate halo region and said body region have a p-type doping, wherein said pass gate halo region has a higher dopant concentration than said body region.