Patent ID: 7043709

Claim:
A method for determining a voltage at the output of a gate in an integrated circuit, comprising: receiving a design for the integrated circuit; locating a gate within the integrated circuit; and looking up in a library a set of output current waveforms for the gate assuming a given input slew, wherein each output current waveform specifies output current as a function of time for a different effective capacitance at the output of the gate; applying each output current waveform to its corresponding effective capacitance to calculate a first set of voltage waveforms voltages; applying each output current waveform to a given RC(L) network to calculate a second set of voltage waveforms voltages, wherein the given RC(L) network models RC(L) characteristics of a net coupled to the output of the gate; and for each time step in a series of time steps, selecting an output current waveform for which a voltage obtained by evaluating a corresponding waveform in the first set of voltage waveforms voltages at the current time step matches a voltage obtained by evaluating a corresponding waveform in the second set of voltage waveforms voltages at the current time step, and applying the selected output current waveform to the given RC(L) network to update a present voltage at the output of the gate.