Patent ID: 8810984

Claim:
A gate circuit comprising: a gate resistive element connected at one end to the gate of a power device; an on-switching device connected between a power supply and the other end of said gate resistive element; a first resistive element connected at one end to said gate; a first switching device connected at one end to the other end of said first resistive element and at the other end to ground; a second resistive element connected at one end to said gate and having a higher resistance value than said first resistive element; a second switching device connected at one end to the other end of said second resistive element and at the other end to ground; excessive current suppression means for turning on said first switching device just when the current in said power device reaches a predetermined value; and turn-off delay means for, after said excessive current suppression means turns on said first switching device, turning off said on-switching device and said first switching device and turning on said second switching device to turn off said power device.