Patent ID: 8341311

Claim:
A flash memory device comprising: a first flash memory for storing non-volatile data for a host; a host interface for transferring data to the host; a random-access memory (RAM) for storing data from the flash memory that are to be transferred to the host; a first-in-first-out memory (FIFO) for receiving data from the flash memory; a first flash direct-memory access (DMA) engine for receiving and transferring data among the first flash memory, the RAM, and the FIFO, the first flash DMA engine operably connected to the first flash memory via a first flash channel and the flash DMA engine being programmed to transfer data from the first flash memory to the host by transferring data from the first flash memory to the FIFO while simultaneously transferring the data from the first flash memory to RAM; and a host interface DMA engine for receiving and transferring data among the host interface, RAM, and the FIFO, the host interface DMA engine being programmed to transfer data from the FIFO to the host interface as soon as data is transferred to the FIFO by the first DMA engine and to transfer data from the RAM once the transfer of data from the FIFO has been completed.