Patent ID: 8147630

Claim:
A method for bonding semiconductor structures comprising: positioning a first surface of a first semiconductor structures directly opposite to and at a first distance from a first surface of a second semiconductor structure within a fixture tool of an aligner equipment; aligning said first surfaces of said first and second semiconductor structures parallel to each other to submicron alignment accuracy; bringing said aligned first surfaces of said first and second semiconductor structures at a second distance from each other wherein said second distance is less than said first distance; bringing said aligned first surfaces of said first and second semiconductor structures into atomic contact at a single point and forming a bond interface by applying pressure to said single point via a pressurized gas flowing through a port terminating at said single point; propagating said bond interface radially across a portion of said first surfaces of said first and second semiconductor structures by controlling said pressurized gas; reducing the pressure of the pressurized gas and bringing said first surfaces of said first and second semiconductor structures into full contact with each other; clamping said first and second semiconductor structures together within said fixture tool; and bonding said clamped first and second semiconductor structures.