Patent ID: 7148106

Claim:
A method of manufacturing a non-volatile memory device, comprising: forming a tunnel dielectric layer on a semiconductor substrate; subjecting the semiconductor substrate having the tunnel dielectric layer to an atomic layer deposition (ALD) process to form nanocrystals on the tunnel dielectric layer; forming a control gate dielectric layer on the semiconductor substrate having the nanocrystals; and forming a control gate electrode on the semiconductor substrate having the control gate dielectric layer, wherein the atomic layer deposition process comprises: injecting a first reactant into the atomic layer deposition chamber to form first reactant chemical adsorption points on the tunnel dielectric layer; and removing a reaction residue in an atomic layer deposition chamber using a method selected from the group consisting of a method of exhausting the atomic layer deposition chamber, a method of injecting an inert gas into the atomic layer deposition chamber, a method of carrying out both the exhaustion and the injection, a method of sequentially carrying out the exhaustion and the injection at least one time, or a combination thereof.