Patent ID: 7341899

Claim:
A method of fabricating a thin film transistor, comprising: forming an amorphous silicon layer, with a first concentration of hydrogen atoms, over a substrate; performing a first heat treatment so that the amorphous silicon layer has a second concentration of hydrogen atoms less than the first concentration; patterning the amorphous silicon layer to form an island-shaped amorphous silicon pattern; depositing an insulating layer over the island-shaped amorphous silicon pattern; forming a gate electrode on the insulating layer; implanting ions into the island-shaped amorphous silicon pattern to form an ion doped region while using the gate electrode as a mask; performing a second heat treatment to transfer the island-shaped amorphous silicon pattern into an island-shaped polysilicon pattern and simultaneously activate the ion doped region using laser annealing; forming a passivation layer over the gate electrode; selectively etching the passivation layer to form openings exposing the ion doped region; filling a metal layer into the openings to form source/drain electrodes; performing a third heat treatment to simultaneously burn the passivation layer and sinter the source/drain electrode; and performing a hydrogen plasma treatment to reduce dangling bonds in the island-shaped polysilicon pattern after third heat treatment.