Patent ID: 7486741

Claim:
A wireless receiving apparatus, comprising: a wireless receiver for demodulating a received wireless signal received to an analog signal; and an analog to digital(AD) converter for converting the analog signal to a digital signal; an inverse symbol mapping section for inverse-symbol-mapping the digital signal outputted from the AD converter onto multibit digital data in accordance with a predetermined mapping table, when a read clock is provided; a sync detector for extracting a sync signal from the analog signal; and a clock generating section for detecting data symbol region based on the sync signal, and for generating the read clock when the data symbol region is detected, wherein the clock generating section comprises: a PLL section for generating a reference clock based on the sync signal; a clock divider for generating a write clock and a read clock to be provided to a buffer by dividing the reference clock, and for providing the read clock to the buffer; and a clock gate section for providing the write clock received to the buffer when the sync detector does not detect a sync signal, and not providing the write clock to the buffer when the sync detector detects a sync signal.