Patent ID: 7646841

Claim:
A method of driving an amorphous silicon thin film transistor having gate, drain and source electrodes, the method comprising: applying a first voltage signal to the drain electrode of the amorphous silicon thin film transistor; applying a second voltage signal to the source electrode; and applying a third voltage signal to the gate electrode to control an electrical conduction path between the drain and source electrodes, wherein the third voltage signal swings between a minimum voltage level and a maximum voltage level, when the voltage level of the third voltage signal is the minimum voltage level, the voltage difference of the third voltage signal and second voltage signal exceeds a normal threshold voltage level of the amorphous silicon thin film transistor, and when the voltage level of the third voltage signal is the maximum voltage level, the voltage difference of the third voltage signal and second voltage signal exceeds a threshold voltage level of the amorphous silicon thin film transistor which is increased due to deterioration of the amorphous silicon thin film transistor.