Patent ID: 7795682

Claim:
A method of manufacturing a semiconductor device comprising: forming a plurality of fins made of a semiconductor material on an insulating layer; forming a gate insulating film on side surfaces of the plurality of fins; and forming a gate electrode on the gate insulating film in such a manner that a compressive stress is applied to a side surface of a first fin which is used in an NMOSFET among the plurality of fins in a direction perpendicular to the side surface and a tensile stress is applied to a side surface of a second fin which is used in a PMOSFET among the plurality of fins in a direction perpendicular to the side surface, wherein the forming of the gate electrode comprises: forming the gate electrode on the gate insulating film of the first fin in a film thickness of not less than ½ of a spacing between the first fins which are adjacent to each other, removing the gate electrode in a region of the second fin, and forming the gate electrode on the gate insulating film of the second fin in a film thickness of less than ½ of a spacing between the second fins which are adjacent to each other.