Patent ID: 8786165

Claim:
A leadless package for housing discrete devices, the leadless package comprising: a silicon structure having a top surface and a bottom surface, the silicon structure including: a plurality of SMT land pads disposed on the bottom surface of the silicon structure, the SMT land pads configured to provide electrical connections to a substrate; a concave surface on the top surface of the silicon structure, the concave surface defining a cavity configured to envelop one or more discrete devices; a plurality of electrical contacts disposed entirely within the cavity on the concave surface of the top surface, the electrical contacts configured to provide electrical connections to the one or more devices enveloped in the cavity; a plurality of interconnected walls disposed through the silicon structure, the interconnected walls defining a plurality of micro-vias configured to extend from the SMT land pads on the bottom surface to the electrical contacts on the top surface of the silicon structure; feed-through metallization disposed through the micro-vias, the feed-through metallization configured to form electrical connections from the SMT land pads on the bottom surface through the silicon structure to the electrical contacts on the top surface; and a plurality of sloped side edges on the bottom surface of the silicon structure, the sloped side edges configured to extend therein electrical connections to the SMT land pads for solder filleting and post soldering inspection, wherein at least one of the SMT land pads extends directly on one of the sloped side edges toward the top surface of the silicon structure.