Patent ID: 7892890

Claim:
A manufacturing method of a semiconductor device comprising: forming semiconductor elements and bonding wires electrically connected to the semiconductor elements on a main surface of a semiconductor wafer, forming grooves having opening portions wider than regions between bonding pads of adjacent ones of the semiconductor chips on a backside in positions corresponding to the bonding pads between the adjacent semiconductor chips along one of dicing lines and chip dividing lines of the semiconductor wafer, forming insulating films in the grooves, dividing the semiconductor wafer along one of the dicing lines and chip dividing lines of the semiconductor wafer to form semiconductor chips having overhung portions each formed to have a start point inside the bonding pads and become thin in a direction toward an outer periphery to an end point which reaches a side wall thereof and used to form spaces which accommodate ball bonding portions between the overhung portions and a main surface of a semiconductor chip arranged in a lower stage by using the inner wall of the groove on at least one side of the outer periphery, and stacking and mounting a plurality of semiconductor chips including the semiconductor chip having the overhung portion formed while the overhung portion is set to correspond to the ball bonding portions of the semiconductor chip arranged in a lower stage and wire-bonding printed wirings on the circuit board with bonding pads formed on a main surface of the semiconductor chip each time the semiconductor chip is mounted.