Patent ID: 6920145

Claim:
A packet switch device having a plurality of input lines, a plurality of output lines and a switching unit and where a frame of data received on an input line of the plurality of input lines is stored as one or more fixed length packets in an input buffer corresponding to the input line, where a plurality of input buffers are provided corresponding to the plurality of input lines, each input buffer of the plurality having a buffer memory that is logically divided into queues corresponding to the plurality of output lines, the buffer memory for temporarily storing the fixed length packets, and the switching unit switching the fixed length packets read from the buffer memory to the plurality of output lines, the packet switch device comprising: a plurality of schedulers corresponding to the plurality of output lines; and at least one result notification module for notifying the input buffers of the results of a scheduling process performed by each scheduler, wherein each scheduler, comprising: a scheduling process module in which a scheduling process is executed in a number of parallel processes corresponding to the number of the input lines, the scheduling process for scheduling the sending of the fixed length packets from each input buffer to the switching unit, a sending status management module which manages a sending status of the fixed length packets constituting one frame for each of the input lines, and a request management module for managing requested transfer information being information about the fixed length packets stored in the input buffer for each of the input lines; wherein, after the scheduling process schedules an input line for sending of a fixed length packet from its corresponding input buffer, the scheduling process continuously schedules the input line until the sending of the fixed length packets constituting the same frame is completed, wherein each scheduling process module executes the scheduling process in a number of parallel processes corresponding to the number of the input lines, and the input line scheduled by a scheduler for setting the fixed length packets constituting the same frame is not scheduled by another scheduler, and wherein each scheduling process module decides which input line and corresponding input buffer will send the fixed length packets on the basis of the requested transfer information from the request management module, information on which input line is not currently scheduled, and the sending status managed by the sending status management module.