Patent ID: 7279957

Claim:
A charge pump adapted for generating an output voltage having an arbitrary voltage level according to an input voltage and at least one reference voltage, the charge pump comprising: M pieces of pump units PU i , wherein PU i represents the i th pump unit, “i” being an integer which is greater than 0 and smaller than or equal to M, M being an integer which is greater than or equal to 1, the pump unit PU i comprising: a first terminal N i,1 , coupled to a reference voltage V i,1 , wherein N i,1 represents the first terminal of PU i and V i,1 represents the voltage coupled to N i,1 ; a second terminal N i,2 , coupled to a reference voltage V i,2 , wherein N i,2 represents the second terminal of PU i and V i,2 represents the voltage coupled to N i,2 ; a third terminal N i,3 , wherein N i,3 represents the third terminal of PU i ; a fourth terminal N i,4 , wherein N i,4 represents the fourth terminal of PU i ; and at least one capacitor C i , wherein C i represents an internal capacitor or capacitors of PU i , the pump unit PU i being adapted for charging C 1 with V i,1 and V i,2 in a first period, and providing a voltage to N i,4 according to the voltage level of N i,3 in a second period; “M+1” pieces of first switches S j , wherein S j represents the j th first switch, “j” being an integer which is greater than 0 and smaller than or equal to “M+1”; S j is adapted for electrically connecting the first terminal and the second terminal thereof during the second period, wherein the first terminal of S 1 receives the input voltage and the second terminal of S 1 is coupled to N 1,3 ; the first terminal of S k is coupled to N k−1,4 and the second terminal of S k is coupled to N k,3 ; the first terminal of S M+1 is coupled to N M,4 and the second terminal of S M+1 outputs the output voltage, wherein “k” is an integer which is greater than 1 and smaller than or equal to “M”; and a voltage regulator for providing and regulating the reference voltage V i,1 and V i,2 , wherein, when V i,1 >V i,2 , the output voltage is larger than the input voltage, on the contrary, when V i,1 <V i,2 , the output voltage is smaller than the input voltage, the output voltage being the sum of the input voltage and M pieces of voltage differences ΔV i in which ΔV i represents the i th voltage difference and ΔV i =V i,1 −V i,2 .