Patent ID: 8370584

Claim:
A method to control ownership of a cache line in a shared memory computing system of the type that includes a plurality of nodes and that performs synchronization behaviors including a lock behavior and an atomic update behavior, the method comprising, in a first node among the plurality of nodes: in response to a first memory request, updating lock prediction data for a cache line associated with the first memory request within a hardware-based lock prediction data structure resident in the first node, wherein at least a portion of the lock prediction data is predictive of whether the cache line associated with the first memory request is further associated with a release operation; and in response to a second memory request that is associated with the cache line and issued by a second node among the plurality of nodes, accessing the lock prediction data in the lock prediction data structure and determining whether to transfer ownership of the cache line from the first node to the second node based at least in part on the accessed lock prediction data.