Patent ID: 7238974

Claim:
A semiconductor device comprising: a transistor body having a top surface and having a first doping area and a second doping area, and a channel region between the first doping area and the second doping area; a gate dielectric located over the top surface of the transistor body; a gate electrode disposed above the channel region and disposed on the gate dielectric such that the gate dielectric is located between the gate electrode and the top surface of the transistor body; a first portion of an oxide-nitride-oxide layer disposed above the first and second doping areas and the first portions of the oxide-nitride-oxide layer having a first surface substantially parallel to the top surface of the transistor body and said first portion further including a second surface; a second portion of the oxide-nitride-oxide layer extending in a direction not substantially parallel to the top surface of the transistor body and said second portion having a first surface located adjacent to the gate electrode and said second portion also having a second surface; and a nitride spacer for insulating said gate electrode arranged vertical with respect to the top surface of the transistor body and located on the second surface of said first and second portions.