Patent ID: 7536617

Claim:
A system for generating a launch and capture clock signal, the system comprising a delay clock generator for generating one or more clock signals with delay with respect to a system clock, the one or more clock signals including pulses at different units of delay with respect to the system clock; a pulse Programmable Selection Generator (PSG) including programmed signal values associated with the one or more clock signals that are used to denote different sequences in which the one or more clock signals are to be selected to generate different delay between a launch pulse and a capture pulse in different launch and capture clock signals, the PSG configured to receive an input clock signal and use the input clock signal as a control signal to generate a pulse selection sequence of signal values denoting a sequence in which clock signals in the one or more clock signals are to be selected over a plurality of clock cycles, the one or more clock signals being selected with a delay to create the launch pulse and the capture pulse where the launch pulse and the capture pulse change at an edge delayed from an edge of the input clock signal; and a multiplexer for generating a launch and capture clock signal based on the pulse selection sequence of signal values, the signal values identifying the clock signals over the plurality of clock cycles to create the launch pulse for a launch clock signal and the capture pulse for a capture clock signal in the launch and capture clock signal, wherein the system for generating the launch and capture clock signal is used for testing a device in which the system is located in-situ, wherein the pulse PSG further comprises: a counter receiving the input clock signal from one of the one or more clock signals; a plurality of registers having pre-programmed values for pulse selection; and a multiplexer, which takes as input the pre-programmed values from the plurality of registers and a control signal from the counter to generate the signal value denoting the sequence of selection for the one or more clock signals.