Patent ID: 8735945

Claim:
A semiconductor device comprising: a first transistor array including a plurality of transistors each having a gate electrode extended in a first direction, the plurality of transistors being arranged in a second direction intersecting the first direction; a first pad electrode arranged on a first side of the first transistor array in the first direction of the first transistor array and electrically connected to source regions of the plurality of transistors in the first transistor array; a drain line arranged on a second side of the first transistor array, which is different from the first side of the first transistor array, and electrically connected to drain regions of the plurality of transistors in the first transistor array and extended in the second direction; a first lead-out line formed from the drain regions of the plurality of transistors in the first transistor array to a region below the drain line and electrically connecting the drain regions of the plurality of transistors in the first transistor array to the drain line; and a third lead-out line formed from the source regions of the plurality of transistors in the first transistor array to the region below the pad electrode, and electrically connecting the source regions of the plurality of transistors in the first transistor array to the first pad electrode.