Patent ID: 8547739

Claim:
A method of forming a memory cell, the method comprising: forming a passage through an insulation material overlying a silicon material; forming another material comprising silicon over the insulation material, into the passage, and in contact with the silicon material; forming a plurality of trenches through the another material, the insulation material, and the silicon material, wherein the passage is positioned between the plurality of trenches; forming a dielectric material adjacent each outer vertical surface of the silicon material adjacent a trench of the plurality of trenches and extending from a top surface of the silicon material to a bottom surface of the silicon material; depositing a conductive material at least partially within each trench of the plurality to at least a depth above a top surface of the silicon material; and forming a transistor over the insulation material, wherein a drain region and a source region of the transistor overlie and are adjacent to the insulation material with the another material positioned therebetween.