Patent ID: 8273609

Claim:
A method for fabricating a thin film transistor array substrate, comprising: providing a substrate and forming a semi-conductive on the substrate, wherein the substrate has a pixel area; forming a patterned photoresist layer with a first thickness and a second thickness on the semi-conductive layer, including forming the patterned photoresist layer on the semi-conductive layer in the pixel area of the substrate, wherein the first thickness is larger than the second thickness, and wherein the patterned photoresist layer in the pixel area has the second thickness; patterning the semi-conductive layer by using the patterned photoresist layer as a mask to form a patterned semi-conductive layer comprising a first patterned semi-conductive layer and a second patterned semi-conductive layer; removing the second thickness of the patterned photoresist layer; performing a first ion doping process on the patterned semi-conductive layer by using remaining part of the patterned photoresist layer as a mask to form a source/drain region in the second patterned semi-conductive layer; removing the first thickness of the patterned photoresist layer on the second patterned semi-conductive layer; and forming a dielectric layer and a gate on the patterned semi-conductive layer.