Patent ID: 8736305

Claim:
A system comprising: a dynamic driver reference generator to generate a plurality of dynamic driver reference signals based on a data signal and an input and output (IO) buffer supply voltage; a level shifter to generate a plurality of level shifted signals based in part on the dynamic driver reference signals; and a driver having at least one stress transistor, wherein the driver is configured to dynamically adjust a voltage across the stress transistor based at least on one of the dynamic driver reference signals, the level shifted signals, and a current state of an IO pad; a pre-driver to provide a plurality of pre-driver signals based on the level shifted signals and the dynamic driver reference signals; a skew circuit to generate one or more skewed signals based on the pre-driver signals; and a pad detection and logic circuit coupled to the driver, wherein the pad detection and logic circuit is configured to identify, based at least on the pre-driver signals and the skewed signals, at least one control signal triggering a transition in the IO pad.