Patent ID: 7859032

Claim:
A solid-state imaging device, comprising: a first well; a second well; a photoreceptor section reference voltage wiring; and a peripheral circuit reference voltage wiring, wherein: the first well and the second well are arranged in a semiconductor substrate, the first well includes a photoreceptor section including unit pixels arranged in a matrix format, each of the unit pixels including at least: a photoelectric converter section which accumulates a signal charge obtained through a photoelectric conversion of an incident light; a drain region to which the signal charge is transferred; and a gate electrode which transfers the signal charge from the photoelectric converter section to the drain region, the second well includes therein or thereon a peripheral circuit, the peripheral circuit including at least: a vertical scanning circuit; a horizontal scanning circuit; and an amplifier circuit, the first well and the second well are a P-type well, the first well is electrically separated and different from the second well, the first well is connected to the photoreceptor section reference voltage wiring, the second well is connected to the peripheral circuit reference voltage wiring, the photoreceptor section reference voltage wiring switchingly supplies a first voltage which is equal to or more than 0 V and a second voltage which is higher than the first voltage and is more than 0 V to the first well so that the first voltage is applied to the first well during a signal read-out time period and the second voltage is supplied to the first well during an exposure time period, and the peripheral circuit reference voltage wiring supplies only the first voltage to the second well.