Patent ID: 7491601

Claim:
A method of forming an integrated circuit device, the method comprising: forming a first conductive electrode on a substrate, the first conductive electrode having an electrode wall extending away from the substrate; forming an insulating spacer on the electrode wall wherein portions of the electrode wall are free of the insulating spacer between the substrate and the insulating spacer and wherein portions of the electrode most distant from the substrate are free of the insulating spacer; forming a capacitor dielectric layer on portions of the first conductive electrode free of the spacer; and forming a second conductive electrode on the capacitor dielectric layer opposite the first conductive electrode, wherein a thickness of the insulating spacer between the first and second conductive electrodes is greater than a thickness of the capacitor dielectric layer between the first and second conductive electrodes; wherein the electrode wall includes a recessed portion and wherein the insulating spacer is on the recessed portion of the electrode wall.