Patent ID: 8686784

Claim:
A level shifter, comprising: a latch supplied at a first voltage and having first and second branches; first and second switch elements, respectively connected in series with said first and second branches; an output connected to at least one of said branches; third and fourth switch elements, respectively connected in parallel with said first and second series connections; a controller receiving an input signal at a voltage different from said first voltage for activating said third switch element during a transition period after assertion of said input signal to change the state of said latch, and for deactivating said third switch element and activating said first switch element to maintain the state of said latch during a stabilization period following said transition period, for activating said fourth switch element during an inverse transition period after de-assertion of said input signal to change the state of said latch, and for deactivating said fourth switch element and activating said second switch element to maintain the state of said latch during a stabilization period following said inverse transition period, wherein said controller comprises a capacitive timing element defining a duration of said transition period and said inverse transition period; a charge pump that supplies power to the level shifter; and a power transistor having a gate electrode connected to said output of the level shifter, wherein said output applies a voltage to the gate electrode of the power transistor.