Patent ID: 7804669

Claim:
A circuit comprising: a first voltage supply node; a first N-channel field effect transistor (NFET) having a drain, a gate, a source, and a body, wherein the body is coupled to the source, wherein the drain of the first NFET is coupled to the first supply node; a first resistor having a first lead and a second lead, wherein the first lead of the first resistor is coupled to the gate of the first NFET, and wherein the second lead of the first resistor is coupled to the source of the first NFET; a second (NFET) having a drain, a gate, a source, and a body, wherein the body is coupled to the source; a second resistor having a first lead and a second lead, wherein the first lead of the second resistor is coupled to the gate of the second NFET, and wherein the second lead of the second resistor is coupled to the source of the second NFET; and a first capacitance structure having a first lead and a second lead, wherein the first capacitance structure is taken from the group consisting of: a diode, a metal-insulator-metal capacitor (MIMCAP), a field insulator capacitor, a gate-insulator-semiconductor capacitor, wherein the first lead of the first capacitance structure is coupled to the first voltage supply node, wherein the first capacitance structure is coupled to supply a current that flows through the second resistor during an ESD event.