Patent ID: 7450192

Claim:
A display device comprising: a substrate; a first gate line and a second gate line adjacent to said first gate line formed over said substrate; a first insulating film formed over said first and second gate lines; a first data line formed of a first electrically conductive film formed over said first insulating film and having a terminal adapted to be coupled to an external circuit; at least one thin film transistor having a semiconductor layer comprising an i-type semiconductor and an impurity-doped semiconductor laminated over said first insulating film, a first electrode formed over said semiconductor layer, and a second electrode formed by a portion of said first data line, said thin film transistor being supplied with a scanning signal via said first gate line; a second insulating film formed over said first data line, said first electrode of said thin film transistor and said terminal of said data line, provided with a first opening over said first electrode of said thin film transistor, and provided with a second opening over said terminal of said first data line; a pixel electrode comprised of a second electrically conductive film, formed over said second insulating film and coupled to said first electrode via said first opening; and an electrically conductive layer comprising said second electrically conductive film separate from said pixel electrode, formed over said terminal of said first data line, and coupled to said first data line via said second opening, wherein said second electrically conductive film is a transparent electrically conductive film comprised of an oxide, wherein, in a cross section of an end portion of said first electrode in a direction of a length of a channel of said thin film transistor, said impurity-doped semiconductor is configured to extend beyond said first electrode in said direction of a length, of a channel of said thin film transistor, and said i-type semiconductor is configured to extend beyond said impurity-doped semiconductor in said direction of a length of a channel of said thin film transistor, and wherein said pixel electrode overlies said first gate electrode with said first insulating film between said pixel electrode and said first gate electrode.