Patent ID: 8035662

Claim:
An integrated circuit device comprising: a common voltage generation circuit that generates a common voltage applied to a common electrode of a display panel; a high-speed interface circuit block that includes a physical layer circuit and transfers data through a serial bus using differential signals; at least one data driver block that drives a plurality of data lines of the display panel, the at least one data driver block being disposed between the common voltage generation circuit and the high-speed interface circuit block; first and second common voltage pads that output the common voltage generated by the common voltage generation circuit to the outside, the first and second common voltage pads being connected to the common voltage generation circuit, when a direction from a first side as a short side of the integrated circuit device toward a third side opposite to the first side is referred to as a first direction, a direction from a second side as a long side of the integrated circuit device toward a fourth side opposite to the second side is referred to as a second direction, a direction opposite to the first direction is referred to as a third direction, and a direction opposite to the second direction is referred to as a fourth direction, the first common voltage pad being disposed in the third direction with respect to the data driver block, and the second common voltage pad being disposed in the first direction with respect to the data driver block, first and second differential input pads to which first and second signals forming the differential signals are input from the outside being disposed in the fourth direction with respect to the physical layer circuit, the serial bus being connected to the first and second differential input pads, the first and second differential input pads being connected to the physical layer circuit of the high-speed interface circuit block, and a common voltage line connecting the first and second common voltage pads being provided from the first common voltage pad to the second common voltage pad along the first direction, the common voltage line being disposed along the first direction in a first region, the first region being a region provided in the second direction with respect to the physical layer circuit.