Patent ID: 7184309

Claim:
A method for writing data into a non-volatile semiconductor memory device which comprises a memory cell array and a voltage applying circuit, the memory cell array comprising a NAND cell, said NAND cell comprising a plurality of memory transistors connected in series from a bit line, including first, second, and third memory transistors in that order counted from a bit line side, each memory transistor comprising a charge storage layer and a control gate, one end of the NAND cell being connected to the bit line through a first select gate transistor, and the other end of the NAND cell being connected to a common source line through a second select gate transistor, the method comprising: selecting in a data write mode the second memory transistor; applying a write voltage to a control gate of the second memory transistor; applying a reference voltage to a control gate of the third memory transistor which is non-selected; applying a medium voltage, lower than the write voltage, to a control gate of the first memory transistor which is non-selected; and applying the medium voltage to a control gate of at least one remaining memory transistor, which is non-selected, downstream of the bit line side, wherein said plurality of memory transistors further includes fourth, fifth, and sixth memory transistors connected in series from the common source line such that said fourth, fifth, and sixth memory transistors have a first, second, and third position, respectively, from a common source line side, said method further comprising: selecting in the data write mode the fifth memory transistor; applying the write voltage to a control gate of the fifth memory transistor; applying the reference voltage to a control gate of the sixth memory transistor which is non-selected; applying the medium voltage to a control gate of the fourth memory transistor which is non-selected; and applying the medium voltage to a control gate of at least one remaining memory transistor, which is non-selected, downstream of the common source line side.