Patent ID: 8324030

Claim:
A method for forming a nanowire tunnel field effect transistor (FET) device, the method comprising: forming a nanowire suspended by a first pad region and a second pad region over a buried oxide (BOX) portion of a substrate, the nanowire including a core portion and a dielectric layer around the core portion; forming a gate structure around a portion of the dielectric layer; forming a protective spacer adjacent to sidewalls of the gate structure and around portions of the nanowire extending from the gate structure; implanting a first type of ions in a first portion of the exposed nanowire; removing a second portion of the exposed nanowire to form a cavity defined by the core portion of the nanowire surrounded by the gate structure and the spacer; removing a portion of the BOX portion of the substrate to expose a silicon portion of the substrate between the second pad region and the spacer; and epitaxially growing a doped semiconductor material in the cavity from exposed cross section of the nanowire, the second pad region, and the exposed silicon portion of the substrate to connect the exposed cross sections of the nanowire to the second pad region.