Patent ID: 7949932

Claim:
An apparatus for Low-Density Parity-Check (LPDC) encoding of data, comprising: a processing element configured to produce an LDPC codeword of kp bits from (k−j)p information bits based on a parity check matrix H=[H 1 |H 2 ], having dimension jk×kp, where p is a prime number that is equal to or greater than both of numbers k and j, H 2 is a sparse matrix of dimension jp×(k−j)p for the (k−j)p information bits, H 1 is an upper triangular sparse matrix of dimension jp×jp for jp parity check bits, and one or more of the second column through the p−1 th column of H have a column weight of two, and where H 1 comprises a matrix β for the first p×p bits of H so that the first (p−1) rows of the first (p−1) columns of H are β matrices, where a β matrix has a column weight of two in the first through last column of the β matrix.