Patent ID: 8639487

Claim:
A method of generating models of a system-on-chip (SOC) using one and only one description language, the description language comprising a system architecture and implementation (SARI) language, the method comprising the steps of: preparing a description of a plurality of hardware components to include in the SOC, the description being prepared using, and consisting of, the one and only one description language, the preparing step including, for each one of certain of the hardware components: describing a type hierarchy of the component, including a configuration of the component at one or more levels of abstraction, and one or more common properties that are shared with a similar another one of the components, and describing a plurality of individual parts of the component and grouping them together so as to identify the component as a complex grouping of the individual parts, certain of the plurality of individual parts being shared with a different another one of the components, wherein the certain the hardware components in the description include at least one or more programmable processor cores; and compiling the description that was prepared using, and consisting of, the one and only one description language to automatically generate both one or more software models and one or more hardware models corresponding to the entire SOC, the compiling step including at least configuring the one or more processor cores according to the description.