Patent ID: 8615742

Claim:
An automated method for identifying specific instructions causing performance degradation within a processing element while running a program using paired performance sampling comprising: pairing in microprocessor hardware a first performance counter and a second performance counter by configuring the first performance counter to count all events of a selected type or source, and configuring the second counter to count a subset of events within the selected type or source of events; upon a first occurrence of an event of the selected type or source, capturing an address value representing a storage location of an instruction instance causing the first event; upon subsequent occurrences of events of the selected type or source: counting with the first performance counter all events of the selected type or source; counting with the second performance counter only events which are caused by instructions having addresses matching the captured address value; wherein the counting is continued until the first performance counter reaches a first terminal value or until the second performance counter reaches a second terminal value; responsive to the first performance counter reaching the first terminal value prior to the second performance counter reaching the second terminal value: clearing the performance counters by repeating the pairing; selecting another instruction to track by repeating the step of waiting for another occurrence of the event and capturing another instruction address; and repeating the counting with the pair of performance counters until one or both reach the terminal values; and responsive to the second performance counter reaching the second terminal value prior to or concurrently with the first performance counter reaching the first terminal value, posting an interrupt to an interrupt handler to notify a program that a significant source of the event has been found as represented by the currently captured address.