Patent ID: 7368340

Claim:
A method of manufacturing a semiconductor device comprising: forming a first semiconductor layer on a part of a surface of a semiconductor substrate; forming a second semiconductor layer of which etching rate is smaller than that of the first semiconductor layer on a part of a surface of the first semiconductor layer; forming a supporting member for supporting the second semiconductor layer on the semiconductor substrate, the supporting member being made of a material of which an etching rate is smaller than that of the first semiconductor layer; exposing a portion of the first semiconductor layer; removing the first semiconductor layer to form a hollow portion, the hollow portion being between the semiconductor substrate and the second semiconductor layer; forming an embedded insulating layer embedded in the hollow portion; exposing the sidewall of the second semiconductor layer; forming a first transistor of which a channel region is located at the sidewall of the second semiconductor layer; and forming a second transistor of which a channel region is located on the surface of the semiconductor substrate.