Patent ID: 7410841

Claim:
A method of forming a fully-depleted silicon-on-insulator (FD-SOI) transistor and a partially-depleted silicon-on-insulator (PD-SOI) transistor as part of an integrated circuit fabrication process, comprising: providing a silicon-on-insulator (SOI) substrate which comprises a layer of silicon material formed over a layer of insulating material which is formed over a semiconductor substrate; thinning the layer of silicon material to a thickness suitable for forming a partially-depleted transistor by growing a first grown layer of oxide material over the layer of silicon material, where growing the first grown layer of oxide material thins the layer of silicon material by consuming silicon as part of the growth process; forming a layer of nitride material over the first grown layer of oxide material; patterning the layer of nitride material, the first grown layer of oxide material and the layer of silicon material to establish trenches therein; depositing a layer of dielectric material that fills in the trenches; planarizing the deposited layer of dielectric material; masking off an area of the SOI substrate wherein the partially-depleted transistor is to be formed; removing the layer of nitride material in an area where the fully-depleted transistor is to be formed; removing the first grown layer of oxide material in the area where fully-depleted transistor is to be formed; unmasking the area of the SOI substrate where the partially-depleted transistor is to be formed; thinning the layer of silicon material in the area where the fully-depleted transistor is to be formed to a thickness suitable for forming the fully-depleted transistor by growing a second grown layer of oxide material over the layer of silicon material, where growing the second grown layer of oxide material thins the layer of silicon material by consuming silicon as part of the growth process; removing the layer of nitride material in the area where the partially-depleted transistor is to be formed; removing the first grown layer of oxide material in the area where the partially-depleted transistor is to be formed and removing the second growth layer of oxide material in the area where the fully-depleted transistor is to be formed; and forming the partially-depleted transistor in the area where the partially-depleted transistor is to be formed and forming the fully-depleted transistor in the area where the fully-depleted transistor is to be formed.