Patent ID: 8004256

Claim:
A current limiting circuit for a boost converter comprising: a control circuit configured to detect an output voltage and switch a main switch including a transistor so that the output voltage becomes a target value; a voltage divider circuit including two transistors of the same type as that of the main switch, the two transistors being connected in series; a reference transistor of the same type as that of the main switch and having a gate terminal connected to a bias voltage; a constant current source connected to a drain terminal of the reference transistor and configured to flow a constant current; and a comparator configured to compare a voltage at a voltage division point of the voltage divider circuit with a product of an on-resistance of the reference transistor and the current of the constant current source, wherein the voltage divider circuit includes a sub-switch connected between the voltage division point of the voltage divider circuit and the drain terminal of the main switch and configured to perform switching in synchronization with the main switch in accordance with an output signal of the control circuit, and a detection resistance transistor connected between the voltage division point of the voltage divider circuit and a source terminal of the main switch, and having a gate terminal connected to a bias voltage so that the detection resistance transistor is always on, and the comparator outputs a current limit signal to block output of the control circuit when a signal indicating a result of the comparison reaches a predetermined level.