Patent ID: 8659873

Claim:
A multilayer capacitor comprising: a matrix constituted by a plurality of laminated dielectric layers having at least first to third dielectric layers; first and second terminal electrodes arranged on an outer surface of the matrix; first and second linking electrodes arranged on the outer surface of the matrix; and first to fourth inner electrodes arranged within the matrix; wherein the first, second, and third dielectric layers are laminated in succession; wherein the first and second inner electrodes are arranged on the first dielectric layer while being separated from each other; wherein the third inner electrode is arranged on the second dielectric layer; wherein the fourth inner electrode is arranged on the third dielectric layer; wherein the first inner electrode is integrally provided with a first terminal connection part connected to the first terminal electrode and a first linking connection part connected to the first linking electrode; wherein the second inner electrode is integrally provided with a second terminal connection part connected to the second terminal electrode and a second linking connection part connected to the second linking electrode; wherein the third inner electrode is integrally provided with a third linking connection part connected to the second linking electrode; wherein the fourth inner electrode is integrally provided with a fourth linking connection part connected to the first linking electrode; wherein the third inner electrode is adjacent to the second and fourth inner electrodes in a laminating direction of the plurality of dielectric layers; wherein the first and third inner electrodes are kept from overlapping each other as seen in the laminating direction of the plurality of dielectric layers; and wherein the second, third, and fourth inner electrodes overlap one another as seen in the laminating direction of the plurality of dielectric layers.