Patent ID: 8232847

Claim:
An oscillation circuit comprising: a piezoelectric oscillator provided between first and second nodes; a resistive element provided between said first and second nodes in parallel with said piezoelectric oscillator; a first capacitive element provided between said first node and a ground node; a second capacitive element provided between said second node and said ground node; a first exciting circuit provided between said first and second nodes in parallel with each of said piezoelectric oscillator and said resistive element, for inverting and amplifying a signal from said first node and outputting the signal to said second node; said first exciting circuit including a plurality of cascade-connected logic elements each used as an amplifier circuit; a timer circuit outputting a control signal that is in an active state for a predetermined time from when an enable signal attains an active state; and a second exciting circuit provided between said first and second nodes in parallel with each of said piezoelectric oscillator, said resistive element, and said first exciting circuit, for inverting and amplifying a signal from said first node and outputting the signal to said second node, wherein said second exciting circuit has a power amplification ratio lower than a power amplification ratio of said first exciting circuit, said second exciting circuit includes a logic element outputting a signal at a constant logic level when said enable signal is in an inactive state, and operating as an amplifier circuit when said enable signal is in an active state, and logic elements in first and last stages among the plurality of logic elements constituting said first exciting circuit are three-state buffers that are in a high impedance state when said control signal is in an inactive state.