Patent ID: 8748881

Claim:
A semiconductor device comprising: a first oxide semiconductor layer comprising a first crystalline region over a substrate having an insulating surface; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer each being in contact with the second oxide semiconductor layer; a first gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a first gate electrode layer over the second oxide semiconductor layer with the first gate insulating layer interposed therebetween, wherein the second oxide semiconductor layer comprises a second crystalline region having a c-axis alignment same or substantially same as that of the first crystalline region, wherein the c-axis of the second crystalline region is aligned in a direction within ±10° from a perpendicular direction to a surface of the second oxide semiconductor layer, and wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, zinc and a metal other than indium and zinc.