Patent ID: 8476971

Claim:
A driver comprising: a digital-to-analog converter (DAC) having a digital input representing an input voltage between first and second analog voltage levels and an analog output; an operational amplifier having an output and first and second inputs, the first input having a first differential input pair of transistors comprising a first NMOS transistor and a first PMOS transistor, the second input having a second differential input pair of transistors comprising a second NMOS transistor and a second PMOS transistor; and switching logic for reducing offset in the operational amplifier, the switching logic operable to selectively couple: the first NMOS and PMOS transistors to the analog output of the DAC and the second NMOS and PMOS transistors to the operational amplifier output when the input voltage is between a low reference voltage and a high reference voltage; the first and second NMOS transistors to an intermediate voltage between the low and high reference voltages, the first PMOS transistor to the analog output of the DAC and the second PMOS transistor to the operational amplifier output when the input voltage is below the low reference voltage; and the first and second PMOS transistors to the intermediate voltage, the first NMOS transistor to the analog output of the DAC and the second NMOS transistor to the operational amplifier output when the input voltage is above the high reference voltage.