Patent ID: 8836900

Claim:
An array substrate, comprising: a base substrate, and data lines and gate lines, which are orthogonal to each other to define a plurality of pixel units, formed in a pixel region of the base substrate, with each of the pixel units comprising a switching element, a pixel electrode and a common electrode, wherein the common electrode in each of the pixel units comprises slits, and the slits have a shape of fold line and are parallel to each other so as to form a slit region in the common electrode, and wherein the pattern profile of the pixel electrode is parallel to the profile of the slit region of the common electrode and the gate lines and/or the data lines are parallel to the pattern profile of adjacent pixel electrodes; the pixel electrode has a shape same to that of the slit, and the patterns of the pixel electrodes are curved opposite to each other in the pixel units of adjacent columns, and the pixel electrodes in the adjacent columns are displaced in a stagger manner so as to enable the curved patterns to match with each other.