Patent ID: 7960760

Claim:
A semiconductor device formed in a same process to include a finFET transistor and an electrically programmable fuse, comprising: a substrate including a first dielectric layer; a semiconductor layer formed over the first dielectric layer and patterned to provide a plurality of fins respectively extending between first and second pads; a first fin doped to define a finFET channel of given conductivity type extending between pads doped to define finFET source/drain regions of opposite conductivity type, and a second fin doped to define a fuse fusible link of one of the given or opposite conductivity type extending between pads doped to define fuse terminals of the same one of the given or opposite conductivity type; a second dielectric layer formed conformally over the first and second fins and over the respective first and second pads; and a gate electrode formed over the first dielectric layer and over the second dielectric layer over the finFET channel defined by the first fin.