Patent ID: 7395165

Claim:
A circuit arrangement for electronic data processing comprising: at least one non-volatile memory module for storing encrypted data to be protected against unauthorized access; at least one memory module interface logic circuit in electronic communication with the non-volatile memory module; said at least one memory module interface circuit being for addressing the non-volatile memory module, for writing the data to the non-volatile memory module, or for reading out the data from the non-volatile memory module; at least one code Read Only Memory (ROM) module for storing and/or supplying at least one ROM code; and at least one code ROM module interface logic circuit in electronic communication with the code ROM module for addressing the code ROM module and for reading out the ROM code from the code ROM module, wherein the at least one ROM code stored in the code ROM module is used to generate at least one key code for encrypting or decrypting data being written to the non-volatile memory module or data being read from the non-volatile memory module, said at least one ROM code further being used for decrypting address data coming from a central processing unit (CPU).