Patent ID: 7494865

Claim:
A method of fabricating a metal oxide semiconductor transistor, comprising: providing a substrate; forming a source/drain extension region in the substrate; forming a pad material layer with a low dielectric constant on the substrate; forming a trench in the pad material layer and the substrate; forming a gate dielectric layer on a surface of the substrate in the trench; forming a stacked gate structure in the trench, wherein a top surface of a conductive layer of the stacked gate structure is higher than a surface of the pad material layer; forming a second spacer on the exposed side wall of the conductive layer; conformally forming a spacer material layer on the substrate after the step of forming the second spacer; removing portions of the spacer material layer and the pad material layer to form a pair of first spacers and a pair of pad blocks; and forming a source/drain on the substrate beside the stacked gate structure.