Patent ID: 7315086

Claim:
A chip-on-board package comprising: a non-conductive film having a first surface, a second surface opposite the first surface, and a plurality of holes there through; conductive patterns formed on the first surface of the non-conductive film with a portion of the conductive patterns overlying and exposed through the plurality of holes of the non-conductive film, respectively; an integrated circuit chip having an active surface facing the second surface of the non-conductive film and having a plurality of conductive bumps formed on the active surface, the plurality of conductive bumps formed to respectively pass through the holes of the non-conductive film to be directly coupled to the conductive patterns respectively exposed through the holes without presence of any filling material through the holes, and wherein a height of the plurality of conductive bumps substantially exceeds a thickness of the non-conductive film to prevent the integrated circuit chip from contacting the non-conductive film.