Patent ID: 7784008

Claim:
A computer system for visualizing performance of a digital design of an integrated circuit that is not part of the computer system, the computer system programmed with a set of instructions comprising: receiving, at the computer system, design source code specifying connections of circuit elements of the digital design of the integrated circuit, wherein the digital design includes registers connected together by combinatorial logic, each register having one or more register bits that store bits of data; determining a first node representing a first metaregister, wherein the first metaregister comprises a first portion of the register bits in the digital design, each register bit being of a register of the digital design, wherein each register bit of the first portion has a first characteristic; determining a second node representing a second metaregister, wherein the second metaregister comprises a second portion of the register bits in the digital design, wherein each bit of the second portion has a second characteristic; determining a graph connection from the first node to the second node, the graph connection representing a metapath comprising a plurality of paths and associated combinatorial logic between the first and second metaregisters; displaying the first node, the second node, and the graph connection on a monitor coupled with the computer system, thereby allowing a user of the computer system to visualize a performance of the digital design; and displaying performance information of the metapath on the monitor, wherein the graph connection includes an annotation providing the performance information of the metapath.