Patent ID: 7327338

Claim:
An LCD apparatus comprising: a timing controller for outputting an image signal, a first timing signal, a second timing signal and a clock generating control signal in response to an external signal; a clock generator for generating first and second clock signals having phases opposite to each other and controlling the first and second clock signals to respectively have a first predetermined voltage and a second predetermined voltage during a first period and to be charged or discharged during a second period; a gate driver for sequentially outputting a gate driving signal in response to the first timing signal, the first clock signal and the second clock signal, wherein a pulse width of the gate driving signal is reduced in response to the first and second clock signals; a data driver for outputting the image signal in response to the second timing signal; and an LCD panel having a plurality of data lines for receiving the image signal, a plurality of gate lines for receiving the gate driving signal, and a switching device connected to the data and gate lines for outputting the image signal in response to the gate driving signal.