Patent ID: 7065684

Claim:
A test circuit for measuring the signal propagation delay through a signal path, the test circuit comprising: a clock generator for providing a clock signal to a circuit under test providing the signal path, the clock signal having a predetermined frequency; and a comparator coupled to receive the clock signal from the clock generator and to an output of the signal path, the comparator receiving the clock signal and a signal at the output of the signal path to measure a delay of the signal path through the circuit under test, the comparator including, a divider having a predetermined dividing function, the divider receiving the clock signal and dividing the clock signal by the predetermined dividing function; a first counter, coupled to the output of the signal path, the first counter counting the number of pulses in the signal at the output of the signal path; a second counter, coupled to the divider, for counting the number of pulses at the output of the divider; and a pulse generator, coupled to the first and second counters, for enabling the first and second counters, wherein the ratio between the number of counts in the first counter and the second counter identifies the delay through the signal path.