Patent ID: 7838349

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: (a) preparing an SOI substrate having a semiconductor substrate, a buried oxide film, and a semiconductor layer in this order, said semiconductor layer having a first active region and a second active region both of a first conductivity type and a third active region of a second conductivity type in a main surface thereof; (b) forming a first isolation insulating film so as to surround said first and second active regions and leave a first semiconductor region which is part of said semiconductor layer therebelow, and forming a second isolation insulating film reaching said buried oxide film between said first active region and third active region; (c) forming a first impurity region of the first conductivity type on a main surface of said semiconductor layer in said second active region; (d) forming a first gate electrode on said main surface of said semiconductor layer in said first active region with a first gate insulating film interposed therebetween; (e) forming first source region and drain region of a second conductivity type in said main surfaces of said semiconductor layer of said first active region which sandwich a region opposed to said first gate electrode at a predetermined distance; (e′) forming a channel formation region between said first source region and said first drain region, the channel formation region being connected to said first impurity region so that the potential thereof is fixed, (f) forming a first interlayer insulting film on said semiconductor layer in said first, second and third active regions and a surface of said first and second isolation insulating film; (g) forming a silicon nitride film on said first interlayer insulating film; and (h) forming a second interlayer insulating film on a surface of said silicon nitride film.