Patent ID: 7906982

Claim:
An apparatus for performing electrical tests on at least one device under test (DUT), the apparatus comprising an interface board provided with a plurality conductive elements adapted to electrically couple with electrical terminals on the DUT and connected to a number of test circuits, each of said test circuits residing on one of a plurality of Field Programmable Gate Array (FPGA) daughter cards on said interface board, and arranged to provide test input signals to said DUT and receive output signals from said DUT to generate a test result based on a program loaded to the FPGA daughter cards before testing begins; a controller to control said interface board and store therein said test result outputted from said test circuit; and wherein each of the plurality of FPGA daughter cards include a plurality of FPGAs, and a memory to store the test results, and at least one of the plurality of FPGAs include a logic vector memory (LVM) to test logic circuits in the DUT.