Patent ID: 7622902

Claim:
A Low Drop-Out (LDO) regulator with over-current limit, comprising: a first transistor with a first channel aspect ratio, comprising: a first end, coupled to an input voltage source; a second end for generating an output voltage source; and a control end for receiving a current control signal to control current of the output voltage source generated from the second end of the first transistor; a sensing resistor, coupled to the input voltage source; a second transistor with a second channel aspect ratio, comprising: a first end, coupled to the sensing resistor; a second end, coupled to the second end of the first transistor; and a control end for receiving the current control signal; a comparator, comprising: a positive input end for receiving a first reference voltage; a negative input end, coupled to the sensing resistor for receiving a sensing voltage; and an output end for outputting a current limit control signal according to signals received on the positive and negative input ends of the comparator; and an error amplifier, comprising: a negative input end for receiving a second reference voltage; a positive input end for receiving a voltage divided from the output voltage source; an output end, the error amplifier outputting the current limit control signal through the output end of the error amplifier according to the second reference voltage and the voltage divided from the output voltage source; and an enable end, coupled to the output end of the comparator for receiving the current limit control signal and enabling the error amplifier to generate the current control signal according to the current limit control signal; wherein the first channel aspect ratio is higher than the second channel aspect ratio.