Patent ID: 7260159

Claim:
An apparatus for providing an asymmetrical backward compatible signal, comprising: a timing error accumulator coupled to a first bit stream, said first bit stream including content that is common to a QPSK/OQPSK receiver and to a PSK/QAM receiver; a phase error accumulator coupled to a second bit stream, said phase error accumulator adjusting the phase of symbols in said second bit stream; a phase and timing error compensator coupled to said phase error accumulator and said timing error accumulator, said phase and timing error compensator adjusts said first and second bit streams received from said phase error accumulator and said timing error accumulator to reduce timing and phase errors; and a higher order modulator coupled to said phase and timing error compensator, said higher order modulator processing said first and said second bit streams to provide said asymmetrical backward compatible signal, wherein a signal constellation associated with said asymmetrical backward compatible modulation signal is expanded to achieve a higher throughput for said asymmetrical backward compatible modulated signal by arranging each symbol associated with said asymmetrical backward compatible signal into a cluster, wherein said cluster corresponds to a point where at least one of the conditions y=x and y=−x exist, said x, −x and y corresponds to points proximate an axis in a two dimensional plane.