Patent ID: 7826284

Claim:
A sensing circuit for a semiconductor memory, comprising at least one sense amplifier, said sense amplifier comprising: a first circuital branch adapted to be electrically run through by a first current corresponding to the sum of a second current as a function of a comparison current and a cell current, said cell current being a function of a state of a memory cell to be read in a predetermined biasing condition; a second circuital branch coupled as a current mirror configuration with the first circuital branch, said second circuital branch being adapted in the operation to be run through by a third current proportional to the first current; a third circuital branch coupled to said second branch, said third circuital branch being adapted in the operation to sink a fourth current as a function of said comparison current; a fourth circuital branch coupled to said second and third circuital branches, said fourth circuital branch being adapted in the operation to be run through by a residual current equal to the difference between the third and the fourth current, said residual current assuming different values depending on the fact that the cell current is lower, equal or higher than the comparison current; and residual current sensitive means adapted to generate an indication of the state of the memory cell as a function of a value of the residual current.