Patent ID: 7877584

Claim:
A device comprising: a processor having an associated hardware resource and operable to execute an instruction group; and a resource manager operable to implement a resource management policy for the associated hardware resource with respect to an execution of the instruction group, the resource management policy selected from an optimistic policy that assumes that the instruction group will execute in a substantially optimal manner by executing correct branches and a pessimistic policy that assumes that the instruction group will execute in a substantially sub-optimal manner such that greater than a preselected level of at least one error will occur during execution of the instruction group, the resource management policy selected after a first execution of the instruction group applying the optimistic policy and a second execution of the instruction group applying the pessimistic policy, the resource management policy associated together with the instruction group in a common storage hierarchy and responsive to a confidence value, the confidence value indicating a prediction of a future performance of the associated hardware resource based at least in part on a historical performance of the associated hardware resource with respect to a prior execution of the instruction group.