Patent ID: 7994824

Claim:
A logic gate for integrated circuits, comprising: a Boolean network including at least an input and at least an output node and including at least a terminal connected to a first node at fixed potential corresponding to a first logical level of the said logic gate; a first pair of switches including a first switch and a second switch, said second switch directly coupled to said output terminal and to a first internal node, said first switch directly coupled to said first node at fixed potential and a second internal node; and a second pair of switches including a third switch and a fourth switch, said third switch directly coupled to a second node at fixed potential corresponding to a second logical level of said logic gate, and said first internal node, said fourth switch directly coupled to said second node at fixed potential and said second internal node, wherein said first switch and said second switch are activated alternately, and wherein said third switch and said fourth switch are coupled together so that when one of said third switch and said fourth switch turns on, the other one of said third switch and said fourth switch turns off.