Patent ID: 7320933

Claim:
A method of forming an interposer substrate having a first level interconnect and a second level interconnect, the method comprising: plating conductive bumps associated with a first major surface of a substantially planar interposer substrate body in a pattern for the first level interconnect and conductive bumps associated with a second major surface of the interposer substrate body in a pattern for the second level interconnect to at least one conductive line carried by the interposer substrate body, plating comprising plating the conductive bumps associated with at least one of the first major surface and the second major surface in at least some through holes of a plurality of through holes in the interposer substrate body; providing conductive paste within at least one through hole of the plurality of through holes; and providing a conductive ball at least partially within the conductive paste, the conductive ball protruding from at least one of the first major surface and the second major surface of the interposer substrate body.