Patent ID: 6936512

Claim:
In an integrated circuit, a method of forming a node dielectric of a trench capacitor and a trench sidewall device dielectric at the same time, comprising: forming a trench in a single crystal layer of a semiconductor substrate; forming an isolation collar along a portion of a sidewall of said trench, said isolation collar having a top below a top of said trench in said single crystal layer; forming, at the same time, a high-K dielectric along said sidewall, extending in both an upper portion of said trench including above said isolation collar and in a lower portion of said trench below said isolation collar; etching back said top of said isolation collar to expose a portion of said single crystal layer along said sidewall; and forming a node electrode in conductive contact with said exposed single crystal layer and in contact with a node dielectric portion of said high-K dielectric in said lower portion, leaving said high-K dielectric as a trench sidewall device dielectric in said upper portion.