Patent ID: 8015388

Claim:
For a virtual memory of a virtualized computer system in which guest page tables map virtual addresses to guest physical addresses which are backed by machine addresses, and shadow page tables and a translation look-aside buffer map the virtual addresses to the corresponding machine addresses, a computer-implemented method of accessing the virtual memory using a virtual address, the method comprising: determining whether an indicator of a shadow page table entry corresponding to the virtual address is in a first state or a second state, the indicator indicating whether the guest page tables contain a valid address translation for the virtual address, this indication being distinct from an indication as to whether the shadow page tables contain a valid address translation for the virtual address, so that a shadow page table entry may indicate that the shadow page tables do not contain a valid address translation for the virtual address while indicating that the guest page tables do contain a valid address translation for the virtual address; responsive to the indicator being in the first state, performing an address translation look-up in the guest page tables to determine a guest physical address corresponding to the virtual address, using the guest physical address to determine a corresponding machine address, and inserting into the shadow page tables a mapping from the virtual address to the corresponding machine address; and responsive to the indicator being in the second state, delivering a page fault indication to guest system software, without performing the address translation look-up in the guest page tables.