Patent ID: 7254206

Claim:
A device for comma detection and word alignment for n-to-m bit conversion serial transmission, the device comprising: a two-stage pipeline architecture composed of a plurality of register sets with h-bit data width, which receives a serial data stream; a comma detection logical circuit, which detects the distribution of a k-bit comma pattern in the register sets of a first-stage pipeline; and a word alignment logical circuit, which extracts an n-bit word data in the register sets of a second-stage pipeline, and the output data go through an n-to-m bit conversion to obtain an m-bit data, wherein when the serial data streams enter the first stage pipeline, said comma detection logical circuit detects the location of a k-bit comma pattern and then a comma detection indication signal is transmitted to said word alignment logical circuit, the locations of the n-bit word data in a second-stage pipeline are selected and extracted according to the locations of the k-bit comma pattern in said first-stage pipeline.