Patent ID: 7913193

Claim:
A design structure embodied in a machine readable storage device used in a design flow process, the design structure comprising a circuit, the circuit comprising: a data retaining device; a charge storing device coupled to the data retaining device that a use of the data retaining device triggers a charging of the charge storing device by a charge source; and means for measuring a potential of the charge storing device, the measuring means being communicatively coupled to a calculating mean which determines a relative amount of usage of the data retaining device based on the measured potential, wherein the charge storing device is coupled to the charge source through a transistor stack including a first transistor and a second transistor, the first transistor being designed to be turned on by a first signal that is activated when the data retaining device is selected for a use, and the second transistor being designed to be turned on by a second signal that indicates a type of use of the data retaining device.