Patent ID: 7253116

Claim:
A method of forming a semiconductor interconnect structure having a modified layer of minimal thickness comprising the steps of: providing an organosilicate glass structure having conductive features; providing a photoresist covering at least a portion of said organosilicate glass structure and where at least a portion of said organosilicate glass structure is not covered by said photoresist; removing said photoresist with a high energy reactive species partial pressure plasma ash process, wherein said plasma ash process comprises O2, CO or CO2 or combinations thereof and has an input bias power/oxygen partial pressure ratio less than approximately 2.0 W/mT−1, said input bias has a power of approximately 200 W to approximately 600 W and a frequency less than or equal to 13.56 MHz, and has a source power of less than approximately 50 W and thereby providing said organosilicate glass structure not covered by said photoresist with a minimal modified thickness.