Patent ID: 7839691

Claim:
A non-volatile semiconductor memory device comprising: cell strings connected to respective bit lines; each of the cell strings having a string select transistor connected to a string select line, a ground select transistor connected to a ground select line, and memory cells connected to corresponding word lines and connected in series between the string select transistor and the ground select transistor, the cell strings including at least a first cell string including a first memory cell connected to a first wordline and a second memory cell connected to a second wordline; a voltage generation circuit having an output on which a source voltage is provided during a read operation; a wordline driver circuit configured to connect the first wordline connected to unselected memory cells with the output of the voltage generation circuit during a read operation of selected memory cells connected to the second wordline, to provide a read voltage on the first wordline during the read operation; a string select line driver circuit configured to drive the string select line with a first voltage having a magnitude less than a magnitude of the read voltage during the read operation; and a ground select line driver circuit configured to drive the ground select line with a second voltage having a magnitude less than the magnitude of the read voltage during the read operation.