Patent ID: 7870417

Claim:
An apparatus for adapter card failover, the apparatus comprising: a switch module comprising semiconductor logic and configured to logically connect a first processor complex to an adapter card through a first port as an owner processor complex, wherein the owner processor complex manages the adapter card except for a second port, receives error messages from the adapter card, and writes to setup registers of the adapter card, the setup registers storing written first data values that configure the switch module and the adapter card to communicate with the first processor complex as the owner processor complex, and the switch module further logically connects a second processor complex to the adapter card through the second port as a non-owner processor complex, wherein the non-owner processor complex manages the second port and writes to the setup registers of the adapter card; a detection module embodied in the second processor complex comprising semiconductor logic and software instructions executing on a processor and configured to detect a failure of the first processor complex; and a setup module comprising software instructions executing on a processor and configured to modify the switch module by writing second data values to the setup registers of the adapter card from the second processor complex through the second port to logically connect the second processor complex to the adapter card as the owner processor complex and to logically disconnect the first processor complex from the adapter card in response to detecting the failure.