Patent ID: 7516390

Claim:
An apparatus, comprising: an LDPC (Low Density Parity Check) encoder that is operable to encode at least one information bit using a generator matrix of a GRS-based irregular LDPC code thereby generating an LDPC code block, wherein the GRS-based irregular LDPC code is generated using GRS (Generalized Reed-Solomon) code; an interleaver that is operable to perform bit to symbol interleaving on the LDPC code block thereby generating a plurality of x-bit labels, wherein x is an integer; a DEMUX (demultiplexor) that is operable to partition the plurality of x-bit labels to a plurality of streams; and a plurality of symbol mappers that is operable to map versions of the plurality of x-bit labels to at least one constellation that has a corresponding mapping thereby generating a plurality of sequences of discrete-valued modulation symbols, wherein one symbol mapper corresponds to each stream of the plurality of streams.