Patent ID: 7932150

Claim:
A method of oxidizing a high-K gate dielectric in an integrated circuit structure, comprising: forming a high-K dielectric liner over a FET, the FET comprising a metal gate and the high-K gate dielectric, the high-K dielectric liner in contact with the high-K gate dielectric to allow oxygen from the high-K dielectric liner to oxidize the high-K gate dielectric, wherein the high-K dielectric liner is annealed at a temperature from about 100° C. to about 400° C. and the high-K dielectric liner comprises one of HfO 2 , ZrO 2 , Hf x Si 1-x O 2 , Hf x La 1-x O 2 , Zr x Si 1-x O 2 , La x Si 1-x O 2 , Gd x Si 1-x O 2 , HfZrSiO, HfLaSiO, or HfGdSiO, where x is between 0 and 1.