Patent ID: 7112836

Claim:
A memory cell, comprising: a first conducting element at least partially disposed within a substrate; a pad layer disposed on a surface of the substrate and comprising a top surface, a bottom surface, and at least two sidewalls disposed between the top and bottom surfaces; a first bottom electrode at least partially disposed on a surface of the substrate and operatively coupled with the first conducting element, the first bottom electrode begin formed on one of the at least two sidewalls of the pad layer and having dimensions of length, height, and width with the length beings substantially parallel to the substrate and the first bottom electrode including a plane end surface formed substantially at a right angle to the length; and phase change material at least partially disposed on the surface of the substrate and forming an operative contact with the plane end surface of the first bottom electrode; a second conducting element at least partially disposed within the substrate; and a second bottom electrode formed on another one of the at least two sidewalls of the pad layer, the second bottom electrode being operatively coupled with the second conducting element, wherein the phase change material is operatively coupled with the second bottom electrode.