Patent ID: 8526559

Claim:
A device communicating with a host, comprising: a receiver for receiving and recovering host data (DH) from the host to generate a host clock signal (clkr); a clock generator for generating a local clock signal; a phase locked loop (PLL) for generating an output clock signal (clkout); and a transmitter for transmitting device data according to the output clock signal, wherein before the receiver receives the host data, the PLL generates the output clock signal according to the local clock signal, wherein after the receiver receives the host data, the PLL generates the output clock signal according to the host clock signal when a frequency of the output clock signal generated according to the local clock signal is not within a range required for specification of the transmitter, and wherein the host clock signal (clkr) is different from the local clock signal, and the host clock signal is within the range required for the specification of the transmitter.