Patent ID: 6972703

Claim:
A voltage detection circuit for detecting a voltage level of a power source, the voltage detection circuit comprising: a first NMOS transistor comprising a first gate, a first source, and a first drain coupled to the power source; a second NMOS transistor comprising a second gate coupled to the first gate, a second source, and a second drain coupled to the power source; a comparator comprising a first input terminal, a second input terminal coupled to the second source, and an output terminal; a first resistor coupled between the first input terminal and the first source; a second resistor coupled to the first input terminal and the first resistor; a third resistor coupled between the second resistor and the second input terminal; a fourth resistor coupled between a connection point of the second resistor and the third resistor, and ground; a first PMOS transistor comprising a third gate coupled to the first gate and the second gate, a third source coupled to the power source, and a third drain coupled to the third gate; and a second PMOS transistor comprising a fourth gate, a fourth source coupled to the first gate and the second gate, a fourth drain coupled to the fourth gate and ground, and a fourth n-well directly connected to the first gate and the second gate.