Patent ID: 8238152

Claim:
A semiconductor device comprising: a bit line driver circuit including a column decoder and a read circuit; a word line driver circuit including a row decoder; and a memory cell including a first wiring, a second wiring, a transistor, a first conductive layer, a layer, and a second conductive layer, the transistor having a semiconductor film including a channel formation region, wherein the first wiring is electrically connected to the bit line driver circuit, wherein the second wiring is electrically connected to the word line driver circuit, wherein the semiconductor film includes a metal oxide and the metal oxide includes indium, wherein the first conductive layer is electrically connected to the transistor, wherein each of the layer and the second conductive layer is located over the transistor, wherein the first conductive layer is overlapped with the second conductive layer, and wherein the layer is interposed between the first conductive layer and the second conductive layer.