Patent ID: 8301186

Claim:
An enhanced sensitivity radio frequency (RF) front end circuit, comprising: a transformer configured to convert a balanced transmit signal to an unbalanced transmit signal and convert a second filtered receive signal to a balanced receive signal; a switch configured to operate in first and second states, the switch in the first state operable to receive the unbalanced transmit signal from the transformer and transfer the unbalanced transmit signal to an amplifier circuit and receive an amplified transmit signal from the amplifier circuit and transfer the amplified transmit signal to a filter, the switch in the second state operable to receive a first filtered receive signal from the filter and transfer the first filtered receive signal to the amplifier circuit and receive the second filtered receive signal from the amplifier circuit and transfer the second filtered receive signal to the transformer; the amplifier circuit having circuitry configurable to operate in first and second modes, the circuitry of the amplifier circuit operating in the first mode as a power amplifier in response to receipt of a bias voltage having a first DC voltage to receive the unbalanced transmit signal from the switch and generate the amplified transmit signal, the circuitry of the amplifier circuit operating in the second mode as a low noise amplifier in response to receipt of the bias voltage having a second DC voltage different from the first DC voltage to receive the first filtered receive signal from the switch and generate the second filtered receive signal; the filter configured to receive the amplified transmit signal from the switch and attenuate frequencies outside a pass band to generate a filtered transmit signal and receive a receive signal and attenuate frequencies outside the pass band to generate the first filtered receive signal; wherein the circuitry of the amplifier circuit has an input node coupled to the switch, an output node coupled to the switch and a single bias voltage node that is configured to receive said bias voltage having the first and second DC voltages, said amplifier circuit operating to amplify a signal received at the input node for output at the output node, said circuitry of the amplifier circuit operating in response to receipt at said single bias voltage node of the first DC voltage as the power amplifier coupled between the input node and output node, and further operating in response to receipt at said single bias voltage node of the second DC voltage as the low noise amplifier coupled between the input node and output node.