Patent ID: 8521115

Claim:
A phase locked loop (PLL) circuit comprising: a voltage controlled oscillator (VCO) configured to generate an output based, at least in part, on a control voltage delivered via a control voltage line; a capacitor array coupled with the VCO via the control voltage line, the capacitor array configured to deliver a capacitive load to said control voltage based on a capacitor control signal; a threshold generator configured to: detect an ambient temperature associated with the PLL circuit, and generate a high threshold voltage and a low threshold voltage based, at least in part, on the ambient temperature; and a comparator processing unit coupled with the capacitor array and the threshold generator, the comparator processing unit configured to: determine whether said control voltage is greater than the high threshold voltage or less than the low threshold voltage, and provide the capacitor control signal to the capacitor array to modify the capacitive load delivered to said control voltage based on determining said control voltage is greater than the high threshold voltage or less than the low threshold voltage.