Patent ID: 7469367

Claim:
A method for reproducing data employing N phase clocks used in a digital phase-locked loop system which comprises: clock generating means for generating a reference clock based on a frequency of an input signal and means for generating the N phase clocks with a VCO by using the reference clock; pulse-length measuring means for measuring a pulse length of a playback signal generated by binarizing the input signal and using the N phase clocks so as to output pulse-length data, said method for reproducing data comprising: inputting a signal and generating a reference clock based on a frequency of the input signal; generating the N phase clocks with a VCO by using the reference clock; detecting a pulse length of a playback signal that is generated by binarizing the input signal, the pulse length being determined by using the N phase clocks so as to generate pulse-length data for the playback signal based on a timing relationship between changing points of the binarized input signal determined by the N phase clocks; and adjusting the VCO based upon the detected pulse length of the playback signal.