Patent ID: 7881142

Claim:
A storage device including: a memory cell array; an internal bias line which supplies a bias voltage to the memory cell array; a DC-DC converter section having an output line coupled to the internal bias line, the DC-DC converter section boosting an external voltage to supply a boosted voltage to the output line thereof; and a non-boosted voltage supply section having an output line coupled to the internal bias line for supplying a non-boosted voltage equal to or less than the external voltage to the output line thereof, wherein the non-boosted voltage supply section does not supply the non-boosted voltage to its output line when the internal bias line is maintained at the boosted voltage, wherein the DC-DC converter section does not supply the boosted voltage to its output line when the internal bias line is maintained at the non-boosted voltage, and wherein the non-boosted voltage supply section supplies the non-boosted voltage to the internal bias line before activation of the DC-DC converter and after activation of the DC-DC converter until the internal bias line reaches the boosted voltage.