Patent ID: 7495306

Claim:
An integrated circuit arrangement, comprising: a pin diode; a first doped region of a first conduction type, the first doped region arranged in the pin diode and near a surface; a second doped region of a second conduction type other than the conduction type of a region of the pin diode which is near the surface, the second doped region arranged in the pin diode and remote from the surface; an intermediate region arranged in the pin diode and arranged between the first doped region and the second doped region, and is undoped or is provided with doping which is weak in comparison with the doping of the first doped region; a bipolar transistor arranged near the surface, the bipolar transistor including a base region, an edge region adjoining the base region and near the surface, and an edge region adjoining the base region and remote from the surface; and a connection region arranged on the side of the edge region that is remote from the surface, the intermediate region including a constant dopant concentration profile in a section which begins at a depth at which the connection region begins and ends at a depth at which the connection region ends or including a dopant concentration profile that changes by less than one order of magnitude.