Patent ID: 8839162

Claim:
In a computer system having a processor and a memory, a method for modifying a logic circuit synthesis flow having automated instructions, the method comprising: receiving in the memory an automated circuit design input for a circuit design; receiving in the memory a custom decomposition side file having custom specifications to the automated circuit design input, bypassing the automated circuit design input for the circuit design, but leaving the automated circuit design input intact, wherein the custom decomposition side file includes only specifications for a portion of the logic circuit synthesis flow being expanded, thereby reducing redundancy of the logic circuit synthesis flow, wherein the specifications for the portion that are included in the custom decomposition side file define one implementation of the portion while specifications for the portion that are included in the automated circuit design input define a plurality of different implementations of the portion; synthesizing high level logic from the automated circuit design input in the processor; placing logic on the circuit design in the processor; refining the circuit design in the processor; and generating a circuit description from the circuit design in the processor.