Patent ID: 7366001

Claim:
A semiconductor device comprising: a plurality of bit lines extending in a first direction; a plurality of search lines extending in the first direction, each said search line being paired with a corresponding one of the bit lines; a plurality of word lines extending in a second direction orthogonal to the first direction; a plurality of main-match lines extending in the second direction; a plurality of sub-match lines extending in the second direction, each said sub-match line being paired with a corresponding one of the main match lines; a plurality of memory cells arranged at respective crossing points of the plurality of bit lines and the plurality of word lines; a plurality of sub-match detectors connected to corresponding ones of the sub-match lines; and a plurality of main-match detectors connected to corresponding ones of the main-match lines; wherein each said memory cell is connected to a corresponding one of the sub-match lines and is also connected to a corresponding one of the main-match lines through the corresponding sub-match detector, information inputted through the plurality of search lines and information stored in the memory cells are compared in the memory cells, and the stored information includes one or more blocks of code, each said block of code having a plurality of bits, and at least one of said bits per block of code has a logic value of ‘1’.