Patent ID: 6930376

Claim:
A semiconductor device comprising in the following order: a substrate; a first layer; a second layer; and a third layer, said second layer comprising a stacked structure of a plurality of semiconductor layers having different lattice constants respectively, said third layer comprising a main region, a first support region and a second support region, said first and second support regions respectively connecting with said main region through first and second lines and respectively connecting with the surrounding region through third and fourth lines, said first, second, third and fourth lines being arranged parallel to each other, a separating groove having a depth reaching said first layer from said third layer so as to surround said main region, said first support region and said second support region in a portion excluding said first, second, third and fourth lines, and said first layer in said main region, said first support region and said second support region being selectively removed, and said second layer being folded in a valley shape at said third and fourth lines and folded in a mountain shape at said first and second lines by a strain exerted in said second layer, said first and second support regions standing on said third layer on said substrate, and said main region being opposed to said substrate with spacing.