Patent ID: 6858887

Claim:
A bipolar junction transistor (BJT) fabricated with a process having a minimum process dimension of X μm and a minimum alignment tolerance, comprising: a semi-insulating substrate, a subcollector formed on said substrate, a collector formed on said subcollector, a first metal contact on said subcollector which provides a collector contact for said BJT, a base formed on said collector, an emitter formed on said base, a cross-shaped second metal contact on said emitter which provides an emitter contact for said BJT, said emitter contact comprising two perpendicular arms which intersect at a central area, the width of each of said arms being about equal to X μm; an inter-level dielectric layer on said emitter contact; and a via through said inter-level dielectric layer which provides access to said emitter contact, said via being square-shaped, centered over the center point of said central area, and oriented at a 45° angle to said arms such that said via can be sized as large as possible while maintaining said minimum alignment tolerance with respect to the boundaries of said emitter contact.