Patent ID: 8165420

Claim:
A noise reduction circuit, comprising: a representative-value calculator configured to calculate a representative value of signal values of pixels included in each of a plurality of divided regions of a neighboring region of a pixel of interest, the divided regions obtained by dividing the neighboring region by the predetermined number of divisions, the number of divisions determined based on a frequency band in an input image signal; a difference-absolute-value calculator configured to calculate a difference absolute value between a signal value of the pixel of interest and each of the representative values of the respective divided regions; a weight calculator configured to calculate a weight for each of the representative values of the respective divided regions according to the difference absolute value; a sum-of-product operation circuit configured to perform a sum-of-product operation on the representative values of the respective divided regions calculated by the representative-value calculator, and the weights for the representative values of the respective divided regions calculated by the weight calculator; and a normalization processor configured to normalize the sum of products calculated by the sum-of-product operation circuit, and configured to output the normalized data.