Patent ID: 7872283

Claim:
A semiconductor integrated circuit, comprising: an internal circuit; and a plurality of input/output (I/O) circuits that are arranged side by side outside the internal circuit, that output a signal of the internal circuit to outside or input a signal of outside to the internal circuit, and on which pads are arrangeable, the plurality of I/O circuits including at least two kinds of I/O circuit differing in height in a direction toward the internal circuit, the at least two kinds of I/O circuit including: an n-pad I/O circuit on which the n-pads (n being an integer equal to or larger than one) are arranged in a direction toward the internal circuit, and an m-pad I/O circuit on which the m-pads (m being an integer larger than n) are arranged in a direction toward the internal circuit, wherein: each of the n-pad I/O circuit and the m-pad I/O circuit includes power source wirings extending in a direction of arrangement of the I/O circuits, and at least one of the power source wirings is positioned at a different height from an outer edge between the n-pad I/O circuit and the m-pad I/O circuit; and between the n-pad I/O circuit and the m-pad I/O circuit arranged side by side, a power source wiring migration area is formed in which power source wirings for connecting the power source wirings of the n-pad I/O circuit with the power source wirings of the m-pad I/O circuit are formed.