Patent ID: 7038325

Claim:
A wiring tape for a semiconductor device, which comprises a wiring layer comprising an insulating layer and a wiring on the insulating layer, one end of the wiring being connected to terminals on a semiconductor chip and the other end of the wiring being connected to external terminals for connecting to a package substrate; and a three-layered buffer elastomer layer bonded to a wiring-formed side of the wiring layer, the buffer elastomer layer comprising a structure having interconnected foams or a three-dimensional reticular structure, an adhesive layer provided on the semiconductor chip-facing side of the structure having interconnected foams or the three-dimensional reticular structure, to bond to the semiconductor chip and another adhesive layer provided on the other side of the structure, to bond to the wiring-formed side of the wiring layer to relax thermal stress generated between the semiconductor chip and the package substrate during heating.