Patent ID: 7279711

Claim:
A ferroelectric liquid crystal display device having a CMOS circuit comprising an n-channel TFT and a p-channel TFT, said CMOS circuit comprising: each gate electrode of said n-channel TFT and said p-channel TFT having a first conductive layer being in contact with a gate insulating film, a second conductive layer being in contact with said first conductive layer and a third conductive layer being in contact with said gate insulating film, side surfaces of the first conductive layer and top and side surfaces of said second conductive layer; a semiconductor layer of said n-channel TFT comprising a first channel formation region, a pair of LDD regions and first source and drain regions; and a semiconductor layer of said p-channel TFT comprising a second channel formation region and second source and drain regions, wherein said second conductive layer comprises a different material from said first conductive layer; wherein a portion which said third conductive layer is in contact with said gate insulating film in said n-channel TFT partially overlaps said pair of LDD regions; wherein a portion which said third conductive layer is in contact with said gate insulating film in said p-channel TFT partially overlaps said second source and drain regions, wherein said semiconductor layer of said p-channel TFT has no LDD regions.