Patent ID: 8379787

Claim:
A spread spectrum clock generator, comprising: a phase locked loop generating an output clock according to a first input clock and a second input clock; a delay line coupled between the first input clock and the phase locked loop; a modulation unit providing a modulation signal to control the delay line thereby modulating phase of the first input clock, such that frequency of the output clock generated by the phase locked loop varies periodically; a calibration unit generating an output signal for controlling a scaling ratio; a scaling unit scaling the modulation signal from the modulation unit, according to an output from a calibration unit, and outputting to the delay line; and a frequency divider outputting the second input clock according to the output clock from the phase locked loop, in which the frequency divider divides the output clock by division factors of X or Y according to the modulation signal, wherein X and Y are integers and X>Y.