Patent ID: 7769116

Claim:
A method of phase correction in a communication receiver having in-phase (I) and quadrature (Q) channels, each channel having a variable gain amplifier (VGA) having an output coupled to an analog to digital converter (ADC) providing digital outputs ranging from a lowermost digital value to an uppermost digital value, comprising: accumulating for a first period of time, the product of the output of the ADC in the I channel and the output of the ADC in the Q channel; inverting an input of the VGA in a first of the I and Q channels and inverting the output of the ADC in a second of the I and Q channels; accumulating for a second period of time equal to the first period of time, the product of the output of the ADC in the I channel and the output of the ADC in the Q channel; and, adjusting the phase between the I and Q channels responsive to the sum of the products accumulated during the first and second time periods to reduce the phase error.