Patent ID: 8848426

Claim:
A cross-point variable resistance nonvolatile memory device comprising: a cross-point memory cell array including memory cells each including (i) a variable resistance element that reversibly changes at least between a low resistance state and a high resistance state when different voltages are applied to the variable resistance element and (ii) a current steering element that is connected in series with the variable resistance element and has nonlinear current-voltage characteristics, the memory cells being placed at respective cross-points of a plurality of bit lines and a plurality of word lines; a column decoder and pre-charge circuit which pre-charges a selected bit line to a first voltage in a first pre-charge period among the first pre-charge period, a second pre-charge period, and a sense period that are included in this order in a period of a read operation which determines whether a selected memory cell selected from the memory cells is in the low resistance state or the high resistance state, the selected bit line being one of the bit lines which is connected to at least the selected memory cell; a low decoder driver which pre-charges a selected word line to the first voltage in the first pre-charge period and the second pre-charge period, and which sets the selected word line to a third voltage in the sense period, the selected word line being one of the word lines which is connected to at least the selected memory cell, the third voltage being different from the first voltage; a feedback controlled bit line voltage clamp circuit which sets the selected bit line to a second voltage and maintains the second voltage in the second pre-charge period and the sense period; and a sense amplifier circuit which determines in the sense period, according to an amount of current flowing through the selected memory cell, whether the variable resistance element in the selected memory cell is in the low resistance state or the high resistance state.