Patent ID: 6855969

Claim:
A semiconductor device comprising: a first gate electrode formed in a surface region of an insulating film; a first gate insulating film formed on the first gate electrode; a semiconductor layer formed on the first gate insulating film; source and drain regions separately formed at least in a surface region of the semiconductor layer; source and drain electrodes respectively formed on the source and drain regions while positions of side wall surfaces thereof which face each other are substantially aligned with positions of both side wall surfaces of the first gate electrode in a direction perpendicular to the surface of the insulating film; a second gate insulating film formed on a portion of the semiconductor layer which lies between the source and drain electrodes; and a second gate electrode formed on the second gate insulating film and electrically isolated from the source and drain electrodes, the second gate electrode being formed in self-alignment with the first gate electrode, wherein the source and drain electrodes have a same thickness as the second gate electrode.