Patent ID: 8207779

Claim:
A control circuit for controlling a field effect transistor (FET) having a source terminal, a drain terminal, and a gate terminal, the control circuit comprising a first node for coupling to the source terminal of the FET, a second node for coupling to the drain terminal of the FET, a third node for coupling to the gate terminal of the FET, a first transistor coupled to the third node, a second transistor, a first diode coupled between the first transistor and the first node, and a second diode coupled between the second transistor and the second node, the first diode directly coupled to the first node, the second diode directly coupled to the second node, the control circuit configured to allow current flow in only one direction between the source and drain terminals of the FET when the first node is connected to the source terminal, the second node is connected to the drain terminal, and the third node is connected to the gate terminal.