Patent ID: 7052972

Claim:
A method used to form a semiconductor device, comprising: forming a layer to be etched; depositing a first amorphous carbon layer on the layer to be etched; patterning the first amorphous carbon layer to form an opening therein defined by first and second cross-sectional sidewalls of the first amorphous carbon layer; depositing a conformal second amorphous carbon layer such that the second amorphous carbon layer contacts the sidewalls of the first amorphous carbon layer; spacer etching the second amorphous carbon layer to form first and second cross-sectional spacers, each of which contacts one of the first and second cross-sectional sidewalls of the first amorphous carbon layer; subsequent to forming the first and second cross-sectional spacers, etching the layer to be etched using the first and second amorphous carbon layers as a pattern to form an opening in the layer to be etched; subsequent to etching the layer to be etched, planarizing the first amorphous carbon layer and the first and second spacers using a mechanical polishing process, wherein the planarizing removes the first amorphous carbon layer and the first and second spacers; and forming a conductive layer within the opening of the layer to be etched.