Patent ID: 7852639

Claim:
A rectifier circuit connectable between a pair of input lines and a pair of output lines, comprising: a plurality of field effect transistors coupled together to define a rectifier circuit, said plurality of field effect transistors comprising: a first and second field effect transistor of a first channel type, a source-drain path of said first field effect transistor connected in series with a source-drain path of said second field effect transistor to form a first series transistor combination connected across said input lines, wherein a shoot-through current can occur when said first and second field effect transistors conduct simultaneously; a third and fourth field effect transistor of a second channel type different from said first channel type, a source-drain path of said third field effect transistor connected in series with a source-drain path of said fourth field effect transistor to form a second series combination connected across said input lines, wherein a shoot-through current can occur when said third and fourth field effect transistors conduct simultaneously; a control circuit configured to generate a control signal when said control circuit detects that an instantaneous input voltage across said input lines is approaching zero; and a switching device provided for each of said field effect transistors, said switching device connected between a gate and a source of a respective one of said field effect transistors and configured to prevent said shoot-through current by selectively disabling a conduction channel extending between said source and a drain of said respective one of said field effect transistors in response to said control signal.