Patent ID: 8112754

Claim:
A multiprocessor system, comprising: a plurality of processor units that can operate in parallel; a body-bias control circuit; and a control processor unit, wherein each of the processor units includes an internal circuit consisting of silicon-on-insulator-structured SOI/MOS transistors provided with a back gate electrode isolated from other MOS transistors respectively, wherein each of the processor units is driven synchronously with a clock signal, wherein the body-bias control circuit outputs a body-bias voltage to the back gate electrode of each of the SOI/MOS transistors of the internal circuit, wherein the control processor unit makes task scheduling so as to enable the processor units to process a plurality of tasks in parallel by taking into consideration the dependency among those tasks, wherein the control processor unit generates control data used to control the body-bias voltage and the frequency of the clock signal for each of the processor units and determines the control data upon making the task scheduling so as to shorten the processing time of a first task that could affect the start of the processing of one object task; and wherein the control processor unit, when a different task that could affect the start of the processing of the one object task is to be processed in parallel of the processing of the first task, determines the control data so as to raise the threshold voltage of the SOI/MOS transistors and lower the frequency of the clock signal with respect to the internal circuit of the processor unit that processes the different task so as not to end the processing of the different task after that of the first task.