Patent ID: 7605611

Claim:
A buffer, comprising: a primary pull-up pre-driver operably coupled to a primary pull-up transistor; a secondary pull-up pre-driver operably coupled to a secondary pull-up transistor; a primary pull-down pre-driver operably coupled to a primary pull-down transistor; a secondary pull-down pre-driver operably coupled to a secondary pull-down transistor; and at least one clamping device, wherein each of the primary pull-up transistor, the secondary pull-up transistor, the primary pull-down transistor, and the secondary pull-down transistor is coupled to one or more clamping devices of the at least one clamping device and at least one of a gate of the primary pull-up transistor, a gate of the secondary pull-up transistor, a gate of the primary pull-down transistor, and a gate of the secondary pull-down transistor is coupled to a clamping device of the at least one clamping device; wherein the primary pull-up pre-driver, the secondary pull-up pre-driver, the primary pull-down pre-driver, and the secondary pull-down pre-driver are each configured to provide a sufficiently low voltage to a gate of the transistor operably coupled thereto so as to sustain a gate dielectric integrity of the transistor.