Patent ID: 7449713

Claim:
A semiconductor memory device comprising: a semiconductor substrate; a semiconductor layer of one conductivity type formed on a principal surface of the semiconductor substrate; a source/drain layer formed on the principal surface of the semiconductor substrate with being in contact with one end of the semiconductor layer, the source/drain layer having a conductivity type opposite to the conductivity type of the semiconductor layer; a first insulating film formed on one side surface of the semiconductor layer; a second insulating film formed on another side surface of the semiconductor layer opposed to the one side surface; a first gate electrode formed on the one side surface of the semiconductor layer via the first insulating film; and a second gate electrode formed on the other side surface of the semiconductor layer via the second insulating film, the second gate electrode opposed to the first gate electrode, wherein: information stored in the semiconductor layer is detected on a basis of a current flowing in a direction extending from the first gate electrode to the second gate electrode.