Patent ID: 8471539

Claim:
A low drop out (LDO) voltage regulator, comprising: an error amplifier, for generating a control voltage according to a first reference voltage and a feedback voltage; a power transistor, comprising a gate coupled to the error amplifier and a source coupled to a supply voltage, for generating an output voltage at a drain of the power transistor according to the control voltage; a first voltage division unit, coupled between the drain of the power transistor and a ground, for dividing the output voltage to generate the feedback voltage; a compensation control unit, coupled between the gate and the drain of the power transistor, for generating a compensation control signal according to the control voltage, the output voltage, and a compensation bias, wherein the compensation bias is inversely proportional to the supply voltage and ambient temperature; and a compensation bias current source, coupled to the error amplifier, for supplying a compensation bias current to the LDO voltage regulator according to the compensation control signal.