Patent ID: 8656109

Claim:
A system for background destaging storage tracks from cache when at least one host is idle, the system comprising: a write cache configured to store a plurality of storage tracks and configured to be coupled to the at least one host; and a processor coupled to the write cache, wherein the processor comprises code that, when executed by the processor, causes the processor to: monitor the write cache for write operations from the at least one host, determine if the at least one host is idle based on monitoring the write cache for write operations from the at least one host, destage storage tracks from the write cache if the at least one host is idle, and refrain from destaging storage tracks from the write cache if the at least one host is not idle, wherein the write cache is partitioned into a plurality ranks each comprising portion of the plurality of storage tracks, the processor is further configured to: monitor each rank for write operations from the at least one host; and determine if the at least one host is idle with respect to each respective rank based on monitoring each rank for write operations from the at least one host such that the at least one host may be determined to be idle with respect to a first rank and not idle with respect to a second rank.