Patent ID: 6869827

Claim:
A method of stacking a plurality of semiconductor die comprising: providing a first semiconductor die defining a first active surface, said first active surface including at least one conductive bond pad; providing a second semiconductor die defining a second active surface, said second active surface including at least one conductive bond pad; positioning an intermediate substrate between said first active surface of said first semiconductor die and said second active surface of said second semiconductor die such that a first surface of said intermediate substrate faces said first active surface and such that a second surface of said intermediate substrate faces said second active surface; electrically coupling said first semiconductor die to said intermediate substrate by at least one topographic contact extending from said first active surface to said first surface of said intermediate substrate such that said topographic contact defines a space between said first active surface and said first surface of said intermediate substrate; securing said second semiconductor die to said second surface of said intermediate substrate such that said conductive bond pad of said second semiconductor die is aligned with a passage formed through said intermediate substrate and such that said second semiconductor die is positioned within a cavity defined in said second surface of said intermediate substrate; electrically coupling said second semiconductor die to said intermediate substrate by at least one conductive line extending from said conductive bond pad of said second semiconductor die, through said space defined between said first active surface and said first surface of said intermediate substrate, through said passage defined in said intermediate substrate, and to a conductive contact on said first surface of said intermediate substrate; positioning a printed circuit board such that a first surface of said printed circuit board faces said second surface of said intermediate substrate and such that said second semiconductor die is positioned between said printed circuit board and said intermediate substrate; and forming a plurality of topographic contacts extending from said second surface of said intermediate substrate to said first surface of said printed circuit board.