Patent ID: 7772643

Claim:
A semiconductor device comprising: a semiconductor substrate; a metal gate pattern comprising a polysilicon layer formed on the semiconductor substrate, a barrier metal layer formed on the polysilicon layer, a tungsten layer formed on the barrier metal layer, the metal gate pattern having a sidewall; a silicon oxide layer formed on the sidewall of the metal gate pattern; and a silicon nitride layer formed on the silicon oxide layer at the sidewall of the metal gate pattern, wherein the metal gate pattern has a gate length less than 90 nm, wherein the silicon oxide layer contacts a sidewall of the polysilicon layer, wherein the silicon oxide layer comprises a first portion and a second portion, the first portion of the silicon oxide layer being located directly on the sidewall of the polysilicon layer and the second portion of the silicon oxide layer being located on a sidewall of the tungsten layer, wherein the first portion is thicker than the second portion.