Patent ID: 8618971

Claim:
A digital-to-analog converter (DAC) comprising: (a) a coarse ladder including a first linear sequence of series-connected coarse ladder resistive devices, and a plurality of coarse ladder nodes coupled between various series-connected coarse ladder resistive devices, respectively; (b) a fine ladder including a second linear sequence of series-connected MOS (metal oxide semiconductor) fine ladder transistors coupled between a first conductor and a second conductor and biased to operate in their deep triode regions, a first group of parallel-connected MOS programmable bit-shifting transistors each coupled between the first conductor and a third conductor, and a second group of parallel-connected MOS programmable bit-shifting transistors each coupled between the third conductor and a top conductor, and a third group of parallel-connected MOS programmable bit-shifting transistors each coupled between a bottom conductor and a fourth conductor, and a fourth group of parallel-connected MOS programmable bit-shifting transistors each coupled between the second conductor and the fourth conductor, the programmable bit-shifting transistors being programmable to be either turned either on or off, respectively, in response to a plurality of bit-switching bits of a binary number to be converted; and (c) bit-shifting resistor switching circuitry including a plurality of bit-shifting switching transistors configured to couple a predetermined one of the bottom conductor, the fourth conductor, the third conductor and the top conductor to a DAC output conductor in response to the plurality of bit-switching bits to provide increased resolution of the DAC.