Patent ID: 7760533

Claim:
A stacked die device having a plurality of semiconductor devices, comprising: an electrical node; a first semiconductor device having a plurality of terminals, one of which is coupled to the node, the first device having an output buffer configured to generate and provide an output signal to the terminal coupled to the node in response to an input signal, the first device further having an arbitration circuit coupled to the input of the output buffer and the node and configured to compare the logic states of the input signal and the node and generate a signal indicative of a mismatch; and a second semiconductor device having a plurality of terminals, one of which is coupled to the node, the second device having an output buffer configured to generate and provide an output signal to the terminal coupled to the node in response to an input signal, the second device further having an arbitration circuit coupled to the input of the output buffer and the node and configured to compare the logic states of the input signal and the node and generate a signal indicative of a mismatch.