Patent ID: 8604516

Claim:
A field effect transistor, comprising: a substrate; a first group III nitride semiconductor layer formed on the substrate; a second group III nitride semiconductor layer formed on the first group III nitride semiconductor layer, and having a band gap wider than that of the first group III nitride semiconductor layer; a source electrode and a drain electrode formed on the second group III nitride semiconductor layer, and a gate electrode formed between the source electrode and the drain electrode; and a field plate formed on the second group III nitride semiconductor layer to be connected to the gate electrode or the source electrode, and to cover an edge of the gate electrode closer to the drain electrode, wherein the first group III nitride semiconductor layer has a low carbon concentration region having a carbon concentration of less than 1×10 17 cm −3 , and located in at least a region under the edge of the gate electrode closer to the drain electrode, a thickness d 2 (μm) of the low carbon concentration region satisfies V m /(110 ·d 1)≦ d 2< V m /(110 ·d 1)+0.5 where d 1 (μm) is a thickness of a group III nitride semiconductor layer including the first group III nitride semiconductor layer and the second group III nitride semiconductor layer, and V m (V) is an operating breakdown voltage, and a ratio of R on to R on0 , which is an index of a current collapse value, satisfies R on /R on0 ≦3 where R on0 is an on-state resistance in a relaxed state, and R on is an on-state resistance measured 100 μs after a transition from an off state to an on state under an operating voltage V m .