Patent ID: 7443202

Claim:
A semiconductor device comprising: a first capacitor, a second capacitor, a first transistor, a second transistor, a third transistor, and a fourth transistor, wherein: a first electrode of the first capacitor is electrically connected to a third wiring, and a first electrode of the second capacitor is electrically connected to a fourth wiring; a gate of the first transistor is electrically connected to a second electrode of the first capacitor; a first terminal of the first transistor is electrically connected to a second wiring, and a second terminal of the first transistor is electrically connected to a second electrode of the second capacitor; a gate of the second transistor is electrically connected to the second electrode of the second capacitor; a first terminal of the second transistor is electrically connected to the second wiring, and a second terminal of the second transistor is electrically connected to the second electrode of the first capacitor; a gate of the third transistor is electrically connected to the second electrode of the second capacitor; a first terminal of the third transistor is electrically connected to the second wiring, and a second terminal of the third transistor is electrically connected to a fifth wiring; and a gate and a first terminal of the fourth transistor are electrically connected to a first wiring, and a second terminal of the fourth transistor is electrically connected to the fifth wiring.