Patent ID: 8871594

Claim:
Process for manufacturing a power integrated device comprising: in a semiconductor body, forming projections and depressions which extend in a first direction and are arranged alternated in succession in a second direction, transverse to the first direction; forming at least a first conduction region and a second conduction region, so as to define a current flow direction between the first conduction region and the second conduction region parallel to the first direction, along the projections and the depressions; and forming at least a control region between the first conduction region and the second conduction region, wherein forming the projections and the depressions comprises selectively oxidizing first portions of the semiconductor body which extend in the first direction and correspond to respective depressions wherein the first conduction region, the second conduction region and the control region extend continuously along the second direction transversely to the projections and the depressions and wherein the control region, which extends continuously along the second direction transversely to the projections and the depressions in a completed power integrated device, controls current flow in the current flow direction along both the projections and the depressions.