Patent ID: 8796116

Claim:
A method of reducing the metal content of a silicon on insulator structure comprising: forming a sacrificial oxide layer on a front surface of a silicon device layer of a silicon on insulator structure, the silicon on insulator structure comprising a handle wafer, the silicon device layer and a dielectric layer between the handle wafer and the silicon layer, the dielectric layer and silicon device layer forming an interface between the dielectric layer and silicon device layer, the sacrificial oxide layer and the silicon device layer forming an interface between the sacrificial oxide layer and the silicon device layer; heating the silicon on insulator structure having a sacrificial oxide layer thereon to a temperature T 1 sufficient to dissolve all metal precipitates present in the device layer for a time t 1 sufficient to allow metal atoms to evenly disperse throughout the device layer, wherein the dissolved metal atoms have a chemical potential at the sacrificial oxide layer-silicon device layer interface lower than the chemical potential for the atoms within the bulk of the device layer such that the atoms become pinned at the sacrificial oxide layer-silicon device layer interface and the silicon device layer-dielectric layer interface; cooling the silicon on insulator structure from T 1 to a temperature T 2 at which the metal atoms are substantially immobile in silicon at an average cooling rate R the cooling rate being sufficiently high enough to cause substantially no metal precipitation to occur in the silicon device layer during cooling, the metal atoms migrating to their lowest chemical potential at the sacrificial oxide layer-silicon device layer interface and the silicon device layer-dielectric layer interface; and removing the sacrificial oxide layer and a portion of the metal atoms at the sacrificial oxide layer-silicon device layer interface from the silicon-in-insulator structure.