Patent ID: 7870233

Claim:
A configurable hardware kernel plane for a reconfigurable communication device comprising: a plurality of hardware kernels coupled to a reconfigurable interconnect, said interconnect operable to route data and control information between said hardware kernels; and a data bus operable to receive data from the plurality of hardware kernels, said data bus comprising an input data line portion coupled to a first side of the reconfigurable interconnect and an output data line portion coupled to a second side of the reconfigurable interconnect; wherein at least one of the plurality of hardware kernels includes a configuration information block and a satellite kernel block, the configuration information block and the satellite kernel block coupled to each other by another interconnect; and the satellite kernel block includes an input/output data line for providing communication with the reconfigurable interconnect; and the configuration information block is coupled with a reconfiguration bus via a configuration line, said configuration line being a bus into the configuration information block or a single line with multiplexed data.