Patent ID: 7200784

Claim:
A scan flip-flop, comprising: a Scan_In port; a Data_In port; a Scan_Enable port; a CLK port; a Data_Out port; and having a means to: capture data from said Data_In port in one state of a signal on said Scan_Enable port by applying a change to a signal on said CLK port thereby changing said signal on said CLK port to a pre-defined CLK state; capture data from said Scan_In port in a different state of the signal on said Scan_Enable port by applying said change to said signal on said CLK port, thereby changing it to said pre-defined CLK state; disable loading data from either of said Scan_In port and said Data_In port in a state other than said pre-defined CLK state of said signal on said CLK port; and enable reflecting captured data at said Data_Out port by applying said state other than said pre-defined CLK state on said CLK port combined with applying said one state of a signal on said Scan_Enable port, reflected data on said Data_Out port being held constant at other times.