Patent ID: 7877541

Claim:
A method for accessing a non-volatile memory array, comprising: providing at least one two-terminal cross-point non-volatile memory array positioned in at least one memory plane that is in contact with and is fabricated directly above a semiconductor substrate including memory logic fabricated on the semiconductor substrate and electrically coupled with the at least one two-terminal cross-point non-volatile memory array, each two-terminal cross-point non-volatile memory array including a plurality of two-terminal memory cells, each two-terminal memory cell consisting of a single two-terminal memory element having a terminal electrically coupled with a first terminal of its respective two-terminal memory cell and another terminal electrically coupled with a second terminal of its respective two-terminal memory cell, wherein the memory logic is operative to randomly access the at least one two-terminal cross-point non-volatile memory array for reading or writing at least a single bit of data and wherein writing data to one or more of the plurality of two-terminal memory cells does not require a prior erase operation or a prior block erase operation to the one or more of the plurality of two-terminal memory cells; providing a file structure associated with the at least one two-terminal cross-point non-volatile memory array, the file structure including a header section and a data section; receiving data and a memory address associated with the data; skipping over the header section; and writing the data to the data section at the memory address without rewriting the header section.