Patent ID: 8395403

Claim:
A semiconductor device comprising: at least 2N resistor patterns having a fixed form and being divided into N groups; and a plurality of measuring pads, wherein N is an integer of at least 2, wherein the resistor patterns comprised within each group are connected in series to form a plurality of resistor pattern series within each group, wherein the resistor patterns of each group are arranged to be in parallel with respect to resistor patterns of other group or groups forming a sequence and to be at an equal pitch, so that (N−1) resistor pattern(s) of the group or groups other than a first group of the N groups is interposed between a first resistor pattern and a second resistor pattern of the first group of the N groups; wherein said plurality of resistor pattern series of each group are connected in series via inter-group wirings, and wherein said plurality of measuring pads are respectively connected to both ends of each resistor pattern series of the plurality of resistor pattern series and to each of said inter-group wirings.