Patent ID: 7733023

Claim:
A process for manufacturing a plasma display panel ( 80 ; 90 ) comprising the following steps: manufacturing a front glass panel (FP) of a plasma display panel comprising pairs of supporting electrodes (E 1 ) and scanning electrodes (E 2 ), a layer of dielectric material (DF) for protection of the electrodes and a layer (M) of magnesium oxide covering the layer of dielectric material; manufacturing a rear glass panel (RP) of a plasma display panel comprising barriers (R) defining channels (C) or cells in a finished display, address electrodes (AE) and phosphors (PR; PG; PB); forming getter material deposits ( 63 , 63 ′, . . . ; 72 , 72 ′, . . . ; 81 , 81 ′, . . . ; 91 , 91 ′, . . . , 92 , 92 ′, . . . ) on a free surface of the magnesium oxide layer at positions which will essentially correspond to contact areas between the front glass panel and the barriers on the rear glass panel when the panels are placed together; and subsequently placing the front and rear glass panels together and sealing along the outer perimeter of the front and rear glass panels, thus defining a closed space or a plurality of closed spaces inside the display panel.