Patent ID: 7558121

Claim:
A flash memory device comprising: an array having memory cells arranged in rows and columns; a high voltage generator configured to supply a high voltage to the array during a programming operation; a plurality of write buffers corresponding to selected memory cells and being configured to drive the selected memory cells with one of a program voltage or a program-inhibition voltage depending upon input data, each write buffer being configured to consume a dummy cell current when the input data is program-inhibited data; a current-voltage conversion circuit connected to each of the plurality of write buffers through a common sensing line, supplying a current to the plurality of write buffers as the dummy cell current through the common sensing line and outputting a voltage proportional to the current supplied to the plurality of write buffers; and a current sink circuit configured to discharge a current from an output of the high voltage generator in response to a voltage output from the current-voltage conversion circuit.