Patent ID: 8832371

Claim:
A storage system, comprising: multiple flash memory packages each having multiple flash memory chips, each including multiple physical blocks and a package controller for controlling access to data in a physical storage area of the flash memory chip and providing logical storage area, which is recognized by using multiple logical addresses, corresponding to the physical storage area, each of the multiple physical blocks is a unit of data erasure, and a system controller configured to: control the multiple flash memory packages as a RAID group, send first RAID configuration information indicating that each of the logical addresses is related to store data or parity which is updated frequently rather than the data to each of the multiple flash memory packages before sending a write request to the multiple flash memory packages, provide multiple Logical Units (LUs) based on the RAID group, the LUs based on the same RAID group including LUs whose stripe block size are different, store the first RAID configuration information for managing a relationship between the RAID group and the LUs, generate second RAID configuration information for each of Flash memory packages (FMPKs) based on the first RAID configuration information, the second RAID configuration information for a FMPK indicating a LU number, a LU start address, a stripe block size, a parity stripe block start location, a parity stripe block cycle, for each LU based on the FMPK, and send the second RAID configuration information to each FMPK after configuring the LUs based on the FMPK and before sending a write request with respect to any of the LUs to the FMPK, wherein each package controller receives the first RAID configuration information from the system controller and maintains the first RAID configuration information in the flash memory package, each package controller receives a write request indicating a logical address to store write data from the system controller and is configured to determine whether the write data is data or parity based on the received logical address indicated in the received write request and the second RAID configuration information, when the write data is parity which is not sent in association with data and which is updated more frequently than data, the package controller stores the write data into a physical block with a large remaining number of erasures in the flash memory chip of the flash memory package and when the write data is data, the package controller stores the write data into a physical block with a small remaining number of erasures in the flash memory chip of the flash memory package.