Patent ID: 8193865

Claim:
An output circuit comprising: an analog amplifier circuit which comprises: a differential amplifier stage configured to receive an input voltage, and first to n th output systems (n is a natural number more than 1); first to n th output nodes; an output pad; and first to n th electrostatic protection resistances, wherein an i th output system (i is a natural number between 2 and n) of said first to n th output systems comprises: an i th PMOS transistor having a drain connected with said i th output node of said first to n th output nodes and a gate connected with a first output of said differential amplifier stage; and an i th NMOS transistor having a drain connected with said i th output node and a gate connected with a second output of said differential amplifier stage, and wherein said first to n th electrostatic protection resistances are respectively connected between said first to n th output nodes and said output pad.