Patent ID: 7433662

Claim:
An apparatus comprising: a driver having at least a pair of transistors disposed in a cascode arrangement and having their gate terminals coupled together to receive a bias voltage, their source terminals coupled to receive a differential drive current from a previous stage, and their drains coupled to differentially drive a load; and a plurality of shunt transistors coupled across the source terminals of the pair of cascode transistors to attenuate the drive current by diverting a portion of the drive current away from the pair of cascode transistors, in which the attenuation scales gain of an offset current coupled from the previous stage with gain of a signal coupled by the drive current, the plurality of shunt transistors to have the bias voltage switched to a gate terminal of each respective shunt transistor to activate one or more of the respective shunt transistors, wherein activation of a particular shunt transistor or transistors determines the portion of the drive current diverted to allow different gain settings to be selected for the driver.