Patent ID: 7800426

Claim:
A voltage level shifter with a reduced leakage current, comprising: a first switch module having a first transistor and a second transistor, each transistor having a drain, a gate, and a source, wherein the sources of the first and the second transistors are coupled to a first voltage terminal; a second switch module coupled between the drain of the first transistor and a second voltage terminal, the second switch module including at least four transistors whose gates are coupled to a low voltage input signal (a CORE_INPUT or CORE_INPUTb signal) and high voltage input signals (a GATE signal, a GATEb signal, an IO_INPUT signal and an IO_INPUTb signal), respectively, the low voltage input signal and the high voltage signals having a first voltage swing and a second voltage swing, respectively, wherein each of the GATEb, CORE_INPUTb, and IO_INPUTb signals is a complement of the GATE, CORE_INPUT, and IO_INPUT signals, respectively, and an output node is coupled to drains of two of the at least four transistors; and a third switch module coupled between the drain of the second transistor and the second voltage terminal, the third switch module including another four transistors whose gates are coupled to the low voltage input signal and the high voltage input signals, respectively, wherein the first, second, and third switch modules are designed to produce an output signal at the output node in response to only the high voltage input signals including IO_INPUT and the IO_INPUTb signals when the GATE signal is logic low, thereby reducing a leakage current.