Patent ID: 8741703

Claim:
A method for manufacturing a semiconductor device, comprising steps of: a) providing a fin of semiconductive material in a semiconductor layer of a SOI substrate by a self-alignment process, the fin having two opposing sides perpendicular to a main surface of the SOI substrate, wherein the two opposing sides comprise a first side and a second side; b) providing a stack of gate dielectric and gate conductor on only the first side of the fin, wherein the gate conductor extends laterally away from the first side of the fin in a gate extending direction parallel to the main surface of the SOI substrate; c) doping the semiconductor material of the fin at its other two opposing sides so as to provide a source region and a drain region, wherein each of the source region and the drain region has a portion extending laterally away from the second side of the fin in a source/drain extending direction parallel to the main surface of the SOI substrate, the source/drain extending direction being opposite to the gate extending direction; and d) providing a channel region at a central portion of the fin.