Patent ID: 8785296

Claim:
A packaging method with backside wafer dicing, wherein an active area of a semiconductor wafer comprises multiple semiconductor chips spaced-apart by scribe lines located at a front surface of the wafer, the method comprises the steps of: forming a support structure at the front surface of the wafer; grinding a backside opposite the front surface of the wafer to reduce a thickness of the wafer; depositing a metal layer on a centre area of the backside of the wafer after grinding, wherein a radius of the metal layer is less than a radius of the active area, thus forming a ring of bare wafer in the region between the edge of the metal layer and the edge of the wafer, wherein each scribe line in the front surface extending at least from a projection of the edge of the metal layer to the edge of the active area; detecting the scribe lines from the backside of the wafer; and cutting the wafer and the metal layer from the wafer backside along a straight line formed by extending a scribe line section detected from the wafer backside.