Patent ID: 8168492

Claim:
A method of forming a semiconductor device, comprising: providing a first transistor in a first region of a semiconductor layer, comprising: providing a cavity that extends in a vertical direction in the semiconductor layer; providing a first gate dielectric at a lower portion and inner sidewalls of the cavity; providing a gate electrode that fills a remaining portion of the cavity, the gate electrode extending in the vertical direction; providing a source region and a drain region in the semiconductor layer that are arranged at opposite sides of the gate electrode in a horizontal direction; and providing a lateral channel region of the semiconductor layer at a side of the gate electrode in a lateral direction that extends in the horizontal direction between the source region and the drain region wherein the lateral channel region of the first transistor comprises a first lateral channel region and a second lateral channel region at opposite sides of the gate electrode, each extending in the horizontal direction between the source region and the drain region; and providing a second transistor in a second region of the semiconductor layer, the second transistor comprising a planar transistor.