Patent ID: 7477615

Claim:
A transceiver for data transfer, the transceiver comprising: a pair of upstream differential signal lines connected to an upstream port; a pair of downstream differential signal lines connected to a downstream port; a pair of common differential signal lines used in common by the upstream port and the downstream port; a first transmission driver for a first transfer mode, an output of the first transmission driver being connected to the pair of upstream differential signal lines; a second transmission driver for the first transfer mode, an output of the second transmission driver being connected to the pair of downstream differential signal lines; a first switch circuit which connects an input of the first transmission driver to an output of a logic circuit which outputs transmission data when the upstream port is used, and connects an input of the second transmission driver to the output of the logic circuit when the downstream port is used; a second switch circuit which connects the pair of upstream differential signal lines to the pair of common differential signal lines when the upstream port is used, and connects the pair of downstream differential signal lines to the pair of common differential signal lines when the downstream port is used; and a third transmission driver for a second transfer mode which is lower in speed than the first transfer mode, an output of the third transmission driver being connected to the pair of common differential signal lines.