Patent ID: 8198674

Claim:
A semiconductor device comprising: a substrate; a first silicon pillar projecting substantially perpendicularly with respect to a main surface of the substrate; an interlayer dielectric film that covers the main surface of the substrate, the interlayer dielectric film having a through-hole into which a conductive material is buried, the through-hole having a lower-side opening that exposes an upper surface of the first silicon pillar and an upper side opening; a first diffusion layer formed in or neighboring an upper part of the first silicon pillar; a second diffusion layer formed in or neighboring a lower part of the first silicon pillar; a first-diffusion-layer contact plug provided on the upper-side opening of the through-hole so as to contact the conductive material within the through-hole; and a gate electrode that covers a side surface of the first silicon pillar via a first gate dielectric film, wherein an area of the lower-side opening of the through-hole is substantially equal to an area of the upper surface of the first silicon pillar, an area of the upper-side opening of the through-hole is larger than the area of the lower-side opening of the through-hole, and an area of a contact surface between the conductive material within the through-hole and the first-diffusion-layer contact plug is larger than the area of the upper surface of the first silicon pillar.