Patent ID: 8495287

Claim:
A method of debugging an embedded dynamic random access memory (eDRAM) element of a processor core, comprising: based on an error occurring in the eDRAM element, performing a) through e), comprising: a) stopping a functional clock of the processor core, and not stopping a refresh clock of the processor core, the stopping of the functional clock permitting debugging access to the eDRAM element; b) based on the functional clock being stopped, creating a fence signal that prevents all commands other than a refresh command, the refresh command being based on the refresh clock, from entering into the eDRAM element; c) initializing a line fetch controller of the processor core with at least one of write data and read data; d) restarting the functional clock; and e) performing at least one of write requests and read requests to the eDRAM element based on the at least one of the write data and the read data from the line fetch controller based on the functional clock.