Patent ID: 7160752

Claim:
A method fabricating a micro-electro-mechanical (MEM) device and an electronic device on a common substrate comprising the steps of: fabricating said electronic device comprising a plurality of electronic components on said common substrate; depositing a thermally stable interconnect layer on said electronic device; encapsulating the interconnected electronic device with a protective layer; forming a sacrificial layer over said protective layer; opening holes in the sacrificial layer and said protective layer to allow the connection of the MEM device to said electronic device; fabricating said MEM device by growing and patterning over said sacrificial layer at a temperature between 520 and 570° C. a laminated structure comprising at least one layer of un-doped amorphous silicon in compressive stress and at least one stress-compensating layer of in situ phosphorus-doped amorphous silicon in tensile stress; said un-doped amorphous silicon being grown by the pyrolisis of silane, and said phosphorus doped amorphous silicon being grown by the pyrolisis of silane in the presence of phosphine; said silane being introduced at a flow rate sufficient to ensure that the pyrolisis of silane is reaction rate limited; and removing at least a portion of said sacrificial layer to expose the MEM device comprising said laminated structure of un-doped amorphous silicon and phosphorous-doped amorphous silicon.