Patent ID: 8237262

Claim:
A substrate for an electronic circuit comprising from top to bottom: a first metal layer in direct contact with a second metal layer, a second metal layer in direct contact with a third metal layer, and the third metal layer in direct contact with a fourth metal layer, each respective metal layer having a center portion and a peripheral portion in direct contact with the center portion, the center portion of the first metal layer including ground and power portions, the peripheral portion of the first metal layer including one or more signal portions; the center portion of the second metal layer including one or more power portions and the peripheral portion of the second metal layer including one or more ground portions; the center and peripheral portions of the third metal layer including one or more ground portions; and the center portion of the fourth metal layer including one or more power portions, and the peripheral portion of the fourth metal layer including one or more ground portions, wherein the second metal layer and the third metal layer are devoid of signal portions.