Patent ID: 6887744

Claim:
A method of manufacturing a thin film transistor substrate comprising the steps of: forming a pattern of a semiconductor layer on or above an insulating substrate; forming a gate insulating film on the semiconductor layer; forming a gate electrode on the gate insulating film; introducing impurities into portions of the semiconductor layer, which are to be a source region and a drain region; forming an interlayer insulating film including a plurality of insulating films with mutually different dielectric constants on the semiconductor layer and the gate electrode; forming contact holes in portions of the interlayer insulating film, the portions being at least on the source region and the drain region; forming a transparent conductive film on the interlayer insulating film and inner surfaces of the contact holes; forming a metal film on the transparent conductive film; forming a interconnection electrode in a portion including the contact hole of the drain region by patterning the metal film while using the transparent conductive film as an etch stop layer; and forming a pixel electrode connected to the source region through the contact hole and forming the interconnection electrode connected to the drain region through the transparent conductive film in the contact hole by patterning the transparent conductive film.