Patent ID: 7200173

Claim:
An apparatus, comprising: a PWM waveform generator to generate a predictable pulse width modulated (PWM) signal, on a real-time basis, based on a sequence of combinations of programmed period and width values and their associated primary period and primary width updates received from a processor, wherein the PWM signal includes a sequence of PWM cycles, wherein each PWM cycle includes a PWM signal boundary, and wherein each of the received primary period and primary width updates occurs across or within each PWM signal boundary of a current PWM signal being generated, wherein the PWM waveform generator comprises: primary period and primary width storage elements, wherein the received period and width values are stored in the primary period and primary width storage elements upon receiving the primary period and primary width updates from the processor, respectively; secondary period and secondary width storage elements coupled to the primary period and primary width storage elements, respectively, to receive the period and width values from the primary period and primary width storage elements and to store the received period and width values in the secondary period and secondary width storage elements, respectively, upon receiving a secondary storage element write control signal; a tertiary period storage element coupled to the secondary period storage element to receive the period value from the secondary period storage element based on a tertiary period register write signal and to store the period value in the tertiary storage element; a down-counter coupled to the secondary width storage element and the tertiary period storage element to receive the width value from the secondary width storage element upon receiving a width update counter signal, wherein the down-counter to countdown the width value in each clock cycle until the down-counter reaches zero, wherein the period value is then loaded into the down-counter from the tertiary period storage element, wherein the down-counter counts down every clock cycle until it reaches zero, and wherein the down-counter generates an EXPIRE signal upon reaching the zero; and a final output waveform generator coupled to the down-counter to receive the EXPIRE signal from the down-counter and to generate the PWM signal on a real-time basis.