Patent ID: 8076752

Claim:
A capacitor on a semiconductor having accurate, high density capacitance between a first node corresponding to a top plate of the capacitor and a second node corresponding to a bottom plate of the capacitor, the capacitor comprising: one or more layers of conductive strips forming the capacitor, wherein for each pair of neighboring conductive strips within each of the one or more layers of conductive strips: a first conductive strip of the pair of neighboring conductive strips is coupled to the first node and not to the second node; and a second conductive strip of the pair of neighboring conductive strips is coupled to the second node and not to the first node; and a low-impedance conductive layer configured beneath a bottom layer of the one or more layers of conductive strips, and spanning an area underneath conductive strips coupled to the first node and conductive strips coupled to the second node, wherein the low-impedance conductive layer is electrically coupled to the first node and not to the second node to reduce charge transfers from the first node to the low-impedance conductive layer.