Patent ID: 8387239

Claim:
A manufacturing method of embedded circuit substrate, comprising: providing a core structure having a first surface and a second opposite to each other; providing a first conductive laminated structure having a first metal layer and a first patterned conductive layer disposed on the first metal layer, comprising: providing a sacrifice layer, a third metal layer disposed on the sacrifice layer and the first metal layer disposed on the third metal layer, wherein the third metal layer is located between the sacrifice layer and the first metal layer; forming a first mask layer on the first metal layer, wherein the first metal layer is located between the third metal layer and the first mask layer, and the first mask layer exposes a part of the first metal layer; forming the first patterned conductive layer on the part of the first metal layer exposed by the first mask layer; forming a second mask layer on the first mask layer, wherein the second mask layer exposes a part of the first patterned conductive layer; forming a plurality of first conductive blocks on the part of the first patterned conductive layer exposed by the second mask layer; removing the second mask layer and the first mask layer; and removing the third metal layer and the sacrifice layer; providing a second conductive laminated structure, wherein the second conductive laminated structure comprises: a second metal layer; and a second patterned conductive layer, disposed on the second metal layer; laminating the first conductive laminated structure and the second conductive laminated structure to the core structure and embedding the first conductive blocks into the core structure when laminating the first conductive laminated structure and the second conductive laminated structure to the core structure, wherein the first patterned conductive layer is embedded in the first surface of the core structure, and the second patterned conductive layer is embedded in the second surface of the core structure wherein the first patterned conductive layer and the second patterned conductive layer are conducted via the first conductive blocks; and removing the first metal layer and the second metal layer.