Patent ID: 7263457

Claim:
An integrated circuit, comprising: a plurality of logic cores, wherein at least one of the plurality of logic cores is configured to operate at a voltage level independent of a voltage level at which another of the plurality of logic cores operates, and wherein at least one of the logic cores is configured to operate at a frequency independent of a frequency at which another of the plurality of logic cores operates; a common interface unit, wherein the common interface unit is configured to provide an interface between the plurality of logic cores and one or more components external to the integrated circuit, wherein during operation the common interface unit is configured to communicate with ones of the plurality of logic cores operating at different voltage levels and ones of the logic cores operating at different frequencies; and power management logic configured to: adjust a current operating voltage level to a new operating voltage level for at least one of the plurality of logic cores; and detect an incompatibility between the new operating voltage and a current operating frequency of the at least one of the plurality of logic cores and, in response to said detecting, determine a compatible operating frequency for the at least one of the plurality of logic cores.