Patent ID: 7022578

Claim:
A method of manufacturing a heterojunction bipolar transistor comprising: providing a semiconductor substrate having a collector region; forming an intrinsic base region of a compound semiconductive material over the collector region; forming a reverse emitter window over a portion of the intrinsic base region; forming a polysilicon layer over the reverse emitter window and the remaining portion of the intrinsic base region; performing a chemical mechanical polish of the polysilicon layer to level the upper surface of the polysilicon layer with the upper surface of the reverse emitter window; recessing the polysilicon layer below the upper surface of the reverse emitter window to form an extrinsic base structure over a remaining portion of the intrinsic base region; growing a dielectric layer over the extrinsic base structure; processing the reverse emitter window to form an emitter window having a multi-layer reverse insulating spacer therein; forming an emitter structure in the emitter window; forming an interlevel dielectric layer over the collector region, extrinsic base structure and emitter structure; and forming connections through the interlevel dielectric layer to the collector region, the extrinsic base structure, and the emitter structure.