Patent ID: 8785956

Claim:
A chip package, comprising: a substrate having a first surface and a second surface; an optoelectronic device formed in the substrate; a through-hole extending from the second surface to the first surface; a conducting layer disposed on the substrate, having a portion overlying both sidewalls and a bottom of the through-hole, wherein the conducting layer is electrically connected to the optoelectronic device; an insulating layer disposed between the substrate and the conducting layer; a first light shielding layer disposed on the second surface of the substrate; and a second light shielding layer disposed on the first light shielding layer and directly contacting with the first light shielding layer, wherein a contact interface is between the first light shielding layer and the second light shielding layer, wherein the through-hole is partially filled with the first light shielding layer such that a void is formed between the bottom of the through-hole and the first light shielding layer in the through-hole, and wherein the portion of the conducting layer, which overlies both sidewalls and the bottom of the through-hole, directly contacts the void.