Patent ID: 7254082

Claim:
A semiconductor device comprising: a power source line; a first circuit block; a switching element which controls electrical connection and disconnection between said power source line and at least a part of said first circuit block, wherein said first circuit block includes a logic circuit; a flip-flop circuit which is controlled by a clock signal so as to latch an input signal to said logic circuit; and a first gate circuit which controls the clock signal so as to input or not input said clock signal to said flip-flop circuit, and wherein said semiconductor device has periods of states including: a first state in which said logic circuit is connected to said power source line by said switching element and said clock signal is allowed to be inputted to said flip-flop by said first gate circuit; a second state in which said logic circuit is disconnected from said power source line by said switching element and said clock signal is not allowed to be inputted to said flip-flop by said first gate circuit; and a third state in which said logic circuit is connected to said power source line by said switching element and said clock signal is not allowed to be inputted to said flip-flop by said first gate circuit.