Patent ID: 8310841

Claim:
An integrated circuit die stack comprising: a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the TSVs connected through switches to electronic circuitry on the first die, the first die personalized by opening on the first die one or more of the switches, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV comprising a conductive pathway through the first die with no connection to any circuitry on the first die; the second die, manufactured to be initially identical to the first die and later personalized by opening switches connecting TSVs to circuitry on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die, each TSV on the second die comprising a conductive pathway through the second die that is also connected to electronic circuitry on the second die; and an interface die mounted upon the substrate between the substrate and the first die splitting and connecting a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die.