Patent ID: 8809854

Claim:
A semiconductor device comprising: a first transistor comprising: a first channel formation region including a semiconductor material; and a first gate electrode overlapping with the first channel formation region, an insulating layer covering the first transistor and having a trench, wherein part of the first gate electrode is exposed without being covered with the insulating layer, a second transistor comprising: an oxide semiconductor film including a second channel formation region, wherein the second channel formation region is in contact with a bottom surface, a lower end corner portion, and an inner wall surface of the trench; a source electrode layer and a drain electrode layer over and in contact with the oxide semiconductor film; a gate insulating layer over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a second gate electrode layer over the gate insulating layer, wherein the lower end corner portion of the trench has a curved shape, wherein the second channel formation region contains indium and zinc, wherein the first channel formation region comprises a single crystal semiconductor, wherein the lower end corner portion has a curvature radius of longer than or equal to 20 nm and shorter than or equal to 60 nm, wherein the oxide semiconductor film includes crystals which contain indium and zinc and whose c-axes are aligned substantially perpendicular to a surface of the oxide semiconductor film at least in a region overlapping with the lower end corner portion, and wherein one of the source electrode layer and the drain electrode layer of the second transistor is in direct contact with the part of the first gate electrode exposed from the insulating layer.