Patent ID: 8773173

Claim:
A semiconductor device comprising: a circuit including a selection transistor; and a buffer circuit electrically connected to a gate of the selection transistor through a first signal line, wherein the buffer circuit comprises: a first inverter and a second inverter that are sequentially connected in series; and a bootstrap circuit, wherein an input terminal of the first inverter is electrically connected to an input signal line to which a selection signal is input, wherein an output terminal of the second inverter is electrically connected to the first signal line, wherein a high-potential input terminal of the first inverter is electrically connected to a second signal line to which a first potential is input, wherein low-potential input terminals of the first inverter and the second inverter are electrically connected to a third signal line to which a second potential lower than the first potential is input, and wherein the bootstrap circuit outputs a third potential higher than the first potential to a high-potential input terminal of the second inverter in response to the selection signal.