Patent ID: 7701065

Claim:
A device, comprising: a semiconductor chip having a plurality of first electrodes and a plurality of second electrodes arranged on a first surface of the semiconductor chip; a first electrically conductive layer applied over a first section of the first surface and electrically coupled to the first electrodes arranged within the first section; a second electrically conductive layer applied over the first electrically conductive layer and electrically coupled to the second electrodes arranged within the first section; a third electrically conductive layer applied over a second section of the first surface and electrically coupled to the second electrodes arranged within the second section; and a fourth electrically conductive layer applied over the third electrically conductive layer and electrically coupled to the first electrodes arranged within the second section, wherein the second electrically conductive layer is electrically coupled to the third electrically conductive layer, wherein the first electrically conductive layer is electrically coupled to the fourth electrically conductive layer, wherein a surface of the fourth electrically conductive layer opposite the third electrically conductive layer comprises an external contact surface for electrical connection to the first electrodes of both the first and second sections, and wherein a surface of the second electrically conductive layer opposite the first electrically conductive layer comprises another external contact surface for electrical connection to the second electrodes of both the first and second sections.