Patent ID: 8890252

Claim:
A semiconductor device comprising: a first conductivity type semiconductor layer; a drift layer having the first conductivity type, arranged on the semiconductor layer, and having an impurity concentration lower than the semiconductor layer; a base region having a second conductivity type, arranged on the drift layer opposite to the semiconductor layer; a first conductivity type impurity region arranged on the base region, and having an impurity concentration higher than the drift layer; a second conductivity type impurity layer arranged at a position deeper than the base region, and contacting the base region; a trench arranged on a surface of the base region, wherein the trench extends in a longitudinal direction, and the first conductivity type impurity region and the base region are arranged on both sides of the trench; a gate insulating film arranged on a surface of the trench; a gate electrode arranged in the trench through the gate insulating film; a front surface electrode electrically coupled to the first conductivity type impurity region and the base region; and a back surface electrode arranged on a back surface of the first conductivity type semiconductor layer opposite to the drift layer, wherein, when a voltage is applied to the gate electrode, an inversion layer is generated in a surface portion of the base region located on a side of the trench, wherein a current flows between the front surface electrode and the back surface electrode through the first conductivity type impurity region, the inversion layer, and the drift layer so that an inverting vertical semiconductor switching element is provided, wherein a p-n junction is provided between the base region and the drift layer so that a free wheel diode having a diode operation is provided, wherein the semiconductor switching element and the free wheel diode are arranged in one chip, wherein the trench includes a first trench and a second trench, wherein the first trench is deeper than the base region and reaches the drift layer, wherein the second trench has a same depth as the first trench, reaches the second conductivity type impurity layer and is shallower than a bottom portion of the second conductivity type impurity layer, wherein the gate electrode includes a driving gate electrode for driving the vertical semiconductor switching element and a diode gate electrode for generating an inversion layer in the base region at a position where the free wheel diode is arranged, wherein the driving gate electrode is arranged in the first trench, wherein the diode gate electrode is arranged in the second trench, wherein a voltage is independently applied to the driving gate electrode and the diode gate electrode, and wherein the gate insulating film is between, and directly contacts, the diode gate electrode and the first conductivity type impurity region.