Patent ID: 8625040

Claim:
An array substrate for use in a display, comprising: a first conductive film pattern pattern-formed on a transparent substrate; a first insulating layer formed on the first conductive film pattern; a second conductive film pattern pattern-formed above the first insulating layer, overlapping the first conductive film pattern; a second insulating layer formed above the first insulating layer and the second conductive film pattern; at least one contact hole extending from the first insulating layer to the second insulating layer; and a transparent conductive film electrically connecting the first conductive film pattern and the second conductive film pattern in the at least one contact hole; wherein the at least one contact hole is formed in a region where an edge of the second conductive film pattern overlaps the first conductive film pattern; wherein: the array substrate is a transistor array substrate including an inverse stagger-type transistor; the first conductive film pattern includes a gate electrode of the inverse stagger-type transistor and a film for stopping etching; the second conductive film pattern includes a source electrode or drain electrode of the inverse stagger-type transistor, and the source electrode or the drain electrode is formed overlapping the film for stopping etching; and the at least one contact hole includes a first contact hole made in a region where an edge of the source electrode or the drain electrode overlaps the film for stopping etching; and wherein the array substrate further comprises: a semiconductor film formed on the first insulating layer and overlapping the film for stopping etching; and an ohmic contact layer formed between the semiconductor film and either the source electrode or the drain electrode; wherein the first contact hole extends from the second insulating layer to the first insulating layer, exposing the semiconductor film and the ohmic contact layer.