Patent ID: 7884453

Claim:
A semiconductor device comprising: a semiconductor chip having an electrode pad, an external connection terminal pad electrically connected to the semiconductor chip, a wiring pattern, an insulating resin covering a first surface of the semiconductor chip, an upper surface of the wiring pattern, and a side surface of the wiring pattern, an encapsulation resin for encapsulating the semiconductor chip, and an upper surface and a side surface of the insulating resin, and a solder resist which is provided on a lower surface of the wiring pattern, a lower surface of the insulating resin, and a lower surface of the encapsulating resin and which is provided with an opening for exposing the external connection terminal pad, wherein the wiring pattern comprises: a chip connection region which is provided on an upper surface of the wiring pattern opposite to a first surface of the semiconductor chip on which the electrode pad is formed and to which the semiconductor chip is flip-chip bonded, and a pad formation region which is provided on a lower surface of the wiring pattern and on which the external connection terminal pad is formed.