Patent ID: 6906346

Claim:
A semiconductor device which is provided with a thin film transistor having a polycrystalline semiconductor layer, the semiconductor layer including a channel area, highly doped drain areas positioned on both sides of the channel area and LDD or offset areas positioned between the channel area and the highly doped drain areas, the LDD or offset areas being lower in dopant density than the highly doped drain areas or being free of dopant; wherein any diameter of the crystal at least partly existing in the LDD or offset areas is larger than that of other crystals; wherein the thin film transistor is formed in the vicinity of a pattern in a specified shape which is made of a material higher in heat conductivity than the semiconductor layer; wherein the pattern is formed between the substrate and the semiconductor layer; wherein the pattern is covered with an insulating undercoat film formed between the substrate and the semiconductor layer; wherein the undercoat film includes an upper undercoat film and a lower undercoat film and the pattern is laid between the upper undercoat film and the lower undercoat film; and wherein the upper undercoat film is a porous layer and the lower undercoat film is denser than the porous layer.