Patent ID: 8633583

Claim:
A semiconductor package substrate suitable for supporting a damage-sensitive device, comprising: a package substrate core having an upper and a lower surface; at least one pair of metal layers coating the upper and lower surfaces of the package substrate core in a first area covered by the damage-sensitive device, wherein an outline of the first area completely coincides with edges of the damage-sensitive device; one pair of solder mask layers coating the outer metal layers of the one pair of metal layers; and a plurality of vias formed across the package substrate core and the at least one pair of metal layers, wherein the plurality of vias is substantially distributed according to a homogeneous pattern in a second area that is bigger than the first area and smaller than the package substrate core such that the number of vias within the first area is substantially equal to the number of vias outside the first area and such that the plurality of vias is substantially distributed throughout the entire second area and not outside the second area; wherein the number of vias on each side of the outline is the same and the number is greater than 1; and wherein the vias are positioned so that the majority of the vias are homogeneously positioned within the second area which is bigger than the first area, and wherein the second area is approximately 40% bigger than the first area and centered with the first area.