Patent ID: 8629700

Claim:
A frequency synthesizer circuit, comprising: a phase and frequency detector; a first charge pump and a second charge pump, each coupled to the phase and frequency detector; a loop filter comprising a resistor and at least two capacitors, wherein the second charge pump is coupled between the resistor and a capacitor that creates a zero in a transfer function of the loop filter; a voltage controlled oscillator that produces an output frequency based on an output of the loop filter; an N-divider that is coupled to an output of the voltage controlled oscillator and an input of the phase and frequency detector, wherein the N-divider is a fractional N-divider that alternates between dividing the output frequency of the voltage controlled oscillator by a first divide factor and a second divide factor; and a sigma-delta modulator that randomizes selection of each divide factor used by the fractional N-divider while maintaining a desired time-average ratio between the divide ratios.