Patent ID: 7003658

Claim:
A method of achieving power saving for a computer through memory throttling, using a basic input/output system (BIOS) to setup a chipset for providing the function of memory throttling; such method of achieving power saving for a computer through memory throttling comprises the steps of: reading a set of user setup values from a non-volatile random access memory, (NVRAM); setting a register according to the user's setup value; executing a power-on self test (POST); calling a processing-suspending program to issue a suspension request; displaying a setup screen with options; storing a new set of user setup values to the NVRAM; rebooting the system; and turning over a controlling authority to an operating system (OS); wherein the function of the memory throttling is used to reduce a bandwidth of memory throughput; wherein the user's setup value may enable or disable the memory throttling; and wherein the register is a register of a north bridge.