Patent ID: 8426312

Claim:
A method, comprising: selectively forming a first etch stop layer above a bevel region of a substrate, said bevel region including a bevel defined at an outer edge of said substrate, said first etch stop layer covering said bevel, said substrate having a central region adjacent to said bevel region for receiving circuit elements therein, wherein selectively forming said first etch stop layer comprises: depositing said first etch stop layer above said central region and said bevel region; depositing a mask layer above said first etch stop layer; selectively modifying said mask layer in said central region to increase an etch rate thereof, said mask layer providing a higher degree of protection with respect to a specified etch recipe in said bevel region compared to said central region; etching said mask layer using said specified etch recipe so as to expose said first etch stop layer in said central region; and removing said first etch stop layer from said central region; forming a dielectric layer stack for a metallization layer above said substrate and above said first etch stop layer; and removing a portion of at least one layer of said dielectric layer stack from said bevel region by selectively applying an etchant to said bevel region while using said first etch stop layer disposed above said bevel to reduce etch damage of said substrate at said bevel.