Patent ID: 8364741

Claim:
A multiplier, comprising: an operation unit that adds or subtracts a first group selected from a current input data, and a second group selected from a next input data corresponding to the first group to generate an operation result; a Booth's encoder that encodes the operation result according to Booth's algorithm, and generates code data; a partial product generation unit that calculates a partial product from the code data as a first partial product, and calculates, in a case where the first group and the second group are specific combination, a second partial product; and an adder that cumulatively adds an output from the partial product generation unit, wherein, the operation unit divides the input data into sets of two bits from a least significant bit, forms the first group and second group (Y2i+1, Y2i, Y2i−1) (i: an integer equal to or larger than 0) of three bits in total including each set and a most significant bit of each low-order set, selects the group sequentially and adds or subtracts the first group and second group, and the specific combination is a combination in which the highest-order bit of each of the first group and the second group is the same value, and the third least significant bit obtained after the subtraction operation is 1; and wherein the multiplier comprises a plurality of sets of the Booth's encoder and the partial product generation unit.