Patent ID: 7301218

Claim:
A parallel capacitor of a semiconductor device, comprising: a first layer having a first metal layer and a second metal layer formed over a semiconductor substrate in which given structures are formed, the first metal layer being isolated horizontally from the second metal layer; a first capacitor having a first lower electrode, a first dielectric layer and a first upper electrode, in which the first capacitor is surrounded by a first insulating film formed over the first layer, the first lower electrode being electrically coupled to the first metal layer through a first via plug; a second layer having a third metal layer and a fourth metal layer formed over the first insulating film, the third metal layer being isolated horizontally from the fourth metal layer and being electrically coupled to the first metal layer through a second via plug, in which the fourth metal layer is coupled to the first upper electrode through a third via plug; a second capacitor having a second lower electrode, a second dielectric layer and a second upper electrode, in which the second capacitor is surrounded by a second insulating film formed over the second layer, the second lower electrode electrically coupled to the third metal layer through a fourth via plug; and a third layer having a fifth metal layer and a sixth metal layer formed over the second insulating film, the fifth metal layer being isolated horizontally from the sixth metal layer and being electrically coupled to the third metal layer through a fifth via plug, in which the sixth metal layer is coupled to the second upper electrode through a sixth via plug and is coupled to the fourth metal layer through a seventh via plug, wherein one side of the first capacitor is overlapped with the first metal layer, and another side of the first capacitor is overlapped with the second metal layer.