Patent ID: 6918033

Claim:
A branch predictor comprising: a branch prediction generator for generating a predicted conditional branch of a branch instruction; a comparator for generating a comparison signal by comparing the predicted conditional branch from the branch prediction generator with a real conditional branch of the branch instruction; an accuracy history table for storing an accuracy history of the predicted conditional branch; a first state transition logic circuit for generating accuracy history bits to be stored to the accuracy history table in response to the comparison signal; and a multiplexer having a first input and a second input for receiving the predicted conditional branch and an inverted version of the predicted conditional branch, respectively, for selecting one of the predicted conditional branch and the inverted predicted conditional branch, and for outputting the selected one of the predicted conditional branch and the inverted predicted conditional branch as a final branch prediction outcome based on a state of a single selection input of the multiplexer; wherein a single, predicted accuracy history signal is applied to the single selection input of the multiplexer to select one of the predicted conditional branch and the inverted predicted conditional branch, the predicted accuracy history signal being a single most significant bit of the accuracy history bits and being directly applied to the single selection input of the multiplexer, such that the single accuracy history signal selects between the predicted conditional branch and the inverted predicted conditional branch to be output as the final branch prediction outcome.