Patent ID: 7049222

Claim:
A method of manufacturing a semiconductor device comprising: forming an element separating insulating film separating an element region in a surface region of a semiconductor substrate; forming a pair of source/drain regions in a surface region of the element region of the semiconductor substrate; forming a gate structure including a gate insulating film and a gate electrode on that region of the semiconductor substrate which is positioned between the source/drain regions; forming a silicide film extending from a part of the source/drain regions onto the element separating insulating film; forming an interlayer insulating film on the element separating insulating film and the silicide film; selectively etching the interlayer insulating film so as to form a contact hole and a trench portion, the bottom of the contact hole being in contact with the silicide film and the contact hole having one end and the other end positioned on the suicide film and on the element separating insulating film, respectively, and the trench portion having one end being in contact with an edge of the silicide film in an upper portion of the element separating insulating film; and filling the contact hole with a conductive film.