Patent ID: 7808276

Claim:
A chip-to-chip communication system, comprising a transmitter housed in a first integrated circuit chip and a receiver housed in a second integrated circuit chip, the transmitter and receiver being connected to respective transmitter and receiver clock terminals wherein respective transmitter and receiver clock signals are applied, the transmitter having an input terminal receiving input data and an output terminal connected to an input terminal of the receiver at a capacitive connection block, the receiver having an output terminal issuing an output signal, wherein: the transmitter comprises a first precharge block and an evaluation block connected to each other and to the transmitter clock terminal; the receiver comprises a second precharge block connected to the receiver clock terminal; the first and second precharge blocks are operable to precharge the output terminal of the transmitter and the input terminal of the receiver, respectively, to a value corresponding to a first reference voltage during a low phase of the transmitter clock signal; and the transmitter and receiver clock signals are obtained by a common clock signal, the input data and the transmitter and receiver clock signals flowing in opposite directions between the transmitter and the receiver.