Patent ID: 7589951

Claim:
A method for manufacturing a laminated electronic component comprising the steps of: preparing a laminated body including a plurality of laminated insulator layers and a plurality of internal electrodes extending along surfaces of the insulator layers, wherein end portions of the internal electrodes are exposed at a predetermined surface of the laminated body; and forming an external electrode on the predetermined surface of the laminated body to electrically connect the end portions of the plurality of the internal electrodes being exposed at the predetermined surface of the laminated body to each other; wherein in the laminated body prepared in the step of preparing the laminated body, at the predetermined surface at which the internal electrodes are exposed, the internal electrodes are electrically isolated from adjacent internal electrodes, and a distance between the internal electrodes disposed adjacently is about 20 μm or less when measured along the thickness direction of the insulator layer, and a withdrawn-depth of the internal electrodes is about 1 μm or less when measured from the predetermined surface; the step of forming the external electrode includes a step of electroless plating, wherein the electroless plating with plating solution including a reducer is performed directly on the end portions of the plurality of the internal electrodes being exposed at the predetermined surface of the laminated body prepared in the step of preparing the laminated body; and the step of electroless plating includes a step of growing plating deposits formed at the end portions of the plurality of the internal electrodes to connect each other.