Patent ID: 7230874

Claim:
A semiconductor storage device including: a storing element part, having a memory cell provided at the intersection or a word line and a bit line; and a word line driving part for driving the word line in the storing element part, the word line driving part comprising: a plurality of word line driving element circuits, in which one word line is connected to a drain to which two MOS transistors having different electric conductive types are commonly connected and a first control signal is inputted to each of the gates of the MOS transistors; at least one transistor, provided between each of the word line driving element circuits and a source potential, having an electric current supplying capacity not lower than the electric current supplying capacity of each of the word line driving element circuits and not higher than the electric current supplying capacity of all the word line driving element circuits and whose operation is controlled by a second control signal different from the first control signals; an electric current extracting transistor, that has one end connected to each word line driven by each of the word line driving element circuits, its electric conductive type different from that of the above-described transistor and its operation controlled by the second control signal; and a control signal generating circuit, generating the first and second signals; wherein the control signal generating circuit allows the low-order bit of an address control signal, the address control signal being a base for generating the first and second control signals, to correspond to the first control signal and the high-order bit thereof to correspond to the second control signal.