Patent ID: 7738294

Claim:
A method of programming a memory device having an array of one or more multilevel memory cells each configured to store 2 N data states each corresponding to a pattern of N bits, each data state assigned a non-overlapping threshold voltage range, where N is an integer value equal to or greater than 2, the method comprising: shifting the threshold voltages of the one or more multilevel memory cells to an initial threshold voltage range; if N is greater than 2, for i=1 to N−2, shifting a memory cell's threshold voltage (Vt) by 2 N−i threshold voltage ranges if it is desired to change the i th bit of the pattern of N bits, wherein i is an integer value; subsequently shifting the memory cell's Vt by one threshold voltage range if it is desired to change a next to last bit of the pattern of N bits; and subsequently shifting the memory cell's Vt by two threshold voltage ranges if it is desired to change a last bit of the pattern of N bits.