Patent ID: 7897959

Claim:
A phase change memory device having a semiconductor substrate with an N+ base layer formed in a surface thereof, the phase change memory device comprising: a first insulation layer formed on the semiconductor substrate including the N+ base layer; a cell switching element formed in the first insulation layer and comprising a vertical PN diode; a second insulation layer formed on the first insulation layer to cover the cell switching element; a heater formed in the second insulation layer and contacting the cell switching element; a first contact plug extending through the first and second insulation layers and contacting the N+ base layer, wherein the first contact plug has a recess formed in an upper end portion thereof; a barrier layer formed in the recess of the first contact plug; a stack structure comprising a phase change layer and a top electrode formed on a portion of the second insulation layer and the heater; a third insulation layer formed on the second insulation layer to cover the top electrode, the phase change layer, and the barrier layer of the first contact plug; a bit line formed on the third insulation layer and contacting the top electrode; a fourth insulation layer formed on the third insulation layer to cover the bit line; a second contact plug extending through the third and fourth insulation layers and sharing a common axis with the first contact plug, wherein the first contact plug and the second contact plug form a word line contact; and a word line formed on the fourth insulation layer, wherein the word line contact electrically connects the word line to the N+ base layer.