Patent ID: 7983308

Claim:
A circuit to synchronize with a data transmission comprising a plurality of data frames in a passive optical network, the circuit comprising: a comparator configured to: read a first set of data within a serialized data transmission, wherein the first set of data comprises a first pattern, compare the first pattern in the first set of data to a portion of a predetermined data pattern, and output a corresponding first comparison result, shift the serialized data transmission to read a second set of data within the serialized data transmission, wherein the second set of data comprises a second data pattern, and compare the second pattern in the second set of data to the portion of the predetermined data pattern, and output a corresponding second comparison result; a shift register serially coupled to the comparator, the shift register configured to hold each of the first data pattern and the second data pattern, wherein the shift register comprises: i) a first flip-flop configured to hold a first deserialized portion of the data transmission, and ii) a second flip-flop serially coupled to the first flip-flop to hold a second deserialized portion of the data transmission; a first synchronization detector configured to: receive a comparison hit vector based on each of the first comparison result and the second comparison result from the comparator, and align a first boundary of a first data frame within the data transmission according to the comparison hit vector if the comparison hit vector indicates a match between the first data pattern in the first set of data and the portion of the predetermined data pattern, wherein the first synchronization detector comprises a first multiplexer configured to multiplex the first and second deserialized portions of the data transmission from the first and second flip-flops to align the first boundary of the first data frame within the data transmission; and a second synchronization detector configured to: receive a comparison hit vector based on a comparison result from the comparator, and align a second boundary of a second data frame within the data transmission according to the comparison hit vector if the comparison hit vector indicates a match between the second data pattern in the second set of data and the portion of the predetermined data pattern, wherein the second synchronization detector comprises a second multiplexer configured to multiplex the first and second deserialized portions of the data transmission from the first and second flip-flops to align the second boundary of the second data frame within the data transmission.