Patent ID: 8006066

Claim:
A method for transmitting data of a plurality of data types between a digital processor and a hardware arithmetic-logic unit, the method which comprises: associating the hardware arithmetic-logic unit with at least one table memory, the hardware arithmetic-logic unit obtaining data required during a computing operation from at least one component selected from the group consisting of the table memory and the hardware arithmetic-logic unit storing data computed during a computing operation in the table memory; performing at least one operation selected from the group consisting of reading and writing from the digital processor to the table memory by: preselecting a base address in the table memory dependent on a data type of data to be transmitted; computing a plurality of addresses according to a prescribed arithmetic computation rule in hardware by taking the preselected base address as a starting point resulting in a computed plurality of addresses; and accessing the table memory with the digital processor using the computed plurality of addresses for consecutive read access operations or consecutive write access operations in the table memory; and providing the arithmetic computation rule for computing the plurality of addresses in the table memory as an incrementation rule or a decrementation rule.