Patent ID: 7782705

Claim:
A word line decoder circuit, comprising: a controllable power supply, controlled by an inversed sector select signal to provide a first voltage to at least one local pre-decoder; the local pre-decoder, comprising: a first PMOS transistor, a gate thereof is coupled to a bias voltage, and a source thereof is coupled to a second voltage; a second PMOS transistor, a gate thereof is coupled to a drain of the first PMOS transistor, and a source thereof coupled to the controllable power supply; a first NMOS transistor, a gate thereof is coupled to a local pre-decoding signal, and a drain thereof is coupled to the drain of the first PMOS transistor; a second NMOS transistor, a gate thereof is coupled to the local pre-decoding signal; and a third NMOS transistor, a gate thereof is coupled to the gate of the second PMOS transistor, a drain thereof is coupled to a reset signal, and a source thereof is coupled to a drain of the second NMOS transistor; at least one word line cluster, comprising at least one row driver, and the row driver comprises: a third PMOS transistor, a gate thereof is coupled to a row driver pull-up signal, a source thereof is coupled to a drain of the second PMOS transistor, and a drain thereof is coupled to a word line; a fourth NMOS transistor, a gate thereof is coupled to a row driver pull-down signal, a drain thereof is coupled to the drain of the third PMOS transistor, and a source thereof is coupled to a third voltage; and a fifth NMOS transistor, a gate thereof is coupled to the source of the third NMOS transistor, a drain thereof is coupled to a drain of the third PMOS transistor, and a source thereof is coupled to the third voltage; and at least one controllable pull-down circuit, coupled to sources of the first and second NMOS transistors of the local pre-decoder, controlled by a pre-decoding signal and a sector select signal to pull down the sources of the second and third NMOS transistors of the local pre-decoder to the third voltage.