Patent ID: 8034710

Claim:
A method of forming a semiconductor structure comprising: providing a semiconductor structure including a first interconnect level comprising at least one conductive feature embedded within a first dielectric material, said at least one conductive feature including a first metallic capping layer located thereon, wherein an upper surface of the at least one conductive feature is coplanar with an upper surface of the first dielectric material, and wherein said first metallic capping layer has an upper surface located above said upper surface of the first dielectric material; forming a patterned material stack including a dielectric capping layer on exposed surfaces of said first dielectric material and said first metallic capping layer, and a second dielectric material having at least one opening located therein, said at least one opening exposes a surface of said first metallic capping layer; forming a second metallic capping layer on said exposed surface of said first metallic capping layer, but not on sidewalls of said second dielectric material, said second metallic capping layer comprising a metal that is different from a metal present in said first metallic capping layer; and filling said at least one opening within at least an interconnect conductive material.