Patent ID: 7630241

Claim:
A method for reading a first page of data of multiple pages of a multiple level cell memory device, the method comprising: resetting a first bit line latch, of a plurality of bit line latches, at a first time, each bit line being coupled to a different bit line latch, each bit line latch having an inverted node, a non-inverted node, and a latch output; biasing a selected word line of the memory device with ground potential at the first time; biasing the selected word line with a read voltage greater than ground potential at a second time; coupling the non-inverted node to the latch output at the second time to read the page one data; and reading a second page of data of the multiple pages comprising: resetting the latch at a third time after the second time; biasing the selected word line of the memory device at ground potential at the third time; coupling the non-inverted node to the first bit line latch output at a fourth time; biasing the selected word line at a first read voltage, greater than or equal to ground potential, at the fourth time; coupling the inverted node to the latch output at a fifth time; and biasing the selected word line at a second read voltage, greater than the first read voltage, at the fifth time to read the page zero data.