Patent ID: 8390076

Claim:
A semiconductor device comprising: a semiconductor substrate; a plurality of active areas with island-like shapes formed on the semiconductor substrate; an element isolation area configured to surround the plurality of active areas, the element isolation area including an element isolation groove formed on the semiconductor substrate and an element isolation film embedded into the element isolation groove; a plurality of gate insulating films, each gate insulating film formed on corresponding one of the plurality of active areas, respectively; and a plurality of gate electrodes, each gate electrode formed on corresponding one of the plurality of gate insulating films, respectively, and having a first end portion that overhangs from the corresponding active area onto the element isolation area at one side and a second end portion that overhangs from the corresponding active area onto the element isolation area at the other side, wherein an overhang of the first end portion has a different length from a length of an overhang of the second end portion, and wherein, among a neighboring pair of the gate electrodes, the first end portion of one gate electrode and the second end portion of the other gate electrode face with each other over the element isolation area, and wherein an overhanging length of the first end portion is larger than that of the second end portion in each gate electrode; said semiconductor device further comprising a plurality of first via plugs formed on the plurality of gate electrodes at the first end portion, respectively.