Patent ID: 7885404

Claim:
A cryptographic system, comprising: reading means for reading a plaintext data block; first encrypting means for encrypting the read plaintext data block using a first mode to generate a first ciphertext; and second encrypting means for encrypting the read plaintext data block using a second mode to generate a second ciphertext, wherein at least one of the means for encrypting comprises: a memory controller that reads a block of data from a memory; an input buffer that stores a block of data read from the memory; an encryption module that encrypts the block of data stored in the input buffer using one of a plurality of modes of operation supported by the encryption module including a counter (CTR) mode, a cipher block chaining (CBC) mode or a Counter with Block Chaining-Message Authentication Code (CCM) mode; an output buffer that stores the data encrypted by the encryption module; and a control unit that generates control signals to control the memory controller, the input and output buffers and the block encryption module, wherein the control signals comprise a mode control signal that specifies a mode of operation of the encryption module.