Patent ID: 7400010

Claim:
A semiconductor device comprising: a semiconductor substrate having a plurality of trenches formed therein so as to be oriented in a first direction; a gate insulating film formed on the semiconductor substrate surface interposed between the plurality of trenches; a plurality of floating gate electrodes formed on the gate insulating film so as to be aligned in the first direction and in a second direction perpendicular to the first direction within the plane of the surface of the semiconductor substrate; an element isolation insulating film that fills the plurality of trenches respectively such that an upper surface thereof is positioned higher than an upper surface of adjoining gate insulating film, wherein the element isolation insulating film includes a first element isolation insulator interposed between neighboring floating gate electrodes in the second direction and a second element isolation insulator interposed between neighboring first element isolation insulators in the first direction, wherein the second element isolation insulator has a sidewall oriented in the first direction, a height of a substantial mid-portion of the sidewall from the gate insulating film upper surface being lower than a boundary between the first element isolation insulator and the second isolation insulator.