Patent ID: 8648405

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate; a plurality of element regions defined by element isolation regions formed of element isolation insulating film; a plurality of floating gate electrodes respectively formed above the element regions of the semiconductor substrate with first insulating films disposed therebetween; and a control gate electrode formed above the plurality of floating gate electrodes with a second insulating film disposed therebetween, a portion of the control gate electrode being filled in between opposed ones of the plurality of floating gate electrodes, wherein each of the plurality of floating gate electrodes is formed to have a width of an upper portion thereof in a channel width direction which is smaller than width of a lower portion thereof in the channel width direction and one of contact surfaces thereof on at least opposed sides which contact the second insulating film is formed to have one flat surface, sides of the plurality of floating gate electrodes each have a first contact surface which contacts the second insulating film above a top surface of the element isolation insulating film and a second contact surface which contacts the element isolation insulating film, and a first angle between the first contact surface and the vertical direction is larger than a second angle between the second contact surface and the vertical direction and the second angle is 0°.