Patent ID: 8413158

Claim:
An information handling system (IHS), comprising: processor; a memory, coupled to the processor, that includes a load balancing manager that is configured to: determine a process tree including a plurality of threads that share data, the IHS including a home processor element and multiple poaching processor elements, the home processor element being associated with a respective ready queue and a respective run queue, each of the multiple poaching elements being associated with respective ready queues and respective run queues; assign a same home processor element identifier (HPEI) to each thread of the plurality of threads of the process tree; commence execution of the plurality of threads of the process tree; identify multiple poaching processor elements with both respective an available ready queues and respective available run queues; and move in parallel multiple threads of the plurality of threads of the process tree from the ready queue and run queue of the home processor element to the available ready queues and run queues of the multiple poaching processor elements, such that the multiple poaching processor element executes the multiple threads of the plurality of threads of the process tree; wherein after partial execution by the multiple poaching processor elements, the multiple poaching processor elements return the multiple threads of the plurality of threads to the home processor element after a predetermined amount of time.