Patent ID: 8338907

Claim:
A semiconductor device formed on a substrate having a principal surface comprising: a first semiconductor region and a second semiconductor region formed in the substrate, both the first semiconductor region and the second semiconductor region having a first conductive type; a third semiconductor region of a second conductive type formed in the substrate and exposed on the principal surface, the third semiconductor region being interposed between the first semiconductor region and the second semiconductor region so as to electrically separate the second semiconductor region from the first semiconductor region and form a first junction with the first semiconductor region at a first junction depth receding from the principal surface; a fourth semiconductor region of the second conductive type formed in the substrate, exposed on the principal surface and disposed apart from the third semiconductor region, the fourth semiconductor region having an electrical connection with the third semiconductor region and forming a second junction with the first semiconductor region at a second junction depth common with the first junction depth and having an impurity concentration common with the third semiconductor region; a fifth semiconductor region formed in the substrate and out of the third semiconductor region and the fourth semiconductor region and exposed on the principal surface; a first electrode in electrical contact with the fifth semiconductor region; and trenches within the fourth semiconductor region, the trenches having bottoms receding from the principal surface and shallower than the second junction depth.