Patent ID: 7681053

Claim:
A computer implemented method for thermal throttle control in an integrated circuit, comprising: monitoring a setting of an interrupt status bit in a thermal sensor interrupt status register; setting the interrupt status bit when a temperature value in a thermal sensor current temperature status register for a sensor is greater than or equal to one of a corresponding sensor interrupt temperature value in a thermal sensor interrupt temperature register and a global interrupt temperature value in a thermal sensor global interrupt temperature register; responsive to the interrupt status bit being set, determining if an interrupt associated with the interrupt status bit is an unmasked interrupt; responsive to the interrupt being unmasked, determining whether to clear the interrupt status bit at a beginning of an interrupt handler routine; responsive to a determination to clear the interrupt status bit at a beginning of the interrupt handler routine, selecting one of handling the interrupt then clearing the interrupt status bit, wherein the throttling is suspended but still enabled, and clearing the interrupt status bit, disabling an existing throttling mode, handling the interrupt, then setting thermal management control registers back to an original value; and responsive to a determination to not clear the interrupt status bit at the beginning of the interrupt handler routine, disabling the existing throttling mode, handling the interrupt, and clearing the interrupt status bit at an end of the interrupt handler routine, wherein the thermal management control registers are set back to the original value.