Patent ID: 8564468

Claim:
An analog-to-digital converter (ADC) apparatus comprising: an input multiplexer circuit having a plurality of analog input terminals configured to receive a plurality of analog input signals, said input multiplexer circuit being responsive to a first select input; a trigger multiplexer circuit having a plurality of input terminals configured to receive a plurality of triggering signals, said trigger multiplexer circuit being responsive to a second select input; analog-to-digital converter (ADC) circuitry configured to convert a selected one of the plurality of analog input signals into a digital signal; and a sequence arbiter coupled to the first and second select inputs and having a plurality of input terminals configured to receive a plurality of conversion sequence configuration signals, said sequence arbiter being configured to manage each conversion sequence of the ADC circuitry based upon a relative one of the plurality of conversion sequence configuration signals, control interruption of an actual conversion sequence in progress and a start of a new conversion sequence, relative to a new conversion sequence configuration signal, by placing the actual conversion sequence in a waiting condition if the new conversion sequence has a higher priority than the actual conversion sequence, and postpone the start of the new conversion sequence by placing it in the waiting condition if the actual conversion sequence has a higher priority than the new conversion sequence.