Patent ID: 8357574

Claim:
A method of fabricating an integrated circuit device, the method comprising: providing a substrate having a first region and a second region; forming a first gate structure over the first region and a second gate structure over the second region; forming a nitrogen-rich protective layer over the first and the second gate structures; removing a portion of the nitrogen-rich protective layer over the second gate structure; after removing the portion of the nitrogen-rich protective layer, forming features at upper sides of the second gate structure by an epitaxial (epi) growth process; forming sidewall spacers on the first and second gate structures; forming a second protective layer over the first and second gate structures with the sidewall spacers; removing a portion of the second protective layer over the first gate structure; forming a second feature adjacent to an edge of the first gate structure by an epi growth process; and removing a remaining portion of the second protective layer after forming the second feature.