Patent ID: 7238563

Claim:
A method of manufacturing a semiconductor device, comprising: forming an isolation region in a surface region of a first conductivity type semiconductor layer to form a MOS type element region having the semiconductor layer surrounded by the isolation region; forming a mask layer having an opening portion on the semiconductor layer, the opening portion continuously ranging on the entire surface of the MOS type element region and on part of the isolation region provided around the MOS type element region; implanting a first impurity ion having a first conductivity type into the entire surface using the mask layer as a mask to set a peak of impurity profile situated in the semiconductor layer under a bottom surface of the isolation region; implanting a second impurity ion having a second conductivity type which is different than the first conductivity type into the entire surface using the mask layer as a mask to set a peak of the impurity profile situated midway of a depth direction of the isolation region; and activating the first and second impurity ions to form a channel stopper region and a channel region.