Patent ID: 8605829

Claim:
A demodulation system, comprising: a Multi-Stage Arbitration (MSA) demodulator configured to receive a baseband signal and configured to produce a first set of modem bit likelihood values based on the received baseband signal, wherein the MSA demodulator comprises of two or more stages of detection assistance in succession and each stage of detection assistance successively reduces number of candidate symbol combinations for a symbol block; a first extrinsic value calculator (EVC) having a first input coupled to an output of the MSA demodulator for receiving the first set of modem bit likelihood values, said first EVC being configured to produce a first set of extrinsic values based on the first set of modem bit likelihood values; a decoder having an input coupled to an output of the first EVC and configured to process the first set of extrinsic values output by the first EVC to produce a first set of improved modem bit likelihood values based on the first set of extrinsic values; and a second EVC having a first input coupled to the output of the first EVC, a second input coupled to an output of the decoder, and an output coupled to an input of the demodulator and a second input of the first EVC, said second EVC being configured to produce at its output a second set of extrinsic values based on values received at its first and second inputs, wherein the demodulation system is configured such that (a) the MSA demodulator receives at its second input the second set of extrinsic values and is configured to produce a second set of modem bit likelihood values based on the received second set of extrinsic values, (b) the first EVC receives the second set of modem bit likelihood values and the second set of extrinsic values and uses these values to produce a third set of extrinsic values, and (c) the decoder receives the third set of extrinsic values and is configured to process these values to produce a second set of improved modem bit likelihood values.