Patent ID: 8575755

Claim:
A semiconductor device comprising: an integrated circuit chip; a plurality of outer bump assemblies disposed on the integrated circuit chip; at least one inner bump assembly disposed on the integrated circuit chip so that the at least one inner bump assembly is at least partially surrounded by the plurality of outer bump assemblies, wherein a connection between the at least one inner bump assembly and a first selected one of the plurality of outer bump assemblies defines a first state of operation for the integrated circuit and a connection between the at least one inner bump assembly and a second selected one of the plurality of outer bump assemblies defines a second state of operation for the integrated circuit, the first state of operation different from the second state of operation; and a selector circuit configured to cause the integrated circuit chip to operate in the first state of operation when the at least one inner bump assembly is connected to the first one of the outer bump assemblies and to cause the integrated circuit chip to operate in the second state of operation when the at least one inner bump assembly is connected to the second one of the outer bump assemblies.