Patent ID: 8072525

Claim:
An apparatus comprising: an array of MOS imaging pixels comprising a first group of MOS imaging pixels; a first column line interconnecting the first group of MOS imaging pixels to form a first column of the array, the first column line being configured to receive a pixel output signal from each of the first group of MOS imaging pixels; and a first correlated double sampling (CDS) circuit comprising a charge amplifier having an input capacitor, the input capacitor of the charge amplifier coupled directly to the first column line to receive the pixel output signals from the first group of MOS imaging pixels, wherein the charge amplifier comprises a gain stage having an input terminal and an output terminal, wherein the input capacitor is coupled between the column line and the input terminal of the gain stage, and wherein the charge amplifier further comprises a feedback capacitor coupled between the input terminal of the gain stage and the output terminal of the gain stage.