Patent ID: 7355898

Claim:
A method for reading from a memory arrangement including at least one memory cell in which a resistance value between two poles of the memory cell reflects a memory state of the memory cell, the method comprising: connecting one of the two poles to a charge source with a first potential; connecting the other of the two poles to a conductor having a second potential, which lies below the potential of the charge source; and measuring the potential of the conductor, further comprising: determining a positive threshold voltage that when applied to the two poles of the memory cell, as seen statistically, causes a resistance change that characterizes a change in the memory state of the memory cell; and determining a negative threshold voltage that when applied to the two poles of the memory cell, as seen statistically, causes a resistance change that characterizes a change in the memory state of the memory cell, wherein the first and second potentials are selected such that the magnitude of their difference does not exceed the sum formed from the magnitude of the positive threshold voltage and the magnitude of the negative threshold voltage.