Patent ID: 8008151

Claim:
A method of fabricating a semiconductor device, comprising: forming a hard mask on a substrate having a top substrate surface; forming a plurality of trenches in the substrate, through the hard mask; depositing gate material in the plurality of trenches, where the amount of gate material deposited in the plurality of trenches extends beyond the top substrate surface; removing the hard mask to leave a plurality of gates that extend substantially above the top substrate surface; forming a body in the substrate; forming a plurality of source regions in the body, including a first source region adjacent to a first one of the plurality of gates and a second source region adjacent to a second one of the plurality of gates; and forming a plurality of spacers to insulate at least some of the plurality of source regions from at least some of the plurality of gates; disposing a conductor to form a thin conductive layer on at least a portion of the top substrate surface between the first one of the plurality of gates and the second one of the plurality of gates to connect the first source region and the second source region electrically, on at least a portion of the first source region, and on at least a portion of the second source region, wherein the thickness of the thin conductive layer is substantially less than height of the plurality of spacers.