Patent ID: 8138602

Claim:
A structure, comprising: a wire that is electrically conductive in an interlevel dielectric layer on a substrate; a dielectric passivation layer formed on a top surface of said wire and on a top surface of said interlevel dielectric layer; a first opening in said dielectric passivation layer, wherein a central region of said top surface of said wire is exposed in said first opening; a terminal pad that is electrically conductive on said central region of said surface of said wire in said first on a region of said top surface of said dielectric passivation layer surrounding said first opening; an organic dielectric passivation layer on said dielectric passivation layer and said terminal pad; a second opening in said organic dielectric passivation layer, a central region of a top surface of said terminal pad exposed in said second opening, said organic passivation layer extending over and in contact with a peripheral region of said terminal pad; a current spreading pad that is electrically conductive on a top surface of said organic dielectric passivation layer; a solder bump pad that is electrically conductive, said solder bump pad comprising one or more layers on a top surface of said current spreading pad; and a solder bump that is electrically conductive on a top surface of said solder bump pad, said solder bump containing tin, said solder bump pad on a top surface of said terminal pad, said current spreading pad comprising one or more layers, at least one of said one or more layers consisting of a material that will not form an intermetallic with tin or at least one of said one or more layers is a material that is a diffusion barrier to tin and is adjacent to said solder bump pad.