Patent ID: 7388421

Claim:
A circuit for providing a trim signal, comprising: a current source coupled to an end of a first fuse, wherein an opposite end of the first fuse is coupled to a first input of a first logic gate, and wherein the current source is arranged for separate cycling between on and off states; a second fuse coupled between the first input of the first logic gate and a common potential; a buffer gate with an input that is coupled to an output of the first logic gate, wherein severing one of the first fuse or the second fuse enables an output of the buffer gate to be provided as the trim signal; and a second logic gate with an output coupled to a second input of the first logic gate, wherein a first input of the second logic gate is coupled to an enable signal and a second input of the second logic gate is coupled to a data signal, and wherein the configuration of the enable signal and the data signal enables a state of the trim signal to emulate a result of severing one of the first fuse or the second fuse prior to doing so.