Patent ID: 7009450

Claim:
A circuit for dynamically biasing an output stage of an op amp having a gain stage, comprising: a first transistor (Q 38 ), a second transistor (Q 39 ), a third transistor (Q 40 ), a fourth transistor (Q 41 ), a fifth transistor (Q 36 ), and a sixth transistor (Q 37 ); the first transistor (Q 38 ) responsively coupled to and driven by current from the fifth transistor (Q 36 ); the second transistor (Q 39 ) responsively coupled to and driven by current from the sixth transistor (Q 37 ); a seventh transistor (Q 42 ) having a collector coupled to an emitter of the first transistor (Q 38 ) and a base of the third transistor (Q 40 ), and an emitter coupled to a first high impedance node operable to source current from the gain stage; and an eighth transistor (Q 43 ) having a collector coupled to an emitter of the second transistor (Q 39 ) and a base of the fourth transistor (Q 41 ), and an emitter coupled to a second high impedance node operable to sink current from the gain stage.