Patent ID: 7761643

Claim:
In a media access controller system, a processor bridge of an integrated circuit, comprising: multiplexing circuitry coupled to receive first data associated with a first processor interface and second data associated with a second processor interface; register circuitry coupled to the multiplexing circuitry to selectively receive the first data and the second data; the multiplexing circuitry and the register circuitry configured to bridge the first data and the second data; a plurality of control signal generators configured to provide control signals, the control signal generators in combination providing a finite state machine for mapping a first address space associated with a first plurality of registers to a second address space substantially larger than the first address space; wherein the first processor interface is a platform independent processor interface enabling access to a processor external to the integrated circuit; and wherein the second processor interface is a platform specific processor interface coupled to a processor implemented in the integrated circuit, wherein the platform specific processor interface is associated with a type of the processor implemented in the integrated circuit.