Patent ID: 7779214

Claim:
A method for managing memory of a processing system comprising: identifying memory page sizes supported by a processing system; storing the identified memory page sizes in at least one memory page size identification register; detecting a change in a page table including a plurality of page table entries, where each of the plurality of page table entries includes information for translating a virtual address to a corresponding physical address, memory page size for a corresponding virtual address page, and access permission information for the corresponding virtual address page; responding to the detection by identifying contiguous page table entries having substantially the same access permission information; analyzing the identified contiguous page table entries to determine whether a change of the memory page size for any of the identified contiguous page table entries is warranted, where the change of the memory page size corresponds to a supported page size as identified in the at least one memory page size identification register; updating the memory page size information for at least one of the identified contiguous page table entries with new memory page size information if the analysis of the identified contiguous page table entries determines that a change of the memory page size of any of the identified contiguous page table entries is warranted, where the new memory page size information corresponds to a largest memory page size to which any of the identified contiguous page table entries may be mapped and which is supported by the processing system as identified in the at least one memory page size identification register; and updating one or more entries of the translation lookaside buffer corresponding to at least one of the identified contiguous page table entries with the new memory page size information.