Patent ID: 8774292

Claim:
A data transfer system comprising: a transmission circuit configured to operate by a first clock signal; and a receiving circuit configured to operate by a second clock signal different from the first clock signal, wherein the transmission circuit includes an output circuit configured to output a poll signal, the output circuit logically inverts a level of the poll signal in accordance with a transmission timing of transmission data from the transmission circuit to the receiving circuit, and the receiving circuit includes a first signal generating circuit configured to receive the transmission data at a plurality of timings and generates a plurality of sets of reception data respectively corresponding to the plurality of timings, a second signal generating circuit configured to receive the poll signal at the plurality of timings and generates a plurality of synchronous poll signals respectively corresponding to the plurality of timings, and a data selecting circuit configured to compare levels of the plurality of synchronous poll signals with each other and selects one of the plurality of sets of reception data in accordance with a result of the comparison.