Patent ID: 7020859

Claim:
A method of performing a characterization of an integrated circuit design that is customized during succeeding fabrication steps, the characterization accomplished with respect to different levels of a processing parameter that is fixed during preceding fabrication steps, the method comprising the steps of: processing a wafer through the preceding fabrication steps, including processing the wafer at at least one of the preceding fabrication steps using processing that produces the different levels of the processing parameter within different integrated circuits on the wafer, to produce a standardized characterization wafer, processing the standardized characterization wafer through the succeeding fabrication steps using customized processing to produce a customized characterization wafer, and testing the integrated circuits on the customized characterization wafer to determine which of the different levels of the processing parameter produces integrated circuits having desired characteristics, wherein the different levels of the processing parameter are produced with a mask that is stepped across the wafer with different processing conditions.