Patent ID: 7691669

Claim:
A method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein, the method comprising the step of: selectively deactivating one or more of the plurality of decoupling capacitors, wherein the plurality of decoupling capacitors comprise one or more of parallel plate decoupling capacitors and trench decoupling capacitors, wherein the plurality of decoupling capacitors are grouped into one or more blocks within the at least one interposer structure and wherein one or more of the plurality of decoupling capacitors comprise a high k dielectric material that is selected from the group consisting of silicon nitride, silicon oxinitride, tantalum oxide, titanium oxide, aluminum oxide, zirconium oxide, hafnium oxide, hafnium silicon oxide, barium strontium titanate, barium zirconium titanate, barium titanium oxide, barium-strontium and combinations comprising at least one of the foregoing materials, wherein the step of selectively deactivating further comprises the step of removing one or more removable connections electrically connecting one or more of the plurality of decoupling capacitors to one or more other of the plurality of decoupling capacitors using laser deletion techniques.