Patent ID: 7839922

Claim:
A decision feedback equalizer comprising: a summer configured to either add or subtract at least one equalization coefficient signal to or from an input signal according to at least one control signal, wherein the summer comprises: a first differential transistor pair configured to receive the input signal, a second differential transistor pair for each equalization coefficient signal and configured to determine if the summer either adds or subtracts based upon the at least one control signal, and a digital to analog converter for each equalization coefficient signal, wherein each digital to analog converter is coupled with a respective second differential transistor pair and configured to, based upon the digital to analog converter's respective equalization coefficient signal, control a current of the respective second differential transistor pair, and is not configured to control a current of the first differential transistor pair; a slicer configured to convert the summed signal to a binary signal; and a retimer configured to sample the binary signal according to a clock signal, wherein the retimer generates the at least one control signal.