Patent ID: 8324042

Claim:
A method of making a LDMOS transistor comprising the steps of: growing an epi layer on a substrate; forming a gate electrode on a split gate oxide formed on said epi layer; forming a body of said first conductivity type and a source spacer of said second conductivity type which are self-aligned to first side of said polysilicon gate electrode; said second conductivity type being opposite to said first conductivity type; forming a first buffer layer of said second conductivity type self-aligned to a second edge of said polysilicon gate electrode; forming first and second side wall oxides on said first edge and said second edge, respectively, of said polysilicon gate electrode; forming a first drain region of said second conductivity type self-aligned to said second side wall oxide; and forming a source tap layer of said first conductivity type self-aligned to said first side wall oxide such that said source tap layer and said body overlap in a region spaced away from said first edge of said gate electrode, said source spacer region extending from said source tap layer to under at least said first edge of said polysilicon gate electrode.