Patent ID: 7571198

Claim:
A dynamically reconfigurable processor comprising: an arithmetic circuit group Ui comprised of arithmetic circuits of a type Ai (i=1, 2, . . . , N); an arithmetic circuit group Vi comprised of a part of arithmetic circuits which are included in said arithmetic circuit group Ui and an arithmetic circuit group of a type B which is connected thereto and different from said arithmetic circuit of the type Ai; inter-arithmetic-circuit wires Xi mutually connecting said arithmetic circuits of the type Ai and said arithmetic circuits of the type B; wires Zi which are added to said inter-arithmetic-circuit wires Xi so as to mutually connect the arithmetic circuits in said arithmetic circuit group Vi in an order different from that of said inter-arithmetic-circuit wires Xi; and a switch group Si which causes either one of said inter-arithmetic-circuit wire Xi or said wire Zi to be active.