Patent ID: 7755689

Claim:
An imaging system, comprising: at least one bus line; a row and column array of active pixels, each of which has an associated pitch and is periodically reset to a known state, said pixel producing a reset level which includes noise components, and a signal level which includes signal and noise components, in response to respective control signals; a plurality of column buffers, each of which conveys the outputs of a respective column of pixels, in turn, to one of said at least one bus lines, each of said column buffers comprising: ‘odd row’ and ‘even row’ sample and hold(S&H)/correlated double sampling (CDS) circuits which are switchably connected to said pixels and arranged to process the pixel outputs of odd and even rows, respectively, each S&H/CDS circuit further arranged to subtract the reset level from the signal level of the pixel to which it is connected to suppress correlated noise components present in said signal level and produce a net output signal; and a buffer amplifier arranged to receive said net output signal and convey it to one of said at least one bus lines, each of said column buffers having a pitch which is equal to or less than said pixel pitch; each of said bus lines conveying the outputs of a plurality of said buffer amplifiers; and at least one gain amplifier external to said column buffer, said at least one gain amplifier coupled at an input to a respective one of said bus lines such that said gain amplifier amplifies the outputs of a plurality of column buffers.