Patent ID: 7457389

Claim:
A system comprising: a 10 Gigabit Ethernet Extended Sublayer (XGXS) device; and a physical coding sublayer device comprising: a 10 Gigabit Media Independent Interface (XGMII) coupled to the XGXS device; a decoder to provide data frames to the XGMII in response to synchronized data; and a data synchronization section to provide the synchronized data to the decoder in response to a data stream, the data synchronization section comprising: logic to test a synchronization header in each of a plurality of consecutive data frames to determine if the synchronization header is valid in each of the consecutive data frames; a detector, responsive to a determination that a synchronization header is invalid in at least one of the consecutive data frames, to detect a synchronization header in each of a plurality of consecutive fixed word increments in a common location of a set portion of each consecutive fixed word increment and to determine an alignment of data blocks in the data stream in response to locating the synchronization header in the common location in the set number of consecutive fixed word increments, wherein the alignment corresponds to the common location, and wherein the set portion comprises a set number of data bits providing a plurality of possible locations for the synchronization header, wherein the detector is configured to search the set portion for the synchronization header without slipping the data stream; and gearbox logic to slip the data stream by a fixed bit quantity in a single slip operation in response to detecting an absence of the synchronization header in the common location of the set portion of a received fixed word increment, wherein the fixed bit quantity is an amount equal to the set number of data bits in the set portion.