Patent ID: 8443511

Claim:
A method of forming a semiconductor inductor comprising: providing a conventially formed semiconductor wafer that includes a plurality of identical die-sized substrate regions, and a corresponding number of identical metal interconnect structures that are connected to the substrate regions; wherein the metal interconnect structures include a plurality of aluminum traces and bond pads; depositing a layer of passivation material that touches and isolates the interconnect structures; forming a stress relief layer on the top surface of the layer of passivation material; patterning and etching a pair of openings through the stress relief layer to expose the metal interconnect structure that corresponds with the input and output of an inductor, using standard photolithigraphic techniques; forming a lower mold, the lower mold being non-conductive and having a top surface and a plurality of openings; forming a plurality of lower magnetic members in the plurality of openings to touch the lower mold, the plurality of lower magnetic members being spaced apart from each other; planarizing the plurality of lower magnetic members so that a top surface of each lower magnetic member and the top surface of the lower mold lie substantially in a single horizontal plane; forming a non-conductive structure to touch the lower mold and the lower magnetic members; and forming a conductive trace to touch the non-conductive structure, and lie directly over and spaced apart from each of the lower magnetic members.