Patent ID: 8806091

Claim:
A signal generating apparatus, applicable in a universal serial bus (USB) device, comprising: a first determining circuit, for receiving a data signal, and for detecting the data signal to determine if the data signal is generated by the universal serial bus device or a USB host and accordingly generating a first determined result; a second determining circuit, coupled to the first determining circuit, for receiving the data signal and the first determined result and generating a second determined result by determining a transmitting mode of the data signal according to the first determined result and the data signal; and a frequency generating circuit, coupled to the second determining circuit, for generating a first clock signal utilized for synchronizing the data signal according to the second determined result; wherein the first determining circuit is arranged to detect if a time interval of a specific voltage level of the data signal is shorter than a specific time value to distinguish if the data signal is generated by the universal serial bus device or the USB host, and the first determining circuit comprises: a voltage level detector, for detecting the specific voltage level of the data signal, wherein when the voltage level detector detects that the data signal reaches the specific voltage level, the voltage level detector generates a starting signal, and when the voltage level detector detects that the data signal deviates from the specific voltage level, the voltage level detector generates a finishing signal; a time counter, coupled to the voltage level detector, for counting the time interval between the starting signal and the finishing signal; a comparator, coupled to the time counter, for comparing the time interval and the specific time value to generate a comparison result; and a deciding circuit, coupled to the comparator, for determining if the data signal is generated by the universal serial bus device according to the comparison result; wherein when the comparison result indicates that the time interval is shorter than the specific time value, the deciding circuit determines that the data signal is not generated by the universal serial bus device, and when the comparison result indicates that the time interval is not shorter than the specific time value, the deciding circuit determines that the data signal is generated by the universal serial bus device.