Patent ID: 7544544

Claim:
A method for making a two-terminal short channel barrier controlled transient voltage suppression (TVS) diode having forward conduction at a predetermined clamping voltage level above a level associated with conventional semiconductor material doping level and junction type of a semiconductor diode, and being arranged to create a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage level applied between a anode electrode and a cathode electrode of the TVS diode, comprising the steps of (a) providing a semiconductor substrate doped with predetermined carriers in a first concentration, the predetermined carriers being one of majority carriers and minority carriers; (b) forming a transverse channel region on the substrate by deposition of an epitaxial layer, the transverse channel region of the epitaxial layer being lightly doped with majority carriers in a second concentration much lower than the first concentration; (c) forming a cathode region along a frontside surface of the transverse channel region to a predetermined thickness, the cathode region being doped with majority carriers of the first type in a third concentration much higher than the second concentration; (d) forming gate control regions along the frontside surface and adjacently confronting the cathode region, the gate control regions being doped with minority carriers in a predetermined high concentration and to a predetermined depth into the transverse channel region; (e) forming a backside anode electrode conductor along a backside of the substrate; and (f) forming a frontside cathode electrode conductor layer along the topside surface of the substrate so as electrically to interconnect the cathode region and the two gate control regions.