Patent ID: 8105757

Claim:
A manufacturing method for a semiconductor device, comprising: forming a main pattern through a photolithography process over a low-density pattern area of a semiconductor substrate, the semiconductor substrate comprising the low-density pattern area and a high-density pattern area, the high density pattern area comprising a high-density pattern area active area, and the low-density pattern area comprising a low-density pattern area active area, wherein a number of patterns to be formed in the low-density pattern area active area is less than a number of patterns to be formed in the high-density pattern area active area, and forming one or more dummy patterns having substantially the same size as the main pattern on the semiconductor substrate over inactive areas adjacent to the low-density pattern area active area in which the main pattern is formed to increase a pattern density of the low-density pattern area such that the pattern density of the low-density pattern area is substantially the same as a pattern density of the high-density pattern area, the dummy patterns being spaced a predetermined distance from sides of the main pattern.