Patent ID: 8306037

Claim:
A multi-protocol processor, comprising: a system I/O interface capable of selecting one or more of physical input of egress data or physical output of ingress data, or combinations thereof, wherein the selecting comprises selective facilitation of physical input/output of framed egress/ingress data being transmitted/received based at least in part upon a selected one of a plurality of frame-based protocols, and based at least in part upon a data flow type specification, wherein the data flow type specification to specify a data flow based at least in part upon said selected one of said plurality of frame-based protocols; and a first control circuit coupled to the system I/O interface, wherein the first control circuit is capable of performing data link sub-layer frame processing on framed egress data inputted through said system I/O interface, or framed ingress data to be outputted through said system I/O interface, or both, based at least in part upon the data flow type specification specifying a selected one of a first subset of said plurality of frame-based protocols.