Patent ID: 8483333

Claim:
A method for adjusting a system clock in terms of an operational status of at least one non-baseband module, comprising: getting first information corresponding to the system clock of at least one baseband module, wherein the first information comprises a frequency characteristic of the system clock; getting second information corresponding to the at least one non-baseband module, wherein the second information comprises a frequency characteristic of a radio frequency (RF) signal to be received by the non-baseband module, wherein the second information further comprises a first frequency of a first signal and a second frequency of a second signal, the first signal and the second signal corresponds to the RF signal to be received; and selectively adjusting a frequency of the system clock by referring to the first information and the second information, comprising: inspecting whether the RF signal to be received is interfered with by a harmonic of the system clock by referring to the first information and the second information, and generating an inspection result accordingly, comprising: determining priorities of the first signal and the second signal; determining a first candidate system clock frequency and a second candidate system clock frequency for the system clock; inspecting whether the first and second signals will be interfered with by a first harmonic of the system clock at the first candidate system clock frequency respectively; and inspecting whether the first and second signals will be interfered with by a second harmonic of the system clock at the second candidate system clock frequency respectively, and selectively adjusting the frequency of the system clock by referring to the inspection result, comprising: when the inspection result shows that the first signal will be less interfered with by the first harmonic of the system clock at the first candidate system clock frequency than by the second harmonic of the system clock at the second candidate system clock frequency, and the first signal has a higher priority than that of the second signal, adjusting the frequency of the system clock to the first candidate system clock frequency.