Patent ID: 8659085

Claim:
An integrated circuit, comprising: a substrate; a first interconnect structure over the substrate, the first interconnect structure electrically connecting a first contact and a second contact spaced from each other on the substrate; a second interconnect structure over the substrate spaced from the first interconnect structure, the second interconnect structure electrically connecting a third contact and a fourth contact spaced from each other on the substrate, each interconnect structure having a first conductive layer over the substrate and a second conductive layer over the first conductive layer, wherein the first and the second interconnect structures have a protective coating over the second conductive layer; and a thin film resistor positioned over a portion of the substrate between the first and the second interconnect structures and abutting sidewalls of the first and second conductive layers of the first and second interconnect structures, the thin film resistor electrically connecting the first conductive layers of the first and second interconnect structures to each other, wherein the thin film resistor is over at least a portion of a top surface of the protective coating of the first and the second interconnect structures.