Patent ID: 7569448

Claim:
A method of manufacturing a semiconductor device including CMOS transistors and a bipolar junction transistor, comprising the steps of: (a) preparing a semiconductor substrate having a principal surface; (b-1) forming a collector region of a first conductivity type and a first well of the first conductivity type, simultaneously by ion implantation in the semiconductor substrate from the principal surface; (b-2) forming a second well of a second conductivity type opposite to said first conductivity type, in the semiconductor substrate from the principal surface; (c) forming a base region of the second conductivity type in the collector region from the principal surface; (d) forming first and second insulated gate structure on said first and second wells, and a junction protection structure having same constituent elements as one of said insulated gate structures on said base region; (e-1) forming first source/drain regions of the second conductivity type in said first well on both sides of said first insulated gate structure(s); and (e-2) forming second source/drain regions of the first conductivity type in said second well on both sides of said second insulated gate structure(s), and an emitter region of the first conductivity type in the base region with an emitter-base junction reaching the principal surface below said junction protection structure, the second source/drain regions and the emitter region being formed simultaneously.