Patent ID: 7534684

Claim:
A method of forming a non-volatile memory device, comprising: preparing a substrate having at least a first region and a second region; forming a gate insulation layer and a first gate conductive layer on the substrate; successively patterning the first gate conductive layer and the gate insulation layer to expose at least a portion of the substrate in the first region; forming a multi-layered charge storage layer comprising a tunnel insulation layer, a trap insulation layer, and a blocking insulation layer, which are stacked sequentially, on the substrate; patterning the multi-layered charge storage layer to expose at least a portion of the patterned first gate conductive layer; forming a second gate conductive layer on the substrate; and successively patterning the second gate conductive layer and the patterned first gate conductive layer to form a first gate electrode in the first region and a second gate electrode comprising a lower gate and upper gate in the second region.