Patent ID: 7253048

Claim:
A method of manufacturing a semiconductor integrated circuit in which a CMOS transistor is formed on a first conductivity type semiconductor film provided on a first conductivity type supporting substrate through an embedded insulating film, comprising the steps of: conducting thermal oxidation to form a LOCOS for element separation between transistors in the semiconductor film; forming a gate oxide film of a second conductivity type transistor; forming a first conductivity type impurity region between the gate oxide film and the embedded insulating film in a region where the second conductivity type transistor is to be formed; forming a polysilicon film on the gate oxide film and etching the polysilicon film so as to form a gate electrode of the second conductivity type transistor; forming a second conductivity type impurity region in an ultra-shallow portion of each of a source region and a drain region; forming a second conductivity type impurity region having a low density in a middle portion of each of the source region and the drain region; forming a second conductivity type impurity region having the same density as the second conductivity type impurity region in the ultra-shallow portion in a lower portion of each of the source region and the drain region; and providing resist as a mask on a part of the source region and the drain region adjacent to the gate electrode, and further performing ion implantation so as to form a second conductivity type impurity region in each of the source region and the drain region.