Patent ID: 7274244

Claim:
A pulse multiplexed output subsystem comprising: a plurality of pulse generators, each of the plurality of pulse generators to receive a respective pair of a plurality of input signals, each of the plurality of pulse generators to also receive a plurality of quadrature clock signals; a first pair of transistors, wherein a gate of each transistor in the first pair of transistors is coupled to an output of a respective one of a first pair of the plurality of pulse generators; a second pair of transistors, wherein a gate of each transistor in the second pair of transistors is coupled to an output of a respective one of a second pair of the plurality of pulse generators; a first pair of resistive loads, each resistive load in the first pair of resistive loads coupled to a respective one of the first pair of transistors and a respective one of the second pair of transistors; and a first current source coupled to the first pair of transistors and the second pair of transistors.