Patent ID: 8754800

Claim:
A method, the method comprising: switching a successive approximation register, analog-to-digital converter from a conversion mode, to couple an input signal of the successive approximation register, analog-to-digital converter with a capacitance of a digital-to-analog converter during a sampling mode to charge the capacitance of the digital-to-analog converter in the sampling mode; coupling, by a selection logic, an input of a comparator to a sampling mode reference voltage for a duration of the sampling mode, wherein the sampling mode reference voltage comprises a threshold voltage for the voltage of a charge on the capacitance of the digital-to-analog converter at the input of the comparator; comparing, during the sampling mode, a voltage of the charge on the capacitance of the digital-to-analog converter with the sampling mode reference voltage to determine whether the voltage of the charge on the capacitance is greater than or less than the threshold voltage; and outputting, during the sampling mode, a digital comparator signal based upon the comparing the voltage of the charge on the capacitance of the digital-to-analog converter with the sampling mode reference voltage.