Patent ID: 8669969

Claim:
A scan driver comprising: a shift register comprising a plurality of stages, each of the plurality of stages comprising: a signal shift unit comprising a first output terminal, the signal shift unit being coupled to a control signal line configured to transmit a control signal, an inverted control signal line configured to transmit an inverted control signal, and either a scan start signal line or the first output terminal of a previous one of the stages, and being configured to output voltages through the first output terminal and a second output terminal thereof; an odd-numbered scan unit coupled to the first output terminal and the second output terminal of the signal shift unit, and configured to apply a scan signal to an odd-numbered scan line according to a plurality of mode signals and one of a plurality of clock signals, the clock signals being distinct from the control signal and the inverted control signal; and an even-numbered scan unit coupled to the first output terminal and the second output terminal of the signal shift unit, and configured to apply a scan signal to an even-numbered scan line according to the plurality of mode signals and another one of the plurality of clock signals.