Patent ID: 8705308

Claim:
A clock generator, comprising: a comparator comprising a first input node, a second input node, and an output node, the comparator being configured to generate a clock signal at the output node of the comparator; a first circuit configured to generate a temperature-dependent reference voltage at the first input node of the comparator; a second circuit configured to generate a temperature-dependent reference current; and a third circuit coupled with the second input node of the comparator, the third circuit being configured to: increase a voltage level at the second input node of the comparator according to the temperature-dependent reference current when the clock signal at the output node of the comparator indicates a first comparison result of a voltage level at the first node of the comparator and the voltage level at the second input node of the comparator; and decrease the voltage level at the second input node of the comparator when the clock signal at the output node of the comparator indicates a second comparison result of the voltage levels at the first and second input nodes of the comparator.