Patent ID: 7688602

Claim:
A method for controlling a synchronous rectifier (SR), comprising: providing an SR transistor having a source terminal, a drain terminal and a gate terminal; coupling the drain to source current conduction path of the SR transistor between a secondary coil of a transformer and a first voltage output terminal; coupling a second voltage output terminal to the secondary coil; coupling an output capacitor across first and second voltage output terminals; monitoring the drain to source voltage across the SR transistor; determining a change in the drain to source voltage to a voltage below a threshold indicating a primary switch coupled to a primary coil of the transformer has turned off; setting a first flag indicating the change; generating a pulse in a one pulse generator responsive to the first flag; setting an output signal coupled to the gate of the SR transistor responsive to the pulse; resetting the output signal; and inhibiting further pulses from the one pulse generator by leaving the first flag set until a primary turn on detected signal is received.