Patent ID: 8085562

Claim:
A one cycle power factor correction converter circuit comprising: a switch for controlling a DC output voltage of the converter circuit, the switch being switched by a drive signal having a frequency determined by a clock signal having a clock period; the converter circuit being provided with a DC input voltage and producing said DC output voltage, the DC input voltage being rectified from an AC input; a controller circuit for controlling an on-time or off-time of the switch to set the output voltage and to achieve power factor correction at the AC input; the controller circuit comprising an error amplifier receiving a feedback voltage from the output voltage of the converter circuit and a reference voltage and producing an error signal; a ramp generator receiving said error signal and generating a first ramp signal by integrating a signal related to said error signal; a pulse width modulation circuit receiving said ramp signal and a signal related to said error signal and producing a pulse width modulated signal by comparing said first ramp signal and said signal related to the error signal, said pulse width modulated signal determining the on-time or off-time of said switch to control said output voltage with power factor correction; and further comprising a circuit for terminating said first ramp signal when a predetermined inequality exists between said first ramp signal and a reference signal and for developing said clock signal from said first ramp signal.