Patent ID: 6877063

Claim:
A method for multiple memory aliasing for a configurable system-on-a-chip, the configurable system on a chip integrating at least a central processing unit (CPU), an internal system bus, a programmable input/output, and a programmable logic, on a single integrated circuit device, the method comprising: executing code from a read-only memory (ROM) internal memory by the CPU, said ROM internal memory having an enabled alias and fetching the code from the ROM in response to the enabled alias; searching, by the code executing from the ROM, for a valid secondary initialization routine to configure the system including system peripherals; disabling the ROM internal memory alias, and disabling fetching of the code from the ROM in response to the disabled alias; jumping to the secondary initialization routine located in a FLASH external memory; configuring the system-on-a-chip using the secondary initialization routine located in the FLASH external memory; and resetting the CPU after completion of the configuring of the system-on-a-chip.