Patent ID: 7423283

Claim:
A semiconductor structure comprising a transistor, the transistor comprising: a drain region; a source region; a gate; a first sidewall spacer on a first side of the gate; a second sidewall spacer on a second side of the gate; a channel region between the drain region and the source region, a top of the channel region being proximate to a gate dielectric layer; a first recess formed in the drain region below the top of the channel region; a second recess formed in the source region below the top of the channel region; an ohmic contact layer formed in the first recess and in the second recess; and a stressed silicon nitride layer formed over the ohmic contact layer in at least a portion of the first recess below the top of the channel region proximate to the first sidewall spacer and in at least a portion of the second recess below the top of the channel region proximate to the second sidewall spacer.