Patent ID: 7705679

Claim:
An operational amplifier comprising: a first differential stage having a differential pair formed of PMOS transistors; a second differential stage having a differential pair formed of NMOS transistors; a first cascade amplifier stage provided to correspond to the first differential stage; a second cascade amplifier stage provided to correspond to the second differential stage; an output unit configured to generate and output signals in accordance with each output signal from the corresponding cascade amplifier stage; a first switching control unit configured to switch between a non-inverting input terminal and a control electrode of one input transistor at each first and second differential stage, and switch between an inverting input terminal and a control electrode of another input transistor at the first and second differential stages; and a second switching control unit configured to switch between a negative-side power supply voltage terminal and each control gate of the input transistors at the first and second differential stages, and switch between the negative-side power supply voltage terminal and substrate gates of the input transistors at the first differential stage, wherein, when an external signal for stopping operation is input, the first switching control unit shuts off a connection between the non-inverting input terminal and the control electrode of one input transistor at each first and second differential stage, and shuts off a connection between the inverting input terminal and a control electrode of another input transistor at the first and second differential stages, and the second switching control unit connects the negative-side power supply voltage terminal to each control gate of the input transistors at the first and second differential stages and to the substrate gates of the input transistors at the first differential stage.