Patent ID: 7330479

Claim:
A method for controlling the flow of data between a first and second clock domain comprising: selecting one of a plurality of ports included in a physical layer interface in the second clock domain to which to send data; and transmitting data from a transmit buffer in the first clock domain to the selected port in the physical layer interface in the second clock domain, wherein selecting one of the plurality of ports included in the physical layer interface in the second clock domain to which to send data includes: polling each of the plurality of ports in the physical layer interface in the second clock domain to determine polling results indicating available ports which may receive data; sending the polling results to the first clock domain; and selecting, in the first clock domain, a port from the available ports included in the physical layer interface in the second clock domain to which to send data, and wherein sending the polling results to the first clock domain includes sending the polling results to the first clock domain after a predetermined portion of a previous data transmission from the transmit buffer in the first clock domain to the selected port in the physical layer interface in the second clock domain is complete.