Patent ID: 8477124

Claim:
A semiconductor device having a driver circuit formed over a semiconductor substrate, said driver circuit comprising: an output circuit region; two or more output cells arranged in said output circuit region and generating output signals; and two or more output pads receiving said output signals and sending them to the outside, wherein said two or more output pads are arranged along a row direction of said semiconductor substrate, wherein said two or more output cells are arranged in two rows and N columns along said row direction, wherein the output cell arranged at an Nth column of a first row is electrically coupled to the output pad arranged at a (2N−1)th position in said row direction, and wherein the output cell arranged at the Nth column of a second row is electrically coupled to the output pad arranged at a (2N)th position in said row direction wherein said driver circuit is an LCD driver which drives a liquid crystal display unit, wherein said output signals generated by said output cells are source output signals to be sent to pixels included in said liquid crystal display unit, wherein said semiconductor substrate has a rectangular shape which is longer in said row direction, wherein said two or more pads are arranged over said semiconductor substrate along a long side of said semiconductor substrate, wherein said two or more pads are electrically coupled to source lines of the pixels included in said liquid crystal display unit, wherein the output cell at the Nth column of said first row is arranged in a first semiconductor region formed along said row direction in said semiconductor substrate, wherein the output cell at the Nth column of said second row is arranged in a second semiconductor region formed along said row direction in said semiconductor substrate, wherein voltages having different polarities are applied to said first semiconductor region and said second semiconductor region, wherein said driver circuit has logic circuit region, and wherein, in said semiconductor substrate, said logic circuit region is arranged between said first semiconductor region and said second semiconductor region.