Patent ID: 7800227

Claim:
A semiconductor device including a multilayer pad, the multilayer pad comprising: a first pad layer provided over a semiconductor substrate to have a first copper wiring region of copper and a first intralayer insulating region of an insulating material provided within the first copper wiring region, a second pad layer provided over the first pad layer via a first interlayer insulating film to have a second copper wiring region of copper and a second intralayer insulating region of the insulating material provided within the second copper wiring region; the first interlayer insulating film provided between the first pad layer and the second pad layer; an uppermost pad layer provided over the second pad layer via a second interlayer insulating film to have an exposed surface, and the second interlayer insulating film provided between the second pad layer and the uppermost pad layer; wherein a width of each of the first pad layer and the second pad layer, located under the uppermost pad layer, is equal to or larger than a width of the exposed surface of the uppermost pad layer, wherein the first copper wiring region, the first intralayer insulating region, the second copper wiring region, and the second intralayer insulating region are provided in the first and second pad layers, and when the multilayer pad is perspectively viewed from a perpendicularly upper direction to the semiconductor substrate, the first intralayer insulating region is entirely overlaid with the second copper wiring region and the second intralayer insulating region is entirely overlaid with the first copper wiring region, wherein the first copper wiring region of the first pad layer surrounds an entire peripheral area of the first intralayer insulating region and the second copper wiring region of the second pad layer surrounds an entire peripheral area of the second intralayer insulating region.