Patent ID: 8291003

Claim:
A method, comprising: recoding a first range of numbers to a second range of numbers by a binary floating point processor, wherein the first and second range of numbers comprise exponents, the exponents comprising a portion of a word utilized within the binary floating point processor, wherein the recoding depends on a condition, and the recoding is performed by subtracting a minimum exponent of a result precision of an instruction executed by the binary floating point processor from the first range of numbers; performing at least one computation on the second range of numbers by the binary floating point processor and providing at least one intermediate number as a result of the at least one computation performed on the second range of numbers, wherein the at least one intermediate number is in 2's complement representation; and performing at least one check against a constant in the first range of numbers by checking the at least one intermediate number against zero by the binary floating point processor checking a sign bit of the at least one intermediate number as an exponent underflow check, wherein the value of the constant in the first range of numbers depends on the condition, and the condition depends on a minimum allowed exponent of the result precision of the instruction executed by the binary floating point processor.