Patent ID: 7126228

Claim:
A die carrier assembly for probe testing, comprising: at least one semiconductor die having at least one I/O element; a first substantially planar substrate including a die-side surface with at least one die attachment area for temporarily holding the at least one semiconductor die and an opposing back surface; a second substantially planar substrate secured to the die-side surface of the first substantially planar substrate and including at least one aperture therethrough that exposes the at least one die attachment area of the die-side surface, the second substantially planar substrate including an inner boundary defining the at least one aperture and an outer boundary; at least one attachment pad located on the die-side surface of the first substantially planar substrate; a temporary bond comprising a conductive adhesive material that joins the at least one I/O element of the at least one semiconductor die to the at least one attachment pad of the first substantially planar substrate; at least one contact pad located on one of the die-side surface and the back surface of the first substantially planar substrate, the at least one contact pad being disposed laterally outside the inner boundary of the second substantially planar substrate; and at least one conductive trace disposed on one of the die-side surface, and the back surface connecting the at least one attachment pad and the at least one contact pad.