Patent ID: 8476735

Claim:
A semiconductor interposer comprising: a semiconductor substrate; an array of passive devices having various electrical parameters formed in an insulating material on said substrate, said passive devices being connected to vertical interconnects extending to an intermediate interface at the surface of said insulating material; said array of passive devices being arranged in two or more vertical layers within the insulating material and at least one of said passive devices having portions overlying other portions of said passive devices separated by said insulating material; one or more first conductive contact pads formed on a first surface of said interposer; one or more second conductive contact pads formed on a second surface of said interposer; one or more conductive paths passing through said interposer and connecting at least one of the first conductive contact pads to at least one of the second conductive contact pads wherein the one or more conductive paths are not physically connected to any one of the array of passive devices; a device selection unit formed over the insulating material, wherein said device selection unit selectively connects at least one of said passive semiconductor devices to said first conductive contact pads, wherein electrical connectors of the device selection unit are surrounded by at least one dielectric material, and wherein said device selection unit selectively serially connects the vertical interconnect of said at least one of said passive devices to the vertical interconnect of another at least one of said passive devices such that an integrated device attached to said interposer has a desired electrical parameter for the integrated device.