Patent ID: 8704374

Claim:
A semiconductor device comprising: a first insulating layer provided in a first area and in a second area; line-and-space-like second insulating layers formed on the first insulating layer provided in the first area; a third insulating layer formed on the first insulating layer provided in the second area and which is substantially identical to the second insulating layers in height; line shaped first interconnect layers each formed on the first insulating layer provided in the first area and on sidewalls of the second insulating layers, wherein the first interconnect layers comprise a curved corner; a second interconnect layer formed on the first insulating layer provided in the second area and on a top surface and sidewalls of the third insulating layer; a fourth insulating layer covering the first insulating layer, the second insulating layers, the first interconnect layers, and the second interconnect layer; a first contact plug formed in the fourth insulating layer provided in the first area, the first contact plug being connected to the first interconnect layers; and a second contact plug formed in the fourth insulating layer provided in the second area, the second contact plug being connected to the second interconnect layer, and wherein the fourth insulating layer is formed between the first interconnect layers.