Patent ID: 6943412

Claim:
A semiconductor integrated circuit device comprising: a MOS capacitor, one end of which is connected to a power source wire for supplying a power source voltage, and another end of which is connected to a ground potential wire for supplying a ground potential, said power source wire is connected to a power source terminal, to which a first power source voltage is supplied, through a power source conversion circuit for converting said first power source voltage; a ground terminal, to which said ground potential wire is connected; and an electrostatic protection element connected in parallel with said MOS capacitor between said ground terminal and said MOS capacitor, said electrostatic protection element protecting said semiconductor integrated circuit device from electrostatic breakdown due to discharge of electric charge accumulated on said semiconductor integrated circuit device according to a charged device model, wherein, a wire resistance R 1 of said ground potential wire between a connection point on said ground wire with one end of said electrostatic protection element and said ground terminal is larger than a wire resistance R 2 of said ground potential wire between said connection point on said ground potential wire with one end of said electrostatic protection element and a connection point on said ground potential wire with the other end of said MOS capacitor, wherein V C +R 2 ·i<V OX where V C is a clamp voltage of said electrostatic protection element; where V OX is a dielectric breakdown voltage of said MOS capacitor; where i a current flowing in R 2 : and where R 1 >zero and R 2 >zero.