Patent ID: 7721128

Claim:
A computer implemented method for implementing thermal throttling logic in a heterogeneous multi-core processor that is implemented on a single integrated circuit chip, comprising: providing, in each one of a plurality of cores that are included in the heterogeneous multi-core processor, a separate digital thermal sensor that senses a temperature in the digital thermal sensor's respective one of the plurality of cores; setting, in a throttle point register that is included in the processor and outside of the plurality of cores, a first throttling temperature that is used for a first one of the plurality of cores and a second throttling temperature that is used for a second one of the plurality of cores, wherein the first and second throttling temperatures are used at the same time; receiving a sensed temperature value from a particular digital thermal sensor representing a particular current temperature of a particular one of the plurality of cores; reporting the sensed temperature as the particular current temperature in a current temperature status register; and responsive to the particular current temperature exceeding a particular throttling temperature of the particular one of the plurality of cores, throttling only the particular one of the plurality of cores.