Patent ID: 7193423

Claim:
A wafer alignment method, comprising: providing a structure which includes (a) a first semiconductor wafer comprising a first capacitive coupling structure, and (b) a second semiconductor wafer comprising a second capacitive coupling structure; measuring a capacitance of a first capacitor comprising the first and second capacitive coupling structures; and moving the first and second semiconductor wafers with respect to each other in a first direction while the first and second semiconductor wafers are in direct physical contact with each other via a common surface, until the first capacitor has a first maximum capacitance as measured in said measuring the capacitance of the first capacitor, wherein the first direction is essentially parallel to the common surface, wherein said moving the first and second semiconductor wafers comprises: using a stepping motor to move the first semiconductor wafer with respect to the second wafer in equal steps through a plurality of relative positions; using a processor to collect capacitances of the first capacitor at the plurality of relative positions; generating a fitting curve fitted to said collected capacitances verses relative position of the plurality of relative positions if there are two consecutive capacitance drops in said collected capacitances; determining a maximum point of the fitting curve; and using the stepping motor to move the first semiconductor wafer to a relative position of the plurality of relative positions that is closest to a relative position associated with the maximum point.