Patent ID: 8058104

Claim:
A method for use in manufacturing a semiconductor device package ( 10 , 100 ), the method comprising: forming a plurality of post ( 24 ) and a support pad ( 30 ) from an electrically conductive material, including selecting a sheet of the electrically conductive material having a profile height greater than the predetermined profile height of the semiconductor device package ( 10 , 100 ), and selectively removing material from the sheet to form the posts ( 24 ) on a substrate portion ( 76 ) of the electrically conductive material, the plurality of posts ( 24 ) having a profile height equal to a predetermined height of the semiconductor device package ( 10 , 100 ), and each post ( 24 ) in the plurality of posts ( 24 ) having a side surface ( 60 ) positioned at a predetermined package side face ( 16 ); disposing a semiconductor device ( 20 ) on the support pad ( 30 ) within a central region defined by the plurality of posts ( 24 ), the semiconductor device ( 20 ) including a plurality of I/O pads ( 38 ) disposed thereon; electrically connecting the plurality of I/O pads ( 38 ) to associated bond sites ( 36 ) formed on electrically conductive post extensions ( 32 ) protruding from the plurality of posts ( 24 ); covering at least a portion of the semiconductor device ( 20 ), the plurality of posts ( 24 ), and post extensions ( 32 ) with a molding compound ( 18 ) and subsequently removing the substrate portion ( 76 ) of the electrically conductive material.