Patent ID: 7900103

Claim:
A scan chain architecture comprising: a cascade of flip-flop cells each having at least one input and at least one output, a given and a previous flip-flop cell of the cascade thereof having a connection associated therewith selected according to a status of the given flip-flop cell, a status of the previous flip-flop cell and a status of the connection between them according to the following relation INV x,x−1 =NOT( S x XOR S x−1 XOR S x - conn - S x−1 ), where S x , S x−1 , and S x -conn-S x−1 respectively indicate the status after an initialization of the given and previous consecutive flip-flop cells and the status of an original connection between them, given that the connection between them is inverted with respect to the original connection if INV x,x−1 =1.