Patent ID: 7518231

Claim:
A multi-chip package, comprising: a plurality of data inputs; a first supply voltage input configured to receive a first supply voltage level; a second supple voltage input configured to receive a second supple voltage level different from the first supply voltage level; a substrate comprising a plurality of first contact pads, at least one first supply voltage pad, and at least one second supply voltage pad, wherein the first contact pads are coupled to the plurality of data inputs, wherein the first supple voltage pad is coupled to the first supply voltage input, and wherein the second supply voltage pad is coupled to the second supple voltage input; a die of the multi-chip package comprising an integrated circuit, a driver circuit including a default driver and an additional driver, a plurality of second contact pads and at least one first mode pad coupled to the additional driver; and an interconnect conductively coupling the plurality of first contact pads and the plurality of second contact pads, wherein the first mode pad is coupled to the first supply voltage pad when the interconnect has a first length, and wherein the first mode pad is coupled to the second supply voltage pad when the interconnect has a second length, the second length being greater than the first length, wherein the additional driver is configured to be disabled when the first mode pad is connected to the first supply voltage pad and to be enabled when the first mode pad is connected to the second supply voltage pad, and wherein the driver circuit is configured to output a first output signal with a first power level provided by the default driver, and a second output signal with a second power level provided by the default driver and the additional driver, the second power level being higher than the first power level.