Patent ID: 8671227

Claim:
A method of controlling a memory device comprising a memory, the method comprising: receiving a first command for initialization, a second command for reading information for the memory device, and a third command for controlling a low power mode; returning a response indicating whether the memory device supports the third command in response to the second command; in response to the third command, executing a process in accordance with the third command and shifting to the low power mode, flag information indicating success of the process being not set when power supply to the memory device has been cutoff before completion of the shift to the low power mode; executing a first initializing process in response to (1) the first command received after supplying a power to the memory device and (2) a fail of the process in accordance with the third command being received before a power supply to the memory device was stopped a previous time prior to power again being supplied to the memory device, and executing a second initializing process in response to (1) the first command received after supplying the power to the memory device and (2) a success of the process in accordance with the third command being received before the power supply to the memory device was stopped a previous time prior to power again being supplied to the memory device, wherein the second initializing process is completed quicker than the first initializing process, and the first and second initializing processes are alternative processes, which are executed for the memory device to be ready to be written and read by a request from a host.