Patent ID: 8780705

Claim:
A datagram flow optimizer apparatus comprising: a buffer resource including: a first component capable of receiving and temporarily storing a plurality of datagrams in respect of a forward path; and a second component capable of receiving and temporarily storing a plurality of acknowledgements of the datagrams received on a reverse path; a buffer controller arranged to implement, when in use: retaining of the datagrams by the first component in response to less than a predetermined threshold number of the datagrams having been stored by the first component, wherein the buffer controller comprises a flow control mode detector, the flow control mode detector being capable of measuring datagram size, measuring datagram inter-arrival time, and detecting an acknowledgement of a datagram on the reverse path, wherein the flow control mode detector is arranged to identify a substantially constant size of received datagrams over a period of time and to identify a substantially constant inter-arrival time over the period of time in respect of the received datagrams; and forwarding on the forward path of the datagrams retained by the first component in response to the predetermined threshold number of the datagrams being reached, wherein the forwarding comprises forwarding in bursts; and an acknowledgement regulator arranged to use the second component to manipulate temporal spacing between the acknowledgements of the datagrams on the reverse path in order to even out spacing between transmissions of the acknowledgements by the datagram flow optimizer apparatus on the reverse path.