Patent ID: 7342281

Claim:
An electrostatic discharge protection circuit using a silicon controlled rectifier, the circuit comprising: a semiconductor substrate including a first well, a second well, a third well, and a fourth well wherein the second well, the third well, and the fourth well are formed in the first well; first and second heavily doped regions formed in an upper portion of the second well; third, fourth, and fifth heavily doped regions formed in an upper portion of the third well; sixth and seventh heavily doped regions formed in an upper portion of the fourth well; an eighth heavily doped region formed at an interface between the second and third wells; a ninth heavily doped region formed at an interface between the third and fourth wells; a first gate formed on the semiconductor substrate between the third and eighth heavily doped regions and electrically insulated from the semiconductor substrate by a gate insulating layer; and a second gate formed on the semiconductor substrate between the fifth and ninth heavily doped regions and electrically insulated from the semiconductor substrate by the gate insulating layer.