Patent ID: 8718079

Claim:
A first integrated circuit (IC) comprising: a first set of M serializer/deserializer (SERDES) modules configured to communicate with a first set of M SERDES modules of a switch IC of a switch, respectively, where M is an Integer greater than 1; a first set of N SERDES modules configured to communicate with a first set of N ports of the switch, respectively, where N=(M−1); and a first set of N multiplexer modules configured to communicate with (i) the N SERDES modules in the first set of N SERDES modules, respectively, and (ii) the M SERDES modules in the first set of M SERDES modules of the first IC, wherein each of the N multiplexer modules is configured to communicate with a pair of SERDES modules in the first set of M SERDES modules of the first IC.