Patent ID: 7675161

Claim:
A semiconductor device comprising: first wirings having various lengths and provided in a layer on a substrate and being lined up, adjacent one-end portions of the first wirings being arranged in positions displaced from one another in an extending direction of the first wirings; second wirings which are connected to the first wirings, respectively, and which are provided in another layer on the substrate to extend in a direction intersecting the extending direction of the first wirings; first contact portions which electrically connect the first wirings and the second wirings, and which are provided at the one-end portions of the first wirings, respectively; third wirings lined with the first wirings in which the first wirings provided at one-end portion of each third wiring being provided apart from and opposite to the one-end portion of the respective one of the first wirings; and fourth wirings which are connected to the third wirings, respectively, and which are provided in the another layer on the substrate to extend in a direction intersecting the extending direction of the third wirings.