Patent ID: 7534637

Claim:
A method for using an alignment target on a wafer substrate, comprising: selectively forming one or more portions of a geometry design of the alignment target as sub-targets from a set of unique portions of the geometry design of a single target on the alignment target, such that the alignment target has the geometry design configured to provide a desired alignment offset for a process, where each of the sub-targets has a left portion and a right portion and at least two sub-targets have a different geometric pattern on left and right portions such that one portion of the left and right portions of one sub-target of the at least two sub-targets has a first density and one portion of the left and right portions of another sub-target of the at least two sub-targets has a second density, different from the first density; aligning an alignment system with respect to sub-targets; characterizing the process; and determining alignment of the alignment system.