Patent ID: 7113294

Claim:
A recording device, comprising: an interface control section for communicating with a host computer; a CPU operable in a stop mode in which said CPU is on standby in a low power consumption state and in a normal mode in which said CPU is on standby in a normal consumption state; an oscillator for outputting first clock signals; a clock generator for generating second clock signals by inputting the first clock signals and modulating the first clock signals to a predetermined frequency, and outputting the second clock signals; and a clock control section for inputting the first and second clock signals and outputting the first clock signals to the interface control section and the second clock signals to said CPU, respectively, regardless of operation mode of said CPU, wherein said clock control section stops output of the second clock signals to said CPU when the operation mode of said CPU switches from the normal mode to the stop mode, and performs output of the second clock signals after waiting for a predetermined time period while the operation mode of said CPU switches from the stop mode to the normal mode when a signal is inputted to said interface control section from the host computer.