Patent ID: 6919238

Claim:
A method of forming a semiconductor device comprising: forming a polish stop layer on an insulating layer formed on a single crystalline silicon substrate; forming an opening in said polish stop layer; forming an opening in said insulating layer formed on said single crystalline silicon substrate within said opening in said polish stop layer; forming an amorphous or polycrystalline silicon or silicon alloy layer in said opening in said insulating layer on said single crystalline silicon substrate and on said insulating layer; forming a dielectric capping layer on said amorphous in polycrystalline silicon or silicon alloy layer; crystallizing said amorphous or polycrystalline silicon or silicon alloy film in said opening and at a least a portion of said amorphous or polycrystalline silicon or silicon alloy film formed on said insulating layer into a single crystalline silicon or silicon alloy film while said dielectric capping layer is on said amorphous or polycrystalline silicon or silicon alloy layer; and forming a source region and a drain region in the opposite ends of said single crystalline silicon or silicon alloy film, wherein said opening is located beneath the source region but not the remaining portions of said single crystalline silicon or silicon alloy film.