Patent ID: 8228104

Claim:
A duty cycle correcting circuit, comprising: a first driver including a plurality of first driving units and a plurality of first control units, wherein one of the plurality of the first driving units includes a first pull-up device and a first pull-down device that are driven in response to an input clock signal, one of the plurality of the first control units is connected between the first pull-up device and the first pull-down device, and the one of the first control units includes a first auxiliary pull-up device and a first auxiliary pull down device that are selectively driven in response to a first pull-up control signal and a first pull-down control signal, respectively; and a second driver including a plurality of second driving units and a plurality of second control units, wherein one of the plurality of the second driving units includes a second pull-up device and a second pull-down device that are driven in response to an output signal of the first driver, one of the plurality of the second control units is connected between the second pull-up device and the second pull-down device, and the one of the second control units includes a second auxiliary pull-up device and a second auxiliary pull-down device that are selectively driven in response to a second pull-up control signal and a second pull-down control signal, respectively, wherein logical values of the first pull-up control signal and the first pull-down control signal are alternately changed in response to a duty ratio detecting signal, and logical values of the second pull-up control signal and the second pull-down control signal are alternately changed in response to the duty ratio detecting signal.