Patent ID: 7868655

Claim:
A programmable logic device integrated circuit comprising: a plurality of logic elements that perform custom logic functions; and a configurable time-borrowing flip-flop having a flip-flop data input, a flip-flop data output, and a flip-flop clock input that receives a clock signal, wherein the configurable time-borrowing flip-flop includes: a first latch having a data input that is connected to the flip-flop data input, having a data output, and having a clock input; a second latch having a data input that is connected to the data output of the first latch, having a data output that is connected to the flip-flop data output, and having a clock input that is connected to the flip-flop clock input; and a configurable delay circuit that has an input connected to the flip-flop clock input and that has an output connected to the clock input of the first latch at which the configurable delay circuit provides an adjustable delayed version of the clock signal, wherein the configurable delay circuit comprises a programmable multiplexer having an inverting output that is connected to the clock input of the first latch.