Patent ID: 6916185

Claim:
A method of connecting an integrated circuit to a substrate, the method comprising: forming an integrated circuit, the integrated circuit having a main area on which is disposed an electrical contacting region; forming a mechanical supporting structure on the main area of the integrated circuit; forming a solderable surface region on the mechanical supporting structure; connecting a solderable terminal region to the electrical contacting region; providing a substrate, the substrate having a main area; forming a first soldering region on the main area of the substrate, the first soldering region being alignable with the solderable surface region on the mechanical supporting structure of the integrated circuit; forming a second soldering region on the main area of the substrate, the second soldering region being alignable with the solderable terminal region of the integrated circuit; simultaneously soldering the surface region to the first soldering region and soldering the terminal region to the second soldering region, wherein the steps before soldering the surface region and the terminal region are carried out at a wafer level; the method further comprising separating the wafer into individual chips; and soldering the surface region and the terminal region at a chip level.