Patent ID: 8423866

Claim:
A method of operating a non-volatile memory, comprising: providing an error management for correcting errors liable to arise when the non-volatile memory ages through use; providing a measure of the age of the non-volatile memory by the number of program/erase cycling undergone by the non-volatile memory; commencing the error management only when the non-volatile memory has reached a predetermined age; and said method further comprising: configuring the memory into first and second portions, the first portion having memory cells operating with less error rate but lower density storage compared to the second portion; programming input data into the first portion; subsequently, copying the data to create a copy in the second portion; and wherein the error correction management further comprises: (a) checking the copy for error; (b) identifying the copy as valid or invalid data depending on whether the error is less than a predetermined number of error bits or not; (c) when the copy is identified as invalid, repeating the copying to another location in the second portion and steps (a) to (c) up to a predetermined number of times.