Patent ID: 7188038

Claim:
Method of estimating an electrical capacitance of a circuit component comprising: a first rectangular conducting plate, having a width W, a length L and a thickness t M1 ; a second conducting plate, parallel to the first plate and separated from the latter by a distance t Ox , having a rectangular central part facing the first plate and a peripheral part surrounding said central part; a first homogeneous dielectric, of relative dielectric permittivity ε Ox , placed between the first and second plates and having a thickness of t Ox between the two plates and of t OxSt in line with said peripheral part of the second plate, so that said first dielectric has a height step t Ox –t OxSt around the perimeter of the first plate; and a second homogeneous dielectric, of relative dielectric permittivity ε E , surrounding the first plate and the first dielectric, the method comprising the estimation of the capacitance of the component as a sum of several terms including at least two terms of the form C 0 .W.L and C 1 .2(W+L), with C 0 = ɛ 0 · ɛ Ox t Ox ⁢ ⁢ and ⁢ ⁢ C 1 = ɛ 0 π · K · Ln ⁡ ( a ) , ε 0 being the dielectric permittivity of free space, K = ɛ Ox · ɛ E ɛ Ox - ( ( ɛ E - ɛ Ox ) 2 ( ɛ E + ɛ Ox ) · t OxSt t Ox ) , a = - 1 + 2 ⁢ k 2 + 2 ⁢ k ⁢ k 2 - 1 ⁢ ⁢ with ⁢ ⁢ k = 1 + t M1 t Ox .