Patent ID: 7125795

Claim:
A fabrication method for microstructures with a high aspect ratio, the method comprising the steps of: (a) providing a silicon substrate; (b) depositing a first insulation layer on a surface of the silicon substrate, and forming a first polysilicon layer with predetermined pattern on the first insulation layer; (c) depositing a second insulation layer on a surface of the first polysilicon layer, and planarizing the second insulation layer; (d) selectively etching the second insulation layer in a first predetermined pattern on the first polysilicon layer to form a contact plug that penetrates to the first polysilicon layer, and simultaneously etching the second insulation layer in a predetermined pattern on the first insulation layer to form a etching channel that penetrates to the silicon substrate; (e) depositing a first metal layer on the second insulation layer; (f) defining the geometry size of the first metal layer, and removing the first metal layer that corresponds the etching channel by etching; (g) depositing a passivation layer on the first metal layer to form a microstructure and a circuit layout; and (h) etching the silicon substrate through the etching channel to suspend the microstructure, forming a microstructure with high aspect ratio.