Patent ID: 7002401

Claim:
A circuit to supply an output voltage from an input voltage, comprising: a first transistor and a second transistor connected in parallel between a first of a voltage source and a reference voltage and, through a current limiting circuit, a second of the voltage source and the reference voltage; and a differential gain stage having a first input connected to receive the input voltage, a second input connected to a node between the first transistor and the current limiting circuit, and an output connected to the control gate of the first and second transistors, wherein the output voltage is supplied from a node between the second transistor and the current limiting circuit, wherein the reference voltage is ground and said first and second transistors are NMOS transistors connected through the current limiting circuit to ground, and wherein said current limiting circuit is a current mirror comprising a third NMOS transistor and a fourth NMOS transistor whose control gates are connected, wherein the first transistor is connected to ground through the third transistor and the second transistor is connected to ground through the fourth transistor.