Patent ID: 8055932

Claim:
An integrated system on a chip with serial asynchronous communication capabilities, comprising: a central core processor for performing predefined digital processing functions on the chip; an on-chip free running clock circuit for generating a temperature compensated clock, which said on-chip free running clock circuit does not require a synch signal from external to the chip; a Asynchronous Universal Receiver Transmitter (UART) on-chip communication device for digitally communicating with an off-chip UART over an external UART bus for transmitting data thereto and receiving input data therefrom, which off-chip UART has an independent time reference, which communication between said on-chip UART and said off-chip UART is effected without clock recovery, said on-chip UART having a time-base derived from said temperature compensated clock, which time-base is independent of any timing information in the input data received during a receive operation; wherein said temperature compensated clock provides an on-chip time reference for both central core processor and said UART on-chip communication device; a plurality of control and data registers associated with said UART on-chip communication device; and an interface between said central core processor and said registers to both control said UART on-chip communication device and provide a data interface thereto.