Patent ID: 8030202

Claim:
A method comprising: forming a first insulator layer on a substrate; forming a second insulator layer different than said first insulator layer on said first insulator layer; patterning at least one first opening through said first insulator layer and said second insulator layer to expose said substrate; lining sidewalls of said first opening with a sacrificial material; filling said first opening with a conductor, said conductor contacting said substrate; selectively removing said sacrificial material, to create at least one second opening along said conductor within said first opening, said second opening running between said conductor and said first insulator layer, and between said conductor and said second insulator layer; selectively removing portions of said first insulator layer through said second opening in a process that removes said first insulator layer at a faster rate than said second insulator layer is removed, making said second opening wider in a lower region between said conductor and said first insulator layer relative to an upper region between said conductor and said second insulator layer; and depositing a third insulator material into said upper region of said second opening to fill said upper region of said second opening and to leave at least one air gap between said conductor and said first insulator layer in said lower region of said second opening.