Patent ID: 7923361

Claim:
A method for manufacturing a semiconductor integrated circuit device, comprising the steps of: (a) forming a resist film pattern over a first main surface of a wafer; (b) performing a high-concentration ion implantation treatment on the first main surface side of the wafer with the resist film pattern being present; (c) after the step (b), performing a baking treatment on the resist film pattern under atmospheric pressure, and within the wafer temperature range of 265 degrees centigrade or more and less than 350 degrees centigrade; (d) after the step (c), performing a first plasma ashing treatment on the first main surface of the wafer under an oxygen gas atmosphere, and within the wafer temperature range; and (e) after the step (d), applying a higher RF power than that with the first plasma ashing treatment, and performing a second plasma ashing treatment on the first main surface of the wafer under an oxygen gas atmosphere and within the wafer temperature range.