Patent ID: 8563373

Claim:
A method of manufacturing a semiconductor device having vertical channels, the method comprising: etching a semiconductor substrate to protrude a plurality of active regions which are adjacent each other; forming filling material layers in element isolation regions by filling etched portions between the active regions; forming a first mask pattern that extends in a first direction and covers at least a portion between adjacent active regions; forming a second mask pattern which extends in a second direction at a predetermined angle with respect to the first direction; removing an exposed portion of the filling material layers using the first and second mask patterns as etching masks, wherein removing the exposed portion of the filling material layers comprises: forming filling layers in the element isolation regions; and forming the second mask pattern over the first mask pattern to expose portions of top surfaces of the filling layers and a portion of the first mask pattern; removing the first and second mask patterns; exposing the active regions disposed between the filling material layers; and forming gate electrodes on exposed active regions, wherein a top surface of an element isolation layer protrudes beyond a top surface of the active regions after removing the first and second mask patterns and forming the gate electrodes.