Patent ID: 8737197

Claim:
An arrangement in a network tap for monitoring state of a monitoring system, comprising: a set of network ports, said set of network ports including a set of input network ports for receiving data traffic and a set of output network ports for outputting said data traffic from said network tap; a monitoring port, said monitoring port being configured to receive said data traffic from said set of network ports and to forward said data traffic onward to said monitoring system; a logic component configured for executing a sequential heartbeat diagnostic test, wherein said sequential heartbeat diagnostic test is configured for providing a first set of sequential heartbeat packets for testing and determining said state of said monitoring system, wherein said logic component is a field programmable gate array (FPGA), wherein said FPGA includes a sequential heartbeat packet generator configured for generating and inserting said first set of sequential heartbeat packets into said date traffic flowing into said monitoring system, wherein said FPGA includes a set of counters, said set of counter being associated with said first set of sequential heartbeat packets, wherein said set of counters is compared against a set of failure conditions to determine said state of said monitoring system; and a logic component for activating one or more events when a failure condition exists for said state of said monitoring system.