Patent ID: 7555589

Claim:
A multi-protocol serial interface system comprising: a multi-protocol port pin array comprising a plurality of port pins, wherein roles of the port pins are changed depending on a protocol applied to a system, the plurality of port pins interfacing with an external system for exchanging data with the external system; a transport protocol change FPGA for determining the roles of the port pins of the multi-protocol port pin array depending on a variably changed transport protocol circuit logic in response to code data programmed in a nonvolatile coding cell, wherein a role of at least one of the port pins determined by the variably changed transport protocol circuit logic is selected from at least three different roles, wherein the transport protocol change FPGA comprises: a first pull-up switch for selectively supplying a power voltage in response to a pull-up enable signal, a first pull-up driving unit for driving the power voltage applied from the first pull-up switch, a data I/O unit for inputting and outputting the code data, a ferroelectric capacitor unit for storing the code data in the nonvolatile coding cell, a second pull-down switch for selectively supplying the ground voltage in response to a pull-down enable signal, and a second pull-down driving unit for driving the ground voltage applied from the second pull-down switch; a pull-up change FPGA for regulating pull-up load of the port pins corresponding to the roles of the port pins determined in the transport protocol change FPGA; and a memory for storing data processed in the transport protocol change FPGA unit and exchanged with the external system.