Patent ID: 8774197

Claim:
A node (e.g., 104 , 404 ) for a packet-based network, the node comprising: one or more receivers (e.g., 130 ), each receiver configured to receive an incoming packet-based signal (e.g., 106 ) from an other node (e.g., 102 ) of the network and apply line timing to recover a line-timed clock signal (e.g., 140 ) from the incoming packet-based signal, wherein the incoming packet-based signal is received over an incoming facility (e.g., 106 ) having timed transitions even when no packet data is being transmitted over the incoming facility; a clock selector (e.g., 134 ) configured to select one of the one or more recovered line-timed clock signals as a selected reference clock signal (e.g., 146 ); a timing engine (e.g., 136 ) configured to filter out phase noise from the selected reference clock signal to generate a node clock signal (e.g., 148 ); and one or more transmitters (e.g., 132 ), each transmitter configured to generate and transmit an outgoing packet-based signal (e.g., 108 ) to an other node of the network based on the node clock signal.