Patent ID: 8560741

Claim:
A data processing system comprising: a plurality of processing devices on a single chip, comprising a first processing device, a second processing device communicating with the first processing device, a third processing device and a fourth processing device communicating with the third processing device; one or more communication paths configured to enable communication between the first processing device and the second processing device, and between the third processing device and the fourth processing device; and a monitor coupled the one or more communication paths, the monitor configured to: monitor a first amount of data in data stream from the first processing device to the second processing device; monitor a second amount of data in data stream from the third processing device to the fourth processing device; determine whether a relationship between the first amount of data and the second amount of data satisfy an expected relationship; generate an anomaly signal responsive to the relationship between the first amount of data and the second amount of data not satisfying the expected relationship; and throttle the data stream from the first processing device to the second processing device or the data stream from the third processing device to the fourth processing device responsive to generating the anomaly signal.