Patent ID: 7224599

Claim:
A semiconductor device comprising: a non-volatile memory cell array including a plurality of word lines, a plurality of bit lines intersected with the plurality of word lines, and a plurality of non-volatile memory cells arranged at respective positions where the plurality of word lines are intersected with the plurality of bit lines; a write data register holding a write data; and a write buffer connected to the non-volatile memory cell array and supplying a write signal corresponding to the write data to the non-volatile memory cell, wherein in a first write cycle, the write data register fetches the write data from outside of the semiconductor device, wherein in a second write cycle after the first write cycle, the write data register outputs the write data to the write buffer and the write buffer supplies the write signal to the non-volatile memory array, and wherein the semiconductor device performs a dummy write cycle to write the write data held in the write data register to the non-volatile memory array before the power supply to the non-volatile memory array, the write data register, and the write buffer is turned off.