Patent ID: 8729552

Claim:
A back plane for a flat panel display apparatus, the back plane comprising: a substrate; a source electrode and a drain electrode formed on the substrate, each of the source electrode and the drain electrode having a side surface and a top surface; a capacitor bottom electrode formed on a same layer as the source/drain electrodes; an active layer formed on the substrate in correspondence to the source electrode and the drain electrode; a blocking layer interposed between the source electrode and the active layer and between the drain electrode and the active layer, the blocking layer contacting the side surface of the source electrode and the side surface of the drain electrode; a first insulation layer formed on the substrate to cover the active layer and continuously extended to cover the capacitor bottom electrode; a gate electrode formed on the first insulation layer in correspondence to the active layer; a capacitor top electrode formed on a same layer as the gate electrode in correspondence to the capacitor bottom electrode; and a second insulation layer formed on the first insulation layer to cover the gate electrode and the capacitor top electrode.