Patent ID: 7395289

Claim:
A frequency synthesizing and back-end processing circuit, comprising: a frequency synthesizer, operated by a clock signal, said frequency synthesizer including a first multiplexer; a first memory unit, coupled to said first multiplexer, for storing a first reference frequency; a second memory unit, coupled to said first multiplexer, for storing a second reference frequency; a shift register, for storing a target frequency and comparing the target frequency with a predetermined value; a control unit, coupled to said shift register, said control unit based on a result of comparing said target frequency with said predetermined value selecting one of said first reference frequency and said second reference frequency passes said first multiplexer; a digital-to-analog converter, for converting a first signal passing through said first multiplexer to a second signal; and a second multiplexer, based on a control signal passing one of said first signal and said second signal to obtain a third signal; and a back-end processing circuit including a mixer, coupled to said second multiplexer for receiving said third signal; and a filter, coupled to said mixer.