Patent ID: 8773894

Claim:
A static random access memory, comprising: a pre-charger connected to a first local bit line for pre-charging the first local bit line, wherein the pre-charger is comprised of a first PMOS transistor and a first inverter; a first cell column array/peripheral circuit connected to the first local bit line and having a plurality of cells for temporarily storing data, the cells being connected to the first local bit line; a first ripple buffer connected to the first local bit line and a second local bit line for sending the data from the first local bit line to the second local bit line, wherein the first ripple buffer is comprised of a second PMOS transistor, an NMOS transistor, a NAND gate, and a second inverter; a second cell column array/peripheral circuit connected to the second local bit line and having a plurality of cells for temporarily storing data, the cells being connected to the second local bit line; and a second ripple buffer connected to the second local bit line and a third local bit line for sending the data from the second local bit line to the third local bit line; wherein the first cell column array/peripheral circuit has a first cell column array with the plurality of cells, and the second cell column array/peripheral circuit has a first cell column array with the plurality of cells.