Patent ID: 6904582

Claim:
A photomask for reducing power supply voltage fluctuations in an integrated circuit, comprising: a substrate; and a patterned layer formed on at least a portion of the substrate, the patterned layer formed using a mask pattern file created by: analyzing a pattern in a mask layout file to identify a region in the pattern to add one or more decoupling capacitors; moving a feature located in the identified region from a first position to a second position in the mask layout file to create a space in the identified region, the feature moved to the second position based on a design rule; automatically placing the decoupling capacitors in the space created in the identified region; using a design rule check tool to identify any design rule violations in the mask layout file resulting from moving the feature to create the space in the identified region and automatically placing the decoupling capacitors in the created space; and if one or more design rule violations are identified by the design rule check tool, using a design rule fix tool to automatically modify the mask layout file to correct the one or more identified design rule violations.