Patent ID: 8125792

Claim:
A semiconductor device, comprising: a substrate having a side surface, a first surface and a second surface being opposed to the first surface; a semiconductor chip; connecting terminals on the first surface of the substrate, the connecting terminals including first connecting terminals and second connecting terminals disposed outside the first connecting terminals in plan view; external electrode terminals on the second surface of the substrate; metal lines electrically connected to the second connecting terminals; a solder resist disposed on the first surface of the substrate, wherein the semiconductor chip is connected to the first surface of the substrate via the first connecting terminals, all of the first connecting terminals being disposed directly under the semiconductor chip, the second connecting terminals are connected to another semiconductor device, and each of the metal lines is exposed from the side surface and the solder resist; and wherein the metal lines include first metal lines and second metal lines, the first metal lines are disposed in same plane as the second connecting terminals, and the second metal lines are disposed under the connecting terminals.