Patent ID: 7977156

Claim:
A method of manufacturing a semiconductor chip package, the method comprising: providing a first wafer including circuitry and chip pads on a first surface of the first wafer; reducing a thickness of the first wafer by removing a portion of the first wafer from a second surface of the first wafer; forming a plurality of first chips from the first wafer; separating the plurality of first chips from each other to form individual first chips; providing a second wafer including circuitry and chip pads on a first surface of the second wafer; reducing a thickness of the second wafer by removing a portion of the second wafer from a second surface of the second wafer; forming a plurality of second chips from the second wafer; separating the plurality of second chips from each other to form individual second chips; providing a wafer substrate having a plurality of first connection vias therein, at least one surface of respective first connection vias being exposed; attaching the individual first chips to the wafer substrate; stacking the individual second chips on respective individual first chips and attaching the individual second chips to the respective individual first chips; and after attaching the individual first chips to the wafer substrate and attaching the individual second chips to the respective individual first chips, separating the wafer substrate to create a plurality of individual chip stack packages.