Patent ID: 7761392

Claim:
A signal processing network comprising: a signal aggregator comprising a first signal input, a second signal input, a first signal output and a first control signal input, wherein said signal aggregator is configurable by applying a first variable magnitude control signal to said first control signal input, wherein setting said first variable magnitude control signal to a first magnitude configures said aggregator to operate as an infinite logic AND gate, wherein setting said first variable magnitude control signal to a second magnitude configures said aggregator to operate as an infinite logic OR gate, and wherein operation of said signal aggregator varies between said infinite logic AND gate and said infinite logic OR gate as said first variable magnitude control signal varies in magnitude between said first magnitude and said second magnitude; an infinite logic signal inverter comprising a third signal input, a second signal output and a second control signal input, wherein an input-output relation of said infinite logic signal inverter is a function of a second variable magnitude control signal applied to said second control signal input; and wherein, said signal aggregator and said infinite logic signal inverter are coupled.