Patent ID: 7054404

Claim:
A variable frequency dividing circuit comprising: a first frequency dividing circuit receiving an input signal, for performing frequency-division of the input signal by a first value P, where P is a positive integer; a second frequency dividing circuit receiving the P-frequency-divided output signal of said first frequency dividing circuit, for performing frequency-division of the P-frequency-divided output signal by a second value A, where A is a positive integer; a circuit for generating and outputting two signals having a phase difference equivalent to one period of the P-frequency-divided output signal of said first frequency dividing circuit, whenever frequency-divided by A is performed by said second frequency dividing circuit; an interpolator receiving the two signals, for generating and outputting an output signal of a phase obtained by interpolating a phase difference between said two signals in accordance with a interior division ratio set by a control signal applied thereto; said interpolator adopting P as the dividing number of the phase difference and producing an output signal, the phase of which is a predetermined multiple of a unit obtained by dividing the phase difference equivalent to one period of the P-frequency-divided output of said first frequency dividing circuit by P in accordance with the interior division ratio; and; means for incrementing or decrementing the interior division ratio of said interpolator, whenever the frequency-division by A is performed by said second frequency dividing circuit, by B times the unit obtained by dividing the phase difference equivalent to one period of the P-frequency-divided output of said first frequency dividing circuit by P where B is a positive integer that is less than P; said interpolator producing an output signal obtained by performing frequency-division of the input signal by a frequency-dividing factor A×P+B.