Patent ID: 7312114

Claim:
A manufacturing method for a trench capacitor having an isolation collar in a substrate which is electrically connected to a substrate on a single side via a buried contact for use in a semiconductor cell having a planar selection transistor provided in the substrate and connected via the buried contact, comprising: providing a trench in the substrate using a hard mask having a corresponding mask opening; providing a capacitor dielectric in the trench on the trench wall; providing a first metallic liner on the capacitor dielectric in the trench on the trench wall; providing a first conductive filling in the trench and etching back the conductive filling within the trench; etching back the capacitor dielectric and the first metallic liner within the trench to at least the upper surface of the etched-back first conductive filling; providing an isolation collar in the trench above the capacitor dielectric, above the first metallic liner and above the etched-back first conductive filling; etching back the first conductive filling within the trench to below the lower side of the isolation collar; providing a metallic region within the trench in electrical contact with the first metallic liner and etching back the metallic region within the trench to below the upper side of the isolation collar; etching back the isolation collar to below the upper side of the substrate and to above the upper side of the etched-back metallic region; and providing a single-sided isolation region and a single-sided contact region to the substrate by partly removing a second conductive filling in electrical contact with the etched-back metallic region.