Patent ID: 8912073

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: 1) providing a substrate and forming a pad oxide over the substrate; 2) etching the pad oxide and the substrate to form two shallow trenches and filling the two shallow trenches with an oxide to form two shallow trench isolation structures, a high-voltage device region being provided between the two shallow trench isolation structures; 3) forming a hard mask layer over the substrate; 4) performing a dry etching process to remove a portion of the hard mask layer in the high-voltage device region to expose both a portion of the pad oxide in the high-voltage device region and adjacent portions of the respective shallow trench isolation structures, wherein hard mask residues are left along boundaries between the high-voltage device region and the shallow trench isolation structures after the dry etching process; 5) reducing a thickness of each of the exposed portions of the respective shallow trench isolation structures using a first rinsing liquid to expose the hard mask residues; and 6) removing the hard mask residues using a second rinsing liquid.