Patent ID: 7521301

Claim:
A method of fabricating an integrated circuit transistor comprising: forming a fin extending vertically from a substrate; implanting a first impurity of a predetermined conductivity type in an upper portion of the fin; implanting a second impurity of the predetermined conductivity type in an entire exposed surface of the fin; forming a gate insulation layer on the fin; forming a gate electrode crossing over the fin on the gate insulation layer; wherein a first layer of the predetermined conductivity type comprised of the first and second impurities is formed in the upper portion of the fin; wherein a second layer of the predetermined conductivity type comprising the second impurity is formed in the fin under the first layer; wherein the second layer is lightly doped the predetermined conductivity type relative to the first layer; and wherein the second impurity of the predetermined conductivity type is implanted using an oblique ion implantation so as to provide uniform concentration of the second impurity across the fin, between opposing sidewalls thereof.