Patent ID: 7329929

Claim:
A SRAM cell comprising: a first access device; a second access device; a first pull-up/pull-down configuration having equipotential gates at a first potential driven by the second access device; a second pull-up/pull-down configuration having equipotential gates at a second potential driven by the first access device; a first metal interconnection line operatively coupling together the first access device and the equipotential gates of the second pull-up/pull-down configuration; a second metal interconnection line operatively coupling together the second access device and the equipotential gates of the first pull-up/pull-down configuration, wherein the first and second access devices, the first and second pull-up/pull-down configurations, and the first and second metal interconnection lines constitutes an SRAM device; a dielectric film overlain on top of the SRAM device; a first contact plug operatively coupled to the first metal interconnection line and traversing through the dielectric film; a first metal plate operatively coupled to the first contact plug and overlain on top of the dielectric film, wherein the first metal plate, a portion of the dielectric film and a portion of the second metal interconnection line comprising a first shielding capacitor, wherein the SRAM device and the first shielding capacitor constitutes the SRAM cell, whereby the first shielding capacitor increases the SRAM cell capacitance, thereby reducing a soft error rate.