Patent ID: 8229014

Claim:
A signal processing apparatus for processing Orthogonal Frequency Division Multiplex (OFDM) symbols, the apparatus comprising: a memory architecture including a plurality of memory banks; a demodulation block configured to receive samples of the OFDM symbols and accumulate the samples into a plurality of interlace memory within the memory architecture, wherein the demodulation block comprises: a rotator configured to rotate each of the samples by a predetermined phase offset based in part on a number of interlaces within the OFDM symbol, an accumulator configured to accumulate samples associated with a predetermined interlace into a particular interlace memory location, and a counter configured to provide a modulo count, the modulus, P, being equal to a number of subbands in each interlace of a plurality of M interlaces, and the accumulator is configured to accumulate M samples in each of P locations of a particular interlace memory based on a counter value; a computational block configured to perform a frequency domain transform on at least one of the samples in the plurality of interlace memory; and a channel estimator coupled to the memory architecture and configured to determine a channel estimate based at least in part on samples accumulated in one of the plurality of interlace memory, wherein the channel estimator comprises a descrambler configured to descramble a plurality of pilot interlace samples stored in one of the plurality of interlace memory.