Patent ID: 8772859

Claim:
A semiconductor memory device comprising: a substrate; a first stacked body having a plurality of electrode layers and a plurality of first insulating layers stacked on the substrate so as to be respectively alternating; a second stacked body provided on the first stacked body, having a selector gate and a second insulating layer provided thereon; a memory film provided on a sidewall of a first hole that penetrates through the first stacked body in the stacking direction; a gate insulating film provided on a sidewall of a second hole that penetrates through the second stacked body in the stacking direction, the second hole communicating with the first hole; and a channel body provided on an inner side of the memory film and on an inner side of the gate insulating film, wherein a step part is provided between a side face of the selector gate and the second insulating layer; and a region positioned near a top end of the selector gate of the channel body is silicided.