Patent ID: 8612830

Claim:
A nonvolatile memory device comprising: a plurality of blocks which are deletion units; and a memory controller coupled to the plurality of blocks to control data writing and data reading in the plurality of blocks, wherein each of the plurality of blocks includes a plurality of memory cells that store data containing error correcting codes, wherein the plurality of blocks includes a first block and a second block, and wherein the memory controller is configured to: read data stored in the first block; detect an error contained in the read data; execute, when a number of bits of the detected error exceeds a threshold value, a process to correct the error contained in the read data and store the corrected data in the second block; and transmit, when the read data contains an uncorrectable error, the read data with a status information indicating that the read data contains the uncorrectable error, wherein the nonvolatile memory device stores management information indicating a number of deletions executed in each of the plurality of blocks, and wherein the memory controller changes the threshold value based on the number of deletions executed in the first block.