Patent ID: 7875926

Claim:
A super-silicon-rich oxide (SSRO) non-volatile memory cell, comprising: a) a gate conductive layer disposed on a substrate; b) a source/drain region disposed in the substrate at respective sides of the gate conductive layer; c) a tunneling dielectric layer disposed between the gate conductive layer and the substrate; d) a SSRO layer serving as a charge trapping layer disposed between the gate conductive layer and the tunneling dielectric layer; wherein a refractive index at 248 nm wave length of the SSRO layer ranges from 1.7 to 2; wherein the tunneling dielectric layer comprises a bottom oxide layer, a nitride layer and a top oxide layer from bottom to top formed between the SSRO layer and the substrate; and e) an upper-dielectric layer disposed between the gate conductive layer and the SSRO layer.