Patent ID: 8199772

Claim:
A synchronous Generic Framing Protocol mapper, comprising: a fractional M/N clock generator configured to receive an incoming client timing signal and to generate a M/N clock by digitally multiplying the incoming client timing signal by a ratio M/N where M and N comprise integers; and a frame encoder configured to receive an incoming client signal and to encode the incoming client signal into Generic Framing Protocol frames such that an output signal comprising a Generic Framing Protocol-mapped signal operates synchronously with the M/N clock; wherein the Generic Framing Protocol-mapped signal is used directly on Optical Transport Network without an intervening Synchronous Optical Network/Synchronous Digital Hierarchy layer there between; wherein the Generic Framing Protocol-mapped signal comprises a frame mapped Generic Framing Protocol signal, and wherein the frame encoder is configured to: extract valid Ethernet media access control and data frames from the incoming client signal; drop errored frames, control frames, and frames with invalid frame check sequence; encapsulate remaining frames into a Generic Framing Protocol frame with a Generic Framing Protocol header; provide Generic Framing Protocol frames responsive to the M/N clock; and signal to an IDLE generator to provide Generic Framing Protocol IDLE frames responsive to no Generic Framing Protocol frame availability.