Patent ID: 7939949

Claim:
A semiconductor device, comprising: a semiconductor substrate having a first side and a second side; an integrated circuit in the semiconductor substrate; a plurality of copper terminals at the first side of the substrate, wherein the copper terminals are electrically connected to the integrated circuit; a dielectric layer on the first side of the substrate, wherein the dielectric layer has a plurality of openings at least partially aligned with corresponding terminals, and wherein individual openings have sidewalls; a plurality of wirebond interfaces on corresponding copper terminals, wherein individual wirebond interfaces have an adhesion element attached to a corresponding copper terminal and a wirebond element on the adhesion element, the adhesion element having a depression at least partially extending into the opening, the wirebond element comprises nickel that at least substantially fills the depression in the adhesion element and a wirebond film on the nickel, at least a portion of the wirebond film being in the depression, and the nickel having a volume in the depression greater than a volume of the wirebond film in the depression; and wherein the adhesion elements comprise liners along the sidewalls of the openings in the dielectric layer and copper deposits on the liners.