Patent ID: 7595631

Claim:
A chip test system, comprising: a probe card; a chip tray comprising a plurality of test units, each test unit comprising: a socket for loading a chip; a chip contact area comprising a plurality of chip contact points faced opposite to contacts of the chip for electrically contacting the chip; an extension contact area having a plurality of extension contact points corresponding to the chip contact points to direct test signals into the chip and direct feedback signals out of the chip, wherein the chip contact area and the extension contact area are disposed on a first side of a first layer; and an alignment point to provide an alignment location for the probe card, wherein the chip tray moves to let the probe card to sequentially test the test units, and the probe card aligns with the test unit according to the alignment point; and a cover plate comprising a plurality of slits, which expose the extension contact area to the probe card for testing, and fastened on the chip tray.