Patent ID: 7911274

Claim:
A transconductance control circuit comprising: a square circuit comprising a trans-linear loop circuit including vertically-connected first and second MOS transistors with a gate and drain of each transistor being connected to each other, a third MOS transistor of which gate is connected to the gate of the second MOS transistor, and a fourth MOS transistor of which gate is connected to a source of the third MOS transistor, the square circuit comprising a supply means for increasing a current flowing through each of the third and fourth MOS transistors by several times and supplying a resultant current to the first and second MOS transistors, the square circuit using a drain of the second MOS transistor as a current input, and connecting one of the third and fourth MOS transistors to a first current source while outputting a current flowing through the other third or fourth MOS transistor as a current mirror output, and the current mirror output serves as a bias current.