Patent ID: 7685607

Claim:
An embedded processor, comprising A. a plurality of processing units, each of which execute one or more processes or threads (which one or more processes or threads are collectively referred to as “threads”) and one or more of which execute a plurality of threads, B. one or more execution units that are shared by, and in communication coupling with, the plurality of processing units, the execution units executing instructions from the threads, C. an event delivery mechanism that delivers events to respective threads with which those events are associated, wherein a said event is any of (i) a hardware interrupt generated other than by the processing unit that is executing the thread to which that hardware interrupt is delivered, (ii) a software interrupt generated other than by the thread to which that software interrupt is delivered, wherein the event delivery mechanism i. is in communication coupling with the plurality of processing units, and ii. delivers each such event to the respective thread without execution of instructions by said processing units.