Patent ID: 8704330

Claim:
A semiconductor device, comprising: a semiconductor substrate having a main surface and a first p-type region formed therein; a pair of injection elements formed in said first p-type region and over said main surface; an active barrier structure arranged in a region sandwiched between said pair of injection elements over said main surface, the active barrier structure being formed such that a second p-type region and an n-type region having a floating potential are ohmic-connected through a conductive layer; and a ground potential-applicable p-type ground region which is formed closer to an end side of said main surface than said pair of injection elements and said active barrier structure, bypassing said region sandwiched between said pair of injection elements over said main surface, and which is electrically coupled to said p-type region, wherein said p-type ground region is divided by a region adjacent to said region sandwiched between said pair of injection elements.