Patent ID: 8796756

Claim:
A nonvolatile semiconductor device, comprising: a first gate insulating film formed on a main surface of a semiconductor substrate; a first gate electrode formed on the first gate insulating film and extending in a first direction on the main surface of the semiconductor substrate, the first gate electrode having a first side surface and a second side surface in a second direction that is perpendicular to the first direction on the main surface of the semiconductor substrate; a second gate electrode formed over the main surface of the semiconductor substrate to be adjacent to the second side surface of the first gate electrode in the second direction, the second gate electrode having a first side surface and a second side surface in the second direction; a second gate insulating film formed between the second side surface of the first gate electrode and the first side surface of the second gate electrode and between the second gate electrode and the main surface of the semiconductor substrate; a first semiconductor region formed in the semiconductor substrate on the first side surface side of the first gate electrode in the second direction; a second semiconductor region formed in the semiconductor substrate to be adjacent to the first semiconductor region in the second direction and having an impurity concentration higher than that of the first semiconductor region; a third semiconductor region formed in the semiconductor substrate on the second side surface side of the second gate electrode in the second direction; and a fourth semiconductor region formed in the semiconductor substrate to be adjacent to the third semiconductor region in the second direction and having an impurity concentration higher than that of the third semiconductor region, wherein the second gate insulating film includes a bottom-layer insulating film, a charge storage layer formed on the bottom-layer insulating film and having a capability of accumulating charges, and a top-layer insulating film formed on the charge storage layer, wherein the second gate insulating film has a first portion which overlaps the third semiconductor region and a second portion which does not overlap the third semiconductor region, the first portion and the second portion located next to each other in the second direction, wherein the charge storage layer formed between the second gate electrode and the semiconductor substrate is shorter than the second gate electrode in the second direction, wherein the third semiconductor region includes, in the second direction, a first region overlapping with the charge storage layer formed between the second gate electrode and the semiconductor substrate and a second region not overlapping with the charge storage layer formed between the second gate electrode and the semiconductor substrate, and wherein the first portion overlaps the first region.