Patent ID: 7752410

Claim:
A hardware implemented method for accessing data in a multicycle operations cache, comprising method operations of: receiving at said multicycle operations cache two successive requests for access to a first sub-bank and to a second sub-bank of the multicycle operations cache during two consecutive clock cycles; if the first sub-bank is different than the second sub-bank, then enabling access to said multicycle operations cache during the two consecutive clock cycles; and if the first sub-bank is the same as the second sub-bank then blocking requests to said second sub-bank during a middle of a first of said two consecutive clock cycles and unblocking requests to said first sub-bank during a middle of a second of said two consecutive clock cycles so that access to said second sub-bank may be achieved; wherein blocking further includes generating an access enabling signal, to facilitate access to said first sub-bank in response to the first of said two successive requests, upon a leading edge of a first of said two consecutive clock signals and generating a disabling signal, to preclude access to said sub-bank in response to the second of said two successive requests, upon a trailing edge of said first of said two consecutive clock signals.