Patent ID: 8565610

Claim:
A communication node, comprising: a plurality of ingress interfaces that receives a first ingress channel and a second ingress channel, the first ingress channel carrying a first set of data as a first bit stream and the second ingress channel carrying a second set of data as a second bit stream, the first and second sets of data being correlated to each other, such that the first set of data and the second set of data are associated with the same data stream, the first bit stream including first overhead data and the second bit stream including second overhead data; a plurality of egress interfaces that transmits a first egress wavelength channel and a second egress wavelength channel; and a processor circuit, coupled between the plurality of ingress interfaces and the plurality of egress interfaces, the processor circuit being configured to map a first portion of the first set of data into the first egress wavelength channel and a second portion of the first set of data into the second egress wavelength channel, to thereby compensate for a skew between the first and second sets of data based on the first overhead data in the first bit stream and the second overhead data in the second bit stream, wherein the processor circuit is further configured to map a first portion of the second set of data into the first egress wavelength channel and a second portion of the second set of data into the second egress wavelength channel.