Patent ID: 8107116

Claim:
An image processing apparatus, comprising: a memory; a store control section to divide and store image data in plural vacant memory regions in the memory, the store control section comprising: an image processing section to divide the image data into plural blocks of image data with a predetermined size and respective positions in the image data; a memory administrating table producing section to acquire plural vacant memory regions to store the plural blocks of image data and to produce a memory administrating table to register the acquired vacant memory regions with information indicating at least respective memory sizes and respective positions located in the memory; and a control section to store the plural blocks of image data separately into the plural vacant memory regions by referring the memory administrating table; and an image administrating information registering section to produce an image administrating table to register the plural blocks of image data divided by the store control section, by correlating the respective positions of the plural blocks of image data located in the image data before dividing the image data with respective stored positions of the plural blocks of image data, the stored positions indicating positions of storing memory regions in the memory.