Patent ID: 8581323

Claim:
A nonvolatile semiconductor memory device, comprising a plurality of memory strings including a plurality of memory transistors connected in series, the memory transistors being electrically rewritable, the memory strings including: a first semiconductor layer including a columnar portion extending in a perpendicular direction relative to a substrate, the first semiconductor layer being configured to function as a body of the memory transistors; a charge storing layer formed to surround a side surface of the columnar portion and configured to store a charge; a plurality of first conductive layers formed to surround the side surface of the columnar portion and the charge storing layer and configured to function as gates of the memory transistors; and a first protecting layer stacked to protect a top portion of the plurality of first conductive layers, the plurality of first conductive layers constituting a first stairway portion formed stepwise such that ends of the first conductive layers are located at different positions, each of the first conductive layers constituting a step of the first stairway portion, a top surface of a first portion of the first stairway portion being covered with the first protecting layer including a first number of layers, and a top surface of a second portion of the first stairway portion being covered with the first protecting layer including a second number of layers fewer than the first number of layers, the second portion being located at a lower level than the first portion.