Patent ID: 7638399

Claim:
A method of manufacturing a semiconductor device comprising: forming an element isolation film in a major surface of a semiconductor substrate to form an element region; forming a dummy pattern layer on the semiconductor substrate in a prospective drain region; forming an insulating film material in the element region and on the dummy pattern layer; forming a gate electrode material on the insulating film material; etching back the insulating film material and the gate electrode material, thereby forming a gate electrode, and forming an insulting film which is between the side wall of the dummy pattern layer and the gate electrode and is an integration of a gate insulating film and an offset-spacer, doping a dopant by using the gate electrode and the dummy pattern layer as a mask, thereby forming a first source region in the semiconductor substrate; removing the dummy pattern layer; and doping a dopant by using the gate electrode and the insulating film as a mask, thereby forming a first drain region in the semiconductor substrate.