Patent ID: 8455969

Claim:
A semiconductor device comprising: a semiconductor substrate having a first electronic circuit and a second electronic circuit formed on an active surface of the semiconductor substrate, the second electronic circuit having a heating density during operation different from that of the first electronic circuit; a pad electrode formed on the active surface by being connected to the first electronic circuit and/or the second electronic circuit; a first opening formed to some point along a depth of the semiconductor substrate foward the pad electrode from a surface opposite to the active surface of the semiconductor substrate; a second opening formed so as to reach the pad electrode from a bottom surface of the first opening, the second opening having a diameter smaller than that of the first opening; an insulating layer formed by covering sidewall surfaces of the first opening and the second opening; a conductive layer formed by covering at least an inner wall surface of the insulating layer and a bottom surface of the second opening, at an inner side of the insulating layer; a third opening formed to some point along the depth of the semiconductor substrate from the surface opposite to the active surface of the semiconductor substrate the third opening physically not contacting the active surface of the semiconductor substrate; a heat insulator imbedded in the third opening, the third opening being adjacent to the first opening; a package substrate disposed by facing the active surface of the semiconductor substrate; and a sealing resin layer formed in a clearance between a peripheral portion of the first electronic circuit on the semiconductor substrate and the package substrate, so as to hermetically seal the first electronic circuit.