Patent ID: 7713797

Claim:
A manufacturing method of a pixel structure, comprising: providing a substrate; forming a gate on the substrate; forming a gate dielectric layer on the substrate, the gate dielectric layer covering the gate; forming a semiconductor layer on the gate dielectric layer, the semiconductor layer comprising a channel area located above the gate; forming a patterned dielectric layer on the semiconductor layer, the patterned dielectric layer comprising an etching-stop layer disposed above the gate and a plurality of bumps; forming a patterned metal layer over the substrate, the pattern metal layer comprising a source, a drain and a reflective pixel electrode connected to the drain, wherein the source and the drain respectively cover portions of the channel area and the reflective pixel electrode covers the bumps to form an uneven surface; patterning the semiconductor layer with use of the patterned metal layer as a mask, so as to form a patterned semiconductor layer, wherein the gate, the gate dielectric layer, the patterned semiconductor layer, the source and the drain together form a transistor; forming an overcoat dielectric layer on the transistor; forming a contact opening on the overcoat dielectric layer to expose a portion of the reflective pixel electrode; and forming a transparent pixel electrode on the overcoat dielectric layer, the transparent pixel electrode being electrically connected to the reflective pixel electrode through the contact opening.