Patent ID: 7134195

Claim:
A method of production of a multilayer circuit board comprised of a multilayer structure circuit formed by a plurality of interconnect layers and insulation layers stacked together and a semiconductor chip included therein, comprising: placing a semiconductor chip having a polished back surface, with an active surface of the semiconductor chip facing downward, on an already formed lower interconnect layer by bonding with electrode bumps of the semiconductor chip; forming an insulation layer over the polished back surface of the semiconductor chip by laminating an insulating film thereon to produce the multilayer circuit board; forming an opening through the insulation layer formed over the polished back surface of the semiconductor chip to expose a lower interconnect layer; and forming an interconnect layer on the insulation layer to connect to the lower interconnect layer through the opening, the method further including treating the polished back surface of the semiconductor chip to improve bondability between the semiconductor chip and the insulation layer before formation of the insulation layer, wherein the treatment for improving the bondability comprises, before said placement step, forming a metal film on the back surface of said semiconductor chip, then roughening the surface of the metal film.