Patent ID: 8772143

Claim:
A method of forming a back gate transistor device, the method comprising: forming an open isolation trench in a substrate; forming sidewall spacers in the open isolation trench; and using the open isolation trench to perform a doping operation so as to define a doped well region below a bottom surface of the isolation trench that serves as a back gate conductor, wherein the sidewall spacers prevent contamination of a channel region of the back gate transistor device by dopants; wherein the performing the doping operation further comprises forming a dopant source insulator material within the open isolation trench, performing an annealing operation so as to drive dopants from the dopant source insulator material into the substrate, and performing one of: recessing a portion of the dopant source insulator material and replacing the same with an undoped insulator material prior to performing the annealing operation; or completely removing the dopant source insulator material following the annealing operation.