Patent ID: 7781330

Claim:
A method of fabricating a semiconductor device, comprising: forming an interlayer insulating layer on a semiconductor substrate including a first region and a second region; forming first contact plugs on a portion of the second region to fill a plurality of first contact holes formed through the interlayer insulating layer; forming a plurality of first contact mask layers and a plurality of first dummy mask layers on the interlayer insulating layer, wherein the plurality of first contact mask layers are formed in the first region and the plurality of first dummy mask layers are formed in the second region; forming a plurality of second contact mask layers and a plurality of second dummy mask layers, wherein each of the plurality of second contact mask layers are formed between two of the plurality of first contact mask layers that are adjacent and each of the second dummy mask layers are formed between two of the plurality of first dummy mask layers that are adjacent; and forming a plurality of second contact holes through the interlayer insulating layer formed in the first region by etching the interlayer insulating layer using the plurality of first contact mask layers and the plurality of second contact mask layers as etch protection layers.