Patent ID: 8860028

Claim:
A thin film transistor substrate, comprising: a gate line; a data line intersecting the gate line; a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode formed opposite the source electrode, and a semiconductor pattern overlapping the gate electrode such that a gate insulating film is interposed between the semiconductor pattern and the gate electrode; first and second passivation films covering the thin film transistor; a common electrode formed on the second passivation film; a third passivation film formed on the common electrode; a plurality of grooves formed on a top of the third passivation film and a pixel electrode formed within the plurality of grooves; wherein first to third passivation films includes a pixel contact hole to expose the drain electrode of the thin film transistor, such that the pixel electrode is connected to the drain electrode via the pixel contact hole, wherein the common electrode is separated from the pixel electrode by a space provided by an undercut structure with the third passivation film, and wherein the common electrode and the pixel electrode form a fringe field.