Patent ID: 7470573

Claim:
A method of making CMOS devices on strained silicon on glass, comprising: preparing a glass substrate, including forming a strained silicon layer directly adjacent to, and in physical contact with the glass substate as follows: forming the strained silicon layer on a relaxed silicon/germanium (SiGe) layer; bonding the SiGe layer to the glass substrate: implanting hydrogen into the SiGe layer; inducing exfoliation in a hydrogen-rich region of the SiGe layer, creating a SiGe/strained silicon/glass substrate structure; and, etching the SiGe layer overlying the strained silicon layer; forming a silicon oxide layer by plasma oxidation of the strained silicon layer; depositing a layer of doped polysilicon on the silicon oxide layer; forming a polysilicon gate structure; implanting ions into the strained silicon layer forming a LDD structure in a first ion implanting process; depositing and forming a spacer dielectric on the polysilicon gate structure; implanting and activating ions into the strained silicon layer forming source and drain structures in a second ion implantation process; depositing a layer of metal film overlying the source, drain, and polysilicon gate structures; annealing the layer of metal film overlying the source, drain, and polysilicon gate structures forming salicide on the source, drain, and polysilicon gate structures; removing metal film unreacted with the source, drain, and polysilicon gate structures; conformally depositing a layer of interlayer dielectric; and forming contact holes overlying the source, drain, and polysilicon gate structures, and metallizing the contact holes.