Patent ID: 7594158

Claim:
A ternary content addressable memory (TCAM) integrated circuit (IC), comprising: a select line input operable to receive a select line having one of first and second states; and a plurality of word compare circuits communicatively coupled to the select line input, each of said plurality of word compare circuits comprising: a dual function logic circuit comprising a parity checking circuit and a word comparison circuit, the dual function logic circuit being operable to enable the parity checking circuit responsive to receiving a select line having the first state at the select line input and to enable the word comparison circuit responsive to receiving a select line having the second state at the select line input; and a word compare circuit output communicatively coupled to the dual function logic circuit, the word compare circuit output being operable to generate a parity error signal responsive to the parity checking circuit being enabled and to generate a word comparison result responsive to the word comparison circuit being enabled.