Patent ID: 7130977

Claim:
A method of controlling access to a control register of processor having a normal execution mode and a secure execution mode, said method comprising: storing address translation table information in said control register, the address translation table information comprising a base address of a memory page containing an address translation table; protection logic allowing a software invoked write access to modify said address translation table information within said control register during said normal execution mode; and security logic selectively inhibiting said software invoked write access during operation in said secure execution mode by: accessing a root page vector data structure comprising a plurality of bits, each bit configured to indicate whether a corresponding base address of a memory page is a root page; allowing said software invoked write access to proceed in response to determining that said base address included in said software invoked write access is a root page; and inhibiting said software invoked write access from proceeding in response to determining that said base address included in said software invoked write access is not a root page.