Patent ID: 8334581

Claim:
A semiconductor device comprising: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type formed selectively in a surface portion of the first semiconductor region; a third semiconductor region of the first conductivity type formed selectively in a surface portion of the second semiconductor region; a first electrode crossing over the first semiconductor region from the third semiconductor region with an insulator film interposed between the first electrode and the first semiconductor region; a second electrode connected to the second semiconductor region and the third semiconductor region; a fourth semiconductor region of the first conductivity type between the first semiconductor region and the second semiconductor region, the fourth semiconductor region surrounding an entire lower boundary of the second semiconductor region; a fifth semiconductor region of the second conductivity type on a back surface of the first semiconductor region; a third electrode in contact with the fifth semiconductor region; the fourth semiconductor region being doped more heavily than the first semiconductor region, the fourth semiconductor region comprising an impurity of the first conductivity type at an average impurity amount of 8.0×10 11 cm −2 or smaller; and the first semiconductor region exhibiting resistivity low enough to prevent a depletion layer expanding from the fifth semiconductor region from reaching the fourth semiconductor region; the semiconductor device further comprising: a sixth semiconductor region of the second conductivity type in, and covering, an edge area of the first semiconductor region, the sixth semiconductor region extending through the first semiconductor region from a front surface thereof to a back surface thereof, and the sixth semiconductor region being in contact with the fifth semiconductor region.