Patent ID: 7768055

Claim:
A structure comprising: a substrate having at least two wiring levels containing interconnect members formed thereon; a passive circuit element formed in said at least two wiring levels having a first portion formed on a first wiring level simultaneously with interconnect members formed on said first wiring level and a second portion formed on a second wiring level simultaneously with interconnect members formed on said second wiring level, further comprising: a capacitor comprising at least two sets of interdigitated electrodes formed in each of said first and second wiring levels, each of said interdigitated electrodes being connected vertically to corresponding electrodes in the other of said first and second wiring levels by a set of vertical connection members, thereby forming an effective vertical plate, in which said vertical connection members are arrayed in rows disposed along said finger electrodes, with vertical connection members connecting finger electrodes of each of said interdigitated electrodes located in each of said first and second wiring levels, in which said vertical connection members are disposed in staggered rows disposed along said finger electrodes, with a row of vertical connection members connecting finger electrodes of one of said interdigitated electrodes alternating with a row of vertical connection members connecting finger electrodes of the other of said interdigitated electrodes; said finger electrodes have a finger width greater than the width of said vertical connection members; and in which at least one of said first and second wiring levels has vertical connection members arrayed in a set of unit cells having a first pitch and at least one other of said first and second wiring levels has vertical connection members arrayed in a set of unit cells having a second pitch greater than said first pitch.