Patent ID: 8785274

Claim:
A method for manufacturing a semiconductor device, comprising: preparing a semiconductor substrate having a first region and a second region as a part of a surface layer of the semiconductor substrate, the first region and the second region being a first electrical conduction type, the first region and the second region being isolated by an element isolation insulating film, a first gate electrode and a capacitor structure being disposed on the first region, a second gate electrode being disposed on the second region, the first region not including an area on the element isolation insulating film; forming a first insulating film covering the first gate electrode, the second gate electrode, and the capacitor structure and covering the surface of the semiconductor substrate; forming a first mask covering the second gate electrode and a third region, the third region being around the second gate electrode in the surface layer of the semiconductor substrate; implanting a first impurity of a second electrical conduction type into the semiconductor substrate, so as to form a doped region of the second electrical conduction type in each of a fourth region and a fifth region in the surface layer of the semiconductor substrate, the fourth region being a region between the first gate electrode and the capacitor structure, the fifth region being a region opposite to the capacitor structure with the first gate electrode therebetween; removing the first mask, so as to expose the first insulating film present under the first mask; forming first side walls on the first gate electrode and forming second side walls on the second gate electrode by etching the first insulating film; and implanting a second impurity of the second electrical conduction type into the third region after forming a second mask covering the fourth region and the fifth region.