Patent ID: 7286397

Claim:
A nonvolatile memory apparatus comprising: a nonvolatile memory part having a first buffer and a plurality of nonvolatile memory cells each of which is capable of storing plural bit data; a control part; a second buffer; and a plurality of terminals including a clock terminal, a command terminal and a data terminal, wherein said clock terminal is capable of receiving a clock signal, wherein said command terminal is capable of receiving commands which include a read command and a program command, wherein in an operation in response to said read command received from said command terminal, said control part makes ones of said nonvolatile memory cells in said nonvolatile memory part read out data to said first buffer, transfers data from said first buffer to said second buffer, and then outputs data stored in said second buffer via said data terminal in response to said clock signal, and wherein in an operation in response to said program command received from said command terminal, said control part receives data to said second buffer via said data terminal in response to said clock signal, transfers data from said second buffer to said first buffer, and then makes ones of said nonvolatile memory cells in said nonvolatile memory part store data.