Patent ID: 8161332

Claim:
A pluggable transceiver comprising: a receive section including: receive digital function circuitry configured to decrypt a serial signal; a receive amplifier having an input coupled to a received signal and having an output digital signal; a line decoder circuit having an input connected to said receive amplifier output and having an output connected to said receive digital function circuitry; a balanced output driver having an input and having an output which provides a balanced digital output signal; and a line encoder circuit having an input connected to the said receive digital function circuitry and having an output connected to said balanced output driver input; a transmit section including: transmit digital function circuitry configured to encrypt a serial signal; a balanced input buffer having an input to receive a balanced digital signal and having an output digital signal; a line decoder circuit having an input connected to said balanced input buffer output signal and having an output connected to said transmit digital function circuitry; a transmit amplifier having an input and having an output signal coupled to a transceiver output signal; and a line encoder circuit having an input connected to said transmit digital function circuitry and having an output connected to said transmit amplifier input; and a controller having a control communication interface and connected to said receive section and said transmit section, wherein said controller controls said receive and transmit amplifiers and said receive and transmit digital function circuitry.