Patent ID: 8531209

Claim:
A test and measurement instrument, comprising: acquisition circuitry configured to acquire a plurality of data signals; a plurality of word recognizer elements, each word recognizer element configured to compare a corresponding one of the data signals with a desired data bit and each word recognizer element having a delay less than or equal to about one gate delay; logic circuitry to combine outputs of the word recognizer elements; and trigger circuitry responsive to the logic circuitry; and further comprising: a controller configured to generate a plurality of first control signals and a plurality of second control signals; wherein: each word recognizer element is responsive to a corresponding one of the first control signals and a corresponding one of the second control signals; and for each word recognizer element, the corresponding first control signal is a logical combination of the corresponding desired data bit and a corresponding do-not-care signal, and the corresponding second control signal is a logical combination of an inverted version of the corresponding desired data bit and the corresponding do-not-care signal.