Patent ID: 8777638

Claim:
A wiring board comprising: a first silicon substrate formed by a wafer and including a first feed-through conductor portion in a vertical direction formed in a first through hole; a second silicon substrate formed by a wafer, provided on the first silicon substrate and including a second feed-through conductor portion in the vertical direction formed in a second through hole, the second feed-through conductor portion being vertically aligned with the first feed-through conductor portion; a first insulating layer formed on upper and lower surfaces of the first silicon substrate and an internal surface of the first through hole; a second insulating layer formed on upper and lower surfaces of the second silicon substrate and an internal surface of the second through hole; the first silicon substrate and the second silicon substrate being stacked via a bonding resin layer formed on a surface area of the first silicon substrate excluding the first feed-through conductor portion, the bonding resin layer being formed between a surface of the second through hole of the second silicon substrate and the second feed-through conductor portion; and a feed-through electrode comprising the first feed-through conductor portion and the second feed-through conductor portion being integrally formed.