Patent ID: 8889500

Claim:
A method, comprising: forming a plurality of fin-formation trenches in a semiconductor substrate, said fin-formation trenches defining a fin having an upper surface; forming a first stressed conductive material layer within said trenches and above said upper surface of said fin; performing at least one etching process on said first stressed conductive material layer so as to define spaced-apart portions of said first stressed conductive material layer positioned at least partially within said trenches on opposite sides of said fin; after performing said etching process, performing a selective deposition process to selectively form spaced-apart portions of a second stressed conductive material layer above said spaced-apart portions of said first stressed conductive material layer; forming a third stressed conductive material layer above said upper surface of said fin between said spaced-apart portions of said second stressed conductive material layer; and after forming said third stressed conductive material layer, forming a conductive layer above said second stressed conductive material layer and said third stressed conductive material layer.