Patent ID: 8889518

Claim:
A method for fabricating a laterally diffused metal oxide semiconductor (LDMOS) transistor, the method comprising: forming a semiconductor layer of a first conductivity type over a semiconductor substrate; forming an asymmetric conductive spacer over the semiconductor layer, the asymmetric conductive spacer acting as a gate of the LDMOS transistor and being insulated from the semiconductor layer by a dielectric layer, wherein the asymmetric conductive spacer divides the semiconductor layer into a first region and a second region, and wherein a height of the asymmetric conductive spacer near the first region is less than the height near the second region; performing a first implantation by using a first type of dopant of a second conductivity type on the first region of the semiconductor layer to form a well of the second conductivity type in the first region of the semiconductor layer, the first implantation being performed by using a first energy of implantation; performing a second implantation by using a second type of dopant of the first conductivity type to form a source region and a drain region of the LDMOS transistor, wherein the source region is formed in the first region and the drain region is formed in the second region, and wherein the source region is partially in the well of the second conductivity type and partially underneath the asymmetric conductive spacer; and performing a third implantation by using a third type of dopant of the second conductivity type on the asymmetric conductive spacer to form a channel region of the LDMOS transistor in the semiconductor layer, the channel region being formed under the asymmetric conductive spacer near the first region and being formed essentially completely under the asymmetric conductive spacer, wherein the third implantation is performed by using a second energy of implantation and the channel region has a depth that is greatest near the first region and decreases away from the first region.