Patent ID: 8242025

Claim:
A method of manufacturing a field-effect transistor, comprising the steps of: manufacturing a semiconductor piece by: (i) stacking a sacrificial layer and a semiconductor layer on a substrate in this order, and repeating the stacking so as to form the semiconductor layers on the substrate, the number of the semiconductor layers being at least two, (ii) etching part of the sacrificial layers and part of the semiconductor layers together so as to divide the sacrificial layers into first pieces and the semiconductor layers into second pieces, thereby forming a plurality of multilayered structures on the substrate, each of the plurality of multilayered structures including the first pieces of the sacrificial layers and the second pieces of the semiconductor layers, and (iii) removing the first pieces of the sacrificial layers in the multilayered structures so as to separate the second pieces of the semiconductor layers from the substrate; forming a droplet of a dispersion medium at a tip of a capillary that is filled with the dispersion medium; bringing the droplet into contact with the semiconductor piece disposed on a liquid-repellent surface, thereby causing the semiconductor piece to be included in the droplet; disposing the droplet that includes the semiconductor piece on a lyophilic region of a gate insulating film and allowing the dispersion medium to evaporate so that the semiconductor piece is disposed on the gate insulating film; and connecting a source electrode and a drain electrode to the semiconductor piece.