Patent ID: 8095780

Claim:
A multi-issue processor comprising: a register file; and a plurality of issue slots, each one of the plurality of issue slots including a plurality of functional units, an input routing network that provides multiple data path outputs for a single data path input, the input routing network receiving data from the register file on the single data path input via a single data input path and providing data from the register file to functional units of the plurality of functional units, the data provided on the multiple data path outputs via multiple data output paths, and a plurality of holdable registers that hold duplicate data from the register file, wherein in a first set of the plurality of issue slots the holdable registers store data on the multiple data output paths of the first set and the holdable registers in the first set do not store data on the single data input path corresponding to the input routing networks of the first set and in a second set of the plurality of issue slots the holdable registers store data on the single data input path corresponding to the input routing networks of the second set and the holdable registers in the second set do not store data on the multiple data output paths of the second set.