Patent ID: 8604505

Claim:
A semiconductor device comprising: grooves formed in a semiconductor substrate such that the grooves define an active region, a plurality of first dummy regions and a plurality of second dummy regions; element isolation insulating films filled in the grooves; a semiconductor element formed in the active region; a first interlayer insulation film formed over the semiconductor element, the active region, the first dummy regions and the second dummy regions; a first wiring, a plurality of first dummy wirings and a plurality of second dummy wirings formed over the first interlayer insulation film, respectively; and a second interlayer insulation film formed over the first wiring, the first dummy wirings and the second dummy wirings, wherein the first wiring is electrically connected with the semiconductor element, wherein the first dummy wirings and the second dummy wirings are not electrically connected with the semiconductor elements, wherein a planar size of each of the first dummy regions is larger than a planar size of each of the second dummy regions, wherein each of the first dummy regions is arranged with same pitch, wherein each of the second dummy regions is arranged with same pitch, wherein a planar size of each of the first dummy wirings is larger than a planar size of each of the second dummy wirings, wherein each of the first dummy wirings is arranged with same pitch, wherein each of the second dummy wirings is arranged with same pitch, wherein the second dummy wirings are arranged next to the first wiring, and between the first wiring and the first dummy wirings, wherein the pitch of the first dummy regions is larger than the pitch of the second dummy regions, wherein the pitch of the first dummy wirings is larger than the pitch of the second dummy wirings, wherein, in planar view, the first and second dummy wirings are arranged over the first and second dummy regions, wherein the first wiring, the first dummy wirings and the second dummy wirings contain a same metal element as a major component, and wherein the semiconductor element is a MOSFET.