Patent ID: 7877709

Claim:
A computer implemented method of placing a shield wire with respect to a shield subject wire placed on a chip, a method comprising using a computer: setting a plurality of wire tracks on the chip; dividing the chip into at least a first area and a second area according to a division boundary; placing a first dummy terminal in contact with the division boundary in the first area on a wire track adjacent to the shield subject wire among the plurality of wire tracks; placing a second dummy terminal in contact with the division boundary in the second area on a wire track adjacent to the shield subject wire; placing a first shield wire connected to the first dummy terminal on a wire track adjacent to the shield subject wire in the first area; and placing a second shield wire connected to the second dummy terminal on a wire track adjacent to the shield subject wire in the second area, wherein a placement of the first shield wire and a placement of the second shield wire are performed in parallel by different CPUs(Central Processing Units).