Patent ID: 8008107

Claim:
A method for pre-processing a semiconductor wafer made of low grade silicon having a thickness of approximately 150 μm or less, and having generally dispersed defects, said semiconductor wafer comprising top and bottom near-surface layers, each near-surface layer containing enhanced amounts of lattice defects predisposed to receive and hold dispersed defects and related clusters and a bulk region with dispersed defects throughout said bulk region, the method comprising: preserving said lattice defects caused by mechanical damage occurring at said near-surface layers for permitting use of near-surface layers as a gettering site for said dispersed defects; forming said at least one surface contaminant layer in the course of wire sawing to comprise metal atoms from the group consisting essentially of Cu, Ni, Fe in the concentration range 10 10 -10 17 metal atoms/cm 2 ; and collecting said dispersed defects at said lattice defects in said near-surface layers by performing the steps of: annealing said semiconductor wafer to a temperature sufficient for gettering said dispersed defects to said lattice defects and related clusters within the near-surface layers; cooling said semiconductor wafer following said annealing step for retaining said defects as clusters predominantly within said near-surface layers, thereby increasing the impurity level of said semiconductor wafer predominantly in said near-surface layers and changing the distribution of said dispersed defects to a depth-dependent distribution within said wafers; and removing said near-surface layers including said impurity clusters for yielding a generally higher purity level denuded zone substantially across a remaining thickness of said semiconductor wafer.