Patent ID: 6964032

Claim:
A method of manufacturing an integrated circuit (IC) comprising the steps of: providing system parameters of a lithographic projection system having an annular illumination source, said system parameters including a projection numerical aperture NA, and a wavelength λ, an inner radius σ inner and an outer radius σ outer of said annular illumination source; providing an IC design layout including a plurality of first critical features arranged in a pattern having a critical pitch P Crit , wherein said critical pitch is greater than or equal to a minimum pitch P Min of the design layout and less than a maximum pitch P Max of the design layout; determining a critical radius σ Crit that provides an optimal lithographic process window corresponding to said critical pitch; determining said outer radius and said inner radius of the annular illumination source so that said critical radius is greater than or equal to said inner radius and less than or equal to said outer radius; determining a transition pitch P Trans chosen as a maximum pitch for which sub-resolution assist features (SRAFs) need not be added; identifying a plurality of second critical features within the design layout having a design pitch P D that is larger than said transition pitch P Trans ; disposing one or more SRAFs within said IC design layout between each of said second critical features to form a modified IC design layout including a final combined pattern of SRAFs and said second critical features having a combined pitch P Combined , wherein said combined pitch substantially corresponds to said critical pitch; and designing a mask layout for use with said lithographic projection system, wherein said mask layout corresponds to said modified IC design layout including said final combined pattern of said one or more SRAFs and said second critical features.