Patent ID: 8598651

Claim:
A semiconductor device comprising: a substrate including a device forming region partitioned by a device isolation insulating film; and a transistor formed in the device forming region of the substrate, the transistor including: a gate; a plurality of trenches each including: a bottom; sidewalls that include a lower portion between the bottom of the trench and an intermediate portion of the side wall, and an upper portion between a surface of the substrate and the intermediate portion; and a depth that changes in a lateral direction of the gate; a gate insulating film formed on the side walls and at the bottom of each of the trenches, the gate insulating film having a first thickness at the lower portion of the trenches, a second thickness at the upper portion of the trenches, and a third thickness at the bottom of the trenches, the first thickness being greater than the second thickness and greater than or equal to the third thickness; a gate electrode formed over the gate insulating film so as to fill the trenches; a source region formed on one side of the gate electrode in a longitudinal direction of the gate at the surface of the substrate; and a drain region formed on the other side of the gate electrode in the longitudinal direction at the surface of the substrate.