Patent ID: 6895229

Claim:
Receiver arrangement for receiving frequency-modulated radio signals, having a demodulator circuit arrangement ( 18 ), which converts an intermediate-frequency signal into a voltage signal, which is applied to an input stage ( 22 ) of a signal-processing circuit arrangement ( 23 ), a clock-signal oscillator ( 26 ), which supplies a clock signal for the clock control of elements of the circuit arrangement, a test-signal generator stage ( 28 ), the input of which is connected to an output of the clock-signal oscillator ( 26 ) supplying the clock signal and the output of which is connected to an input stage ( 19 ) of the demodulator circuit arrangement ( 18 ), and a control circuit arrangement ( 12 ) for setting and/or testing the demodulator circuit arrangement ( 18 ), which controls the test-signal generator stage ( 28 ) for carrying out setting or testing operation and, during the setting or testing operation, sets the demodulator circuit arrangement ( 18 ) on the basis of its output signal or supplies a test-result signal indicating serviceability.