Patent ID: 8102918

Claim:
A system comprising: memory configured to store an order-N transform T; and one or more hardware processors communicatively coupled with the memory, the one or more hardware processors configured to receive a video signal, execute a retrieving unit configured to retrieve from the memory the order-N transform T, where N is an integer, execute a generating unit configured to generate the order-2N transform W from the retrieved order-N transform T by rules of w u,2i =(1/√2) t u,i and w u,2i+1 =(1/√2) t u,i for i= 0, 1, . . . , N− 1; and 1) w 2N−u−1,2i =(1/√2) t u,i and w 2N−u−1,2i+1 =−(1/√2) t u,i for i= 0, 1, . . . , N− 1; 2) where t u,i is the (u, i)th element of the transform T, w u,2i and w u,2i+1 are elements of the first N rows of the transform W, and w 2N−u−1,2i and w 2N−u−1,2i+1 are elements of the last N rows of the transform W for u=0, 1, . . . , N−1, process the received video signal using the generated order-2N transform W, and output the processed video signal.