Patent ID: 7193439

Claim:
A programmable logic device (PLD), comprising: a plurality of segment-enable registers, each segment-enable register arranged to be set to a first segment-enable value responsive to resetting of the PLD; a plurality of segments, each segment including respective configurable logic, associated with a respective segment-enable register, and arranged to enable the respective configurable logic responsive to a second segment-enable value in the associated segment-enable register, wherein the associated segment-enable register is coupled to the respective configurable logic in the segment; a configuration controller coupled to the configurable logic in the plurality of segments and to the plurality of segment-enable registers, the configuration controller adapted to program the respective configurable logic in each segment to perform a respective function based on configuration data and set each segment-enable register to the second segment-enable value; and a set of respective input/output pads associated with each segment, wherein the set input/output pads associated with a segment is enabled responsive to the second segment-enable value in the associated segment-enable register.