Patent ID: 8232210

Claim:
A method of forming an integrated circuit (IC) device feature, the method comprising: forming an initially substantially planar hardmask layer over a semiconductor device layer to be patterned; forming a first photoresist layer over the initially substantially planar hardmask layer, and patterning a first set of semiconductor device features in the first photoresist layer; registering the first set of semiconductor device features in the hardmask layer in a manner that maintains the hardmask layer substantially planar; removing the first photoresist layer; forming a second photoresist layer over the substantially planar hardmask layer, and patterning a second set of semiconductor device features in the second photoresist layer; registering the second set of semiconductor device features in the hardmask layer in a manner that maintains the hardmask layer substantially planar; removing the second photoresist layer; and creating topography within the hardmask layer by removing portions thereof corresponding to both the first and second sets of semiconductor device features.