Patent ID: 7242607

Claim:
A memory device, comprising: memory cell, wherein a series capacitor stores data and a diode controls to store data “1” or “0”; and the series capacitor as a storage device, wherein includes the first capacitor which is formed by the first insulator between the first plate and the floating plate which serves as the second plate, the second capacitor which is formed by the second insulator between the floating plate and the third plate, and a plate line is connected to the third plate of the capacitor, and the series capacitor only couples to the second terminal of the diode, while the series capacitor has no coupling or overlapping region to first, third and fourth terminal of the diode; and the diode as an access device, wherein includes four terminals, the first terminal is p-type and connected to a word line, the second terminal is n-type and serves as a storage node which is connected to the first plate of the series capacitor, the third terminal is p-type and floating, and the fourth terminal is n-type and connected to a bit line; and read circuits, wherein include three elements, such as the diode, a current mirror and a latch device; and the diode also serves as a sense amplifier, wherein the diode generates binary data “1” (on) or “0” (off), depending on the voltage of the storage node; and the current mirror includes a pull-down device which is connected to the bit line and a current repeater whose gate is connected to the gate of pull-down device; and the latch device is connected to the drain of the current repeater and holds the read data from the memory cell; to read data “1”, the word line is asserted, and establishes forward bias from the word line to the storage node (second terminal), by the forward bias the floating node (third terminal) is pulled up near the word line voltage, thus the diode sets up a current path from the word line to the pull-down device which is connected to the bit line, when the storage node stores a voltage, near the word line voltage minus built-in voltage of the diode, and then the current repeater changes the storage node of the latch device and holds the state; to read data “0”, the word line is asserted, and establishes reverse bias from the word line to the storage node (second terminal), thus the diode is remained in turn-off state, when the storage node stores higher voltage than that of the word line, and the current repeater does not change the storage node of the latch device with turn-off state of the diode.