Patent ID: 7328378

Claim:
A method for use in an electronic memory repair system comprising an electronic memory having a plurality of input/output ports and a set of IOs, the set of IOs including a plurality of main IOs and a plurality of spare IOs, the method comprising steps of: (A) receiving error data representing the error status of each of the plurality of main IOs; (B) selecting a mapping between the plurality of input/output ports and a subset of the set of IOs, comprising steps of: (B)(1) generating a first thermometer code encoding a first portion of the mapping; and (B)(2) generating a second thermometer code encoding a second portion of the mapping, wherein the first and second thermometer codes in combination encode selection inputs to a plurality of multiplexors coupled between the set of IOs and the plurality of input/output ports for establishing electrical connections between the plurality of input/output ports and the subset of the set of IOs in accordance with the mapping; and (C) establishing electrical connections between the plurality of input/output ports and the subset of the set of IOs in accordance with the mapping selected in step (B).