Patent ID: 7056783

Claim:
A method for fabricating a semiconductor device with a plurality of field-effect transistors comprising: forming a first device region, selected from the group consisting of a source region and a drain region, of a first field-effect transistor on a semiconductor layer; forming a second device region, selected from the group consisting of a source region and a drain region, of a second field-effect transistor on said semiconductor layer; forming a first channel region over and in contact with said first device region, wherein said first channel region has an opposite conductivity type than the first device region; forming a second channel region over and in contact with said second device region, wherein said second channel region has an opposite conductivity type than the second device region; forming a gate adjacent said first channel region for said first field-effect transistor, wherein said gate has a first predetermined gate oxide thickness; and forming a gate adjacent said second channel region for said second field-effect transistor, wherein said gate has a second predetermined gate oxide thickness, and wherein said first predetermined thickness is different than the second predetermined thickness.