Patent ID: 8839187

Claim:
A system comprising: one or more processors to: store an initial wrapper code, the initial wrapper code including macros; receive information associated with a model, the model, when executed: receiving a first plurality of signals, outputting a second plurality of signals, and being implemented using source code; generate, based on the initial wrapper code and the information associated with the model, a memory map wrapper code, the one or more processors, when generating the memory map wrapper code, being further to: identify parameters associated with the source code, determine, based on the parameters, a structure identifying one or more macros, of the macros, that can be used to configure the parameters, identify memory locations storing respective data associated with the first plurality of signals and the second plurality of signals, and form the memory map wrapper code to include: a source code section associated with a mapping between the memory locations and the source code, and configuration information for the one or more macros to define the mapping; and expand the one or more macros in the memory map wrapper code based on the parameters to form an expanded memory map wrapper code.