Patent ID: 7515490

Claim:
An organic memory, comprising: i select lines; j data lines; a bit cell array, comprising a plurality of bit cells, wherein one of the bit cells is connected between each data line and each select line, each bit cell comprises an organic memory cell and a switch element, and the organic memory cell is used to store at least one bit of information; and j digital sensing circuits, wherein each digital sensing circuit is connected to one of the data lines and senses the bit information stored in the organic memory cell according to a conduction current flowing through the organic memory cell, and each digital sensing circuit comprises: a current-to-voltage converter, for converting the conduction current flowing through the current-to-voltage converter into a voltage signal, the current-to-voltage converter comprising: a first transistor, having a first source/drain connected to one of the data lines, and a gate connected to a first switch signal; a capacitor, having a first terminal connected to a second source/drain of the first transistor and a second terminal connected to a first potential, and the voltage signal is obtained from the first terminal; and a second transistor, having a first source/drain connected to the first terminal of the capacitor, a second source/drain connected to a second potential, and a gate connected to a second switch signal, wherein when the first transistor is on, the second transistor is off, and when the first transistor is off, the second transistor is on; and a sensing block circuit, coupled to the current-to-voltage converter, for receiving the voltage signal, and buffering and outputting the bit information stored in the organic memory cell, the sensing block circuit comprising: a third transistor, having a first source/drain directly connected to the second potential, and a gate directly connected to the first terminal of the capacitor; and a fourth transistor, having a first source/drain connected to a second source/drain of the third transistor, a second source/drain connected to the first potential, and a gate directly connected to the gate of the first transistor, wherein when the fourth transistor is off, the second source/drain of the third transistor outputs the bit information stored in the organic memory cell, wherein, the bit cell row B(n) is defined as all bit cells connected to the nth select line, when the nth select line is actuated, the switch elements in the bit cell row B(n) connect the organic memory cells in the bit cell row B(n) to the respective data lines, and the digital sensing circuits sense and read the bit information stored in the organic memory cells of the bit cell row B(n) through the data lines, wherein i, j, n are natural numbers, and n<=i.