Patent ID: 7467239

Claim:
A method for programming a direct memory access (DMA) controller of a system on a chip, the system on a chip including a central processing unit for executing a user program, a memory management unit for translating a virtual address into a corresponding physical address according to a translation table, an address bus, a data bus, the DMA controller, and a plurality of entities coupled to the address bus and the data bus, the DMA controller including a set of registers that includes a source register, a destination register, and a size register, and each of the entities being identified by a physical address and addressable by applying that physical address to the address bus, said method comprising the steps of: receiving a first dedicated instruction included in the user program, the first dedicated instruction being dedicated to programming the registers of the DMA controller and including a virtual address as an address argument; and in response to receiving the first dedicated instruction, programming at least one of the registers of the DMA controller, wherein the programming step includes the sub-steps of: translating, by the memory management unit, the virtual address into the corresponding physical address; supplying the corresponding physical address from the memory management unit to the address bus; delivering, from the central processing unit via at least one dedicated control signal wire that is dedicated to delivering a DMA programming control signal from the central processing unit to the DMA controller and to the entities, the DMA programming control signal at first value to the DMA controller and at a second value, which is different than the first value, to the entities; and when the DMA controller receives the DMA programming control signal at the first value from the central processing unit via the at least one dedicated control signal wire, storing the corresponding physical address that is supplied from the memory management unit to the address bus in the source register or the destination register of the DMA controller.