Patent ID: 8644431

Claim:
A method comprising: (a) receiving a symbol data sequence from a channel, wherein the symbol data sequence corresponds to a second symbol data sequence that is transmitted onto the channel by a transmitter, wherein the second symbol data sequence is generated by the transmitter based on associated information bits; (b) a first set of two or more processors operating in parallel on two or more overlapping subsequences of the symbol data sequence, wherein each of the two or more overlapping subsequences of the symbol data sequence corresponds to a respective portion of a first trellis, wherein the first trellis describes redundancy in the symbol data sequence, wherein said operating generates soft estimates for the associated information bits; wherein the soft estimates are useable to form a receive message corresponding to the associated information bits; wherein the transmitter generates the associated information bits by a convolutional encoding of original information bits to obtain encoded bits and by an interleaving of the encoded bits, wherein (b) includes the first set of two or more processors operating in parallel on the two or more overlapping subsequences of the symbol data sequence using two or more respective overlapping subsequences of an interleaved version of soft estimates for the encoded bits, wherein the method further comprises: (c) a second set of two or more processors operating in parallel on two or more overlapping subsequences of a deinterleaved version of the soft estimates of the associated information bits, wherein each of the two or more overlapping subsequences of the deinterleaved version corresponds to a respective portion of a second trellis, wherein the second trellis has a structure that corresponds to the convolutional encoding, wherein said operating in parallel on the two or more overlapping subsequences of the deinterleaved version generates the soft estimates for the encoded bits; (d) repeating (b) and (c) a plurality of times; performing (a)-(d) for each of a plurality of received symbol data sequences; and adjusting a number of the first set of two or more processors for at least one of the plurality of received symbol data sequences.