Patent ID: 7042086

Claim:
A stacked semiconductor module comprising: a first upper switching element having: a first semiconductor chip; a first top electrode disposed at a top surface of the first semiconductor chip; a first bottom electrode disposed at a bottom surface of the first semiconductor chip; and a first control electrode configured to control conduction between the first top and first bottom electrodes; a first wiring plate disposed beneath the first upper switching element, electrically connected to the first bottom electrode; a first control electrode wiring electrically connected to the first control electrode; a first power distribution plate electrically connected to the first top electrode; a first lower switching element disposed beneath the wiring plate, having: a second semiconductor chip; a second top electrode disposed at a top surface of the second semiconductor chip, electrically connected to the first wiring plate; a second bottom electrode disposed at a bottom surface of the second semiconductor chip; and a second control electrode configured to control conduction between the second top and second bottom electrodes; a second power distribution plate having a recessed region, electrically connected to the second bottom electrode; and a second control electrode wiring electrically connected to the second control electrode in the recessed region.