Patent ID: 7269199

Claim:
Apparatus comprising: (a) a processor; (b) a memory coupled to said processor which stores code for execution on said processor and which stores network transferrable data therein; (c) an interference detector which is coupled to said processor and which detects interference from an interfering network and attains interfering hop sequence data relating to the interfering network, wherein the interfering network is a frequency hopping spread spectrum (FHSS) network in which a predetermined number of FHSS channels are used for frequency hopping, and further wherein the interference detector attains the interfering hop sequence data upon the apparatus joining the interfering network; and (d) a hop sequencer which is coupled to said processor and which alters the hop sequence of a second FHSS network upon the apparatus joining the second FHSS network, wherein the hop sequence is altered based upon the interfering hop sequence data; wherein the altered hop sequence comprises the same number of channels as the predetermined number of FHSS channels and wherein the network transferrable data stored in said memory is transferrable over the second network.