Patent ID: 8058121

Claim:
A method for fabricating a semiconductor device, comprising: providing a substrate; forming an epitaxial layer on the substrate, wherein the epitaxial layer is the same conductive type as the substrate; forming a first doped region in the epitaxial layer, wherein the first doped region is a different conductive type from that of the epitaxial layer; performing an annealing process to diffuse dopants in the first doped region; respectively forming a second doped region and an adjacent third doped region on the first doped region, wherein the second doped region has a different conductive type from the first doped region, and the third doped region has the same conductive type as the first doped region, and wherein the second doped region and the third doped region are a drain region and a source region, respectively; and forming a gate structure on the epitaxial layer, covering a portion of the second and the third doped regions.