Patent ID: 7385965

Claim:
A multiprocessor control block for use in a communication switch, comprising: a resource routing processor that controls resource allocation amongst connections supported by the switch and routing functionality corresponding to at least a portion of the connections supported by the switch; a plurality of intermediate processors operably coupled to the resource routing processor, wherein each intermediate processor of the plurality of intermediate processors performs call processing for a corresponding portion of the connections supported by the switch, wherein call processing includes issuing resource allocation requests to the resource routing processor, wherein each intermediate processor of the plurality of intermediate processors performs functions associated with a signaling layer portion of a protocol stack; and a link layer processor operably coupled to the plurality of intermediate processors, wherein the link layer processor is operable to couple to a switching fabric of the communication switch, wherein the link layer processor receives ingress data units from the switching fabric and selectively forwards each ingress data unit received to at least one of the plurality of intermediate processors, wherein the link layer processor receives egress data units from the plurality of intermediate processors and forwards each of the egress data units to the switching fabric.