Patent ID: 8836115

Claim:
A stacked inverted flip chip package comprising: a substrate comprising: a secondary electronic component opening; first traces; a dielectric layer, the first traces being embedded within a first surface of the dielectric layer; and a first solder mask coupled to the first surface of the dielectric layer, the secondary electronic component opening being formed within the first solder mask only, a central portion of the first surface of the dielectric layer being exposed through the secondary electronic component opening; a primary electronic component structure comprising: substrate terminals; and secondary electronic component terminals; primary flip chip bumps electrically and physically coupling the substrate terminals to the first traces; a secondary electronic component comprising bond pads, the secondary electronic component extending into the secondary electronic component opening, the first traces extending within a plane along the first surface of the dielectric layer laterally from outside the central portion to within the central portion directly below the secondary electronic component; and secondary flip chip bumps electrically and physically coupling the bond pads to the secondary electronic component terminals, wherein a distance between the primary electronic component structure and the secondary electronic component is less than a distance between the primary electronic component structure and the substrate.