Patent ID: 7348648

Claim:
An interconnect structure comprising: a conductively filled via located within an upper interconnect level, said conductively filled via having sidewalls that are lined with a via diffusion barrier; a conductive line located within a lower interconnect level and connected to said conductively filled via, said conductive line having sidewalls that are lined with a conductive line diffusion barrier, said via diffusion barrier having a lower horizontal portion that is in direct contact with an upper surface of said conductive line, yet said via diffusion barrier is not in direct contact with said conductive line diffusion barrier; and an electrical conductive material laterally abutting said lower horizontal portion of said via diffusion barrier which is in direct contact with said upper surface of said conductive line and vertically abutting said conductive line diffusion barrier thereby creating an electrical path between the via diffusion barrier along the sidewalls of the conductively filled via and the conductive line diffusion barrier along the sidewalls of the conductive line.