Patent ID: 7904850

Claim:
A method for converting program code that is not in a hardware description language (HDL) to hardware, said program code including an algorithmic representation of a process using variables, the method comprising the steps of: compiling, by a computer, the program code into an HDL synthesizable design, said step of compiling includes the steps of: categorizing each of said variables in said program code as using either a respective implicit memory or a respective custom memory, when a respective variable of the variables in said program code is categorized as using the respective implicit memory, defining a first type of accessor function for accessing the respective implicit memory, the first type of accessor function defining a signal interface using a set of predetermined parameters to access the respective implicit memory, and when the respective variable in said program code is categorized as using the respective custom memory: (1) defining a second type of accessor function for accessing the respective custom memory, the second type of access function being different from the first type of accessor function, and (2) defining a foreign interface function that includes assignments between the respective custom memory and the respective variable, the second type of accessor function defining a memory access protocol and a timing model for accessing the respective custom memory, the timing model including at least one of a sequence of read transaction rules or a sequence of write transaction rules for reading or writing to the custom memory, each respective transaction rule being associated with a timing parameter of the timing model; and generating the hardware including implementing, as hardware, the first and second accessor functions based on said HDL synthesizable design.