Patent ID: 8624374

Claim:
A stacked assembly, comprising: a semiconductor package including: an interconnection unit; a first semiconductor device disposed adjacent to the interconnection unit and electrically connected to the interconnection unit; and a package body encapsulating the first semiconductor device, the package body including an upper surface and defining an opening in the upper surface of the package body; a second semiconductor device disposed on the upper surface of the package body; and a stacking element extending through the opening in the package body and electrically connecting the first semiconductor device and the second semiconductor device, the stacking element including: an electrical interconnect including an upper surface and extending vertically from the interconnection unit, at least a portion of the upper surface of the electrical interconnect is planar and is recessed below the upper surface of the package body; and a conductive bump extending into and filling the opening, the conductive bump being exposed at an external periphery of the stacked assembly.