Patent ID: 8076188

Claim:
A method of manufacturing a semiconductor device, said method comprising: forming a semiconductor laminate portion by successively growing a p-type channel layer for a p-channel transistor and a p-type contact layer over an n-type contact layer provided on a substrate; exposing the n-type contact layer by etching the semiconductor laminate portion in a region of a semiconductor circuit element while leaving the semiconductor laminate portion in a region where the p-channel transistor is formed and in a region where a protecting element is formed, wherein the semiconductor laminate portion is simultaneously etched (i) in a portion of the p-channel transistor region thereby forming an electrode, and (ii) in a portion of the protecting element region thereby forming an electrode so as to form two p-n junctions which are coupled by the n-type contact layer; forming a gate electrode in a region where the p-channel transistor is formed thereby forming an ohmic contact with a surface of the n-type contact layer which is exposed by the etching; forming a source/drain electrode on the p-type contact layer remaining on both sides in the channel region of the p-channel transistor region; and forming at least one electrode for the protecting element on a surface of the p-type contact layer.