Patent ID: 7089509

Claim:
A system for controlling the propagation of a control signal by means of variable input/output delay compensation, the system comprising: a memory controller; a memory; and an interface, wherein the memory controller is coupled to the memory through the interface, and wherein the interface includes a buffer, a qualifying circuit, and a programmable delay element which is operable to receive a delay value; wherein the interface is operable to: receive a read signal from the memory controller; output the read signal to the memory; receive a trigger signal from the memory and data originating from the memory in response to the read signal; output a signal from the programmable delay element based on the read signal from the memory controller and the delay value received from the memory controller; and conditionally output a qualified trigger signal from the qualifying circuit based on the trigger signal received from the memory and assertion of the signal received from the programmable delay element; and wherein, said conditionally outputting the qualified trigger signal results in storing the data in the buffer.