Patent ID: 7433172

Claim:
A multilayer capacitor comprising a multilayer body in which a plurality of dielectric layers and a plurality of inner electrodes are alternately laminated, and a plurality of terminal conductors formed on the multilayer body; wherein the plurality of inner electrodes include a plurality of first inner electrodes and a plurality of second inner electrodes alternately arranged; wherein the plurality of terminal conductors include first and second terminal conductors electrically insulated from each other; wherein the plurality of first inner electrodes are electrically connected to each other through a connecting conductor formed on a surface of the multilayer body; wherein the plurality of second inner electrodes are electrically connected to each other through a connecting conductor formed on the surface of the multilayer body; wherein, in the plurality of first inner electrodes, at least one first inner electrode whose number is smaller than the total number of first inner electrodes by at least 1 is electrically connected to the first terminal conductor through a lead conductor; wherein, in the plurality of second inner electrodes, at least one second inner electrode whose number is smaller than the total number of second inner electrodes by at least 1 is electrically connected to the second terminal conductor through a lead conductor; and wherein an equivalent series resistance is set to a desirable value by adjusting at least one of the number of first inner electrode electrically connected to the first terminal conductor through the lead conductor and the number of second inner electrode electrically connected to the second terminal conductor through the lead conductor.