Patent ID: 7705635

Claim:
A circuit to convert a first logic signal having a first range to a second logic signal having a second range, comprising: a first metal oxide semiconductor (MOS) transistor to selectively couple an output node to a first reference voltage when the output node is to be in a first state; a source-follower circuit having a source follower output coupled to the output node and having a current source; and a second MOS transistor to selectively couple the source-follower circuit to a second reference voltage when the output node is to be in a second state; wherein the source-follower circuit comprises a third MOS transistor having a source and a drain, wherein the source of the third MOS transistor is coupled to the output node, and wherein the source-follower circuit is arranged so that current from the current source flows through the third MOS transistor via the source and the drain of the third MOS transistor; wherein the source-follower circuit is configured to keep a voltage of the output node in the second state at a desired steady-state voltage that is different than the second reference voltage.