Patent ID: 6850106

Claim:
An apparatus comprising: a first NMOS field effect transistor having a gate terminal, a source terminal, and a drain terminal; a first resistor having a first terminal and second terminal, wherein said first terminal of said first resistor is electrically connected to said gate terminal of said first NMOS field effect transistor; a first PMOS field effect transistor having a gate terminal, a source terminal, and a drain terminal, wherein said source terminal of said first PMOS field effect transistor is electrically connected to said source terminal of said first NMOS field effect transistor, and wherein said drain terminal of said first PMOS field effect transistor is electrically connected to said source terminal of said first PMOS field effect transistor; and a second NMOS field effect transistor having a gate terminal, a source terminal, and a drain terminal, wherein said drain terminal of said second NMOS field effect transistor is electrically connected to said drain terminal of said first PMOS field effect transistor.