Patent ID: 7868378

Claim:
A transistor, comprising: a gate including a conductive material over an insulator material; a source including a first impurity region and a second impurity region, the first impurity region being of a first type and the second impurity region being of an opposite second type, the first impurity region being on a side of the second impurity region farther from the gate; a third impurity region abutting the first impurity region and second impurity region and extending from the source region under the gate, the third impurity region being of the first type; and a drain including a fourth impurity region and a fifth impurity region surrounded by the fourth impurity region, the fourth impurity region being of the second type, the fifth impurity region being of the second type and having a higher concentration than the fourth region, the fourth impurity region impinging the third impurity region, wherein the third impurity region is deeper than the fourth impurity region and extends laterally beneath a portion of the fourth impurity region; wherein the third impurity region is implanted in an high-voltage (HV) n-well; and wherein a drain-side edge of the gate is aligned with a drain-side edge of the third impurity region.