Patent ID: 7906850

Claim:
A circuit board structure comprising: a solder mask layer having a plurality of openings, the openings having first conductive vias formed therein, wherein each of the first conductive vias has an exposed surface and the exposed surface of each of the first conductive vias is flush with a surface of the solder mask layer; a patterned circuit layer formed on the solder mask layer and electrically connected to the first conductive vias; a dielectric layer formed on the patterned circuit layer and the solder mask layer, wherein a plurality of openings are formed in the dielectric layer to thereby expose parts of the patterned circuit layer; and a built-up structure formed on the dielectric layer, wherein the built-up structure comprises at least one dielectric layer, at least one built-up circuit layer, a plurality of connecting pads, and a plurality of second conductive vias electrically connecting to the patterned circuit layer, wherein the connecting pads are used for outwardly, electrically connecting to a semiconductor chip, and the connecting pads are used for inwardly, electrically connecting to the first conductive vias through the built-up circuit layer, the second conductive vias and the patterned circuit layer, so that the exposed surface of each of the first conductive vias is used for electrically connecting to a printed circuit board.