Patent ID: 8352834

Claim:
A computer-implemented method for handling interleaved data in connection with a device having a double data rate (DDR) random access memory, wherein the device is associated with an interleaving increment and an interleaving depth and wherein the double data rate random access memory includes a first bank and a second bank, the method comprising, by a computer system; receiving a plurality of symbols; forming a plurality of words, each word being a product of a DDR data width and a DDR burst length; forming a plurality of data blocks, each of the data block including two data sequences, wherein each data sequence includes a plurality of words; storing the plurality of data blocks in the double data rate random access memory in the following manner: maintaining a first row start write address (RSWA) and a first column start write address (CSWA) for the first bank; retrieving a first data sequence of a first data block, from among the plurality of data blocks; writing the plurality of words of the first data sequence into the first bank using the first RSWA and the first CSWA, wherein the plurality of words have the same first RSWA in the first bank and respective column addresses for words in the first data sequence are obtained by changing the first CSWA; maintaining a second RSWA and a second CSWA for the second bank; retrieving a second data sequence of the first data block; and writing the plurality of words of the second data sequence into the second bank using the second RSWA and the second CSWA, wherein the plurality of words in the second sequence block have the same second RSWA in the second bank and respective column addresses for words in the second data sequence are obtained by changing the second CSWA.