Patent ID: 7795976

Claim:
An error amplifier comprising: a main amplifier that receives a differential input voltage that is a difference in voltages of a first differential input and a second differential input, the main amplifier driving an output; a compensating capacitor connected to the output, the compensating capacitor having a capacitance value that sets a single dominant pole in the error amplifier; a pull-up auxiliary amplifier that drives a pull-up slew current to the output when triggered by the main amplifier; a pull-down auxiliary amplifier that drives a pull-down slew current to the output when triggered by the main amplifier; a first intentional offset introduced into the pull-up auxiliary amplifier by changing a ratio of a p-channel transistor to an n-channel transistor in a same leg of transistors in the pull-up auxiliary amplifier so that the pull-up auxiliary amplifier drives the pull-up slew current to the output when the differential input voltage exceeds the first intentional offset; and a second intentional offset introduced into the pull-down auxiliary amplifier by changing a ratio of a p-channel transistor to an n-channel transistor in a same leg of transistors in the pull-down auxiliary amplifier so that the pull-down auxiliary amplifier drives the pull-down slew current to the output when the differential input voltage is more negative than the second intentional offset, whereby stability is achieved by the single dominant pole and speed is increased by the pull-up slew current from the pull-up auxiliary amplifier and the pull-down slew current from the pull-down auxiliary amplifier and whereby the pull-up auxiliary amplifier and the pull-down auxiliary amplifier turn on when intentional offsets are exceeded.