Patent ID: 8464087

Claim:
A method of operating a nonvolatile memory device with a controller, comprising: applying a command from the controller to the nonvolatile memory device to set one of a single data rate (SDR) mode and a double data rate (DDR) mode; applying a first logic level of a flag signal from the controller to the nonvolatile memory device to indicate a data input operation and maintaining the first logic level of the flag signal during the data input operation of nonvolatile memory device; applying a second logic level of the flag signal from the controller to the nonvolatile memory device to indicate a data output operation and maintaining the second logic level of the flag signal during the data output operation of nonvolatile memory device; applying a timing signal from the controller to the nonvolatile memory device; and performing a data communication operation in synchronism with both rising and falling edges of the timing signal between the controller and the nonvolatile memory device when the command sets the DDR mode.