Patent ID: 7015852

Claim:
A method for analog-to-digital conversion in a cyclic analog-to-digital conversion (ADC) circuit having an input and an output, the input selectable between a stable reference input and an analog multiplexer input, and having an ADC conversion time corresponding to a time duration required to generate a predetermined number of bits and comprising a plurality of phases corresponding to the predetermined number of bits, wherein the cyclic ADC circuit comprises a scaling/reference circuit having an operational amplifier operating in a reference voltage generation mode and an analog multiplexing mode, the method comprising the steps of: during a first of the plurality of phases operating the operational amplifier in the reference voltage generation mode and the analog multiplexing mode to generate a first bit of the predetermined number of bits for providing to the output; and during subsequent ones of the plurality of phases operating the operational amplifier in the analog multiplexing mode to generate subsequent bits of the predetermined number of bits for providing to the output, each of the subsequent bits corresponding to each of the subsequent ones of the plurality of phases.