Patent ID: 7265607

Claim:
A device comprising: an output stage to control a current delivered to or received from a load to maintain an output voltage substantially constant relative to an internal reference voltage, wherein the output stage comprises: an active pull-up circuit to source the current when the output voltage is less than the internal reference voltage; and an active pull-down stage to sink the current when the output voltage is greater than the internal reference voltage; a feedback circuit coupled to the output stage, to receive the output voltage, and to provide the internal reference voltage to the output stage, wherein the feedback circuit is configured to maintain the internal reference voltage substantially constant relative to an external reference voltage; and a level shifter to level shift the internal reference voltage to match a predetermined bias voltage to bias the output stage, the level shifter comprising two P-type transistors and an N-type transistor, each having a drain, a source, and a gate, wherein: the source of the first P-type transistor is connected to a first supply voltage, the gate of the first P-type transistor is connected to a second supply voltage, and the drain of the first P-type transistor is connected to the drain and gate of the N-type transistor; and the source of the second P-type transistor is connected to the source of the N-type transistor, the gate of the second P-type transistor is connected to the drain of the second P-type transistor, and the drain of the second P-type transistor is connected to the internal reference voltage.