Patent ID: 7649400

Claim:
A signal switch circuit comprising: a first p-channel transistor coupled to a first input/output node at its drain and a second input/output node at its source; an n-channel transistor coupled in parallel with the first p-channel transistor; an overshoot protection block having: a first inverter that is coupled to the gate of the first p-channel transistor; a second inverter that is coupled to the first inverter; a second p-channel transistor that is coupled to the first input/output node at its gate and a backgate of the p-channel transistor at its source; a third p-channel transistor that is coupled to the second input/output node at its gate and the backgate of the p-channel transistor at its source; a fourth p-channel transistor that is coupled to the second inverter at its gate, the first input/output node at its drain, and the drain of the third p-channel transistor at its source; a fifth p-channel transistor that is coupled to the second inverter at its gate, the second input/output node at its drain, and the drain of the second p-channel transistor at its source; and a sixth p-channel transistor that is coupled to the sources of the second and third p-channel transistors at its drain, the first inverter at its gate, and a p-rail voltage node at its source; and an undershoot protection block having a first output coupled to a backgate of the n-channel transistor, a first input coupled to the first input/output node, a second input coupled to the second input/output node, a third input coupled to a gate of the n-channel transistor, and a second output coupled to an n-rail voltage node.