Patent ID: 7364957

Claim:
A method for forming a semiconductor device, comprising: providing a semiconductor substrate; forming isolation regions in the semiconductor substrate and forming a plurality of active areas formed between the isolation regions; forming at least one gate structure in one of the active areas, the gate structure comprising a gate oxide over the substrate and a conductive gate electrode over the gate oxide and the gate structure having sidewalls, the active area beneath the gate structure forming a channel region; forming a lightly doped drain diffusion in the active area on either side of the gate structure sidewalls; forming recessed areas in the active area on either side of the gate structure sidewalls; forming insulating composite spacers on either side of the gate structure, the composite spacers covering the sidewalls and overlying the recessed areas; and forming source/drain diffusions in the active areas including angle implanted source/drain regions formed in the substrate, the source/drain regions being self aligned to the composite spacers.