Patent ID: 7085978

Claim:
An integrated circuit comprising: a functional block of circuitry; a wrapper serial scan chain having a plurality of wrapper serial scan chain cells; and test circuitry separate from the wrapper serial scan chain and operable to perform at least one test operation upon said functional block of circuitry, said test circuitry having a plurality of test signal connections extending between said test circuitry and parts of said integrated circuit other than said test circuitry, said dedicated test signal connections being exclusively used for test operations; wherein in a check mode, one or more wrapper serial scan chain cells of said wrapper serial scan chain are coupled to respective ones of said dedicated test signal connections to allow testing of said dedicated test signal connections using said wrapper serial scan chain, wherein a wrapper serial scan chain cell is coupled to a dedicated test signal input to said test circuitry to allow capture of a test signal reaching said dedicated test signal input, and wherein a wrapper serial scan chain cell is coupled to a dedicated test signal output from said test circuitry to allow driving of a known signal value out from said dedicated test signal output.