Patent ID: 7919375

Claim:
A method comprising: providing a lower structure having a shallow trench isolation regions (STI) and a gate region; and then forming a device isolation film in the STI regions and a sacrificial layer in the gate region; and then forming a lightly doped drain (LDD) region between the device isolation film and the sacrificial layer using the device isolation film and the sacrificial layer as barriers; and then forming a trench in the lower structure by selectively removing the sacrificial layer from the gate region; and then forming spacers on respective sidewalls of the trench; and then forming a gate insulating film on the lowermost surface of the trench and between the spacers; and then forming a gate electrode over the gate insulating film and filling the trench; and then forming a junction region in the lower structure and over the LDD region; and then diffusing the LDD region to opposite ends of the lower portion of the gate region.