Patent ID: 7041562

Claim:
A method for forming a multigate dielectric structure for a semiconductor device, said method comprising: providing a substrate, the substrate having a surface with a first surface roughness; providing a dielectric layer overlying the substrate and forming a dielectric/substrate interface between the dielectric layer and the substrate at the surface of the substrate, the dielectric layer having an initial thickness; forming a patterned photoresist overlying the dielectric layer and the substrate, the patterned photoresist defining a region for formation of a gate dielectric of a desired target thickness; etching the region so that a portion of the dielectric layer remains within the region, wherein the portion of remaining dielectric layer within the region has a first intermediate thickness, the first intermediate thickness being less than the initial thickness and being less than approximately ten Angstroms; ashing the portion of remaining dielectric layer within the region, wherein ashing causes an increase in thickness of the dielectric layer remaining within the region from the first intermediate thickness to a second intermediate thickness, the second intermediate thickness being in a range of approximately 15 to 20 Angstroms; cleaning the portion of the dielectric layer remaining within the region, wherein cleaning causes a decrease in thickness of the dielectric layer remaining within the region from the second intermediate thickness to a third intermediate thickness; and thermally oxidizing the dielectric layer, wherein thermally oxidizing causes the portion of remaining dielectric layer within the region to have a desired target thickness, and further wherein the thermal oxidation increases a density of the portion of remaining dielectric layer.