Patent ID: 8842719

Claim:
A semiconductor integrated circuit comprising: a first wireless access system reception unit comprising a first analog reception unit and a first digital reception unit; a voltage-controlled oscillator; a phase locked loop; and a digital interface, wherein the first analog reception unit comprises a first reception mixer for down-converting an RF reception signal into a first analog reception signal and a first analog-digital converter for converting the first analog reception signal into a first digital reception signal, wherein the first digital reception unit comprises a first digital filter having an input terminal to which the first digital reception signal is supplied, wherein a first digital filter reception output signal outputted from an output terminal of the first digital filter in the first digital reception unit can be outputted to an outside of the semiconductor integrated circuit through the digital interface, wherein the voltage-controlled oscillator generates an oscillation output signal as a base for a first reception local signal supplied to the first reception mixer, and the phase locked loop locks a frequency of the oscillation output signal generated from the voltage-controlled oscillator to a desired frequency, wherein the first wireless access system reception unit, the voltage-controlled oscillator, and the phase locked loop enable switching from a reception operation for a first RF reception signal of a first system to a reception operation for a second RF reception signal of a second system, wherein in the switching, as for the reception operation for the first RF reception signal of the first system, an end transition operation of the first digital reception unit is performed subsequent to an end transition operation of the first analog reception unit, wherein in the switching, for the reception operation for the second RF reception signal of the second system, a start transition operation of the first analog reception unit and a start transition operation of the first digital reception unit are performed, and wherein in a period of the end transition operation of the first digital reception unit in the switching, the phase locked loop starts a lock operation so as to match a frequency of the oscillation output signal generated from the voltage-controlled oscillator to a desired frequency of the second system.