Patent ID: 8260829

Claim:
A method of limiting memory required during differencing and patching, comprising the steps of: (a) applying a differencing algorithm that operates on finite-sized blocks created from at least one source/target file; (b) adaptively determining maximum patch block size based on the requirements of the differencing, compression, decompression and patching algorithms and the desired upper limit on memory requirements; (c) ordering the patch blocks using the differencing algorithm; (d) generating one patch block in place at a time using a patching algorithm; (e) incrementally updating search data structures used to locate matching portions of the source/target files upon completion of each patch block; (f) repeating steps (d) to (e) for all patch blocks of the at least one target file; (g) compressing and transmitting all patch blocks; (h) repeating step (g) until all patch blocks of the at least one target file are compressed and transmitted; (i) receiving and decompressing the compressed patch blocks to reconstruct the at least one target file; (j) processing each patch block and applying each patch block to the reconstructed target file; and (k) repeating steps (i) to (j) until all patch blocks of the at least one target file are received and processed.