Patent ID: 7232726

Claim:
A method of manufacturing a trench-gate semiconductor device, the device having a semiconductor body defining a first portion of a trench having an insulated gate therein, a second portion of the trench extending from the bottom of the first trench portion, the semiconductor: body comprising a source region and a drain region of a first conductivity type which are separated by a channel-accommodating region adjacent to the first trench portion, the drain region comprising a drain drift region and a drain contact region, with the drain drift region between the channel-accommodating region and the drain contact region, and the drain drift region doped to a lesser extent than the drain contact region, and a field plate in the second portion of the trench between the gate and the drain contact region, the method comprisinging the steps of: (a) etching a first groove into the semiconductor body; (b) forming spacers adjacent the sidewalls of the first groove which define a window therebetween; (c) etching a second groove into the semiconductor body through the window between the spacers, the second groove extending from the bottom of the first groove towards the drain contact region and being narrower than the first groove; and (d) forming a field plate insulating layer by oxidising the bottom and sidewalls of the second groove; (e) providing the field plate over the field plate insulating layer in the second groove by filling the first and second grooves with electrode material, and etching it back until the field plate insulating layer is exposed; (f) removing the spacers; (g) forming a gate insulating layer over the field plate and at the bottom and sidewalls of the first groove; and (h) providing the gate over the gate insulating layer.