Patent ID: 8551846

Claim:
A method of fabricating a semiconductor device, comprising the steps of: providing a semiconductor substrate including a channel region; forming at least a first gate electrode structure on the channel region of the semiconductor substrate; forming a first trench in the semiconductor substrate at a first side of the first gate electrode structure, the first trench including at least a first plane that extends from a top surface of the semiconductor substrate, the first plane having a (111) crystal plane, at least a second plane that intersects the first plane, the second plane having a (111) crystal plane, and at least a first tip, the first tip defined by the intersection of the first plane and the second plane; and enlarging the first trench to form a second trench, the second trench including at least a third plane that intersects the top surface of the semiconductor substrate, at least a fourth plane that intersects the third plane, and at least a second tip, the second tip defined by the intersection of the third plane and the fourth plane forming the second tip nearer to a top surface of the semiconductor substrate than the first tip, wherein the step of enlarging the first trench to form the second trench comprises the step of: etching the first plane and the second plane to form the third plane and the fourth plane, wherein an etch rate of the first plane is higher than an etch rate of the second plane.