Patent ID: 7694203

Claim:
An integrated circuit comprising a debug circuit configured to test an asynchronous circuit by performing analog measurements on asynchronous signals associated with the asynchronous circuit, wherein the debug circuit includes: a triggering module configured to generate one or more triggering signals that gate one or more of the asynchronous signals associated with the asynchronous circuit, wherein the triggering module has a continuous mode of operation and a single-shot mode of operation; a timing module, wherein the timing module has a timing range exceeding a pre-determined value, and wherein the timing module is configured to at least provide signals corresponding to a first time base or signals corresponding to a second time base; a measurement circuit configured to sample an analog value for the one or more asynchronous signals based on the one or more triggering signals, wherein during the continuous mode of operation, the measurement circuit is configured to sample a weighted-average current value from multiple signal value measurements, and wherein during the single-shot mode of operation, the measurement circuit is configured to sample a single signal value; and control logic configured to select a mode of operation and a given time base for the debug circuit, wherein the given time base is either the first time base or the second time base.