Patent ID: 7805541

Claim:
A modular, numerical control unit having low-jitter synchronization, comprising: a main computer; and at least one controller unit, the at least one controller unit, starting from the main computer, interconnected by serial data transmission channels in the form of a series circuit, the at least one controller unit including: a first receiver unit adapted to receive a serial data stream arriving from a direction of the main computer, an input to the first receiver unit connected to a first one of the serial data transmission channels; a first transmitter unit connected to a second one of the serial data transmission channels and adapted to output a serial data stream; and a clock recovery unit having an input connected to the first one of the serial data transmission channels and an output connected to an input of the first transmitter unit, the clock recovery unit adapted to derive a synchronous clock signal from the serial data stream arriving at the first receiver unit and to supply the synchronous clock signal to the first transmitter unit, the synchronous clock signal used by the first transmitter unit as a transmission clock signal, the serial data stream arriving at the first receiver unit and the serial data stream output by the first transmitter unit coupled to each other in phase-locked manner; wherein the at least one controller unit includes a processor unit to which the synchronous clock signal is supplied, the processor unit adapted to process data included in the received serial data stream, at determined time intervals and to supply the processed data to the first transmitter unit; and wherein the at least one controller includes at least one control loop, the data included in the received serial data stream and processed by the processor unit includes set point values for the at least one control loop.