Patent ID: 7280402

Claim:
A method for reading a NOR-type flash memory apparatus having a plurality of word lines, a plurality of bit lines intersecting the plurality of the word lines, a plurality of cells connected between the bit lines and the word lines, and a common source line connected to source terminals of the plurality of the cells, the method comprising the steps of: selecting a cell to read a state thereof by selecting the corresponding bit line and the corresponding word line; applying a channel voltage to the selected word line, applying a ground voltage to the other non-selected word lines, applying a read voltage to the selected bit line, applying a power supply voltage to the other non-selected bit lines, and applying the power supply voltage to the common source line, wherein the channel voltage is lower than a threshold voltage of the selected cell in a programmed state and higher than a threshold voltage of the selected cell in an erased state, wherein the read voltage is lower than the power supply voltage and higher than the ground voltage; and reading information stored in the selected cell by comparing a voltage of the selected bit line with a reference voltage.