Patent ID: 7829405

Claim:
A method of forming a lateral bipolar transistor using CMOS transistor processing steps, comprising: forming isolation regions to respectively isolate first, second, third, fourth and fifth surface portions of a first conductivity type region of a semiconductor substrate; forming a first well region of second conductivity type by implanting dopant into the second, third and fourth surface portions; forming second and third well regions of the first conductivity type in the first well region by implanting dopant into the third surface portion; the second and third well regions being separated from each other across a channel region in the third surface portion; forming a gate structure over the channel region; after forming the gate structure, performing a first source/drain dopant implant to establish surface regions of a higher concentration of first conductivity type within upper parts of the first and fifth surface portions and upper parts of the second and third well regions; and after forming the gate structure, performing a second source/drain dopant implant to establish surface regions of a higher concentration of second conductivity type within upper parts of the second and fourth surface portions; the regions of higher concentration establishing base, collector, emitter and substrate contact areas for the bipolar transistor.