Patent ID: 7112506

Claim:
A method for forming a capacitor of a semiconductor device, the method comprising the steps of: providing a semiconductor substrate on which an insulating interlayer having plugs is formed; depositing an etch stop layer, a first oxide layer, and a second oxide layer in sequence on the insulating interlayer; etching the second oxide layer and the first oxide layer, thereby forming contact holes through which portions of the etch stop layer above the plugs are exposed; cleaning the contact holes by a cleaning solution having an etching selectivity, which is higher for the first oxide layer than for the second oxide layer, thereby enlarging lower portions of the contact holes; forming a spacer nitride layer on surfaces of the contact holes and the second oxide layer; removing portions of the spacer nitride layers located on the second oxide layer and above the plugs together with portions of the etch stop layer located on the plugs; forming a double polysilicon layer on the spacer nitride layer segments formed on surfaces of the contact holes and on the second oxide layer, the double polysilicon layer consisting of a doped polysilicon layer and an undoped polysilicon layer stacked on each other; applying a photoresist film on the double polysilicon layer; etching back the photoresist film and the double polysilicon layer, thereby eliminating the portions of the double polysilicon layer on the second oxide layer; removing the remained photoresist film; growing hemispherical silicon grains on surfaces of segments of the undoped polysilicon layer, thereby forming lower electrodes; and forming a dielectric layer and an upper electrode in sequence on the lower electrodes.