Patent ID: 8854791

Claim:
A voltage controlled variable capacitor, comprising: a plurality of MOS capacitance elements each comprising an N + type well layer a gate electrode formed on the well layer via a gate oxide film, and a contact layer formed of an N + layer containing a higher concentration of N type impurities than that of the well layer and formed at a position separated from the gate electrode in a surface direction in the well layer; wherein the contact layer of each one of the plurality of MOS capacitance elements are electrically connected in common; wherein a bias voltage supply unit for supplying DC bias voltages different from each other is provided to gate electrodes of the respective MOS capacitance elements; wherein the DC bias voltages are set so that the voltage differences between the DC bias voltages having adjacent magnitudes are smaller than a threshold voltage Vt of the MOS capacitance element to which the larger bias voltage of each difference is applied, wherein Vt is a voltage occurring between the well layer and the gate electrode when a depletion layer formed in the well layer is eliminated when the voltage of the gate electrode with respect to the well layer has increased, and wherein a control voltage is supplied to the contact layers to thereby control a capacitance value between a common connection point of the plurality of MOS capacitance elements and gate electrode sides of the MOS capacitance elements.