Patent ID: 8169396

Claim:
A liquid crystal display (LCD) device, comprising: a plurality of data lines; a plurality of gate lines; an array of pixel cells, each of the pixel cells being coupled with one of the gate lines and one of the data lines; a gate driver coupled with the plurality of gate lines, the gate driver being configured to receive a gate output enable signal having a first voltage level and a second voltage level, wherein the gate output enable signal is set to the first voltage level to unselect all of the gate lines, and the gate output enable signal is set to the second voltage level to have the gate driver select one of the gate lines; a data driver configured to output an image signal; and a demultiplexer comprising a plurality of switches respectively connected to the data lines and respectively controlled by a plurality of clock signals, the demultiplexer configured to transmit the image signal from the data driver selectively to the data lines via the switches, each of the clock signals being set to a third voltage level to turn on the associated switch, and to a fourth voltage level to turn off the associated switch; wherein all of the switches are configured to turn on as the clock signals are concurrently set to the third voltage level meanwhile the gate output enable signal is set to the first voltage level for sharing charges among the data lines; while all of the clock signals are concurrently set to the third voltage level, the gate output enable signal is changed from the first voltage level to the second voltage level to have the gate driver select one of the gate lines; and while the gate output enable signal is continuously kept at the second voltage level, the clock signals are sequentially set to the third voltage level one at a time to turn on the switches one at a time to apply the image signal to each of the data lines.