Patent ID: 8750068

Claim:
A memory system comprising: a semiconductor memory device including a plurality of memory cells; and a memory controller configured to generate a special command for searching for refresh information stored in the semiconductor memory device and to control a refresh operation of the semiconductor memory device, wherein the semiconductor memory device is configured to output the refresh information to the memory controller in response to the special command generated by the memory controller, and wherein the memory controller includes, a command generator configured to generate the special command for searching for the refresh information corresponding to the semiconductor memory device before generating commands for controlling other operations of the semiconductor memory device; a memory register storage device configured to store the refresh information output from the semiconductor memory device; a pulse generator configured to generate and output a refresh pulse corresponding to the refresh information in response to a refresh command generated by the command generator; and an address counter configured to sequentially generate a row address for selecting a word line connected with a memory cell to be refreshed among the plurality of memory cells in response to the refresh pulse.