Patent ID: 7528494

Claim:
An electronic device including at least two integrated circuit chips or elements in superimposed adherent relationship forming a multi-chip stack; comprising: a first one of said integrated circuit chips or elements having a multi-layer construction comprising a plurality of dielectric and metal layers, said first chip or element being constituted of a plurality of adhesively-fastened multi-chip integrated circuit stacks, a first surface constituted of a capping layer and an opposite distal surface constituted of a permanent silicon handle layer; a second one of said integrated circuit chips or elements having a multi-layer construction comprising a plurality of dielectric and metal layers, a first surface constituted of a capping layer, said second integrated circuit chip or element is in an inverted position and adhesively fastened in surface engagement with the capping layer of said first integrated circuit chip or element, said second integrated circuit chip or element having conductor-filled vias that connect conductive layers in said first said integrated circuit chip or element to the top surface of said multi-chip stack, and conductive layers in said second integrated circuit chip or element to the top surface of said multi-chip stack; and said first and second semiconductor chips or elements being adhered to each other through the interposition of an adhesive layer, said adhesive layer comprising a thin adhesive consisting of a maleic anhydride polymer, activated by a dendritic amine binder.