Patent ID: 8190973

Claim:
A data processing apparatus comprising: a processing unit for performing data processing operations; a storage device configured to store data values and error data associated with said data values; said processing unit accessing said storage device by issuing a read access request specifying an address of a data value in said storage device; access control circuitry, responsive to said read access request, configured to read said data value specified by the read access request; error detection circuitry for detecting by means of said associated error data an error in said read data value; error correction circuitry for performing error correction on said read data value to generate a corrected data value, if said error detection circuitry indicates occurrence of said error; an error cache having at least one entry, each entry configured to store an address identifier and an associated replacement data value; on occurrence of said error, said error cache configured to allocate said corrected data value as the replacement data value in one of said at least one entries of said error cache, and the read access request being performed again; the access control circuitry, responsive to the access request, and configured to cause the data value identified by the address to be read from the error cache in preference to the storage device in the event of a hit being detected in the error cache.