Patent ID: 7585739

Claim:
A method of fabricating a semiconductor device comprising the stops of: forming a gate over a semiconductor region through an insulating film: forming a first impurity-diffused region by introducing an impurity into a surficial layer of said semiconductor region under masking by said gate; forming a first sidewall spacer over both lateral faces of said gate; forming a third impurity-diffused region by introducing a diffusion suppressive element into the surficial layer of said semiconductor region under masking by said gate and said first sidewall spacer; forming a second sidewall spacer to cover said first sidewall spacer over both lateral sides of said gate; and forming a second impurity-diffused region by introducing an impurity into the surficial layer of said semiconductor region to a depth larger than that of said first impurity-diffused region under masking by said gate, said first sidewall spacer and said second sidewall spacer, wherein said diffusion suppressive element is any one element selected from nitrogen, fluorine and carbon, and wherein the third impurity-diffused region is amorphous.