Patent ID: 8067266

Claim:
A method of fabricating microelectronic device substrates, comprising: forming a first intermediate substrate including providing a first core having a first surface and an opposing second surface; forming at least one conductive trace on the first surface of the first core; forming at least one conductive trace on the second surface of the first core; forming at least one plated via extending between the at least one conductive trace on the first surface of the first core and the at least one conductive trace on the second surface of the first core; and filling the at least one plated via; forming a second intermediate substrate including providing a second core having a first surface and an opposing second surface; forming at least one conductive trace on the first surface of the second core; forming at least one conductive trace on the second surface of the second core; forming at least one plated via extending between the at least one conductive trace on the first surface of the second core and the at least one conductive trace on the second surface of the second core; and filling the at least one plated via; then attaching the first intermediate substrate to the second intermediate substrate wherein the first surface of the first intermediate substrate first core faces the first surface of the second intermediate substrate second core; substantially simultaneously forming at least one build-up layer adjacent the second surface of the first intermediate substrate first core and at least one build-up layer adjacent the second surface of the second intermediate substrate second core; and separating the first intermediate substrate from the second intermediate substrate.