Patent ID: 7763518

Claim:
A method of fabricating a bipolar transistor comprising the steps of: providing a silicon-on-insulator (SOI) substrate comprising a first semiconductor layer located over a first insulating layer, wherein a portion of the first insulating layer beneath said first semiconductor layer is removed providing an undercut region; forming a second insulating layer on exposed surfaces of said first semiconductor layer, wherein said second insulating layer is thinner than said first insulating layer; filling the undercut region and the removed portion of the first semiconductor layer with a conductive back electrode material; forming an extrinsic base containing a first conductivity dopant and an extrinsic collector containing a second conductivity type dopant in portions of the first semiconductor layer; forming an emitter comprising a second semiconductor layer including said second conductivity type dopant over a portion of said first semiconductor layer; and biasing the conductive back electrode material to form an inversion charge layer at an interface between the first semiconductor layer and the second insulating layer.