Patent ID: 7407832

Claim:
A method for manufacturing a semiconductor package, comprising: preparing a die provided with at least one first half and at least one second half coupled together to form a cavity therebetween, said first half having a satin-finished inner surface and an ejector-pin-through-hole extending therethrough, inserting an ejector pin having a mirror-finished surface at a tip end thereof into said ejector-pin-through-hole, positioning said ejector pin at a position where a surface of said tip end of said ejector pin coincides with an intermediate surface height of said satin-finished inner surface of said first half, and fixing said ejector pin at said position, and embedding an IC structural body having a lead, an IC chip, and bonding wires bonded between the lead and the IC chip within a molten resin filled in said cavity, after said IC structural body is confined within said cavity.