Patent ID: 7033909

Claim:
A method of forming trench isolations comprising the steps of: providing a semiconductor substrate having a cell array region and a peripheral region; forming at least one cell trench in the cell array region and at least one peripheral trench wider than the cell trench in the peripheral region of the substrate, wherein the cell and the peripheral trenches have sidewalls; forming a first dielectric layer that partially fills the cell trench and the peripheral trench over the substrate; forming at least one photoresist pattern that exposes at least the cell trench partially filled with the first dielectric layer over the substrate; etching the first dielectric layer formed on the sidewalls of the exposed cell trench using the photoresist pattern as a etch mask; removing the photoresist pattern; forming a second capping layer over the substrate where the photoresist pattern is removed before forming a second dielectric layer; and forming the second dielectric layer filling the cell trench and the peripheral trench over the substrate where the photoresist pattern is removed.