Patent ID: 7076417

Claim:
A computerized method for modeling and processing an asynchronous functional specification to provide an input to an architecture synthesis engine in a computer system, said method comprising: generating an initial task graph from said asynchronous functional specification, said initial task graph comprising a representation of an executable task, at least one representation of a connection to the executable task, and at least one representation of a connection from the executable task; identifying each of the representations of the connections as at least one of a data connection and a control connection based on a predetermined set of rules, wherein the representation of the executable task comprises at least one of a deterministic task and a non-deterministic task; generating an annotated task graph, wherein each of the control connection representations is identified as a control connection; and transferring said annotated task graph to said architectural synthesis engine in a computer system for processing, wherein each of said control connection identifiers of said annotated task graph direct a scheduling component of said architecture synthesis engine to disregard each of the representations of said control connections when said engine processes said annotated task graph.