Patent ID: 8836106

Claim:
A semiconductor device comprising: a die pad; a plurality of suspension leads for supporting the die pad; a plurality of leads arranged between the plurality of suspension leads; a semiconductor chip including a main surface, a plurality of electrode pads formed on the main surface, and a rear surface opposite to the main surface, and mounted on an upper surface of the die pad; a plurality of wires electrically connecting the plurality of electrode pads of the semiconductor chip with the plurality of leads, respectively; and a sealing member sealing the semiconductor chip and the plurality of wires such that a lower surface of each of the plurality of leads is exposed, wherein each of the plurality of leads has the lower surface exposed from the sealing member, an upper surface opposite to the lower surface, an inner end surface located between the upper surface and the lower surface and facing the die pad, an outer end surface opposite to the inner end surface and exposed from the sealing member, a first side surface located between the upper surface and the lower surface and located between the inner end surface and the outer end surface, and a second side surface opposite to the first side surface, wherein each of the plurality of leads has a first portion located on an inner end surface side in an extending direction of each of the plurality of leads, and a second portion located on an outer end surface side than the first portion, wherein a first step portion is formed on the first side surface of the first portion, and formed on an upper surface side than the lower surface, wherein a second step portion is formed on the second side surface of the second portion, and formed on the upper surface side than the lower surface, wherein the first and second step portions are not formed on the first side surface of the second portion, and wherein the first and second step portions are not formed on the second side surface of the first portion.