Patent ID: 8298961

Claim:
A method of forming patterns of a semiconductor device, the method comprising: providing a semiconductor substrate that comprises a first region in which first patterns are to be formed and a second region in which second patterns are to be formed, each of the second patterns having a wider width than the first patterns; forming an etch target layer over the semiconductor substrate including the first and second regions; forming first etch patterns over the etch target layer of the first and second regions, the first etch patterns each having two sidewalls; forming second etch patterns on both sidewalls of each of the first etch patterns, wherein each of the second etch patterns formed in the second region has a wider width than each of the second etch patterns formed in the first region; removing the first etch patterns; forming third etch patterns over the etch target layer of the second region, wherein each of the third etch patterns has a sidewall positioned over a top surface of a second etch pattern formed in the second region; and etching the etch target layer using the third etch patterns and the second etch patterns as an etch mask to form the first patterns and the second patterns.