Patent ID: 8296274

Claim:
An apparatus, comprising: a processor; a memory; a set of logics comprising a first logic and a second logic; and an interface to connect the processor, the memory, and the set of logics, the first logic being configured to provide a value associated with the probability that a data sub-block processed by a data de-duplication logic is a member of a set of data sub-blocks stored by the data de-duplication logic, the value being provided in response to a lookup of a key value in a probabilistic data structure that stores information concerning members of the set of data sub-blocks, the key value being associated with a data sub-block, the key value being a de-duplication hash of the element, the probabilistic data structure being a Bloom filter, the Bloom filter being stored in the memory; and the second logic being configured to provide a present/absent signal indicating whether a data sub-block is present or absent in the set of data sub-blocks, where the present/absent signal is computed as a function of two or more values provided by the first logic, where one of the two or more values is directly related to the data sub-block and at least one of the two or more values are indirectly related to the data sub-block.