Patent ID: 6950131

Claim:
In a semiconductor imaging chip having a plurality of active pixel sensors arranged in an array of rows and columns, each active pixel sensor having a respective internal offset voltage output superimposed on its respective active pixel sensor output, and wherein a current row of said array has an access line shared with a reset line of a previous row of said array to form a shared access/reset line which simultaneously accesses said current row and resets said previous row, a method for canceling the internal offset voltage appearing at the output of a given active pixel sensor on said current row to form a corrected output, said method comprising: accessing a first row of said array to obtain a first sample of said given active pixel sensor output; storing said first sample of said given active pixel sensor output of said first row of said array; accessing a second row of said army, said first row of said array being the previous row to said second row of said array; and thereafter, accessing said first row of said array a second time to obtain a second sample of said given active pixel sensor output; storing said second sample of said given active pixel sensor output of said first row of said array; and subtracting said second sample from said first sample to form said corrected output from said given active pixel sensor.