Patent ID: 7269208

Claim:
A device for sending and receiving digital data that is capable of processing different bit rates from a group of predetermined bit rates, the device comprising: a channel coding/decoding stage comprising an interleaver, a deinterleaver, a shared memory having a minimum size based upon a maximum bit rate of the group of predetermined bit rates and having a first memory space assigned to said interleaver and a second memory space assigned to said deinterleaver, a size of each of the first and second memory spaces being set as a function of the bit rate actually processed by the device, a Reed-Solomon coder/decoder connected to said interleaver and said deinterleaver and having a length N, and said interleaver providing convolutional interleaving of I branches with i−1 blocks of M bytes, and said deinterleaver providing convolutional deinterleaving with I′ branches of i′−1 blocks of M′ bytes, with I and I′ being sub-multiples of N and i and i′ being current relative indexes of the branches.