Patent ID: 7615853

Claim:
A chip-stacked package structure having leadframe with multi-piece bus bar, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein said die pad is provided between said plurality of inner leads arranged in rows facing each other and is vertically distant from said plurality of inner leads; an offset chip-stacked structure formed with a plurality of chips stacked together, said offset chip-stacked structure being provided on said die pad and electrically connected with said plurality of inner leads arranged in rows facing each other; an encapsulant covering said plurality of semiconductor chip structures and said leadframe, wherein said plurality of outer leads extend out of said encapsulant; and at least a bus bar, provided between said plurality of inner leads arranged in rows facing each other and said die pad, said bus bar being formed by a plurality of metal fragments.