Patent ID: 8850166

Claim:
A computer implemented method for executing a Load/Store Disjoint (LSD) instruction in a processor of a multi-processor system, the method comprising: obtaining a Load/Store Disjoint instruction for execution, the Load/Store Disjoint instruction comprising an opcode and specifying two disjoint operands in memory, the execution comprising a) and b): a) performing, by the computer, an LSD instruction specified operation based on the obtained opcode, the operation comprising accessing the two disjoint operands in memory; and b) based on determining whether an intervening store event from another processor of the multi-processor system may have modified one of the two disjoint operands during or between the accessing the two operands in memory, setting a first indicator value or a second indicator value in a program accessible location, said first indicator value indicating that the intervening store event from another processor of the multi-processor system may have modified one of the two operands during or between the accessing the two operands in memory, the second indicator value indicating that no intervening store event modified one of the two operands during or between the accessing the two operands in memory.