Patent ID: 6924660

Claim:
A circuit comprising: a. a first reference voltage node adapted to provide a first reference voltage; b. a reference resistor having: i. a first reference-resistor terminal coupled to the first reference voltage node; and ii. a second reference-resistor terminal; c. a second reference voltage node adapted to provide a second reference voltage; d. an on-die termination (ODT) resistor having: i. a first ODT-resistor terminal; and ii. a second ODT-resistor terminal; e. a multiplexer having: i. a first multiplexer input terminal coupled to the second reference voltage node; ii. a second multiplexer input terminal coupled to the second ODT-resistor terminal; and iii. a multiplexer output terminal; and f. a comparator having: i. a first comparator input terminal coupled to the second reference-resistor terminal; ii. a second comparator input terminal coupled to the multiplexer output terminal; and iii. a comparator output terminal.