Patent ID: 8019393

Claim:
A signal receiver circuit, comprising: a transmission gate, having an input terminal for receiving an input signal, an output terminal coupled to a first node, and a control terminal coupled to a control signal, the transmission gate determining whether to conduct the input signal according to the control signal; a pull-low unit, determining whether to pull down a voltage at the first node according to the control signal; a boost capacitor, having a first terminal coupled to the first node, and a second terminal coupled to a second node; a voltage division unit, determining whether to divide a reference voltage and send a divided voltage to the second node according to the control signal; and a receiver unit, having a first input terminal coupled to the second node, a second input terminal coupled to a voltage source, and an output terminal for outputting an output signal; wherein a logic high level and a logic low level of the second node are both higher than a logic high level and a logic low level of the input signal.