Patent ID: 7285478

Claim:
A method of manufacturing a multi-substrate semiconductor package, the method comprising: providing a first substrate with a plurality of first dies present thereon; forming a plurality of electrical contacts on an upper surface of a lateral extension portion of at least one of the plurality of first dies on the first substrate; providing a second substrate, the second substrate comprising a plurality of second dies, at least one of the plurality of second dies comprising an interconnect region; forming a sandwich structure by bonding the second substrate to an upper surface of the first substrate such that the interconnect region of at least one of the second dies is overlying the lateral extension portion of at least one of the first dies to form an intermediate level within the sandwich structure formed by at least the first substrate and the second substrate; separating at least the one second die including the interconnect region and the bonded first die including the lateral region from the sandwich structure; coupling an electrically conductive structure through the interconnect region of the one second dies to the lateral extension portion of the one first die, thereby electrically coupling the electrically conductive structure to the lateral extension portion within a portion of the intermediate level.