Patent ID: 8151171

Claim:
A decoder that is operable to decode an LDPC (Low Density Parity Check) coded signal, the decoder comprising: a check engine that is operable to employ a first bit edge message to update a first check edge message thereby generating a second check edge message; and a bit engine that is operable to: scale the second check edge message thereby generating a scaled second check edge message; employ the scaled second check edge message to update a second bit edge message thereby generating a third bit edge message; and employ the third bit edge message to generate soft information corresponding to an information bit encoded into the LDPC coded signal; and wherein: the soft information corresponding to the information bit encoded into the LDPC coded signal is used to make a best estimate of the information bit encoded into the LDPC coded signal; and wherein: the check engine is operable to: receive a compressed bit edge message; and decompress the compressed bit edge message thereby recovering the first bit edge message for use in updating the first check edge message thereby generating the second check edge message.