Patent ID: 7566622

Claim:
A method for manufacturing a power semiconductor device, comprising: forming a plurality of spaced contact trenches in a semiconductor body of one conductivity, said trenches extending to a first depth in said semiconductor body, and each being adjacent a semiconductor mesa; filling said trenches with a filler material to form a filler body in each trench; forming a base region of another conductivity in said semiconductor body, said base region extending to a second depth below said first depth; forming gate trenches in each said semiconductor mesa, each gate trench extending to a depth below said second depth; forming a gate structure in each trench, each gate structure including gate insulation and a gate electrode; removing said filler body from said contact trenches; and depositing electrically conductive material to serve as a power electrode, to fill said contact trenches, and to make electrical connection to said base region at bottom of said contact trenches.