Patent ID: 8237222

Claim:
A method of manufacturing a semiconductor device, comprising: forming a well region of a first conductivity type on a semiconductor substrate; forming a low concentration source region of a second conductivity type and a low concentration drain region of the second conductivity type in the well region, the low concentration source region and the low concentration drain region being spaced apart from each other; forming a high concentration source region of the second conductivity type in the low concentration source region; forming a high concentration drain region of the second conductivity type in the low concentration drain region; forming a first field oxide film in the low concentration source region; forming a second field oxide film in the low concentration drain region; and providing a region to be doped with impurities for threshold voltage adjustment and a region to be doped with no impurity in a channel forming region located between the low concentration source region and the low concentration drain region, and performing channel doping therein.