Patent ID: 8178417

Claim:
A method of forming an integrated circuit comprising: providing a substrate prepared with a patterned mask with an opening; etching the substrate to form an upper portion of a trench structure in the substrate exposed by the opening, the upper portion of the trench structure is from a top surface of the substrate, the upper portion comprising sidewalls with a first angle Q 1 with respect to the top surface of the substrate, wherein the etching comprises an anisotropic etch selective to the patterned mask; further etching the substrate to form a lower portion of the trench below the upper portion, wherein the lower portion comprises a second angle Q 2 with respect to the top surface of the substrate, wherein the formed trench has the angle Q 1 in the upper portion and the angle Q 2 in the lower portion, wherein Q 2 is less than Q 1 , wherein the further etching comprises an anisotropic etch non-selective to the patterned mask; and filling the trench with dielectric material.