Patent ID: 7236410

Claim:
An apparatus to program a read-only memory cell, comprising: a pull-up circuit comprising: a level shifter to receive a control signal, a supply voltage, and one of more of a plurality of rail voltages, each of the plurality of rail voltages substantially equal to a respective integer multiple of the supply voltage, and to generate a second control signal; and a cascode stage comprising: a plurality of transistors, a gate voltage of each of the plurality of transistors to be controlled at least in part by a respective one of the second control signal, the supply voltage, and at least one of the plurality of rail voltages; a resistive network coupled to the plurality of transistors, the resistive network to maintain a gate-to-source voltage and a gate-to-drain voltage of each of the plurality of transistor at less than a maximum operational voltage; and an output node to provide a cell programming signal.