Patent ID: 7729672

Claim:
A method comprising: in a first operating mode, driving first signals onto an output terminal using a first Class AB amplifier circuit, wherein the first Class AB amplifier circuit includes a first power transistor that is biased at a first bias current I 1 and at a first collector-to-emitter bias voltage V 1 , wherein the first signals are in a frequency band above one gigahertz, and wherein a second Class AB amplifier circuit is disabled during the first operating mode; and in a second operating mode, driving second signals onto the output terminal using the second Class AB amplifier circuit, wherein the second Class AB amplifier circuit includes a second power transistor that is biased at a second bias current 12 and at a second collector-to-emitter bias voltage V 2 , wherein I 1 >I 2 , wherein V 1 >V 2 , wherein the first Class AB amplifier circuit is disabled during the second operating mode, wherein the second signals are in the frequency band above one gigahertz, and wherein the first and second Class AB amplifier circuits are integrated onto a single integrated circuit.