Patent ID: 7154297

Claim:
An integrated circuit comprising: a programmable logic array portion of the integrated circuit, comprising logic array blocks and programmable interconnect configurable using volatile memory elements to implement user functions; a nonvolatile memory portion of the integrated circuit, wherein when in a nonvolatile active mode, the nonvolatile memory portion is coupled to the programmable logic array portion, the nonvolatile memory portion comprising nonvolatile memory elements to store configuration data for configuring the programmable logic array portion upon power-up of the integrated circuit; and a volatility control element, wherein the volatility control element indicates whether the integrated circuit is in a nonvolatile active mode or a volatile active mode, and when the integrated circuit is in the volatile active mode, configuration data for configuring the programmable logic array portion upon power-up of the integrated circuit is provided by an external source, wherein in the volatile active mode, the configuration data for configuring the programmable logic array portion is not stored in the nonvolatile memory portion of the integrated circuit.