Patent ID: 7745304

Claim:
A method comprising: forming a first dielectric pattern over a semiconductor substrate, and performing a first etching process to form at least one trench in the semiconductor substrate; exposing an edge portion of the trench; performing an oxidation process over the semiconductor substrate to round the edge portion of the trench; forming a second dielectric over the semiconductor substrate thereby filling the trench; performing a planarization process on the second dielectric formed over the semiconductor substrate; forming a photoresist pattern over the second dielectric corresponding to the trench; performing a second etching process to form a second dielectric pattern filling the trench; removing the photoresist pattern formed over the second dielectric pattern; and performing a second cleaning process on the semiconductor substrate comprising the trench filled with the second dielectric pattern to form a device isolation layer, which is formed by removing a portion of the second dielectric pattern filling the trench, wherein a portion of the second dielectric remains on the first dielectric pattern after the performing of the planarization process on the second dielectric.