Patent ID: 7645675

Claim:
A parallel plate capacitor for use in an integrated circuit comprising a set of capacitor plates disposed on consecutive levels in the back end of an integrated circuit, alternate ones of the capacitor plates overlapping with adjacent capacitor plates and being adapted to connect to electrical sources of opposite polarity, thereby forming a first set of a first polarity and a second set of a second polarity, said capacitor plates being formed simultaneously with other interconnections located on the same respective consecutive levels in the remaining portion of the integrated circuit outside of the parallel plate capacitor; whereby said capacitor plates have the same thickness as said other interconnections and are separated vertically by the same amount of interlevel dielectric, in which: each of said capacitor plates is a solid continuous layer located entirely within each of the respective consecutive levels, wherein each of said capacitor plates comprises a set of perforations formed within said respective solid continuous layers and each of said sets of perforations are located within each of the respective consecutive levels, and further wherein said perforations in said first set of capacitor plates and said perforations in said second set of capacitor plates are aligned to form respective openings that extend entirely though said adjacent capacitor plates, said respective openings are oriented in a direction substantially normal to said consecutive levels.