Patent ID: 8860144

Claim:
A power semiconductor device comprising: a first semiconductor layer of a first conductivity type having a first surface and a second surface, the first surface and the second surface opposing each other, the first semiconductor layer having a device region and a termination region surrounding the device region; a plurality of first pillar layers of a second conductivity type provided in the device region, the first pillar layers being spaced from each other along a first direction that is parallel to the first surface; a plurality of second pillar layers of the first conductivity type provided in the device region and alternating along the first direction with the first pillar layers; a plurality of first base layers of the second conductivity type, one of the plurality of first base layers being provided on each of the first pillar layers; a plurality of source layers of the first conductivity type, each source layer being selectively formed in the first base layers; a plurality of second base layers of the second conductivity type provided on the first surface and between the plurality of first base layers and the termination region, each second base layer having no source layers formed therein; a plurality of third pillar layers of the second conductivity type provided in the device region, each of the third pillar layers being adjacent in a second direction that is perpendicular to the first surface to one of the plurality of second base layers, one of the plurality of third pillar layers being adjacent in the first direction to a portion of the first semiconductor layer disposed in the termination region, an impurity concentration of the portion being lower than an impurity concentration of the second pillar layers; a second semiconductor layer of the first conductivity type provided between adjacent ones of the second base layers which are spaced from each other along the first direction; a gate electrode provided on the first base layers and the second base layer via a gate insulating film; a first electrode electrically connected to the second surface; and a second electrode electrically connected to the first base layers and the source layers.