Patent ID: 8219742

Claim:
A memory controller for controlling access to one or more flash memories, in which data writing and data reading are performed in physical pages and data erasing is performed in physical blocks each composed of plural physical pages, comprising: a logical page forming unit which forms logical pages each composed of plural logical sectors each assigned a logical address provided from a host system; a data holding unit which is composed of plural unit areas each for holding data corresponding to one logical page; a relationship management unit which manages a relationship between the logical pages and the unit areas composing the data holding unit; a control unit which writes data to the unit areas according to the relationship between the logical pages and the unit areas managed by the relationship management unit; a write data management unit which maintains information indicating a total amount of write data held in each of the unit areas, which write data are provided from the host system; and a first access unit which performs data writing in order on a basis of the information maintained by the write data management unit, which the data writing includes writing data held in the unit areas to the flash memories; wherein: in the data writing performed in unit areas, data held in a unit area which holds large amounts of write data are written to the flash memories, in preference to data held in a unit area which holds small amounts of write data; the memory controller further comprises a second access unit which reads data from the flash memories and writes the data to the unit areas, and a data transfer unit which transfers data from one unit area to another unit area; first operations and second operations are performed in parallel, which first operations are operations for the control unit to write first data to a first unit area which is any one of the unit areas, which second operations are operations for the second access unit to read second data corresponding to the same logical page as the first data from the flash memories and write the second data to a second unit area which is any one of the unit areas and different from the first unit area; the data transfer unit performs data transfer between the first unit area and the second unit area so as to form data composed of the first data and a portion of the second data which is not replaced with the first data; and the data transfer unit transfers the first data from the first unit area to the second unit area in a case where a total amount of the first data is smaller than a half amount of data corresponding to one logical page, and transfers the second data from the second unit area to the first unit area in a case where a total amount of the first data equals or exceeds a half amount of data corresponding to one logical page.