Patent ID: 8115318

Claim:
A semiconductor device comprising: an insulating underlayer; a first insulating interlayer formed on said insulating underlayer, said first insulating interlayer having a groove; a first silicon-diffused metal layer buried in said groove; a first metal diffusion barrier layer formed on said first silicon-diffused metal layer and said first insulating interlayer; a second insulating interlayer formed on said first metal diffusion barrier layer, said second insulating interlayer and said first metal diffusion barrier layer having a via hole opposing said groove of said first insulating interlayer; a third insulating interlayer formed on said second insulating interlayer, said third insulating interlayer having a trench opposing said via hole; a second silicon-diffused metal layer buried in said trench and said via hole; and a second metal diffusion barrier layer formed on said second silicon-diffused metal layer and said third insulating interlayer.