Patent ID: 7023074

Claim:
A panel for use in packaging semiconductor devices, the panel comprising: a lead frame panel formed from a conductive sheet and having top and bottom surfaces, the lead frame panel being patterned to define at least one two-dimensional array of devices areas, each device area including a multiplicity of conductive contacts, wherein at least some of the contacts have an exposed bottom surface and an exposed well formed in the bottom surface of the associated contact; a plurality or dice, each die being positioned within an associated device area and electncally connected to the contacts of the associated device area; a cap formed over an associated two-dimensional array of device areas thereby encapsulating the top surface of the associated dice while leaving bottom surfaces of the contacts exposed at a bottom surface of the package, wherein material that forms the cap is also exposed on the bottom surface of the package substantially co-planer with the bottom surfaces of the contacts to isolate the contacts; solder material that plates the exposed portions of the contacts and wells.