Patent ID: 7962805

Claim:
A method for preventing a race condition, the method comprising the stages of: latching a scan data signal into a master latch of a first flip flop during a first portion of a cycle of a first clock signal; wherein the scan data signal is supplied to a scan data input of the first flip flop and the first clock signal is supplied to a clock input of the first flip flop; latching the scan data signal into a slave latch of the first flip flop during a sub-portion of a second portion of the cycle of the first clock signal; wherein the sub-portion starts after an occurrence of a predefined change in a control signal provided to the slave latch of the first flip flop; wherein the predefined change occurs after an estimated start of a second portion of a cycle of a second clock signal that is provided to a second flip flop; and latching the scan data signal into a master latch of the second flip flop during a next cycle of the second clock signal.