Patent ID: 7416934

Claim:
A method of manufacturing a semiconductor device including: a first transistor having a first impurity diffusion layer of a first conduction type formed in such a manner that a shallow junction region and a deep junction region overlap each other at least partially, and having a silicide layer formed at least on a surface of said first impurity diffusion layer; and a second transistor having a second impurity diffusion layer of a second conduction type, said first conduction type and said second conduction type being opposite to each other, said method comprising the step of forming said shallow junction region with a first impurity used, said first impurity having a diffusion coefficient lower than a diffusion coefficient of a second impurity used in forming said second impurity diffusion layer, and a dose of said first impurity being in a range from 1.1×10 15 to 2×10 15 ions/cm 2 .