Patent ID: 7292513

Claim:
A method of correcting a clock of a compact disk, comprising: receiving a data signal and a clock signal; generating a sync pattern signal by using the clock signal to detect the data signal; generating a detection window signal according to a clock number during a timing of a last sync pattern signal and a first preset timing, the detection window signal having a second preset timing width; and comparing a clock of the sync pattern signal with the detection window signal, and correcting the clock signal, wherein one end of the detection window signal adjacent to a last detection window signal is a signal front-edge, another end of the detection window signal is a signal post-edge, a region of the detection window signal within a third preset timing adjacent to the signal front-edge is a front-edge region, a region of the detection window signal within a fourth preset timing adjacent to the signal post-edge is a post-edge region, a sum of the third preset timing and the fourth preset timing is no more than the second preset timing, the step of comparing the clock of the sync pattern signal with the detection window signal further comprising: determining whether the sync pattern signal is in the front-edge region, wherein if it is, a frequency-increase signal is sent out; determining whether the sync pattern signal is in the post-edge region, wherein if it is, a frequency-reduction signal is sent out; determining whether the sync pattern signal is between the front-edge region and the post-edge region, wherein if it is, a frequency-remain signal is sent out; and correcting the clock signal according to the frequency-increase signal, the frequency-reduction signal and the frequency-remain signal.