Patent ID: 7312650

Claim:
A step-down voltage output circuit having a charge pump circuit with an oscillating circuit for stepping down a power-supply voltage and outputting a step-down voltage, the step-down voltage output circuit comprising: a timer circuit in which a timer period is set depending on a frequency of said oscillating circuit, said timer circuit outputting LOW from a time when a control signal having a first level is input thereto to a time when said timer period expires and outputting HIGH after said timer period expires during a period in which said control signal having the first level is input from a control signal input terminal, and outputting LOW during a period in which a control signal having a second level which is different from the first level is input from said control signal input terminal; a first N-channel MOS transistor in which a source is connected to a step-down voltage output terminal, a drain is connected to a ground potential, and a gate is connected to a power-supply voltage input terminal through a resistance; and a second N-channel MOS transistor in which a source is connected to said step-down voltage output terminal, a drain is connected to the gate of said first N-channel MOS transistor, and a gate is connected to an output terminal of said timer circuit.