Patent ID: 8649220

Claim:
A nonvolatile semiconductor memory comprising: a plurality of memory cells; word lines connected to the plurality of memory cells; bit lines crossing the word lines and connected to the plurality of memory cells, respectively, such that at least two of the bit lines are selected, and a current is simultaneously supplied from a power supply line to those memory cells which are connected to the selected bit lines to write data to said those memory cells; charge amount measurement sections for measuring amounts of charge stored in the plurality of memory cells, respectively; and current path switching circuits connected to the bit lines, respectively, wherein each of those current path switching circuits which are connected to the selected bit lines supplies a current from the power supply line to the memory cell concerned or a predetermined terminal depending on a measured value of the amount of charge measured by the charge amount measurement section associated with the memory cell concerned; wherein, if data writing to other memory cells are not finished, then a certain amount of current is still supplied to the memory cell even after data writing to that memory cell is finished.