Patent ID: 6893806

Claim:
A method for manufacturing a semiconductor wafer comprising: creating a reticle having a plurality of spaced apart circuit images of identical patterns of a common level of a single integrated circuit formed thereon and arranged in columns and rows about a central point of the reticle; forming at least one column of spaced apart test images outside of and adjacent each outermost column of circuit images; a source of radiation adapted for projection through the reticle for exposing the patterns on the reticle onto an underlying substrate; positioning the reticle in a holder having a pair of shutter elements aligned parallel to the columns of images, each shutter element being conjointly movable one towards the other and centered about the central point of the reticle for selectively blocking the projection of radiation through the columns of the test images; sequentially exposing surfaces of the wafer to radiation projected through the reticle and periodically changing the position of the pair of shutters with respect to the reticle for forming test circuits on the wafer at selected locations.