Patent ID: 7902634

Claim:
A semiconductor device comprising: a semiconductor substrate; a semiconductor region formed on a surface of said semiconductor substrate; a first semiconductor layer region arranged on a surface of said semiconductor region and coupled to a first electrode; a second semiconductor layer region of a ring-shaped form arranged at said semiconductor region, spaced from said first semiconductor layer region, surrounding said first semiconductor layer region and being different in conductivity type from said semiconductor region; a third semiconductor layer region arranged in said second semiconductor layer region and different in conductivity type from said second semiconductor layer region, said third semiconductor layer region including a main body having a ring-shaped form and a plurality of convex portions formed, adjacent to said main body, extending away from said first semiconductor layer region and coupled to a second electrode, the convex portions arranged at predetermined intervals and each having a width smaller than the predetermined intervals; a heavily doped semiconductor layer arranged, in said second semiconductor layer region, at least below said third semiconductor layer region, doped more heavily than said second semiconductor layer region and being the same in conductivity type as the second semiconductor layer region; and a gate electrode layer forming a channel at a surface of said second semiconductor layer region for transferring charges between the first and third semiconductor layer regions.