Patent ID: 6958543

Claim:
Semiconductor equipment comprising: a semiconductor substrate; a plurality of first type semiconductor devices having first and second device regions, the devices disposed on the substrate; a plurality of second type semiconductor devices having the first and second device regions, the devices disposed on the substrate; and upper and lower layer wirings disposed on the substrate, wherein the upper and lower layer wirings electrically connect a plurality of first device regions together with a parallel connection, and connect a plurality of second device regions together with a parallel connection, wherein the lower layer wiring includes a first contact for connecting to the first device region of at least one of the first or second type semiconductor device, the first contact being concentrated into a predetermined area of the semiconductor equipment, wherein the lower layer wiring further includes a second contact for connecting to the second device region, the second contact surrounding the first contact, and wherein the upper layer wiring disposed on the predetermined area provides a pad area for connecting to an external circuit.