Patent ID: 6990122

Claim:
A circuit for recovering data from a serial data flow comprising: a generator for generating a plurality of clock signals of equal period that are delayed equally relative to one another by a fraction equal to the period divided by a number of the plurality of clock signals; a switching circuit for receiving the plurality of clock signals and providing one of the clock signals as an output thereof; a phase comparator for receiving the output from said switching circuit and a data flow signal comprising a flow of data and providing at least one phase difference signal indicating a phase difference therebetween; a data sampler receiving as inputs the data flow signal and the output of said switching circuit, and synchronizing sampling of the data flow signal based upon the output of said switching circuit; and a controller for receiving the at least one phase difference signal from said phase comparator and controlling the switching circuit based thereon to switch the output of said switching circuit to one of said clock signals providing a smaller phase difference than a current clock signal; said switching circuit providing the output synchronously with a transition of the output and before disabling a current output to substantially prevent the production of false signals during switching.