Patent ID: 8324732

Claim:
A semiconductor component comprising: a two-dimensional semiconductor substrate having a first side, a second side arranged opposite to said first side, a surface normal which is perpendicular to said first side and said second side and a plurality of recesses which are at least arranged on the second side and extend in a direction of the surface normal; at least one dielectric passivation layer arranged on the second side; an electrically conducting contact layer arranged on the passivation layer; a plurality of contact elements for electrically connecting the contact layer with the semiconductor substrate, said contact elements being electrically conductive, said contact elements being in electrically conducting connection with the semiconductor substrate and the contact layer, said contact elements filling at least 50% of at least one of the recesses, said contact elements projecting beyond the recesses with a projection in a direction perpendicular to the surface normal, said contacts comprising a solderable material, wherein the recesses are arranged in a regular pattern on the second side of the semiconductor substrate, which pattern comprises at least two portions, with adjacent recesses in a first portion having a first distance while adjacent recesses in the second portion have a second distance that is less than said first distance in at least one direction.