Patent ID: 8826072

Claim:
A method of organizing on-chip data memory in an embedded system-on-chip platform whereon a deterministic application is run needing to meet at least one guaranteed constraint on its functional system behavior, the method comprising: dividing the deterministic application into a plurality of blocks, each of the plurality of blocks corresponding to at least a part of a subtask of the deterministic application, at least one block of the plurality of blocks is an input block receiving input data, at least one block of the plurality of blocks is an output block generating output data, and each of the plurality of blocks comprising internal intermediate data for transforming the input data into the output data; splitting the internal intermediate data into state data and non-state data, the state data depending on previous internal intermediate data and the non-state data not depending on previous internal intermediate data; and putting the non-state data and at least a part of the state data in a protected buffering module being part of the data memory, the protected buffering module provided with a module for error detection and correction, so that they are available for mitigating the effect of faults on the functional system behavior on-line while meeting the at least one guaranteed constraint.