Patent ID: 8423329

Claim:
A method of determining a set of circuit parameters, the method comprising: determining a range of sizes for a clamp transistor and selecting a set of clamp transistors each having a size within the determined range of sizes; for each clamp transistor in the set of clamp transistors: executing a first simulation to generate a first contour graph representing current data over a range of statistical values, the first contour graph identifying a read disturbance area and a design range of a gate voltage of the clamp transistor and a load of the clamp transistor; executing a second simulation to generate a second contour graph representing a sense margin over a range of statistical values of the gate voltage of the clamp transistor and the load of the clamp transistor; selecting a first sense margin based on the second contour graph and that satisfies the design range of the first contour graph; and determining a second sense margin corresponding to a selected clamp transistor in the set of clamp transistors and selecting a corresponding gate voltage and a corresponding load of the selected clamp transistor based on the second sense margin.