Patent ID: 7724013

Claim:
An on-chip self test circuit implemented on the same chip as a test semiconductor device, the on-chip self test circuit comprising: a test load block configured to receive a test target signal; and a self test block configured to (i) receive, at an output of the test load block, a test target signal passing though the test load block, (ii) receive, at an input of an output driver, a test target signal inputted to the output driver, (iii) compare the test target signal passing through the test load block with the test target signal inputted to the output driver, and (iv) based on a comparison result, determine whether a difference between the test target signal passing through the test load block and the test target signal inputted to the output driver is within an allowable range; wherein the self test block is also configured to receive a data strobe signal to be inputted to a data strobe driver.