Patent ID: 7937258

Claim:
A method for mapping a source memory system into a destination memory system, the source memory system having a source address space with a source memory depth and a source data width, the destination memory system comprising a plurality of destination memory blocks within a destination address space, the destination address space having a destination memory depth and a destination data width that is equal to a predetermined positive integer power of two, the source address space being less than the destination address space, the method comprising: partitioning the source address space across the source data width into a plurality of source memory portions, each source memory portion having a portion data width being equal to a preselected positive integer power of two and being less than the destination data width; dividing each of the source memory portions across the source memory depth into a preselected number of uniform source memory blocks each having a block width equal to an associated portion data width, said preselected number of the source memory blocks being equal to a positive integer power of two such that each of the source memory blocks for a selected source memory portion has a block depth equal to a positive integer quotient of the source memory depth divided by said preselected number of the source memory blocks for the selected source memory portion; and mapping each of the source memory blocks of the source memory portions onto each of the plurality of destination memory blocks across the destination address space of the destination memory system in a contiguous manner, wherein said partitioning the source address space, said dividing each of the source memory portions, and said mapping the source memory blocks are implemented via a processor-based system, wherein said dividing each of the source memory portions comprises dividing each of the source memory portions into a different preselected number of the uniform source memory blocks, wherein the destination data width is a positive integer power of two, and wherein said dividing each of the source memory portions includes determining said preselected number of the source memory blocks for the selected source memory portion as a positive integer quotient of the destination data width divided by the portion data width associated with the selected source memory portion.