Patent ID: 6998332

Claim:
A method of simultaneously forming different sized gate conductors on the same substrate, said method comprising: forming a conductive layer on a substrate; patterning sacrificial structures above said conductive layer; forming sidewall spacers adjacent said sacrificial structures using a spacer material capable of undergoing dimensional change; removing said sacrificial structures in processing that leaves said sidewall spacers in place; protecting selected ones of said sidewall spacers using a sacrificial mask and leaving others of said sidewall spacers unprotected; exposing unprotected sidewall spacers to processing that changes the size of said unprotected sidewall spacers, after which said unprotected sidewall spacers have a different size than protected sidewall spacers; removing said sacrificial mask; and patterning said conductive layer using said sidewall spacers as a gate conductor mask to simultaneously create differently sized gate conductors on said substrate.