Patent ID: 7319420

Claim:
A cascade-type variable-order delta-sigma modulator comprising: first to n th stages of delta-sigma modulating type quantization loops, wherein n is an integer greater than or equal to 2, connected in a cascade configuration, each quantization loop quantizing a signal inputted thereto, outputting the quantization result, and feeding the quantization result to itself as a feedback signal, and a noise rejecting circuit configured to receive respective output signals from the first to n th stages of quantization loops and a control signal, and to reject a quantization noise of the first stage of quantization loop, the noise rejecting circuit comprising (n−1) first selectors for activating and de-activating the respective output signals of the second and succeeding stages of the quantization loops in compliance with the control signal, wherein the noise rejecting circuit comprises: (n−1) differentiators provided at respective output terminals of the (n−1) first selectors, respectively differentiating output signals of the (n−1) first selectors; and (n−1) adders for summing signal levels of output signals of the (n−1) differentiators and a signal level of an output signal of the first stage of the quantization loop.