Patent ID: 7215173

Claim:
An apparatus comprising two parallel stacks of transistors, coupled between two voltage sources, to receive a differential voltage input signal and generate a differential voltage output signal, wherein the two parallel stacks include a first stack of transistors includes a first transistor coupled to a first voltage source and receiving a first leg of a differential voltage input signal and a second transistor coupled to a second voltage source and receiving a second leg of the differential voltage input signal, wherein the first stack generates a first leg of a differential voltage output signal; and a second stack of transistors including a third transistor coupled to the first voltage source and receiving the second leg of the differential voltage input signal and a fourth transistor coupled to the second voltage source and receiving the first leg of the differential voltage input signal, wherein the second stack generates a second leg of the differential voltage output signal, wherein the differential voltage output is a shifted down version of the differential voltage input signal and has substantially same swing as the differential voltage input signal, wherein the down shift is at least a threshold voltage associated with the transistors, wherein the first leg of the differential voltage output signal is the first leg of the differential voltage input signal minus at least the threshold voltage of the first transistor and the second leg of the differential output voltage signal is the second leg of the differential input signal minus at least the threshold voltage of the third transistor, and wherein the differential voltage output signal is shifted further downward based on ratio of widths of the second and the fourth transistors to the first and the third transistors respectively.