Patent ID: 6870209

Claim:
A pixel circuit, comprising: a P − silicon substrate; an N − well formed in said P − silicon substrate, wherein the junction said N − well and said P − silicon substrate forms a PN junction which can accumulate signal-generated charge; a first P + region and a second P + region formed in paid N − well; a PMOS transistor having a source, a drain, a channel, and a gate formed in said N − well, wherein said first P + region forms said source, second P + region forms said drain, and that part of said N − well between said first P + and said second P + region forms said channel of said PMOS transistor; a gate oxide formed over said channel of said PMOS transistor; and an electrode formed on said gate oxide over said channel of said PMOS transistor, wherein said electrode forms said gate of said PMOS transistor.