Patent ID: 7352749

Claim:
A device for checking numbers comprising a multiplexer having a first multiplexer input for receiving a checked number, a second multiplexer input and a multiplexer output; a controller module linked to the multiplexer and having a controller module output, a first controlling input, a second controlling input; a register for temporary storing a temporary number sent by the multiplexer, the register linked to the controller module and being an element of storage and having a register output and a register input connected to the multiplexer output; a memory for storing information related to ranges of incoming PID numbers, the memory having a storage output and a storage input connected to the controller module output; and an adder having an adder output, a first adder input connected to the register output and a second adder input connected to the storage output wherein the adder adds the number stored in the register and a number written in the memory at an address indicated by the controller module and sends a result of adding to the second multiplexer input and generates at a carry-out on the adder output a carry-out signal informing about carry-out and being passed to the first controlling input of the controller module and causing modification of the checked number sent to the first multiplexer input when the checked number is within a checked range belonging to the ranges of incoming PID numbers.