Patent ID: 8280937

Claim:
A logic circuit comprising: an encoder ( 20 ) for converting a first index (X) to a second index (Y); and a look-up table circuit (LUT) ( 30 ) arranged to provide an output based on a value stored in the LUT when the second index (Y) is applied to it; wherein the LUT ( 30 ) is a sparse-coded LUT having dummy values that increases a repeat length of values stored in the LUT up to a binary length; wherein the values stored in the LUT ( 30 ) include a coefficient corresponding to each index, the coefficients repeating, or part repeating, after a series of rows having said repeat length; wherein there is further provided a shift value in association with each index, the shift values being the same for all the rows in said series of rows but increasing at each repetition of the series of rows; wherein the index value, the coefficients and the shift values are integers, the shift values being altered by one or more after each series of coefficients; and wherein the encoder circuitry ( 20 ) contains logic for converting the first index (X) to the second index (Y) such that the dummy values are skipped when the second index is applied to the LUT.