Patent ID: 8404565

Claim:
A manufacturing method of a surface-mounting type diode co-constructed from a silicon wafer and a base plate, a diffused wafer is stacked with a high temperature durable high strength base plate to have them sintered as well as melted together for connecting with each other, so that said diffused wafer and said base plate form a co-constructure; said diffused wafer is processed on its surface by etching to make a plurality of ditches separated from one another, in order that said diffused wafer has formed thereon a plurality of electrodes separated from one another and all on a plane; said ditches separated with one another on said diffused wafer are filled therein with insulation material, in order that said electrodes separated with one another and provided on said same plane are mutually insulated and separated; said surface of said electrodes of said diffused wafer are metalized to make extension of electric conductive character of said wafer to said electrodes, and production of all functional lines are completed; said co-constructure formed from said diffused wafer and said base plate is cut to form a plurality of separated devices, surface of each of said devices has two electrodes provided on said same plane and mutually insulated and separated, such that each said individual forms a surface-mounting type diode to be applied straight; said diffused wafer is a two surface diffused type, said two electrodes which are provided on said same plane and mutually insulated and separated are arranged in PPNNPP . . . , during processing of said third step, insulating material is not filled in ditches between N/N, and after said ditches between N/N and surfaces of said P, N type electrodes are metalized simultaneously in said fourth step, before cutting in said fifth step, said ditches between N/N are filled therein with insulating material, and after cutting of said fifth step, a plurality of surface-mounting type diodes are obtained, and a surface of each surface-mounting type diode has two P/N electrodes provided on said same plane and mutually insulated and separated.