Patent ID: 7554777

Claim:
A power supply control apparatus, comprising: a first power supply terminal and a second power supply terminal between which a power voltage is supplied; a control circuit coupled between the first power supply terminal and the second power supply terminal and producing a control signal, the control circuit being formed in a semiconductor substrate as a CMOS circuit; a power device turned on and off in response to the control signal to control a power supply to a load; and a depletion type MOS transistor inserted between the control circuit and the first power supply terminal, the depletion type MOS transistor being formed in a well region that is selectively formed in the semiconductor substrate, the depletion type MOS transistor having a source region and a drain region selectively formed in the well region and a gate electrode formed on a gate insulating film covering a channel region between the source and drain regions, one of the source region and drain region, the well region and the gate electrode being connected to the first power supply terminal and the other of the source and drain regions being connected to the semiconductor substrate and the control circuit, wherein the depletion type MOS transistor representing a first resistance characteristic when the power supply is connected between the first and second power supply terminals in a forward-connected state and a constant current characteristic when the power supply is connected between the first and second power supply terminals in a reverse-connected state, thereby providing a second resistance characteristic.