Patent ID: 8476751

Claim:
A stacked semiconductor package comprising: a semiconductor package module including a plurality of semiconductor packages each of which has a first surface, a second surface facing away from the first surface, side surfaces connecting the first surface and the second surface and through-holes formed on the side surfaces to pass through the first surface and the second surface and which are stacked such that their through-holes vertically connect with one another, and adhesive members which are formed between the semiconductor packages and attach the semiconductor packages to one another, wherein the adhesive members are formed to partially cover cross-sections of the through-holes which are open on the first surface and the second surface of the semiconductor packages; a main substrate supporting the semiconductor package module and formed, on a third surface thereof facing the semiconductor package module, with main connection pads which are aligned with the through-holes; and conductive connection members formed in the through-holes and electrically connecting the semiconductor packages with the main connection pads.