Patent ID: 7167956

Claim:
A method for avoiding inconsistencies between multiple translators in an object-addressed memory hierarchy in a computer system, wherein the object-addressed memory hierarchy supports referencing object cache lines in an object cache based on an object identifier instead of a physical address, the method comprising: receiving a read-to-share (RTS) signal for an object cache line, wherein the RTS signal is received from a requesting processor as part of a cache-coherence operation; and if no processor owns the object cache line, causing the requesting processor to become owner of the object cache line instead of merely holding a copy of the object cache line in a shared state, and performing a translation for the object cache line in a translator associated with the requesting processor, wherein the translation maps an object identifier and a corresponding offset to a physical address for the object cache line and reconstructs contents of the object cache line by reading from memory at the physical address; whereby if the requesting processor owns the object cache line, a subsequent processor that requests the same object cache line will receive the object cache line from the requesting processor, and will not perform an additional translation for the object cache line, thereby ensuring that multiple translators will not generate inconsistent translations for the same object cache line.