Patent ID: 6990326

Claim:
An image suppression filter circuit comprising: a first phase shifter which receives an inphase input signal, and outputs a first output signal and a second output signal having a phase component substantially orthogonal to the first output signal; a second phase shifter which receives a quadrature input signal having a phase component substantially orthogonal to the inphase input signal, and outputs a third output signal and a fourth output signal having a phase component orthogonal to the third output signal; a first subtracter which subtracts the fourth output signal from the first output signal, and outputs a subtraction signal; a first adder which adds the second output signal and the third output signal, and outputs an addition signal; a third phase shifter which receives the subtraction signal, and outputs a fifth output signal and a sixth output signal having a phase component orthogonal to the fifth output signal; a fourth phase shifter which receives the addition signal, and outputs a seventh output signal and an eighth output signal having a phase component orthogonal to the seventh output signal; a second subtracter which subtracts the eighth output signal from the fifth output signal, and outputs a subtraction result as an inphase output signal; and a second adder which adds the sixth output signal and the seventh output signal, and outputs an addition result as a quadrature output signal.