Patent ID: 8713242

Claim:
A control method, adapted to a flash memory device, the flash memory device comprising a first memory module and a second memory module, and the control method comprising: dividing a plurality of physical blocks of the first memory module into a plurality of groups, and dividing a plurality of physical blocks of the second memory module into a plurality of groups, wherein each of the groups of the first memory module has a plurality of the physical blocks of the first memory and each of the groups of the second memory has a plurality of the physical blocks of the second memory; writing a first subunit of a first allocation unit into a first group of the groups of the first memory module, and writing a second subunit of the first allocation unit into a second group of the groups of the second memory module, wherein the first subunit of the first allocation unit and the second subunit of the first allocation unit are interleavingly written into the first group and the second group; and sequentially writing a third subunit and a fourth subunit of the first allocation unit into the first group.