Patent ID: 8400206

Claim:
A level shifter circuit operable with a low voltage input, said level shifter circuit comprising: first and second pull-down switches configured to receive said low voltage input as respective non-inverted and inverted control voltages; first and second pull-up switches coupled between respective said first and second pull-down switches and an output supply voltage of said level shifter circuit; an inverter coupled to said second pull-down switch; and a pull-up boost switching stage coupled to a node between said first pull-up switch and said first pull-down switch, said pull-up boost switching stage configured to turn ON in response to said second pull-down switch turning ON, and to turn OFF before said first pull-up switch turns OFF, said pull-up boost switching stage further configured to turn ON along with said first pull-up switch, said pull-up boost switching stage comprising a transistor having a drain and a gate tied to said node.