Patent ID: 7605027

Claim:
A method for fabricating a bipolar transistor, the method comprising: providing a stack of layers on a semiconductor substrate, the stack of layers comprising a first isolation layer on the semiconductor substrate, a first semiconductor layer on the first isolation layer, a second isolation layer on the first semiconductor layer, and a second semiconductor layer on the second isolation layer, forming a first trench and a second trench in the stack of layers and in a portion of the semiconductor substrate, wherein the first trench and the second trench are separated by a protrusion which comprises a portion of the stack of layers and a first portion of the semiconductor substrate, removing the first portion of the semiconductor substrate, thereby creating an underpass region between the first trench and the second trench, in which the underpass region exposes a portion of the semiconductor substrate, forming a collector region on the exposed portions of the semiconductor substrate and a sealing region on the exposed portions of the first semiconductor layer and the second semiconductor layer, both regions comprising a semiconductor material, wherein the collector region fills the underpass region and the sealing region seals the second trench, forming a base region extending over a portion of the collector region in the first trench, forming spacers in the first trench, thereby forming an exposed portion of the collector region in the first trench, and forming an emitter region on the exposed portion of the collector region in the first trench.