Patent ID: 7355432

Claim:
A buffer circuit for outputting an output signal corresponding to an input signal, comprising: an input/output circuit for maintaining an output impedance at a constant level, and outputting the output signal having an output voltage which is substantially same as an input voltage of the input signal; a first transistor and a second transistor that are connected to respective ends of the input/output circuit in series, the first and second transistors protecting the input/output circuit by reducing power consumption of the input/output circuit in such a manner as to supply voltages that correspond to the input voltage or the output voltage in terms of level, to the respective ends of the input/output circuit; and a first control circuit for (i) when the input voltage is smaller than a first reference level, supplying a predetermined constant voltage to the first transistor as a base voltage thereof, and (ii) when the input voltage is equal to or larger than the first reference level, supplying a voltage that is obtained by decreasing the input voltage by a first predetermined voltage to the first transistor as the base voltage, the decreased voltage being larger than the predetermined constant voltage.