Patent ID: 7930577

Claim:
A circuit arrangement for controlling performance of an integrated circuit in response to a monitored performance indicator, said circuit arrangement comprising: a performance control unit configured to receive said performance indicator and configured to independently control power supply to electrically isolated circuit regions of said integrated circuit based on said performance indicator; and a monitoring unit configured to check at least a noise level of the controlled power supply, and signal a respective control signal to said performance control means if the checking result is not within a predetermined range, wherein said monitoring unit comprises a power-supply-noise monitor unit configured to check if the noise on the power supply voltage exceeds a predetermined maximum value, wherein said performance control unit is coupled to a voltage control unit configured to control said power supply, wherein said voltage control unit comprises a variable resistor unit and having at least two isolated circuit regions, further comprising a shift register unit coupled to said variable resistor unit and to a clock generator unit configured to supply an adjusted clock signal to said isolated circuit regions wherein said shift register unit is configured to be controlled based on a binary control signal supplied from said performance control unit and wherein said binary control signal defines a binary value shifted into said shift register unit so as to either increase or decrease the performance of said integrated circuit.