Patent ID: 6845477

Claim:
A semiconductor test device for conducting an operation test on a test target wafer having a plurality of first chips, comprising: a first wafer contactor allowing simultaneous and electrical coupling to each of said plurality of first chips; and a plurality of test circuits provided corresponding to said plurality of first chip, respectively, and each conducting said operation test on a corresponding one of said plurality of first chips, each of said test circuits transmitting and receiving at least a portion of a signal group for performing said operation test through said first wafer contactor to and from said corresponding one of said plurality of first chips; wherein each of said first chips includes: a plurality of pads for inputting and outputting electrical signals, and a plurality of memory mats operating in accordance with a plurality of independent address signals, respectively; each of said memory mats has a plurality of memory cells; each of said test circuits includes: a test pattern generating portion for generating a test signal supplied to said plurality of memory mats for conducting said operation test, and a plurality of redundant repair determining portions provided corresponding to said plurality of memory mats, respectively; each of said redundant repair determining portions detects a defective memory cell in said plurality of memory cells based on test data issued from a corresponding one of said plurality of memory mats in response to said test signal; said semiconductor test device further comprises a test board allowing electrical coupling to said first wafer contactor; said test board has a plurality of board terminals allowing simultaneous and electrical coupling to said plurality of pads via said first wafer contactor; each of said redundant repair determining portions is arranged on said test board for connection to at least one of said plurality of board terminals; and said test pattern generating portion is internally arranged in said corresponding one of said plurality of first chips.