Patent ID: 7825463

Claim:
A semiconductor device having a silicon substrate having an active region having a pair of gate forming areas, a drain forming area between the gate forming areas, and source forming areas outside the gate forming areas, the semiconductor device comprising: an asymmetric bulb-type recess gate formed in each gate forming area of the active region, a portion of the asymmetric bulb-type recess gate being recessed within the active region and the portion including an upper recessed part, a lower recessed part, and a middle recessed part between the upper and lower recessed parts, wherein a surface of the upper recessed part nearest the drain forming region and a surface of the middle recessed part nearest the drain forming region are coplanar, and a surface of the upper recessed part nearest the source forming region extends closer to the source forming region than a surface of the middle recessed part nearest the source forming region, and wherein the lower recessed part of the asymmetric bulb-type recess gate is bent toward the source forming area of the active region such that each of the upper recessed part and the lower recessed part have a width greater than that of the middle recessed part; a source area formed on a portion of the substrate surface in the source forming area; and a drain area formed on a portion of the substrate surface in the drain forming area.