Patent ID: 8153186

Claim:
A method for manufacturing a packaging board adapted to mount an electronic device, the method comprising: a process of forming a first metal layer on a substrate; a process of forming a wiring having an electrode region, a wiring region and a boundary region provided between the electrode region and the wiring region, by patterning the first metal layer; a process of forming a second metal layer on a surface of the wiring and the substrate; a process of forming a mask on the substrate in a manner such that the second metal layer is partially exposed on the electrode region, the boundary region and a predetermined region in the periphery of the electrode region and the boundary region; a process of making a surface of the boundary region lower than that of the wiring region, using the first mask, by removing the wiring layer corresponding to the electrode region and the boundary region after selectively removing the second metal layer in the electrode region, the boundary region and the predetermined region in the periphery of the electrode region and the boundary region by use of the first mask; a process of removing the first mask; a process of forming a second mask on the substrate in a manner such that the wiring in the electrode region and the substrate in a predetermined region in the periphery of the electrode region are exposed; a process of forming a gold plating layer in the electrode region with the second metal layer used as a lead; a process of removing the second mask and the second metal layer; and a process of covering part of the electrode region and the wiring layer in the boundary region and the wiring region with an insulating layer.