Patent ID: 7696553

Claim:
A semiconductor storage device comprising: a memory cell for storing information that includes a selection MISFET and a capacitor, the capacitor being formed in a hole formed in an insulating layer and including a cup-like lower electrode, an upper electrode, and a capacitor insulating layer disposed between the lower electrode and the upper electrode, the cup-like lower electrode having, on a side of the capacitor insulating layer, an upper edge and an innermost surface extended from the upper edge; wherein the cup-like lower electrode has a multilayer structure including: a first sublayer; and a second sublayer overlying the first sublayer to define the innermost surface and at least a part of the upper edge of the cup-like lower electrode, the innermost surface and at least a part of the upper edge of the cup-like lower electrode defined by the second sublayer being in direct contact with the capacitor insulating layer, the second sublayer having a higher nitrogen content than the first sublayer; and wherein the upper edge of the cup-like lower electrode forms an angle of 45° or less with an internal wall of the hole.