Patent ID: 7505295

Claim:
A content addressable memory (CAM) device having multiple write modes, the CAM device comprising: a CAM array including a plurality of CAM cells and word lines coupled to respective rows of the CAM cells; a configuration circuit to output a multi-row write signal in either a first state or a second state according to whether a mode value programmed within the configuration circuit indicates a multi-row write mode or a single-row write mode; and an address circuit coupled to the CAM array, wherein the address circuit comprises a control input to receive the multi-row write signal and wherein the address circuit is configured to activate a plurality of the word lines simultaneously to enable a write value to be stored within a selected plurality of the rows of CAM cells if the multi-row write signal is in the first state and is configured to activate only one of the word lines to enable the write value to be stored within a selected one of the rows of the CAM cells if the multi-row write signal is in the second state.