Patent ID: 8753959

Claim:
A method for preparing a semiconductor wafer into individual semiconductor circuits, the wafer having a plurality of circuits on the top side of the wafer, the method comprising the steps of: (1) applying a tape onto the back side of the wafer; (2) forming dicing grooves or via holes into the top side of the wafer between adjacent circuits to a final target depth, or slightly deeper, for the wafer; (3) removing the tape from the back side of the wafer and applying a tape onto the top side of the wafer; (4) thinning the wafer by removing material from the back side of the wafer (5) applying an adhesive coating to the back side of the circuits; (6) B-stage curing the adhesive either thermally or photochemically; (7) removing the tape from the top side of the wafer and applying a tape onto the adhesive coating.