Patent ID: 7477109

Claim:
An apparatus comprising: (1) an amplification stage comprising a first input, a second input, a first output, and a second output; (2) a feedback network comprising an input, a first output, and a second output; wherein said first input of said amplification stage is also said input of said feedback network; and wherein said second input of said amplification stage is said second output of said feedback network; (3) a transimpedance stage comprising a signal input, a bias input, and an output; wherein said bias input of transimpedance stage is based on first output of said feedback network; wherein said first input of said amplification stage is based on said output of said transimpedance stage; and wherein said input of said feedback network is based on said output of said transimpedance stage; wherein said transimpedance stage comprises: (a) a first transistor comprising a gate, a drain, a source, and (b) a second transistor comprising a gate, a drain, and a source; wherein said gate of said first transistor is electrically connected to said signal input of said transimpedance stage; wherein said gate of said second transistor is electrically connected to said bias input of said transimpedance stage; wherein said source of said first transistor is electrically connected to a common voltage; wherein said source of said second transistor is electrically connected to a common voltage; and wherein said gate of said first transistor is electrically connected to said drain of said second transistor.