Patent ID: 6954816

Claim:
A peripheral device for use in a system including a storage unit coupled to a local bus, comprising: a shared bus interface, coupled to the local bus, for interfacing with the storage unit and a host system through the local bus; and core logic, coupled to the shared bus interface, for causing the local bus to enter at least a nominal wait state when receiving, through the local bus, a read/write command with respect to the storage unit, and performing a corresponding data transfer between the peripheral device and the storage unit through the shared bus interface during the nominal wait state; wherein the shared bus interface is an enhanced PCI interface comprising a PCI bus interface compliant with the Peripheral Component Interconnect (PCI) specification, in which the PCI bus interface is configured to interface with the local bus correspondingly; and wherein the core logic deasserts a target ready signal of the PCI bus interface to cause the local bus to enter the wait state.