Patent ID: 8497178

Claim:
A method for making a semiconductor device, comprising: forming on a first semiconductor layer a second semiconductor layer having a valence band edge energy value smaller than a valence band edge energy value of the first semiconductor layer and a mobility larger than a mobility of the first semiconductor layer, forming on the second semiconductor layer a third semiconductor having a valence band edge energy larger than the valence band edge energy of the second semiconductor layer, forming a semiconductor laminated structure by forming an insulating layer on the third semiconductor layer, the semiconductor laminated structure including negative fixed charges introduced into and near an interface between the third semiconductor layer and the insulating layer, neutralizing the negative fixed charges by introducing positive fixed charges into and near the interface between the third semiconductor layer and the insulating layer, and controlling a threshold voltage of a MOS transistor on the third semiconductor by introduction of positive fixed charges introduced into and near an interface between the first semiconductor layer and the second semiconductor layer, introduction of negative fixed charges into and near an interface between the second semiconductor layer and the third semiconductor layer and introduction of negative fixed charges into and near the interface between the third semiconductor layer and the insulating layer.