Patent ID: 8542532

Claim:
A memory access method, applied in a memory controller for accessing an NAND memory array, in which memory cells are arranged into a plurality of streams, which are globally controlled with a string select signal, the memory access method comprising: providing a stream bias signal on a selected stream among the plurality of streams and providing a selected word line signal on a selected cell of the selected stream, in a setup phase; providing a plurality of unselected word line signals on the rest of memory cells, to have the rest of memory cells turned on as pass transistors, in the setup phase; providing a discharge path connected to the plurality of streams to accordingly eliminate coupling charge presented on at least an unselected stream among the plurality of streams, in the setup phase; and enabling the string select signal to have the selected stream connected to a sense unit via a metal bit line and according read the selected cell in a voltage sensing scheme, in a read phase, which does not overlap with the setup phase.