Patent ID: 6862220

Claim:
A semiconductor device comprising: a nonvolatile memory unit including a plurality of rewritable nonvolatile memory cells; a variable logic unit including a plurality of storage cells; and a write permission circuit, wherein logical functions of the variable logic unit are determined in accordance with logic constitution definition data to be loaded into the plurality of storage cells, wherein each of said nonvolatile memory cells has a first MOS transistor for storing data and a second MOS transistor for selecting the first transistor, wherein a first gate electrode of the first MOS transistor and a second gate electrode of the second MOS transistor are provided over a first region between a first impurity region and a second impurity region, wherein the first region has no common impurity region for the first and second MOS transistor, wherein a gate breaks down immunity voltage of the second MOS transistor is lower than a gate breaks down immunity voltage of the first MOS transistor, and wherein the write permission circuit limits to write the logic constitution definition data from outside of the semiconductor device.