Patent ID: 7767537

Claim:
A method of simultaneously fabricating merged trenches and spaced apart trenches extending downwardly into a single-crystal semiconductor substrate from a major surface of the substrate, said major surface defining a plane aligned with a given crystal orientation of said semiconductor substrate, comprising: patterning first spaced apart openings and second spaced apart openings in a mask layer overlying the substrate, each of said first and second openings having a given length, given width and a center spaced a distance X from a center of a next adjacent one of said first and second openings, said centers of said first openings being aligned with a first crystal orientation of said substrate and said centers of said second openings being aligned with a second crystal orientation of said substrate that is different from the first crystal orientation; and simultaneously etching said substrate in accordance with said first and second openings to define merged first trenches collectively defining a single interior volume and spaced apart second trenches each defining a respective separate interior volume.