Patent ID: 7179717

Claim:
A method of forming an integrated circuit device, comprising: forming and patterning a hard mask layer overlying a semiconductor substrate, the patterned hard mask layer exposing two or more areas of the substrate for future isolation regions of the integrated circuit device; removing portions of the substrate in the areas for future isolation regions, thereby forming two or more trenches; forming a second mask layer overlying a first portion of the hard mask layer and at least one first trench, leaving a second portion of the hard mask layer and at least a portion of at least one second trench uncovered; removing additional substrate material from the uncovered portion of the at least one second trench so that the uncovered portion of the at least one second trench is deeper than the at least one first trench; and recessing a portion of the second portion of the hard mask layer in a direction generally parallel to an upper surface of the substrate using an isotropic dry etch while the second mask layer overlies the first portion of the hard mask layer and the at least one first trench.