Patent ID: 7609079

Claim:
A method of leakage testing a CMOS driver, comprising: a) connecting a bias voltage to a driver portion of a CMOS chip output driver connected to an output pad of said chip; b) controlling off said driver portion; c) closing a switch circuit coupling said chip pad to a test bus; d) coupling a leakage current from said driver portion to a current comparator connected to said test bus; e) comparing said leakage current to a reference current in a current comparator; f) coupling results of said current comparator to a test result output mechanism; g) opening said switch circuit; h) continuing to a next said output pad and step c) until said driver portion of all said output pads are tested, then disconnect said bias voltage; and i) continuing to said next said driver portion of the chip output drivers, connecting said bias voltage to the next driver portion and returning to step b) until all said next driver portions are tested, then end.