Patent ID: 8272120

Claim:
An apparatus for soldering a semiconductor chip to a substrate comprising: (a) an arrangement of supply spools for supplying a plurality of apertured decals, said plurality of apertured decals including an upper layer having upper alignment holes and upper tapered feature holes, a center layer having arrays of center through feature holes in alignment with said upper tapered feature holes and in alignment with lower through feature holes in a bottom layer located on an opposite side of said center layer; a plurality of perforations extending through said center layer defining specific areas encompassing said arrays of center feature holes; and center alignment holes in said center layer in alignment with lower alignment holes in said bottom layer; (b) a carrier stage having the substrate located thereon being located beneath said bottom layer, said carrier having upstanding pin numbers extending through the upper alignment holes, center alignment holes, and lower alignment holes; (c) an injection molder for filling the upper tapered feature holes, said center feature holes, and said lower feature holes with solder; (d) a device for separating said upper layer and said bottom layer from said center layer and for applying an adhesive layer to the exposed surfaces of said center layer having solder portions projecting from the center layer; (e) a device for positioning said semiconductor chips on at least the exposed upper surface of said center layer in alignment with the areas defined by said plurality of perforations and in contact with said adhesive layer and said solder portions protecting from the center layer; and (f) a separating structure for detaching said semiconductor chips with the center layer filled with solder along the plurality of perforations from a remainder of said center layer.