Patent ID: 7391122

Claim:
A programmable logic device implemented in an integrated circuit having interconnection elements for coupling with a package substrate, the integrated circuit comprising: a two-dimensional array of programmable logic array blocks that are interconnected by a network of column and row signal lines; a first set of interconnection elements, each having a functional assignment, wherein at least two of the interconnection elements have different functional assignments; and a second set of interconnection elements, each having a functional assignment, the first and second set of interconnection elements having a same number and arrangement of interconnection elements, wherein each interconnection element of the first set has a same functional assignment as the corresponding interconnection element of the second set, wherein the integrated circuit has more functional circuit elements as compared to a reference integrated circuit, wherein the first set of interconnection elements are disposed within an interior area of the integrated circuit that matches a size and shape of the reference integrated circuit, and wherein the second set of interconnection elements are disposed on the integrated circuit outside of the interior area.