Patent ID: 8344805

Claim:
A high-frequency differential amplifier circuit, comprising: a first MOS transistor and a second MOS transistor each having a source connected to a first power source and a drain connected through loads to a second power source, the first and second MOS transistors receiving, at their gates, first and second input signals having phases reverse to each other; a first positive feedback element configured to include two first capacitors, a first variable resistance, a first load and a second load, and connected between the gate of the first MOS transistor and the drain of the second MOS transistor, the first variable resistance being an NMOS transistor and arranged between the two first capacitors, one ends of the first and second loads being connected to both terminals of the first variable resistance, and the other ends of the first and second loads being connected to the first power source; and a second positive feedback element configured to include two second capacitors, a second variable resistance, a third load and a fourth load, and connected between the gate of the second MOS transistor and the drain of the first MOS transistor, the second variable resistance being an NMOS transistor and arranged between the two second capacitors, one ends of the third and fourth loads being connected to both terminals of the second variable resistance, and the other ends of the third and fourth loads being connected to the first power source.