Patent ID: 7057207

Claim:
A thin film transistor array, comprising: a substrate; a plurality of scan lines, disposed over the substrate; a plurality of data lines, disposed over the substrate, wherein the substrate is defined into a plurality of pixel areas by the scan lines and the data lines; a plurality of thin film transistors, connected with the scan lines and the data lines, wherein each thin film transistor is disposed in one of the pixel areas correspondingly; and a plurality of pixel electrodes, wherein each pixel electrode is disposed in one of the pixel areas and is electrically connected to one of the thin film transistors correspondingly, a storage capacitor is formed between a portion of each pixel electrode located above one of the scan lines and the scan lines, and one of the scan lines and a defect pixel electrode of the pixel electrodes have a particle or a defect therebetween wherein the defect pixel electrode further comprises an opening corresponding to the particle or the defect.