Patent ID: 7804692

Claim:
A high-speed system, comprising: a printed circuit board, a first load with a first signal pin and a first power pin on a first side of the printed circuit board, a second load with a second signal pin and a second power pin on a second side of the printed circuit board, a driver coupled to a trace, wherein the first load and the second load are positioned such that the first signal pin is vertically aligned to the second signal pin with an offset, wherein the offset is substantially shorter than the length of the first load, wherein a through via connects a terminating end of the trace at the middle of the through via, the first signal pin on one end of the through via, and the second signal pin on the other end of the through via, wherein the through via is disposed neither directly underneath the first load nor directly underneath the second load, wherein the offset corresponds to a sum of a first distance between the first signal pin and the through via and a second distance between the second signal pin and the through via, wherein a first trace on surface of the first side of the printed circuit board that traverses the first distance couples the first signal pin to the one end of the through via, and wherein a second trace on surface of the second side of the printed circuit board that traverses the second distance couples the second signal pin to the other end of the through via; a first decoupling capacitor on the second side of the printed circuit board is directly connected to the first power pin; and a second decoupling capacitor on the first side of the printed circuit board is directly connected to the second power pin.