Patent ID: 8034712

Claim:
A method of fabricating a dual damascene structure, comprising: providing a substrate having a conductive layer and a liner layer thereon; forming a dielectric layer on the liner layer; forming a metal hard mask layer on the dielectric layer; forming an antireflection layer on the metal hard mask layer; patterning the antireflection layer, the metal hard mask layer and the dielectric layer to form, in the dielectric layer, a via hole that exposes a portion of the liner layer; filling in the via hole a gap-filling layer and conducting an etching-back process to remove a portion of the gap-filling layer, such that a remaining gap-filling layer has a height of ¼ to ½ of a depth of the via hole patterning the antireflection layer, the metal hard mask layer and the dielectric layer to form a trench connected with the via hole; removing the remaining gap-filling layer; removing the liner layer in the via hole with the dielectric layer as a mask; forming a metal layer filling in the trench and the via hole; and removing the antireflection layer and the metal hard mask layer.