Patent ID: 7669159

Claim:
An integrated circuit ( 6 ) (IC) including at least one layer having a first electrical structure ( 10 , 12 , 14 ) non-orthogonally angled relative to a second electrical structure ( 16 ), the IC comprising: a first tile pattern ( 32 ) in the at least one layer having a first tile orientation oriented substantially parallel to the first electrical structure; and a second tile pattern ( 34 ) in the at least one layer having a second tile orientation oriented substantially parallel to the second electrical structure, wherein the first tile orientation is different from the second tile orientation; wherein the first tile pattern ( 32 ) comprises a plurality of tiles having an edge oriented substantially parallel to the first electrical structure and the second tile pattern ( 34 ) comprises a plurality of tiles having an edge oriented substantially parallel to the second electrical structure and wherein the first electrical structure ( 10 , 12 , 14 ) is provided orthogonally relative to other structure ( 18 ) of the IC, and the second electrical structure ( 16 ) is provided non-orthogonally to other structure of the IC.