Patent ID: 7916516

Claim:
A nonvolatile memory apparatus comprising: a memory array including plural first electrode wires formed to extend in parallel with each other within a first plane; plural second electrode wires formed to extend in parallel with each other within a second plane parallel to the first plane and to three-dimensionally cross the plural first electrode wires; and nonvolatile memory elements respectively provided at three-dimensional cross positions between the plural first electrode wires and the plural second electrode wires; a first selecting device connected to the plural first electrode wires, for selecting the first electrode wires; and a current pulse application device which is connected to the first selecting device, for applying a current pulse having a predetermined current value to the nonvolatile memory element via the first selecting device; wherein each of the nonvolatile memory elements has a resistance variable layer whose resistance value changes reversibly in response to a current pulse supplied from the current pulse application device between a first electrode wire and a second electrode wire which are provided to correspond to a three-dimensional cross position of the each nonvolatile memory element, the nonvolatile memory apparatus further comprising: voltage clamp circuits provided within or outside the memory array so as to respectively correspond to the first electrode wires, the voltage clamp circuits being connected to the first electrode wires, for restricting a voltage applied to the first electrode wires to a predetermined upper limit value or less; wherein plural nonvolatile memory elements of the nonvolatile memory elements are connected to one first electrode wire connecting the first selecting device to an associated one of the voltage clamp circuits.