Patent ID: 7432758

Claim:
A voltage regulator in a semiconductor memory device, comprising: a comparing unit, for receiving a first signal and a first reference voltage to output an amplifying signal and a complementary amplifying signal; a first driver transistor, coupled to the comparing unit, having a first control terminal for receiving the amplifying signal, a first output terminal for coupling to a supply voltage, and a second output terminal for outputting an internal supply voltage; a feedback unit, coupled to the second output terminal of the first driver transistor, for receiving the internal supply voltage to generate the first signal proportional to the internal supply voltage and to output the first signal to the comparing unit; an auxiliary control unit, coupled to the comparing unit, for receiving the complementary amplifying signal for outputting a control voltage corresponding to the complementary amplifying signal; a first switch, coupled to the auxiliary control unit and to the supply voltage, for raising the control voltage up to the supply voltage; a second switch, coupled to the auxiliary control unit and coupled to a second reference voltage, for dropping the control voltage down to the second reference voltage, wherein the first switch and the second switch are turned on by a trigger signal when a bit line sensing operation is performed; and a second driver transistor, having a second control terminal coupled to the auxiliary control unit, a third output terminal coupled to the supply voltage, and a fourth output terminal coupled to the second output terminal of the first driver transistor for outputting the internal supply voltage.