Patent ID: 7314774

Claim:
A method of manufacturing a semiconductor device comprising steps of: forming a crystalline semiconductor island over an insulating surface; forming an insulating film over the crystalline semiconductor island; forming a first signal line over the insulating film, at least partly adjacent to the crystalline semiconductor island, forming a second signal line over the insulating film, at least partly adjacent to the crystalline semiconductor island; forming an interlayer insulating film covering the first signal line and the second signal line; forming a first contact hole in the interlayer insulating film; forming a second contact hole in the interlayer insulating film, over the first signal line; forming a third contact hole in the interlayer insulating film, over the second signal line; and forming a metal wiring line, wherein the metal wiring line is electrically connected to the first signal line via the second contact hole, and to the second signal line via the third contact hole, and wherein the metal wiring overlaps the crystalline semiconductor island at least partly.