Patent ID: 7902865

Claim:
A method of converting an uncompressed bitstream into a compressed bitstream, wherein the uncompressed bitstream comprises configuration data in a plurality of data frames to configure a programmable logic device (PLD), the method comprising: embedding a first data frame from the uncompressed bitstream into the compressed bitstream, wherein the first data frame comprises a first data set; embedding a first instruction into the compressed bitstream to instruct the PLD to load the first data frame into a data shift register; embedding a second instruction into the compressed bitstream to instruct the PLD to load a first address associated with the first data frame into an address shift register; embedding a third instruction into the compressed bitstream to instruct the PLD to load the first data frame from the data shift register into a first row of a configuration memory corresponding to the first address; identifying a second data frame in the uncompressed bitstream, wherein the second data frame comprises the first data set; and embedding fourth and fifth instructions into the compressed bitstream in place of the second data frame, wherein: the fourth instruction is configured to instruct the PLD to load a second address associated with the second data frame into the address shift register, and the fifth instruction is configured to instruct the PLD to load the first data frame from the data shift register into a second row of the configuration memory corresponding to the second address.