Patent ID: 6917257

Claim:
A high speed line equalizer apparatus comprising: (a) a first signal treating circuit coupled with an input locus for receiving an input signal; said input signal including a spectrum of component signals; said spectrum of component signals including high frequency component signals and low frequency component signals; said first signal treating circuit amplifying said high frequency component signals by a first gain to present amplified high frequency component signals; said first gain being established by a relationship between at least two impedance elements in said first signal treating circuit; (b) a second signal treating circuit coupled with said input locus for receiving said input signal; said second signal treating circuit amplifying said spectrum of component signals by a second gain to present amplified whole spectrum component signals; and (c) a combining circuit for receiving said amplified high frequency component signals and said amplified whole spectrum signals; said combining circuit using said amplified high frequency component signals and said amplified whole spectrum signals to present an output signal; said output signal being representative of said input signal.