Patent ID: 8279942

Claim:
An image data processing apparatus comprising: plural arithmetic processing sections that encode or decode image data in units of macroblocks, respectively; a main memory that accumulates and holds data used for processing of the plural arithmetic processing sections; and a cache memory of the plural arithmetic processing sections that hold part of the data held in the main memory, wherein slices of the image data are sequentially and cyclically assigned to the plural arithmetic processing sections and plural slices are set as objects of processing, respectively, the plural arithmetic processing sections process the data held in the cache memory and simultaneously encode or decode the image data in parallel in a sequence of processing macroblocks of the plural slices as the objects of processing in the order of raster scan to establish a consistent relationship of the processing of each slice with processing of the immediately preceding slice, and the consistent relationship is a relationship in which the current slice and the immediately preceding slice is simultaneously processed in parallel and the macroblock in processing in the current slice has a number of reference macroblocks and is at the raster scan start end side by a predetermined number of macroblocks from the macroblock in processing in the immediately preceding slice so that a particular reference macroblock of the macroblock in processing in the current slice partly overlaps with a reference macroblock of the macroblock in processing in the immediately preceding slice.