Patent ID: 7310795

Claim:
A logic circuit simulation apparatus for simulating a logic circuit which includes a plurality of circuit blocks, the apparatus comprising: a power control signal specifying unit configured to create power control signal information for specifying statuses of a plurality of power control signals in the logic circuit; a logic circuit simulation control information generation unit configured to read the power control signal information created by the power control signal specifying unit and to read circuit connection information, said logic circuit simulation control information generation unit configured to generate logic circuit simulation control information based on the power control signal information and the circuit connection information; and a logic circuit simulation unit configured to fix with high impedance each input of a circuit block among the plurality of circuit blocks when said circuit block is not supplied with power in accordance with the logic circuit simulation control information and release the high impedance from each from each input of said circuit block when said circuit block is to be supplied with power in accordance with release control information of the logic circuit simulation control information, said logic circuit simulation unit configured to simulate the logic circuit.