Patent ID: 7818512

Claim:
A memory apparatus for a computer system, comprising: a plurality of memory modules arranged in a tree having a plurality of hierarchical levels including a first level and a second level, each memory module of said plurality of memory modules storing data at addressable storage locations therein and belonging to a respective level of a plurality of hierarchical levels, said first level having at least one said memory module, second level having a larger number of said memory modules than said first level; at least one access module controlling access to said plurality of memory modules; a first communications medium coupling each memory module of said first level to a respective access module of said at least one access module; a second communications medium coupling each memory module of said second level to a respective memory module of said first level; wherein memory access communications of a first type passing between said at least one access module and said at least one memory module of said first level are transmitted directly between said access module and said at least one memory module of said first level using said first communications medium, and wherein memory access communications of said first type passing between said at least one access module and said memory modules of said second level are transmitted between said access module and said memory modules of said second level via said at least one memory module of said first level using said first communications medium and said second communications medium; and wherein each said memory access communication of a first type issued by said at least one access module accesses a respective set of data locations in a respective subset of said memory modules, each said subset of said memory modules containing a plurality of said memory modules including a respective at least one memory module of said first level and at least one memory module of said second level coupled to the respective at least one memory module of said first level by said second communications medium, each said respective set of data locations including at least one respective data location in each memory module of the respective subset of memory modules.