Patent ID: 8476736

Claim:
A device comprising: a p-type substrate; an n-type buried layer over the p-type substrate; a diode comprising: a lightly doped p-type region over the n-type buried layer; an anode over the lightly doped p-type region; a shallow p-type region between and contacting the lightly doped p-type region and the anode; a first cathode of n-type over the lightly doped p-type region; a shallow n-type region between and contacting the lightly doped p-type region and the first cathode, wherein the shallow p-type region and the shallow n-type region are spaced apart from each other by a portion of the lightly doped p-type region; and a second cathode of p-type over and contacting the lightly doped p-type region, wherein the first and the second cathodes are interconnected to be at a same voltage level; and a high-voltage N-well encircling the lightly doped p-type region, wherein a bottom of the high-voltage N-well contacts the n-type buried layer, and wherein the high-voltage N-well encircles the lightly doped p-type region, the anode, and the first and the second cathodes.