Patent ID: 7528820

Claim:
A shift register of a driving circuit for a flat panel display device having a plurality of stages, comprising: a first thin film transistor (TFT) receiving an output voltage of a previous stage and connected to a Q node, the first thin film transistor having a diode structure such that a gate electrode of the first TFT is connected to a drain electrode of the first TFT; a second TFT between the Q node and a supply voltage terminal, the second TFT switched according to an output voltage of a next stage; a third odd TFT between an odd source voltage terminal and a QB-o node, the third odd TFT having a diode structure such that a gate electrode of the third odd TFT is connected to a drain electrode of the third odd TFT; a third even TFT between an even source voltage terminal and a QB-e node, the third even TFT having a diode structure such that a gate electrode of the third even TFT is connected to a drain electrode of the third even TFT; a fourth TFT between a first clock terminal and an output voltage terminal of a present stage, the fourth TFT switched according to a voltage of the Q node; a fifth odd TFT between the QB-o node and the supply voltage terminal, the fifth odd TFT switched according to the voltage of the Q node; a fifth even TFT between the QB-e node and the supply voltage terminal, the fifth even TFT switched according to the voltage of the Q node; a sixth odd TFT between the QB-o node and the supply voltage terminal, wherein a pate electrode of the sixth odd TFT is connected to the even source voltage terminal such that the sixth odd TFT is switched according to an even source voltage of the even source voltage terminal; a sixth even TFT between the QB-e node and the supply voltage terminal, wherein a gate electrode of the sixth even TFT is connected to the odd source voltage terminal such that the sixth even TFT is switched according to an odd source voltage of the odd source voltage terminal, wherein each of the even source voltage and the odd source voltage alternately has a high level voltage by frames, and wherein the even source voltage has an opposite level voltage to the odd source voltage in each frame; a seventh odd TFT between the Q node and the supply voltage terminal, the seventh odd TFT switched according to a voltage of the QB-o node; a seventh even TFT between the Q node and the supply voltage terminal, the seventh even TFT switched according to a voltage of the QB-e node; an eighth odd TFT between the output voltage terminal of the present stage and the supply voltage terminal, the eighth odd TFT switched according to the voltage of the QB-o node; and an eighth even TFT between the output voltage terminal of the present stage and the supply voltage terminal, the eighth even TFT switched according to the voltage of the QB-e node.