Patent ID: 8902966

Claim:
A video decoding circuit comprising: a first video data processor; a second video data processor; and a connection connecting said first video data processor and said second data processor; wherein said first video data processor is arranged to receive a first signal comprising encoded video data, process said first signal to provide a second signal and output said second signal, said first video data processor being arranged to process said first signal dependent on at least part of said received first signal, said second video data processor comprising a predictor constructor, said second video data processor is arranged to receive at least a part of said second signal, process said at least a part of said second signal to provide a third signal, and output said third signal, said second and third signals comprising a decoded video image stream, wherein a part of said second signal comprises coding standard information, said coding standard information indicating which of a plurality of encoding methods was used to encode the encoded video data, and said second video data processor is arranged to process said at least part of said second signal dependent on the coding standard information such that: when the coding standard information has a first value, the predictor constructor is configured to perform processing of at least part of the second signal based on a first decoded video format; and when the coding standard information has a second value, different from the first value, the predictor constructor is configured to perform processing of at least part of the second signal based on a second decoded video format, different from the first decoded video format.