Patent ID: 7944411

Claim:
A current-drive apparatus for a display panel, comprising: a plurality of current-drive circuits, each of said plurality of current-drive circuits including first and second terminals, a reference resistor connected between said first and second terminals and a reference current generation circuit to produce at least one internal reference current responding to a voltage generated based on the reference resistor; and a current source, said current source and said plurality of current-drive circuits being connected such that a current flowing through said current source becomes substantially equal to a current flowing through said reference resistor of each of said current-drive circuits, wherein a current flowing through said reference resistor in a first one of said current-drive circuits flows through said reference resistor in a second one of said current-drive circuits, wherein said current drive circuits are coupled in series in a manner that said first terminal of a preceding one of said current drive circuits is connected to the second terminal of a succeeding one of said current-drive circuits which is adjacent to the preceding one of said current-drive circuits, and wherein at least one of said plurality of current-drive circuits further includes: a first reference MOS transistor; a first operational amplifier having a first input coupled to a first node between said first terminal and said reference resistor and a second input coupled to an output thereof; a second operational amplifier having a first input coupled to a second node between said second terminal and said reference resistor, a second input coupled to a drain of said first reference MOS transistor, and an output coupled to a gate of said first reference MOS transistor; and a current adjustment resistor connected between the drain of said first reference MOS transistor and the output of said first operational amplifier, wherein said current adjustment resistor operates such that a reference voltage generated based on a voltage at both ends of said reference resistor is applied across said current adjustment resistor to generate an internal reference current through said first reference MOS transistor.