Patent ID: 8817211

Claim:
A liquid crystal display device, comprising: a plurality of gate lines, which are arranged parallel to one another in a first direction; a plurality of drain lines, which are arranged parallel to one another in a second direction while intersecting the plurality of gate lines; a plurality of first electrodes; a second electrode, which is overlapped with the plurality of first electrodes and is formed on a lower layer side of the plurality of first electrodes; a first substrate including the plurality of gate lines, the plurality of drain lines, the plurality of first electrodes, and the second electrode; a second substrate; and a liquid crystal, which is sandwiched between the first substrate and the second substrate; wherein the liquid crystal is driven by an electric field generated between the plurality of first electrodes and the second electrode; wherein the plurality of first electrodes include an electrode in which a first slit having a first inclined angle is formed and an electrode in which a second slit having a second inclined angle is formed, the second inclined angle being different from the first inclined angle; wherein a plurality of aperture regions surrounded by the plurality of drain lines and the plurality of gate lines include a first aperture region including the first slit, and a second aperture region including the second slit; wherein the first aperture region and the second aperture region are alternately formed in the first direction; wherein the first aperture region and the second aperture region are arranged adjacent to each other in the first direction, each of the first aperture region and the second aperture region includes a first region and a second region, the first region of the first aperture region and the second region of the second aperture region form a pixel, the first region of the first aperture region and the second region of the second aperture region are arranged so as to be opposed to each other via one of the plurality of gate lines; wherein said first slit and said second slit are generally aligned to said plurality of drain lines; wherein said first slit is located within both said first and second regions of said first aperture region; wherein each pixel includes a thin film transistor for supplying, to one of the plurality of first electrodes and the second electrode, a video signal from one of the plurality of drain lines in synchronization with a gate signal from one of the plurality of gate lines; wherein the thin film transistor supplies the same video signal to each of the first region and the second region forming the pixel; and wherein said first electrodes in said first aperture region are connected to said first electrodes in said second aperture region by said thin film transistor.