Patent ID: 8797814

Claim:
A multi-test apparatus, comprising: a plurality of memory banks each including a plurality of memory cells; a plurality of write drivers corresponding to the respective memory banks; an input unit configured to receive first data for testing and provide the received first data to the plurality of write drivers; and an internal data generation unit configured to generate and provide second test data substituting for the first test data to a first group of write drivers and a second group of write drivers in different time periods, respectively, in response to a test control signal so that the second test data is written in a first group of the memory banks and a second group of memory banks corresponding to the respective write drivers groups in at least two different time periods, respectively, wherein the second group of write drivers does not include the write drivers of the first group, wherein the internal data generation unit comprises: a first internal data generation unit configured to generate the second test data and provide the generated internal test data to write drivers in the first group, respectively corresponding to memory banks in the first group, among the plurality of write drivers so that the internal test data is written in the memory bank in the first group among the plurality of memory banks in a first time period; and a second internal data generation unit configured to generate the second test data and provide the generated internal test data to write drivers in the second group, respectively corresponding to memory banks in the second group, among the plurality of write drivers so that the internal test data is written in the memory bank in the second group among the plurality of memory banks in a second time period after the first time period.