Patent ID: 7569900

Claim:
A semiconductor device comprising: a silicon carbide substrate having a first main surface and a second main surface; a silicon carbide layer of a first conductivity type disposed on the first main surface of the silicon carbide substrate; a first silicon carbide region as a base region of a second conductivity type disposed on a surface of the silicon carbide layer; a second silicon carbide region as a source region of the first conductivity type disposed on a surface of the first silicon carbide region so as to be spaced apart inside from all side portions of the first silicon carbide region, and including a first sub-region to which nitrogen is added and a second sub-region which is disposed in such a manner as to come in contact with the first sub-region and to which phosphorus is added; a gate insulating film disposed in such a manner as to extend over the silicon carbide layer, the first silicon carbide region, and the first sub-region of the second silicon carbide region above the first main surface of the silicon carbide substrate; a gate electrode formed on the gate insulating film; a first electrode formed on the second sub-region of the second silicon carbide region and the first silicon carbide region; and a second electrode formed on the second main surface of the silicon carbide substrate, wherein the second silicon carbide region has a third sub-region sandwiched between a lower surface of the first sub-region and the first silicon carbide region, and phosphorus is added to the third sub-region.