Patent ID: 8760144

Claim:
A circuit comprising: a first differential transistor having a gate used as a first voltage input terminal of the circuit to receive a first voltage and coupled to a first load transistor; a second differential transistor forming a differential transistor pair with the first differential transistor, having a gate used as a second voltage input terminal of the circuit to receive a second voltage and coupled to a second load transistor, wherein respective length-to-width ratios of the first and second differential transistors are identical while respective length-to-width ratios of the first and second load transistors are not identical; and a resistor having a first terminal connected to a source terminal of the first differential transistor, and a second terminal connected to a source terminal of the second differential transistor, wherein a node between the first terminal of the resistor and the source terminal of the first differential transistor is used as a current input terminal to connect to a current source, or a node between the second terminal of the resistor and the source terminal of the second differential transistor is used as the current input terminal to connect to a current sink.