Patent ID: 7492849

Claim:
A clock and data recovery circuit for recovery of a synchronizing clock and serialized digital data from a received communication signal comprising: a data capture device which receives said communication signal and recovers said serialized digital data; a voltage controlled oscillator in communication with said data capture device to provide an oscillator clocking signal synchronized to said received communication signal; a multiple phase generator in communication with said voltage controlled oscillator to receive and convert said oscillator clocking signal to a plurality of multiple phased clocking signals, each signal being phase shifted from said oscillator clocking signal; a phase detector in communication with the data capture device to receive said recovered serialized data and in communication with said multiple phase generator to acquire said plurality of multiple phased clocking signals, said phase detector determining if said oscillator clocking signal is in phase with said recovered serialized data and providing a lead signal and a lag signal indicating whether said oscillator clocking signal is in phase with said recovered serialized data; a low pass filter in communication with said phase detector to receive and low pass filter said lead signal and said lag signal to develop a frequency adjusting voltage for said voltage controlled oscillator; and a frequency initializing device connected to receive a reference clock signal and in communication with said voltage controlled oscillator employed to assist acquisition of lock of said voltage controlled oscillator to said reference clock signal during initialization; and a loop selection device in communication with said frequency initializing device to receive a frequency increase signal and decrease signal indicating whether a frequency of said oscillator clocking signal is greater than or lesser than a frequency of said reference clock signal, connected to receive a synchronization lost signal, and in communication with said low pass filter to switch control of said voltage controlled oscillator from said frequency initializing device after initialization of said voltage controlled oscillator to said phase detector for recovery of said serialized digital data and said synchronizing clock; wherein said data capture device is in communication with said multiple phase generator to receive said plurality of multiple phased clocking signals, said data capture device acquiring said serialized digital data with each of said plurality of multiple phased clocking signals to create a plurality of acquired multiple phased data signals.