Patent ID: 7702350

Claim:
A device in a wireless communication system, comprising: a power control processor operative to adjust a signal quality (SIR) target, used for power control of a data transmission, based on status of data blocks received for the data transmission, to adjust the SIR target using a first mode at beginning of the data transmission, to transition from the first mode to a second mode when an exit condition is encountered, to adjust the SIR target using only the second mode for remainder of the data transmission, to adjust the SIR target with a first down step and a first up step in the first mode and with a second down step and a second up step in the second mode, the first down step being larger than the second down step, the second down step and the second up step being determined based on a target block error rate (BLER) for the data transmission, to adjust the SIR target based on cyclic redundancy check (CRC) of the received data blocks in both the first and second modes, and to adjust the SIR target by the second up step for erased data blocks and by the second down step for good data blocks in the second mode.