Patent ID: 8793393

Claim:
A video processing device, comprising: an expansion card interface, arranged for providing a multi-channel data transfer; a controller, arranged for performing direct memory access (DMA) function to access a video raw data from a video memory via the expansion card interface; and an encoder, coupled to the controller, arranged for encoding the video raw data to generate a compressed video stream based on slices, wherein each slice comprises at least one macroblock row; wherein the video raw data comprises a plurality of video frames, each video frame is divided into M×N macroblocks, where M and N are both integers, and each macroblock row comprises n macroblocks, where n is at most N, M is total number of rows of macroblocks arranged along horizontal direction parallel to the macroblock row and N is total number of columns of macroblocks arranged along vertical direction for the each video frame, the encoder comprises a plurality of encoding cores, the encoder is arranged for performing multi-channel encoding with the plurality of encoding cores, and each encoding core comprises a buffer for buffering a plurality of continuous macroblocks according to a clock frequency of the encoding core, a latency of the encoding core at least comprises a processing time of encoding one macroblock row and a buffering time of buffering three continuous macroblocks.