Patent ID: 7602635

Claim:
A design structure embodied in a machine readable medium used in a design process for a static random access memory (SRAM) circuit, the design structure for the circuit comprising: a first SRAM cell having a first memory node and a second memory node; a second SRAM cell having a third memory node and a fourth memory node; a first cell control module connected between the first memory node and the third memory node; and a second cell control module connected between the second memory node and the fourth memory node, the first and second cell control modules configured to switch between a first mode of operation where the memory nodes of the first SRAM and the second SRAM are isolated and a second mode of operation where the first and third memory nodes are shared and the second and fourth memory nodes are shared, wherein the first SRAM cell is configured to be read from and/or written to independently of the second SRAM cell in the first mode of operation; and the first and second SRAM cells are configured to be read from and/or written to simultaneously in the second mode of operation.