Patent ID: 8394717

Claim:
A method for fabricating a semiconductor package, comprising the steps of: fabricating a semiconductor chip having a bonding pad in a portion of a first surface thereof; forming a through electrode passing through the semiconductor chip from the first surface to a second surface opposing the first surface, the through electrode being connected electrically to the bonding pad; forming a redistribution pattern in the second surface of the semiconductor chip, the redistribution pattern being connected electrically to the through electrode; forming a second insulation pattern having an opening for exposing a portion of the redistribution pattern over the second surface of the semiconductor chip; and forming a conductive ball at the exposed portion of the redistribution pattern by the opening, wherein redistribution pattern and conductive ball include a solder, wherein the solder included in the redistribution pattern has a first melting point and the solder included in the conductive ball has a second melting point that is lower than the first melting point.