Patent ID: 7577952

Claim:
A method of controlling the operation of a finite state machine comprising: providing said finite state machine, said finite state machine comprising a plurality of threads of execution including at least a first thread of execution that is a first logical sequence of states and a second thread of execution that is a second logical sequence of states such that said first and said second logical sequences of states of said finite state machine are implemented using hardware logical gates and other hardware devices; providing a common routine shared by said plurality of threads of execution, said common routine comprising a plurality of states combined as a common logical sequence of states such that said common logical sequence of states are implemented using hardware logical gates and other hardware devices; providing an address register disposed to store an identifier for a return state of each thread of said finite state machine that transfers control to said common routine; executing said first thread of execution, said first thread of execution comprising: storing a first identifying value for a return state of said first thread of execution in said address register; passing control of said first thread of execution to said common routine; executing said common routine; retrieving said first identifying value from said address register; and returning control to said first thread of execution to continue from said return state of said first identifying value stored in said address register; and executing said second thread of execution, said second thread of execution comprising: storing a second identifying value for a return state of said second thread of execution in said address register; passing control of said second thread of execution to said common routine; executing said common routine; retrieving said second value from said address register; and returning control to said second thread of execution to continue from said state of said second identifying value stored in said address register.