Patent ID: 7589562

Claim:
An I/O cell for providing an output pad with an output signal comprising: a first drive circuit for providing the output pad with an output signal having a drive strength which is equal to a drive strength required by a basic PMOS transistor or a basic NMOS transistor, the first drive circuit further operating as an ESD protection circuit to protect the output pad from any errant electrostatic signal input thereto; at least one second drive circuit connected between an output of the first drive circuit and the output pad, the second drive circuit operating as an ESD protection circuit to further protect the output pad from any errant electrostatic signal input thereto, wherein the second drive circuit includes: a PMOS transistor having a first pad, and an NMOS transistor having a second pad; a voltage generator for generating VNV and VPG voltages and having a voltage divider connected between a power supply voltage and a ground voltage, wherein the voltage generator includes a switching device: for selectively connecting an output of the voltage divider to a VNV voltage terminal, and for selectively connecting the output of the voltage divider to a VPG voltage terminal; and a second drive stage connected between the VNV voltage terminal and a ground voltage terminal, the second drive stage having an input receiving the input signal of the I/O cell and an output connected to the gate of the NMOS transistor of the second drive circuit.