Patent ID: 8362569

Claim:
A semiconductor device fabrication method comprising: forming a gate conductor continuously in first region and second region of a semiconductor substrate; forming a first transistor including a first gate electrode which is a portion of the gate conductor in the first region; forming a second transistor including a second gate electrode which is another portion of the gate conductor in the second region; forming a first stress film having a first etch characteristics to cover the first transistor and second transistor; forming a first insulating film having a second etch characteristics different from the first etch characteristic to over the first stress film; forming a first mask layer covering the first region and exposes the second region; removing the first insulating film over the second region by using the first mask layer as a mask and etching the first insulating film under the first mask layer in the direction parallel to the surface of the semiconductor substrate by a first width from an edge of the first mask layer; removing the first stress film over the second region by using the first mask layer as a mask; forming a second stress film having a third etch characteristics different from the first etch characteristics to cover the second transistor, the first stress film and the first insulating film over the semiconductor substrate; forming a second mask layer over the second stress film, the second mask layer covering the second region, an edge of the second mask layer over the first region side being located over the first insulating film; etching the second stress film by using the second mask layer as a mask so that a portion of the second stress film overlaps a portion of the first stress film and a portion of the first insulating film; forming a second insulating film to cover the first insulating film, the second stress film and the first insulating film over the semiconductor substrate; forming a contact hole passing through the second insulating film, the second stress film, and the first stress film, a bottom of the contact hole reaching to the gate conductor at the boundary between the first region and the second region; and embedding a conductor plug in the contact hole, wherein the first width is wider than a width of a contact potion between a bottom of the conductor plug and the gate conductor at the boundary.