Patent ID: 8138808

Claim:
A circuit for detecting a phase imbalance, said circuit comprising: a buffer receiving an oscillation signal and generating a frequency signal, wherein a phase of a transfer function of said buffer is determined by a current flowing through said buffer; a first channel, coupled to said buffer, that receives an input signal, that shifts a frequency of said input signal according to said frequency signal to generate a first output signal, wherein a phase of said first output signal is determined by said phase of said transfer function of said buffer; a second channel receiving said input signal and generating a second output signal; a conversion block generating a direct current (DC) signal based on said first output signal and said second output signal, wherein a level of said DC signal is determined by a phase difference between said first output signal and said second output signal; a first comparator coupled to said conversion block, said first comparator comparing said DC signal to a first reference signal and generating a first alert signal if a difference between said DC signal and said first reference signal is greater than a first predetermined threshold; and a controller coupled to said first comparator, said controller receiving said first alert signal and adjusting said current through said buffer to adjust the phase of said first output signal in response to said first alert signal.