Patent ID: 7024616

Claim:
A method for encoding an error correcting code for providing an error correcting code to a client signal having a fixed bit rate, said method comprising the steps of: repeatedly parallelizing said client signal to B systems every A bits to generate B parallelized client signals; segmenting said B parallelized client signals every C bits to create B parallelized client blocks; increasing a bit rate of each of said B parallelized client blocks by a factor of D to increase a length of each said parallelized client block from C bits to E bits to create B outer code subblocks; placing information of said parallelized client blocks in second bit to a (C+1)th bit in each of said B outer code subblocks or a time series basis, leaving a first bit and a (C+2)th bit to an E-th bit as an empty area created by increasing the bit rate, assigning a first bit of said empty area as an overhead area, and an area from a (C+2)th bit to the E-th bit of said empty area as a check bit are for an outer code; and encoding each of said B outer code subblocks independently with an outer code Λ, and placing check bits thereof in said check bit area for the outer code to create B outer encoded subblocks, wherein said A, B, C and E are predetermined integer values, and said D is a predetermined value.