Patent ID: 7603598

Claim:
A semiconductor device for testing a semiconductor process applied to manufacturing the semiconductor device, the semiconductor device comprising: at least a testing group, comprising: a first testing block, comprising: a first input node; a first output node; a plurality of first selecting nodes; a first reference device coupled to the first input node and the first output node; and a first target device coupled to the first selecting nodes and the first output node, the first target device comprising a plurality of first devices under test (DUTs) each coupled to a first selecting node; and a second testing block, comprising: a second input node; a second output node; a plurality of second selecting nodes; a second reference device coupled to the second input node and the second output node; and a second target device coupled to the second selecting nodes and the second output node, the second target device comprising a plurality of second devices under test (DUTs) each coupled to a second selecting node; wherein the first DUTs and the second DUTs have a one-to-one relationship.