Patent ID: 8305307

Claim:
A display device including pixels arranged in rows and columns, the display device comprising: a first signal line and a second signal line which are disposed in each of the columns, for supplying the pixels with a signal voltage that determines luminance of the pixels; a first power source line and a second power source line; a scanning line disposed in each of the rows; and a first control line, a second control line, and a third control line which are disposed in each of the rows, wherein the pixels compose at least two driving blocks each of which includes at least two of the rows, each of the pixels includes: a luminescence element that includes terminals, one of the terminals being connected to the second power source line, the luminescence element generating photons according to a flow of a signal current corresponding to the signal voltage; a drive transistor that includes a source and a drain and converts the signal voltage applied between a gate and the source of the drive transistor into the signal current, one of the source and the drain being connected to the other of the terminals of the luminescence element; a first capacitor element that includes terminals, one of the terminals being connected to the gate of the drive transistor; a second capacitor element that includes terminals, one of the terminals being connected to the other of the terminals of the first capacitor element and the other of the terminals being connected to the third control line; a first switching transistor that includes a gate connected to the first control line, one of a source and a drain connected to the other terminal of the first capacitor element, and the other of the source and the drain connected to the source of the drive transistor; and a second switching transistor that includes a gate connected to the second control line, and a source and a drain which are inserted between the first power source line and the other of the source and the drain of the drive transistor, each of the pixels in a k-th drive block of the drive blocks further includes a third switching transistor that includes a gate connected to the scanning line, one of a source and drain connected to the gate of the drive transistor, and the other of the source and the drain connected to the first signal line, k being a positive integer, each of the pixels in a (k+1)-th drive block of the drive blocks further includes a fourth switching transistor that includes a gate connected to the scanning line, one of a source and a drain connected to the gate of the drive transistor, and the other of the source and the drain connected to the second signal line, and the first control line and the third control line are connected to the pixels in a same one of the drive blocks and not connected to the pixels in different ones of the drive blocks.