Patent ID: 7236408

Claim:
An electronic circuit, comprising: a substrate of a first type of material, the first type being one of a p-type and an n-type; a well formed in the substrate, the well being of a second type of material that is different than the first type of material, the second type being one of the p-type and the n-type; at least one field effect transistor (FET) of the second type being formed on the substrate; at least one FET of the first type being formed in the well; and well-biasing circuitry configured to bias the well in a first manner configured for a first mode of operation and in a different second manner configured for a second mode of operation; wherein: said bias in said first manner comprises a reduced bias, compared to said second manner, to strengthen current versus voltage characteristics of said FET of said first type during said second mode of operation; and said bias in said second manner comprises an increased bias, compared to said first manner, to weaken current versus voltage characteristics of said FET of said first type during said first mode of operation.