Patent ID: 7947585

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: forming a buffer layer on the top of a semiconductor substrate; applying an inorganic photoresist on the buffer layer, and forming a photoresist pattern using a lithography process; thermally treating the photoresist pattern using a predetermined gas; uniformly depositing a conductive layer on the thermally treated structure, and etching the deposited conductive layer by a deposited thickness in order to expose the thermally treated photoresist pattern wherein the deposited conductive layer is used to form two side gates; depositing an insulating layer on the etched structure, and etching the deposited insulating layer to expose the thermally treated photoresist pattern and the two side gates; removing the exposed photoresist pattern using an etching process; forming a gate oxide layer in the portion in which the photoresist pattern is removed; and forming a topmost gate electrode on the gate oxide layer and over the two side gates.