Patent ID: 7459384

Claim:
A method of preventing interlayer dielectric cavitation between a pair of structures having a high aspect ratio region therebetween in a semiconductor device, the method comprising: depositing a first dielectric in the high aspect ratio region; removing the first dielectric to form a bearing surface adjacent each structure, wherein the bearing surface is inclined to a spacer of each structure and extends continuously upwards from a surface coplanar with the base of each structure terminating at a first portion along the height of the spacer of each structure and wherein the remaining first dielectric of the bearing surface partially fills an undercut of each structure; depositing a barrier layer over each structure including respective bearing surfaces, a second portion along the height of the spacer of each structure, and the high aspect ratio region between the structures; and filling the high aspect ratio region with an interlayer dielectric after the depositing of the barrier layer.