Patent ID: 8509424

Claim:
A fast key-changing hardware apparatus comprising: An advanced encryption system (AES) algorithm block cipher in a hardware implementation that uses a specific sub-key each clock cycle, a rotation module which rotates the specific sub-keys, an S-box read only memory (ROM) which stores a plurality of substitution variables, a round constant module which stores a round constant and performs an XOR operation on said round constant with said specific sub-key, a finite state machine (FSM) controller that expands an input cipher key into a set of specific sub-keys, and an expanded key random access memory (RAM) which stores the expanded set of specific sub-keys; wherein said rotation module, said S-box ROM, said round constant module, and said FSM controller form a closed feedback loop; wherein the AES algorithm block cipher uses a non-repeating input cipher key stream and matches an input cipher key changing rate with a data block encryption rate to form a one-time pad cryptography system; wherein said FSM controller and said AES algorithm block cipher operate asynchronously; and wherein the input cipher key is stored in an input cipher key register, and is destroyed one clock cycle after the AES algorithm block cipher receives a reset signal.