Patent ID: 8593879

Claim:
A nonvolatile semiconductor memory device comprising: a plurality of memory cells each configured to hold a threshold voltage included in any one of a plurality of threshold voltage distributions; a memory cell array having NAND cell units arranged therein, each of the NAND cell units including a memory string and selection transistors, the memory string configured by the memory cells connected in series, and one of the selection transistors being connected to each end of the memory string, respectively; word lines connected to the memory cells; bit lines each connected to first end of the NAND cell unit; a source line connected to second ends of the NAND cell units; and a control circuit configured to control a read operation, a write operation, and a write verify operation, the read operation being an operation of selecting one of the memory cells as a selected memory cell and applying a read voltage to a selected word line connected to the selected memory cell to read data, the write operation being an operation of writing data to the selected memory cell, and the write verify operation being an operation of applying a verify voltage to the selected word line and determining whether a certain data is written to the selected memory cell, in a first case, the control circuit setting a voltage applied to the selected word line to a first write verify voltage to perform the write verify operation, and setting a voltage applied to the selected word line to a first read voltage to perform the read operation, in a second case in which the memory cells deteriorate more than in the first case, the control circuit setting a voltage applied to the selected word line to a second write verify voltage to perform the write verify operation, and setting a voltage applied to the selected word line to a second read voltage to perform the read operation, and the control circuit setting a difference between a maximum value of the first write verify voltage and a maximum value of the first read voltage to a value more than a difference between a maximum value of the second write verify voltage and a maximum value of the second read voltage.