Patent ID: 7800224

Claim:
A power device package comprising: an insulating substrate; an interconnection pattern disposed on the insulating substrate, the interconnection pattern comprising a single conductive layer comprising a first metal layer and a multiple conductive layer comprising another first metal layer and a second metal layer disposed on the another first metal layer; a plurality of wires comprising a first wire having a first diameter and second wire having a second diameter less than the first diameter; and a contact pad on a power control semiconductor chip and a contact pad on a low power semiconductor chip driving the power control semiconductor chip, each contact pad electrically connected to one end of one the first and second wires, wherein a bottom surface of at least one of the power control semiconductor chip and the low power semiconductor chip is bonded to one of the single conductive layer and the second metal layer of the multiple conductive layer, while the other ends of the first and second wires are bonded to the other of the single conductive layer and the second metal layer of the multiple conductive layer.