Patent ID: 8422970

Claim:
A circuit configured to receive an input signal and to produce an output signal measuring a power of the input signal, the circuit comprising: a multiplier cell configured to multiply first and second signals, each of the first and second signals comprising a component related to the input signal and a component related to the output signal; at least one first converting amplifier configured to generate the component related to the input signal; and at least one second converting amplifier configured to generate the component related to the output signal; a controlled amplifier configured to amplify an intermediate signal produced by the multiplier cell, wherein an amplification provided by the controlled amplifier is a function of the output signal; wherein the controlled amplifier is configured to be controlled using a control signal, the control signal based on the component related to the output signal; wherein transconductances of the first and second converting amplifiers are selected to configure the circuit as one of: a linear root mean square (RMS) power detector and a logarithmic RMS power detector; two first voltage-to-current amplifiers configured to generate substantially equal input related currents; and two second voltage-to-current amplifiers configured to generate substantially equal output-related currents; wherein the first signal received by the multiplier cell comprises one of the input-related currents plus one of the output-related currents; and wherein the second signal received by the multiplier cell comprises another of the input-related currents minus another of the output-related currents.