Patent ID: 7838948

Claim:
An apparatus comprising: a first field effect transistor including a first source contact region, a first drain contact region and a first plurality of fins overlying a substrate, a first gate overlying the first plurality of fins, the first source contact region coupled to a first end of the first plurality of fins; a second field effect transistor including a second source contact region, a second drain contact region, and a second plurality of fins overlying the substrate, a second gate overlying the second plurality of fins, the second drain contact region coupled to a first end of the second plurality of fins; and an interconnection contact region overlying the substrate, electrically contacting the first drain contact region and the second source contact region and abutting a second end of the first plurality of fins and a second end of the second plurality of fins, wherein the first field effect transistor includes an nFET and the second field effect transistor includes a pFET.