Patent ID: 7943990

Claim:
A power semiconductor device comprising: a drift region of a first conductivity; a base region of a second conductivity over said drift region; a plurality of first gate trenches extending through said base region to said drift region; conductive regions of said first conductivity adjacent said first gate trenches; a first power electrode electrically coupled to said conductive regions of said first conductivity; a first perimeter trench disposed around and intersecting said first gate trenches, said first perimeter trench including a first section and a second section, said first section intersecting said first gate trenches and said second section extending along a same direction as said first gate trenches; a gate insulation layer formed in each first gate trench adjacent said base region; a gate electrode residing in each first gate trench and said first perimeter trench; and a gate bus disposed at least over a portion of said perimeter trench and electrically connected to said gate electrode in said perimeter trench, said gate bus surrounding at least a portion of said power electrode by including first and second integrally formed portions, said first portion extending along said first section and a second portion extending along said same direction as said first gate trenches, wherein said power electrode includes one edge opposite and spaced from said first portion of said gate bus and another edge opposite and spaced from said second portion of said gate bus.