Patent ID: 7141514

Claim:
A method of fabricating an insulated gate electrode on a semiconductor substrate, comprising: forming an electrode/insulator layered structure; etching said layered structure to remove oxidation from side walls of a conductive layer of said layered structure; performing a re-oxidation step to restore oxide material removed from an insulator layer of said layered structure during the etching step, said re-oxidation step comprising: (a) introducing into a vacuum chamber in which said substrate resides a process gas that includes oxygen while maintaining a vacuum pressure in the chamber; (b) forming oxide insulating material on the insulating layer of said layered structure by generating a plasma in a plasma generation region within said vacuum chamber during successive “on” times, and allowing ion energy of said plasma to decay during successive “off” intervals separating the successive “on” intervals, said “on” and “off” intervals defining a controllable duty cycle; and (c) limiting said duty cycle so as to limit formation of ion bombardment-induced defects in said insulating material.