Patent ID: 7237041

Claim:
A computerized system that automatically assigns an identification code to each of a plurality of slave processors in communication with a master processor, the system comprising: a master processor coupled to an input/output (I/O) port; a first slave processor coupled to first and second I/O ports of the first slave processor; a second slave processor coupled to first and second I/O ports of the second slave processor; wherein the I/O port of the master processor is coupled to the first I/O port of the first slave processor; wherein the second I/O port of the first slave processor is coupled to the first I/O port of the second slave processor; wherein a plurality of lines in the first I/O port of the first slave processor are directly linked to corresponding lines in the second I/O port of the first slave processor, so that a signal transmitted along the linked lines is received by the first and second slave processors; wherein a plurality of lines in the first I/O port of the first slave processor are not directly linked to lines in the second I/O port of the first slave processor; wherein the first slave processor is programmed to receive a digital signal held on the unlinked lines of its first I/O port, and based thereupon, to generate a digital signal on the unlinked lines of the second I/O port; and wherein the first slave processor is programmed to assign itself an identification code based upon the digital signal held on the unlinked lines of its first I/O port, and thereafter respond to commands on the linked lines of its first I/O port only if the commands are associated with the identification code the first slave processor assigned to itself.