Patent ID: 8163652

Claim:
A semiconductor processing method comprising: a step of introducing a processing gas from an upper portion of a wafer stage into a processing chamber; a step of processing a semiconductor wafer located on the wafer stage in the processing chamber, by using plasma generated inside the processing chamber; and a step of forming a sheath layer with convex shape above the semiconductor wafer, the sheath layer being shaped thicker in a central region above the semiconductor wafer and thinner in an outer circumferential region above the semiconductor wafer, thereby enabling trapping and then eliminating foreign particles disposed on an upper region of the semiconductor wafer, the particles being initially trapped in a boundary between the sheath layer and a plasma bulk layer; wherein the step of forming the sheath layer is performed between the step of introducing the processing gas and the step of processing the semiconductor wafer, or after the step of processing the semiconductor wafer but before an extinction of the plasma.