Patent ID: 8228084

Claim:
A method for testing an integrated circuit device including a system on a chip, wherein the system on a chip includes a plurality of generic purpose input/output pins, the method comprising: storing test code within the system on a chip, the test code being stored within the system on a chip during production of the integrated circuit device; and during a latter phase of production of the integrated circuit device, performing a self-test on the integrated circuit device, wherein performing the self-test on the integrated circuit device includes receiving, at a first generic purpose input/output pin of the plurality of generic purpose input/output pins, a reset signal to reset the integrated circuit device, wherein the reset signal is provided by a controller external to the integrated circuit device, subsequent to the integrated circuit device being reset, (i) executing the test code stored within the system on the chip to test the integrated circuit device, and (ii) providing, at a second generic purpose input/output pin of the plurality of generic purpose input/output pins, a status signal to the controller external to the integrated circuit device, wherein the status signal indicates that the self-test is being performed on the integrated circuit device, and subsequent to completion of the test, (i) providing, via a third generic purpose input/output pin of the plurality of generic purpose input/output pins, a result of the test to the controller external to the integrated circuit device, and (ii) receiving, at a fourth generic purpose input/output pin of the plurality of generic purpose input/output pins, an acknowledgement signal from the controller external to the integrated circuit device, wherein the acknowledgement signal indicates receipt of the test result by the controller external to the integrated circuit device, wherein performing the self-test on the integrated circuit device comprises providing three distinct voltage levels to the system on a chip, and wherein the three distinct voltage levels include (i) a minimum voltage, (ii) a nominal voltage, and (iii) a maximum voltage, wherein the nominal voltage is within plus or minus five percent of each of the minimum voltage and the maximum voltage.