Patent ID: 8310429

Claim:
A discharge circuit, comprising: a first input terminal; a transistor comprising a gate electrode, a drain electrode, and a source electrode; a resistance; a control circuit configured for controlling a voltage applied to the gate electrode of the transistor; and a second input terminal connected to the control circuit; wherein the source electrode of the transistor is connected to the first input terminal, the drain electrode of the transistor is grounded via the resistance, and electric charge from the first input terminal is discharged through the transistor and the resistance under control of the control circuit; and wherein the control circuit comprises a first inverter, a second inverter, and a D flip-flop, the D flip-flop comprises a D input terminal, a CLK input terminal, and a Q output terminal, the second input terminal of the control circuit is connected to the D input terminal and the CLK input terminal via the first and second inverters respectively, and the Q output terminal of the control circuit is connected to the gate electrode of the transistor.