Patent ID: 7203636

Claim:
An endian transformation method that enables program code of a first endian format to run on hardware of a different second endian format, wherein the hardware includes at least a processor and a memory, the method comprising the computer-implemented steps of: (a) in a translation phase: allocating a memory address range in the memory of length A bytes comprising a plurality of words arranged in a first relative order with respect to a starting address S; receiving a plurality of input code instructions having memory access addresses which address the memory address range according to the first endian format for ordering the significance of bytes within words, where each access address B is of a respective string length L; transforming each of said memory access addresses into transformed address expressions according to the expression −A−B−L+S; and translating the plurality of input code instructions into output code instructions executable by the hardware of the different endian format, where said output code instructions include said transformed address expressions; and (b) in an execution phase: executing said output code instructions on said hardware to fetch and store data in the memory in the allocated memory address range using the transformed address expressions, whereby the relative order of bytes within each word is reversed into the second endian format and the plurality of words are addressed in a second relative order with respect to the given starting address which is a reverse of the first relative order.