Patent ID: 6924692

Claim:
A reference circuit comprising: a reference node to provide a reference voltage; a first transistor device coupled with the reference node to receive a first configuration signal at a first gate terminal, a current to flow through the first transistor device when the first configuration signal is a first value; a second transistor device coupled with the reference node to receive a first voltage potential at a second gate terminal, the current to flow through the second transistor device and the reference voltage to be increased by the first voltage potential when the configuration signal is a second value; a third transistor device coupled with the first transistor device and the second transistor device, the third transistor device to receive a second configuration signal at a gate terminal, the current flowing through the third transistor device when the second configuration signal is a first value; and a fourth transistor device coupled with the first transistor device and the second transistor device, the fourth transistor device to receive a second voltage at a gate terminal, the current to flow through the fourth transistor device and the reference voltage to be increased by the second voltage when the configuration signal is a second value.