Patent ID: 7504290

Claim:
A manufacturing method of a thin film transistor away panel, the method comprising: forming a plurality of gate lines, and a plurality of gate electrodes respectively connected to the gate lines; forming a gate insulating layer which covers the gate lines; forming a plurality of semiconductors on the gate insulating layer; forming a plurality of ohmic contacts on the semiconductors; forming a plurality of data lines and source electrodes connected to the data lines, and a plurality of drain electrodes separate from the source electrodes on the ohmic contacts; forming a passivation layer covering the data lines and the drain electrodes except a part of the drain electrodes; and forming a plurality of conductive electrodes connected to the drain electrodes, wherein the separation of the source electrodes and the drain electrodes is performed by a photolithography process of using a photoresist layer pattern, and the photoresist layer pattern includes a first portion located between the source electrodes and the drain electrodes, a second portion thicker than the first portion and a third portion thinner than the first portion.