Patent ID: 8131897

Claim:
A method of performing memory operations, comprising: storing data in a shared memory, the shared memory being shared by a first processor configured to exchange data with the shared memory in only a first data length format and second processor configured to exchange data with the shared memory in only a second data length format, the first data length format different from the second data length format; receiving a read command from one of the first and second processors; and outputting data from the shared memory in response to the read command based on which of the first and second data length formats is used by the processor issuing the read command, wherein the first and second processors are connected to the shared memory via first and second input/output ports, respectively, the first input/output port having a first number of bits based on the first data length format and the second input/output port having a second number of bits based on the second data length format, and the first processor applies a first column address signal through the first input/output port to read first data in the shared memory if the first processor issues the read command and the second processor applies a second column address signal through the second input/output port to read second data in the shared memory if the second processor issues the read command.