Patent ID: 7989878

Claim:
An insulated gate semiconductor device with a first layer of a first conductivity type, said first layer having an upper side, and with insulated gate electrodes being formed on said upper side, and with an active semiconductor cell comprising: a part of said first layer, a channel well region of a second conductivity type, source regions of the first conductivity type having a doping density higher than said first layer, a second layer of the first conductivity type having a higher doping density than said first layer, and emitter electrodes which are formed on said upper side and contact the source regions and the channel well region, wherein the channel well region, the source regions and the second layer being formed within said first layer adjacent to said upper side, wherein the second layer at least partially separating the channel well region and said first layer, and wherein the semiconductor device further comprises additional well regions of the second conductivity type which are formed adjacent to the channel well region outside the active semiconductor cell within said first layer, said additional well regions are electrically connected through said channel well regions to the emitter electrodes, and when a gate electrode or a source region is formed above an additional well region then only said gate electrode or only said source region is formed above the additional well region so that no conductive channel is formed, wherein said additional well regions have at least one of the following features: said additional well regions having a higher doping density than the channel well region, or the semiconductor device having a junction between the first layer and the additional well regions which is deeper than the junction between the first layer and the channel well region.