Patent ID: 6925012

Claim:
A storage device employing a flash memory, wherein said flash memory is divided into a plurality of physical sectors identified by physical addresses, wherein said flash memory carries out a data write operation of a write data received from a host system into a sector of said plurality of physical sectors in response to a host logical address, accompanied with said write data from said host system, said storage device including: a memory controller which generates a physical address in response to said host logical address for said data write operation of said write data from said host system, wherein said memory controller carries out address conversion from host logical addresses to physical addresses, wherein even when data of a specific host logical address are frequently rewritten from said host system, the same physical addresses are not always used in said storage device, but different physical addresses, which correspond to said same specific host logical address and are generated by said memory controller, are used to spread uniformly the numbers of erasures being effected in different ones of said plurality of physical sectors, wherein said memory controller seeks a previously used physical sector of said specific host logical address in which unnecessary data is written therein and carries out an erase operation of the unnecessary data in that physical sector, and wherein said memory controller stores a correspondence of a new physical sector to the specific host logical address within a table for said address conversion.