Patent ID: 7968890

Claim:
A semiconductor device comprising: a pixel section comprising a pixel TFT over a substrate; a driver circuit comprising an n-channel TFT and a p-channel TFT over the substrate; wherein each of the pixel TFT and the n-channel TFT comprises: a semiconductor layer comprising a channel forming region, a pair of LDD regions in contact with the channel forming region, and source and drain regions disposed on the outside of the pair of LDD regions; a gate insulating film provided over the semiconductor layer, wherein a thickness of the gate insulating film over the channel region is thicker than a thickness of the gate insulating film over each of the source and drain regions; and a gate electrode provided over the gate insulating film, and overlapping a portion of the pair of LDD regions, and wherein the p-channel TFT comprises: a semiconductor layer comprising a channel forming region, a pair of LDD regions in contact with the channel forming region, and source and drain regions disposed on the outside of the pair of LDD regions; a gate insulating film provided over the semiconductor layer, wherein a thickness of the gate insulating film over the channel region is thicker than a thickness of the gate insulating film over each of the source and drain regions; a gate electrode provided over the gate insulating film, and overlapping the pair of LDD regions, entirely.