Patent ID: 8354302

Claim:
A method of fabricating a semiconductor device comprising: preparing a semiconductor substrate having at least one semiconductor chip formation area, with circuit elements being formed in said at least one semiconductor chip formation area, and a plurality of electrode pads being connected to said circuit elements and provided on one of two main surfaces of the semiconductor substrate; forming an insulation film on said one of two main surfaces such that a part of said plurality of electrode pads is exposed; forming a rewiring pattern having a plurality of interconnects which are connected to said plurality of electrode pads and extend over said insulation film; forming a plurality of preliminary column-shaped electrodes connected to said plurality of interconnects respectively such that the plurality preliminary column-shaped electrodes stand perpendicularly to said one of two main surfaces; forming a sealing section, on said insulation film, which buries said rewiring pattern and said plurality of preliminary column-shaped electrodes, and has a top face having the same height as the top faces of said plurality preliminary column-shaped electrodes; forming a plurality of column-shaped electrodes from said plurality of preliminary column-shaped electrodes respectively, said plurality of column-shaped electrodes having a different shape from said plurality of preliminary column-shaped electrodes, each of said plurality of column-shaped electrodes having a main body section and a protrusion section formed by a trench section, said protrusion section extending upward from said main body section, said protrusion section having side faces defined by said trench section, said protrusion section being thinner than said main body section, said trench section being created by removing a part of each of said plurality preliminary column-shaped electrodes to a predetermined depth from the top face of said plurality of preliminary column-shaped electrodes and removing a part of said sealing section from a top face of said sealing section to the same depth as said plurality of preliminary column-shaped electrodes; forming a plurality of solder balls on said plurality of column-shaped electrodes respectively such that each of said solder ball covers said protrusion section and is electrically connected to the top face and said side faces of said protrusion section; and dicing the semiconductor substrate into an individual semiconductor chip in accordance with the semiconductor chip formation area.