Patent ID: 8750433

Claim:
A demodulation circuit comprising: a hard decision processor configured to perform a hard decision process using a demodulated signal, the demodulated signal being a demodulated received signal; a soft decision processor configured to determine a range of assignment with respect to a transitioning part in the demodulated signal, calculate a likelihood value of a bit, and perform a soft decision process; and a likelihood value selector configured to select a demapping likelihood value of the bit which is used to calculate the likelihood value, from a plurality of patterns that are prepared in advance, wherein the likelihood value selector selects the pattern based on a modulation method and coding rate of a received signal, the soft decision processor determines the range of assignment according to the pattern selected by the likelihood value selector, and performs the soft decision process, and the plurality of patterns prepared in advance comprise a pattern that makes the range of assignment larger when the modulation method includes a greater multi-value, and makes the range of assignment larger when the coding rate is lower.