Patent ID: 7932844

Claim:
An integrated circuit comprising: a communication channel comprising a digitally programmable analog filter and an analog-to-digital converter coupled in series, the digitally programmable analog filter having a filter frequency; a digital calibration circuit to generate a digital signal; change the filter frequency of the digitally programmable analog filter between at least two filter frequencies to perform at least a first measurement and a second measurement of a first signal at an output of the analog-to-digital converter; and adjust the filter frequency of the digitally programmable analog filter based on the first measurement and the second measurement; and a digital-to-analog converter to receive the digital signal from the digital calibration circuit; and generate the first signal having a first frequency and couple the first signal to an analog input of the digitally programmable analog filter, wherein, during calibration, the digital-to-analog converter generates the first signal, and wherein, during normal operation of the communication channel, the digital-to-analog converter produces a digitally controlled DC voltage level.