Patent ID: 8635319

Claim:
A system, comprising: a processor circuit having a processor and a memory; a listing of a plurality of endpoints coupled to a network stored in the memory, wherein a first one of the endpoints includes the processor circuit; a listing of a plurality of status request results stored in the memory, wherein individual ones of the status request results indicate an availability of one of a plurality of communication pathways between respective pairs of the endpoints; and a monitoring application stored in the memory and executable by the processor, the monitoring application comprising: logic that selects a second one of the endpoints; logic that generates a status request to send to the second one of the endpoints to test a respective one of the communication pathways; logic that includes a predefined number of the status request results in the status request; and logic that determines a status score for individual ones of the endpoints indicating an operability of a respective one of the endpoints, wherein the status score for the individual ones of the endpoints is determined from an average of a plurality of status values stored in association with the respective one of the endpoints.