Patent ID: 8044392

Claim:
A display device, comprising: an insulating substrate; a plurality of gate lines formed on the insulating substrate, the plurality of gate lines including a plurality of gate electrodes; a gate insulating layer covering the plurality of gate lines; a plurality of data lines formed on the gate insulating layer and comprising a lower layer and an upper layer; a plurality of source electrodes and a plurality of drain electrodes formed on the gate insulating layer and being spaced apart from each other to define a channel region disposed therebetween; an organic semiconductor layer formed on the channel region for each pixel, and physically in contact with the source electrode and the drain electrode, a predetermined portion of the organic semiconductor layer overlapping portions of the source electrode, and the drain electrode, to form a transistor along with the gate electrode; and a plurality of pixel electrodes formed directly on the gate insulating layer, wherein the source electrodes, the drain electrodes, and the pixel electrodes are formed with the same layer as the lower layer of the data lines.