Patent ID: 6965615

Claim:
A method for striping packets across pipelines of a processing engine within a network switch, the processing engine having a plurality of processors arrayed as pipeline rows and columns embedded between input and output buffers, the method comprising the steps of: including a context memory in each pipeline row; organizing the context memory as a plurality of window buffers of a defined size; apportioning each packet into contexts corresponding to the defined size associated with each window buffer by, segmenting the packet into fixed sized contexts at the input buffer; sequentially passing the contexts to the clusters; and storing the fixed sized contexts in appropriate window buffers of the context memories; correlating each context with a relative position within the packet to thereby facilitate reassembly of the packet at the output buffer, while obviating out-of-order issues involving the contexts of the packet; organizing the processors and context memory of each pipeline row as a cluster; changing the size of a fixed sized context at the context memory of a cluster; deleting a portion of the fixed sized context stored in the window buffer; and substituting the deleted portion of the context with information stored at another location of the context memory.