Patent ID: 8028183

Claim:
A computer implemented method for determining a safe lower bound for a commonly powered data processing system, the method comprising: operating the data processing system using at least one nominal operating parameter during an exploration periodicity; wherein the at least one nominal operating parameter is clock speed; determining whether a calibration period is occurring; calibrating the data processing system up to a measurement interval duration expiration, wherein calibrating comprises setting the clock speed of at least one integrated circuit of the data processing system to a performance floor; responsive to setting the clock speed, determining whether system utilization of the data processing system exceeds the utilization threshold; allowing a delay before measurement after setting the clock speed; responsive to allowing a delay before measurement, accumulating at least two power measurements; averaging the at least two power measurements to form a power average; determining whether the power average exceeds a maximum power average; responsive to a determination that the power average exceeds the maximum power average, storing the power average as the maximum power average; and setting a minimum power cap based on the maximum power average; and repeating operating the data processing system using the at least one nominal operating parameter.