Patent ID: 7466182

Claim:
A level shift circuit, comprising: a first voltage level transfer unit, for transferring the voltage level of a first input signal from a first voltage level to a second voltage level and outputting a first level transferred control signal; a second voltage level transfer unit, for transferring the voltage level of a second input signal from the first voltage level to the second voltage level and outputting a second level transferred control signal; and a control block circuit coupled to the first voltage level transfer unit and the second voltage level transfer unit, for outputting an output signal according to the first level transferred control signal and the second level transferred control signal; wherein the first input signal and the second input signal are inversed; and the first voltage level transfer unit comprises: a first NMOS transistor having a source, a drain and a gate, the source of the first NMOS transistor being coupled to the first supply voltage with first voltage level, the gate of the first NMOS transistor being used to receive the first input signal; and a first PMOS transistor having a source, a drain and a gate, the drain of the first PMOS transistor being coupled to the drain of said first NMOS transistor, the gate of the first PMOS transistor being coupled to the second supply voltage with second voltage level, the source of the first PMOS transistor being used to output the first level transferred control signal and coupled to the control block circuit.