Patent ID: 7692473

Claim:
A switch circuit comprising: first and second input-output terminals; a MOS transistor, whose source is connected to the first input-output terminal, and whose drain is connected to the second input-output terminal; a first rectifying unit, connected between the first input-output terminal and a back gate of the MOS transistor, which has a same rectifying direction as a first parasitic diode and is connected in parallel with the first parasitic diode, the first parasitic diode being parasitic between the source and the back gate of the MOS transistor, the first rectifying unit not being parasitic; a second rectifying unit, connected between the second input-output terminal and the back gate of the MOS transistor, which has a same rectifying direction as a second parasitic diode and is connected in parallel with the second parasitic diode, the second parasitic diode being between the drain and the back gate of the MOS transistor, the second rectifying unit not being parasitic; and a control unit operable to control an on-off state of the MOS transistor based on a control signal.