Patent ID: 8890253

Claim:
A semiconductor device, comprising: a substrate including a first epitaxial layer that has a first electrical type, and a second epitaxial layer that has a majority carrier concentration less than that of said first epitaxial layer, and that has an upper surface opposite to said first epitaxial layer; a transistor that is formed above said first epitaxial layer, and that includes a source region disposed underneath said upper surface of said second epitaxial layer and away from said first epitaxial layer; an inner surrounding structure including an annular trench that is defined by a trench-defining wall and indented annularly from said upper surface of said second epitaxial layer toward said first epitaxial layer in a longitudinal direction to surround said transistor, and an insulating spacer that is formed on and entirely contacts said trench-defining wall; an outer surrounding structure that has a second electrical type opposite to said first electrical type, that is disposed adjacent to said upper surface of said second epitaxial layer to surround and contact said inner surrounding structure, and that is spaced apart from said transistor by said inner surrounding structure; and a conductive structure connecting to said source region, and said inner and outer surrounding structures; wherein the semiconductor device comprises a plurality of said transistors surrounded by said inner surrounding structure and by said outer surrounding structure, said conductive structure is free from direct contact of said second epitaxial layer of said substrate, and said outer surrounding structure and said substrate cooperatively constitute a diode that is isolated from said transistors by said inner surrounding structure.