Patent ID: 8890167

Claim:
An array substrate for a display device, comprising: a substrate; a gate line formed on the substrate along a first direction; a data line formed over the substrate along a second direction, wherein the data line and the gate line cross each other to define a pixel region; a thin film transistor formed in the pixel region, and having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode; a passivation layer on the drain electrode and comprising a drain contact hole; a drain contact pattern formed in the drain contact hole and contacting the drain electrode, wherein an outermost boundary of the drain contact pattern is disposed within an outermost boundary of the drain electrode; a pixel electrode formed in the pixel region and connected to the drain electrode, wherein the pixel electrode covers and contacts the drain contact pattern such that the drain contact pattern is disposed between the drain electrode and the pixel electrode; a first auxiliary gate pattern formed over the gate line and contacting the gate line; and a first auxiliary data pattern formed over the data line and contacting the data line.