Patent ID: 8004905

Claim:
A nonvolatile memory used in a nonvolatile memory apparatus by receiving an instruction from a control device in the nonvolatile memory apparatus, comprising: a plurality of nonvolatile memory cells, each of which is capable of storing data in accordance with difference of a threshold voltage thereof; a plurality of word lines, each of which is coupling with corresponding memory cells; and a sequencer for controlling accessing to the nonvolatile memory cells in accordance with the instruction, wherein the sequencer performs an erase operation in response to an erase instruction that the threshold voltage of all of the nonvolatile memory cells coupled with a selected word line move over a first boundary voltage indicating an erase state, wherein the sequencer is capable of performing an program operation in response to a program instruction that the threshold voltage of first ones of the nonvolatile memory cells coupled with a selected word line move over a second boundary voltage indicating a program state from the erase state when second ones of the nonvolatile memory cells coupled with the selected word line have been in the program state.