Patent ID: 7816661

Claim:
A memory device, comprising: a first electrode element having a top surface; a cap layer overlying the first electrode element, the cap layer having an outer surface with a lateral dimension; a programmable resistive element having an outer surface with a lateral dimension, a bottom surface in contact with the top surface of the first electrode element, and a top surface in contact with a bottom surface of the cap layer, wherein the lateral dimension of the programmable resistive element is less than the lateral dimension of the cap layer; a second electrode element extending through an opening in the cap layer to contact the top surface of the programmable resistive element; and side walls comprising dielectric fill material, on the outer surface of the cap layer and extending to the top surface of the first electrode element, such that at least a portion of the outer surface of the programmable resistive element is spaced away from the side walls to define a gas-filled thermal isolation cell surrounding at least a portion of the outer surface of the programmable resistive element.