Patent ID: 7492778

Claim:
A time division multiplex switch supporting multi-rate input and output serial data streams, comprising: a plurality of input registers for receiving multiple serial input data streams having different data rates ranging from the fastest to the slowest; a plurality of output registers for outputting multiple serial output data streams; a data memory for temporarily storing data to be switched between said input and output streams, said data memory having a first and second main buffer portions for storing successive frames of data; a connection memory for storing connection paths for said switched data; a controller for switching data from said input data streams between said first and second main buffer portions of said data memory at a first frame boundary determined by said input stream with the fastest data rate; and first and second buffer extensions associated respectively with said first and second buffer portions for storing residual frame data from the remaining input data streams in the same frame and arriving after said first frame boundary, said first and second buffer extensions having a smaller memory size than said main buffer portions, said controller being programmed to switch said first and second buffer extensions at a second frame boundary determined by the input stream with the slowest data rate.