Patent ID: 6963343

Claim:
A memory subsystem, comprising: a first memory array segmented into M memory sub-arrays having at least one functional memory sub-array, each of the functional memory sub-arrays being assigned to a respective block of memory and any faulty memory sub-arrays being left unassigned; a first memory controller coupled to receive memory access requests to a block of memory to which a functional memory sub-array from the first memory array is assigned and further coupled to the first memory array to access the functional memory sub-array assigned to the requested block of memory, the first memory controller having a first register having at least M+1 register fields, a first of the register fields storing a value indicative of the number of functional memory sub-arrays of the first memory array, and M register fields each for storing a value indicative of which of the M sub-arrays correspond to the respective blocks of memory; a second memory array segmented into N memory sub-arrays, a number of which are functional, each of the functional memory sub-arrays of the second memory array assigned to a respective block of memory and any faulty memory sub-arrays left unassigned; a second memory controller coupled to receive memory access requests to a block of memory to which a functional memory sub-array of the second memory array is assigned and further coupled to the second memory array to access the functional memory sub-array assigned to the requested block of memory, the second memory controller having a second register having at least N+1 register fields, a first of the register fields storing a value indicative of the number of functional memory sub-arrays of the second memory array, and N register fields each for storing a value indicative of which of the N sub-arrays correspond to the respective blocks of memory; and a memory controller bus coupled between the first and second memory controllers to pass a memory access request from one memory controller to the other in response to receiving a memory access request to access a memory location within the memory array coupled to the other memory controller.