Patent ID: 8681089

Claim:
A touch display comprising: a first substrate formed with a common electrode; a second substrate formed with a gate line and a data line, wherein a first thin film transistor and a pixel electrode is provided in a pixel region defined by the gate line and the data line, the pixel electrode is connected with the first thin film transistor, and the pixel electrode and the common electrode form a liquid crystal capacitor; a touch element provided in the pixel region in the second substrate, connected to the pixel electrode, and used to sense a touch voltage reflecting the change of liquid crystal capacitance of the liquid crystal capacitor formed by the pixel electrode and the common electrode at a touch point; and a touch processing device connected with the touch element and used to obtaining a position coordinates of the touch point according to a touch voltage, wherein, the first thin film transistor comprises a first gate electrode, a first source electrode and a first drain electrode, the first gate electrode is formed on the second substrate; a gate insulating layer is formed on the first gate electrode; a first active layer, comprising a stack of a semiconductor layer and a doped semiconductor layer, is formed on the gate insulating layer; the first source electrode is formed on the first active layer with one end of the first source electrode being located above the first gate electrode and another end thereof being connected with the data line; the first drain electrode is formed on the first active layer with one end of the first drain electrode being located above the first gate electrode and another thereof being connected with the first drain electrode of the first thin film transistor; a first TFT channel region is formed between the first source electrode and the first drain electrode with the doped semiconductor layer being completely removed and the semiconductor layer being partially etched in a thickness direction in the first TFT channel region so that the semiconductor layer in the first TFT channel region is exposed; a passivation layer is formed on the data line, the first source electrode, the first drain electrode and the first TFT channel region; and a third through hole, by which the first drain electrode and the pixel electrode are connected, is provided in the passivation layer.