Patent ID: 7760320

Claim:
A liquid crystal display device, comprising: a first substrate having an active region and a non-active region along a peripheral portion of the active region; a second substrate facing and spaced apart from the first substrate, and having an active region and a non-active region along a peripheral portion of the active region; a seal pattern between the first and second substrates disposed along a border of the active and non-active regions; a gate line on an interior surface of the first substrate and crossing the seal pattern; a data line crossing the gate line and the seal pattern; a thin film transistor connected to the gate line and the data line, the thin film transistor includes an active layer, and source and drain electrodes; a pixel electrode connected to the thin film transistor; a common electrode on an interior surface of the second surface; a first step-compensating pattern adjacent to the seal pattern and the gate line; a second step-compensating pattern adjacent to the seal pattern and the data line; a liquid crystal material layer between the pixel electrode and the common electrode; a gate pad connected to the gate line and a data pad connected to the data line, wherein the gate pad and the data pad are disposed at the non-active regions, wherein the first step-compensating pattern is formed under the seal pattern between adjacent gate lines, wherein the second step-compensating pattern is formed under the seal pattern between adjacent data lines, wherein a first thickness between the first substrate and the seal pattern including the gate line is smaller than a second thickness between the first substrate and the seal pattern including the first step-compensating pattern, and wherein a third thickness between the first substrate and the seal pattern including the data line is larger than a fourth thickness between the first substrate and the seal pattern including the second step-compensating pattern.