Patent ID: 8561044

Claim:
A method, in a data processing system, for optimizing regular memory references in original computer code, comprising: parsing the original computer code to identify memory references in the original computer code; classifying the memory references in the original computer code as either regular memory references or irregular memory references, wherein accesses to a software cache by regular memory references are controlled by a high locality cache mechanism; transforming the original computer code, by a compiler, to generate transformed computer code; and outputting the transformed computer code for generating executable code to be executed on a computing device, wherein transforming the original computer code comprises: grouping regular memory references into one or more memory reference streams, each memory reference stream having a leading memory reference, a trailing memory reference, and one or more middle memory references; and inserting, into the original computer code, instructions to execute initialization, lookup, and cleanup operations associated with the leading memory reference and trailing memory reference in a different manner from initialization, lookup, and cleanup operations for the one or more middle memory references, wherein regular memory references are memory references with high spatial locality and have a constant strided access pattern, and wherein irregular memory references are memory references that do not expose a high spatial locality or constant strided access pattern, wherein inserting instructions in the original computer code includes inserting instructions for the one or more middle memory references to determine which cache handle of the two cache lines to use for each of the one or more middle memory references.