Patent ID: 7506795

Claim:
A method of fabricating a microelectronic package, comprising: providing a microelectronic device comprising a microelectronic die and a carrier substrate, the microelectronic die having a die active side and a die back side opposite the die active side, the carrier substrate having a substrate active side and a substrate back side opposite the substrate active side, the die active side electrically coupled to the substrate active side; providing reflowable thermal conductive interface material on the die back side, the interface material having a peripheral edge defining a center and an interface material lateral dimension, and providing the microelectronic device with one or more die diffusion bonding aid materials on the die back side, the one or more die diffusion bonding aid materials adapted to aid in the diffusion bonding of the die to the reflowable thermal conductive interface material; placing a thermally conductive heat dissipation device onto the interface material, the heat dissipation device having a dissipation device lateral dimension larger than the interface material lateral dimension; applying and removing pressure and heat to the heat dissipation device opposite the interface material to be conducted through the heat dissipation device to the interface material and producing thereby liquefaction followed by solidification of the material, the solidification occurring progressively from the center to the peripheral edge.