Patent ID: 7692951

Claim:
A resistance change memory device comprising: a semiconductor substrate; at least one cell array, in which memory cells are arranged, formed above the semiconductor substrate, each memory cell having a stack structure of a variable resistance element and an access element, the variable resistance element being set at a resistance value, the access element having such an off-state resistance value in a certain voltage range that is ten times or more as high as that in a select state; and a read/write circuit formed on the semiconductor substrate as underlying the cell array for data reading and data writing in communication with the cell array, wherein the variable resistance element has a recording layer with a first composite compound and a second composite compound stacked thereon, and wherein the first composite compound is a metal oxide expressed by ZnM 2 O 4 (where “M” is one selected from Mn and Co) while the second composite compound is another metal oxide expressed by A x MO 2 (where “A” is one selected from Zn and Mg with a non-zero molar ratio “x”; and “M” is one selected from Ti and Mn).