Patent ID: 8432718

Claim:
A semiconductor memory device comprising: a bit comprising a thin film transistor; a row decoder connected to a word line; a column decoder configured to select a bit line; and a readout circuit electrically connected to the bit line selected by the column decoder; the thin film transistor comprising: a first gate electrode; a first insulating layer over the first gate electrode; an oxide semiconductor layer over the first insulating layer; a source electrode and a drain electrode in electrical contact with the oxide semiconductor layer; a second insulating layer over the source electrode and the drain electrode; and a second gate electrode over the second insulating layer, wherein the word line is connected to one of the first gate electrode and the second gate electrode, wherein the bit line is connected to one of the source electrode and the drain electrode, and wherein a portion of the other of the first gate electrode and the second gate electrode is capable of transmitting an ultraviolet light.