Patent ID: 6982216

Claim:
A method of fabricating a MOSFET device, comprising: forming a semiconductor device having a substrate on which a gate conductor having sidewalls separates a source region and a drain region, and having an oxide layer formed over the gate sidewalls and a portion of the substrate; implanting ions of a first conductivity into the source and the drain regions to define source and drain extensions that respectively extend in part under the gate conductor; forming a nitride layer over the oxide layer that extends over said portion of the substrate; performing an angled ion implant during which the gate conductor shields a portion of the nitride layer over at least a portion of the drain region from damage by the angled ion implant, such that the angled ion implant selectively damages portions of the nitride layer in which ions are implanted to form damaged portions of the nitride layer; removing the damaged portions of the nitride layer while leaving undamaged portions of the nitride layer as a nitride mask to protect at least a portion of the source and drain extensions from a subsequent dopant implant; implanting ions of the first conductivity type into the source region and the drain region while using the undamaged portions of the nitride layer as a mask to form deep source and deep drain regions, respectively; and forming a conductive layer over exposed portions of the deep source region and the deep drain region such that a lateral distance between an edge of the conductive layer over the source region and an end of the source extension under the gate conductor is less than a lateral distance between an edge of the conductive layer over the drain region and an end of the drain extension under the gate conductor.