Patent ID: 7214961

Claim:
A semiconductor testing device for, with a semiconductor wafer mounted as a test piece on a measuring substrate, conducting an evaluation test on the semiconductor wafer by applying an evaluation test signal to the semiconductor wafer through the measuring substrate, the semiconductor testing device comprising: a high temperature chamber for setting a temperature of the semiconductor wafer mounted on the measuring substrate at a temperature required for an evaluation test; and a wafer supporting member for supporting the semiconductor wafer when the semiconductor wafer is mounted on the measuring substrate, the measuring substrate being a substantially oblong steel plate whose surface is coated with an insulating film capable of withstanding high temperatures required for evaluation tests, the measuring substrate being provided with holes therethrough for exposing a pad of each of the dies of the semiconductor wafer mounted on the measuring substrate, the semiconductor wafer being supported by said wafer supporting member on one side of the measuring substrate, and the other side of the measuring substrate being provided with a wiring pattern for transmitting the evaluation test signal to the semiconductor wafer supported on the measuring substrate, the measuring substrate being set for the evaluation test so that, with the pad of each of the dies and the wiring pattern being wire bonded through the holes, a mount part of the semiconductor wafer and a terminal part for applying the evaluation test signal are placed respectively inside and outside of said high temperature chamber.