Patent ID: 8724764

Claim:
A system, comprising: a phase detector configured to receive an input signal and an output signal and generate a phase error signal indicating a phase error by comparing the input signal and the output signal; a first filter coupled to the phase detector and configured to generate a first control signal derived from the phase error signal; a pattern error detector configured to receive the input signal and the output signal and generate a pattern error signal specifying a pattern error of the input signal by comparing the input signal and the output signal; a second filter coupled to the pattern error detector and configured to generate a second control signal derived from the pattern error signal; and a controlled oscillator coupled to the first filter and the second filter; wherein the controlled oscillator is configured to generate the output signal responsive to the first control signal, the second control signal, and a center frequency signal; wherein the controlled oscillator comprises: an adder configured to add the first control signal, at least one bit from the output signal, and an adjusted center frequency signal and generate a sum; an accumulator coupled to the adder and configured to generate the output signal; and a center frequency adjustment module configured to adjust the center frequency where an average of the adjusted center frequency generated by the center frequency adjustment module is equal to the center frequency; and wherein the center frequency adjustment module comprises: a second adder configured to add the second control signal with the center frequency signal and generate a second sum; a difference module configured to subtract the second control signal from the center frequency signal and generate a difference; and a multiplexer coupled to the second adder and the difference module and configured to pass either the second sum or the difference as the adjusted center frequency signal responsive to a control signal comprising at least one bit of the output signal.