Patent ID: 8569878

Claim:
A semiconductor substrate having a plurality of groove portions formed along scribe lines, comprising: a device region in contact with at least any one of the plurality of groove portions and having a semiconductor device formed therein; a surface insulating layer formed to cover the device region and constituting a surface layer of the semiconductor substrate; a wiring electrode connected to the semiconductor device and formed in a protruding shape rising above an outer surface of the surface insulating layer; and an in-groove insulating portion formed inside the groove portions, wherein the outer surface of the surface insulating layer and a surface of the in-groove insulating portion are substantially parallel throughout an upper surface of the device region arranged near the wiring electrode, the surface insulating layer is disposed at the outermost position of the semiconductor substrate, except at portions where the wiring electrodes are formed, and a plurality of the wiring electrodes are arranged along at least any one of the plurality of groove portions and form a wiring electrode group having an unevenly distributed structure in which extended terminal portions thereof are unevenly extended at a part of all of the groove portions in contact with the device region.