Patent ID: 8395421

Claim:
A buffer circuit comprising: first and second inputs; and first and second outputs; wherein the buffer circuit is configurable to buffer a differential input signal received at the first and the second inputs to generate a differential output signal at the first and the second outputs in a current mode logic buffer mode, and wherein the buffer circuit is configurable to buffer the differential input signal to generate the differential output signal in an H-bridge buffer mode; first and second resistors; and a first switch circuit coupled to the first and the second resistors, wherein the first switch circuit is operable to couple the first and the second resistors to a node at a first voltage when the buffer circuit is configured to function in the current mode logic buffer mode, and wherein the first switch circuit is operable to couple the first and the second resistors to a node at a second voltage when the buffer circuit is configured to function in the H-bridge buffer mode.