Patent ID: 7274233

Claim:
A digital storage element, comprising: a master transparent latch that receives functional data signals from data input ports and a scan data signal from a scan input port, the master transparent latch having a four-input, one-output multiplexer adapted to receive the functional data signals and to selectively output one of said functional data signals; and a slave transparent latch coupled to said master transparent latch, said slave transparent latch comprising dedicated functional data and scan data output ports; wherein, while operating in a scan mode, a first clock signal is used by the slave transparent latch and a second clock signal is used by the master transparent latch, wherein the first and second clock signals are non-overlapping; wherein the multiplexer comprises a first sub-multiplexer, a second sub-multiplexer, a first pass gate coupled to the first sub-multiplexer and a second pass gate coupled to the second sub-multiplexer, two of said functional data signals passed through the first sub-multiplexer to produce a first output, and another two of said functional data signals passed through the second sub-multiplexer to produce a second output.