Patent ID: 8713563

Claim:
A data processor comprising: a central processing unit, in which a plurality of virtual machines, each running an application program under controls of different operating systems, and a virtual machine manager for controlling the plurality of virtual machines, are selectively arranged according to information set in mode registers, wherein the mode registers include a virtual machine identification (ID) register, a CPU operating mode register, and an expanded CPU operating mode register; a resource access management module for managing access to a hardware resource available for the plurality of virtual machines, the resource access management module including a control register and a comparison circuit, wherein the control register stores read protect information and write protect information for each respective virtual machine to access the hardware resource; and an internal bus connecting the central processing unit and the resource access management module, wherein the resource access management module accepts, as inputs, the information set in the mode registers and access control information of the central processing unit to the hardware resource from the central processing unit via the internal bus, wherein the access control information includes an identification number of the virtual machine which requests said access to the hardware resource, wherein the resource access management module compares the information thus input with information set in the control register included in the resource access management module using the comparison circuit, and controls access to the hardware resource based on the access control information, and wherein the resource access management module further includes another comparison circuit and is configured to control access to the control register using said another comparison circuit.