Patent ID: 7765389

Claim:
A computer program product for executing a machine instruction in a central processing unit, the computer program product comprising: a computer readable storage medium readable by a processor and storing instructions for execution by the processor for performing a method comprising: obtaining a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising an opcode; and performing a function defined by the opcode of the machine instruction, said function comprising: saving a portion of a control register to be used as one or more signaling indicators; placing contents of a source operand designated by the machine instruction in the control register; determining whether an interruption is to be invoked; providing an indication of an exception, in response to determining that the interruption is to be invoked, said indication specifying that the exception is a simulated exception for a routine simulating an operation; and providing a status indication, in response to determining that an interruption is not to be invoked, the status indication specifying an exception if an exception was indicated by the routine.