Patent ID: 8766675

Claim:
A circuit, comprising: a pull down circuit comprising a first PFET and a second PFET connected in series between a pad of a Universal Serial Bus (USB) circuit and ground; a pull up circuit comprising a first NFET and a second NFET connected in series between the pad and a supply voltage; a third PFET connected to a gate of the first PFET and a gate of the second PFET; a third NFET connected to a gate of the first NFET and a gate of the second NFET; a fourth PFET connected to the first NFET and the second NFET; and a fourth NFET connected to the first PFET and the second PFET, wherein a pad voltage has a nominal minimum and a nominal maximum; and each of the first PFET, the second PFET, the first NFET, and the second NFET has a nominal voltage that is less than the pad voltage nominal maximum.