Patent ID: 8705263

Claim:
A programmable non-volatile configuration storage bit circuit on a substrate with a logic circuit, the programmable non-volatile circuit comprising: a first floating gate associated with a first non-volatile device; a second floating gate associated with a second non-volatile device; a first drain region associated with said first non-volatile memory device; and a second drain region associated with said second non-volatile memory device; wherein the first drain region and the second drain region overlap respective sufficient portions of said first floating gate and said second floating gate to serve as first and second capacitive couplings, respectively, to the first floating gate and the second floating gate, such that a programming voltage applied to said first drain region or said second drain region can be imparted, respectively, to said first floating gate or said second floating gate through the first capacitive coupling or the second capacitive coupling, respectively; an output coupled to said first non-volatile device and said second non-volatile device; wherein a value of said output of said programmable non-volatile circuit is based on a programmed state of said first non-volatile device and said second non-volatile memory device and can be used to configure a function to be performed by the logic circuit.