Patent ID: 8611165

Claim:
A non-volatile memory device comprising: a first block including first memory cells that store a first data group including test data on a single-bit basis; a second block including second memory cells that store a second data group including data complementary to each data of the first data group on a single-bit basis; at least one differential sense amplifier that receives a first input signal and a second input signal and generates an output value based on a difference therebetween; a diagnostic circuit that performs a failure diagnosis using the output value of the differential sense amplifier; and a control circuit that performs selection of the first and second input signals and control of the diagnostic circuit, wherein the control circuit performs control such that a signal based on the test data is set to the first input signal, a signal based on the data complementary to the test data out of the second data group is set to the second input signal, and the diagnostic circuit executes a sense amplifier test which is a failure diagnosis of the differential sense amplifier, and the diagnostic circuit executes a sense amplifier test using all output values of the differential sense amplifier.