Patent ID: 7519643

Claim:
A Montgomery multiplier circuit for providing security of information on smart cards from hacking by a differential power analysis attack, comprising: a first filter for receiving a first input signal and a second input signal represented by an asynchronous dual rail lines method, and selectively outputting the second input signal according to a logical value of the first input signal; a first carry save adder for outputting a sum and a carry of dual rail lines method by adding up a carry signal and a sum signal generated in a previous calculation procedure and an output signal from the first filter; a second filter for receiving a logical value of a least significant sum of the first carry save adder as a third input signal and a modular operation factor as a fourth input signal, and filtering the fourth input signal according to the third input signal; a second carry save adder for generating a sum and a carry of dual rail lines method, by adding up the carry and the sum from the first carry save adder and an output from the second filter; a carry storing unit and a sum storing unit for storing the carry and the sum from the second carry save adder, respectively; a carry propagation adder for calculating a final result by adding up data stored in the carry storing unit and the sum storing unit; and an operation completion sensor for deciding operation completion according to an output signal from the second carry save adder, wherein the first and second input signals are represented by the synchronous dual rail lines such that the dual rail lines represents one of the logic values for each of the first and second input signals for minimizing the difference of power consumption of the montgomery multiplier circuit.