Patent ID: 8659052

Claim:
A semiconductor device comprising a semiconductor substrate in which a diode region and an IGBT region are formed, wherein the diode region comprises: a first conductivity type anode layer exposed at an upper surface of the semiconductor substrate, a first conductivity type diode body layer formed on a lower surface side of the first conductivity type anode layer, a second conductivity type diode drift layer formed on a lower surface side of the first conductivity type diode body layer, a second conductivity type cathode layer formed on a lower surface side of the second conductivity type diode drift layer, and having a higher density of second conductivity type impurities than in the second conductivity type diode drift layer, a first layer disposed within a diode trench reaching the second conductivity type diode drift layer from the upper surface of the semiconductor substrate, and a second layer disposed within the first layer, and having a lower end of which located deeper than a boundary between the first conductivity type diode body layer and the second conductivity type diode drift layer, the IGBT region comprises: a second conductivity type emitter layer exposed at the upper surface of the semiconductor substrate, a first conductivity type IGBT body layer formed at a lateral side and a lower surface side of the second conductivity type emitter layer, and having a part of which exposed at the upper surface of the semiconductor substrate, a second conductivity type IGBT drift layer formed on a lower surface side of the first conductivity type IGBT body layer, a first conductivity type collector layer formed on a lower surface side of the second conductivity type IGBT drift layer, and an IGBT gate penetrating the first conductivity type IGBT body layer from the upper surface side of the semiconductor substrate and reaching the second conductivity type IGBT drift layer, the second layer pressures the first layer in a direction from inside to outside of the diode trench, a lifetime control region is formed in the second conductivity type diode drift layer at a depth of a lower end of the second layer, and a crystal defect density inside the lifetime control region is higher than a crystal defect density outside the lifetime control region.