Patent ID: 7418598

Claim:
An encryption circuit for simultaneously processing various encryption algorithms, the encryption circuit adapted to be coupled to a host computer system, the encryption circuit comprising: an input/output module coupled to the host computer system through a dedicated bus, the input/output module handling data exchanges between the host system and the encryption circuit, the input/output module comprising a microcontroller and a microcontroller control memory, the microcontroller control memory providing storage for program control of the microcontroller; an encryption module performing data encryption and decryption operations, as well as storage of all sensitive information of the encryption circuit; and isolation means comprising a dual port memory connected between the input/output module and the encryption module, the isolation means ensuring that the sensitive information stored in the encryption module is inaccessible to the host computer system, the dual port memory enabling parallelism between 1) the data exchanges performed by the input/output module and 2) the data encryption and decryption operations performed by the encryption module.