Patent ID: 8759872

Claim:
A method for forming an integrated circuit die containing multiple device types, comprising: forming a plurality of doped wells, at least some of the doped wells being secondarily doped to form screening layers for a first device type, at least some of the doped wells supporting a second device type; forming a threshold voltage tuning layer on the screening layers of the first device type doped to provide a threshold voltage set notch; forming a first channel layer on the threshold voltage tuning layer of the first device type; forming a second channel layer on doped wells of the second device type; and forming a plurality of gate stacks on the first and second channel layers, at least some gate stacks having a first work function and other gate stacks having a second work function; wherein forming the threshold tuning layer comprises implanting dopants such that a vertical dopant profile created by the first channel layer, the threshold voltage tuning layer, and the screening layer the threshold voltage set notch with a shallow notch configuration.