Patent ID: 8648786

Claim:
A liquid crystal display device comprising: a display panel including a display area and a non-display area surrounding the display area; a plurality of gate lines and data lines arranged on the display area to intersect each other, so as to define a plurality of pixel regions; a plurality of thin-film transistors formed at respective intersections of the gate lines and the data lines; a plurality of pixel electrodes formed on the respective pixel regions and connected to the thin film transistors; at least one first common line provided between the data lines and arranged parallel to the data lines; a plurality of second common lines provided between the gate lines and arranged parallel to the gate lines; a plurality of data pad portions on the non-display area, each data pad portion including data pad lines and common pad lines, the common pad lines supplying a common voltage to the at least one first common line and the plurality of second common lines; first data driver ICs connected to the respective data pad portions except for data pad portions at each end of the display panel; second data driver ICs connected to the data pad portions at each end of the display panel; at least one first common voltage input terminal provided in at least one of the first data driver ICs for supplying a common voltage to the at least one first common line via the common pad lines; at least one second common voltage input terminal provided in at least one of the second data driver ICs for supplying the common voltage to the plurality of second common lines; and at least one first common line connecting pattern for supplying the common voltage from the second common voltage input terminal to the plurality of second common lines, wherein the at least one first common line is formed of the same layer as the data lines, and the plurality of second common lines are formed of the same layer as the gate lines, and wherein the data pad lines, the common pad lines, the at least one first common line, and the first common line connecting pattern are formed of the same layer as the data lines.