Patent ID: 7844803

Claim:
A data processing device configured according to a device configuration so as to be capable of executing a program comprising an instruction, the device comprising a configurable functional unit for executing the instruction according to a configurable function that is configured outside the instruction, the configured function including an input ordering instruction, a configured logic function, and an output ordering instruction, the configurable functional unit including: a unit input for inputting a plurality of input bits of one or more source registers specified by the instruction, a unit output for outputting a plurality of output bits to a destination register specified by the instruction, a first programmable connection circuit that is configured to receive the plurality of input bits and selectively route the input bits to provide a set of logic input bits, based on the input ordering instruction, a plurality of independent configurable logic blocks for performing programmable logic operations to produce a set of logic output bits corresponding to the configured logic function being applied to the set of logic input bits, a second programmable connection circuit that is configured to receive the set of logic output bits and selectively route the logic output bits to provide the plurality of output bits that are directly output to the destination register, based on the output ordering instruction.