Patent ID: 7688093

Claim:
A device interface board for testing chips, cooperatively installed with one of a plurality of probe cards, each of said plurality of probe cards being provided with a specified wiring area and a first public signal area, said specified wiring area being electrically connected with said first public signal area, said first public signal area of each of said plurality of probe cards being located in a same particular area, and said specified wiring area of each of said plurality of probe cards being electrically connected with a testing jig and being different depending on a different testing jig; said device interface board comprises: a chip test area and a second public signal area, in which said chip test area is used to carry a chip under test and is electrically connected with said second public signal area, whereby, through electrical connection between the device interface board and said first public signal area of each of said plurality of probe cards, test signals of said testing jig are transferred to said chip under test and measured signals of said chip under test are fed back to said testing jig; wherein said second public signal area of said device interface board corresponds to said first signal public area of each of said plurality of probe cards, and said device interface board and each of said plurality of probe cards respectively include a power source signal block, a test input signal block and a test output block, and said test input signal block includes at least one of a digital signal block and an arbitrary wave generator block, so as to output test signals to the chip under test for testing.