Patent ID: 7361535

Claim:
A method for fabricating a thin film transistor, comprising: providing a substrate; forming a polycrystalline semiconductor layer over the substrate; forming a gate insulating layer on the polycrystalline semiconductor layer; forming a first gate electrode on the gate insulating layer using a mask; forming a low-density impurity regions by introducing low-density impurities into the polycrystalline semiconductor layer after blocking the polycrystalline semiconductor layer with the first gate electrode; forming a second gate electrode having a width greater than that of the first gate electrode on the gate insulating layer including the first gate electrode using the mask, the second gate electrode having a first portion disposed on an uppermost surface of the first gate electrode and extending parallel to the substrate and second portions having uniform thickness disposed along opposing sidewalls of the first gate electrode and extending perpendicular to the substrate; forming a high-density impurity regions by introducing high-density impurities into portions of the low-density impurity regions after blocking parts of the low-density impurity regions with the second gate electrode; and forming a source electrode and a drain electrode respectively contacted to the high-density impurity regions, wherein a thickness of the second portions of the second gate electrode are equal to a width of the low-density impurity regions and terminal ends of the second portions of the second gate electrode directly contact the gate insulating layer and are parallel to the substrate, and wherein the first and second gate electrodes are formed by the same mask.