Patent ID: 7129461

Claim:
A system for scanning an image, comprising: a plurality of CMOS imagers arranged end to end, each said CMOS imager including two series of pixels situated alongside one another and wherein one of the series of pixels is offset from the other of the series of pixels; two pairs of conductors extending along said series of pixels, with the pairs of conductors being associated with the respective series of pixels on said CMOS imager, and wherein each said pixel includes a respective pixel amplifier FET having a source electrode and a drain electrode which are respectively coupled to the conductors of the associated pair of conductors and in parallel to all other pixel amplifier FETs of said series; a plurality of jumper conductors connecting the conductors of each said pair of conductors of each said CMOS imager with the corresponding conductors of the remaining imagers; a pair of output amplifiers each including an additional FET and a feedback path coupled to a respective pair of conductors of at least one of said CMOS imagers; image control circuitry coupled to the series of pixels of said imagers; and image focusing means for forming an optical image onto said plurality of imagers.