Patent ID: 7119005

Claim:
An integrated circuit comprising: a semiconductor substrate having a first gate dielectric and a first gate respectively on and over the semiconductor substrate, the semiconductor substrate having a source/drain junction adjacent the gate dielectric; a first L-shaped liner over the semiconductor substrate around the first gate; a first L-shaped spacer on the first L-shaped liner; a first shaped spacer on the first L-shaped spacer; a first dielectric layer over the semiconductor substrate, the first L-shaped liner, the first L-shaped spacer, the first shaped spacer, and the first gate, the first dielectric layer having a local interconnect opening provided therein exposing the first gate and the source/drain junction in the semiconductor substrate; a second dielectric layer over the first dielectric layer, the second dielectric layer having a local interconnect opening provided therein; and a conductive material in the local interconnect opening in the second dielectric layer and the local interconnect opening in the first dielectric layer.