Patent ID: 7948270

Claim:
A system for voltage level translation in a serial data interface between transmitting and receiving circuits, comprising: an interface unit defining at least one signal path to the receiving circuit for an incoming signal transmitted by the transmitting circuit; a voltage sensing unit sensing an incoming voltage level of the incoming signal in said signal path; and, at least one switched capacitive segment disposed in said signal path, said switched capacitive segment being selectively switched between alternative operational configurations to translate the incoming signal in voltage to a preselected compatible level for the receiving circuit, said switched capacitive segment including: a first capacitive device disposed in said signal path; and, a second capacitive device in one of said operational configurations being coupled in parallel to said first capacitive device, said second capacitive device in the other of said operational configurations being decoupled from said first capacitive device to be coupled between a first reference voltage node at said incoming signal level and a second voltage reference node offset by a predetermined voltage shift therefrom; whereby the incoming signal is translated in voltage by said predetermined voltage shift for transmission to the receiving circuit.