Patent ID: 7379045

Claim:
A line driver circuit configured to drive a first line of an electro-optic device having a pixel identified by the first line and a second line intersecting the first line, comprising: a plurality of selector lines; and a plurality of I/O circuits each of which is electrically coupled to the plurality of selector lines; each of the plurality of I/O circuits including: an I/O terminal that is coupled to either a second line driver circuit for driving the second line or a display controller for controlling display of the electro-optic device; a first input buffer circuit that receives a first-voltage-level voltage from the I/O terminal and that outputs first-voltage-level voltage to a first selector line of the plurality of selector lines; a second input buffer circuit that receives a second-voltage-level voltage from the I/O terminal and that converts to the first-voltage-level voltage, the second input buffer circuit outputs the converted first-voltage-level voltage to the first selector line; a first output buffer circuit that receives the first-voltage-level voltage from the first selector line and that outputs the first-voltage-level voltage to the I/O terminal; a second output buffer circuit that receives the first-voltage-level voltage from the first selector line and that converts to the second-voltage-level voltage, the second output buffer circuit outputs the converted voltage to the I/O terminal; and a plurality of selector switches that electrically couple the first selector line to one of the first input buffer circuit, the second input buffer circuit, the first output buffer circuit, or the second output buffer circuit; and each one of the plurality of I/O circuit exclusively placing only one of the first input buffer circuit, the second input buffer circuit, the first output buffer circuit, or the second output buffer circuit in an operating mode while placing the other of the first input buffer circuit, the second input buffer circuit, the first output buffer circuit, and the second output buffer circuit in a non-operating mode.