Patent ID: 7321325

Claim:
A calibration circuit for adjusting a time constant of at least one integrator in a primary delta-sigma modulator that is configured to convert a continuous-time input signal into a primary discrete-time output sequence, the calibration circuit comprising: an auxiliary delta-sigma modulator comprising a continuous-time loop filter with at least one integrator that has a substantially similar circuit design as the integrator of the primary delta-sigma modulator, wherein the auxiliary delta-sigma modulator is configured to generate an error sequence and an auxiliary output sequence in response to a calibrating sequence; an estimator circuit configured to generate an estimation signal based on the error sequence and the auxiliary output sequence, wherein the estimation signal indicates relative error in a time constant of the integrator in the auxiliary delta-sigma modulator; and a controller circuit configured to adjust the time constant of the integrator in the primary delta-sigma modulator based on the estimation signal.