Patent ID: 8189363

Claim:
A resistance change memory comprising: a first cell array comprising a first memory cell array and a first reference cell array, the first memory cell array comprising a plurality of memory cells arranged in a row direction and a column direction, the first reference cell array comprising a plurality of reference cells arranged in the row direction, each of the memory cells comprising a variable resistive element which has two resistance states based on stored data, each of the reference cells comprising a reference value in order to determine a resistance state of the memory cell, a second cell array comprising a second memory cell array and a second reference cell array, the second memory cell array comprising a plurality of memory cells arranged in the row direction and the column direction, the second reference cell array comprising a plurality of reference cells arranged in the row direction, a first reference word line connected to each of the first reference cell array and a second reference word line connected to each of the second reference cell array; a plurality of word lines connected to rows of each of the first and second memory cell arrays; a plurality of bit lines connected to columns of each of the first and second cell arrays; and a sense amplifier shared by the first and second cell arrays and configured to detect data in an accessed memory cell by use of a reference cell, wherein a predetermined reference cell in the second reference cell array is used to read all the memory cells arranged in the first memory cell array.