Patent ID: 7251299

Claim:
A system for time delay estimation in a discrete time processing system, comprising: a cross correlator that performs cross correlation on a first signal and a second signal, such that cross correlated output signals are produced, said cross correlator performs cross correlation on a block-by-block basis using the relation R τ ⁡ [ k ] = λ ⁢ ⁢ R τ ⁡ [ k - 1 ] + ∑ i = ( k - 1 ) ⁢ B + 1 kB ⁢ x ⁡ [ i ] ⁢ y ⁡ [ i - τ ] to define said block-by-block cross correlation, wherein i is a sample index, k is block index, B is a block length, τ is a lag index, and λ is a forgetting factor; a lag smoother that performs smoothing on said cross correlated output signals, such that lag smoothed output signals are produced; and a select logic module for selecting a pre-defined number of highest peaks from a respective set indicative of said lag smoothed output signals to compute said time delay estimation.