Patent ID: 7408181

Claim:
A phase-change memory device comprising: a semiconductor substrate having a bottom structure; a interlayer dielectric formed on the semiconductor substrate to cover the bottom structure; a contact plug formed within the interlayer dielectric; a bottom electrode formed on the contact plug and a portion of the interlayer dielectric adjacent to the contact plug; a first oxide layer formed on the interlayer dielectric and the bottom electrode and having a contact hole for exposing the bottom electrode formed in the first oxide layer; a second oxide layer formed on the bottom electrode within the contact hole formed within the first oxide layer, such that a portion of the bottom electrode surrounding the second oxide layer is exposed; a phase-change layer formed between the second oxide layer and the side surface of the contact hole formed within the first oxide layer and on the second oxide layer and the exposed portion of the bottom electrode, such that exposed outer portions of the second oxide layer are covered by the phase-change layer; and a top electrode formed on the phase-change layer.