Patent ID: 6958514

Claim:
A semiconductor device comprising: a semiconductor substrate; a semiconductor layer formed above said semiconductor substrate; a plurality of unit cells each having a structure with a gate electrode disposed and formed above said semiconductor layer to have a stripe-like shape and with a source layer and a drain layer formed in said semiconductor layer to have stripe-like shapes respectively; a gate wiring line for mutually connecting together respective gate electrodes of said unit cells; a first main electrode being formed on a dielectric film covering said gate electrodes and said gate wiring line and being in contact with any one of the source layer and the drain layer of each said unit cell; an impurity diffusion layer formed in said semiconductor layer to a depth reaching said semiconductor substrate at a part immediately underlying said gate wiring line and not formed at a part immediately underlying a remaining one of the source layer and the drain layer of each said unit cell, said impurity diffusion layer being for permitting extension of the remaining one of the source and drain layers of each said unit cell up to said semiconductor substrate; and a second main electrode as formed at a back surface of said semiconductor substrate.