Patent ID: 7038260

Claim:
A junction field effect transistor (JFET) comprising: a semiconductor substrate having a top surface and a bottom surface, wherein the top and bottom surfaces each comprise a heavily doped layer to provide an ohmic contact; a first trench disposed in the top surface of said substrate; a continuous first gate region formed in the bottom of said first trench, said first gate region continuous in a lateral direction parallel to said top surface; a first buffer region formed beneath said first gate region; a second gate region formed beneath said first buffer region, wherein said second gate region is formed beneath said first gate region that is continuous and is narrower than said first gate region, wherein said second gate region is continuous in said lateral direction; a second trench disposed in the top surface of said substrate adjacent to said first trench; a continuous third gate region formed in the bottom of said second trench, said third gate region continuous in said lateral direction; a second buffer region formed beneath said third gate region; and a fourth gate region formed beneath said second buffer region, wherein said fourth gate region is formed beneath said third gate region that is continuous and is narrower than said third gate region, wherein said fourth gate region is continuous in said lateral direction.