Patent ID: 8363059

Claim:
A rendering processing apparatus comprising: a rasterizer, which rasterizes a rendering primitive in succession to generate a plurality of pixels; a shader having a plurality of arithmetic processing parts, which perform arithmetic processing on the plurality of pixels in parallel; and an exclusive control part, which locks a pixel subject to arithmetic processing so that an arithmetic processing part is configured to exercise exclusive control over arithmetic processing of the subject pixel, wherein the exclusive control part is operable: to maintain a lock cache that caches a sync start value and a sync end value for each positional address of a pixel subject to arithmetic processing; to assign a sync value to each of the plurality of pixels received by the rasterizer regardless of whether each of the plurality of pixels needs to be subject to exclusive control, the sync value of each of the received pixels being the sync start value indicated for the respective positional address contained in the lock cache; to update, when a same-position pixel is received by the rasterizer with an identical positional address to a pixel that has already been assigned a sync id, the sync start value for the positional address of the same-position pixel in the lock cache, and to give the same-position pixel a sync id of the newly-updated sync start value; and to make a determination to accept a lock request issued by the arithmetic processing part for a pixel subject to arithmetic processing.