Patent ID: 7292073

Claim:
A transmission line driver circuit that generates an output signal, comprising: a ramp generator that receives a speed signal and a level shifted data signal and generates a charge ramp signal and a discharge ramp signal; a pair of source follower transistors, including an NMOS source follower transistor having a gate connected to the ramp generator and receiving the charge ramp signal, and a PMOS source follower transistor having a gate connected to the ramp generator and receiving the discharge ramp signal, and a source connected to a source of the NMOS source follower transistor, wherein the output signal is generated at an output node between the sources of the NMOS and PMOS source follower transistors; a charge_ls generator circuit for generating a charge_ls signal; a discharge_ls generator circuit for generating a discharge_ls signal; and a pair of first protection transistors including a first NMOS protection transistor having a source connected to a drain of the NMOS source follower transistor, a drain connected to a first reference voltage (VUSB), and a gate connected to the charge_ls generator circuit and receiving the charge_ls signal, and a first PMOS protection transistor having a source connected to a drain of the PMOS source follower transistor, a drain connected to ground, and gate connected to the discharge_ls generator circuit and receiving the discharge_ls signal, wherein the output signal varies from the ground voltage to the first reference voltage (VUSB) and the NMOS and PMOS source follower transistors and the pair of first protection resistors comprise devices that operate at a second reference voltage level lower than the first reference voltage level.