Patent ID: 7671769

Claim:
A multistage analog/digital converter for converting, using conversion cycles each with plural steps, analog samples of an input signal into respective digital codes formed of bits, each cycle step resolving at least one bit of a respective one of the digital codes, the converter comprising: a sampling circuit having an input and an output, the sampling circuit being suitable to input said input signal and to output a first sequence of analog samples; a generation block structured to generate and output a pseudorandom sequence of output samples; a first summing node, such as to input said first sequence and said pseudorandom sequence and output a second sequence of analog samples, said second sequence including non-pseudorandom samples where said pseudorandom sequence is absent; conversion means, having a controllable digital gain, for converting samples of the second sequence to bits of said digital codes; a feedback loop with a loop gain and including an analog amplifier coupled between the output and input of said sampling circuit; and a digital calibration block structured to match the digital gain to the loop gain, the digital calibration block including a prediction block structured to produce a digital estimation of said input signal starting from the bits produced by said conversion means from converting said non-pseudorandom samples.