Patent ID: 7469311

Claim:
A bus interface, comprising: a set of N receivers to establish simplex connections with corresponding transmitters of another bus interface, where N is a positive whole number; a set of N transmitters to establish simplex connections with corresponding receivers of said another bus interface; a link control module to negotiate a bidirectional link with said another bus interface by configuring a number K of said set of receivers as part of a unidirectional sub-link in a downstream direction and configuring a number L of said set of transmitters as part of a unidirectional sub-link in an upstream direction, where K≦N and L≦N; and an asymmetry controller to select K and L to regulate an upstream bandwidth and a downstream bandwidth in response to a control signal, wherein the upstream bandwidth and the downstream bandwidth are independently selectable based on the selection of K and L with the power consumption of the bidirectional link also depending on the selection of K and L; the bus interface having a symmetric mode in which K=L and an asymmetric mode in which K≠L, the asymmetric mode being selected when the upstream traffic and downstream traffic are asymmetric to reduce bus power consumption.