Patent ID: 8730606

Claim:
An apparatus comprising: read channel circuitry comprising a decoder; and error correction circuitry associated with the read channel circuitry, the error correction circuitry comprising: a first calibrator configured to calibrate a first set of filters using a read channel data signal; a first detector having an input coupled to the output of the first calibrator, the first detector being configured to determine first hard decision information regarding the read channel data signal using the first set of calibrated filters; an error compensation module having an input coupled to an output of the first detector, the error compensation module being configured to determine an error corrected read channel data signal using the hard decision information from the first detector; a second calibrator having an input coupled to an output of the error compensation module, the second calibrator being configured to calibrate a second set of filters using the error corrected read channel data signal; and a second detector having a first input coupled to an output of the error compensation module, a second input coupled to an output of the second calibrator, and an output coupled to an input of the decoder, the second detector being configured to determine second hard decision information regarding the error corrected read channel data signal using the second set of calibrated filters; wherein the second hard decision information is decoded in the decoder.