Patent ID: 8183630

Claim:
A microelectronic device comprising: a substrate surmounted by a stack of layers, at least one first transistor situated at a given level of said stack, at least one second transistor situated at a second level of said stack, above said given level, the first transistor comprising a gate electrode situated opposite a channel zone of the second transistor, the first transistor and the second transistor being separated by an insulating zone, said insulating zone being constituted of several different dielectric materials including a first dielectric material and a second dielectric material, and having in a first region extending from a top surface of said gate electrode of said first transistor to a bottom surface of said channel of said second transistor, a composition and a thickness provided so as to form a first electric capacitance C 1 between the gate electrode of the first transistor and the channel of the second transistor, said first region only including the first dielectric material, said insulating zone comprising a second region that includes the second dielectric material extending from a bottom of the channel of the second transistor to a top surface of at least one access zone of the first transistor and having a thickness so as to form a second electric capacitance C 2 between said access zone of the first transistor an access zone of the second transistor, such that C 2 <C 1 .