Patent ID: 8653582

Claim:
A nonvolatile semiconductor memory device, comprising: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction, the selection gate electrode being disposed between the stacked structural unit and the insulating layer; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and at least a part of the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction, the first semiconductor pillar occupying a first space in the first annular configuration, and the first space extending in the first direction; a first core unit provided in the first space and extending in the first direction, an upper end of the first core unit being located below an upper face of the insulating layer, the upper face being opposite to a lower face of the insulating layer facing the selection gate electrode; and a first conducting layer provided on the first core unit to contact the first core unit, the first conducting layer piercing at least a part of the insulating layer in the first direction.