Patent ID: 7747825

Claim:
An apparatus for reducing the number of unnecessarily broadcast local requests to reduce access latency when accessing data from remote nodes in an SMP computer system, said apparatus comprising: a local node that includes a plurality of local processors, each one of said local processors including a cache; a remote node that includes a plurality of remote processors, each one of said remote processors including a cache; a bus for coupling said local node to said remote node, said bus for transmitting requests between the local node and the remote node; a shared invalid cache coherency protocol state that predicts that a memory read request to read a cache line of particular shared data can be located within a cache that is included in said local node; a memory read request to read a cache line, of said data, that is not currently in said shared invalid state being broadcast concurrently to said local node and said remote node; a memory read request to read a cache line, of said data, that is currently in said shared invalid state being broadcast first to all caches in said local node; in response to being unable to locate said memory read request within a cache that is included in said local node, said memory read request being broadcast to said remote node; said first processor in the local node snooping a memory access request to access said data; said first processor determining whether a cache line of said data exists within a cache that is included in said first processor; in response to said first processor determining that said cache line of said data exists within said cache that is included in said first processor, said first processor determining whether said memory access request indicates that a valid copy of said data exists within said local node; in response to said cache line of said data existing within said cache in said first processor, said first processor determining a current protocol state of said cache line; in response to determining that said memory access request indicates that a valid copy of said data exists within said local node and said current protocol state being an invalid state, said first processor transitioning said current state of said cache line to said shared invalid state from said invalid state; and in response to determining that said memory access request indicates that no valid copies of said data exist within said local node and said current protocol state being a shared invalid state, said first processor transitioning said current state of said cache line to said invalid state from said shared invalid state.