Patent ID: 8063437

Claim:
A semiconductor device, comprising: a first semiconductor region formed on a substrate and having an upper surface and a side surface; a first impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; a second impurity region of a first conductivity type formed in a side portion of the first semiconductor region; a gate insulating film formed so as to cover at least a side surface and an upper corner of a predetermined portion of the first semiconductor region; a gate electrode formed on the gate insulating film; an insulative sidewall spacer formed on a side surface of the gate electrode; a third impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; and a fourth impurity region of a first conductivity type formed in a side portion of the first semiconductor region, wherein: the first impurity region and the second impurity region are formed in another portion of the first semiconductor region other than the predetermined portion, the third impurity region and the fourth impurity region are formed in a portion of the first semiconductor region which is located outside the insulative sidewall spacer and is provided in the other portion of the first semiconductor region, and a radius of curvature r′ of an upper corner of a portion of the first semiconductor region located outside the gate insulating film is greater than a radius of curvature r of an upper corner of a portion of the first semiconductor region located under the gate insulating film and is less than or equal to 2r.