Patent ID: 7672989

Claim:
An unsigned multiplication method for multiplying a first multiplicand with a second multiplicand, the method comprising: (a) storing in a first register the first multiplicand as a first vector of at least one respective digit, each digit having a pre-determined number of bits; (b) storing in a second register the second multiplicand as a second vector of at least one respective digit, each digit having the pre-determined number of bits; (c) converting the digits of the first vector to corresponding digits of one bit less than the pre-determined number of bits each; (d) converting the digits of the second vector to corresponding digits of one bit less than the pre-determined number of bits each; and (e) generating a signed multiplication result, using a processor, all of whose multiplications are limited to signed multiplication, by multiplying each converted digit that corresponds to the first multiplicand by each converted digit that corresponds to the second multiplicand.