Patent ID: 7297618

Claim:
A method for selectively forming fully silicided (FUSI) gate electrode on gate dielectric, the method comprising: forming first and second sets of gate devices on a substrate; covering one or more of said first set of gate devices with a protective masking layer; removing selectively a Ge-containing silicon layer in a gate stack of one or more of said second set of gate devices to expose a silicon layer formed directly on top of a gate dielectric layer; removing said protective masking layer on said one or more of said first set of gate devices; covering said first set of gate devices and said second set of gate devices, including exposed said silicon layer, with a metal-containing layer; and annealing said first and second sets of gate devices to form selectively said FUSI gate electrode directly on top of said gate dielectric layer of said one or more of said second set of gate devices.