Patent ID: 7906833

Claim:
A semiconductor device, comprising: a semiconductor substrate comprising: a plurality of semiconductor chip formation regions; and a scribe region arranged between the plurality of the semiconductor chip formation regions and including a substrate cutting position; a semiconductor chip comprising an electrode pad and provided on the semiconductor chip formation region; a protective layer provided on the semiconductor substrate and extending across the semiconductor chip formation regions and the scribe region, said electrode pad being generally flush with an upper surface of said protective layer; a first insulation layer provided on the protective layer and extending across the semiconductor chip formation regions and the scribe region; a second insulation layer provided on the first insulation layer and defining openings at the scribe region; an internal connection terminal provided on the electrode pad and having an upper surface that is exposed from said first insulation layer; a wiring pattern formed on the first insulation layer and the internal connection terminal upper surface and comprising a metal layer to be electrically connected to the internal connection terminals; and an external connection terminal electrically connected to the wiring pattern, wherein a part of the first insulation layer corresponding to the substrate cutting position of the semiconductor substrate is exposed through the opening of the second insulation layer.