Patent ID: 7460441

Claim:
An apparatus for measuring a long time period, comprising: a clock interval counter having a clock input coupled to a system clock, wherein the clock interval counter begins counting system clock cycles after a start of an event and stops counting system clock cycles after an end of the event; a first time measurement unit comprising: a first constant current source; a first current steering switch coupled to the first constant current source; a first capacitor coupled to the first current steering switch, the first capacitor having a known value of capacitance, wherein a first voltage on the first capacitor increases substantially linearly in time when the first current steering switch couples the first constant current source to the first capacitor; a first circuit for controlling the first current steering switch, wherein the first current steering switch couples the first capacitor to the first constant current source when the first circuit detects the start of the event and decouples the first capacitor from the first constant current source when the first circuit detects the system clock cycle occurring after the start of the event; a second time measurement unit comprising: a second constant current source; a second current steering switch coupled to the second constant current source; a second capacitor coupled to the second current steering switch, the second capacitor having a known value of capacitance, wherein a second voltage on the second capacitor increases substantially linearly in time when the second current steering switch couples the second constant current source to the second capacitor; a second circuit for controlling the second current steering switch, wherein the second current steering switch couples the second capacitor to the second constant current source when the second circuit detects the end of the event and decouples the second capacitor from the second constant current source when the second circuit detects the system clock cycle occurring after the end of the event; an analog-to-digital converter (ADC) for converting the first and second voltages to first and second digital representations, respectively, thereof and a digital processor, wherein the digital processor converts the first and second digital representations of the first and second voltages, respectively, to first and second time values, respectively, reads the count of the system clock cycles from the clock interval counter, converts the count of the system clock cycles to a third time value, adds the first time value to the third time value, and subtracts the second time value from the sum of the first and third time values in determining a time period of the event.