Patent ID: 8787506

Claim:
A communications device comprising a decoder, wherein the decoder comprises: a first decoding circuit configured to: obtain a plurality of coded data bits ‘C’ from a convolutional coded bit stream that is half-rate convolutional coded according to generator polynomials G 0 =1+D 3 +D 4 and G 1 =1+D+D 3 +D 4 , where ‘D’ represents a bit location and where only three of four bursts of a data block of the convolutional coded bit stream are available; determine a decoded value for each information bit U 2k−1 at least by calculating a modulo 2 sum of a coded data bit C 4k added to another coded data bit C 4k +1 from the coded bit stream, where ‘k’ represents an index value between 0 and a number ‘n’ based on a number of bits in a burst of the bit stream; and determine a decoded value for each information bit U 2k at least by calculating a modulo 2 sum of a coded data bit C 2(2k+3) added to a previously calculated information bit U 2k+3 and to a previously calculated information bit U 2k−1 .