Patent ID: 8030730

Claim:
A semiconductor device, comprising: an insulating film formed on a main surface of a prescribed substrate; a semiconductor layer of a first conductivity type formed on said insulating film; an isolation region, continuously surrounding a prescribed region to be an element forming region in said semiconductor layer, formed from the surface of said semiconductor layer to a surface of said insulating film and having an inner sidewall and an outer sidewall; a first impurity region of a second conductivity type, opposite to the conductivity type of the semiconductor layer, formed continuously to be in contact with an entire surface of said inner sidewall of said isolation region, positioned between a portion of said semiconductor layer positioned in said prescribed region and said isolation region; and an element arranged in the prescribed region, said element comprising a transistor, said transistor including: a source region; a drain region; a body region; and a gate formed on the body region; another prescribed region to be another element forming region positioned outside said isolating region in said semiconductor layer; a second impurity region of the second conductivity type formed to be in contact with an entire surface of said outer sidewall of said isolation region, and positioned between a portion of said semiconductor layer positioned in said another prescribed region and said isolation region; an electrode electrically connected to the source region and the first impurity region to hold the first impurity region at a prescribed potential; and another electrode electrically connected to the second impurity region to hold the second impurity region at a prescribed potential.