Patent ID: 8761389

Claim:
A host device which executes an authentication process with a memory device which has a first area where read is restricted, and a readable second area and a readable third area, wherein the host device has first key data and a second key data set and is configured to: access the memory device; read family key block data from the readable third area, and process the family key block data using the first key data to obtain decoding data; read key index data from the readable second area to select, from the second key data set, the second key data corresponding to the key index data; generate number data, and generate session key data using the number data and the second key data corresponding to the key index data; and decode encrypted secret data, read from the readable second area, by family key data generated using the decoding data, to obtain secret data; and an acknowledgment unit configured to receive and acknowledge data generated by the memory device after a request for authentication is transmitted to the memory device; wherein data used for the authentication process with the memory device is generated by a one-way conversion process in which the session key data and the secret data are used as input values, second number data is assigned to the host device and is used in the memory device to generate second key data; and the number data and the second number data are transmitted to the memory device, along with the request for authentication.