Patent ID: 6946878

Claim:
An integrated circuit for converting a single-rail signal into a dual-rail signal, comprising: a clock signal connection for a clock signal; a data input having an input line to which a single-rail signal is applied; a data output on which a dual-rail signal is tapped off on output lines; and a converter, which is connected between the data input and the data output, that converts the single-rail signal into the dual-rail signal, wherein the converter comprises: a memory cell having an input connection connected to the data input on the integrated circuit and output connections, wherein in a transparent state, the output connections provide the dual-rail signal, which is logically valid; and a circuit arrangement, which is arranged between the output connections of the memory cell and the data output of the integrated circuit, that precharges the output lines connected to the output connections, and ensures a direct transition from a precharge phase to a logic state on the output lines, and vice versa.