Patent ID: 7851899

Claim:
A ball grid array package comprising: a base IC structure, the base IC structure comprising: a base substrate having a first base substrate face, a second base substrate face opposite to said first base substrate face, a base substrate opening extending between said first base substrate face and said second base substrate face, and a base conductor; a first semiconductor chip, comprising a first chip face, a second chip face opposite to said first chip face, and first bond pads disposed over said base substrate opening; and a first plurality of wires disposed to pass through said base substrate opening and electrically connecting said first bond pads to said base conductor; and a secondary IC structure, comprising: a second substrate having a first secondary substrate face, a second secondary substrate face opposite to said first secondary substrate face, a secondary opening extending between said first secondary substrate face and said second secondary substrate face, and a secondary conductor; a second semiconductor chip, comprising a first secondary chip face, and a second bond pad disposed over said secondary opening; and a second plurality of wires electrically connecting said second bond pads to said secondary conductor through said secondary opening; a first encapsulant filling said secondary opening around said second plurality of wires and covering said second secondary substrate face, wherein said first encapsulant provides a structure that enables mounting of said secondary IC structure on said base IC structure; and a third plurality of wires connecting said secondary IC structure to said base IC structure; wherein said secondary IC structure is adhesively mounted directly on said first chip face of said base IC structure.