Patent ID: 7193297

Claim:
A method for manufacturing a semiconductor device, comprising: preparing a semiconductor substrate including an integrated circuit, and a pad defining a through hole electrically connected to the integrated circuit; forming a convex section at a first surface where the pad is disposed in a region that overlaps the through hole in the semiconductor substrate; forming a dielectric layer on an inner surface of the convex section; forming an electrical connection section having a conductive section disposed inside the dielectric layer and a wiring section disposed on the first surface to be electrically connected to the conductive section; and exposing an end surface of the conductive section through a second surface of the semiconductor substrate on the opposite side of the first surface, the forming the electrical connection section including forming a patterned resist on the first surface, the electrical connection section being formed in a portion of the surface that is exposed through the patterned resist, the conductive section filling in the convex section to at least the first surface.