Patent ID: 8232164

Claim:
A method of forming a semiconductor structure, said method comprising: forming a trench isolation structure to define, in a semiconductor layer, a first semiconductor region and a second semiconductor region positioned laterally adjacent to said first semiconductor region; forming a first dielectric body on said first semiconductor region and a second dielectric body on said second semiconductor region; forming first dielectric spacers on first opposing sides of said first dielectric body; forming a sacrificial layer traversing a first center portion of said first semiconductor region over said first dielectric body and said first dielectric spacers and also traversing a second center portion of said second semiconductor region over said second dielectric body; depositing a blanket dielectric layer so as to cover first end portions of said first semiconductor region and second end portions of said second semiconductor region; planarizing said dielectric layer to expose said sacrificial layer; selectively removing said sacrificial layer; performing a directional etch process to remove exposed semiconductor material within said first center portion and said second center portion such that, after said performing of said directional etch process, said first center portion has a first width and said second center portion has a second width that is less than said first width.