Patent ID: 7276757

Claim:
A semiconductor device comprising: a semiconductor substrate including a first upper surface and a trench formed in the first upper surface; a first insulating film including a lower portion buried in the trench and an upper portion protruding from the first upper surface of the semiconductor substrate, the upper portion including a first side wall having a first upper end portion and a second upper surface having a second upper end portion located at a center of the second upper surface; a second insulating film which is formed on the first upper surface of the semiconductor substrate and is adjacent to the first insulating film; a floating gate electrode formed on the second insulating film, and including a third upper surface, a second side wall and a lower surface facing the second insulating film; a third insulating film formed on the floating gate electrode; and a control gate electrode formed on the third insulating film, wherein a height of the second upper end portion is lower than a height of the third upper surface and is higher than a height of the first upper end portion relative to the first upper surface, the first upper end portion is located at a position higher than the lower surface of the floating gate electrode, and the entire second side wall is aligned with the first side walls of the first insulating film.