Patent ID: 7277999

Claim:
A method performed in a computer system for enabling a first software entity to use an address space of a second software entity while preventing the second software entity from accessing memory of the first software entity, the computer system implementing segmented memory and memory paging, the computer system having a first operating mode in which a first set of one or more instructions accesses the memory of the first software entity and a second set of one or more instructions is to be prevented from accessing the memory of the first software entity, the computer system also having a second operating mode in which instructions are executed at a less-privileged level and in which a third set of instructions is to be prevented from accessing the memory of the first software entity, the method comprising: during the first operating mode, using effectively truncated memory segments for the second set of instructions, the effectively truncated memory segments excluding the memory of the first software entity; during the second operating mode, ensuring that either: a) memory paging protection is active so that the third set of instructions executed at the less-privileged level cannot access the memory of the first software entity; or b) completely truncated memory segments are used for the third set of instructions, the completely truncated memory segments excluding the memory of the first software entity; and during the second operating mode, if memory paging protection is active, using one or more untruncated memory segments for the third set of instructions, at least one of the untruncated memory segments including at least a portion of the memory of the first software entity.