Patent ID: 7160780

Claim:
A method of manufacturing a fin field effect transistor (fin FET), the method comprising: covering a bulk silicon substrate with a first hard mask layer; patterning the first hard mask layer such that a first portion of the bulk silicon substrate is exposed and a second portion of the bulk silicon substrate remains covered by the first hard mask layer; removing a part of the first portion of the bulk silicon substrate such that the second portion of the bulk silicon substrate forms a fin active region that protrudes along one direction from a remaining part of the first portion of the bulk silicon substrate; covering the fin active region with a shallow trench insulator formed on the bulk silicon substrate; removing the shallow trench insulator to form a trench that exposes an upper surface and a sidewall of the fin active region, the trench crossing the fin active region at least one time, wherein removing the shallow trench insulator comprises: depositing a second hard mask layer on the shallow trench insulator and patterning the second hard mask layer; depositing a spacer on a sidewall of the patterned second hard mask layer; and removing the shallow trench insulator to a predetermined depth using the spacer and the second hard mask layer as an etch mask; and depositing a gate insulation layer on the fin active region exposed by the trench to form a gate electrode.