Patent ID: 7575955

Claim:
A process for fabricating an electronic package substrate, comprising: fabricating a relatively stiff adhesive bonding member from a sheet of adhesive of sufficient thickness to act as a structural member; forming an orifice, with side walls, through the adhesive bonding member, and a frame of the adhesive bonding member surrounding the orifice; fabricating a circuitized member with an array of pads for both mechanically attaching and electrically connecting a flip chip thereon; aligning the adhesive bonding member and the circuitized member with the orifice in the adhesive bonding member aligned with the array of pads on the circuitized member; bonding the members together with heat and pressure; thereby forming a cavity, with the side walls of the orifice through the bonding member as side walls of the cavity and the circuitized member, with an array of pads for both mechanically attaching and electrically connecting a flip chip thereon, as a base of the cavity, surrounded by the frame of the adhesive bonding member, which itself acts as a structural support.