Patent ID: 8502284

Claim:
A semiconductor device comprising: a silicon substrate; a channel region formed in the silicon substrate, a conductivity type of the channel region being n-type; a gate electrode formed over the channel region of the semiconductor substrate; source/drain regions formed in the silicon substrate on both sides of the gate electrode, a conductivity type of the source/drain regions being p-type; buried semiconductor regions buried in the source/drain regions, for applying to the surface of the silicon substrate a first stress in a first direction; and stressor films formed on and in contact with the silicon substrate between the channel region and the buried semiconductor regions, for applying to the silicon substrate a second stress in a second direction which is opposite to the first direction, wherein the buried semiconductor regions are formed of a first semiconductor material whose lattice constant is larger than lattice constant of silicon, the stressor films are formed of a second semiconductor material whose lattice constant is smaller than the lattice constant of silicon, and the channel region is compressed by the first stress and the second stress.