Patent ID: 8125424

Claim:
A liquid crystal display device comprising: a power supply unit that outputs a plurality of drive voltages after delaying the drive voltages; a voltage detector that compares one of the drive voltages with a reference voltage, and outputs a power-off detect signal based on the result of the comparing; a timing controller that increases a frequency of a gate shift clock and enables a gate start pulse in response to the power-off detect signal, and outputs the frequency-increased gate shift clock and the enabled gate start pulse, wherein the enabled gate start pulse maintains in the enable state for a enable period of the power-off detect signal; a gate driver that outputs sequentially a scan signal of gate-on voltage in response to the enabled gate start pulse and the frequency-increased gate shift clock, wherein the gate-on voltage of the scan signal is maintained for the enable period of the power-off detect signal, wherein the gate start pulse is used in the gate driver before and after the power-off detect signal is enabled; a data driver that outputs a constant voltage in response to a control signal from the timing controller; and a liquid crystal panel that applies the constant voltage to sub-pixels of the liquid crystal panel in response to the scan signal, wherein the voltage detector compares a drive voltage adapted to drive the timing controller with the reference voltage, having a voltage of 60%˜85% of the drive voltage, wherein during the supply of the frequency-increased gate shift clock from the timing controller to the gate driver, the timing controller disables a flicker preventing signal and a gate output enable signal which are supplied to the gate driver, and wherein during the supply of the frequency-increased gate shift clock from the timing controller to the gate driver, the number of gate lines maintaining the gate-on voltage is increased more and more until all gate lines maintain the gate-on voltage.