Patent ID: 8276108

Claim:
A circuit design apparatus for generating design information of a circuit device, the apparatus comprising: an extracting unit that extracts information of a memory circuit with an error protection circuit from design information of a LSI, the error protection circuit being for performing an error protection over data stored in the memory circuit; a circuit arrangement controller that arranges design information of a check circuit into the design information of the LSI to generate the design information of the circuit device including the LSI and the check circuit, the check circuit including a storage circuit for storing a check signal and a controller circuit for controlling the storage circuit to output the check signal to the memory circuit extracted by the extracting unit in response to an external request, the check signal being input into the check circuit to generate an error in the memory for verifying the error protection by the error protection circuit; wherein the check circuit selectively supplies the check signal to the memory circuit with the error protection circuit, when the extracting unit extracts a plurality of the memory circuits, wherein the check circuit comprises: an access control unit that outputs a request; a selector that selects the memory circuit to which the check signal is to be supplied in accordance with the request from the access control unit; and a check signal output unit that stores the check signal and outputs the check signal to the memory circuit selected by the selector.