Patent ID: 7795670

Claim:
A semiconductor device comprising: a device isolation structure formed in a semiconductor substrate to define an active region, wherein an upper sidewall of the device isolation structure is sloped toward the active region and a lower sidewall of the device isolation structure is sloped away from the active region; a trench formed in the active region, wherein the trench includes a lower portion and an upper portion, the lower portion being wider than the upper portion; a recess channel region formed in the semiconductor substrate in the active region between the trench and the device isolation structure, wherein a thickness of an upper portion of the active region between the upper portion of the trench and the device isolation structure is greater than a thickness of a lower portion of the active region between the upper portion of the trench and the device isolation structure; a storage node junction region formed over the device isolation structure and the semiconductor substrate; a gate insulating film formed over the active region including the sidewalls of the trench; and a gate electrode formed over the gate insulating film to fill up the trench.