Patent ID: 7968953

Claim:
A semiconductor device comprising: a substrate that has a first conductivity type; a plurality of first columns that have the first conductivity type and a plurality of second columns that have a second conductivity type, wherein the plurality of first columns and the plurality of second columns are alternately arranged on the substrate in a planar direction of the substrate to configurate a super junction structure; a first electrode that is disposed on the super junction structure, that forms schottky junctions with the plurality of first columns, and that forms ohmic junctions with the plurality of second columns; and a second electrode that is disposed on the substrate on an opposite side of the super junction structure, wherein: the plurality of first columns and the plurality of second columns provide a plurality of diodes; the first electrode and the plurality of first columns provide a plurality of schottky barrier diodes; the plurality of diodes and the plurality of schottky barrier diodes are coupled in parallel between the first electrode and the second electrode; at least a part of the substrate and the super junction structure forms a lifetime control region, the lifetime control region including lattice defects; the lifetime control region has a first trap density that is greater than a second trap density of a similar substrate and super junction structure without lattice defects; and the lifetime control region has a first minority carrier lifetime that is less than a second minority carrier lifetime of the similar substrate and super junction structure without lattice defects.