Patent ID: 8395210

Claim:
A method of manufacturing a DMOS transistor, comprising: providing a semiconductor substrate; forming a source layer of a first conductive type in a front surface of the semiconductor substrate; forming a gate insulation film on the front surface of the semiconductor substrate; forming a gate electrode on the gate insulation film so, as to surround in plan view of the semiconductor substrate the source layer to leave an opening having a corner portion in the gate electrode; forming a body layer of a second conductive type superposed on the source layer so as to extend under the gate electrode; and forming a drain layer of the first conductive type in the front surface of the semiconductor substrate, wherein the opening is elongated in a first direction, and the forming of the body layer comprises performing ion implantation of impurities of the second conductive type by directing an ion beam so that in plan view of the semiconductor substrate the ion beam is oblique relative to the first direction and relative to a direction perpendicular to the first direction.