Patent ID: 7894609

Claim:
A stereo sub-channel signal processor circuit comprising: an input circuit configured to receive a multichannel digital television signal including a main channel and a sub-channel of the digital television signal; a DBX expander circuit configured to expand and output an expanded sub-channel signal of the digital television signal to provide an audio signal; and a phase error compensator circuit connected between the input circuit and the DBX expander circuit and configured to process the received sub-channel of the digital television signal to compensate for a phase error in the DBX expander circuit and to set the phase of the expanded sub channel output signal to a phase that is about constant over a predetermined frequency range, wherein the phase error compensator circuit is configured to process the received sub-channel of the digital television signal to compensate for a phase error in the DBX expander circuit by variably modifying the phase of the received sub-channel signal, based upon an amplitude of the received sub-channel signal, to generate and output a modified sub-channel signal to the DBX expander circuit to set the phase of the expanded sub-channel output signal; and wherein the phase error compensator circuit includes a variable phase delay filter that processes the received sub-channel of the digital television signal to compensate for phase error up to about one-fourth of a scanning frequency for the digital television signal, and coupled between the input circuit and the variable phase delay filter, a fixed phase shift filter to format a phase error portion of the received sub-channel of the digital television signal to a phase response of the variable phase delay filter, to facilitate compensation by the variable phase delay filter at frequencies of up to about half of a scanning frequency for the digital television signal.