Patent ID: 8498171

Claim:
A method comprising: forming on each die of a plurality of dice of a first wafer a plurality of memory cells of a device; and forming on each die of the plurality of dice a plurality of word lines and bit lines for accessing the memory cells, wherein the memory cells, the word lines, and the bit lines are formed for combining with at least one of a decoder, a sense amplifier, and a control unit of the device, wherein at least one of the decoder, the sense amplifier, and the control unit of the device is formed in a die of a second wafer, wherein the word lines and bit lines are part of conductive paths, the conductive paths are formed such that the conductive paths extend from a surface of the first wafer to a depth in the first wafer, each of the conductive paths includes an end portion in the first wafer, and the end portion is exposed when a portion of the first wafer is removed.