Patent ID: 8158479

Claim:
A method of manufacturing a semiconductor memory device comprising: forming a first insulator film on a semiconductor substrate; forming a first electrode layer used for a charge accumulation layer on the first insulator film; forming a plurality of trenches in the semiconductor substrate along a first direction by etching the first electrode layer, the first insulator film, and the semiconductor substrate; forming a second insulator film in the plurality of trenches, an upper surface of the second insulator film being at a higher position than an upper surface of the first insulator film and at a lower position than an upper surface of the first electrode layer; forming a sacrifice film on the second insulator film, an upper surface of the sacrifice film being at a lower position than the upper surface of the first electrode layer; forming a third insulator film on the upper surface and side surfaces of the first electrode, and the sacrifice film; forming a second electrode layer used for a control gate electrode on the third insulator film; forming a plurality of word lines along a second direction orthogonal to the first direction by etching the second electrode layer, the third insulator film and the first electrode layer, exposing the surface of the semiconductor substrate and the sacrifice film; and removing the sacrifice film.