Patent ID: 8916912

Claim:
A semiconductor device comprising: a transistor comprising a conductive gate within and projecting elevationally outward of a trench in semiconductive material; a gate dielectric within the trench between the conductive gate and the semiconductive material; the conductive gate comprising first, second, and third vertically oriented conductive gate sidewalls elevationally outward of the semiconductive material, the first and second vertical gate sidewalls being on the same one of opposing sides of the gate, the second vertical gate sidewall being elevationally outward of the first vertical gate sidewall, the first vertical gate sidewall being laterally outward of the second vertical gate sidewall on the one side of the gate, “elevationally” and “laterally” being with respect to two different directions that are perpendicular relative to one another, the second vertical gate sidewall overlying the trench laterally between semiconductive material sidewalls of the trench, the third vertical gate sidewall being on the other of the opposing sides of the gate; a dielectric spacer along the third vertical gate sidewall; and a dielectric vertical spacing layer having a first portion elevationally between the gate and the semiconductive material on said other of the opposing sides of the gate and a second portion elevationally between the dielectric spacer and the semiconductive material on said other of the opposing sides of the gate, material of the dielectric vertical spacing layer also being on said one side of the gate, the material of the dielectric vertical spacing layer on said one side of the gate being laterally against the first vertical gate sidewall, the material of the dielectric vertical spacing layer on said one side of the gate not being elevationally between the gate and the semiconductive material.