Patent ID: 8693247

Claim:
A method of programming a non-volatile memory device including a plurality of memory cells including a first group of memory cells connected to a first word line and a second group of memory cells connected to a second word line, comprising: loading first program data from an external source; programming the first group of the memory cells with the first program data loaded from the external source; verifying the first group of the memory cells with applying a first verify voltage to the first word line; loading second program data from the external source; programming the second group of the memory cells with the second program data loaded from the external source; verifying the second group of the memory cells with applying a second verify voltage to the second word line; re-loading the first program data from the external source; re-programming the first group of the memory cells with the re-loaded first program data; and verifying the first group of the memory cells after the re-programming with applying a third verify voltage different from the first verify voltage to the first word line, wherein the second word line is upper adjacent to the first word line, and substantially no additional time delay exists between the programming the first group of memory cells and the re-programming the first group of memory cells, wherein each of the memory cells of the non-volatile memory device includes a charge storage layer, wherein during the programming the second group of memory cells, a threshold voltage of at least one of the first group of memory cells is decreased.