Patent ID: 8576628

Claim:
A nonvolatile random access memory having a nonvolatile memory cell storing one-bit data, wherein the memory cell comprises: a first Metal-Insulator-Semiconductor (MIS) transistor formed of a first semiconductor layer of a first conductivity type which is in an electrically floating state, a first drain region and a first source region made of an impurity diffusion region of a second conductivity type that is opposite to the first conductivity type formed on a surface of the first semiconductor layer, and a first gate electrode formed through a first gate insulating film over the surface of the first semiconductor layer between the first drain region and the first source region; and a second MIS transistor formed of a second semiconductor layer of the first conductivity type that is isolated from the first semiconductor layer, a second drain region and second source region made of an impurity diffusion region of the second conductivity type formed on a surface of the second semiconductor layer, a second gate electrode formed through a second gate insulating film over the surface of the second semiconductor layer between the second drain region and the second source region, the first gate electrode and the second gate electrode are electrically connected to each other so as to form a floating gate in an electrically floating state, one-bit date is stored in a volatile manner by controlling a threshold voltage of the first MIS transistor in accordance with an amount of charge in the first semiconductor layer in a first storage mode, and one-bit data is stored in a nonvolatile manner by controlling a threshold voltage of the second MIS transistor in accordance with an amount of charge in the floating gate in a second storage mode.