Patent ID: 8694714

Claim:
A memory system for providing non-volatile write operation retry, comprising: a first flash memory configured to receive write data content and attempt to write the write data content to a memory block of a plurality of memory blocks, in response to the attempt being unsuccessful, store the write data content that is associated with a failed write operation to an internal buffer within the first flash memory that is differentiated from the plurality of blocks and, retain the write data content for one or more write operation retries on the internal buffer of the first flash memory; and a volatile memory comprising write operation retry logic that is configured to receive notice of the failed write operation from the first flash memory and command a first write operation retry of the one or more write operation retries to the first flash memory by issuing a write operation command to the first flash memory that commands the first flash memory to use the internal buffer of the first flash memory as a source of the write data content for the first write operation retry, wherein the write operation retry logic commands the first write operation retry only after a preconfigured sequential series of retry processes are executed, and the write operation retry logic is further configured to execute a first determination as to whether a retry process determining logic is employed to logically execute a second determination as to which one of two or more retry logics for different retry options attempt the first write operation retry based on pre-existing conditions.