Patent ID: 8030708

Claim:
An insulated gate field-effect transistor having: a semiconductor substrate; a channel region in the semiconductor substrate; a gate insulating film on the substrate above the channel region; a gate electrode above the channel region and above the gate insulating film; two first epitaxial growth layers on the substrate; a sidewall spacer comprising a first layer and a second layer (1) a bottom surface of the first layer on a portion of the upper surface of the first epitaxial growth layers, (2) an upper surface of the first layer opposite of the bottom surface of the first layer, (3) a first side surface of the first layer next to the gate electrode and (4) a second side surface of the first layer located opposite of the first side surface (5) a first side surface of the second layer adjacent the second side surface of the first layer, (6) a second side surface of the second layer located opposite of the first side surface of the second layer, and (7) a bottom surface of the second layer on the upper surface of the first layer; and two source/drain regions in the form of two second epitaxial growth layers respectively on the first epitaxial growth layers and adjacent to the second side surface of the second layer, wherein, the sidewall spacer establishes a horizontal distance between the gate electrode and said second epitaxial growth layer, and a portion of each first epitaxial growth layer is located underneath the gate electrode.