Patent ID: 8767474

Claim:
A nonvolatile memory device, comprising: a page buffer configured to store program bits in a program mode; an incremental step pulse program (ISPP) control unit configured to count the program bits stored in the page buffer and control an ISPP level in response to a counted number of the program bits; and an ISPP driving unit configured to drive an ISPP voltage in response to the ISPP level controlled by the ISPP control unit, wherein a level of the ISPP voltage changes to perform each step of an ISPP operation; wherein the ISPP control unit comprises: a counter unit configured to count the program bits stored in the page buffer; a reference register unit configured to store a counted number of initial program bits that are initially stored in the page buffer in the program mode; a program bit register unit configured to store a varying counted number of program bits stored in the page buffer, the number of program bits stored in the page buffer varying as each step of the ISPP operation is performed; and an ISPP level operation unit configured to control the ISPP level in response to an output signal of the reference register unit and an output signal of the program bit register unit.