Patent ID: 7436648

Claim:
A multilayer capacitor comprising: a multilayer body in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately laminated; and a plurality of terminal electrodes formed on each of two side faces of the multilayer body opposed to each other, wherein the plurality of terminal electrodes are formed on each of the two side faces so as to be opposed to each other in a facing direction of the two side faces, wherein each of the internal electrode layers includes a plurality of internal electrodes arranged in an array direction along a direction perpendicular to a laminating direction of the multilayer body and parallel to the two side faces, wherein the plurality of internal electrodes included in the respective internal electrode layers adjoining each other in the laminating direction with the dielectric layer in between are located so as to be opposed to each other in the laminating direction through said dielectric layer, wherein the internal electrodes opposed to each other in the laminating direction with the dielectric layer in between are electrically connected to the respective terminal electrodes opposed to each other in the facing direction of the two side faces, wherein the plurality of internal electrodes included in one internal electrode layer are electrically connected to the respective terminal electrodes being different from each other and formed on one of the two side faces, wherein a distance between the internal electrodes included in one internal electrode layer and adjoining each other in the array direction is not less than 20 μm nor more than 200 μm, wherein the multilayer capacitor is mounted on a circuit substrate on which a plurality of land electrodes are formed, wherein the terminal electrodes located as adjoining each other on one side face are connected to respective land electrodes of different polarities, wherein the terminal electrodes opposed to each other in the facing direction of the two side faces are connected to respective land electrodes of different polarities, and wherein the plurality of land electrodes formed on the circuit substrate belong to a plurality of different circuits.