Patent ID: 7666721

Claim:
A method for forming a semiconductor-on-insulator (SOL) substrate comprising: forming a semiconductor substrate having a substantially planar upper surface with first regions, second regions, and third regions; forming a gate structure on the semiconductor surface overlying the first regions; forming dielectric spacers abutting the gate structure and atop the second regions; conducting a first ion implantation step following the forming of the dielectric spacers to selectively implant oxygen and/or nitrogen ions into the third regions of the semiconductor substrate, but not the first regions and the second regions of the semiconductor substrate; forming a mask exposing the second regions of the semiconductor substrate; wherein forming the mask comprises forming a mask layer overlying the semiconductor substrate and removing the dielectric spacers to expose the second regions; conducting a second ion implantation step to selectively implant oxygen and/or nitrogen ions into the second regions of the semiconductor substrate, but not the first regions and the third regions of the semiconductor substrate; and conducting one or more annealing steps to convert the implanted oxygen and/or nitrogen ions into a buried insulator, wherein the first regions of the semiconductor substrate do not contain any buried insulator, wherein the second regions of the semiconductor substrate contain first portions of a patterned buried insulator layer at a first depth from the substantially planar upper surface, wherein the third regions of the semiconductor substrate contain second portions of the patterned buried insulator layer at a second depth from the substantially planar upper surface, and wherein the first depth is greater than the second depth.