Patent ID: 6982976

Claim:
A data routing unit comprising: a data receiver; a data transmitter; at least one set of data output lines, each of said at least one set of data output lines consists of a plurality of data lines and a data routing unit clock line; said data transmitter generating data transmitted on said data output lines synchronous with a transmitter clock signal on said data routing unit clock line; a bridge circuit connected to supply data to said data receiver and to receive data from said data transmitter, said bridge circuit connected to at least one set of data input lines and to said at least one set of data output lines, said bridge circuit responsive to a header of a data packet received from said data transmitter or received from said at least one set of data input lines to selectively route said received data packet to (1) said data receiver circuit, (2) a selected set of said at least one set of data output lines, or (3) both said data receiver circuit and a selected set of said at least one set of data output lines dependent upon said header; an input/output memory connected to said data receiver for storing data received by said data receiver and to said data transmitter for storing data to be transmitted by said data transmitter; and a central processing unit connected said input/output memory for storing data into said input/output memory and reading data from said input/output memory, said central processing unit operating in synchronism with a CPU clock which is asynchronous with said transmitter clock signal.