Patent ID: 8022528

Claim:
A stack-type semiconductor package, comprising: a lower printed circuit board comprising interconnections and ball lands on an upper surface of the lower printed circuit board; a flip-chip mounted on the upper surface of the lower printed circuit board and electrically connected to the lower printed circuit board; a lower resin compound disposed on the lower printed circuit board to surround the flip-chip; an upper printed circuit board disposed on the lower printed circuit board, the upper printed circuit board comprising lower pads on a lower surface of the upper printed circuit board and interconnections on an upper surface of the upper printed circuit board; via holes formed in the lower resin compound, each of the via holes exposing each of the ball lands and having a top portion adjacent to the upper printed circuit board and a bottom portion adjacent to the lower printed circuit board, and solder balls disposed in the via holes, each of the solder balls disposed on each of the ball lands of the lower printed circuit board and being in contact with each of the lower pads of the upper printed circuit board, wherein a size of the top portion of one of via holes is larger than a size of the bottom portion of the respective via hole.