Patent ID: 7307613

Claim:
A display control circuit for inputting input video data that is composed of parallel data to transfer video data obtained by serializing each piece of the input video data in a two-bit unit of a first bit and a second bit as output video data to a signal-line driving circuit, said display control circuit characterized in having: first comparison determination means for comparing a noninversion bit of the second bit of previous data with a noninversion bit of the first bit of subsequent data to output a determination result as to whether or not the bit inversion number is more than half; second comparison determination means for comparing an inversion bit of the second bit of the previous data with the noninversion bit of the first bit of the subsequent data to output a determination result as to whether or not the bit inversion number is more than half; third comparison determination means for comparing the noninversion bit of the first bit of the subsequent data with the noninversion bit of the second bit of the subsequent data to output a determination result as to whether or not the bit inversion number is more than half; fourth comparison determination means for comparing the inversion bit of the first bit of the subsequent data with the noninversion bit of the second bit of the subsequent data to output a determination result as to whether or not the bit inversion number is more than half; selection means that is composed of first selection means and second selection means for selecting/outputting the output of either of the determination results of said first comparison determination means and said second comparison determination means, and the output of either of the determination results of said third comparison determination means and said fourth comparison determination means respectively, said first selection means being controlled by the output of the second selection means based on of the input video data that is one piece of the data ahead, said second selection means being controlled by the output of the first selection means; output means for, based on the output of said first selection means and the output of said second selection means of said selection means, making an inversion or a noninversion of the first bit of the subsequent data and the second bit of the subsequent data respectively to output them, and for outputting an inversion signal indicating said inversion or noninversion; and a parallel-to-serial conversion circuit for serializing the output of said output means in a two-bit unit to output it as the output video data and an output inversion signal.