Patent ID: 7407825

Claim:
A fabrication process for an optical microsystem with a monolithic electronic matrix; comprising the steps of: fabricating collectively N dot matrix arrays and circuits associated with each array, on the front of a semiconductor wafer of a thickness of at least around one hundred or several hundred microns; producing on this wafer N identical monolithic electronic chips, with, on at least one side of each array, a set of electrical contact lands for connecting the corresponding chip externally; fabricating collectively a plate for forming N identical optical image forming structures placed in close contact with the front of the semiconductor wafer, each optical image-forming structure covering a respective chip and being designed to form an overall image corresponding with the whole of the matrix array of the respective chip, opening holes at the back and through to the contact lands on the front of the semiconductor wafer and through its thickness, these holes are used to establish a conductive electrical connection with the contact lands from the back of the wafer, and, dividing the wafer into N individual optical microsystems, the separation between the chips and the separation between the optical structures covering the chips being carried out along the same cutting lines.