Patent ID: 7800219

Claim:
A semiconductor die package comprising: a leadframe having a first conductive region and a second conductive region electrically isolated from the first conductive region; a semiconductor die having a first surface, a second surface, a first electrically conductive region disposed on the die's first surface, and second electrically conductive region disposed on the die's second surface, wherein the die is disposed over the leadframe such that the die's first electrically conductive region is electrically coupled to the leadframe's first electrically conductive region; a die clip having a major portion, a minor portion, and a bridge portion between the major and minor portions, the major portion having a first surface disposed over the second surface of the semiconductor die and electrically coupled thereto, and a second surface opposite to its first surface, the minor portion having a first surface disposed over the second conductive region of the leadframe and electrically coupled thereto, and a second surface opposite to its first surface; a metal-oxide substrate having a first surface and a second surface, the second surface being disposed over the second surface of the major portion of the die clip; and a heat-sinking component having a mounting surface disposed over the first surface of the metal-oxide layer and a second surface.