Patent ID: 7125654

Claim:
A process of manufacturing a liquid crystal display device of transverse electric-field type including (a) a pair of substrates at least one of which is transparent, (b) a layer of a liquid crystal composition interposed between the pair of substrates, (c) a plurality of scanning lines driven by an external scanning-line driver circuit through scanning-line terminal portions and extending in a line direction, (d) a plurality of image-signal wires extending in a column direction, (e) picture-element electrodes corresponding to respective picture elements, (f) common electrodes cooperating with said picture-element electrodes, and (g) thin-film transistor elements connected to said scanning lines and said image-signal wires, and wherein said scanning lines, said image-signal wires, said picture-element electrodes, said common electrodes and said thin-film transistor elements are provided on a surface of one of said pair of substrates which faces said layer of the liquid crystal composition, said process comprising: a halftone exposing step of exposing a photoresist on said one of said pair of substrates to a radiation, and thereby forming (i) first positive resist portions that cover portions of a semiconductor layer formed on said one substrate, which portions correspond to said thin-film transistor elements, each of said first positive resist portions having a predetermined first thickness, (ii) resist-free areas that cover portions of said semiconductor layer which correspond to a first connecting portion, a second connecting portion and a third connecting portion, said first connecting portion being provided to form first static-electricity protective transistor elements connecting said common electrodes and said scanning lines, said second connecting portion being provided to form second static-electricity protective transistor elements connecting said common electrodes and said image-signal wires, and said third connecting portion connecting said external scanning-line driver circuit and said scanning-line terminal portions, and (iii) second positive resist portions having a second thickness smaller than said first thickness and covering the other portions of said semiconductor layer.