Patent ID: 7777460

Claim:
A multi-phase converter comprising: a plurality of switching circuits each controlled by a phase controller and each providing a switched output voltage to an output node of the converter and wherein each switching circuit under control of the phase controller sequentially provides a switched output voltage to the output node at which an output voltage of the converter is developed; a clock circuit for providing a plurality of out of phase clock signals to determine when each switching circuit provides the switched output voltage to the output node; each switching circuit connected across a DC bus voltage, wherein each of said switching circuits further comprises a first error amplifier comparing a first signal proportional to the output voltage of the converter at the output node with a second signal comprising a first reference voltage and producing a first error signal; and a PWM generator circuit comparing said first error signal with a third signal comprising a ramp signal from a ramp signal generator circuit and for producing a pulse width modulated signal to control the on-times of a switch of the connected switching circuit, further comprising a current share adjusting circuit, the current share adjusting circuit comprising: a current sense amplifier for each switching circuit sensing the output current provided by each switching circuit, and providing a signal proportional to the sensed output current; a current share adjust error amplifier having said signal proportional to the sensed output current as a first input and having a signal proportional to an average current provided by each of the switching circuits and for producing a current share adjust signal; and said ramp signal generator circuit producing said ramp signal, said ramp signal generator circuit receiving said current share adjust signal and adjusting the ramp signal to affect the duty cycle of the pulse width modulated signal to move the output current of the connected switching circuit toward the average current.