Patent ID: 7282766

Claim:
A semiconductor device comprising: a support substrate having an insulating surface; a fin-type semiconductor region of a first conductivity type formed on said support substrate, said fin-type semiconductor region having a pair of side walls generally vertical to a surface of said support substrate and an upper surface coupling said side walls; an insulated gate electrode structure formed traversing an intermediate portion of said fin-type semiconductor region and including a gate insulating film and a conductive gate electrode formed on said gate insulating film, said gate electrode having side walls in conformity with the side walls of said fin-type semiconductor region; source/drain regions of a second conductivity type opposite to said first conductivity type, formed in said fin-type semiconductor region on both sides of said conductive gate electrode; side wall insulating films including a first side wall insulating film formed on the side walls of said conductive gate electrode and a second side wall insulating film formed on the side walls of said fin-type semiconductor region and having an opening on each of said source/drain regions, extending from an upper edge to a lower edge of each of the side walls of said fin-type semiconductor region; a silicide layer formed on a surface of each of said source/drain regions exposed in the opening of said second side wall insulating film; and source/drain electrodes contacting said silicide layer.