Patent ID: 8406005

Claim:
A printed circuit board (PCB) comprising: a first high speed differential signal control chip to output a first high speed differential signal; a second high speed differential signal control chip to output a second high speed differential signal, wherein the second high speed differential signal is different from the first high speed differential signal; a first and a second connection components; a connector pad; and a first to a sixth transmission lines, wherein the first and second transmission lines are connected to two output terminals of the first high speed differential signal control chip, the third and fourth transmission lines are connected to two output terminals of the second high speed differential signal control chip, the fifth and sixth transmission lines are connected to first and second input terminals of the connector pad; wherein, to have the first high speed differential signal control chip communicate with the connector pad, the first transmission line is connected to the fifth transmission line through the first connection component, and the second transmission line is connected to the sixth transmission line through the second connection component; and wherein, to have the second high speed differential signal control chip communicate with the connector pad, the third transmission line is connected to the fifth transmission line through the first connection component, and the fourth transmission line is connected to the sixth transmission line through the second connection component, wherein the first high speed differential signal control chip, the first and second transmission lines, the fifth and sixth transmission lines, and the connector pad are located on a top layer of the PCB; the second high speed differential signal control chip and the third and fourth transmission lines are located on a bottom layer of the PCB, wherein first and second vertical interconnect accesses (vias) are defined in the PCB, through the top layer to the bottom layer, the fifth transmission line is connected between the first via and the connector pad, and the sixth transmission line is connected between the second vias and the connector pad, wherein a plurality of power layers and a plurality of ground layers, wherein each of the power layers and the ground layers defines a clearance hole through which the first and second vias extend, wherein the clearance hole is substantially oval-shaped, and bounded by two straight parallel edges and two arc-shaped edges connected between corresponding ends of the two straight parallel edges, and wherein the two straight parallel edges are parallel to an imaginary line connected between central axes of the first and second vias, and a distance between the two straight edges is greater than an outer diameter of each of the first and second vias, the two arc-shaped edges are spaced from the first and second vias and located symmetrically with respect to a center axis of the clearance hole.