Patent ID: 8618857

Claim:
A circuit system, comprising: a first signal path, comprising a first functional circuitry, wherein the first functional circuitry is powered by a voltage supplied by a power supply, and is configured to receive a first signal, and wherein the first functional circuitry is configured to generate a third signal with a first delay time, wherein the first delay time increases as the voltage supplied by the power supply is decreased; a second signal path, comprising a delay circuit, wherein the delay circuit is coupled to a second signal and is configured to generate a delayed second signal with a second delay time; and a second functional circuitry, coupled to the first signal path and the second signal path, configured to generate a fourth signal according to the third signal and the delayed second signal; wherein the delay circuit comprises: a first inverter, having an input end, an output end, a power supply end and a ground end, wherein the input end is coupled to the second signal and the wherein the output end provides an output signal of the first inverter; a first load capacitor, coupled between the output end of the first inverter and a reference ground; and a first voltage clamping module, coupled between the power supply voltage and the power supply end of the inverter, or coupled between the ground end of the inverter and the reference ground, wherein the first voltage clamping module generates a voltage drop when a current flows through the first voltage clamping module, and wherein the first voltage clamping module is configured to prolong the second delay time as the power supply voltage decreases to make the second signal be synchronous with the first signal; and wherein: the second functional circuitry comprises a switch-mode voltage converter, comprising a primary switch and a synchronous rectifier, configured to convert an input voltage to an output voltage; the first signal comprises a PWM control signal; the first functional circuit comprises a voltage level shifter circuit, having an input end and an output end, wherein the input end is coupled to the PWM control signal and wherein the output end provides a high side gate signal as the third signal which is coupled to the primary switch; and the second signal comprises a PMW signal, wherein the PMW signal is a complementary signal of the PWM control signal.