Patent ID: 8841675

Claim:
A semiconductor device comprising a transistor, the transistor comprising: a semiconductor layer comprising a channel formation region; a gate insulating layer over the semiconductor layer; a gate electrode layer over the semiconductor layer with the gate insulating layer interposed therebetween; an insulating layer over the gate insulating layer, the insulating layer comprising a first opening and a second opening each formed from a top surface to a bottom surface of the insulating layer; a source electrode layer and a drain electrode layer respectively embedded in the first opening and the second opening so that side surfaces of the source electrode layer and the drain electrode layer are in contact with the insulating layer, each of the source electrode layer and the drain electrode layer being on and in contact with the semiconductor layer; and a source wiring layer and a drain wiring layer respectively on and in contact with the source electrode layer and the drain electrode layer, wherein a distance in a channel formation region length direction between the source electrode layer and the drain electrode layer is shorter than a distance in the channel formation region length direction between the source wiring layer and the drain wiring layer.