Patent ID: 7928754

Claim:
A test system for testing multiple sets of integrated circuits, the test system comprising: (a) a structure that temporarily and removably receives and temporarily applies test electronics to different sets of integrated circuits from among the multiple sets of integrated circuits, whereby multiple sets of integrated circuits can be tested by the same electronics of the test system; (b) a plurality of test channels in the test system, the plurality of test channels external to a set of integrated circuits, each test channel temporarily receiving a set of integrated circuits under test from among the multiple sets of integrated circuits; (c) a plurality of power modules in the test system, the plurality of power modules external to the set of integrated circuits, each power module configured to be temporarily connected to one of the integrated circuits in the set of integrated circuits under test in each test channel; and (d) a controller in the test system, the controller connected and configured for successive selection of one of said plurality of test channels.