Patent ID: 8422761

Claim:
An inspection apparatus for inspecting patterns formed on a wafer by using an image of said patterns and data for fabricating said patterns, comprising: an imager for capturing at least one image of each of a plurality of inspection regions on the wafer; a reference pattern generator for generating a reference pattern for each of the inspection regions from design data of the wafer, the reference pattern being formed of one or both of (a) one or more line segments and (b) one or more curves; and an inspection unit configured to perform: detecting edges within each of the images; automatically selecting patterns within each of the inspection regions based upon tendency for measurement variation resulting from variation in the fabrication process; comparing, for the selected patterns, certain of the edges with associated line segments and curves of the reference pattern to determine one or both of (a) a maximum empty circle within the boundary of the certain edges and (b) an arbitrarily oriented smallest enclosing rectangle that includes the certain edges; and generating defect information based upon one or both of the maximum empty circle and the smallest enclosing rectangle.