Patent ID: 7960953

Claim:
A regulator circuit, which stabilizes an input voltage applied to an input terminal, and which outputs an output voltage via an output terminal, comprising: an output transistor provided between the input terminal and the output terminal; an error amplifier which adjusts a voltage at a control terminal of said output transistor such that the voltage that corresponds to the output voltage approaches a predetermined reference voltage; a fluctuation detection capacitor which is provided on a path from the input terminal to the grounded terminal, and one terminal of which is set to a fixed electric potential; and an undershoot suppressing circuit configured to extract a first current from the fluctuation detection capacitor and to extract a current proportional to the first current from the control terminal of the output transistor so as to forcibly reduce the voltage at the control terminal of said output transistor when the input voltage is lower than the voltage at the other terminal of said fluctuation detection capacitor.