Patent ID: 7725698

Claim:
An operation apparatus comprising: a plurality of operation device units; a configuration memory storing setting information provided for setting each predetermined state of the plurality of operation device units; and a sequencer controlling the plurality of operation device units by outputting transition destination addresses designating relevant information from configuration information stored in said configuration memory, wherein the sequencer carries out an operation based on task information previously loaded and a change-over condition signal output from the plurality of operation device units, and generates the transition destination address to the configuration memory based on the operation according to the change-over condition signal output from the plurality of operation device units, wherein the sequencer is configured to control the states of the plurality of operation devices units in a manner such that operation processing contents carried out by the plurality of operation device units are controlled and the plurality of operation device units are reconfigurable; wherein the sequencer comprises a state table having the current transition destination address of the configuration memory input thereto, and outputting an operation code for determining a predetermined transition destination address generating method and outputting a jump offset value depending on the contents of the operation code; wherein a transition destination address generating part determining the transition destination address to be subsequently applied, by means of operation based on the operation code, the jump offset value from said state table as well as the change-over condition signal; and wherein the operation code determining the predetermined transition destination address generating method designates any one of a sequential mode for adding 1 to a predetermined address value, an unconditional jump mode for changing an address unconditionally by a relevant jump offset value, and a conditional branch execution mode for changing the address by the jump offset value when receiving the change-over condition signal or simply adding one to the predetermined address value when not receiving the change-over condition signal.