Patent ID: 8084353

Claim:
A method for pitch reduction, the method comprising: forming a multi-layer structure; forming strips of a mask material on the multi-layer structure, the strips of mask material having respective sidewall surfaces separated by a separation width; performing a process to expand the strips of mask material to reduce the separation width, the expanded strips of mask material being a first etch mask; etching the multi-layer structure using the first etch mask, thereby forming a first modified multi-layer structure comprising plurality of first trenches; removing the first etch mask; forming a second etch mask overlying the plurality of first trenches; etching the first modified multi-layer structure using the second etch mask to form a second modified multi-layer structure comprising a plurality of second trenches with pairs of structures defined between adjacent first trenches, wherein respective pairs of structures comprise first and second structures separated by a second trench in the plurality of second trenches; forming a third etch mask overlying the second modified multi-layer structure; and etching portions of the second modified multi-layer structure to create a modified array of said pairs of structures, the modified array of said pairs of structures comprising a central memory array portion having first and second ends, a first peripheral circuitry portion extending from the first end and a second peripheral circuitry portion extending from the second end, the first peripheral circuitry portion being extensions of the first structures, and the second peripheral circuitry portion being extensions of the second structures.