Patent ID: 8877625

Claim:
A method of forming first and second semiconductor devices above a common semiconductor substrate, comprising: forming a first layer of gate insulation material above said substrate at least at a location where a channel region of said first semiconductor device will be formed, wherein said first layer of gate insulation material is formed to a first substantially uniform thickness; forming a first patterned mask layer that covers said first semiconductor device but exposes said second semiconductor device for further processing; with said patterned mask layer in position, forming a layer of high-k insulation material above said substrate where a channel region of said second semiconductor device will be formed, wherein said layer of high-k insulation material is formed to a second substantially uniform thickness that is less than said substantially uniform first thickness of said first layer of gate insulation material; removing said patterned mask layer; and performing at least one common process operation to form a first metal-containing gate electrode structure for said first semiconductor device and a second metal-containing gate electrode structure for said second semiconductor device, wherein a portion of said first metal-containing gate electrode structure is formed on and in contact with said first layer of gate insulation material and a portion of said second metal-containing gate electrode structure is formed on and in contact with said high-k insulation material.