Patent ID: 6992930

Claim:
A method for driving a semiconductor memory device comprising a memory array having a plurality of memory cells arranged in rows and columns, each memory cell including a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, a source and a drain as diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having a function of retaining charges, the method comprising the steps of: selecting a row line connected to the gate electrode of the memory cell to be selected; grounding a first column line connected to the source of the memory cell to be selected; and applying a first potential to a second column line and a second potential to a third column line at the same time, wherein the second column line is connected to the drain of the memory cell to be selected and the third column line is connected to the drain of a memory cell adjacent to the memory cell to be selected while other row lines in the memory array are separated from the second and third column lines, and the first potential is applied by a first circuit, the second potential is applied by a second circuit, the first potential conditionally allows a reading current to flow via the memory cell to be selected, and a value of the current indicates the content of the memory cell to be selected.