Patent ID: 7363608

Claim:
A method for accelerating development and debug of a printed circuit board (PCB) designed for use with a platform ASIC in advance of availability of a prototype sample of the platform ASIC, the platform ASIC having a predefined pin-out, the method comprising: providing a pin-out adapter card that implements a predefined adapter card ASIC pin-out of the platform ASIC and that hosts FPGA logic resources for emulating I/O functionality and at least a portion of core logic comprising the platform ASIC; fabricating the PCB on which the platform ASIC is to be mounted, wherein the PCB includes a predefined PCB ASIC pin-out for eventually mating with the platform ASIC; and coupling a socket having mating connectors on both sides to the PCB ASIC pin-out and to the adapter card ASIC pin-out, respectively, to thereby couple the adapter card to the PCB for testing and debugging.