Patent ID: 7282765

Claim:
A lateral metal-oxide-semiconductor transistor device comprising: a substrate having a first conductivity type and having a lightly doped epitaxial layer thereon having an upper surface; source and drain regions of the first conductivity type formed in the epitaxial layer proximate the upper surface, said source and drain regions being spaced from one another and having a channel region of a second conductivity type formed therebetween in said epitaxial layer, said channel region extending under said source region; a conductive gate formed over a gate dielectric layer formed over said channel region and partially overlapping said source and drain regions; a drain contact electrically connecting said drain region to said substrate and spaced from said channel region comprising: a first trench formed from the upper surface of said epitaxial layer to said substrate and having a side wall along said epitaxial layer; a highly doped region of said first conductivity type formed along said side wall of the first trench; and a drain plug in said first trench adjacent said highly doped region; a source contact electrically connected to said source region and providing an electrical short between the source region and the channel region; and an insulating layer formed between said conductive gate and said source contact, wherein the transistor device further comprises a second trench formed adjacent said source and channel regions and extending into said channel region, wherein said second trench is formed partially through said epitaxial layer such that a bottom surface thereof is spaced from an upper surface of said substrate, wherein said insulating layer extends along sidewalls of said conductive gate, over said conductive gate and over said drain region, and wherein said source contact comprises a layer of conductive material deposited in said second trench and over said insulating layer.