Patent ID: 7373478

Claim:
An information processing apparatus comprising: a cache memory formed from at least one hierarchy; a first address-converting unit that converts a virtual address to a physical address, includes a first conversion table of the virtual addresses and the physical addresses, and is used first for address conversion; a second address-converting unit that converts the virtual address not converted by the first address-converting unit, and that includes a second conversion table of the virtual addresses and the physical addresses; and a cache controller that, when a pre-fetch command that speculatively transfers data or a command from a main storage to the cache memory is run, provides control to execute the pre-fetch command, wherein the execution includes using the first address-converting unit to convert the virtual address, cancelling the pre-fetch command and using the second address-converting unit to convert the virtual address if the first address-converting unit can not convert the virtual address, registering the virtual address and the physical address as a pair in the first address-converting unit if the second address-converting unit conversion succeeds, and ending the pre-fetch command.