Patent ID: 8742493

Claim:
A semiconductor device, comprising: a plurality of active pillars disposed upright on a base so as to each have first and second opposite sides, and each of the active pillars having an upper junction at an upper part thereof, a lower junction at a lower part thereof, and a vertical channel located between the upper and lower junctions; a plurality of gates facing the first sides of the vertical channels of the active pillars, respectively, wherein each of the gates, and the vertical channel and the junctions of the active pillar faced by the gate constitutes a field effect transistor; conductive lines extending longitudinally from the gates, respectively, in a first direction, wherein each of the gates and the conductive line extending therefrom constitute a word line; a plurality of bit lines extending longitudinally in a second direction crossing the first direction; and a conductor comprising a plurality of conductive elements facing the second sides of the active pillars, respectively, and an extension line connecting the conductive elements, wherein each of the active pillars is interposed between one of the conductive elements and one of the gates, wherein each gate is spaced apart from the first side of an active pillar, each conductive element is a back-gate spaced apart from the second side of the active pillar, and the back-gate spans the vertical channel and only the lower one of said lower and upper junctions and such that the back-gate and the lower junction constitute a second field effect transistor.