Patent ID: 8248142

Claim:
A method comprising: providing an integrated circuit with a level shifting circuit having a pull up device coupled between a high voltage line and an output terminal, wherein the pull up device is configured to selectively pull up a voltage level of an output signal at the output terminal from a low voltage level to a high voltage level, a chopper circuit comprising a delay logic and a gate circuit, wherein the chopper circuit is configured to (i) receive the output signal and an input control signal, (ii) generate a delayed version of the output signal using the delay logic, (iii) based on the delayed version of the output signal and the input control signal, generate a switching signal, and a pull down device coupled between a low voltage line and the output terminal, wherein the pull down transistor is configured to selectively pull down the voltage level of the output signal from the high voltage level to the low voltage level; ascertaining a high level of the input control signal; and when the output signal is at the high voltage level, deasserting, based on the switching signal, the pull up device at an end of a delay period that starts in response to the output signal reaching the high voltage level.