Patent ID: 7519777

Claim:
A method for concomitant pair prefetching, the method consisting of: collecting cache miss addresses to define an access window, wherein the access window is called a Miss Stream Window (MSW); obtaining a prefetch address from a history table, in response to a new cache miss address, wherein the miss address is stored as an indexed entry in the history table and is considered as a candidate for the prefetch address; updating a miss stream window, wherein an oldest entry in the miss stream window is evicted in response to the new cache miss address and wherein a header pointer points to a new oldest miss address and a tail pointer points to the new cache miss address; selecting a candidate of a concomitant pair from the miss stream window, wherein the new oldest miss address is a candidate for a leader miss address, and wherein remaining miss addresses in the miss stream window are candidates for follower miss addresses; for each remaining miss addresses: generating a pair address from the leader miss address and a miss address adjacent the leader miss address, wherein the leader miss address and the miss address adjacent the lead miss address is a concomitant pair; feeding the pair address into a hash function to produce an index to access an aging filter; accessing the aging filter to determine if the concomitant pair has previously occurred; and in response to the concomitant pair having previously occurred, recording the concomitant pair in the history table and replacing the follower address with a next follower address from the remaining miss addresses.