Patent ID: 7333789

Claim:
A broadband modulation PLL comprising: a PLL portion containing a voltage controlled oscillator, a frequency divider for dividing the frequency of an output signal of the voltage controlled oscillator, a phase comparator for comparing the output of the frequency divider with a reference signal, and a loop filter for averaging the output of the phase comparator; a first modulation input portion for inputting a first modulation signal to a first position of the PLL portion on the basis of input modulation data; and a second modulation input portion for inputting a second modulation signal to a second position different from the first position of the PLL portion on the basis of the modulation data, wherein the first modulation signal input to the first position of the PLL portion is added with the second modulation signal at the second position, and any one of the first and second modulation input portions inverts the phase of the modulation data and inputs the modulation signal to the PLL portion at the time of a modulation timing adjustment to adjust the modulation timing of the first modulation signal and the second modulation signal.