Patent ID: 7058152

Claim:
An apparatus that determines a phase error to use to synchronize a receiver clock frequency with that of a transmitter, the apparatus comprising: a transmitter that transmits at least one pilot tone symbol to the receiver; a sample clock that generates a sample clock signal; a symbol identifier coupled to receive the sample clock signal and that indicates a symbol index associated with the most recent symbol, the symbol index indicative of the crosstalk environment of the symbol; a phase error measurer device that measures the phase error between two pilot tone symbols and outputs the phase error; and a phase error determination device (“PEDD”) coupled to receive the phase error from the phase error measurer device and the symbol index from the symbol identifier, wherein the PEDD determines whether to set the phase error to zero based on the crosstalk environment of the most recent symbol, wherein the PEDD adjusts the sample clock signal frequency using the phase error.