Patent ID: 7125794

Claim:
A method of manufacturing a semiconductor device comprising: depositing a first CVD dielectric layer on a surface of a semiconductor substrate; depositing a first low-k layer on the first CVD dielectric layer from source materials and, immediately after depositing the first low-k layer, thermally treating the first low-k layer; depositing a second low-k layer on the first low-k layer from the same source materials used to deposit the first low-k layer and, immediately after depositing the second low-k layer, thermally treating the second low-k layer; depositing a second CVD dielectric layer on the second low-k layer; forming a groove in the second CVD dielectric layer, the second low-k layer, and the first low-k layer; depositing a metal layer on the second CVD dielectric layer and filling the groove; and removing the metal layer from the second CVD dielectric layer by chemical mechanical polishing.