Patent ID: 8432717

Claim:
A semiconductor integrated circuit comprising: an anti-fuse element that electrically connects a first node and a first power supply terminal when data is written and electrically disconnects the first node and the first power supply terminal when data is not written; a first switch circuit that is connected between the first node and a first data line applied with a predetermine first voltage, and enters an off state from an on state according to a first control signal; and a detection part that detects write data of the anti-fuse element according to whether a voltage of the first node is substantially the same as the first voltage or is substantially the same as a supply voltage of the first power supply terminal when the first switch circuit enters the off state, wherein the detection part comprises: a first transistor; and a second switch circuit connected between a second data line and the first transistor, wherein a conduction state of the first transistor is controlled according to the voltage of the first node, the second switch circuit enters the on state according to a second control signal after the first switch circuit enters the off state, the first transistor is connected between the second switch circuit and the first power supply terminal, and the write data of the anti-fuse element is judged according to a voltage level of the second data line, wherein the first switch circuit comprises a second transistor connected between the first node and the first data line, and the second transistor has a control terminal receiving the first control signal, wherein the second switch circuit comprises a third transistor connected between the second data line and the first transistor, and the third transistor has a control terminal receiving the second control signal, and wherein a voltage substantially equal to the first voltage applied to the first data line is applied to a back gate of the second transistor when the write data of the anti-fuse element is judged, and a voltage substantially equal to the write voltage applied to the first data line is applied to the back gate of the second transistor when the data is written into the anti-fuse element.