Patent ID: 7723772

Claim:
A semiconductor memory device comprising: a semiconductor substrate; a tunnel insulating film formed on the semiconductor substrate; a floating gate electrode formed on the tunnel insulating film, and having a first side-surface portion positioned in an upper portion and a second side-surface portion positioned below the first side-surface portion; an element isolation trench formed in the semiconductor substrate to be adjacent to the floating gate electrode; a first element isolation insulating film formed on a side surface and bottom surface of the element isolation trench, said first element isolation insulating film contacting with the second side-surface portion of the floating gate electrode; a second element isolation insulating film formed on the first element isolation insulating film, a top surface of said second element isolation insulating film existing under a top surface of the first element isolation insulating film; a first radical nitride film formed on the floating gate electrode and first and second element isolation insulating films; an interelectrode insulating film formed on the first radical nitride film; a nitrogen-containing film formed on the interelectrode insulating film; and a control gate electrode formed on the nitrogen-containing film, wherein in the second side-surface portion of the floating gate electrode, a portion of the first element isolation insulating film is sandwiched between the floating gate electrode and first radical nitride film.