Patent ID: 7095906

Claim:
An apparatus for performing alpha blending calculations on a first digital image value and a second digital image value according to a digital alpha (α) value having a fractional part of n digits and having a most significant bit of α i and a least significant bit of α n−1 and wherein the order of α i is related to an i th digit of α, comprising: a plurality of multiplexers, each of the plurality of multiplexers configured to receive a bit value, α i , of the digital value α, each of the plurality of multiplexers configured to receive the first and second digital image values, each of the plurality of multiplexers configured to direct to outputs of the plurality of multiplexers either the first or second digital image value responsive to the bit value, α i , of the digital value α; a plurality of shifters, each shifter having a set of inputs connected to the outputs of one of the multiplexers to receive the selected digital image value, each shifter left-shifting the selected digital image value according to the multiplexer to which the shifter is connected; and an adder configured to receive the plurality of left-shifted outputs from the shifter and further configured to produce the sum of the left-shifted outputs from all of the shifters.