Patent ID: 7768110

Claim:
A nonvolatile memory apparatus comprising: a nonvolatile memory device; a control device; a substrate having first terminals and second terminals; a plurality of first signal lines; a plurality of second signal lines; and a plurality of third signal lines, wherein said nonvolatile memory device and said control device are mounted on said substrate; wherein said first signal lines are used for coupling between said first terminals and respective first electrodes of said control device; wherein said second signal lines are used for coupling between electrodes of said nonvolatile memory device and respective second electrodes of said control device, wherein said third signal lines are used for coupling between said second signal lines and respective ones of said second terminals, wherein said first terminals are exposed, wherein said first terminals include a command terminal, a clock terminal and a data terminal, wherein said data terminal is capable of inputting data and outputting data, wherein said clock terminal is capable of receiving pulse signals, wherein said command terminal is capable of receiving a command for specifying an arbitrary one of a plurality of operations, and wherein said second terminals can be used to access said nonvolatile memory device independently of control of said nonvolatile memory device by said control device.