Patent ID: 7636655

Claim:
A method of using a computer system to determine an implementation of a user design on a programmable device including a plurality of programmable logic elements, each comprising reconfigurable logic hardware and fixed-configuration secondary hardware, wherein the fixed-configuration secondary hardware has a plurality of inputs, the inputs common to at least two of the programmable logic elements, the method comprising: for each of a plurality of portions of the user design, determining, with at least one processor of the computer system, one or more sets of input assignments of signals in the user design to the fixed-configuration secondary hardware, each set providing an implementation of a logic function of that portion of the user design using the fixed-configuration secondary hardware; ranking, with the processor, the sets of input assignments by determining a number of times each set is assigned to the fixed-configuration secondary hardware; selecting, with the processor, a highest ranked set of input assignments, wherein the highest ranked set is assigned to the fixed-configuration secondary hardware at least two or more times; and creating, with the processor, an implementation of a subset of the portions of the user design by implementing the selected set of input assignments as inputs to a corresponding subset of the plurality of fixed-configuration secondary hardware.