Patent ID: 7663183

Claim:
A method of forming a semiconductor device, comprising: forming a vertical field-effect transistor, including: forming a heavily doped substrate, forming a source/drain contact below said heavily doped substrate, forming a channel layer above said heavily doped substrate, forming a heavily doped source/drain layer above said channel layer, forming another source/drain contact above said heavily doped source/drain layer, patterning and etching a pillar region through said another source/drain contact, said heavily doped source/drain layer, and portions of said channel layer to form a vertical cell, forming a non-conductive region in a portion of said channel layer within said pillar region, and forming a gate above and beyond said non-conductive region in said pillar region in contact with said channel layer; and forming a Schottky diode, including: forming a Schottky contact on an exposed surface of said channel layer to provide an anode configured to cooperate with said channel layer to provide a cathode for said Schottky diode.