Patent ID: 7668381

Claim:
A decoding apparatus comprising: a memory operable to hold encoded data representing one of a compressed sound and a compressed image; a memory read-out unit operable to sequentially read out the encoded data from said memory; a match determining circuit operable to determine whether or not data matching a specific bit sequence exists in the encoded data read out by said memory read-out unit: a deleting circuit operable to delete a part of the specific bit sequence from the encoded data read out from said memory, when said match determining circuit determines that the specific bit sequence exists; a decoding circuit operable to decode the post-deletion encoded data; and a holding circuit placed between said deleting circuit and said decoding circuit, and operable to temporarily hold the post-deletion encoded data, wherein said memory read-out unit is operable to read out the encoded data on a first bus width basis, an input bus width of said decoding circuit is a second bus width which is narrower than the first bus width, and said holding circuit is operable to hold the post-deletion encoded data, to adjust the held encoded data to the second bus width, and to output the adjusted encoded data to said decoding circuit.