Patent ID: 8561073

Claim:
A system for optimizing thread execution on a mobile computing device having a multi-core processor, said system comprising: a memory area on a mobile computing device having a multi-core processor, said memory area storing a list of one or more resources associated with each of a plurality of core processors on the multi-core processor; and a processor programmed to: define an activity limit for each of the plurality of core processors to maintain a processor load balance among the plurality of core processors; receive a request to execute an instruction associated with a thread, said instruction corresponding to at least one of the resources; select one of the plurality of core processors based on the corresponding resource; emulate execution of the instruction by the selected one of the plurality of core processors; monitor an activity level of the selected one of the plurality of core processors, during the emulated execution of the instruction associated with the thread, said activity level representing a processor load on the selected one of the plurality of core processors, said activity level being a function of the emulated execution; compare the monitored activity level to the defined activity limit, wherein said comparison comprises: continuing the emulated execution of the instruction by the selected one of the plurality of core processors if the monitored activity level of the selected one of the plurality of core processors does not exceed the defined activity limit; terminating the emulated execution if the monitored activity level of the selected one of the plurality of core processors exceeds the defined activity limit; and assign the thread to the selected one of the plurality of core processors based on the comparison, wherein the selected one of the plurality of core processors executes subsequent instructions from the assigned thread based on the assignment.