Patent ID: 7615815

Claim:
A cell region layout of a semiconductor device comprising: a cell region having active regions defined by an isolation layer; a plurality of inner active regions located inwardly from a first outermost portion of the cell region; a plurality of first active regions formed at the first outermost portion of the cell region, wherein each of the plurality of first active regions has the same shape as that of each of the plurality of the inner active regions; and a plurality of second active regions formed at the first outermost portion of the cell region wherein each of the plurality of second active regions has a different shape from that of each of the plurality of inner active regions and is adjacent to at least one end of the first active region by a predetermined distance, wherein the plurality of the inner active regions are arranged in a plurality of rows, and wherein each of the plurality of the second active regions is spaced apart from the plurality of rows and is disposed on and extends between lines extending from at least two of the plurality of rows, wherein the at least two of the plurality of rows are adjacent to each other.