Patent ID: 7825694

Claim:
A differential output circuit comprising: a first output driving circuit that includes a first PMOS transistor and a first NMOS transistor connected in series to each other; a second output driving circuit that includes a second PMOS transistor and a second NMOS transistor connected in series to each other; and a control circuit, wherein, when a control signal has a first value, the control circuit selectively turns on one of the first and second PMOS transistors and selectively turns on one of the first and second NMOS transistors, thereby controlling the first and second output driving circuits to output a first pair of differential signals, and when the control signal has a second value, the control circuit supplies no current to the first and second PMOS transistors and selectively turns on one of the first and second NMOS transistors, thereby controlling the first and second output driving circuits to output a second pair of differential signals.