Patent ID: 7330368

Claim:
A three-dimensional semiconductor device in which a plurality of semiconductor circuit chips are stacked with an interface chip for realizing signal transmission from the semiconductor circuit chips, wherein each of said semiconductor circuit chips is divided into a plurality of sub-circuit regions, and comprises a plurality of interchip interconnections for realizing signal transmission between each of said semiconductor circuit chips are provided in each of the sub-circuit regions that are in the same position on each of said semiconductor circuit chips, the device comprising: an interchip interconnection selection means is provided on said interface chip for, when transmitting a signal with one sub-circuit region among said plurality of sub-circuit regions, selecting from among said plurality of interchip interconnections an interchip interconnection that is to be the signal transmission path when transmitting the signal and electrically isolating interchip interconnections other than the selected interchip interconnection from the selected interchip interconnection; and on said interface chip, an in-plane interconnection isolation means for electrically isolating in-plane interconnections that are connected to interchip interconnections other than the interchip interconnection that has been selected by said interchip interconnection selection means from in-plane interconnections that are connected to the interchip interconnection that has been selected by said interchip interconnection selection means.