Patent ID: 6897658

Claim:
A circuit for selectively enabling and disabling n-coils, said circuit comprising: (a) n-drivers powered by a current source, each of said n-drivers having a pair of transistors disposed such that a control terminal of one of said transistors is connected to a control terminal of an other of said transistors to form a common node thereat, said n-drivers disposed in a totem-pole configuration such that: (i) said one transistor of a first of said n-drivers has (A) a first terminal thereof linked to a ground and to an end of a first of said n-coils and (B) a second terminal thereof linked to a first terminal of said one transistor of a second of said n-drivers and to an end of a second of said n-coils; (ii) said other transistor of said first of said n-drivers has (A) a second terminal thereof linked to an opposite end of said first of said n-coils and (B) a first terminal thereof linked to said end of said second of said n-coils and to said second terminal of said one transistor of said first of said n-drivers; (iii) said one transistor of said second of said n-drivers also having (A) a second terminal thereof linked to a first terminal of said one transistor of a next of said n-drivers and to an end of a next of said n-coils, said other transistor of said second of said n-drivers also having (A) a second terminal thereof linked to an opposite end of said second of said n-coils and (B) a first terminal thereof linked to said end of said next of said n-coils and to said second terminal of said one transistor of said second of said n-drivers; and (iv) continuing until said one transistor and said other transistor of an nth of said n-drivers are likewise disposed in said totem-pole configuration of said n-drivers with a second terminal and a first terminal of said one transistor and said other transistor, respectively, of said nth of said n-drivers being connected to said current source; and (b), each of said n-drivers for operating a corresponding one of said n-coils by being responsive at said common node therefor to (i) a coil disable signal by activating said one transistor thereof and deactivating said other transistor thereof thereby not only drawing current away from and thus disabling said corresponding coil but also allowing said current to flow through said one transistor and thus be available as a source of current to a successive one of said n-drivers and (ii) a coil enable signal by deactivating said one transistor thereof and activating said other transistor thereof thereby allowing said current not only to flow serially through said corresponding coil and said other transistor thus enabling said corresponding coil but also to be available as a source of current to said successive one of said n-drivers.