Patent ID: 7126522

Claim:
An analog-to-digital conversion apparatus, comprising: a register group comprising a plurality of registers holding a plurality of channel specification data, respectively; a selecting section connected with a plurality of analog channels, and configured to sequentially select said plurality of analog channels for analog-to-digital (A/D) conversion continuously without any idling time based on said plurality of channel specification data held by said plurality of registers; and an A/D conversion section configured to carry out the A/D conversion of an analog signal on each of said analog channels selected by said selecting section into a digital signal, wherein said A/D conversion section issues a conversion end trigger signal immediately before end of said A/D conversion to a last analog input channel for each of said plurality of channel specification data, and wherein said plurality of channel specification data, having been latched by said plurality of registers, are shifted between said plurality of registers in response to said conversion trigger signal.