Patent ID: 7552306

Claim:
A system for allocation of random access memory comprising: a memory and management application process operable as instructions stored in the memory and operating on an operating system running on an associated processor, the management application process including means adapted for acquiring a memory area from a primary, hardware-based memory allocation system of an associated data processing system, which memory area is comprised of a plurality of uniformly fixed size memory blocks; an application program interface, which application program interface is adapted to provide a software interface between the management application process and each of a plurality of concurrently operable processes on the processor in connection with memory needed for each process such that memory allocation is completed via the management application process running above the hardware-based memory allocation system; and wherein the management application process further includes, means adapted for receiving a memory request from each of the plurality of processes via the application program interface, each memory request including data representative of a requested memory allocation size associated therewith, memory allocation means adapted for allocating to each of the plurality of processes and corresponding to each received memory request, memory from the plurality of acquired memory blocks, each allocation being defined by a base memory address disposed within the memory area, an offset value corresponding to the base memory address, and a corresponding memory allocation size; means adapted for generating allocation data corresponding to an allocation of memory by the memory allocation means, means adapted for communicating allocation data to a non-volatile data storage, failure detection means adapted for detecting an application termination in at least one of the plurality of processes, and means adapted for loading allocation data from the non-volatile data storage after detection of a process failure by the failure detection means.