Patent ID: 7288823

Claim:
A double gate field effect transistor comprising: a silicon substrate having active regions defined by device isolation trench regions; a plurality of fins protruding from the active regions, each fin having an upper face, a first side face, and a second side face, the first side face and the second side face facing each other; source regions and drain regions formed on both edges of the fins, respectively; channel regions formed between the source regions and the drain regions on the substrate; channel gate oxide films formed on the first side faces and the second side faces of the fins; a pad insulating film pattern formed on the upper faces of the fins; a device isolation insulating film pattern that fills device isolation trench regions; non-channel gate oxide films formed on the substrate on the active regions on which no protruding fins are formed; and a gate line formed on the gate oxide films, the pad insulating film pattern, and the non-channel gate oxide films.