Patent ID: 8749026

Claim:
A nonplanar tri-gate transistor comprising: a semiconductor body having: a top surface opposite a bottom surface; a pair of laterally opposite sidewalls extending between the top surface and the bottom surface; an upper body portion adjacent the top surface in which the laterally opposite sidewalls are substantially vertical, and a lower body portion extending from the upper body portion to the bottom surface in which the laterally opposite sidewalls continually taper inward from the upper body portion to the bottom surface such that the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface; a gate dielectric layer formed on and in direct contact with the top surface and the sidewalls of the semiconductor body from the top surface to the bottom surface; a gate electrode formed on the gate dielectric layer on the top surface and sidewalls of the semiconductor body; and a pair of source/drain regions formed in the semiconductor body on opposite sides of the gate electrode.