Patent ID: 8068114

Claim:
A system that provides a mechanism for granting controlled access to shared resources, comprising: a shared memory that stores a shared resource and a data set partitioned into fields; a first application-specific integrated circuit (ASIC) configured to write data to a first subset of the fields of the data set and read data from the fields of the data set, wherein the first ASIC computes a first value based on the data read from the fields of the data set in response to an access request by the first ASIC; and a second ASIC configured to write data to a second subset of the fields of the data set and read data from the fields of the data set, wherein the second ASIC computes a second value based on the data read from the fields of the data set in response to an access request by the second ASIC; wherein the fields of the data set comprise an identification (ID) bit corresponding to a last GPU to request access the shared resource, a first indicator bit indicating whether a first GPU issued an access request, and a second indicator bit indicating whether a second GPU issued an access request; and wherein the first ASIC comprises a one-bit adder that computes the first value by adding the ID bit corresponding to the last GPU to request access to the shared resource, the first indicator bit, the second indicator bit, and an ID bit corresponding to the first GPU.