Patent ID: 7880486

Claim:
An apparatus for interfacing test signals between a tester and an electronic device under test, said apparatus comprising: a structure; a plurality of channel terminals disposed on said structure and configured to connect electrically with communications channels from said tester; a plurality of probes disposed on said structure and configured to contact test features of said electronic device; a plurality of electrically conductive paths, each of said conductive paths connecting a first one of said channel terminals with a set of one or more of said probes, wherein the one or more of said probes in each said set are exclusive to said set; a power supply path connected to a second one of said channel terminals different from said first one of said channel terminals, said power supply path defining a voltage potential; and a plurality of shunt resistors disposed on said structure, each of said shunt resistors electrically connected between one of said probes and said voltage potential.