Patent ID: 7041559

Claim:
A method of forming a vertical power device, comprising the steps of: forming a semiconductor substrate having a drift region of first conductivity type therein and a transition region of first conductivity type that extends between the drift region and a first surface of the semiconductor substrate; forming a gate electrode on the first surface; implanting base shielding region dopants of second conductivity type at a relatively high dose and high energy level into an upper portion of the transition region, using the gate electrode as an implant mask; annealing the semiconductor substrate to partially drive the base shielding region dopants vertically into the transition region and laterally underneath the gate electrode and thereby define first and second intermediate shielding regions; implanting base region dopants of second conductivity type at a relatively low dose and low energy level into the first and second intermediate shielding regions, using the gate electrode as an implant mask; annealing the semiconductor substrate to drive the base region dopants vertically into the substrate and laterally along the first surface and underneath the gate electrode to thereby define first and second base regions, and simultaneously drive the base shielding region dopants laterally and vertically to substantially their full and final depth within the substrate and thereby define first and second base shielding regions that constrict a neck of the transition region to a minimum width; and forming first and second source regions in the first and second base regions, respectively.