Patent ID: 8605079

Claim:
An integrated circuit device comprising; a data line driving circuit that is provided for each of a plurality of data signal supply lines and supplies a multiplexed data signal to a corresponding one of the plurality of data signal supply lines; a position offset register that stores position offset setting values corresponding to position offsets that are offsets generated in a plurality of data signals, depending on positions of a plurality of data lines corresponding to a plurality of pixels, the position offset setting values being stored when the plurality of data signals after demultiplexing obtained by demultiplexing the multiplexed data signal with a demultiplexer are supplied to the plurality of pixels in one horizontal scanning period; and a position offset addition circuit that is provided corresponding to the data line driving circuit and performs a processing to correct the position offsets based on the position offset setting values, wherein, among a first pixel to a p-th (p is an integer of 2 or greater) pixel of the plurality of pixels, the position offset register at least stores a first position offset setting value corresponding to the first pixel and a p-th position offset setting value corresponding to the p-th pixel among the first pixel to the p-th pixel; and among a first image data to a p-th image data respectively corresponding to the first pixel to the p-th pixel, the position offset addition circuit at least processes addition of a position offset correction value based on the first position offset setting value to the first image data, and addition of a position offset correction value based on the p-th position offset setting value to the p-th image data among the first image data to the p-th image data, as the processing to correct the position offsets.