Patent ID: 8255673

Claim:
Apparatus for processing data comprising: processing circuitry for performing a processing task; a bus; monitoring circuitry arranged to monitor via said bus, at least one write transaction issued by said processing circuitry in response to execution of a corresponding write instruction during execution of said processing task, each of said at least one write transactions having an associated address specifying at least one final storage element for corresponding write data, said monitoring of said at least one write transaction comprising identifying in dependence upon said associated address whether said processing circuitry is required to perform a transaction authorisation for said at least one write transaction and if said transaction authorisation is required, to trigger said processing circuitry to perform said transaction authorisation and to receive a result of said transaction authorisation; wherein said processing circuitry is configured to enable execution by said processing circuitry of at least said corresponding write instruction to continue to completion before said monitoring circuitry has completed said monitoring of said at least one write transaction and wherein said monitoring circuitry is arranged, in the event that said monitoring circuitry identifies that said transaction authorisation is required for a given one of said at least one write transactions, to initiate storage of write transaction data for said given write transaction in an intermediate storage element to enable re-issue of said given write transaction in dependence upon a result of said transaction authorisation.