Patent ID: 8099073

Claim:
An amplifier circuit comprising: a high frequency path; a low frequency path, wherein the low frequency path comprises a flicker noise reduction mechanism including an image band rejection mechanism; and a summing node to sum an output from the high frequency path with an output from the low frequency path, wherein the low frequency path comprises: an in-phase path comprising a first amplifier, a first chopper, and a second chopper, wherein the first amplifier is coupled between the first chopper and the second chopper, wherein the first and second choppers use a first chopping signal; and a quadrature path comprising a second amplifier, a third chopper, and a fourth chopper, wherein the second amplifier is coupled between the third chopper and the fourth chopper, wherein the third and fourth choppers use a second chopping signal that differs from the first chopping signal by a quadrature phase shift.