Patent ID: 7875985

Claim:
A memory device, comprising: at least one memory stack of stacked memory dies which are staggered with respect to each other, each stacked memory die of the memory stack comprising: first die pads positioned along an edge of each stacked memory die for bonding each stacked memory die individually to substrate pads of the memory device, wherein each one of the first die pads is spaced a first distance from a neighboring one of the first die pads along the edge of the same stacked memory die; and second die pads positioned along the edge of each stacked memory die for connecting each stacked memory die in parallel with corresponding second die pads of other stacked memory dies of said the memory stack to corresponding substrate pads of the memory device, wherein each one of the second die pads is spaced the first distance from a neighboring one of the first die pads along the edge of the same stacked memory die and is spaced a second distance from a neighboring one of the second die pads along the edge of the same stacked memory die, and the first distance is greater than the second distance.