Patent ID: 6937601

Claim:
An apparatus for DBWRR (Delay Bound Weighted Round Robin) cell scheduling in an ATM (Asynchronous Transfer Mode) switch, comprising: a plurality of input buffers, each of said input buffers storing high-speed ATM cell groups in order; a queuing module for receiving high-speed ATM cells, grouping the received ATM cells according to scheduling cycles on a link basis and storing the resulting ATM cell groups in said input buffers; a plurality of ATM cell scheduling tables for storing and managing cell scheduling information about said ATM cell groups stored in corresponding ones of said input buffers; an ATM processor for processing and transferring said ATM cell groups stored in each of said input buffers on the basis of the cell scheduling information in each of said ATM cell scheduling tables, a preset weight, a delay time required by an earliest cell in a first one of said ATM cell groups stored in each of said input buffers and an allowable delay time required by each of said input buffers; a multiplexer connected in common to said input buffers for inputting a plurality of ATM cells from said input buffers and providing the inputted ATM cells as a single output signal; and an output buffer for inputting an ATM cell signal from said multiplexer and temporarily storing the inputted ATM cell signal for an output wait period of time.