Patent ID: 7825511

Claim:
A solder bump connection at a surface of a metallic bonding pad of a semiconductor chip comprising: a passivation layer formed upon said metal bonding pad surface, said passivation layer including a trench opening at said metal bonding pad surface defining a location for said solder bump connection; a barrier material liner formed in said trench opening, said barrier material liner having surface portions substantially coplanar with a surface of said passivation layer adjacent said solder bump connection location; a conducting material plug formed to fill said barrier material lined trench opening, said conducting material plug having a surface coplanar with a surface of said passivation layer; a diffusion barrier layer formed upon said substantially coplanar surface of said conducting material plug at said solder bump connection location; and, a solder bump formed upon a surface of said diffusion barrier layer, wherein said barrier material liner undercut is eliminated to enable reduced pitch and increased mechanical stability of said solder bump connection.