Patent ID: 8415982

Claim:
A semiconductor integrated circuit device, comprising: a first transistor connected between a first power source and a charge point, the first transistor being brought into conduction in response to an input signal; a second transistor connected between a second power source and a discharge point, the second transistor being brought into conduction in response to the input signal; a third transistor and a fourth transistor connected between the first transistor and the second transistor, the third transistor and the fourth transistor having drain source paths connected in parallel; and a switching section having a state-holding node, wherein the state-holding node is discharged in accordance with on/off of the third transistor and the fourth transistor, wherein an in-phase signal is inputted into gates of the third transistor and the fourth transistor and the in-phase signal is generated in accordance with a potential of one of the charge point and the discharge point, and wherein the first transistor and the third transistor are transistors of a first conductivity-type and the second transistor and the fourth transistor are transistors of a second conductivity type.