Patent ID: 8687400

Claim:
A semiconductor memory system comprising: a first nonvolatile memory chip; and a second nonvolatile memory chip; wherein each of the first nonvolatile memory chip and the second nonvolatile memory chip comprises a busy state output pad, the busy state output pad of the first nonvolatile memory chip is connected to the busy state output pad of the second nonvolatile memory chip; and wherein a initialization operation is performed in the first nonvolatile memory chip and the second nonvolatile memory chip, the busy state output pad is set to a first voltage as long as the initialization operation is performed in at least one of the first nonvolatile memory chip and the second nonvolatile memory chip, the busy state output pad is set to a second voltage after the initialization operation is completed in both the first nonvolatile memory chip and the second nonvolatile memory chip, and the first voltage is different from the second voltage.