Patent ID: 8572426

Claim:
An apparatus comprising: a delay line comprising first and second parallel branches each comprising multiple delay cells coupled in series at least some of which have an associated tap, the delay line configured to receive an input signal and to propagate the input signal in parallel through successive delay cells in the branches; wherein each delay cell is configured with one of: a minimum delay and a longer than minimum delay, such that, at least in a target portion of the delay line, associated taps of the first and second parallel branches are not aligned; sampling circuitry configured to sample the input signal at different taps in respective branches of the delay line and to output respective first and second sampled values; and encoding circuitry configured to generate, based on the first and second sampled values from taps associated with at least the target portion of the delay line, an encoded delay value with an encoded delay resolution greater than a delay resolution corresponding to the minimum delay.