Patent ID: 7285982

Claim:
A configuration circuit in a programmable logic device, comprising: a first voltage and a second voltage at a lower level than said first voltage; and a control signal coupled to a capacitive node to program a programmable logic circuit, wherein said control signal comprises a digital high and digital low signal levels; and a first configurable element comprising an on state and an off state coupled between the first voltage and the control signal; and a second configurable element comprising an on state and an off state coupled between the second voltage and the control signal; and a programmable means to configure one of: the first element to on state and the second element to off state to couple the first voltage to the control signal; and the second element to on state and the first element to off state to couple the second voltage to the control signal; wherein, a very low conducting current through the on configurable element is adequate to charge the capacitive node to said digital high or digital low signal levels.