Patent ID: 7605039

Claim:
A method of manufacturing a multiple-gate metal oxide semiconductor (MOS) transistor, the method comprising: forming a single crystalline silicon active region having an embossed pattern on a bulk silicon substrate, using an etching process; forming a first oxide layer and a first nitride layer on a surface of the single crystalline active region; patterning the first nitride layer to expose a portion of the first oxide layer corresponding to a channel region and an extension region of the single crystalline active region, by performing photolithography and etching processes using a predetermined mask; forming a thermal oxide layer of a field oxide layer type having a bird's beak, on the channel region and the extension region; removing the thermal oxide layer exposed at portions of the channel region and the extension region and removing the patterned first nitride layer such that the resulting extension region tapers to the channel region; forming a second oxide layer and a second nitride layer on the channel region of the exposed single crystalline silicon pattern; dry etching the second nitride layer and the second oxide layer by a predetermined height to form a gate insulating layer on a surface of the exposed single crystalline active region; forming a gate electrode on the gate insulating layer; and implanting ions into the single crystalline active region having source and drain regions.