Patent ID: 6859818

Claim:
A permutation method in which an operating apparatus including an accumulator based CPU and registers is used to permute input data u 1 , u 2 , . . . , u n by the following equation using an m by n matrix P of predetermined {0, 1} elements to obtain permuted data (u 1 ′, u 2 ′, . . . , u m ′) [ u 1 ′ u 2 ′ ⋮ u m ′ ] = P ⁡ [ u 1 u 2 ⋮ u n ] said method comprising the steps of: (a) setting each piece of said permuted data u j ′ by the following equation using already calculated u i ′ u j u i ′D i where j≠i, i and j are integers equal to or greater than 0 but equal to or smaller than m, m is an integer equal to or greater than 2 and D i is given by the difference D i =u j ′−u i ′ between said permuted data u j ′ and u i ′ defined by said matrix P using said input data u 1 , u 2 , . . . , u n ; and (b) calculating said u j ′ for all of said j.