Patent ID: 6878622

Claim:
A method of manufacturing a semiconductor device on a semiconductor substrate, comprising the steps of: forming a pair of multi-layer structures on an active region on the semiconductor substrate; forming sidewall spacers around the pair of multi-layer structures; forming a dielectric liner layer over the semiconductor substrate, including the pair of multi-layer structures the sidewall spacers, the dielectric liner layer in contact with the active region; forming a dielectric layer over the dielectric liner layer; forming a photoresist over the dielectric layer; pattering and developing the photoresist to form a photoresist contact opening therein; forming a first tapered contact opening, using the photoresist contact opening, into the dielectric layer, forming the first tapered contact opening with a bottom opening smaller than the photoresist contact opening; forming a second tapered contact opening, using the first tapered contact opening, into the dielectric liner layer forming the second tapered contact opening with a bottom opening open to the active region for a smaller region than the active region with which the dielectric liner layer is in contact; removing the photoresist; and forming a conductive material in the first and second tapered contact openings to form a contact in contact with the active region, the dielectric liner layer, and the dielectric layer.