Patent ID: 7842552

Claim:
A method, comprising: providing a carrier substrate and a chip, wherein the carrier substrate includes first substrate pads and second substrate pads, and wherein the chip includes first solder balls; placing the chip on the carrier substrate such that the first solder balls are in direct physical contact with the first substrate pads of the carrier substrate such that at least one solder ball of the first solder balls is in direct physical contact with at least one substrate pad of the first substrate pads; raising both the carrier substrate and the chip from an initial temperature up to a bonding temperature that is higher than the initial temperature resulting in the first solder balls being physically attached to the first substrate pads of the carrier substrate such that at least one solder ball of the first solder balls is physically attached to at least one substrate pad of the first substrate pads; cooling both the carrier substrate and the chip from the bonding temperature down to a final temperature after said raising is performed; attaching a first frame to the carrier substrate before a temperature of the carrier substrate and the chip reaches the final temperature as a result of said cooling being performed, wherein a CTE (coefficient of thermal expansion) of the first frame is substantially lower than a CTE of the carrier substrate, wherein said attaching the first frame is performed before said placing is performed; and before said attaching the first frame is performed, pre-stretching the carrier substrate resulting in the carrier substrate being under tensile stress, wherein either said attaching the first frame is performed while said cooling is performed or said attaching the first frame is performed when a temperature of both the carrier substrate and the chip reaches the bonding temperature as a result of said raising being performed.