Patent ID: 8710675

Claim:
A method for manufacturing an integrated circuit package system comprising: providing a first integrated circuit die having first die pads adjacent a first edge of the first integrated circuit die, the first integrated circuit die having a second edge opposite the first edge; forming first bonding lands adjacent the first edge; connecting the first die pads and the first bonding lands; forming an encapsulant over the first die pads and the first bonding lands to form a first package, the first bonding lands within and partially exposed from the encapsulant; providing a leadframe; providing a second integrated circuit die having second die pads adjacent a third edge of the second integrated circuit die, the second integrated circuit die having a fourth edge opposite the third edge; forming second bonding lands adjacent the third edge of the second integrated circuit die; connecting the second die pads and the second bonding lands; encapsulating the second die pads and portions of the second bonding lands to form a second package; stacking the second package over the first package in an offset configuration such that the fourth edge covers and overhangs the second edge and the third edge is recessed from the first edge exposing the first die pads, wherein the first bonding lands and the second bonding lands are electrically connected to the leadframe; and encapsulating the first package and the second package.