Patent ID: 7005343

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first metal wiring layer including at least a first capacitor electrode on a predetermined layer included in a semiconductor integrated circuit; coating the first capacitor electrode with a capacitor insulating film; forming a second metal wiring layer serving as a second capacitor electrode on the capacitor insulating film; forming a protection film on the second metal wiring layer; forming a first hard mask member on the protection film; forming a mask pattern of the second capacitor electrode on the first hard mask member; selectively removing the first hard mask member, the protection film and the second metal wiring layer according to the mask pattern of the second capacitor electrode; forming a second hard mask member to cover at least the first hard mask member; forming a mask pattern of the first capacitor electrode covering the second hard mask member; selectively removing at least the second hard mask member, the capacitor insulating film and the first metal wiring layer according to the mask pattern of the first capacitor electrode; forming an interlayer insulating film to cover at least the second hard mask member; and forming a plurality of contact holes reaching at least one of the first metal wiring layer and the second metal wiring layer in the interlayer insulating film.