Patent ID: 8624575

Claim:
A voltage stabilizing circuit comprising: an input port and an output port; an NPN transistor with a base terminal, a collector terminal and an emitter terminal, the collector terminal and emitter terminal being connected to the input port and the output port, respectively; a diode with an anode and a cathode, the anode of the diode being connected to the base terminal of the transistor; a three-terminal voltage regulating reference source with an anode connected to ground, a cathode connected to the input port, and a reference terminal; a first resistor connected between the cathode of the diode and the reference terminal of the three-terminal voltage regulating reference source; and a second resistor connected between ground and the reference terminal of the three-terminal voltage regulating reference source wherein the base terminal of the transistor is connected to the input port by a first current limiting circuit; wherein the first current limiting circuit comprises a third resistor; wherein the cathode of the three-terminal voltage regulating reference source is connected to the input port by a second current limiting circuit; and wherein the second current limiting circuit comprises a fourth resistor, a terminal of the fourth resistor is connected to the input port and a terminal of the third resistor, and another terminal of the fourth resistor is connected to the cathode of the three-terminal voltage regulating reference source and the cathode of the diode.