Patent ID: 7300745

Claim:
A method for manufacturing an integrated circuit comprising a nonvolatile memory, the method comprising: (a) forming over a semiconductor substrate: a plurality of first structures projecting upward, each first structure comprising floating gates for a plurality of nonvolatile memory cells associated with the first structure, each first structure comprising a first sidewall which is a dielectric sidewall; one or more pedestals projecting upward, each pedestal being positioned between the adjacent first sidewalls of two adjacent first structures; (b) forming a first layer and processing the first layer to provide a plurality of conductive lines, each conductive line overlaying the first sidewall of at least one first structure and providing conductive gates to the memory cells associated with the first structure, wherein each conductive line has a first portion that stretches between the associated first sidewall and an adjacent pedestal and reaches the pedestal, and each conductive line has a second portion that is not located between the first sidewall and a pedestal, the second portion being a sidewall spacer; wherein the processing of the first layer comprises a first etch of the first layer to form the sidewall spacers for the second portions, the second portions not being protected by a mask during the first etch; wherein at least one pedestal physically contacts two of the conductive lines having their first portions stretching between the respective two first sidewalls and the pedestal, the two conductive lines being insulated from each other.