Patent ID: 7897457

Claim:
A method for manufacturing a nonvolatile semiconductor memory device having a storage section provided with a plurality of memory cells, and a logic section having a plurality of transistors formed therein, on a semiconductor substrate, comprising the steps of: (a) forming a bit line contact region, which is a region where a contact is to be formed, on the semiconductor substrate in the storage section, forming a plurality of first gate insulating films on the semiconductor substrate, including on the bit line contact region, in the storage section so as to extend in a row direction, and forming a second gate insulating film on the semiconductor substrate in the logic section; (b) forming a plurality of bit line diffusion layers in an upper part of the semiconductor substrate in the storage section so as to extend in the row direction with the bit line contact region interposed therebetween; (c) forming a conductive film over the semiconductor substrate, the bit line diffusion layers, and the first gate insulating films in the storage section, and forming the conductive film on the second gate insulating film in the logic section; (d) forming a plurality of word lines from the conductive film in the storage section so that each word line crosses corresponding ones of the plurality of bit line diffusion layers, and extends in a column direction; (e) filling a gap between adjoining ones of the word lines in the storage section with an interlayer insulating film; (f) forming a gate electrode from the conductive film on the second gate insulating film in the logic section; and (g) removing at least the first gate insulating film in the bit line contact region in the storage section, and forming a connection diffusion layer in the bit line contact region in the upper part of the semiconductor substrate so as to connect the bit line diffusion layers located on both sides of the bit line contact region, wherein in the step (d), the conductive film is left so as to extend over the bit line contact region and over the bit line diffusion layers located on both sides of the bit line contact region, and the step (f) includes the step (f1) of forming end word lines from the remaining conductive film in the storage section so as to adjoin each other with the connection diffusion layer interposed therebetween.