Patent ID: 8460997

Claim:
A method of manufacturing a semiconductor memory device, comprising: forming a gate insulator on a semiconductor substrate; forming a first conductive film on said gate insulator; forming an intergate insulator on said first conductive film; selectively forming an aperture by etching through said intergate insulator in part of a region for use in formation of a transistor; forming a second conductive film on said intergate insulator; forming a first insulator above said second conductive film; forming a block film larger than said aperture to cover said aperture by selectively removing part of said first insulator; forming a sidewall composed of a second insulator on the sides of said block film and forming a gate pattern composed of said second insulator in a region for use in formation of control gates of memory cells; selectively removing said second conductive film, said intergate insulator and said first conductive film by etching with a mask of said block film, said sidewall and said gate pattern to form gates of said memory cell and said transistor; burying a third insulator around said formed gates; removing said second insulator after burying said third insulator; and siliciding said second conductive film by depositing a siliciding metal on an upper surface of a portion of the gates of said memory cell and said transistor from which said second insulator has been removed.