Patent ID: 7501693

Claim:
A low dropout (LDO) regulator device comprising: an LDO regulator integrated circuit formed on a semiconductor substrate, the LDO regulator integrated circuit having an input terminal receiving an input voltage, an output terminal providing an output voltage, an enable terminal receiving an enable signal and a bypass terminal for stabilization; a 4-pin quad flat no-lead (QFN) package housing the LDO regulator integrated circuit, the 4-pin QFN package comprising: four conductive leads for connecting to the input terminal, the output terminal, the enable terminal and the bypass terminal of the LDO regulator integrated circuit through respective bond wires; a die paddle on which a bottom surface of the LDO regulator integrated circuit is attached using a conductive die attach, the die paddle forming the ground terminal of the LDO regulator integrated circuit; and an encapsulant encapsulating the four conductive leads, the bond wires, the LDO regulator integrated circuit, and the die paddle and exposing the bottom surface of the die paddle and at least bottom surfaces of the four conductive leads forming corresponding four perimeter lands, wherein the die paddle is at a ground potential to allow a ground current of the LDO regulator integrated circuit to flow through the substrate and the die paddle of the 4-pin QFN package.