Patent ID: 8772882

Claim:
A semiconductor device comprising: a device isolation film defining a device region formed in a semiconductor substrate; a memory cell transistor including a first insulating film formed above the device region; a floating gate formed above the first insulating film and having a first width in a first direction; a second insulating film formed above the floating gate; and a control gate formed above the floating gate with the second insulating film interposed therebetween and extended in the first direction; a third insulating film formed above the semiconductor substrate with the memory cell transistor formed, the third insulating film having a contact hole reaching down to the device region, the contact hole having a second width in the first direction; a fourth insulating film formed on a inside wall of the contact hole; a contact plug formed in the contact hole with the fourth insulating film formed; and a bit line connected to the contact plug and extended in the second direction.