Patent ID: 7573117

Claim:
A semiconductor structure, comprising: a substrate having a metal wiring level within the substrate; a capping layer on and above a top surface of the substrate; an insulative layer on and above a top surface of the capping layer; a first layer of photo-imagable material on and above a top surface of the insulative layer; a layer of oxide on and above a top surface of the first layer of photo-imagable material; a second layer of photo-imagable material on and above a top surface of the layer of oxide; an inductor comprising a first portion and a second portion, wherein the first portion of the inductor is in the second layer of photo-imagable material, the layer of oxide, the first layer of photo-imagable material, the insulative layer, and the capping layer, and wherein the second portion of the inductor is in only the second layer of photo-imagable material; and a wire bond pad in only the first layer of photo-imagable material, the insulative layer, and the capping layer, wherein the first portion the inductor has a height in a first direction greater than a height of the wire bond pad in the first direction, wherein the first direction is perpendicularly directed from the top surface of substrate toward the insulative layer.