Patent ID: 7602044

Claim:
A semiconductor device comprising: a semiconductor substrate; a first insulating film disposed on the semiconductor substrate; a plurality, of resistors made of polycrystalline silicon and disposed on the first insulating film, each of the resistors having a low concentration impurity region and high concentration impurity regions at respective opposite ends of the low concentration impurity region; at least one dummy resistor made of polycrystalline silicon and disposed on the first insulating film; a second insulating film disposed on the plurality of resistors and on the at least one dummy resistor; a contact hole disposed in the second insulating film on each of the high concentration impurity regions; a metal wiring connected to the contact hole for connecting each portion of the plurality of resistors; and a plurality of metal portions each having substantially the same area and disposed on the second insulating film, the areas of the plurality of metal portions defining respective regions including at least one region overlying a preselected number of the plurality of resistors and at least one region overlying a combination of the plurality of resistors and the at least one dummy resistor in a number equal to the preselected number, the plurality of metal portions covering the low concentration impurity regions of the plurality of the resistors.