Patent ID: 7186481

Claim:
A flare measuring method for checking presence of flare in a semiconductor aligner, comprising: preparing a first measurement mask pattern including a first rectangular transparent area formed by a first shielding area and a first measuring portion similar to the first transparent area, provided within the first transparent area and having a plurality of first stripe-shaped shielding portions of the same figure aligned in parallel at regular intervals; preparing a second measurement mask pattern including a second transparent area, similar to the first transparent area and wider than the first transparent area, formed by a second shielding area, and a second measuring unit, provided within the second transparent area, having second stripe-shaped shielding portions identical to the first strip-shaped shielding portions; a patterning process of projecting the first and the second measurement mask patterns on a resist layer in a reduced size through light exposure and then patterning the exposed resist layer; a resist length measuring process of optically measuring a first resist pattern length in a direction orthogonal to an alignment direction of a first resist pattern, corresponding to the first stripe-shaped shielding portions and a second resist pattern length in a direction orthogonal to an alignment direction of a second resist pattern, corresponding to the second stripe-shaped shielding portions, obtained in the patterning process; and a flare measuring process of checking the presence of a first flare according to a first opening width P 1 that is a space between the first shielding area and the first measuring portion, a second opening width P 2 that is a space between the second shielding area and the second measuring portion, the first resist pattern length L 1 , and the second resist pattern length L 2 .