Patent ID: 7999717

Claim:
A folding circuit comprising: a reference voltage generating circuit that generates a plurality of different voltages as reference voltages; and a plurality of amplification circuits that convert differential voltages, between the plurality of reference voltages and an analog input voltage, to differential currents for output, output ends of the amplification circuits being alternately connected, each of the amplification circuits being configured by a differential amplifier circuit having a pair of cascode output NMOS transistors and a air of cascode input NMOS transistors, and a switch being provided, which is turned on in synchronization with a control clock, (a) between sources of the pair of cascode output transistors and (b) between drains of the pair of cascode input transistor, wherein gates of the pair of cascode input transistors receive the differential voltages; and the sources of the pair of cascade input transistors are connected to ground via a bias circuit.