Patent ID: 7414456

Claim:
A constant ratio current source, comprising: a first current branch comprising: a transistor Q 1 which conducts a current I 1 from a first current input to a first node; and a resistor R 1 connected between said first node and a circuit common point; a second current branch comprising: a transistor Q 2 which conducts a current I 2 from a second current input to a second node; and a resistor R 2 connected between said second node and said circuit common point, said first and second current branches arranged such that I 2 varies with I 1 ; a linear negative resistance circuit connected between said first and second nodes and arranged to provide an apparent negative resistance which increases the differential output impedance at said first and second current inputs such that the ratio of I 2 :I 1 is maintained approximately constant for a varying differential voltage applied across said first and second current inputs, wherein said linear negative resistance circuit comprises: a third transistor Q 3 ; a fourth transistor Q 4 , Q 3 and Q 4 being cross-coupled transistors having respective bases, collectors and emitters, such that the bases of Q 3 and Q 4 are connected to the collectors of Q 4 and Q 3 and are coupled to said second and first nodes, respectively, such that the voltage between the emitters of Q 3 and Q 4 has a polarity opposite that of the differential voltage present across said first and second differential current inputs; a resistance circuit connected between the emitters of said cross-coupled transistors; and a first current source which supplies a bias current I 3 that flows through said resistance circuit and said cross-coupled transistors, wherein said resistance circuit comprises: a resistor R 3 connected between the emitter of Q 3 and said first current source; and a resistor R 4 connected between the emitter of Q 4 and said first current source, R 1 -R 4 arranged such that R 1 ≃R 3 , R 2 ≃R 4 , R 1 ≠R 2 , and I 1 ≠I 2 ; said cross-coupled pair of transistors responding to changes in said differential voltage by dividing I 3 between said cross-coupled transistors to produce a differential correction current that maintains said ratio of I 2 :I 1 approximately constant for a varying differential voltage across said first and second current inputs; a fifth transistor Q 5 which is diode-connected and connected between the collector of Q 3 and said first node; a sixth transistor Q 6 which is diode-connected and connected between the collector of Q 4 and said second node; and a resistor R 5 connected in series between the collector and base of Q 6 and sized such that: R ⁢ ⁢ 5 = ( 1 - R ⁢ ⁢ 4 R ⁢ ⁢ 3 ) ⁢ ( R ⁢ ⁢ 3 + R ⁢ ⁢ 4 ) .