Patent ID: 8916468

Claim:
A semiconductor device fabrication method comprising: forming a transistor with a source and a drain on a semiconductor substrate; forming a first insulating film over the transistor; forming, in the first insulating film, a first conductive via which reaches the source or the drain; forming an opening which pierces the first insulating film and which reaches an inside of the semiconductor substrate; forming a second insulating film on a sidewall of the opening; forming a conductive layer over the first insulating film and in the opening; removing the conductive layer over the first insulating film by polishing to form a second conductive via in the opening; forming a third insulating film over the first insulating film and the second conductive via; forming, in the third insulating film, a first wiring which reaches the first conductive via and a second wiring which reaches the second conductive via; forming, after the forming the first conductive via and before the forming the opening, a fourth insulating film over the first insulating film and the first conductive via, wherein: in the forming the opening, the opening which pierces the first insulating film and the fourth insulating film and which reaches the inside of the semiconductor substrate is formed; and in the forming the second conductive via, the conductive layer is removed by the polishing with the fourth insulating film as a stopper and the fourth insulating film is removed after the polishing.