Patent ID: 7247883

Claim:
A thin film transistor (TFT), comprising: a semiconductor layer including: a source region and a drain region; a channel region between the source region and the drain region; and a lightly doped drain (LDD) region between the channel region and the source region or between the channel region and the drain region; a gate insulation layer on the source region, the drain region, the channel region, and the LDD region; and a gate electrode on the gate insulation layer, wherein the gate insulation layer has a first thickness at portions on the source region, the drain region, and the LDD region and a second thickness at a portion on which the gate electrode is arranged, the second thickness being greater than the first thickness, and a projected range of ions doped in the semiconductor layer extends to a first depth from a surface of the semiconductor layer in the LDD region, and wherein the difference between the second thickness and the first thickness equals the first depth.