Patent ID: 7203811

Claim:
A method for handling a list DMA command in a computer system having at least one processor and a system memory, the list DMA command relating to an effective address (EA) of the system memory, and the at least one processor having a local storage, the method comprising the steps of: queuing the list DMA command in a DMA queue (DMAQ), wherein the list DMA command comprises a first portion of the EA; fetching a list element from the local storage to the DMAQ, wherein the list element comprises a second portion of the EA; reading the list DMA command from the DMAQ; issuing a bus request for the list element; determining whether the bus request is a last request; upon a determination that the bus request is a last request, determining whether a current list element is a last list element; upon a determination that the current list element is not the last list element, determining whether the current list element is fenced; and upon a determination that the current list element is not fenced, fetching a next list element regardless of whether all outstanding requests are completed.