Patent ID: 7062745

Claim:
A method of specifying a configurable digital system, said method comprising: in at least one hardware definition language (HDL) file, specifying at least one design entity containing a functional portion of the digital system, said at least one design entity logically containing a configuration latch having a plurality of different possible configuration values that each corresponds to a different configuration of said functional portion of said digital system; with a statement in said at least one HDL file, associating a Dial entity with said at least one design entity, said Dial entity having a Dial input, a Dial output, a mapping table indicating a mapping between each of a plurality of possible input values that can be received at said Dial input and a respective corresponding output value for said Dial output, and a default input value among said plurality of possible input values, wherein said output value controls which of said plurality of different possible configuration values is loaded in said configuration latch; compiling said HDL file, wherein said compiling includes: generating a simulation model of said digital system, said simulation model including said design entity and said configuration latch; generating a configuration database separate from said simulation model, said configuration database including at least one data structure defining said Dial entity; and accessing said configuration database to determine a latch value of said configuration latch in said simulation model by reference to said at least one data structure defining said Dial entity and said default input value; and loading said configuration latch in said simulation model with said latch value.