Patent ID: 8809185

Claim:
A method for profiling a film stack of a semiconductor device, the method comprising: receiving a substrate having a film stack, the film stack comprising an insulation layer, a dielectric hard mask layer overlying the insulation layer, and a patterned metal hard mask layer formed on the dielectric hard mask layer, the patterned metal hard mask layer defining a pattern exposing at least a portion of the underlying dielectric hard mask layer; transferring the pattern in the patterned metal hard mask layer to the dielectric hard mask layer using a first dry etching process; transferring the pattern in the dielectric hard mask layer to the insulation layer using a second dry etching process, the second etching process using a plasma formed from a process composition comprising one or more halogen-containing gases, the second etching process etching the insulation layer and removing a portion of the patterned metal hard mask layer relative to the dielectric hard mask layer such that the patterned metal hard mask layer is reduced exposing a corner of the underlying dielectric hard mask layer; and removing portions of the dielectric hard mask layer that overhang the insulation layer using a third etching process, the third etching process using a plasma formed from a process composition that is more selective to the dielectric hard mask layer relative to the insulation layer.