Patent ID: 8473921

Claim:
In a computing environment, a method of debugging a software application, wherein the software application is configured to use one or more processor caches coupled to a processor in an architecturally significant fashion, the method comprising: beginning execution of the software application at a physical processor; running a debugger while executing the software application at the physical processor; detecting that a portion of the software application causes at least one of reads or writes to be made to a processor cache in an architecturally significant fashion; and based on detecting that the portion of the software application causes at least one of reads or writes to be made to the processor cache in an architecturally significant fashion, preserving any reads or writes made to the cache in an architecturally significant fashion, while performing debugging operations with the debugger that would ordinarily disturb the reads or writes made to the processor cache in an architecturally significant fashion, including: taking a snapshot of physical processor state of the physical processor and pausing execution of the software application at the physical processor; executing the portion of the software application using a software simulator that simulates the physical processor using the snapshot of physical processor state and that simulates the processor cache, while also performing the debugging operations with the debugger; and subsequent to executing the portion of the software application using the software simulator: applying simulated processor state to the physical processor; and resuming execution of the software application at the physical processor.