Patent ID: 8261046

Claim:
A method comprising: accessing a register file of a second thread by a core to obtain a source operand for an instruction of a first thread during execution of the instruction of the first thread on the core responsive to decoding the instruction including a location indicator and a source identifier for the source operand, wherein the location indicator for the source operand indicates that the source operand is located in the register file of the second thread and the source identifier indicates a source register in the register file of the second thread which stores the source operand, and further responsive to decoding the instruction including a location indicator and a destination identifier for a destination operand, wherein the location indicator for the destination operand indicates that the destination operand is to be accessed by the second thread, storing a result of the execution of the instruction as the destination operand in a destination register of a register file of the first thread indicated by the destination identifier, the core a common core on which the first and second threads execute.