Patent ID: 8732387

Claim:
A flash memory apparatus with automatic memory interface mode switching, comprising: a flash memory controller connectable to a plurality of flash memories, comprising: a memory interface, connected to the plurality of flash memories and having a plurality of chip enable pins, wherein each of the chip enable pins is configured to correspondingly initiate one of the plurality of flash memories; a microprocessor for enabling an operation of the chip enable pin allowing for the memory interface to access the plurality of flash memories; a system interface, which is connected to an application system; a data buffer/control unit, connected between the system interface and the memory interface, controlled by the microprocessor for facilitating data transmissions between the application system and the plurality of flash memories; and a memory unit connected to the microprocessor; a plurality of control registers, which are used to store interface mode settings of the plurality of flash memories; a selection circuit; an enable selection unit, which is used for controlling the selection circuit, which in turn to select the plurality of control registers to output the interface mode settings; and a plurality of selection registers, connected to the selection circuit, for classifying and registering the chip enable pin connected to the flash memories based on the interface mode supportable by the plurality of flash memories, and for registering selection signals corresponding to the control registers.