Patent ID: 8682466

Claim:
A method for semiconductor wafer result prediction, comprising using software and hardware to perform: collecting manufacturing data, including processing tool data from at least one semiconductor manufacturing tool and product data from at least one metrology tool, wherein the product data are collected from at least one actual wafer that has been processed by the at least one semiconductor manufacturing tool and the processing tool data are associated with at least one setting parameter of the semiconductor manufacturing tool during fabrication of the at least one actual wafer; choosing key parameters using an autokey analysis based on the manufacturing data, wherein the autokey analysis includes: grouping a plurality of processing parameters by a hierarchical clustering method using respective correlation distances, wherein the grouping groups together parameters of the plurality of processing parameters with respective correlation distances below a cut-off point to form a representative parameter; and selecting the representative parameter as one of the key parameters based on a correlation distance for the representative parameter; building a virtual metrology based on the key parameters to produce at least one virtual parameter, wherein the virtual metrology comprises: accepting the manufacturing data as a first input and outputting physical parameters; and accepting the physical parameters as a second input and outputting electrical parameters; and predicting wafer results using the at least one virtual parameter, wherein the predicting is performed with respect to the at least one actual wafer that has been processed by the at least one semiconductor manufacturing tool.