Patent ID: 8212302

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate comprising a channel formation region formed between a pair of impurity regions; a pair of field oxide films wherein the pair of impurity regions is between the pair of field oxide films; a first insulating layer formed over the semiconductor substrate; a floating gate formed over the first insulating layer and comprising at least a first layer and a second layer; a second insulating layer formed over the floating gate; and a control gate formed over the second insulating layer, wherein the first insulating layer, the floating gate, the second insulating layer and the control gate are overlapped with the channel formation region, wherein the first layer is in contact with the first insulating layer and includes a semiconductor material, wherein a band gap of the first layer is smaller than a band gap of the channel formation region in the semiconductor substrate, and wherein the first layer comprises an n-type impurity.