Patent ID: 7036216

Claim:
A method for connecting at least one chip to an external wiring configuration, which comprises: providing a chip with chip pads; forming conductor tracks and recesses in an external wiring configuration; spacing the chip at a distance away from the external wiring configuration by placing spacer cushions between a surface of the chip and the external wiring configuration to keep the chip pads at a distance from the external wiring configuration and to form a gap between the chip and the external wiring configuration; and forming electrically conductive connections between the chip and the external wiring configuration by introducing an electrically conductive contact material into the recesses in the external wiring configuration such that the electrically conductive contact material is in physical contact with the chip pads and the conductor tracks of the external wiring configuration, and such that the chip is not in physical contact with the external wiring configuration in areas other than the electrically conductive contact material and spacer cushions, thus forming a cavity between the chip and the wiring configuration in the areas other than the electrically conductive contact material and spacer cushions, and the electrically conductive contact material providing a mechanically robust electrical connection between the chip pads and the conductor tracks of the external wiring configuration.