Patent ID: 7417880

Claim:
A integrated circuit configuration for actuating at least a first (TOP) and a second (BOT) respective power semiconductor switches in a bridge topology, said circuit configuration comprising: a primary-side section and at least one respective secondary side section for respective power semiconductor switches in said bridge topology; said primary-side section circuitry further comprising: at least one means for signal processing and at least one assigned level shifter for enabling a potential-free actuation of said at least one secondary side; said secondary side section circuitry, further comprising: at least one means for signal processing; at least one driver stage for said respective power semiconductor switch in said bridge topology; means for detecting a switched state of said at least one power semiconductor switch, on said primary side section; and said means for detecting including at least one additional circuit section enabling a detection and an interpretation of a current flow (lq) through said assigned level shifter.