Patent ID: 8581639

Claim:
A differential output circuit comprising: a first variable current source having a first end that is connected to a first potential line; a first MOS transistor of a first conductivity type having a first end that is connected to a second end of the first variable current source and a second end connected to a first output terminal; a first resistor that is connected in series with the first MOS transistor between the first variable current source and the first output terminal; a second MOS transistor of a second conductivity type having a first end that is connected to the first output terminal; a second variable current source having a first end that is connected to a second end of the second MOS transistor and a second end to a second potential line; a third MOS transistor of the first conductivity type having a first end that is connected to the second end of the first variable current source and a second end connected to a second output terminal; a second resistor that is connected in series with the third MOS transistor between the first variable current source and the second output terminal; a fourth MOS transistor of the second conductivity type, having a first end that is connected to the second output terminal and a second end that is connected to the second end of the second variable current source; a third resistor that is connected to the first output terminal and a monitor node; a first switch element that is turned off in a first mode turned on in a second mode, and connected in series with the third resistor between the first output terminal and the monitor node; a fourth resistor that is connected between the second output terminal and the monitor node; a second switch element that is turned off in the first mode, turned on in the second mode, and connected in series with the fourth resistor between the second output terminal and the monitor node; a current control circuit for controlling a current output by the first variable current source according to an impedance of first variable current source in the first mode, and according to difference in a voltage at the monitor node and a reference voltage in the second mode; and a data signal control circuit for controlling the first through fourth transistors based on whether a mode of operation is the first mode or the second mode.