Patent ID: 8349686

Claim:
A method of manufacturing a nonvolatile semiconductor memory device comprising: forming gates respectively of transistors each by selectively stacking a floating electrode, a second gate insulating film and a control electrode film on a semiconductor substrate with a first gate insulating film provided on the semiconductor substrate; depositing a first insulating film between each adjacent two gates of the transistors; etching back the first insulating film to leave a bottom part of the first insulating film between each adjacent two gates of the transistors; forming a second insulating film on the first insulating film and on surfaces of the gates of the transistors; forming a coating film on the second insulating film; etching the coating film and the second insulating film until top surfaces of the gates of the transistors are exposed; forming a third insulating film on the exposed top surfaces of the gates of the transistors; forming an opening portion in an area in a shunt region between each adjacent two areas where the respective transistors are provided, by selectively etching the third insulating film so that the coating film is exposed through the opening portion; and etching the coating film through the opening portion to form between each adjacent two gates of the transistors a void part extending to the shunt region.