Patent ID: 6893541

Claim:
A method for forming copper interconnects within a pattern of openings defined in an exposed surface of a dielectric layer on a substrate, comprising the steps of: depositing a barrier layer of a material comprising a refractory metal or a compound thereof over the dielectric layer so as to coat inside surfaces of said openings; performing a sputter copper seed deposition over said barrier layer with the substrate retained over an RF-biased pedestal so as to obtain a smooth copper seed layer to facilitate electroplating, said performing comprising a first substep of depositing a first copper seed layer by a first sputtering process at a relatively high bias power, said first substep effecting a first deposition pattern on said sidewalls and said bottoms of said openings and for blanket deposition on said exposed surfaces, and a second substep of depositing a second copper seed layer by a second sputtering process at a relatively low bias power and at a pressure of about 5 milliTorr or less, said second substep effecting a second deposition pattern on sidewalls and bottoms of said openings and for blanket deposition on said exposed surfaces, wherein said second substep is performed after said first substep and wherein no sputtering into said pattern of opening is performed at said relatively low bias power prior to said first substep.