Patent ID: 6901465

Claim:
A data transfer control device for data transfer through a bus, comprising: a buffer having a data storage area for storing data that is received through a first bus and transmitted through a second bus during data transfer in a first direction, and for storing data that is received through the second bus and transmitted through the first bus during data transfer in a second direction; a packet handler circuit which separates data to be stored in the data storage area from a packet received through the first bus during data transfer in the first direction, the packet handler circuit generating a packet from data stored in the data storage area during data transfer in the second direction; and a buffer management circuit which manages the writing of data into the data storage area of the buffer and the reading of data from the data storage area, wherein the end of a data phase for the transfer of data during the data transfer in the first direction is determined on condition that data transmission through the second bus has ended; and wherein the end of a data phase for the transfer of data during the data transfer in the second direction is determined on condition that data reception through the second bus has ended and also the data storage area of the buffer has become empty.