Patent ID: 8217722

Claim:
A power amplifier comprising: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage, after boosting, as the output voltage of the booster, wherein the reference voltage generating circuit is turned ON/OFF corresponding to the output voltage of the booster, the booster includes: an enable terminal to which the enable voltage is applied, a power source terminal connected to a power source, a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded, and a field effect transistor (FET) resistor having a gate electrode and connected between the first electrode of the transistor and the power source terminal, wherein the gate electrode of the FET resistor is open.