Patent ID: 7139987

Claim:
An automated integrated circuit design method comprising: (a) defining performance specifications for a circuit formed from a plurality of interconnected circuit devices; (b) defining at least one constraint on the relative placement of each circuit device with respect to at least one other circuit device; (c) laying out the circuit devices subject to each constraint, wherein each circuit device is assigned an initial size that establishes an initial value of a device parameter therefor; (d) determining initial values of performances for the circuit from the layout of the circuit devices; (e) determining a ratio of changes of the values for each performance, device parameter pair, (f) determining that at least one performance is not within a predetermined tolerance of the corresponding performance specification and choosing one of the circuit devices; (g) resizing the chosen circuit device; (h) determining an updated value of the device parameter for the resized circuit device; (i) determining a first value as a difference between the updated value of the device parameter and the initial value of said device parameter; (j) for each ratio associated with the initial value of the device parameter having its value updated in step (h), multiplying said ratio with said first value to obtain a second value; (k) for each ratio having the second value determined therefor in step (j), combining said second value with the initial value of the performance associated with said ratio to determine an updated value for said performance; and (l) repeating steps (f)–(k) until the performances are within the predetermined tolerances of the performance specifications.