Patent ID: 7099229

Claim:
A non-volatile memory device comprising: a memory array including a plurality of memory cells arranged in rows and columns each of which receives supply of a data write current in accordance with storing data for performing data storage, a plurality of bit lines provided corresponding to memory cell columns, respectively, a first power supply line provided in common corresponding to one end of said plurality of bit lines, electrically coupled to at least one bit line of said plurality of bit lines for supplying a first voltage during data writing, a second power supply line provided in common corresponding to the other end of said plurality of bit lines, electrically coupled to said at least one bit line of said plurality of bit lines for supplying a second voltage during said data writing, a plurality of first voltage supply sections provided corresponding to a plurality of sites, respectively, of said first power supply line for supplying said first voltage, and a plurality of second voltage supply sections provided corresponding to a plurality of sites, respectively, of said second power supply line for supplying said second voltage.