Patent ID: 8570453

Claim:
An active matrix substrate comprising: scan signal lines that extend in a row direction; data signal lines that extend in a column direction, the scan signal lines and the data signal lines intersecting each other and defining a matrix of pixel regions; a first transistor connected to a data signal line and a scan signal line in each of the pixel regions; second and third transistors connected to a same scan signal line that is different from said scan signal line in each of the pixel regions; and a storage capacitance wiring, wherein a first pixel electrode electrically connected to said first transistor and a second pixel electrode connected to said first pixel electrode through a capacitance are provided in each of the pixel regions, wherein said storage capacitance wiring is formed in a same layer with the data signal lines, wherein said second transistor is electrically connected to said storage capacitance wiring and said first pixel electrode in each of the pixel regions, and wherein said third transistor is electrically connected to said storage capacitance wiring and said second pixel electrode in each of the pixel region.