Patent ID: 8525350

Claim:
A semiconductor device, comprising: a semiconductor die having a plurality of bond pads formed on a surface of the semiconductor die; an under bump metallization (UBM) formed over the bond pads of the semiconductor die; a fusible layer formed over the UBM, the fusible layer having a maximum width less than or equal to a width of the bond pads formed on the surface of the semiconductor die and a thickness in a range of 0.5-10.0 micrometers; a substrate having a plurality of traces formed on a surface of the substrate; and a plurality of stud bumps containing non-fusible material formed over the traces, each stud bump including a wire having a ball bond formed over first and second side surfaces of the traces and a tip of uniform height electrically connected to the bond pad of the semiconductor die by reflowing the fusible layer or applying thermal compression bonding such that an intermediate portion of the stud bumps between the tip and the ball bond is exposed with respect to the fusible layer.