Patent ID: 7902004

Claim:
A method of fabricating an image sensor array that reduces the potential for defects resulting from electrostatic discharge events during fabrication, the method comprising: (a) providing an insulating substrate; (b) forming at least one pixel over the substrate, the pixel including a switching transistor and a photo-sensitive cell, the switching transistor having a gate electrode, a source electrode and a drain electrode, the photo-sensitive cell having a top electrode; (c) forming a dielectric interlayer over the switching transistor and the photo-sensitive cell; (d) depositing a first conductive layer over the dielectric interlayer; (e) forming a via-patterned photoresist layer over the first conductive layer; (f) etching first and second vias in and through the first conductive layer and the dielectric interlayer using the via-patterned photoresist layer, the first and second vias having inner walls formed by exposed portions of the first conductive layer and the dielectric interlayer, the first via exposing a portion of the drain electrode, the second via exposing a portion of the top electrode; (g) depositing a second conductive layer directly over the first conductive layer, over the inner walls of the first and second vias, and over the exposed portions of the drain electrode and the top electrode; and (h) etching away portions of the second conductive layer and the first conductive layer to form data lines that provide electrical contact with the drain electrode, and voltage bias lines that provide electrical contact with the top electrode; (i) whereby the pixels of the image sensor array are substantially protected from electrostatic discharge events by the presence of the first conductive layer deposited over the dielectric interlayer.