Patent ID: 7015550

Claim:
A nonvolatile semiconductor memory device comprising: a memory cell including a floating gate constituted of a first conductive layer formed on a semiconductor substrate via a gate insulation film, a pair of first diffusion layers which are source or drain regions formed in the substrate positioned on opposite sides of the floating gate, first and second control gates constituted of second conductive, layers formed on the opposite aides of the floating gate to drive the floating gate, and an inter-gate insulation film formed between the first and second control gates and the floating gate; and a selection transistor for selecting the memory cell, including a selection gate•wiring including a first portion constituted of the same conductive layer as the first conductive layer, disposed adjacent to one of the first and second control gates via the inter-gate insulation film, and formed on the substrate via the gate insulation film, and a second portion constituted of the same conducive layer as the second conductive layer, disposed adjacent to the first portion, electrically connected to the first portion, and formed on the substrate via an insulation film, and a second diffusion layer formed in the substrate, facing the second portion of the selection gate•wiring.