Patent ID: 7707334

Claim:
A method of providing a self-synchronizing Hardware/Software interface, comprising the steps of: a) providing a single combined data and control message queue to interface with both a Software and a Hardware unit, wherein said single combined data and control message queue includes control information and data that are interleaved in a correct order so that said single combined data and control message queue is accessed sequentially without synchronizing between control parameters and data; b) enabling said Hardware unit; c) performing variable length decoding of an incoming bit stream by said Software and writing decoded control information and data into said combined data and control message queue; d) indicating an end of said combined data and control message queue; e) checking said combined data and control message queue by said Hardware; f) performing video decoding by said Hardware unit of information in said combined data and control message queue using associated control parameters from said combined data and control message queue; g) processing said information by said Hardware unit and writing said processed information into said combined data and control message queue for further use by said Software unit; and h) raising an interrupt signal by said Hardware that said decoding is finished.