Patent ID: 8379428

Claim:
A semiconductor storage device comprising: a semiconductor substrate; a plurality of memory cells formed on the semiconductor substrate, each of the plurality of memory cells including a transistor and a capacitor; a plurality of bit lines extending in a first direction; a plurality of word lines extending in a second direction which is different from the first direction; and a plurality of sense amplifiers including a first sense amplifier and a second sense amplifier, wherein the plurality of memory cells includes: a first memory cell group sharing a first auxiliary word line; and a second memory cell group sharing a second auxiliary word line, wherein the plurality of word lines includes a first word line coupled to the first auxiliary word line and a second word line coupled to the second auxiliary word line, the first word line is coupled to the first auxiliary word line in a first word line contact region, the second word line is coupled to the second auxiliary word line in a second word line contact region, the plurality of bit lines includes a first bit line and a second bit line respectively provided on both sides of the first word line contact region, and the first bit line and the second bit line are coupled to the first sense amplifier.