Patent ID: 7785952

Claim:
A method of fabricating a metal-oxide semiconductor device, the method comprising the steps of: providing a substrate; forming a shallow trench isolation region in the substrate that divides the substrate into an NFET region and a PFET region; forming at least one NFET gate stack over the NFET region of the substrate, the NFET gate stack comprising: an NFET gate stack metal gate layer; a first NFET gate stack silicon layer over the NFET gate stack metal gate layer; a second NFET gate stack silicon layer over a side of the first NFET gate stack silicon layer opposite the NFET gate stack metal gate layer, wherein an interface is defined between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer; forming at least one PFET gate stack over the PFET region of the substrate, the PFET gate stack comprising: a first PFET gate stack silicon layer; a second PFET gate stack silicon layer over a side of the first PFET gate stack silicon layer, wherein an interface is defined between the first PFET gate stack silicon layer and the second PFET gate stack silicon layer; forming an NFET gate stack silicide region that extends through the interface between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer; and forming a PFET gate stack silicide region that extends through the interface between the first PFET gate stack silicon layer and the second PFET gate stack silicon layer.