Patent ID: 8089323

Claim:
A power-efficient device comprising: a differential power amplifier having a pair of switching means and an inducting means; wherein said differential power amplifier has an AC coupling differential input signal for controlling said switching means, output nodes, a power supplying node and a power grounding node; wherein said switching means has a source terminal connected to the power supplying node and said inducting means having one terminal connected to said power grounding node; wherein said switching means has a drain terminal connected to another terminal of said inducting means and said output node; wherein said switching means has said AC coupling differential input signal biased at a cut-off voltage level having zero DC current; wherein said switching means receives a partial period of an input signal with a bias voltage having a zero DC current; the output nodes forming a composite signal that maintains complete information of said input signal; wherein said differential power amplifier is biased at a zero DC current level to eliminate all DC current flowing through said differential amplifier from said power supplying node to said power grounding node so that the differential power amplifier is power efficient; a single end to differential end signal converter and zero DC bias generator; said single end to differential end signal converter and zero DC bias generator generating a pair of differential input signals; said differential input signals having AC-coupling; said single end to differential end converter being a differential amplifier generating two AC signals having opposite polarity to each other; said zero DC bias generator having an average of said AC signal to be biased at the cut-off voltage level so that a negative half portion of said AC signal is cut off.