Patent ID: 7068195

Claim:
An apparatus for converting an analog input signal to a digital output signal, the apparatus comprising: a first analog-to-digital converter circuit that includes a first analog input port, a first sampling clock input port, and a first digital output port; a second analog-to-digital converter circuit that includes a second analog input port, a second sampling clock input port, and a second digital output port, wherein the first and second digital output ports are arranged to provide portions of the digital output signal in a time interleaved format when the first and second analog input ports are coupled to one another; an adjustment control circuit that is arranged to monitor sampling signals associated with the first and second analog-to-digital converter circuits, and also arranged to provide at least one control signal; and a clock driver circuit that is arranged to: receive an input clock signal, receive the at least one control signal, provide a first clock signal to the first sampling clock input port, and provide a second clock signal to the second sampling clock input port, wherein the clock driver circuit includes an adjustable delay circuit that is responsive to the at least one control signal.