Patent ID: 7203859

Claim:
A circuit configuration in switched op-amp technology, comprising: at least one switchable operational amplifier having an input and an output and transistors having a switching speed; at least one sampling capacitor connected to said input; at least one integrating capacitor connected to said input and to said output; a detector for detecting the switching speed of said transistors, said detector being connected to said operational amplifier; a clock generator producing a first and a second switching signal each having switching-clock phases including an on-phase and an off-phase, the on-phases of said first and said second switching clock signal being non-overlapping; said clock generator controlling charging of said sampling capacitor with said first switching-clock signal and switching said operational amplifier on and off with said second switching-clock signal; and a phase-variance device varying said switching-clock phases in which said first and second switching-clock signals are in said off-phase, said phase-variance device connected to said clock generator, said phase-variance device being configured for varying a duration of said switching-clock phases in which said first and second switching-clock signals are in said off-phase dependent upon said switching speed of said transistors as detected by said detector and enlarging said duration when said switching speed is high and reducing said duration when said switching speed is low.