Patent ID: 7915103

Claim:
A method for fabricating a flat panel display, the flat panel display comprising a plurality of sub-pixels and a periphery circuit area, the method comprising: providing a substrate; forming an amorphous silicon layer on the substrate; performing a first crystallization process to crystallize the amorphous silicon layer so that the amorphous silicon layer becomes a polysilicon layer; forming a patterned absorbing layer to cover an active area pattern of a driving thin film transistor (TFT) in each of the sub-pixels and to expose portions of the polysilicon layer; performing a second crystallization process to re-crystallize the exposed portions of the polysilicon layer so that a grain structure of the exposed portions of the polysilicon layer is different from a grain structure of a plurality of active areas covered by the active area patterns of the driving TFTs; removing the patterned absorbing layer; and removing portions of the polysilicon layer to form the active area of the driving TFT and to form an active area of a switching TFT in the exposed portions of the polysilicon layer of each sub-pixel, and to form at least an active area of a peripheral driving TFT in the periphery circuit area; wherein each of the active areas comprises a channel region, a source region, and a drain region, and the grain structure of a channel region of the peripheral driving TFT in the periphery circuit area is the same as the grain structure of the channel region of the switching TFT in each of the sub-pixels.