Patent ID: 7335557

Claim:
A method of forming a non-volatile memory semiconductor device comprising the steps of: forming a first control gate over a semiconductor substrate; forming a plurality of diffusion regions over said substrate; forming a first oxide layer over a portion of said substrate and portions of a surface of said diffusion regions; forming a second oxide layer over portions of said surface of said diffusion regions; forming a first insulating layer over said first control gate; forming a floating gate over said second oxide layer; forming a second insulating layer over said floating gate; forming a second control gate over said second insulating layer; forming a third insulating layer over portions of said diffusion region, the second control gate and the second insulating layer; forming a contact hole through the third insulating layer and the second insulating layer, and through the third insulating layer to the second control gate; and filling said contact hole with a conductive material, said conductive material electrically connecting the first control gate to the second control gate using said contact hole.