Patent ID: 7648900

Claim:
A method of creating a semiconductor device on a semiconductor wafer, the method comprising: creating at least one first opening and at least one second opening therein, the at least one first opening having a width that is narrower than a width of the at least one second opening; forming a dielectric portion within the at least one first opening and within the at least one second opening; forming a first conductive portion over the semiconductor wafer, the first conductive portion partially filling the at least one second opening and completely filling the at least one first opening; forming, prior to forming the first conductive portion, a barrier portion on the dielectric portion; subsequent to forming the first conductive layer, forming a second conductive layer over the semiconductor wafer and within the at least one second opening; removing the first and second conductive portions from over a major surface of the semiconductor wafer through which the at least one first opening and the at least one second opening are exposed while leaving the first conductive portion within the at least one first opening to form at least one first interconnect and leaving the at least one second conductive portion within the at least one second opening to form at least one second interconnect; electrically connecting the at least one first interconnect with one of a digital and an analog signal path; and electrically connecting the at least one second interconnect with one of a power and a ground path.