Patent ID: 8810676

Claim:
An analog to digital converter (ADC) comprising: a multi-input comparison unit configured to compare a pixel voltage from an image sensor, a comparison voltage comprising a stepped voltage modified during a coarse mode of operation of the ADC, and a ramp voltage comprising a ramped voltage modified during a fine mode of operation of the ADC, to provide a comparison result signal to indicate whether the comparison voltage combined with the ramp voltage is greater than or less than the pixel voltage; a selection control signal generation unit receiving the comparison result signal and a mode control signal, indicating that the ADC is operating in coarse mode or fine mode, to provide a selection control signal to allow modification of the comparison voltage in the coarse mode and to hold the comparison voltage constant in the fine mode; a reference voltage selection unit receiving the selection control signal to control modification of the comparison voltage by repetitively selecting one of a plurality of reference voltages based on the selection control signal; and wherein the multi-input comparison unit is further configured to compare the pixel voltage to the comparison voltage to provide a first voltage difference and is configured to compare the ramp voltage to a ramp initial voltage to provide a second voltage difference and is configured to amplify a difference between the first voltage difference and the second voltage difference during the coarse mode.