Patent ID: 7723238

Claim:
A method for manufacturing a semiconductor device comprising the steps of: applying a first high frequency power of a first frequency to a processing gas to generate a plasma of the processing gas; applying a second high frequency power of a second frequency smaller than the first frequency to a substrate to be processed; etching a to-be-etched layer disposed under a resist film having a pattern of openings by using the resist film as a mask, the to-be-etched layer being disposed on a surface of the substrate; etching an exposed underlying layer by using a patterned to-be-etched layer and the resist film as a mask after etching the to-be-etched layer; and overetching a remaining layer of the underlying layer after etching the exposed underlying layer, wherein dimensions of openings formed in the to-be-etched layer are controlled by varying an applied power of the first high frequency, wherein the exposed underlying layer includes a TEOS (tetraethyl orthosilicate) layer and a low-k layer underneath the TEOS layer, and wherein, to prevent striation formation at sidewalls of the openings of the resist film, the TEOS layer and the low-k layer are etched in one step by using as the processing gas CHF 2 /CF 4 /Ar/N 2 , or CF 4 /H 2 , the first high frequency ranging from 13.56 MHz to 100 MHz and a power density of the first high frequency ranging from 1.63×10 −2 W/cm 2 to 4.89×10 −2 W/cm 2 .