Patent ID: 7328421

Claim:
A method for generating a netlist for an electronic system, comprising: via a processor executing program code, identifying one or more relocation blocks from blocks of a first system design hierarchy for the electronic system, wherein each relocation block has one or more ports; wherein each port of each relocation block is defined to be connected to another port of a block from the first system design hierarchy; determining a corresponding target block in the first system design hierarchy for each relocation block; wherein the corresponding target block for each relocation block is an ancestor of the relocation block in the first system design hierarchy; producing a second system design hierarchy from the first system design hierarchy, and in the second system design hierarchy relocating each relocation block to the corresponding target block, and maintaining connectivity for the one or more ports for each relocation block; wherein the connectivity maintained for each port of each relocation block is between the port of the relocation block and the another port of a block; and generating the netlist from the second system design hierarchy.