Patent ID: 8581419

Claim:
A multi-chip stack structure, comprising: a first chip; a second chip, stacked on the first chip, and comprising a plurality of first through silicon via (TSV) structures to conduct a first reference voltage, wherein dummy TSV structures of the second chip are used to realize the first TSV structures for transferring heat between the first chip and the second chip; a plurality of first conductive bumps, disposed between the plurality of first chip and the second chip, and electrically connected to the plurality of first TSV structures, wherein dummy micro bumps of the multi-chip stack structure are used to realize the first conductive bumps; and a first shielding layer, disposed between the first chip and the plurality of first conductive bumps, and electrically connected to the plurality of first conductive bumps, wherein the first shielding layer is disposed in dummy area of the first chip for conducting heat between the first chip and the second chip.