Patent ID: 8534532

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: (a) providing a wiring substrate having an upper surface on which a plurality of bonding leads being formed, each bonding lead including a first portion having a first width in a plan view, and a second portion integrally formed with the first portion and having a second width smaller than the first width in the plan view, and (b) disposing a semiconductor chip having a front surface, a plurality of bonding pads formed on the front surface, a plurality of projecting electrodes bonded to the bonding pads, and a plurality of first solder materials attached to tip end surfaces of the projecting electrodes, over the wiring substrate such that the front surface faces the upper surface of the wiring substrate, and electrically connecting the bonding leads to the bonding pads, wherein a plurality of second solder materials is formed in advance on the bonding leads of the wiring substrate provided in the step (a); wherein in the step (b), the semiconductor chip is disposed over the wiring substrate such that the projecting electrodes overlap with the second portion of the bonding leads, respectively; and wherein in the step (b), the second solder materials are melted by applying heat to the second solder materials.