Patent ID: 8880964

Claim:
A non-volatile storage apparatus, comprising: a set of NAND strings in a block; and one or more control circuits, the one or more control circuits: load original bits of write data, each original bit controls whether programming occurs in a respective NAND string of the set of NAND strings; in response to the load, perform an evaluation of the set of NAND strings to identify one or more defective NAND strings, remaining NAND strings of the set of NAND strings are non-defective NAND strings, the evaluation comprises read operations for storage elements along a word line, the storage elements along the word line are expected to be in an erased state, the one or more defective strings are identified by one or more of the storage elements which are expected to be in the erased state but which are not in the erased state, and the remaining NAND strings are identified by remaining storage elements along the word line which are expected to be in the erased state and which are in the erased state; provide modified write data, the modified write data comprising: a flipped bit having a bit value which prohibits programming for each of the one or more defective NAND strings for which the original bit of write data has a bit value which allows programming, and the original bit for each of the non-defective NAND strings; and write the modified write data into the set of NAND strings.