Patent ID: 7295630

Claim:
A method, comprising: determining a bit value of a demodulated signal, in which N previously detected bits (where N is at least 2) of a demodulated bit stream are used to select which one of a plurality of threshold levels against which a current demodulated bit is to be compared in a bit slicer and is to be updated using the current demodulated bit; subtracting the demodulated signal from one of a plurality of selected preset default values to produce a current dc offset estimate, deriving a mean dc offset estimate from the current dc offset estimate and a plurality of preceding dc offset estimates, combining the mean dc offset estimate with the selected threshold value and applying the combined signal to a threshold input of the bit slicer; adjusting a responsiveness of the mean dc offset estimate with respect to drift; oversampling the demodulated by a factor M, where M is an interger on the order of 20; intermittently integrating a least one sample in the vicinity of the M/2 sample of each of at least 2 bit periods of the demodulated signal to generate a demodulated signal to be compared with the selected one of the threshold values; comparing a result of the integrating with the selected threshold level; and using the result to update the selected threshold value.