Patent ID: 7183146

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: forming a gate electrode over a substrate having an insulating surface by discharging a first conductive material; performing a first heat treatment to the gate electrode by a lamp or a laser beam; planarizing the gate electrode; laminating a semiconductor layer, a channel protection layer, and a semiconductor layer having n-type or p-type conductivity over the gate electrode; forming a pixel electrode over the substrate by discharging a second conductive material; performing a second heat treatment to the pixel electrode by a lamp or a laser beam; planarizing the pixel electrode; forming source and drain wirings over a semiconductor layer having one of n-type or p-type conductivity by discharging a third conductive material; performing a third heat treatment to the source and drain wirings by a lamp or a laser beam; and planarizing the source and drain wirings.