Patent ID: 8008969

Claim:
An apparatus comprising: an integrator that receives an input signal; a pulse width modulator (PWM) that is coupled to the integrator; a logic circuit coupled to the PWM; and an output stage having: a first node; a second node; a third node; a fourth node that is coupled to ground; a capacitor that is coupled between the first and second nodes; and a switch network that is coupled to the first node, the second node, the third node, the fourth node, and a supply rail, wherein the switch network is controlled by logic circuit so as to operate in first mode, a second mode, and a third mode, and wherein, in the first mode, the voltage supply charges the capacitor and the third node is grounded, and wherein, in the second mode, the capacitor provides a positive supply voltage to the third node, and wherein, in the third mode, the capacitor provides a negative supply voltage in the third mode.