Patent ID: 7380333

Claim:
A method of making a chip resistor comprising the steps of: preparing a ceramic substrate that includes an upper surface and a lower surface opposite to the upper surface, the upper surface being provided with at least one row of resistive elements spaced from each other, with an upper conductive layer connected to the resistive elements and with a resin layer enclosing the resistive elements; conducting primary cutting on the ceramic substrate to produce an intermediate form including an upper plane, a lower plane and a side plane extending between the upper plane and the lower plane, the upper plane corresponding to a part of the upper surface of the ceramic substrate, the lower plane corresponding to a part of the lower surface of the ceramic substrate the side plane being a cut surface resulting from the primary cutting, the upper plane being provided with the at least one row of resistive elements the upper conductive layer, and the resin layer; forming a side conductive layer on the side plane of the intermediate form, the side conductive layer being connected to the upper conductive layer; and conducting secondary cutting on the intermediate form and the side conductive layer and then the resin layer, the secondary cutting proceeding from the lower plane toward the upper plane of the intermediate form in a manner such that the side conductive layer is cut simultaneously with the intermediate form; wherein the resin layer is smaller in thickness than the substrate.