Patent ID: 7777223

Claim:
A semiconductor device having a plurality of pads above a main surface of a semiconductor substrate as terminals for external connection, wherein the plurality of pads include dual use pads which are used in both a probing test and assembly, assembly pads which are not used in the probing test, and probing test pads which are not used in assembly, the dual use pads and the probing test pads are provided in a first area above the main surface of the semiconductor substrate, an application of pressure by a probe during the probing test being permitted in the first area, the assembly pads are provided in a second area above the main surface of the semiconductor substrate, the application of pressure by the probe during the probing test not being permitted in the second area, the dual use pads have a shape compatible with both assembly and connection with the probe, the assembly pads have a shape compatible with only assembly, the probing test pads have a shape compatible with only connection with the probe, and a measurement in a pad pitch direction of the shape compatible with only connection with the probe is smaller than a measurement in a pad pitch direction of the shape compatible with only assembly.