Patent ID: 8288194

Claim:
A method of fabricating a thin film transistor (TFT), comprising the steps of: providing a substrate with a gate electrode formed thereon; forming an insulating layer on the substrate and covering the gate electrode; forming an intrinsic amorphous silicon layer (intrinsic a-Si layer) on the insulating layer; forming an etch-stop layer on the intrinsic amorphous silicon layer, and the etch-stop layer positioned correspondingly to the gate electrode; forming an oxide layer, at two sides of the etch-stop layer; forming a n+ a-Si layer above the intrinsic amorphous silicon layer, and the n+ a-Si layer covering a partial surface of the etch-stop layer and the oxide layer separating a sidewall of the etch-stop layer and the n+ a-Si layer; and forming a conductive layer on the n+ a-Si layer.