Patent ID: 7326616

Claim:
A method of manufacturing a semiconductor integrated circuit device, comprising steps of: (a) forming a first conductive film over a memory cell forming region and over a peripheral circuit forming region of a semiconductor substrate; (b) patterning the first conductive film lying over the memory cell forming region to form a first conductive pattern which serves as a first gate electrode of a memory cell and leaving the first conductive film over the peripheral circuit forming region; (c) after the step (b), forming a second conductive film over the memory cell forming region and over the first conductive film in the peripheral circuit forming region; (d) after the step (c), forming a second gate electrode of the memory cell on at least one side wall of the first conductive pattern by etching the second conductive film; and (e) after the step (d), forming a gate electrode of a peripheral circuit transistor by etching the first conductive film in the peripheral circuit forming region.