Patent ID: 8237218

Claim:
A nonvolatile semiconductor memory device having a plurality of NAND cell units formed of a plurality of electrically rewritable memory cells connected in series and a first selection transistor and a second selection transistor connected to both ends of the memory cells, respectively, the NAND cell unit being formed by connecting a plurality of memory cells in a vertical stacking direction, each of the memory cells having a channel region formed in a direction vertical to a surface of a substrate, the first selection transistor and the second selection transistor being formed on the surface of the substrate, the channel regions of the memory cells being formed by a first semiconductor layer formed so as to extend in the vertical stacking direction with one end connected to a diffusion layer of the first selection transistor and the other end connected to a diffusion layer of the second selection transistor, and the first semiconductor layer having an inverted U-shaped cross sectional shape in a way of turning back at an uppermost portion in the vertical stacking direction and contacting the first selection transistor and the second selection transistor at a lower portion.