Patent ID: 8671252

Claim:
A method for executing concurrent operations in a selected memory device of a memory system having serially connected memory devices, comprising: receiving a first command; executing core operations in a first memory bank of the selected memory device in response to the first command; receiving a second command during execution of core operations in the first memory bank; executing core operations in a second memory bank of the selected memory device in response to the second command; receiving a third command for requesting result information from one of the first memory bank and the second memory bank; outputting a read data packet containing the result information in response to the third command; and, wherein the first command, the second command and the third command are command packets including a series of bits logically configured to include a mandatory command field for providing an operation code and a device address, an optional address field following the command field for providing one of a row and column address when the operation code corresponds to a read or write operation, and, an optional data field following the address field for providing write data when the operation code corresponds to the write operation.