Patent ID: 7483276

Claim:
A semiconductor package comprising: a semiconductor chip; a plurality of active/passive devices; a first PCB acting as a main board, the semiconductor chip and devices selected from the plurality of active/passive devices being mounted on the first PCB, the devices including a highest device; and at least one sub-PCB, remaining devices of the plurality of active/passive devices being mounted on the sub-PCB, the sub-PCB having a through-bole, at least the highest device on the first PCB extending through the through-hole, so that the sub-PCB is connected to the first PCB and positioned in a space above the first PCB while overlapping the first PCB, wherein the sub-PCB comprises: a second PCB having at least one active/passive device, the second PCB being connected to and positioned on the semiconductor chip, and a third PCB having at least one active/passive device mounted on a surface, an opening for exposing a connection portion between the semiconductor chip and the second PCB, and a through-hole suitable for accommodating the highest device on the first PCB extending through the through-hole, the third PCB being positioned so as to overlap the first PCB and the second PCB.