Patent ID: 8719510

Claim:
A microprocessor, comprising: a cache memory; and a data prefetcher, configured to: detect a pattern of memory accesses within a first memory block based on physical addresses of the memory accesses and prefetch into the cache memory cache lines from the first memory block based on the pattern, wherein the first memory block has a virtual address; maintain a table of entries, wherein each entry of the table comprises first, second, and third fields, wherein the second field holds a representation of a virtual base address of a recently accessed memory block, wherein the first field holds a representation of a virtual base address of a memory block virtually adjacent to the recently accessed memory block in one direction, wherein the third field holds a representation of a virtual base address of a memory block virtually adjacent to the recently accessed memory block in the other direction; observe a new memory access request to a second memory block, wherein the new memory access request specifies a physical address, wherein the second memory block has a virtual address; determine that the first memory block is adjacent to the second memory block with respect to their virtual addresses and that the pattern of memory accesses detected within the first memory block, when continued from the first memory block to the second memory block, predicts an access to a cache line implicated by the physical address of the new request within the second memory block; and responsively prefetch into the cache memory cache lines from the second memory block based on the pattern of memory accesses detected within the first memory block; and wherein to determine that the first memory block is adjacent to the second memory block with respect to their virtual addresses, the data prefetcher is configured to: determine that a representation of a virtual base address of the second memory block matches either the first or third field in one of the entries of the table; and determine that the second field in the matching entry matches a representation of a virtual base address of the first memory block.