Patent ID: 6906349

Claim:
A thin film transistor array panel comprising: an insulating substrate including a plurality of pixel areas; a gate wire formed on the substrate; a first data wire insulated from the gate wire and intersecting the gate wire to define the pixel areas; a second data wire insulated from the gate wire and intersecting the gate wire; a plurality of pixel electrodes formed in the pixel areas; a plurality of switching thin film transistors connected to the gate wire and the data wire and including polysilicon members; and a plurality of driving thin film transistors connected to the switching thin film transistors, the pixel electrodes, and the second data wire and including polysilicon members, wherein the substrate includes a plurality of groups of divisional areas, each divisional area provided with the switching thin film transistors and the driving thin film transistors having substantially the same driving capacity, the switching thin film transistors and the driving thin film transistors in the divisional areas in one of the groups have different driving capacities, and the divisional areas in the different groups are mixed.