Patent ID: 7573519

Claim:
A CMOS image sensor comprising: (a) a plurality of pixels arranged in columns and rows in an array; (b) a column circuit for storing reset signal levels and sample image signals after integration; (c) a correlated double sampler which derives an image signal from the reset signal levels and the sample image signals after integration; (d) an anti-eclipse circuit physically separated from the column circuit and electrically connected to one or shared between multiple columns of pixels for detecting when a reset signal level on a column of pixels falls below a preset threshold during a reset operation and for restoring the reset signal level on the respective one or multiple columns of pixels, wherein the anti-eclipse circuit comprises a comparator connected to one or more column of pixels via switches for comparing a predetermined voltage to a reset signal level from one of the column of pixels; a flip-flop connected to an output of the comparator and one or more switches connected between an output of the flip flop and the respective one or multiple columns of pixels.