Patent ID: 8519552

Claim:
A circuit component comprising: a semiconductor chip comprising a semiconductor substrate, a transistor in or on said semiconductor substrate, a first metal interconnect over said semiconductor substrate, a second metal interconnect over said semiconductor substrate, a third metal interconnect over said semiconductor substrate, wherein said first metal interconnect comprises a damascene copper layer, a first insulating layer over said semiconductor substrate, wherein a first opening in said first insulating layer is over a first contact point of said first metal interconnect, and said first contact point is at a bottom of said first opening, wherein a second opening in said first insulating layer is over a second contact point of said second metal interconnect, and said second contact point is at a bottom of said second opening, and wherein a third opening in said first insulating layer is over a third contact point of said third metal interconnect, and said third contact point is at a bottom of said third opening, a fourth metal interconnect on said first and second contact points and over said first insulating layer, wherein said first contact point is connected to said second contact point through said fourth metal interconnect, a second insulating layer over said fourth metal interconnect and said first insulating layer, wherein said second insulating layer contacts a top surface and a sidewall of said fourth metal interconnect, and a metal bump connected to said third contact point through said third opening; and a glass substrate over said semiconductor chip and said metal bump.