Patent ID: 7456475

Claim:
A display panel, comprising: a substrate comprising a chip bonding region and a cut cross-section; a first conductive layer on the chip bonding region; a second conductive layer beside the chip bonding region extending until the cut cross-section; a first insulating layer on the substrate between the first and the second conductive layers covering a sidewall of the first conductive layer, and disposed on the second conductive layer extending until the cut cross-section, with an opening exposing a top surface thereof; a third conductive layer disposed over the first insulating layer and electrically connecting the first and second conductive layers; a fourth conductive layer disposed on the first insulating layer between the first and the second conductive layers, and under the third conductive layer; and a second insulating layer covering the fourth conductive layer, with an opening exposing a top surface of the fourth conductive layer, and under the third conductive layer, wherein the second conductive layer and the first conductive layer are disposed at the same side of the cut cross-section.