Patent ID: 6893988

Claim:
A method for manufacturing a non-volatile memory of a SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) structure, comprising the steps of: depositing an oxide film on a substrate; removing the oxide film from a flash device area and a logic gate area, wherein the flash device area and the logic gate area are areas of the oxide film on which a flash device and a logic gate is to be formed, respectively; stacking a tunnel oxide layer on an opened surface of the substrate corresponding to the area of the oxide film; stacking a first polysilicon over the resultant structure; carrying out a polish with respect to the first polysilicon down to a top surface of the oxide film; removing the oxide film; forming an LDD (lightly doped drain) in an upper portion of the substrate excepting an area occupied by the tunnel oxide layer; depositing a sidewall on a side of the first polysilicon; generating a drain and a source beneath the LDD excepting an area contacted to the sidewall; stacking a TEOS (Tetra Ethyl Ortho Silicate) on the resultant structure excepting the flash device area; depositing an ONO (Oxide-Nitride-Oxide) layer over the resultant structure; stacking a second polysilicon over the ONO layer; carrying out a polish with respect to the second polisilicon and the ONO layer down to a top surface of the TEOS; and removing the TEOS.