Patent ID: 8169819

Claim:
A semiconductor storage device, comprising: a semiconductor substrate on which circuits including a peripheral circuit are disposed; a memory cell block having a plurality of memory cells connected in series as one unit, each of the plurality of memory cell including a core disposed columnarly above the semiconductor substrate and made of a material having a variable resistance value, an insulating thin film disposed on a side surface of the core through a semiconductor thin film, and a conductive film selectively disposed on a surface of the insulating thin film through the insulating thin film; a first layer disposed between the semiconductor substrate and the memory cell block; and a second layer disposed above the memory cell block, a bit line being provided in the second layer, wherein the memory cell has a switching transistor and a resistance effect element electrically connected in parallel to the switching transistor, the switching transistor has the insulating thin film as a gate insulator, the conductive film as a gate electrode, and the semiconductor thin film as a channel, and the resistance effect element has the core region as a resistor, wherein the memory cell block includes a first node configured by a selective transistor, and second to n-th (≧2) nodes configured by each of the plurality of memory cells, wherein the selective transistor of the first node is connected to the bit line, and each gate of the switching transistors of the second to n-th nodes is connected to a word line, and wherein the memory cells of the second to n-th nodes are electrically connected to the first layer.