Patent ID: 8429325

Claim:
A PCIe switch for routing peripheral component interconnect express packets, the PCIe switch comprising: a plurality of ports including a source port and a plurality of destination ports, the source port comprising a source non-transparent endpoint associated with a source bus hierarchy domain, the source non-transparent endpoint configured to receive a request packet including a destination address and a requester identifier, the PCIe switch configured to identify an entry in an address translation table based on the destination address, the entry including a translated base address and a destination domain identifier identifying a destination bus hierarchy domain from among a plurality of destination bus hierarchy domains, generate a translated requester identifier for identifying the requester identifier and the source bus hierarchy domain, generate a translated address using the translated base address of the entry in the address translation table, and generate a translated request packet based on the request packet, the translated request packet including the translated requester identifier and the translated address; and a non-transparent interconnect coupled to the plurality of ports and configured to route the translated request packet to a destination non-transparent endpoint associated with the destination bus hierarchy domain in a destination port of the plurality of ports based on the destination domain identifier.