Patent ID: 8078656

Claim:
A computer system comprising: a processor; and a memory unit coupled to said processor, said memory unit having computer-readable program instructions stored therein that when executed cause said computer system to implement a method for processing data, said method comprising said computer system: comparing the magnitude of a first value and the magnitude of a second value in a compression block resident in said memory unit, wherein said first and second values are stored in a particular order relative to one another in said compression block, said first value and said second value representing respective endpoints of a range of values, said first value and said second value each having N bits, wherein said first and second values are either: signed values normalized to the range of [−1, 1] coded in eight (8) bits each, said 8 bits having a value in the range of [−127, 127], or unsigned values coded in 8 bits each, said 8 bits having a value in the range of [0, 255]; selecting one of said first and second values according to the result of said comparing, thereby yielding a selected value that is one of said first and second values and an unselected value that is the other of said first and second values, wherein said selected value has a larger magnitude than said unselected value; scaling said selected value to produce a third value representing a decompressed value of said selected value and having N+1 bits of precision; using said particular order in which said first and second values are stored in said compression block to derive a specified one-bit value, wherein said specified one-bit value has one binary value if said first value is stored before said second value in said compression block and otherwise said specified one-bit value has the other binary value, wherein said specified one-bit value is appended to said unselected value as the least significant bit of said unselected value to produce a fourth value representing a decompressed value of said unselected value and having N+1 bits of precision; and interpolating values that have N+1 bits of precision using said third and fourth values.