Patent ID: 8196079

Claim:
A method of making an integrated circuit, comprising: specifying a first modular tile having a polygon shape with all substantially right angles, wherein the first modular tile performs a first function, and wherein the first modular tile has a first bond pad adaptable to be connected to a package of the integrated circuit or to a printed circuit board; specifying a second modular tile having a second shape, wherein the second shape is a polygon having all substantially right angles, wherein the second modular tile performs a second function, wherein the second modular tile has a second bond pad adaptable to be connected to the package of the integrated circuit or to the printed circuit board, wherein the first bond pad is connected to a programmable input/output circuit of the first modular tile, and wherein the programmable input/output circuit is coupled to a circuit element in the second modular tile; and generating a physical layout of the integrated circuit such that an end application of the integrated circuit is operational when the first function and the second function are performed regardless of which edge of the first modular tile is placed adjacent to any edge of the second modular tile, wherein a first set of connectors on an edge of the first modular tile aligns with a second set of connectors on an edge of the second modular tile, and wherein the first modular tile communicates with the second modular tile regardless of which edge of the first modular tile is placed adjacent to any edge of the second modular tile.