Patent ID: 8026991

Claim:
A thin film transistor substrate comprising: a first thin film transistor and a second thin film transistor connected to an N th gate line and an M th data line; a first sub pixel electrode and a second sub pixel electrode connected to the first thin film transistor and the second thin film transistor, respectively; a third thin film transistor comprising a gate electrode connected to an (N+1) th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode; a first auxiliary electrode connected to the drain electrode and arranged on the same layer as the first sub pixel electrode and the second sub pixel electrode; and a second auxiliary electrode arranged on the same layer as the gate line and at least partially overlapping with the first sub pixel electrode with at least one insulating layer disposed between the second auxiliary electrode and the first sub pixel electrode.