Patent ID: 8151075

Claim:
A method for accessing a memory comprising: receiving a first address wherein the first address corresponds to a demand fetch; receiving a second address wherein the second address corresponds to a speculative prefetch; providing first data from the memory in response to the demand fetch, wherein the first data is accessed asynchronous to a system clock; providing second data from the memory in response to the speculative prefetch, wherein the second data is accessed synchronous to the system clock; receiving an asynchronous read signal when receiving the first address, wherein the asynchronous read signal indicates that the first address is to be processed asynchronously to the system clock in response to the first address corresponding to a demand fetch; and receiving the asynchronous read signal when receiving the second address, wherein the asynchronous read signal indicates that the second address is to be processed synchronously to the system clock in response to the second address corresponding to a speculative prefetch.