Patent ID: 8073996

Claim:
A circuit device, comprising: a plurality of modules, each module for performing a selected function; and a programmable test and control circuit comprising: a data line; a clock line; an enable line; and a plurality of serial-to-parallel interface registers coupled together by the data line, the clock line, and the enable line, wherein each of the plurality of serial-to-parallel interface registers comprises: a flip-flop having an input port coupled to the data line, an output port coupled to the data line, and a clock port coupled to the clock line; and a multiplexer having a first input port coupled to the output port of the flip-flop, a second input port coupled to a default value, and a select port coupled to the enable line, wherein each of the plurality of serial-to-parallel interface registers is coupled to a corresponding one of the plurality of modules, and wherein control or test data is serially shifted into the plurality of serial-to-parallel interface registers using the data line and the clock line, and the enable line is used to select whether the plurality of serial-to-parallel interface registers selectively provide either (1) the control or test data or (2) the default value to the plurality of modules.