Patent ID: 7047476

Claim:
A code error corrector for use with a buffer memory for correcting a code error in input data generated by adding an error detection code to main data, scrambling the main data, and adding an error correction code to the scrambled data and the error detection code, the code error corrector comprising: a correction circuit for performing error correction on the input data based on the error correction code to generate first data; a descrambling circuit connected to the correction circuit to descramble the first data and generate second data, wherein the descrambling circuit writes the second data to the buffer memory; a detection circuit connected to the descrambling circuit to perform error detection on the second data based on the error detection code; a scrambling circuit for reading the second data from the buffer memory and scrambling the second data to generate third data; and a switching circuit connected between the scrambling circuit and the correction circuit to provide either one of the third data and the input data to the correction circuit, wherein the correction circuit repetitively performs the error correction on the input data, and the detection circuit performs the error detection after each time the error correction circuit performs the error correction, the repeating of the error correction being stopped if the detection circuit does not detect a data error.