Patent ID: 7365617

Claim:
An attenuator comprising: a first divider circuit comprising a first resistance coupled between a first output node and a reference voltage, a first capacitance coupled between the first output node and the reference voltage, a second resistance coupled between a first input node and the first output node, and a second capacitance coupled between the first input node and the first output node; one or more second divider circuits each comprising a third resistance coupled between a second output node and the reference voltage, a third capacitance coupled between the second output node and the reference voltage, a fourth resistance coupled between a second input node and the second output node, and a fourth capacitance coupled between the second input node and the second output node; and a third divider circuit comprising a fifth resistance coupled between a third output node and the reference voltage, a sixth resistance coupled between a third input node and the third output node, and a third divider circuit capacitance coupled between the third input node and the third output node, wherein the third input node is coupled to receive a signal to be attenuated, each of the one or more second divider circuits are coupled in series, the third output node is coupled to the second input node of an initial second divider circuit in the series, and the first divider circuit is coupled to a second output node of a last second divider circuit in the series, wherein output nodes of the attenuator are coupled to a subsequent stage having an input capacitance, and wherein the value of the third capacitance in each of the one or more second divider circuits is approximately equal to the input capacitance of the subsequent stage.