Patent ID: 8273614

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first gate electrode and a second gate electrode; forming a first gate insulating film, a first non-doped semiconductor film, and a first doped semiconductor film including one of n-type and p-type conductivity in that order over the first gate electrode and the second gate electrode; removing the first non-doped semiconductor film and the first doped semiconductor film to form a first island-shaped semiconductor layer in which a first non-doped semiconductor layer and a first doped semiconductor layer are stacked in that order over the first gate electrode, and to expose the first gate insulating film formed over the second gate electrode; removing the exposed first gate insulating film to expose the second gate electrode; forming a second gate insulating film, a second non-doped semiconductor film, and a second doped semiconductor film including the other one of n-type and p-type conductivity in that order over the exposed second gate electrode and the first island-shaped semiconductor layer; removing the second non-doped semiconductor film and the second doped semiconductor film by a first etching to faun a second island-shaped semiconductor layer in which a second non-doped semiconductor layer and a second doped semiconductor layer are stacked in that order over the second gate electrode, and to expose the second gate insulating film formed over the first island-shaped semiconductor layer; removing the exposed second gate insulating film by a second etching to expose the first island-shaped semiconductor layer; forming a wiring over the first island-shaped semiconductor layer and the second island-shaped semiconductor layer; and partially removing the first doped semiconductor film and the second doped semiconductor film using the wiring as a mask.