Patent ID: 8361904

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first etch-stop insulating layer on a semiconductor substrate; forming an interlayer insulating layer on the first etch-stop insulating layer; forming a composite hardmask pattern in a first direction on the interlayer insulating film, wherein the composite hardmask pattern comprises residual portions of a buffer insulating film; forming a crossing mask pattern in a second direction different from the first direction on the composite hardmask pattern, wherein the crossing mask pattern comprises an opening selectively exposing portions of the residual portions of the buffer insulating film; using the combination of the composite hardmask pattern and the crossing mask pattern, etching the exposed portions of the residual portions of the buffer insulating layer to form contact holes to a depth leaving a residual separation thickness between bottom surfaces of the contact holes and the first etch-stop insulating layer; removing the crossing mask pattern to expose residual etched portions of the interlayer insulating film; etching the exposed residual etched portions of the interlayer insulating layer to form a plurality of line-shaped trenches and simultaneously removing the residual separation thickness to form a plurality of contact holes selectively exposing portions of the first etch-stop insulating layer; filling the plurality of contact holes and the plurality of line-shaped trenches with at least one conductive material to simultaneously and integrally form a plurality of contact plugs in the plurality of contact holes, and a respectively connected plurality of wiring layers in the plurality of line-shaped trenches.