Patent ID: 7872628

Claim:
An LCD device comprising: an LCD panel including liquid crystal cells in pixel regions defined by a plurality of gate lines and a plurality of data lines; a data driver for supplying data to the data lines; a gate driver including a plurality of stages, wherein each of the plurality of stages, connected with a start pulse input line and at least one clock signal input line for inputting at least one clock signal that a phase of a first logic state is sequentially shifted, generates scan pulses for driving the plurality of gate lines; a voltage generator, which generates first and second supplying voltages having opposite phases inversed by at least every one of the frames, and a third supplying voltage different from the first and second supplying voltages, wherein the voltage generator supplies the generated supplying voltages to the gate driver; and a timing controller for: controlling the data driver and the gate driver, generating the at least one clock signal and outputting the at least one clock signal to the gate driver, and generating a clock mask signal corresponding to a blanking time and outputting the clock mask signal to the voltage generator, wherein the blanking time is a period between frames, and wherein the clock mask signal has the first logic state in some period of the blanking time, and has a second logic state in the remaining period of the blanking time and has the second logic state during the duration of the frames; wherein the voltage generator inverses the first and second supplying voltages according to the clock mask signal.