Patent ID: 8085586

Claim:
Apparatus, comprising: a memory, which comprises multiple analog memory cells; and circuitry, which is coupled to apply at least one pulse to a group of the memory cells so as to cause the memory cells in the group to assume respective storage values, to read the respective storage values from the memory cells in the group after applying the pulse, to compute one or more statistical properties of the read storage values, and to estimate a wear level of the group of the memory cells responsively to the statistical properties, wherein the circuitry is coupled to set one or more parameters related to data storage in the group of the memory cells responsively to the estimated wear level, and wherein the parameters comprise at least one parameter type selected from a group of types consisting of a read threshold, a verify threshold, an initial pulse amplitude of a sequence of programming pulses that are used for storing data in the memory cells, and an increment between successive programming pulses in the sequence of the programming pulses.