Patent ID: 7412090

Claim:
A method for managing wafer defects comprising: performing an inspection step to inspect defects on each chip of each wafer and generating corresponding wafer defect raw data; performing a data pre-treatment step with a server to integrate the wafer defect raw data according to each chip of the same wafer and generate wafer defect distribution data for recording position, type, and size of defect; performing a drawing pre-treatment step with the server to generate a corresponding drawing file according to a new position, type, and size of a defect after the wafer defect distribution data is transferred integrally to display each distribution mode of each defect on the wafer on a screen; and performing a network management step to transmit the drawing file to a terminal without receiving the wafer defect raw data at the terminal such that a terminal user is capable of seeing the defect distributions of each chip of the wafer according to the drawing file on the drawing screen; wherein the wafer defect raw data records a position of a wafer defect relative to a chip grid, the inspection step performs defect inspection in at least two different inspection stations in sequence to generate the corresponding wafer defect raw data, and the data pre-treatment step further comprises subtracting a defect position recorded by the wafer defect raw data of a prior wafer inspection station from the wafer defect raw data corresponding to a given wafer inspection station to generate the data of a new defect in the wafer inspection station and record the data of the new defect in the wafer defect distribution data.