Patent ID: 7504893

Claim:
A phase lock loop (PLL) comprising: a phase detector receiving a reference frequency signal; a loop divider coupled to the phase detector for providing a feedback frequency signal; a charge pump having an adapt mode and a normal mode of operation, the charge pump having a programmable delay wherein the adapt mode of operation is initialized with a time period of the programmable delay prior to having an adapt mode trickle current added to an adapt mode output and wherein the charge pump is coupled to the phase detector; a loop filter coupled to the charge pump; a voltage controlled oscillator (VCO) coupled to the loop filter and the loop divider, wherein VCO output forms a PLL output having variable gain; and a controller receiving variable gain information of the VCO to provide a control signal to the charge pump for configuring the programmable delay such that transient discontinuity responses are shifted into the adapt mode of operation prior to and independent of normal mode operation during lock acquisition.