Patent ID: 8847207

Claim:
A semiconductor device comprising: first layer wiring including a gate electrode mounted on a substrate; a gate insulating film having at least one wiring-exposing opening that exposes part of the first layer wiring but that otherwise covers the entire surface of the substrate including the gate electrode; second layer wiring including a source electrode and a drain electrode mounted on the gate insulating film at opposite sides of the gate electrode, neither the source electrode nor the drain electrode being exposed to the at least one opening; an insulating partition layer having a first opening that exposes an edge portion of each of the source electrode and the drain electrode and a part of the gate insulating film between the source electrode and the drain electrode and at least one second opening, each second opening being concentric with a respective wiring-exposing opening formed in the gate insulating film; an organic semiconductor layer extending over the exposed edges of the source electrode and the drain electrode and on the bottom surface of the first opening formed in the insulating partition layer, but not contacting with the insulating partition layer; and a protective film directly on the organic semiconductor layer and filing said first opening in said insulating partition layer.