Patent ID: 8759193

Claim:
A method of fabricating a semiconductor device, the method comprising: forming a first interlayer dielectric (ILD) layer over a semiconductor substrate; forming a first etch stop layer over the first ILD layer; forming first contacts within the first ILD layer and the first etch stop layer; forming a second etch stop layer over the first contacts and the first etch stop layer; forming a second ILD layer over the second etch stop layer; forming first trenches in the second ILD layer to expose the first contacts, by removing a portion of the second ILD layer, a portion of the second etch stop layer, and a portion of the first etch stop layer; depositing a first metal layer to partially fill the first trenches, the first metal layer engaging the exposed first contacts; depositing a dielectric material over the first metal layer in the first trenches; and depositing a second metal layer over the dielectric material in the first trenches.