Patent ID: 8593317

Claim:
An apparatus, comprising: a charge-pump; a sampler that samples an optical signal, including: a black sampler; a video sampler; and an analog to digital converter (“ADC”); and a single clock that is coupled to and provides clocking signals to: a) a charge-pump logic that is coupled to said charge-pump; and b) a sampler logic that is coupled to said sampler that samples said optical signal wherein i) said first clock signal rises three clock cycles before said second clock signal rises; ii) said second clock signal is high for seventeen clock cycles; iii) said second clock signal falls five clock cycles before said first clock train signal falls; and iv) said first clock signal is low for seventeen clock cycles, then rises, wherein at least some of the above is configured in a at least a first charge pump state machine and a first sampling state machine, and a second sampling state machine embodied in the sampling logic 405 can implement and generate the black sample clock signals, video sample clock signals, and the a second clock signal.