Patent ID: 8493798

Claim:
An apparatus for outputting data in a semiconductor integrated circuit, comprising: a clock generation block configured to activate a first clock signal for outputting a data signal and a second clock signal for outputting a data strobe signal based on a predetermined timing according to a control signal, wherein the control signal is generated in response to an output enable signal, and an activation interval of the control signal is determined according to an amount of delay of a first delay element or a second delay element; and a data output block configured to latch a pre-data signal and a pre-data strobe signal in response to the first clock signal and the second clock signal, respectively and output the data signal and the data strobe signal, wherein the data signal and the data strobe signal are terminated at different voltage levels at activation start timing of the output enable signal, and the clock generation block further comprises: a control signal generation section configured to determine the activation interval of the control signal according to a set signal, generated in response to activation of the output enable signal, and a reset signal; a reset signal generation section configured to output a delay locked loop clock signal corresponding to an activation interval of the output enable signal, as the reset signal; and a clock output section configured to invert the reset signal and output the second clock signal, and to invert the reset signal in response to the control signal and output the first clock signal.