Patent ID: 8057690

Claim:
A method for creating at least one micro-electromechanical (MEMS) structure in a wafer having a first insulating layer, a first substrate layer, a second insulating layer and a second substrate layer, the first substrate layer being located between the first insulating layer and the second insulating layer, the second substrate layer being attached to the second insulating layer, the method comprising: etching through the first insulating layer, the first substrate layer and the second insulating layer to the second substrate layer according to a previously applied mask; removing the previously applied mask; generating a layer of oxide over surfaces exposed after etching; removing only exposed oxide adjacent to the second substrate layer; etching exposed substrate in the second substrate layer using an anisotropic etchant; etching portions of exposed substrate from under at least one structure in the first substrate layer using an isotropic etchant; and removing exposed oxide, thereby creating the at least one MEMS structure.