Patent ID: 7795092

Claim:
A method of manufacturing a semiconductor memory device, comprising: forming a first gate dielectric film on a semiconductor substrate, a floating gate on the first gate dielectric film, a second gate dielectric film on the floating gate, and a control gate on the second gate dielectric film, the first gate dielectric film, the floating gate, the second gate dielectric film, and the control gate being formed in a stripe shape; depositing a first interlayer dielectric film between adjacent floating gates and between adjacent control gates; depositing a reinforcement insulation film on an upper surface of the control gate, and on an upper surface of the first interlayer dielectric film, respectively; processing in a stripe shape the reinforcement insulation film so as to extend to a direction crossing an extension direction of the control gate; removing the first interlayer dielectric film through a gap of a stripe of the reinforcement insulation film; and depositing a second interlayer dielectric film having poorer covering properties than that of the first interlayer dielectric film to block a region between an upper part of the adjacent control gates and an upper part of the gap of the stripe of the reinforcement insulation films before a region between the floating gates and a region beneath the reinforcement insulation film are filled.