Patent ID: 7858413

Claim:
A method of manufacturing a pixel structure, comprising: forming a gate, a scan line connected to the gate and at least one first auxiliary pattern on a substrate; forming an insulating layer, a semiconductor layer, an ohmic contact layer and a photoresist layer in sequence; performing a exposure process and a development process on the photoresist layer to form a first portion and a second portion, wherein the first portion covers the ohmic contact layer above a part of the scan line and a part of the gate and the second portion is adjacent to the first portion; removing the ohmic contact layer and the semiconductor layer which are not covered by the photoresist layer to expose a part of the insulating layer, and remove the second portion; removing the ohmic contact layer and a part of a thickness of the semiconductor layer which are not covered by the first portion and removing the exposed insulating layer to form a channel layer and an insulating layer, and removing the first portion; forming a source, a drain, at least one second auxiliary pattern and a data line connected to the source to complete a thin film transistor, wherein the data line and the first auxiliary pattern are connected in parallel, and the second auxiliary pattern and the scan line are connected in parallel; and forming a passivation layer and a pixel electrode, the pixel electrode being electrically connected to the thin film transistor by passing through the passivation layer.