Patent ID: 7532533

Claim:
An antifuse circuit comprising: a sensing circuit having a first input, a second input and an output, the output of the sensing circuit providing a logic value that indicates whether the antifuse circuit has a first resistance state or a second resistance state; an antifuse magnetic tunnel junction coupled to the first input of the sensing circuit, the antifuse magnetic tunnel junction initially having the first resistance state which can be permanently changed to the second resistance state in response to receiving a predetermined program voltage; a reference resistance coupled to the second input of the sensing circuit, the reference resistance differing from each of the first resistance state and the second resistance state of the antifuse magnetic tunnel junction; and a write circuit coupled to the antifuse magnetic tunnel junction, the write circuit selectively providing a first current sufficient to create the predetermined program voltage when the write circuit is enabled to program the antifuse magnetic tunnel junction and reducing the first current to a second current predetermined value lower than the first current in response to detecting a change of resistance of the antifuse magnetic tunnel junction while applying the first current, wherein the write circuit comprises transistors each having a gate oxide of at least a first thickness, the sensing circuit comprises a transistor for interfacing with the antifuse magnetic tunnel junction and having a gate oxide of at least the first thickness, the sensing circuit farther comprising transistors having a gate oxide of at least a second thickness, the second thickness being smaller than the first thickness.