Patent ID: 7291527

Claim:
A method of forming metal gate transistors, comprising: forming a first metal over a dielectric layer overlying a substrate, the first metal being a mid gap metal having a corresponding work function; manipulating the first metal in a first region to move the work function in a first direction, wherein said manipulating the first metal in the first region comprises: forming a second metal over the first metal; patterninq and etchinq the second metal so that the second metal remains over the first metal in the first reqion and is removed from over the first metal in a second reqion; and annealing to produce a first alloy of the first metal and the second metal in the first region, the first alloy possessing the first work function; manipulating the first metal in a second region to move the work function in a second direction, wherein said the step of manipulating the first metal in the second region further comprises: forming a third metal over the first metal in the second region; and annealing to produce a second aloy of the first metal and the third metal in the second region, the second alloy possessing the second work function; forming a first transistor type in the first region; and forming a second transistor type in the second region.