Patent ID: 8049271

Claim:
A power semiconductor device comprising: a substrate of a second conductivity type; a voltage sustaining region disposed on said substrate, said voltage sustaining region including: an epitaxial layer having a first conductivity type; at least one terraced trench located in said epitaxial layer, said terraced trench having a plurality of sidewalls, and a plurality of portions that differ in width to define at least one annular ledge therebetween; at least one annular doped region having a dopant of a second conductivity type, said annular doped region being located in said epitaxial layer below and adjacent to said annular ledge, wherein said plurality of sidewalls do not have dopant implanted therein; a filler material substantially filling said terraced trench; and at least one active region of said second conductivity disposed over said voltage sustaining region to define a junction therebetween.