Patent ID: 7344960

Claim:
A separation method by which a semiconductor package assemblage is cut in a predetermined width W 1 along streets arranged in a lattice pattern to separate the semiconductor package assemblage into a plurality of semiconductor packages, the semiconductor package assemblage being composed of a metallic frame having metallic die pads of a predetermined thickness placed in a plurality of rectangular regions defined by the streets, and metallic electrodes of a predetermined thickness placed in the streets and extending in a width direction of the streets, semiconductor chips disposed on the die pads, and an encapsulation resin for encapsulating the semiconductor chips, one surface of each of the die pads and one surface of each of the electrodes being exposed on one surface of the semiconductor package assemblage, whereby each of the electrodes has an intermediate portion in an extending direction thereof removed, and has opposite end portions annexed to the adjacent semiconductor packages, the separation method comprising: a pre-cutting step of forming grooves in the one surface of the semiconductor package assemblage by a rotary cutting blade, each of the grooves having a width W 3 in each of opposite side edges of a region having a width W 2 larger than the predetermined width W 1 in the street, where (W 2 −2×W 3 )<W 1 , and each of the grooves having a depth D larger than the thickness of the electrode; and a main cutting step of cutting the semiconductor package assemblage in the predetermined width W 1 between the grooves along the streets by a rotary cutting blade having a thickness corresponding to the predetermined width W 1 .