Patent ID: 8692308

Claim:
A semiconductor device comprising: a semiconductor layer; a trench dug downward from the surface of the semiconductor layer; a source region formed on the surface layer portion of the semiconductor layer adjacently to a first side of the trench in a prescribed direction; a drain region formed on the surface layer portion of the semiconductor layer adjacently to a second side of the trench opposite to the first side in the prescribed direction; a first insulating film formed on the bottom surface and the side surface of the trench; a floating gate stacked on the first insulating film and opposed to the bottom surface and the side surface of the trench through the first insulating film; a second insulating film formed on the floating gate; a control gate at least partially embedded in the trench so that the portion embedded in the trench is opposed to the floating gate through the second insulating film, the control gate having a peripheral edge in plan view, the peripheral edge of the control gate being inside the second insulating film in plan view; and wherein the first insulating film has a thin portion, having a relatively small thickness, in contact with the drain region and a thick portion, having a relatively large thickness, formed by the remaining portion of the first insulating film other than the thin portion.