Patent ID: 6998338

Claim:
A method of producing an integrated circuit configuration, which comprises: forming a diffusion barrier layer on a substrate having at least a first insulating layer with a first conductive structure embedded therein , the diffusion barrier layer covering the first conductive structure completely; forming a second insulating layer on the diffusion barrier layer; etching a contact hole into the second insulating layer above the first conductive structure without uncovering the first conductive structure, and with a surface of the first conductive structure being covered with the diffusion barrier layer within the hole; forming spacers on side walls of the contact hole, the spacers acting as a barrier to diffusion of a material from the first conductive structure into the second insulating layer; subsequently opening the contact hole as far as a surface of the first conductive structure; and forming in the contact hole a second conductive structure conductively connected to the first conductive structure.