Patent ID: 7961529

Claim:
An electrical system with embedded non-Flash non-volatile memory, comprising: a silicon substrate including circuitry fabricated on the silicon substrate, the circuitry including a processor unit and register logic in electrical communication with the processor unit; at least one memory plane in direct contact with and fabricated directly above the silicon substrate; at least one two-terminal cross-point memory array embedded in each memory plane, each two-terminal cross-point memory array including a plurality of conductive array lines that are electrically coupled with at least a portion of the circuitry; a plurality of two-terminal re-writeable non-volatile memory elements included in each two-terminal cross-point memory array, each memory element including a first terminal, a second terminal, a conductive oxide including mobile oxygen ions, and an electrolytic tunnel barrier in contact with the conductive oxide, the conductive oxide and the electrolytic tunnel barrier are electrically in series with the first and second terminals, and the first and second terminals are electrically coupled with a unique pair of the conductive array lines; and a subset of the plurality of two-terminal re-writeable non-volatile memory elements configured as non-volatile registers electrically coupled with the register logic and operative to store non-volatile information for use by the processor unit, and wherein the plurality of two-terminal re-writeable non-volatile memory elements that are not in the subset are configured for other non-volatile data storage uses.