Patent ID: 7462531

Claim:
A method of manufacturing a non-volatile semiconductor memory device including a semiconductor substrate having a trench which is formed in a first upper surface thereof, an isolation insulating film formed in the trench, the isolation insulating film having a first upper end portion which protrudes from the first upper surface, a pair of floating gate electrode films located in both sides of the isolation insulating film, each floating gate electrode film formed on the first upper surface via a gate insulating film and having a second upper surface which is higher than the first upper end portion relative to the first upper surface, respectively, an inter-gate insulating film formed on the floating gate electrode films and the isolation insulating film, and a control gate electrode film formed on the inter-gate insulating film, comprising: forming the trench in the first upper surface; forming a lower insulating film in the trench so that a first recess may be formed in an upper portion of the lower insulating film; forming an upper insulating film on the lower insulating film to fill the first recess; polishing the upper and the lower insulating films so that a third upper surface of the upper and the lower insulating films may be flat; and etching the upper insulating film at an etching rate higher than an etching rate of the lower insulating film with a wet etching method so as to form the isolation insulating film having a second recess, wherein the inter-gate insulating film is formed on a surface of the second recess and the control gate electrode film is located in the second recess via the inter-gate insulating film.