Patent ID: 7200783

Claim:
An integrated circuit formed on a substrate comprising: A. an IEEE 1149.1 interface including a TDI input lead, a TDO output lead, a TCK input lead, and a TMS input lead; B. plural first TAP domains each having a TDI input selectively coupled to the TDI input lead, a TDO output selectively coupled to the TDO output lead, a TCK input selectively coupled to the TCK input lead, and a TMS input selectively coupled to the TMS input lead; C. input linking circuitry connected to the TDI input lead, the TCK input lead, and the TMS input lead and connected to the TDI input, TCK input, and the TMS input of each TAP domain, the input linking circuitry having control inputs; D. output linking circuitry connected to the TDO output of each TAP domain and having a TDO output selectively connected to the TDO output lead, the output linking circuitry having control inputs; and E. second TAP domain circuitry including TAP domain selection circuitry, the TAP domain selection circuitry having a TCK input connected to the TCK input lead, a TMS input connected to the TMS input lead, a TDI input connected to the TDO output of the output linking circuitry, a TDO output selectively connected to the TDO output lead, and control output leads connected to the control inputs of the input linking circuitry and the output linking circuitry, the second TAP domain circuitry including control means for selectively removing the TAP domain selection circuitry from a scan path that extends from the TDI input lead to the TDO output lead.