Patent ID: 7932564

Claim:
A semiconductor device, comprising: a fin type MOSFET including a first gate electrode, and a first gate insulating film for generating Fermi level pinning in the first gate electrode; and a planar type MOSFET including a second gate electrode, and a second gate insulating film for generating no Fermi level pinning in the second gate electrode, or generating Fermi level pinning weaker than that generated in the first gate electrode in the second gate electrode; wherein the second gate insulating film is a film obtained by implanting an impurity in a predetermined concentration into a second insulating film for generating Fermi level pinning in the second gate electrode; the first gate insulating film is either a first insulating film made of the same material as that of the second insulating film, or a film obtained by implanting the impurity in a lower concentration than the predetermined concentration into the first insulating film, each of the first and second insulating films is made of a High-k material; the High-k material is a Hf system oxide or a Zr system oxide; and when the High-k material is the Hf system oxide, at least one of La and Zr is used as the impurity, and when the High-k material is the Zr system oxide, at least one of La and Al is used as the impurity.