Patent ID: 7643594

Claim:
A method for extracting a clock in a clock data recovery (CDR) system, comprising: sampling a serial link transmission data for a plurality of times, and generating a plurality of pulse signals, which are sequentially arranged; inserting one mark after one of the pulse signal is generated for a predetermined delay time, wherein the predetermined delay time is less than a period between two adjacent pulse signals and is used to divide the period between two adjacent pulse signals into two sub-periods; checking whether there is a data status change or not within each of the sub-periods, and repeating the checking step for a predetermined number of times; and extracting the clock at second of the pulse signal corresponding to the sub-period which there is no data status change within the repeated predetermined number of times, wherein the number of the sub-periods is n, the predetermined number of times is m, and the checking step further comprises: defining data status of each of the sub-period as D ij , wherein the subscript i represents an i th sub-period, and the subscript j represents a j th checking; setting the subscripts i and j as 0; performing a first operation on D ij , which is represented as: ∑ j = 0 m ⁢ XOR ⁢ { D ij , D i + 1 ⁢ j } = R x , where R x represents an x th operation result, and x=i; adding i by one; determining whether i is equal to n or not; when i is not equal to n, repeating the first operation; and when i is equal to n, performing a second operation, which is represented as: ∑ j = 0 m ⁢ XOR ⁢ { D nj , D 0 ⁢ j } = R x .