Patent ID: 8355255

Claim:
An active, electronically scanned array (AESA) panel architecture system comprising: a first daughter board comprising active circuits; a first thermal spreader coupled to the active circuits of the first daughter board, the first daughter board and the first thermal spreader having a first thickness; a first compliant board coupled to the first daughter board; a second daughter board comprising active circuits; a second thermal spreader coupled to the active circuits of the second daughter board, the second daughter board and the second thermal spreader having a second thickness different from the first thickness; a second compliant board coupled to the second daughter board; a mother board assembly coupled to first and second compliant boards; and a cold-plate assembly in contact with the first thermal spreader and the second thermal spreader, wherein either of the first compliant board or the second compliant board is configured to expand or contract to account for the differences in thicknesses between the first thickness and the second thickness.