Patent ID: 8130539

Claim:
A phase change memory device comprising: a signal generator configured to generate first and second sensing and amplifying enable signals which are sequentially activated during an activation period of a word line selection signal and each of which has a certain activation period length, wherein the first sensing and amplifying enable signal is inactivated before an inactivation point of the word line selection signal; a resistance sensor configured to sense a resistance value by applying a certain operation current to a phase change memory cell corresponding to the word line selection signal during an activation period of the first sensing and amplifying enable signal and determine a voltage level of a resistance sensing signal corresponding to the sensed result; and a voltage level amplifier configured to logically determine a voltage level of the resistance sensing signal based on a voltage level of a logic reference signal during an activation period of the second sensing and amplifying enable signal and output amplified resistance sensing signals by amplifying the determined voltage level of the resistance sensing signal.