Patent ID: 7579239

Claim:
A method for processing an electric device which comprises a double gate stack and a single access gate, the method comprising: first providing the double gate stack having a first sidewall adjacent which the access gate is to be formed, and a second sidewall opposite to the first sidewall, thereafter providing a conductive layer over and adjacent the double gate stack, thereafter partially removing said conductive layer adjacent the second sidewall, after the partial removal of the conductive layer etching back said conductive layer, both adjacent the first sidewall and adjacent the second sidewall, until the conductive layer is substantially completely removed adjacent the second sidewall, a part of the conductive layer remaining for forming the access gate adjacent the first sidewall, the remaining part of the conductive layer having a top surface, wherein the top surface of the remaining part of said conductive layer is below the level of an interlayer dielectric of said double gate stack.