Patent ID: 8327357

Claim:
A computer-implemented method, comprising: setting, by a hypervisor of a host machine, a virtual machine (VM) time stamp counter (TSC) to a hyper-fast rate, the hyper-fast rate of the VM TSC set faster than a central processing unit (CPU) rate of the host machine; receiving, by the hypervisor, control of the VM due to a VM exit caused by the VM issuing an instruction that reads the VM TSC; and adjusting, by the hypervisor, the VM TSC with a value of an offset counter associated with the VM in order to maintain the hyper-fast rate, wherein the value of the offset counter associated with the VM is calculated to bring the VM TSC to an updated value equal to an elapsed value of the VM TSC that accounts for the hyper-fast rate, and wherein the value of the offset counter changes upon a change in a frequency of a CPU in the host machine.