Patent ID: 8124979

Claim:
A thin film transistor comprising: a lower structure; a semiconductor layer formed on the lower structure and including a plurality of doping regions; a first insulating layer and a second insulating layer directly formed on the semiconductor layer and separated from each other; a third insulating layer directly formed on the first insulating layer, on the second insulating layer, and on the semiconductor layer between the first insulating layer and the second insulating layer; and a gate electrode layer formed between regions of the third insulating layer respectively corresponding to the first insulating layer and the second insulating layer, and not contacting with the first insulating layer and the second insulating layer, wherein the semiconductor layer comprises: a channel region formed below the third insulating layer between the first insulating layer and the second insulating layer; a first doping region formed below the first insulating layer and the second insulating layer; an offset region formed between the channel region and the first doping region; a second doping region formed below the third insulating layer formed at a left side of the first insulating layer and at a right side of the second insulating layer; and a third doping region formed at a side of the second doping region.