Patent ID: 8906739

Claim:
A method for fabricating a thin film transistor substrate, the method comprising: a gate formation step of forming a gate electrode on a substrate; an oxide semiconductor layer formation step of forming a gate insulating film to cover the gate electrode, and then forming an In—Ga—Zn—O-based oxide semiconductor layer on the gate insulating film to overlap the gate electrode; and a source/drain formation step of forming a source electrode and a drain electrode on the oxide semiconductor layer to overlap the gate electrode and to face each other, wherein in the oxide semiconductor layer formation step, the oxide semiconductor layer in which a ratio of In:Ga:Zn in atomic % is 1:1:1 or 4:5:1 is formed, the method further includes, after the source/drain formation step, a steam annealing step of performing an annealing process in an atmosphere containing steam on the substrate provided with the source electrode and the drain electrode, and the steam annealing step is performed at a temperature lower than or equal to a film formation temperature of the oxide semiconductor layer.