Patent ID: 8762694

Claim:
An apparatus comprising: execution resources to execute a plurality of instructions; a user-level mechanism to map an architectural trigger condition to a start address of a handler, wherein the user-level mechanism is to allow any program to access or manipulate a yield capability corresponding to the program, the architectural trigger condition being based on one or more events associated with the execution resources; and a fault-like yield mechanism to selectively disrupt processing of at least one program by transferring control to the handler in response to detecting said trigger condition, wherein said yield mechanism is further to cancel an instruction associated with the trigger condition before said instruction is retired; wherein said user-level mechanism further comprises one or more programmable channel registers which each include user programmable fields for: a channel identifier, a yield target address, an action, a scenario identifier to hold a value that represents an architecturally defined scenario, a yield event request, valid, and a scenario type to indicate whether a scenario is fault-like or trap like.