Patent ID: 8186046

Claim:
A method for manufacturing a multilayer printed wiring board having an electronic component housed therein, the method comprising: forming a conduction circuit on a core substrate; forming an alignment mark on the core substrate separate from the conduction circuit; forming a concavity in the core substrate, the concavity being formed in an area of the core substrate not including the conductor circuit and alignment mark; inserting the electronic component into the concavity in the core substrate by using the alignment mark on the core substrate to align the electronic component with the concavity, wherein said forming an alignment mark comprises: forming a first alignment mark on a first surface of the core substrate; and forming a second alignment mark on a second surface of the core substrate, said second surface opposing the first surface; forming a first interlayer insulating resin on the first surface of the core substrate; forming a second interlayer insulating resin on the second surface of the core substrate; forming a first via hole opening in the first interlayer insulating resin by using the first alignment mark to align the first via hole opening with a first terminal of the electronic component such that electrical connection can be made to the electronic component by way of the first via hole opening; and forming a second via hole opening in the second interlayer insulating resin by using the second alignment mark to align the second via hole opening with a second terminal of the electronic component such that electrical connection can be made to the electronic component by way of the second via hole opening.