Patent ID: 7135755

Claim:
An integrated semiconductor device including at least two semiconductor elements, with means for preventing the action of a parasitic transistor between the semiconductor elements, comprising: (a) a semiconductor substrate; (b) a common semiconductor region of a first conductivity type formed in the semiconductor substrate; (c) a first semiconductor element formed in the common semiconductor region and having a first island-like semiconductor region of a second conductivity type which is opposite to the first conductivity type, the first island-like semiconductor region being contiguous to the common semiconductor region; (d) a second semiconductor element formed in the common semiconductor region and having a second island-like semiconductor region of the second conductivity type contiguous to the common semiconductor region; (e) the first and the second semiconductor element being spaced from each other via the common semiconductor region, with the consequent creation of a parasitic transistor by the common semiconductor region of the first conductivity type and the first and the second island-like semiconductor region of the second conductivity type; (f) performance-enhancer means connected to the second island-like semiconductor region and the common semiconductor region for preventing the conduction of the parasitic transistor when the second island-like semiconductor region is less in potential than the common semiconductor region.