Patent ID: 8384428

Claim:
A programmable logic device comprising: programmable input/output (I/O) circuitry having a plurality of programmable I/O circuits connected to corresponding I/O pads; a programmable logic core connected to receive incoming signals from and provide outgoing signals to the I/O circuitry; configuration memory connected to store configuration data for programming the I/O circuitry and the logic core; and a configuration controller adapted to support configuration of the programmable logic device by an external configuration interface, wherein at least one programmable I/O circuit comprises: I/O component circuitry adapted to receive incoming signals from and provide outgoing signals to a corresponding I/O pad of the programmable logic device; and I/O control circuitry responsive to the configuration controller to program the I/O circuit on power up into a first I/O operating mode for receiving the configuration data from the configuration interface and storing the data into the configuration memory and then into a second I/O operating mode based on the stored configuration data.