Patent ID: 7428166

Claim:
A method of preventing hot electron program disturbance of a non-volatile memory device, the method comprising: boosting channels of a first group of memory cells to a first voltage, the first group of memory cells coupled to a first and N th word lines of N word lines, wherein the first group of memory cells is coupled in series between a first select transistor and a second select transistor, the first select transistor coupled to a first bit line, wherein the second select transistor is coupled to a common source line; boosting channels of a second group of memory cells to a second voltage, the second group of memory cells coupled to second and (N−1) th word lines nearest to the first and N th word lines; boosting channels of a third group of memory cells to a third voltage, the third group of memory cells coupled to a plurality of remaining word lines other than the first and N th word lines, the second and (N−1) th word lines, and a program word line, wherein the first voltage is lower than the second voltage and the second voltage is lower than the third voltage, wherein N is an integer.