Patent ID: 7990215

Claim:
A Class D amplifier control circuit, comprising: an input for receiving a time varying input signal having a frequency of less than 100 kHz; a feedback path for coupling an analog output signal; a low pass filter coupled to the feedback path and outputting a low pass filtered feedback signal; an analog to digital converter coupled to the input and further coupled to the low pass filtered feedback signal and outputting a digital value representing the magnitude of a difference between the input signal and the low pass filtered feedback signal; a digital filter coupled to receive the digital value and to amplify the digital value using programmable coefficients and outputting digital filter output signals; a digital PWM generator for generating a pulse width modulated output signal with a frequency corresponding to the digital filter output signals; and a predriver circuit coupled to the pulse width modulated output signal and outputting driver gate control signals for a high side and low side driver of the Class D amplifier.