Patent ID: 7564391

Claim:
A sigma delta modulator comprising: A. first summer/subtractor circuitry having a summing input, a subtractor input, and an output; B. first loop filter circuitry having an input connected with the output of the first summer/subtractor circuitry and having an output; C. second summer/subtractor circuitry having plural summing inputs and an output; D. amplifier circuitry having an input connected to the output of the second summer/subtractor circuitry and having a plural bit output; E. digital to analog converter circuitry having an input connected to the output of the amplifier circuitry and having an output connected to the subtractor input of the first summer/subtractor circuitry; and F. quantizer circuitry having an input connected to the output of the first loop filter circuitry and including plural single bit noise shaped modulator circuitry, each modulator circuitry including: i. third summer/subtractor circuitry having a summing input connected with the input of the quantizer circuitry, a summing input connected with a reference voltage, a subtractor feedback input, and an output, ii. second loop circuitry having an input connected with the output of the third summer/subtractor circuitry and an output, iii. comparator circuitry having an input connected with the output of the second loop circuitry and an output connected with an input of the second summer/subtractor circuitry, and iv. second digital to analog circuitry having an input connected with the output of the comparator circuitry and having an output connected with the subtractor feedback input of the third summer/subtractor circuitry.