Patent ID: 7064532

Claim:
A voltage regulator comprising: control signal generating means for starting operation in response to an enable signal and generating a control signal for generating an output voltage; output controlling means for generating said output voltage by charging an output capacitor while controlling a current value of an output current flowing to said output capacitor according to said control signal generated by said control signal generating means; current limiting means for limiting the current value of said output current by a constant current type drooping characteristic that limits the current value of said output current to a first limit value and holds the current value of said output current constant by adjusting a value of said control signal when the current value of said output current reaches said first limit value, and a current limiting characteristic that limits the current value of said output current to a second limit value lower than said first limit value by adjusting the value of said control signal when the current value of said output current reaches said first limit value; and delaying means supplied with said enable signal together with said control signal generating means, for delaying the input said enable signal by a delay time or less, the delay time corresponding to a certain time from a start of charging of said output capacitor to a completion of the charging of said output capacitor when said output capacitor can be normally charged to a specified capacity, and sending the delayed said enable signal as a delayed signal to said current limiting means; wherein said current limiting means operates according to said constant current type drooping characteristic during a period from a point in time of a start of operation of said control signal generating means to a point in time of input of said delayed signal, and operates according to said current limiting characteristic after said point in time of the input of said delayed signal.