Patent ID: 7804468

Claim:
A data driver comprising: a shift register for generating sampling signals; a plurality of output channels, each output channel comprising: a sampling latch for sampling digital data received from a plurality of data channels, respectively, in accordance with the sampling signals; a plurality of holding latch units for receiving file sampled digital data from the sampling latch to hold the digital data for a first period; and a first digital-to-analog converter for receiving the held digital data from the holding latch units to generate data currents corresponding to the digital data; and a second digital-to-analog converter commonly coupled to at least one of the plurality of holding latch units of each output channel for receiving the digital data provided from the at least one of the plurality of holding latch units for a second period and for generating correction currents for the data currents, wherein each output channel further comprises a plurality of current output stages for sampling, correcting, and driving final currents corresponding to the digital data received from the data channels, respectively, using the data currents and the correction currents, and wherein the second digital-to-analog converter is coupled in parallel with the plurality of first digital-to-analog converters.