Patent ID: 7553711

Claim:
A method for fabricating a thin film transistor, comprising: forming a first metal layer and a first photoresist pattern on a substrate using a first mask; patterning the first metal layer using the first photoresist pattern to form a gate electrode on the substrate; forming an insulating layer, a silicon layer and an etch-stopper layer on the substrate; forming a second photoresist pattern which has a different thickness on the etch-stopper layer using a second mask; patterning the insulating layer, the silicon layer and the etch-stopper layer using the second photoresist pattern to form an active pattern and a preliminary etch-stopper; ashing the second photoresist pattern to form a third photoresist pattern; patterning the preliminary etch-stopper using the third photoresist pattern to form an etch stopper; forming an ohmic contact layer and a second metal layer on the substrate including the third photoresist pattern and the etch-stopper; removing the third photoresist pattern with the ohmic contact layer and the second metal layer over the third photoresist pattern; forming a fourth photoresist pattern on the substrate using a third mask; patterning a remaining second metal layer using the fourth photoresist pattern to form a source electrode and a drain electrode; ashing the fourth photoresist pattern to form a fifth photoresist pattern; forming a transparent conductive layer on the substrate; and removing the fifth photoresist pattern overlying the active pattern to form a pixel electrode.