Patent ID: 7646027

Claim:
A stacked structure for a Group III nitride semiconductor device, comprising a flat substrate having a surface roughness (Ra) of 1 nm or less and a Group III nitride semiconductor layer directly stacked on the substrate, the Group III nitride semiconductor layer comprising a plurality of layers put into contact with each other, at least a pair of layers out of the plurality of layers put into contact with each other being a high-concentration impurity atom layer and a low-concentration impurity atom layer, the thickness of the high-concentration impurity atom layer being from 0.5 to 3 μm, the high-concentration impurity atom layer being present on the substrate side, wherein pits are present in the range from 1×10 5 cm −2 to 5×10 8 cm −2 on the surface of the high-concentration impurity atom layer opposite the substrate, and at least one of the plurality of layers being a layer having a dislocation density of 1×10 7 cm −2 or less.