Patent ID: 7372739

Claim:
A voltage generator for generating an auxiliary voltage for use in a voltage generation and regulation circuit having a negative voltage pump that generates a negative voltage, a positive voltage pump that generates a positive voltage, an enable signal that enables the generation of the negative and positive voltages, and a plurality of discharge paths, each coupled to a different voltage pump, the discharge paths experiencing one of a plurality of discharge phases, the voltage generator comprising: output control logic that controls output of a discharge rate control signal; a plurality of NMOS transistors coupled together serially in a diode-like fashion, one end of the plurality of NMOS transistors coupled to and discharging the negative voltage when the plurality of NMOS transistors are turned on; a low voltage enabling transistor, coupled to the enable signal, for enabling the voltage generator in response to the enable signal; a first voltage insulating transistor, coupled between the low voltage enabling transistor and the plurality of NMOS transistors, a first node formed at the junction of the first voltage insulating transistor and a remaining end of the plurality of NMOS transistors having a voltage that rises in response to the low voltage enabling transistor being turned on; a first voltage enabling transistor coupled between V CC and the first node, a control gate of the first voltage enabling transistor coupled to an output of the output control logic, the first voltage enabling transistor being turned on in response to the discharge rate control signal; a second voltage insulating transistor coupled between the first node and the output control logic forming a second node, a control gate of the second voltage insulating transistor coupled between two of the plurality of NMOS transistors; and a second voltage enabling transistor coupled between V CC and the auxiliary voltage output, the auxiliary voltage output coupled to the second node, a control gate of the second voltage enabling transistor coupled to the output of the output control logic, the second voltage enabling transistor being turned on in response to the discharge rate control signal and generating the auxiliary voltage.