Patent ID: 7049713

Claim:
A pulsed current generator circuit comprising: a) a current source for applyinig a current to a device under test, b) a controlled current shunt for shunting current from the device under test, and c) a booster circuit for supplying a booster current to the device under test when the controlled current shunt is opened and current again flows through the device under test, thereby facilitating recharge of a parasitic capacitance associated with the device under test, the booster circuit comprising an NMOS transistor serially connected with a PMOS transistor between a voltage potential and the parasitic capacitance, a capacitor shunting the NMOS transistor for providing a DC voltage at a common point of the NMOS transistor and the PMOS transistor, and control circuitry coupled to receive a shunt control signal and in response thereto control conduction on the PMOS transistor and provision of the booster current.