Patent ID: 6976848

Claim:
A multi-socket memory system, comprising: a base socket arranged to load a first memory module having first and second surfaces, said base socket including: (i) a first conductor arranged to connect a plurality of adjacent contacts on the first surface of the first memory module, and (ii) a second conductor arranged to connect a plurality of adjacent contacts on the second surface of the first memory module; a through socket arranged to load said first memory module and a second memory module having first and second surfaces, said through socket including: (i) a first conductor arranged to connect to a plurality of adjacent contacts on the first surface of the first memory module to a plurality of adjacent contacts on the first surface of the second memory module, and (ii) a second conductor arranged to connect a plurality of adjacent contacts on the second surface of the first memory module to a plurality of adjacent contacts on the second surface of the second memory module; and a turn-around socket arranged to load a second memory module and including a conductor arranged to connect to a plurality of adjacent contacts on the first surface of the second memory module and a plurality of adjacent contacts on the second surface of the second memory module.