Patent ID: 7579645

Claim:
A semiconductor device, comprising: a semiconductor substrate; a nonvolatile memory cell that includes a memory transistor realized by a MOS transistor including a memory gate oxide film that is arranged on the semiconductor substrate, and a floating gate made of polysilicon that is arranged on the memory gate oxide film which floating gate is in an electrically floating state; and a selection transistor realized by a MOS transistor that is serially connected to the memory transistor, the selection transistor including a selection gate oxide film that is arranged on the semiconductor substrate, and a selection gate made of polysilicon that is arranged on the selection gate oxide film, wherein an n-type impurity is introduced into the selection gate; and a peripheral circuit transistor realized by a MOS transistor including a peripheral circuit gate oxide film that is arranged on the semiconductor substrate, and a peripheral circuit gate made of polysilicon that is arranged on the peripheral circuit gate oxide film; wherein the memory gate oxide film is arranged to be thinner than the peripheral circuit gate oxide film, wherein an impurity concentration of the selection gate and the peripheral circuit gate is higher than an impurity concentration of the floating gate.