Patent ID: 7266721

Claim:
A runtime repairable processor within a single silicon chip, comprising: a first data path of a plurality of data paths, said first data path defining a first area on the silicon chip by its wire width; a plurality of data registers disposed on the silicon chip and coupled to the plurality of data paths; a first functional unit comprising a plurality of bit-level operational units on the silicon chip and coupled to the plurality of data paths; a second functional unit that is a duplicate of the first functional unit, said second functional unit comprising a plurality of duplicate bit-level operational units, and that is disposed on the silicon chip, the second functional unit coupled to the plurality of data paths, wherein a first bit-level operational unit of the first functional unit and a first duplicate bit-level operational unit of the second functional unit are both contained within the first area; and an enabling control logic that is configured to disable the first functional unit and to enable the second functional unit when a failure is detected with the first functional unit.