Patent ID: 7851321

Claim:
A method of forming a semiconductor device, comprising: providing a SOI (silicon on insulator) substrate having a buried insulating layer interposed between an active silicon layer on a front side of the SOI substrate and a bulk silicon layer on a back side of the SOI substrate; forming an integrated circuit on the front side of the SOI substrate, wherein the integrated circuit comprise a buried contact plug that extends from the front side of the SOI substrate through the buried insulating layer; performing a back side etch process to form a trench in the bulk silicon layer and expose an end portion of the buried contact plug on a backside surface of the buried insulating layer; forming an integrated capacitor in the trench, the capacitor comprising a first metallic capacitor plate, a second metallic capacitor plate and a capacitor dielectric layer interposed between the first and second metallic capacitor plates, wherein the first metallic capacitor plate is formed to make contact with the buried insulating layer.