Patent ID: 7779194

Claim:
A microcontroller comprising: a central processing unit ( 1 ); at least one memory ( 2 , 3 ); a bus ( 20 , 21 , 23 , 24 ) coupling the at least one memory ( 2 , 3 ) to the central processing unit ( 1 ); a data modification module ( 4 ) for modifying data in the at least one memory ( 2 , 3 ) including a first interface ( 5 ) coupled to the bus ( 20 , 21 , 23 , 24 ) for transferring data to the at least one memory ( 2 , 3 ) over the bus ( 20 , 21 , 23 , 24 ), and a second interface ( 6 , 8 ) operable to be coupled to an external device for receiving data from the external device in data packets; wherein the data modification module ( 4 ) operates as a bus master and transfers data received from the external device to the at least one memory ( 2 , 3 ) thereby modifying data stored in the at least one memory; and wherein the data modification module ( 4 ) is operable in at least two modes including a trace mode wherein the data modification module ( 4 ) receives a destination address for the data in the data packets received from the external device, and a direct data mode wherein the data modification module ( 4 ) determines a destination address for the data using address information internal to the data modification module ( 4 ).