Patent ID: 7609555

Claim:
A sensing circuit for a flash memory device, the sensing circuit comprising: a first load element comprising an end connected with a bit line of a main cell array; a first inverting circuit comprising an input terminal connected with the bit line of the main cell array and an output terminal connected with another end of the first load element; a second load element comprising an end connected with a bit line of a reference cell array; a second inverting circuit comprising an input terminal connected with the bit line of the reference cell array and an output terminal connected with another end of the second load element; and a sense amplifier comparing a voltage of the bit line of the main cell array with a voltage of the bit line of the reference cell array and generating an output signal according to a result of the comparison, wherein the first load element comprises a PMOS transistor comprising a source connected with the output terminal of the first inverting circuit and a drain and a gate which are connected in common with the bit line of the main cell array.