Patent ID: 7171636

Claim:
A method of mapping a logical expression to a logic circuit, comprising: placing a multiplexer having input terminals, at least one control terminal and an output terminal, and a multiple-input logic gate having a first input terminal, at least one second input terminal and an output terminal in the logic circuit; and connecting the input terminals and the at least one control terminal of the multiplexer to input subservient logic functions and at least one complementary variable to output a subservient logic group including the subservient logic functions and the at least one complementary variable shared by the subservient logic functions from the output terminal of the multiplexer, and the first input terminal and the at least one second input terminal of the multiple-input logic gate to input the subservient logic group and at least one common variable to output a logic group comprising a product of the at least one common variable and the subservient logic group from the output terminal of the multiple-input logic gate.