Patent ID: 7348242

Claim:
A method of fabricating a nonvolatile memory device, said method comprising the steps of: forming a plurality of device isolation layers in a semiconductor substrate to define a plurality of active regions; sequentially depositing an insulating layer and a first conductive layer on the semiconductor substrate; forming a hard mask pattern on the first conductive layer; forming a plurality of floating gates on the insulating layer by etching the first conductive layer using the hard mask pattern as a mask; forming a tunnel insulating layer on the semiconductor substrate including the floating gates and the insulating layer; depositing a second conductive layer on the tunnel insulating layer; forming a plurality of control gate electrodes across the active regions by etching the second conductive layer; and forming source and drain regions in the semiconductor substrate by performing an ion implantation, wherein each of said control gate electrodes covers an entirety of a top surface and one side wall of the respective floating gate.