Patent ID: 8737124

Claim:
A semiconductor device comprising: a semiconductor substrate including first and second main surfaces opposed to each other; first and second wirings formed separately over the semiconductor substrate on a side of the first main surface of the semiconductor substrate; a capacitor formed over the semiconductor substrate on the side of the first main surface of the semiconductor substrate, the capacitor including first and second electrodes sandwiching a capacitive insulating film therebetween, the first electrode being electrically coupled to the first wiring; and first and second diffusion regions of a first conductivity type and third and fourth diffusion regions of a second conductivity type formed in line in the semiconductor substrate such that the first and second diffusion regions sandwich the third diffusion region and the third and fourth diffusion regions sandwich the second diffusion region, the first diffusion region being supplied with a first voltage, the third diffusion region being electrically coupled to the second electrode of the capacitor, and the fourth diffusion region being electrically coupled to the second wiring, wherein the first diffusion region includes a first surface on a side of the first main surface of the semiconductor substrate, the third diffusion region including a second surface on a side of the second main surface of the semiconductor substrate and third and fourth surfaces on the side of the first main surface of the semiconductor substrate, the second diffusion region including a fifth surface on the side of the second main surface of the semiconductor substrate and a sixth surface on the side of the first main surface of the semiconductor substrate, and the fourth diffusion region including a seventh surface on the side of the second main surface of the semiconductor substrate and an eighth surface on the side of the first main surface of the semiconductor substrate, the first surface of the first diffusion region being coupled to the second surface of the third diffusion region, the third surface being coupled to the second electrode of the capacitor via a contact plug, the fourth surface being coupled to the fifth surface of the second diffusion region, the sixth surface of the second diffusion region being coupled to the seventh surface of the fourth diffusion region, and the eighth surface of the fourth diffusion region being coupled to the second wiring via an additional contact plug.