Patent ID: 8030716

Claim:
A CMOS structure, comprising: a PFET device, said PFET device comprises a PFET gate stack comprising a first layer of a shared gate metal, wherein said PFET device further comprises a PFET gate insulator underneath said PFET gate stack, wherein said PFET gate insulator comprises at least two layers: a high-k dielectric layer and an aluminum oxide (AlO x ) layer, wherein said AlO x layer is sandwiched inbetween said high-k dielectric layer and said first layer of said shared gate metal; and an NFET device, said NFET device comprises an NFET gate stack, wherein said NFET gate stack comprises a second layer of said shared gate metal, an NFET gate conductor layer, and a conducting region containing aluminum (Al), wherein said NFET gate conductor layer is underneath said second layer and said conducting region containing Al is sandwiched inbetween said gate conductor layer and said second layer of said shared gate metal.