Patent ID: 8832624

Claim:
A method for routing an interconnect coupled to a gate electrode of a semiconductor device, the method comprising: determining a cumulative damage threshold of a presently-evaluated conductive layer of the interconnect, wherein the cumulative damage threshold comprises a limit of process-induced damage to a gate dielectric of the gate electrode for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect; determining cumulative damage to the gate dielectric of the gate electrode at the presently-evaluated conductive layer of the interconnect, wherein the cumulative damage comprises process-induced damage to the gate dielectric of the gate electrode for the presently-evaluated conductive layer and each previously routed conductive layer of the interconnect; and redesigning one or more conductive layers of the interconnect if the cumulative damage to the gate dielectric is greater than the cumulative damage threshold for the presently-evaluated conductive layer.