Patent ID: 7386842

Claim:
A method for execution by a computer, the method comprising: identifying a loop iterating over a plurality of continuous streams of memory in a stride-one fashion; generating a vectorized representation of the loop for a single instruction multiple datapath architecture, wherein the vectorized representation ignores misalignments among the plurality of continuous streams of memory; developing the vectorized representation into a data reorganization graph representation of the loop, wherein the data reorganization graph representation includes stream-shifting operations that adjust alignment of at least one of the plurality of continuous streams of memory so as to satisfy a data alignment constraint of the computer, the stream-shifting operations applied to the data reorganization graph according to a simdization policy that includes shifting a subset of the plurality of continuous streams of memory to a dominant stream offset in the data reorganization graph, the dominant stream offset being a stream offset that occurs most often among input operands; and generating object code from the realignment data reorganization graph.