Patent ID: 7661059

Claim:
A method for processing signal values comprising: in response to a single trellis instruction that specifies trellis state metrics for a time t 0 , based on the signal values, and transition metrics from time t 0 to time t 1 , for selected trellis states, a programmable digital signal processor executing the steps of: adding a transition metric to a first state metric for time t 0 to provide a first value; subtracting the transition metric from a second state metric for time t 0 to provide a second value; for each selected trellis state, comparing the first and second values; and selecting the maximum of the first and second values for each selected trellis state to provide trellis state metrics for time t 1 , wherein the adding, subtracting, comparing and selecting operations are executed in response to the single trellis instruction by a pipelined accelerator including a first carry save adder receiving inputs, a first full adder combining sum and carry outputs of the first carry save adder, a lookup table generating a correction factor in response to the output of the first full adder, a multiplexer selecting one or more of the inputs to the accelerator in response to the sign of the output of the first full adder, a second carry save adder adding one or more outputs of the multiplexer and the output of the lookup table, and a second full adder combining sum and carry outputs of the second carry save adder to provide the trellis state metrics for time t 1 .