Patent ID: 8423839

Claim:
A memory system comprising: an array of memory cells comprising redundant memory cells, wherein the redundant memory cells comprise (i) at least two redundant rows of memory cells, (ii) at least two redundant columns of memory cells, or (iii) a row of memory cells and a column of memory cells; and a repair module configured to (i) identify at least two sets of memory cells of the array of memory cells, wherein each set of the at least two sets of memory cells includes a row of memory cells or a column of memory cells, and wherein each set of the at least two sets of memory cells includes non-operational memory cells, and (ii) substitute the at least two sets of the array of memory cells with selected rows or columns of the redundant memory cells based on X predetermined sequences of substitutions, where X is an integer greater than 1, wherein the repair module is configured to detect a failure in the array of memory cells that cannot be repaired using the X predetermined sequences of substitutions, and use an alternative repair sequence to repair the non-operational memory cells based on the detection of the failure.