Patent ID: 7864577

Claim:
A method of storing addresses, the method comprising: processing a number of memory addresses; identifying patterns of redundant most significant bits and redundant least significant bits in at least two addresses, wherein said identifying comprises: receiving a first input number that represents the number of memory addresses; processing the first input number via a first subprocess until a variable of the first subprocess satisfies a mathematical condition; calculating via the first subprocess a number of least significant bits and a number of address banks to share the least significant bits; receiving the number of least significant bits as a second input number into a second subprocess; processing the second input number via the second subprocess until a variable of the second subprocess satisfies a mathematical condition; and calculating via the second subprocess a number of most significant bits and a number of address banks to share the most significant bits; and sharing a physical memory location for at least one of the redundant most significant bits and redundant least significant bits in the at least two addresses.