Patent ID: 6872978

Claim:
A method of manufacturing an image display apparatus including an image display unit with a plurality of pixels arranged in a matrix, a first control circuit for controlling the drive of rows of said image display unit, and a second control circuit for controlling the drive of columns of said image display unit, at least one of said image display unit and said first and second control circuits including a plurality of CMOS transistors each of which comprise p- and n-type thin film transistors and which are classified into at least two element groups having different operating voltages, said method comprising the steps of: non-selectively doping a thin film with p-type impurities, said thin film to be an active semiconductor layer including first prospective regions to form p-type thin film transistors and second prospective regions to form n-type thin film transistors; selectively doping only said second prospective regions of said thin film with p-type impurities at a higher concentration than that in said step of non-selectively doping; and annealing said thin film to activate the p-type impurities contained therein, wherein each of said CMOS transistors is subjected to a predetermined number of times of said step of non-selectively doping necessary for the CMOS transistor and a predetermined number of times of said step of selectively doping necessary for the CMOS transistor so that threshold voltages of the p-and n-type thin film transistors included in the CMOS transistor are independently set in accordance with the operating voltage of the CMOS transistor.