Patent ID: 7049675

Claim:
A semiconductor device comprising: a semiconductor layer of a first conductivity type; a first electrode formed on a part of a front surface of said semiconductor layer; a second electrode formed on a rear surface of said semiconductor layer; a first low impurity concentration semiconductor region of a second conductivity type formed on said front surface of said semiconductor layer; and a second low impurity concentration semiconductor region of the second conductivity type formed on said front surface of said semiconductor layer and arranged so as to surround said first low impurity concentration semiconductor region, wherein said first low impurity concentration semiconductor region having a width not smaller than a largest value of a depletion layer that expands at a time of application of a high voltage to break down said first conductivity type semiconductor layer (as expressed by Emax*eps/q*Nd), the largest breakdown electric field, the dielectric constant of the semiconductor, the unit electric charge and an impurity concentration of the semiconductor layer being Emax (V/m), eps (F/m), q(C) and Nd(1/m3) respectively).