Patent ID: 8854551

Claim:
A video signal processing apparatus, comprising: a first analog-to-digital converter (ADC) configured to convert an analog video signal into a first digital video signal at rising edges of a first clock; and a second ADC configured to convert the analog video signal into a second digital video signal at rising edges of a second clock that is different from the first clock; wherein the first clock and the second clock are generated to have a first phase difference in a first section of the analog video signal, such that the first ADC and the second ADC operate alternately in an order of the first ADC and the second ADC, and the first clock and the second clock are generated to have a second phase difference, that is different from the first phase difference, in a second section of the analog video signal that is different from the first section of the analog video signal, such that the first ADC and the second ADC operate alternately in the order of the second ADC and the first ADC.