Patent ID: 8460984

Claim:
A method for forming an integrated circuit (IC) including fin-type field effect transistors (FIN-FETs), comprising: providing a substrate having thereon a semiconductor layer including a first portion and a second portion of substantially uniform thickness H 1 ; altering an etch rate of the second portion of the semiconductor layer; differentially etching the second portion to a thickness H 2 ≠H 1 ; forming first semiconductor fins in the first portion and second semiconductor fins in the second portion; using the first and second fins, forming first and second FIN-FETs on the substrate by: forming sources and drains in or on the fins and adapted to communicate with conductive channels induceable in the fins; forming gate structures at least on opposed sides of the fins adapted to induce the conductive channels in the fins, and wherein the first FIN-FETs on the substrate have fin height H 1 and the second FIN-FETs have fin height H 2 ≠H 1 .