Patent ID: 7118954

Claim:
A method for fabricating metal-oxide-semiconductor devices, comprising: providing a semiconductor substrate; forming a gate dielectric layer having a thickness of t 1 on the semiconductor substrate; depositing a polysilicon layer on the gate dielectric layer; forming a resist mask on the polysilicon layer; etching the polysilicon layer not masked by the resist mask, thereby forming a gate electrode; etching a thickness of the gate dielectric layer not covered by the gate electrode; stripping the resist mask; forming a salicide block resist mask covering the gate electrode and a portion of the remaining gate dielectric layer laterally protruding an offset “d” from bottom of the gate electrode; etching away the remaining gate dielectric layer not covered by the salicide block resist mask, thereby exposing the semiconductor substrate and forming a salicide block lug portions with a thickness t 2 on two opposite sides of the gate electrode with the offset “d” from sidewalls of the gate electrode, wherein t 2 <t 1 ; forming a spacer on the sidewalls of the gate electrode, wherein the spacer has a maximum thickness that is smaller than the offset “d” such that the salicide block lug portions laterally protruding from bottom of the spacer and forms a step thereto; depositing a metal layer over the semiconductor substrate; and making the metal layer react with the semiconductor substrate, thereby forming a salicide layer that is kept the distance “d” away from the gate electrode.