Patent ID: 8068508

Claim:
An electronic circuit, comprising: a plurality of data processing circuits; a communication network for passing messages between the data processing circuits; buffer storage circuits for storing data items received from the network for use by respective ones of the data processing circuits; bidirectional network interfaces, each for packing data items from an associated one of the processing circuits into transmission messages and transmitting the transmission messages via the network, and for receiving reception messages from the network and unpacking data items from each reception message for use by the associated one of the processing circuits, the network interfaces including, in at least part of the transmission messages, information representing respective amounts of unreported buffer space R for receiving data items from the reception messages in the buffer storage circuit for the associated one of the processing circuits; a transmission control circuit, arranged to trigger sending of the transmission messages with data items from a particular one of the processing circuits, the transmission control circuit being arranged to hold up transmission until a number A of data items, that the particular one of the processing circuits has made available and for which buffer space is available across the network, exceeds a threshold, the transmission control circuit lowering the threshold, or suppressing the threshold altogether in response to an increase in the amount R of unreported available buffer space in the buffer storage circuit for the particular one of the processing circuits.