Patent ID: 7601641

Claim:
A method for etching during fabrication of a semiconductor device comprising the steps of: initially etching to partially remove a portion of one or more lithographic-aiding layers overlying an oxide layer while etching a first portion of the oxide layer in accordance with a mask formed by the one or more lithographic-aiding layers, the one or more lithographic aiding layers including an anti-reflective coating layer and the step of initially etching comprising the step of non-selectively etching to partially remove a first portion of the anti-reflective coating layer while etching the first portion of the oxide layer; and thereafter additionally etching to remove remaining portions of the one or more lithographic-aiding layers after etching a remaining portion of the oxide layer, wherein the one or more lithographic aiding layers further include an optical planarizing layer underlying the anti-reflective coating layer, and wherein the step of additionally etching comprises the step of additionally etching to remove the optical planarizing layer after etching the remaining portion of the oxide layer.