Patent ID: 7787318

Claim:
A semiconductor memory device having a function of testing a read operation, comprising: a plurality of memory cells, each of which includes a pair of memory holding nodes, and two access transistors each having a gate electrode connected to the same word line, wherein one of the access transistors connects one of the memory holding nodes to one of a pair of bit lines, the other access transistor connects the other memory holding node to the other bit line, and a memory state of each of the memory cells is determined based on potentials of the memory holding nodes; a bit line drive section for independently connecting each of the bit lines included in the pair of bit lines to a predetermined potential level; and a sense amplifier for amplifying a potential difference between the pair of bit lines and outputting the amplified potential difference, in accordance with an input of a sense amplifier activating signal, wherein when a read operation is tested, the bit line drive section connects at least one of the pair of bit lines to the predetermined potential level upon or immediately before selection of a word line connected to a memory cell to be tested, to reduce the potential difference of the pair of bit lines by a predetermined value, the potential difference of the pair of bit lines after being reduced by the predetermined value is smaller than an operating threshold of the sense amplifier, or is reversed in sign as compared to a potential difference of the pair of bit lines in the case where the at least one of the pair of the bit lines is not connected to the predetermined potential level, the bit line drive section is provided with respect to the same pair of bit lines as that of the memory cell to be tested, and includes the same transistors as those of the memory cell to be tested, and each of the transistors included in the bit line drive section has a corresponding transistor included in the memory cell to be tested, where each of the transistors included in the bit line drive section is the same type and has the same dimensions as its corresponding transistor included in the memory cell to be tested.