Patent ID: 8040267

Claim:
A decoder device, comprising: a reference voltage generating section for outputting a first threshold level signal and a second threshold level signal; a first comparator for receiving inputs of a stair-stepped waveform input signal and the first threshold level signal and comparing the input signal and the first threshold level signal to output a comparison result as a first comparison output signal; a second comparator for receiving inputs of the stair-stepped waveform input signal and the second threshold level signal and comparing the input signal and the second threshold level signal to output a comparison result as a second comparison output signal; and a logical operation section for receiving inputs of the first comparison output signal and the second comparison output signal and performing a logical operation between the first comparison output signal and the second comparison output signal to output a signal decoded from the stair-stepped waveform input signal, wherein a threshold level represented by the first threshold level signal intersects a riser section of one stepped waveform out of two adjacent stepped waveforms in the stair-stepped waveform input signal, and a threshold level represented by the second threshold level signal intersects a riser section of the other stepped waveform out of the two adjacent stepped waveforms in the stair-stepped waveform input signal, a level difference between the threshold level represented by the first threshold level signal and a boundary level which defines a boundary between the two adjacent stepped waveforms is smaller than a level difference between a center level of the riser section of the one stepped waveform and the boundary level, and a level difference between the threshold level represented by the second threshold level signal and the boundary level is smaller than a level difference between a center level of the riser section of the other stepped waveform and the boundary level.