Patent ID: 6921944

Claim:
A semiconductor device comprising: a semiconductor substrate which has a surface; a first low voltage transistor which is disposed on the semiconductor substrate, wherein the first low voltage transistor comprises a first gate portion which is formed on the semiconductor substrate, first and second impurity regions which are separately formed within the semiconductor substrate, wherein the first and second impurity regions extend deeply into the semiconductor substrate, a third impurity region which is formed between the first and second impurity regions within the semiconductor substrate, wherein the third impurity region touches the first impurity region and is formed directly below the first gate portion, a fourth impurity region which is formed between the first and second impurity regions within the semiconductor substrate, wherein the fourth impurity region touches the second impurity region and is formed directly below the first gate portion, a fifth impurity region which is formed directly below the third impurity region, wherein the fifth impurity region touches the first and third impurity regions, a sixth impurity region which is formed directly below the fourth impurity region, wherein the sixth impurity region touches the second and fourth impurity regions, a seventh impurity region which is formed between the first and second impurity regions within the semiconductor substrate, wherein the seventh impurity region covers only a side of the fifth impurity region so as to expose an underside of the fifth impurity region, and an eighth impurity region which is formed between the first and second impurity regions within the semiconductor substrate, wherein the eighth impurity region covers only a side of the sixth impurity region so as to expose an underside of the sixth impurity region; and a second high voltage transistor which is disposed on the semiconductor substrate, wherein the second high voltage transistor comprises a second gate portion which is formed on the semiconductor substrate, ninth and tenth impurity regions which are separately formed within the semiconductor substrate, wherein the ninth and tenth impurity regions extend deeply into the semiconductor substrate, an eleventh impurity region which is formed between the ninth and tenth impurity regions within the semiconductor substrate, wherein the eleventh impurity region touches the second gate portion and the ninth impurity region, and a twelfth impurity region which is formed between the ninth and tenth impurity regions within the semiconductor substrate, wherein the twelfth impurity region touches the second gate portion and the tenth impurity region, wherein the first through sixth and the ninth through twelfth impurity regions are first conductivity type regions, and the seventh and eighth impurity regions are second conductivity type regions, wherein the second conductivity type is opposite the first conductivity type.