Patent ID: 7800947

Claim:
A method for operating a memory system, comprising: applying a first word line potential to a number of unselected non-volatile memory cells in a NAND string; applying a second word line potential to a selected non-volatile memory cell in the NAND string; applying a source select line potential to a first source select gate; and applying a source select line potential to a second source select gate which is different from the source select line potential applied to the first source select gate, wherein applying the source select line potential to the second source select gate includes: setting a threshold voltage of the second source select gate to an elevated threshold voltage when a non-volatile memory cell in the NAND string adjacent to the second source select gate is to be programmed during a program operation; applying a first potential to the second source select gate during a read operation; and applying a second potential to the second source select gate during a program operation.