Patent ID: 8609459

Claim:
A method of manufacturing a nanostructure quick-switch memristor, comprising the steps of: (1) evaporating a layer of Au or Pt metal membrane on a lower surface of a porous template as a common electrode by a vacuum coating method; (2) welding a wire for connecting with a cathode of DC power supply on the evaporated metal membrane; (3) forming a plurality of nano-wires within through-holes of the porous template by putting the porous template obtained in step (2) into an electrolytic tank to electrolyze, wherein an end of each of the nano-wires and an upper surface of the porous template are at the same level; (4) by putting the porous template obtained in step (3) into a magnetron sputtering machine, sputtering an N-type semiconductor layer, with a thickness of 1 nm to 33 nm, on the upper surface of the porous template, and then sputtering a neutral semiconductor layer with a thickness of 1 nm to 33 nm, and then sputtering a P-type semiconductor layer with a thickness of 1 nm to 33 nm; (5) forming an upper electrode by electrically connecting the porous template having the nano-wires with the P-type semiconductor layer through the interface in situ alloying method; (6) forming a lower electrode by electrically connecting the porous template having the nano-wires with the N-type semiconductor layer through the interface in situ alloying method; (7) preparing a plurality of upper electrodes of the memristor on the upper surface of the porous template having the nano-wires which is connected with the P-type semiconductor layer, by the laser etching or imprinting technology; and (8) packaging the unit switch array of the nanostructure memristor obtained in steps (1) to (7) by packaging and testing technologies.