Patent ID: 7706833

Claim:
A unified dual-mode global standard for mobile communication (GSM)/universal mobile telecommunication systems (UMTS) clock comprising: a reference clock configured to generate a reference clock signal; a local oscillator (LO) configured to generate a single LO signal based on the reference clock signal; at least one frequency divider configured to selectively generate either (1) a GSM clock signal by converting a frequency of the LO signal by a predetermined integer factor or (2) a UMTS clock signal by converting the frequency of the LO signal by a predetermined integer factor, wherein both the GSM clock signal and the UMTS clock signal are generated based on the reference clock signal; wherein the LO is configured to generate the LO signal at a frequency of 312 MHz and a frequency divider comprises a rate matching unit configured to convert the LO signal to a frequency that is an integer multiple of 3.84 MHz; wherein the rate matching unit comprises: a 6-bit counter configured to count pulses of the LO signal and to generate a 6-bit binary number; a NAND gate configured to generate an output based on the 6-bit binary number; and a D flip-flop configured such that an enable port is driven by an output of the NAND gate, the LO signal clocks the D flip-flop and a Q output of the D flip-flop, which is used as a clock signal for a UMTS timing manager, is fed back to an input of the D flip-flop.