Patent ID: 7687370

Claim:
A method for forming a semiconductor isolation trench comprising the sequential steps of: forming a pad oxide layer over a substrate; forming a barrier layer over the pad oxide layer; forming a masking layer over the barrier layer; patterning the masking layer to form at least one opening in the masking layer; etching at least a part of the barrier layer and at least a part of the pad oxide layer through the at least one opening and stopping the etching at a top surface of the substrate without etching into the substrate to form at least one isolation trench, said etching also laterally etching into exposed surfaces of the pad oxide layer to create an offset at the top surface of the substrate and recess the pad oxide layer at the top surface of the substrate; growing an oxide layer on at least the top surface of the substrate corresponding to the at least one isolation trench wherein edges of the oxide layer are taller than a central region of the oxide layer within the at least one isolation trench; and etching the oxide layer and at least a portion of the substrate to form at least one isolation trench opening.