Patent ID: 7290075

Claim:
A data processing apparatus comprising: an interconnect circuit operable to route a plurality of transfers over a corresponding plurality of paths provided by the interconnect circuit, the plurality of paths including a shared connection; a plurality of initiator logic elements for initiating transfers; a plurality of recipient logic elements for receiving transfers; for each transfer the corresponding path coupling the initiator logic element responsible for initiating that transfer with the recipient logic element destined to receive that transfer; at least one of the recipient logic elements that is destined to receive one of said transfers having a storage element associated therewith operable to temporarily store transfer data of that transfer, the storage element being operable to assert a ready signal if that storage element is available to store the transfer data, and the storage element being arranged such that once the ready signal is asserted that ready signal will not be de-asserted until said transfer data has been received by the storage element; arbitration logic operable to receive an indication as to whether said ready signal has been asserted and to select, in dependence on predetermined criteria including at least said indication, one of said plurality of transfers for routing via the shared connection.