Patent ID: 8365004

Claim:
A configuration arrangement comprising: means for providing a group of function blocks defining at least a part of a configuration of an intelligent electronic device, wherein each function block is for executing a function in the intelligent electronic device; means for defining connection lines between the function blocks; means for locating, in the group of function blocks, a fixed function block having a fixed cycle time value; and means for defining configuration settings of the configuration by setting a configuration setting for a function block connected to the fixed function block, wherein: the defining means is comprised in a processor of a computer processing device; the defining means is configured to set a cycle time of the function block connected to an input of the fixed function block to a cycle time value which is the same as or smaller than the cycle time value of the fixed function block; and the defining means is configured to set an execution order of the function blocks of the configuration such that a function block connected to an input of the fixed function block is executed before the fixed function block.