Patent ID: 7846773

Claim:
A method for making semiconductor package, comprising: providing a carrier frame with a tape thereon; forming a first interconnect structure on the tape, the first interconnect structure comprising an inner portion, a middle portion, and an outer portion; forming solder balls on the middle and outer potions of the first interconnect structure; connecting a first die containing an integrated circuit device to the inner portion of the first interconnect structure; providing a first molding material around the first die and the solder balls except for an upper surface of the solder balls; providing first routing leads from an inner portion of the solder balls to the backside of the first die and second routing leads; attaching a second die containing an integrated circuit device to the first routing leads; connecting a third die containing an integrated circuit device to the second routing leads; providing a second molding material to encapsulate the first and second routing leads, second die, and the third die; and removing the carrier frame and the tape.