Patent ID: 7111103

Claim:
A system to monitor performance of a computing device, comprising: a first bridge to interface with a first set of devices; a second bridge to interface with a second set of devices, the second bridge to communicate with the first bridge via a downstream data path; configuration registers to store configuration data associated with the second set of devices, wherein the configuration registers are accessible through the second bridge; a hub interface to allow data to transfer downstream from the first bridge to the second bridge, and to allow data to transfer upstream from the second bridge to the first bridge; a controller, external to each of the first bridge and the second bridge, to access the configuration registers via the second bridge, the controller coupled to the downstream data path to insert data into the downstream data path; and a logic device located between the first and second bridge to allow the second bridge to send data to, and receive data from, the controller, the logic device to insert the data received from the controller into the downstream data path to the second bridge when the first bridge is not transmitting data over the downstream data path.