Patent ID: 7838375

Claim:
A method of manufacturing a self aligned silicon germanium heterojunction bipolar transistor having a polyemit module, the method comprising the steps of: forming a base over a collector and between at least two base structures; forming a first oxide/nitride/second oxide (ONO) stack over the base, wherein the second oxide is thicker than the first oxide; forming an emitter window through the ONO stack down to the base; depositing a layer of emitter silicon over the structure and in the emitter window; depositing a layer of silicon germanium (SiGe) over the layer of emitter silicon and in the emitter window; etching outer portions of the layer of SiGe and the layer of emitter silicon to form an emitter; forming at least one nitride spacer adjacent to the emitter; etching the layer of SiGe from a central portion of the emitter to expose the layer of emitter silicon; and performing a salicide procedure to place a salicide layer over the layer of emitter silicon and over the at least two base structures.