Patent ID: 7732298

Claim:
A semiconductor transistor, comprising: a source/drain region formed in a semiconductor substrate adjacent to and extending partially under a sidewall spacer of a gate electrode formed on the substrate; an isolation structure formed in the semiconductor substrate at an end of the source/drain region opposite the gate electrode to electrically isolate the transistor; a protective portion comprising a protective liner forming substantially all of the sidewall within the isolation structure and extending from within the isolation structure to an upper surface of the source/drain region covering an upper portion of the source/drain region immediately adjacent to a perimeter of the isolation structure; and metal silicide formed in the source/drain region, the metal silicide comprising deposited metal reacted with silicon in the source/drain region, wherein the protective portion protects the covered portion of the source/drain region immediately adjacent to the isolation structure from receiving the deposited metal such that no metal silicide forms in the covered portion of the source/drain region.