Patent ID: 7492780

Claim:
Apparatus for detecting timeout for packets transmitted in a packet-switched point-to-point communication system, comprising: a master time counter; a first-in-first-out circuit (FIFO) having a data input terminal in communication with said master time counter and a data output terminal; difference logic in communication with said data output terminal and said master time counter; a timeout counter in communication with said difference logic; and timeout detection logic in communication with said timeout counter; wherein: said master time counter is configured to generate a time signal; said FIFO is configured to store time stamps for said packets in response to said time signal and to provide a time stamp to said difference logic in response to a packet acknowledgement; said difference logic comprises a first subtractor for subtracting said time stamp from said time signal generated by said master time counter to produce an elapsed time and a second subtractor for subtracting said elapsed time from a predefined timeout value to produce a time left value; each of said time stamps comprise N bits and said predefined timeout value comprises N−1 bits; and wherein said timeout detection logic is configured to produce a timeout signal in response a most significant bit of said time left value being set.