Patent ID: 8581376

Claim:
A semiconductor die stack comprising: a base lead frame; a first semiconductor die flip chip mounted onto said base lead frame; a second semiconductor die stacked over the first semiconductor die on the opposite side of the first die as the base lead frame; a clip structure located between the first and second semiconductor dies, with the second semiconductor die being flip chip mounted to the clip structure, the first semiconductor die having a first contact facing the second semiconductor die, and the second semiconductor die having a second contact and a third contact facing the first semiconductor dies wherein the clip structure further comprises a first conductive segment that connects the first contact of the first semiconductor die to the second contact of the second semiconductor die and a second conductive segment that connects to the third contact of the second semiconductor die and electrically insulated from the first semiconductor die; and non-conductive leveling projections located between the clip structure and first semiconductor die such that the tops of the first and second conductive segments are co-planar.