Patent ID: 8782587

Claim:
A computerized method for analyzing a circuit description netlist to produce a higher level description, comprising: receiving a netlist including block instances that comprises at least a portion of a circuit description netlist; analyzing by one or more processors the netlist including grouping ports according to connectivity strength between a source instance and at least one connected destination instance; creating a list of bucket entries containing driver instance names, destination instance names and connected pairs of ports corresponding to specific driver port instances and destination port instances; assigning signal groupings corresponding to groups of connected ports to higher-level interface definitions; and saving, in memory, the higher level interface definitions and related signal groupings and signal properties, wherein for each bucket list entry, the method further comprises: creating new interfaces of types MASTER and MIRRORED MASTER; creating a logical port of a same type as that of a driver port instance; instantiating an interface of type MASTER to the driver port instance, and mapping all ports in the bucket list entry to master interface logical ports which have the same type as the driver port; and instantiating an interface of type MIRRORED MASTER to each destination instance, and mapping all ports in the bucket to mirrored master interface logical ports which have the same type as ports on the destination instance.