Patent ID: 6979649

Claim:
A fabrication method of a semiconductor integrated circuit device comprising the steps of: (a) forming a first insulative film of a single layer or a stacked layer over a surface of a semiconductor wafer; (b) removing the first insulative film on an edge of the semiconductor wafer; (c) patterning the first insulative film after the step (b), on a product-obtainable area and on a non-product-obtainable area of the semiconductor wafer; (d) etching the semiconductor wafer by using the first insulative film as a mask after the step (c); (e) forming a second insulative film over the semiconductor wafer including a portion over the first insulative film after the step (d); (f) mechanically and chemically polishing a surface of the second insulative film, thereby planarizing the surface thereof; and (g) removing the second insulative film on the edge of the semiconductor wafer.