Patent ID: 7568064

Claim:
A reconfigurable circuit, comprising: a plurality of reconfigurable resources; and a plurality of communication resources to facilitate selective packet-oriented communications among the reconfigurable resources, each communication resource coupled to one or more of the reconfigurable resources and to one or more of the other communication resources, the plurality of communication resources including a plurality of communication nodes, at least one communication node to receive communication packets from a source communication node and route the communication packets to a destination node, the at least one communication node including: one or more data crossbars to facilitate routing communication packets from the at least one communication node to the destination communication node; a credit crossbar to facilitate routing of credits from the at least one communication node to the source communication node; and one or more pipeline registers coupled to output ports of the credit crossbar to temporarily store the credits being routed from the at least one communication node to the source communication node.