Patent ID: 7800421

Claim:
An information processing apparatus, comprising plural combinations of a clock supplier and a clock supply destination supplied with a clock from the clock supplier, wherein the clock supply destination includes a first receiver that receives the clock supplied from the clock supplier; a first transmitter that transmits the clock received by the first receiver to the clock supplier; and a return route through which the clock is transmitted from the first receiver to the first transmitter, and the clock supplier includes a second transmitter that transmits the clock to the first receiver; a second receiver that receives the clock transmitted from the first transmitter; a variable delay unit that adds a delay of a variable amount to the clock to be supplied to a corresponding clock supply destination from the second transmitter; a comparison-reference-clock supply unit that supplies a comparison reference clock having the same phase as that of a comparison reference clock supplied from other clock supplier; a phase comparator that compares the phase of a return clock received by the second receiver with the phase of the comparison reference clock supplied from the comparison-reference-clock supply unit; and a phase-difference control unit that controls the delay added by the variable delay unit, so that the phase of the return clock coincides with the phase of the comparison reference clock, based on a result of comparison by the phase comparator.