Patent ID: 7716268

Claim:
A method for evaluating polynomials using a processor based nested form polynomial engine, comprising: a) setting M to an order of a polynomial to be evaluated; b) setting N equal to 1; c) receiving an N th coefficient from a memory into a coefficient register; d) loading a data operand from the memory into a data register; e) providing the N th coefficient and the data operand directly from the coefficient register and data register, respectively, to a multiplier; f) multiplying the directly provided N th coefficient and the data operand to produce a product; g) providing an (N+1) th coefficient from the memory to an adder; h) transferring the product directly to an adder in a next cycle for adding the product to the (N+1) th coefficient to produce a sum; i) setting N to equal N+1 and M=M−1; j) providing the sum directly to an accumulator and set to an accumulated value; k) determining whether M is less than 1; l) providing the accumulated value to the coefficient register as an N th coefficient when M is not less than 1; m) returning to step e) when M is not less than 1; n) providing the accumulated value as a result when the M is less than 1 thereby indicating evaluation of the polynomial is complete; and o) providing the result to a circuit for transformation into a control operation for controlling a function of the circuit.