Patent ID: 8916866

Claim:
A semiconductor device comprising: a first gate electrode; a first insulating layer covering the first gate electrode; a first oxide semiconductor layer that overlaps with the first gate electrode and is in contact with the first insulating layer; a second oxide semiconductor layer and a third oxide semiconductor layer that are in contact with the first insulating layer; a source electrode on and in contact with the second oxide semiconductor layer; a drain electrode on and in contact with the third oxide semiconductor layer; a second insulating layer covering the source electrode, the drain electrode, and the first oxide semiconductor layer; and a second gate electrode that is on and in contact with the second insulating layer, wherein each of the second oxide semiconductor layer and the third oxide semiconductor layer has higher carrier density than the first oxide semiconductor layer, and wherein the second oxide semiconductor layer and the third oxide semiconductor layer face each other with the first oxide semiconductor layer interposed therebetween, and each of the second oxide semiconductor layer and the third oxide semiconductor layer is partly in contact with each of an upper surface, a lower surface, and a side surface of one of end portions of the first oxide semiconductor layer.