Patent ID: 7671384

Claim:
A semiconductor integrated circuit device, comprising: a memory cell well formed on a substrate; a non-volatile semiconductor memory device formed in said memory cell well; a first well formed on said substrate; a first transistor formed on said first well and having a gate insulation film of a first film thickness; a second well formed on said substrate; a second transistor formed on said second well and having a gate insulation film of said first film thickness, said second transistor having an opposite channel conductivity type to said first transistor; a third well formed on said substrate; a third transistor formed on said third well with a gate insulation film having a second film thickness smaller than said first film thickness; a fourth well formed on said substrate; and a fourth transistor formed on a fourth well and having a gate insulation film of said second film thickness, said fourth transistor having an opposite channel conductivity type to said third transistor, at least one of said first and second wells and at least one of said third and fourth wells having a depth shallower than said memory cell well, said non-volatile semiconductor memory device having a source region and a drain region of a first conductivity type, said memory cell well having a second conductivity type opposite to said first conductivity type of said source and drain regions.