Patent ID: 7821054

Claim:
A semiconductor system comprising a plurality of semiconductor devices connected in series to form a device string, each of the plurality of semiconductor devices functioning as an aging device turned on or off for a predetermined time by leakage of stored charge and each comprising: a semiconductor substrate; a first semiconductor region and a second semiconductor region formed on the semiconductor substrate to be insulated and separated from each other; a first gate dielectric film formed on the first semiconductor region; a second gate dielectric film formed on the second semiconductor region; a floating gate electrode extending over the first gate dielectric film and the second gate dielectric film, and overlapping with the first semiconductor region and the second semiconductor region, an overlapping area of the floating gate electrode and the first semiconductor region being larger than an overlapping area of the floating gate electrode and the second semiconductor region, such that a coupling capacitance between the floating gate electrode and the first semiconductor region is larger than a coupling capacitance between the floating gate electrode and the second semiconductor region; first and second diffusion layers formed on a surface of the first semiconductor region to interpose the floating gate electrode therebetween; a bit line connected to one of the first and second diffusion layers; a source line connected to the other of the first and second diffusion layers; third and fourth diffusion layers formed on a surface of the second semiconductor region to interpose the floating gate electrode therebetween; and a word line connected to the third and fourth diffusion layers in common, wherein the bit line and the source line are arranged above the word line and arranged in a direction perpendicular to the word line.