Patent ID: 6962840

Claim:
A method of forming a semiconductor device comprising: (a) forming isolation layers in predetermined regions of a semiconductor substrate to define a first region, a second region and a third region; (b) forming a first gate insulating layer and a first gate conductive pattern stacked sequentially on the first region, a second gate insulating layer and a second gate conductive pattern stacked sequentially on the second region, and a third gate insulating layer and the second gate conductive pattern stacked sequentially on the third region; and (c) patterning together the first gate conductive pattern and the second gate conductive pattern to form a first gate electrode, a second gate electrode and a third gate electrode in the first, second and third regions, respectively, wherein the first gate insulating layer, the second gate insulating layer and the third insulating layer are formed having varying thicknesses and each layer has a different thickness than the other layers.