Patent ID: 7205615

Claim:
A semiconductor device, comprising an nMISFET and a pMISFET, wherein the nMISFET includes: a first active region which is divided by an isolation region formed in a semiconductor substrate made of silicon and which is made of the semiconductor substrate; a first gate insulating film formed on the first active region; a first gate electrode formed on the first gate insulating film; n-type source/drain regions formed in regions of the first active region located on both sides of the first gate electrode; and a first internal stress film formed on the n-type source/drain regions for generating a tensile stress in a gate length direction in a first channel region located in the first active region under the first gate electrode, the pMISFET includes: a second active region which is divided by the isolation region formed in the semiconductor substrate and which is made of the semiconductor substrate; a second gate insulating film formed on the second active region; a second gate electrode formed on the second gate insulating film; p-type source/drain regions formed in regions of the second active region located on both sides of the second gate electrode; and a second internal stress film formed on the p-type source/drain regions for generating a compressive stress in a gate length direction in a second channel region located in the second active region under the second gate electrode, neither the first internal stress film nor the second internal stress film is formed on an upper surface of the first gate electrode and an upper surface of the second gate electrode.