Patent ID: 8473930

Claim:
A method for executing non-native binaries on a host computer architecture, the method comprising: a) receiving a guest executable binary comprising a plurality of blocks of quest instructions encoded on a non-transitory computer readable medium, b) executing the guest executable binary on the host computer architecture by: 1) alternating between the acts of 1) translating of a block of guest instructions from the plurality of blocks of guest instructions of the guest executable binary and 2) executing each instruction within the translated executable binary block on the host computer architecture, until the plurality of blocks are all executed; wherein i) during the execution of each instruction of the translated executable binary block, responding to a generation of a signal by placing signal information on a signal queue; and defer handling of the signal until a safe point of a plurality of safe points, is reached; a safe point being at a position in the activation stack of the translated executable binary; where the execution permits proper handling of any signals such that the signal is handled at the start of the translation of a subsequent guest instruction block and wherein each safe point comprises a stub having instructions for initiating the handling of the signal by inspecting the signal queue and building the activation stack in a way that is processable by a registered signal handler; and 2) invoking stubs at every safe point to initiate the handling of any signals stored on the signal queue by a respective registered signal handler.