Patent ID: 8470643

Claim:
A manufacturing method of manufacturing a plurality of semiconductor packages at one time, each of the semiconductor packages including: an upper substrate and a lower substrate connected to each other via spacer members; a semiconductor element located between the upper substrate and the lower substrate and mounted on said lower substrate; and a mold resin filled in a space between said upper substrate and said lower substrate, the manufacturing method comprising: preparing an upper-substrate substrate material including said upper substrate and an extending part in a circumference of said upper substrate, joining conductive core balls as said spacer members to joint pads formed on said upper substrate and also joining core balls to joint pads formed on said extending part, and preparing a lower-substrate substrate material including said lower substrate and an extending part in a circumference of said lower substrate; joining the joint pads formed on said extending part of said upper-substrate substrate material to the joint pads formed on said extending part of said lower-substrate substrate material via said core balls, and connecting said upper-substrate substrate material to said lower-substrate substrate material by electrically connecting the joint pads formed in an area corresponding to said upper substrate of said upper-substrate substrate material to the joint pads formed in an area corresponding to said lower substrate of said lower-substrate substrate material via said core balls and said conductive core balls; fixing said upper-substrate substrate material to said lower-substrate substrate material by filling a mold resin between said upper-substrate substrate material and said lower-substrate substrate material; removing a portion including said extending part of said upper-substrate substrate material and said extending part of said lower-substrate substrate material; and individualizing said semiconductor packages.