Patent ID: 7351629

Claim:
A method of forming a non-volatile memory device comprising: defining an active region by forming a device isolating layer in a portion of a semiconductor substrate; forming a support pattern that crosses over the active region and defines a first under cut region and a second under cut region between a portion of the support pattern and a portion of the semiconductor substrate; forming a tunnel insulating layer on the semiconductor substrate; forming a first gate conductive layer on the tunnel insulating layer, the first gate conductive layer filling the under cut regions; anisotropically etching the first gate conductive layer to form a selection gate electrode on a first sidewall of the support pattern and a preliminary floating gate electrode on a second sidewall of the support pattern; patterning the preliminary floating gate electrode to form a floating gate electrode; and forming an erasing gate electrode over the floating gate electrode, wherein the erasing gate electrode crosses over the active region, parallel to the selection gate electrode, and wherein the selection gate electrode and the floating gate electrode have a selection-protruding part and a floating-protruding part that are formed inside the under cut regions, respectively.