Patent ID: 7890940

Claim:
A compiler apparatus for collecting frequencies with which each process is executed in a program to be optimized and optimizing said program based on the collected frequencies, said apparatus comprising a processor having at least: a loop process detection portion to detect a repeatedly executed loop process of said program; a loop process frequency collection portion to collect loop process frequencies with which said loop process is executed in said program; an in-loop process frequency collection portion to collect in-loop process frequencies with which, as against the number of times of execution of said loop process, each of a plurality of in-loop processes included in said loop process is executed; an in-loop execution information generating portion to, based on said loop process frequencies and said in-loop process frequencies, generate in-loop execution information indicating the frequencies with which each of said plurality of in-loop processes is executed in the case where said program is executed; and an optimization portion to optimize said program based on said in-loop execution information generated by said in-loop execution information generating portion, the in-loop process frequency collection portion further determining whether said loop process frequencies are higher than a predetermined reference frequency, and said in-loop process frequency collection portion determines number of times of execution of said each of a plurality of in-loop processes if said loop process frequencies are higher than a predetermined reference frequency.