Patent ID: 7955993

Claim:
A method comprising: providing a semiconductor substrate in a reaction chamber; flowing a first reactant source comprising silicon into the reaction chamber, flowing a boron dopant source into the reaction chamber and a phosphorus dopant source into the reaction chamber so that a layer of BPTEOS is deposited on the semiconductor substrate having a first dopant level of phosphorus and boron; stopping the flow of the first reactant source, the boron dopant and the phosphorus dopant into the reaction chamber and so that a phosphorus/boron rich film having a second dopant level of phosphorus and boron higher than said first dopant level is deposited over the layer of BPTEOS wherein the flow of the first reactant source is stopped from flowing into the reaction chamber prior to stopping the flow of the boron dopant and the phosphorus dopant into the reaction chamber; and reducing the phosphorus/boron rich film.