Patent ID: 7117382

Claim:
An apparatus comprising: a select circuit configured to receive a control code indicating a circuit delay for offsetting at least a portion of a transmission delay of a strobe signal; a delay circuit configured to receive the strobe signal and to delay the strobe signal such that transitions of the delayed strobe signal occur within a timing window for storing valid data in a memory circuit responsive to the delayed strobe signal; and wherein the delay circuit comprises: a first pair of transmission delay circuits each comprising an input and an output; wherein the inputs of the first pair of transmission delay circuits are coupled to receive a first signal; wherein individual ones of the first pair of transmission delay circuits are configured to transmit the first signal to respective outputs with distinct time delays; and wherein the select circuit comprises: a first multiplexer comprising a pair of inputs coupled to the respective outputs of the first pair of transmission delay circuits, a first multiplexer output, and a first control input configured to receive a first bit of the control code, wherein the first multiplexer multiplexes one of the outputs of the first pair of transmission delay circuits to the first multiplexer output in response to the first bit of the control code.