Patent ID: 7358769

Claim:
An XOR circuit comprising: a first input for a first operand; a second input for an inverted first operand; a third input for a second operand; a fourth input for an inverted second operand; a first output for a result operand; a second output for an inverted result operand; a first switch connected between the second input and the second output, wherein a control electrode of the first switch is connected to the third input; a second switch connected between the first input and the second output, wherein a control electrode of the second switch is connected to the fourth input; a third switch connected between the first input and the first output, wherein a control electrode of the third switch is connected to the third input; a fourth switch connected between the second input and the first output, wherein a control electrode of the fourth switch is connected to the fourth input; and a preparer for alternately driving the inputs of the XOR circuit in a preparation mode and in a data mode, wherein the first input and the second input are driven to the same potential or the third input and the fourth input are driven to the same potential in the preparation mode.