Patent ID: 7549094

Claim:
A method for receiving data by a universal asynchronous receiver transmitter, said universal asynchronous receiver transmitter having a receive shift register for receiving a plurality of serial data, and said receive shift register being coupled to a receiver FIFO (RFIFO) and a line status register (LSR) capable of storing the serial data transmitted from said receive shift register, and said receiver FIFO being coupled to a receiver buffer register (RBR) and said line status register being coupled to a good data length register (GDL), and a preinstalled microprocessor connecting to said receiver buffer register, said line status register and said good data length register through a bus, the method comprising the following steps: 1) receiving said serial data by said receive shift register; 2) sending said serial data by said receive shift register to said receiver FIFO, and gauging said serial data received is correct or error and marking the serial data accordingly by said line status register, wherein if the serial data is marked correct, the process proceeds to step (3) and wherein if the serial data is marked error, the process proceeds to step (4); 3) storing said correct serial data into said receiver buffer register by said receiver FIFO and sending a signal into said good data length register by the line status register, and the process proceeds to step (5); 4) storing said error serial data into said line status register by said receive shift register and not sending a signal into said good data length register by the line status register, and the process proceeds to step (5); 5) reading number of correct serial data from the good data length register by said microprocessor through said bus, and reading out the number of correct serial data after being read by the microprocessor; 6) reading said correct serial data from said receiver buffer register by said microprocessor through said bus; 7) comparing the number of correct serial data read from said good data length register with the total number of serial data send from the receive shift register by said microprocessor to check whether the number of correct serial data in said good data length register is the same, wherein if the number of the correct serial data in the good data length register is less than the total number of transmitted serial data, the process proceeds to step (8) and wherein if not, the process proceeds to step (9); 8) reading said error bit from said line status register by said microprocessor; and 9) process end.