Patent ID: 8916417

Claim:
A method of manufacturing a semiconductor device, comprising: after stacking m wafers (where m is a number of two or more) in each of which a plurality of semiconductor chips are formed, dicing the m wafers to semiconductor chips to form first chip stacks each having m of the semiconductor chips stacked; after stacking n of the wafers (where n is a number of two or more), performing dicing of the n wafers on the basis of the semiconductor chips to form second chip stacks each having n of the semiconductor chips stacked; sorting the first chip stacks according to the number of defective semiconductor chips included in each of the first chip stacks; sorting the second chip stacks according to the number of defective semiconductor chips included in each of the second chip stacks; and combining the first chip stacks and/or the second chip stacks after sorting to form a third chip stack according to the number of total number of defective semiconductor chips included in first chip stacks or second chip stacks that are to be combined, wherein the third chip stack is combined by selecting semiconductor chips from the first chip stacks and/or the second chip stacks such that a number of non-defective semiconductor chips included in the third chip stack is p, p being an integer that meets m<p and n<p.