Patent ID: 8494293

Claim:
An image processor comprising: a transform unit configured to perform predetermined transform on a plurality of pixel data pieces of a predetermined pixel block in an image to generate frequency data of direct-current component, frequency data of low-frequency component, and frequency data of high-frequency component; an encoding unit; and a memory, the encoding unit including a direct-current processing unit configured to sequentially perform predetermined encoding on frequency data of direct-current component of each of a plurality of pixel blocks in the image to generate a direct-current stream including a plurality of frequency data pieces of direct-current component of the image; a low-frequency processing unit configured to sequentially perform predetermined encoding on frequency data of low-frequency component of each of the plurality of pixel blocks in the image to generate a low-frequency stream including a plurality of frequency data pieces of low-frequency component of the image; a high-frequency processing unit configured to sequentially perform predetermined encoding on frequency data of high-frequency component of each of the plurality of pixel blocks in the image to generate an upper high-frequency stream including a plurality of upper data pieces in a digit range to the upper side of a predetermined position of a plurality of frequency data pieces of high-frequency component of the image and a lower high-frequency stream including a plurality of lower data pieces in a digit range to the lower side of the predetermined position of the plurality of frequency data pieces of high-frequency component of the image; and an output unit having a plurality of output ports to output the direct-current stream, the low-frequency stream, the upper high-frequency stream, and the lower high-frequency stream to the memory.