Patent ID: 6985830

Claim:
A method of calculating a probability of failures (KR) caused only by defects in blocks in a wafer chip comprising: inspecting said blocks to detect defects in said blocks and in blocks located around said inspected blocks; measuring the number of said inspected blocks having failures caused by a reason other than said defects in said inspected blocks located around said inspected blocks having said defects (n 1 ); measuring the number of said inspected blocks having no failures in said inspected blocks located around said inspected blocks having said defects (n 2 ); measuring the number of inspected blocks having failures caused by said defects in said inspected blocks having said defects (n 3 ); measuring the number of inspected blocks having no failures in said inspected blocks having said defects (n 4 ); and substituting data (n 1 ) through (n 4 ) in formula 1a KR = 1 - 1 - KR 1 1 - KR 0 ; ⁢ ⁢ wherein ⁢ ⁢ KR 0 = n1 n1 + n2 ⁢ ⁢ and ⁢ ⁢ KR 1 = n3 n3 + n4 . ( 1 ⁢ a )