Patent ID: 6881678

Claim:
A method for forming a dual damascene structure in a semiconductor device, the method comprising the steps of: providing a substrate having a structure thereon; forming an insulating layer and an etch stop layer on the substrate sequentially; forming a first opening pattern for exposing a part of an upper surface of the etch stop layer by using a photolithography process; etching the etch stop layer by transferring the first opening pattern into the etch stop layer; forming a first opening by etching the insulating layer down to a predetermined depth by transferring the first opening pattern into the insulating layer; performing a pull back etching of an upper and side surface of the etch stop layer by a predetermined thickness for defining a second opening pattern; and forming a second opening and a third opening in the insulating layer by etching the etch stop layer and the insulating layer until the etch stop layer is removed, wherein the second opening and the third opening are etched by using the second opening pattern and the first opening as a mask, respectively.