Patent ID: 7477495

Claim:
An integrated circuit comprising: first and second power supply voltage terminals; a voltage controlled oscillator having a first node coupled to the first power supply voltage terminal, a second node, and first and second oscillator output terminals, at least one of the first and second oscillator output terminals coupled to a common pin; and a deep N-well field-effect transistor (FET) having a first terminal coupled to the second node of the voltage controlled oscillator, a second terminal coupled to the second power supply voltage terminal, and a control electrode to receive a power on input signal, a deep N-well of the deep N-well FET is coupled to the first power supply voltage terminal and a P-channel of the deep N-well is coupled to the second power supply voltage terminal, thereby forming a high impedance electrostatic discharge (ESD) path between the common pin and the first and the second power supply voltage terminals through the deep N-well.