Patent ID: 7405599

Claim:
A magnetic transistor circuit with OR, NOR, NAND and AND functions, comprising: a first magnetic transistor having a first magnetic section and a second magnetic section, wherein the first magnetic section couples to a high voltage end, and the second magnetic section couples to an output end; a second magnetic transistor having a third magnetic section and a fourth magnetic section, wherein the fourth magnetic section couples to the second magnetic section of the first magnetic transistor and the output end; a third magnetic transistor having a fifth magnetic section and a sixth magnetic section, wherein the fifth magnetic section couples to a low voltage end, and the sixth magnetic section couples to the third magnetic section of the second magnetic transistor; a fourth magnetic transistor having a seventh magnetic section and a eighth magnetic section, wherein the seventh magnetic section couples to the high voltage end, and the eighth magnetic section couples to the second magnetic section of the first magnetic transistor, the fourth magnetic section of the second magnetic transistor and the output end; and a routing line coupling to the output end and having a current going through in a first current direction or a second current direction, wherein the first current direction and the second current direction are opposite to represent the data ‘1’ and the data ‘0’ respectively.