Patent ID: 8106871

Claim:
A liquid crystal display comprising: a liquid crystal panel comprising a plurality of thin film transistors; a timing control circuit configured for generating a plurality of timing signals; a common voltage generating circuit configured for generating a common voltage according to the timing signals; a gate driving circuit configured for receiving a switch-on voltage and a switch-off voltage, and generating a plurality of scanning signals based on the switch-on voltage and the switch-off voltage; and a gamma circuit configured for generating a plurality of gray-scale voltages according to the timing signals; wherein during a time period after the liquid crystal display is powered on and before the liquid crystal display works normally, the common voltage is applied to the liquid crystal panel and reaches a predetermined value before the gray-scale voltages are applied to the liquid crystal panel, the switch-on voltage and the switch-off voltage both applied to the gate driving circuit in a time period after the common voltage reaches the predetermined value and before the gray-scale voltages are applied to the liquid crystal panel, and maintaining both of the switch-on and switch-off voltages to the gate driving circuit during a time period that the gray-scale voltages are applied to the liquid crystal panel, and the switch-off voltage is provided to the gate driving circuit before the switch-on voltage; and when the liquid crystal display is powered off, the common voltage and the gray-scale voltages drop to 0V simultaneously by control of the common voltage generating circuit and the gamma circuit with all the thin film transistors switched on.