Patent ID: 6838925

Claim:
A three-level inverter apparatus comprising: a first voltage node coupled to a neutral DC voltage source via a first diode oriented to prevent under-voltage of said first voltage node; a second voltage node coupled to the neutral DC voltage source via a second diode oriented to prevent over-voltage of said second voltage node; an AC output node; a first bipolar transistor, having a first collector coupled to said first voltage node and a first emitter coupled to said AC output node, wherein said first emitter and said first collector is bridged by a third diode in a direction that allows said third diode to conduct reverse currents; a second bipolar transistor, having a second collector coupled to said AC output node and a second emitter coupled to said second voltage node, wherein said second emitter and said second collector is bridged by a fourth diode in a direction that allows said fourth diode to conduct reverse currents; a first field effect transistor, having a first drain coupled to a positive DC voltage source and a first source coupled to said first voltage node; and a second field effect transistor, having a second drain coupled to said second voltage node and a first source coupled to a negative DC voltage source.