Patent ID: 8541885

Claim:
A semiconductor device, comprising: a P-channel transistor having a drain region and a source region; a N-channel transistor having a drain region and a source region; an interlayer dielectric material covering said P-channel and said N-channel transistors; a first contact structure connecting to said drain region and source region of the P-channel transistor and comprising contact elements extending through said interlayer dielectric material, said first contact structure designed according to a first layout defined by lateral target dimensions of the contact elements and target distances between the contact elements; and a second contact structure connecting to said drain region and said source region of the N-channel transistor and comprising contact elements extending through said interlayer dielectric material, said second contact structure designed according to a second layout defined by lateral target dimensions of the contact elements and target distances between the contact elements, said second layout differing from said first layout, wherein a minimum target distance of the second layout is less than a minimum target distance of the first layout.