Patent ID: 8627251

Claim:
A method of automatically detecting failure patterns for a semiconductor wafer process, comprising: receiving a test data set collected from testing a plurality of semiconductor wafers; forming a respective wafer map for each of the wafers based on the collected test data set; determining whether each respective wafer map comprises one or more respective objects; selecting the wafer maps that are determined to comprise one or more respective objects; selecting one or more object indices for selecting a respective object in each respective selected wafer map; determining a plurality of object index values in each respective selected wafer map using each of the respective selected one or more object indices; selecting an object in each respective selected wafer map based on the determined plurality of object index values; determining a respective feature in each of the respective selected wafer maps using the respective selected object in each respective selected wafer map, the determined plurality of object index values for the respective selected object, and stored feature information; classifying a respective pattern for each of the respective selected wafer maps using the respective determined feature and stored pattern information for a plurality of stored patterns; forming a respective wafer fingerprint for each of the respective selected wafer maps using the respective classified pattern and the stored pattern information; using the respective wafer fingerprints to adjust one or more parameters of the semiconductor fabrication process; and fabricating a plurality of semiconductor wafers using the adjusted one or more parameters of the semiconductor fabrication process.