Patent ID: 8624662

Claim:
An electronic component, comprising: a depletion-mode transistor; an enhancement-mode transistor; and a single package enclosing both the depletion-mode transistor and the enhancement-mode transistor, wherein a source electrode of the depletion-mode transistor is electrically connected to a drain electrode of the enhancement-mode transistor, a drain electrode of the depletion-mode transistor is electrically connected to a drain lead of the single package, a gate electrode of the enhancement-mode transistor is electrically connected to a gate lead of the single package, a gate electrode of the depletion-mode transistor is electrically connected to an additional lead of the single package, a source electrode of the enhancement-mode transistor is electrically connected to a conductive structural portion of the single package, and the gate electrode of the depletion-mode transistor is not electrically connected to any electrodes of any transistors enclosed in the single package.