Patent ID: 7566645

Claim:
A method for fabricating a semiconductor device, the method comprising: forming a device isolation structure in a semiconductor substrate to define an active region; forming a bulb type recess on the semiconductor substrate within the active region; forming a gate insulating film over the semiconductor substrate and on a surface of the bulb type recess; forming a first polysilicon layer over the gate insulating film; forming a silicon-on-dielectric (“SOD”) barrier film over the first polysilicon layer at a lower part of the bulb type recess; forming a second polysilicon layer over the semiconductor substrate and filling the bulb type recess; injecting impurity ions into the second polysilicon layer; performing an annealing process on the semiconductor substrate; and forming and patterning a metal layer and a gate hard mask layer on the second polysilicon layer to form a gate including a stacked structure having a gate hard mask pattern, the metal layer, the second polysilicon layer, the SOD barrier film, and the first polysilicon layer.