Patent ID: 7843246

Claim:
A circuit operable to receive an input signal and to provide a driving voltage, based on the input signal, to an external FET having a gate, a drain and a source, said circuit comprising: a driving portion operable to receive the input signal, said driving portion comprising a positive current source, a negative current source, a first current mirror associated with said positive current source and a second current mirror associated with said negative current source, said positive current source being operable to provide a positive voltage to the gate of the external FET via said first current mirror, said negative current source being operable to provide a first voltage to the gate of the external FET via said second current mirror; an inductive load portion; a drain-to-gate clamp portion; and a current feedback portion comprising a third current mirror and a fourth current mirror, said third current mirror being associated with said negative current source, said fourth current mirror being associated with said positive current source.