Patent ID: 7956391

Claim:
An isolated junction field-effect transistor (JFET) formed in a semiconductor substrate of a first conductivity type, the substrate not comprising an epitaxial layer, the isolated JFET comprising: a floor isolation/bottom gate region of a second conductivity type opposite to the first conductivity type submerged in the substrate; a trench extending from a surface of the substrate into the floor isolation/bottom gate region, the trench comprising a central portion filled with a conductive material and having a dielectric material lining the walls of the trench, a bottom of the trench being embedded in the floor isolation/bottom gate region, the conductive material being in contact with the floor isolation/bottom gate region, the trench and the floor isolation region together forming an isolated pocket of the substrate; a source region at the surface of the substrate in the isolated pocket; a drain region spaced apart from the source region at the surface of the substrate in the isolated pocket; a top gate region at the surface of the substrate between the source region and the drain region; and a channel region extending between the source region and the drain region and located below the top gate region and above the floor isolation/bottom gate region.