Patent ID: 7690109

Claim:
A manufacture method of a multilayer wiring board comprising a core board, and a wiring layer and an electrically insulating layer that are stacked on one surface or both surfaces of said core board, said manufacture method comprising: forming through holes in a core member used for said core board, said core member having a thermal expansion coefficient in XY directions that falls within a range of 2 to 20 ppm, and selected from silicon, ceramics, glass, and a glass-epoxy composite; masking, after forming said through holes, both surfaces of said core member other than said through holes and land forming regions using resists; filling, after the masking, a conductive material into said through holes and said land forming regions, then polishing both surfaces of said core member, and then peeling off said resists to form said core board; forming an electrically insulating layer at predetermined portions of said core board after the filling, polishing, and peeling off; and forming wiring layers on one surface or both surfaces of said core board via said electrically insulating layer after the forming the electrically insulating layer.