Patent ID: 7119013

Claim:
A method for fabricating a semiconductor device, comprising the steps of: forming a plurality of conductive structures on a substrate provided with a cell region and a peripheral region; forming an etch stop layer on the conductive structures; forming an inter-layer insulation layer on the etch stop layer; planarizing the inter-layer insulation layer and the etch stop layer by removing the inter-layer insulation layer and the etch stop layer until the conductive structures are exposed; forming a nitride layer for forming a hard mask on the planarized conductive structures and the inter-layer insulation layer; forming an anti-reflective coating layer on the nitride layer; forming a photoresist pattern on the anti-reflective coating layer through a photolithography process by using a light source of ArF; selectively etching the anti-reflective coating layer and the nitride layer with use of the photoresist pattern as an etch mask to thereby form the hard mask; removing the photoresist pattern and the anti-reflective coating layer; etching the inter-layer insulation layer disposed between conductive structures with use of the hard mask as an etch mask to thereby form at least one contact hole exposing the etch stop layer; removing the exposed etch stop layer, thereby exposing a portion of the substrate; and cleaning inside the at least one contact hole.