Patent ID: 8037379

Claim:
A computer implemented method for predicting an impact on post-repair yield, the method comprising: receiving bit data representing locations of defective memory cells for a plurality of memory devices; modifying the bit data, wherein said modifying the bit data comprises removing a plurality of instances of a failure pattern of a selected failure pattern type according to a modification scheme to generate modified bit data; simulating repairs on hypothetical memory devices corresponding to the modified bit data, wherein each repair generates a result indicating whether the hypothetical memory device is one of functional and non-functional after the simulated repair; identifying a post-repair yield resulting from the modifying, wherein the post-repair yield is a number of functional memory devices after the repair; identifying whether ones of the hypothetical memory devices that are indicated as non-functional can be converted into partially-functional memory in which one or more sectors are switched off; and generating a report indicating the post-repair yield, wheerin the post-repair yield represents a number of the plurality of memory devices that would be functional after repair had the plurality of memory devices been manufactured without the instances of the failure pattern, and wherein the report further indicates a post-repair number of partially-functional memories.