Patent ID: 8023299

Claim:
A content addressable memory (CAM) device, comprising: an array having a number of CAM rows, each row including a plurality of CAM cells coupled to a match line, wherein each CAM cell includes a spin-torque transfer (STT) storage cell for storing a data bit; and a priority encoder having inputs coupled to the match lines and having an output to generate an index of the matching row that has the highest priority, wherein each STT storage cell comprises: a first magnetic tunnel junction (MTJ) element coupled between a first input node and an output node of the STT storage cell; a second MTJ element coupled between a second input node and the output node of the STT storage cell, wherein the first and second input nodes are different; and a first match transistor connected between the match line and ground potential and having a gate directly connected to the output node, wherein the output node is directly connected to both the first and second MTJ elements.