Patent ID: 8219865

Claim:
A modulator comprising: an encoding section that executes error correction encoding processing on transmission data comprising a plurality of bits to form a plurality of error correction encoding data each comprising a plurality of bits; an interleaving section that interleaves bits belonging to the plurality of the error correction encoding data such that one symbol is composed by collecting bits belonging to any of the plurality of error correction encoding data; and a modulation section that outputs a baseband signal that corresponds to the symbol, from the interleaved error correction encoding data, wherein: any two bits arbitrarily extracted from a plurality of bits forming the symbol belong to different error correction encoding data; the interleaving section is configured to receive, as an input, one sequence of data comprising the plurality of error correction encoding data and interleave bits included in the one sequence of data, and interleaves a plurality of bits forming at least one error correction encoding data such that the plurality of bits forming at least one error correction encoding data are assigned to all of bit numbers belonging to the symbol, wherein the bit numbers specify a signal point arrangement of the symbol; and a number of bits forming one error correction encoding data and a number of symbols to be used for transmitting the one error correction encoding data are the same.