Patent ID: 8524487

Claim:
A device comprising: an array of pixels, at least some pixels in the array of pixels comprising: a chemically-sensitive field-effect transistor including a source terminal and a drain terminal, and a floating gate coupled to a passivation layer; and a cascode transistor including a source terminal, a drain terminal and a gate terminal, wherein the source terminal of the cascode transistor is directly connected to the drain terminal of the chemically-sensitive field-effect transistor; and a plurality of column lines and a plurality of row lines coupled to pixels in the array of pixels, wherein each column line in the plurality of column lines is directly connected to drain terminals of cascode transistors of a corresponding first plurality of pixels in the array, and wherein each row line in the plurality of row lines is directly connected to the source terminals of chemically-sensitive field-effect transistors of a corresponding second plurality of pixels in the array.