Patent ID: 7323778

Claim:
A semiconductor device comprising: a semiconductor chip having a first main surface on which a plurality of electrode pads are provided, a second main surface which opposes said first main surface, and a plurality of side surfaces positioned between said first main surface and said second main surface; an extension portion formed in contact with said side surfaces of said semiconductor chip so as to surround said semiconductor chip; an insulating film formed on a surface of said extension portion and said first main surface such that a part of each of said electrode pads is exposed; a plurality of wiring patterns formed on said insulating film so as to be electrically and directly connected to said electrode pads, respectively and extended from said electrode pads to the surface of said insulating film on said extension portion and said first main surface; a plurality of electrode posts formed on said wiring patterns so as to be electrically and directly connected therewith; a sealing portion formed on said wiring patterns and said insulating film such that the top surface of said electrode posts is exposed; and a plurality of external terminals provided on the top surface of said electrode posts in a region including the upper side of said extension portion; wherein the electrode pads are arranged in a first line extending in a first direction along a peripheral edge of the semiconductor chip on the first main surface, and the external terminals are arranged in a second line extending in a second direction perpendicular to said first direction, and are electrically connected to the electrode pads in a one-on-one connection relationship.