Patent ID: 8471842

Claim:
A liquid crystal display (LCD) device having a first substrate and a second substrate with liquid crystal sealed therebetween, comprising: a plurality of gate lines and data lines crossing each other on the first substrate; a gate driving section for driving the gate lines; a source driving section for precharging all the data lines with a first precharging voltage by applying the first precharging voltage to the all the data lines for a first precharging time and supplying video signals to the data lines for a time applying the video signals, wherein the video signals include negative and positive video signals; and a precharge circuit section for further precharging adjacent data lines with different voltages by applying second and third precharging voltages to the adjacent data lines, respectively, for a second precharging time between the first precharging time and the time applying the video signals, wherein, in the first precharging time, the source driving section shorts all the data lines together and applying the first precharging voltage to all the data lines, wherein the first precharging voltage is an intermediate voltage between the negative and positive video signals, wherein, in the second precharging time after the first precharging time, the precharge circuit section applies the second precharging voltage lower than the first precharging voltage and a third precharging voltage higher than the first precharging voltage to the adjacent data lines among all the data lines, which were precharged with the first precharging voltage in the first precharging time, wherein, in the time applying the video signals, the source driving section applies the negative and positive video signals to the adjacent data lines, respectively, precharged with the second and third precharging voltages, respectively, wherein all the data lines are divided to a plurality of data line sets, and the source driving section includes a plurality of video signal lines which are respectively connected with the plurality of data line sets via a plurality of switching transistors, and wherein the plurality of video signal lines are shorted to one another and the plurality of switching transistors are concurrently activated, so that all the data lines are shorted to one another.