Patent ID: 7881756

Claim:
A level shifter comprising: a level shifting circuit configured to generate an output signal by changing a voltage level of an input signal received from a function block; a current suppression circuit configured to deactivate the level shifting circuit in response to a mode selection signal; and an output control circuit configured to control the output signal from the level shifting circuit to have a first direct current (DC) voltage level, wherein the level shifting circuit includes, a latching circuit configured to receive, latch and output the input signal, and a level shifting unit configured to change the voltage level of the output signal of the latching circuit and output the changed signal as the output signal, and the current suppression circuit includes, a first current suppression unit configured to suppress current flowing to the latching circuit in response to the mode selection signal, and a second current suppression unit configured to suppress current flowing to the level shifting circuit in response to the mode selection signal.