Patent ID: 8110450

Claim:
A method of configuring a self-aligning thin film transistor comprising: forming a gate contact area with a state-switchable material that is initially non-conductive; forming a gate dielectric which isolates the gate contact area; forming a source-drain layer, including a source contact and a drain contact with a source-drain layer material; exposing a portion of the gate contact area to a form of energy, wherein the energy transforms a portion of the state-switchable material which corresponds to the exposed portion of the gate contact area, turning the exposed portion of the state-switchable material from non-conductive to conductive and the exposed portion of the gate contact area to a gate contact, wherein at least some of the state-switchable material is covered by the drain contact and the source contact, and the drain contact and the source contact block the energy from reaching the portion of the state-switchable material located under the drain contact and the source contact, maintaining at least a portion of the state-switchable material as non-conductive; and forming a semi-conductor layer of a semiconductor material between the source contact and the drain contact.