Patent ID: 7642593

Claim:
A nonvolatile memory device, comprising: an active region defined in a semiconductor substrate, the active region having a trench; a control gate electrode crossing over the active region and defining an opening, wherein a gate insulating layer is interposed between the control gate electrode and the active region, and the opening penetrates the control gate electrode and is self-aligned to the trench; a tunnel insulating layer formed along an inner surface of the trench and the opening; a floating gate completely filling the trench and the opening to penetrate the control gate electrode; and a source region and a drain region formed in the active region at both sides of the control gate electrode, wherein one of the source region and the drain region laterally extends to a surface of the semiconductor substrate where the tunnel insulating layer is formed, and wherein a width of the control gate electrode directed toward one of the source region and the drain region from the floating gate is greater than a width of the control gate electrode directed toward the other one of the source region and the drain region.