Patent ID: 7923712

Claim:
A phase change memory cell comprising: a first dielectric layer having an upper region with a central upper surface which is flat and a recessed region of said first dielectric layer surrounding said upper region, with said recessed region having a recessed surface lower than said central upper surface; said first dielectric layer including a via conductor extending therethrough having an upper surface coplanar with said central upper surface; a trilayer stack including said upper region of said first dielectric layer, a lower electrode which is a planar, flat, thin film formed on said central upper surface, and an insulating cap of dielectric material formed on said lower electrode; said upper region, said lower electrode and said insulating cap having aligned vertical sidewalls extending from a top surface of said insulating cap down to said recessed surface of said recessed region surrounding said trilayer stack; said recessed region extending aside from said trilayer stack and said upper region, aside from said via conductor and aside from said central upper surface; said lower electrode is in contact with a top surface of said via conductor, said lower electrode layer having a periphery; a phase change element formed on said upper surface of said insulating cap on said aligned vertical sidewalls and on said lower recessed surface with said periphery of said lower electrode contacting said phase change element at an angle to an inner surface thereof surrounding said vertical sidewalls of said trilayer stack; and an upper electrode formed over and in electrical contact with said phase change element; wherein said phase change element is electrically connected to at least a portion of said periphery of said lower electrode.