Patent ID: 8633082

Claim:
A method of fabrication of an analog, asymmetric Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) comprising: providing a semiconductor substrate with a dielectric, overlying an active region in a first area of the substrate, forming a first gate for the analog, asymmetrical MOSFET along a first direction in a central position over the active region, wherein the first gate defines a channel thereunder in the substrate comprising a source side and a drain side, forming a second gate over another active region of the substrate for an SRAM cell in a second area of the substrate, the second gate extending perpendicular to the first gate, forming a reduced-HALO doped area on the drain side of the first gate using a dual-directional implant process also used for the SRAM cell for a HALO doped area for the second gate, such that an orientation of a HALO beam for the forming of the reduced-HALO doped area on the drain side of the first gate is in parallel to a longitudinal orientation of the first gate, while the source side of the first gate is covered by a first resist, and forming a HALO doped area on the source side of the first gate using a quad-directional implant process using a mask also used for HALO implants of other digital-logic devices on the substrate, while the drain side of the gate is blocked by a second resist.