Patent ID: 7211876

Claim:
A semiconductor device, comprising: a semiconductor substrate having a first area, a second area disposed adjacent to the first area, and a third area disposed adjacent to the first area on a side opposite to the second area, a first capacitor having a first insulating layer with a first thickness formed in the first area and a first electrode formed on the first insulating layer, said first electrode extending from the first area to the second area, a second capacitor having a second insulating layer with a second thickness different from the first thickness formed in the first area and arranged in parallel to the first insulating layer with a first gap therebetween, and a second electrode formed on the second insulating layer, said second electrode extending from the first area to the third area, a third capacitor having a third insulating layer with the first thickness formed in the first area and arranged in parallel to the second insulating layer with a second gap therebetween, and a third electrode formed on the third insulating layer, said third electrode extending from the first area to the second area, a first wiring layer formed on the second area and electrically connected to the first electrode and the third electrode, and a second wiring layer formed on the third area and electrically connected to the second electrode.