Patent ID: 8829608

Claim:
A semiconductor device, comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type alternately provided on the first semiconductor layer along a first direction that is substantially parallel to a major surface of the first semiconductor layer; a fourth semiconductor layer of the second conductivity type provided on the second semiconductor layer and the third semiconductor layer; a fifth semiconductor layer of the first conductivity type selectively provided on a surface of the fourth semiconductor layer; a plurality of control electrodes spaced from the fifth semiconductor layer, the fourth semiconductor layer, and the second semiconductor layer by an insulating film; a first electrode connected to the first semiconductor layer; a second electrode connected to the fourth semiconductor layer and the fifth semiconductor layer; a sixth semiconductor layer of the first conductivity type provided between the fourth semiconductor layer and the second semiconductor layer, a bottom surface of the sixth semiconductor layer being at level that is higher than a level of a bottom surface of each control electrode, an impurity concentration of the sixth semiconductor layer being higher than an impurity concentration of the second semiconductor layer, and the control electrodes being spaced along the first direction at a pitch that is less than a pitch at which the second semiconductor layer and the third semiconductor layer are alternately provided in the first direction.