Patent ID: 7790562

Claim:
A method for creating NAND flash memory, comprising: creating gate structures of one or more NAND strings, said NAND strings include at least a first NAND string and a second NAND string, said first NAND string and said second NAND string are connected to a common control line; masking source/drain regions of said second NAND string; performing source implantation at a first angular orientation to create source regions for said first NAND string; and performing drain implantation at a second angular orientation, different from said first angular orientation, to create drain regions for said first NAND string; masking source/drain regions of said first NAND string; performing source implantation at said second angular orientation to create source regions for said second NAND string; and performing drain implantation at said first angular orientation to create drain regions for said second NAND string.