Patent ID: 6897706

Claim:
A method of configuring a pair of P-CHANNEL MOSFETS as a high side switch comprising the steps of: connecting a first P-CHANNEL MOSFET intermediate a high side supply rail and a first input to an electrical device; interconnecting a first pull-up resistor between a gate of said first P-CHANNEL MOSFET and said high side supply rail; interconnecting a first capacitor between said first P-CHANNEL MOSFET gate and a first pair of push/pull transistors; and interconnecting a first diode between said first P-CHANNEL MOSFET gate and said high side supply rail; connecting a second P-CHANNEL MOSFET intermediate said high side supply rail and a second input to said electrical device; interconnecting a second pull-up resistor between said second P-CHANNEL MOSFET gate and said high side supply rail; interconnecting a second capacitor between said second P-CHANNEL MOSFET gate and a second pair of push/pull transistors, whereby said first and second capacitors function as level-shifting devices to provide continuous operating voltage to said first and second P-CHANNEL MOSFET's and to protect said first and second P-CHANNEL MOSFET's from over-voltage damage; and interconnecting a second diode between said second P-CHANNEL MOSFET gate and said high side supply rail.