Patent ID: 7439165

Claim:
A method of integrating the formation of a tensile strained silicon layer and of a compressive strained silicon layer on underlying semiconductor alloy bodies, performed after formation of insulator filled, shallow trench isolation (STI) structures, comprising the steps of: providing a single crystalline silicon body; forming said insulator filled, STI structure in a top portion of said single crystalline silicon body; depositing a silicon-germanium (Si 1-x Ge x ) layer; performing a patterning procedure to thin a second portion of said Si 1-x Ge x layer in a region in which said second portion of said Si 1-x Ge x layer overlays a second portion of said single crystalline silicon body, while a first portion of said Si 1-x Ge x layer located overlying a first portion of said single crystalline silicon body remains unetched; performing an oxidation procedure to convert the unetched first portion of said Si 1-x Ge x layer and thinned second portion of said Si 1-x Ge x layer to silicon oxide, converting said first single crystalline silicon body to a first single crystalline Si 1-x Ge x body comprised with a first weight percent of germanium, and converting said second single crystalline silicon body to a second single crystalline Si 1-x Ge x body comprised with a second weight percent of germanium; removing said silicon oxide layer; and selectively forming said tensile strained silicon layer on said first single crystalline Si 1-x Ge x body and forming said compressive strained silicon layer on said second single crystalline Si 1-x Ge x body.