Patent ID: 7885136

Claim:
A semiconductor memory device comprising a memory array of nonvolatile memory cells arranged in rows and columns, said memory cells being sectioned into a plurality of sub-blocks, each of which has a predetermined number of memory cells, each of said memory cells having a control electrode responsive to a voltage on the control electrode to cause a stored content according to a conduction state between a first electrode and a second electrode to output, wherein said memory cells are arranged so that the first electrode of each of said memory cells is connected in series to the second electrode of another of said memory cells which is adjacent to said memory cell, said memory array including: a word line commonly connected to the control electrodes of said memory cells arranged in a row direction; and a plurality of column lines connecting, in a column direction, connection points between the first and second electrodes of the memory cells connected in series, said device comprising: a sense amplifier for detecting either a voltage level on or a current flowing over said column lines to read out the stored content in said memory cells; a first multiplexer for selecting one of said sub-blocks, which includes one of said memory cells which stores data to be read out in one of the rows to connect the selected sub-block to said sense amplifier; a drain selector for selecting first one of said column lines which is connected to one terminal of the memory cell storing the data to be read out; a precharge selector for selecting second one of said column lines which is connected to another terminal of one of said memory cells which is adjacent to the one terminal of the memory cell storing the data to be read out; a second multiplexer for selecting one of said sub-blocks which includes the second column line; and a source selector for selecting third one of said column lines which is connected to the other terminal of the memory cell storing the data to be read out, whereby said second multiplexer and said precharge selector apply a first voltage to the second column line, and said source selector applies a second voltage to the third column line.