Patent ID: 7206871

Claim:
An extending circuit for memory connected to an external FIFO circuit, said extending circuit for memory being operable to extend a memory capacity used for writing input data to said extending circuit for memory to the external FIFO circuit, said extending circuit for memory comprising: an internal FIFO circuit; an output data effective signal generator operable to receive a first status signal output from the external FIFO circuit indicating whether or not the external FIFO circuit can write data therein; and an internal FIFO write enable generator operable to receive the first status signal output from the external FIFO circuit indicating whether or not the external FIFO circuit can write data therein; wherein when the first status signal received by said internal FIFO write enable generator indicates that the external FIFO cannot write data therein, said internal FIFO write enable generator is operable to cause said internal FIFO circuit to perform a writing operation of writing the input data into said internal FIFO circuit; and wherein when the first status signal received by said output data effective signal generator indicates that the external FIFO can write data therein, said output data effective signal generator is operable to output the input data to the external FIFO circuit directly without passing through said internal FIFO circuit, and cause the external FIFO circuit to perform a writing operation of writing the input data into the external FIFO circuit.