Patent ID: 8563201

Claim:
A mask having scribe lanes containing monitoring areas and chip areas separated by the scribe lanes, the mask comprising: at least one primary pattern having at least one associated assist feature disposed in a monitoring area, the associated assist feature comprising at least two parallel scattering bars, wherein regions in the monitoring area other than the at least one primary pattern and the at least one associated assist feature are covered with a phase shift layer having a transmittance smaller than a transmittance of the at least one primary pattern and the at least one associated assist feature, and wherein sizes and relative positions of the at least one primary pattern and the at least one associated assist feature are designed such that when the mask without contamination is exposed to a light source, the at least one associated assist feature is not transferred onto a wafer but cooperates with the at least one primary pattern to generate a primary transferred pattern on the wafer corresponding to the at least one primary pattern.