Patent ID: 8211779

Claim:
A method for forming an isolation structure in a semiconductor device, the method comprising: forming a trench in a semiconductor substrate; forming a liner nitride layer over an exposed surface of the trench; forming a liner oxide layer on the liner nitride layer; forming a flowable insulation layer over the trench by applying a compound including a solvent and a solute to completely fill the trench; etching the flowable insulation layer and the liner oxide layer to partially open the trench and expose an upper portion of the liner nitride layer in the trench so that portions of the etched liner oxide layer remain to form rough portions on a sidewall of the liner nitride layer in the trench; forming a buffer layer on the etched flowable insulation layer and on the exposed upper portion of the liner nitride layer including the rough portions; etching the buffer layer to remove the buffer layer and the rough portions from the sidewall of the trench so that a portion of the buffer layer and a corresponding portion of the rough portions remains over the flowable insulation layer and a portion of the liner nitride layer remains on the sidewall of the trench; and depositing a buried insulation layer on the remaining portion of the buffer layer and on the remaining portion of the liner nitride layer in the trench to form an isolation structure.