Patent ID: 7839221

Claim:
Phase locked loop comprising: a phase frequency detector coupled with a time to digital converter capable of comparing a reference signal with an oscillator signal and of generating a digital value representing the phase difference between the reference signal and the oscillator signal; a state machine for phase acquisition capable of generating a control value depending on the digital value; and a controllable oscillator capable of generating the oscillator signal depending on the control value; a further state machine for performing a frequency acquisition, the state machine for frequency acquisition configured to perform the steps comprising: if at a determined point of time a direction signal, indicating whether the oscillator signal leads or lags the reference signal, is still unchanged, the control value is updated taking a correction step size into account; and if at the determined point of time the direction signal has changed, a new correction step size is calculated, and the control value is updated taking the new correction step size into account; and a flip-flop coupled to the phase frequency detector for generating the direction signal.