Patent ID: 8278732

Claim:
An antifuse element for an integrated circuit device, comprising: a conductive region formed in a semiconductor substrate, extending along a first direction; a dielectric layer formed on a portion of the conductive region; a first conductive plug formed on the dielectric layer; a second conductive plug formed on another portion of the conductive region; a first conductive member formed over the first conductive plug, extending along a second direction perpendicular to the first direction; and a second conductive member formed over the second conductive plug extending along the second direction, wherein the first conductive member intersects with the conductive region, having a first overlapping area therebetween, and the dielectric layer and the conductive region have a second overlapping area therebetween, and a ratio between the first overlapping area and the second overlapping area is about 1.5:1 to 3:1.