Patent ID: 7176137

Claim:
A method of forming multiple gate sidewall spacer widths comprising the steps of: providing a first set of gate structures formed overlying a substrate; blanket depositing a first dielectric layer over the first set of gate structures; blanket depositing a second dielectric layer over the first dielectric layer; etching through a thickness of the first and second dielectric layers to expose the first dielectric layer, said first dielectric layer forming a first sidewall spacer width; blanket depositing a photoresist layer to selectively expose a second set of gate structures including said first dielectric layer; then isotropically etching the second set including said first dielectric layer to form said second set having a second sidewall spacer width; removing the photoresist layer; and, selectively etching away the second dielectric layer to form said gate structures comprising at least two sets of gate structures, each set having a different associated sidewall spacer width.