Patent ID: 7239182

Claim:
A predriver circuit connected to a top gate of a high-side MOS transistor of a drive circuit, wherein the drive circuit is connected between a first voltage (VM) and a ground voltage, the predriver circuit comprising: a current mirror circuit having a first PMOS transistor and a second PMOS transistor, wherein a drain of the second PMOS transistor is connected to the top gate of the high-side MOS transistor of the drive circuit, and the sources of the first and second PMOS transistors are connected to a second voltage (VGH); a self-bias circuit including first and second series connected resistors, wherein a first terminal of the first resistor is connected to a drain of the first PMOS transistor, and a connection point between the first and second resistors is connected to the gates of the first and second PMOS transistors; a level shifter circuit including a third transistor and a third resistor, wherein a drain of the third transistor is connected to a terminal of the second resistor, a source of the third transistor is connected to the ground voltage, and a gate of the third transistor is connected to a first input terminal, by way of the third resistor, for receiving a first digital input signal; and a discharge transistor having a drain connected to the drain of the second PMOS transistor, a source connected to the ground voltage, and a gate connected to a second input terminal for receiving a second digital input signal, wherein the discharge transistor comprises a NMOS transistor; and wherein the voltage at the top gate varies from about 0.1V to about 25V.