Patent ID: 7656033

Claim:
A semiconductor device using lead technology comprising: a semiconductor chip including: a plurality of MOS transistors connected in parallel; a common gate electrode of the MOS transistors, the common gate electrode being disposed on a top side of the semiconductor chip and comprising a pedestal-type gate flip-chip contact with a multilayer construction; a plurality of source electrodes of the MOS transistors and a single, common pedestal-type source flip-chip contact with a multilayer construction, the source electrodes being disposed on the top side of the semiconductor chip and being connected in parallel by the single, common pedestal-type source flip-chip contact, wherein a pedestal height of the source flip-chip contact is substantially identical to a pedestal height of the gate flip-chip contact; and a large-area rear side electrode adapted to an area of a rear side of the semiconductor chip; a housing; a plurality of top side external leads that protrude from the housing; and a plurality of top side internal leads within the housing and electrically connected to the top side external leads, wherein the gate and source flip-chip contacts are cohesively connected to the top side internal leads.