Patent ID: 8639952

Claim:
A system for setting and controlling the power level and operating frequency of a programmable logic device, comprising: a programmable logic device having a plurality of reconfigurable digital circuits and operable to provide a plurality of voltage identification (VID) codes corresponding to a plurality of power levels and operating frequencies at which said programmable logic device can be set to operate, wherein said programmable logic device includes a performance monitor circuit operable to determine performance of said programmable logic device in accordance of a supply voltage and a body bias voltage; and a voltage regulator module operable to generate a supply voltage and a body bias voltage, based on one or more of said plurality of VID codes, and provide the generated said supply voltage and said body bias voltage to a supply input and a body bias input of said programmable logic device, wherein said performance monitor circuit is operable to determine supply and body bias voltage values to be applied to the programmable logic device in order to operate the programmable logic device at a particular clock frequency, said determined supply and body bias voltage values corresponding to one or more VID codes of said plurality of VID codes, and wherein said programmable logic device comprises a field programmable gate array (FPGA).