Patent ID: 7696100

Claim:
A manufacturing method of a semiconductor device comprising: forming a gate insulating film over a semiconductor film; forming a conductive film over the gate insulating film; forming a resist over the conductive film; pressing a mold having a pattern to the resist; hardening the resist so that the resist has a first portion having a first thickness and a second portion having a second thickness, the second thickness being larger than the first thickness; ashing the surface of the resist having the pattern to expose a part of the conductive film; etching the conductive film to form a gate electrode by using the resist after ashing as a mask so that the gate electrode has a first portion and a second portion thicker than the first portion of the gate electrode; removing the resist after etching the conductive film; adding a first impurity to the semiconductor film by using the gate electrode having the first portion and the second portion as a mask; and adding a second impurity to the semiconductor film by using the second portion of the gate electrode as a mask to form a channel formation region, a source region or a drain region, and a lightly doped drain region between the channel formation region and the source region or the drain region, wherein an acceleration voltage in the step of adding the second impurity is higher than an acceleration voltage in the step of adding the first impurity.