Patent ID: 8421536

Claim:
An apparatus comprising: a first amplification stage having a first input, a second input, a first output and a second output, the first amplification stage comprising: a first transistor of a first polarity, wherein the first transistor comprises an input electrically connected to the first input; a second transistor of the first polarity, wherein the second transistor comprises an input electrically connected to the second input, and wherein the first and second transistors are configured to operate as a differential pair; a third transistor of the first polarity, the third transistor comprising a channel disposed in a signal path between an output of the first transistor and the second output; a fourth transistor of a second polarity opposite the first polarity, the fourth transistor comprising a channel electrically connected in parallel with the channel of the third transistor and disposed in a signal path between the output of the first transistor and the second output; a fifth transistor of the first polarity, the fifth transistor comprising a channel disposed in a signal path between an output of the second transistor and the first output; a sixth transistor of the second polarity, the sixth transistor comprising a channel electrically connected in parallel with the channel of the fifth transistor and disposed in a signal path between the output of the second transistor and the first output.