Patent ID: 8499272

Claim:
A semiconductor device comprising: a circuit unit including: a first circuit cell array extending in a first direction; a second circuit cell array extending in the first direction substantially in parallel to the first circuit cell array; first and second power supply lines each extending in the first direction and arranged over the first circuit cell array, the first power supply line being supplied with a first power source voltage; a third power supply line extending in the first direction separately from the second power supply line, arranged over the second circuit cell array without hanging over the first circuit cell array, and supplied with a second power source voltage; a first transistor coupled between the second power supply line and the third power supply line; and a first circuit arranged in the first circuit cell array and including a first power supply node coupled to the first power supply line and a second power supply node coupled to the second power supply line, wherein the circuit unit is configured to reduce a subthreshold leakage current of the first circuit.