Patent ID: 7504870

Claim:
A power-on reset circuit, comprising: a switch having a switch first contact, a switch second contact, and a switch control contact; a current source coupled between a first potential and the switch first contact; a resistive device having a resistive-device first contact coupled to the first potential and having a resistive-device second contact, wherein the resistive device is an electronic device selected from the group consisting of a resistor, a field effect transistor having its gate coupled to its drain, a metal-insulator-semiconductor field effect transistor having its gate coupled to its drain, or a bipolar transistor having its base coupled to its collector; a first module coupled between a second potential and the switch second contact; a second module coupled between the second potential and the resistive-device second contact, wherein a first current passing through the first module is mirrored by a second current passing through the second module, wherein if the second potential is algebraically greater than the first potential and a first mirrored potential of the second potential present on the switch control contact is algebraically greater than a preselected value or if the second potential is algebraically less than the first potential and the first mirrored potential of the second potential present on the switch control contact is algebraically less than a preselected value: the switch first contact is coupled to the switch second contact, otherwise: the switch first contact is decoupled from the switch second contact, and wherein the current source is configured to provide a constant first current if the second potential is algebraically greater than the first potential and a second mirrored potential of the second potential is algebraically greater than another preselected value or if the second potential is algebraically less than the first potential and the second mirrored potential of the second potential is algebraically less than the another preselected value; and a logic gate having a logic gate input coupled to the resistive-device second contact and having a logic gate output.