Patent ID: 7295198

Claim:
A voltage booster circuit which uses an electric charge stored in a capacitor by a charge-pump operation to generate a boost voltage, the voltage booster circuit comprising: first to Nth transistors (N is an integer greater than one) which are connected in series and used for the charge-pump operation, a first voltage being supplied to one end of the first transistor; and a discharge transistor having one end connected to a node which is connected to (k−1)th and kth transistors among the first to Nth transistors (2≦k≦N, and k is an integer), the first voltage or a second voltage which is higher than the first voltage being supplied to the other end of the discharge transistor, wherein the first to Nth transistors are respectively formed in p-type first to Nth well regions provided in an n-type well region of a p-type semiconductor substrate; wherein a reverse bias voltage for the p-type first to Nth well regions is applied to the n-type well region; wherein each of the p-type first to Nth well regions includes an n-type source region and an n-type drain region; wherein a gate electrode of each of the p-type first to Nth transistors is disposed in a channel region with an insulating film interposed, the channel region being disposed between the n-type source region and the n-type drain region; wherein the first voltage is supplied to the n-type drain region of the p-type first well region, the n-type source region of a p-type (m−1)th well region among the p-type first to Nth well regions (2≦m≦N, and m is an integer) is electrically connected to the n-type drain region of the p-type mth well region, and a voltage of the n-type source region of the p-type Nth well region is output as the boost voltage; wherein, when a normal operation is performed, the kth to Nth transistors are made conductive, the discharge transistor is made nonconductive and the boost voltage is generated by the charge-pump operation using the first to (k−1)th transistors; and wherein, when a discharge operation is performed, the kth to Nth transistors are made nonconductive, the discharge transistor is made conductive and a current path is formed by first to (k−1)th parasitic bipolar transistor elements, the first to (k−1)th parasitic bipolar transistor elements being respectively formed by one of the p-type first to (k−1)th well regions, the n-type drain region of one of the p-type first to (k−1)th well regions, and the n-type well region.