Patent ID: 7317248

Claim:
An apparatus, comprising a printed circuit board; one or more memory chips which are arranged in a first region of the printed circuit board and are connected with the printed circuit board; a buffer chip configured to drive the one or more memory chips and communicate with a system that is external to the apparatus, wherein the buffer chip is arranged in a second region of the printed circuit board and wherein the buffer chip is connected to the printed circuit board; and an intermediate region located between the first region and the second region, wherein: the intermediate region has a lower thermal conductivity than the first and second regions of the printed circuit board; and the intermediate region comprises: a plurality of unplated holes; a plurality of webs connecting the first region with the second region, located between the plurality of unplated holes, such that conductor tracks on the plurality of webs connect the buffer chip with at least one of the one or more memory chips.