Patent ID: 7786509

Claim:
A field-effect transistor, comprising: a substrate; an electron transport layer and an electron supply layer formed sequentially on the substrate, wherein the electron transport layer and the electron supply layer comprise a nitride semiconductor; a gate electrode, a source electrode and a drain electrode formed on the electron supply layer; and two overlapping high impurity concentration regions located in a depth direction directly below the source electrode and the drain electrode, respectively, the two high impurity concentration regions being formed to sandwich a two-dimensional electron gas layer formed between the electron transport layer and the electron supply layer, wherein the two high impurity concentration regions comprising a first high concentration region formed in the electron supply layer and a second high concentration region formed in the electron transport layer, wherein the first high concentration region comprises a peak carrier concentration of 1×10 18 to 10 20 cm −3 , wherein the second high concentration region comprises a peak carrier concentration of 1×10 18 to 10 19 cm −3 , wherein the first and second high concentration regions each comprise a higher impurity concentration than the electron transport layer and the electron supply layer located directly below the gate electrode, and the electron supply layer comprises a substantially flat surface between the source electrode and the gate electrode and between the drain electrode and the gate electrode.