Patent ID: 7489576

Claim:
A semiconductor storage device comprising: a first and a second cell arrays including a plurality of memory cells to store data; a sense amplifier selectively connected with either one of the first and the second cell arrays; a first precharge circuit to set a pair of bit lines in the first cell array to a predetermined voltage; a second precharge circuit to set a pair of bit lines in the second cell array to a predetermined voltage; a first switch circuit to connect the sense amplifier with the first cell array; a second switch circuit to connect the sense amplifier with the second cell array; and a switch controller to control a conductive state of the first and the second switch circuits, wherein in a non-selection state where the sense amplifier does not access any of the first and the second cell arrays, the switch controller controls one of the first and the second switch circuits into the conductive state according to a previous result of a current inspection in a standby state, and wherein the switch controller includes a non-selection state storage section to store the conductive state of the first and the second switch circuits in the non-selection state according to a result of the current inspection in the standby state.