Patent ID: 6939776

Claim:
A method of fabricating a semiconductor device, comprising the steps of: forming a drain layer of a first conduction type on a surface of a semiconductor substrate of the first conduction type; forming a first insulating film on said drain layer; forming a first conductive layer on said first insulating film; forming a second insulating film on said first conductive layer; patterning said second insulating film, said first conductive layer, and said first insulating film, to form a gate insulating film from said first insulating film, and a gate electrode from said first conductive layer; implanting an impurity of a second conduction type opposite to the first conduction type into a surface of said drain layer using a gate electrode as a mask, thereby forming a channel region of the second conductive type; implanting an impurity of the first conduction type into said channel region using said gate electrode as a mask, thereby forming an impurity region of the first conduction type; forming a third insulating film of one layer so as to cover a surface of the impurity region, said walls of said gate insulating film, said gate electrode, and said second insulating film, and an upper face of said second insulating film; etching back said third insulating film to form a side wall insulator of said third insulating film, by maintaining said third insulating film selectively on side walls of said gate insulating film, said gate electrode, and said second insulating film and at the same time form a recess so as to penetrate the impurity region, thereby forming a source region of the impurity region; and forming a second conductive layer on an entire surface, and patterning said second conductive layer, thereby forming a wiring layer.