Patent ID: 7814468

Claim:
A computer-implemented method for loop reformulation executed by a processor of a computer system, comprising: providing a single exit ill-formed loop (SEIFL), the SEIFL including, a header being defined as a beginning of the SEIFL, an end being defined as an ending of the SEIFL, a loop body being defined as code statements between the header and the end of the SEIFL, wherein the loop body of the SEIFL includes a loop exit statement, the loop exit statement includes a loop exit condition such that the SEIFL will exit from the loop body of the SEIFL when the loop exit condition of the loop exit statement is verified to be true; reformulating the SEIFL into a reformulated code block, wherein the reformulated code block includes a transformed well-formed loop (TWFL) such that the TWFL exits from an end of the TWFL, wherein the reformulation ensures that a loop index computational statement is a last statement of the loop body of the TWFL, wherein the reformulating the SEIFL into a reformulated code block includes, duplicating code statements between the header of the SEIFL and the loop exit statement of the SEIFL; duplicating the loop exit statement of the SEIFL; forming a label to define a header of the TWFL; forming a loop body of the TWFL by duplicating code statements between the loop exit statement of the SEIFL and the end of the SEIFL, then by duplicating code statements between the header of the SEIFL and the loop exit statement of the SEIFL; and forming a conditional loop termination statement to define the end of the TWFL such that TWFL will either continue or terminate a loop operation of the TWFL depending upon a verification result of a loop termination condition contained in the conditional loop termination statement.