Patent ID: 8119511

Claim:
A method for manufacturing a non-volatile memory device, comprising the steps of: providing a substrate comprising a channel between two doped regions; applying a first dielectric on top of the channel, the first dielectric being a tunnel dielectric; applying a charge storage medium on top of the tunnel dielectric; applying a second dielectric on top of the charge storage medium; and applying a control gate on top of the second dielectric, wherein at least a bottom layer of the control gate in contact with the second dielectric comprises a material having a predefined high work-function and showing a tendency to reduce its work-function when in contact with a group of high-k materials after full device fabrication; wherein before applying the control gate, at least a top layer is constructed in the second dielectric for separating the control gate from the rest of the second dielectric, the top layer comprising a predetermined material, chosen outside the group for avoiding a reduction in the work-function of the material of the control gate, wherein at least an upper part of the second dielectric comprises a high-k material of the group, and wherein the top layer is constructed by nitridation of the high-k material.