Patent ID: 8780175

Claim:
A picture signal processor, comprising: circuitry configured to: perform a frame-rate-increasing conversion, which brings an over-double frame rate, on each of a plurality of time-series picture streams including right-eye picture streams and left-eye picture streams having a parallax therebetween, each of the right-eye picture streams and the left-eye picture streams including a plurality of unit pictures, through generating interpolation frames by frame interpolation of the plurality of unit pictures using a motion vector, by performing a first motion vector detection process by block matching using a first luminance signal in a present frame of the plurality of unit pictures, a second luminance signal in a previous frame of the plurality of unit pictures, and a third luminance signal in a following frame of the plurality of unit pictures, wherein the motion vector of each of the present frame, previous frame, and following frame is stored in a non-transitory computer readable storage medium, performing a second motion vector detection process on a next frame of the plurality of unit pictures using as a reference the motion vector of each of the present frame, previous frame, and following frame that is stored in the non-transitory computer readable storage medium, and outputting, from the non-transitory computer readable storage medium, at the over-double frame rate, the interpolation frames and the motion vector; provide frame-rate-converted picture streams to a display, the display being configured to display pictures through performing time-divisional switching of picture streams, including the right-eye picture streams and the left-eye picture streams, from one to another in order; and control a shutter eyeglass device to perform an open/close operation in synchronization with a display switching timing between the frame-rate-converted picture streams of the right-eye picture streams and the left-eye picture streams in the display.