Patent ID: 7943506

Claim:
A semiconductor device production method for producing a semiconductor device in which a first interconnection layer and a second interconnection layer stacked with an intervention of an interlevel insulation film are electrically connected to each other through an interlevel connection opening formed in the interlevel insulation film, the method comprising the steps of: forming the first interconnection layer on a semiconductor substrate; forming the interlevel insulation film to cover the first interconnection layer; forming the interlevel connection opening at a predetermined position in the interlevel insulation film to expose a part of the first interconnection layer at a bottom of the interlevel connection opening, the interlevel connection opening having an inner side wall surface; forming a barrier layer in the interlevel connection opening, the barrier layer having a laminate structure including a first sublayer provided in contact with the first interconnection layer to reduce a contact resistance, a second sublayer provided in contact with the second interconnection layer to improve a bonding strength, and a third sublayer provided between the first sublayer and the second sublayer; and forming the second interconnection layer from gold as an uppermost interconnection layer in contact with the barrier layer on the interlevel insulation film, wherein the first sublayer, the second sublayer and the third sublayer are each formed so as to cover the part of the first interconnection layer at the bottom of the interlevel connection opening, to cover the inner side wall surface of the interlevel connection opening, and to extend over a surface of the interlevel insulation film under the second interconnection layer, and a nitrogen atom density distribution in the second sublayer is such that the nitrogen atom density is lowest at an interface between the first sublayer and the second sublayer and progressively increases toward the third sublayer.