Patent ID: 8659588

Claim:
A display substrate comprising: a base substrate comprising a display area and a peripheral area which surrounds the display area; a pixel disposed on the display area, wherein the pixel comprises: a pixel transistor connected to a gate line and a data line which cross each other; and a pixel electrode connected to the pixel transistor and the pixel electrode; and a gate driving circuit disposed on a portion of the peripheral area which is adjacent to a first terminal of the gate line, wherein the gate driving circuit outputs a gate signal to the gate line, and comprises a plurality of stages, and an n-th stage, wherein ‘n’ is a natural number, of the gate driving circuit comprises: a plurality of circuit transistors, a first transistor of which outputs a first clock signal as an n-th gate signal, and a boosting capacitor comprising a first capacitor and a second capacitor, wherein the boosting capacitor is connected to a control electrode and an output electrode of the first transistor, and the plurality of circuit transistors and the first capacitor are disposed on a first area of the peripheral area, and the second capacitor is disposed on a second area of the peripheral area positioned between the first area and the display area.