Patent ID: 6998298

Claim:
A method of fabricating a thyristor memory, comprising: forming sidewalls in a layer of dielectric over a layer of semiconductor material to define a trench and expose a region of the semiconductor material through the opening of the trench; forming conductive material on at least portions of the dielectric and in the trench; patterning the conductive material to define first and second shoulders extending outwardly from the trench over regions of the dielectric outside the trench; the patterning to comprise forming the first shoulder as an overhang extending laterally outward from the trench over regions of the layer of semiconductor material for the thyristor; etching exposed regions of the layer of dielectric to form an implant mask while using the conductive material with the first and second shoulders as an etch mask; implanting regions of the layer of semiconductor material; and using the implant mask to align placement of dopant during at least a portion of the implanting; in which the implanting comprises: performing a first implant of first conductivity type dopant and penetrating with the dopant of the first conductivity type regions of the layer of semiconductor material beneath an edge of the implant mask to form a base region to the thyristor, with at least a portion thereof beneath the first shoulder; and performing a second implant of second conductivity type dopant aligned with the implant mask and forming an anode/cathode-emitter.