Patent ID: 7615448

Claim:
A method of forming a nonvolatile memory array on a semiconductor substrate, comprising: forming a string of memory cells having floating gates and control gates covered by a dielectric layer, the string extending from a first substrate region to a second substrate region; forming a first opening in the dielectric layer over the first substrate region, the first opening extending to the first substrate region; forming a second opening in the dielectric layer over the second substrate region, the second opening extending to the second substrate region; subsequently forming a first conductive material that contacts the first and second substrate regions, the first conductive material partially but not completely filling the first and second openings, the first conductive material completely fills the first openings to a first level and completely fills the second openings to a second level, the first conductive material is doped polysilicon; subsequently depositing a second conductive material in the first and second openings, the second conductive material directly overlying the first conductive material in the first and second openings, the first conductive material and the second conductive material form a portion of a bit line contact in the first opening and form a source line contact in the second opening, wherein the second conductive material completely fills portions of the first and second openings that are not filled by the first conductive material; and forming a common source line, the source line contact forms an electrical contact between the second substrate region and the common source line.