Patent ID: 6912712

Claim:
A real time control system of a multitasking digital signal processor, comprising: a ready queue comprising: a ready queue link, the ready queue link comprising first information indicating a first task control block for a sequentially first task among tasks in the digital signal processor, and a second task control block for a sequentially last task among the tasks in the digital signal processor, and a first priority link group of first priority links, a number of the first priority links being equal to a number of priority levels of the tasks in the digital signal processor, each of said first priority links having second information indicating a third task control block for a sequentially first task among respective tasks having a same priority as each of said first priority links, among the tasks in the digital signal processor, and a fourth task control block for a sequentially last task among the respective tasks having the same priority as each of said first priority links; and an operating system for setting the first and second information according to conditions of the tasks in the digital signal processor, and controlling switching between tasks of the ready queue.