Patent ID: 7913124

Claim:
Apparatus comprising: a producer circuit operable in a first clock domain adapted to generate data transfer transactions wherein each data transfer transaction comprises a sequence of one or more units of data and wherein each data transfer transaction has associated tag information, wherein the producer circuit is further operable to generate expected tag information for each data transfer transaction before starting each data transfer transaction; a consumer circuit operable in a second clock domain adapted to receive the data transfer transactions; a data first in first out (FIFO) coupled to receive the data transfer transactions and the associated tag information from the producer circuit and coupled to apply the received data transfer transactions to the consumer circuit; and synchronizing logic coupled to the producer circuit and coupled to the consumer circuit and coupled to the data FIFO, wherein the synchronizing logic is adapted to receive the expected tag information from the producer circuit, wherein the synchronizing logic is further adapted to detect an error in a data transfer transaction between the producer circuit and the consumer circuit based on the associated tag information and the expected tag information, and wherein the synchronizing logic is further adapted to generate an error signal indicating detection of said error.