Patent ID: 8227173

Claim:
A method of manufacturing a multi-layer circuit board, the method comprising: preparing an upper substrate and a lower substrate, the upper substrate and the lower substrate each including a carrier layer and a seed layer that are detachably connected to each other; forming first circuit patterns on the seed layer of the upper substrate; forming second circuit patterns on the seed layer of the lower substrate; preparing a core substrate including an insulating material, and third and fourth circuit patterns on respective upper and lower surfaces of the insulating material, the third circuit patterns different from the fourth circuit patterns; facing the seed layers of the upper and lower substrates toward the respective upper and lower surfaces of the insulating material; aligning the first and second circuit patterns respectively with the third and fourth circuit patterns; interposing adhesive members between the core substrate and respective ones of the upper and lower substrates; adhering the upper substrate, the core substrate, and the lower substrate using the adhesive members, the adhering leaving the first and second circuit patterns electrically isolated from the third and fourth circuit patterns; detaching the carrier layers from the seed layers; removing the seed layers to expose the first circuit patterns and the second circuit patterns; and forming a conductive material to electrically connect the first circuit patterns and the second circuit patterns respectively to the third circuit patterns and the fourth circuit patterns after the adhering.