Patent ID: 6989584

Claim:
A semiconductor package device, comprising: an insulative housing with a top surface, a bottom surface, and a peripheral side surface between the top and bottom surfaces, wherein the insulative housing includes a first single-piece housing portion and a second single-piece housing portion; a semiconductor chip within the insulative housing, wherein the chip includes an upper surface and a lower surface, the upper surface includes a conductive pad, the upper surface faces towards the bottom surface and faces away from the top surface, and the insulative housing covers the lower surface; a routing line within the insulative housing, wherein the routing line is within and outside a periphery of the chip and is electrically connected to the pad; a terminal that protrudes downwardly from and extends through the bottom surface and is spaced from the side surface and is electrically connected to the pad; and a lead that protrudes downwardly from and contacts and is not integral with the routing line within the insulative housing, protrudes laterally from and extends through the side surface, is outside the periphery of the chip, does not overlap the terminal and is electrically connected to the pad, wherein the first single-piece housing portion contacts the lead and is spaced from the terminal, the second single-piece housing portion contacts the first single-piece housing portion and the terminal, the terminal and the lead are spaced and separated from one another outside the insulative housing, and the terminal and the lead are electrically connected to one another by the routing line inside the insulative housing and outside the chip.