Patent ID: 7362113

Claim:
A testing apparatus for a wafer of semiconductor dice comprising: a first rigid support member for receiving a plurality of semiconductor dice in wafer form having a predetermined orientation, the first rigid support member having a plurality of contact members thereon, the plurality of contact members including a plurality of contact tips including at least one flat contact area for mating with a bump on the wafer, a raised electrical bump or a resilient finger, and having a plurality of electrical connectors connected to the plurality of contact members for establishing communication with test circuitry; a second support member for selectively engaging the first rigid support member to retain the plurality of semiconductor dice in wafer form therebetween, one of the first rigid support member and the second support member including a single cavity for retaining the plurality of semiconductor dice in wafer form therein during testing; a single biasing assembly including a single floating platform of a preselected area substantially sized for the single cavity, the single biasing assembly mounted to one of the first rigid support member and the second support member, the single biasing assembly sized for uniformly biasing the plurality of semiconductor dice in wafer form against the plurality of contact members.