Patent ID: 7567644

Claim:
A phase-lock loop for fast frequency switching, comprising: a phase comparison circuit comprising a reference input, a feedback input and an output; a controlled oscillator having a first regulating input coupled to the output of the phase comparison circuit, and configured to adjust a frequency of an oscillator signal at an output thereof; a frequency divider coupled between the output of the controlled oscillator and the feedback input and configured to divide down the frequency of the oscillator signal according to an adjustable division ratio; and a frequency adjusting arrangement coupled to a regulating input of the frequency divider, and comprising a first control input configured to receive a digital frequency adjusting signal and a second control input configured to receive a digital frequency shifting signal, and wherein the frequency adjusting arrangement further comprises: a first adder having inputs connected to the first and second control inputs and configured to generate and output a whole-number component at a first output and a fractional component at a second output based on the signals at the first and second control inputs; a sigma-delta modulator comprising an input connected to the second output of the first adder; a second adder, comprising inputs connected to the first output of the first adder and to an output of the sigma-delta modulator and configured to prepare a regulating signal at the regulating input of the frequency divider to adjust the division ratio thereof; and a digital-analog converter configured to receive the signal at the second control input, convert it to an analog control signal, and provide the analog control signal to a second regulating input of the controlled oscillator.