Patent ID: 7486921

Claim:
A method of producing an electronic circuit, comprising: forming an integrated resin layer made of B-stage solid resin at room temperature, containing no metal particle and having a prescribed thickness by repeating a resin layer forming process a number of times so that resin layers made of B-stage solid resin at room temperature and containing no metal particle are layered to be integrated with all the resin layers on a substrate, wherein said resin layer forming process comprises: charging the surface of a photoconductor with no pattern; forming an electrostatic latent image having a prescribed pattern on the surface of the charged photoconductor by means of laser irradiation; forming a visible image by electrostatically attaching charged particles composed of B-stage solid resin at room temperature and containing no metal particle on the surface of said photoconductor on which said electrostatic latent image is formed; transferring the visible image formed on the surface of the photoconductor and composed of the charged particles onto the substrate; and hardening said visible image transferred onto said substrate on said substrate to form the resin layer made of B-stage solid resin at room temperature and containing no metal particle on said substrate.