Patent ID: 7146719

Claim:
A method for manufacturing a multilayer circuit component which comprises at least two glass-containing layers on a substrate, in which the baking shrinkage rates of the first glass-containing layer and second glass-containing layer formed are about the same, comprising: (a) applying and drying a first photosensitive glass paste comprising glass having a softening temperature and a photosensitive vehicle to a substrate; (b) forming a via hole pattern on the resulting dried first paste; (c) baking the resulting paste with said via hole pattern so as to form a first glass-containing layer; (d) applying and drying a second photosensitive glass paste comprising glass having a softening temperature and a photosensitive vehicle, on said first glass-containing layer; (e) forming a via hole pattern on the resulting dried second paste; and (f) baking the resulting second paste with said via hole pattern so as to form a second glass-containing layer; wherein at least one parameter selected from glass softening temperature and glass content in the first glass paste is different from the same parameter in the second glass paste, whereby the baking shrinkage rates of the first glass-containing layer and second glass-containing layer formed are about the same.