Patent ID: 7893753

Claim:
A semiconductor device for boosting or reducing a potential voltage, comprising: a first transistor; a second transistor; a third transistor; a fourth transistor; a first capacitor; a second capacitor; a third capacitor; a power supply terminal; and an inverter, wherein one electrode of the first transistor is electrically connected to a first wiring, which is connected to the power supply terminal maintaining a first potential, wherein a gate electrode of the first transistor is electrically connected to one electrode of the second transistor and a first electrode of the first capacitor, wherein a gate electrode of the second transistor is electrically connected to a gate electrode of the third transistor, an output of the inverter and a first electrode of the second capacitor, wherein a second electrode of the second capacitor is electrically connected to the other electrode of the first transistor, one electrode of the third transistor and one electrode of the fourth transistor, wherein the other electrode of the fourth transistor is electrically connected to the other electrode of the second transistor, wherein the other electrode of the third transistor is electrically connected to a gate of the fourth transistor and a first electrode of the third capacitor, and wherein a second electrode of the third capacitor is electrically connected to an input of the inverter and a second electrode of the first capacitor.