Patent ID: 7468490

Claim:
A circuit substrate comprising a lamination of plural resin insulation films and including, on a surface and in an interior of said circuit substrate, plural interconnection layers, one of said plural resin insulation films being formed on a first conductor pattern constituting one of said plural interconnection layers in such a manner that a bottom principal surface of said resin insulation film makes a contact with a surface of said first conductor pattern, said resin insulation film including an opening defined by a sloped surface and exposing said first conductor pattern at said bottom principal surface, a ceramic high-K dielectric film being formed at a bottom of said opening in contact with said surface of said first conductor pattern, wherein there is formed a second conductor pattern constituting one of said plural interconnection layers on said resin insulation film so as to cover said sloped surface and in contact with a surface of said ceramic high-K dielectric film.