Patent ID: 8247282

Claim:
A method of forming a gate electrode structure, the method comprising: forming a semiconductor device having a substrate and a semiconductor region formed on said substrate, wherein the semiconductor region includes a semiconductor layer having at least one isolation structure; removing material of said semiconductor region of said semiconductor device so as to form a recess in said semiconductor region; forming a layer of a semiconductor alloy on said semiconductor region and in said recess; oxidizing said layer of said semiconductor alloy so as to form a first sub-layer comprised of said semiconductor alloy and a second sub-layer comprised of an oxide of said semiconductor alloy, wherein forming said layer of a semiconductor alloy and oxidizing said layer comprises performing an in situ process; removing said second sub-layer; forming a gate layer stack on said first sub-layer, said gate layer stack comprising a gate dielectric material, a work function adjusting species and an electrode material; and forming said gate electrode structure of a transistor from said gate layer stack.