Patent ID: 7118939

Claim:
A method of manufacturing a semiconductor device, the method comprising: (a) disposing a substrate on which a plurality of leads are formed on an XY plane in a three-dimensional coordinate system consisting of XYZ axes; (b) disposing a semiconductor chip including a plurality of electrodes so that a formation surface of the electrodes faces a formation surface of the leads of the substrate with an interval; (c) positioning the leads and the electrodes so that the leads and the electrodes respectively face each other; and (d) electrically connecting the leads with the electrodes, wherein the step (c) includes: (c 1 ) imaging the formation surface of the electrodes and the formation surface of the leads along an axis which intersects the XY plane at right angles; (c 2 ) obtaining a projected image of the formation surface of the electrodes and the formation surface of the leads projected onto a plane which intersects the Z axis at right angles; (c 3 ) calculating a difference between an image of one of the electrodes and an image of one of the leads in the projected image; (c 4 ) calculating a deformation value of at least one of the substrate and the semiconductor chip due to expansion or shrinkage necessary for eliminating the difference; (c 5 ) calculating a change in temperature of at least one of the substrate and the semiconductor chip necessary for obtaining the deformation value; and (c 6 ) changing the temperature of at least one of the substrate and the semiconductor chip based on the change in temperature.