Patent ID: 7902611

Claim:
An integrated circuit having a silicon substrate, comprising: a plurality of p-type transistor bodies each of which is located in a separate region of the integrated circuit and each of which forms a transistor body terminal for a plurality of associated n-channel metal-oxide-semiconductor transistors, wherein each of the p-type transistor bodies surrounds a respective n-type transistor body that is shared by a plurality of p-channel metal-oxide-semiconductor transistors; and a body bias isolation structure that isolates the p-type transistor bodies from each other, wherein the body bias isolation structure comprises a trench in the silicon substrate, a region of dopant implanted at the bottom of the trench, and an insulator that fills the trench above the region of dopant, wherein each p-type transistor body forms a single p-well that is surrounded by the body bias isolation structure and that is uninterrupted by any trenches.