Patent ID: 8723246

Claim:
A nonvolatile semiconductor memory comprising: at least one memory cell disposed on a semiconductor substrate, the memory cell having: a first gate insulating film provided on a first element area of the semiconductor substrate, the first element area being defined by a first isolation insulating layer provided on the semiconductor substrate; a charge storage layer provided on the first gate insulating film; a first intergate insulating film having a multilayer structure and provided on the charge storage layer and the first isolation insulating layer; and a control gate electrode provided on the first intergate insulating film; and a peripheral transistor having: a second gate insulating film provided on a second element area of the semiconductor substrate, the second element area being defined by a second isolation insulating layer provided on the semiconductor substrate; a first gate electrode provided on the second gate insulating film and having a width larger than that of the charge storage layer; a second intergate insulating film having a multilayer structure and provided on the first gate electrode and the second isolation insulating layer; and a second gate electrode provided on the second intergate insulating film, wherein the first intergate insulating film has n (n is natural number) layers on the charge storage layer and has m layers (m is natural number and m<n) on the first isolation insulating layer, and wherein the second intergate insulating film has n layers on the first gate electrode and an entire portion between the second isolation insulating layer and the second gate electrode in a direction perpendicular to a surface of the semiconductor substrate.