Patent ID: 7388931

Claim:
A method of concurrently converting a substantially orthogonal pair of analog signals having a predetermined nominal phase relationship into corresponding digital signals in a baseband processor, using only a single ADC (Analog to Digital Converter) circuit, the method comprising: providing a single ADC circuit; during a first time interval, sampling a first one of the analog signals in the ADC circuit to provide a first digital signal; during a second time interval non-overlapping the first time interval, sampling the other one of the pair of analog signals in the ADC circuit to provide a second digital signal; and aligning the first and second digital signals so as to compensate for phase difference introduced by said sampling during the first and second time intervals, wherein said aligning comprises: delaying a first one of the digital signals; and interpolating the other one of the digital signals in a LPF (Low Pass Filter), so as to compensate for the phase difference introduced by said sampling during the first and second time intervals, wherein each of the first and second time intervals is equal to a predetermined ADC sample period corresponding to a sample clock cycle; and said delaying the first digital signal comprises a delay of ½ clock cycle.