Patent ID: 6847927

Claim:
A method in a logic simulator machine for creating a trace of an array which includes a plurality of storage locations, said logic simulator machine executing a test routine, said method comprising the steps of: prior to executing said test routine, storing an initial copy of all data included within each of said plurality of storage locations of said array as a first trace of said array; during execution of a first cycle of said test routine, reading all write control inputs into said array to identify ones of said plurality of storage locations which were modified during said first cycle, wherein the step of reading all write control inputs comprises reading a write enable input, a write address input, and a write data input into said array to identify ones of said plurality of storage locations which were modified during said first cycle; and generating a new trace of said array, wherein said new trace is generated by updating only ones of said plurality of storage locations which were modified during execution of a cycle of said test routine.