Patent ID: 8819097

Claim:
An apparatus comprising: a first datapath that generates real and imaginary portions of a first output signal, wherein the first datapath includes: a first summing circuit that receives real portions of a first signal and a second signal; and a second summing circuit that receives imaginary portions of the first and second signals; and a second datapath that generates real and imaginary portions of a second output signal, wherein the second datapath includes: a third summing circuit that receives the real portions of the first and second signals; a multiplexer that is configured to select between the imaginary portion of the first signal and an inverse of the imaginary portion of the first signal based on a control signal; and a fourth summing circuit that receives the imaginary portion of the second signal and that is coupled to an output of the multiplexer, wherein the control signal selects at least one of a first operation and a second operation for the fourth summing circuit; and an output circuit that is coupled to third summing circuit and the fourth summing circuit and that is controlled by the control signal.