Patent ID: 8741722

Claim:
A method for forming a semiconductor device, comprising: defining active regions on a substrate; forming a dummy gate stack material over exposed portions of the active regions of the substrate and non-active regions of the substrate; removing portions of the dummy gate stack material to expose portions of the active regions and non-active regions of the substrate and define dummy gate stacks; forming a gap-fill dielectric material from a first dielectric material over the exposed portions of the substrate; removing portions of the gap-fill dielectric material to expose the dummy gate stacks; removing the dummy gate stacks to form dummy gate trenches; forming dividers from a second dielectric material within the dummy gate trenches, wherein portions of the dividers are formed over top surfaces of the gap-fill dielectric material; depositing gate stack material inside the dummy gate trenches, over the dividers, and the gap-fill dielectric material; and removing portions of the gate stack material to define gate stacks, the gate stacks having a longitudinal axis along a first direction, wherein remaining portions of the gap-fill material the first dielectric material also have a longitudinal axis along the first direction, and wherein the dividers have a longitudinal axis in a second direction orthogonal to the first direction, and wherein locations of the plurality of dividers are independent from self-alignment to source and drain diffusion regions.