Patent ID: 6956403

Claim:
An electronic circuit comprising an output driver (DRV) for producing a control signal (U 0 ), including a first supply terminal (V DD ); a second supply terminal (V SS ); a signal input terminal (IN) for receiving an input signal (U i ), a signal output terminal (OUT) for supplying the control signal (U 0 ); an output transistor (T 1 ) having a control electrode and a main current path which is coupled between the first supply terminal (V DD ) and the signal output terminal (OUT); and a control circuit (CNTRL) which supplies a control signal (U 1 ) to the control electrode of the output transistor (T 1 ) in response to the input signal (U i ), the control circuit (CNTRL) comprising a buffer (BF) of which an output is coupled to the control electrode of the output transistor (T 1 ) and of which a first supply connection point is coupled to the first supply terminal (V DD ), characterized in that the output driver (DRV) further includes a current receiving transistor (T 3 ) which has a main current path that is coupled between a second supply connection point of the buffer (BF) and the second supply terminal (V SS ), and has a control electrode for receiving a reference potential (V RF ), wherein the output driver further comprises a voltage stabilizing means.