Patent ID: 8274134

Claim:
A semiconductor device, comprising: a substrate; and an electric fuse including: a first fuse interconnect formed over the substrate; a second fuse interconnect formed in a layer different from a layer in which the first fuse interconnect over the substrate is formed; and a via which is connected to one end of the first fuse interconnect and connects the first fuse interconnect and the second fuse interconnect, wherein the first fuse interconnect includes a gradual width varying region including a small interconnect width region on a side of the one end of the first fuse interconnect and a large interconnect width region on a side of an other end of the first fuse interconnect, wherein the layer in which the first fuse interconnect is formed is located above the layer in which the second fuse interconnect is formed, wherein the first fuse interconnect, the second fuse interconnect, and the via each comprise: a copper-containing metal film; and a barrier metal film which covers a side surface and a bottom surface of the copper-containing metal film, wherein before disconnection, the barrier metal film is formed between the second fuse interconnect and the via so as to be in contact with the copper-containing metal film which forms each of the second fuse interconnect and the via, and wherein, when a current flows through the first fuse interconnect, the current flows from the small interconnect width region to the large interconnect width region.