Patent ID: 7106125

Claim:
A method for reducing distortion of a signal applied to an input of a high frequency circuit having a parasitic capacitance between said input and ground, comprising the steps of: employing a device responsive to a rate of change of voltage for detecting at said input a direction of change in voltage of said input signal; activating a charge pump for introducing a current to said parasitic capacitance to prevent said parasitic capacitance from drawing current from said input signal responsive to detection of a rate of change of a positive edge of said input signal by said device; said charge pump having a first transistor which is activated for preventing discharge of said parasitic capacitance into the input of the circuit by preventing a change of voltage at said input responsive to detection of a rate of change of a negative edge of said input signal; said charge pump further comprising: the first transistor connected to a first node, a second node, and a third node; a second transistor connected to the first node and the second node; a third transistor connected to the second node, a fourth node, and ground; a fourth transistor connected to the fourth node and ground; a current source connected to the first node and the fourth node; and a capacitor connected to the fifth node and the fourth node.