Patent ID: 6839286

Claim:
A semiconductor device comprising: an output buffer circuit including a pull-up section of pull-up transistors and a pull-down section of pull-down transistors; a pad connected to an external resistor; and an output impedance control circuit connected to the pad and which controls an impedance of the output buffer circuit in response to an impedance of the external resistor, the output impedance control circuit including a first transistor connected to the pad, a level controller which controls a gate voltage of the first transistor in response to a voltage of the pad and a reference voltage so as to establish the pad at a given voltage, a first MOS array connected between the pad and a power supply voltage which supplies current to the pad in response to a first impedance control code, a first control circuit which generates the first impedance control code in response to whether a voltage of the pad is converging to the reference voltage, and a second control circuit which controls a pull-up impedance of the output buffer circuit in response to the first impedance control code when a voltage of the pad is converging to the reference voltage.