Patent ID: 6864546

Claim:
A semiconductor device comprising a data holding portion and a peripheral circuit portion that operates in association with said data holding portion, said data holding portion and said peripheral circuit portion being formed on a same semiconductor substrate, said semiconductor device comprising: gate interconnections provided respectively in said data holding portion and said peripheral circuit portion on said semiconductor substrate, each said gate interconnection having a top covered by a silicon nitride film; first sidewall nitride films provided respectively on sides of said gate interconnections in said data holding portion and said peripheral circuit portion; first and second impurity regions provided in said data holding portion and said peripheral circuit portion, said respective first and second impurity regions being selectively formed in a surface of said semiconductor substrate that extends outward from sides of said respective gate interconnections; sidewall insulating films provided on sides of said first sidewall nitride films of said gate interconnection in said peripheral circuit portion; contact plugs composed of a conductive silicon and passing through a first interlayer insulating film provided on said data holding portion to reach the surface of said semiconductor substrate where said first and second impurity regions are formed; third impurity regions provided in said peripheral circuit portion, said third impurity regions being selectively formed in a surface of said semiconductor substrate that extends outward from sides of said sidewall insulating films, the third impurity regions having a higher impurity concentration than said first and second impurity regions; and metal suicide films provided on all said contact plugs in said data holding portion and on the surface of said semiconductor substrate in said peripheral circuit portion where said third impurity regions are formed.