Patent ID: 7924057

Claim:
A Wave Dynamic Differential Logic, comprising: a plurality of differential logic cells arranged in a combinatorial logic tree and each having inverted combinatorial data-bearing inputs and corresponding non-inverted combinatorial data-bearing inputs, each of said plurality of differential logic cells configured to provide one or more inverted logic outputs and corresponding one or more non-inverted logic outputs, each of said plurality of differential logic cells configured to receive a precharge wave and/or a predischarge wave on said inverted combinatorial data-bearing inputs and non-inverted combinatorial data-bearing inputs of the respective differential logic cell and to propagate said precharge wave and/or said predischarge wave from said inverted combinatorial data-bearing inputs and corresponding non-inverting combinatorial data-bearing inputs of the respective differential logic cell to said inverted logic outputs and said non-inverted logic outputs of the respective differential logic cell, wherein each of said plurality of differential logic cells is configured to receive and propagate said precharge wave and/or said predischarge wave during a precharge and/or pre-discharge phase, and is further configured to, during an evaluation phase, receive differential data on its inverted combinatorial data bearing inputs and its corresponding non-inverted combinatorial data-bearing inputs and evaluate said differential data to produce differential output data on its inverted logic outputs and its non-inverted logic outputs, wherein said precharge wave and/or said predischarge wave is encoded in data received on the inverted and non-inverted combinatorial data-bearing inputs of each of said plurality of differential logic cells, and wherein each of said plurality of differential logic cells is precharged or predischarged without distributing a separate precharge or predischarge signal to the plurality of differential logic cells.