Patent ID: 7335960

Claim:
An MRAM cell structure in which the overall topography is flat and in which the distance between a bit line and a magnetic free layer, a word line and a magnetic free layer or a bit line and a word line and a magnetic free layer is well controlled, comprising: a substrate; a magnetic tunneling junction (MTJ) formed on the substrate, said MTJ including a magnetic free layer; a capping layer formed on said MTJ, the vertical separation between an upper surface of said capping layer and an upper surface of said free layer being the thickness of said capping layer and said thickness being precisely defined and well controlled; a first layer of insulation formed surrounding said MTJ, the upper surface of said insulation layer and the upper surface of said capping layer being rendered substantially coplanar and forming a common surface having a flat topography and the thickness of said capping layer being unchanged during said rendering as a result of a protective sacrificial layer that is completely removed; a bit line formed on said common surface and extending across said capping layer, wherein the vertical separation between said bit line and said magnetic free layer is well controlled to within +/−1% of said vertical separation; a second layer of insulation formed surrounding said bit line, an upper surface of said second layer being substantially co-planar with an upper surface of said bit line.