Patent ID: 7973557

Claim:
An integrated circuit (IC), comprising: at least one programmable digital logic cell, comprising: a first dedicated digital logic cell comprising a plurality of transistors including at least one PMOS transistor and at least one NMOS transistor configured to perform at least one digital logical function, said first dedicated digital logic cell including a plurality of nodes including at least one input node and at least one output node that reflects performance of said digital logical function, and programmable tuning circuitry comprising: at least one tuning input; at least one tuning circuit output; a voltage controller for controlling a level of a voltage supplied to said programmable digital logic circuit, wherein said voltage controller is configured to control at least one of VDD or VSS for said first dedicated digital logic cell, a back gate voltage for said first PMOS transistor, and a back gate voltage for said first NMOS transistor; and circuitry for coupling or decoupling at least one of said tuning input and said tuning circuit output to at least one of said plurality of nodes of said first dedicated digital logical cell, said coupling or decoupling changing a processing speed for said programmable digital logic cell.