Patent ID: 8426118

Claim:
A method comprising: forming a plurality of lower-level pitch-reduced features, wherein forming the plurality of lower-level pitch-reduced features comprises: providing a substrate; providing a plurality of lower-level mandrels over the substrate, the mandrels having a length extending along a spacer axis; forming lower-level spacers on sidewalls of the lower-level mandrels; removing the lower-level mandrels; and transferring a pattern formed by the lower-level spacers to the substrate to define the lower-level pitch-reduced features in the substrate; depositing a dielectric layer over the lower-level pitch-reduced features; forming pitch-reduced spacers having a spacer pitch over the dielectric layer, the spacers elongated substantially along the spacer axis; applying a layer of photoresist over the spacers; photolithographically defining a crossing pattern of the photoresist over multiple spacers such that opposing sidewalls of each of at least some of the spacers are exposed within a window of the photoresist pattern, the window having a width of less than about 200 nanometers, the width larger than the spacer pitch; and etching contact vias in the dielectric layer through a pattern defined by the spacers and the photoresist, wherein the contact vias expose portions of the lower-level pitch-reduced features.