Patent ID: 7403963

Claim:
A method of converting an input sampled digital data stream sampled at an input rate of m into an output sampled digital data stream sampled at an output rate of n, comprising the steps of: initializing a first count and a second count to n; for each clock pulse determining if said second count is less than 2n, then if so, enabling data input, inputting a next value of said input sampled digital data stream and setting said first count equal to a sum of said second count and m, and if not, disabling data input, determining if said second count is greater than or equal to n, then if so, enabling data output and setting said first count equal to a difference of a prior first count minus n, if not, disabling data output, and setting said second count equal to said first count; initializing a first data value and a second data value to a first input data value; and for each clock pulse determining if data input is enabled and if so, setting said second data value to a first data value of said input sampled digital data stream then setting said first data value equal to a most recently received data input value of said input sampled digital data stream, and determining if data output is enabled and if so, outputting a next output value of said output sampled digital data stream equal to d 2 *f p +d 2 *f n where: d 1 is said first data value; d 2 is said second data value; f p is a first interpolation value; and f n is a second interpolation value.