Patent ID: 7139924

Claim:
An IDE control device suitable for any clock frequency specification, comprising: a phase-locked loop for receiving clock signals generated from a clock generator and thereby generating a plurality of requested clock signals, each of said requested clock signals being of a different frequency; and an IDE controller, comprising a selection module for selection of suitable clock signals and switching active hard discs adaptive to a pre-selection from among a plurality of hard discs, and an interface module for generating a transmission signal; wherein said selection module is connected to said phase-locked loop and adaptively selects clock signals from said plurality of requested clock signals suitable for each of said plurality of hard discs responsive to detected transmission specifications of said hard discs, and said interface module generates a corresponding transmission signal through an IDE bus to access a corresponding hard disc, said IDE controller including a plurality of phase generators, each respectively connected to said phase-locked loop and able to receive corresponding clock signals to generate phase signals corresponding to said clock signals.