Patent ID: 8854869

Claim:
A semiconductor integrated circuit, comprising: a logic circuit; a plurality of SRAM modules operable to store data related to the logic circuit; another SRAM module operable to perform power control in common with the logic circuit; and a plurality of power switches, wherein the plurality of SRAM modules can perform power control independently of the logic circuit, wherein an independent power control can be performed among the plurality of SRAM modules, wherein the logic circuit and the another SRAM module can be controlled in common to a power off state, wherein, before the logic circuit and the another SRAM module are controlled in common to the power off state, data of the another SRAM module can be evacuated to at least one SRAM module of the plurality of SRAM modules, wherein each SRAM module of the another SRAM module and the plurality of SRAM modules is coupled with a corresponding one of the power switches in series, wherein each SRAM module of the another SRAM module and the plurality of SRAM modules can be controlled to the power off state, by controlling the corresponding power switch to an off state, and wherein each SRAM module of the another SRAM module and the plurality of SRAM modules can be controlled to an active state and a standby state by controlling the corresponding power switch to an on state.