Patent ID: 7126187

Claim:
A semiconductor device comprising: a semiconductor substrate; a cell region in a surface portion of the substrate for operating as a transistor; a gate lead wiring region having a gate lead pattern on the substrate; a trench in the surface portion of the substrate extending from the cell region to the gate lead wiring region; an oxide film on an inner surface of the trench so as to have sidewalls and a bottom wall; and a gate electrode in the trench insulated with at least the oxide film from the substrate, wherein the oxide film is disposed on a portion of the substrate at a position corresponding thereto, wherein the sidewalls of the trench at the gate lead wiring region has a main portion, atomic surface density of a crystal plane of which is higher than that of the sidewalls of the trench at the cell region, and wherein a thickness of the oxide film on the sidewalls of the trench at the gate lead wiring region is greater than that at the cell region.