Patent ID: 8169583

Claim:
A thin film transistor array panel comprising: a substrate including a display area and a peripheral area; a display area signal line disposed in the display area of the substrate; a display area thin film transistor disposed in the display area and connected to the display area signal line; a plurality of peripheral area signal lines disposed in the peripheral area of the substrate; a light-blocking member disposed on the display area signal line, the display area thin film transistor, and the plurality of peripheral area signal lines; a transparent connection electrically connecting the plurality of peripheral area signal lines to each other through a plurality of first contact holes penetrating the light-blocking member; and a pixel electrode connected to the display area thin film transistor through a second contact hole penetrating the light-blocking member, wherein an area density of the first contact hole in the peripheral area is equal to or less than about three times an area density of the second contact hole in the display area.