Patent ID: 7577794

Claim:
A method of maintaining coherency of data stored in a shared memory device that may be accessed by both a remote device and a processor, comprising, at the remote device: in response to detecting an access request issued by a requesting component residing on the remote device, generating a bus request to the processor on a first virtual channel established on a bus between the processor and the remote device to access a requested data targeted by the bus request that may be stored in a cache residing on the processor; receiving, from the processor, a response to the bus request on at least a second virtual channel established on the bus between the processor and the remote device; and determining whether or not the response from the processor contains the requested data; if the response from the processor contains the requested data, returning the data to the requesting component; if the response from the processor is a reflected request generated by a reflection logic residing on the processor, wherein the reflected request does not contain the requested data, routing the reflected request to the shared memory device.