Patent ID: 7602813

Claim:
A decoder device which retrieves a packetized elementary stream and a program clock reference value from a transport stream, and decides the timing of decoded reproduction output of the packetized elementary stream referring to a reproduction output time information appended to the packetized elementary stream while in a decoding reproduction process of the packetized elementary stream, the decoder device comprising: a circuit that counts in a predetermined count-up cycle without being synchronized by an adjustment control based on the program clock reference value; a table generation means for generating a table pairing up a counter value at the time when the program clock reference value is received with the program clock reference value; a first difference information output for outputting first difference information between a counter value at the time when reproduction output time information of the packetized elementary stream is referred to and a counter value in the table; a second difference information output for outputting second difference information between reproduction output time information of the packetized elementary stream and a counter value in the table; and a latency time calculation device for calculating a latency time of the packetized elementary stream reproduction output from the first difference information and the second difference information.