Patent ID: 7956949

Claim:
A method of forming an array substrate for use in a liquid crystal display device, comprising: forming a first metal layer and a first barrier metal layer in series on a substrate, wherein the first metal layer is one of aluminum and aluminum alloy; patterning simultaneously both the first metal layer and the first barrier metal layer using a first mask process to form a gate electrode, a gate line and a gate pad on the substrate, wherein the gate electrode, the gate line and the gate pad have a double-layered structure consisting of the metal layer and the first barrier metal layer; forming a gate insulation layer on the substrate to cover the double-layered gate electrode, line and pad; forming an active layer and an ohmic contact layer sequentially on the gate insulation layer using a second mask process; forming sequentially a second barrier metal layer and a second metal layer of copper on the gate insulation layer to cover the active layer and the ohmic contact layer; patterning simultaneously both the second barrier metal layer and the second metal layer of copper using a third mask process to form a data line, source and drain electrodes and a data pad, wherein the data line is on the gate insulation layer and crossed the gate line, and wherein the data line, the source and drain electrodes, the capacitor electrode and the data pad have a double-layered structure including the second barrier metal layer and the second metal layer of copper; forming a passivation layer formed on the gate insulation layer to cover the double-layered data line, source and drain electrodes, and data pad; patterning the second passivation layer using a fourth mask process to form a drain contact hole exposing the drain electrode, a gate pad contact hole exposing the gate pad, and a data pad contact hole exposing the data pad; and forming a pixel electrode, a gate pad terminal and a data pad terminal on the passivation layer using a fifth mask process.