Patent ID: 7949012

Claim:
A combined data packing, cipher and multiplexing engine operable to support high speed uplink packet access (HS-UPA) within user equipment (UE), comprising: a master port coupled to an advanced microprocessor bus architecture (AMBA) high speed bus (AHB) on which control information for the combined data packing, cipher and multiplexing engine received; a radio link control (RLC) data packer coupled to the master port, the RLC data packer operable to: receive RLC service data units (SDUs) from the AHB via the master port; concatenate or segment RLC SDUs into RLC packet data units (PDUs); and store RLC PDUs to a RLC PDU buffer; and a cipher/multiplexing processing module operable to: retrieve the RLC PDU from the RLC PDU buffer; cipher the RLC PDU to produce ciphered data, when cipher enabled; and enter the ciphered data to a Hybrid Automatic Repeat reQuest (HARQ) buffer; and wherein a protocol stack executed within the UE activates and provides an array on the formation of the RLC PDU, RLC header information to the combined data packing, cipher and multiplexing engine for RLC PDU ciphering and Medium Access Control (MAC) multiplexing of an enhanced dedicated transport channel (E-DCH).