Patent ID: 8018244

Claim:
A superconducting quantum processor comprising: a plurality of computation qubits, wherein each computation qubit comprises at least one loop of superconducting material and at least one Josephson junction, and wherein each computation qubit is configured to perform at least a portion of a computation; a plurality of latching qubits, wherein each latching qubit comprises a first loop of superconducting material and a compound Josephson junction that interrupts the first loop of superconducting material, the compound Josephson junction comprising a closed loop of superconducting material interrupted by at least two Josephson junctions, wherein the first loop of superconducting material and the compound Josephson junction form a closed superconducting current path, and wherein each latching qubit is configured to galvanically couple to at least one of a computation qubit and another latching qubit; and a clock signal input structure configured to couple clock signals to the compound Josephson junction of at least one latching qubit.