Patent ID: 8486784

Claim:
A method of manufacturing a vertical semiconductor device, comprising: forming a first pillar and a second pillar over a semiconductor substrate, the first pillar and the second pillar each comprising a first sidewall and a second sidewall, the first sidewall of the first pillar facing the second sidewall of the second pillar; forming a first conduction layer between the first pillar and the second pillar, the first conduction layer having a height lower than heights of the first and second pillars; forming a linear insulating layer over portions of the first and second sidewalls of each of the first pillar and the second pillar, wherein the portions are not covered by the first conduction layer; etching the first conduction layer by a constant thickness; forming a linear conduction layer over the first sidewall of the first pillar to expose a contact region in the second sidewall of the second pillar; forming a semiconductor layer over the contact region; forming a second conduction layer over the first conduction layer; and forming a junction region within the second pillar.