Patent ID: 8362800

Claim:
A system comprising: a semiconductor device comprising a first transistor layer and a second transistor layer overlaying the first transistor layer, and a plurality of circuits each performing a comparison between a signal generated by transistors of the first transistor layer and a signal generated by transistors of the second transistor layer; wherein said first transistor layer comprises a plurality of flip-flops each having an input and an output, wherein the inputs or the outputs are selectively coupleable to the second transistor layer, and are connectable to either output of a logic circuit constructed by said second transistors or to at least one flip-flop constructed by said second transistors, wherein the plurality of flip-flop inputs or outputs are selectively coupled to the second transistor layer through a plurality of multiplexers, and wherein the at least one flip-flop input or output is selectively coupled to the first transistor layer through the plurality of multiplexers.