Patent ID: 8285914

Claim:
A data processing device, comprising: a memory that includes a plurality of banks; a plurality of requestors that generate requests for accessing the memory; a plurality of bank queues corresponding to the banks; and a control block to: receive the requests from the requestors, identify the banks to which the requests are intended, store first information associated with the requests in the bank queues corresponding to the identified banks, store second information associated with the requests in one or more locations of a common memory pool, generate a bank vector for each of the banks in the memory, where each of the bank vectors identifies one or more of the requestors generating requests for accessing the memory, generate a combined bank vector by concatenating the bank vectors for each of the banks in the memory, generate a bank availability vector that identifies which of the banks are available, generate a replicated bank availability vector that includes each bit of the bank availability vector, generate a result vector based on a combination of the combined bank vector and the replicated bank availability vector, where the result vector indicates that one or more of the banks are available and have a request to be serviced, select one or more of the requests to send to the memory based on the first information stored in the bank queues and the result vector, and send the selected one or more of the requests to the memory based on the second information stored in the common memory pool.