Patent ID: 8531245

Claim:
A method for compensating for temperature variation in a phase locked loop (PLL), the method comprising: receiving an error signal by a controller, the error signal representative of an instantaneous frequency difference between a reference frequency signal and an output frequency signal of a voltage controlled oscillator of the phase locked loop (PLL); determining whether a voltage of the error signal is outside of a predetermined voltage range; when the voltage is outside the predetermined voltage range: generating a new digital compensation signal by a controller based upon a previous digital compensation signal, the new digital compensation signal representative of a calibration signal for the voltage controlled oscillator; and converting, by a digital to analog converter, the new digital compensation signal to be an analog compensation signal; and when the voltage is within the predetermined voltage range: maintaining the previous digital compensation signal by the controller; and converting, by a digital to analog converter, the previous digital compensation signal to be the analog compensation signal; filtering the analog compensation signal by a switchable bandwidth filter to produce a filtered analog compensation signal; and adjusting the output frequency of the voltage controlled oscillator in accordance with the filtered analog compensation signal.