Patent ID: 7434068

Claim:
A system comprising: a first non-volatile data storage device, configured as a plurality of storage regions to store CMOS memory data, wherein the device lacks hardware security such that some of the CMOS memory data storage regions are modifiable by an application program on the system, each of the regions being protected by at least two software schemes including a set of one or more region level rules and another scheme selected from the group consisting of (1) mask bits, (2) checksum, (3) cyclic redundancy check, CRC, and (4) encryption; another, second non-volatile data storage device to store a mirror image of the CMOS memory data in a locked location; a program store to store processor-readable instructions that implement each of the at least two software schemes to ascertain the validity of the CMOS memory data stored in the first non-volatile storage device on a region by region basis and, when data stored in any one of the storage regions is found to be invalid, replace the CMOS memory data in said one of the storage regions of the first non-volatile storage device with the stored mirror image of the data; and a processing unit coupled to the first and second non-volatile data storage devices and program store, to read and process the one or more instructions in the program store.