Patent ID: 8441765

Claim:
An ESD protected device, comprising: an input pad; a device to be protected having a first device terminal connected to the input pad, and a critical electrostatic discharge leakage path from the first device terminal through the device to be protected to a second device terminal; an electrostatic discharge protection circuit connected to the input pad having a trigger terminal for triggering electrostatic discharge protection; wherein the second device terminal is connected to the trigger terminal so that leakage current in the device to be protected triggers or assists in triggering electrostatic discharge protection, wherein the device to be protected is a field effect transistor (FET) having a source, gate and drain, one of the source and drain being the first device terminal connected to the input pad and the gate being the second device terminal directly connected to the trigger terminal of the electrostatic discharge protection circuit, wherein an electrostatic discharge at the input pad is discharged through an electrostatic discharge path, and wherein the electrostatic discharge protection circuit is positioned further upstream in the electrostatic discharge path than the FET.