Patent ID: 6943068

Claim:
A method for fabricating nanometer gate semiconductor device using thermally reflowed photoresist technology, comprising the following steps: (i) spin-coating two layers of photoresists on a substrate, where a bottom layer of photoresist, one of said two layers of photoresists, is a polymeric photoresist which has a lower sensitivity and a higher resolution with respect to an electron beam, and a top layer of photoresist, one of said two layers of photoresists, is another polymeric photoresist which has a higher sensitivity and a lower resolution with respect to the electron beam; (ii) heating said two layers of photoresists for curing by way of using a hotplate; (iii) using photolithography with a high accelerating voltage in an electron beam direct writing manner to expose a pattern on said two layers of photoresists for forming a gate; (iv) using a developer and an etchant for developing and etching in order to form a recess of or for the gate; (v) reflowing the photoresists using a hot plate heating manner within a predetermined period of time and temperature, such that the recess of the gate is formed with a nanometer-sized width; (vi) plating a metallic layer on the recess of the gate by way of using an electron gun evaporation technique; and (vii) removing said photoresists to obtain the gate.