Patent ID: 7447873

Claim:
A processor comprising: a processing core having: a plurality of processing engines configured to concurrently execute a plurality of threads arranged in a plurality of single-instruction, multiple-data (SIMD) groups, each SIMD group including up to a maximum number P of threads, where P is at least two, wherein each of the threads in a same one of the SIMD groups executes a same data processing program on a different input object, the same data processing program comprising a sequence of instructions, and different threads in the same one of the SIMD group are executed using different ones of the processing engines; a local register file having at least P lanes, wherein each processing engine is configured to access a different subset of the lanes; and instruction issue logic configured to select one of the SIMD groups and to issue one of the instructions of the same data processing program to each of the plurality of processing engines in parallel, wherein each processing engine executes the same instruction in parallel with each other processing engine using the subset of the local register file lanes accessible thereto; and core interface logic coupled to the processing core and configured to initiate execution by the processing core of one or more SIMD groups, the core interface logic including: a first load module configured to receive a stream of input data blocks defining a plurality of up to P first input objects to be processed and to load the input data blocks into the local register file such that the input data for each one of the first input objects is in a different one of the lanes of the local register file; and a first launch module coupled to the first load module and configured to signal the processing core to begin execution of a first SIMD group after loading of the stream of input data blocks defining the up to P first input objects into the local register file is complete, wherein each thread of the first SIMD group processes a different one of the first input objects.