Patent ID: 8564344

Claim:
A method for determining a control voltage in a phase-locked loop circuit comprising a feedback clock, the method comprising: obtaining a current error e n between a reference clock signal and a feedback clock signal; determining if the current error is larger than a threshold value, and if so: determine a divisor k n based on an error sign indicator such that: if the error sign indicator indicates that error has not changed sign, the divisor k n is determined using the current error e n , a current control voltage u n , a previous error e n−1 , and a previous control voltage u n−1 ; if the error sign indicator indicates that the error has changed sign, the divisor k n is determined using: stored values for a latest control voltage and a latest determined error when the sign of the error was negative; stored values for a latest control voltage and a latest determined error when the sign of the error was positive; determining a control voltage step using the current error divided by the divisor k n ; and determining a new control voltage u n+1 using the current control voltage u n and the determined control voltage step.