Patent ID: 8645888

Claim:
A computer-implemented method for increasing an accuracy of timing characterization of a circuit including at least one cell in a cell library, the method comprising the steps of: for each cell in the circuit, performing, by a processor, cell library timing characterization for at least prescribed first and second temperatures, the first and second temperatures corresponding to at least first and second process, voltage and temperature (PVT) corners in the cell library; calculating, by a processor, a cell delay for each cell in the circuit, the cell delay calculation being a function of temperature for each instance of the at least one cell; and adding a margin to the cell delay for each cell in the circuit when the temperature is a temperature other than the at least one of the first and second temperatures, the cell library timing characterization being modified as a function of the margin corresponding to each cell in the circuit to take into account effects of temperature inversion and thereby increase the accuracy of timing characterization of the circuit.