Patent ID: 8174098

Claim:
A semiconductor device, comprising: a semiconductor die; first and second conductive vias formed around a perimeter of the semiconductor die; first and second conductive layers formed on a front side of the semiconductor die, the first conductive layer being electrically connected between the first conductive via and a contact pad of the semiconductor die, the second conductive layer being thermally connected to the second conductive via; third and fourth conductive layers formed on a backside of the semiconductor die opposite the front side of the semiconductor die, the third conductive layer being electrically connected to the first conductive via, the fourth conductive layer being thermally connected to the second conductive via; an insulating layer formed over the semiconductor die, wherein openings in the insulating layer expose the first and second conductive layers and a thermal dissipation region of the semiconductor die; a thermal via formed through the insulating layer to the second conductive layer; and a thermally conductive layer formed over the insulating layer, thermal dissipation region, and thermal via.