Patent ID: 8198131

Claim:
A manufacturing method, comprising: providing a substrate including an upper surface and contact pads disposed adjacent to the upper surface of the substrate; applying an electrically conductive material to the upper surface of the substrate to form conductive bumps disposed adjacent to respective ones of the contact pads; electrically connecting a semiconductor device to the upper surface of the substrate; applying a molding material to the upper surface of the substrate to form a molded structure covering the conductive bumps and the semiconductor device, the molded structure including a first upper surface, upper ends of the conductive bumps being disposed below the first upper surface of the molded structure; forming a set of cutting slits extending partially through the molded structure and the conductive bumps to form truncated conductive bumps, the molded structure including a second upper surface that is disposed below the first upper surface of the molded structure, upper ends of the truncated conductive bumps being substantially aligned with the second upper surface of the molded structure; and reflowing the truncated conductive bumps to form reflowed conductive bumps, upper ends of the reflowed conductive bumps protruding above the second upper surface of the molded structure.