Patent ID: 7656328

Claim:
A signal level conversion circuit for increasing a dynamic range of an Analog-to-Digital Converter (ADC), comprising: a comparison and calculation unit for comparing a value of an input signal V in and a value of a first reference signal V ref1 and comparing the value of the input signal V in and a value of a second reference signal V ref2 , and calculating and outputting respective differences therebetween; a signal leveling circuit unit for converting signal levels of respective output signals of the comparison and calculation unit so that the output signals fall within a dynamic range of an ADC; and the ADC for digitizing an output signal V 0 of the signal leveling circuit unit and the output signals V ack1 and V ack2 of the comparison and calculation unit, wherein V ack1 is the output signal of the comparison and calculation unit, and the value of V ack1 is at a high level if the value of the input signal V in , is greater than the value of the first reference signal V ref1 and wherein V ack2 is the output signal of the comparison and calculation unit, and the value of V ack2 is at a high level if the value of the second reference signal V ref2 is greater than the value of the input signal V in .