Patent ID: 7109802

Claim:
A differential to single-ended signal transfer circuit, comprising: first and second differential signal inputs; a single-ended signal output; a current mirror having an input and an output, the first differential input corresponding to the current mirror input, and the second differential input corresponding to the current mirror output, wherein the current mirror further includes a feedback loop coupled between the current mirror input and the current mirror output, the feedback loop being configured to cause an input voltage level at the current mirror input to be substantially equal to an output voltage level at the current mirror output; an output buffer including a first emitter-follower transistor and a first current source, the first transistor having a collector connected to a first power supply voltage, a base connected to the second differential input, and an emitter connected to the single-ended output, the first current source being connected between the emitter of the first transistor and a second power supply voltage; and a base current cancellation circuit including a second emitter-follower transistor and a first amplifier configured as a voltage follower, the second transistor having a collector connected to the first supply voltage, a base connected to the first differential input, and an emitter, the voltage follower having an input connected to the emitter of the first transistor and an output connected to the emitter of the second transistor.