Patent ID: 8811094

Claim:
A method of operating a non-volatile memory device including first through N-th word lines, a plurality of bit lines and non-volatile multi-level memory cells respectively connected between the first through N-th word lines and the bit lines, where N is an integer greater than or equal to 2, the method comprising: receiving a read command directed to a first memory cell connected to an M-th word line (WL), where M is an integer ranging from 1 to N−1; in response to the read command, reading data from at least one of a memory cell connected to word lines adjacent to the M-th word line; selecting at least one of a first group of read voltages and a second group of read voltages from among a plurality of predetermined groups of read voltages in response to the data read from the at least one of a memory cell connected to word lines adjacent to the M-th word line; and distinguishing between an erased state and a first programmed state for the first memory cell using a first read voltage selected from the first group of read voltages, and distinguishing between a second programmed state and a third programmed state for the first memory cell using a second read voltage selected from the second group of read voltages, wherein a number of read voltages in the first group of read voltages is greater than a number of read voltages in the second group of read voltages.