Patent ID: 7373482

Claim:
A method for improving the effectiveness of prefetching during execution of instructions in scout mode, wherein the instructions are speculatively executed to prefetch future memory operations, but wherein results are not committed to the architectural state of a processor, the method comprising: executing instructions for a program during a normal-execution mode; modifying an executable file for the program so that selected loads will be executed as special loads, wherein modifying the executable file involves: identifying prefetch candidates, including loads which are likely to cause higher-level cache misses and unpredictable branches; identifying prefetch-candidate-address loads, which are loads that retrieve data values used to generate addresses for the prefetch candidates; and marking prefetch-candidate-address loads as a special load if the prefetch-candidate-address loads are likely to cause both a lower-level cache miss and a higher-level cache hit; upon encountering a condition which causes the processor to enter scout mode, performing a checkpoint and commencing execution of instructions in scout mode; and wherein during execution of a load instruction during scout mode, if the load instruction is a special load instruction and if the load instruction causes a lower-level cache miss, the method further comprises waiting for data to be returned from a higher-level cache before resuming execution of subsequent instructions in scout mode, instead of disregarding the result of the load instruction and immediately resuming execution in scout mode, whereby the data returned from the higher-level cache can help in generating prefetches during scout mode; and if the load instruction is not a special load instruction, the method further comprises waiting for data to be returned from a lower-level cache before resuming execution of subsequent instructions in scout mode.