Patent ID: 7541794

Claim:
An integrated buck convener for down converting a first voltage to a lower, second voltage, the buck converter comprising: a periodic clock signal generator comprising a first input, a first output, a second output, and a third output; a soft start circuit for enabling a smooth start and voltage sequencing, the soft start circuit comprising a first input coupled to the first output of the periodic clock signal generator, and a first output; an error amplifier for amplifying a first signal, the error amplifier comprising an inverting input, a non-inverting input, and a first output; a ramp generator for amplifying a second signal, the ramp generator comprising a first output; and a pulse width modulator for holding a frequency constant while the width of a power pulse is varied, the pulse width modulator comprising a first input coupled to the second output of the periodic clock signal generator, a second input coupled to the first output of the soft start circuit, a third input coupled to the first output of the error amplifier, and a fourth input coupled to the first output of the ramp generator, wherein the periodic clock signal generator, the soft start circuit, the error amplifier, the ramp generator, and the pulse width modular are electrically isolated from an external resistor divider.