Patent ID: 7064055

Claim:
A method of forming a multi-layer semiconductor structure, comprising: (a) providing, to a first predetermined thickness, a first patterned bond film onto a first surface of a first semiconductor structure; (b) providing, to a second predetermined thickness, a second patterned bond film onto a first surface of a second semiconductor structure; (c) aligning the first patterned bond film of the first semiconductor structure and the second patterned bond film of the second semiconductor structure; and (d) forming a bond between the first and second patterned bond films to provide the first and second semiconductor structures as the multi-layer semiconductor structure wherein forming the bond comprises: applying a first predetermined force to the first and the second semiconductor structures for a first predetermined time interval; heating the first and second semiconductor structures at a first predetermined rate to a predetermined bonding temperature; applying a second predetermined force to the first and the second semiconductor structures for a second predetermined time interval while heating the first and second semiconductor structures at the first predetermined rate; and applying a third predetermined force to the first and second semiconductor structures for a third predetermined time interval after reaching the predetermined bonding temperature.