Patent ID: 8232141

Claim:
A method of manufacture of an integrated circuit packaging system comprising: providing a substrate; forming a conductive pillar, having substantially parallel vertical sides, in direct contact with the substrate; mounting an integrated circuit to the substrate beside a conductive pillar location; encapsulating the integrated circuit includes forming the encapsulation around the conductive pillar and leaving side portions of the conductive pillar exposed above the top surface of the encapsulation; attaching an external interconnect below the substrate; mounting a stencil to the top surface of the encapsulation having a via corresponding to the conductive pillar, or to an external package having the via corresponding to a substrate port of the external package; depositing solder paste in the via and on the conductive pillar, or on the substrate port; removing the stencil; connecting the external package to the conductive pillar; and reflowing the solder paste.