Patent ID: 8362807

Claim:
A sense amplifier comprising: a first PMOS transistor having a first PMOS drain, a first PMOS gate, and a first PMOS source; a second PMOS transistor having a second PMOS drain, a second PMOS gate, and a second PMOS source; a first NMOS transistor having a first NMOS drain, a first NMOS gate, and a first NMOS source; a second NMOS transistor having a second NMOS drain, a second NMOS gate, and a second NMOS source; a first compensation transistor having a first compensation drain, a first compensation gate, a first compensation source, and a first compensation bulk; and a second compensation transistor having a second compensation drain, a second compensation gate, a second compensation source, and a second compensation bulk, wherein the second PMOS gate, the second NMOS gate, and the first NMOS drain are coupled together, and serve as a first data input for the sense amplifier; the first PMOS gate, the first NMOS gate, and the second NMOS drain are coupled together, and serve as a second data input for the sense amplifier; the first compensation transistor is coupled between a power supply voltage node and the first PMOS transistor or between the first PMOS transistor and the first NMOS transistor or between the first NMOS transistor and a first node; the second compensation transistor is coupled between the power supply voltage node and the second PMOS transistor or between the second PMOS transistor and the second NMOS transistor or between the second NMOS transistor and the first node; the first compensation bulk serves as a first compensation input for the sense amplifier and the second compensation bulk serves as a second compensation input for the sense amplifier; and a compensation voltage value is applied to one or a combination of the first compensation bulk and the second compensation bulk causing a voltage change between a first threshold voltage of the first compensation transistor and a second threshold voltage of the second compensation transistor.