Patent ID: 7049207

Claim:
A method of isolating semiconductor devices by wet etching of a semiconductor laminate structure formed on a substrate, said method comprising the steps of: providing an etching stop layer having at least two layers between said substrate and said semiconductor laminate structure; etching said semiconductor laminate structure so as to isolate said semiconductor devices, and thereafter etching away said substrate; and sequentially etching away said etching stop layer wherein said semiconductor laminate structure comprises an n-type contact layer, an n-type clad layer, an active layer, a p-type clad layer, and a p-type contact layer, wherein said p-type clad layer, said active layer and said n-type clad layer are etched by using said n-type contact layer as an etching stop layer at the time of etching said semiconductor laminate structure for isolating said semiconductor devices, and wherein a GaAs substrate is used as said substrate, said etching stop layer on the side of said substrate is formed of AlGaInP, said etching stop layer on the side of said n-type contact layer is formed of AlGaAs, said n-type contact layer and said p-type contact layer are formed of GaAs or GaInP, and said n-type clad layer, said active layer and said p-type clad layer are formed of AlGaInP or GaInP.