Patent ID: 7752480

Claim:
A computer-implemented method comprising: receiving a plurality of clock signals, each of the plurality of clock signals having a different clock frequency; receiving a clock selection signal that indicates a change in clock selection from a first clock signal to a second clock signal, the first clock signal and the second clock signal included in the plurality of clock signals; detecting, in response to receiving the clock selection signal, that the first clock signal's clock edge aligns with the second clock signal's clock edge, wherein the detecting comprises: inverting the first clock signal, resulting in an inverted first clock signal; delaying the inverted first clock signal, resulting in a delayed inverted first clock signal; inverting the inverted first clock signal, resulting in an un-inverted first clock signal; and identifying a first clock timeframe when the un-inverted first clock signal and the delayed inverted first clock signal are both high, the beginning of the first clock timeframe signifying the first clock signal's rising clock edge; and selecting the second clock signal in response to the detection of the first clock signal's clock edge aligning with the second clock signal's clock edge.