Patent ID: 8730705

Claim:
A first semiconductor memory device, comprising: a) a receiver circuit configured to receive a search key and a search control signal from a second semiconductor memory device, wherein the second semiconductor memory device is a next semiconductor memory device below the first semiconductor memory device in an aligned vertical stack of a plurality of semiconductor memory devices; b) a search circuit configured to perform a search of the first semiconductor memory device in response to the received search key and the received search control signal; c) a first transmitter circuit configured to send the search key and the search control signal from the first semiconductor memory device to a third semiconductor memory device if the search of the first semiconductor memory device results in no match on the first semiconductor memory device, wherein the third semiconductor memory device is a next semiconductor memory device above the first semiconductor memory device in the aligned vertical stack of the plurality of semiconductor memory devices; and d) a second transmitter circuit configured to send a search result to the second semiconductor memory device if the search of the first semiconductor memory device results in a match on the first semiconductor memory device.