Patent ID: 8896063

Claim:
A semiconductor device comprising: a semiconductor material portion located directly on a portion of a topmost surface of an insulator layer; a plurality of semiconductor fins extending upward from, and directly contacting, a first portion of a topmost surface of said semiconductor material portion; a functional gate structure straddling each semiconductor fin and having bottommost surface portions in direct physical contact with a second portion of said topmost surface of said semiconductor material portion that lies adjacent and beneath each semiconductor fin; a gate spacer located on each sidewall of the functional gate structure and also straddling each semiconductor fin; and a semiconductor material located on each side of the functional gate structure and having a bottommost surface in direct physical contact with a third portion of said topmost surface of said semiconductor material portion that is located between each adjacent semiconductor fin, wherein the semiconductor material merges exposed portions of each adjacent semiconductor fin, and wherein the semiconductor material has two vertical side surfaces in direct contact with exposed sidewalls of each semiconductor fin, and two non-vertical and non-horizontal surfaces that converge at an apex that is located directly above said third portion of said topmost surface of said semiconductor material portion, wherein a thickness of the semiconductor material at the apex is greater than a thickness of the semiconductor material at either vertical side surface of the semiconductor material.