Patent ID: 8510598

Claim:
A method for providing reduced power consumption in a computer memory system, comprising: transferring, by a memory controller coupled to a volatile memory, a non-volatile memory, and a buffer, first data from the volatile memory to the buffer, wherein the buffer stores less data than either of the volatile memory and the non-volatile memory, wherein the memory controller controls data transfers between the volatile memory, the buffer, and the non-volatile memory; placing, by the memory controller, the volatile memory into self-refresh mode after transferring the first data to the buffer; and conveying, by the memory controller, the first data from the buffer to the non-volatile memory, wherein the amount of first data in the buffer exceeds a predetermined threshold, wherein while conveying the first data from the buffer to the non-volatile memory, the memory controller takes the volatile memory out of self-refresh mode when the amount of first data remaining in the buffer reaches the predetermined threshold, wherein the volatile memory is ready to transfer second data to the buffer when the memory controller is finished transferring the first data from the buffer to the non-volatile memory.