Patent ID: 6879003

Claim:
An electrostatic discharge (ESD) protection MOS device, comprising: a silicon substrate of first conductivity type; an epitaxial silicon layer of said first conductivity type grown on said silicon substrate; a first ion well of said first conductivity type disposed in said epitaxial silicon layer; a second ion well of said second conductivity type disposed in said epitaxial silicon layer, said second ion well encompassing said first ion well and laterally isolating said first ion well; a buried layer of said second conductivity type disposed at interface between said silicon substrate and said epitaxial silicon layer, wherein said buried layer borders said second ion well, thereby fully isolating said first ion well; a first isolation structure consisting of a gate insulating layer and a field oxide layer, wherein said first isolation structure is formed on said epitaxial silicon layer between said first and second ion wells; a gate laid over said gate insulating layer and field oxide layer; a second isolation structure spaced apart from said first isolation structure, said second isolation structure being formed on said second ion well; a source doping region of said second conductivity type disposed in said first ion well between said gate insulating layer and said second isolation structure; and a drain doping region of said second conductivity type disposed in said second ion well between said field oxide layer and said second isolation structure.