Patent ID: 8358548

Claim:
A method for efficiently repairing embedded dynamic random-access memory having marginally failing cells, the method comprising: identifying a number of available redundant columns and a number of available redundant rows; setting a respective flag representing a state of repairability for each of a column and a row; applying a test pattern to a memory under test to identify failed cells; for each failed cell, recording a column address; decreasing a supply voltage by a predetermined voltage; identifying any additional failed cells in a column identified by the column address, wherein when an additional cell failure is identified in the column, marking the column for repair; decrementing the number of available redundant columns; incrementing the supply voltage by the predetermined voltage; repairing any column marked for repair; applying the test pattern to the memory under test to identify failed cells; for each failed cell, recording a row address; identifying any additional failed cell in a row identified by the row address, wherein when an additional cell failure is identified in the row, marking the row for repair; decrementing the number of available redundant rows; repairing any row marked for repair; applying the test pattern to the memory under test to identify failed cells; for each failed cell, use a redundant row to repair the failed cell; decrementing the number of available redundant rows until the available redundant rows are exhausted, wherein when available redundant columns have not been exhausted, using a redundant column to repair the failed cell and decrementing the number of available redundant columns.