Patent ID: 7700290

Claim:
A method of manufacturing a DNA (deoxyribonucleic acid) chip having a plurality of transistors formed on a substrate and an organic layer and a DNA probe sequentially stacked on a gate of the transistor, the method comprising: forming an inter-layer insulation layer on the substrate to cover the transistors, and planarizing the inter-layer insulation layer; forming at least two contact holes exposing gate electrodes of the transistors, in the inter-layer insulation layer; selectively forming organic layers directly on the exposed gate electrodes; attaching a first DFR (dry film resist) layer to the upper surface of the inter-layer insulation layer to cover the contact holes; removing a portion of the first DFR layer covering a first contact hole among the contact holes; attaching a first DNA probe directly to the organic layer in the first contact hole; and removing a remaining portion of the first DFR layer.