Patent ID: 7420819

Claim:
An expanding high speed transport interface hardware method for motherboard, applied to a motherboard having a plural CPU structure, a CPU bus with high speed transport interface being used to connect a first CPU socket and a second CPU socket of the motherboard, the method comprising steps of: providing a mezzanine card having a pin grid array disposed on a bottom surface of the mezzanine card, number of contact pins of the pin grid array being less then that of pin holes of the second CPU socket, and a top surface of the mezzanine card having a chip socket with a high speed transport interface being electrically connected with the pin grid array; installing an expanding hardware with high speed transport interface in the chip socket; inserting the mezzanine card into the idle second CPU socket, to make the pin grid array to electrically connect with the pin holes of the second CPU socket, so that the pin holes of the first CPU socket can be electrically connected with the expanding hardware with high speed transport interface through electrically connecting with the CPU bus, the second CPU socket, the pin grid array, and the chip socket; and activating the motherboard, the motherboard detecting the mezzanine card and the expanding hardware and setting the CPU bus as a data transmission path between the mezzanine card and the expanding hardware.