Patent ID: 8766275

Claim:
A composite semiconductor device, comprising: a first terminal receiving a first voltage; a second terminal receiving a second voltage lower than said first voltage; a third terminal selectively provided with any one of a third voltage and a fourth voltage higher than the third voltage; a normally-on first field effect transistor having a drain connected to said first terminal and a gate connected to said second terminal; a normally-off second field effect transistor having a drain connected to a source of said first field effect transistor, a source connected to said second terminal, and a gate connected to said third terminal, rendered non-conductive when said third voltage is provided to said third terminal, and rendered conductive when said fourth voltage is provided to said third terminal; and a protection circuit connected in parallel to said second field effect transistor, for protecting said second field effect transistor by maintaining a voltage across the drain and the source of said second field effect transistor to a voltage not higher than a withstand voltage of said second field effect transistor, said protection circuit including N (N being a natural number) unipolar rectifier elements connected in series between the drain and the source of said second field effect transistor in a forward direction and rendered conductive when a voltage across the drain and the source of said second field effect transistor exceeds a predetermined voltage not higher than a withstand voltage of said second field effect transistor.