Patent ID: 8248829

Claim:
A three-phase pulse-width-modulated (PWM) converter system, comprising: a power stage comprising: a first phase leg comprising an upper switch and a lower switch; a second phase leg comprising an upper switch and a lower switch; a third phase leg comprising an upper switch and a lower switch; a first current sensor configured to measure a dc-link current; a second current sensor, wherein the second current sensor is configured to measure (a) the current in the first leg plus the current in the second leg, (b) the current in the upper switch of the first phase leg plus the current in the upper switch of the second phase leg, (c) the current in the lower switch of the first phase leg plus the current in the lower switch of the second phase leg, (d) the current in the upper switch of the first phase leg plus the current in the lower switch of the second phase leg, or the current in the lower switch of the first phase leg plus the current in the upper switch of the second phase leg; a third current sensor, wherein the third current sensor is configured to measure (a) the current in the second leg plus the current in the third leg, (b) the current in the upper switch of the second phase leg plus the current in the upper switch of the third phase leg, (c) the current in the lower switch of the second phase leg plus the current in the lower switch of the third phase leg, (d) the current in the upper switch of the second phase leg plus the current in the lower switch of the third phase leg, or the current in the lower switch of the second phase leg plus the current in the upper switch of the third phase leg; and a fourth current sensor, wherein the fourth current sensor is configured to measure (a) the current in the first leg plus the current in the third leg, (b) the current in the upper switch of the first phase leg plus the current in the upper switch of the third phase leg, (c) the current in the lower switch of the first phase leg plus the current in the lower switch of the third phase leg, (d) the current in the upper switch of the first phase leg plus the current in the lower switch of the third phase leg, or the current in the lower switch of the first phase leg plus the current in the upper switch of the third phase leg; and a control logic configured to: sample a current from the power stage; store a switching state in a state stack; store the sampled current into a current stack if the sampled current comes from a survived sensor and is one of the phase currents from the switching state in the state stack; and construct an unknown phase current by using the previously stored currents along with the sampled current to calculate the unknown phase current.