Patent ID: 7908576

Claim:
A method for progressively prototyping and validating a customer's electronic system design (ESD) with design data partitioned into a plurality of hierarchical design elements HDE i (i=1, 2, . . . , M with M≧1) and their respective interconnecting networks and test benches, said ESD further coupling and interacting with a plurality of customer's existing customer peripheral devices CPD j (j=1, 2, . . . , N with N≧1) via their corresponding peripheral interface terminals PIT j (j=1, 2, . . . , N) thus forming a correspondingly interconnected hierarchical system elements HSE k (k=1, 2, . . . , K with k≧1) interacting with one another according to a pre-defined hierarchically structured functional validation specification, said hierarchical system elements HSE k further forming a plurality of system hierarchy levels SHL m (m=1, 2, . . . , P with m≧1), the method comprises: a) providing a reprogrammable logic device (RPLD) having: an RPLD-interface for configuring and programming said RPLD to implement functionally at least a portion of said hierarchical design elements; and a plurality of programmable external interfaces PXIF j (j=1, 2, . . . , N) respectively connected to said PIT j (j=1, 2, . . . , N); b) providing a simulation software tool for reading the design data, simulating then verifying each of said HDE i , in conjunction with said test benches; c) disabling said PXIF j (j=1, 2, . . . , N) via the RPLD-interface and, for each PXIF k so disabled, identifying those HDE i having a network connection thereto then appending their test benches with stimulus and response to form appended test benches reflecting the interactive behavior of the corresponding CPD k ; and d) progressively verifying and validating the set HSE k (k=1, 2, . . . , K) by: d1) identifying a set of HSE candidates, each being not yet verified and validated and each having no interconnection to another HSE at a lower system hierarchy level that is not yet verified and validated; d2) verifying and validating each member of the HSE candidate set, together with its corresponding hierarchical design elements and customer peripheral devices, with said simulation software in conjunction with said test benches, and said appended test benches, said RPLD and said functional validation specification; and d3) repeating steps d1) and d2) till all members of the set HSE k (k=1, 2, . . . , K) are verified and validated whereby complete and validate an RPLD prototype against the functional validation specification.