Patent ID: 8686539

Claim:
A shielded inductor, comprising: a deep-well noise shield that includes a first well disposed within a second well that is disposed within a substrate of an integrated circuit, wherein the second well includes: a peripheral well that contiguously surrounds a periphery of the first well; a deep-well layer, wherein the peripheral well and the deep-well layer are coupled together and provide a junction that separates the first well and the substrate; and a plurality of slot wells that are distributed inside the periphery of the first well, wherein each slot well and the deep-well layer are coupled together; wherein boundaries of each slot well are defined by a respective first portion and a respective second portion, each respective first portion having a length that is at least three times greater than a width of the respective first portion and a depth that extends from the deep-well layer to a surface of the substrate, each respective second portion having a length that is at least three times greater than a width of the respective second portion and a depth that extends from the deep-well layer to the surface of the substrate, the length of each respective first portion oriented perpendicular to the length of the respective second portion, the length of each respective first portion oriented perpendicular to a respective proximate portion of a plurality of conductive loops, and the length of each respective second portion oriented perpendicular to a respective proximate portion of the plurality of conductive loops; wherein the first well and the substrate have a first dopant type, and the peripheral well, the deep-well layer, and the slot wells have a second dopant type that is complementary to the first dopant type; and the plurality of conductive loops disposed on the deep-well noise shield for isolating a noise coupling between the plurality of conductive loops and the substrate.