Patent ID: 8405428

Claim:
A semiconductor integrated circuit comprising: a first transistor of a first conductivity type including a source connected to a first power supply node that supplies a first voltage, a gate, and a drain, the gate and drain being connected to a first node; a second transistor of the first conductivity type including a source connected to the first power supply node, a drain connected to a signal output node, and a gate connected to the first node; a third transistor of a second conductivity type including a drain connected to the drain of the first transistor, and a gate provided with either a first external input signal with a variable voltage level, or a second external input signal with a fixed level; a fourth transistor of the second conductivity type including a drain connected to the drain of the second transistor, a source connected to a source of the third transistor, and a gate provided with either the first external input signal or the second external input signal, the signal provided to the gate of the fourth transistor being a signal other than a signal provided to the gate of the third transistor; a constant current source circuit including one end connected to a second node as sources of the third and fourth transistors, and the other end connected to a second power supply node that supplies a second voltage different from the first voltage; and a clamp circuit configured to forma current path between the second node and the second power supply node, and adjust the potential of the second node to a certain potential when the first external input signal is switched from a first state to a second state.