Patent ID: 7765675

Claim:
A method of making a current-perpendicular-to-plane (CPP) read sensor having a constrained current path, the method comprising the acts of: forming a sensor stack structure; performing a lithographic process to form a current-constraining structure adjacent an electrically conductive layer of the sensor stack structure, the current-constraining structure comprising a plurality of lithographically-defined conductive vias surrounded by insulator materials, the lithographic process comprising the further acts of: forming an insulator layer over the electrically conductive layer; forming a resist structure over the insulator layer which exposes insulator materials of the insulator layer; etching, with the resist structure in place, to remove the exposed insulator materials to form a plurality of apertures to the electrically conductive layer; and forming electrically conductive materials within the plurality of apertures for forming the lithographically-defined conductive vias, each lithographically-defined conductive via having a width that is less than a trackwidth of the read sensor to be formed from the sensor stack structure and is located within boundaries defined by the trackwidth of the read sensor.