Patent ID: 7737792

Claim:
A phase locked loop circuit comprising: a phase frequency comparator; a charge pump; a loop filter; a selector; a voltage controlled oscillator; a frequency divider; and an adjustment unit, wherein the phase frequency comparator compares a reference signal with a feedback signal that is outputted from the frequency divider to output a phase difference signal, and inputs the phase difference signal to the voltage controlled oscillator through the charge pump, the loop filter, and the selector as a control voltage to control a frequency and a phase of an output signal from the voltage controlled oscillator to given values, wherein the voltage controlled oscillator is capable of setting a frequency sensitivity of the output signal and an upper limit frequency of the output signal with respect to the control voltage to arbitrary values, and wherein the adjustment unit is capable of adjusting the frequency sensitivity and the upper limit frequency of the output signal of the voltage controlled oscillator according to an adjustment signal, wherein the selector is capable of selecting the control voltage, a first reference voltage, and a second reference voltage according to a select signal, and outputting the control voltage, wherein the voltage controlled oscillator is capable of inputting the control voltage, a base voltage, a trimming signal, a limit signal, and a gain signal, changing the frequency of the output signal according to the control voltage, limiting the upper limit frequency of the output signal, and changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, the upper limit frequency of the output signal according to the limit signal, and the upper limit frequency limit characteristic according to the gain signal, respectively, and wherein the frequency divider is integrated with the adjustment unit, has a controller that automatically adjusts the frequency sensitivity of the voltage controlled oscillator, the upper limit frequency of the output signal, and the upper limit frequency limit characteristic so as to satisfy a desired characteristic before the frequency and the phase of the output signal start the control, inputting the output signal and the reference signal, dividing the output signal, outputting the feedback signal, and outputting the select signal, the trimming signal, the limit signal, and the gain signal from the output signal.