Patent ID: 7116127

Claim:
A circuit comprising: a first switch connected to a first voltage and responsive to a first pulse signal; a second switch connected to a second voltage and responsive to a second pulse signal; a fuse connected between the first switch and the second switch; and a signal generating circuit responsive to a control signal and configured to generate the first and second pulse signals, wherein the first pulse signal and the second pulse signal are configured to turn off the first switch in advance of turning on of the second switch and to turn on the first switch after the second switch is turned off, wherein the signal generating circuit includes: a first pulse signal generating circuit configured to raise the first pulse signal to the logic “high” level in response to a rising edge of the control signal and configured to lower the first pulse signal to the logic “low” level after a predetermined delay time once the control signal transitions to the logic “low” level; and a second pulse signal generating circuit configured to raise the second pulse signal to the logic “high” level after the first signal is raised to the logic “high” level and configured to lower the second pulse signal to the logic “low” level in response to a falling edge of the control signal.