Patent ID: 8200997

Claim:
A computer wake up circuit, comprising: a first control circuit comprising an input terminal configured to receive a first control signal from a first serial device, and an output terminal coupled to a south bridge which is capable of waking up a computer; and a second control circuit comprising an input terminal respectively coupled to a second serial device and an I/O controller, and an output terminal coupled to the south bridge; the second control circuit is configured to receive a second control signal from the second serial device; wherein the first and second control circuits respectively are configured to output a wake up signal to the south bridge to wake up the computer according to the control signals, the I/O controller is configured to communicate with the second serial device through the second control circuit and to output other control signals to control operations of the second serial device; the second control circuit comprising a first switch capable of preventing the control signals from the I/O controller being transmitted to the south bridge.