Patent ID: 7594098

Claim:
A compression process for executable code by a microprocessor, comprising: decomposition of the executable code into words, division of the executable code words into lines of a predefined number of instructions, decomposition of each line of executable code into a first executable part and a second executable part; compression of each first executable part into a first compressed part having a fixed length and compression of each second executable part into a second compressed part having a variable length, said variable length being defined by said first compressed part, all of said first compressed parts being stored in a first group of blocks and all of said second compressed parts being stored in a second group of blocks, creating an addressing table for providing an address for each of said second compressed parts, wherein the addressing table comprises one input per block of second compressed parts, each input specifying the position of a second compressed part in said block and further specifying the respective lengths of each compressed part in the block except for the last such compressed part in the block, the length of such part being determined by the position of the second compressed part in a following block.