Patent ID: 8039939

Claim:
A semiconductor package comprising: a printed circuit board (PCB) including a first surface and a second surface, the first surface of the PCB including a recess portion recessed toward the second surface of the PCB, the recess portion including a recess bottom surface provided by the PCB; a through electrode penetrating the PCB; a semiconductor device disposed in the recess portion of the PCB, mounted to the recess bottom surface, the semiconductor device including a bonding pad exposed in a direction of the first surface of the PCB, wherein the semiconductor device is a first semiconductor device; a bump disposed on the bonding pad, exposed in the direction of the first surface of the PCB; a substrate including a first surface and a second surface, positioned opposite the recess portion, the first surface of the substrate including a connection electrode pattern that is electrically connected to the bump and the through electrode, the substrate having a penetrated opening; a second semiconductor device electrically connected to the connection electrode pattern through the opening of the substrate; and a molding portion to cover the second semiconductor device and the second surface of the substrate.