Patent ID: 7751422

Claim:
An apparatus, comprising: an integrated circuit (IC) capable of receiving one or more packets from at least one external device and storing one or more packets in at least one queue in external memory, said IC comprising: content addressable memory (CAM) comprising a plurality of registers; memory interface circuitry capable of communicating with the external memory, said memory interface circuitry comprising a queue array capable of storing a plurality of queue descriptors, at least one queue descriptor comprising at least one pointer to point to the location of a queue in said external memory; and queue array management circuitry capable of grouping a plurality of queues to form a group of queues, generating a group tag that associates the group of queues, storing said group tag in a register of the CAM, and mapping the queue descriptors for each queue in the group of queues into the queue array, said group tag pointing to each of the queue descriptors in the queue array.