Patent ID: 7210955

Claim:
A fully buffered electrical connector for a memory module, comprising: an elongate primary housing having a module receiving slot extending through an upper face of said housing, and extending longitudinally along a length of said housing, and said housing further comprising first and second sidewalls extending along the length of said housing; an array of electrical terminals opposing said slot for interconnection with a memory module; and an alignment plate to retain the terminals in place; said array of electrical terminals generally comprising individual terminals with each comprising a printed circuit board contact extending downwardly from one end of an intermediate base portion, and an upper contact extending upwardly from the opposite end of said base portion, and the base portions of the terminals extending only between said upper and printed circuit board contacts, and said base portions being trapped between a lower face of said housing and an upper face of said alignment plate, said array of electrical terminals comprising a first subset of terminals having first printed circuit board contacts adjacent said first sidewall, with first base portions extending towards said module receiving slot, and with first upper contacts extending upwardly adjacent to said module receiving slot; and a second subset of terminals having second printed circuit board contacts adjacent the module receiving slot, with second base portions extending towards said second sidewall, with second upper contacts extending upwardly and redirected to a position adjacent to said module receiving slot.