Patent ID: 7667544

Claim:
A clock reproducing apparatus comprising: a pulse forming circuit which receives input data and forms a pulse from the input data; and a clock reproducing circuit, wherein the clock reproducing circuit includes: a gated oscillator; and a frequency control circuit for comparing a phase of an output of the gated oscillator with a phase of a reference clock, and supplying a phase control signal to the gated oscillator based on the comparison result so as to set a delay time, and wherein an output of the pulse forming circuit resets the gated oscillator, and wherein an output of the gated oscillator is provided as a clock reproducing output, characterized in that the gated oscillator comprises at least two delay units, wherein each of the delay units is connected to the reset input terminal of the gated oscillator, and wherein each delay unit comprises two routes being alternately activated depending on the input data, and wherein the input data are either “H” or “L”, characterized in that the pulse forming circuit is a differentiating circuit for differentiating the input data.