Patent ID: 7560389

Claim:
A method for fabricating a semiconductor element on a semiconductor substrate having a support substrate and a semiconductor layer above said support substrate, the method comprising: preparing said semiconductor substrate having a transistor formation region and an element isolation region both defined thereon; forming a pad oxide film on the semiconductor layer of said semiconductor substrate; forming an oxidation-resistant mask layer on said pad oxide film; forming a resist mask on said oxidation-resistant mask layer to cover said transistor formation region; performing a first etching process for etching said oxidation-resistant mask layer using said resist mask as a mask to expose the pad oxide film of said element isolation region; performing a second etching process for etching, using said resist mask, with a selection ratio against an oxidized film that is higher than a selection ratio against the oxidized film in said first etching process, to remove a residue of said oxidation-resistant mask layer left on the pad oxide film exposed after said first etching process; removing said resist mask to expose said oxidation-resistant mask layer over said transistor formation region; and oxidizing said semiconductor layer below the pad oxide film by LOCOS using said exposed oxidation-resistant mask layer as a mask to form an element isolation layer, wherein the etching in said first etching process is anisotropic etching with a gas mixture of a CF 4 gas and a HBr gas, and a biasing RF power of 10 W or more and less than 40 W to control ion energy to be applied to a cathode electrode, and the etching in said second etching process is anisotropic etching with a SF 6 gas replacing the CF 4 gas and a biasing RF power of 0 W.