Patent ID: 8873268

Claim:
A One-Time Programmable (OTP) memory, comprising: a plurality of OTP cells, at least one of the cells comprising: an OTP element coupled to a first supply voltage line; a diode including at least a first active region and a second active region, where the first active region having a first type of dopant and a second active region having a second type of dopant, the first active region associated with a first terminal of the diode, the second active region associated with a second terminal of the diode, both the first and second active regions residing in a common well, the first active region coupled to the OTP element and the second active region coupled to a second supply voltage line, wherein the first and second active regions being fabricated from sources or drains of CMOS devices, and the well is fabricated from wells in CMOS technologies, and wherein the OTP element is configured to be programmable by applying voltages to the first and the second supply voltage lines to thereby change its logic state, wherein the first and second active regions are separated by at least one of shallow trench isolation, a dummy CMOS gate, or a silicide block layer.