Patent ID: 6906370

Claim:
A semiconductor component, comprising: a first metal layer forming a first metal area and a second metal area electrically insulated from one another; a dielectric layer; a second metal layer produced separately from said first metal layer and forming a third metal area insulated from said first metal layer by an interposition of said dielectric layer, and said third metal area together with said dielectric layer and said first metal area forms a memory element, said second metal layer further forming a fourth metal area which together with said second metal area forms a contact area used to make contact with said second metal layer and said second metal layer having an electrically conductive connection between said third metal area and said fourth metal area; an insulation layer covering said contact area and said memory element and having at least one opening formed therein and leading to said contact area; and an electrically conductive material filling said opening for making contact with said second metal layer.