Patent ID: 8161425

Claim:
A computer implemented method for implementing metal fill on an integrated circuit design of an electronic circuit, comprising: using at least one computer system which comprises at least one processor and is programmed for performing: identifying a set of candidate metal fill shapes for insertion on a first layer in an integrated circuit design for which metal fill insertion to improve the integrated circuit design; assigning cost values to the set of candidate metal fill shapes, the cost values based at least in part upon expected timing impact to the integrated circuit design; implementing the integrated circuit design on the first layer for fabrication of the electronic circuit by performing: selecting and inserting one or more candidate metal fill shapes on the first layer from the set of candidate metal fill shapes, in which lower cost candidate metal fill shapes are selected for insertion prior to higher cost candidates, and existence of one or more existing metal fill geometries that already exist on the first layer is ignored during the act of implementing the integrated circuit design as if the one or more existing metal fill geometries were not existing in the integrated circuit design; performing metal fill repair.