Patent ID: 8046128

Claim:
A fault clearing system for an engine control system, comprising: a plurality of processor modules operable to control and monitor an engine including an electronic throttle control (ETC) module operable to control and monitor a throttle of said engine, said processor modules setting faults based on outputs from a plurality of engine sensors and ETC sensors; and an ETC diagnostic module that monitors said ETC sensors and said engine sensors, said ETC diagnostic module setting a low voltage induced fault, and entering one of a plurality of low voltage states in response to said low voltage induced fault, wherein said ETC diagnostic module controls said ETC module to selectively clear said faults in said ETC module and said plurality of processor modules upon entry into said one of said low voltage states, wherein said plurality of low voltage states of said ETC diagnostic module includes (i) a low power state selected by said ETC diagnostic module when a limited-power mode has already been selected by said ETC module, wherein said low power state disables said fault clearing system and said ETC module and said engine remain in said limited-power mode, and (ii) a crank transition state selected by said ETC diagnostic module when: monitored voltages received from said engine sensors and said ETC sensors are above a first calibration voltage for more than a first calibration time, so long as the ETC diagnostic module is not already in a low voltage non-cranking state; said monitored voltages received from said engine sensors and said ETC sensors are below a second calibration voltage; monitored engine RPM is below a calibration RPM; and an engine starter is currently cranking and has been cranking for less than a second calibration time.