Patent ID: 7848174

Claim:
A word-line tracking system for a memory array having a plurality of memory cells, the word-line tracking system comprising: a dummy row of the memory cells having substantially identical structure as one or more regular rows of the memory cells, the dummy row including a dummy word-line having a first and a second end at the opposite longitudinal ends of the dummy word-line, the first end being connected to a word-line driver; a self timing generator configured to receive a clock signal and generate a pulse signal in sync with the clock signal for the dummy word-line driver, the self timing generator having a first terminal for receiving a feedback signal and operative to determine a falling edge of the pulse signal; a voltage-to-current converter connected to the second end of the dummy word-line; a current-to-voltage converter connected to the first terminal; and a wire connecting the voltage-to-current converter to the current-to-voltage converter.