Patent ID: 7683979

Claim:
A multi-domain vertical alignment (MVA) pixel structure, comprising: a substrate; a plurality of scan lines, disposed on the substrate; a plurality of data lines, disposed on the substrate; a plurality of common lines, disposed on the substrate; and a plurality of pixel units, disposed on the substrate, each of the pixel units comprising: a first pixel electrode; a second pixel electrode; a third pixel electrode; and an active device with multiple drains, comprising at least a gate, a patterned source, a first drain, a second drain, and a third drain; wherein the gate is electrically connected to the corresponding scan line, the patterned source is electrically connected to the corresponding data line, the first drain is electrically connected to the first pixel electrode, the second drain is electrically connected to the second pixel electrode, the third drain is electrically connected to the third pixel electrode, the third pixel electrode is electrically connected to the corresponding common line, and the gate, the patterned source, and the first drain form the first active device, the gate, the patterned source, and the second drain form the second active device, the gate, the patterned source, and the third drain form the third active device, and a display voltage difference between the first pixel electrode and the second pixel electrode relates to device size features of the second active device and the third active device.