Patent ID: 7827017

Claim:
A computer implemented method for implementing an independent parameterized measurement block for an integrated circuit design, comprising: generically defining the independent parameterized measurement block which is reusable in a plurality of circuit designs, in which the independent parameterized measurement block is configured to prevent direct access and permit indirect access to circuit design components or circuit design topology from within the independent parameterized measurement block, wherein the indirect access comprises accessing the circuit design components or circuit design topology of the integrated circuit design by passing information about the circuit design components or circuit design topology as one or more parameters to the independent parameterized block; and permit direct access to a generic circuit attribute common to a plurality of integrated circuits from within the independent parameterized measurement block; defining a probe to be used with the independent parameterized measurement block; specifying a measurement point as a parameter using a probe, the probe being a function or operation which is used with the independent parameterized measurement block to handle a variation in the integrated circuit in applying the independent parameterized measurement block; configuring, by using the independent measurement block, a test fixture; specifying, by using the independent measurement block, a parameterized stimulus for the test fixture; performing, by using a processor, simulation upon the test fixture; analyzing simulation output data to compute a desired performance metric; and displaying the parameterized stimulus on a display apparatus or storing the parameterized stimulus in a tangible computer usable storage medium or a storage device for use in the integrated circuit design.