Patent ID: 7045460

Claim:
A method for manufacturing a packaging substrate, comprising: providing a substrate having at least one through hole formed thereon; coating a first conductive layer on a top surface and a bottom surface of said substrate, and on sidewall of said through hole; performing a lithographic and etching process to pattern said first conductive layer into a first wire pattern on said top surface of said substrate and a second wire pattern on said bottom surface of said substrate, wherein said first wire pattern and said second wire pattern are electrically connected to each other via said through hole; coating a solder mask on said top surface and said bottom surface of said substrate, and said solder mask filling said through hole; forming, in said solder mask, a first opening exposing a portion of said first wire pattern and a second opening exposing a portion of said second wire pattern; blanketing said top surface of said substrate with a second conductive layer, wherein said second conductive layer covers said solder mask and said first opening, and is electrically connected with said first wire pattern; coating a first insulating layer on said second conductive layer; and electroplating a third conductive layer on said second wire pattern within said second opening on said bottom surface of said substrate.