Patent ID: 7495291

Claim:
A semiconductor structure, comprising: a p-type field-effect-transistor (PFET) channel formed in a substrate; an n-type field-effect-transistor (nFET) channel formed in the substrate; a shallow trench isolation structure formed in the substrate; a first layer of material on and in physical contact with an Si layer of the substrate in the pFET channel having a lattice constant different than a lattice constant of the Si layer of the substrate; a second layer of material on and in physical contact with the Si layer of the substrate in the nFET channel having a lattice constant different than the lattice constant of the Si layer of the substrate; and an epitaxial semiconductor layer formed on and in physical contact with the first layer of material in the pFET channel and on and in physical contact with the second layer of material in the nFET channel, the epitaxial semiconductor layer having substantially a same lattice constant as the lattice constant of the Si layer of the substrate thus creating a desired stress component within the pFET channel and the nFET channel.