Patent ID: 7420814

Claim:
A package stack comprising: a first package including a first IC chip having an active surface and a back surface, and a first circuit substrate having a first major surface and a second major surface, wherein the active surface of the first IC chip faces and is electrically connected to the first major surface of the first circuit substrate; and a second package including a second IC chip having an active surface and a back surface, a second circuit substrate having a first major surface and a second major surface, and a first and second electrical connection means directly formed on the active surface of the second IC chip, wherein the back surface of the second IC chip faces and is disposed on the first major surface of the second circuit substrate and the active surface of the second IC chip is electrically connected to the first major surface of the second circuit substrate by the first electrical connection means; wherein the first package is stacked on the second package and the active surface of the second IC chip faces and is electrically connected to the second major surface of the first circuit substrate by the second electrical connection means.