Patent ID: 8455358

Claim:
A method of manufacturing a via hole in a semiconductor device structure, comprising: providing a semiconductor device structure including a substrate having opposed top and bottom surfaces, a semiconductor device layer disposed on the top surface of the substrate, and a device electrode disposed on a surface of the semiconductor device layer that is opposite and spaced from the top surface of the substrate; forming a multiple layer mask on the back surface of the substrate by sequentially forming, at the back surface of the substrate, a first mask layer having an opening aligned with the device electrode on the surface of the semiconductor device layer and exposing part of the back surface of the substrate, and a second mask layer having an opening that is aligned with and larger in area than the opening in the first mask layer, wherein the opening in the second mask layer exposes part of the first mask layer and the part of the back surface of the substrate exposed by the opening in the first mask layer, and the first and second mask layers have respective first and second thicknesses and the first thickness is smaller than the second thickness; etching, in a single continuous etching step, the back surface of the substrate in the opening of the first mask layer, the first mask layer exposed by the opening in the second mask layer, and part of the semiconductor device layer, including removing the part of the first mask layer exposed in the opening of the second mask layer to expose and etch an additional part of the back surface of the substrate during the etching, and, upon exposure of the semiconductor device layer, simultaneously etching the substrate and the semiconductor device layer, to form a via hole opening in the substrate and in the semiconductor device layer, wherein the via hole opening produced in the single continuous etching step has a stepped structure, with a larger-area portion and a smaller-area portion that is smaller in area than the larger-area portion, the via hole opening reaches the device electrode in the smaller-area portion of the via hole opening, and the first and second thicknesses are chosen so that the part of the back surface of the substrate that is exposed in the opening in the first mask layer is etched to a predetermined depth when the part of the first mask layer exposed in the opening in the second mask layer is removed in the etching, and so that the smaller-area portion of the via hole opening reaches the device electrode when the larger-area portion of the via hole opening reaches the semiconductor device layer; and filling the via hole opening with a thermally conductive material to form the via hole.