Patent ID: 8497668

Claim:
A power control system comprising: a power regulator having a plurality of power P-type metal oxide semiconductor (PMOS) transistors connected to a power source in parallel with each other and supplying currents and voltage being controlled according to a lamp voltage being input; a current sensing unit connected to the power source and sensing currents flowing through a plurality of target PMOS transistors located at predetermined positions among the plurality of power PMOS transistors; a current mirror unit connected to a first regulated voltage terminal and generating a plurality of currents equal to the currents sensed by the current sensing unit; a comparator unit totaling the plurality of currents generated by the current mirror unit to convert the totaled currents into a voltage, and generating a voltage difference between the voltage and a predetermined reference voltage; and a current bias circuit unit connected to a second regulated voltage terminal and controlling a bias current according to the voltage difference from the comparator unit.