Patent ID: 8886870

Claim:
A system comprising: a first memory configured to store a first lookup table (LUT) with first metadata, wherein the first metadata includes a first mapping between logical addresses and physical addresses; a second memory configured to store (i) a second LUT with second metadata, and (ii) third metadata, wherein the second metadata includes a second mapping between the logical addresses and the physical addresses, wherein the third metadata is dependent on the first metadata or the second metadata; and a control module configured to update the first metadata, update segments of the second metadata based on the first metadata at respective predetermined times, and wherein each of the segments of the second metadata refers to a predetermined number of entries in the second LUT, update the third metadata at a time that is different than the respective predetermined times, determine whether the second memory was last powered down properly, if the second memory was not powered down properly, determine whether LUT dependent metadata is stored in the second memory, set an upload timer subsequent to uploading a first segment from the second memory to the first memory, based on a time of the upload timer, update a logical-to-physical address association in the first LUT or upload a next segment from the second memory to the first memory, if there is LUT dependent metadata stored in the second memory, increment the upload timer if a full flush cycle of segments has not been uploaded, and upload the LUT dependent metadata based on the first LUT if a full flush cycle of segments has been uploaded, and if LUT dependent metadata is not stored in the second memory, increment the upload timer if an end of an event log has not been reached.