Patent ID: 7095073

Claim:
An integrated circuit metal-insulator-metal capacitor device comprising: (a) a semiconductor substrate, having a first dielectric insulator layer of the substrate; (b) a plurality of dual damascene trench and via openings in said first dielectric insulator layer for bottom metal electrodes; (c) bottom metal capacitor electrodes formed in trench and via openings flush with the surface of the first dielectric insulator layer; (d) a second dielectric insulator layer; (e) a plurality of dual damascene trench and via openings in said second dielectric insulator layer; (f) a metal barrier layer over the second dielectric insulator layer; (g) a high dielectric constant insulator in trench and via openings over the metal barrier layer, wherein said insulator is for the capacitors and is a super lattice stack of atomic unit cells; (h) top metal capacitor electrodes formed over said high dielectric constant insulator, and filling trench and via openings, planar to the surface of the second dielectric insulator layer, completing metal-insulator-metal capacitor structures.