Patent ID: 8111769

Claim:
Apparatus for generating trellis-coded digital television signals that include more robust symbol coding using symbols selected from a full 8VSB symbol alphabet consisting of −7, −5, −3, −1, +1, +3, +5 and +7 normalized modulation levels superposed on a background modulation level, said apparatus for generating trellis-coded digital television signals comprising: data randomization apparatus connected for randomizing the bits of MPEG-2-compliant 187-byte data packets to generate respective 187-byte packets of randomized data; a Reed-Solomon forward-error-correction encoder connected for Reed-Solomon forward-error-correction encoding each of said 187-byte packets of randomized data to generate a respective one of 207-byte lateral Reed-Solomon codewords, each consisting of 187 data bytes plus twenty parity bytes; a time-division multiplexer connected for assembling data fields of prescribed size and for arranging within said data fields of prescribed size 207-byte half-normal-code-rate data segments generated by a code-rate reduction encoder together with ones of any 207-byte data segments corresponding to said 207-byte lateral Reed-Solomon codewords that are to be transmitted at normal code rate; a convolutional byte interleaver connected for convolutionally interleaving said 207-byte data segments as so arranged in said data fields, thereby to generate convolutionally interleaved data bytes; a trellis encoder connected for generating 2/3 trellis coding responsive to said convolutionally interleaved data bytes; and apparatus for mapping said 2/3 trellis coding to eight-level symbols, inserting synchronizing symbols and introducing an offset level into the resulting stream of symbols for engendering said background modulation level, wherein some of succeeding bits that said code-rate-reduction encoder respectively inserts after original bits of each of said 207-byte lateral Reed-Solomon codewords that is to be transmitted at one-half of normal code rate are ZEROs and the rest are ONEs in accordance with a prescribed pattern dependent on the position said inserted bits will occupy in said data fields and independent of said original bits that said inserted bits succeed.