Patent ID: 7639167

Claim:
A digital-to-analog converter comprising: a differential amplifier including: first and second input terminals; an output terminal; first and second differential pairs, said first differential pair having first and second inputs constituting an input pair connected to said first input terminal and said output terminal, respectively; said second differential pair having first and second inputs constituting an input pair connected to said second input terminal and said output terminal, respectively; first and second current sources for supplying the current to said first and second differential pairs; a load circuit connected to output pairs of said first and second differential pairs, for outputting a signal obtained by combining outputs of said first and second differential pairs from at least one of a pair of connection nodes between said output pairs of said first and second differential pairs and said load circuit; an amplifier stage for receiving at least one signal at connection nodes of said output pairs of said first and second differential pairs and said load circuit and outputting a voltage to said output terminal; and a selection circuit for receiving a plurality of voltages different from one another, selecting, from among said voltages different from one another, two voltages, including a same voltage, based on an input digital signal, and supplying the selected two voltages to said first and second input terminals of said differential amplifier, one output voltage being output for a combination of said two voltages selected by said selection circuit, wherein said selection circuit receives first to fourth voltages (A, B, C and D), different from one another, and selects anyone pair of voltages out of a plurality of pairs of voltages consisting of: (1) the first and first voltages (A,A); (2) the first and second voltages (A,B); (3) the second and second dvoltages (B,B); (4) the first and third voltages (A,C); (5) the second and third voltages (B,C) or the first and fourth voltages (A, D); (6) the second and fourth voltages (B,D); (7) the third and third voltages (C,C); (8) the third and fourth voltages (C,D); and (9) the fourth and fourth voltages (D,D), wherein up to nine different voltage levels are able to be output at said output terminal.