Patent ID: 7078962

Claim:
A circuit comprising: a first bipolar transistor having a base coupled to a positive input node; a second bipolar transistor having a base coupled to a negative input node; a third bipolar transistor having a collector and a base coupled together and having an emitter coupled to an emitter of the first bipolar transistor; a fourth bipolar transistor having a base coupled to the base of the third bipolar transistor and having an emitter coupled to an emitter of the second bipolar transistor; a fifth bipolar transistor having a base coupled to the positive input node; a sixth bipolar transistor having a base coupled to the negative input node; a seventh bipolar transistor having a collector and a base coupled together and having an emitter coupled to an emitter of the sixth bipolar transistor; an eighth bipolar transistor having a base coupled to the base of the seventh bipolar transistor; a ninth bipolar transistor having collector and a base coupled together, the collector and base further coupled to a collector of the fourth bipolar transistor and a collector of the eighth bipolar transistor; a tenth bipolar transistor having a base coupled to the base of the ninth bipolar transistor; a first current source coupled to the collector of the third bipolar transistor and to an emitter of the ninth bipolar transistor; a second current source coupled to the emitter of the ninth bipolar transistor, and to the collector and base of the seventh bipolar transistor, and to an emitter of the tenth bipolar transistor; and a current output node defined by a collector of the tenth bipolar transistor for outputting a dynamic bias current.