Patent ID: 8084334

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: (a) providing a semiconductor wafer having a substrate including a front surface, an interlayer insulating film formed on the front surface of the substrate, a first chip region formed over the front surface of the substrate, a second chip region formed over the front surface of the substrate and arranged next to the first chip region, a cutting region formed over the front surface of the substrate and formed between the first chip region and the second chip region in a plan view, a metal pattern formed over the front surface of the substrate and formed in the cutting region in the plan view and arranged between the first chip region and the second chip region in the plan view, and a back surface opposite to the front surface, wherein the interlayer insulating film has a wiring layer and a low-dielectric constant film, wherein the substrate is comprised of a silicon, and wherein the low-dielectric constant film is more brittle than the substrate; (b) after the step (a), removing the metal pattern by running a dicing saw along the cutting region; (c) after the step (b), attaching a back grind (BG) tape to the front surface of the semiconductor wafer, and grinding the back surface of the semiconductor wafer; (d) after the step (c), forming a modified region in the cutting region of the semiconductor wafer by irradiating along the cutting region with a laser; and (e) after the step (d), attaching a dicing tape to the back surface of the semiconductor wafer, and removing the back grind (BG) tape from the semiconductor wafer; (f) after the step (e), separating the first chip region from the second chip region by expanding the dicing tape attached to the back surface of the semiconductor wafer.