Patent ID: 8013361

Claim:
A semiconductor device comprising: an isolation insulating film formed in a substrate; a first region in the substrate surrounded by the isolation insulating film; a second region in the substrate surrounded by the isolation insulating film and arranged with the isolation insulating film sandwiched between the first and second regions; a first gate electrode extending across the first region and the isolation insulating film onto the second region; a well of a first conductivity type having an upper portion including a lower portion of the first region, a lower portion of the second region, and a lower portion of the isolation insulating film formed between the first and second regions; first impurity diffusion regions of the second conductivity type located to both sides of the first gate electrode of the first region and formed in direct contact with the well of the first conductivity type; second impurity diffusion regions of the first conductivity type located to both sides of the first gate electrode of the second region and formed in direct contact with the well of the first conductivity type; a shared contact passing through an interlayer insulating film formed on the substrate and connected to the first gate electrode and the second impurity diffusion region; and an interconnect formed on the interlayer insulating film and connected to the shared contact.