Patent ID: 7076721

Claim:
An information recording/readback circuit including: a maximum likelihood sequence decoding circuit receiving a readback signal sequence from a recorded information medium as input, performing conversion into a readback data code series corresponding to said recorded information, and outputting results of said conversion; and an error data detection/correction circuit receiving said converted readback data code series as input, checking for presence of decoding error data codes (readhack data codes not corresponding to said recorded information) in said readback data code series, and correcting and outputting said detected decoding error data code as correct data code; wherein partial code information (code position and code values) of said readback data code sequence detected by said error data detection/correction circuit is fed back to said maximum-likelihood sequence decoding circuit as input; and said maximum-likelihood sequence decoding circuit uses said partial code information and repeatedly converts said readback signal sequence into said readback data code sequence, and wherein the repeated conversion in said maximum-likelihood sequence decoding circuit is done using the readback signal sequence corresponding to said recorded information again read from said recorded information medium (in retry mode).