Patent ID: 7998796

Claim:
A method for manufacturing a semiconductor device, comprising the steps of: (a) mounting a semiconductor chip over a first surface of a wiring board; (b) coupling a plurality of electrodes formed at the wiring board and a plurality of bonding pads formed at the semiconductor chip by a plurality of wires respectively; (c) sealing the semiconductor chip mounted over the first surface of the wiring board with a resin; and (d) applying solder paste onto a second surface opposite to the first surface of the wiring board via a mask thereby to form a plurality of first protruded electrodes, wherein the wiring board prepared before the step (a) is formed with: the electrodes formed at the first surface of the wiring board; a plurality of first lands formed at the first surface of the wiring board and provided so as not to overlap with the electrodes in a plan view; a plurality of first wirings which are formed at the first surface of the wiring board and electrically couple the electrodes and the first lands respectively; a plurality of vias which are respectively formed so as to be internally contained in the first lands in a plan view and extend through the wiring board; a plurality of second lands which are formed at the second surface corresponding to a surface opposite to the first surface of the wiring board and formed so as to internally contain the vias in a plan view and which are electrically coupled to the vias respectively; and a protective film formed at the second surface of the wiring board, the protective film having a plurality of first openings being larger in area than the second lands respectively and internally containing the second lands respectively, and wherein the step (d) forms the first protruded electrodes in such a manner that they are electrically coupled to the second lands via the first openings defined in the protective film, respectively.