Patent ID: 8060778

Claim:
A processor, comprising: a plurality of core units respectively including a plurality of strand units that execute instructions and a shared first unit shared by the plurality of strand units; and a shared second unit shared by the plurality of core units, the plurality of core units and the shared second unit being hardware resources; the processor further comprising: a fault-range determining unit that determines, as a fault range the hardware resources disabled from being used due to a fault, all of a range of the processor being the fault range when receiving notification indicating a fault of the shared second unit or all of the core units of the processor, determines a part of the core units being the fault range when receiving notification indicating a fault of the shared first unit included in the part of the core units or all of the strand units included in the part of the core units, and determines a part of the strand units being the fault range when receiving notification indicating a fault of the part of the strand units; a stop-of-use unit that instructs the processor to stop using the hardware resources in the fault range on the basis of a result of the fault range determination; and a clock-supply unit that stops, in a next startup process of the processor, clock supply to the fault range in the hardware resources in accordance with an instruction from the stop-of-use unit.