Patent ID: 7301200

Claim:
A power semiconductor device comprising: a semiconductor die, said semiconductor die including a drift region of a first conductivity type; a channel region of a second conductivity type over said drift region; a plurality of trenches extending to a depth below said channel region; gate insulation formed on sidewalls of each trench; a gate electrode disposed inside each trench; a silicide body formed over each gate electrode; an oxide plug comprised of TEOS formed inside each trench and directly on a respective silicide body; conductive regions of said first conductivity each formed adjacent a respective trench; and a first contact formed over said die and in electrical contact with each one of said conductive regions of said first conductivity, said first contact extending over said oxide plug, wherein no other insulation is disposed between said oxide plug and said silicide body, and wherein each oxide plug is laterally bound by sidewalls of a respective trench whereby said oxide plug does not extend over said conductive regions.