Patent ID: 6841027

Claim:
A method for applying a thin-walled, planar semiconductor wafer to a planar assembly carrier ( 6 ) with a protective layer ( 5 ), the improvement comprising: with respect to the protective layer ( 5 ), arranging the wafer at a spacing and curved in a convex manner, contacting the protective layer ( 5 ) with the wafer ( 4 ), and laying the wafer ( 4 ) over the protective layer ( 5 ) from a contact point towards an edge of the wafer, and the wafer being arched and detached from a carrying body ( 2 ) by controlling a pressure of a medium in a cavity between the wafer ( 4 ) and the carrying body ( 2 ); the carrying body ( 2 ) moveable relative to the assembly carrier ( 6 ) and including a planar portion ( 8 ) facing the protective layer ( 5 ) and carrying the wafer ( 4 ), the portion ( 8 ) having a plurality of flow apertures ( 3 , 7 ) for accommodating the pressure medium, the flow apertures ( 3 , 7 ) including at least one centrally formed duct ( 7 ) configured as an overpressure line for arching the wafer ( 4 ) and circumferential grooves ( 3 ) configured as negative pressure lines for releasably attaching the wafer ( 4 ) to the carrying body ( 2 ).