Patent ID: 7476614

Claim:
A method of fabricating a semiconductor device, the method comprising: forming a first conductive layer on a semiconductor substrate; forming a first insulating interlayer on the first conductive layer; forming a second conductive layer on the first insulating interlayer; forming a second insulating interlayer on the second conductive layer; forming a mask layer on the second insulating interlayer; selectively removing the second insulating interlayer, the second conductive layer, and the first insulating interlayer using the mask layer as an etch mask to form a contact hole exposing the first conductive layer; selectively etching portions of the second conductive layer exposed in sidewalls of the contact hole to form a recess between the first and second insulating interlayers; forming a third conductive layer on a bottom surface and on sidewalls of the contact hole; forming a metal silicide layer filling the recess; and, forming a fourth conductive layer filling the contact hole and over the metal silicide layer.