Patent ID: 7948819

Claim:
An integrated circuit (IC), comprising: a source adapted to characterize one or more of process, voltage, and temperature conditions of the IC; a processor operatively coupled to the source and adapted to receive from the source an input providing the one or more characterized conditions; and a memory operatively coupled to the processor and adapted to be adjusted in response to a command from the processor, said command being generated based on the one or more characterized conditions, wherein: the memory is adapted to adjust its effective circuit structure in response to said command; said structure adjustment comprises an inclusion or exclusion of a transistor module of a modular transistor; the modular transistor comprises a first transistor module and a second transistor module connected in parallel to one another so that a gate of the first transistor module and a gate of the second transistor module are both connected to a signal-input terminal; the IC comprises a first programmable switch configured between the first transistor module and the second transistor module to controllably engage or disengage the second transistor module with the first transistor module, said first programmable switch being controlled in response to the command; in a first state of the first programmable switch, a signal-output terminal of the modular transistor is connected to the first transistor module but not the second transistor module; and in a second state of the first programmable switch, the signal-output terminal of the modular transistor is connected to both the first transistor module and the second transistor module.