Patent ID: 8553464

Claim:
A nonvolatile programmable logic switch, comprising: a first memory cell transistor including a first charge accumulation film, a first control gate connected to a first wiring and both first and second source-drains, where a first end of the first source-drain being connected to a second wiring; a second memory cell transistor including a second charge accumulation film, a second control gate connected to the first wiring and both third and fourth source-drains, where a third end of the third source-drain being connected to a second end of the second source-drain of the first memory cell transistor, a fourth end of the fourth source-drain being connected to a third wiring; a pass transistor including a gate electrode connected to the second end of the second source-drain of the first memory cell and the third end of the third source-drain of the second memory cell; and a first substrate electrode applying a first substrate voltage to a first well of the pass transistor; wherein a writing voltage is applied to the first wiring, a first voltage is applied to one of the second wiring and the third wiring and a second voltage which is lower than the first voltage is applied to the other of the second wiring and the third wiring, and the first substrate voltage which is higher than the second voltage and lower than the first voltage is applied to the first well of the pass transistor, when data is written into the first memory cell transistor or the second memory cell transistor.