Patent ID: 7969200

Claim:
A decoder circuit which defines selection/non-selection of an object to be controlled with an output signal, the decoder circuit comprising: a high voltage imparting portion which imparts a high voltage to a potential setting node; a low voltage setting portion which determines presence or absence of a selected state based on an input signal, and forcibly sets the potential setting node to a low voltage lower than the high voltage during the selected state; and an output signal driving portion which outputs the output signal on a voltage level including the high voltage and the low voltage based on a voltage obtained from the potential setting node, wherein the high voltage imparting portion imparts the high voltage to the potential setting node via first and second switching transistors coupled in series via an intermediate node which is not directly connected to the output signal driving portion, wherein the low voltage setting portion includes a third switching transistor set to a ON state to impart the low voltage to the potential setting node during the selected state, and wherein a driving force of the third switching transistor exceeds driving forces of the first and second transistors during the selected state.