Patent ID: 8010729

Claim:
An image processing controller comprising: a first interface configured to receive image information and an address indicating an output destination of the image information from an image processing engine configured to perform an image processing; a second interface configured to transmit image information to an image processing unit having an image processing capability lower than that of the image processing engine, at a communication speed lower than that of the first interface; a communication path configured to connect the first interface and the second interface to exchange data; a first-in first-out memory provided on the communication path; a third interface configured to transmit images information to an image storage unit at a communication speed, the communication speed being the same as a communication speed of the first interface; a specifying unit configured to specify, upon the first interface receiving the address, either one of the second interface and the third interface as a transmission destination of the image information received by the first interface based on the address; and a transmitting unit configured to transmit, when the second interface is specified as the transmission destination, the image information to the second interface through the communication path and the first-in first-out memory and transmits, when the third interface is specified as the transmission destination, the image information to the third interface.