Patent ID: 8255741

Claim:
A method for reconfiguring a memory system to provide error detection and correction after a failure of a memory component, comprising: accessing a block of data from the memory system, wherein the memory system is previously determined to have a specific failed memory component, wherein each block of data in the memory system includes an array of bits logically organized into R rows and C columns, including two checkbit columns containing checkbits, and C−2 data-bit columns containing data bits, wherein each column is stored in a different memory component, and wherein the checkbits are generated from the data bits to provide block-level detection and correction for a failed memory component; if the failed memory component contains a data-bit column for the block of data, using checkbits from the two checkbit columns to correct the data-bit column, and to store the corrected data-bit column; and generating and storing new checkbits, wherein the new checkbits provide single-error-correction and double-error-detection for erroneous bits in the block of data, but do not provide for detection and correction of a failed memory component.