Patent ID: 7111140

Claim:
A memory storage system for increasing the performance of write operations of sector information to storage locations within non-volatile memory unit, the sector locations organized into sub-blocks and a plurality of sub-blocks defining a block comprising: memory control circuitry, coupled to the non-volatile memory unit for receiving user data of sector information included in a sector, from a host, said received user data identifiable by addresses of a predetermined order, said memory control circuitry for writing said received user data to a first storage location of a particular sub-block of a particular block, said memory control circuitry for further writing user data of sector information to a first storage location of a sub-block of the particular block that is other than the particular sub-block regardless of the predetermined order of the addresses of the received sectors, a single virtual physical block address selectable based upon the identification of a free storage location within said non-volatile memory unit for identifying the storage locations of said sub-block of the particular block, wherein writing of sector information to the first storage location of the sub-blocks of the particular block is performed substantially concurrently thereby increasing the performance of write operations.