Patent ID: 7356670

Claim:
A data processing system comprising a memory; at least a first and a second processor connected to the memory, both arranged to process a stream of data objects, the first processor being arranged to pass successive data objects from the stream to the second processor by storing the data objects in logically successive locations in the memory, wherein each of the processors comprises an administration unit and a computational unit, the administration unit of the first processor maintaining information defining a section in the memory which is free for storing data objects for readout by the other processor, the administration unit of the second processor maintaining information defining a section in the memory in which the first processor has written completed data for the data objects, a processor synchronization channel, and each of the processors being arranged to signal a message to the other processor via the processor synchronization channel for updating the information in the administration unit of said other processor, and each of the processors being arranged to suspend processing the stream of data objects when a location which it needs to access is outside the section defined by its administration unit.