Patent ID: 7190621

Claim:
A method of sensing a state of a non-volatile semiconductor memory cell represented by a transistor having a gate, a drain and a source, the method comprising: a) providing a predefined reference current; b) providing at least one reference cell that is represented by a transistor having a gate, a drain and a source; c) providing a comparative current that is composed of cell currents of at least one reference cell; d) varying a voltage applied to the gates of said memory cell and said at least one reference cell; e) comparing a memory cell current of said memory cell with the predefined reference current and simultaneously comparing a reference cell current of said reference cell with the predefined reference current; and f) detecting which of said memory cell current and said reference cell current reaches first said predefined reference current when varying said gate voltages, the order of reaching the predefined reference current being indicative of the state of the memory cell.