Patent ID: 7027245

Claim:
A data channel, comprising: a variable gain amplifier (VGA) for receiving input signals and generating a VGA output; a digital-to-analog converter (DAC) circuit, coupled to the VGA, for providing a desired input signal to the VGA; a gain control loop, coupled to the VGA, for driving the VGA to gain lock the VGA to the provided desired input signal; an analog-to-digital converter (ADC), coupled to the VGA, for providing a digital output representing an ADC code spread in response to the VGA output; and a controller, coupled to the VGA, the controller driving the DAC to provide the desired input signal to the VGA and generating control signal for controlling the ADC, the controller further determining an equation for determining a read head channel amplitude by applying a high and low amplitude signal to the VGA using the DAC and obtaining the ADC code spread and gain codes associated with the high and low amplitude signals.