Patent ID: 8611155

Claim:
A program method of a semiconductor memory device, comprising: performing a first program loop, including a program operation and a first verification operation using a voltage having a first verification level, on first selected memory cells and second selected memory cells until at least one of the first selected memory cells passes the first verification operation; performing a second program loop, including a program operation and a second verification operation using a voltage having a second verification level higher than the first verification level, on the first selected memory cells and the second selected memory cells, wherein the second verification operation is performed on the second selected memory cells; and performing a third program loop on the first selected memory cells or a fourth program loop on the first and second selected memory cells according to a result of the second verification operation, wherein the third program loop includes a program operation and the first verification operation, and the fourth program loop includes a program operation, the first verification operation and the second verification operation.