Patent ID: 7043674

Claim:
A method for testing an integrated circuit (IC), the IC having a first pad configured as a signal interface for components external to the IC, the first pad having a receiver configured to receive a digital signal from a component external to the IC and to provide a signal in response thereto, the receiver being a differential receiver having a first differential input leg and a second differential input leg, said method comprising: electrically interconnecting automated test equipment (ATE) with the IC; providing at least one stimulus such that the IC determines the presence of a leakage current of the first pad by: setting a value on the second differential input leg; electrically connecting a first pull-up transistor to the first differential input leg of the receiver; enabling the first pull-up transistor; and determining whether an output of the first receiver is a logic “1” such that, if the output of the receiver is a logic “1,” the leakage current of the receiver to ground is not excessive; and receiving information corresponding to the leakage current of the first pad.