Patent ID: 7508257

Claim:
Apparatus for demodulation, comprising: a one-shot device having an asynchronous data input terminal, which is configured to receive a first train of input pulses having respective first durations, and to output on a one-shot data output terminal a second train of output pulses having respective second durations that are longer than the first durations of the corresponding input pulses; a first clocked logic gate having a first clocked data input terminal, which is coupled to the one-shot data output terminal, and a first clocked data output terminal; a combinatorial logic gate having combinatorial input terminals, which are coupled to the one-shot and first clocked data output terminals, and a combinatorial output terminal; and a second clocked logic gate having a second clocked data input terminal, which is coupled to the combinatorial output terminal, and a second clocked data output terminal, which is configured to output a demodulated envelope of the first train of input pulses.