Patent ID: 7427876

Claim:
A reversible sequential element, comprising: a first logic gate including a first input terminal, a second input terminal, a third input terminal, a first output terminal, a second output terminal, and a third output terminal, wherein the first output terminal is coupled to the first input terminal, the second output terminal, and the third output terminal, wherein the second input terminal is coupled to the third output terminal and the third input terminal is coupled to the second output terminal when the first input terminal is set to a first state, and otherwise the second input terminal is coupled to the second output terminal and the third input terminal is coupled to the third output terminal; and a second logic gate including a first input line, a second input line, a first output line, a second output line, wherein the second output line is coupled to the third output terminal and the second input line, wherein an input signal carried on the first input line is set as a constant level so that outputs of the second output line and the first output line are identical.