Patent ID: 7362249

Claim:
A data driver comprising: a shift register configured to output a latch control signal according to a clock signal and a synchronous signal; a data latch configured to sequentially receive video data according to the latch control signal, and to output the video data in parallel; a multiplexer configured to multiplex the parallel video data; a digital-to-analog (D/A) converter configured to convert the multiplexed video data to multiplexed analog current, and to output multiplexed data current; and a current range control circuit configured to receive the multiplexed data current from the D/A converter and to output demultiplexed data current, wherein the current range control circuit is further configured to adjust a range of the data current according to a current range control signal, the current range control circuit comprising: an input mirror circuit comprising a first transistor, wherein a drain of the first transistor is coupled to a gate of the first transistor, and wherein the multiplexed data current is drawn from the drain of the first transistor; a master circuit configured to store a voltage from the gate of the first transistor according to a master sample and hold control signal, and to output a master current corresponding to the stored voltage value, wherein a range of the master current is controlled by the current range control signal; a slave circuit configured to store a voltage from the gate of the first transistor according to a slave sample and hold control signal, and to output a slave current according to the stored voltage value, wherein a range of the slave current is controlled by the current range control signal; and a master/slave selection circuit configured to output one of the master current and the slave current as a data current according to a master/slave selection signal.