Patent ID: 8324688

Claim:
An electrostatic discharge (ESD) protection device, comprising: a high voltage P well formed in a semiconductor substrate; an N-drift region formed in the high voltage P well; an anode N+ diffusion region and an anode P+ diffusion region formed in the N-drift region; a buffer N+ diffusion region formed in the N-drift region and separated a predetermined distant from the anode N+ diffusion region; a buffer N-ballistic region surrounding the buffer N+ diffusion region; an anode N-ballistic region surrounding the anode N+ diffusion region and the anode P+ diffusion region; a cathode N+ diffusion region and a cathode P+ diffusion region formed in the high voltage P well and separated a predetermined distance from the N-drift region; a MOSFET gate disposed on the semiconductor substrate between the cathode N+ diffusion region and the N-drift region; and a capacitor electrode disposed on the semiconductor substrate between the anode N+ diffusion region and the buffer N+ diffusion region.