Patent ID: 7978007

Claim:
A feedback network ( 60 ) for a multistage amplifier, comprising: two or more amplifier stages connected in cascade; wherein a feedback amplifier stage ( 30 ) is connected from circuit output to its first internal node ( 65 ) at the output of the first amplifier stage ( 61 ) of the cascade; wherein said feedback network ( 60 ) comprises a feedback resistor ( 10 ) connected from cascade amplifier output port to said cascade amplifier input port, and a feedback amplifier stage ( 30 ) connected from circuit output to its first internal node ( 6 ) at the output of the first amplifier stage of the cascade ( 61 ); further comprising a feedback resistor ( 10 ) connected from the cascade amplifier output port to said amplifier input port, and a feedback amplifier stage ( 30 ) connected from said amplifier output to its first internal node ( 6 ) at the output 3 of the first amplifier stage of the cascade ( 61 ), characterized in that said feedback amplifier stage ( 30 ) comprises a PMOS transistor which mirrors output stage signaling and biasing current as a feedback signal through sensing it with its gate node and is delivering its feedback signaling through its drain node directly connected to said first internal node ( 6 ); said cascade amplifier comprises three copies of schematically similar biased CMOS amplifier stages ( 61 , 62 , 63 ) which can have different element values each according to desired performance; and wherein said schematically similar biased CMOS amplifier stages have a first NMOS input transistor which is loaded with a PMOS input transistor so as to form current reuse amplifying stages.