Patent ID: 7454724

Claim:
A method for provisionally determining quantity and positions of a plurality of power supply pads when designing a semiconductor integrated circuit, the method comprising: performing a power supply network analysis of a core section, which is provided with a plurality of nodes and the plurality of power supply pads, of the semiconductor integrated circuit, with each power supply pad being connected to the core section via an IO buffer, wherein each IO buffer has a predetermined current capacity, based on power consumption information of the core section and power supply wire resistance information, which includes resistances between the nodes, to calculate voltage values of the nodes; calculating current values between the nodes from the voltage values of the nodes and the resistances between the nodes; calculating current values of the power supply pads from the calculated current values between the nodes; determining whether the current value of each of the power supply pads exceeds the current capacity of the associated IO buffer; and eliminating or adding at least one power supply pad in accordance with the result of the determination, wherein the eliminating comprises eliminating at least one power supply pad when the determined current value of each of the power supply pads does not exceed the current capacity of the associated IO buffer.