Patent ID: 8212251

Claim:
An active-matrix substrate comprising: a semiconductor layer comprising a first end portion, a second end portion and an intermediate portion between the first and second end portions; a thin-film transistor element having a plurality of thin-film transistors including first and second thin-film transistors, each of which has a source region, a channel region and a drain region that are included in the semiconductor layer; a gate bus line; a source bus line; and a pixel electrode, wherein the first and second thin-film transistors are arranged in series with each other and the first thin-film transistor is located proximate the fist end portion of the semiconductor layer, while the second thin-film transistor is located proximate the second end portion of the semiconductor layer, and wherein the source region of the first thin-film transistor includes a source contact portion, and wherein the drain region of the second thin-film transistor includes a drain contact portion, and wherein the semiconductor layer has a first gettering region adjacent to the source region of the first thin-film transistor, a second gettering region adjacent to the drain region of the second thin-film transistor, and a third gettering region adjacent to any of the source and drain regions located between the respective channel regions of the first and second thin-film transistors among the source and drain regions of the plurality of thin-film transistors included in the thin-film transistor element, wherein the intermediate portion comprises a first linear portion running in a first direction, a second linear portion running in a second direction that is different than the first direction, and a connecting portion that connects the first and second linear portions, and wherein the third gettering region is adjacent to the connecting portion, the first linear portion is approximately parallel to the source bus line, and the second linear portion is approximately parallel to the gate bus line.