Patent ID: 8659273

Claim:
An information handling system comprising: a processor; a memory communicatively coupled to the processor; and a direct-current to direct-current step-down converter circuit, comprising: a first inductive unit, a first terminal of the first inductive unit coupled to a switching node and a second terminal of the first inductive unit coupled to a load terminal; a first switching unit, a first terminal of the first switching unit coupled to a positive terminal of a voltage source and a second terminal of the first switching unit coupled to the first inductive unit at the switching node; a second switching unit coupled to ground; a capacitance unit, a first terminal of the capacitance unit coupled to the second switching unit, and a second terminal of the capacitance unit coupled to the first inductive unit and the first switching unit at the switching node, the capacitance unit configured to delay a change in voltage across the first switching unit; and a second inductive unit, a first terminal of the second inductive unit coupled to the second switching unit and a second terminal of the second inductive unit coupled to the first inductive unit and the first switching unit at the switching node, the second inductive unit configured to delay a change in current in the first switching unit.