Patent ID: 6842393

Claim:
An apparatus for selecting a memory device, comprising: a memory controller; a plurality of banks of memory devices; a plurality of memory devices in each of said plurality of banks; a command and address bus that connects said memory controller and said plurality of banks of memory devices; said memory controller transmitting a bank select signal over at least one bank select path to select at least one bank of memory devices from said plurality of banks of memory devices; and said memory controller further transmitting a device select signal over said command and address bus to select one memory device from said at least one selected bank, wherein said device select signal identifies said selected one memory device when a predetermined relationship exists between said device select signal and an identification value identifying said selected one memory device, and wherein a plurality of identification paths respectively couple each of said plurality of memory devices within a given bank of memory devices to a respective ID storage unit for enabling receipt by each of said plurality of memory devices within said given bank of memory devices of a corresponding identification value; wherein each of said respective ID storage units is respectively provided at each of a plurality of connectors between each of said plurality of memory devices and a motherboard.