Patent ID: 8119467

Claim:
A method of manufacturing a thin film transistor (TFT) substrate having a TFT and a capacitor, the method comprising: (a) forming a lowest capacitor electrode and a gate electrode on a substrate having a first region and a second region, so that the lowest capacitor electrode is formed to correspond to the first region and the gate electrode is formed in a portion of the second region, the lowest capacitor electrode and the gate electrode being formed in a same layer; (b) forming an interlayer insulating layer to cover the gate electrode and the lowest capacitor electrode; (c) etching a portion of the interlayer insulating layer in the first region by using a halftone mask to a thickness that is less than a thickness of a portion of the interlayer insulating layer in the second region; and (d) forming a second capacitor electrode and source and drain electrodes on the interlayer insulating layer so that the second capacitor electrode is formed to correspond to the first region and the source and drain electrodes form the TFT together with the gate electrode, wherein (a) comprises forming a first wire on the substrate, the first wire being formed in the same layer as the gate electrode, and wherein (d) comprises forming a second wire on a portion of the interlayer insulating layer in the second region.