Patent ID: 7419890

Claim:
A method of manufacturing a complementary transistor circuit, the method comprising: forming a plurality of concave portions including a first concave portion and a second concave portion; forming an amorphous semiconductor film on a substrate; converting the amorphous semiconductor film into a crystalline semiconductor film, the crystalline semiconductor film including a plurality of single crystal grains, each of the plurality of single crystal grains grown from one of the plurality of concave portions that are located in the crystalline semiconductor film, the plurality of single crystal grains including a first single crystal grain covering the first concave portion and a second single crystal grain covering the second concave portion; forming a first transistor that has a first conductive type and that has a first drain, a first source, and a first channel region disposed between the first source and the first drain; and forming a second transistor that has a second conductive type and that has a second drain, a second source, and a second channel region disposed between the second source and the second drain, at least one of the first drain, the first source, and the first channel region being formed in the first single crystal grain, at least one of the second drain, the second source, and the second channel region being formed in the second single crystal grain, and the first channel region not covering the first concave portion.