Patent ID: 7596649

Claim:
A motherboard, comprising: a chipset mounted thereon; a first connector pad arranged thereon and configured for receiving a first type of PCI connector; a second connector pad arranged thereon and configured for receiving a second type of PCI connector different from the first type of PCI connector; a plurality of first transmission lines; a plurality of second transmission lines; and a plurality of areas for mounting switches, wherein one end of each of the first transmission lines is connected to the chipset, another end of each of the first transmission lines is connected to an end of a corresponding area, one end of each of the second transmission lines is connected to another end of the corresponding area, another end of each of the second transmission lines is connected to the second connector pad, the first connector pad is connected to the plurality of first transmission lines, and the switches are selectively mounted on the plurality of areas, wherein a length of the transmission line between the first connector pad and the area where the switches are mounted satisfies the following formula: Lstub<(Tj*V)/2, wherein Lstub denotes the length of the transmission line between the first connector pad and the area, Tj denotes the jitter tolerance of a signal in the transmission line, V denotes the speed of the signal.