Patent ID: 8624573

Claim:
A power converter comprising: a power converting unit configured to generate a direct current (DC) output voltage based on a pull-up driving signal, a pull-down driving signal and a DC input voltage; and a switch driving circuit configured to generate a first detection voltage signal based on the DC output voltage, the switch driving circuit including, a zero-current detector configured to adjust an offset voltage based on the first detection voltage signal and generate a zero-current detecting signal based on the offset voltage, the offset voltage and the zero-current detecting signal associated with a current in the power converting unit, and a pulse-frequency modulating circuit configured to perform a pulse-frequency-modulation (PFM) to generate the pull-up driving signal and the pull-down driving signal based on the zero-current detecting signal, wherein the power converting unit includes, a pull-up transistor having an input terminal configured to receive the DC input voltage and an output terminal connected to a first node of the power converting unit, the pull-up transistor being configured to operate in response to the pull-up driving signal, a pull-down transistor coupled between the first node and a ground voltage source, the pull-down transistor being configured to operate in response to the pull-down driving signal, an inductor coupled between the first node and an output node of the power converting unit, and a capacitor coupled between the output node and the ground voltage source, the zero-current detector is configured to generate the zero-current detecting signal based on a voltage of the first node and the ground voltage and the zero-current detector includes, an offset generator configured to generate an additional driving current in response to the first detection voltage signal, and an amplifier configured to amplify a difference between the voltage of the first node and the ground voltage, the zero-current detecting signal based on the additional driving current and the amplified difference, the amplifier includes, a differential input stage configured to amplify the difference between the voltage of the first node and the ground voltage, and an output stage configured to amplify an output signal of the differential input stage to generate the zero-current detecting signal, and the offset generator includes, a first transistor connected to a transistor of the output stage, and a second transistor coupled between the first transistor and an output terminal of the zero-current detector, the second transistor configured to operate in response to the first detection voltage signal.