Patent ID: 8285945

Claim:
An apparatus, comprising: a. plurality of ports configured to exchange data; and a shared memory configured to enable the exchange of the data between first and second ones of the plurality of ports, wherein the data has a selected word-width that is programmable and dynamically variable, wherein the shared memory includes addresses where the data having the programmable and dynamically variable word-width are stored, and wherein the shared memory includes: an array of random access memory cells organized in rows and columns, wherein a row of the array is variably configurable to comprise a plurality of independently-addressable column groups, wherein each independently-addressable column group has a width equal to a predetermined word-width, and wherein the predetermined word-width is based on a communications protocol data width; and circuitry configured to write the data from the first one of the plurality of ports into selected random access memory cells of the variably-configured independently-addressable column groups of one or more rows of the array during a first time period, to read the data from the selected random access memory cells of the variably-configured independently-addressable column groups of the one or more rows of the array during a second time period, and to output the read data at the second one of the plurality of ports, wherein the circuitry is further configured to bridge the selected word-width and the predetermined word-width of the selected random access memory cells of the variably-configured independently-addressable column groups of the one or more rows to enable the data to be stored into the rows of the array with the variably-configured plurality of independently-addressable column groups.