Patent ID: 8877649

Claim:
A method of manufacturing a thin film transistor array substrate, comprising: forming a resin layer on a substrate formed with a thin film transistor array; patterning said resin layer by using one mask process, so as to form a spacer and a contact hole filling layer simultaneously: said contact hole filing layer is used for filling contact holes on said thin film transistor array substrate; the thickness of said contact hole filling layer is consistent with the depth of said contact holes; forming an alignment film on the substrate formed with said spacer and said contact hole filing layer; wherein said patterning said resin layer by using one mask process to form the spacer and the contact hole filling layer simultaneously comprises: on the array substrate formed with said resin layer, exposing said resin layer by using a two-tone mask plate.wherein a fully light-transmitting portion of said two-tone mask plate corresponds to a portion of the resin layer for forming said spacer, a partly light-transmitting portion of said two-tone mask plate corresponds to a portion of the resin layer for forming said contact hole filing layer, the fully opaque portion of said two-tone mask plate corresponds to the remaining portion of the resin layer except those portions for forming said spacer and said contact hole filling layer; developing said resin layer after the exposure so as to form said spacer and said contact hole filling layer.