Patent ID: 8638382

Claim:
A solid-state imaging device having a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels, respectively, in first and second directions, where n is a positive integer, the sharing unit comprising: a first structural portion and a second structural portion which are arranged in a vertical direction of a pixel portion, each of the first and second structural portions including four readout gate electrodes and one floating diffusion with respect to four photodiodes; at least an amplification transistor which has at least a portion thereof disposed between the first structural portion and the second structural portion; a reset transistor; readout wirings which are connected to the readout gate electrodes, respectively; a reset wiring which is connected to a reset gate electrode of the reset transistor; a connection wiring which is connected to the first floating diffusion, the second floating diffusion, an amplification gate electrode of the amplification transistor, and a source region of the reset transistor; and a select transistor on the one sharing unit which is disposed between the first structural portion and the second structural portion and connected to the amplification transistor on the one sharing unit, wherein the each of the first and second structural portions include the four readout gate electrodes and the one floating diffusion with respect to the four photodiodes; and a first power supply region and a second power supply region, wherein the first power supply region comprises a drain region of the reset transistor, and the second power supply region comprises at least one of a drain region of the select transistor and a drain region of the amplification transistor, wherein at least a portion of a line connecting the first power supply region to a power supply and at least a portion of a line connecting the second power supply region to the power supply are perpendicular to one another.