Patent ID: 8592911

Claim:
A method of manufacturing a semiconductor device, comprising: A. providing a semiconductor substrate; B. forming a gate stack on the semiconductor substrate, the gate stack comprising an interface layer, a gate dielectric layer and a gate electrode; C. forming a metal sidewall spacer on the sidewall of the gate electrode on only one side thereof, said metal sidewall spacer being located on the gate dielectric layer; D. forming a second sidewall spacer on the sidewalls of the gate stack and the metal sidewall spacer; and E. forming a source region and a drain region in the semiconductor substrates on respective sides of the gate dielectric layer, the drain region being located in the semiconductor substrate on the side where the gate dielectric layer has the metal sidewall spacer thereon; wherein the step C of forming the metal sidewall spacer comprises: forming the metal sidewall spacer on the sidewall of the gate electrode, and forming a first sidewall spacer on the sidewall of the metal sidewall spacer; performing an angled heavy ion implantation to damage the part of the first sidewall spacer on one side; removing the first sidewall spacer and the metal sidewall spacer on the side of the damaged part of the first sidewall spacer; and removing the part of the first sidewall spacer on the other side.