Patent ID: 7032074

Claim:
A method for translating from a virtually-addressed bus to a physically-addressed bus, comprising: presenting a virtual address for a memory line on the virtually-addressed bus; initiating snoop processing of an intermediary inclusive storage device coupled to the virtually-addressed bus, the intermediary inclusive device capable of storing information related to the memory line from a main memory coupled to the physically-addressed bus; storing in the intermediary inclusive storage device a pre-fetched memory line including an address tag and data and a pre-fetched status bit, wherein the pre-fetch status bit includes an ON and an OFF indication; switching the pre-fetch status bit to OFF when the virtual address for the pre-fetched memory line is presented on the virtually addressed bus; receiving one of a snoop hit and a snoop miss; if a snoop hit, initiating further snoop processing on local caches coupled to the virtually-addressed bus; and if a snoop miss, accessing a memory location in the main memory.