Patent ID: 8384443

Claim:
A circuit comprising: a first node and a second node; a first current source coupled to the first node, the first current source configured to provide a first current source current; a second current source coupled to the second node, the second current source configured to provide a second current source current; a first current mirror coupled to a supply voltage, the first current mirror configured to provide a first current mirror reference current; a second current mirror coupled to the supply voltage, the second mirror configured to provide a second current mirror reference current; a first switch coupled to the first current mirror and the first node, the second switch configured to have a switch configuration; a second switch coupled to the second current mirror and the second node and is configured to have the switch configuration; a delta sigma modulator having an input and an output, the input coupled to the first node and the output configured to provide a discrete pulse density modulated output to control the switch configuration of the first switch and the second switch, wherein an average value of the discrete pulse density modulated output represents at least the first current source current as a function of the first current mirror reference current and the density modulated output is configured to control the second switch such that an equivalent current at the second node is a difference of the first current source current and the second current source current when the first current mirror current is at least approximately equal to the second current mirror current.