Patent ID: 8553459

Claim:
A nonvolatile semiconductor memory device comprising: a first memory cell array including at least one first string group constituted of a plurality of first strings, each of the first strings including a first number of first memory cells each storing therein information in a nonvolatile manner, each of the first memory cells being connected to an associated one of a plurality of first word lines:, a second memory cell array including at least one second string group constituted of a plurality of second strings, each of the second strings including a second number of second memory cell or cells each storing therein information in a nonvolatile manner, the second number being smaller than the first number, each of the second memory cell or cells being connected to a second word line or an associated one of a plurality of second word lines; a first bit line connected to one of the first strings; a second bit line connected to one of the second strings; a page buffer that stores therein data read from the first and second memory cell arrays via the first and second bit lines, respectively; and a control circuit performing reading first data from the first memory cell array after reading second data from the second memory cell array in first time read access after a power is supplied to the nonvolatile semiconductor memory device, thereby the second data and the first data are supplied to the page buffer in a time series manner.