Patent ID: 7449919

Claim:
A driver circuit comprising: a differential pair of transistors; a tail current transistor coupled to provide a current to the differential pair of transistors; a bias circuit to bias the tail current transistor, wherein the bias circuit includes a plurality of individually selectable output legs coupled in parallel; a control circuit responsive to a clock signal, the control circuit coupled to turn on the plurality of individually selectable output legs for at least one clock signal period and then turn off at least one of the plurality of individually selectable output legs; a first switching transistor coupled drain-to-source between a gate of the tail current transistor and a reference node, wherein the first switching transistor is coupled to turn off the tail current transistor responsive to the control circuit; and a second switching transistor coupled drain-to-source between the gate of the tail current transistor and the reference node, the second switching transistor having a higher “on” resistance than the first switching transistor.