Patent ID: 7480690

Claim:
An integrated circuit having an arithmetic circuit comprising: a product generator having: a multiplier port for receiving a first operand; a multiplicand port for receiving a second operand; and a product port for providing a product of the first and second operands; multiplexing circuitry having: a first multiplexer input port connected to the product port for receiving the product; a second multiplexer input port connected to the multiplier port and the multiplicand port for bypassing the product generator to provide a bypass port of the product generator; a third multiplexer input port for receiving a cascade input from another product generator; and a multiplexer output port; and an adder having a first addend port connected to the multiplexer output port, a second addend port, and a sum port; the sum port connected to a fourth multiplexer input port of the multiplexing circuitry; the arithmetic circuit being configured as a comb stage.