Patent ID: 7348799

Claim:
An application specific integrated circuit (ASIC) comprising: memory that stores condition data defining conditions for enabling transitions among a plurality of states and next state data defining a next state associated with each of the respective conditions; and an embedded logic analyzer, the embedded logic analyzer comprising: a state machine circuit that employs the condition data and the next state data to transition from a current state of the state machine circuit to a next state as a function of applying at least one condition relative to input data, the at least one condition being defined by condition data that is associated with the current state, the state machine circuit associating the next state data with the at least one condition based on the current state of the state machine circuit; and a control circuit that provides a trigger signal in response to the current state of the state machine circuit transitioning to at least one predefined state of the plurality of states; an associated data bus on which the input data propagates; and a data capture system that stores a set of data from the associated data bus in response to a store signal indicating a qualified store cycle and based on the trigger signal.