Patent ID: 8148212

Claim:
A method of manufacturing a semiconductor device, the method comprising: growing a plurality of nanowires on a first substrate in a first direction perpendicular to the first substrate; forming an insulation layer covering the nanowires on the first substrate to define a nanowire block including the nanowires and the insulation layer; moving the nanowire block so that each of the nanowires is arranged in a second direction parallel to the first substrate; partially removing the insulation layer to partially expose the nanowires; forming a gate line covering the exposed nanowires; implanting impurities into portions of the nanowires adjacent to the gate line; and forming a common source line (CSL), a bit line plug and a bit line, the CSL and the bit line plug making contact with the nanowires, and the bit line making contact with the bit line plug, wherein each nanowire, a plurality of gate lines corresponding to each nanowire, the CSL, the bit line plug and the bit line define a string, and wherein each nanowire has a length corresponding to integer times of a length of the string.