Patent ID: 8004362

Claim:
A gate bias circuit comprising: plurality of unit transistors each having the same gate length arranged in a gate-lengthwise direction to form a group of unit transistors, wherein: at least one unit transistor included in the group of unit transistors is used as a monitor unit transistor that is used for the gate bias circuit, and all of or part of the other unit transistors are connected in parallel and are used as an amplifier, a source of the amplifier is connected to the ground, and a drain of the amplifier is connected to a power source; a source of the monitor unit transistor is connected to the ground, a gate and drain of the monitor unit transistor are connected, the drain is connected to a power source, the gate is connected via a resistor or an inductor to a gate of the amplifier; and the ratio between current flowing in the motor unit transistor and current flowing in the amplifier is proportional to the ratio between the gate width of the monitor unit transistor and the gate width of the amplifier.