Patent ID: 8265918

Claim:
A method of co-simulation of a portion of a circuit design, comprising: selecting one or more module instances from a plurality of module instances of a high level modeling system circuit design to be both simulated within a software simulation environment and emulated on programmable logic circuitry; in response to a first user command, compiling each of the one or more module instances into both a respective simulation model and a respective emulation model; configuring the programmable logic circuitry using each respective emulation model; configuring the simulation environment for communication with each respective emulation model during simulation and emulation; for each module instance of the one or more module instances, concurrently simulating and emulating the respective simulation model and respective emulation model of the module instance; comparing results from the simulation of the simulation model with results of emulation of the emulation model; in response to a discrepancy between the compared results, storing discrepancy data indicating a time and module instance in which the discrepancy occurred; and outputting results from the simulation and emulation of each respective simulation model and each respective emulation model, wherein the compiling of each of the one or more module instances into both a respective simulation model and a respective emulation model includes: identifying a port name, direction, and type of each input and output port of each of the one or more module instances; and generating for each of the one or more module instances, in response to the identified port name, direction, and type of each input and output port, a memory map for accessing the respective emulation model.