Patent ID: 7171597

Claim:
An I/O compression test circuit for compression testing data loaded on a plurality of global I/O lines, comprising: a plurality of test blocks for testing a plurality of global I/O line groups depending on a test block enable signal synchronously with a first strobe signal, wherein the plurality of global I/O lines are divided into the plurality of global I/O line groups; a decision block for deciding a test result in response to output signals from the plurality of test blocks; a driving block for driving a decision signal outputted from the decision block synchronously with a second strobe signal; and a control block for generating the first strobe signal, a reset signal, and the second strobe signal depending on a compression test enable signal and a global I/O line strobe signal, wherein the reset signal initializes an input terminal of the decision block, wherein the global I/O line strobe signal is activated when data are loaded on the global I/O lines.