Patent ID: 7141493

Claim:
A method of manufacturing a three-dimensional stacking type semiconductor device, comprising: forming an electrode layer on each of a plurality of substrates, the electrode layer having a plurality of conductive layers with an insulating layer interposed between at least two adjacent conductive layers of the plurality of conductive layers, each of the at least two adjacent conductive layers being lower than an uppermost conductive layer and having a through-hole formed therein, the through-hole being filled with an insulating material; forming a hole in the uppermost conductive layer coaxially with the through-hole in each of the at least two adjacent conductive layers, and forming an electrode layer through-hole in the electrode layer by etching the insulating material; forming a substrate through-hole connected with the electrode layer through-hole in each of the substrates; filling the electrode layer through-hole and the substrate through-hole in each of the substrates with a conductive member; and stacking the substrates by using the conductive member of each of the substrates.