Patent ID: 8058726

Claim:
A semiconductor device comprising: a semiconductor die comprising: a first surface; a second surface opposite the first surface; a bond pad formed on the first surface; and a passivation layer formed on the first surface excluding the bond pad such that the bond pad is exposed through the passivation layer; a first dielectric layer formed on the passivation layer such that the bond pad is exposed through the first dielectric layer, the first dielectric layer comprising a projection projecting upwards; a redistribution layer connected to the bond pad and extended onto the first dielectric layer including the projection, an entire upward projected area of the redistribution layer formed on the entire projection being upward of the entire remaining area of the redistribution layer, the entire upward projected area comprising a flat upper surface and a downward sloping surface sloping downward from the flat upper surface; a second dielectric layer in which an opening is formed so that the entire upward projected area of the redistribution layer including the flat upper surface and the downward sloping surface formed on the entire projection is externally exposed through the opening while the entire remaining area of the redistribution layer is covered by the second dielectric layer; and a solder ball welded to the entire upward projected area of the redistribution layer including the flat upper surface and the downward sloping surface.