Patent ID: 7670910

Claim:
A method of forming a self-aligned inner gate recess channel in a semiconductor substrate, comprising: forming recess inner sidewall spacers on sidewalls of a recess trench, such that a length of portions of the recess inner sidewall spacers inside the recess trench and below an upper surface of the substrate is substantially longer than a length of portions of the recess inner sidewall spacers outside the recess trench and above the upper surface of the substrate; forming a gate dielectric on a bottom portion of the recess trench; forming a gate in the recess trench so that an upper portion of the gate protrudes above the upper surface of the substrate, wherein a thickness of the recess inner sidewall spacers causes a center portion of the gate to have a smaller width than the protruding upper portion and a lower portion of the gate; forming a gate mask on the gate; forming gate sidewall spacers on the protruding upper portion of the gate and the gate mask; and performing an ion implantation process to form a source/drain region in the active region of the substrate adjacent the gate sidewall spacers.