Patent ID: 6967129

Claim:
A method of fabricating a semiconductor device including a pixel unit and a driving circuit which are formed over a substrate, comprising: forming at least a first active layer of a first n-channel TFT, a second active layer of a second n-channel TFT and a third active layer of a p-channel TFT over said substrate; after forming the at least the first, second, and third active layers, forming a gate insulation film in contact with said first active layer, said second active layer and said third active layer; after forming the gate insulation film, adding an element belonging to Group 15 of the Periodic Table to said first active layer, in order to form at least one n − region; after adding the element belonging to Group 15 of the Periodic Table in order to form at least one n − region, forming a conductive film on said gate insulation film; after forming the conductive film, performing a first patterning of said conductive film and forming a third gate wiring of said p-channel TFT; after performing the first patterning, adding an element belonging to Group 13 of the Periodic Table in self-alignment to said third active layer with said third gate wiring as a mask, in order to form at least one p ++ region; after addomg the element belonging to Group 13 of the Periodic Table, performing a second patterning of said conductive film and forming a first gate wiring of said first n-channel TFT and a second gate wiring of said second n-channel TFT; after performing the second patterning, adding an element belonging to Group 15 of the Periodic Table to said first active layer and said second active layer, in order to form at least one n + region; and after adding the element belonging to Group 15 of the Periodic Table in order to form at least on n + region, adding an element belonging to Group 15 of the Periodic Table in self-alignment using said second gate wiring as a mask, in order to form at least one n − − region, wherein said driving circuit and said pixel unit comprise said first n-channel TFT and said second n-channel TFT respectively.