Patent ID: 7659575

Claim:
A semiconductor device provided with a gate control type semiconductor element formed in a substrate with a first surface, and a second surface over the reverse side, comprising: a first semiconductor layer of a first conductivity type which is formed in the first surface side of the substrate, and forms a drift region of the semiconductor element; a second semiconductor layer of a second conductivity type opposite to the first conductivity type which is the first surface side of the substrate, is formed in the first semiconductor layer, and forms a channel region of the semiconductor element; a third semiconductor layer of the second conductivity type which is the first surface side of the substrate, and is formed in the first semiconductor layer in contact with the second semiconductor layer and whose depth from the first surface of the substrate is deeper than the second semiconductor layer; a trench which is patterned in the first surface of the substrate and whose depth from the first surface of the substrate is deeper than the third semiconductor layer; and a first conductive film formed in an inside of the trench via a first insulation film; wherein the substrate has a cell area in which the semiconductor element is formed, and a peripheral region contiguous to the cell area; and between a plurality of cell trenches in which a gate electrode of the semiconductor element is formed among the trenches in the cell area, one end of the third semiconductor layer is formed, and the other end of the third semiconductor layer is formed in the peripheral region.