Patent ID: 7968916

Claim:
A method of stacking substantially identical first and second integrated circuit dies and routing signals to and/or from respective circuits fabricated on the integrated circuit dies, each of the integrated circuit dies having a plurality of pairs of bonding pads fabricated on the respective integrated circuit die, the method comprising: connecting a first bonding pad in each of the plurality of pairs of bonding pads fabricated on the first integrated circuit die to the circuit fabricated on the first integrated circuit die through respective fuses; connecting a second bonding pad in each of the plurality of pairs of bonding pads fabricated on the second integrated circuit die to the circuit fabricated on the second integrated circuit die through respective fuses; routing signals to and/or from the circuit fabricated on the first integrated circuit die by routing signals to and/or from the first bonding pad in each of the plurality of pairs of bonding pads fabricated on the first integrated circuit die by leaving intact the fuses connected to the first bonding pads fabricated on the first integrated circuit die and opening the fuses connected to the second bonding pads fabricated on the first integrated circuit; routing signals to and/or from the circuit fabricated on the second integrated circuit die by routing signals to and/or from the second bonding pad in each of a plurality of pairs of bonding pads fabricated on the first integrated circuit die by opening the fuses connected to the first bonding pads fabricated on the second integrated circuit die and leaving intact the fuses connected to the second bonding pads fabricated on the second integrated circuit die; and connecting the second bonding pad in each of a plurality of pairs of bonding pads fabricated on the first integrated circuit die to the corresponding second bonding pad in each of a plurality of pairs of bonding pads fabricated on the second integrated circuit die.