Patent ID: 6999355

Claim:
A circuit arrangement for setting a voltage supply for a read/write amplifier of an integrated memory for assessing and amplifying signals stored in memory cells comprising: a first voltage generator circuit that generates a supply voltage for application to the read/write amplifier during an assessment and amplification operation, wherein the first voltage generator circuit generates the supply voltage for application to the read/write amplifier depending on a temperature of the memory such that a change in the supply voltage behaves proportionally to a temperature-dictated change in a transistor threshold voltage of a transistor used in the read/write amplifier and such that a difference between a precharge voltage and the transistor threshold voltage is constant; a second voltage generator circuit that generates a precharge voltage for precharging bit lines of the memory which are connected to the read/write amplifier, the second voltage generator circuit regulating the precharge voltage to a bias value which behaves proportionally to the supply voltage applied to the read/write amplifier; and a temperature detector circuit for detecting a temperature of the memory, the temperature detector circuit being connected to the first voltage generator circuit and interacting with the first voltage generator circuit to set the supply voltage applied to the read/write amplifier depending on a temperature of the memory.