Patent ID: 8692328

Claim:
A semiconductor device, comprising: a second conductive-type deep well configured above a first conductive-type substrate; a second conductive-type buried impurity layer configured below the second conductive-type deep well to include an ion implantation region and a diffusion region; a first conductive-type first well configured in the diffusion region of the second conductive-type deep well; a gate electrode configured above the substrate to extend across portions of both the first ion implantation region and the first diffusion region, the gate electrode having one end portion thereof overlapped with a portion of the first conductive-type first well, wherein the diffusion region has impurity doping concentration that is the highest at an interface between the ion implantation region and the diffusion region, and that decreases as moving farther away from the interface between the ion implantation region and the diffusion region.