Patent ID: 8331152

Claim:
A nonvolatile memory device comprising: a plurality of memory blocks; a block selection circuit that generates a block select signal for selecting at least one of the memory blocks; a plurality of local word line selection units that connect global word lines connected to a word line decoder and local word lines in response to the block select signal, the plurality of local word line selection units being connected to each memory block; and a plurality of local bit line selection units that connect global bit lines connected to a sense amplifier and local bit lines in response to the block select signal, the plurality of local bit line selection units being connected to each memory block, wherein each memory block comprises: the local word lines which extend in a first direction on a second plane perpendicular to a first plane and are stacked in a second direction perpendicular to the first direction; the local bit lines which extend in the second direction to cross the local word lines; and memory cells formed at cross-points where the local word lines and the local bit lines cross one another.