Patent ID: 8775776

Claim:
A hash table structure comprising: a processor receiving a plurality of access requests for access to a storage device, said processor performing a plurality of hash processes on said access requests to generate a first number of addresses for each access request, and said addresses being within a full address range; a plurality of hash table banks operatively connected to said processor, said hash table banks forming said storage device, each of said hash table banks having a plurality of input ports, each of said hash table banks having less input ports than said first number, said processor providing said addresses to said hash table banks, each of said hash table banks storing pointers, each of said pointers corresponding to a different one of limited ranges of addresses within said full address range, and each said different one of said limited ranges of addresses being less than said full address range; and a correlator operatively connected to said hash table banks, said correlator receiving said pointers from said hash table banks, said correlator correlating ones of said pointers to corresponding ones of said addresses based on said addresses being in ones of said limited ranges of addresses of said pointers, and said correlator outputting different ones of said pointers corresponding to said addresses in response to each of said access requests.