Patent ID: 7518919

Claim:
A non-volatile memory system, comprising: an arrangement of flash memory cells organized into blocks of a minimum number of memory cells that are erasable together, the blocks individually storing a plurality of units of data and error correction codes calculated from the units of data, and a controller coupled with the memory cell array and that operates to: identify when a scrub trigger event has occurred for individual units of data stored in the blocks of memory cells, read the data stored in the identified units, correct errors in the read data of the identified units by use of their associated error correction codes, write the corrected first block data into a designated block of memory cells regardless of the blocks from which the data of the identified units were read, and thereafter consolidating data of the blocks in which scrub trigger events have been identified by: read the individual corrected units of data from the designated block, thereafter write the individual read units of data into destination blocks other than those from which the data of the identified units were read and other than the designated block, copy into the destination blocks uncorrected data units of the blocks from which the data of the identified units were read, thereby to consolidate corrected and uncorrected units of data into other blocks.