Patent ID: 7408376

Claim:
An array substrate, comprising: a substrate member; a pixel part having a plurality of gate lines, a plurality of data lines and a plurality of pixels electrically connected to the gate lines and data lines, the pixel part being formed on the substrate member, the gate lines including odd-numbered gate lines and even-numbered gate lines, the pixels including odd-numbered pixels and even-numbered pixels; a gate driving circuit electrically connected to a first end of the gate lines and formed on the substrate member adjacent to the pixel part so as to apply a gate signal to the gate lines; a first inspecting circuit electrically connected to the odd-numbered gate lines so as to inspect odd-numbered pixels connected to the odd-numbered gate lines, the first inspecting circuit comprising a first switching device electrically connected to the odd-numbered gate lines and a first inspecting line configured to apply a first driving voltage to the first switching device during a first inspection operation in which the odd-numbered gate lines are inspected, the first inspecting line being electrically connected to the first switching device; and a second inspecting circuit electrically connected to the even-numbered gate lines so as to inspect even-numbered pixels connected to the even-numbered gate lines, the second inspecting circuit comprises: a second switching device electrically connected to the even-numbered gate lines and a second inspecting line configured to apply the first driving voltage to the second switching device during a second inspection operation in which the even-numbered gate lines are inspected, the second inspecting line being electrically connected to the second switching device.