Patent ID: 8378725

Claim:
A phase-locked loop (PLL), comprising: a voltage-controlled oscillator (VCO), including: a voltage-to-current converter for converting a control voltage to a first current; and a current-controlled oscillator, connected to the voltage-to-current converter, for generating an oscillator signal based on the first current; a phase detector, connected to the VCO, for generating an error signal based on an input reference signal and a fraction of the oscillator signal; a current mirror circuit, connected to the voltage-to-current converter, for generating a second current based on a fraction of the first current; a dual charge pump circuit connected between the phase detector and the voltage-to-current converter, for receiving the error signal and the second current, and generating first and second charge pump currents according to a predetermined ratio; and an active loop filter connected to the dual charge pump circuit, the current mirror circuit and the voltage-to-current converter, wherein the active loop filter generates the control voltage based on the first and second charge pump currents, and wherein the active loop filter includes: an input capacitance that varies with variation in the predetermined ratio of the first and second charge pump currents; and a transconductance stage having a transconductance that varies based on a third current generated by the current mirror circuit, wherein the transconductance stage includes one or more input transistors that operate in a sub-threshold region.