Patent ID: 7745866

Claim:
A semiconductor device comprising: a semiconductor substrate; a transistor which includes a first impurity diffusion layer and a second impurity diffusion layer formed in the semiconductor substrate, and a gate electrode formed above a region of the semiconductor substrate located between the first and second impurity diffusion layers as seen from a horizontal plane; a first interlayer insulating film formed on the semiconductor substrate and the gate electrode; a contact plug formed on the first impurity diffusion layer of the semiconductor substrate and penetrating the first interlayer insulating film; a second interlayer insulating film formed over the first interlayer insulating film and having an opening formed in a region thereof located above the contact plug; and a capacitor which includes a lower electrode formed on the contact plug, a capacitor insulating film formed on the inner and top surfaces of the lower electrode, and an upper electrode formed on the capacitor insulating film, the lower electrode being formed along the inner surface of the opening to have a concave cross section, the lower electrode being electrically connected to the first impurity diffusion layer, wherein the upper electrode includes: a first conductive film formed on the inner surface of the capacitor insulating film and formed only in the opening; and a second conductive film formed to extend from the top surface of the first conductive film to the top surface of the capacitor insulating film, and the top surface of the lower electrode is substantially flush with the top surface of the second interlayer insulating film.