Patent ID: 7904664

Claim:
A method for selectively monitoring load instructions to support transactional execution of a process, comprising: generating instructions for a program, wherein the program includes a block of instructions that is to be executed transactionally during transactional execution, wherein changes made during the transactional execution are not committed to an architectural state of a processor until the transactional execution successfully completes, and wherein generating instructions involves determining without programmer intervention which of the load instructions that take place during transactional execution need to be monitored; while generating instructions for the program: encountering a load instruction within the block of instructions; determining whether the load instruction is to be monitored during transactional execution by examining an address of the load instruction to determine whether the load is directed to an address within a range of addresses for which load instructions are to be monitored; if the load instruction is to be monitored, generating a monitored load instruction to perform a corresponding load operation and load-mark a cache line associated with the load instruction to facilitate subsequent detection of an interfering data access to the cache line from another process; and otherwise, generating an unmonitored load instruction to perform the corresponding load operation without load-marking the cache line.