Patent ID: 8365040

Claim:
A system comprising: a temporary memory; a writing apparatus for writing first logical data from said temporary memory into flash memory cells having at least two levels, thereby to generate a physical representation of the first logical data including known errors; a reading apparatus for reading said physical representation from the cells, thereby to generate, and store in said temporary memory, second logical data which if read immediately is identical to said first logical data other than said known errors; and a controlling apparatus controlling said writing apparatus and said reading apparatus, wherein the controlling apparatus is operative to identify said known errors by comparing said first logical data to second logical data read immediately after said physical representation is generated, to store information characterizing said known errors and to use said information, when said second logical data is next read, to correct said known errors; wherein said information comprises (a) multiple earmarks, each earmark is stored in a cell containing at least one known error, and (b) correct logical data for each cell storing an earmark.