Patent ID: 7166510

Claim:
A method for manufacturing a flash memory device, the method comprising the steps of: forming a gate oxide film for high voltage on the whole surface of a semiconductor substrate on which a cell region, a low voltage region and a high voltage region have been formed; forming photoresist patterns on the high voltage region to expose the gate oxide film for high voltage formed in the cell region and the low voltage region; performing a first removal step to etch the gate oxide film for high voltage formed in the cell region and the low voltage region by a predetermined depth to provide the gate oxide film of a predetermined thickness, by performing a wet etching process using the photoresist patterns as an etching mask; performing a second removal step to remove the entire gate oxide film for high voltage formed in the cell region and the low voltage region, by performing a cleaning process on the resulting structure; removing the photoresist patterns; sequentially forming a tunnel oxide film, a first polysilicon film, a second polysilicon film, a dielectric film, a third polysilicon film and a metal suicide film on the whole surface of the resulting structure; forming a floating gate electrode and a control gate electrode by patterning the resulting structure; and forming source and drain regions, by implanting ions by using the gate electrodes as an ion implant mask.