Patent ID: 7764080

Claim:
A method for operating an electronic circuit, said method comprising the steps of: providing an electronic circuit comprising: an output terminal; a plurality of field effect transistors to be tested, said field effect transistors having first drain-source terminals, gates, and second drain-source terminals; at least a first measuring field effect transistor having a first drain-source terminal, a gate, and a second drain-source terminal, said second drain-source terminals of said plurality of field effect transistors to be tested being interconnected with said first drain-source terminal of said first measuring field effect transistor and said output terminal; a first biasing terminal, said second drain-source terminal of said first measuring field effect transistor being interconnected with said first biasing terminal; a second biasing terminal, said first drain-source terminals of said field effect transistors to be tested being interconnected with said second biasing terminal; a state machine coupled to said gates of said field effect transistors to be tested and said gate of said first measuring field effect transistor, said state machine being configured to energize said gate of said first measuring field effect transistor and to sequentially energize said gates of said field effect transistors to be tested, whereby an output voltage appears on said output terminal; circuitry to compare said output voltage to a reference value; and a second measuring field effect transistor having a first drain-source terminal, a gate, and a second drain-source terminal, said first drain-source terminal of said second measuring field effect transistor being interconnected with said first drain-source terminal of said first measuring field effect transistor, said second drain-source terminal of said second measuring field effect transistor being interconnected with said first biasing terminal, said gate of said second measuring field effect transistor being interconnected with said state machine, said first and second measuring field effect transistors each having a width, said widths being selected so as to operate a given one of said field effect transistors to be tested at a measuring point wherein said given one of said field effect transistors is operating, at a given time, in a desired one of a linear region and a saturation region; energizing said gate of said first measuring field effect transistor; sequentially energizing said gates of said field effect transistors to be tested, whereby said output voltage appears on said output terminal; and comparing said output voltage to said reference value.