Patent ID: 8043910

Claim:
A method for preparing an integrated semiconductor structure including a heterojunction bipolar transistor and a Schottky diode, the method including the steps of providing a substrate; depositing the heterojunction bipolar transistor overlying and contacting the substrate, wherein the heterojunction bipolar transistor includes a transistor collector layer; and depositing the Schottky diode overlying the substrate and overlying the transistor collector layer; wherein the heterojunction bipolar transistor is formed by depositing: a transistor collector contact layer overlying and contacting the substrate, a transistor collector ohmic contact to the transistor collector contact layer, the transistor collector layer overlying and contacting the transistor collector contact layer, a transistor base layer overlying and contacting the transistor collector layer, a transistor base ohmic contact to the transistor base layer, a transistor emitter structure overlying and contacting the transistor base layer, and a transistor emitter ohmic contact overlying and contacting the transistor emitter structure; and wherein the Schottky diode is formed by depositing: an emitter layer overlying and contacting the transistor base layer, a diode contact layer overlying and contacting the emitter layer, a diode cathode ohmic contact to the diode contact layer, the Schottky diode barrier layer structure overlying and contacting the diode contact layer, and a diode anode contact to the Schottky diode barrier layer structure; and wherein the Schottky diode barrier layer structure is not formed of the same material as the transistor collector layer.