Patent ID: 8314001

Claim:
A method for making independently controllable vertically stacked Field Effect Transistors (FETs) comprising: forming, on a semiconductor substrate, a vertical structure comprising a first gate dielectric layer, a first conductor layer, a second dielectric layer, a second conductor layer, and a third dielectric layer; implanting a first source/drain region having a first doping type, thereby creating a first source and a first drain for a first FET, the semiconductor substrate forming a first body for the first FET; growing a first epitaxial layer having a second doping of the same type as the first doping type, thereby forming a second source and a second drain for a second FET; growing a second epitaxial layer having a third doping of opposite type as the first doping type, thereby forming a second body for the second FET; creating an isolation between the first source and the overlying first epitaxial layer; connecting the first conductor layer to a first signal source; connecting the second conductor layer to a second signal source.