Patent ID: 8283970

Claim:
A circuit comprising: a charge pump circuit including a first power transistor configured to be selectively actuated by a first control signal to deliver relatively higher amounts of current to a capacitor, the charge pump circuit further including a second non-power transistor connected in parallel with the first power transistor and configured to be selectively actuated by a second control signal to deliver relatively lower amounts of current to the capacitor, the charge pump circuit including a pumped voltage output; a voltage sensing circuit configured to sense the pumped voltage output and generate a sensed voltage output; a comparison circuit configured to compare the sensed voltage output to a threshold voltage; a logic circuit coupled to receive an output of the comparison circuit, the logic circuit configured to enable the first power transistor and disable the second non-power transistor if the comparison is not satisfied, and further configured to disable the first power transistor and enable the second non-power transistor if the comparison is satisfied; wherein the logic circuit further includes a timer, the timer configured to count a time period starting in response to the comparison being satisfied where the logic circuit disables the first power transistor and enable the second non-power transistor, the logic circuit further configured to enable the first power transistor and disable the second non-power transistor when the time period expires.