Patent ID: 7763941

Claim:
An integrated circuit device having an I/O ESD protection cell, wherein the I/O ESD protection cell comprises: a power supply voltage (V DD ) ESD protection element formed within a second conductivity type well in a first conductivity type substrate and comprising a first conductivity type active region connected to an I/O pad and a second conductivity type active region connected to a V DD line; a power clamp element formed within the second conductivity type well in the first conductivity type substrate and comprising the second conductivity type active region connected to the V DD line and the first conductivity type active region connected to a ground voltage (V SS ) line; and a V SS ESD protection element formed within a first conductivity type well in the first conductivity type substrate and comprising the first conductivity type active region connected to the V SS line and the second conductivity type active region connected to the I/O pad.