Patent ID: 7309889

Claim:
A DRAM device, comprising a perovskite-type dielectric capacitively spacing a pair of conductive nodes, the perovskite-type dielectric comprising a first layer physically contacting a first of the nodes and a second layer against the first layer and further from the first node than the first layer, said second layer having a different degree of amorphous content relative to crystalline content than the first layer, the first layer having less crystalline content than the second layer; the perovskite-type dielectric material comprising barium, strontium, titanium and oxygen throughout both the first and second layers; and wherein the perovskite-type dielectric comprises a third layer proximate the second node, wherein the second layer is between the first and third layers, and wherein the third layer has a degree of amorphous content relative to crystalline content that is about the same as the first layer.