Patent ID: 7446404

Claim:
A three-dimensional package, comprising: a first unit, comprising: a first wafer, having a first surface and a second surface, wherein the first surface has at least one first pad and a first protection layer exposing the first pad; at least one first hole, penetrating the first wafer; a first isolation layer, disposed on the side wall of the first hole; a first conductive layer, covering the first pad, a part of the first protection layer, and the first isolation layer, wherein the lower end of the first conductive layer extends below the second surface of the first wafer; a first metal, disposed in the first hole and electrically connected to the first pad via the first conductive layer; and a first solder, disposed on the first metal in the first hole, wherein the melting point of the first solder is lower than that of the first metal; and a second unit stacked on the first unit, comprising: a second wafer, having a first surface and a second surface, wherein the first surface has at least one second pad and a second protection layer exposing the second pad; at least one second hole, penetrating the second wafer; a second isolation layer, disposed on the side wall of the second hole; a second conductive layer, covering the second pad, a part of the second protection layer, and the second isolation layer, wherein the lower end of the second conductive layer extends below the second surface of the second wafer and contacts the upper end of the first solder; a second metal, disposed in the second hole and electrically connected to the second pad via the second conductive layer; and a second space, disposed on the second metal in the second hole.