Patent ID: 8279917

Claim:
A pulse width modulation (PWM) controller, comprising: a first counter which counts a reference clock signal, and outputs a first count value; a first counter controller which detects that the first count value reaches a first set value, and resets the first counter; a leading edge control signal generator which detects that the first count value reaches a second set value, and outputs a leading edge control signal specifying a leading edge position of a pulse width modulation signal; an adjustment clock generator which generates an adjustment clock signal having a cycle different from that of the reference clock signal; a second counter controller which detects that the first count value reaches a third set value, and instructs the adjustment clock generator to start an output operation thereof; a second counter which counts the adjustment clock signal, and outputs a second count value; a trailing edge control signal generator which detects that the second count value reaches a fourth set value, and generates a trailing edge control signal specifying a trailing edge position of the pulse width modulation signal; and a PWM pulse generator which generates a rising edge of the pulse width modulation signal on a basis of the leading edge control signal, and which generates a falling edge of the pulse width modulation signal on a basis of the trailing edge control signal.