Patent ID: 7965912

Claim:
A method of manufacturing a temperature insensitive Arrayed Waveguide Grating device in order to compensate for optical characteristics changes that result from a decrement of an optical path length by a diced width of a substrate when an optical path of an Arrayed Waveguide Grating chip is diced, the method comprising the following steps: designing a photomask for the Arrayed Waveguide Grating chip in which a waveguide part with an additional optical path length is added onto the Arrayed Waveguide Grating chip to be diced; preparing the Arrayed Waveguide Grating chip on a planar substrate in which the waveguide part with the additional optical path length is added onto the Arrayed Waveguide Grating chip to be diced; dicing an optical path of the Arrayed Waveguide Grating chip to separate the Arrayed Waveguide Grating chip into distinctive parts, and removing the optical path length which is equivalent to a dicing kerf width of the substrate; and mechanically re-aligning the optical path of the Arrayed Waveguide Grating chip, wherein the dicing is dicing a part in an input waveguide of the Arrayed Waveguide Grating chip, dicing a part in an input slab waveguide of the Arrayed Waveguide Grating chip, or dicing a part in an interface between an input stripe waveguide circuit and the input slab waveguide of the Arrayed Waveguide Grating chip.