Patent ID: 8387053

Claim:
A method of performing operations in a computer system, the method comprising: providing compiled code including a first thread, a second thread, and a third thread, wherein each of the first, the second, and the third threads include a respective plurality of blocks and each respective block includes a respective data pre-fetch component and a respective instruction execute component; performing a first data pre-fetch component from a first block of a first thread prior to performing a first instruction execute component from a block prior to the first block of the first thread; performing a first additional component after the first data pre-fetch component from the block of the first thread has been performed; and performing a first instruction execute component from a first block of the third thread, wherein the first instruction execute component from the first block of the third thread is performed after the first additional component has been performed and after a second data pre-fetch component from a second block of the third thread has been performed, and wherein the first additional component is from either the second thread or another block of the first thread that is not the first block.