Patent ID: 8704381

Claim:
A package comprising: a. a first semiconductor die; b. a formed lead frame having a plurality of formed leads each having a first end positioned near but spaced apart from the first semiconductor die and substantially in a first planar level, a second end substantially in the first planar level, and a middle section between the first end and the second end, wherein the middle section is substantially in a second planar level, wherein the second planar level is higher than the first planar level, wherein the second end is exposed to an edge of the package on a bottom and but not a top of the package; c. means for electrically coupling between at least one pad on the first semiconductor die and at least one of the first ends; d. a second semiconductor die stacked on and electrically insulated from the first semiconductor die wherein the second semiconductor die is electrically coupled to the at least one of the formed leads; and e. a resin formed around the first semiconductor die and between the leads such that the package has a thickness substantially equal to a thickness of the lead frame.