Patent ID: 7089396

Claim:
A method using a profiling cache for management of virtual memory comprising the steps of: storing a set of entries in the profiling cache, each entry of said set of entries including a page address, a time stamp for said page address, and a least recently used (LRU) count; said LRU count being updated for each access of said page address; casting out entries in the profiling cache using said LRU counts; providing a translation lookaside buffer (TLB) including a first TLB section for storing a plurality of temporarily pinned entries and a second TLB section for storing a plurality of non-pinned entries; responsive to a TLB interrupt, loading an entry in said second TLB section using a first in first out algorithm for replacing one of said non-pinned entries; periodically updating said first TLB section utilizing identified ones of said set of entries in the profiling cache having oldest time stamps including the steps of identifying an entry within said second TLB section included in said identified profiling cache entries having oldest time stamps, removing said entry from said second TLB section, and placing said entry in said first TLB section.