Patent ID: 6943407

Claim:
A field effect transistor comprising: a substrate, a first single crystalline silicon region having a p-type concentration level greater than 1×10 19 atoms/cm 3 on said substrate, a second carbon-doped epitaxial region over said first crystalline silicon region having a p-type concentration level greater than 1×10 19 atoms/cm 3 , a third silicon epitaxial region over said second carbon-doped region doped n-type, a fourth compressively strained Si l-w-q epitaxial region over said third silicon epitaxial region, said Si l-w-q region having a p-type concentration level greater than 1×10 19 atoms/cm 3 , a fifth silicon containing region over said fourth Si l-w-q Ge w C q region having a p-type concentration level greater than 1×10 19 atoms/cm 3 , a vertical structure comprising at least one sidewall extending from said first silicon region, second region of carbon-doped layer, third region of silicon, fourth region of Si l-w-q Ge w C q epitaxial region to said fifth region of silicon, a sixth compressively strained Si l-s Ge s region over a region of said at least one sidewall of said vertical structure extending from said second region of carbon-doped layer, over said third region of silicon to said fourth region of Si l-s Ge w C q epitaxial region, a gate dielectric region over said sixth compressively strained Si l-w-q Ge s region, and a gate conducting region over said dielectric region.