Patent ID: 7303648

Claim:
A system comprising: an etcher; and a control system programmed to cause the etcher to form a via through a dielectric material to a conductive material while preventing creation of a micro-via having a high aspect ratio in a case of via formation misalignment in an etch stop-less integration, wherein the control system is programmed to use the etcher to sequentially perform at least three timed etch operations comprising: (1) removing a first portion of the dielectric material to form a hole in the dielectric material, (2) performing an inward tapering etch that removes a second portion of the dielectric material below the first portion to form the via, the via touching down on the conductive material and having a depth, and (3) laterally expanding a bottom dimension of the via without significant increase in the depth of the via; wherein the operations (1), (2) and (3) are performed in this specific order.