Patent ID: 8115274

Claim:
A fuse structure comprising: a substrate; a fuse conductive trace disposed closer to a first chip surface than to a second chip surface facing away from the first chip surface; a metallization layer on the substrate disposed on a side of the fuse conductive trace facing away from the first chip surface; and a planar barrier multilayer assembly disposed between the fuse conductive trace and the metallization layer and comprising multiple barrier layers of different materials, wherein the entire surface of the planar barrier multilayer assembly facing away from the first chip surface is a planar surface that lies in a single plane and wherein portions of the planar surface are in direct mechanical contact with first and second areas of the metallization layer; wherein the fuse conductive trace, the metallization layer, and the barrier multilayer assembly are disposed such that when cutting the fuse conductive trace and the barrier multilayer assembly, a first area of the metallization layer is electrically isolated from a second area of the metallization layer.