Patent ID: 7368378

Claim:
A method of making integrated circuits, comprising: forming a first mask layer having one or more openings or trenches, with each opening exposing a portion of one or more transistor contact regions; forming a first conductive structure on the first mask layer, with the first conductive structure having one or more portions contacting at least one of the exposed transistor contact regions; forming a second mask layer having one or more openings or trenches, with each opening exposing a portion of the first conductive structure; forming a second conductive structure on the second mask layer, with one or more portions of the second conductive structure contacting at least one of the exposed portions of the first conductive structure; removing in a single procedure at least respective portions of the first and second mask layers after forming the second conductive structure; forming in a single procedure a diffusion barrier on at least respective portions of the first and second conductive structures after removing at least the respective portions of the first and second mask layers; and forming in a single procedure an insulator on and between the first and second conductive structures after forming the diffusion barrier.