Patent ID: 7652289

Claim:
A semiconductor device comprising: a driver circuit comprising: a buffer circuit comprising a first thin film transistor and a second thin film transistor formed over a substrate; and a logic circuit comprising a third thin film transistor formed over the substrate, wherein the first thin film transistor comprises a channel forming region, a first impurity region and a second impurity region, and an impurity concentration of the first impurity region is higher than an impurity concentration of the second impurity region, wherein a length of the channel forming region of the first thin film transistor is 7 μm or longer, wherein the length of the channel forming region of the first thin film transistor is twice or more as compared with a length of a channel forming region of the third thin film transistor, and wherein a source or a drain electrode of the first thin film transistor is electrically connected to a source or a drain electrode of the second thin film transistor in series.