Patent ID: 8638346

Claim:
A source line driver circuit comprising: a logic block configured to, receive serialized first image data corresponding to an analog voltage provided to a first source line among the source lines, increase the number of bits of the first image data, and output second image data having the increased number of bits; and a source channel driver unit configured to receive the second image data having the increased number of bits and to provide at least one analog voltage corresponding to the received second image data to source lines, the source channel driver unit including at least one source channel driver configured to, based on the second image data, select one gray-scale voltage among a plurality of gray-scale voltages and provide the analog voltage corresponding to the first image data to the first source line, wherein the at least one source channel driver includes, a level shifter configured to shift a signal level of each of the bits of the second image data, a plurality of sub decoding blocks each configured to output at least one gray-scale voltage among the plurality of gray-scale voltages based on first group bits among bits output from the level shifter, a decoder configured to select one gray-scale voltage among the at least one gray-scale voltage output from the plurality of sub decoding blocks based on at least one final selection bit among at least one of the bits of the second image data and the bits output from the level shifter, and an amplifier configured to buffer the gray-scale voltage output from the decoder and output a buffering result as the analog voltage corresponding to the first image data to the source line.