Patent ID: 8718212

Claim:
A rate matching method, comprising: receiving bit data of a first, a second, and a third input subblock, inserting dummy data into bit data in each subblock to respectively form even-numbered rows and odd-numbered rows of a matrix to be buffered for each subblock, and respectively storing bit data of the even-numbered rows and odd-numbered rows to an even-numbered row buffer and an odd-numbered row buffer of each subblock; inputting bit data of the even-numbered rows in the even-numbered row buffer and bit data of the odd-numbered rows in the odd-numbered row buffer of each subblock to a second buffer mapping to each subblock, and respectively forming a matrix of R subblock TC rows and V subblock TC columns by using the bit data of the even-numbered rows and the bit data of the odd-numbered rows of each subblock; acquiring a specified address of data of each subblock, and sending the specified address to the second buffer mapping to each subblock, so that the second buffer mapping to each subblock sends data at the specified address; receiving data sent by the second buffer and selecting data of specified subblocks from the received data; deleting dummy data from the selected data according to the specified address to obtain valid output data; and sending the valid output data after joining, wherein a length of sent valid output data is equal to a preset output length; wherein T subblock TC defines the number of the rows in the matrix, and V subblock TC defines the number of the columns in the matrix.