Patent ID: 8117401

Claim:
A method of data processing in a multiprocessor data processing system, said method comprising: in response to processor requests for data from a coherent shared memory system shared by all of a plurality of processing units in the multiprocessor data processing system, one or more requesting processing units of the plurality of processing units initiating on an interconnect of the multiprocessor data processing system, interconnect operations including at least first and second memory access requests that indicate acceptability of a variable amount of data to service the first and second memory access requests; in response to snooping the first and second memory access requests on the interconnect, a snooper in one of the plurality of processing units selecting a variable non-zero amounts of data to supply in response to the first and second memory access requests based upon at least one dynamic condition in the multiprocessor data processing system and transmitting the selected amounts of data to the one or more requesting processing units via the interconnect, wherein: said at least one dynamic condition includes available bandwidth on said interconnect; the snooper selects less than a full cache line of data in response to the first memory access request based on the available bandwidth when the selecting is performed for the first memory access request and selects a full cache line of data in response to the second memory access request based on available bandwidth when the selecting is performed for the second memory access request; and the one or more requesting processing units receiving the selected amounts of data and utilizing at least some of the selected amounts of data to service the processor requests.