Patent ID: 8035713

Claim:
A driving circuit comprising, when a middle voltage within a withstanding voltage of a transistor from a first voltage VL as a low voltage of a source voltage and a second voltage VH as a high voltage of the source voltage is represented by VM and a third voltage within the withstanding voltage of a transistor from the second voltage VH or the first voltage VL is represented by VS or VD: a first transistor whose source electrode is connected to a node of a middle voltage VM; a second transistor whose source electrode is connected to the drain electrode of the first transistor and whose drain electrode is connected to an output terminal; and a controller applying a signal having an amplitude of a difference between the voltages VL and VH to the gate electrode of the first transistor and applying a signal having an amplitude of a difference between the voltages VS and VH or between the voltages VL and VD to the gate electrode of the second transistor.