Patent ID: 7848154

Claim:
A nonvolatile memory device comprising: a first current detecting circuit that outputs a reference voltage according to a current of a reference cell; a second current detecting circuit that outputs a memory cell voltage according to a current of a selected memory cell; a first bias circuit to which the reference voltage is input and through which a current according to the reference cell flows; a first differential amplifying circuit coupled to the first bias circuit by a current mirror configuration, wherein: the memory cell voltage is input to the first differential amplifying circuit; and the first differential amplifying circuit outputs a signal according to the difference between a current flowing through the first bias circuit and a current according to the memory cell voltage; a second bias circuit coupled to the first bias circuit by a current mirror configuration; and a second differential amplifying circuit coupled to the second bias circuit by a current mirror configuration, wherein: the signal output from the first differential amplifying circuit is input to the second differential amplifying circuit; and the second differential amplifying circuit outputs a signal according to the signal output from the first differential amplifying circuit and a signal output from the second bias circuit.