Patent ID: 7652333

Claim:
A semiconductor integrated circuit, comprising: a substrate with an insulating thin film thereon; first MOS transistors each having a source, a drain, and a body on the insulating thin film of the substrate, a gate isolation film on the body, and a gate on the gate isolation film; and second MOS transistors each having a source, a drain, and a body on the insulating thin film of the substrate, a gate isolation film on the body, and a gate on the gate isolation film, the first MOS transistors having gate isolation films thicker than those of the second MOS transistors; and a power-supply-interruptible circuit and a power-supply-uninterrupted circuit, which are constituted by the first and second MOS transistors and mixed and laid out in a region for circuit formation of the integrated circuit, wherein the power-supply-interruptible circuit has the first MOS transistors each constituting a power switch, and the second MOS transistors each connected in series with the power switch between source and ground lines, the power-supply-uninterrupted circuit has a plurality of the second MOS transistors in series between the source and ground lines, and a gate control signal for the first MOS transistors each constituting a power switch is made larger in amplitude than a gate control signal for the second MOS transistors.