Patent ID: 7838365

Claim:
A method for fabricating a SONOS memory device comprising: a first step of forming a mask for a predetermined active region by depositing an insulating layer on a semiconductor substrate and etching the insulating layer; a second step of forming a fin-shape active region by etching the semiconductor substrate using the mask, and forming a field region around the active region with an oxide layer; a third step of planarizing the upper part of the active region and the field region, and etching the oxide layer of the field region in order to expose a part of the fin-shape active region; a fourth step of an annealing process for making the exposed fin-shape part of the active region cylindrical; and a fifth step of forming multi-dielectric layers (ONO layers) by depositing a first oxide layer, a nitride layer and a second oxide layer on the cylindrical active region and the field region, and forming a control gate by depositing a gate material on the multi-dielectric layers and etching the gate material, wherein at the fifth step, the etching process for forming a control gate is etching a gate material deposited on the multi-dielectric layers as well as the multi-dielectric layers under the gate material to be etched.