Patent ID: 8577023

Claim:
An encryption processing apparatus comprising: an encryption processor that performs data transformation processing using a plurality of F-function including S-boxes as a round function on individual data lines obtained by dividing input data by a number greater than or equal to three, wherein the encryption processor is configured to include different types of S-boxes in the plurality of F-functions that have the same input data line and output data line and that are vertically adjacent to one another, the different types of S-boxes in the plurality of F-functions having the same bit configuration, the data input to each of the plurality of F-functions being the result of an exclusive-OR operation on the data input to a previous F-function; wherein the encryption processor is further configured to perform non-linear transformation processing, using at least two different s-bit input/output types of S-boxes, wherein the at least two different types of S-boxes are: (1) type 1: an S-box using an inverse map: Y=X −1 or a power function Y=X q over an extension field GF(2 s ); (2) type 2: an S-box generated by combining a plurality of small t-bit S-boxes, where t<s; and (3) type 3: an S-box selected at random.