Patent ID: 7009292

Claim:
A package type semiconductor device comprising: a semiconductor chip having a semiconductor part; a main electrode disposed on a principal surface of the chip for electrically connecting to a first region of the semiconductor part; a control wiring layer disposed on the principal surface of the chip for electrically connecting to a second region of the semiconductor part and for controlling an electric potential of the second region of the semiconductor part; a blocking member disposed on the principal surface of the chip and electrically isolated from the control wiring layer; a first metallic layer disposed on the principal surface of the chip; a protection film disposed among the main electrode, the control wiring layer and the blocking member; and a metal block for covering at least a part of the main electrode and the control wiring layer and for electrically connecting to the main electrode through the first metallic layer, wherein the chip, the main electrode, the control wiring layer, the blocking member, and the metal block are packaged, and wherein the blocking member is disposed between the main electrode and the control wiring layer.