Patent ID: 8686469

Claim:
A semiconductor device comprising: a semiconductor substrate having a first main surface and a second main surface facing each other, and a diode active region and an edge termination region adjacent to each other; a first region of a first conductivity type formed in said diode active region and within said semiconductor substrate; a second region of a second conductivity type formed on said first main surface of said semiconductor substrate to form a diode together with said first region in said diode active region; a third region of the first conductivity type formed in said edge termination region and within said semiconductor substrate; and a fourth region of the second conductivity type serving as an edge termination formed on said first main surface of said semiconductor substrate in said edge termination region, said first region and said third region sharing a drift region of the first conductivity type forming a pn junction with said fourth region, said first region and said third region being located on said second main surface and sharing a fifth region of the first conductivity type which is higher in concentration of first conductivity type impurities than said drift region, said first region and said third region being extended from said first main surface to a sixth region, and said drift region in said third region being greater in number of crystal defects per unit volume than said drift region in said first region in order that said drift region in said third region is shorter in carrier lifetime than said drift region in said first region.