Patent ID: 8566507

Claim:
A data storage device comprising: a first memory board comprising multiple memory chips and a memory module storing device characteristics of the memory chips; and a controller board that is arranged and configured to operably connect to the first memory board, wherein the first memory board and the controller board are disposed on physically separate printed circuit boards that are connected together using a ball grid array connector and wherein the controller board comprises: a PCI-e interface to a host, a field programmable gate array (FPGA) controller that is arranged and configured to: control command processing for multiple different types of memory chips, automatically recognize a type of the memory chips on the first memory board by reading the device characteristics of the memory chips stored in the memory module on the first memory board, including memory chips manufactured by different vendors, single-level cell (SLC) NAND flash memory chips and multi-level cell (MLC) NAND flash memory chips such that the data storage device is configurable with different types of memory chips based on one or more applications operating on the host, use the device characteristics of the memory chips to configure the controller based on the types of the memory chips on the first memory board, receive commands from the host using the interface, and execute the commands using the memory chips by translating the commands to native memory chip commands based on the type of the memory chips on the first memory board; and a memory module disposed on the controller board that is operably coupled to the FPGA controller and that is configured to store one or more images for the FPGA controller including firmware for use by the FPGA controller to automatically recognize the type of the memory chips.