Patent ID: 7729418

Claim:
A testing circuit configured to measure a center frequency of a clock signal outputted by a clock generator, said clock generator having frequency modulation capability for generating said clock signal by adding a predetermined modulated analog signal to a control voltage to be outputted to a voltage control oscillator which outputs the clock signal, said testing circuit comprising: an A/D converter configured to receive and convert the predetermined modulated analog signal into a digital signal and output said digital signal as a reference signal based on the predetermined modulated analog signal, said A/D converter comprising a comparator configured to binarize said predetermined modulated analog signal using one half of voltage amplitude thereof as a base; a counter configured to receive the digital signal and the clock signal and count a period of said clock signal to obtain a count according to said digital signal, said counter being configured to count a period of said clock signal outputted by said clock generator according to a binary signal outputted by said comparator; a counter memory configured to store said count; a specification memory configured to store at least one specification value related to said center frequency of said clock signal; and a comparator configured to compare said count with said at least one specification value to obtain a comparison result and output said comparison result.