Patent ID: 7206893

Claim:
A linking method under a mother and child block architecture for building a check area and a logical page of a child block in a flash memory, wherein when a host writes data into a logical block of said flash memory, the linking method comprising: defining a block corresponding to said logical block as a mother block; locating a new block from a backup block and defining said new block as a child block, wherein said mother block and said child block have the same logical address; recording the data into a page of said child block, while retaining original data in said mother block; using a redundant page, which stores metadata in said child block for creating a check area; recording said redundant page of said child block which corresponds to a page in said mother block; and using said check area consisting of a logical page for identifying whether the data to be retrieved is stored in said mother block or child block when a subsequent read is performed; wherein said check area in said redundant page of child block is defined as three bytes, wherein a first and second byte indicate pages of said child block and a third byte indicates a page of said mother block.