Patent ID: 8365141

Claim:
A computing device-implemented method, comprising: displaying a model that graphically represents a design, the model including a plurality of hierarchically arranged blocks, at least two of the hierarchically arranged blocks to generate signals comprising different signal properties, and at least one of the hierarchically arranged blocks to convert the generated signals based on an automatic inference of the signal properties; displaying at least a portion of the model in each of a plurality of graphical windows; associating at least one of the hierarchically arranged blocks with an alias, the at least one of the hierarchically arranged blocks being displayed in a first graphical window, of the plurality of graphical windows; displaying the alias in at least two of the plurality of graphical windows, the at least one of the hierarchically arranged blocks not being displayed in the at least two of the plurality of graphical windows; and providing access the at least one of the hierarchically arranged blocks via an interaction with the alias.