Patent ID: 7106101

Claim:
An integrated circuit (IC) having a functional pathway configuration of 14 connections, comprising: a positive supply voltage (VDD) input for logic circuits of the integrated circuit (IC); a ground reference (VSS) input for the logic circuits of the IC; an oscillator crystal/external clock source (OSC1/CLKIN) input; an oscillator crystal (OSC2) output; a reset (RESET) input; an asynchronous receive (RXIR) input from an IrDA transceiver; an asynchronous transmit (TXIR) output to the IrDA transceiver; a mode select (MODE) input; an enable (EN) input; an asynchronous serial (TX) input from a controller serial communications interface; an asynchronous serial (RX) output to the controller serial communications interface; a first baud rate selection (BAUD0) input; a second baud rate selection (BAUD1) input; and a third baud rate selection (BAUD2) input.