Patent ID: 7537999

Claim:
A method for manufacturing complementary metal oxide semiconductor (CMOS) image sensor structures, comprising the steps of: (a) forming a gate insulating layer, a conductive layer and an ion implantation barrier layer on a semiconductor substrate; (b) patterning said ion implantation barrier layer, said conductive layer, and said gate insulating layer; (c) forming a photoresist layer on said patterned ion implantation barrier layer, said conductive layer, and said gate insulating layer and patterning said photoresist layer to define a photodiode region in said substrate; and (d) implanting a low concentration of dopant ions into said photodiode region using said photoresist layer pattern and said patterned ion implantation barrier layer as an ion implantation mask to form a low-concentration dopant region of a photodiode, wherein said ion implantation barrier layer comprises an oxide layer and/or a nitride layer, wherein one end of the photoresist layer pattern is on said ion implantation barrier layer and another end of the photoresist layer pattern is not on said photodiode region, wherein the ion implantation barrier layer prevents the low-concentration dopant region from overlapping with a lower region of the gate electrode, and wherein a depth of said low-concentration dopant region is larger than a height of said conductive layer, but the depth of said low-concentration dopant region is smaller than a sum of the height of said conductive layer and a height of said ion implantation barrier layer.