Patent ID: 8448033

Claim:
An error correction code encoder, comprising: a first encoder, arranged to encode a plurality of input information bits to generate a plurality of first parity check bits; an interleaver, arranged to interleave the plurality of input information bits to generate a plurality of permuted information bits; and a second encoder, arranged to encode the plurality of permuted information bits to generate a plurality of second parity check bits, wherein the interleaver interleaves the plurality of input information bits in a window-wise manner so that the plurality of input information bits are divided into a plurality of input information bit windows before being interleaved, and a plurality of permuted information bit windows comprising the plurality of permuted information bits are generated thereafter, and wherein when the plurality of input information bit windows are grouped into a plurality of groups according to different window index characteristics, the window index of each permuted information bit window generated by the interleaver has the same characteristic as the corresponding input information bit window interleaved therefrom.