Patent ID: 7477256

Claim:
A graphics processor device, comprising: a second dedicated interface configured to provide a point-to-point connection between the graphics processor device and a first slave graphics device for the transfer of digital pixel data and synchronization signals; a graphics processing pipeline; a combiner unit configured to select on a pixel-by-pixel basis, between pixel data generated locally within the graphics processing pipeline and pixel data generated by the first slave graphics device and received from the first slave graphics device through the second dedicated interface, to produce first combined pixel data that is output to a first dedicated interface; a final pixel processing unit coupled to the combiner unit and configured to receive the first combined pixel data and produce a displayable image for output to a display device; and a raster lock unit coupled to the combiner unit and configured to generate the synchronization signals for synchronizing the displayable image output to the display device, wherein the synchronization signals are transmitted to the first slave graphics device through the second dedicated interface.