Patent ID: 7257042

Claim:
A sense amplifier circuit for sensing a logic state of a selected memory cell in a memory circuit, the sense amplifier circuit comprising: a precharge circuit adapted for connection to a pair of complementary bit lines corresponding to the selected memory cell, the precharge circuit being operative to selectively drive the pair of complementary bit lines to a first voltage in response to a first control signal; a latch circuit adapted for connection to the pair of complementary bit lines; and a replication circuit adapted for connection to the pair of complementary bit lines, the replication circuit being operative to selectively transfer a voltage representative of a logic state on a first bit line of the pair of complementary bit lines to a second bit line of the pair of complementary bit lines in response to at least a second control signal, wherein the replication circuit comprises: a first switch circuit adapted for connection between the first bit line and a second voltage source supplying a second voltage, the first switch circuit including a first input adapted for receiving the second control signal and a second input adapted for connection to the second bit line; and a second switch circuit adapted for connection between the second bit line and the second voltage source, the second switch circuit including a first input adapted for receiving a third control signal and a second input adapted for connection to the first bit line.