Patent ID: 8441130

Claim:
A power supply interconnect structure of a semiconductor integrated circuit comprising: power supply interconnects located in two different interconnect layers with at least one single intermediate interconnect layer interposed between the different interconnect layers; and a single borderless stack via electrically connecting the power supply interconnects located in the two interconnect layers to form a connecting portion of the interconnects, wherein the single borderless stack via forming the connecting portion of the interconnects includes: single vias located in respective two or more insulating layers located between the two interconnect layers, and an interconnect located in each of the at least one intermediate interconnect layer, and having a same cross-sectional shape as the single vias of the insulating layers, and the single vias of the insulating layers and the interconnect of the at least one intermediate interconnect layer are alternately layered in a same vertical line and electrically connected to form a unit.