Patent ID: 7053437

Claim:
A semiconductor memory device including memory cells, each memory cell comprising: a gate insulating film formed on a semiconductor substrate; a gate electrode formed on the gate insulating film; a channel region located below the gate electrode; a pair of source and drain regions arranged on a opposite_sides; respectively, of the channel region, the source and drain regions having a conductive type opposite to that of the channel region; and memory functional units located on opposite sides, respectively, of the gate electrode, each memory functional unit including a charge retaining portion and an anti-dissipation insulator, the charge retaining portion being made of a material serving to store charges, the anti-dissipation insulator serving to prevent the stored charges from being dissipated by separating the charge retaining portion from both the gate electrode and the substrate, wherein a distance between a side wall of the gate electrode and a side of the charge retaining portion facing each other (T 2 ) is adapted to differ from a distance between a bottom of the charge retaining portion and a surface of the substrate (T 1 ).