Patent ID: 8819517

Claim:
A turbo decoder comprising: a plurality of maximum a posteriori (MAP) engines: a first plurality of extrinsic memory banks and a second plurality of extrinsic memory banks; and wherein each of the first and second pluralities of extrinsic memory banks is accessible by at least one of the plurality of MAP engines, wherein the plurality of MAP engines comprises N MAP engines, and where the turbo decoder is configured such that during decoding: in a first half of a decoding iteration, the N MAP engines read data from the first plurality of extrinsic memory banks by row according to a first predetermined sequence, and write data to the second plurality of extrinsic memory banks by row according to the first predetermined sequence; and in a second half of the decoding iteration, the N MAP engines read data from the second plurality of extrinsic memory banks by column according to a second predetermined sequence, and write data to the first plurality of extrinsic memory banks by column according to the second predetermined sequence.