Patent ID: 7865758

Claim:
A time of day circuit for distributing a synchronized timebase from a first chip to a second chip and maintaining synchronization timebase operation in a symmetrical multiprocessing system having a fabric bus comprising the steps of: a metastability circuit for aligning a valid oscillator signal with a local logic oscillator of the first chip; a second metastability circuit for aligning a second oscillator signal with the local oscillator of the first chip; a selector and step checker for determining that the valid oscillator signal satisfies a signal criterion; a step-sync generator for generating an immediate time signal based on the valid oscillator signal; a pervasive control for transmitting via the fabric bus, a TOD register value to the second chip; a delay element for delaying the immediate time signal by a preprogrammed delay to produce a delayed time signal; and means for incrementing at least one timebase according to the delayed time signal.