Patent ID: 8067806

Claim:
A CMOS device, comprising: a NMOS device comprising a first gate structure, a source and a drain, the first gate structure being a single metal gate and comprising: a Ti-rich work function modulation layer; and a first nonmetallic conductive layer disposed on the Ti-rich work function modulation layer; and a PMOS device comprising a second gate structure, a source and a drain, the second gate structure being a single metal gate and comprising: an N-rich work function modulation layer; and a second nonmetallic conductive layer disposed on the N-rich work function modulation layer; wherein each of the first gate structure and the second gate structure comprises a gate dielectric layer, a high-k material layer and a cap layer, wherein the cap layer of the first gate structure is between the high-k material layer and the Ti-rich work function modulation layer and the cap layer of the second gate structure is between the high-k material layer and the N-rich work function modulation layer.