Patent ID: 8423600

Claim:
An accumulating operator for use in a digital data processor to realize an output floating point number by operating a first floating point number and a second floating point number, said accumulating operator comprises: a splitter dividing said first floating point number into a third floating point number and a compensation number, wherein the value of the compensation number is an integer value less than the first floating point number and an exponent of said third floating point number is equal to the exponent of said second floating point number; an accumulator electrically connected to said splitter for operating said second and third floating point numbers to realize a fourth floating point number; and a compensator electrically connected to said splitter and said accumulator for operating said fourth floating point number and said compensation number to realize said output floating point number; wherein said first floating point number equals the sum of said third floating point number and said compensation number; said fourth floating point number equals the sum of said second floating point number and said third floating point number; and said output floating point number equals the sum of said fourth floating point number and said compensation number.