Patent ID: 8484278

Claim:
A circuit, comprising: an input circuit to generate a first set of intermediate values in parallel by performing rotations and additions on a set of input values, wherein the input circuit includes a first set of degenerate rotators to perform said rotations, wherein each degenerate rotator in the first set of degenerate rotators performs a rotation by π/2 r , where r is an integer, and wherein the cardinality of the first set of intermediate values is less than the cardinality of the set of input values; an intermediate circuit to generate a second set of intermediate values in parallel by rotating the first set of intermediate values using a set of CORDICs (coordinate rotation digital computers) configured to operate in parallel, wherein the cardinality of the set of CORDICs is equal to the cardinalities of the sets of first and second intermediate values; an angle-generating circuit which generates a set of angle values in parallel, wherein each angle value in the set of angle values is provided as an input to a corresponding CORDIC in the set of CORDICs; an output circuit to generate a third set of intermediate values in parallel by performing rotations on the second set of intermediate values, wherein the output circuit includes a second set of degenerate rotators, wherein each degenerate rotator in the second set of degenerate rotators performs a rotation by π/2 r , where r is an integer, and wherein the cardinality of the third set of intermediate values is greater than the cardinality of the second set of intermediate values; and an accumulator circuit, comprising a set of accumulators configured to operate in parallel, to generate a set of output values based on the third set of intermediate values.