Patent ID: 7709906

Claim:
A semiconductor device comprising: a gate insulation film provided on a semiconductor substrate; a gate electrode provided on the gate insulation film; a pair of first diffusion layers which are provided in the semiconductor substrate in such a manner that the gate electrode is interposed between, and spaced apart from, the first diffusion layers; a pair of second diffusion layers which are provided in the semiconductor substrate in such a manner that the gate electrode is interposed between the second diffusion layers, the second diffusion layers being provided in such a manner as to surround the first diffusion layers, respectively, and each of the second diffusion layers being formed to have a greater depth from a surface of the semiconductor substrate than the first diffusion layers and to have a lower impurity concentration than the first diffusion layers; contact wiring lines provided on the first diffusion layers, respectively; a first insulation layer which is an insulation layer formed in at least one of the second diffusion layers between the gate electrode and the contact wiring lines, the first insulation layer having a greater depth in the semiconductor substrate than the first diffusion layer and a less depth than the second diffusion layer; and a second insulation layer which is an insulation layer formed in the second diffusion layer in such a manner that the first diffusion layer is interposed between the first insulation layer and the second insulation layer, the second insulation layer having a greater depth in the semiconductor substrate than the first diffusion layer and less depth than the second diffusion layer.