Patent ID: 7655985

Claim:
A semiconductor structure comprising: a substrate of a semiconductor material having a top surface; a first doped well formed in the semiconductor material of the substrate, the first doped well having a first conductivity type; a second doped well formed in the semiconductor material of the substrate and disposed adjacent to the first doped well, the second doped well having a first conductivity type; a third doped well formed in the semiconductor material of the substrate, the third doped well arranged between the second doped well and the top surface, the third doped well having a second conductivity type that differs from the first conductivity type; a trench defined in the substrate between the first and second doped wells, the trench including a base and a plurality of first sidewalls between the base and the top surface of the substrate; a first conductive region partially filling the trench, the first conductive region electrically connected with the first doped well along one of the first sidewalls, and the first conductive region electrically connected with the second doped well along another of the first sidewalls; and a first field effect transistor with source and drain regions in the first doped well; and a second field effect transistor with source and drain regions in the third doped well, the first conductive region operating to reduce latch-up of the first and second field effect transistors.