Patent ID: 6846740

Claim:
A method for fabricating a semiconductor component, comprising: providing a substrate having a plurality of semiconductor devices formed thereon, each semiconductor device having a side wall and a device surface at an elevation above the substrate, at least one device having a hard mask on the device surface defining a step interface between the hard mask and the device side wall defining a mask overhang that shadows a portion of the substrate about the perimeter of the semiconductor device; providing a passivation layer on at least a portion of the substrate encasing each semiconductor device and at least a portion of each respective hard mask; lowering the surface of the passivation layer not shadowed by the hard mask at least to an elevation from the substrate that is substantially even with a device surface having a hard mask; and removing each hard mask to expose a planarized surface comprising a semiconductor device and a passivation liner about the perimeter of the semiconductor device.