Patent ID: 8629642

Claim:
A circuit comprising: an error amplifier having a first input to receive a reference signal, a second input and an output to produce an error signal based on the first input and the second input; a lead-lag compensator comprising a lead portion and a lag portion, the lead portion being connected between the second input of the error amplifier and a feedback path from an external controlled system of a closed-loop control system having an associated frequency response, and the lag portion being connected between the second input and the output of the error amplifier; wherein the lead portion comprises a network of passive elements connected to provide a high frequency zero for lead compensation and a high frequency pole to reduce the effect of the high frequency zero on the frequency response; wherein the lag portion comprises a capacitor to provide a dominant low frequency pole; and wherein the lag portion comprises a resistor connected in parallel with a second capacitor to form a parallel RC network and the parallel RC network is connected in series with the capacitor.