Patent ID: 8048741

Claim:
A method of fabricating a semiconductor memory device comprising: forming a plurality of polycrystalline silicon films, which are stacked and separated from each other with insulating films interposed therebetween, in a cell array formation area of a semiconductor substrate; etching the stack structure of the polycrystalline silicon films and the insulating films to form a gate wiring stack body with an elongate pattern, in which a plurality of gate wirings are stacked via the insulating films; forming a gate insulating film on a first side surface of the gate wiring stack body, in which an insulating charge storage layer is formed; forming a plurality of pillar-shaped semiconductor layers with the same conductivity type as an impurity diffusion layer and a lower impurity concentration than the impurity diffusion layer, which are arranged in the elongated direction of the gate wiring stack body and opposed to the first side surface of the gate wiring stack body via the gate insulating film; forming a metal film on the second side surface of the gate wiring stack body, and annealing it to make the gate wirings silicides; and forming data lines to be in contact with the upper surfaces of the pillar-shaped semiconductor layers and intersect the gate wirings.