Patent ID: 8643526

Claim:
A system for converting an analog input signal to a digital output signal in two or more analog-to-digital conversion cycles, the system comprising: a programmable gain amplifier (PGA), comprising: a first switch, that receives the analog input signal and transmits the analog input signal, during a sampling phase of a first analog-to-digital conversion cycle, and receives and switches a polarity of the analog input signal and transmits an inverted analog input signal, during a sampling phase of a second analog-to-digital conversion cycle, wherein the first and second analog-to-digital conversion cycles are consecutive conversion cycles; a first amplifier, connected to the first switch, that receives the analog input signal and generates a first amplified signal, during the sampling phase of the first analog-to-digital conversion cycle, wherein the first amplified signal comprises a first amplified input signal and a first set of offset and noise signals, and receives the inverted analog input signal and generates a second amplified signal, during the sampling phase of the second analog-to-digital conversion cycle, wherein the second amplified signal comprises a second amplified input signal and a second set of offset and noise signals, and wherein the first and second amplified input signals have opposite polarities, and the first and second sets of offset and noise signals have the same polarity; and a second switch, connected to the first amplifier, that receives and transmits the first amplified signal, during the sampling phase of the first analog-to-digital conversion cycle, and receives and switches a polarity of the second amplified signal, during the sampling phase of the second analog-to-digital conversion cycle, wherein the first and second amplified input signals have the same polarity, and the first and second sets of offset and noise signals have opposite polarities; an analog-to-digital converter (ADC), connected to the second switch, that samples the first and second amplified signals, to generate first and second digital samples during conversion phases of the first and second analog-to-digital conversion cycles, respectively; and an averaging module, connected to the ADC, that receives and averages the first and second digital samples to generate the digital output signal, wherein the averaging module eliminates the first and second sets of offset and noise signals from the digital output signal.