Patent ID: 7439193

Claim:
A patterning method of forming a thin film transistor, the method comprising: forming a plurality of patterns by applying a first liquid material including a photoresist material and a first solvent over a substrate, each of the plurality of patterns including the photoresist material; forming a film covering the plurality of patterns by applying a second liquid material including a polystyrene and a second solvent to the plurality of patterns with a spin coating method, a concentration of the polystyrene in the second liquid material being 0.1-10 g/l; removing the film from the top surface of each of the plurality of patterns and substantially from the top surface of the substrate by subjecting the substrate to plasma etching from above so that the film remains only around the sides of the plurality of patterns in the form of a plurality of ridges attached to the sides of the plurality of patterns; removing each of the plurality of patterns by dissolving each of the plurality of patterns with a third solvent that is insensitive to the polystyrene; forming a first and a second metal film, one of the plurality of ridges being disposed between the first and second metal films; removing the plurality of ridges to form a space between the first and second metal films, a distance between the first and second metal films being 0.1-10μm; forming a semiconductor layer over the first and second metal films; forming a dielectric layer over the semiconductor layer; and forming a gate electrode over the dielectric layer.