Patent ID: 7752341

Claim:
A programmable controller comprising a CPU unit, a communication unit and peripheral units connected together through an internal bus; wherein said communication unit comprises: a cache memory for recording IO data stored in said peripheral units, said cache memory being divided into partitions corresponding to said peripheral units, update check and IO refresh of said cache memory being executed in units of said divided partitions; period judging means for judging whether or not a preliminarily set effective period has passed since the IO data of said peripheral unit were stored in said cache memory; and responding means serving to create response data, when said communication unit has received a message, based on the IO data stored in said peripheral unit stored in said cache memory, if said period judging means judges that said effective period has not passed since said IO data were stored, and to access said peripheral unit, if said period judging means judges that said effective period has passed since said IO data were stored, to obtain said updated IO data and to create response data based on said obtained IO data.