Patent ID: 7830021

Claim:
A tamper resistant semiconductor package, comprising: a surface having flip chip electrical contacts; a flip chip semiconductor having flip chip electrical contacts, wherein the flip chip semiconductor is configured with at least a portion of data from a data set defining functionality of the flip chip semiconductor, the flip chip semiconductor having a maximum temperature to which it can be exposed before being damaged by heating such that the functionality of the flip chip semiconductor defined by the at least a portion of the data from the data set is destroyed; and flip chip solder joints physically coupling and electrically connecting the flip chip electrical contacts of the flip chip semiconductor to the flip chip electrical contacts of the surface while the flip chip semiconductor is undamaged and fully functional such that it can perform the functionality defined by the at least a portion of data from the data set, wherein the flip chip solder joints are formed of an alloy having a higher melting point than the maximum temperature such that the flip chip semiconductor cannot be removed from the surface by heating without damaging and destroying the functionality of the flip chip semiconductor.