Patent ID: 7964947

Claim:
A stacked microelectronic assembly, comprising: a plurality of microelectronic units, wherein each unit comprises: a dielectric element having oppositely facing top and bottom surfaces; a semiconductor die having contacts and an outer perimeter, said semiconductor die mounted on said dielectric element; said dielectric element defining an outer region extending beyond said outer perimeter of said semiconductor die; said dielectric element having a plurality of electrically conductive terminals exposed on at least one of said surfaces, wherein at least some of said terminals are electrically coupled to said contacts; said dielectric element including first and second alignment cavities disposed within said outer region and extending from said top surface to said bottom surface and adapted to receive an alignment component, wherein said alignment cavities are electrically insulated from said terminals, wherein at least some of said terminals on each microelectronic unit are exposed at each of said top and bottom surfaces, and wherein said microelectronic units are stacked one atop another such that: said surfaces of all said dielectric elements are substantially parallel to each other; said first alignment cavities are aligned with each other; said second alignment cavities are aligned with each other; and at least some of said terminals of each microelectronic unit are aligned and electrically coupled with each other.