Patent ID: 7053661

Claim:
An output driver circuit, comprising: a first PMOS pull-up transistor having source and drain terminals electrically connected in series in a pull-up path of the output driver circuit; a first NMOS pull-down transistor having source and drain terminals electrically connected in series in a pull-down path of the output driver circuit; an NMOS pass transistor having a first current carrying terminal electrically connected to a gate terminal of said first PMOS pull-up transistor, a second current carrying terminal configured to receive a P-type reference voltage and a gate terminal responsive to a pull-up data input signal; a PMOS pass transistor having a first current carrying terminal electrically connected to a gate terminal of said first NMOS pull-down transistor, a second current carrying terminal configured to receive an N-type reference voltage and a gate terminal responsive to a pull-down data input signal; a second PMOS pull-up transistor having a first current carrying terminal electrically connected to the gate terminal of said first PMOS pull-up transistor, a second current carrying terminal electrically coupled to a power supply line and a gate terminal responsive to the pull-up data input signal; a second NMOS pull-down transistor having a first current carrying terminal electrically connected to the gate terminal of said first NMOS pull-down transistor, a second current carrying terminal electrically coupled to a ground reference line and a gate terminal responsive to the pull-down data input signal; a third PMOS pull-up transistor having a first current carrying terminal electrically connected to the power supply line and a gate terminal electrically connected to the gate terminal of said first PMOS pull-up transistor; and a diode having an anode electrically connected to a second current carrying terminal of said third PMOS pull-up transistor and a cathode electrically connected to an output of the output driver circuit.