Patent ID: 7550832

Claim:
A stackable semiconductor package, comprising: a first substrate having a first surface and a second surface; a first chip having a first surface and a second surface, wherein the second surface of the first chip is attached to the first surface of the first substrate; a plurality of first wires electrically connecting the first surface of the first chip and the first surface of the first substrate; a first molding compound encapsulating a part of the first substrate, the first wires, and exposing a central portion of the first chip of the first surface of the first chip; a second substrate disposed above the first chip, the second substrate having a first surface and a second surface, and the first surface of the second substrate having a plurality of first pads and a plurality of second pads; a supporting element disposed below the second surface of the second substrate for supporting the second substrate and mounted on the first molding compound; a plurality of third wires electrically connecting the first pads on the first surface of the second substrate and the first surface of the first substrate; and a third molding compound encapsulating the first surface of the first substrate, the first chip, the first molding compound and a part of the second substrate, and exposing the second pads on the first surface of the second substrate.