Patent ID: 8036476

Claim:
An image encoding/decoding device, comprising: an encoding circuit, for receiving and encoding a plurality of image data to output a plurality of data blocks, wherein for each block of the image data, the encoding circuit generates a corresponding threshold signal when an achieved percentage of an encoding process reaches a threshold value; a multiplexer, coupled to the encoding circuit, wherein the multiplexer receives the data blocks and the threshold signals corresponding to the data blocks, and the multiplexer outputs the data blocks and determines memory addresses, respectively corresponding to the data blocks, of a storage unit according to a first order, and the first order is a generating order of the corresponding threshold signals; a writing circuit, coupled to the multiplexer, for writing the data blocks into the storing circuit according to the determined memory addresses; a reading circuit, coupled to the storing circuit, for reading the data blocks from the storing circuit; a demultiplexer, coupled to the reading circuit, wherein the demultiplexer receives the data blocks output from the reading circuit, and the demultiplexer outputs the data blocks according to a second order; and a decoding circuit, coupled to the demultiplexer, for receiving the data blocks output from the demultiplexer and decoding the data blocks to generate the image data, wherein the decoding circuit determines the second order according to an achieve percentage of a decoding process of each of the data blocks; wherein the first order and the second order are substantially the same.