Patent ID: 8145933

Claim:
A power control circuit, comprising: an input/output controller hub (ICH) comprising a sleep control terminal and a general purpose input/output (GPIO) terminal; a first metal-oxide-semiconductor field effect transistor (MOSFET), wherein a drain of the first MOSFET is connected to a standby power source through a first resistor, a gate of the first MOSFET is connected to the sleep control terminal of the ICH through a second resistor, a source of the first MOSFET is grounded; a second MOSFET, wherein a drain of the second MOSFET is connected to the drain of the first MOSFET through a third resistor, a gate of the second MOSFET is connected to the GPIO terminal of the ICH through a fourth resistor, a source of the second MOSFET is grounded; and a third MOSFET, wherein a source of the third MOSFET is connected to the standby power source, a gate of the third MOSFET is connected to the drain of the second MOSFET, a drain of the third MOSFET is connected to a power terminal of an onboard network interface card.