Patent ID: 8743614

Claim:
A nonvolatile memory device, comprising: a first common source line of first conductivity type within a semiconductor substrate; a first NAND-type string of nonvolatile memory cells on the semiconductor substrate, said first NAND-type string comprising: a first vertically-stacked plurality of nonvolatile memory cells; a first ground select transistor electrically coupled in series with the first vertically-stacked plurality of nonvolatile memory cells; and a first lateral ground select transistor having a source terminal within said first common source line and a drain terminal electrically connected to a source terminal of the first ground select transistor; and a second NAND-type string of nonvolatile memory cells on the semiconductor substrate, said second NAND-type string comprising: a second vertically-stacked plurality of nonvolatile memory cells; a second ground select transistor electrically coupled in series with the second vertically-stacked plurality of nonvolatile memory cells; and a second lateral ground select transistor having a source terminal electrically connected to the drain terminal of the first lateral enhancement-mode ground select transistor and a drain terminal electrically connected to a source terminal of the second ground select transistor, said second lateral ground select transistor having a lower threshold voltage relative to the first lateral ground select transistor.