Patent ID: 7795662

Claim:
A semiconductor memory device comprising: a first interlayer insulating film formed on a semiconductor substrate; a capacitor opening portion provided through the first interlayer insulating film; a lower electrode formed only in an inside of the capacitor opening portion; a capacitance insulating film formed on the lower electrode; an upper electrode formed on the capacitance insulating film; a second interlayer insulating film formed on the upper electrode and the first interlayer insulating film; and a first contact plug provided through the first interlayer insulating film and the second interlayer insulating film, wherein the first contact plug is provided on one side of the capacitor opening portion so as to be separated from a first side surface of the first interlayer insulating film in the capacitor opening portion, the lower electrode is located so that all side surfaces of the lower electrode are surrounded by the first interlayer insulating film, and all upper edges of the lower electrode are located lower than an upper surface of the first interlayer insulating film adjacent to the lower electrode, and a distance from the upper edge of the lower electrode formed on the first side surface of the first interlayer insulating film to an upper surface of the first interlayer insulating film adjacent to the lower electrode is larger than a distance from the upper edge of the lower electrode formed on a second side surface of the first interlayer insulating film in the capacitor opening portion located vertically to the first side surface of the first interlayer insulating film to an upper surface of the first interlayer insulating film adjacent to the lower electrode.