Patent ID: 7873930

Claim:
A machine implemented method comprising: defining a first set of wiring resources as being marked as reserved or not reserved when routing and placing is performed; defining a second set of wiring resources as not being marked as reserved or not reserved when routing and placing is performed; routing, by a processor, as part of a process of designing an integrated circuit (IC), connections on a representation of the IC using the first set of wiring resources and marking the wiring resources as used once the wiring resources within the first set have been used for routing; routing, using the second set of wiring resources in the representation of the IC, connections on the IC without checking whether the wiring resources within the second set have been previously used to route connections, wherein at least one of the wiring resources within the second set that has been previously used to route connection is used for the routing, and wherein wiring resources in the second set differ, on average, in physical size from wiring resources in the first set; and checking the second set of wiring resources for a duplicate use after the routing and placing the second set of wiring resources is completed.