Patent ID: 7576413

Claim:
A packaged stacked semiconductor device which comprises bumps serving as external electrode terminals, the bumps being provided on both a front surface and a back surface of the device, and which is stacked on another semiconductor device, substrate, or board having electrode terminals so that the bumps are directly and electrically connected to the electrode terminals, comprising: a semiconductor substrate having through-electrodes which penetrate through the substrate; on the front surface side of the semiconductor substrate, an LSI formation surface on which a plurality of circuit elements are formed, a multi-layer wiring section provided on the LSI formation surface and connected to the circuit elements, a first insulating film provided on the top surface of the multi-layer wiring section, an additional wiring layer provided on the first insulating film for connecting a final wiring layer of the multi-layer wiring section to the through-electrodes and/or post electrodes, a second insulating film formed so as to cover the front surface of the semiconductor substrate, exclusive of tip end surfaces of the post electrodes, and external connection bumps connected to the tip end surfaces of the post electrodes, wherein the second insulating film has a thickness greater than that of the semiconductor substrate, and rigidity of the semiconductor device is substantially secured by the second insulating film; and on the back surface side of the semiconductor substrate, a third insulating film formed so that tip end surfaces of the through-electrodes are exposed, bump formation regions which are provided on the third insulating film and are connected to the tip end surfaces of the through-electrodes by means of wiring, a fourth insulating film formed on the third insulating film, and external connection bumps connected to the bump formation regions through apertures provided in the fourth insulating film.