Patent ID: 8680829

Claim:
A Low-DropOut (LDO) voltage regulator having one input V DD adapted to receive a supply voltage, an output V OUT adapted to deliver a regulated output voltage and a ground, said voltage regulator comprises: a Ballast Transistor, having a gate and a main conduction path (D-S) connected in a path between the input V DD and the output V OUT of the regulator, and an Operational Transconductance Amplifier (OTA) being implemented as an adaptative biasing transistor amplifier and having an inverting input coupled to the output V OUT through a voltage divider, a non-inverting input coupled to a voltage reference circuit and having an output connected to the gate of the Ballast transistor, wherein the OTA furthermore comprises a resistance R S , which enables to stabilize the output and to increase the Power Supply Rejection Ratio (PSRR).