Patent ID: 7176120

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: laminating a first insulation film and a second insulation film which includes an organic insulation film, on a substrate; sequentially laminating an organic sacrificing layer, a first mask layer and a second mask layer on said second insulation film; forming a wiring groove pattern for processing a wiring groove in said second mask layer; forming a connection hole pattern for forming a connection hole in said second mask layer, said first mask layer and said organic sacrificing layer; forming a wiring groove pattern in said first mask layer and said organic sacrificing layer and forming a connection hole in said second insulation film, by etching using said second mask layer and said first mask layer as an etching mask; and forming a wiring groove in said second insulation film and forming a connection hole in said second insulation film and said first insulation film, by using said first mask layer and said organic sacrificing layer as a mask.