Patent ID: 8294203

Claim:
A semiconductor structure, comprising: a substrate, a first buried layer of a first conductivity type disposed within the substrate; a second buried layer of a second conductivity type disposed within the substrate and space apart from the first buried layer; and a first deep trench disposed in the substrate between the first buried layer and the second buried layer; wherein the first deep trench has dielectric liner layer disposed on an inner surface thereof; a third buried layer of the first conductivity type disposed in the substrate, the third buried contact spaced apart from the second buried layer; a second deep trench disposed between the second buried layer and the third buried layer, wherein the second deep trench has a dielectric layer disposed on an inner surface thereof; the first deep trench extends into the substrate to a depth that is greater than a depth of the first buried layer, and greater than a depth of the second buried layer; and wherein the first conductivity type and the second conductivity types are opposite conductivity types; the second deep trench extends into the substrate to a depth that is greater than the depth of the second buried layer, and greater than a depth of the third buried layer; the first deep trench and the second deep trench are disposed below a shallow trench formed in the substrate; and wherein the first deep trench extends into a deep buried layer, and a filling of material in the first deep trench extends through the bottom of the first deep trench so as make electrical contact with the deep buried layer.