Patent ID: 8183517

Claim:
A process for fabricating an integrated circuit comprising a photosensitive element and a first dielectric zone placed on the photosensitive element, the process comprising: forming a first hole from a portion of the first dielectric zone on an opposite side from the photosensitive element in the direction of the photosensitive element, over at least part of a thickness of the first dielectric zone, a bottom of the first hole having a smaller area than that of an aperture of the first hole; filling the first hole with a material of higher refractive index than that of a material of the first dielectric zone in order to form a first light-guiding element having a first surface located on the same side as the photosensitive element and a second surface located on the opposite side from the photosensitive element; depositing a second dielectric zone on the integrated circuit; forming a second hole from a portion of a second dielectric zone on an opposite side from the photosensitive element, over at least part of a thickness of the second dielectric zone, a bottom of the second hole having a smaller area than an area of the second surface of the first light-guiding element; and filling the second hole with a material of higher refractive index than that of a material of the second dielectric zone in order to form a second light-guiding element.