Patent ID: 7046554

Claim:
A page buffer of a flash memory device, comprising: a bias circuit that precharges an even bit line and an odd bit line and has first and second switching elements for selecting the bit lines, respectively; a first latch for storing an even data; a second latch for storing an odd data; a first switching element connected between the first switching element for selecting the even bit line and the first latch, wherein the first switching element transfers the even data to the even bit line according to a first data transfer control signal; and a second switching element connected between the second switching element for selecting the odd bit line and the second latch, wherein the second switching element transfers the odd data to the odd bit line according to a second data transfer control signal, wherein the even data is transferred to the even bit line and the odd data is transferred to the odd bit line before a program operation so that a program of two pages can be performed through once program operation.