Patent ID: 7750747

Claim:
A clock selection circuit for selecting a clock signal from among a plurality of clock signals having different frequencies, comprising: a reference-clock counter which counts clock pulses in a reference clock signal and obtains a first count; a clock counter which counts clock pulses in a frequency-divided clock signal which is produced by selecting and frequency-dividing one of said plurality of clock signals and obtains a second count; a comparison unit which makes a first comparison of said first count and said second count to detect a difference therebetween, each time a comparison instruction signal is received; a selection unit which makes a selection of said clock signal as a source of the frequency-divided clock signal, by a binary search according to a result of said first comparison; and an instruction-signal output unit which repetitively outputs the comparison-instruction signal to the comparison unit until the difference between said first and second counts reaches a predetermined value, in each phase of the binary search during which the selection unit maintains the selection that has been made.