Patent ID: 7195967

Claim:
A manufacture method for a nonvolatile semiconductor memory device comprising: a step of forming a well of a first conductivity type in a semiconductor substrate; a step of forming a pair of semiconductor regions of a second conductivity type in the well of the first conductivity type, the pair of semiconductor regions being used as a source and a drain; a step of forming a first gate on the semiconductor substrate via a first gate insulator; a step of forming a second gate on a second insulator film covering the first gate; and a step of forming a third gate via the second insulator film relative to the first gate and via a third insulator film relative to the semiconductor substrate, wherein an impurity doped region of the first conductivity type having an impurity concentration higher than the well is formed in a channel region between the pair of semiconductor regions, the impurity doped region being not in contact with the semiconductor regions, and wherein the semiconductor regions and the impurity region are formed in a self-alignment manner by tilted ion implantation tilted in opposite directions from a normal of the semiconductor substrate, by using one of the first to third gates as a mask.