Patent ID: 7679176

Claim:
A semiconductor device comprising: a substrate with a circuit being disposed on a first principal surface; a semiconductor element being provided at the first principal surface of said substrate and being electrically connected by wire bonding to said circuit for interconnection therebetween; a metallic core layer encased within said substrate adjacent said semiconductor element and electrically connected to said semiconductor element; wherein a bottom surface of said semiconductor element directly attaches to a top surface of said metallic core layer through a conductive adhesive; a plurality of conductive bumps provided on a second principal surface opposite to the first principal surface of said substrate; a thermally hardenable sealing resin for sealing at least said semiconductor element and the first principal surface side of said substrate; and a metal member provided at the second principal surface and electrically connected to said metallic core layer, wherein a top surface of said metal member directly attaches to a bottom surface of said metallic core layer through a soldering material; wherein said substrate has therein a through hole for penetration between the first principal surface and the second principal surface; wherein said through hole is directly electrically coupled to said metallic core layer wherein a first counterbore is provided at the second principal surface of said substrate and wherein said metal member is provided within said first counterbore and said first counterbore exposes a portion of the bottom surface of said metallic core layer; and wherein a second counterbore is provided at the first principal surface of said substrate and wherein said semiconductor element is provided within said second counterbore and said second counterbore exposes a portion of the top surface of said metallic core layer.