Patent ID: 6847082

Claim:
A semiconductor integrated device having an electrostatic breakdown protection circuit, comprising: a source region and a drain region of a first conductive type formed in a semiconductor substrate having a first isolating region; a channel region of a second conductive type which is formed between the source and drain regions; a first impurity region of the second conductive type which is formed in the channel region between the source and drain regions, and which extends from a surface of the semiconductor substrate; a second impurity region of the second conductive type which is formed in the channel region between the source and drain regions and which is adjacent to the first impurity region; a third impurity region of the second conductive type which is formed outside and adjacent the channel region; a gate electrode which is formed over the second impurity region of the channel region and not over the first impurity region; and a conductive layer extending over the gate electrode and the channel region, and electrically connected to the first impurity region, the third impurity region and the gate electrode. wherein lateral sides of the first impurity region are in direct contact with the second impurity region.