Patent ID: 6853058

Claim:
A process for providing electrical connection, comprising: providing a semiconductor die receiving member that is configured to receive a semiconductor die which can be mounted either through flip-chip mounting or wirebonding, the die receiving member comprising: a plurality of first contact sites configured to lie underneath said semiconductor die when said semiconductor die is proximate said die receiving member; a plurality of second contact sites configured to lie adjacent said semiconductor die when said semiconductor die is proximate said die receiving member, each first contact site of said plurality of first contact sites being in electrical connection with an adjacent second contact site of said plurality of second contact sites; and a plurality of electrically conductive traces routed through the die receiving member to a plurality of terminal contact sites, each electrically conductive trace corresponding to one of said first contact sites and one of said second contact sites and providing electrical connection therebetween; providing said semiconductor die, wherein said semiconductor die includes a first face, an opposite second face, and a plurality of bond pads on said first face configured for flip-chip mounting or wirebonding; and mounting said semiconductor die onto said semiconductor die receiving member in one of: flip chip mounting, wherein said flip-chip mounting comprises: disposing said first face proximate said die receiving member; and electrically connecting each of said plurality of bond pads with a corresponding first contact site of said plurality of first contact sites; and wirebonding, wherein said wirebonding comprises: disposing said second face proximate said die receiving member; and electrically connecting each of said plurality of bond pads with a corresponding second contact site of said plurality of second contact sites.