Patent ID: 8750047

Claim:
A circuit for reading non-volatile memory cells, comprising: a sense node configured to be coupled to a memory cell to be read; a sense device coupled to the sense node and configured to provide an output signal with logic values depending on an electric signal present at the sense node; a precharging circuit coupled to said sense node and configured to charge said sense node to a precharging voltage; and a timing device configured to activate said sense device with a first control signal and activate the precharging circuit with a precharge activation signal, delayed from the activation of the sense device, wherein said precharging circuit comprises: a signal combining logic module configured to receive a second control signal and the output signal and provide an activation/deactivation signal based on the second control and output signals; and a precharging current generating circuit configured to be activated and deactivated based on said activation/deactivation signal and configured to provide a precharging current to charge said sense node to the precharging voltage.