Patent ID: RE40110

Claim:
A nonvolatile semiconductor memory device comprising: a memory element which is connected to a bit line and a word line and stores one of state “0”, state “1”, state “2”, and state “3” of data that differ in threshold voltage; a data storage circuit which is connected to said bit line and stores not only data of a first or a second logical level externally supplied but also the data of the first or second level read from said memory element; and a control circuit which controls not only the potential on said bit line and that on said word line but also the operation of said data storage circuit, wherein said control circuit operates in such a manner that in a first operation, the control circuit changes the data in said memory element from said state “0” to state “1” when the data in said data storage circuit is data of the first logical level and keeps the data in said memory element in said state “0” when the data in said data storage circuit is data of the second logical level, that in a first verify operation of verifying whether said data has reached state “1”, the control circuit brings the data in said data storage circuit to the second logical level when the data in said data storage circuit is at the first logical level and said data has reached state “1”, keeps the data in said data storage circuit at the first logical level when said data has not reached state “1”, keeps the data in said data storage circuit at the second logical level when the data in said data storage circuit is at the second logical level, and carries out said first operation until the data in said data storage circuit has reached the second logical level, and that in a second operation, the control circuit changes the data in said memory element from state “1” to state “2” when the data in said data storage circuit is data of the first logical level externally supplied and the data in said memory element is in state “1”, and changes the data in said memory element from state “0” to state “3”, when the data in said memory element is in state “0”.