Patent ID: 7598984

Claim:
An image signal processing circuit comprising: an image signal processing unit for generating image data from an inputted image signal; a line memory for temporarily memorizing the image data per line and outputting the memorized image data while switching to and from effective and ineffective; a logic unit for digital-processing the image data outputted from the line memory and generating digitally processed image data; an output pad for outputting the digitally processed image data; and a data replacing unit for generating dummy data and replacing data in a data region set as ineffective by the line memory among the image data outputted from the line memory or the digitally processed image data outputted from the logic unit with the dummy data, wherein the data replacing unit comprises: a dummy data generating section for generating the dummy data; a first selector for selecting the image data outputted from the line memory during the effective data region output period of the image data and outputting the selected image data to the logic unit, the first selector further selecting the dummy data during an ineffective data region output period of the image data and outputting the selected dummy data to the logic unit; and a second selector for selecting the digitally processed image data outputted from the logic unit during an effective data region output period of the digitally processed image data and outputting the selected digitally processed image data to the output pad, the second selector further selecting the dummy data during an ineffective data region output period of the digitally processed image data and outputting the selected dummy data to the output pad, wherein in a state in which the operation of one of the first and second selectors is activated, the operation of the other is fixed to a state in which the image data or the digitally processed image data is outputted.