Patent ID: 7910995

Claim:
A semiconductor device, comprising: a semiconductor substrate of a first conductivity type; a dielectric layer overlying the semiconductor substrate; a first semiconductor region overlying the dielectric layer; a source region of the first conductivity in the first semiconductor region; a lightly doped source region of the first conductivity type adjacent the source region, the lightly doped source region being characterized by a lower conductivity than the source region, the lightly doped source region being spaced apart from the dielectric layer overlying the semiconductor substrate; a drain region of the first conductivity type in the first semiconductor region; a lightly doped drain region of the first conductivity type adjacent the drain region, the lightly doped drain region being characterized by a lower conductivity than the drain region, the lightly doped drain region being in contact with the dielectric layer overlying the semiconductor substrate; a body region of a second conductivity type between the lightly doped drain region and the source region in the first semiconductor region, the second conductivity type being opposite to the first conductivity type; a gate extending over a surface portion of the body region, the surface portion of the body region forming a channel region of the MOS transistor; and a sinker region of the first conductivity type connecting the drain region with the semiconductor substrate.