Patent ID: 7800239

Claim:
A substrate ( 100 ) having thick metal interconnects of high conductivity power metal ( 115 ) with metal caps ( 117 / 118 ), comprising: (a) at least one integrated circuit fabricated on said substrate ( 100 ), said at least one integrated circuit having at least one metallization layer ( 107 ); (b) an insulating layer ( 112 ) overlaying said at least one metallization layer ( 107 ), and wherein at least a portion of said at least one metallization layer ( 107 ) is exposed; (c) at least one high conductivity power metal interconnection ( 115 ) making electrical contact with said at least one metallization layer ( 107 ); (d) at least one flowable dielectric layer ( 116 ) overlaying said high conductivity power metal interconnection ( 115 ) and having at least one opening ( 135 ) to expose a portion of the surface of said high conductivity power metal interconnection ( 115 ); and (e) a metal cap ( 117 / 118 ) disposed over said at least one opening ( 135 ) and making electrical contact with said high conductivity power metal interconnection ( 115 ).