Patent ID: 7760000

Claim:
A clock generator comprising: a ring oscillator including a plurality of differential circuits coupled together in a series, each differential circuit including a differential input and a differential output, a differential output of one circuit being coupled to a differential input of a next one of said circuits in said plurality of circuits, said plurality of circuits including a first circuit and a last circuit, said a differential output of said last circuit being coupled to a differential input of said first circuit, said plurality of circuits comprising an even numbered subplurality of differential circuits and an odd numbered subplurality of differential circuits alternately coupled with each other in said series, said plurality of differential circuits arranged and configured to produce an odd number of inversions of a signal in one pass through said plurality of differential circuits; and a level converter receiving two input signals, generating an output signal, and providing a characteristic between said output signal and a difference between said two input signals, said characteristic having an odd function being geometrically symmetric with respect to a crossing point of same level between said two input signals, one of said two input signals revealed to said output from one of said differential circuits of said odd numbered subplurality of differential circuits, the other one of said two input signals revealed to said output from one of said differential circuits of said even numbered subplurality of differential circuits.