Patent ID: 8812765

Claim:
A method of maintaining the coherency of a local memory of a given processing node in a non-uniform memory architecture computer system having a plurality of processing nodes, each processing node including at least one computing processor and a local memory, wherein a subset of the computing processors cooperate on a common task, the method comprising: dividing the local memory of the given node into one or more blocks; in the local memory of the given processing node, storing a data record for each block of memory in the one or more blocks, each data record comprising: data indicating a plurality of node groups, each node group representing a number of nodes in the plurality of processing nodes, and data indicating a selection of node groups in the plurality of node groups, each selected node group representing at least one processing node that has requested access to the block of memory; and in response to receiving a request from a requesting processing node to access a block of memory in the given processing node, indicating, in the data record associated with the requested block of memory, a selection of node groups representing at least 1) the nodes already represented by the selection of node groups and 2) the requesting processing node.