Patent ID: 8238181

Claim:
A semiconductor device comprising: a first signal line supplied with a first signal, the first signal taking a first logic level during a first period of time, changing from the first logic level to a second logic level during a second period of time that follows the first period of time, and taking the second logic level during a third period of time that follows the second period of time; a second signal line supplied with a second signal, the second signal taking the second logic level during the first period of time, changing from the second logic level to the first logic level during the second period of time, and taking the first logic level during the third period of time; and a switch coupled between the first and second lines, wherein the switch connects the first and second signal lines to each other during the second period of time and disconnects the first and second signal lines from each other during both of the first period of time and the third period of time.