Patent ID: 7826488

Claim:
A method for configuring the rates between a common synchronous time-division-multiplex (TDM) interface comprising a plurality of synchronous HDLC channels associated with a common clock having a common clock rate, and a plurality of asynchronous physical lines, each with its own corresponding asynchronous clock and each associated with a corresponding asynchronous HDLC channel made from the TDM interface, the method comprising: extracting the input synchronous HDLC channels from the TDM interface; writing each input synchronous HDLC channel to a corresponding buffer associated with an asynchronous HDLC channel according to an interface clock having a clock rate just below a predetermined minimum threshold of an output HDLC rate; and reading each buffer according to a clock rate of the asynchronous clock associated with the corresponding physical line of said asynchronous HDLC channel while inserting neutral information as needed to avoid an under-run condition.