Patent ID: 8339876

Claim:
A static random access memory, comprising: at least one data line for transferring data to and from said memory and at least one reset line; a plurality of storage cells each being arranged for connection to said at least one data line and said at least one reset line, each storage cell comprising: an asymmetric feedback loop, said feedback loop comprising a first access node for holding a data value when said feedback loop stores said data value and a second access node for holding a complementary version of said data value when said feedback loop stores said data value; an access device for selectively providing a connection between said at least one data line and said first access node; a reset device for selectively providing a connection between said at least one reset line and said second access node; said memory further comprising: data access control circuitry for generating control signals in response to data access requests for independently controlling said access device and said reset device to provide said connections; wherein: said data control circuitry is configured to: generate a data access control signal to trigger said access device to provide said connection between said first access node and said at least one data line in response to a write request to write a predetermined value to said storage cell, and in response to a read request to read a stored value from said storage cell; and generate a reset control signal to trigger said reset device to provide said connection between said at least one reset line and said second access node in response to a write request to write said complementary predetermined value to said storage cell, wherein said asymmetric feedback loop is configured such that it switches state in response to receipt of said predetermined value on said first access node and no signal on said second access node more easily than in response to receipt of said complementary predetermined value on said first access node and no signal on said second access node.