Patent ID: 8536448

Claim:
A structure to prevent electrical shunting, the structure comprising: a monocrystalline semiconductor lamina having a first surface and a second surface opposite the first, and having a thickness between the first surface and the second surface less than about 50 microns; a first amorphous silicon layer on and in contact with the first surface, at least a portion of the first amorphous silicon layer heavily doped to a first conductivity type; a second amorphous silicon layer on and in contact with the second surface, at least a portion of the second amorphous silicon layer heavily doped to a second conductivity type, opposite the first conductivity type; a first contact in electrical contact with the first amorphous silicon layer; and a second contact in electrical contact with the second amorphous silicon layer, wherein the first amorphous silicon layer directly contacts the second amorphous silicon layer through an aperture in the lamina, forming a Zener diode, the lamina comprises a base region of a photovoltaic cell, the aperture in the lamina does not correspond to an aperture in either the first or the second amorphous silicon layer, and in normal operation of the device, the second amorphous silicon layer is not in ohmic contact with the first contact.