Patent ID: 7476915

Claim:
A semiconductor integrated circuit which is formed on one semiconductor substrate in a form so that the semiconductor integrated circuit includes a first region and a second region, which is different from the first region, wherein a plurality of first cells having respectively given functions are arranged in the first region, lines which are arranged on peripheral portions of a first cell are laid out at positions away from boundaries of the first cells which are arranged close to each other, and wherein a plurality of second cells having respectively given functions are arranged in the second region, a second cell includes wide-width lines arranged on the peripheral portion thereof and narrow-width lines having a line width narrower than the line width of the wide-width lines in the second cell, and the line interval between a wide-width line and a narrow-width line, which is arranged close to the wide-width line, is set to be wider than the minimum arrangement pitch of the narrow-width lines.