Patent ID: 7663064

Claim:
A multi-layered flex printed circuit board (Flex-PCB) comprising; at least one first dielectric layer having a first surface and an opposing second surface; at least one first electrical signal line located on said first surface of said at least one first dielectric layer; at least one first backside open trench located on said second surface of said at least one first dielectric layer, located under and aligned with said at least one first electrical signal line; at least one first adhesive layer located under said second surface of said at least one first dielectric layer; at least one second dielectric layer having a first surface and an opposing second surface; at least one first ground/power plane located on said first surface of said at least one second dielectric layer; at least one second backside open trench located on said second surface of said at least one second dielectric layer; at least one second adhesive layer located under said second surface of said at least one second dielectric layer; at least one third dielectric layer having a first surface and an opposing second surface; at least one second electrical signal line located on said first surface of said at least one third dielectric layer, located under and aligned with said at least one second backside open trench; at least one third backside open trench located on said second surface of said at least one third dielectric layer, located under and aligned with said at least one second electrical signal line; at least one third adhesive layer located under said second surface of said at least one third dielectric layer; at least one fourth dielectric layer having a first surface and an opposing second surface; and at least one second ground/power plane located on said first surface of said at least one fourth dielectric layer; thereby forming a stacked arrangement of dielectric layers, wherein said at least one first dielectric layer is stacked above said at least one second dielectric layer, said at least one second dielectric layer is stacked above said at least one third dielectric layer, and said at least one third dielectric layer is stacked above said at least one fourth dielectric layer, and wherein said at least one first electrical signal line and said at least one first ground/power plane form at least one microstrip type transmission line, and wherein said at least one first ground/power plane, said at least one second electrical signal line, and said at least one second ground/power plane form at least one stripline type transmission line, and wherein the structure of said backside trenches is adapted to reduce effective dielectric constant and/or dielectric loss.