Patent ID: 8217662

Claim:
A testing device for a universal serial bus (USB) input/output (I/O ) board, comprising: two USB plugs configured for connecting to the USB I/O board; a connector comprising eight pins and connected to the USB I/O board; an indication module configured for indicating if the USB I/O board is abnormal; and a testing module comprising: a plurality of data output terminals connected to the two USB plugs; a plurality of data reception terminals connected to the connector; and at least one indication terminal connected to the indication module; wherein the testing module is configured for sending a testing signal via the plurality of data output terminals to the USB I/O board; the testing module is further configured for receiving the testing signal from the USB I/O board via the data reception terminals and comparing the testing signal from the USB I/O board to a threshold signal stored in the testing module; upon a condition that the testing signal from the USB I/O board and the threshold signal are not substantially the same, the testing module is further configured for generating an alarm signal to drive the indication module via the at least one indication terminal; the testing module further comprises a first chip and a second chip; the threshold signal is stored in the first chip and the second chip; the first chip and the second chip each comprises a power terminal, a ground terminal, eight data terminals, two cascade terminals, and an indication terminal; the eight data terminals of the first chip are configured for acting as the plurality of data output terminals and are connected to the two USB plugs; the eight data terminals of the second chip are configured for acting as the plurality of data reception terminals and are connected to the eight pins; the cascade terminals of the first chip and the second chip are connected to each other; the power terminals of the first chip and the second chip are connected to a voltage source; the ground terminals of the first chip and the second chip are grounded; the indication terminals of the first chip and the second chip are connected to the indication module.