Patent ID: 7034358

Claim:
A method for producing a vertical transistor having a gate electrode, a gate oxide, an upper source/drain region, and a lower source/drain region, the method which comprises: producing at least one first trench in a substrate with a substantially vertical substrate edge; producing a sacrificial gate oxide on at least a first trench wall; producing a sacrificial gate electrode on the sacrificial gate oxide; producing an insulation structure for insulation between different vertical transistors; removing the sacrificial gate electrode from the trench; removing the sacrificial gate oxide from the trench; at least at a location of the sacrificial gate oxide, producing the gate oxide on the trench wall; producing the gate electrode on the gate oxide, the gate oxide insulating the gate electrode from the substrate, the insulating structure bounding the gate electrode in a region in which the gate oxide covers the substantially vertical substrate edge, and the gate electrode forming an angle α of 90° or less with the insulating structure; and producing the upper source/drain region and the lower source/drain region.