Patent ID: 8617922

Claim:
A method of manufacturing a semiconductor device comprising the steps of: forming a plurality of first integrated circuits on the surface side of a first semiconductor substrate; forming a plurality of second integrated circuits in a semiconductor layer that is formed on a release layer provided on a second semiconductor substrate; bonding the first semiconductor substrate to the second semiconductor substrate so that electrically bonding portions of the first integrated circuits are bonded to electrically bonding portions of the second integrated circuits to form a bonded structure; separating the second semiconductor substrate from the bonded structure at the release layer to transfer, to the first semiconductor substrate, the semiconductor layer in which the plurality of second integrated circuits are formed; and dicing the first semiconductor substrate to which the plurality of second integrated circuits are transferred to obtain stacked chips each including the first integrated circuit and the second integrated circuit, wherein, after the step of bonding the first semiconductor substrate to the second semiconductor substrate, a sealing member is formed around the bonded structure, and an adhesive is introduced from an opening provided in the sealing member into an area where the electrically bonding portions are not provided to bond the first semiconductor substrate to the second semiconductor substrate with the adhesive.