Patent ID: 6939777

Claim:
A method for manufacturing a semiconductor device, comprising: forming a first insulating film on a semiconductor substrate of a first conductivity type; forming a hard mask on said first insulating film; etching said first insulating film and said semiconductor substrate, using said hard mask, to form grooves having a predetermined depth in an alignment mark section and a device formation section of said semiconductor substrate; burying a second insulating film in said grooves; removing said hard mask; forming a first resist pattern having openings at said alignment mark section and a first predetermined area of said device formation section; ion-implanting impurities in said semiconductor substrate using said first resist pattern as a mask, the impurities producing at least one of first and second conductivity types in said semiconductor substrate; removing a portion of said first insulation film exposed by said first resist pattern to expose said semiconductor substrate; removing said first resist pattern; forming a second resist pattern which covers the first predetermined area of said device formation section at which said semiconductor substrate is exposed, said second resist pattern having openings at said alignment mark section and a second predetermined area of said device formation section; ion-implanting impurities in said semiconductor substrate using said second resist pattern as a mask, the impurities producing at least one of the first and second conductivity types in said semiconductor substrate; selectively etching the portion of said semiconductor substrate exposed by said second resist pattern to form a convex portion having a predetermined height in said alignment mark section; removing said second resist pattern; forming a gate insulating film on said semiconductor substrate; and forming a gate electrode on said gate insulating film.