Patent ID: 6927478

Claim:
A semiconductor package comprising: a plurality of leads, each of the leads defining: a first surface; a second surface disposed in opposed relation to the first surface; and a third surface disposed in opposed relation to the second surface, the first surface being oriented between the second and third surfaces; a first semiconductor die defining opposed first and second surfaces and including a plurality of bond pads disposed on the first surface thereof, portions of the first surface of the first semiconductor die being directly attached to the second surface of each of the leads such that at least some of the bond pads of the first semiconductor die are located between and laterally adjacent to a respective pair of the leads so that the bond pads of the first semiconductor die do not contact the second surface of any one of the leads; a second semiconductor die defining opposed first and second surfaces and including a plurality of bond pads disposed on the second surface thereof, the first surface of the second semiconductor die being attached to the second surface of the first semiconductor die; a plurality of conductive connectors electrically connecting the bond pads of the first and second semiconductor dies to respective ones of the leads; and an encapsulating portion applied to and at least partially encapsulating the leads, the first and second semiconductor dies, and the conductive connectors.