Patent ID: 8694859

Claim:
A method for data storage in a memory that includes a plurality of analog memory cells, the method comprising: estimating respective achievable storage capacities of one or more subsets of the analog memory cells, wherein a subset is one or more memory cells; assigning the one or more subsets of memory cells respective storage configurations defining quantities of data to be stored in subsets of the memory cells based on the estimated achievable capacities, wherein the storage configurations comprise defining the number of data bits per cell for each subset of memory cells; storing the data in one or more subsets of the memory cells in accordance with the respective assigned storage configurations; and re-estimating the respective achievable storage capacities of the one or more subsets of analog memory cells after the memory has been installed in a host system and used for storing the data in the host system, and, upon detecting that the achievable capacities have changed, modifying the storage configurations responsively to the re-estimated achievable capacities so as to modify, at least, the respective number of data bits per cell in the one or more subsets of memory cells.