Patent ID: 8872350

Claim:
A semiconductor device, comprising: a semiconductor element; a support substrate; an insulating material layer for sealing the semiconductor element and a periphery thereof; a sole metal thin film wiring layer provided in the insulating material layer, with a part thereof being exposed on an external surface; and metal vias provided in the insulating material layer and electrically connected to the sole metal thin film wiring layer, wherein the semiconductor element is provided in a plurality, and the respective semiconductor elements are stacked via an insulating material such that a circuit surface of each semiconductor element faces the sole metal thin film wiring layer, and electrode pads of each semiconductor element are electrically connected to the sole metal thin film wiring layer by a conductive metal filled in an opening formed in the insulating material layer on the electrode pads and directly extending to the sole metal thin film wiring layer for causing the electrode pads to be exposed to the sole metal thin film wiring layer without being hidden by the semiconductor element stacked thereabove, whereby said plurality of semiconductor elements are electrically connected to the sole metal thin film wiring layer.