Patent ID: 8541307

Claim:
A treatment method for reducing particles in a Dual Damascene Silicon Nitride (DDSN) process, characterized by comprising steps of: Step A: forming a seed layer of copper on a silicon wafer; Step B: depositing a deposition layer of copper to cover the seed layer of copper; Step C: planarizing the deposition layer of copper; Step D: providing the silicon wafer into a reaction chamber and performing a pre-treatment on a surface of the deposition layer of copper using NH 3 gas under a plasma condition so as to remove oxides of copper formed on the deposition layer of copper; Step E: in the reaction chamber, generating an etching blocking layer on the deposition layer of copper using a DDSN deposition process; Step F: cleaning the reaction chamber using NF 3 gas; and Step G: directing N 2 O gas into the reaction chamber and removing remaining hydrogen and fluorine in the reaction chamber using the N 2 O gas under the plasma condition.