Patent ID: 8252702

Claim:
A method for making a micro-electronic non-volatile memory device provided with transistors having gates placed side by side, the method comprising the steps of: forming a diblock copolymer layer above a layer based on a first gate material, selectively removing in the diblock copolymer layer, blocks based on a polymer of said copolymer, so as to retain at least one given pattern and at least one other given pattern separated by a given distance of said given pattern, said patterns being based on another polymer of said copolymer, the method further comprising the steps of: a) forming, by etching said first gate material through said given pattern and said other given pattern, of at least one first transistor gate block and at least one sacrificial block, said first block and said sacrificial block being separated by a given space, b) forming in said given space at least one insulating layer and a second gate material, said second gate material in said space forming another gate block separated from the first block by said insulating layer, c) suppressing said sacrificial block.