Patent ID: 8101996

Claim:
A three-dimensional semiconductor device, comprising: a first semiconductor device having a first metal substrate on its back side, the first metal substrate also functioning as a first terminal of the first semiconductor device; a first conductive structure coupled to a back side of the first metal substrate; a second semiconductor device having a first terminal and a second terminal on its front side; a second conductive structure coupled to the first terminal of the second semiconductor device, the second conductive structure being bonded to the first conductive structure and providing electrical contact between the back side of the first semiconductor device and the front side of the second semiconductor device; a third conductive structure coupled to the second terminal of the second semiconductor device; and a patterned metal layer located between the first and the second semiconductor devices, the patterned metal layer including at least a first region, the first region being bonded to the third conductive structure for providing an external contact; wherein each of the first and the second semiconductor devices comprises a trench power MOS transistor; wherein the first conductor is coupled to a drain terminal of the first semiconductor device and the second conductor is coupled to a source terminal of the second semiconductor device, whereby the three-dimensional semiconductor device comprises a series combination of the first and the second semiconductor devices.