Patent ID: 6977832

Claim:
A memory device comprising: a memory module disposing a plurality of memories for inputting and outputting data therein, said memory module comprising a module multilayer interconnection layer including a module driver power supply layer, a module ground layer, and a module signal interconnection layer for transmitting a high frequency signal; a mother board for mounting said memory module by a connector therein, said mother board comprising a board multilayer interconnection layer including a board driver power supply layer, a board ground layer, and a board signal interconnection layer for transmitting a high frequency signal; a memory controller mounted on said mother board; and drivers mounted in said memories and said memory controller, each of said drivers having a push-pull structure, wherein a board position relationship between at least one of the board driver power supply layer and the board ground layer and the board signal interconnection layer in said board multilayer interconnection layer of said mother board is substantially held also in a module position relationship between at least one of the module driver power supply layer and the module ground layer and the module signal interconnection layer in said module multilayer interconnection layer of said memory module, thereby reducing disturbances of a return current flowing in said board and said module driver power supply layers and in said board and said module ground layers and degradation of the high frequency signal.