Patent ID: 8043927

Claim:
A method of manufacturing a complementary metal-oxide semiconductor (CMOS) image sensor (CIS), the method comprising: forming an epitaxial layer on a first substrate including a chip area and a scribe lane area; forming a first impurity layer on the scribe lane area and adjacent to the first substrate by implanting first impurities into the epitaxial layer; forming a photodiode in the epitaxial layer on the chip area; forming a circuit element on the epitaxial layer, the circuit element being electrically connected to the photodiode; forming a protective layer on the epitaxial layer, the protective layer protecting the circuit element; attaching a second substrate onto the protective layer; removing the first substrate to expose the epitaxial layer; forming a color filter layer on the exposed epitaxial layer using the first impurity layer as an alignment key; and forming a microlens over the color filter layer.