Patent ID: 8377757

Claim:
A transient voltage suppressor (TVS) device, comprising: a p-type semiconductor substrate; a first and a second n-type semiconductor regions overlying the semiconductor substrate, the first region having a first doping concentration and the second region having a second doping concentration that is lower than the first doping concentration; an n-type semiconductor layer overlying the first and the second n-type semiconductor regions; a plurality of trenches extending through the n-type semiconductor layer and the first n-type semiconductor region and into the p-type semiconductor substrate; an n-type fill material disposed in each of the plurality of trenches; a clamping diode having a junction region between out-diffused regions from the n-type fill material and a portion of the p-type semiconductor substrate, wherein: the clamping diode is coupled in parallel with a diode junction between the first n-type semiconductor region and the p-type semiconductor substrate, and the clamping diode is configured to have a clamping voltage lower than a reverse breakdown voltage of said junction such that said junction is prevented from functioning as a Zener diode; a PIN diode including a p-type region, a first portion of the n-type semiconductor layer, and the first n-type semiconductor region; an NIP diode including an n-type region, a second portion of the n-type semiconductor layer, the second n-type semiconductor region, and the p-type semiconductor substrate; a first isolation region around the PIN diodes; a second isolation region around the NIP diodes; and a conductor coupling the n-type fill material disposed in each of the trenches.