Patent ID: 7541844

Claim:
A current weighted voltage interpolation buffer comprising: a first voltage input terminal for receiving a first input voltage; a second voltage input terminal for receiving a second input voltage; a first bias current input terminal for receiving a first bias current; a second bias current input terminal for receiving a second bias current; a voltage output terminal for outputting voltages; a first differential voltage to current conversion unit, coupled to the first voltage input terminal, the first bias current input terminal and the voltage output terminal, for outputting corresponding differential currents through a first current output terminal and a second current output terminal according to the first input voltage, the first bias current and a voltage of the voltage output terminal; a second differential voltage to current conversion unit, coupled to the second voltage input terminal, the second bias current input terminal and the voltage output terminal, for outputting corresponding differential currents through a third current output terminal and a fourth current output terminal according to the second input voltage, the second bias current and the voltage of the voltage output terminal; and a current to voltage conversion unit, coupled to the first differential voltage to current conversion unit, the second differential voltage to current conversion unit and the voltage output terminal, for outputting an interpolation result of the first input voltage and the second input voltage, corresponding to a ratio of the first bias current and the second bias current, to the voltage output terminal according to the differential currents outputted by the first differential voltage to current conversion unit and the second differential voltage to current conversion unit.