Patent ID: 8069200

Claim:
An apparatus, configured to support floating point calculation of a discrete wavelet filter, comprising: a floating point adder configured to receive N floating point operands with at least one of said floating point operands being a floating point product, wherein said adder creates shifted floating point products and a floating point result based upon said shifted floating point product to at least partly calculate said discrete wavelet filter, wherein each of said floating point operands and said floating point result includes an exponent and a mantissa, wherein N is at least three, comprising: an extended block operand comparator receiving a corresponding floating point input for each of said N of said floating point operands to create a mantissa control for each of said corresponding floating point operands, and a base exponent; N instances of a floating point shifter with each of said floating point shifters receiving a corresponding one of each of said floating point operands to create said corresponding floating point input, wherein each floating point shifter alters the exponent of said corresponding floating point operand, with said corresponding floating point input as said shifted floating point product in response to said floating point operand being said floating point product; an extended mantissa alignment mechanism receiving said corresponding floating point input and said mantissa control to create an aligned mantissa, for each of said N of said floating point operands; a mantissa adder receiving said N of said aligned mantissas to create a raw mantissa result; and an extended floating point adder output stage receiving said base exponent and said raw mantissa result to create said floating point result to support calculation of said discrete wavelet filter, wherein said floating point result is an optimized floating point target for said discrete wavelet filter.