Patent ID: 7994512

Claim:
A tunneling diode comprising: an n+ doped Group-III nitride semiconductor layer; an n− doped Group-III nitride semiconductor layer adjacent to a first side of said n+ doped layer; a Group-III nitride semiconductor barrier layer on said n− doped layer, with no semiconductor layers between said barrier layer and said n− doped layer, wherein an exposed portion of the surface of said first side of said n+ doped layer is not covered by said n− doped layer and said barrier layer; at least one ohmic contact on said exposed portion of said n+ doped layer; a metal layer on said barrier layer, said n+ doped, n− doped and barrier layers made from a material system having a piezoelectric stress, said piezoelectric stress related to the thickness of said barrier layer and causing said diode's on-state threshold voltage to be low as a result of enhanced electron tunneling through the potential barrier under forward bias; and wherein said layers are arranged in the following order: said n+ doped layer, said n− doped layer, said barrier layer, followed by said metal layer.