Patent ID: 6900691

Claim:
A semiconductor integrated circuit, comprising: a first pad mounted on a main surface of a semiconductor substrate; a second pad mounted on the main surface and positioned adjacent to the first pad; a pad joint mounted between the first pad and the second pad to connect the first pad and the second pad; a first signal input/output circuit including a first output buffer connected to the first pad; a second signal input/output circuit including a second input buffer connected to the second pad, and a second output buffer connected to the second pad and including an output section having a controllable output impedance; and an input/output signal control circuit connected to the first signal input/output circuit and the second signal input/output circuit; wherein the input/output signal control circuit includes a first latch circuit connected to an input section of the first output buffer, a second latch circuit connected to an output section of the second input buffer, and a control switch connected to an input section of the first output buffer and an input section of the second output buffer.