Patent ID: 7729351

Claim:
An apparatus for switching packets, each packet having a header and a corresponding tail, the apparatus comprising: a header processing pipeline comprising a plurality of pipeline stage circuits connected in a sequence, wherein the plurality of pipeline stage circuits comprises at least a fetch stage circuit and a gather stage circuit; an input buffer configured to receive a multicast packet header from a switch fabric interface queue; sequence number logic configured to associate a first sequence number with the multicast packet header; and a recycle path coupling the gather stage circuit and the fetch stage circuit, wherein the fetch stage circuit is configured to provide the multicast packet header and first sequence number to a subsequent stage circuit in the header processing pipeline, and the gather stage circuit is configured to output the first sequence number and a modified multicast packet header corresponding to the multicast packet header, and provide a multicast packet header replica to the fetch stage circuit via the recycle path, the multicast packet header replica being a replica of the multicast packet header.