Patent ID: 6842344

Claim:
A printed circuit board comprising: a first dielectric layer having a first surface and a second surface opposite said first surface; at least one signal trace disposed adjacent said first surface of said first dielectric layer in a first signal area; a first reference plane disposed adjacent said second surface of said first dielectric layer in a first reference area positioned opposite said first signal area, said first reference plane configured to carry a first reference potential for signals on said signal trace; at least one other signal trace disposed adjacent said second surface of said first dielectric layer in a second signal area, said signal trace in said second signal area being coupled to said signal trace in said first signal area; a second reference plane disposed adjacent said first surface of said first dielectric layer in a second reference area positioned opposite said second signal area, said second reference plane configured to carry said first reference potential for signals on said other signal trace; a second dielectric layer having a surface disposed adjacent said first surface of said first dielectric layer, said signal trace in said first signal area, and said second reference plane; and a third reference plane disposed adjacent an opposite surface of said second dielectric layer, said third reference plane configured to receive a second reference potential for signals on said signal trace in said first signal area, said first and second reference potentials being different.