Patent ID: 7692455

Claim:
A current mode comparator, comprising: first and second CMOS logic circuits connected in series to each other, and connected to a voltage sensing node of a receiving terminal, and operable to convert a voltage of the voltage sensing node to reflect a difference between a reference current signal and a data current signal into a CMOS level output signal; first and second transistors connected to the voltage sensing node that are turned on or off based on an output signal of the first CMOS logic circuit; a first cascode transistor connected in a cascade configuration to the first transistor, and supplying a first current from a first source to the voltage sensing node; a second cascode transistor connected in a cascade configuration to the second transistor, and conducting a second current supplied from the second transistor to a ground terminal; and a transconductance correction unit connected to an output terminal of the first CMOS logic circuit, and operable to reduce transconductances of the first and second transistors in inverse proportion of an increase in a voltage of the first source; wherein the first cascode transistor comprises a PMOS transistor having a first terminal connected to the first transistor, a second terminal connected to a ground line, and a third terminal connected to a second source.