Patent ID: 7944021

Claim:
A semiconductor device comprising: an element isolation film formed on a semiconductor layer surface of one conductivity type; a gate electrode which is arranged on an element forming region partitioned by said element isolation film and which has one pair of end portions located on a boundary between said element isolation film and said element forming region; a source region and a drain region of a reverse conductivity type formed in said element forming region and arranged to sandwich a region immediately below said gate electrode; and an impurity diffusion region of said one conductivity type formed in said element forming region, wherein said source region is arranged to be separated from a region on a boundary side between said element isolation region and said element forming region in the region immediately below said gate electrode in said element forming region, said impurity diffusion region of said one conductivity type is in contact with said source region and said region on said boundary side of the region immediately below said gate electrode, a portion adjacent to said region on said boundary side is located between said source region and said element isolation film, and said impurity diffusion region of said one conductivity type is not arranged between said drain region and said element isolation film.