Patent ID: 8810705

Claim:
A solid-state image sensing apparatus, comprising: a pixel portion which includes a plurality of pixels arranged in an array form; a conversion portion which includes a first group and a second group, each of which includes at least one analog/digital conversion unit which converts an analog signal output from said pixel portion into a digital signal; and a clock supply unit which includes a first clock buffer and a second clock buffer which are connected in series to each other for propagation of a clock signal, wherein each of the analog/digital conversion units of the first group and the second group includes a comparison unit and a counter unit, the comparison unit compares the analog signal with a comparison reference potential which changes with time and outputs a result, the counter unit counts the clock signal supplied from the clock supply unit, the first clock buffer corrects a duty ratio of the clock signal by using a first differential circuit and outputs a first corrected clock signal, whose duty ratio is corrected by the first differential circuit, to each of the counter units of the first group and the second clock buffer, via an even-number of CMOS inverter circuits connected in series, the second clock buffer corrects a duty ratio of the first corrected clock signal supplied from the first clock buffer by using a second differential circuit, and outputs a second corrected clock signal, whose duty ratio is corrected by the second differential circuit, to each of the counter units of the second group, via an even-number of CMOS inverter circuits connected in series.