Patent ID: 7888148

Claim:
A method for forming a thin film transistor array panel, the method comprising: forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming a data line, including a source electrode, and a drain electrode on the gate insulating layer or the semiconductor layer; and forming a pixel electrode connected to the drain electrode, wherein at least one of the gate line and the data line and drain electrode includes a first conductive layer made of a molybdenum Mo-niobium Nb alloy and a second conductive layer made of a copper Cu-containing metal, wherein the first and second conductive layers are etched with one etch condition, and wherein the etch condition is wet etching, and an etchant of the wet etching includes benzotriazole, citric acid, hydrogen peroxide, hydrofluoric acid, and deionized water.