Patent ID: 8489664

Claim:
A method for first order accumulation of an error, the method comprising: accepting a gain value, in a first clock cycle, supplying a first accumulated value stored in a memory unit in a previous clock cycle to a first logic circuit that is operable to sum; in the first clock cycle, summing the gain value with the first accumulated value in the first logic circuit, creating a summed value; in a first clock cycle, in a second logic circuit that is operable to compare, comparing the summed value with an upper limit and a lower limit, and creating a correction signal in accordance with the comparing; in a first clock cycle, in a third logic circuit that is operable to subtract and add, creating a storage value in accordance with the comparing; in the first clock cycle, loading the storage value in the memory unit as a second accumulated value for use in a second clock cycle, subsequent to the first clock cycle.