Patent ID: 8017496

Claim:
A method of manufacturing a semiconductor device, comprising: forming a mask pattern on an active region of a substrate; removing an exposed portion of the substrate to form a trench in the substrate; forming a preliminary first insulation layer on a bottom and sidewalls of the trench and the mask pattern; performing a plasma treatment on the preliminary first insulation layer using fluorine-containing plasma to form a first insulation layer including fluorine; forming a second insulation layer on the first insulation layer to fill the trench; removing upper portions of the second insulation layer and the first insulation layer, and the mask pattern until the active region of the substrate is exposed; and forming a gate insulation layer on the exposed active region of the substrate and on the first insulation layer, wherein the gate insulation layer has a center portion having a first thickness on the active region of the substrate and an edge portion having a second thickness larger than the first thickness on a top surface of the first insulation layer, and wherein the gate insulation layer having the center portion and the edge portion is a continuous layer.