Patent ID: 8119507

Claim:
A method of fabricating a lateral double-diffused metal oxide semiconductor (LDMOS) transistor having a source region, a drain region, and a gate region on a substrate, the method comprising: a) implanting n-type dopants into a surface of the substrate to form an n-doped deep n-well (DNW) region; b) forming a field oxide (FOX) for isolation of the LDMOS transistor by using a first local oxidation of silicon (LOCOS) process; c) forming a gate oxide and a drain oxide between the source region and the drain region of the transistor, the gate oxide being adjacent to the source region, the drain oxide being adjacent to the drain region, wherein the drain oxide is formed by using a second LOCOS process that is different than the first LOCOS process such that a thickness of the drain oxide is controlled without affecting a thickness of the FOX; d) forming a gate by covering the gate oxide and a portion of the drain oxide with a conductive material; e) implanting p-type dopants into the source region to form a p-doped p-body region; f) implanting n-type dopants into the drain region to form an n-doped drain region; g) implanting n-type dopants into the source region to form a first n-doped n+ region; h) implanting n-type dopants into the drain region to form a second n-doped n+ region; and i) implanting p-type dopants into the source region to form a p-doped p+ region.