Patent ID: 8558307

Claim:
A semiconductor device comprising: a semiconductor layer of a first general conductivity type; a well layer of a second general conductivity type formed in the semiconductor layer; a diffused metal oxide semiconductor transistor formed in the well layer, the diffused transistor comprising a body layer of the second general conductivity type formed in the well layer, a source layer of the first general conductivity type formed in the body layer, a drain layer of the first general conductivity type formed in the well layer outside the body layer, a gate electrode disposed on the well layer between the source layer and the drain layer so that a part of the body layer operates as a channel region, a first diffusion layer of the first general conductivity type formed in the well layer so as to extend from under the gate electrode toward the drain layer, a second diffusion layer of the first general conductivity type having an impurity concentration higher than the first diffusion layer and formed in the well layer so that a lateral edge of the second diffusion layer on the source layer side is located between a lateral edge of the first diffusion layer on the source layer side and a lateral edge of the drain layer on the source layer side, and an additional diffusion layer of the second general conductivity type formed in the drain layer so as to penetrate into the well layer, a lateral edge of the additional diffusion layer on the source layer side being located in the drain layer so as to be laterally separated from the gate electrode, each of the lateral edges defining a sidewall of a corresponding layer, the second diffusion layer being deeper than the first diffusion layer, and the additional diffusion layer being deeper than the second diffusion layer; another transistor formed in the semiconductor layer outside the well layer; an isolation layer formed in the semiconductor layer so as to surround the diffused transistor and the another transistor so that the diffused transistor and the another transistor are disposed in a surrounded region of the semiconductor layer that is surrounded and electrically isolated from other portions of the semiconductor layer by the isolation layer and so that the diffused transistor is not isolated from the another transistor by an isolation layer in the surrounded region; and a shallow additional diffusion layer of the second general conductivity type formed in the additional diffusion layer so as to have an impurity concentration higher than the additional diffusion layer and to be shallower than the additional diffusion layer.