Patent ID: 8819401

Claim:
A semiconductor device, comprising: a reset request holding unit configured to hold a reset request from external, wherein the reset request holding unit comprises a plurality of holding units connected in series; a reset switching unit configured to: perform a first logical product operation of outputs of the plurality of holding units to set an operation result of the first logical product operation as an asynchronous reset request, set an output of the reset request holding unit at a final stage of the plurality of holding units as a synchronous reset request, perform a second logical product operation of the asynchronous reset request and the synchronous reset request, output an operation result of the second logical product operation, and mask the asynchronous reset request in a synchronous reset mode; a reset output unit configured to output a reset signal based on the operation result output from the reset switching unit; and a clock switching unit configured to switch based on whether a first clock is supplied to the reset request holding unit in response to the reset signal being asserted or a second clock is supplied to the reset request holding unit in response to the reset signal being absent, wherein the plurality of holding units of the reset request holding unit is configured to operate based on the clock supplied from the clock switching unit.