Patent ID: 7694262

Claim:
A design structure embodied in a machine readable medium used in a design process, the design structure comprising: a trench in a semiconductor substrate, said trench extending from a top surface of said substrate into said substrate in a direction perpendicular to a top surface of said substrate, said trench having sidewalls and a bottom; a conformal liner having an inner surface and opposite outer surface, said inner surface of a conformal dielectric liner in direct physical contact with said sidewalls and said bottom of said trench, a top edge of said liner exposed at said top surface of said substrate; an electrically conductive polysilicon inner plate filling regions of said trench not filled by said liner, said polysilicon inner plate in direct physical contact with the entire outer surface of said liner in said trench, said polysilicon inner plate extending to said top surface of said substrate; an electrically conductive doped outer plate in the form of a layer in said substrate surrounding said sidewalls and said bottom of said trench and in direct physical contact with said dielectric liner, said outer plate extending from said top surface of said substrate to under said trench; a doped silicon region in said substrate, said doped silicon region extending from said top surface of said substrate into said substrate a distance less than said trench extends into said substrate, said doped region physically and electrically contacting said plate, said doped silicon region doped a same type as said electrically conductive doped outer plate; a first electrically conductive metal silicide layer on a surface region of said doped silicon region proximate to said top surface of said substrate; a second electrically conductive metal silicide layer on a surface region of said inner plate proximate to said top surface of said substrate; and an insulating ring on said top surface of said substrate between said first and second metal silicide layers.