Patent ID: 7393737

Claim:
A method of manufacturing a semiconductor device comprising: an internal circuit; and an electrostatic discharge protection circuit, the internal circuit including: a first MISFET which has a first gate insulating film formed in a first region of a main surface of a semiconductor substrate and operates at a first supply voltage; a second MISFET which has a second gate insulating film formed in a second region of the main surface of the semiconductor substrate and thicker than the first gate insulating film and operates at a second supply voltage higher than the first supply voltage; and a first resistance element as a silicon film formed in a third region of the main surface of the semiconductor substrate; the electrostatic discharge protection circuit including: a second resistance element as a silicon film formed in a fourth region of the main surface of the semiconductor substrate, the method comprising the steps of: (a) forming the second gate insulating film over the main surface of the semiconductor substrate; (b) leaving the second gate insulating film in the second, third, and fourth regions of the main surface of the semiconductor substrate by patterning the second gate insulating film; and (c) after the step (b), forming a gate electrode for the second MISFET over the second gate insulating film in the second region, forming the first resistance element over the second gate insulating film in the third region and forming the second resistance element over the second gate insulating film in the fourth region.