Patent ID: 7526599

Claim:
A method for performing a write operation in a non-volatile memory system, the non-volatile memory system including an MLC NAND flash non-volatile memory having a plurality of erase units, each erase unit including a plurality of programming units arranged in a sequence, each programming unit comprising a plurality of non-volatile memory cells, wherein a first logical block is mappable to one or more erase units and includes a plurality of logical pages arranged in a sequence, the method comprising: writing data associated with the first logical block into an original erase unit to which the first logical block is mapped, so that data associated with the logical pages are written into corresponding programming units in that original erase unit in sequence; grouping the programming units within a first update erase unit into a plurality of groups of programming units, the programming units within each group arranged in a sequence comprising a first programming unit, a second programming unit, and a third programming unit; writing contents of an updated first logical page into the first programming unit in a first group of programming units of the first update erase unit; writing contents of an updated third logical page into the third programming unit of the first group of programming units, the third logical page later in the sequence of logical pages than the first logical page, and the third programming unit later in the sequence of programming units within the first group than the first programming unit and the second programming unit; receiving contents of an updated second logical page of the first logical block, the second logical page earlier in the sequence of logical pages than the third logical page; determining whether one of the groups of programming units in the first update erase unit is available for writing into; responsive to a group of programming units being available in the first update erase unit, writing updated contents of the second logical page into a programming unit in an available group of programming units of the first update erase unit; and responsive to none of the groups of programming units being available in the first update erase unit, merging contents associated with the first logical block stored in the original erase unit and updated contents of the first logical block stored in the first update erase unit into a second update erase unit.