Patent ID: 7138822

Claim:
A selectable logic family output stage integrated circuit comprising: a first output stage circuit coupled or coupleable to a first input and an output, and capable of generating a first output signal at the output, the first output signal having logic levels substantially conforming to those of a first logic family; a second input; a second output stage circuit coupled or coupleable to the first input and the output, the second output stage circuit being capable of generating at the output a second output signal having logic levels substantially conforming to those of a second logic family; a circuit selector coupled to the second input, and arranged to permit selection of the first or the second output stage circuit so as to provide one of the first or the second output signals at the output; and a programmable impedance arrangement coupled between the output and ground, an operative impedance value of the programmable impedance arrangement being selectable in order to match an expected load impedance.