Patent ID: 8880985

Claim:
A high speed long codeword decoder comprising: a plurality of pipelined stages including an input stage and an output stage communicatively coupled to a plurality of intermediate stages, wherein said input stage is configured to receive an input vector and convert it to a C-node processing sequence, said intermediate stages configured to perform C-node to V-node conversion, V-node operation, and V-node to C-node conversion, and said output stage being configured to perform V-node to output sequence conversion; computer executable code to execute a Check-To-Variable Message Passing code, where each check node c computes the check-to-variable message R CV with variable-to-check message L CV as R CV = ∏ n ∈ N ⁡ ( c ) ⁢ \ ⁢ v ⁢ ⁢ sign ( L CN ) × Ψ ⁢ { ∑ n ∈ N ⁡ ( c ) ⁢ \ ⁢ v ⁢ ⁢ Ψ ⁡ (  L CN  ) } where Ψ ⁡ ( β ) = ln ⁡ ( e β + 1 e β - 1 ) . and computer executable code to perform Variable-to-check Message Passing, wherein each variable node v computes the variable-to-checkmessage L CV with check-to-variable message R CV , L CV =Σ mεM(v)\c R mv +I v .