Patent ID: 7791163

Claim:
A semiconductor device comprising: a semiconductor substrate; a semiconductor element that is provided on the semiconductor substrate; an element isolation trench that electrically isolates the semiconductor element, an active region that is defined by the trench on the semiconductor substrate; a gate insulating film that is located in the active region; a gate electrode that is located on the gate insulating film; and a pair of impurity diffusion regions on a surface of the active region, the gate electrode being located between the impurity diffusion regions; wherein the element isolation trench includes a trench that is arranged in the semiconductor substrate; a first insulating film that is arranged on an inner wall of the trench; a conductive film that is arranged along the inner wall of the trench via the first insulating film such that an upper edge of the conductive film is lower than a surface of the semiconductor substrate and higher than a lower edge of the impurity diffusion regions, and the first insulating film is located between the inner wall of the trench and the conductive film below the upper edge of the conductive film and above the lower edge of the impurity diffusion regions so as to insulate the conductive film from the impurity diffusion regions; and a second insulating film that fills the trench on the conductive film, the conductive film is divided at a substantially center of a bottom of the trench, and the first insulating film is in contact with the second insulating film.