Patent ID: 7557597

Claim:
An integrated circuit module device comprising: a first semiconductor chip including a first surface and a first interconnection element; a second semiconductor chip including a second surface and a second interconnection element, said first interconnection element being electrically connected to said second interconnection element, said first surface being adjoined to said second surface; and a ring delay circuit located on said first and second semiconductor chip, said ring delay circuit being structured to receive a test signal, to return a test signal, and to measure a measured ring delay signature based at least in part on the received test signal and the returned test signal; wherein said ring delay circuit comprises: a signal input element structured to receive the received test signal; a circuit path structured to receive the test signal from said signal input element and to convert the received test signal into a corresponding returned test signal, said circuit path comprising said first interconnection element and said second interconnection element; and a measuring circuit structured to receive the returned test signal from said circuit path and to measure the measured ring delay signature based at least in part on the received test signal and the returned test signal.