Patent ID: 7081787

Claim:
An analog circuit for calculating square and reciprocal of a current, comprising: a first PMOS transistor, having a drain, a gate and a source, said gate of said first PMOS transistor being coupled to a ground terminal; a second PMOS transistor, having a drain, a gate and a source, said source of said second PMOS transistor being coupled to said drain of said first PMOS transistor and said gate of said second PMOS transistor being coupled to said gate of said first PMOS transistor and to said ground terminal; a first PNP BJT, having an emitter, a base and a collector, said base and said collector of said first PNP BJT being coupled to said ground terminal and said emitter of said first PNP BJT being coupled to said source of said first PMOS transistor; a second PNP BJT, having an emitter, a base and a collector, said base and said collector of said second PNP BJT being coupled to said ground; a third PNP BJT having an emitter, a base, and a collector, said base and said collector of said third PNP BJT being coupled to said ground terminal, said emitter of said third PNP BJT being coupled to said drain of said second PMOS transistor; a high gain differential operational amplifier, having a positive input terminal, a negative input terminal and an output terminal, said positive input terminal being coupled to said source of said second PMOS transistor and said negative input terminal being coupled to said emitter of said second PNP BJT; a third PMOS transistor, having a drain, a gate and a source, said drain of said third PMOS transistor being coupled to said drain of said second PMOS transistor and said gate of said third PMOS transistor being coupled to said output terminal of said high gain differential operational amplifier; a first current source, coupled to said source of said first PMOS transistor and said source of said third PMOS transistor; and a second current source, coupled to said emitter of said second PNP BJT and said source of said third PMOS transistor.