Patent ID: 8907962

Claim:
A display system comprising: a display panel; and a display controller and driver coupled to the display panel and on a semiconductor chip, wherein the display controller and driver comprises data terminals to which data is supplied external to the display system; a first terminal to which a vertical synchronization signal is supplied external to the display system; a second terminal to which a horizontal synchronization signal is supplied external to the display system; a third terminal to which a dotclock is supplied external to the display system; a clock generation circuit for generating an internal operation clock signal; an external display interface which is coupled to the data terminals and the first to third terminals; a system interface which is coupled to the data terminals; a memory which stores picture data to be displayed to the display panel; a display drive circuit which is coupled to the memory and which provides display data to the display panel in accordance with the picture data read from the memory; a first register comprising a first state in which the memory is enabled to be read in synchronization with the internal clock signal; and a second state in which the memory is enabled to be read in synchronization with the vertical synchronization signal, the horizontal synchronization signal, and the dotclock; and a second register comprising a first state in which the memory is enabled to write the data provided to the system interface via the data terminals; and a second state in which the memory is enabled to write the data provided to the external display interface via the data terminals.