Patent ID: 8824209

Claim:
A method of programming a non-volatile memory device including a plurality of memory cell strings arranged in rows and columns, columns of the plurality of memory cell strings being coupled with a plurality of bit lines respectively, the method comprising: applying a turn-on voltage to gates of at least two first select transistors of a first memory cell string among the plurality of memory cell strings, the at least two first select transistors being stacked in series along a direction vertical to a substrate; applying a pass voltage or a program voltage to respective gates of memory cells of the first cell string, the memory cells being stacked in series along the direction vertical to the substrate between the substrate and a side of the at least two first select transistors; applying a first voltage to at least one gate of at least one dummy memory cell of the first cell string, the at least one dummy memory cell being stacked in series along the direction vertical to the substrate between a side of the at least two first select transistors and a side of the memory cells; and applying a ground voltage to a bit line coupled to the first memory cell string if one of the memory cells of the first cell string are to be programmed, wherein the first voltage is lower than the pass voltage and the program voltage and higher than a ground voltage.