Patent ID: 8101990

Claim:
A semiconductor device comprising: a first substrate; a first insulating layer over the first substrate; a semiconductor layer over the first insulating layer; a second insulating layer over the semiconductor layer and the first insulating layer; a first conductive layer over the second insulating layer; a third insulating layer over the first conductive layer and the second insulating layer; a second conductive layer connected to a source region or a drain region of the semiconductor layer through an opening provided in the third insulating layer; a fourth insulating layer over the third insulating layer; and a second substrate over the fourth insulating layer, wherein a transistor comprises a semiconductor layer, the first conductive layer, and the second insulating layer provided between the semiconductor layer and the first conductive layer, wherein a layer is provided over the first substrate, and is provided not to overlap the transistor, and wherein one or two layers selected from the first insulating layer and the second insulating layer have a step portion which is formed by a corner of the layer.