Patent ID: 8619890

Claim:
A transmitter for transmitting input symbols by mapping the input symbols to be transmitted onto a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol, the data processing apparatus comprising: an interleaver configured to read-into a memory the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals, the predetermined number of OFDM sub-carriers symbols being dependent on an OFDM operating mode and to read-out of the memory the data symbols for the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on the sub-carrier signals, and an address generator configured to generate the set of addresses, the addresses being generated for the input symbols to indicate the sub-carrier signals onto which the data symbols are to be mapped, the address generator comprising: a linear feedback shift register including a predetermined number of register stages and being configured to generate a pseudo-random bit sequence in accordance with a generator polynomial selected according to the OFDM operating mode, a permutation circuit configured to receive the content of the shift register stages and to permute the bits present in the register stages in accordance with a permutation order to form an address of one of the OFDM sub-carriers, and a control unit configured in combination with an address check circuit to re-generate an address when a generated address exceeds a predetermined maximum valid address determined according to said OFDM operating mode, wherein the address generator includes an offset generator configured to add an offset to the generated address.