Patent ID: 8558316

Claim:
A semiconductor device comprising: a substrate; a gate structure formed on the substrate; a channel region below the gate structure in the substrate; a first source/drain region and a second source/drain region located at opposite side of the gate structure; a first lightly-doped drain (LDD) junction region formed between the first source/drain region and one end of the channel region; a second lightly-doped drain (LDD) junction region formed between the second source/drain region and the other end of the channel region; a metal silicide layer having a first metal formed on the first and second source/drain regions; an insulating layer formed on the metal silicide layer and the gate structure having a first opening to expose the metal silicide layer; and a conductive layer having the first metal and filling the first opening to contact the metal silicide layer, wherein the conductive layer includes a barrier layer having the first metal and a contact plug, and wherein the barrier layer is formed on an inner sidewall of the first opening and the contact plug is formed on the barrier layer, and wherein the barrier layer and the contact plug are in direct contact with the metal silicide layer.