Patent ID: 7906363

Claim:
A method of fabricating a semiconductor device having a three-dimensional stacked structure formed by stacking semiconductor circuit layers on a support substrate, comprising the steps of: forming a trench in a semiconductor substrate that constitutes one of the semiconductor circuit layers from a surface side of the semiconductor substrate, an inner wall face of the trench being covered with a first insulating film; filling an inside of the trench with a conductive material from the surface side of the semiconductor substrate, thereby forming a conductive plug; forming a desired element or circuit, from the surface side of the semiconductor substrate, in an inside or on a surface of the semiconductor substrate where the conductive plug has been formed; covering the surface of the semiconductor substrate where the element or circuit has been formed with a second insulating film; and fixing the semiconductor substrate to the support substrate or a remaining one of the semiconductor circuit layers by joining the second insulating film to the support substrate or the remaining one of the semiconductor circuit layers directly or indirectly through a wiring structure, wherein the semiconductor substrate is joined to the support substrate or to the remaining one of the semiconductor circuit layers from the surface side of the semiconductor substrate; selectively removing the semiconductor substrate which has been fixed to the support substrate or the remaining one of the semiconductor circuit layers from a back side of the semiconductor substrate, thereby exposing the first insulating film to the back side of the semiconductor substrate; and selectively removing the first insulating film which has been exposed to the back side of the semiconductor substrate, thereby exposing the conductive plug to the back side of the semiconductor substrate.