Patent ID: 8097870

Claim:
A memory cell comprising: a memory element configured for switching between various data states by passage of current therethrough, the memory element having a top surface and a bottom surface; a top electrode and a bottom electrode for providing the current through the memory element; and an alignment element positioned at least between the top electrode and the top surface of the memory element, the alignment element having an electrically conductive body tapering from the top electrode to the top surface of the memory element, wherein the alignment element comprises: a first alignment portion positioned between the top electrode and the top surface of the memory element, the first alignment portion having an electrically conductive body tapering from the top electrode to the top surface of the memory element; and a second alignment portion positioned between the bottom electrode and the bottom surface of the memory element, the second alignment portion having an electrically conductive body tapering from the bottom electrode to the bottom surface of the memory element.