Patent ID: 8692595

Claim:
An integrated circuit comprising: a first inductor-based phase-locked loop circuit having a first output, wherein the first phase-locked loop circuit generates a first control signal in a first frequency range at the first output; a second inductor-based phase-locked loop circuit having a second output, wherein the second phase-locked loop circuit generates a second control signal in a second frequency range at the second output, wherein the first and second frequency ranges partially overlap with respect to one another, and wherein the first and second inductor-based phase-locked loop circuits operate at different frequencies when the first inductor-based phase-locked loop circuit is operated at a given frequency in the first frequency range that does not overlap with the second frequency range; and interconnect circuitry coupled to the first and second outputs, wherein the interconnect circuitry receives the first control signal from the first output and receives the second control signal from the second output, and wherein the interconnect circuitry is configured to select between the received signals.