Patent ID: 8603858

Claim:
A method for manufacturing a semiconductor package, the method comprising: providing a substrate having opposite first and second surfaces and having one or more through openings formed therethrough from the first to the second surfaces at predefined positions; providing at least one first die having first and second opposite surfaces and having one or more first contact terminals on the first surface of the at least one first die; placing the at least one first die with the first surface thereof on the first surface of the substrate, with an adhesive applied therebetween outside the one or more through openings, such that the one or more through openings are aligned to the one or more first contact terminals, whereby a die assembly having correspondingly opposite first and second surfaces is formed; providing the first surface of the die assembly with a first plating layer of an electrically conductive plating material to electrically contact the one or more first contact terminals, wherein the plating material of the first plating layer extends in the through openings to electrically contact the one or more first contact terminals therethrough; and removing part of the first plating layer to form at least one individual first contact pad on the first surface of the die assembly, associated to the at least one first contact terminal.