Patent ID: 8575704

Claim:
A semiconductor device comprising: a semiconductor substrate; a device region formed on the semiconductor substrate, defined by a device isolation region, and including a first part and a second part; a first gate electrode formed in the first part; a first source region formed on a first side of the first gate electrode in the first part; a first drain region formed on a second side of the first gate electrode in the first part; a second gate electrode formed in the second part; a second source region formed on a first side of the second gate electrode in the second part; a second drain region formed on a second side of the second gate electrode in the second part; a first embedded isolation film region formed under the first source region; a second embedded isolation film region formed under the first drain region; a third embedded isolation film region formed under the second source region; and a fourth embedded isolation film region formed under the second drain region, wherein the first drain region and the second source region constitute a single diffusion region between the first gate electrode and the second gate electrode, wherein the second embedded isolation film region and the third embedded isolation film region constitute a single embedded isolation film region between the first gate electrode and the second gate electrode, wherein, between the first gate electrode and the second gate electrode, an opening is formed in a part of the single diffusion region forming the first drain region and the second source region, so that the opening extends to the second embedded isolation film region and the third embedded isolation film region, and wherein the opening is filled with an isolation film.