Patent ID: 6990535

Claim:
A buffer memory device, comprising: a packet buffer divided into a set of numbered physical pages; a two-dimensional memory map, indexed by frame number as row and logical page number as column, configured as logical storage locations of said buffer memory device, each logical storage location stores a physical page number of said packet buffer; and a control device having, an interface to at least one attached device configured to communicate a read or write protocol between the buffer memory and the attached devices, and communicate data written/read to/from the attached devices; an arbitrator configured to arbitrate between requests of the attached devices; and a store retrieval mechanism configured to store data written to the buffer memory by a granted write operation of an attached device and read data from the buffer memory according to a granted read operation of an attached device; wherein said store/retrieval mechanism stores and retrieves data to/from a physical memory address in said packet buffer stored at a logical address in said memory map.