Patent ID: 8441291

Claim:
An apparatus comprising: an interpolative divider configured to receive a first input signal and supply as an output signal the first input signal divided according to a divide ratio, the interpolative divider including, a divider configured to receive the first input signal and supply a divided signal divided in accordance with a divide control signal; a digital circuit including a delta sigma modulator coupled to receive the divide ratio and generate an integer portion and a digital quantization error and to supply the integer portion as the divide control signal to the divider; and a phase interpolator coupled to the divider and to the delta sigma modulator to adjust a phase of the divided signal according to the digital quantization error to reduce error in the divided signal and generate the output signal; a phase detector coupled to a feedback signal corresponding to the output signal of the interpolative divider and coupled to a second input signal, the phase detector to supply a phase error corresponding to a difference between the second input signal and the feedback signal; and a loop filter coupled to the phase detector to receive the phase error and to supply a filtered phase error used to determine the divide ratio.