Patent ID: 7577755

Claim:
A computer system, comprising: a plurality of local resources including a plurality of local processors, wherein the plurality of local processors and an interconnection controller are interconnected in a point-to-point architecture; a local service processor coupled to the plurality of local resources, the local service processor configured to receive reset information, wherein the local service processor is further configured to communicate with the plurality of local processors, an I/O switch, a remote service processor, and the interconnection controller, the interconnection controller operable to maintain a node ID space associated with the plurality of local resources and connect the plurality of local resources to a plurality of remote resources; and wherein the reset information is sent to a subset of a plurality of remote boxes and a subset of the plurality of local resources, each of the plurality of remote boxes including a plurality of remote processors and a remote interconnection controller interconnected in a point-to-point architecture, the subset of the plurality of local resources including a subset of the plurality of local processors, the subset of the plurality of local resources determined by using a local routing table, the local routing table including information for identifying a partition.