Patent ID: 7402516

Claim:
A method of making an integrated circuit, comprising: forming a first mask layer having a first plurality of openings on a semiconductor substrate having at least one transistor structure and an insulator layer having a predetermined vertical thickness to form an access to selected portions of the at least one transistor; forming a second mask layer having a second plurality of openings; removing a portion of the insulator layer to expose the selected portions of the at least one transistor; forming a first conductive material layer in the first and second plurality of openings; forming a second conductive material layer disposed upon the first conductive material and extending upward to a top surface of the second mask layer; removing substantially all of the first and second mask layers; and forming a diffusion barrier layer on substantially all portions of the first and second conductive materials not directly in contact with one of the selected portions of the at least one transistor and the insulator layer.