Patent ID: 8530902

Claim:
A transient voltage suppressor (TVS) assembly comprising: a semiconductor die in a mesa structure comprising: a substrate comprising a layer of a first wide band gap semiconductor having a conductivity of a first polarity; a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with said substrate, the second polarity being different than the first polarity; and a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with said second layer, wherein said second and third layers at least partially define a beveled sidewall forming an angle of approximately five degrees to approximately eighty degrees with respect to an interface between adjacent contacting layers, where said layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity; a first electrode coupled in electrical contact with said substrate; and a second electrode coupled in electrical contact with said third layer, where when a voltage greater than a predetermined magnitude is applied across the first and second electrodes, the TVS assembly operates in a punch-though mode that permits a relatively large amount of current to flow through the TVS assembly.