Patent ID: 8581404

Claim:
An integrated circuit die comprising: a semiconductor substrate; multiple electronic devices in and on said semiconductor substrate; an interconnection structure over said semiconductor substrate, wherein said interconnection structure comprises a first interconnection layer and a second interconnection layer over said first interconnection layer; a passivation layer over said interconnection structure, wherein a first opening in said passivation layer is over a first contact point of said interconnection structure, and said first contact point is at a bottom of said first opening, wherein a second opening in said passivation layer is over a second contact point of said interconnection structure, and said second contact point is at a bottom of said second opening, wherein a third opening in said passivation layer is over a third contact point of said interconnection structure, and said third contact point is at a bottom of said third opening, and wherein a fourth opening in said passivation layer is over a fourth contact point of said interconnection structure, and said fourth contact point is at a bottom of said fourth opening; a third interconnection layer on said passivation layer and on said first, second, third and fourth contact points, wherein said first, second, third and fourth contact points are connected to one another through said third interconnection layer, wherein said third interconnection layer has a thickness greater than that of said first interconnection layer and that of said second interconnection layer, respectively, wherein said third interconnection layer comprises a bottom layer on said passivation layer and on said first, second, third and fourth contact points, and a first plated metal layer on said bottom layer, wherein said bottom layer comprises an adhesion layer and a seed layer; a first metal bump on said third interconnection layer and over said first plated metal layer, wherein said first metal bump has a thickness greater than that of said third interconnection layer, and wherein said first metal bump is connected to said first, second, third and fourth contact points through said third interconnection layer; and a second metal bump on said third interconnection layer and over said first plated metal layer, wherein said second metal bump has a thickness greater than that of said third interconnection layer, wherein said second metal bump is connected to said first, second, third and fourth contact points through said third interconnection layer, wherein said second metal bump is connected to said first metal bump through said third interconnection layer, and wherein said first and second metal bumps are provided by a metal layer comprising a second plated metal layer over said first plated metal layer.