Patent ID: 7521971

Claim:
A buffer circuit having an input terminal for inputting an input signal, and an output terminal for outputting an output signal based on the input signal comprising: an output circuit having first and second output transistors for outputting the output signal from the output terminal; a first voltage difference detection circuit for detecting a voltage difference between the input signal and the output signal; a second voltage difference detection circuit for detecting a voltage difference between the input signal and the output signal, wherein the second voltage difference detection circuit inputs the input signal and the output signal in a polarity opposite to a polarity of the input signal and the output signal which the first voltage difference detection circuit inputs; a first driving circuit for increasing a bias current to be supplied to the first output transistor based on an output signal from the first voltage difference detection circuit; and a second driving circuit for increasing the bias current to be supplied to the second output transistor based on an output signal from the second voltage difference detection circuit, wherein the first and second voltage difference detection circuits are provided with predetermined input offset voltages, the first and second driving circuits supply a first bias current to the first and second output transistors when the voltage difference between the input signal and the output signal is not larger than the predetermined input offset voltages of the first and second voltage difference detection circuits, and the first and second driving circuits supply a bias current in combination with an additional bias current to the first and second output transistors when the voltage difference between the input signal and the output signal is larger than the predetermined input offset voltages of the first and second voltage difference detection circuits.