Patent ID: 7251152

Claim:
A memory circuit, comprising: a plurality of memory cells connected in series between a ground line and a bit line, wherein each memory cell comprises: a resistance memory element having an anode electrode and a cathode electrode, the resistance memory element having a bipolar switching behavior; and a drive transistor connected in parallel with the resistance memory element, wherein each drive transistor is connected to a corresponding word line, wherein the corresponding wordline switches the drive transistor on and off, thereby forming a current path via the drive transistor in a deactivated state of a memory cell and forming a current path via the resistance memory element in an activated state of the memory cell; a first changeover switch arranged at one end of the series of memory cells; and a second changeover switch arranged at the other end of the series of memory cells, wherein the first changeover switch and the second changeover switch alternately produce a connection between the series-connected memory cells and the ground line and the bit line according to an address corresponding the memory cell to be activated.