Patent ID: 6962876

Claim:
A method for forming a low-k dielectric layer for a semiconductor device using an atomic layer deposition (ALD) process, comprising: (a) forming predetermined interconnection patterns on a semiconductor substrate; (b) supplying a first reactive material and a second reactive material to a chamber having the substrate therein, thereby adsorbing the first reactive material and the second reactive material on a surface of the substrate; (c) supplying a first gas to the chamber to purge the first reactive material and the second reactive material that remain unreacted; (d) supplying a third reactive material to the chamber, thereby causing a reaction between the first and second materials and the third reactive material to form a monolayer; (e) supplying a second gas to the chamber to purge the third reactive material that remains unreacted in the chamber and a byproduct; and (f) repeating (b) through (e) for forming the monolayer a predetermined number of times to form a SiBN ternary layer having a predetermined thickness on the substrate.