Patent ID: 7303958

Claim:
A method of manufacturing a semiconductor device comprising: (a) forming an element isolation film with an insulating material in an element isolation region of a semiconductor substrate, the element isolation film comprising protrusions that project above the substrate, and forming an open insulating film pattern for accommodating a floating gate on an active region; (b) forming a stack structure of a gate insulating film and a first polysilicon layer, on the semiconductor substrate in the floating gate region, which are isolated by the insulating film pattern and the protrusions of the element isolation film; (c) forming a sacrificial insulating film on the entire surface including the first polysilicon layer in which a word line region is defined; (d) sequentially forming a dielectric film, a second polysilicon layer and a metal layer on the resulting structure including the sacrificial insulating film; (e) allowing the dielectric film, the second polysilicon layer and the metal layer to remain only in a space between the sacrificial insulating films; (f) removing the sacrificial insulating film and the insulating film pattern; and (g) forming a source/drain on the semiconductor substrate at the edge of the first polysilicon layer.