Patent ID: 8836023

Claim:
A memory device comprising: a substrate having a first surface and a doping concentration; a plurality of memory cells arranged in a pattern on the substrate, wherein the plurality of memory cells each include a charge storage device and a recessed access device formed so as to extend into the substrate, wherein the recessed access device is configured to induce a first depletion region in the substrate and define a current flow path about the recessed perimeter of the recessed access device within the substrate; and a plurality of isolation structures each recessed in the substrate so as to isolate adjacent memory cells of the plurality of memory cells from each other, wherein each of the plurality of isolation structures receives a bias voltage during operation of the memory device that together with the doping concentration of the substrate induces a second depletion region in the substrate that merges with the corresponding first depletion region to thereby inhibit leakage between adjacent memory cells.