Patent ID: 6965147

Claim:
A semiconductor device comprising: a substrate; a semiconductor layer of a first conductivity type having a single-crystal structure; a plurality of transistors each including a first gate electrode provided above said semiconductor layer with a first gate insulation film laid therebetween, a pair of impurity regions of a second conductivity type being provided in said semiconductor layer and becoming a drain region and a source region, and a channel body of the first conductivity type provided in said semiconductor layer at a portion between these impurity regions; a first gate line for common connection of the first gate electrodes of said plurality of transistors; a dielectric layer provided above said substrate in an extension direction of said first gate line, for supporting said semiconductor layer under said pair of impurity regions to thereby dielectrically isolate between said substrate and said semiconductor layer; a second gate electrode provided above said substrate in such a manner as to underlie the channel bodies of said plurality of transistors and oppose said channel bodies with a second gate insulation film laid therebetween, said second gate electrode having a gate length larger than a onefold value of a gate length of said first gate electrode and yet less than or equal to thrice the gate length; and a second gate line provided above said substrate along the extension direction of said first gate line while being placed between portions of said dielectric layer underlying said pair of impurity regions, said second gate line being for common connection of a plurality of said second gate electrodes.