Patent ID: 7705377

Claim:
A field effect transistor comprising: a buffer layer; a channel layer over the buffer layer; a spacer layer over the channel layer; a carrier supply layer over the spacer; a Schottky contact layer over the carrier supply layer; first and second lower ohmic contact layers over the Schottky contact layer; a gate electrode disposed between the first and second lower ohmic contact layers; a first upper ohmic contact layer directly on the first lower ohmic contact layer; and a second upper ohmic contact layer directly on the second lower ohmic contact layer, wherein the first and second upper ohmic contact layers are disposed away from the gate electrode and respectively expose top surfaces of the first and second lower ohmic contact layers, wherein portions of the first and second lower ohmic contact layers exposed by the first and second upper ohmic contact layers are completely depleted, and wherein each of the first and second lower ohmic contact layers is a material different from that of each of the first and second upper ohmic contact layers.