Patent ID: 7119402

Claim:
A field effect transistor comprising: a first semiconductor region forming a channel region, a gate electrode insulatively disposed above the first semiconductor region, a source electrode and a drain electrode which are formed, respectively, on both sides of the first semiconductor region in a position corresponding to the gate electrode, and second semiconductor regions each formed between the first semiconductor region and a corresponding one of the source electrode and the drain electrode, and having a higher impurity concentration than the first semiconductor region, wherein the second semiconductor regions have an impurity concentration N that is at least 4×10 19 cm −3 , and a distance Ws between a lower surface of the gate electrode and each of the source electrode and the drain electrode is given by; Ws≦ 2×(ε s ·Eg/q·N ) 1/2 where ε s is a dielectric constant of the second semiconductor regions and q is an elementary charge.