Patent ID: 8018931

Claim:
A communication apparatus that sequentially transmits a plurality of pieces of packet data over a network, each piece of packet data including a piece of block data, the communication apparatus comprising: a storage circuit configured to (i) generate a plurality of pieces of verification data in one-to-one correspondence with the plurality of pieces of block data, each piece of verification data reflecting content of the corresponding piece of block data which is data having a first size, and (ii) store each pair of a piece of verification data and a corresponding piece of block data in a different one of a plurality of areas having a second size in an external memory; a packet control unit that includes a CPU and is configured to cause the CPU to execute a program to, for each piece of block data stored in the external memory by the storage circuit, read the piece of verification data corresponding to the piece of block data, generate a piece of header information including the read piece of verification data, and perform control to transmit a piece of packet data including the generated piece of header information and the piece of block data corresponding to the piece of verification data included in the generated piece of header information; and a network unit configured to sequentially transmit each piece of packet data according to the control performed by the packet control unit, wherein the storage circuit that generates the plurality of pieces of verification data and stores the plurality of pieces of verification data and the corresponding plurality of pieces of block data and the CPU that executes the program for generating the plurality of pieces of header information and performing control to sequentially transmit each piece of packet data operate in parallel.