Patent ID: 7557020

Claim:
A method of fabricating a thin film transistor (TFT), comprising: forming an amorphous silicon layer and a capping layer on a substrate; forming a metal catalyst layer on the capping layer using a sputtering target comprising an alloy containing a first metal and a second metal with a larger atomic weight than the first metal; annealing the substrate to crystallize the amorphous silicon layer to a polycrystalline silicon layer; and patterning the polycrystalline silicon layer to form a semiconductor layer, wherein the capping layer serves to cause a metal catalyst to be selectively diffused or penetrated when the metal catalyst of the metal catalyst layer is diffused or penetrated to an interface of the amorphous silicon layer, and wherein the first metal is a material that forms a seed so as to crystallize the amorphous silicon layer, and the second metal is a material remained within the capping layer.