Patent ID: 8129626

Claim:
A multilayer wiring substrate having no core substrate, comprising: a laminated body comprising: a plurality of insulating layers; and a plurality of wiring layers, wherein the laminated body has: a mounting surface on which a semiconductor element is mounted; and a bonding surface to which external connection terminals are bonded, wherein at least one of the insulating layers contains a glass cloth, wherein a first insulating layer that is adjacent to the bonding surface includes: external connection terminal pads; and vias electrically connected to the external connection terminal pads and formed through the first insulating layer in a thickness direction thereof, wherein the surfaces of the external connection terminal pads are exposed from the first insulting layer, and wherein the thickness of the insulting layer containing the glass cloth is larger than those of the other insulating layers and a clearance between the glass cloth and a surface of the insulting layer containing the glass cloth is 10 μm or more.