Patent ID: 8748273

Claim:
A method of forming a semiconductor device comprising a dual gate structure, the method comprising: forming a precursor structure, comprising: forming a conductive nitride material on an n-type field effect transistor (nFET) device region and a p-type field effect transistor (pFET) device region of a semiconductor substrate; forming a high-K dielectric material to be disposed between the conductive nitride material and the nFET device region and between the conductive nitride material and the pFET device region; converting to an oxide material a portion of the conductive nitride material disposed over the nFET device region to form a converted dielectric region over the nFET device region without converting to the oxide material another portion of the conductive nitride material disposed over the pFET device region; forming another conductive material on the oxide material and the another portion of the conductive nitride material, the another conductive material having a lower work function than a work function of the conductive nitride material; and patterning the precursor structure and forming a gate structure comprising: a dielectric region on the pFET device region, the dielectric region comprising the high-K dielectric material; a high work function region on the dielectric region comprising the conductive nitride material; and a low work function region on the high work function region comprising the another conductive material; and another gate structure comprising: another dielectric region on the nFET device region, the another dielectric region comprising the high-K dielectric material; a converted dielectric region on the another dielectric region comprising the oxide material, the oxide material being an oxide of the conductive nitride material; and another low work function region on the converted dielectric region comprising the another conductive material.