Patent ID: 7649380

Claim:
A logic circuit, comprising: a first switching device connected between a first voltage and an output terminal through which an output signal is output, the first switching circuit being selectively activated and deactivated based on an input signal; a second switching device connected to a ground voltage, the second switching device being selectively activated and deactivated based on the input signal; a control circuit configured to output a control signal in response to the input signal, the control signal having a first voltage level during a first time period in which a state of the input signal changes from a first state to a second state, and having a second voltage level during a second time period exclusive of the first time period, the second voltage level being lower than the first voltage level; and a field relaxation circuit connected between the output terminal and the second switching device, the field relaxation circuit being selectively activated and deactivated based on the control signal, wherein the control circuit includes a detecting circuit configured to detect a rising edge of the input signal to output a pulse signal having a first width, the detecting circuit including a logic gate configured to generate the pulse signal based on a first and a second input detection signal, and an inverter circuit configured to generate the first input detection signal based on the second input detection signal; and an output circuit configured to change a level of the control signal in response to the pulse signal and output the control signal.