Patent ID: 7814223

Claim:
A packet communication device comprising: a plurality of communication circuits for transmitting and receiving a packet to and from a plurality of communication targets; packet generation processing circuit for generating a packet to be transmitted by the plurality of communication circuits, and processing a packet received by the plurality of communication circuits; transfer buffer circuit for holding a transfer packet which is used to give and receive information mutually between the plurality of communication targets; and transfer control circuit for, if it is judged that the packet received by the plurality of communication circuit is the transfer packet, outputting the received packet to the transfer buffer circuit, and outputting either a packet generated by the packet generation processing circuit or a transfer packet held in the transfer buffer circuit on a priority basis to a specified communication circuit corresponding to a communication target to which the packet is transmitted or transferred; wherein, if a usage rate of the transfer buffer circuit exceeds a threshold value, said transfer control circuit makes the priority order of the transfer packet higher than that of the generated packet, and thereby outputs the transfer packet to the specified communication circuit in preference to the generated packet; and wherein said transfer control circuit comprises a priority-order register which can be set by the packet generation processing circuit, and the priority-order register is loaded with the threshold value for changing the priority order, said threshold value being related to a usage rate of the transfer buffer circuit.