Patent ID: 7734984

Claim:
A concatenated code decoder comprising: an inner decoder for decoding encoded bits and having a tendency to introduce bursty errors; a de-interleaver for de-interleaving the decoded bits output from the inner decoder to produce blocks of data; and an erasures assisted block code decoder for decoding the blocks of data output by the de-interleaver, the erasures assisted block code decoder comprising: a first block decoder for decoding blocks of data elements, and for identifying blocks that are un-decodable by the first block decoder; an interleaver for interleaving the blocks output by the first block decoder, thereby spreading any data elements in un-decodable blocks; an erasures processor for identifying, as erasures, data elements in the un-decodable blocks that are likely erroneous, the identification occurring by utilizing data in the decoded blocks that was corrected during decoding by said first block decoder; a de-interleaver for de-interleaving blocks of data output by the erasures processor; and a second block decoder for decoding one or more of the un-decodable blocks of data by utilizing in the decoding one or more of the erasures identified by the erasures processor.