Patent ID: 7776655

Claim:
A method of making a semiconductor device, comprising: providing a semiconductor wafer having a plurality of semiconductor die with a peripheral area around the semiconductor die; forming a first insulating layer over the semiconductor die; forming a recessed region in the peripheral area, the recessed region having an angled sidewall; forming a first conductive layer over the first insulating layer outside the recessed region and further into the recessed region, the first conductive layer being electrically connected to a contact pad on the semiconductor die; forming a conductive pillar over the first conductive layer within the recessed region, the conductive pillar extending above a portion of the first conductive layer outside the peripheral area; forming a second insulating layer over the first insulating layer, conductive pillar, and first conductive layer such that the conductive pillar is exposed from the second insulating layer; forming a dicing channel partially through the peripheral area; and removing a portion of a backside of the semiconductor wafer to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die.