Patent ID: 6908841

Claim:
A method of forming a semiconductor device, comprising: providing a workpiece comprising a contact pad region having a selected area, at least one integrated circuit being formed within the workpiece; forming a plurality of low modulus dielectric layers over the workpiece; forming a plurality of support via groups in said contact pad region, and within each low modulus dielectric layer to provide mechanical support to said low modulus dielectric layers, each one of the support via groups comprising at least three vias, and having a bottom end and a top end; forming a plurality of support structures within each low modulus dielectric layer in at least the contact pad region, the support structures located at the top ends of the vias and the bottom ends of the vias located over support structures in an adjacent underlying low modulus dielectric layer, and wherein forming the support structures comprises the steps of forming support structures in odd alternating low modulus dielectric layers by disposing a plurality of first conductive lines parallel to one another in a first direction along at least the length of the contact pad bond portion and forming support structures in even alternating low modulus dielectric layers by disposing a plurality of second conductive lines parallel to one another in a second direction alone at least the width of the contact pad bond portion, the second direction being substantially perpendicular to the first direction, wherein forming the support via groups comprises disposing the support vias at the intersection of the first and second conductive lines; disposing a high modulus dielectric layer over the top of each low modulus dielectric layer; and forming at least one contact pad in the contact pad region within the high modulus dielectric layer.