Patent ID: 7293183

Claim:
An integrated circuit comprising: at least one hardware module; a memory for storing working context with respect to the at least one hardware module; a microprocessor for transmitting the working context with respect to the at least one hardware module and its own working context to the memory in a power-off standby mode; and a working context transmitting controller for transmitting the working context with respect to the at least one hardware module, the working context being stored in the memory, to a non-volatile memory outside the integrated circuit, in response to a predetermined command signal, wherein the working context transmitting controller includes: a direct memory access unit for inputting and outputting the working context between the memory and the non-volatile memory; a control register including a plurality of registers, each of which has corresponding area information on the memory and/or the non-volatile memory; an interface between the direct memory access unit and the non-volatile memory; and a controller for transmitting the working context from the memory to the non-volatile memory through the interface during the power-off standby mode, and transmitting the working context stored in the non-volatile memory to the memory through the interface when the power-off standby mode is released.