Patent ID: 8299575

Claim:
A method for obtaining an accurate, high density capacitor configured on a semiconductor and having a capacitance developed between a first node corresponding to a top plate of the capacitor and a second node corresponding to a bottom plate of the capacitor, the method comprising: configuring one or more layers of conductive strips to form the capacitor on the semiconductor, said configuring comprising, for each pair of neighboring conductive strips within each of the one or more layers of conductive strips: coupling a first conductive strip of the pair of neighboring conductive strips to the first node and not to the second node; coupling a second conductive strip of the pair of neighboring conductive strips to the second node and not to the first node; configuring a low-impedance conductive layer beneath a bottom layer of the one or more layers of conductive strips, spanning an area underneath conductive strips coupled to the first node and conductive strips coupled to the second node; and forcing a voltage potential developed at the low-impedance conductive layer to move identically to a voltage potential developed at the first node, to reduce charge transfers from the first node to the low-impedance conductive layer.