Patent ID: 7932559

Claim:
A semiconductor device comprising: a high-impurity-concentration semiconductor substrate of a first conductivity type; a parallel pn structure formed on the semiconductor substrate and in which regions of the first conductivity type and regions of a second conductivity type are arranged alternately and joined to each other; a channel region of the second conductivity type formed on part of a surface of the parallel pn structure; source regions of the first conductivity type which occupy surface portions of the channel region; trenches located adjacent to the source regions and penetrate through the channel region so as to reach the parallel pn structure; gate electrodes formed on surfaces of the trenches with gate oxide films interposed in between; an insulating layer formed on surfaces of the gate electrodes; a source electrode formed on part of a surface of the insulating layer and is in contact with surfaces of the channel region and the source regions; a high-concentration region of the first conductivity type formed at the center of a surface of one region of the first conductivity type of the parallel pn structure and is low in breakdown voltage than an active area, the high-concentration region being formed in a region located under a gate pad or in a boundary region between the active area and an inactive area that is located outside the active area; and an opening formed over the one region of the first conductivity type so as to penetrate through the insulating layer and to reach the channel region, and through which the source electrode is in contact with the channel region.