Patent ID: 7275223

Claim:
A method of facilitating development of a design for an integrated circuit, said integrated circuit being divided into a plurality of blocks, said method being performed in one or more digital processing systems, said method comprising: receive data indicating a plurality of blocks contained in said integrated circuit; determine completion of design of blocks of interest up to a checkpoint; make available to a top level the design data for the blocks up to said checkpoint, wherein the design of said integrated circuit is validated up to said checkpoint using the design data received from all the blocks; enabling a user designing a first block to indicate that designing of said first block is complete up to said checkpoint, wherein said first block is contained in said plurality of blocks; wherein the results of designing said first block up to said checkpoint is made available to said top level only after said user indicates that designing said first block is complete up to said checkpoint; and wherein a designer at said top level can send a new version of input files to said block designer, wherein said new version of input files are used as inputs for a corresponding stage of design of a corresponding block.