Patent ID: 7449741

Claim:
A static random access memory (SRAM) cell structure, comprising: a substrate having a device isolation structure therein to define a first active region and a second active region, wherein the device isolation structure between the first active region and the second active region has an opening that exposes a portion of the substrate on the sidewall of the device isolation structure, and the opening is directly above and completely exposing an upper surface of the device isolation structure; a first transistor and a second transistor set up over the first active region and the second active region of the substrate respectively, wherein the source regions of the first transistor and the second transistor are next to the opening; an upper electrode set up over and completely filled the opening; and a capacitor dielectric layer set up between the upper electrode and the substrate, wherein the source regions of the first transistor and the second transistor are contiguous to the capacitor dielectric layer.