Patent ID: 7224627

Claim:
A method for testing a multiplicity of integrated semiconductor circuits, the method comprising: a) providing the multiplicity of integrated semiconductor circuits, each integrated semiconductor circuit having a generator circuit and a protection circuit and an automatic test machine; b) connecting the multiplicity of integrated semiconductor circuits to the automatic test machine; c) predefining a value of the reference voltage for the multiplicity of semiconductor circuits by the automatic test machine; d) generating an output voltage dependent on the value of the reference voltage by a generator circuit of the multiplicity of semiconductor circuits; e) switching a current path contained in the protection circuit to the conducting state, if the output voltage exceeds a predetermined threshold value to limit the output voltage of the generator circuit; f) measuring a power consumption of the semiconductor circuits; g) predefining a smaller-magnitude value of the reference voltage and repeating steps d) to f), if the measured power consumption is greater than a predefined threshold value; and h) conducting a functional test for the multiplicity of semiconductor circuits.