Patent ID: 7501338

Claim:
A method of manufacturing a semiconductor package substrate, the method comprising: forming channels within a dielectric layer defining a first surface of a substrate, the channels having sides extending to a plane defining the first surface of the substrate and having a bottom beneath the plane defining the first surface of the substrate, the channels further including at least one land area formed from multiple channels within the substrate, and wherein the at least one land area forms a shape having non-channel regions within a perimeter of the land area; depositing conductive material filling the channels and extending over the first surface of the substrate; and etching the deposited conductive material, whereby conductive patterns are formed from the conductive material deposited in the channels and at least one land is formed from conductive material deposited in the at least one land area, whereby the conductive material in the at least one land area is not substantially dimpled by the etching due to a reduction of current density at the at least one land area.