Patent ID: 7008823

Claim:
A method of assembling a printed circuit board, said method comprising: providing a substrate including first and second surfaces and conductive contacts included on said first surface; providing a first semiconductor die including a pair of major surfaces, wherein one of said pair of major surfaces of said first die defines a first active surface, the other of said major surfaces of said first die defines a first stacking surface, said first active surface includes a plurality of conductive bond pads, and said first stacking surface is devoid of conductive bond pads; securing said first stacking surface to said first surface of said substrate between said conductive contacts included on said first surface of said substrate; providing a second semiconductor die including a pair of major surfaces, wherein one of said pair of major surfaces of said second die defines a second active surface, the other of said major surfaces of said second die defines a second stacking surface, and said second active surface includes a plurality of conductive bond pads; electrically coupling said first semiconductor die to said second semiconductor die with a plurality of topographic contacts extending from respective conductive bond pads on said second active surface to a corresponding conductive bond pad on said first active surface; securing a single decoupling capacitor to said second stacking surface; providing a pair of conductive lines, each of said conductive lines connecting a terminal of said decoupling capacitor, a bond pad on said first active surface, and a conductive contact on said first surface of said substrate; electrically coupling said bond pad on said first active surface to said second semiconductor die via one of said plurality of topographic contacts extending from respective conductive bond pads on said second active surface to a corresponding conductive bond pad on said first active surface; arranging said pair of conductive lines such that said decoupling capacitor is connected across Vss and Vcc pins of said first and second semiconductor dies; positioning a printed circuit board such that a first surface of said printed circuit board faces said substrate; and providing a plurality of topographic contacts extending from said second surface of said substrate to said first surface of said printed circuit board.