Patent ID: 8000789

Claim:
A capacitive interface circuit for an implantable medical device, comprising: a correlated sampling circuit that reduces one or more noise components in an output signal, the correlated sampling circuit comprising: a differential amplifier that amplifies a sensor signal to produce the output signal, wherein the differential amplifier comprises a first input, a second input, and an output; and a sampling capacitor comprising an input coupled to the output of the differential amplifier, wherein the sampling capacitor stores the output signal; and a clock distribution network that controls the correlated sampling circuit, wherein the correlated sampling circuit controls the first and second inputs of the differential amplifier, responsive to timing signals provided by the clock distribution network, such that the differential amplifier amplifies the one or more noise components during at least a portion of a first clock phase and amplifies the sensor signal with the one or more noise components during a second clock phase, and such that the sampling capacitor blocks at least a portion of the one or more amplified noise components during the second clock phase.