Patent ID: 8436412

Claim:
A NAND flash memory device, comprising: a cell region and a peripheral region; a plurality of line shape first active patterns formed in the cell region and extending in a first direction; a second active pattern connecting end portions of the first active patterns; a plurality of first long trenches and a plurality of first short trenches between the first active patterns alternately arranged in a second direction perpendicular to the first direction; isolation materials filling the first long trenches and first short trenches; a plurality of gate electrode lines crossing over the first active patterns and extending in the second direction; a plurality of line shape third active patterns symmetrically formed with the first active patterns with respect to the second active pattern; a plurality of second long trenches and a plurality of second short trenches symmetrically formed with the first long trenches and first short trenches with respect to the second active pattern; and isolation materials filling the second long trenches and second short trenches, wherein: the second active pattern has narrow areas between the first long trenches and the second long trenches and wide areas between the first short trenches and the second short trenches; and a contact is formed over the wide areas.