Patent ID: 7764109

Claim:
A semiconductor device comprising: a resistance layout area configured to lay out a plurality of unit resistors on a semiconductor chip; and a voltage divider circuit formed in the resistance layout area, to divide a voltage applied to a series circuit and output a divided voltage, the voltage divider circuit comprising: the series circuit including a first resistance element, a second resistance element, and at least one trimming resistance element connected in series; and at least one trimming fuse formed outside the resistance layout area, respectively connected in parallel with the at least one trimming resistance element, wherein the unit resistors belonging to each of three main resistance elements formed by the first resistance element, the second resistance element, and a highest trimming resistance element whose resistance value is highest among the at least one trimming resistance element are divided into multiple blocks each including a predetermined number of the unit resistors, wherein multiple groups each including one block of each of the three main resistance elements adjacently arranged are formed, and the groups are arranged close to a center portion of the resistance layout area.