Patent ID: 8085079

Claim:
A filter comprising: a first bank clocked by a first sampling clock that receives an analog signal as input data and produces a first output signal, the first bank includes a first plurality of track and hold circuits, a first plurality of multipliers and a first summing circuit; and a second bank clocked by a second sampling clock 180-degrees out of phase with the first sampling clock and receiving the analog signal as input data and produces a second output signal, the second bank includes a second plurality of track and hold circuits, a second plurality of multipliers and a second summing circuit, wherein at least the first summing circuit comprises a first load resistor coupled to a voltage source, a second load resistor coupled to the voltage source, a first cascode transistor including an emitter and a collector, the collector being coupled to the first load resistor, a second cascode transistor including an emitter and a collector, the collector being coupled to the second load resistor, a plurality of current offset circuits each coupled to the emitter of the first cascode transistor and the emitter of the second cascode transistor, and a plurality of transconductance amplifiers in parallel and each corresponding to one of the plurality of current offset circuits.