Patent ID: 6995456

Claim:
An integrated circuit structure comprising: a substrate having at least two types of crystalline orientations; first-type transistors formed on first portions of said substrate having a first type of crystalline orientation; second-type transistors formed on second portions of said substrate having a second type of crystalline orientation different from the first type of crystalline orientation; and a straining layer above said first-type transistors and said second-type transistors, wherein said first portions of said substrate comprise a first layer at a top of said first portions, said first layer having said first type of crystalline orientation and a second layer at a bottom of said first portions, said second layer having said second type of crystalline orientation, and wherein said second portions of said substrate comprise said second layer at a bottom of said second portions and a third layer at a top of said second portions, said third layer having said second type of crystalline orientation and said third layer contacting said second layer; wherein said first-type transistors and said second-type transistors include silicide regions and said straining layer is above said silicide regions; and, wherein said integrated circuit structure further comprises an insulator layer separating said first layer from said second layer.