Patent ID: 7939946

Claim:
A chip with a chip plane, comprising: a functional area comprising: a first active area and a second active area, which is spaced from the first active area; a first conductive trace, which crosses the first and second active areas, wherein a first insulating layer is arranged between the first active area or the second active area and the first conductive trace; and a second conductive trace, which is arranged above the first conductive trace, wherein a second insulating layer is arranged between the second conductive trace and the first conductive trace; a plurality of contact structures vertical with respect to the chip plane for contacting the first active area, the second active area, the first conductive trace or the second conductive trace, wherein the vertical contact structures include a conductive material; and a vertical dummy-contact structure, which extends vertically into the functional area to the first active area, the second active area, the first conductive trace or the second conductive trace, and which comprises an electrically conductive material and an insulation layer, the insulation layer being formed so that a current flow from an upper end of the dummy-contact structure to the functional area is prevented; wherein the vertical contact structures comprise a first vertical contact structure extending up to the first conductive trace, being spaced from the second conductive trace and representing a gate contact of a transistor implemented by the functional area, and a second vertical contact structure extending up to the first or second active area, being spaced from the first contact structure and the first conductive trace and representing a source/drain contact of the transistor, and a third vertical contact structure extending up to the first or second active area, being spaced from the first contact structure and the first conductive trace and representing a further source/drain contact of the transistor; wherein the dummy-contact structures comprise a first dummy-contact structure extending up to one of the first conductive trace and the second conductive trace and being spaced from the other of the first conductive trace and the second conductive trace, and a second dummy-contact structure extending up to the first active area or the second active area.