Patent ID: 8868837

Claim:
In a multiprocessor system comprising a plurality of processors running speculative threads in parallel; at least one cache shared by the processors, a method comprising: in a control unit of the cache, maintaining a dynamic record of read accesses to the cache, the dynamic record comprising an indication of an encoding of a superset of speculative reading threads and access footprints of those processes within a cache line; said encoding of a superset of speculative reading threads and access footprints including a multi-bit field, each bit of said field representing a group of IDs, wherein an aggregate of all IDs is represented as the aggregate of all bits of this field; and a bit set in a field representing the cache line has been read by at least one ID of a corresponding group; directing memory accesses for a same physical address from all the processors through a same memory addressing scheme of the control unit; and performing conflict checking for all the processors of the system using the record to locate potential conflicts.