Patent ID: 7968447

Claim:
A method of manufacturing a semiconductor device, comprising: forming plugs in an interlayer insulating layer on a substrate; forming a protection layer on the interlayer insulating layer and the plugs; forming a molding layer on the protection layer; forming first mask patterns on the molding layer; forming molding patterns overlapped with edges of the plugs on the protection layer using the first mask patterns as an etch mask, the molding patterns exposing the protection layer; after forming the molding patterns, forming a second mask pattern on the protection layer and the molding patterns, the second mask pattern exposing at least a portion of the protection layer on the plugs; forming a protection pattern exposing the plugs by removing an exposed portion of the protection layer using the second mask pattern and the molding patterns as an etching mask; removing the first mask patterns and the second mask pattern; and forming interconnections between the molding patterns, the interconnections being electrically connected to the plugs.