Patent ID: 8623720

Claim:
A method of fabricating a thin film transistor (TFT), comprising: forming an amorphous silicon (a-Si) layer on both a pixel region and a non-pixel region of a substrate; crystallizing the a-Si layer with a metal catalyst to form a polycrystalline silicon (poly-Si) layer; patterning the poly-Si layer to form a plurality of semiconductor layers, at least one connection portion, and at least one gettering site, the semiconductor layers being connected to the at least one gettering site via the at least one connection portion; annealing the substrate to getter the plurality of semiconductor layers; forming a gate insulating layer on the substrate; forming gate electrodes on the gate insulating layer respectively corresponding to channel regions of the plurality of semiconductor layers; and forming source and drain electrodes electrically connected to the plurality of semiconductor layers and electrically insulated from the gate electrode.