Patent ID: 7804713

Claim:
A method of emulating byte alterability in a flash device, comprising; changing a voltage state in a single program and erase entity to a first voltage state on a basis of a single program and erase entity, the single program and erase entity comprising two adjacent dual bit physical memory cells of the flash device as a single logical cell; and changing the voltage state in the single program and erase entity to a second voltage state that is different from the first voltage state, wherein changing the voltage state in the single program and erase entity comprises: applying a hot-electron-injection gate voltage to a gate, applying a hot-electron-injection bitline voltage to a common bitline of the single program and erase entity that is shared by the two adjacent dual bit physical memory cells, and connecting non-common bitlines of the single program and erase entity that are not shared by the two adjacent dual bit physical memory cells to ground; or applying a hot-hole-injection gate voltage to a gate, applying a hot-electron-injection bitline voltage to a common bitline of the single program and erase entity that is shared by the two adjacent dual bit physical memory cells, and allowing non-common bitlines of the single program and erase entity that are not shared by the two adjacent dual bit physical memory cells to float.