Patent ID: 7023277

Claim:
A method for minimizing power supply sensitivity of a differential amplifier, the differential amplifier conducting a source current at a common source node, the method comprising: a current source providing the source current; sensing a voltage potential of the common source node; adjusting the current source depending upon the sensed voltage potential of the common source node, thereby adjusting a magnitude of the source current, the current mirror comprises an amplifier bias current transistor and a mirror transistor, and wherein adjusting the current source comprises adjusting characteristics of the amplifier bias current transistor, and adjusting at least one of an amplifier bias current transistor back gate bias, and a mirror transistor back gate bias; wherein the amplifier bias current transistor comprises a plurality of sub-bias current transistors, and adjusting characteristics of the amplifier bias current transistor comprises controlling an inclusion of a number of parallel sub-bias current transistors, wherein each included sub-bias current transistors contributes to the differential amplifier bias current.