Patent ID: 7468292

Claim:
A method of fabricating a semiconductor device, comprising the steps of: forming an insulating film on a surface of a semiconductor wafer on a side where a plurality of devices are formed, the insulating film having an opening portion to which an electrode pad of each device is exposed; forming a conductor layer on the insulating film, the conductor layer being patterned into a required shape to cover the opening portion to which the electrode pad is exposed; forming a resist layer on the conductor layer, the resist layer having an opening portion to which a terminal formation portion of the conductor layer is exposed; forming a metal post in the terminal formation portion of the conductor layer with the resist layer being used as a mask; thinning the semiconductor wafer to a predetermined thickness by grinding one surface thereof, the one surface being opposite to a side where the metal post is formed; forming a metal layer on the ground surface of the semiconductor wafer after removing the resist layer, the metal layer being made of metal having a linear thermal expansion coefficient close to that of the semiconductor wafer; sealing the surface of the wafer with sealing resin with a top of the metal post being exposed; bonding a metal bump to the top of the metal post; and dividing the semiconductor wafer to which the metal bump is bonded, into each device.