Patent ID: 8302298

Claim:
A method for fabricating a circuit substrate, comprising: providing a base layer, a patterned conductive layer, a dielectric layer and a covering layer, wherein the patterned conductive layer having an inner pad is disposed on the base layer, the dielectric layer is disposed on the base layer and covers the patterned conductive layer, and the covering layer is disposed on the dielectric layer; removing a part of the covering layer by dry etching to form a first opening; removing a part of the dielectric layer exposed by the first opening to form a dielectric opening exposing a part of the inner pad; forming a patterned mask on the covering layer, wherein the patterned mask has a second opening to expose a part of the inner pad is formed on the covering layer; forming a conductive structure including a conductive block filling the dielectric opening, an outer pad filling the first opening and a surplus layer filling the second opening, wherein the conductive block, the outer pad and the surplus layer are formed in one piece together; and removing the patterned mask, the surplus layer and the covering layer.