Patent ID: 7968473

Claim:
A process for forming semiconductor junctions in a wafer, comprising: ion implanting dopant impurity atoms into the surface of the wafer; depositing an amorphous carbon layer on said wafer by the following steps: (a) introducing the wafer into a chamber such that a carbon-containing target overlies the wafer, and furnishing a process gas into the chamber; (b) generating a bias voltage on the wafer from a bias power source, (c) ion bombarding said carbon-containing target by applying target source power from a target power source to the carbon-containing target overlying said wafer; (d) setting said bias voltage so that the amorphous carbon layer that is deposited has an extinction coefficient exceeding 0.35 at a laser wavelength of an optical CW diode laser; and generating a line beam from an array of CW lasers operating at said laser wavelength and annealing the implanted dopant atoms in the wafer surface by scanning the line beam across the wafer surface in a direction transverse to the line beam, said line beam having sufficient power to raise the wafer surface temperature in a zone of said line beam above 1200 degrees C.