Patent ID: 7702836

Claim:
A parallel processing device that includes: a plurality of unit processors for executing a plurality of tasks in parallel, wherein the device achieves an exclusive control between a task and another task, and between the task and an external interrupt handling when at least one of the plurality of the unit processors receives a request for an interrupt handling from an outside; interrupt inhibit means, which is connected to each of the plurality of unit processors, for inhibiting an execution of the task from being interrupted in a unit processor on which the task is executing; exclusive control means, which is connected to each of the plurality of unit processors, for performing the exclusive control between the plurality of unit processors by acquiring an inter-unit processor lock after the interrupt inhibit means creates a unit processor interrupt inhibit state and by inhibiting the unit processor and other unit processors from accessing a common region in a memory; and external interrupt inhibit means, which is connected to each of the plurality of unit processors, for inhibiting a performance of interrupt handling requested from the outside after the exclusive control means performs the exclusive control between the unit processor and the other unit processors.