Patent ID: 8832469

Claim:
An in-wall computing device for providing processing capabilities and power-line networking capabilities, comprising: a CPU; a power connector operative to receive an AC signal from a power source; internal data receiving circuitry operative to extract incoming data from the AC signal and to supply the incoming data to the CPU; internal data injection circuitry operative to receive outgoing data from the CPU and to inject the outgoing data into the AC signal, wherein the internal data injection circuitry includes a digital-to-analog converter (DAC) and a power injector, wherein the power injector includes first and second FETs configured to receive complimentary control voltage from the DAC, wherein the first and second FETs are configured to be opposite channel types, receive a same gate control signal from the DAC, and alternatively turn on to conduct current to be injected into the AC signal; a first resistor having a first end connected to a gate of the first FET and a second end connected to a source of the first FET, designated for receiving the gate control signal and, accordingly, setting up biasing of the first FET or disabling the first FET from conducting current; and a second resistor having a first end connected to a gate of the second FET and a second end connected to a source of the second FET, designated for receiving the gate control signal and, accordingly, setting up biasing of the second FET or disabling the second FET from conducting current; a housing encompassing the CPU, the power connector, and the internal data receiving circuitry, wherein the housing is configured for installation within an electrical wall box; and one or more peripheral ports for connection to one or more peripherals.