Patent ID: 7814262

Claim:
A non-volatile memory system, comprising: a flash memory divided into individual blocks of data storage elements, the individual blocks containing a minimum number of storage elements that are erased together prior to writing data therein, wherein each of said individual blocks stores up to a given amount of data, and a controller connected with the flash memory and including a microprocessor operated by firmware, wherein the controller operates to divide data received by the flash memory into equal sized individual units of data, said units of data having contiguous logical addresses within a continuous logical address range, and wherein the controller operates to transform said individual units of data into corresponding groups of data in a manner that changes the amount of data in at least some of the units so that the groups of data corresponding to said at least some units contain amounts of data different than that in said at least some units, and to store the groups of data in the blocks of storage elements, each of said units containing an amount of data equal to or less than said given amount of data, and wherein the controller identifies storage locations by physical addresses of data groups having physical boundaries coincident with logical boundaries of the groups, some of the groups being stored entirely within individual blocks of storage elements and others of the groups being stored as separate sub-groups in two different blocks of storage elements with boundaries thereof within blocks of storage elements, the groups and sub-groups being stored contiguously within the individual blocks of storage elements and the sub-groups containing an amount of data less than said given amount, wherein the controller further maintains a central table with entries for the individual groups and sub-groups of data that include the physical addresses thereof.