Patent ID: 7688115

Claim:
A CMOS output driver for driving a capacitive load over a circuit trace in high speed applications, comprising: a signal input; a signal output; a first buffer amplifier with an input connected to the signal input, wherein the first buffer includes: a first pair of complementary MOS transistors connected in series between power supply terminals; and a first pair of inverters, wherein each inverter is connected between the signal input and a gate of one of MOS transistors from the first pair; a resistor that is connected between an output of the first buffer and the signal output; and a second buffer amplifier with an input connected to the signal input, wherein the second buffer includes: a second pair of complementary MOS transistors connected in series between the power supply terminals; and a first inverter connected between the signal input and a gate of each MOS transistor of the second pair; and a capacitor that is connected between an output of the second buffer and the signal output, wherein the second buffer amplifier and the capacitor are generally in parallel to the first buffer amplifier and the resistor.