Patent ID: 7160774

Claim:
A method of forming a semiconductor non-volatile memory cell, comprising: forming a first insulating layer over a silicon region; forming a first doped polysilicon layer over the first insulating layer; forming a first undoped polysilicon layer over and in contact with the first doped polysilicon layer, the first doped and first undoped polysilicon layers forming a floating gate; forming a second insulating layer over and in contact with the first undoped polysilicon layer; forming a second undoped polysilicon layer over and in contact with the second insulating layer; and forming a second doped polysilicon layer over and in contact with the second undoped polysilicon layer, the second doped and undoped polysilicon layers forming a control gate, wherein dopants from the first doped polysilicon layer migrate into the first undoped polysilicon layer thereby doping the first undoped polysilicon layer, and dopants from the second doped polysilicon layer migrate into the second undoped polysilicon layer thereby doping the second undoped polysilicon layer.