Patent ID: 7532511

Claim:
A method of operating a re-programmable non-volatile memory system having an array of memory cells organized into distinct blocks that individually include a number of simultaneously erasable memory cells capable of storing a particular quantity of data, the distinct memory cell blocks being further organized into a plurality of sub-arrays, comprising: receiving and temporarily storing in a buffer memory at least a given number of sectors of user data to be programmed into the memory system, moving data from one of the given number of sectors of user data in the buffer at a time to a respective one of a plurality of storage registers at a time, wherein moving data additionally comprises generating a redundancy code from the user data of the individual sectors and adding the generated code to the user data from which they are generated, and thereafter moving the user data and the redundancy codes generated therefrom from the plurality of storage registers in parallel to respective ones of a plurality of memory cell blocks that are located within different ones of the plurality of sub-arrays.