Patent ID: 8598584

Claim:
A thin-film transistor device comprising: a substrate; a source electrode and a drain electrode formed on the substrate; silicon layers, one of which is stacked within a top surface region of the source electrode and an other of which is stacked within a top surface of the drain electrode, the silicon layers being amorphous and doped with an impurity; a first channel layer formed continuously (i) on the substrate, in a region between the source electrode and the drain electrode, (ii) on a side surface of each of the source electrode and the drain electrode, and (iii) on a side surface and a top surface of each of the silicon layers, the first channel layer being made of an amorphous silicon layer; a second channel layer stacked on the first channel layer and made of one of a polysilicon layer and a microcrystalline silicon layer, the second channel layer being formed continuously (i) in a region between the source electrode and the drain electrode and (ii) laterally from and above the silicon layers; a gate insulating film formed on the second channel layer; and a gate electrode formed on the gate insulating film, wherein a stacked thickness of either the source electrode or the drain electrode and a corresponding one of the silicon layers is a same value or a value close to the same value as a stacked thickness of the first channel layer and the second channel layer, the stacked thickness of the first channel layer and the second channel layer is the same in the region between the source electrode and the drain electrode and above the source electrode and the drain electrode, the first channel layer and the second channel layer are sunken in the region between the source electrode and the drain electrode, following a shape between the source electrode and the drain electrode, and the gate electrode has one region overlapping with the source electrode and an other region overlapping with the drain electrode.