Patent ID: 7529641

Claim:
An apparatus for providing a logic waveform display on a mixed signal oscilloscope using a “no dead time” architecture comprising: an analog channel receiving and processing an analog signal under test; a plurality of digital channels, each of said plurality of digital channels receiving and processing a respective logic signal under test; each of said digital channels including a sampler, each of said samplers continuously acquiring samples of said logic signal at a high sample rate; trigger circuitry coupled to a digital channel, said trigger circuitry detecting each trigger event within the logic signal; means for delaying the samples for a pre-trigger time to assure acquisition of a specified number of samples prior to each trigger event; means for drawing in real time the samples into a waveform memory at a display sample rate to produce a logic waveform; means for transferring the logic waveform to a display buffer at a specified vertical location and with a specified amplitude; and means for compressing the samples into compression codes for input to the delaying means, each of said compression codes exhibiting one of four predetermined logic states.