Patent ID: 8367508

Claim:
A method for forming a field effect transistor, the method comprising: forming a gate stack on a substrate; forming a spacer on the substrate adjacent to opposing sides of the gate stack; forming a silicide source region on the substrate adjacent to the spacer on a first side of the gate stack; forming a silicide drain region on the substrate adjacent to the spacer on a second side of the gate stack; epitaxially growing silicon on the exposed silicide source region and the exposed silicide drain region; forming a liner layer on a hardmask layer of the gate stack and the spacer; removing a portion of the liner layer to expose a portion of the hardmask layer; removing the exposed portions of the hardmask layer to expose a silicon layer of the gate stack; removing exposed silicon to expose a portion of a metal layer of the gate stack, the silicide source region, and the silicide drain region; and depositing a conductive material on the exposed metal layer of the gate stack, the exposed silicide source region, and the exposed silicide drain region.