Patent ID: 7138872

Claim:
A power amplifier having a power amplifier device ( 16 ) having an output electrode; a first conductive layer ( 18 ) which is connected with the output electrode; a first dielectric layer ( 20 ) on top of the first conductive layer ( 18 ); a second conductive layer ( 22 ) on top of the first dielectric layer ( 20 ) being electrically connected through a first transmission line ( 30 ) of desired length to the first conductive layer ( 18 ), whereby a first parallel LC circuit is created comprising the capacitance between the said first ( 18 ) and the said second ( 22 ) conductive layers an an inductance formed by said first transmission line ( 30 ), said first parallel LC circuit resonating at a harmonic (2F 0 , 3F 0 , 4F 0 , 5F 0 , . . . ) of a frequency (F 0 ) amplified by said power amplifier device ( 16 ), which first LC circuit is connected to an output terminal ( 40 ) of the device through a further transmission line ( 34 ),thereby providing a harmonic frequency suppression circuit integral with said power amplifier; and wherein a second dielectric layer ( 24 ) is present on top of the said second conductive layer ( 22 ) at the top of which a third conductive layer ( 26 ) is present, which is connected to the second conductive layer ( 22 ) with a second transmission line ( 28 ), herewith defining a second parallel LC circuit connected in series between the first LC circuit and the further transmission line ( 40 ) and resonating at any other harmonic frequency of the amplified signal than the first LC circuit.