Patent ID: 7969340

Claim:
A segmented digital-to-analog converter comprising: a signal component processing stage having a first digital modulator for generating a first word in response to an input word according to an M 1 th order noise transfer function, and a first DAC unit for converting the first word to generate a first analog value; a noise component processing stage comprising a second digital modulator for generating a second word in response to a first residue word obtained by subtracting the first word from the input word according to an M 2 th NTF, a second DAC unit for converting the second word to generate a second analog value, and a third DAC unit for converting a second residue word obtained by subtracting the second word from the first residue word to generate a third analog value; and a summing unit summing the first analog value, the second analog value, and the third analog value to generate an output analog value.