Patent ID: 8320153

Claim:
A read-only memory, comprising: a channel area; a gate line extending along the channel area so that the channel area can be set into a conductive state by activating the gate line; and a plurality of storage cells arranged along the channel area, each storage cell comprising a gate structure and having associated therewith a read line, wherein the same voltage is applied to the gate structure of each storage cell arranged along the channel area when the gate line is activated, wherein a first storage cell comprises a permanent electrical connection between the associated read line and the channel area, so that the read line associated therewith is pulled to a predetermined voltage level when activating the gate line, the first storage cell storing a first value indicating the permanent electrical connection, and wherein a second storage cell storing a second value does not comprise an electrical connection between the associated read line and the channel area, so that the read line associated therewith is not pulled to the predetermined voltage level when activating the gate line, the second value indicating an absence of the permanent electrical connection.