Patent ID: 8843863

Claim:
A circuit optimization information management apparatus, the apparatus comprising: a central processing unit operable to: register information relating to a circuit type used in a design target circuit, a simulation test bench circuit corresponding to the circuit type, a simulation test input waveform, and a circuit performance evaluation function for evaluating simulation results; transfer to a circuit parameter optimization program, in response to a selection of the circuit type used in the design target circuit, the information relating to the simulation test bench circuit, the simulation test input waveform and the circuit performance evaluation function, corresponding to the selected circuit type, wherein the circuit performance evaluation function is extracted from a predetermined waveform graph; extract at least one specified waveform equation from the simulation results; generate an equation by adding, to the at least one extracted specified waveform equation, coordinates information responsive to a click or a drag within a waveform window by a user; and register the generated equation as the circuit performance evaluation function corresponding to the circuit type.