Patent ID: 8472311

Claim:
A packet distribution system, comprising: a processor; and a memory coupled to the processor, the memory configured to store instructions executable by the processor to cause the packet distribution system to: maintain information about an operating status of each of a plurality of packet processing devices, the information indicating whether a corresponding one of the packet processing devices is capable or not capable of processing packets; maintain information about packet flows being processed by the packet processing devices, and, for each packet flow, assigning one of the plurality of packet processing devices as a primary device for the packet flow and assigning another of the plurality of packet processing devices as a secondary device for the packet flow, wherein to maintain the information about the packet flows being processed by the packet processing devices, the instructions are executable by the processor to further cause the packet distribution system to: receive a packet, determine whether the packet is associated with a new packet flow or an existing packet flow, and in response to a determination that the packet is associated with a new packet flow, assign one of the plurality of packet processing devices as a primary packet processing device for the new packet flow, and, prior to a failure of the primary packet processing device for the new packet flow, assign another of the plurality of packet processing devices as a secondary packet processing device for the new packet flow; and route packets to the packet processing devices according to the operating status of the packet processing devices that have been assigned to the packet flow with which the packets are associated.