Patent ID: 8390092

Claim:
An integrated circuit device, comprising: first and second terminals; a single polarity electrostatic discharge (ESD) clamp coupled between the first and second terminals, comprising: (a) a substrate; (b) a first semiconductor region of a first conductivity type formed in the substrate; (c) a second semiconductor region of the first conductivity type formed in the substrate and separated from the first semiconductor region; and (d) a third semiconductor region of a second conductivity type opposite from the first conductivity type formed in the substrate to surround and separate the first and second semiconductor regions; where the first semiconductor region comprises a first contact region of the first conductivity type connected to the first terminal and a second contact region of the second conductivity type connected to the first terminal, and where the second semiconductor region comprises a third contact region of the first conductivity type connected to the second terminal and no additional contact region of the second conductivity type connected to the second terminal.