Patent ID: 8804360

Claim:
A system-in package comprising: a carrier; a first chip supported by the carrier, the first chip comprising a first semiconductor substrate having a first surface on a dielectric layer and a second surface opposite the first surface, in which a first conductive layer is between the dielectric layer and the carrier; a second chip supported by the carrier, the second chip comprising a second semiconductor substrate having a second surface substantially coplanar with the second surface of the first semiconductor substrate, in which the second chip is separated from the first chip; a gap filling material disposed in a gap between the first chip and the second chip; a first conductive plug in the first chip, in which the first conductive plug passes through the first semiconductor substrate and the dielectric layer and contacts the first conductive layer; a first insulating material enclosing the first conductive plug, in which the first insulating material is enclosed by the first semiconductor substrate; and a first dielectric structure on the second surface of the first semiconductor substrate, on the second surface of the second semiconductor substrate, and on the gap filling material; a first conductive interconnect in the first dielectric structure, in which the first conductive interconnect is coupled to the first conductive plug.