Patent ID: 7605643

Claim:
A voltage generation circuit, comprising: a static current circuit, the static current circuit including, an operational amplifier including an inverted input terminal configured to receive a reference potential, a first PMOS transistor including a drain and gate connected to an non-inverted input terminal and an output node of the operational amplifier, respectively, and a source connected to a power source voltage, and a first resistor connected between the drain of the first PMOS transistor and a ground; and a current mirror, the current mirror including, a second PMOS transistor including a source connected to the power source voltage and a gate connected to the gate of the first PMOS transistor, a first NMOS transistor including a drain and gate commonly connected to a drain of the second PMOS transistor, a second resistor connected between a source of the first NMOS transistor and the ground, a third PMOS transistor including a source connected to the power source voltage and a gate and drain connected to each other, a second NMOS transistor including a drain connected to the drain of the third PMOS transistor and a gate connected to the gate of the first NMOS transistor, a third resistor connected between a source of the second NMOS transistor and the ground, and an output terminal connected to the source of the second NMOS transistor.