Patent ID: 8653870

Claim:
A PWM signal output circuit configured to output a PWM signal with a duty cycle corresponding to a duty cycle of an input signal to a drive circuit configured to drive a motor based on the PWM signal, the PWM signal output circuit comprising: a speed signal generating unit configured to generate a speed signal having a period corresponding to a rotation speed of the motor and having a logic level changing in an alternate manner; a first output unit configured to output the PWM signal with a first duty cycle, in during a first time period in which the motor starts to rotate; a second output unit configured to output when the speed signal changes in logic level during a second time period following the first time period, the PWM signal whose duty cycle increases toward a second duty cycle and thereafter decreases from the second duty cycle so as to cause a current flowing through a motor coil of the motor to increase and thereafter decrease within a time period from the change in logic level of the speed signal until a subsequent change in logic level of the speed signal; and a third output unit configured to output, when the speed signal changes in logic level after the second time period has elapsed, the PWM signal whose duty cycle increases toward the duty cycle of the input signal and thereafter decreases from the duty cycle of the input signal so as to cause the current flowing through the motor coil to increase and thereafter decrease within a time period from the change in logic level of the speed signal until a subsequent change in logic level of the speed signal.