Patent ID: 7072430

Claim:
A system comprising: a signal retimer device to regenerate a first signal based on a clock signal, wherein the signal retimer device comprises a clock generator to provide the clock signal and wherein the clock generator comprises: a first transistor device including first, second, and third terminals, a second transistor device including first, second, and third terminals, a first impedance device to couple the second terminal of the second transistor device to the first terminal of the first transistor device, and a second impedance device to couple the second terminal of the first transistor device to the first terminal of the second transistor device, wherein the first impedance device comprises a capacitive element and a resistive element, wherein each of the capacitive element and the resistive element includes first and second terminals, wherein the first terminal of the capacitive element and the first terminal of the resistive element are each coupled to the second terminal of the second transistor device, and wherein the second terminal of the capacitive element and the second terminal of the resistive element are each coupled to the first terminal of the first transistor device, and the second impedance device comprises a capacitive element and a resistive element, wherein each of the capacitive element and the resistive element includes first and second terminals, wherein the first terminal of the capacitive element and the first terminal of the resistive element are each coupled to the second terminal of the first transistor device, and wherein the second terminal of the capacitive element and the second terminal of the resistive element are each coupled to the first terminal of the second transistor device; a data processor to receive the regenerated first signal; and an interface device to exchange signals with the data processor.