Patent ID: 7307572

Claim:
A switched-capacitor gain stage comprising: an amplifier having an amplifier input node and an amplifier output node; a first switched-capacitor arrangement having an input node for receiving a first input voltage signal, an output node coupled to said amplifier output node, and a feedback node coupled to said amplifier input node; a second switched-capacitor arrangement having an input node for receiving a second input voltage signal, an output node coupled to said amplifier output node, and a feedback node coupled to said amplifier input node; a third switched-capacitor arrangement having an input node for receiving said first input voltage signal, an output node coupled to said amplifier output node, and a feedback node coupled to said amplifier input node; a fourth switched-capacitor arrangement having an input node for receiving said second input voltage signal, an output node coupled to said amplifier output node, and a feedback node coupled to said amplifier input node; and a switch architecture configured to cause said switched-capacitor gain stage to concurrently sample said first input signal and said second input signal, and to provide, at said amplifier output node, a series of interleaved output voltage samples derived from said first input voltage signal and said second input voltage signal.