Patent ID: 8877626

Claim:
A method of manufacturing a nonvolatile memory device, the method comprising: forming a channel hole penetrating through a stacked structure of a plurality of sacrificial insulating layers and a plurality of first insulating layers, the stacked structure disposed on a substrate; forming a sacrificial spacer on a side wall of the channel hole; forming a semiconductor channel layer on a sidewall of the sacrificial spacer; partially etching the sacrificial spacer to expose a first portion of a sidewall of the semiconductor channel layer; forming a second insulating layer on the first portion of the sidewall of the semiconductor channel layer; after forming the second insulating layer, etching the plurality of sacrificial insulating layers in the stacked structure and the sacrificial spacer so that a second portion of the sidewall of the semiconductor channel layer is exposed; and forming a gate conductive layer on the exposed second portion of the sidewall of the semiconductor channel layer, wherein said forming the gate conductive layer is preceded by forming a gate insulating layer directly on the exposed second portion of the sidewall of the semiconductor channel layer, and wherein the gate insulating layer extends between the gate conductive layer and the plurality of first insulating layers.