Patent ID: 7229872

Claim:
A method for manufacturing a semiconductor device comprising: providing a substrate of a first conductivity type; forming an epitaxial semiconductor layer of said first conductivity type over said substrate, said epitaxial layer having a first concentration of dopants of said first conductivity type; forming a channel region of a second conductivity type in said epitaxial layer; forming vertical trenches in said epitaxial layer, said trenches extending through said channel region to a semiconductor region below said channel region; forming a self-depleting region of one of said first conductivity type and second conductivity type in said epitaxial layer adjacent the bottom of each trench and extending to and adjacent said channel region, each said self-depleting region having a concentration of dopants selected so that said self-depleting region is at all times depleted by the inherent built-in junction voltage between said self-depleting region and its surrounding region; and forming a gate structure in each of said trenches.