Patent ID: 7348629

Claim:
A MOSFET device, comprising: a ground plane formed of a monocrystalline Si based material, wherein said ground plane has dopant impurities of a first type with a concentration of between about 1×10 18 /cm 3 and 1×10 20 /cm 3 ; a Si based body layer epitaxially disposed on said ground plane and having an interface with said ground plane, wherein said body layer has a thickness of between about 2 nm and 7 nm, wherein said body layer has dopant impurities of a second type with a concentration of between about 5×10 18 /cm 3 and 5×10 19 /cm 3 , wherein a region of transition between said first type and said second type of dopant impurities has a width across said interface of between about 2.5 nm and 0.5 nm; a gate insulator layer disposed over said body layer; a gate disposed over said gate insulator layer, wherein said gate comprises a metal with a mid-gap workfunction, wherein said metal is in direct contact with said gate insulator layer, wherein said gate has a length of less than about 40 nm; and a source and a drain, wherein said source and said drain have dopant impurities of said second type with a concentration of between about 5×10 19 /cm 3 and 2×10 20 /cm 3 , and wherein said source and said drain have junction depths of less than about 7 nm.