Patent ID: 7207096

Claim:
A method of fabricating a high performance copper (Cu) laminate inductor comprising the steps of: forming a last metal layer including damascene Cu interconnects in a dielectric, one Cu interconnect including a Cu laminate inductor at a last metal Cu level; depositing one or more layers of passivation material over the last metal layer damascene Cu interconnects; patterning terminal vias in the one or more layers of passivation material corresponding to said Cu interconnects, one terminal via including a via of the Cu laminate inductor over the last metal Cu level of the Cu laminate inductor; forming a bond pad structure above one of said Cu interconnects including depositing metal for said bond pad and a baffler layer, patterning the metal for said bond pad and baffler layer, and depositing a Cu seed layer atop said bond pad and barrier layer; depositing and patterning a resist for Cu inductors, and depositing Cu to selectively form Cu in inductor regions at a last metal+1 Cu level of the Cu laminate inductor over the via and the last metal Cu level, to form the Cu laminate inductor; and stripping the resist, etching the Cu seed layer, and selectively depositing a passivating layer on said Cu inductors.