Patent ID: 8289460

Claim:
A pixel structure disposed on a substrate to define a plurality of pixel regions on the substrate, wherein each of the pixel regions has a first sub-pixel region and a second sub-pixel region, and each of the second sub-pixel regions has a first common capacitor region, the pixel structure comprising: a first scan line, a second scan line, a first data line and a second data line; a common line crossing over the first sub-pixel region and the second sub-pixel region, wherein the common line has a first common electrode portion disposed within the first common capacitor region; a first pixel unit including a first active device, a first capacitor electrode and a first pixel electrode, wherein the first active device is electrically connected to the first scan line and the first data line, and the first pixel electrode is configured within the first sub-pixel region to be electrically connected to the first active device, and the first capacitor electrode is configured under the common line and electrically connected to the first active device, and the first capacitor electrode comprises: a first capacitor electrode portion, wherein the first pixel electrode is connected to the first active device through the first capacitor electrode portion; and a first extending electrode portion extending from the first capacitor electrode portion to the first common capacitor region so that the first extending electrode portion overlaps the first common electrode portion to form a first extending capacitor; a second pixel unit comprising a second active device and a second pixel electrode, wherein the second active device is electrically connected to the second scan line and the second data line, and the second pixel electrode is configured within the second sub-pixel region to be electrically connected to the second active device, and the second pixel electrode overlaps the first common electrode portion to form a second storage capacitor, and the second storage capacitor and the first storage capacitor are stacked in the first common capacitor region of the second sub-pixel region.