Patent ID: 8194545

Claim:
A packet processing apparatus for performing a packet discarding process, comprising: a packet buffer provided with a queue for storing packets; an actual queue length/position discriminator configured to acquire, at every sampling period, an actual queue length indicating an occupancy status of the queue storing packets, determine a positional relationship of the actual queue length relative to a random early detection interval indicative of a range between a minimum threshold, which is a minimum queue length value beyond which packet discarding is started, and a maximum threshold, which is a maximum queue length value beyond which all packets are discarded, and output the determined positional relationship as position information; a discard probability computation processor configured to calculate, at every sampling period, a packet discard probability based on the position information; and a packet discard processor configured to discard, at every sampling period and in accordance with the discard probability, packets that are not yet stored in the queue, wherein, if the actual queue length is not greater than the maximum threshold and is within the random early detection interval, the discard probability computation processor calculates an average queue length, which indicates an average occupancy status of the queue, then obtains a discard target as a target data amount of packets to be discarded and a reception target as a target data amount of packets received at a sampling time, and calculates the discard probability from a ratio of the discard target to the reception target, wherein the a discard probability computation processor includes: an average queue length calculator configured to calculate the average queue length; a discard target calculator configured to calculate the discard target; a reception target calculator configured to calculate the reception target; a target corrector configured to divide each of the calculated discard and reception targets by an identical constant, to generate corrected discard and reception targets by reducing respective bit values of the discard and reception targets at an identical rate; a corrected discard target register configured to store the corrected discard target obtained by reducing the bit value of the discard target; a corrected reception target register configured to store the corrected reception target obtained by reducing the bit value of the reception target; and a discard probability decider configured to calculate the discard probability by dividing the corrected discard target by the corrected reception target to obtain the ratio of the discard target to the reception target.