Patent ID: 7135368

Claim:
A method of fabricating a semiconductor memory device, comprising: recess-etching a major surface of a semiconductor substrate, thereby forming a pillar that becomes a device formation region; burying an insulation film in the recess-etched region, thereby forming a device isolation region; forming at least a part of a gate insulation film on a surface of the pillar; burying a gate electrode material at the device isolation region in the recess-etched region, thereby forming a gate electrode on a side wall and an upper surface of the pillar; forming a trench in a vicinity of an end portion of the pillar, and forming a capacitor on a side wall portion of the trench; introducing impurities in the pillar using the gate electrode as a mask, thereby forming first and second activation regions such that the gate electrode is interposed between the first and second activation regions; burying a first oxide film at a side wall of the pillar on the device isolation region such that the gate electrode is interposed; forming a second oxide film on an upper part of the pillar; removing an upper part of the first oxide film using the second oxide film as a mask, thereby exposing an upper surface and an upper part of the side wall of the pillar; and forming a conductive material on the exposed upper surface and the exposed upper part of the side wall of the pillar, thereby forming a surface strap that electrically connects the capacitor and the second activation region.