Patent ID: 8402242

Claim:
A memory management system for a memory device of a computer, the system comprising: the memory device; a free block data structure including a plurality of free memory blocks for writing, the free block data structure configured to sort the free memory blocks in a predetermined order based on block write-erase endurance cycle count and receive new user-write requests to update existing data and relocation write requests to relocate existing data separately such that user-write data from new user-write requests are placed on youngest free memory blocks having lower block write-erase endurance cycle count while relocation data from relocation requests are placed on oldest free memory blocks having higher block write-erase endurance cycle count than that of the youngest free memory blocks, a user-write data structure configured to receive user-write memory blocks holding the user-write data from the free block data structure; a relocation data structure configured to receive relocation memory blocks holding the relocation data from the free block data structure; and a garbage collection pool structure configured to select at least one of the user-write blocks and relocation blocks for erasure, wherein the selected block is moved to the free block data structure upon being erased, wherein the selected block is selected from a window comprising user-write memory blocks selected form the user-write data structure and relocation memory blocks selected from the relocation data structure, the window being of a size s+t, where s is a number of user-write memory blocks in the window and t is a number of relocation memory blocks in the window, s is a number of user-write memory blocks less than of the all user write memory blocks in the user-write data structure and t is a number of relocation memory blocks less than all of the relocation memory blocks in the relocation data structure.