Patent ID: 7579254

Claim:
A process for realizing an integrated electronic circuit, comprising: obtaining an SOI substrate, said SOI substrate including: a primary substrate based on monocrystalline silicon, an initial insulating layer on a surface of the primary substrate, and an initial active layer based on monocrystalline silicon, on the initial insulating layer on a side opposite the primary substrate, with the primary substrate and the initial active layer having different respective crystal orientations relative to the surface of the primary substrate; selectively etching the initial active and insulating layers in a second zone of the SOI substrate, relative to a first zone of said SOI substrate, so as to expose a surface of the primary substrate in said second zone; selectively forming in the second zone, by epitaxy starting from the exposed surface of the primary substrate, a stack comprising a monocrystalline temporary layer and a monocrystalline additional active layer, with the additional active layer being placed on a side of the temporary layer opposite the primary substrate and having the crystal orientation of said primary substrate; forming a supporting portion rigidly connected to the additional active layer, and to the primary substrate independently of the temporary layer; selectively etching the temporary layer, with the additional active layer being held in place by the supporting portion; forming an additional insulating layer in place of the temporary layer; and realizing first and second transistors in the first and second zones of the substrate respectively, with said first transistor having a first channel situated in the initial active layer and said second transistor having a second channel situated in the additional active layer.