Patent ID: 8516199

Claim:
A method for processing a request for a cache line in a multiprocessor system that supports a directory-based cache-coherence scheme, comprising: receiving the request for the cache line from a requesting node at a home node, wherein the home node maintains directory information for all or a subset of the address space which includes the cache line; performing an action at the home node that causes a valid copy of the cache line to be sent to the requesting node; and when causing the valid copy of the cache line to be sent to the requesting node involves sending the valid copy of the cache line from the home node to the requesting node, completing processing of the request at the home node without waiting for an acknowledgment indicating that the requesting node received the valid copy of the cache line, wherein the requesting node does not send an acknowledgment indicating that the requesting node received the valid copy of the cache line when receiving the copy of the cache line from the home node.