Patent ID: 8883557

Claim:
A method of fabricating a resistive random access memory cell, the method comprising: providing a first conductive layer on a substrate; forming a first nanolaminate structure over the first conductive layer; and forming a second nanolaminate structure over the first nanolaminate structure; wherein the first conductive layer is operable as an electrode; wherein the first nanolaminate structure and the second nanolaminate structure are formed using an atomic layer deposition technique; wherein the first nanolaminate structure and the second nanolaminate structure each comprise at least one first oxide layer and at least one second oxide layer; wherein the first oxide layer comprises an oxide of a first element and the second oxide layer comprises an oxide of a second element; wherein the first element is less electronegative than the second element; wherein an average atomic ratio of the first element to the second element in the first nanolaminate structure is less than an average atomic ratio of the first element to the second element in the second nanolaminate structure, and wherein at least one of the first nanolaminate structure and the second nanolaminate structure is switchable between a high resistance state and a low resistance state.