Patent ID: 8266605

Claim:
A system including a memory to store a set of instructions executable by a processor, the set of instructions being operable to: compile and execute a program having a first layout of source code routines; generate at least one memory access parameter for the program, the memory access parameter being based on a cache memory of a computing system on which the program is designed to run, the at least one memory access parameter including at least one of execution frequency data and execution criticality data; and recompile and execute the program having a second layout of source code routines, wherein the at least one memory access parameter is used by a linker to construct the second layout for the program based on at least one of the execution frequency data and the execution criticality data, and wherein a loader rearranges the second layout of the source code routines based on the at least one of the execution frequency data and the execution criticality data to perform loading.