Patent ID: 8912065

Claim:
A method for fabricating a semiconductor device, comprising: providing a substrate that has a first area and a second area; forming, over the substrate, a first patterned mask layer that has at least one first opening in the first area and has a plurality of second openings in the second area, wherein the first opening is smaller than the second openings; removing a portion of the substrate, with the first patterned mask layer as a mask, to form at least one first trench in the substrate in the first area and form a plurality of second trenches in the substrate in the second area, wherein a width of the first trench is less than a width of the second trenches, and a depth of the first trench is less than a depth of the second trenches; removing the first patterned mask layer; forming a first dielectric layer at least in the first trench and the second trenches; and forming a conductor structure on the first dielectric layer on at least a portion of a sidewall of the first trench and on the first dielectric layer on at least a portion of a sidewall of the second trenches, wherein the first area comprises a transistor device area, and the second area comprises a capacitor area.