Patent ID: 8484435

Claim:
A method executed under control of an application for updating data stored in a plurality of physical memories connected to a memory management unit controlled by a microprocessor, said memory management unit performing an update transaction by translating virtual memory page addresses into physical memory pages addresses by reading a page table by following a plurality of address pointers forming a tree structure, the method comprising steps of: defining, by a first version attribute, pointers of a first sub-tree structure, said first sub-tree structure being used by the memory management unit for the current access of the application to the physical memory pages; defining, by a second version attribute, pointers to be used by the memory management unit, for the data update transaction in said physical memory pages; selecting, by the application, a set of free memory pages comprising pages having physical addresses designated by pointers defined by a first version attribute and pages having physical addresses designated by pointers defined by a second version attribute, said pointers defined by the second version attribute forming a second sub-tree structure; updating data of the selected physical memory pages designated by the pointers of the second sub-tree structure; configuring, by the memory management unit, the page table in such a way that the application uses the pointers of the second sub-tree structure for the current access to the physical memory pages instead of the pointers of the first sub-tree structure used before the update.