Patent ID: 8713224

Claim:
A storage controller, comprising: a buffer controller configured to operate in a first mode and a second mode, wherein while operating in the first mode, the buffer controller is configured to i) load a data length counter with a predetermined data block size stored in a first register, and ii) receive data having the predetermined data block size from a host system, and wherein while operating in the second mode, the buffer controller is configured to i) receive data having a first data alignment from the host system, wherein the first data alignment is associated with a first data block size, and wherein the first data block size can be of any size, ii) store the first data block size in a second register, iii) load the data length counter with the first data block size stored in the second register to evaluate whether the first data block size is different from the predetermined data block size, iii) determine, based on (a) the first data block size loaded into the data length counter and (b) a second data alignment, a padding requirement of the data having the first data alignment, and iv) selectively pad, based on the padding requirement, the data having the first data alignment to generate data having the second data alignment, wherein the second data alignment is associated with a second data block size; and a buffer memory configured to i) receive the data having the second data alignment from the buffer controller, and ii) store the data having the second data alignment.