Patent ID: 7966482

Claim:
An apparatus comprising: a decoder to receive a first instruction, the first instruction indicating a first operand having a first plurality of data elements and indicating a second operand having a second plurality of data elements, each of the first and the second pluralities of data elements having a length of N bits; a functional unit including circuitry and operatively coupled with the decoder, to store, in response to the decoder decoding the first instruction, first packed data having a length of at least 2N bits, the first packed data having N/2 bit data elements, each of the first and the second pluralities of data elements corresponding to a different one of the N/2 bit data elements, each N/2 bit data element having one of: (1) a part of the corresponding data element of the first and the second pluralities; and (2) a clamped value that is one of a maximum and a minimum.