Patent ID: 8489850

Claim:
A memory apparatus comprising: a nonvolatile memory configured to have data written thereto and read therefrom in units of clusters and to have data deleted therefrom in units of blocks each formed by a plurality of sectors; and a control circuit configured to control said nonvolatile memory in operation; said nonvolatile memory including: (a) a management area in which to record management information; (b) a user data area in which to record data coming from a user, said user data area including logical blocks, said logical blocks having first addresses, wherein first physical blocks are assigned to said first addresses, said first physical blocks having second addresses; and (c) a cache area in which to hold temporarily the data to be written to and read from said user data area, said cache area including second physical blocks, said second physical blocks having third addresses arranged in ascending order based on utilization; said management area including: (a) a logical to physical conversion table retaining relations of correspondence between: (i) said first addresses of said logical blocks in said user data area; and (ii) said second addresses of said first physical blocks assigned to said first addresses of said logical blocks in said user data area; and (b) said third addresses of said second physical blocks in said cache area corresponding to the second addresses of said first physical blocks assigned to said first addresses of said logical blocks; and said control circuit including: (a) determination means for determining whether a data write from a host apparatus to a user data block of said user data area is in excess of a designated logical boundary which defines a logical space size in units of a plurality of sectors within the user data block of said user data area; (b) first writing means for writing, to a deleted new cache block in said cache area, data from the host apparatus determined to be in excess of the designated logical boundary; and (c) second writing means for having the data written starting from the beginning of said new cache block upon data write by said first writing means to said new cache block, regardless of the logical address space of said new cache block.