Patent ID: 7352052

Claim:
A semiconductor device comprising: at least one semiconductor element; one chip mounting base being provided at least one first interconnection on one major surface thereof and at least one second interconnection on the other major surface thereof, and the semiconductor element being electrically connected to the at least one first interconnection and mounted on the one major surface; a sealing member being provided on the one major surface of the chip mounting base and covering the semiconductor element and the at least one first interconnection; at least one third interconnection being provided on a surface of the sealing member; and at least one fourth interconnection being provided in the sealing member and the chip mounting base, extending through the sealing member, the chip mounting base, and the at least one first interconnection, and being formed separately from the at least one third interconnection, the at least one fourth interconnection defining a passage extending through the sealing member, the chip mounting base, and the at least one first interconnection, and being electrically connected to the at least one first interconnection, the at least one second interconnection, and the at least one third interconnection.