Patent ID: 7474124

Claim:
A bus keeper and logic controller circuit for operation with a separate receiver-side I/O that includes a driver and/or receiver, wherein the driver is connected to a bus through a driver output node, the logical state of which is kept in a signal PAD to control driver impedance state at the output node to one of a high-impedance (Hi-Z) driver tri-state, a bus-keep state, a pull-up state and a pull-down state, in the presence of a driver tri-state control signal TS, the bus keeper and logic controller circuit further comprising: a tri-state control port for receiving the tri-state control signal (TS); a logic controller connected to the tri-state control port; a first inverter having its input electrically connected to the tri-state control port and to the logic controller; a second inverter having its input electrically connected to the driver output pad (PAD) and having its inverting output connected to the receiver and a logic controller input; and a keeper circuit block connected to the tri-state control port, the logic controller, the first and second inverters and the driver output node to switch PAD in the presence of TS.