Patent ID: 8750054

Claim:
A data input/output circuit comprising: an amplification unit configured to generate a data signal by amplifying data of a first input/output line coupled to a bank during a read operation, and generate a driving signal by amplifying data of a second input/output line coupled to a data input/output pad during a write operation; a read driving unit configured to drive the second input/output line in response to the data signal during the read operation; and a write driving unit configured to drive the first input/output line in response to the driving signal during the write operation, wherein the amplification unit comprises a data input section configured to receive the data of the first input/output line and drive first and second nodes during the read operation, and receive the data of the second input/output line and drive the first and second nodes during the write operation, and a signal generation section configured to differentially amplify signals of the first and second nodes to generate the data signal during the read operation and the driving signal during the write operation.