Patent ID: 8431951

Claim:
A laminate leadless carrier package comprising: an optoelectronic chip; a substrate supporting the optoelectronic chip, the substrate comprising a plurality of conductive and dielectric layers laminated together including a bottom conductive layer, a top conductive layer, and a dielectric layer between the top and bottom conductive layers; a plurality of conductive slotted vias providing electrical connections between the top conductive layer and the bottom conductive layer; a wire bond pad positioned on the top surface of the substrate; a wire bond coupled to the optoelectronic chip and the wire bond pad; an encapsulation covering the optoelectronic chip, the wire bond, and at least a portion of the top surface of the substrate, wherein the encapsulation is a molding compound; and wherein the laminate leadless carrier package is arranged to be mounted in a side-looker configuration on a printed circuit board, wherein the active area of the optoelectronic chip is perpendicular to the printed circuit board, and the slotted vias are arranged to be in electrical contact with the brinted circuit board.