Patent ID: 7249207

Claim:
An integrated circuit chip for a digital data device, comprising: a plurality of functional component modules; a central interconnect module; a respective communications bus corresponding to each of said plurality of functional component modules, each respective communications bus connecting the corresponding functional component module with said central interconnect module, each respective communications bus employing a common architectural protocol which does not dictate a data alignment, said communications buses and said central interconnect module forming a plurality of communications paths between respective different pairs of said plurality of functional component modules, each of said plurality of communications paths comprising a communications bus corresponding to a first functional component module of a respective one of said pairs of said plurality of functional component modules, said central interconnect module, and a communications bus corresponding to a second functional component module of the respective pair of functional component modules; wherein a respective data alignment boundary corresponds to each said functional component module, wherein data sent and received by each functional component module on a communications bus corresponding to the respective functional component module is aligned on the data alignment boundary corresponding to the respective functional component module; wherein, for at least one misaligned pair of said plurality of pairs of functional component modules, the alignment boundary corresponding to a first functional component module of the misaligned pair is different from the alignment boundary corresponding to a second functional component module of the misaligned pair; and wherein said central interconnect module includes data alignment logic aligning each data transmission traversing the central interconnect module along a communications path of said plurality of communications paths along a respective alignment boundary corresponding to the functional component module receiving the data transmission.