Patent ID: 7956402

Claim:
A memory cell, comprising: a first dielectric material formed on a semiconductor substrate; a floating gate, comprising: a first polysilicon material formed above the first dielectric material, wherein the first polysilicon material is a p-type doped polysilicon material having a dopant concentration of 10 15 to 10 20 atoms/cm 3 ; a second polysilicon material above the first polysilicon material, wherein the second polysilicon material is an n-type doped polysilicon material having a dopant concentration of 10 18 to 10 21 atoms/cm 3 ; a second dielectric material formed above the second polysilicon material; a control gate formed above the second dielectric material; and a source and a drain formed in the substrate; wherein the first polysilicon material extends from the source to the drain and the second polysilicon material extends from the source to the drain.