Patent ID: 7026865

Claim:
An arrangement including an analog amplifier having an input port for receiving a first signal and a test input port for receiving test signal, the analog amplifier further comprising a control input port and an output port, the analog amplifier responsive to a first and a second condition present at the control input port, such that when the first condition is present at the control input port, the output port is operably connected to the input port and when the second condition is present at the control input port the output port is operably connected to the test input port; a load device operably connected to the output port and selectively connectable to a first voltage; a transistor having a first, a second and a third terminal, the first terminal selectively connectable to the input port, the second terminal operably connected to the output port and the load device; and a tail current sink transistor operably connected to the third terminal and having a terminal selectively connectable to a biasing voltage, such that when the first condition is present at the control input port, biasing voltage is supplied to the terminal of the tail current transistor, the load device is connected to the first voltage and the first terminal is connected to the input port, and when the second condition is present at the control input port, biasing voltage is not supplied to the terminal of the tail current transistor, the load device is not connected to the input port and the first terminal is disconnected from the input port.