Patent ID: 8076765

Claim:
A semiconductor package, comprising: a substrate including an upper surface, a lower surface, and a lateral surface disposed adjacent to a periphery of the substrate and extending between the upper surface and the lower surface of the substrate; connecting elements disposed adjacent to the periphery of the substrate and extending upwardly from the upper surface of the substrate, at least one of the connecting elements having an upper end; and a package body disposed adjacent to the upper surface of the substrate, the package body including an upper surface and a lateral surface, the lateral surface of the package body being substantially aligned with the lateral surface of the substrate, the package body defining openings disposed adjacent to the upper surface of the package body, the openings at least partially exposing respective ones of the connecting elements; wherein the openings partially expose respective ones of the connecting elements to define covered portions and uncovered portions of the connecting elements, the at least one of the connecting elements having an uncovered portion that extends to a first location on the at least one of the connecting elements that is closer to the substrate than to the upper end of the at least one of the connecting elements.