Patent ID: 8022456

Claim:
A transistor comprising: a semiconductor die; a plurality of transistor segments organized into a plurality of sections, each transistor segment having a length and a width, the length being substantially greater than the width, the transistor segments of each section being arranged in a side-by-side relationship along the width, each transistor segment including: a pillar of a semiconductor material that extends in a vertical direction, the pillar having a source region disposed near a top surface, of the semiconductor die, an extended drain region, and a body region that vertically separates the source and extended drain regions; first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions, the first and second field plates being fully insulated from the extended drain region, the first field plate being laterally surrounded by the pillar, and the second field plate laterally surrounding the pillar; the sections being arranged in rows and columns substantially across the semiconductor die, adjacent sections in a row or a column being oriented such that the length of the transistor segments in a first one of the adjacent sections extends in a first direction, and the length of the transistor segments in a second one of the adjacent sections extends in a second direction, the first direction being substantially orthogonal to the second direction.