Patent ID: 8223562

Claim:
A method for page read in an integrated circuit which includes a memory device, a clock signal and a plurality of pins, the method comprising: transmitting a first page read address to the memory device using a first input pin and a second input pin concurrently, the first page read address being associated with a location in the memory device; transferring data from the memory device using a first output pin and a second output pin concurrently, the data being associated with the first page read address in the memory device; transmitting a second page read address to the memory device using the first input pin and the second input pin concurrently, while continuing to transfer the data associated with the first page read address from the memory device using the first output pin, and the second output pin concurrently; and transferring data associated with the second page read address from the memory device using the first output pin and the second output pin concurrently.