Patent ID: 7119612

Claim:
An instrumentation amplifier comprising: a first differential pair of PMOS transistors coupled to receive first and second input signals at first and second input terminals, the first differential pair having common source terminals being biased by a first bias current, the drain terminal of the first PMOS transistor in the first differential pair being coupled to a first node and the drain terminal of the second PMOS transistor in the first differential pair being coupled to a second node; a second differential pair of PMOS transistors coupled to receive third and fourth input signals at third and fourth input terminals, the second differential pair having common source terminals being biased by a second bias current, the drain terminal of the first PMOS transistor in the second differential pair being coupled to the first node and the drain terminal of the second PMOS transistor in the second differential pair being coupled to the second node; a first diode connected NMOS transistor having gate and drain terminals coupled to the first node and a source terminal coupled to a first power supply voltage; and a second diode connected NMOS transistor having gate and drain terminals coupled to the second node and a source terminal coupled to the first power supply voltage, wherein the difference between the first and second input signals forms a first input voltage and the difference between the third and fourth input signals forms a second input voltage, the first node provides a first differential output voltage and the second node provides a second differential output voltage such that the first and second differential output voltages are indicative of a difference between the first input voltage and the second input voltage.