Patent ID: 6961871

Claim:
A system for use in testing a circuit having embedded test controllers therein in an ATE environment having a tester for connection to said circuit, said system comprising: means for generating a test program including: means for reading an embedded test controller access data file, a test controller diagnosis data file containing signatures and vector data for use in diagnosing test failures down to a failing module, and a test configuration data file defining one or more test steps respecting one or more test controllers embedded in said circuit; means for generating test pattern data derived from said access data file for each of said one or more test steps and said one or more embedded test controllers specified in said test configuration data file; means for generating an ATE independent sequence of instructions for loading said test stimulus data into a device under test, performing a capture operation and extracting response data from said device; means for translating said ATE tester independent sequence of instructions into a tester specific sequence of instructions; means for loading said tester specific sequence of instructions into said tester for execution.