Patent ID: 8141010

Claim:
A non-transitory computer-readable medium comprising computer-executable instructions thereon for performing a plurality of steps for implementing an abstraction used in designing an integrated circuit design, the steps comprising: creating a first implementation set forming a container of net-list entities of the integrated circuit design, wherein the first implementation set has a first hierarchy and the net-list entities, when not contained by the first implementation set, has a hierarchical format that is independent of, and different from, the first hierarchy; maintaining the hierarchical format during a design implementation flow process that uses the first implementation set; generating a second implementation set forming another container of the net-list entities of the integrated circuit design, wherein the second implementation set has a second hierarchy that is different from the first hierarchy and that is independent of, and different from, the hierarchical format of the net-list entities; using the first implementation set having the first hierarchy within a first implementation tool of the design implementation flow process; and using the second implementation set within a second implementation tool of the design implementation flow process.