Patent ID: 7696910

Claim:
A dither circuit comprising: a dither generating circuit generating a plurality of complementary signal pairs; and a dither input circuit generating a plurality of pairs of dither signals from the plurality of complementary signal pairs to add the generated dither signals to an analog input signal, wherein the plurality of complementary signal pairs have different frequencies with each other, the dither input circuit includes capacitors provided for each of the plurality of complementary signal pairs and a plurality of switch pairs including first and second switches having one terminals connected to each one terminal of the capacitors, and the other terminals of the capacitors are connected to an adding point to the analog input signal, the first switch supplies ones of the complementary signal pairs to one terminals of the capacitors when a clock signal is in effective state, and the second switch supplies the others of the complementary signal pairs to one terminals of the capacitors when an inverting clock signal of the clock signal is in effective state.