Patent ID: 7590869

Claim:
A tamper resistant microprocessor package, comprising: a plurality of processors capable of executing programs in parallel; and a single bus interface unit connected with all of the plurality of processors through an internal bus and having: a common key table shared by all of the plurality of processors, configured to store keys corresponding to the programs; and a single encryption/decryption processing unit provided with respect to all of the plurality of processors, and connected with the common key table, wherein the single encryption/decryption processing unit is configured to, in response to a memory reading request from a first currently executed program, read out a requested memory data from an external memory outside the tamper resistant microprocessor package and decrypt the requested memory data by using a first key corresponding to the first currently executed program and also stored in the single key table, and the single encryption/decryption processing unit is also configured to, in response to a memory writing request from a second currently executed program, encrypt a non-encrypted data to be written into the external memory by using a second key corresponding to the second currently executed program and also stored in the single key table and transfer encrypted data to the external memory.