Patent ID: 8595423

Claim:
A method of arranging data within a block of a solid state memory device, wherein the block comprises a plurality of word lines and a plurality of memory cells of the word lines, the word lines comprising bottom edge word lines, top edge word lines, and intermediate word lines between the bottom and top edge word lines, the method comprising: storing a portion of data to memory cells of the intermediate word lines prior to storing any of the data to memory cells of the top edge word lines or the bottom edge word lines, wherein the top edge word lines are 2 to 5 word lines and the bottom edge word lines are 2 to 5 word lines; and after storing the portion of the data to the memory cells of the intermediate word lines, storing a remainder of the data to memory cells of at least one of the top or bottom edge word lines, wherein storing the remainder comprises storing at least a portion of the remainder of the data to memory cells of a top edge word line closest to the intermediate word lines prior to storing any of the remainder of the data to any other word line of the top edge word lines.