Patent ID: 8184027

Claim:
A differential amplifier circuit comprising: capacitor mismatch error cancellation circuitry; a differential amplifier operably coupled to the capacitor mismatch error cancellation circuitry, the capacitor mismatch error cancellation circuitry comprising a first pair of capacitors, a second pair of capacitors, and a switching network; wherein the switching network is arranged to operate in a first configuration wherein the first pair of capacitors is operably coupled to differential inputs of the differential amplifier such that the first pair of capacitors sample input voltage signals present on the differential inputs, and each capacitor of the second pair of capacitors is operably coupled within a feedback loop between an output and an input of the differential amplifier; wherein the switching network is further arranged to operate in a second configuration wherein each capacitor of the first pair of capacitors is operably coupled within a feedback loop between an output and an input of the differential amplifier such that the differential amplifier is set to output signals representative of the sampled input voltage signals, and the second pair of capacitors is operably coupled in parallel between outputs of the differential amplifier such that the second pair of capacitors sample the voltage difference between the outputs.