Patent ID: 8743258

Claim:
A correlated double sampling (CDS) circuit comprising: a signal compressor which compresses each of a pixel signal and a ramp signal using capacitive dividing and outputs a compressed pixel signal and a compressed ramp signal; and a comparator which compares the compressed pixel signal with the compressed ramp signal and outputs a comparative signal corresponding to a comparison result, wherein the signal compressor comprises: a plurality of first capacitors; a plurality of second capacitors; and a switch arrangement which, in response to a switch control signal, at least one of: connects the plurality of first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the plurality of second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the plurality of first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the plurality of second capacitors in parallel between the ramp signal output node and a second input node of the comparator.