Patent ID: 7161230

Claim:
An insulated gate bipolar transistor comprising: a P-type collector region containing a P-type impurity; an N-type buffer region formed on said P-type collector region; an N-type base region formed on said N-type buffer region and having a lower impurity concentration than said N-type buffer region; a P-type base region formed in a surface region of said N-type base region; an N-type emitter region formed in a surface region of said N-type base region; and an anti-diffusion region formed between said P-type collector region and said N-type buffer region in such a way as to prevent diffusion of said P-type impurity of said P-type collector region; wherein said N-type buffer region ( 12 ) has a thickness of 2 μm to 10 μm or less and an impurity concentration of 5×10 17 cm −3 or higher.