Patent ID: 7776691

Claim:
A manufacturing method for semiconductor memory device comprising; a process for forming sequentially a first oxide film and a first nitride film on a semiconductor substrate; a process for removing said first oxide film and said nitride film in an element isolating region and forming subsequently a concavity on said semiconductor substrate in an element forming region; a process for removing the edge of said first oxide film in said element forming region by cleaning or wet etching to overhang said first nitride film over said first oxide film; a process for forming a first insulating film to include a lower density part having a lower film density than other parts in the side part of said first oxide film in said element forming region and said element isolating region; a process for planarizing said first insulating film to the extent that said nitride is exposed; a process for removing said first oxide film and said first nitride film to expose said surface of said semiconductor substrate in said element forming region; a process for forming a gate insulating film on the exposed surface of said semiconductor substrate: a process for forming a gate electrode on said gate insulating film and said first insulating film; a process for forming a first diffusion region and a second diffusion region on both sides of said gate insulating film of said semiconductor substrate; a process for removing a predetermined amount of said first insulating film not being covered with said gate electrode to expose said lower density part; a process for eroding said lower density part by cleaning or wet etching to form a hole in said first insulating film; and a process for forming a charge storage film in said hole.