Patent ID: 8358684

Claim:
A demodulation circuit, comprising: a first error calculation section configured to calculate a first error in a post-equalization signal in accordance with a blind method; a second error calculation section configured to calculate a second error in the post-equalization signal in accordance with a decision-directed method; a update section configured to update a filter coefficient for a first filter and a filter coefficient for a second filter based on the first or second error, the first filter subjecting an input signal to filtering to generate a first signal that is used to generate the post-equalization signal, the second filter subjecting a signal representing a hard decision value for the post-equalization signal to filtering to generate a second signal that is used to generate the post-equalization signal; a control section configured to, in a case where said update section is performing the update of the filter coefficients for the first and second filters based on the second error, control the update of the filter coefficients for the first and second filters based on the first error, when an averaged mean square error of the second error has exceeded a first threshold; and a generation section configured to generate the post-equalization signal based on the first and second signals.