Patent ID: 7890722

Claim:
A method for executing a compound synchronization operation (CSO), comprising: identifying, by a processor executing the CSO, a first memory location and a second memory location specified by the CSO in a plurality of memory locations, wherein the first memory location and the second memory location are within a single memory; locking the first memory location according to a fixed total order of the plurality of memory locations, wherein locking the first memory location comprises generating a copy of a cache line in the single memory comprising the first memory location and storing the copy in a single cache associated with the processor; determining, by the processor executing the CSO, that the second memory location is invalid after locking the first memory location; fetching, by the processor executing the CSO, an existing value from the first memory location in the single cache after determining that the second memory location is invalid; comparing, by the processor executing the CSO, the existing value with a test value specified by the CSO, wherein the existing value does not equal the test value; identifying, by the processor executing the CSO, a first new value specified by the CSO, wherein the first new value is for storage in the first memory location; replacing, by the processor executing the CSO, the first new value with the existing value in response to the existing value not equaling the test value; unlocking the first memory location without signaling a fault associated with the second memory location, after comparing the existing value and the test value; and terminating the CSO.