Patent ID: 7056800

Claim:
A method for fabricating a plurality of capacitors embedded in a printed circuit structure, comprising: fabricating a foil comprising a first electrode layer, a second electrode layer, a crystallized dielectric oxide layer disposed between the first electrode layer and the second electrode layer, and a high temperature anti-oxidation barrier between and contacting the crystallized dielectric oxide layer and at least one of the first and second electrode layers, wherein the crystallized dielectric oxide layer is less than 1 micron thick and has a capacitive density greater than 1000 pF/mm 2 ; adhering the first electrode layer of le foil to a printed circuit sub-substrate; selectively removing portions of the second electrode layer to form a top electrode of each of the plurality of capacitors and to form exposed portions of the crystallized dielectric oxide layer; selectively removing portions of the crystallized dielectric oxide layer within the exposed portions thereof to form exposed portions of the first electrode layer; and selectively removing portions of the first electrode layer within exposed portions thereof to form a bottom electrode of each of the plurality of capacitors; wherein an essentially coextensive portion of the high temperature anti-oxidation barrier is simultaneously removed with one of the first and second electrode layers.