Patent ID: 8604536

Claim:
A semiconductor device comprising: a memory cell transistor including a first lower insulating film provided on a semiconductor substrate, a first intermediate insulating film provided on the first lower insulating film, a first upper insulating film provided on the first intermediate insulating film, and a first gate electrode provided on the first upper insulating film; and a select transistor including a second lower insulating film provided on the semiconductor substrate and formed of same insulating material film as that of the first lower insulating film, a second intermediate insulating film provided on the second lower insulating film, a second upper insulating film provided on the second intermediate insulating film and formed of same insulating material film as that of the first upper insulating film, and a second gate electrode provided on the second upper insulating film and formed of same conductive material film as that of the first gate electrode, wherein the first and second intermediate insulating films are formed of silicon oxynitride, and a trap density of the second intermediate insulating film is lower than that of the first intermediate insulating film.