Patent ID: 7193599

Claim:
A liquid crystal display comprising: a liquid crystal panel including a plurality of pixel rows, a plurality of data lines for transmitting data voltages to the pixel rows, a plurality of gate lines for transmitting gate signals to the pixel rows; a signal controller for generating a control signal for controlling timing of the gate signals; a data driver for providing the data voltages for the pixel rows through the data lines under control of the signal controller; and a gate driver for providing the gate signals to the pixel rows in sequence through the gate lines based on the control signal of the signal controller, wherein the pixel rows includes a plurality of pairs of first and second pixel rows adjacent to each other, sequentially arranged in a data voltage moving direction, and supplied with the data voltages having different polarities, the gate signals include first and second gate signals respectively applied to the first and the second pixel rows, and pulse widths of the second gate signals are increased by first modulation times, the first modulation times falling between a minimum value capable of compensating the charging time of pixels in the second pixel rows and a maximum value capable of preventing the inversion of transverse stripes.