Patent ID: 6853684

Claim:
A method for computing a ZDSV of a stream of channel-bit symbols, comprising the steps of: (1) fetching the current channel-bit symbol, and then, based on a starting logic voltage state of an NRZI signal, determining a PDSV and an ODD of a current channel-bit symbol; (2) assigning the current channel-bit symbol PDSV as a previous start-to-channel-bit symbol ZDSV, and assigning the current channel-bit symbol ODD as a previous start-to-channel-bit symbol ODD; (3) selecting one of a plurality of merge-bit symbols, and then, based on the starting logic voltage state of the NRZI signal, determining a PDSV and an ODD of the selected merge-bit symbol; (4) based on the previous start-to-channel-bit symbol ODD and the current merge-bit symbol ODD, determining a current start-to-merge-bit ODD and a current start-to-merge-bit ZDSV; (5) fetching a next channel-bit symbol as the current channel-bit symbol, and then, based on the starting logic voltage state of the NRZI signal, determining a PDSV and an ODD of this channel-bit symbol; (6) performing an XOR operation on current start-to-merge-bit ODD and the current symbol ODD to thereby obtain the current start-to-channel-bit ODD, and also determining the current start-to-channel-bit ZDSV based on the current start-to-merge-bit ZDSV and the channel-bit symbol PDSV; and (7) assigning the current start-to-channel-bit ZDSV as the previous start-to-channel-bit symbol ZDSV, assigning the current start-to-channel-bit ODD as the previous start-to-channel-bit symbol ODD, and then jumping to step (3) for a next merge-bit symbol.