Patent ID: 6842806

Claim:
A bridge apparatus for connecting a first multimaster bus I 2 C environment to a second multimaster bus I 2 C environment, comprising: an address bitmap having a value associated with each possible I 2 C address; a port-A interface that is connected to, and receives address signals and data signals from, the first multimaster bus, buffers the received address signals and data signals and generates new data signals on the first multimaster bus; a port-B interface independent from the port-A interface that is connected to, and generates new address signals and data signals on, the second multimaster bus and receives data signals from the second mulimaster bus; and a controller that is connected to the port-A interface and to the port-B interface and responds to buffered address and data received in the port-A interface from the first multimaster bus by controlling the port-B interface to selectively generate on the second multimaster bus new address and data signals corresponding to the received address and data depending on the address bitmap value associated with the received address.