Patent ID: 7068123

Claim:
A single-pole double-throw switch comprising an input line portion and two output line portions connected to said input line portion at a branch point and defining with said input line portion two propagation channels for electromagnetic signals reaching said branch point via said input line portion, wherein each output line portion includes an identical two-state electronic component constituting either a substantially open circuit or a substantially short circuit as a function of the application of an appropriate common, same command, said component being always in one of said two states in the absence of said common, same command, and wherein both said two identical electronic components are always simultaneously in a same one of said two states, and are disposed in series and in parallel with said two output line portions, respectively, said switch having an asymmetrical structure, said two propagation channels differing in their configuration and/or in the parity of their electrical length, expressed in quarter-wavelengths, between said components and said branch point, so that, regardless of said same state, said open circuit or said short circuit, of said components, one of said two channels always is open for electromagnetic signals and the other channel always is closed for electromagnetic signals, wherein one of said electronic components is disposed in series with one of said two output line portions, and the other of said electronic components is disposed in parallel with the other of said output line portions and the following conditions are satisfied: L AB must be equal to an integer multiple of a half-wavelength; L AC must be equal to an odd integer multiple of a quarter-wavelength; L CD must be equal to an integer multiple of a half-wavelength; where: A is the branch point between input line portion/output line portions; B is the input point of series component; C is the branch point between output line portion/shunt line portion at level of the line portion comprising said parallel component; and; D is the input point of said parallel component.