Patent ID: 8885671

Claim:
A system for compensating for periodic noise in a time interleaved system having a plurality of phases of interest, the system comprising: a master clock path configured to receive an input clock and to output an output clock, each of the input clock and the output clock having periodically occurring interleaving periods, each interleaving period comprising a plurality of timeslots corresponding to the plurality of phases of interest of the time interleaved system; a detection circuit configured to receive the input clock and the output clock for each timeslot, and to detect periodic noise in the output clock introduced by the master clock path by comparing the received input clock and the received output clock; and an actuator circuit comprising a first controllable delay element configured to introduce delay of the input clock in the master clock path and to adjust an amount of the delay of the input clock, compensating for the periodic noise detected by the detection circuit for each timeslot.