Patent ID: 7185213

Claim:
A method for Packet Triggered Power Management (PTPM) using a Peripheral Component Interconnect (PCI) traditional level triggered PM mechanism in a computer system, the computer system including a PCI level triggered Power Management Event (PME) controller and a PCI PTPM Root Complex, the method comprising: converting a plurality of PM_PME packets generated by the PTPM PCI Root Complex into a Pseudo-PME signal, a first PM_PME packet of the plurality of PM_PME packets asserting the Pseudo-PME signal so that a voltage of Pseudo-PME signal changes from a first level to a second level; providing a Pseudo-PME line electrically connected to a PME input of the PCIPME controller and the PCI PTPM Root Complex for transmitting the Pseudo-PME signal to the PCI PME controller, the PME input receiving PME signals generated by other PCI-compliant level triggered devices through a PCI Bus of the computer system; and de-asserting the Pseudo-PME signal so that the voltage of the Pseudo-PME signal changes from the second level to the first level, the de-assertion of the Pseudo-PME signal following the assertion of the Pseudo-PME signal by a predetermined time interval; wherein the first level and the second level of the voltage of the Pseudo-PME signal are PCI-compliant with the level triggered PME controller.