Patent ID: 7710379

Claim:
A display device which performs a line sequential drive comprising: source signal lines divided into first to n-th (n is an integer of 2 or more) groups to which a control signal for each pixel is outputted; a shift register for outputting a sampling pulse according to a clock signal and a start pulse in sequence, having dummy stages; a first latch circuit for sampling and holding a video signal according to the sampling pulse; and second latch circuits divided into first to n-th (n is an integer of 2 or more) groups; and first to n-th (n is an integer of 2 or more) signal paths for inputting first to n-th latch pulses to the first to n-th groups of the second latch circuits based on the held video signal at different timing, respectively for controlling a charge and discharge timing of the first to n-th groups into which the source signal lines are divided based on the held video signal according to the first to n-th latch pulses, respectively, wherein a first n source signal lines each belonging to corresponding one of the first to n-th groups into which the source signal lines are divided are arranged and a second n source signal lines each belonging to corresponding one of the first to n-th groups into which the source signal lines are divided are arranged next to the first n source signal lines, wherein the charge or discharge timing of the first to n-th groups into which the source signal lines are divided is set so that one of the first to n-th groups of the source signal lines is charged or discharged after the others of the first to n-th groups of the source signal lines are charged or discharged completely, and wherein latch pulses for driving the second latch circuits are outputted from the dummy stages of the shift register.