Patent ID: 8135933

Claim:
An adaptive memory system for improving the performance of an external computing device, wherein the adaptive memory system includes: a single controller; a first memory type; a second memory type; a third memory type; an internal bus system; and an external bus interface; wherein the single controller is communicatively coupled to the first memory type, the second memory type, and the third memory type via the internal bus system; wherein the single controller is communicatively coupled to the external computing device via the external bus interface; wherein the single controller separates the internal bus system from the external bus interface; and wherein the single controller is configured to: communicate with all three memory types using the internal bus system; communicate with the external computing device using the external bus interface; and allocate cache-data storage assignment to a storage space within the first memory type, and after the storage space within the first memory type is determined to be full, allocate cache-data storage assignment to a storage space within the second memory type.