Patent ID: 8522176

Claim:
A computer-implemented method for recording a trace of call frames during a simulation of a circuit design with a testbench, wherein the testbench comprises a plurality of subroutines, wherein each subroutine of the plurality of subroutines comprises a code section, the method comprising using a computer to perform steps of: (a) for each subroutine of the plurality of subroutines, providing a first call-back routine which is called before the code section of the subroutine is executed; (b) starting the simulation of the circuit design with the testbench; (c) for each subroutine of plurality of subroutines, recording a first simulation time at which a corresponding first call-back routine of the subroutine is executed, a first tag indicating a beginning of the subroutine, and a first subroutine ID to identify the subroutine in a beginning call frame when the corresponding first call-back routine is called, and wherein the trace of call frames is formed according to an order of the call-back routines that are called one by one during an execution of the testbench at their respective simulation times.