Patent ID: 8255743

Claim:
A method, comprising: performing a first computation by a first computing platform, executing a first copy of a program, in coordination with a second computing platform performing a second computation, executing a second copy of the same program; receiving by the first computing platform, an observation of one or more variables taken at a cut of the second computation performed on the second computing platform; detecting by the first computing platform, one or more errors of the second computation, based at least in part on the observation of the one or more variables received, and based at least in part on one or more variables taken at a corresponding cut of the first computation; determining one or more corrective actions to correct the one or more detected errors; and providing to the second computing platform, instructions about the one or more corrective actions, wherein providing comprises providing one or more instructions on a corrective action to correct a detected error, wherein the corrective action includes insertion of one or more instructions into the second computation at a location before or after an instruction of the second copy of the program is executed at a faulty hardware execution unit of the second computing platform, or at a location before or after a result of an instruction of the second copy of the program is stored into a faulty register of the second computing platform, wherein the hardware execution unit includes at least one of an arithmetic logic unit, an adder, or a multiplier.