Patent ID: 7768129

Claim:
Subtractive method of manufacturing a metal interconnects structure on a substrate using a metal etching process, comprising the steps of: depositing a dielectric layer above the substrate; depositing a stop layer above the dielectric layer, the stop layer exhibiting a lower etch rate compared to an etch rate of the dielectric layer using the metal etching process; depositing a first resist layer above the stop layer; patterning the first resist layer according to a first desired pattern; etching the stop layer through the patterned first resist layer; after etching the stop layer, removing the patterned first resist layer; etching the dielectric layer for forming contact or via holes using the patterned stop layer as a hard mask; depositing a metal layer above the stop layer; depositing a second resist layer above the metal layer; patterning the second resist layer according to a second desired pattern; and etching the metal layer through the patterned second resist layer up to the stop layer.