Patent ID: 7725638

Claim:
An application processor circuit, following Secure Digital (SD) compatible interface protocols and configurable to perform both a host function and a slave function, the application processor circuit comprising: a SD bus interface logic for connection to an SD bus, for generating SD interface signals defined by the SD-compatible interface protocols; a system bus interface logic for connection to a system bus, for performing a system bus interface function; a data buffer, connected between the SD bus interface logic and the system bus interface logic, for adjusting a data transfer rate difference between the SD bus interface logic and the system bus interface logic; a data buffer controller, connected to the data buffer, for controlling access to the data buffer; a configuration unit for configuring the circuit to perform the host function or the slave function; wherein the SD bus interface logic includes: a command agent for performing Cyclic Redundancy Check (CRC) generation and check, serial-parallel conversion of command signals, and generating and checking a starting bit and an ending bit of the command signals; a plurality of data agents each corresponding to a data line for performing CRC generation and check, serial-parallel conversion of data signals, and generating and checking a starting bit and an ending bit in the data signals; and a clock controller for driving clock signals on the SD bus when the application processor circuit performs the host function and for feeding the clock signals on the SD bus to the application processor circuit when the application processor circuit performs the slave function, and wherein the clock controller is used to perform one or more of division, gating, inversion and shaping of the clock on the SD bus; and a state machine, connected to the SD bus interface logic, that operates in a host mode and in a slave mode depending on the configuration of the application processor circuit, and controls the command agent and the plurality of data agents.