Patent ID: 7216183

Claim:
A method for facilitating read completion in a computer system supporting write posting operations, comprising the steps of: associating one or more bus masters with respective tags, wherein the bus masters reside on one side of a bus bridge; buffering posted memory writes and the tags associated with the corresponding bus masters that originate the posted memory writes; detecting a read request that originates on the opposite side of the bus bridge; identifying which bus master is addressed by the read request; assigning a destination tag to the read request contingent upon the currently addressed bus master; comparing the destination tag of the read request with the associated tags of the posted memory writes being buffered; if the destination tag of the read request does not match any associated tags of the posted memory writes being buffered, completing the read request directly; and if the destination tag of the read request matches at least one of the associated tags of the posted memory writes being buffered, suspending the read request until the posted memory writes are flushed.