Patent ID: 7482852

Claim:
An inductor-less local oscillator (LO) buffer comprising: a differential amplifier receiving a first component of the LO input signal on its positive input terminal and a second component of the LO input signal on its negative input terminal; a first transistor having a gate, a source, and a drain, wherein the gate is connected to a negative output terminal of the differential amplifier, and wherein the drain is connected to a positive LO output terminal of the LO buffer; a second transistor having a gate, a source, and a drain, wherein the gate is connected to a positive output terminal of the differential amplifier, and wherein the drain is connected to a negative LO output terminal of the LO buffer; a first current source connected between a first voltage source and the sources of the first and second transistors; a third transistor having a gate, a source, and a drain, wherein the source is connected to a second voltage source, and wherein the drain is connected to the positive LO output terminal; a fourth transistor having a gate, a source, and a drain, wherein the source is connected to the second voltage source, and wherein the drain is connected to the negative LO output terminal; a first resistor connected between the positive LO output terminal and a first node; a second resistor connected between the negative LO output terminal and the first node; a capacitor connected between the gates of the third and fourth transistors and the first node; a first operational amplifier having an output terminal connected to the gates of the third and fourth transistors, a positive input terminal connected to the first node, and a negative input terminal; a second operational amplifier having an output terminal connected to the negative input terminal of the first operational amplifier, a positive input terminal connected to predetermined voltage, and a negative input terminal; a second current source connected between the first voltage source and the negative input terminal of the second operational amplifier; and a native transistor having a gate connected to the output terminal of the second operational amplifier, a source connected to the negative input terminal of the second operational amplifier, and a drain connected to the second voltage source.