Patent ID: 7761692

Claim:
A compiling apparatus for converting a source code of a program notated in a high-level language into an object code, said compiling apparatus comprising: a storage device; an assembler code generating portion for generating, from the source code, an assembler code sequence including a plurality of assembler codes, each of the plurality of assembler codes having an execution condition field designating a register to be accessed and a parallel execution boundary field designating an assembler code group including at least one assembler code of the plurality of assembler codes to be executed in parallel; an instruction scheduling portion for modifying the assembler code sequence to include a first assembler code group including at least two assembler codes to be executed in parallel to set a value on a parallel execution boundary field of an assembler code included in the first assembler code group therein, the first assembler code group including a first assembler code and a second assembler code such that a value determined in response to a flag stored in a register designated by an execution condition field of the first assembler code designates one of true or false and a value determined in response to a flag stored in a register designated by an execution condition field of the second assembler code designates the other one of true or false, where the number of assembler codes included in the first assembler code group is greater than the number of at least one executing unit included in a target processor; and an object code generating portion for converting the modified assembler code sequence modified by the instruction scheduling portion to the object code and for outputting the object code as a file to the storage device, wherein the first assembler code and the second assembler code are assigned to a same execution unit in the target processor.