Patent ID: 7430502

Claim:
A system for proactively simulating a processor performance state in a processor without receiving a processor temperature signal comprising: a data structure stored in a memory, the date structure being configured to store an address of a GPIO (general purpose input output) block and a set of bit patterns that may be written to the GPIO block, where the GPIO block is configured to control a thermal management signal that can be provided to the processor, and a logic operably connected to the memory, the logic being configured: to receive a request to establish a desired processor performance state in the processor, where the request is generated in response to a forward looking analysis of a number of instructions per second to be required by the processor, and where the request is received from an operating system that does not have true processor states available; to select a bit pattern, the bit pattern being selected from the set of bit patterns, and to write the bit pattern to the GPIO (General Purpose Input Output) block to control a frequency and a voltage at which the processor is to operate without performing processor throttling.