Patent ID: 7567630

Claim:
A data processing system, comprising: a first data processing device, including: a) a first receive data input unit for inputting a first receive data stream into the data processing device; b) at least one second receive data input unit for inputting at least one second receive data stream into the data processing device; c) a clock recovery unit for recovering a first clock signal from at least one of the first receive data stream and the at least one second receive data stream; d) a control unit for controlling the clock recovery unit as a function of one of the first receive data stream and the at least one second receive data stream; and e) a first delay unit for delaying the at least one second receive data stream with respect to the first receive data stream in such a way that the first receive data stream is synchronized with the at least one second receive data stream; and a second data processing device connected in series with the first data processing device and including: a) a third receive data input unit for inputting a third receive data stream into the data processing device; b) at least one fourth receive data input unit for inputting at least one fourth receive data stream into the data processing device; and c) a second clock recovery unit for recovering a second clock signal from at least one of the third receive data stream and the at least one fourth receive data stream; d) a second control unit for controlling the second clock recovery unit as a function of one of the third receive data stream and the at least one fourth receive data stream; and e) a second delay unit for delaying the at least one fourth receive data stream with respect to the third receive data stream in such a way that the third receive data stream is synchronized with the at least one fourth receive data stream.