Patent ID: 8775879

Claim:
A method for transmitting data between a timing controller and a source driver, the method having a bit error rate test (BERT) function, the method comprising the steps of: (a) transmitting in a normal mode, wherein a clock training step of synchronizing clocks between the timing controller and the source driver, a step of sequentially transmitting a control start packet CTR_START, control packets CTR1 and CTR2, and a data start packet DATA_START for configuration setup of the source driver, and a step of transmitting a data packet RGB DATA are included as one cycle; (b) transmitting in BERT ready mode, wherein logic states of the control start packet and the data start packet in the normal mode are changed and transmitted by first and second BERT packets; (c) transmitting in a BERT operation mode, wherein the control packets are disregarded by the first BERT packet in the BERT ready mode, and a pseudo random binary sequence (PRBS) instead of the data packet is transmitted by the second BERT packet; and (d) comparing the PRBS and a bit stream set in the source driver, and sensing a bit error rate, wherein, in the normal mode, the control start packet comprises control start bits indicating that a next packet is a control packet, and remaining reserved bits, and wherein, in the BERT ready mode, the first BERT packet changes a logic state of the control start bits in the control start packet to another logic state, and utilizes a part of the reserved bits as bits for controlling the BERT operation mode.