Patent ID: 8767756

Claim:
A switch on a chip providing Fibre Channel switching comprising: a plurality of switch ports, at least one of the switch ports configured to couple to at least one Fibre Channel node and communicate with the Fibre Channel node using Fibre Channel signaling; a serializer/deserializer (SERDES) circuitry coupled to the at least one switch port, the SERDES including a transmission terminal and a receive terminal, wherein the SERDES circuitry is configured to receive serial data and de-multiplex the serial data into aligned characters and recover a receive clock from the data, and multiplex outgoing characters into a transmit data stream; an elasticity buffer memory coupled to the at least one switch port, the elasticity buffer memory configured to compensate for differences between a receive data rate and a transmit data rate on the at least one switch port; a crossbar switch coupled to the at least one switch port, wherein the crossbar switch is configured to selectively couple switch ports on the switch to pass a received Fibre Channel data frame between switch ports on the switch and to direct communications to a second switch when a switch port is remote; a memory including a routing table coupled to the at least one switch port that includes mapping between addresses of nodes and their associated switching ports, wherein the routing table determines a location of a destination node for routing Fibre Channel data frames including whether the destination node is local or remote on the second switch; and a management logic residing on the switch that is configured to provide fairness of access to destination nodes based on attempts to establish communication with the destination node.