Patent ID: 6975001

Claim:
A semiconductor device, comprising: (a) a semiconductor layer formed on an electrically insulating layer; (b) a gate insulating film formed on said semiconductor layer; (c) a gate electrode formed on said gate insulating film; and (d) a field insulating film formed on said semiconductor layer for defining a region in which a semiconductor device is to be fabricated, said semiconductor layer including: (a1) source and drain regions formed in said semiconductor layer around said gate electrode, said source and drain regions containing first electrically conductive type impurity; (a2) a body contact region formed in said semiconductor layer, said body contact region containing second electrically conductive type impurity; and (a3) a carrier path region formed in said semiconductor layer and horizontally separated from said source and drain regions by a buffer zone such that said carrier path region does not make contact with said source and drain regions, but makes contact with said body contact region, said carrier path region containing second electrically conductive type impurity, wherein said buffer zone is formed between said source and drain regions and said carrier path region, and wherein said carrier path region, said buffer zone, and said source and drain regions are arranged in the same height.