Patent ID: 7391842

Claim:
A clock signal generator comprising: input circuitry for receiving a frequency control input signal and a clock signal and generating a memory address therefrom; a memory for storing digital data indexed by said memory address and representing real and imaginary parts of a complex digital waveform; digital to analog conversion circuitry comprising: real-part digital to analog conversion circuitry for converting digital data retrieved from the memory and representing the real part of the complex waveform into a real-part analog signal; and imaginary-part digital to analog conversion circuitry for converting digital data retrieved from the memory and representing the imaginary part of the complex waveform into an imaginary-part analog signal; an analog filtering circuitry comprising: real-part filtering circuitry for filtering the real-part analog signal to generate a filtered real-part analog signal; and imaginary-part filtering circuitry for filtering the imaginary-part analog signal to generate a filtered imaginary-part analog signal; and analog to digital conversion circuitry for converting the filtered real-part and imaginary-part analog signals into a digital clock signal at a rate near an integer multiple of a frequency of the filtered real-part and imaginary-part analog signals.