Patent ID: 8402288

Claim:
A method for controlling voltage level and clock signal frequency supplied to a system, the method comprising: providing at least one output signal to multiple estimated circuits; providing at least one input signal to multiple reference circuits representative of a behavior of the multiple estimated circuits, whereas at least one estimated circuit comprises transistors of multiple types; wherein each of the multiple reference circuits represents a behavior of a single type of transistor, the multiple reference circuits belong to a hardware module that is coupled to the multiple estimated circuits, transistors of different types differ from each other by at least one characteristic out of: a threshold voltage and an amount of current driven by the transistor; monitoring a behavior of the multiple reference circuits in response to the at least one input signal; determining a characteristic of at least one output signal provided to the multiple estimated circuits; and increasing the voltage level and the clock signal frequency if only a single reference circuit of the multiple reference circuits indicates that the voltage level and the clock signal frequency should be increased based on the characteristic of the at least one output signal; decreasing the voltage level and the clock signal frequency if all reference circuits indicate that the voltage level and the clock signal frequency can be decreased based on the characteristic of the at least one output signal.