Patent ID: 7023091

Claim:
A semiconductor integrated circuit device comprising: a first buried wiring formed in the interior of a first wiring groove formed in a first insulating film, wherein the first buried wiring includes first and second ends in a width direction; a second insulating film formed in a layer overlying the first insulating film; a third insulating film formed in a layer overlying the second insulating film; a second buried wiring formed in the interior of a second wiring groove formed in the third insulating film; and a first plug formed in the interior of a first hole formed in the second insulating film to connect the first buried wiring and the second buried wiring electrically with each other, wherein a first position at which the first plug and the first buried wiring are connected with each other is positioned so that the first position is not over the center of the first buried wiring in the width direction of the first buried wiring, and is closer to one of the first and second ends than to the other of the first and second ends of the first buried wiring when viewed in a plane view, and wherein the first position is positioned at a center portion in the width direction of the second buried wiring in a plane view.