Patent ID: 6849531

Claim:
A method of defining a conductive gate structure for a metal oxide semiconductor field effect transistor (MOSFET) device on a semiconductor substrate, comprising the steps of: providing a gate insulator layer on said semiconductor substrate; forming a conductive layer on said gate insulator layer; forming a capping insulator layer on said conductive layer, forming a dielectric anti-reflective coating (DARC) layer on said capping insulator layer; forming a patterned photoresist shape on said DARC layer; performing a first phase of a first dry etch procedure using said photoresist shape as an etch mask to define a first stack comprised of said photoresist shape and a DARC shape; performing a second phase of said first dry etch procedure using said photoresist shape as an etch mask to define a capping insulator shape underlying said first stack; removing said photoresist shape resulting in a second stack comprised of said DARC shape and said capping insulator shape; performing a second dry etch procedure using said second stack as an etch mask to define a conductive gate structure and to remove said DARC shape; and performing a wet etch procedure to remove portions of said gate insulator layer not covered by said conductive gate structure and to remove said capping insulator layer.