Patent ID: 7816790

Claim:
A semiconductor device comprising: a semiconductor substrate; a plurality of low dielectric film wiring line laminated structure portions which are provided in regions on the semiconductor substrate except peripheral portions thereof, each of the low dielectric film wiring line laminated structure portions comprising a laminated structure of a plurality of low dielectric films and a plurality of wiring lines including an uppermost wiring line having first connection pad portions; an insulating film provided on an upper side of each of the low dielectric film wiring line laminated structure portions; a plurality of second connection pad portions for electrodes, which are arranged on the insulating films and electrically connected to the corresponding first connection pad portions of the uppermost wiring lines of the low dielectric film wiring line laminated structure portions; a plurality of bump electrodes for external connection, provided on the second connection pad portions for the electrodes; and a sealing film provided on each insulating film and on each peripheral portion of the semiconductor substrate, wherein the sealing film covers side surfaces of the bump electrodes, and side surfaces of a structure including the low dielectric film wiring line laminated structure portions and the insulating films.