Patent ID: 7788573

Claim:
A fault detection method for detecting, within a semiconductor device, a fault in a delay chain that is provided within the semiconductor device and is made up of a plurality of delay parts that are each formed by a plurality of delay cells, comprising: a first judging step judging whether or not a fault of a first specific delay cell within a first delay part exists when testing the first specific delay cell, by detecting a first relative delay time between input and output signals of the first specific delay cell, and processing the first relative delay time at a timing based on an output of a delay cell within a second delay part that is provided at a stage preceding or subsequent to the first delay part; and a second judging step judging whether or not a fault of a second specific delay cell within the second delay part exists when testing the second specific delay cell, by detecting a second relative delay time between input and output signals of the second specific delay cell, and processing the second relative delay time at a timing based on an output of a delay cell within the first delay part.