Patent ID: 7826276

Claim:
A non-volatile memory device comprising: a memory cell array with a plurality of memory cells; an input/output buffer having a storage unit that stores data and indicator bits representing information regarding the data; a data scanning unit that receives the stored data from the input/output buffer in units of scanning, and that scans the received data, the scanned data being programmed in the memory cells according to a result of scanning the data; and a control logic unit that controls the stored data in the input/output buffer in units of scanning to be selectively supplied to the data scanning unit based on states of the indicator bits, wherein the storage unit of the input/output buffer includes, a first storage unit that stores the data, and a second storage unit that stores the indicator bits, and the first storage unit includes first through m th data storage units that store the data in units of scanning, where m is an integer equal to or greater than 1, and the second storage unit includes first through m th indicator bit storage units which respectively correspond to the first through m th data storage units.