Patent ID: 8103852

Claim:
A method of processing instructions, comprising: fetching, by a fetch unit, instructions from a memory store to provide fetched instructions; decoding, by a decode unit, the fetched instructions into decoded instructions and determining which of the decoded instructions are vector scalar unit (VSU) store instructions; grouping, by the decode unit, VSU store instructions into internal operation (IOP) groups wherein each IOP group includes a group of VSU store instructions; dual dispatching, by the dispatch unit, VSU store instructions into a bifurcated unified issue queue (BUIQ) that includes a first unified issue queue and a second unified issue queue; and storing, by the BUIQ, a same VSU store instruction from the group of VSU store instructions in both the first unified issue queue and the second unified issue queue, the BUIQ storing the same VSU instruction in the first unified issue queue along with data dependency information, the BUIQ storing the same VSU instruction in the second unified issue queue along with address dependency information, such that the first unified issue queue and the second unified issue queue independently manage data dependencies and address dependencies, respectively.