Patent ID: 6865693

Claim:
A debugging circuit capable of transmitting a debugging signal through a multiprocessor computer, comprising: a debug port; a plurality of microprocessor sockets, each of said microprocessor sockets adapted to receive a microprocessor; a plurality of switches, each of said plurality of switches is associated with a respective one of said plurality of microprocessor sockets, wherein each switch includes: a first input to the switch, wherein the first input receives either (a) the debugging signal transmitted from the previous switch or, (b) if there is not a previous switch, the debugging signal from the debug port; a second input to the switch coupled to the associated microprocessor socket and operable to receive a debugging signal transmitted through a microprocessor, if present, in the associated microprocessor socket; and a third input coupled to the associated microprocessor socket, wherein the third input receives a logic signal from the associated microprocessor socket that is indicative of whether the associated microprocessor socket is populated by a microprocessor; wherein the first input is passed by the switch and the second input is not passed by the switch if the logic signal of the third input indicates that the associated microprocessor socket is not populated by a microprocessor, and wherein the second input is passed by the switch and the first input is not passed by the switch if the logic signal of the third input indicates that the associated microprocessor socket is populated by a microprocessor.