Patent ID: 7646219

Claim:
An integrated circuit including a translator circuit for translating from a lower logic-level voltage range signal to a higher logic-level voltage range signal, said translator circuit comprising: a differential input stage comprising a first and a second input transistor coupled to receive at least a first input signal that defines said lower voltage range signal; a voltage follower comprising first and second follower transistors, an output of said first and second input transistors coupled to inputs of said first and said second follower transistors, respectively; a switching circuit coupled to receive outputs from said first and second follower transistors comprising a first and a second control node, wherein said switching circuit comprises a first positive feedback loop comprising a first internal feedback transistor that reinforces a signal level at said first control node and a second positive feedback loop comprising a second internal feedback transistor that reinforces a signal level at said second control node, and an output stage having at least one input coupled to receive at least one output signal from said switching circuit and provide at least one translated output supplying said higher logic-level voltage range signal.