Patent ID: 7082168

Claim:
A method of generating a self-inverting turbo code interleaver from an existing non-self-inverting turbo code interleaver specification, comprising: identifying a plurality of original cycles of the non-self-inverting turbo code interleaver specification, said original cycles specifying a mapping of an input bit position to a respective output bit position for raw data bits to be coded, where the last bit identified in each cycle is mapped to an output position corresponding to the first bit in said original cycle; breaking up each original cycle containing more than two bits into new cycles, each new cycle containing one pair of bits, said pair of bits for each successive cycle being taken from successive pairs of bits of said original cycle beginning with the first bit in each cycle, wherein each original cycle having an odd number of bits provides: (i) at least one new cycle containing a pair of bits; and (ii) one new cycle having a single bit; wherein said new cycles define the mapping between the input and output bit positions for said self-inverting turbo code interleaver.