Patent ID: 7368320

Claim:
A method of fabricating a semiconductor die assembly, comprising: providing a lead frame including a die paddle having diametrically opposed tabs secured to a peripheral frame element, each tab extending from a central portion of a laterally peripheral edge of the die paddle, and lead fingers, wherein all of the lead fingers are located laterally adjacent only a single edge of a lateral periphery of the die paddle; providing a first and a second semiconductor die of substantially identical size and shape comprising bond pads in a bond pad arrangement, wherein the bond pad arrangement locates all of the bond pads of each of the first semiconductor die and the second semiconductor die adjacent a single edge of a lateral periphery thereof; securing the first semiconductor die by an active surface thereof to one side of the die paddle with the bond pads thereof adjacent portions of the lead fingers proximal to the die paddle; forming wire bonds between bond pads of the first semiconductor die and proximal portions of lead fingers; securing the second semiconductor die by a back side thereof to another, opposing side of the die paddle with the bond pads thereof adjacent portions of the lead fingers proximal to the die paddle; and forming wire bonds between bond pads of the second semiconductor die and proximal portions of lead fingers.