Patent ID: 7659752

Claim:
A noise filter circuit, comprising: a noise removing circuit having a first delay circuit configured to delay an input signal for a first delay time such that the noise removing circuit removes from the input signal a noise signal with a time duration shorter than the first delay time; a second delay circuit configured to delay a clock signal for a second delay time, wherein the clock signal oscillates with a constant frequency independent from the input signal, and the second delay time is a half of the first delay time; and a flip-flop triggered by the delayed clock signal to hold an output signal of the noise removing circuit for at least one cycle of the delayed clock signal, wherein the first and second delay times are set so as to remove from the output signal of the noise removing circuit a noise signal which had a time duration at least as long as the first delay time and was not removed by the noise removing circuit and to restore at least some of a signal length of an input signal lost in the noise removing circuit.