Patent ID: 8044713

Claim:
A receiving circuit for receiving an amplitude shift keying signal, the receiving circuit comprising: a first transmission element configured to divide an in-phase input signal and a quadrature-phase input signal into a plurality of output signals at a plurality of outputs; a summator configured to determine an amplitude as a sum of a plurality of summands; and an evaluation logic connectable to the summator and the first transmission element, wherein the first transmission element is configured to output an exponent signal as an output signal with a value of a base 2 exponent at an exponent output of the plurality of outputs, wherein the first transmission element is configured to output an exponent removed in-phase signal at an in-phase output and an exponent-removed quadrature-phase signal at a quadrature-phase output of the plurality of outputs, and wherein the evaluation logic is configured to determine the plurality of summands from the exponent signal from the exponent-removed in-phase signal and from the exponent-removed quadrature-phase signal.