Patent ID: 8546226

Claim:
A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory cell comprising: forming a pad oxide layer and a first hard mask layer sequentially stacked on a substrate, wherein the pad oxide layer is directly in contact with the substrate; etching through the pad oxide layer and the first hard mask layer, so as to form an opening exposing a portion of the substrate; forming an oxide-nitride-oxide (ONO) layer on the first hard mask and the exposed portion of the substrate; forming a second hard mask layer on the ONO layer; performing a chemical mechanical polishing (CMP) by using the first hard mask as a polishing stop layer; removing the first hard mask layer; and removing the remaining second hard mask layer and the pad oxide layer, so as to form an ONO structure with a size substantially less than or equal to the opening to coincide with the portion of the substrate exposed by the opening, wherein the ONO structure is directly in contact with the exposed portion of the substrate.