Patent ID: 8513957

Claim:
A method for implementing dynamic voltage sensing comprising: providing a first quiet oscillator generating a reference clock, providing a second noisy oscillator generating a noisy clock; matching a frequency of the first quiet oscillator and the second noisy oscillator; using the reference clock, driving a first predefined-bit shift register; using the noisy clock, driving a second predefined-bit shift register, said second predefined-bit shift register being greater than the first predefined-bit shift register; evaluating the contents of said second predefined-bit shift register responsive to an overflow of said first predefined-bit shift register; and comparing the contents of said second predefined-bit shift register with a noise threshold select value to identify a noise event and trigger a noise detector control output using a pair of multiple input multiplexers connected to selected latches of said second predefined-bit shift register and applying a noise threshold select input to the multiple input multiplexers control the sensitivity of the noise event detection; said comparing for identifying said noise event based upon a selected amplitude of noise or a duration of noise for a specific period of time or a combination said selected amplitude of noise and said duration of noise for said specific period of time.