Patent ID: 6919265

Claim:
A method of fabricating a semiconductor device, comprising: forming a first conductive layer including a first conductive pattern, the first conductive layer extending in a first plane, the first conductive pattern being oriented to conduct an electric signal in a direction parallel to the first plane; forming a first conductive member disposed at least partly on the first conductive layer, the first conductive member having a first height, the first conductive member making contact with the first conductive pattern and being oriented to conduct said electric signal in a direction orthogonal to the first plane; forming a second conductive member disposed at least partly on the first conductive member, the second conductive member having a second height, the second conductive member making contact with the first conductive member and being oriented to conduct said electric signal in said direction orthogonal to the first plane; forming a second conductive layer including a second conductive pattern in a second plane parallel to the first plane the second conductive layer being disposed at least partly on the second conductive member, the second conductive pattern making contact with the second conductive member and being oriented to conduct said electric signal in a direction parallel to the second plane; and forming a dielectric film separating the first conductive layer from the second conductive layer, the dielectric film having a thickness greater than the first height and greater than the second height; wherein the first conductive member and the second conductive member extend for mutually different distances in at least one direction parallel to the first conductive layer and the second conductive layer.