Patent ID: 7902933

Claim:
A method for generating a negative resistance on startup of an oscillator, the method comprising: generating an input oscillatory signal from a resonator; compensating for a loss in the input oscillatory signal with an amplifier; providing an amplifier output to the resonator and a buffer amplifier; and outputting a clock signal from the buffer amplifier to a state machine of a control unit and substantially simultaneously outputting a regulating signal from a comparator to the state machine of the control unit; wherein the state machine regulates load capacitance to a value below a capacitance threshold at startup by; detecting oscillation amplitude of the input oscillatory signal; unmasking one or more decoder capacitors from an array of detector capacitors when the detected oscillation amplitude is above an amplitude threshold; controlling a time delay between unmasking individual decoder capacitors; and disabling said unmasking the individual decoder capacitors when the detected oscillation amplitude is below the amplitude threshold.