Patent ID: 8669140

Claim:
A method of making a semiconductor device, the method comprising: providing a first semiconductor die having opposing first and second faces and at least one conductive frame member proximate the first semiconductor die comprising a via insulating material and opposing first and second faces, the first semiconductor die having at least one contact at the second face thereof, the at least one conductive frame member having at least one conductive via exposed at the second face thereof and extending into the via insulating material toward the first face thereof; forming a first encapsulation layer to embed the first faces of the first semiconductor die and the at least one conductive frame member; forming a first redistribution layer on the second faces of the first semiconductor die and the at least one conductive frame member, the first redistribution layer including a first non-conductive redistribution material surrounding an array of first redistribution conductors respectively electrically connected to the at least one conductive via and the at least one contact; thinning the at least one conductive frame member at the first face thereof to expose the at least one conductive via at a side opposite to the first redistribution layer; forming a second redistribution layer on the first faces of the at least one conductive frame member and the first semiconductor die, the second redistribution layer including a second non-conductive redistribution material surrounding at least one second redistribution conductor, electrically connected to the at least one conductive via, and a plurality of grid array receptor pads; mounting a second semiconductor die having opposing first and second faces to the second redistribution layer such that a ball grid array (BGA) on the second face of the second semiconductor die is electrically connected to the plurality of grid array receptor pads in the second redistribution layer; mounting a third semiconductor die having first and second faces to the first face of the second semiconductor die; wire bonding the third semiconductor die to the at least one second redistribution conductor; and forming a second encapsulation layer on the second redistribution layer to embed the second semiconductor die, the third semiconductor die, the wires, and the at least one second redistribution conductor.