Patent ID: 7329585

Claim:
A method of manufacturing a semiconductor device, comprising: (a) simultaneously forming a capacitor and a first resistor on a semiconductor substrate, by: (a-1) sequentially depositing a metal film, a barrier film, a dielectric film, a conductive material film, and an etch-stop layer; (a-2) selectively patterning the etch-stop layer, the conductive material film and the dielectric film to form a capacitor pattern and a first resistor pattern; and (a-3) selectively patterning the barrier film and the metal film by a photolithography process and an etch process, thus forming a metal wiring; (b) forming a first interlayer insulating film on the semiconductor substrate in which the capacitor and the first resistor are formed; (c) forming a plurality of first via plugs that are electrically connected to the capacitor and the resistor, and a first metal wiring that is electrically connected to the first via plugs, in the first interlayer insulating film; (d) forming a second resistor on the first metal wiring; and (e) forming a second interlayer insulating film on the semiconductor substrate in which the second resistor is formed, and then forming a plurality of second via plugs that are electrically connected to the first metal wiring and the second resistor, and a second metal wiring that is electrically connected to the second via plug.