Patent ID: 7750448

Claim:
A semiconductor package comprising: a plate-shaped semiconductor device having a gate electrode provided at a midsection of a first main surface, an emitter electrode provided around the gate electrode on the first main surface, and a collector electrode provided on a second main surface; a plate-shaped first electrode plate having a protruding portion which is provided on one of surfaces facing the first main surface and which abuts against at least part of the emitter electrode, a through-hole formed at a center of the protruding portion, a pedestal portion which forms part of an inner peripheral surface of the through-hole and which is provided on the other surface side, a communication path formed in the protruding portion and extending from the through-hole up to an outer side surface of the protruding portion, and a plurality of opening portions formed in the outer side surface of the protruding portion; a wiring substrate stacked between the semiconductor device and the first electrode plate, formed like a plate which can be sandwiched, and having an intrusion opening portion into which the protruding portion is intruded, a projecting portion whose base end is provided on an inner peripheral surface of the intrusion opening portion, whose tip is positioned within the through-hole and held on the pedestal portion, and which extends through the communicating path, a control electrode provided on the tip of the projecting portion and electrically connected to the gate electrode, and a plurality of engaging portions which are formed in the inner peripheral surface of the intrusion opening portion and engaged with said plurality of opening portions and whose tips are positioned inside the outer side surface of the protruding portion; and a plate-shaped second electrode whose one main surface is electrically connected to the collector electrode.