Patent ID: 7879661

Claim:
A method for fabricating a semiconductor device of a dual-gate structure comprising a P-channel type field-effect transistor formed at a first region of a substrate and an N-channel type field-effect transistor formed at a second region of the substrate, said method comprising the steps of: continuously forming a polycrystalline silicon film on the substrate to cover the first and second regions; implanting a P-type impurity into a part of the polycrystalline silicon film located on the first region, thereby forming a P-type part; implanting an N-type impurity into a part of the polycrystalline silicon film located on the second region and coming into contact with the P-type part, thereby forming an N-type part; forming a metal film on the polycrystalline silicon film; and forming a metal silicide film by siliciding the metal film, wherein the difference in thickness between the P-type part and the N-type part is produced by the implantation of the P-type impurity and the implantation of the N-type impurity, and said method further comprises the step of, before the step of forming the metal silicide layer, normally tapering an end part of the P-type part located above the N-type part and at the interface between the P-type part and the N-type part of the polycrystalline silicon film.