Patent ID: 7064407

Claim:
A JFET controlled Schottky diode comprising: a semiconductor layer of N-type conductivity; a first region of N-type conductivity formed in the semiconductor layer, the first region being lightly doped and forming the cathode region of the Schottky diode; a second region of N-type conductivity formed in the semiconductor layer, the second region being heavily doped and being electrically coupled to the first region through the semiconductor layer and one or more diffusion regions formed in the semiconductor layer, the second region forming the cathode terminal of the Schottky diode where a forward current path of the Schottky diode is formed between the first region and the second region; a barrier metal electrode formed on the top surface of the semiconductor layer and above the first region, the barrier metal electrode being in ohmic contact with the first region and thereby forming a Schottky junction with the first region, the barrier metal electrode forming the anode terminal of the Schottky diode; a third region of P-type conductivity formed in the semiconductor layer and enclosing a portion of the forward current path of the Schottky diode between the first region and the second region, the third region forming the gate of the JFET and the enclosed portion of the forward current path forming the channel region of the JFET; and a first metal electrode formed on the top surface of the semiconductor layer and electrically coupled to the third region, the first metal electrode forming a gate terminal of the JFET, wherein the forward current path of the Schottky diode is put in a conducting state by the application of a voltage to the gate terminal relative to the anode terminal that is equal to or greater than the pinch-off voltage of the JFET and the forward current path of the Schottky diode is put in a non-conducting state by the application of a voltage to the gate terminal relative to the anode terminal that is less than the pinch-off voltage of the JFET.