Patent ID: 7403150

Claim:
A circuit comprising: a switched capacitor circuit structure to receive an input voltage signal and at least one reference voltage signal; and a comparator device array coupled to the switched capacitor circuit structure; said comparator device array further comprising a plurality of comparator devices coupled in parallel, each respective comparator device having a pair of inputs coupled to said switched capacitor circuit structure to receive a voltage output signal from said switched capacitor circuit, a voltage value of said voltage output signal being calculated as a difference between an input voltage value of said input voltage signal and a predetermined value of said at least one reference voltage signal, which is dependent on a position of said each respective comparator device within said comparator device array, wherein each comparator device receives an identical common mode voltage input irrespective of said position within said comparator device array, wherein said identical common mode voltage input is calculated as (V INP +V INN )/2, wherein V INP is a positive differential input voltage value of said input voltage signal and V INN is a negative differential input voltage value of said input voltage signal.