Patent ID: 6878989

Claim:
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a semiconductor layer provided on the semiconductor substrate; a trench extending in a depth direction toward the semiconductor substrate from a surface of the semiconductor layer; a first region of the first conductivity type formed in the depth direction on and along a side of the trench in the semiconductor layer, a bottom of the first region contacting the semiconductor substrate; a second region of the first conductivity type formed in a surface area of the semiconductor layer and close to the side of the trench, the second region being positioned above the first region and contacting the first region, the second region being a region different from the first region; a third region of the second conductivity type formed in the surface area of the semiconductor layer; a fourth region of the first conductivity type formed in a surface area of the third region; and a gate electrode provided on a surface of the third region between the second region and the fourth region, a gate insulation film being interposed between the gate electrode and the second region.