Patent ID: 8533528

Claim:
A system, comprising: a computing blade comprising: a plurality of subsystems comprising a central processing unit (CPU) subsystem, a memory subsystem, an input/output (I/O) subsystem, and a cache subsystem; a power switch coupled to each subsystem; a slave power sequencer coupled to each subsystem; and a master power sequencer coupled to: each of said slave power sequencers; and each of said power switches; wherein upon a slave power sequencer identifying a fault at its associated subsystem, said master power sequencer determines whether to provide power to any other subsystem; wherein said master power sequencer is configured to send a signal to each of said power switches indicating whether to provide power to said subsystem associated with each of said power switches; and wherein said fault comprises excess thermal stress on a hardware component of the associated subsystem, an over-current condition of a hardware component of the associated subsystem, an over- or under-voltage condition of a hardware component of the associated subsystem, or a physical device failure of a hardware component of the associated subsystem.