Patent ID: 7446690

Claim:
An apparatus for providing an analog-to-digital converter (ADC) in a programmable logic device (PLD) comprising: a plurality of input/output (I/O) blocks having a plurality of switching circuits and a plurality of comparators, wherein the plurality of I/O blocks provide the ADC; a sample and hold circuit coupled to the plurality of I/O blocks providing an analog input signal; a programming signal for selectively switching the plurality of switching circuits to provide the analog input signal to the plurality of comparators; a resistor network coupled to the plurality of switching circuits and comparators providing a first plurality of reference voltage signals, the plurality of comparators comparing the analog input signal to the first plurality of reference voltage signals and providing a plurality of discrete digital values; an encoder for converting the plurality of discrete digital values to a plurality of M bit digital values and providing the M bit digital values to the PLD for processing, and wherein the plurality of I/O blocks provide I/O functionality while an ADC mode is enabled in the plurality of I/O blocks.