Patent ID: 7341919

Claim:
A method of manufacturing a capacitor element, comprising the steps of: applying on a surface of a base material a base made of a resin whose coefficient of linear expansion is adjusted in accordance with a coefficient of linear expansion of a semiconductor element that is mounted on said capacitor element to fall within a range of 5 ppm/K to 30 ppm/K; forming vias in the base; forming a first conductive layer on a top surface of the base; patterning the first conductive layer so as to form terminals filling in the vias and lower electrodes extending to the top surface of the base; forming a dielectric layer on said lower electrodes; forming a second conductive layer on a top surface of the dielectric layer; and patterning the second conductive layer so as to form on the dielectric layer an upper electrode opposing said lower electrodes and so as to form a terminal having an exposed top surface.