Patent ID: 7609184

Claim:
A D-A conversion apparatus that outputs an analog output voltage according to digital input data, comprising: a capacitance array main D-A converter that supplies a main voltage according to the input data to an output terminal of the D-A conversion apparatus; a correction data output section that outputs correction data according to the input data; a capacitance array correction D-A converter that outputs a correction voltage according to the correction data; and a voltage dividing capacitor connected serially between an output end of the correction D-A converter and an output end of the main D-A converter, wherein the main D-A converter includes: a dummy capacitor having a first end thereof connected to a common potential; a plurality of parallel capacitors that is disposed to correspond to a plurality of bits of the input data, each parallel capacitor having a first end thereof connected to an output wire providing a connection between a second end of the dummy capacitor, which is not connected to the common potential, and the output end of the main D-A converter; a plurality of first switches that is disposed to correspond to the plurality of bits of the input data, each first switch connecting a second end of a corresponding parallel capacitor to one of a reference potential and the common potential according to a value of a corresponding bit: and one or more serial capacitors disposed on the output wire so as to be connected in series to each other, the plurality of parallel capacitors are arranged such that the parallel capacitors corresponding to higher bits are connected to the output wire closer to the output end of the main D-A converter, a particular parallel capacitor has a capacitance identical to a synthetic capacitance of one or more serial capacitors, the dummy capacitor, and one or more parallel capacitors that are connected to the output wire at positions of bits lower than the particular parallel capacitor, and two or three parallel capacitors are connected to the output wire between two adjacent serial capacitors, between the dummy capacitor and one of the serial capacitors, and between one of the serial capacitors and the output end of the main D-A converter.