Patent ID: 8198732

Claim:
A semiconductor device comprising: a first Cu wiring; an insulating film made of a low dielectric constant material having a smaller specific dielectric constant than SiO 2 and laminated on the first Cu wiring; a wiring trench including a trench portion dug in the insulating film from a surface thereof toward the first Cu wiring and a via hole reaching the first Cu wiring from a bottom surface of the trench portion; a first barrier film made of SiO 2 or SiCO having a larger film density than the insulating film, formed on entire side surfaces of the trench portion and the via hole; a second Cu wiring mainly composed of Cu embedded in the trench portion and the via hole; and a second barrier film made of a compound containing Si, O and a predetermined metallic element formed on inner surfaces of the trench portion and the via hole including a region located on the first barrier film, the second barrier film covering a surface of the second Cu wiring opposed to the trench portion and the via hole, wherein the second barrier film is arranged inside the wiring trench, a plurality of recesses are formed on a side surface of the wiring trench, and the first barrier film fills up the recesses.