Patent ID: 8207592

Claim:
A capacitor in an integrated circuit (“IC”) comprising: a first plurality of conductive crosses formed in a first conductive layer of the IC, each of the first plurality of conductive crosses being electrically connected to and forming a first portion of a first node of the capacitor; a second plurality of conductive crosses formed in the first conductive layer of the IC, each of the second plurality of conductive crosses being electrically connected to and forming a first portion of a second node of the capacitor and capacitively coupling to the first node; an interconnection layer formed in a second conductive layer of the IC separated from the first conductive layer by a dielectric layer of the IC, the interconnection layer having a first plurality of staggered interconnect traces connected to the first plurality of conductive crosses alternating with a second plurality of staggered interconnect traces connected to the second plurality of conductive crosses, each staggered interconnect trace having wider sections alternating with narrower sections; and a third conductive layer of the IC, the interconnection layer being between the third conductive layer and the first conductive layer, the third conductive layer having a third plurality of conductive crosses electrically connected to the first node through the first plurality of staggered interconnect traces and a fourth plurality of conductive crosses electrically connected to the second node through the second plurality of staggered interconnect traces.