Patent ID: 8350367

Claim:
A semiconductor device package, comprising: a substrate unit including: an upper surface, a lower surface, a lateral surface disposed adjacent to a periphery of the substrate unit, the lateral surface of the substrate unit being substantially planar and fully extending between the upper surface and the lower surface of the substrate unit, and a grounding element disposed adjacent to the periphery of the substrate unit, the grounding element corresponding to a remnant of a grounding via and including a connection surface that is electrically exposed adjacent to the lateral surface of the substrate unit; a semiconductor device disposed adjacent to the upper surface of the substrate unit and electrically connected to the substrate unit; a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device, the package body including exterior surfaces that include a lateral surface, the lateral surface of the package body being substantially co-planar with the lateral surface of the substrate unit; and an electromagnetic interference shield disposed adjacent to the exterior surfaces of the package body and electrically connected to the connection surface of the grounding element, the electromagnetic interference shield including a lateral portion that extends around the periphery of the substrate unit, and a lower end of the lateral portion is substantially co-planar with the lower surface of the substrate unit, wherein the grounding element provides an electrical pathway to ground electromagnetic emissions incident upon the electromagnetic interference shield.