Patent ID: 6963615

Claim:
A pixel modulation apparatus for converting pixel data D composed of N 1 bits input at a pixel period T 0 to a pixel data signal composed of one bit, comprising: a) a first data conversion unit which converts the pixel data D to pixel data D 1 expanded to N 2 bits (N 2 >N 1 ) at the period T 0 ; b) a second data conversion unit which converts the pixel data D 1 to pixel data D 2 composed of N 2 /m bits at a period T 0 /m; c) a third data conversion unit which inputs n bits from among the N 2 /m bits of pixel data D 2 and bits of delayed pixel data Dd 2 constituting pixel data D 2 of a period preceding a current T 0 /m period to execute logical sum operations a predetermined number (equal to or less than n) of times to convert the input n bits to pixel data D 3 composed of N 3 bits, including additional data corresponding to the predetermined number; and d) a fourth data conversion unit which converts the pixel data D 3 to the pixel data signal composed of one bit at the period T 0 /m.