Patent ID: 7986007

Claim:
A structure of a MOS transistor, comprising: a gate; a substrate, having a channel region, a first electrode region and a second electrode region, the channel region being located below the gate, the first electrode region and the second electrode region being set at two opposite sides of the channel region respectively; a first doped region, set in the first electrode region; and a second doped region, set in the second electrode region; wherein the first doped region and the channel region are separated by a first separated region, the second doped region and the channel region are separated by a second separated region, and at least one of the first separated region or the second separated region is void of a lightly doped electrode, such that a lightly doped electrode exists at most in only one of the first separated region or the second separated region, wherein the first separated region and the second separated region do not overlap with an outer perimeter of the gate.