Patent ID: 7332449

Claim:
A method for forming a damascene structure in a semiconductor device manufacturing process comprising the steps of: a dielectric layer on a substrate; providing a substrate comprising an uppermost first photoresist layer and a via opening extending through a thickness of a dielectric insulating layer to expose an underlying metal region; carrying out a first supercritical fluid treatment comprising supercritical carbon dioxide (CO 2 ) to remove the first photoresist layer; forming a resinous layer on the dielectric insulating layer to include filling the via opening; patterning a second photoresist layer on the resinous layer for etching a trench opening overlying the via opening; etching the trench opening; and, carrying out a second supercritical fluid treatment comprising supercritical CO 2 to remove the second photoresist layer and the resinous layer to form a dual damascene opening.