Patent ID: 8541284

Claim:
A method of manufacturing a semiconductor device, the method comprising: forming a plurality of preliminary strings spaced apart a first distance from each other on a substrate, each of the preliminary strings including a plurality of first preliminary gate structures spaced apart a second distance from each other between second preliminary gate structures, the first distance being greater than the second distance; forming a first insulation layer on the substrate to cover the first and second preliminary gate structures; forming an insulation layer structure on the first insulation layer, such that the insulation layer structure fills a space between the preliminary strings; forming a sacrificial layer pattern on the first insulation layer, such that the sacrificial layer pattern partially fills spaces between adjacent ones of the first and second preliminary gate structures; removing a portion of the first insulation layer not covered by the sacrificial layer pattern to form a first insulation layer pattern; reacting portions of the first and second preliminary gate structures not covered by the first insulation layer pattern with a conductive layer to form first and second gate structures, respectively; and forming a capping layer on the first and second gate structures, such that air gaps are formed between the first and second gate structures.