Patent ID: 7251159

Claim:
A system for storing data and reading the stored data, comprising: first and second memory cells that are operable to encode a bit of data having a value of 0 such that the voltage of the first memory cell is maintained at a first level and the voltage of the second memory cell is maintained at a second level, wherein the first voltage level is of opposite polarity to the second voltage level, and wherein the first and second memory cells are operable to encode a bit having a value of 1 such that the voltage of the first memory cell is maintained at a third level and the voltage of the second memory cell is maintained at a fourth level, wherein the third voltage level is of opposite polarity to the fourth voltage level; a differential sense amplifier operable to compare the voltage levels of the first and second memory cells and to output a bit value based on the comparison; and at least one single-ended sense amplifier operable to compare the voltage level of at least one of the first and second memory cells to a fixed reference voltage and to output a bit value based on the comparison.