Patent ID: 6870227

Claim:
A protective device against an electrostatic discharge for an integrated circuit arranged in a semiconductor substrate doped by a first doping type, comprising: a transistor diode arranged vertically to a surface of the semiconductor substrate in a surface field doped by a second doping type that is opposite to the first doping type, wherein: a base-emitter configuration of the transistor diode is mounted at the surface, and a collector of the transistor diode is developed as a buried layer doped by the second doping type; a connecting layer, wherein: the connecting layer is doped by the second doping type, the connecting layer is laterally displaced by a first distance from the transistor diode, the connecting layer is inserted in the surface field for contacting the buried layer so that, when the transistor diode is polarized in a blocking direction, a punch-through occurs at the connecting layer before a breakdown can occur between the surface field and the base-emitter configuration, and the connecting layer, on sides facing away from the surface, is completely surrounded by a region of the surface field having a lesser doping of the second doping type than the connecting layer so that a current path between the buried layer and the connecting layer continuously proceeds via the region; and a sink diffusion region inserted in the surface field and doped with the second doping type, the sink diffusion region overlapping the buried layer and reaching up to the surface, wherein: a second distance not equal to zero between the sink diffusion region and the connecting layer is dimensioned corresponding to a snap-back voltage of the transistor diode.