Patent ID: 8873283

Claim:
An integrated circuit device comprising: a three-terminal memory cell consisting essentially of an electrically floating body transistor, wherein the electrically floating body transistor consists essentially of: a source region coupled to an associated source line via a first of the three terminals; a drain region coupled to an associated bit line via a second of the three terminals; a body region disposed between the source region and the drain region, wherein the body region is electrically floating; a gate coupled to an associated word line via a third of the three terminals; and a gate dielectric which is disposed between the gate and the body region; wherein: the memory cell stores (i) a first data state which is representative of a first charge in the body region of the electrically floating body transistor, and (ii) a second data state which is representative of a second charge in the body region of the electrically floating body transistor, wherein the first charge is greater than the second charge; and the first charge in the body region of the electrically floating body transistor is substantially provided by majority carriers which accumulate in a portion of the electrically floating body region that is juxtaposed or near the gate dielectric; and data sense circuitry, coupled to the drain region of the electrically floating body transistor of the memory cell via the associated bit line, to sense the first data state and the second data state stored in the memory cell; wherein, in response to voltage transitions in read control signals applied to the gate and source region of the electrically floating body transistor of the memory cell via the associated word line and source line, respectively, when the first data state is stored in the memory cell, the electrically floating body transistor generates a read bipolar transistor current which is representative of the first data state, and wherein the data sense circuitry determines the first data state at least substantially based on the read bipolar transistor current generated by the electrically floating body transistor and represented on the associated bit line.