Patent ID: 6847240

Claim:
A power-on-reset (POR) circuit comprising: a first power-supply terminal receiving a first power-supply signal and a second power-supply terminal receiving a second power-supply signal, wherein applying power to the POR circuit produces a rising potential difference between the first and second power-supply terminals, the potential difference rising to a power-supply voltage over a power-us time; a band-gap reference circuit connected between the first and second power-supply terminals and having a band-gap-reference output terminal providing a band-gap-reference signal, wherein the band-gap-reference signal is substantially constant with variations in temperature and the power-supply voltage; a second reference circuit connected between the first and second power-supply terminals and having a second-reference-circuit output terminal providing a second reference signal, wherein the second reference signal is non-linear with respect to the rising potential difference; and a differential amplifier having a first differential-amplifier input terminal connected to the band-gap-reference output terminal and a second differential amplifier input terminal connected to the second-reference-circuit output terminal, wherein the second reference circuit includes a control terminal receiving a temperature-compensated control signal, and wherein the temperature-compensated control signal varies with changes in the temperature and is, after the power-up time, substantially constant with variations in the power-supply voltage, wherein the second reference circuit includes: a diode having first and second diode terminals; and a voltage divider having a first voltage-divider terminal connected to the first diode terminal, a second voltage-divider terminal connected to the second diode terminal, and an intermediate voltage-divider terminal providing the temperature-compensated control signal.