Patent ID: 8140823

Claim:
A method comprising: receiving a translation lookaside buffer (TLB) miss event associated with a first thread of a multithreaded processor; checking a TLB lock indicator, wherein the TLB lock indicator includes a bit stored at a control register; in response to the TLB lock indicator indicating an unlocked state, allowing access by the first thread to an exception handler associated with a TLB; and in response to the TLB lock indicator indicating a locked state: putting the first thread to sleep, wherein putting the first thread to sleep is performed by a sleep mode circuit in response to receiving a sleep instruction from a control circuit; transitioning the TLB lock indicator from the locked state to the unlocked state; and in response to the TLB lock indicator transitioning from the locked state to the unlocked state, replaying execution of a packet that caused the TLB miss event.