Patent ID: 8110470

Claim:
A method of fabricating a semiconductor device comprising: providing a semiconductor substrate having a buried insulator layer, wherein an upper portion of the substrate is above a top surface of the buried insulator layer and a lower portion is below a bottom surface of the buried insulator layer; providing a gate having first and second opposing gate sidewalls, the gate includes a first sidewall spacer on the second gate sidewall; and forming a recess in the substrate adjacent to the second gate sidewall with the first sidewall spacer, wherein the recess extends through to the lower portion of the substrate; selectively forming a semiconductor material in the recess to fill the recess; removing the first sidewall spacer from the second gate sidewall; forming second sidewall spacers on the first and second gate sidewalls; and forming a source adjacent to the first gate sidewall and a drain adjacent to the second gate sidewall, the source and drain are separated by a channel in the upper portion of the substrate below the gate, the source has a source depth at about the top surface of the buried insulator layer and the drain has a drain depth below the top surface of the buried insulator layer to provide different drain and source depths.