Patent ID: 8174108

Claim:
An integrated circuit package, comprising: an application specific integrated circuit having a first area on an active surface of a first wafer, the first wafer comprising a select semiconductor material and at least one through wafer via; a second wafer having a circuit surface coupled to the application specific integrated circuit, the circuit surface of the second wafer coupled to a circuit device that operates with a supply voltage that is different in voltage than an application specific integrated circuit supply voltage coupled to the application specific integrated circuit and a second supply voltage coupled to a supplemental-integrated circuit, the second wafer of the select semiconductor material having at least one window there through, the window sized to closely receive the supplemental-integrated circuit different from the application specific integrated circuit and having a second area different from the first area, the supplemental-integrated circuit further having a respective active surface arranged such that a first conductor on the respective active surface is in registration with a corresponding conductor of the application specific integrated circuit; and a package substrate coupled to the application specific integrated circuit by the at least one through wafer via.