Patent ID: 7917560

Claim:
A random number test circuit comprising: a shift register which operates based on a clock and which successively stores serial random numbers generated by a random number generation element, wherein a first random number being output from a predetermined stage of the shift register; a comparison circuit which compares the first random number with a second random number located at a distance of a first predetermined number of bits from the first random number, the second random number being generated by the random number generation element; a counter which counts a frequency of occurrence of equality between the first random number and the second random number, with respect to all bits in the serial random numbers; and a decision circuit which judges an article quality to be good if a count value x in the counter satisfies n ⁢ ⁢ ( α - δ + 1 ) 2 < x < n ⁢ ⁢ ( α + δ + 1 ) 2 , wherein n represents a number of the bits in the serial random numbers, and α and δ satisfy α = - 1 n - 1 ⁢ ⁢ and ⁢ ⁢ δ = 2 n - 1 ⁢ ⁢ n ⁢ ⁢ ( n - 3 ) n + 1 , respectively.