Patent ID: 7089450

Claim:
An apparatus comprising: an embedded control processor; a memory coupled to the embedded control processor; a recovery process residing in the memory and executed by the embedded control processor, the recovery process monitoring a plurality of processes residing in the memory and executed by the embedded control processor, at least one of the plurality of processes having a corresponding recovery policy that specifies whether the corresponding process may be recovered by the recovery process without affecting other of the plurality of processes, wherein the recovery policy comprises a recovery count, a recovery time, and a recovery action, wherein the recovery process recovers the corresponding process if the corresponding recovery policy specifies that the corresponding process may be recovered, the recovery process performing the steps of: reading the recovery count; reading the recovery time; if the recovery time is zero, determining whether the corresponding process has been recovered a number of times less than the recovery count since the last reset, and if so, the recovery process recovers the corresponding process; if the recovery time is greater than zero, determining whether the corresponding process has been recovered a number of times less than the recovery count in the time period specified by the recovery time, and if so, the recovery process recovers the corresponding process; if the recovery time is zero and if the corresponding process has been recovered the number of times specified in the recovery count since the last reset, resetting the apparatus; and if the recovery time is greater than zero and if the corresponding process has been recovered the number of times specified in the recovery count in the time period specified by the recovery time, resetting the apparatus.