Patent ID: 7600165

Claim:
A method for improving repairing efficiency in a non-volatile memory, said method comprising the steps of: reading repairing data from an information array associated with said non-volatile memory to a volatile latch array associated with said non-volatile memory, said information array sharing a read circuit with a main memory array comprising said non-volatile memory; enabling an error correction coding circuit separate from said information array during reading of said repairing data including corrupted repairing data located anywhere in said information array, said repairing data for identifying and repairing defective columns or rows comprising said main memory array despite corruption of the repairing data as read; providing a plurality of columns and rows associated with said non-volatile memory; associating each of said plurality of columns associated with said non-volatile memory with a respective I/O terminal; and using a (16,11) Hamming code to associate at least one spare column with at least two of each of said plurality of columns associated with both said non-volatile memory and with a respective I/O terminal.