Patent ID: 7057412

Claim:
A programmable logic resource comprising: an input/output (I/O) buffer that receives data from circuitry external to the programmable logic resource and generates a plurality of outputs; a crossbar switch that receives the plurality of outputs from the I/O buffer and generates a plurality of outputs, wherein the crossbar switch is configured to send at least one of the plurality of outputs from the I/O buffer to a corresponding one of the plurality of outputs of the crossbar switch; and an intellectual property block that receives the plurality of outputs of the crossbar switch for processing: wherein the programmable logic resource is embedded in a package having a plurality of pins through which the external circuitry sends data, the programmable logic resource having a plurality of I/O ports located along the periphery of the programmable logic resource, wherein at least one of the plurality of pins sends data to a nearest available one of the plurality of I/O ports such that the at least one pin corresponds to other than the nearest available I/O port.