Patent ID: 6846716

Claim:
A method of forming an integrated circuit device comprising: providing a semiconductor substrate having a first portion and a second portion; forming a gate stack comprising: a gate dielectric formed over the first portion of the semiconductor substrate; and a gate electrode formed over the gate dielectric; forming a first patterned anti-reflective coating (ARC) over the gate stack; forming a non-volatile memory stack comprising: a charge storage layer formed over the second portion of the semiconductor substrate; and a first dielectric layer formed over the charge storage layer; forming a second patterned ARC over the non-volatile memory stack; forming a second dielectric layer over the gate stack and the non-volatile memory stack; removing portions of the second dielectric layer to form first spacers adjacent the gate stack and the non-volatile memory stack; removing the first patterned ARC and the second patterned ARC after removing portions of the second dielectric layer; forming a first channel under the gate stack; and forming a second channel under the non-volatile memory stack.