Patent ID: 8179548

Claim:
An image processing apparatus, comprising: a scanner configured to scan an original into input image data; a memory configured to store image data generated from the input image data; and an image processor configured to apply image processing to the image data to generate a plurality of kinds of image data, wherein the image processor includes: a first input image processing circuit configured to apply first input image processing to the input image data to generate first processed image data, and to store encoded processed image data in the memory; a decoder configured to decode the encoded processed image data obtained from the memory into decoded image data; an output image processing circuit configured to apply output image processing to the decoded image data to generate output image data, and to output encoded output image data to be transferred through a network; an encoder configured to encode the first processed image data into the encoded processed image data, and the output image data into the encoded output image data; a first encoder memory controller coupled to the encoder and the first input image processing circuit and configured to output a first encoding request for requesting the encoder to encode the first processed image data; a second encoder memory controller coupled to the encoder and the output image processing circuit and configured to output a second encoding request for requesting the encoder to encode the output image data; and a first coordination circuit coupled to the first input image processing circuit, the output image processing circuit, the first encoder memory controller, the second encoder memory controller, and the encoder and configured to manage the first encoding request and the second encoding request to cause the encoder to encode the first processed image data and the output image data in an order previously determined when the first encoding request and the second encoding request are output substantially at the same time.