Patent ID: 7687854

Claim:
A transistor in a semiconductor device, comprising: a well formed by a first conductivity type impurity in an active region of a semiconductor substrate; a low-concentration impurity region formed by a second conductivity type impurity on the active region; a gate oxide film and a gate formed over a surface of the semiconductor substrate; an isolation region formed in the semiconductor substrate; a trench surrounded by the low-concentration impurity region; dielectric film spacers formed on both sidewalls of the gate and the trench; a high-concentration impurity region formed by the second conductivity type impurity at the bottom of the trench and the dielectric film spacers to form source/drain regions; and a drift junction formed in a portion of a channel region in the well by a same dopant type of impurity as an impurity of the well, wherein the high-concentration impurity region is formed to have a distance 1.0 μm to 2.0 μm, when the transistor stably operates at substantially 40 V, from a bottom surface of the gate oxide film in a vertical direction.