Patent ID: 7514329

Claim:
A method of fabricating a drain-extended MOS transistor, the method comprising: forming a first portion of a drift region of a first conductivity type in a semiconductor body, the first portion having a first depth and being located at a first lateral end of the drift region; providing dopants of a second conductivity type to a portion of the semiconductor body under the first portion of the drift region; forming a channel of the second conductivity type in the semiconductor body; forming a gate structure over the channel, the gate structure having first and second lateral ends, wherein the first lateral end of the gate structure extends at least partially over the first lateral end of drift region; forming a second portion of the drift region of the first conductivity type that is connected to the first portion of the drift region, the second portion having a second depth and being located at a second opposite lateral end of the drift region; forming a source of the first conductivity type proximate the second lateral end of the gate structure; and forming a drain of the first conductivity type connected to the second lateral end of the drift region in the semiconductor body, the drain being spaced laterally from the first end of the gate structure; wherein the first portion of the drift region comprises a first concentration of dopants of the first conductivity type at a given depth less than the second depth, wherein the second portion of the drift region comprises a second concentration of dopants of the first conductivity type at the given depth, and wherein the first concentration is greater than the second concentration.