Patent ID: 8427882

Claim:
A multiplexer, comprising: a first switching circuit that includes: a first control and bias stage configured to receive a supply voltage, first and second input voltage signals having respective values greater than the supply voltage, and first and second selection signals; and generate at least one first control and bias signal as a function of the first and second selection signals and of the first and second input voltage signals; and a first switching stage coupled to the first control and bias stage, the first switching stage having a first output terminal and being configured to receive the at least one first control and bias signal, place the first output terminal in a high impedance condition in response to the at least one first control and bias signal indicating that the first and second selection signals indicate the high impedance condition, and generate, on the first output terminal, an output signal substantially equal to: the first input voltage signal, in response to the at least one first control and bias signal indicating that the first and second selection signals indicate a selection of the first input voltage signal; and the second input voltage signal, the at least one first control and bias signal indicating that the first and second selection signals indicate a selection of the second input voltage signal.