Patent ID: 7411441

Claim:
A biasing circuit comprising: first circuitry having an output for providing an input to second circuitry and a first input of the first circuitry for receiving an output from said second circuitry, said output of said second circuitry being responsive to said output of said first circuitry, said first circuitry being arranged to provide at a terminal a reference at a substantially constant value for controlling the input to the second circuitry, said first circuitry being responsive to the output from said second circuitry when providing said reference in a normal mode, wherein said circuit further has a standby mode in which a second input to the first circuitry provides at said terminal a reference at a low value; wherein a voltage is provided on the second input of the first circuitry when in the normal mode; wherein the second input is a control terminal for a first switching device having first and second switching terminals, the first switching terminal being connected to a second voltage and the second switching terminal being connected through a first resistance to a third voltage; and wherein the first circuitry comprises a first branch connected between the control terminal and the third voltage, the first branch having a second resistance and a second switching device, and wherein the second switching device forms a first current mirror with a second branch providing the output to the input of the second circuitry.