Patent ID: 8461039

Claim:
A method of fabricating an interconnect structure comprising: depositing a graded cap layer on a surface of a substrate, said graded cap layer comprises a lower region that functions as a barrier region and an upper region that has properties of a permanent antireflective coating, wherein said lower region and said upper region are separated by at least one middle region, and wherein said middle region is provided using a mixture of a first precursor used in forming the lower region, and a second precursor used in forming the upper region; providing at least one patternable low-k material directly on a surface of the graded cap layer, wherein said at least one patternable low-k material is a patternable composition comprising a functionalized polymer, copolymer, or a blend including at least two of any combination of polymers and/or copolymers having one or more photo/acid-sensitive imageable groups; forming at least one interconnect pattern within said at least one patternable low-k material and said graded cap layer, said at least one interconnect pattern within said at least one patternable low-k material is formed without utilizing a separate photoresist material; curing said at least one patterned patternable low-k material into cured dielectric material having a dielectric constant of not more than 4.3; and filling said at least one interconnect pattern with an electrically conductive material.