Patent ID: 8701972

Claim:
A method of manufacturing a semiconductor device, comprising the steps of: (a) providing a wiring substrate including a first surface, a bonding lead formed over the first surface, a first solder material formed over the bonding lead, a second surface opposite to the first surface, and a land formed over the second surface, wherein the bonding lead is extended along a first direction in plan view, wherein the bonding lead has a first portion, a second portion integrally formed with the first portion, and a third portion integrally formed with the second portion, wherein the second portion is arranged between the first portion and the third portion, wherein a width of the second portion is less than a width of each of the first and third portions in the plan view, and wherein the width of each of the first, second and third portions is along a second direction crossing the first direction; and (b) after the step (a), disposing a semiconductor chip over the first surface of the wiring substrate such that a main surface of the semiconductor chip faces the first surface of the wiring substrate, and electrically connecting a bonding pad of the semiconductor chip with the bonding lead of the wiring substrate, wherein the semiconductor chip includes the main surface, the bonding pad formed over the main surface, a pillar formed over the bonding pad, a second solder material formed over an end face of the pillar, and a back surface opposite to the main surface, and wherein the semiconductor chip is disposed over the wiring substrate such that the second portion of the bonding lead overlaps with the pillar.