Patent ID: 7525271

Claim:
A motor driving circuit having low current consumption under a standby mode, comprising: a driving module, comprising: a power cutter; a control module having a first input terminal coupled to an output terminal of the power cutter; an oscillator having an input terminal coupled to the output terminal of the power cutter; a counter having a first input terminal coupled to the output terminal of the power cutter, and a second input terminal coupled to an output terminal of the oscillator; a S-R latch having a Set terminal coupled to an output terminal of the counter, and a positive logic output terminal coupled to an input terminal of the power cutter; a Hall bias having an input terminal coupled to the output terminal of the power cutter; a lock/restart module having a first input terminal coupled to the output terminal of the power cutter, and an output terminal coupled to a second input terminal of the control module; an H-shaped full-bridge circuit having a first input terminal coupled to a first output terminal of the control module, a second input terminal coupled to a second output terminal of the control module, a third input terminal coupled to a third output terminal of the control module, and a fourth input terminal coupled to a fourth output terminal of the control module; an operational amplifier having a first output terminal coupled to the third output terminal of the control module, a second output terminal coupled to a fourth input terminal of the control module, and a first input terminal coupled to the output terminal of the power cutter; a comparator having a first input terminal coupled to the first output terminal of the operational amplifier, a second input terminal coupled to the second output terminal of the operational amplifier, a third input terminal coupled to the output terminal of the power cutter, and a first output terminal coupled to a second input terminal of the lock/restart module; and a first transistor having a gate coupled to the second output terminal of the comparator; a Hall sensor having an input terminal coupled to an output terminal of the Hall bias, a first output terminal coupled to the first input terminal of the operational amplifier, and a second input terminal coupled to the second input terminal of the operational amplifier; a pulse width modulation (PWM) signal source coupled to a third input terminal of the counter, a Reset terminal of the S-R latch, and a fifth input terminal of the control module; and a motor having a first input terminal coupled to the first output terminal of the H-shaped full-bridge circuit, and a second input terminal coupled to the second output terminal of the H-shaped full-bridge circuit.