Patent ID: 8359421

Claim:
A method, comprising: identifying a first set of masters and a second set of masters from a plurality of masters included in a crossbar interconnect; partitioning the crossbar interconnect into a plurality of partitions comprising at least a, bidirectional first partition corresponding to the first set of masters and a bidirectional second partition corresponding to the second set of masters; allocating a first set of buffer areas within a multi-channel memory, the first set of buffer areas corresponding to the first set of masters, wherein the first set of masters has access to the first set of buffer areas within the multi-channel memory via the bidirectional first partition; and allocating a second set of buffer areas within the multi-channel memory, the second set of buffer areas corresponding to the second set of masters, wherein the second set of masters has access to the second set of buffer areas within the multi-channel memory via the bidirectional second partition, wherein the first set of buffer areas is not accessible to the second set of masters via the crossbar interconnect, and wherein the second set of buffer areas is not accessible to the first set of masters via the crossbar interconnect.