Patent ID: 8914619

Claim:
A computer implemented method for providing access to registers available to program instructions of a program in a computer having a plurality of registers, each of said plurality of registers comprising a high order portion and a low order portion, each of said program instructions comprising an opcode specifying an operation, each of said program instructions comprising a register field for selecting any of said registers, the register field of a program instruction specifying a register of the plurality of registers for holding a corresponding register operand, wherein, in a first addressing mode, main storage addresses are formed entirely from the low order portion of a register, wherein, in a second addressing mode, main storage addresses are formed from a combination of the high order portion and the low order portion of a register, the method comprising: executing, by a processor, said program instructions, the executing comprising: determining whether a high-word facility is installed; based on the determining the high-word facility is installed and based on an instruction being an instruction of a first subset of said program instructions, wherein the first subset of said program instructions is configured to permit the register field to only access the high order portion of said registers, accessing, by the processor, a register operand consisting of only the high order portion of the corresponding register; and based on the determining the high-word facility is not installed, blocking execution of instructions of said first subset of program instructions; and based on an instruction being one of a second subset of said instructions, wherein the second subset of said program instructions is configured to permit the register field to access at least the low order portion of said registers, accessing a register operand comprising at least in part the low order portion of the corresponding register.