Patent ID: 6957400

Claim:
A method of identifying high quality design points in a circuit design comprising: (a) defining a plurality of performance specifications for a circuit formed from a plurality of interconnected circuit devices, wherein each performance specification represents a goal for a corresponding performance of the circuit; (b) defining at least one device variable for at least one of the circuit devices; (c) subject to each device variable and the performance specifications, generating a plurality of design points for the circuit, wherein each design point is comprised of a topology of the circuit devices and the performances associated with said topology; (d) for each design point, determining an original cost that is related to the degree of correlation between the performance specifications and the performances of the circuit associated with said design point; (e) identifying a subset of said design points; (f) for each design point identified in step (e), determining a domination cost as a function of how favorable at least one performance of said design point is with respect to the corresponding performance of at least one other design point identified in step (e); (g) for each design point identified in step (e), determining a tradeoff cost by combining the original cost and the domination cost for said design point; (h) subject to the performance specifications and the circuit topology associated with each design point of a subset of the identified design points, generating another plurality of design points for the circuit, wherein each thus generated design point is generated from at least one of the subset of the identified design points, and at least one device variable of each thus generated design point has a value that is different than a value of said device variable for the at least one design point from which said thus generated design point was generated; (i) for each design point generated in step (h), determining an original cost that is related to the degree of correlation between the performance specifications and the performances of the circuit associated with said design point; (j) for each design point generated in step (h), determining a domination cost as a function of how favorable at least one performance of said design point is with respect to the corresponding performance of at least one other design point; (k) for each design point generated in step (h), determining a tradeoff cost by combining the original cost and the domination cost for said design point; (l) identifying each design point generated in step (h) that has a tradeoff cost that is the same or more favorable than the most favorable tradeoff cost determined before the preceding iteration of step (k); and (m) if identifying additional design points is desired, repeating steps (h) through (l).