Patent ID: 7372555

Claim:
A method of fabricating a semiconductor integrated circuit device, comprising the steps of: (a) printing solder over a substrate; (b) inspecting the solder printed over the substrate; and (c) mounting circuit parts over the solder printed over the substrate, the step (b) comprising the sub-steps of: (b1) inspecting in three dimensions the solder printed over the substrate, wherein, in the sub-step (b1), the solder printed over the substrate is inspected partially in three dimensions, and wherein, in the sub-step (b1), four corners and a central portion over the substrate are inspected in three dimensions; (b2) after the step (b1), inspecting in two dimensions the solder printed over the substrate, wherein in the sub-step (b2), the whole of the solder printed over the substrate is inspected in two dimensions; and (b3) displaying in two dimensions on a larger scale a portion found to be defective in the three-dimensional inspection.