Patent ID: 6841836

Claim:
An integrated device comprising an MOS transistor and a Schottky diode formed on a semiconductor substrate of a first conductivity type, comprising: a plurality of body region stripes of a second conductivity type which are adjacent and parallel to each other; a first metal layer placed over said substrate and a second metal layer placed under said substrate; a plurality of elementary structures parallel to each other, each one of which comprises first zones provided with a silicon oxide layer placed over a portion of said substrate which is between two adjacent body region stripes; a polysilicon layer superimposed over said silicon oxide layer; a dielectric layer placed over and around the polysilicon layer; and at least one of said plurality of adjacent body region stripes comprising source regions of the first conductivity type which are placed adjacent to said first zones of the elementary structures to form elementary cells of said MOS transistor, wherein said elementary structures and said body regions stripes extend longitudinally in a transversal way to the formation of the channel in said elementary cells of the MOS transistor, said first metal layer contacts said source regions, and at least one elementary structure of said plurality of elementary structures comprises at least one second zone adapted to allow the direct contact between said first metal layer and the underlying substrate portion arranged between two adjacent body regions stripes to form the Schottky diode.