Patent ID: 8466540

Claim:
A semiconductor device comprising: a sealing body having a planar shape comprised of a quadrangle including a pair of first sides, and a pair of second sides crossing with the first sides; a die pad; a plurality of suspending leads formed integrally with the die pad and extending from the die pad toward the first side of the sealing body; a plurality of leads arranged around the die pad, and arranged along the first sides of the sealing body; a first semiconductor chip having a first main surface, a plurality of first electrode pads formed on the first main surface, and a first back surface opposed to the first main surface, and mounted over the die pad; a second semiconductor chip having a second main surface, a plurality of second electrode pads formed on the second main surface, and a second back surface opposed to the second main surface, and mounted over the die pad; a plurality of first wires for electrically coupling the leads and the first electrode pads of the first semiconductor chip, respectively; and a plurality of second wires for electrically coupling the first electrode pads of the first semiconductor chip and the second electrode pads of the second semiconductor chip, respectively, wherein the die pad, the suspending leads, the leads, the first semiconductor chip, the second semiconductor chip, the first wires, and the second wires are covered with the sealing body; and wherein each of the suspending leads has an offset part.