Patent ID: 7412617

Claim:
A phase frequency detector comprising: a first edge detector for detecting first-type edges of a first signal to generate a first detection signal and for changing the level of the first detection signal according to a first control signal; a first latch unit coupled to the first edge detector for latching the first detection signal to generate a first output signal and for changing the level of the first output signal according to a third control signal; a first delay unit coupled to the first latching unit for delaying the first output signal to generate a first delayed signal; a second edge detector for detecting the first-type edges of a second signal to generate a second detection signal and for changing the level of the second detection signal according to a second control signal; a second latch unit coupled to the second edge detector for latching the second detection signal to generate a second output signal and for changing the level of the second output signal according to the third control signal; a second delay unit coupled to the second latching unit for delaying the second output signal to generate a second delayed signal; a combination logic coupled to the first and second latch units for performing a predetermined logical operation on the first output signal and the second output signal to generate the third control signal; a first logic unit coupled to the first delay unit, the combination logic, and the first edge detector, for performing a first logical operation on the first delayed signal and the third control signal to generate the first control signal; and a second logic unit coupled to the second delay unit, the combination logic, and the second edge detector, for performing a second logical operation on the second delayed signal and the third control signal to generate the second control signal.