Patent ID: 8318515

Claim:
A method of manufacturing an optoelectronic light emitting semiconductor device comprising a multi-quantum well (MQW) active region, one or more p-type layers, and one or more n-type layers, wherein: the MQW active region is formed over the one or more n-type layers in a vapor deposition process at a quantum well growth temperature T Q and barrier layer growth temperature T B , where T Q ≦T B ; a MQW subassembly comprising the MQW active region and the one or more n-type layers is subjected to reduced temperature vapor deposition processing to form the one or more p-type layers over the MQW subassembly utilizing a plurality of precursors and an indium surfactant; the precursors and the indium surfactant are introduced into the vapor deposition process at respective flow rates with the aid of one or more carrier gases, at least one of which comprises H 2 ; the reduced temperature vapor deposition processing is executed at a reduced temperature T G , where T G ≦T B ±5%, in which TG, TB and the range of TB±5% are all expressed in units of degrees Celsius; the precursors used in the reduced temperature vapor deposition processing are configured to provide materials for the formation of the one or more p-type layers; the indium surfactant comprises an amount of indium sufficient to improve crystal quality of the one or more p-type layers formed during the reduced temperature vapor deposition processing, relative to a crystal quality of the respective p-type layer if formed during the reduced temperature vapor deposition processing without an amount of indium; and the respective precursor flow rates and the H 2 content of the carrier gas are selected to maintain a mole fraction of indium from the indium surfactant to be less than approximately 1% in the one or more p-type layers during the reduced temperature vapor deposition processing.