Patent ID: 8310110

Claim:
A power switch circuit, comprising: a first power switch comprising a first key, a first positive terminal, and a first negative terminal, wherein the first positive terminal is connected to a standby power source through a first resistor, the first negative terminal is grounded, the first positive terminal contacts the first negative terminal when the first key is pressed; a first inverter, wherein an input of the first inverter is connected to the first positive terminal of the first power switch through a second resistor; a second inverter, wherein an input of the second inverter is connected to an output of the first inverter; a first diode, wherein a cathode of the first diode is connected to an output of the second inverter, an anode of the first diode is connected to a power-on terminal of a motherboard; a second power switch comprising a second key, a second positive terminal, and a second negative terminal, wherein the second positive terminal is connected to the standby power source through a third resistor, the second negative terminal is grounded, the second positive terminal contacts the second negative terminal when the second key is pressed; a third inverter, wherein an input of the third inverter is connected to the second positive terminal of the second power switch through a fourth resistor; a fourth inverter, wherein an input of the fourth inverter is connected to an output of the third inverter; a second diode, wherein a cathode of the second diode is connected to an output of the fourth inverter, an anode of the second diode is connected to the power-on terminal of the motherboard; and a fifth resistor, wherein a first terminal of the fifth resistor is connected to the anode of the second diode, a second terminal of the fifth resistor is connected to the standby power source.