Patent ID: 6909172

Claim:
A semiconductor device comprising: a plurality of semiconductor chips including a first semiconductor chip and a second semiconductor chip connected to each other by a plurality of wires, wherein the first semiconductor chip includes a plurality of first internal terminals, each of which is connected to at least one of the plurality of wires, and the second semiconductor chip includes a plurality of second internal terminals, each of which is connected to at least one of the plurality of wires, wherein the first semiconductor chip includes a first external terminal, and the second semiconductor chip includes a second external terminal, wherein a first of the plurality of first internal terminals is positioned adjacent to the first external terminal, and a first of the plurality of second internal terminals is positioned adjacent to the second external terminal; a first intermediate switch device connected between the plurality of first internal terminals and a second intermediate switch device connected between the plurality of second internal terminals so that the plurality of wires, the plurality of first internal terminals, and the plurality of second internal terminals are connected in series between the first external terminal and the second external terminal; a first end switch device connected between the first of the plurality of first internal terminals and the first external terminal; and a second end switch device connected between the first of the plurality of second internal terminals and the second external terminal.