Patent ID: 7966478

Claim:
A method for reducing entries searched in a load reorder queue (LRQ) when a processor receives a snoop indicating that another processor has written to a location, the method comprising: checking load reorder queue (LRQ) entries located between a load_peril_snoop register and a lrq_tail register for addresses matching the address of the snoop, the load_peril_snoop register containing an index in the LRQ of the oldest load that is younger than the load sequence number (LSQN) of the youngest load, L, for which L and all loads older than L have received their data, the lrq_tail register containing the location in the LRQ where load instructions are placed in program order after being fetched and decoded; and setting a snooped bit in the LRQ entry for any matches found to indicate that an instruction re-execute so as to maintain sequential load consistency.