Patent ID: 7084036

Claim:
A data writing method for Mask Read Only Memory, comprising: a semiconductor substrate having a plurality of gate structures thereon; forming a patterned first photoresist layer on the semiconductor substrate, wherein the patterned first photoresist layer covers the gate structures to expose a first code area and a fourth code area; performing a first ion implantation step using the patterned first photoresist layer as a mask, removing the patterned first photoresist layer; forming a patterned second photoresist layer on the semiconductor substrate, wherein the patterned second photoresist layer covers the gate structures and the first code area to expose a second code area and the fourth code area; performing a second ion implantation step using the patterned second photoresist layer as a mask, removing the patterned second photoresist layer; forming a patterned third photoresist layer on the semiconductor substrate, wherein the patterned third photoresist layer covers the gate structures, the first code area, the second code area and the fourth code area to expose a third code area; performing a third ion implantation step using the patterned third photoresist layer as a mask; and removing the patterned third photoresist layer.