Patent ID: 7913135

Claim:
An integrated circuit comprising: A. wrapper control inputs that include a wrapper serial input, a wrapper serial output, and wrapper control inputs including a clock input, a shift input, a capture input, an update input, a reset input, and a select input; B. input circuitry having a serial input coupled to the wrapper serial input, select serial outputs selectively coupled to the wrapper serial input, and link control inputs; C. output circuitry having a serial output coupled to the wrapper serial output, select serial inputs selectively coupled to the serial output, and link control inputs; D. a link instruction circuit having a serial input and a serial output coupled in series with the wrapper serial input and the wrapper serial output, control inputs connected to the wrapper control inputs, link control outputs connected to the link control inputs, first, second, and third enable outputs, and an instruction register having an input coupled to the serial input, outputs connected to the link control outputs and the enable outputs, and having an output selectively coupled to the serial output; E. first core circuitry including first wrapper circuitry, the first wrapper circuitry having a serial input connected to a select serial output, a serial output connected to a select serial input, a first enable input connected to the first enable input, and control inputs connected to the wrapper control inputs; F. second core circuitry embedded within the first core circuitry, the second core circuitry including second wrapper circuitry having a serial input connected to a select serial output, a serial output connected to a select serial input, a second enable input connected to the second enable output, and control inputs connected to the wrapper control inputs; and G. third core circuitry embedded within the first core circuitry, the third core circuitry including third wrapper circuitry having a serial input connected to a select serial output, a serial output connected to a select serial input, a third enable input connected to the third enable output, and control inputs connected to the wrapper control inputs.