Patent ID: 8742590

Claim:
A method for providing at least one through silicon via interconnect structure, comprising: providing a substrate comprising a substrate material having a first main surface; etching, simultaneously, at least one through silicon via hole and at least one isolating trench-like structure using an aspect-ratio-dependent etching, the isolating trench-like structure surrounding the through silicon via hole and being separated from the through silicon via hole by a remaining substrate material, wherein the at least one through silicon via hole has a diameter of from 2 μm to 20 μm and the isolating trench-like structure has a trench width smaller than 1000 nm; thereafter depositing a dielectric liner, whereby sidewalls of the etched through silicon via hole are smoothed and whereby an opening of the isolating trench-like structure is pinched off at the first main surface of the substrate, thereby creating a hollow trench-like structure with at least one airgap in the hollow trench-like structure; and thereafter depositing a conductive material in the through silicon via hole, whereby a through silicon via interconnect structure surrounded by the hollow trench-like structure is provided, wherein more than one silicon via interconnect structure is formed within the hollow trench-like structure.