Patent ID: 8295161

Claim:
A network apparatus comprising: an input interface unit operable to receive and process a signal input from another apparatus; a first line switching unit and a second line switching unit operable to cross-connect output signals from the input interface unit on a frame-by-frame basis; an output interface unit which includes a selection unit operable to select either of outputs from the first and the second line switching units and which processes and outputs an output of the selection unit to another apparatus; and a CPU operable to control the selection unit, wherein the line switching units each include: a control signal generation unit operable to store setting data from the CPU in a memory and generate a line switching control signal based on the setting data stored in the memory; a memory error detection processing unit operable to detect a memory error of the memory and output error information regarding the memory error; and a main signal processing unit which writes setting data indicated by the line switching control signal into a buffer when the error information does not indicate an error, and holds previously-stored setting data in the buffer when the error information indicates an error, and which performs cross-connection processing based on the setting data stored in the buffer, wherein the CPU controls the selection unit based on the error information, and wherein both the error information and the switching control signal are provided to the main signal processing unit.