Patent ID: 7821329

Claim:
A pumping voltage generating circuit in a semiconductor memory apparatus, comprising: a voltage supplying unit configured to supply an external power supply voltage to a first node in response to a first transfer signal; a node control unit configured to couple the first node to a second node in response to a second transfer signal and to couple the second node to an output node in response to a third transfer signal; a first pumping unit configured to increase a voltage level on the first node through a pumping operation that is performed in response to a first oscillation signal and to control one of an amount of voltage increment and decrement on the first node in response to a first control signal; and a second pumping unit configured to increase a voltage level on the second node through a pumping operation that is performed in response to a second oscillation signal and to control one of an amount of voltage increment and decrement on the second node in response to a second control signal; wherein the first pumping unit includes: a first pump capacitor for performing a pumping operation according to the first oscillation signal; and a first control pump for performing a pumping operation according to the first oscillation signal when the first control signal is activated, the first control pump including: a second pump capacitor; a first switch for transferring the first oscillation signal to one end of the second pump capacitor in response to the first control signal; and a second switch for coupling the other end of the second pump capacitor to the first node in response to the first control signal.