Patent ID: 8549365

Claim:
An error correction encoding device, associating redundancy data with source data, said device comprising: at least three encoding stages, each implementing at least one set of three basic encoding modules, including a first encoding stage, a last encoding stage and at least one intermediate encoding stage, each basic encoding module implementing a basic code and comprising c inputs and c outputs, with c being an integer, each encoding stage receiving data to be processed, distributed among the different basic encoding modules and delivering processed data coming from said basic encoding modules, said first encoding stage receiving said source data and said last encoding stage delivering said redundancy data; at least two permutation stages, said permutation stages being inserted between two successive encoding stages, called a previous encoding stage and a following encoding stage, and distributing the processed data coming from each basic encoding module of the previous encoding stage between at least two basic encoding modules of the following encoding stage, and wherein each permutation stage implements a c-cyclic type permutation.