Patent ID: 7674676

Claim:
A method of manufacturing a semiconductor device, comprising: preparing a semiconductor substrate including an active region surrounded by an element-isolating region; forming a first mask including an opening for forming a first diffused layer; implanting a channel impurity for threshold voltage control through the opening using the first mask; forming the first diffused layer using the first mask by implanting a first impurity having a conductive type opposite to that of the channel impurity through the opening; forming a gate-insulating film, a first gate wiring layer and a second gate wiring layer after removing the first mask; and forming a second diffused layer and a third diffused layer using the first gate wiring layer and the second gate wiring layer as a second mask by implanting a second impurity having a conductive type identical to that of the first impurity, wherein the first gate wiring layer and the second gate wiring layer are adjacent to each other and are provided so as to traverse above the active region through the gate-insulating film, the first diffused layer is provided in a region of the active region on a side between the first gate wiring layer and the second gate wiring layer, the second diffused layer is provided in one region of the active region external to a side between the gate wiring layers, the third diffused layer is provided in an other region of the active region external to the side between the gate wiring layers, and the semiconductor device includes a first field effect transistor comprising the gate-insulating film, the first gate wiring layer, the first diffused layer and the second diffused layer, and a second field effect transistor comprising the gate insulating film, the second gate wiring layer, the first diffused layer and the third diffused layer.