Patent ID: 7058092

Claim:
A twenty-gigabit per second two to one multiplexor comprising: first and second input amplifiers that respectively produce output signals by respectively receiving and amplifying first and second ten-gigabit per second input signals; first and second power dividers that each produce two output data streams by respectively splitting the output signals of the first and second input amplifiers; first and second mixers that produce output signals by respectively mixing output signals of the first and second power dividers with a 10 GHz local oscillator signal; a first means for combining signals that produces an output signal by combining the output signal of the first mixer with an output data stream with the first power divider; a second means for combining signals that produces an output signal by combining the output signal of the second mixer with an output data stream of the second power divider; a T/2 delay line that produces an output signal by delaying the output signal of the second combining means; and an output combiner means that outputs a 20-gigabit per second data stream by combining the output signal of the T/2 delay line with the output signal of the first combining means.