Patent ID: 8598465

Claim:
A wafer-scale assembly circuit comprising: a plurality of metal interconnect layers, each metal layer including patterned metal portions where at least some of the patterned metal portions are RF signal lines; at least one benzocyclobutene layer provided between two metal interconnect layers; at least one trench via formed around a perimeter of the at least one benzocyclobutene layer at a circuit sealing ring, said trench via providing a hermetic seal at the sealing ring for the at least one benzocyclobutene layer; and a plurality of stabilizing post vias formed through the at least one benzocyclobutene layer adjacent to the at least one trench via proximate to the sealing ring and extending around the perimeter of the at least one benzocyclobutene layer, said plurality of stabilizing vias operating to prevent the benzocyclobutene layer from shrinking in size.