Patent ID: 6975960

Claim:
A method for evaluating a wafer configuration comprising the steps of: obtaining plural wafer configuration profiles of from the central portion of a wafer to the edge portion thereof along the entire periphery thereof at a prescribed angular space; providing a first region for calculating a reference line for each of the profiles in the central side of the wafer; calculating the reference line in the first region; further providing a second region in the peripheral side of the wafer outside the first region; extrapolating the reference line calculated in the first region to the second region; analyzing a value (an actually measured value−a reference value) obtained by subtracting the reference line (the reference value) in the second region from a configuration (the actually measured value) in the second region; calculating the maximum value among the values as a surface characteristic A and the minimum value among the values as a surface characteristic B; and evaluating configuration uniformity in the peripheral portion of the wafer from plural surface characteristics A and surface characteristics B obtained along the entire peripheral portion of the wafer.