Patent ID: 7663524

Claim:
A multi-channel display driver circuit incorporating modified digital-to-analog (D/A) converters, comprising: a plurality of digital comparators, each of which has a digital data input, a reference input with multiple bit lines, and an output that is connected to a corresponding data channel of a display apparatus; and a non-sequential number generator, having multiple output bit lines, comprising: a pseudo-random number generator to produce pseudo-random numbers, wherein the pseudo-random number generator is a de Bruijn's counter or a linear-feedback shift register (LFSR) counter; and a counter, connected to the pseudo-random number generator in cascade, together with the pseudo-random number generator to produce a non-sequential reference signal outputting to the reference input of each digital comparator, wherein the counter provides a plurality of less significant bits to the digital comparators, and the pseudo-random number generator provides a plurality of most significant bits to the digital comparators; wherein the non-sequential reference signal is represented by the output bit lines of the non-sequential number generator.