Patent ID: 7518164

Claim:
A system for protecting an integrated circuit from an electrostatic discharge event at an input/output pad connected to the integrated circuit, the system comprising: (a) a silicon controlled rectifier including: (i) an anode operationally connected to the input/output pad, and (ii) a trigger input separate from said anode, and (b) a triggering mechanism operationally connected to said trigger input, said triggering mechanism including: (i) an inverter configured to be powered by the electrostatic discharge event, (ii) a resistor having a first terminal connected to said trigger input and a second terminal connected to an input of said inverter, (iii) a capacitor having a first terminal connected to said second terminal of said resistor and a second, grounded terminal, and (iv) a trigger transistor having a drain connected to said trigger input and also connected to a power supply line of the integrated circuit, a grounded source, and a gate connected to an output of said inverter; wherein a time constant of said resistor and said capacitor is great enough that when an electrostatic discharge event occurs at the input/output pad while power is not applied to the integrated circuit, a voltage at said input of said inverter remains sufficiently low for a sufficiently long time for a voltage at said output of said inverter to be sufficiently high to cause said trigger transistor to conduct a trigger current operative to trigger said silicon control rectifier; wherein, when power is applied to the integrated circuit, said capacitor is charged to a voltage sufficiently high to cause said voltage at said output of said inverter to be sufficiently low to cause said trigger transistor to be substantially non-conductive; and wherein said anode and said trigger input form a reverse-biased diode operative to isolate said triggering mechanism from the input/output pad when power is applied to the integrated circuit.