Patent ID: 7734896

Claim:
A reconfigurable integrated circuit device which converts an arbitrary calculation state dynamically, based on configuration data, comprising: a plurality of processor elements, each of which comprises a plurality of input terminals, an output terminal, a plurality of arithmetic units which are provided in parallel and each of which performs calculation processing in synchronous with a clock signal, and an intra-processor element network which connects together said input terminals, and input and output ports of said plurality of arithmetic units in an arbitrary state; and an inter-processor element network which connects between said plurality of processor elements in an arbitrary state, wherein: said intra-processor element network has a plurality of first selectors, provided corresponding to all of the input ports of said plurality of arithmetic units, each of which has inputs connected to all of the input terminals and directly connected to all of the output ports of said arithmetic units, and an output connected to the corresponding input port of the arithmetic unit, said intra-processor element network further has a second selector having inputs connected to all of the output ports of the arithmetic units and an output connected to the output terminal, said intra-processor element network is reconfigurable to a desired connection state based on configuration data provided to the first selectors and the second selector, and further, said inter-processor element network is reconfigurable to a desired connection state based on said configuration data.