Patent ID: 7807543

Claim:
A method of manufacturing a semiconductor device, the method comprising: forming first trenches and second trenches in a substrate; forming a first oxide layer on the surfaces of the first trenches and the second trenches; selectively forming a second oxide layer on the first oxide layer formed on the surfaces of the first trenches but not on the first oxide layer formed on the surfaces of the second trenches, by using selective plasma ion immersion implantation and deposition (PIIID); forming a liner nitride layer on the first oxide layer on the surfaces of the second trenches and on the second oxide layer on the surfaces of the first trenches; forming a buried insulating layer in the first trenches and the second trenches; and planarizing the buried insulating layer to form a first device isolation layer in the first trenches and a second device isolation layer in the second trenches, wherein the selective forming of the second oxide layer further comprises: forming a photoresist pattern on the substrate to expose the first trenches and cover the second trenches; forming the second oxide layer on the first oxide layer formed on the surfaces of the exposed first trenches but not on the first oxide layer formed on the surfaces of the covered second trenches by using plasma ion immersion implantation and deposition (PIIID); removing the second oxide layer formed on the photoresist pattern by using dry etching; and then removing the photoresist pattern.