Patent ID: 7176521

Claim:
A power semiconductor device, comprising: a semiconductor layer; polysilicon-containing gates; a first semiconductor region formed in said semiconductor layer at one surface of said semiconductor layer and operative to serve as at least one of a source region and an emitter region; a second semiconductor region formed in said semiconductor layer at the other surface of said semiconductor layer and operative to serve as at least one of a drain region and a collector region; a gate routing wire commonly connected to a plurality of said gates and including a polysilicon portion and a metal portion formed adjacent to it in the direction of plane of said semiconductor layer; an interlayer insulator film formed to cover said first semiconductor region, said gate routing wire and a plurality of said gates; electrode portions formed in said interlayer insulator film and connected to said first semiconductor region; a strap electrode plate located to cover said interlayer insulator on said gate routing wire and cover a plurality of said electrode portions and commonly connected to a plurality of said electrode portions, and a buried metal portion formed on and connected to said gate in said gate trench, wherein the bottom of said buried metal portion is located higher than the bottom of said first semiconductor region, wherein said gate is formed on a gate insulator film in a gate trench, said gate trench extending from one surface of said semiconductor layer into said semiconductor layer.