Patent ID: 7937626

Claim:
A data processing apparatus, comprising: logic circuitry configured to produce data elements; trace logic circuitry configured to produce a stream of trace elements representative of at least some of said data elements, the trace logic circuitry having trace generation logic circuitry configured to generate trace element for inclusion in said stream, said trace generation logic circuitry further configured to generate trace timing indicators for inclusion in said stream, each trace timing indicator indicating the elapse of one or more processing timing intervals, said processing timing interval being a predetermined plurality of clock cycles, wherein said processing timing interval is configurable; and storage circuitry for retaining a current processing timing interval, the trace generation logic circuitry is configured to reference said storage circuitry in order to determine when to generate each trace timing indicator; and the trace generation logic circuitry is further configured to alter said processing timing interval in response to an occurrence of one or more predetermined events.