Patent ID: 7755708

Claim:
A method for fabricating a pixel structure, comprising: providing a substrate comprising a first region, a second region and a third region; forming a semiconductor layer, a first insulating layer and a first metal layer on the substrate; patterning the first metal layer, the first insulating layer and the semiconductor layer to form a lower metal layer in the first region, a data line in the third region, and an active layer on the substrate of the second region; forming a second insulating layer on the lower metal layer and the active layer, so as to form a capacitor dielectric layer and a gate dielectric layer on the lower metal layer and the active layer, respectively; forming a second metal layer on the second insulating layer; and patterning the second metal layer to form an upper metal electrode on the capacitor dielectric layer and to form a gate electrode on the gate dielectric layer; forming a first masking layer, a second masking layer and a third masking layer on the first, second and third regions, respectively, wherein the second masking layer is thinner than the first and third masking layers; etching the uncovered first metal layer and the underlying first insulating and semiconductor layers to form the lower metal layer on the first region, the data line on the third region, and an active layer and an overlying metal masking layer on the second region; and removing the metal masking layer.