Patent ID: 8193604

Claim:
A semiconductor device, comprising: a temporary carrier for supporting the semiconductor device; an integrated passive device (IPD) structure disposed over the temporary carrier, the IPD structure including an inductor, resistor, or capacitor; a plurality of first conductive posts disposed over the temporary carrier; a first semiconductor die mounted to the IPD structure with a flipchip interconnect; a first wafer molding compound deposited over the first conductive posts and first semiconductor die; a core structure bonded to the first conductive posts over the first semiconductor die, the core structure including a silicon material; a plurality of conductive through silicon vias (TSVs) disposed in the core structure; a first redistribution layer disposed over the core structure; a plurality of second conductive posts disposed over the core structure; a second semiconductor die mounted over the core structure with a flipchip interconnect, the second semiconductor die being electrically connected to the core structure; a second wafer molding compound deposited over the second conductive posts and the second semiconductor die; and a second redistribution layer disposed over the second molding compound and second semiconductor die.