Patent ID: 7064418

Claim:
A method of fabricating a diode on a substrate, said method comprising: forming a semiconductor layer on said substrate; forming a first region of a first carrier concentration in said semiconductor layer; forming a second region of a second carrier concentration in said semiconductor layer; forming a third region of a third carrier concentration in said semiconductor layer, said third carrier concentration is of a first conductivity type and is smaller than said first carrier concentration, said first region separates from said second region, said third region locates between said first region and said second region, said third region is adjacent to said first region; forming a fourth region of a fourth carrier concentration in said semiconductor layer, said fourth carrier concentration is of a second conductivity type and is smaller than said second carrier concentration, said third region separates from said second region, said fourth region locates between said third region and said second region, said fourth region is adjacent to said second region; forming a fifth region of a fifth carrier concentration in said semiconductor layer, wherein said fifth carrier concentration is of said first conductivity type and is smaller than said third carrier concentration, said third region separates from said fourth region, said fifth region locates between said third region and said fourth region; forming an insulator layer on said semiconductor layer; etching said insulator layer to form at least a contact window; and forming a metal layer on said insulator layer; wherein said contact window exposes a portion of an upper surface of said semiconductor layer, said metal layer fills up said contact window to contact said semiconductor layer.