Patent ID: 7005879

Claim:
A voltage drop suppression device for maintaining constant voltage on a power bus of a probe card used for semiconductor wafer testing, the device comprising: a bypass capacitor mounted on the probe card, wherein the bypass capacitor is charged to a voltage greater than a power supply voltage VDD of a device under test; and an active regulation circuit controlling the discharge of the bypass capacitor to supply current to the power bus for suppressing a voltage drop on the power bus generated by a current surge during testing of the device under test, said active regulation circuit comprises: (i) an operational amplifier connected to receive a reference voltage equal to the power supply voltage VDD, and connected to receive a voltage on the power bus; and (ii) a transistor connected to supply a current from the bypass capacitor to the power bus, wherein the transistor is controlled by the operational amplifier to supply more current as the voltage on the power bus decreases.