Patent ID: 7688614

Claim:
A nonvolatile semiconductor memory device, comprising: a memory cell array comprising a plurality of two-terminal structured memory cells disposed in a row direction and a column direction, a plurality of word lines extending in the row direction, and a plurality of bit lines extending in the column direction, in which one ends of the memory cells in a same row are connected to a common word line, and other ends of the memory cells in a same column are connected to a common bit line; a word line selection circuit arranged to select one or more word lines from the plurality of word lines as selected word lines, and apply selected word line voltage and an unselected word line voltage to the selected word lines and unselected word lines, respectively; a bit line selection circuit arranged to select one or more bit lines from the plurality of bit lines as selected bit lines, and apply a selected bit line voltage and an unselected bit line voltage to the selected bit lines and unselected bit lines, respectively; and a voltage control circuit arranged to prevent voltage fluctuation of one or both of the plurality of word lines and the plurality of bit lines, wherein one or both of the plurality of word lines and the plurality of bit lines are connected to the voltage control circuit at a voltage control point positioned at a farthest point from a drive point at which the plurality of word lines are connected to the word line selection circuit or the plurality of bit lines are connected to the bit line selection circuit, or at a point in between the drive point and the farthest point, when the voltage control circuit is connected to the plurality of word lines, the voltage control circuit connected to the unselected word lines to which the unselected word line voltage is applied is deactivated, the selected word line voltage being a the selected word line voltage and the selected bit line voltage, and when the voltage control circuit is connected to the plurality of bit lines, the voltage control circuit connected to the unselected bit lines to which the unselected bit line voltage is applied is deactivated, the unselected bit line voltage being a voltage between the selected word fine voltage and the selected bit line voltage.