Patent ID: 7865749

Claim:
A method for changing a clock frequency in a system ( 10 ) comprising a plurality of synchronous integrated circuit chips ( 12 , 14 , 16 ), the method comprising: detecting a change in processing requirements in one of the plurality of synchronous integrated circuit chips; notifying the plurality of synchronous integrated circuit chips that a clock frequency change is to occur; achieving a quiescent bus state in each of the plurality of synchronous integrated circuit chips; notifying the plurality of synchronous integrated circuit chips that the clock frequency change may occur; changing the clock frequency of the plurality of integrated circuit chips wherein the plurality of synchronous integrated circuit chips ( 12 , 14 , 16 ) comprises a plurality of processors ( 12 , 14 ) and a companion chip ( 16 ), and wherein: the companion chip ( 16 ) receives a control transaction requesting the clock frequency change from the processor ( 12 , 14 ) in which the change in processing requirements was detected; and the companion chip ( 16 ) broadcasts the control transaction to the plurality of processors ( 12 , 14 ); and having a companion chip perform ( 16 ) a frequency change operation after the frequency change operation has been completed by the plurality of processors ( 12 , 14 ).