Patent ID: 8019942

Claim:
A memory system, comprising: a re-writable non-volatile memory; an external set of electrical contacts; and a controller connected to the re-writable non-volatile memory and the external contacts, the controller including: host interface circuitry connected to the external contacts; a first plurality of lines connected to the host interface circuitry for use when the memory system is operating according to a first protocol; and a second plurality of lines connected to the host interface circuitry for use when the memory system is operating according to a second protocol, wherein the host interface circuitry has a switching circuit connected with at least some of the first and second plurality of lines to make anyone of a plurality of connections in response to a command received through the external set of electrical contacts, the plurality of connections including connecting said at least some of the first plurality of lines to specified ones of the external contacts while maintaining the second plurality of lines disconnected therefrom and connecting said at least some of the second plurality of lines to said specified ones of the external contacts while maintaining the first plurality of lines disconnected therefrom.