Patent ID: 8450825

Claim:
A semiconductor package comprising: an interposer substrate provided for electrically connecting an integrated circuit die to a printed wiring board, the interposer substrate comprising: a base frame provided to mechanically support the integrated circuit die on the printed wiring board, first bond pads provided for being electrically connected to bond pads of the integrated circuit die, and second bond pads electrically connected to the first bond pads and provided for being electrically connected to bond pads of the printed wiring board, wherein the base frame comprises a first piece provided for being fixed to the integrated circuit die, and a second piece provided for being fixed to the printed wiring board, the first and second pieces being made of a material with respectively a predetermined first and a second coefficient of thermal expansion, wherein the first coefficient of thermal expansion of the first piece is chosen to match a coefficient of thermal expansion of the integrated circuit die and the second coefficient of thermal expansion of the second piece is chosen to match a coefficient of thermal expansion of the printed wiring board, wherein the first and the second piece of the base frame are connected to each other via deformable connecting structures defining a zone of expansion mismatch between the first and the second piece, the connecting structures being provided to compensate for a different thermal expansion of the first and second pieces, wherein the interposer substrate further comprises a wiring substrate mounted onto the base frame and comprising electric wiring tracks providing the electric connection between the first and second bond pads, the electrical wiring tracks having flexible parts in the zone of expansion mismatch which are provided to expand and contract along with the deformable connecting structures of the base frame.