Patent ID: 7557613

Claim:
An integrated circuit, comprising: a permutable switching network (SN); wherein the permutable SN comprises: an (i−1)-th level of conductors of I[i−1] number of conductors, comprising (I[i]/D[i]) number of (I[i−1]/I[i])×D[i] number of conductors, selectively coupled to each set of the D[i] number of sets of an i-th level of D[i] number of sets of conductors of I[i] number of conductors, comprising D[i] number of (I[i]/D[i]) number of conductors, through I[i−1] number of switches, wherein (I[i−1]/I[i])×D[i]>1, D[i]>1 for i=[1:L+1] where L≧1 and (I[L+1]/D[L+1])=Π i=[1:L] D[i]>2 where D[L+1]>2; each conductor of the (i−1)-th level of conductors of I[i−1] number of conductors selectively coupled to one conductor of each of the D[i] number of sets of the i-th level of D[i] number of sets of conductors of I[i] number of conductors through a respective switch from each of the D[i] number of I[i−1] number of switches; and each (I[i]/D[i]) number of I[i−1]/I[i])×D[i] number of conductors selectively coupled to one respective conductor of each of the D[i] number of sets of conductors of the i-th level of D[i] number of sets of conductors of I[i] number of conductors through (I[i−1]/I[i])×D[i] number of switches, wherein each of the D[i] number of sets of conductors has (I[i]/D[i]) number of conductors.