Patent ID: 7118970

Claim:
A method of fabricating a silicon carbide MOSFET, comprising: forming a hybrid p-type silicon carbide well region on a silicon carbide substrate having a drift region, the hybrid p-type silicon carbide well region comprising: an implanted p-type silicon carbide well portion in a p-type silicon carbide epitaxial layer; an implanted p-type silicon carbide contact portion that contacts the implanted p-type silicon carbide well portion and extends to a surface of the p-type epitaxial layer; and an epitaxial p-type silicon carbide portion, at least a portion of the epitaxial p-type silicon carbide portion corresponding to a p-type channel region of the MOSFET; forming a first n-type silicon carbide region at least in part within the hybrid p-type silicon carbide well region; forming a second n-type silicon carbide region adjacent the p-type channel region and extending to the drift region to provide an n-type channel region; forming a gate dielectric on the second n-type silicon carbide and at least a portion of the first n-type silicon carbide region; forming a gate contact on the gate dielectric; forming a first contact so as to contact a portion of the contact portion of the hybrid p-type silicon carbide well region the first n-type silicon carbide region; and forming a second contact on the substrate.