Patent ID: 7924601

Claim:
A resistive memory which stores data making use of changes in resistance induced by applied voltage, comprising: a first memory region having a first memory cell array having a plurality of resistive elements arranged therein; and a second memory region having a second memory cell array having a plurality of resistive elements arranged therein, wherein in the process of data write-in, the first memory region is set to the initial state in which all resistive elements in the first memory cell array reset to a high resistance state, and sequentially executes therein a first operation setting only designated resistive elements out of the resistive elements corresponded to the data to a low resistance state; a second operation transferring the data written in the first memory cell array to the second memory region; and a third operation resetting all resistive elements to the high resistance state after the data transfer operation, so as to attain the initial state, and the second memory region executes therein a fourth operation resetting the resistive elements in the second memory cell array corresponded to the data transferred from the first memory region to the high resistance state, and then setting only designated resistive elements out of the resistive elements to the low resistance state.