Patent ID: 8106868

Claim:
A pixel structure, having three thin film transistors (TFTs), the pixel structure comprising: a substrate; a first scan line disposed on the substrate; a second scan line disposed on the substrate; a third scan line disposed on the substrate, wherein the second scan line is electrically connected with the third scan line; a data line disposed on the substrate; a first TFT disposed on the substrate, which is electrically connected with the first scan line and the data line; a second TFT disposed on the substrate, which is electrically connected with the first TFT and the second scan line, and the second TFT is electrically connected to the data line through the first TFT; a third TFT disposed on the substrate, which is electrically connected with the third scan line and the data line; a first pixel electrode disposed on the substrate, which is electrically connected to the data line through the first TFT and the second TFT; and a second pixel electrode disposed on the substrate, which is electrically connected with the third TFT, wherein gates of the first TFT, the second TFT, and the third TFT are directly connected to the first scan line, the second line, and the third scan line, respectively.