Patent ID: 8347112

Claim:
An electronic device, comprising: a processor; and an encryption/decryption (E/D) engine coupled to the processor via a bus, wherein the E/D engine selectively operates in a first mode and a second mode, wherein, for the first mode, an E/D engine output is provided to the bus, wherein, for the second mode, the E/D engine output is not provided to the bus and is accessible only to the E/D engine; wherein an input key selectively used with the first mode is diversified via exclusive or (“XOR”) with a non-null value and wherein the diversified key is used as an input key for the E/D engine during the second mode; and wherein, during the second mode, an application key derived by the E/D engine is stored in a localized secure storage that forms part of a feedback loop between an output line of the E/D engine and a key input line of the E/D engine.