Patent ID: 8384635

Claim:
A gamma voltage generator adapted in a source driver, wherein the gamma voltage generator comprises: a first arithmetic circuit to receive a first gamma reference voltage GMAR 1 and two first tuning voltages VT 11 and VT 12 to supply a first reference voltage VR 1 , wherein the first arithmetic circuit is a first operational amplifier having two first inputs, in which one of the first inputs receives one of the first tuning voltages VT 11 or VT 12 and a feedback of the first reference voltage VR 1 and the other one of the first inputs receives the first gamma reference voltage GMAR 1 and the other one of the first tuning voltages VT 11 or VT 12 , the first reference voltage VR 1 is the arithmetic operation result of the first gamma reference voltage GMAR 1 and the first tuning voltages VT 11 and VT 12 ; a first multiplexer connected between the first arithmetic circuit and the first tuning voltages to select the order of the two first tuning voltages in arithmetic operations such that the arithmetic operation result is either VR 1 =GMAR 1 −VT 11 +VT 12 or VR 1 =GMAR 1 −VT 12 +VT 11 ; a second arithmetic circuit to receive a second gamma reference voltage GMAR 2 and two second tuning voltages VT 21 and VT 22 to supply a second reference voltage VR 2 , wherein the second arithmetic circuit is a second operational amplifier having two second inputs, in which one of the second inputs receives one of the second tuning voltages VT 21 or VT 22 and a feedback of the second reference voltage VR 2 and the other one of the second inputs receives the second gamma reference voltage GMAR 2 and the other one of the second tuning voltages VT 21 or VT 22 , the second reference voltage VR 2 is the arithmetic operation result of the second gamma reference voltage GMAR 2 and the second tuning voltages VT 21 and VT 22 ; a second multiplexer connected between the second arithmetic circuit and the second tuning voltages to select the order of the two second tuning voltages in arithmetic operations such that the arithmetic operation result is either VR 2 =GMAR 2 −VT 21 +VT 22 or VR 2 =GMAR 2 −VT 22 +VT 21 ; and a gamma resistor string having a plurality of resistors, the two ends of the gamma resistor string are coupled to the first and the second arithmetic circuits to receive the first reference voltage VR 1 and the second reference voltages VR 2 respectively, wherein the gamma resistor string generates a plurality of gamma voltages to a DAC of the source driver, wherein each of the plurality of gamma voltages is corresponding to a division of the difference between the first reference voltage VR 1 and the second reference voltages VR 2 .