Patent ID: 7436196

Claim:
An apparatus that measures power consumption within an integrated circuit chip, comprising: a test structure located on the integrated circuit chip which includes: one or more gates which receive power from a power source, wherein each gate has a different drive strength; wherein the output of each gate is coupled to a load through a corresponding switch; a current-measuring mechanism coupled to the power source which measures the current consumed by the gates; wherein when a specific switch is activated, the output of a corresponding gate is coupled to the load, thereby causing the corresponding gate to drive the load, wherein the current consumed by the corresponding gate is measured by the current-measuring mechanism, and wherein the measured current can be used to determine the power consumption of the corresponding gate while driving the load; and a modeling mechanism which produces parameters for a model for the dynamic power consumption of the integrated circuit chip by measuring the power consumed by test structures at specific locations within the integrated circuit chip.