Patent ID: 7283005

Claim:
A clock-pulse generator, comprising: a first ring oscillator comprising an odd number of inverting elements, a first delay element and an output terminal, the first delay element being capable of responding to a pulse at its input with a time delay with respect to an edge of the input pulse and substantially without time delay with respect to the other edge of the input pulse; a second ring oscillator comprising an odd number of inverting elements, a second delay element and an output terminal connected to the output terminal of the first oscillator, the second delay element being capable of responding to a pulse at its input with a time delay with respect to an edge of the input pulse and substantially without delay time with respect to the other edge of the input pulse; and a bistable logic circuit having an output terminal connected to the output terminals of the first and the second oscillators, wherein at least one of the inverting elements of the first oscillator and at least one of the inverting elements of the second oscillator form part of the bistable logic circuit.