Patent ID: 8924636

Claim:
A semiconductor memory device comprising: a nonvolatile semiconductor memory configured to include a plurality of physical blocks, the physical blocks being units of data erasing; and a controller configured associate the physical blocks with a logical block, the controller being configured to manage the physical blocks, wherein the controller includes: a block managing unit configured to manage, when a bad block is generated among the physical blocks, the logical block as a defective logical block, the defective logical block being associated with a plurality of physical blocks other than the bad block; a first calculating unit configured to count a number of free blocks, the free blocks being unused logical blocks in the nonvolatile semiconductor memory; a second calculating unit configured to convert a capacity of a logical block in the nonvolatile semiconductor memory into a first management size, the first management size being a size equal to or smaller than a size of a physical block, the first management size being a size larger than a size of a sector, the second calculating unit being configured to calculate a number of pieces of usable data of the first management size; and a failure determining unit configured to determine that a failure has occurred, the failure determining unit being configured to change a mode to a failure mode, when at least one of a first condition and a second condition is satisfied, the first condition being a condition in which the counted number of free blocks is less than a first threshold, the second condition being a condition in which the calculated number of pieces of data of the first management size is less than a second threshold.