Patent ID: 7378327

Claim:
A method for fabricating a junction varactor, comprising: providing a substrate having thereon an ion well of first conductivity type; forming first and second gate fingers across said ion well, wherein said first and second gate fingers are substantially parallel to one another; forming a central lightly doped region of a second conductivity type in said ion well between said first and second gate fingers; forming sideward lightly doped regions of said first conductivity type in said ion well at sides of said first or second gate finger opposite to said central lightly doped region; forming spacers on sidewalls of said first and second gate fingers; implanting a central heavily doped region of said second conductivity type into said ion well between said first and second gate fingers; and implanting, in a self-aligned fashion, sideward heavily doped regions of said first conductivity type into said sideward lightly doped regions.