Patent ID: 6844228

Claim:
A manufacturing method of a semiconductor device comprising the steps of: (a) forming an element isolation insulating film in a main surface of a semiconductor substrate; (b) forming a gate insulating film on said main surface of said semiconductor substrate in an element forming region defined by said element isolation insulating film; (c) forming a semiconductor film on said element isolation insulating film and on said gate insulating film; (d) forming a resistance element on said element isolation insulating film and forming a gate electrode on said gate insulating film by patterning said semiconductor film; (e) forming a mask material so as to cover said resistance element; (f) forming a first source-drain region in said main surface of said semiconductor substrate in said element forming region by ion-implanting first impurities of a first conductivity type with said mask material as an implantation mask; (g) forming a sidewall spacer on a side surface of said resistance element, said step (g) being executed after said step (f); (h) by ion-implanting second impurities of said first conductivity type, implanting said second impurities into said resistance element and forming a second source-drain region in said main surface of said semiconductor substrate in said element forming region, said step (h) being executed after said step (g); and (i) performing a thermal treatment to activate said second impurities.