Patent ID: 6861323

Claim:
A method for forming a heterojunction bipolar transistor, comprising: forming an epitaxial layer of a first conductivity type on a semiconductor substrate; forming a first polysilicon layer of a second conductivity type directly on the epitaxial layer; forming a first dielectric layer on the first polysilicon layer, wherein the first polysilicon layer and the first dielectric layer include an opening for exposing a portion of the top surface of the epitaxial layer, the opening being formed by masking and etching of the first dielectric layer and the first polysilicon layer; growing selectively a silicon germanium layer in the opening, wherein the silicon germanium layer is grown on the top surface of the epitaxial layer and on the sidewall of the first polysilicon layer exposed by the opening; forming a spacer along the sidewall of the silicon germanium layer and the sidewall of the first dielectric layer in the opening; and forming a second polysilicon layer of the first conductivity type over the opening, wherein the second polysilicon layer overlies the first dielectric layer and the spacer and is in electrical contact with the silicon germanium layer.