Patent ID: 7602005

Claim:
A memory device comprising: a substrate including closely spaced apart trenches that extend in a first direction to define closely spaced apart pedestals therebetween that extend in the first direction, a respective pedestal including opposing sidewalls and a pedestal top therebetween, the trench having first and second sidewalls opposite to each other; a plurality of closely spaced apart bit lines in the substrate having a linear shape that extend in a second direction substantially perpendicular to the first direction across the spaced apart trenches and across the pedestals therebetween and that extend in a respective pedestal along the opposing sidewalls and along the pedestal top; a plurality of closely spaced apart electrodes on the plurality of opposing sidewalls that extend in the first direction and that are thicker remote from the pedestal tops than adjacent the pedestal tops, wherein a first electrode of the electrodes is on the first sidewall of the trench, a second electrode of the electrodes is on the second sidewall of the trench, and the first and second electrodes are spaced apart from each other; and a plurality of memory cells located at intersections of the bit lines and the electrodes.