Patent ID: 8629387

Claim:
An integrated circuit for generating image data, the integrated circuit comprising: a focal-plane array of unit cells, each unit cell to store charge based on detected photons; a controller configurable to operate in both frame-sum mode and time-delay integration (TDI) mode; and a digital memory structure coupled to the controller by a bus, the memory structure having a plurality of storage locations, each storage location to store a digital value and being individually addressable by the controller, each of the unit cells being associated with a corresponding storage location, wherein the controller is configured to: determine a digital value based on the stored charge from at least some of the unit cells; add the determined digital value to an existing value in the corresponding storage location when operating in frame-sum mode; and add the determined digital value to an existing value in a shifted storage location when operating in TDI mode, the shifted storage location being a storage location that corresponds to a unit cell shifted by one or more unit cells in a direction within the focal-plane array from the corresponding unit cell, the direction configurable by the controller to be any direction within the focal-plane array including an x-direction, a y-direction and a diagonal direction, wherein during TDI mode, the storage location for storing the digital value determined from a unit cell is shifted by a number of pixels that is based on a speed of an object being observed in relation to a field-of-view (FOV) of the focal-plane array, the number of pixels being up to a size of the focal-plane array, and wherein the number of pixels and the direction to shift are to compensate for motion, including rotational motion and linear motion, of an object being observed.