Patent ID: 7036104

Claim:
A method of optimizing a tree to meet timing constraints, said tree comprising a source node interconnected by wires to a plurality of sink nodes through a plurality of internal nodes, said method comprising the steps of: inserting buffers at selected ones of said internal nodes of said tree to form a plurality of subtrees; and, sizing the wires of said plurality of subtrees according to a wire code for each subtree, wherein each wire of a subtree has a same wire code, said wire code defines a) a layer assignment code specifying a layer for said wire and b) a width code for a wire assigned to a layer, said layer assignment code specifies a layer for said wire and said width code specified a width for said wire, and wherein said layer assignment code includes a horizontal layer code and a vertical layer code, and said width code includes a horizontal width code defining a width for a wire in said horizontal layer and a vertical width code defining a width for a wire in said vertical layer.