Patent ID: 6986082

Claim:
A testing system for a semiconductor memory device, used for testing the semiconductor memory device, the testing system comprising: a microprocessor, wherein when a start signal is received by the microprocessor, a clock signal is output from the microprocessor and transmitted to the semiconductor memory device so that a data storing signal is output from the semiconductor memory device to the microprocessor, wherein when the data storing signal is received, the data storing signal is tested and compared by the microprocessor, and a testing result signal is output; and a result sorting and display device, used to output the start signal to the microprocessor, receive the result signal, and sort the result signal so as to display whether data stored by the semiconductor memory device is correct, wherein, the data storing signal is tested and compared by the microprocessor simultaneously in a time interval allocated for the clock signal being transmitted from the microprocessor to the semiconductor memory device.