Patent ID: 7592646

Claim:
A semiconductor device, comprising: a gate for a Metal-Insulator Semiconductor (MIS) transistor on a support substrate; a buried insulating film formed in one part of the substrate, the buried insulating film being longer in a gate-width direction than in a gate-length direction of the gate for the MIS transistor; a first semiconductor layer of strained SiGe formed on the buried insulating film and having lattice strain in the gate-width direction and lattice strain relaxed in the gate-length direction; a second semiconductor layer covering both sides of the buried insulating film and both sides of the first semiconductor layer, said sides being opposite in the gate-length direction; a gate electrode for the MIS transistor formed on the first semiconductor layer with a gate insulating film being formed between the gate electrode and the first semiconductor layer; and a source region and a drain region for the MIS transistor which are formed in the second semiconductor layer, wherein the second semiconductor layer is an Si layer.