Patent ID: 7203225

Claim:
An interface device for phase controlling a data signal wherein the data signal is transmitted from a data source to said interface device, comprising: a data signal input; a data signal output; a clock input; a clock output; a latch having a latch input connected with the data signal input, a latch output connected with the data signal output, and a latch clock input connected with the interface clock input; a phase shifter having an input, an output, and a control input, wherein said phase shifter input is connected with the interface clock input, and said phase shifter output is connected with the interface clock output; and means for comparing a phase of a data sink clock, which is applied to said clock input of said latch, with a phase of a reference signal, wherein said means for comparing controls said phase shifter via the phase shifter control input in dependency on said phase comparison; wherein said data signal is used as said reference signal and said means for comparing is a data-clock phase detector having a first input connected with said data signal input, a second input connected with said data sink clock of said interface device, and an output connected with the control input of said phase shifter.