Patent ID: 8117568

Claim:
A method comprising: receiving a first design of an integrated circuit, where the first design comprises a prefill and prehole impacted design; using, by a processor, a simplified model to predict at least one physical characteristic of the first design of the integrated circuit which results from a processing step to be used during manufacture of the integrated circuit, wherein the simplified model is derived from simulations performed using a comprehensive simulation program used to model the physical characteristic, where using the simplified model to predict the at least one physical characteristic comprises: partitioning the first design of the integrated circuit into grid tiles; calculating for each of at least one of the grid tiles tile metrics which reflect design patterns of the tile; classifying the each of the at least one of the grid tiles into classes based on the tile metrics; and modeling independently for the each of the at least one of the grid tiles, based on the simplified model, the physical characteristic of the each of the at least one of the grid tiles, where the predicted physical characteristic predict the impact of at least one of: fill and hole insertions, where the simplified model comprises a plurality of separate models and an individual separate model is used for each class to predict the at least one physical characteristic of a tile of the class; predicting performance of the integrated circuit using the predicted physical characteristic; and adjusting the first design of the integrated circuit in dependence on the performance prediction.