Patent ID: 7977704

Claim:
A semiconductor device having an insulated gate semiconductor element comprising: a semiconductor substrate having a first conductive type; a drift layer having a second conductive type and disposed on the substrate; a base layer having the first conductive type and disposed on the drift layer; a plurality of trenches penetrating the base layer and reaching the drift layer, wherein the base layer is divided into a plurality of base parts by the plurality of trenches, and each trench extends along with a first direction; an emitter region having the second conductive type, disposed in one of the base parts, and contacting a sidewall of a corresponding trench; a gate element disposed in each trench via an insulation film; an emitter electrode electrically coupled with the emitter region; and a collector electrode disposed on a backside of the substrate, wherein the collector electrode is opposite to the drift layer, wherein each base part extends in the first direction so that the plurality of the base parts are in parallel to each other, wherein the one of the base parts provides a channel layer, in which the emitter region is disposed, and another one of the base parts provides a float layer, in which no emitter region is disposed, wherein the channel layer and the float layer are repeatedly arranged in a predetermined order in such a manner that a ratio between the number of the channel layer and the number of the float layer is constant, wherein the gate element includes a gate electrode and a dummy gate electrode, wherein the gate electrode is disposed in the corresponding trench contacting the channel layer, and the dummy gate electrode is disposed in another trench contacting the float layer, wherein the float layer includes a first float layer adjacent to the channel layer via the gate electrode and a second float layer apart from the channel layer via the dummy gate electrode, wherein the dummy gate electrode and the first float layer are electrically coupled with a first float wiring, which extends in a second direction perpendicular to the first direction and is disposed on the base layer, and wherein the dummy gate electrode is electrically isolated from the second float layer.