Patent ID: 8254176

Claim:
An electrically erasable programmable read-only memory (EEPROM) device comprising: an EEPROM cell having first, second and third control voltage terminals which perform operations for programming, reading and erasing data, respectively; a first transistor configured to supply a programming operation voltage CG to the first control voltage terminal of the EEPROM cell during the programming operation; a second transistor configured to supply a ground voltage to the first control voltage terminal of the EEPROM cell, the data of which will not be programmed during the programming operation; a third transistor connected to the second control voltage terminal and turned on by an address selected for reading the data of the EEPROM cell during the reading operation; and a logic gate configured to receive a signal enabled by a selected address and data to be programmed and supplies an output signal to the gates of the first transistor and the second transistor, respectively.