Patent ID: 8612664

Claim:
A memory management process for optimizing access to a central memory located within a processing system comprising a set of specific units communicating with each other through said memory, said process comprising: a) arranging in a local memory at least a first and a second bank of storage (A, B) for temporary object exchange between a first data object producer and a second data object consumer; b) arranging an address translation process for mapping a real address of an object to be stored within said banks into an address of each bank; c) receiving one object produced by said producer and dividing it into stripes of reduced size; d) storing a first stripe into said first bank; e) storing a next stripe into said second bank while a preceding stripe is read by said object consumer; f) storing a further next stripe into said first bank again while the preceding stripe is read by said object consumer; g) repeating f) and d) until all stripes composing said data objects have been processed; and h) arranging an interlocking mechanism for locking a writing and a reading process in said banks to ensure said producer has enough space to forward further data and said receiver has data to read.