Patent ID: 7351664

Claim:
In a plasma processing chamber, a method for etching a substrate having thereon a silicon layer, said plasma processing chamber having a bottom electrode, said substrate being disposed on said bottom electrode during said etching, comprising: performing a main etch step; terminating said main etch step when a predefined etch depth into said silicon layer is achieved, said predefined etch depth being at least 70 percent of a thickness of said silicon layer and being at most 95 percent of said thickness of said silicon layer; performing an overetch step, said overetch step including a first process step, a second process step, and a third process step, said first process step employing a first process recipe, said second process step employing a second process recipe, said third process step employing a third process recipe, said first process recipe including a first gas mixture and being configured to perform using a first bottom bias voltage level applied to said bottom electrode, said second process recipe including a second gas mixture and being configured to perform using a second bottom bias voltage level applied to said bottom electrode that is higher than said first bottom bias voltage level, said third process recipe including a third gas mixture and being configured to perform using a third bottom bias voltage level applied to said bottom electrode that is lower than said second bottom bias voltage level, wherein said first process step, said second process step, and said third process step are alternately performed a plurality of times, and wherein said first gas mixture, said second gas mixture, and said third gas mixture are different; and terminating said overetch step after said silicon layer is etched through.