Patent ID: 8340087

Claim:
A storage system comprising: a plurality of channel adapters coupled to a host computer; a plurality of switches each coupled to another one of the plurality of switches by a plurality of paths, and each switch including for each path a send buffer and a receive buffer; a plurality of cache memory adapters; and a controller having a memory which stores a transfer rule for transferring a packet among the channel adapters, the switches, and the cache memory adapters, and controlling the transfer of the packet in accordance with the transfer rule; wherein a first path connects between a first switch and a second switch, and a second path connects between the first switch and the second switch, wherein the packet is one of a command packet and a reply packet, and wherein the transfer rule regulates a transfer direction of each of the paths to be one way and specifies that the command packet transfer direction of the first path and the command packet transfer direction of the second path are opposite directions, and that a reply packet is transferred in a direction opposite to the transfer direction of a command path along the path on which the command packet was transferred.