Patent ID: 7586160

Claim:
A semiconductor integrated circuit in which a CMOS transistor is formed on a first conductivity type semiconductor film provided on a first conductivity type supporting substrate through an embedded insulating film, the semiconductor integrated circuit comprising: a second conductivity type source region formed in the semiconductor film, the source region having an ultra-shallow high-density second conductivity type source extension region at a boundary with a channel region, a low-density second conductivity type source extension region under the ultra-shallow high-density second conductivity type source extension region, and a high-density second conductivity type source extension region under the low-density second conductivity type source extension region; a second conductivity type drain region formed in the semiconductor film, the drain region having an ultra-shallow high-density second conductivity type drain extension region at a boundary with the channel region, a low-density second conductivity type drain extension region under the ultra-shallow high-density second conductivity type drain extension region, and a high-density second conductivity type drain extension region under the low-density second conductivity type drain extension region; a gate insulating film formed on an upper surface of the semiconductor film; and a gate electrode formed on an upper surface of the gate insulating film.