Patent ID: 8561031

Claim:
A computer implemented method for enhancing synchronization coverage for a logic code, the method comprising: tracking, using a computing mechanism, whether one or more code sections in the logic code are blocked by at least another code section in the logic code, or whether one or more code sections in the logic code are blocking at least another code section in the logic code, during one or more test runs; and including one or more delay mechanisms in the logic code to introduce a delay in execution of a first code section in the logic code, wherein length of introduced delay is dependent on whether the first code section was blocked by a second code section or whether the first code section was blocking the second code section, wherein the delay is introduced before acquiring a lock on the first code section, and wherein the introduced delay is less than a threshold time period, if the first code section was blocked by the second code section prior to acquiring the lock on the first code section.