Patent ID: 8022460

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate, the semiconductor substrate comprising a pair of impurity regions and a channel formation region between the pair of impurity regions; a pair of field oxide films embedded in the semiconductor substrate, the pair of impurity regions and the channel formation region being between the pair of field oxide films; a floating gate electrode over the channel formation region with a first insulating layer interposed therebetween, and a control gate electrode over the floating gate electrode with a second insulating layer interposed therebetween, wherein the control gate electrode is across an edge of the floating gate electrode, wherein a portion of the control gate electrode outside the edge of the floating gate electrode is overlapped with one of the pair of impurity regions, wherein the first insulating layer is interposed between the portion and the one of the pair of impurity regions and extended to overlap with one of the pair of field oxide films, wherein the floating gate electrode includes at least a first layer in contact with the first insulating layer, and a second layer over the first layer, wherein the first layer is formed of a semiconductor material, wherein a band gap of the first layer is smaller than a band gap of the channel formation region, and wherein the second layer is formed of a material selected from the group consisting of a metal, a metal alloy, and a metal compound.