Patent ID: 7683466

Claim:
A chip packaging overflow proof device comprising: a substrate, one or a plurality of chip disposed on the substrate; a packaging base to accommodate the substrate and the chip; a circuit disposed on the side of the substrate and connected to the chip; a socket disposed on the side of the packaging base; a lid inserted into the socket; a retaining wall disposed on the packaging base at where closer to the socket; a first cable-terminating hole disposed at where between the socket and the lid for the circuit to penetrate through; and a second cable-terminating hole disposed on the retaining wall; and an overflow space being defined between the retaining wall and the socket at a level lower than that of the second cable-terminating hole, the overflow space being integrated with the packaging base, wherein any squeeze-out of a colloid packaging of the chip being admitted into the overflow space, wherein a trough is disposed on the retaining wall, a first covering portion extending from the lid enters into the overflow space and a second covering portion extending from the lid enters into the trough, wherein the second cable-terminating hole is contained in the first slot with its opening facing upward and disposed on the bottom of the trough and in a second slot with its opening facing downward and disposed on the bottom of the lid.