Patent ID: 8278179

Claim:
A method of forming a semiconductor structure, the method comprising: providing a semiconductor substrate comprising a first fin in a PMOS region and a second fin in an NMOS region; forming a p-type FinFET in the PMOS region comprising: forming a first gate stack on the first fin; forming a first thin spacer on a sidewall of the first gate stack; performing a first lightly doped source/drain (LDD) implantation in the first fin; after the step of performing the first LDD implantation, forming a recess in the first fin using the first thin spacer as a mask; epitaxially growing a first epitaxy region in the recess; and after the step of epitaxially growing the first epitaxy region, forming a first main spacer on a sidewall of the first thin spacer; and forming an n-type FinFET in the NMOS region comprising: forming a second gate stack on the second fin; forming a second thin spacer on a sidewall of the second gate stack; performing a second LDD implantation in the second fin; epitaxially growing a second epitaxy region on exposed portions of a top surface and sidewalls of the second fin, wherein the lowest point of the first epitaxy region is lower than the lowest point of the second epitaxy region; and after the step of epitaxially growing the second epitaxy region, forming a second main spacer on a sidewall of the second thin spacer.