Patent ID: 7755437

Claim:
A phase locked loop circuit comprising: a voltage controlled oscillator comprising an output which outputs a signal; a phase detector coupled to the output of the voltage controlled oscillator, the phase detector being configured to compare a phase of a reference signal with a phase of the signal output from the voltage controlled oscillator; and a loop filter coupled to the voltage controlled oscillator and the phase detector, wherein the loop filter has a locking mode of operation for establishing initial locking of the phase of the signal output from the voltage controlled oscillator to the phase of the reference signal and a tracking mode of operation for adjusting the phase of the signal output from the voltage controlled oscillator to track the phase of the reference signal, the loop filter comprising: a plurality of capacitors, wherein the plurality of capacitors comprises a first capacitor is coupled to a charge pump and a second capacitor is coupled to the voltage controlled oscillator; a resistor coupled to the plurality of capacitors, wherein an input signal is filtered; a delay timer; logic coupled to the resistor, the logic being configured to change a topology of the loop filter based on the timer, wherein the loop filter has a first topology used in a locking mode of operation and a second topology used in a tracking mode of operation; a switch with a single pole coupled to the resistor, a first throw, and a second throw; and an operational amplifier having a positive input coupled to the first throw of the switch and also coupled to the second capacitor, a negative input, and an output fed back to the negative input and also coupled to the second throw of the switch.