Patent ID: 7911047

Claim:
A semiconductor device, comprising: a semiconductor chip; a package substrate that comprises, in a surface side thereof, a recessed portion in which the semiconductor chip is housed, with electrode pads that are electrically connected to electrodes of the semiconductor chip being formed inside the recessed portion; a plurality of penetrating electrode portions disposed within the package substrate, each comprising a penetrating electrode that extends through the package substrate, and a terminal-use wire disposed on an end of a respective penetrating electrode and that is formed on a front surface of the package substrate and is electrically connected to a respective electrode pad; external connection pads that are formed on a back surface of the package substrate and are electrically connected to the electrode pads; a sealing resin portion that comprises a grinded surface that is parallel to the front surface of the package substrate and is formed by grinding, and seals at least the semiconductor chip by a sealing resin, an upper surface of the sealing resin portion being at a same level as an upper surface of the respective terminal-use wires and being at a level that is above a level of the front surface of the package substrate; rewiring pads that are formed on the grinded surface of the sealing resin portion; and connecting wires that are formed on the grinded surface of the sealing resin portion and electrically interconnect the terminal-use wires and the rewiring pads.