Patent ID: 7633421

Claim:
An A/D converter comprising: a plurality of A/D conversion circuits; an input selection section for selecting any one of the plurality of A/D conversion circuits that is not executing A/D conversion to supply analog amounts obtained by sample-holding an input signal to the selected A/D conversion circuit; an output selection section for selecting any one of the plurality of A/D conversion circuits that is not executing A/D conversion to output digital amounts obtained from the selected A/D conversion circuit, wherein each of the plurality of A/D conversion circuits comprises: an input memory portion having a plurality of analog memory elements for storing therein analog amounts, the input memory portion storing the supplied analog amounts in the plurality of analog memory elements sequentially; an A/D conversion portion having a plurality of A/D conversion elements for converting the analog amounts respectively stored in the plurality of analog memory elements to digital amounts; and a shift output portion having a plurality of registers respectively receiving the digital amounts from the plurality of A/D conversion elements to hold the digital amounts therein, the shift output portion shifting and outputting the digital amounts held in the plurality of registers.