Patent ID: 8900989

Claim:
A method of fabricating a semiconductor device, comprising: providing a substrate; forming a patterned first dielectric layer on the substrate, the patterned first dielectric layer having a plurality of first openings; filling a first conductive material in the plurality of first openings, the first conductive material defining first conductive layer structures; forming a mask layer over the first dielectric layer and the first conductive layer structures, wherein the mask layer includes portions that are each disposed over a respective one of the first conductive layer structures, a width of each of the portions of the mask layer being wider than a width of a respective one of the first conductive layer structures; forming an energy removable film (ERF) on sidewalls of each of the portions of the mask layer; forming a second dielectric layer over the energy removable film, the portions of the mask layer, and the first dielectric layer; removing the portions of the mask layer to leave behind a plurality of second openings; filling a second conductive material in the plurality of second openings, the second conductive material defining second conductive layer structures; forming a ceiling layer on the second conductive layer structures, the energy removable film, and the second dielectric layer; and applying energy to the substrate to at least partially remove the energy removable film and form air gaps therefrom.