Patent ID: 7163856

Claim:
A method of fabricating an LDMOS transistor and a CMOS transistor together on a substrate, the method comprising: implanting, into a surface of a substrate, a first impurity region with a first volume and a first surface area, the first impurity region being of a first type; implanting, into the surface of the substrate, a second impurity region; forming a gate oxide for a gate of the LDMOS transistor between a source region and a drain region of the LDMOS transistor; covering the gate oxide with a conductive material; implanting, into a source region of the LDMOS transistor, a third impurity region with a second volume and a second surface area in the first surface area of the first impurity region, the third impurity region being of an opposite second type relative to the first type, the third impurity region being self aligned with respect to the gate of the LDMOS transistor; forming a gate oxide for a gate of the CMOS transistor between a source region and a drain region of the CMOS transistor, the gate oxide of the CMOS transistor being formed after implantation of the third impurity region; covering the gate oxide of the CMOS transistor with a conductive material; implanting, into the source region of the LDMOS transistor, a fourth impurity region with a third volume and a third surface area and a fifth impurity region with a fourth volume and a fourth surface area in the second surface area of the second impurity region, the fourth impurity region being of the first type, the fifth impurity region being of the opposite second type; implanting, into the drain region of the LDMOS transistor, a sixth impurity region with a fifth volume and a fifth surface area, the sixth impurity region being of the first type; implanting, into a source region of the CMOS transistor, a seventh impurity region, the seventh impurity region being in the second impurity region; and implanting, into a drain region of the CMOS transistor, an eighth impurity region, the eighth impurity region being in the second impurity region.