Patent ID: 7319624

Claim:
A memory built in self test (MBIST) circuit, comprising: a plurality of routing boxes, each of the routing boxes coupled to a memory block and at least one another routing box, each of the routing boxes receiving a test input signal from an immediately adjacent routing box and transmitting a data output signal from the corresponding memory block to the immediately adjacent routing box, each of the routing boxes transmitting one of the test input signal and a system input signal to the corresponding memory block in response to a test control signal, and transmitting one of a test output enable signal and a system output enable signal to the corresponding memory block in response to the test control signal; and a test controller coupled to one of the routing boxes for providing the test input signal to the coupled routing box and receiving the data output signal from the coupled routing box, and for verifying the data output signal based on the test input signal, the test controller also providing the test control signal and the test output enable signal to all the routing boxes.