Patent ID: 8412385

Claim:
A system, comprising: a processor configured to: determine a real time value of an operating condition; compare the real time value of the operating condition to a reference value; based on the comparison, determine a manner in which to adjust input power to maintain the operating condition at or near the reference value; and generate a control signal to control input power based on the determination of the manner in which to adjust input power; and an interface configured to output the control signal; wherein the operating condition comprises a phase shift of a critically delayed version of a current system clock relative to a non-delayed version of the current system clock, wherein the reference value comprises a predetermined amount of phase shift, and wherein to determine a manner in which to adjust input power comprises to determine to decrease input power if the real time value of the phase shift of the critically delayed version of the current system clock relative to the non-delayed version of the current system clock is less than the predetermined amount of phase shift.