Patent ID: 8527838

Claim:
A memory controller comprises: a memory control processing module including: an input/request unit; a memory processor unit; a memory interface; temporary memory; and an output unit, wherein: the input/request unit receives a memory access request regarding a data segment and forwards the memory access request to the memory processor unit; the memory processor unit is operable to: interpret the memory access request to determine whether: an error coding dispersal function is to be applied to the data segment to produce the error coded processed data segment; or the error coding dispersal function is to be applied to the error coded processed data segment to reconstruct the data segment; or the error coding dispersal function is not to be applied to the data segment; or the error coding dispersal function is not to be applied to the error coded processed data segment; and interpret the memory access request to determine a destination of the data segment or of the error coded processed data segment, wherein the destination is one of a distributed storage processing module, the memory interface, the temporary memory, and the output unit; generate a data routing signal based on the interpreting of the memory access request; and the input/request unit forwards the data segment or the error coded processed data segment to the destination in accordance with the data routing signal; and the distributed storage processing module operable to: perform the error coding dispersal function on the data segment to produce an error coded processed data segment; and send the error coded processed data segment to the memory control processing module.