Patent ID: 7700455

Claim:
A method of forming an isolation structure in a semiconductor device, the method comprising: preparing a semi-finished substrate including a trench; forming pad patterns over the substrate while exposing the trench; forming an oxide layer over an inside of the trench; forming a multiple layer structure of liner layers over the oxide layer and over the pad patterns; forming an insulation layer over the multiple layer structure such that the insulation layer fills the inside of the trench; and planarizing the insulation layer until the substrate is exposed, wherein forming the multiple layer structure of the liner layers comprises: forming a nitride layer over the oxide layer and the pad patterns; and oxidizing a portion of a thickness of the nitride layer that is less than an entire thickness of the nitride layer from a top surface of the nitride layer to form an oxynitride layer on the nitride layer, wherein the insulation layer is formed under a temperature lower than that of forming the oxynitride layer.