Patent ID: 7821062

Claim:
A field effect transistor, comprising a source region being doped with doping atoms of a first conductivity type; a drain region being doped with doping atoms of the first conductivity type; a first well region, in which the drain region is arranged, the first well region being doped with doping atoms of the first conductivity type; a channel region between the source region and the drain region, a portion of the channel region being located in the first well region; a gate insulation layer above the channel region, the channel region extending over the entire length of the gate insulation layer or as far as an insulator structure formed between the source region and the drain region; a gate region above the gate insulation layer; at least a part of the portion of the channel region which is located in the first well region being doped with doping atoms of a second conductivity type, the second conductivity type being a different conductivity type than the first conductivity type; wherein the doping atoms of the second conductivity type is implanted into the part of the portion of the channel region using a process step for setting the field effect transistor threshold voltage; wherein the part of the channel region which is doped with doping atoms of the second conductivity type is formed in a surface region of the channel region; and wherein the surface region extends from a region arranged at a distance of at least 5 nm from the upper interface of the channel region to a maximum of 40 nm into the substrate in or on which the field effect transistor is formed.