Patent ID: 7969337

Claim:
A data processing circuit, the circuit comprising: an analog to digital converter, wherein the analog to digital converter is operable to sample an analog data input at a sampling phase governed at least in part by a coarse control, and wherein the analog to digital converter is operable to provide a series of digital samples; a digital interpolation circuit, wherein the digital interpolation circuit is operable to interpolate between a subset of the series of digital samples based at least in part on a fine control; a phase error circuit, wherein the phase error circuit is operable to calculate a phase error value; a phase adjustment control circuit, wherein the phase adjustment control circuit is operable to determine the coarse control and the fine control based at least in part on the phase error value; and a data processing circuit operable to receive a digital data input derived from the digital interpolation circuit and to provide a processed output; wherein the phase error circuit is operable to receive the digital data input derived from the digital interpolation circuit and the processed output, and wherein the phase error circuit is operable to calculate the phase error value based at least in part on a difference between the digital data input derived from the digital interpolation circuit and the processed output.