Patent ID: 8655188

Claim:
A driver circuit comprising: a plurality of delay circuits that delay branched driving signals; and an inverter that inverts at least one of the branched driving signals, wherein at least one of the plurality of delay circuits is at least one variable delay circuit delaying a variable amount of delay, and an output driving signal is output by combining the at least one inverted signal of the branched driving signal output via the inverter and at least one non-inverted signal of the branched driving signals output from the delay circuits, wherein the at least one variable delay circuit includes: a first amplifier circuit, connected to a voltage supply and a first current source, that variably amplifies one of branched driving signals; and a second amplifier circuit, connected to the voltage supply and a second current source, that variably amplifies one of the branched driving signals output from the first amplifier circuit and feeds the amplified driving signal back to the first amplifier circuit.