Patent ID: 7178116

Claim:
A method for designing a semiconductor integrated circuit, the method comprising: performing logic design of the semiconductor integrated circuit to generate logic circuit data; and performing physical design of the semiconductor integrated circuit using the logic circuit data, wherein said performing logic design includes: generating the logic circuit data by inputting specification data of the semiconductor integrated circuit, generating RTL design data based on the specification data, and generating a net list based on the RTL design data through logic synthesizing; estimating whether the logic circuit data is appropriate for use in said performing physical design before said performing physical design is started; and feeding back a result of said estimating to reflect the estimating result in the logic circuit data, wherein said feeding back is performed prior to the physical design and includes feeding back the result of said estimating to a selected one of said inputting specification data, said generating RTL design data, and said generating a net list, in accordance with the result of said estimating.