Patent ID: 7045886

Claim:
A semiconductor device comprising: a first substrate with wiring formed thereon; a second substrate mounted above said first substrate with a conductive plug buried in said second substrate to penetrate between upper and lower surfaces thereof; a plurality of semiconductor chips mounted above said second substrate and having a terminal electrode electrically connected to said first substrate through the conductive plug of said second substrate; a resin buried in a space between adjacent ones of said plurality of semiconductor chips; and a bump disposed between said terminal electrode and said conductive plug, wherein said plurality of semiconductor chips include at least first and second adjacent neighboring semiconductor chips, first and second stacked ones of said plurality of semiconductor chips respectively vertically stacked above the first and second neighboring semiconductor chips, such that the first neighboring and first stacked semiconductor chips comprise a first laminate body and the second neighboring and the second stacked semiconductor chips comprise a second laminate body, and said resin is buried in an empty space between said first laminate body and said second laminate body; said semiconductor device further comprising additional resin contacting between the vertically stacked first and second neighboring and first and second stacked semiconductor chips, respectively, to seal a space therebetween.