Patent ID: 7667492

Claim:
An input buffer comprising: a threshold detector having an input for receiving an input signal, and having a threshold detector output for outputting a threshold crossing signal, wherein the threshold crossing signal is responsive to the input signal rising above a lower threshold, and responsive to the input signal falling below a higher threshold, wherein the lower threshold is less than the higher threshold; a first pulse generator having an input coupled to the threshold detector output, and having a first pulse generator output for outputting a first pulse having a pulse duration related to a signal propagation time through an inverter and having a second logic value in response to the threshold crossing signal rising above the lower threshold; a second pulse generator having an input coupled to the threshold detector output, and having a second pulse generator output for outputting a second pulse having a first logic value in response to the threshold crossing signal falling below the higher threshold; and a latch coupled to the first pulse generator output, and coupled to the second pulse generator output, and having a buffer output for outputting a buffered signal responsive to the first pulse and the second pulse.