Patent ID: 7589019

Claim:
A method of forming a memory cell array comprising: providing a semiconductor substrate including a surface; providing a plurality of first conductive lines extending in a first direction, wherein the first conductive lines have a pitch Bp that is measured as a distance between center positions of two adjacent first conductive lines; providing a plurality of second conductive lines; providing a plurality of memory cells, wherein each of the memory cells is at least partially formed in the semiconductor substrate and is accessible by addressing at least a corresponding one of the first conductive lines and at least a corresponding one of the second conductive lines; providing a plurality of supporting lines above the first and second conductive lines, wherein the supporting lines have a pitch Mp that is measured as a distance between center positions of two adjacent supporting lines; and providing a plurality of supporting contacts, wherein the first conductive lines are connected with corresponding ones of the supporting lines via the supporting contacts, and Mp is larger than Bp.