Patent ID: 8008710

Claim:
A non-volatile semiconductor storage device comprising a plurality of memory strings, each having a plurality of electrically rewritable memory cells and selection transistors connected in series, each of the memory strings comprising: a semiconductor layer having a plurality of columnar portion and a joining portion, the plurality of columnar portions extending in a vertical direction with respect to a substrate, the joining portion being formed to join lower ends of the plurality of columnar portions with a first direction taken as a longitudinal direction; an electric charge storage layer formed to surround side surfaces of the columnar portions; a plurality of first conductive layers with a plurality of stacked layers formed to surround side surfaces of the columnar portions and the electric charge storage layer, the first conductive layers functioning as control electrodes of the memory cells; a second conductive layer formed around the plurality of columnar portions aligned in the first direction via a gate insulation film, with the first direction taken as a longitudinal direction, the second conductive layer functioning as control electrodes of the selection transistors; and bit lines formed to be connected to the plurality of columnar portions, respectively, with a second direction orthogonal to the first direction taken as a longitudinal direction.