Patent ID: 8884379

Claim:
A method of generating strain in a semiconductor device, the method comprising: providing a first piezoelectric region above a substrate region of the semiconductor device and below a first active region of a first semiconductor circuit element so as to be mechanically coupled to said first active region of said first semiconductor circuit element; providing a second piezoelectric region above said substrate region and below a second active region of a second semiconductor circuit element so as to be mechanically coupled to said second active region of said second semiconductor circuit element, wherein said first piezoelectric region is electrically isolated from said second piezoelectric region by an isolation structure; connecting a supply voltage to a first end of said first piezoelectric region and to a first end of said second piezoelectric region; connecting ground potential to a second end of said first piezoelectric region and to a second end of said second piezoelectric region; activating said supply voltage to generate a first electric field in said first piezoelectric region so as to be aligned with a first current flow direction in said first active region, said first electric field inducing a tensile strain in said first active region along said first current flow direction; activating said supply voltage to generate a second electric field in said second piezoelectric region so as to be aligned with a second current flow direction in said second active region, said second electric field inducing a compressive strain in said second active region, wherein said first electric field and said second electric field have opposite directions; and establishing a first current flow in said first active region and a second current flow in said second active region.