Patent ID: 7961820

Claim:
An electronic device for generating a clock signal for an integrated circuit, the device comprising: at least two oscillators configured to generate a single clock signal at a clock output in response to an input signal and to operate in a mutually exclusive manner, the outputs of said oscillators being selectively connectable to said clock output; means for receiving a data pattern representative of a sequence of two or more frequencies at which said clock signal is required to be generated; means for causing an oscillator other than the oscillator generating the clock signal at the immediately previous frequency in said sequence to generate a clock signal at a next frequency in said sequence; means for causing the clock signal at the immediately previous frequency in said sequence to be disconnected from said clock output; and means for causing the clock signal at the next frequency in said sequence to be connected to said clock output; wherein the oscillator being caused to generate a clock signal at each frequency in said sequence is independent of the value of said each frequency.