Patent ID: 8848412

Claim:
A ternary content addressable memory (TCAM) comprising: at least one TCAM cell comprising: first and second memory bitcells configured to store first and second bit values representing a cell state comprising one of a first cell state, a second cell state and a mask cell state; a shared pair of bitlines shared by the first and second memory bitcells for accessing the first and second bit values stored by the first and second memory bitcells; a pair of search lines for inputting first and second search values representing a search state comprising one of a first search state, a second search state and a mask search state; compare circuitry configured to generate a match value indicating a result of comparing the search state of the first and second search values with the cell state of the first and second bit values; and a match line configured to output the match value; and access control circuitry configured, in response to a clock signal, to trigger a read access or write access to the first memory bitcell via the shared pair of bitlines during a first portion of a clock cycle of the clock signal, and to trigger a read access or write access to the second memory bitcell via the shared pair of bitlines during a second portion of said clock cycle of the clock signal.