Patent ID: 7590721

Claim:
A data switch comprising: a plurality of first processors, each first processor performing actions including receiving data frames transmitted to the data switch segmenting received data frames into segment payloads creating a segment from each segment payload by adding a segment header including a source identifier and a sequential sequence number, wherein the source identifier identifies the first processor and the sequence number identifies the segment payload's original location within the respective data frame a plurality of switch fabrics interconnecting the plurality of first processors to a second processor, the second processor comprising: a memory having blocks sized for storing data frames a reordering system that performs actions including extracting the segment header from each received segment using a portion of the sequence number as an index to obtain a memory block address for storing the segment payload into a block of the memory stripping the segment header from the segment and storing the segment payload in the memory using the memory block address determining when enough segment payloads are stored in the memory to form a complete data frame ready for transmission reassembling the stored segment payloads into the complete data frame and transmitting the complete data frame out of the data switch.