Patent ID: 8865597

Claim:
A method of exposing a semiconductor structure to multiple gases using a dual chamber, dual pressure device including first and second chambers and a connecting line connecting the first and second chambers together, the semiconductor structure including a layer of a dielectric material, and a TaN—Ta liner on the dielectric layer, and a copper layer on the TaN—Ta liner, and wherein a chemical mechanical polishing (CMP) process is used to polish the copper layer and said CMP process exposes portions of the TaN—Ta liner, the method comprising: placing the semiconductor structure in the second chamber of the dual chamber, dual pressure device; establishing a first pressure in the first chamber and a second pressure in the second chamber, said first pressure being greater than said second pressure; exposing the first chamber to a source of a first gas; using a first valve in the connecting line to expose the semiconductor structure in the second chamber to the first gas from the first chamber after said CMP process, and for using said first gas to selectively etch at least a portion of the TaN—Ta liner completely to the dielectric layer while preserving all the dielectric layer; using a sub-system connected to the connecting line to conduct a plurality of additional gases into the second chamber via the connecting line.