Patent ID: 6872647

Claim:
A method of forming a plurality of fins in a FinFET device, comprising: forming a dielectric layer on a silicon on insulator (SOI) wafer, the SOI wafer comprising a conductive layer disposed on an insulating layer, the conductive layer being used to form the plurality of fins; forming a structure on a portion of the dielectric layer, the structure including an upper surface and side surfaces; forming a first plurality of spacers adjacent the side surfaces of the structure; forming a second plurality of spacers adjacent the first plurality of spacers; planarizing the structure and the first and second plurality of spacers to expose an upper surface of each of the first and second plurality of spacers; removing the structure, the second plurality of spacers and a portion of the dielectric layer located below the second plurality of spacers, wherein a remaining portion of the dielectric layer forms a plurality of dielectric structures located below the first plurality of spacers; and removing the first plurality of spacers and a portion of the conductive layer not located below the plurality of dielectric structures to form the plurality of fins, wherein the removing the first plurality of spacers and the portion of the conductive layer not located below the plurality of dielectric structures is performed subsequent to removing the structure, the second plurality of spacers and the portion of the dielectric layer located below the second plurality of spacers.