Patent ID: 7071531

Claim:
A memory device comprising: a semiconductor substrate including a plurality of doped active regions, said semiconductor substrate having a first doping concentration; a field isolation region separating at least two of said active regions, said field isolation region including an isolation trench, said isolation trench further including a first area filled with a first dielectric material forming at least sidewalls of said isolation trench, said sidewalls having a thickness, and a second area filled with a second dielectric material situated within said sidewalls, said first dielectric material being different than said second dielectric material; and an ion implanted region provided below said second area having an increased doping concentration due to additional dopants in an area of said substrate between said separated active regions, said increased doping concentration being higher than said first doping concentration of said substrate, wherein substantially all ions from said ion implanted region which increase said doping concentration are displaced away from said active regions by a distance at least equal to a said sidewall thickness of said first area filled with said first dielectric material, and wherein said sidewall thickness of said first area is less than about forty percent the width of the isolation region and said sidewalls are arranged and configured to mask the substrate from said additional dopants.