Patent ID: 6858485

Claim:
A method for forming a double-polysilicon, self-aligned bipolar transistor having a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped emitter formed in the surface of the intrinsic base, comprising the steps of: forming an etch stop dielectric layer over the top surface of the intrinsic base layer above the collector region in the substrate; forming a base contact layer of a conductive material over the etch stop dielectric layer and the intrinsic base layer; forming a second dielectric layer over the base contact layer; etching a wide window extending through the dielectric layer and the base contact layer and stopping the etching of the window at the etch stop dielectric layer; forming a narrowing structure in the wide window leaving the narrowing structure with at least one narrowed window within the wide window; filling the narrowed window and the remainder of the wide window with doped polysilicon to form an extrinsic emitter; and forming an emitter below the extrinsic emitter in the surface of the intrinsic base.