Patent ID: 7554622

Claim:
A liquid crystal display device comprising: a first and a second substrates disposed to be opposite to each other; a liquid crystal sealed between the first and the second substrates; a first gate bus line formed on the first substrate and a first data bus line disposed in a direction substantially perpendicular to the gate bus line; a first TFT connected to the gate bus line and the first data bus line; first and second spaced apart sub-pixel electrodes formed in a pixel region defined by the first gate bus line and the first data bus line, the first sub-pixel electrode electrically connected to the first TFT and the second sub-pixel electrode in a floating state and capacitively coupled to a control electrode; the control electrode which is capacitance coupled to the second sub-pixel electrode, and wherein display voltage is applied to the control electrode from the first data bus line through the first TFT; a second TFT which is driven by a second gate bus line different than the first gate bus line, a source of the second TFT being electrically connected to the second sub-pixel electrode of the first pixel region; and wherein an alignment control electrode is provided primarily in a second pixel region defined by the second gate bus line and the first data bus line, the second pixel region being different than the first pixel region, wherein the alignment control electrode is electrically connected to the source of the second TFT and also to the second sub-pixel electrode of the first pixel region, so that the alignment control electrode in the second pixel region has a same potential as the second sub-pixel electrode of the first pixel region which is in an adjacent pixel.