Patent ID: 7003601

Claim:
A system interface comprising: (a) a plurality of first director boards, each one of the first director boards having: (i) a plurality of first directors; and (ii) a crossbar switch having input/output ports coupled to the first directors on such one of the first director boards and a pair of output/input ports; (b) a plurality of second director boards, each one of the second directors boards having: (i) a plurality of second directors; and (ii) a crossbar switch having input/output ports coupled to the second directors on such one of the second director boards and a pair of output/input ports; (c) a data transfer section having a cache memory, such cache memory being coupled to the plurality of first and second directors; (d) a message network, operative independently of the data transfer section, coupled to the pair of output/input ports of each one of the directors boards of the plurality of first director boards and to the pair of output/input ports of each one of the directors boards of the plurality of second director boards; and (e) wherein the first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the message network to facilitate data transfer between first directors and the second directors with such data passing through the cache memory in the data transfer section.