Patent ID: 8309427

Claim:
A manufacturing method for a fin field effect transistor having a floating body, comprising: providing a substrate, forming a shallow trench isolation structure and a shallow trench isolation oxide/nitride, forming a plurality of grounded gates in the shallow trench isolation structure and the shallow trench isolation oxide/nitride, and forming a poly crystalline layer over the shallow trench isolation structure and the shallow trench isolation oxide/nitride and between the grounded gates, wherein each grounded gate has a nitride layer, a metal gate and a recessed access device region; performing an etching process to form in the poly crystalline layer a plurality of openings which expose the corresponding grounded gates, wherein a bottom of each opening has a protrusion; removing each grounded gate so that the openings extend downward, wherein the openings in the shallow trench isolation structure has a depth between the depths of the recessed access device region and the shallow trench isolation structure, and the openings in the shallow trench isolation oxide/nitride has a similar depth as the recessed access device region; forming spacers on sidewalls of the openings; forming an opening in the shallow trench isolation structure to the substrate; performing an isotropic silicon etching to form isolation spaces at the bottoms of the openings; and filling up gate oxide in the openings and the isolation spaces.