Patent ID: 7531438

Claim:
A method of fabricating a recess channel transistor, the method comprising: performing a first implantation process to form a doped-semiconductor layer on an upper surface of a substrate; forming a patterned hard mask having an opening on the doped-semiconductor layer; etching the exposed doped-semiconductor layer and the substrate to form a trench and define a source/drain in the doped semiconductor layer; performing a second implantation process with a tilt angle on the source/drain of the sidewalls of the trench to form an implant area; performing a thermal oxidation process to form a oxide layer on the sidewalls and the bottom of the trench, wherein the oxide layer comprises a first thickness on the source/drain in the sidewalls of the trench and a second thickness on the other portion in the sidewalls of the trench, and the first thickness is thicker than the second thickness; removing the patterned hard mask; and forming a gate in the trench.