Patent ID: 7454645

Claim:
A method for monitoring the status of a clock signal, the method comprising: supplying a first clock signal and a second clock signal to a clock monitor circuit; and monitoring a status of the first clock signal relative to the second clock signal, wherein the status indicates whether a frequency of the first clock signal is FASTER, SLOWER, or substantially EQUIVALENT TO a frequency of the second clock signal, and wherein the step of monitoring comprises: counting a number of pulses, X, associated with the first clock signal and a number of pulses, Y, associated with the second clock signal until the Y-number of pulses reaches a predetermined maximum count value; and determining the status of the first clock signal relative to the second clock signal by comparing the X-number of pulses with the Y-number of pulses, wherein the status is determined to be: FAST, if the X-number of pulses is substantially greater than the Y-number of pulses; EQUIVALENT, if the X-number of pulses is substantially equal to the Y-number of pulses; and SLOW, if X-number of pulses is substantially less than the Y-number of pulses.