Patent ID: 8208482

Claim:
An apparatus to transmit and receive a packet between a network processor and a packet controller, the apparatus comprising: an input interface to receive an input packet and to deliver the received input packet to a packet controller; a packet buffer to receive the received input packet from the packet controller, to store the received input packet, and to deliver the stored input packet to a network processor in response to a request from the network processor; a packet queue to deliver, from the packet controller to the network processor, information associated with the input packet stored in the packet buffer; and an output interface, wherein the network processor is configured to receive the stored input packet from the packet buffer, to perform an interface conversion process for the received stored input packet, and to deliver the converted packet to the output interface, using information associated with the input packet delivered by the packet queue, wherein said packet controller queues said information into said packet queue, said information comprising information corresponding to an input port of said received input packet, a packet buffer address, and a packet size, and wherein the network processor is further configured to determine whether the input interface and the output interface for the received packet are the same when performing the interface conversion process.