Patent ID: 7663955

Claim:
A circuit configuration for a sense amplifier in a semiconductor memory device, comprising: a switch circuit connected between the sense amplifier and a memory array segment, wherein the switch circuit connects and disconnects the sense amplifier to and from the memory array segment; and a control circuit that is configured to control the switch circuit to delay disconnecting the sense amplifier from the memory array segment when transitioning from a selected state of the memory array segment to an unselected state of the memory array segment when isolating the sense amplifier from the memory array segment in its unselected state due to a bitline leakage anomaly in the memory array segment, wherein said control circuit is configured to control the switch circuit to change from a first state to a second state in order to disconnect and isolate the sense amplifier from the memory array segment, and wherein said control circuit comprises a first circuit path and a second circuit path either of which controls the switch circuit to change from the first state to the second state, wherein the first circuit path rapidly changes the switch circuit to the second state when transitioning from the unselected state to the selected state of the memory array segment and wherein the second circuit path delays changing the switch circuit to the second state when transitioning from the selected state to the unselected state of the memory array segment.