Patent ID: 7045416

Claim:
A method for manufacturing a ferroelectric capacitor comprising the steps of: forming a first electrode layer to be connected to an impurity region of a semiconductor substrate; forming a ferroelectric layer on the first electrode layer; forming a second electrode layer on the ferroelectric layer; forming a second electrode layer pattern by patterning the second electrode layer; forming a ferroelectric layer pattern by patterning the ferroelectric layer; covering the first electrode layer, the ferroelectric layer pattern and the second electrode layer pattern with a dielectric protective layer in order to prevent hydrogen components from infiltrating into the ferroelectric layer pattern; forming a mask layer on the protective layer; forming a mask layer pattern and a protective layer pattern which partially exposes a surface of the first electrode layer, by patterning the mask layer and the protective layer; removing the exposed portion of the first electrode layer using the mask layer pattern and the protective layer pattern as an etching mask, the protective layer pattern extending on sidewalls of the ferroelectric layer pattern without extending onto sidewalls of the first electrode layer; and forming an interlayer dielectric layer on the mask layer pattern.