Patent ID: 7035769

Claim:
A design failure mode effect analysis (DFMEA) method of analyzing faults and failures in the design of electronic apparatus and devices, wherein an information recording form including a data-entry mask is used for recording some information concerning the performed analysis and in which at least a portion of said recording form is displayed to a user in an electronic display format; the method comprising: detecting and recording past design problems and corresponding solutions to the past design problems using said recording form; associating keywords in a database to each said past design problems as individual functions; associating data concerning each of said past design problems, in the same database, including information concerning past fails that occurred in similar applications; detecting major changes and/or innovations, as well as any improved block or part of a new device with respect to other devices, thereby postulating possible new problems introduced by the new device; and recording said new problems and possible solutions to said new problems using said recording form.