Patent ID: 7103870

Claim:
A method for generating mask data for an LSI, comprising the steps of: a) classifying multiple circuit patterns included in the LSI into first and second groups of corrected patterns, where each said corrected pattern of the first group is defined by circuit patterns placed to cover multiple layers, while each said corrected pattern of the second group is defined by circuit patterns placed within a single layer; b) setting specifications of interlayer optical proximity corrected patterns to be made for the first group of corrected patterns; c) designing the circuit patterns; d) evaluating effectiveness of optical proximity corrections if the interlayer corrected patterns, which have been made for the first group of corrected patterns to the specifications of the interlayer corrected patterns, are used; if the effectiveness of the corrections is negated, e) modifying ineffective circuit patterns to make the corrections effective and re-evaluating effectiveness of the corrections; if the effectiveness of the corrections is affirmed, f) registering the circuit patterns, belonging to the first and second groups of corrected patterns, at a cell library; g) generating chip-level pattern data from the circuit patterns that have been registered at the cell library; h) setting specifications of intralayer optical proximity corrected patterns to be made for the second group of corrected patterns; i) generating interlayer optical proximity corrected pattern data from the circuit patterns belonging to the first group of corrected patterns according to the specifications of the interlayer corrected patterns; and j) generating intralayer optical proximity corrected pattern data from the circuit patterns belonging to the second group of corrected patterns according to the specifications of the intralayer corrected patterns.