Patent ID: 8530984

Claim:
A semiconductor device structure, comprising: first and second semiconductor devices formed in laterally spaced adjacent positions on a bottom wafer, including corresponding first and second electrical contact pads formed on the bottom wafer proximate each respective device in spacing between the devices; a top wafer bonded to the bottom wafer at a first bond between the first device and the first contact pad and at a second bond between the second device and the second contact pad; a first partial cut downward into the top wafer between the first bond and at least a portion of the first contact pad, with a first tab under the first partial cut left joining a portion of the top wafer over the first device and a portion of the top wafer over the at least a portion of the first contact pad; a second partial cut downward into the top wafer between the second bond and at least a portion of the second contact pad, with a second tab under the second partial cut left joining a portion of the top wafer over the second device and a portion of the top wafer over the at least a portion of the second contact pad; and a complete cut through the top wafer between the first and the second contact pads, separating the portion of the top wafer over the at least a portion of the first contact pad from the portion of the top wafer over the at least a portion of the second contact pad, with the bottom wafer left unsingulated.