Patent ID: 6838745

Claim:
A semiconductor device having a separate structure for high withstand-voltage comprising: a first-conduction-type semiconductor substrate; first and second second-conduction-type wells relatively high in impurity density, said first and second second-conduction-type wells being formed on a surface of said first-conduction-type semiconductor substrate, said first and second second-conduction-type wells being disposed with a first predetermined distance therebetween; a first-conduction-type epitaxial region formed on said first-conduction-type semiconductor substrate and above said first and second second-conduction-type wells; first and second second-conduction-type wells relatively low in impurity density, said first and second second-conduction-type wells being formed, spaced a second predetermined distance each other, in said first-conduction-type epitaxial region at a depth to reach said first and second second-conduction-type well relatively high in impurity density in an area including at least portions of said fist and second second-conduction-type wells relatively low in impurity density being formed to extend substantially beyond an outer peripheral portion of the said first and second second-conduction-type wells relatively high in impurity density and being formed to particularly overlap and incompletely surround said first and second second-conduction-type wells relatively high in impurity density, wherein said second predetermined distance between said first and second second-conduction-type wells relatively low in impurity density is greater than said first predetermined distance between said first and second second-conduction-type wells relatively high in impurity density; and a first-conduction-type region relatively high in impurity density formed ill a surface of said first-conduction-type epitaxial region interposed between said first and second second-conduction type wells relatively low in impurity density.