Patent ID: 8140724

Claim:
A first controller, comprising: a first interface controller located on a system on a chip (SOC) and configured as a device, wherein the first interface controller is configured to control a connection between the first controller and a first host external to the first controller; a memory controller located on the SOC, wherein the memory controller is configured to control a primary memory; and a second interface controller located on the SOC, wherein the second interface controller is configured to control a connection between the first controller and a secondary device external to the first controller, and wherein if the secondary device comprises a device controller configured to function as a device, then the second interface controller is configured as a host, and if the secondary device comprises a second host, then the second interface controller is configured as a device, wherein the first controller connects the first host to the primary memory through the first interface controller and the memory controller, and wherein the first controller is connected to the secondary device through the second interface controller.