Patent ID: 7746721

Claim:
A sector of a word line driver circuit, comprising: a local reset signal generator module, for generating j reset signals, the x-th reset signal is determined according to an x-th pre-decoding signal, a bank selectable signal and a sector selectable signal, wherein j is a nature number, and x is an integer from 1 to j; and m word line clusters, coupled to the local reset signal generator module, each of the m word line clusters comprises j row drivers, the x-th row driver of the y-th word line cluster determines a [x+j*(y−1)]-th word line signal according to the x-th reset signal, the x-th pre-decoding signal, the sector selectable signal, and a y-th cluster select signal, wherein m is a nature number, and y is an integer from 1 to m; wherein the x-th row driver of the y-th word line cluster comprises: a second PMOS transistor, a gate of the second PMOS transistor is coupled to the y-th cluster select signal, a source of the second PMOS transistor is coupled to the x-th pre-decoding signal, a drain of the second PMOS transistor is coupled to the [x+j*(y−1)]-th word line signal; a second NMOS transistor, a gate of the second NMOS transistor is coupled to the y-th cluster select signal, a source of the second NMOS transistor is coupled to the sector selectable signal, a drain of the second NMOS transistor is coupled to the drain of the second PMOS transistor; and a third NMOS transistor, a gate of the third NMOS transistor is coupled to the x-th reset signal, a source of the third NMOS transistor is coupled to the sector selectable signal, a drain of the third NMOS transistor is coupled to the drain of the second PMOS transistor.