Patent ID: 7235148

Claim:
A method of laminating a circuit board comprising the steps of: providing a first layer having a dielectric material having a conductive signal plane thereon, said signal plane having at least one surface with a first portion having a first roughness; forming said signal plane into signal lines and lands; thereafter selectively roughening at least a second portion of said at least one surface including said lands, but less than all of said one surface, to form a second surface having a second roughness greater than said first roughness; providing a second layer comprised of a voltage plane as a single sheet of foil disposed on a dielectric material and selectively roughening the second layer to provide a first portion and a second portion, wherein said second portion of the voltage plane has a roughness greater than the first portion of said voltage plane; laminating said first layer to said second layer with a sticker sheet therebetween to form a composite structure; said signal plane and said voltage plane being oriented toward each other with said first portion of said voltage plane mirroring said first portion of said conductive signal plane; said composite structure being formed with plated through holes surrounded by said lands.