Patent ID: 7883983

Claim:
A method of manufacturing a semiconductor device, comprising: forming a gate insulating film on a substrate; forming a first metal film on said gate insulating film; forming a second metal film on said first metal film; patterning a stacked film of said first and second metal films such that said stacked film is left in a gate electrode formation region and a resistive element formation region, wherein a gate electrode of a transistor is formed in said gate electrode formation region and a resistive element section is formed in said resistive element formation region; setting a contact hole formation region within each of said gate electrode formation region and said resistive element formation region; removing said second metal film in said resistive element formation region with protecting said contact hole formation region; forming an interlayer insulating film so as to cover said stacked film, after said removing said second metal film; and removing said interlayer insulating film formed in said contact hole formation region to form a contact hole leading to said second metal film in said contact hole formation region.