Patent ID: 8717217

Claim:
An analog-to-digital converter comprising: a comparison unit configured to output a result obtained by comparing a voltage of an input node with a comparison voltage; 1 st to N th capacitors having one ends connected to the input node, respectively; and 1 st to N−1 th voltage selection units corresponding to the 2 nd to N th capacitors, respectively and configured to apply one of a voltages of a 1 st node, a 2 nd node, and the comparison voltage to the other ends of the corresponding capacitors, wherein an input signal is sampled to the input node in a 1 st sampling operation, the 1 st to N−1 th voltage selection units select one of the voltages of the 1 st node and the 2 nd node according to output of the comparison unit, and convert a part of the input signal into a 1 st digital signal in a 1 st conversion operation, the input signal is applied to the input node in a state where the 1 st to N−1 th voltage selection units select a voltage of the other node which is not selected between the voltages of the 1 st node and the 2 nd node in the 1 st conversion operation, a remaining part of the input signal, which is not converted into the 1 st digital signal in the 1 st conversion operation, is sampled to the input node in a 2 nd sampling operation, and the 1 st to N−1 th voltage selection units select one of the voltages of the 1 st node and the 2 nd node according to output of the comparison unit, and convert the remaining part of the input signal into a 2 nd digital signal in a 2 nd conversion operation.