Patent ID: 7824988

Claim:
A method for forming a first transistor having a first conductivity type and for forming a second transistor having a second conductivity type in a substrate, the method comprising: forming a source, a drain, and a disposable gate of the first transistor; forming a source, a drain, and a disposable gate of the second transistor; removing the disposable gate of the first transistor and the disposable gate of the second transistor; forming a photoresist layer over the first transistor and the second transistor; patterning the photoresist layer to expose a gate region of the first transistor and to expose a gate region of the second transistor; and implanting the substrate under the gate region of the first transistor and under the gate region of the second transistor, wherein implanting the substrate under the gate region of the first transistor provides a permanent shorting region between the source and the drain of the first transistor, and wherein implanting the substrate under the gate region of the second transistor adjusts a threshold voltage of the second transistor.