Patent ID: 7906377

Claim:
A fabrication method of a circuit board, comprising: providing a substrate, at least a top pad, at least a base pad, a top solder resist layer, and a base solder resist layer, the top pad and the base pad being respectively disposed on a top surface and a base surface of the substrate, the top surface being opposite to the base surface, the top pad and the base pad being electrically connected, the top solder resist layer and the base solder resist layer being respectively disposed on the top surface and the base surface, wherein the top solder resist layer has a first opening exposing a portion of the top pad, and the base solder resist layer has a second opening exposing a portion of the base pad; forming a conductive layer on the base surface, the conductive layer covering the base solder resist layer and the base pad and electrically connecting the base pad; forming a plating resist layer on the conductive layer, the plating resist layer comprising a third opening exposing a portion of the conductive layer; applying a current to the conductive layer through the third opening for electroplating a pre-bump on the top pad; removing the plating resist layer; and removing the conductive layer.