Patent ID: 8383502

Claim:
A method of fabricating a semiconductor device comprising: providing a semiconductor substrate having a first active region and a second active region; forming a high-k dielectric layer over the semiconductor substrate; forming a first metal layer over the high-k dielectric layer, the first metal layer having a first work function; removing at least a portion of the first metal layer in the second active region; forming a second metal layer on first metal layer in the first active region and over the high-k dielectric layer in the second active region; thereafter, forming a silicon layer over the second metal layer; forming a first gate stack in the first active region and a second gate stack in the second active region, the first gate stack including the high-k dielectric layer, the first metal layer, the second metal layer, and the silicon layer, the second gate stack including the high-k dielectric layer, the second metal layer, and the silicon layer; forming a dielectric over the silicon layer and semiconductor substrate, then removing a portion of the dielectric over the silicon layer; removing the silicon layer from the first gate stack thereby forming a first trench and from the second gate stack thereby forming a second trench; and forming a third metal layer over the second metal layer in the first trench and over the second metal layer in the second trench, the third metal layer having a second work function.