Patent ID: 7605424

Claim:
A semiconductor device comprising: a semiconductor region having a first semiconductor face and a second semiconductor face connected to said first semiconductor face and having an inclination with respect to said first semiconductor face; a gate insulating film formed on said first semiconductor face and on said second semiconductor face; a gate electrode formed on said gate insulating film including a part on a boundary between said first semiconductor face and said second semiconductor face; a source impurity region formed in said semiconductor region so as to overlap said gate electrode within said first semiconductor face with said gate insulating film interposed between said source impurity region and said gate electrode; and a drain impurity region formed in said semiconductor region directly under said second semiconductor face at least; wherein a junction interface between said drain impurity region and said semiconductor region is formed in a state of being closer to the boundary between said first semiconductor face and said second semiconductor face than a junction interface between said source impurity region and said semiconductor region.