Patent ID: 7265407

Claim:
A semiconductor device having a memory cell, said memory cell comprising: a memory cell selecting MISFET, which comprises a gate insulating film formed on a semiconductor substrate, a gate electrode formed on said gate insulating film, and a pair of semiconductor regions formed in said semiconductor substrate at both sides of said gate electrode; and a data-storing capacitor element, which comprises a bottom electrode electrically connected to one of said pair of semiconductor regions, a capacitor dielectric film formed on said bottom electrode and a top electrode formed on said capacitor dielectric film, wherein said capacitor dielectric film comprises a multiple layer film composed of a first film made of any one of a niobium pentoxide film and a film made of a composition of tantalum pentoxide and niobium pentoxide, and a second film made of any one of a tantalum pentoxide film, a niobium pentoxide film, and a film made of a composition of tantalum pentoxide and niobium pentoxide, wherein said first film is formed on said bottom electrode, wherein a crystalline grain boundary between said first film and said second film is separated at an interface of said first and second films, and wherein the composition ratio of tantalum to niobium in said first film is 90% or less by atom.