Patent ID: 8411484

Claim:
A method of writing into a semiconductor memory device comprising a resistance memory element which memorizes a high resistance state and a low resistance state and switches between the high resistance state and the low resistance state by an application of a voltage; a first transistor comprising a drain terminal connected to one terminal of the resistance memory element and a source terminal connected to a reference voltage; and a second transistor comprising a source terminal connected to the other terminal of the resistance memory element, comprising: clamping a voltage to be applied to said other terminal of the resistance memory element at a value which is not less than a reset voltage of the resistance memory element and less than a set voltage of the resistance memory element by controlling a second drive voltage to be applied to a gate terminal of the second transistor so as to be set at a value which is not less than a total of the reset voltage and a threshold voltage of the second transistor and is less than a total of the set voltage and the threshold voltage of the second transistor, when a write voltage is applied to the resistance memory element via the second transistor to switch the resistance memory element from the low resistance state to the high resistance state.