Patent ID: 7620131

Claim:
A radio receivers comprising: an analog front end to receive a radio signal containing a selected one of a plurality of channel signals, and to convert the selected one of the plurality of channel signals into a digital signal; a digital clock generator to generate a base clock signal at a base clock frequency that varies based on the selected one of the plurality of channel signals and to generate a digital clock signal having a substantially constant number of digital clock cycles over a predetermined period, wherein the digital clock generator includes a stall cycle module to produce a stall signal in response to a first value of a control signal, and wherein the digital clock generator generates the digital clock signal by: inserting a plurality of stall cycles in a preliminary clock signal over the predetermined period at a second value of the control signal; and inserting no stall cycles in the preliminary clock signal over the predetermined period at a third value of the control signal; and a digital section, operably coupled to the analog front end and the digital clock generator, to convert the digital signal into at least one audio signal that corresponds to the selected one of the plurality of channel signals, the digital section having a first digital module that operates based on the base clock signal and a second digital module that operates based on the digital clock signal.