Patent ID: 7672186

Claim:
An antifuse replacement determination circuit of a semiconductor memory device, wherein: the semiconductor memory device has a memory cell array in which data is stored in each memory cell, and the address of a bad memory cell is stored as a bad address by destroying the insulation of an antifuse element so as to replace the bad memory cell with another memory element; it is determined by the antifuse replacement determination circuit whether or not the replacement of the bad memory cell has been performed normally by using the antifuse element, and the antifuse replacement determination circuit comprises: an antifuse element charging circuit for charging a node of the antifuse element to have a predetermined voltage, and making the charge at the node self-discharge via the antifuse element after the charging of the node is completed; a comparison and determination circuit for comparing the voltage at the node of the antifuse element with a plurality of reference voltages when a predetermined time has elapsed after the completion of the charging of the node; and an AF destruction result determination part for determining, based on a determination result with respect to the comparison using the plurality of reference voltages in the comparison and determination circuit, whether or not the replacement of the bad memory cell has been performed normally by using the antifuse element.