Patent ID: 7440350

Claim:
A semiconductor integrated circuit device comprising: a read amplifier including a first MOSFET having a gate connected to a first bit line, a second MOSFET having a gate that receives a column selection signal, a third MOSFET having a gate connected to a second bit line, and a fourth MOSFET having a gate that receives the column selection signal, the first and second MOSFETs being connected to each other in series and the third and fourth MOSFETs being connected to each other in series; and a write amplifier including a fifth MOSFET having a gate that receives the column selection signal, a sixth MOSFET connected to the fifth MOSFET in series, a seventh MOSFET having a gate that receives the column selection signal, and an eighth MOSFET connected to the seventh MOSFET in series; wherein the column selection signal is connected in common to the gates of the second and fifth MOSFETs using a first contact; and wherein the column selection signal is connected in common to the gates of the fourth and seventh MOSFETs using a second contact.