Patent ID: 8745562

Claim:
A design method of on-board wiring in a designed circuit, the method comprising: storing, within a database, in advance of calculating a severity as a crosstalk prevention index for a pair of wires, a severity class (SC) specific by-design permissible value list that classifies by-design permissible values according to a predefined SC; calculating, by a computer aided design (CAD) system, the severity as the crosstalk prevention index for the pair of wires based on a generated noise level of a damaging side wire and a permissible noise level of a damaged side wire, without noise analysis of a wiring board after designing a layout of the wiring board; assigning, by the CAD system, a SC to the pair of wires based on the severity determined for the pair of wires, the SC being pre-defined value ranges for severity classification; generating, by the CAD system, for a design element of the pair of wires, one or more by-design permissible values belonging to the SC that have been assigned to the pair of wires, based on the SC specific by-design permissible value list in the database; and then constructing, by the CAD system, a layout of the pair of wires on a board based on at least one of the by-design permissible values.