Patent ID: 8416021

Claim:
An amplifier circuit comprising: an input differential pair that includes a first transistor and a second transistor, a positive input voltage being supplied to a gate terminal of the first transistor, a negative input voltage being supplied to a gate terminal of the second transistor; a first resistor that generates a differential current corresponding to a differential voltage between the positive input voltage and the negative input voltage; an output differential pair that includes a third transistor and a fourth transistor, a negative output voltage being supplied from a drain terminal of the third transistor, a positive output voltage being supplied from a drain terminal of the fourth transistor; a second resistor that is connected to a reference voltage, the differential current generated by the first resistor being supplied to the second resistor; and a bias circuit that supplies a constant bias current to the first, second, third, and fourth transistors; and wherein a source terminal of the first transistor is connected to a gate terminal of the third transistor, a source terminal of the second transistor is connected to a gate terminal of the fourth transistor, a drain terminal of the first transistor is connected to a source terminal of the third transistor, a drain terminal of the second transistor is connected to a source terminal of the fourth transistor, and the input differential pair and the output differential pair include transistors having reversed polarities.