Patent ID: 6972258

Claim:
A method for selectively etching a semiconductor feature openings to controllably adjust a critical dimension comprising an upper portion of a feature opening comprising the steps of: providing a semiconductor wafer comprising a first opening formed extending through a thickness of at least one dielectric insulating layer and having an uppermost inorganic BARC layer; depositing a photoresist layer over the uppermost BARC layer and patterning the photoresist layer to form an etching pattern for etching a second opening overlying and encompassing the first opening; carrying out a first plasma assisted etching process to etch through a thickness of the BARC layer comprising a predetermined amount of CO in a first plasma etching chemistry to form a predetermined critical dimension of a second opening upper portion including forming a hardened shell comprising the photoresist at the photoresist layer surface, said hardened shell having an increased etching resistance; and, carrying out a second plasma assisted etching process comprising a second plasma etching chemistry to etch through a thickness portion of the at least one dielectric insulating layer to form the second opening.