Patent ID: 8122169

Claim:
A data buffer device that stores input data and outputs the stored data in a given sequence, comprising: a tag value generation circuit that generates a tag value for the input data; a first buffer that stores first priority data having a first priority in a first sequence, with which the first priority data is input, together with the tag values; a second buffer that stores second priority data having a second priority in a second sequence, with which the second priority data is input, together with the tag values; and a data output circuit that outputs one of the first priority data and the second priority data, which are positioned at respective heads of the first buffer and the second buffer, wherein the tag value generation circuit sets, in response to input of second preceding input data having the second priority, a tag value for the following second input data to a second tag value which differs from a first tag value for the second preceding input data, and sets, in response to input of first preceding input data having the first priority, a tag value of the following first input data to a fourth tag value that is substantially the same as a third tag value for the first preceding input data, and wherein the data output circuit outputs one of the first priority data and the second priority data, which is input earlier, in a first mode based on the tag values of the first priority data and the second priority data, and outputs the first priority data earlier than the second priority data in a second mode.