Patent ID: 7741193

Claim:
A method of manufacturing a silicon on insulator (SOI) wafer having a silicon germanium (SiGe) layer thereon, comprising: forming a porous silicon layer on a first substrate; epitaxially growing 1) a silicon layer directly on the porous silicon layer and 2) the SiGe layer directly on the silicon layer in sequence, the SiGe layer having Ge atomic ratio of 0.19 to 0.2; forming an insulating layer on the SiGe layer; bonding a second substrate to the insulating layer on the first substrate to form a bonded first and second substrate; first annealing the bonded first and second substrate at a temperature of about 1,180° C.; separating the first substrate from the bonded first and second substrate along the porous silicon layer and removing the first substrate after the first annealing; and removing remnants of the porous silicon layer remaining on the second substrate so as to expose the silicon layer on the second substrate.