Patent ID: 7928005

Claim:
A method of forming a plurality of structures in a semiconductor device, the method comprising: forming a mask layer over a first layer, the mask layer directly contacting the first layer; patterning the mask layer to form a mask that includes side surfaces; forming spacers adjacent the side surfaces of the mask; etching at least one trench in a portion of the first layer not covered by the mask; depositing a second material over the semiconductor device, the second material filling the at least one trench; planarizing the second material, the planarizing removing a portion of the second material, a portion of the mask and portions of the spacers; removing the mask; etching the first layer to remove all portions of the first layer not covered by remaining portions of the spacers and the second material, where remaining portions of the first layer comprise the plurality of structures and where the forming spacers adjacent side surfaces of the mask comprises: forming the spacers to a first width, the first width being approximately equal to a width of the plurality of structures; and forming a memory device between two adjacent structures of the plurality of structures.