Patent ID: 8891517

Claim:
A switching device comprising a plurality of ingress ports and a plurality of egress ports, the switching device being arranged to receive data packets, at least one of which comprises a plurality of cells, through said ingress ports, and to forward received data packets to respective ones of said egress ports, wherein the switching device is further arranged to: schedule the forwarding times of all of the cells of the data packet in a single integrated scheduling operation comprising: determining a first time at which a first cell of the selected data packet is to be forwarded to one of said egress ports; and determining a further time at which a respective further cell of the selected data packet is to be forwarded to said one of said egress ports; and storing data indicating that said respective further cell is to be forwarded at said determined further time; forwarding said first cell at said first time; and forwarding said further cell of said selected data packet at said determined further time; the switching device further comprising a memory storing a data structure comprising an ordered plurality of slots, each slot being associated with a respective time; wherein storing data indicating that a respective further cell is to be forwarded at a determined further time comprises storing data identifying said data packet in one of said slots associated with said determined further time; wherein the scheduling operation further comprises: determining a plurality of further times at which respective further cells of said selected data packet are to be forwarded to said one of said egress ports; for each of said further cells, storing data indicating the respective determined time at which the further cell is to be forwarded to said one of said egress ports; and wherein the switching device is further arranged to forward each of said further cells of said selected data packet to said one of the egress ports at the respective determined time; wherein said data structure comprises first slots defining a first phase and second slots defining a second phase; and wherein cells of different data packets are forwarded in an interleaved manner.