Patent ID: 8239650

Claim:
A memory device comprises: a plurality of memory modules, wherein a memory module of the plurality of memory modules includes a plurality of memory cells and a memory millimeter wave (MMW) transceiver; and a memory management module coupled to: determine a main memory configuration for at least some of the plurality of memory modules; determine addresses of the main memory configuration; and determine a MMW communication resource table that includes an allocation mapping of one or more MMW communication resources to one or more of the at least some of the plurality of memory modules, wherein the memory management module comprises: a memory management unit operable to: receive a memory access request that includes a logical address; identify at least one memory module of the at least some of the plurality of memory modules based on the logical address; determine at least one MMW communication resource for the at least one memory module in accordance with the MMW communication resource table; and generate a memory module address message based on the memory access request and the identity of the at least one memory module; a memory MMW transceiver operable to: convert the memory module address message into a MMW signal in accordance with the at least one MMW communication resource; and transmit the MMW signal to the at least one memory module via the at least one MMW communication resource.