Patent ID: 7310400

Claim:
A data recovery device for adjusting a digital signal according to a pulse signal output by a phase-locked loop circuit, comprising: a sampling circuit coupled to the phase-locked loop circuit for sampling each bit of the digital signal at least twice according to the pulse signal to generate a first sampling signal; a data delay buffer coupled to the sampling circuit for deciding a sampling range of the first sampling signal according to a first phase checking signal and outputting a second sampling signal; a sampling range selector coupled to the data delay buffer for picking a part of bits of the second sampling signal according to a phase picking signal and outputting output data; a weighted detecting module coupled to the sampling range selector for outputting a phase shifting signal responding to the output data; a first loop filter coupled to the weighted detecting module for outputting a first adjusting signal according to the phase shifting signal; a first sampling window module coupled to the sampling range selector for outputting a phase selecting signal according to the first adjusting signal and a recovery signal; a second loop filter coupled to the first sampling window module and the phase-locked loop circuit for outputting the recovery signal and a second adjusting signal according to the phase selecting signal and a second phase checking signal; a second sampling window module coupled to the first loop filter and the second loop filter for outputting the first phase checking signal and the second phase checking signal according to the first adjusting signal and the second adjusting signal; and phase picking module couple to the sampling range selector for outputting the output data.