Patent ID: 7447883

Claim:
Apparatus for processing data, said apparatus comprising: an instruction fetching circuit coupled to a memory storing program instructions to be executed; an instruction queue coupled to said instruction fetching circuit to receive and to store at least representations of program instructions fetched from said memory by said instruction fetching circuit; a further processing circuit coupled to said instruction queue to receive said at least representations of program instructions from said instruction queue; a branch target cache coupled to at least said instruction fetching circuit and responsive to a memory address associated with a program instruction fetched from said memory by said instruction fetching circuit to identify said program instruction as a previously encountered branch program instruction and to provide data concerning said previously encountered branch instruction to at least one of said instruction fetching circuit and said instruction queue; and a control circuit coupled to said branch target cache and said instruction queue and responsive to said at least representations of program instructions stored within said instruction queue to determine whether or not to store data within said branch target cache concerning a branch instruction fetched by said instruction fetching circuit, wherein said control circuit is responsive to said at least representations of program instructions stored within said instruction queue to determine if a storage condition is met and: (i) if said storage condition is met, then said control circuit is configured to trigger said branch target cache to store said data concerning said branch instruction fetched by said instruction fetching circuit; (ii) if said storage condition is not met, then said control circuit is configured not to trigger said branch target cache to store said data concerning said branch instruction fetched by said instruction fetching circuit, and wherein said control circuit determines a number of said at least representations of program instructions stored within said instruction queue and said storage condition corresponds to fewer than a threshold number being stored within said instruction queue.