Patent ID: 8187940

Claim:
A method for fabricating a semiconductor device comprising: (a) forming a pad insulating film over a semiconductor substrate; (b) etching a predetermined region of the pad insulating film and the semiconductor substrate to form a trench defining an active region, wherein an upper portion of the active region is wider than a lower portion of the active region; (c) forming a device isolation structure that fills the trench; (d) removing the pad insulating film after the device isolation structure has been formed to expose the semiconductor substrate; (e) etching the exposed semiconductor substrate using a recess gate mask as an etching mask to form a recess; (f) forming a gate insulating film on the exposed semiconductor substrate; (g) forming a gate conductive layer filling the recess; (h) forming a gate hard mask layer over the gate conductive layer; and (i) patterning the gate hard mask layer and the gate conductive layer using a gate mask as an etching mask to form a gate, wherein step (b) includes: (b-1) forming a first hard mask layer over the pad insulating film; (b-2) etching a predetermined region of the first hard mask layer, the pad insulating film, and the semiconductor substrate to form a first trench defining an active region; (b-3) forming spacers on sidewalls of the first trench; (b-4) etching the semiconductor substrate exposed in the first trench using the first hard mask layer and the spacers as an etching mask to form a second trench; and (b-5) etching the semiconductor substrate exposed in the second trench to form a third trench including an undercut space where a predetermined thickness of the semiconductor substrate under a storage node junction region is removed.