Patent ID: 8395320

Claim:
A plasma display panel comprising: a front panel including: a substrate; a display electrode formed on the substrate; a dielectric layer formed so as to cover the display electrode; and a protective layer formed on the dielectric layer; and a rear panel disposed facing the front panel, such that a discharge space is formed between the front panel and the rear panel, the rear panel including an address electrode formed in a direction intersecting the display electrode, and including a barrier rib partitioning the discharge space, wherein the protective layer is formed by forming a base film made of MgO on the dielectric layer and by attaching a plurality of groups of aggregated particles to the base film, such that each respective group of the plurality of groups of aggregated particles is discrete from other groups of the plurality of groups of aggregated particles, such that each respective group of the plurality of groups of aggregated particles includes a plurality of crystal particles of metal oxide, and such that the plurality of groups of aggregated particles is discretely located over an entire surface of the base film, wherein the base film includes Si as a material impurity, such that a Si concentration in the base film is more than 0 ppm and not more than 10 ppm, wherein each group of aggregated particles of the plurality of groups of aggregated particles is (i) in a lump form and (ii) comprises a plurality of metal oxide crystal particles piled up to form the lump form, wherein each group of aggregated particles of the plurality of groups of aggregated particles is located discretely over a surface of the base film of the protective layer, and wherein each respective group of aggregated particles of the plurality of groups of aggregated particles has an average particle diameter of not less than 0.9 μm and not more than 2 μm.