Patent ID: 8866516

Claim:
A gate drive circuit which generates a signal for driving a gate terminal of a semiconductor switching device according to an input binary control signal, the gate drive circuit comprising: an input port which includes a pair of a signal input port and a ground input port for receiving the control signal; an output port which includes a pair of a signal output port and a ground output port, the ground output port being electrically isolated from the ground input port; a capacitor connected between the signal output port and the ground output port; a modulation unit which includes at least one oscillator circuit and is configured to modulate an oscillation signal output from the oscillator circuit using the control signal input to the input port to generate (i) a first modulated signal indicating timing of a first logical value of the control signal and (ii) a second modulated signal indicating timing of at least a second logical value of the control signal; a first electromagnetic resonance coupler which includes a first transmission-side resonator and a first reception-side resonator coupled by electromagnetic field resonance and is connected to the modulation unit to cause the first modulated signal to be input to the first transmission-side resonator; a second electromagnetic resonance coupler which includes a second transmission-side resonator and a second reception-side resonator coupled by electromagnetic field resonance and is connected to the modulation unit to cause the second modulated signal to be input to the second transmission-side resonator; a first rectifier circuit which includes at least one diode connected to the first reception-side resonator, generates a first demodulated signal by demodulating the first modulated signal, and outputs the first demodulated signal to the output port; and a second rectifier circuit which includes at least one diode connected to the second reception-side resonator, generates a second demodulated signal by demodulating the second modulated signal, and outputs the second demodulated signal to the output port.