Patent ID: 8349746

Claim:
A method of fabricating a microelectronic device structure which includes a diffusion barrier material, a transitional area, and a carbon doped silicon oxide-comprising low k dielectric material, the method comprising: forming the microelectronic device structure in a plasma enhanced chemical vapor deposition processing chamber, while controlling the flow rates of a combination of gases used to form said transitional area, wherein a flow rate of a helium carrier gas used to transport carbon-comprising reactive gases is ramped down during the formation of said transitional area, wherein a flow rate of an oxygen-comprising gas is also ramped down during the formation of said transitional area, and wherein the relative ramp down rates for said carbon-comprising helium carrier gas and said oxygen-comprising gas have a relationship such that a ratio of a ramp down rate of said carbon-comprising helium carrier gas to a ramp down rate of said oxygen-comprising gas ranges from about 60:1 to about 30:1, wherein oxygen is present at all times during formation of said transitional area, so that an adhesive strength between a deposited transitional area and an overlying or underlying material is improved.