Patent ID: 7685541

Claim:
A method for translating high-level design blocks into a design specification in a hardware description language (HDL), wherein each of a plurality of the high-level design blocks has one or more parameters, each parameter having an associated parameter value, the method comprising: selecting from the high-level design blocks an unprocessed set of high-level design blocks of equal rank as a current set, wherein the rank of a high-level design block is the maximum rank of a subblock of the high-level design block plus 1, the rank of a leaf high-level design block is 0, a leaf high-level design block being a high-level design block that has no subblocks; assigning each high-level design block in the current set to a group, wherein a set of attributes is identical between each high-level design block in the group; determining for each group of high-level design blocks, a respective set of subblock parameters that for each parameter in the set has different values in at least two high-level design blocks in the group; and generating a respective HDL specification for each group, the HDL specification having for each parameter in the set of parameters, a respective parameter input, wherein the generating of the respective HDL specification is performed by a computer and includes: generating an HDL specification of a first high-level design block having a respective parameter for each parameter in the set of parameters, and assigning each respective parameter to a variable in the HDL specification of the first high-level design block; and generating for each high-level design block in the group, an HDL specification of a respective entity of a type of the first high-level design block, and providing in each respective entity the associated parameter value from the respective high-level design block for each respective parameter.