Patent ID: 8228175

Claim:
An Integrated Circuit (IC) for use with a Radio Frequency Identification (RFID) tag having an antenna, comprising: a first set of memory bits for storing first data; a second set of memory bits for storing second data, the second set of memory bits not coinciding exactly with the first set; and a processing block operable to: receive via the antenna a first command which is according to a protocol, the protocol defining a plurality of distinct called-for protocol states for the tag, the protocol requiring the tag to send in response to the first command a specific code if the processing block is in an internal tag protocol state that is compatible with a certain one of the called-for protocol states, the first command received at sufficient power for the tag to respond with the specific code; map one of the first and the second set of memory bits for purposes of responding to the first command; and send, if the processing block is in the compatible internal tag protocol state, in conformance with the protocol, a reply code as the specific code in response to the first command, the reply code being a first code that is derived at least in part from the first data if the processing block maps the first set of memory bits, the reply code alternatively being a second code distinct from the first code, the second code derived at least in part from the second data if the processing block maps the second set of memory bits.