Patent ID: 6856351

Claim:
An image array having a plurality of pixels disposed in rows and columns, wherein each pixel includes a photodiode, a thin film transistor (TFT), and a clamping diode, the image array further comprising: a plurality of data lines, each of the plurality of data lines coupled to each of a source or a drain of the thin film transistor of a row or a column of pixels; a plurality of gate lines, each of the plurality of gate lines coupled to each of a gate of the thin film transistor of a column or a row of pixels; a plurality of bias lines carrying a bias voltage, each of the plurality of bias lines coupled to each of an anode of the photodiode of the pixels in a row or a column of pixels; and a plurality of clamp lines electrically interconnecting the clamping diodes in individual ones of the rows or columns of the array, wherein the clamp lines carry a clamping voltage, wherein the clamping diode in each pixel is electrically connected between a storage node of the photodiode and the clamp line.