Patent ID: 8067695

Claim:
A wiring board comprising: an outermost insulating layer having a first surface and a second surface opposite to the first surface, the outermost insulating layer including a cavity formed on the first surface thereof at a position corresponding to an electronic component mounting area; a multilayer structure in which a plurality of wiring layers and insulating layers are built up one after the other on the second surface of the outermost insulating layer; a first pad formed on a bottom surface of the cavity and exposed from the first surface of the outermost insulating layer; a second pad formed on and exposed from the first surface of the outermost insulating layer in a peripheral region of the cavity; and vias formed in the outermost insulating layer and electrically connecting a wiring layer positioned on the second surface of the outermost insulating layer to the first pad and the second pad, respectively, wherein an exposed surface of the first pad is flush with the first surface of the outermost insulating layer, and an exposed surface of the second pad is flush with the first surface of the outermost insulating layer.