Patent ID: 7427793

Claim:
A self-aligned interconnect structure, comprising: a substrate assembly comprising a silicon substrate having at least one vertically extending segment, wherein the at least one vertically extending segment is doped to form at least one active area; a trench in the silicon substrate, wherein the trench is filled with a dielectric material to form an oxide isolation region, the at least one active area self-aligned along a planar vertical interface with the dielectric material and extending substantially the same depth as the trench; and at least one contact hole in the oxide isolation region immediately adjacent to an edge of the at least one vertically extending segment, wherein at least a portion of the at least one contact hole is filled with an electrically conductive material, the electrically conductive material abutting the edge of the at least one vertically extending segment and abutting the dielectric material of the oxide isolation region at two edges.