Patent ID: 8631271

Claim:
A memory system for detecting a failing memory channel and performing a recovery operation on a failing memory channel, comprising: a memory controller; and a plurality of memory channels in communication with the memory controller; the memory system configured to perform a method comprising: receiving notification of the failing memory channel; performing the recovery operation on the failing memory channel the recovery operation including performing clock calibration on the failing memory channel while other memory channels of the plurality of memory channels are performing normal system operations, and performing data calibration on the plurality of memory channels based on completion of the clock calibration on the failing memory channel; bringing the recovered channel back into operational mode with the other memory channels for store operations; continuing to mark the recovered channel to guard against stale data; removing any stale data after the recovery operation is complete; and removing the mark on the recovered channel to allow the normal system operations with all of the memory channels, the removing based on completing the removing any stale data.