Patent ID: 7249255

Claim:
A cryptographic processing system, comprising: a cipher circuit to perform encryption processing for a plurality of data packets; and a hash circuit coupled to receive at least a portion of the plurality of data packets for hash processing after encryption processing by the cipher circuit, wherein the hash circuit comprises: (i) a first hash channel and a second hash channel each operable to perform the hash processing using at least two different hash algorithms; and (ii) a common hash memory coupled to receive the portion of the plurality of data packets, wherein: the common hash memory comprises at least a first storage area and a second storage area for storing data, the first and second storage areas each selectively coupled to provide data to the first hash channel or the second hash channel for the hash processing; and the common hash memory is operable to receive and store data from the cipher circuit into the second storage area while data stored in the first storage area is being hashed.