Patent ID: 7408996

Claim:
An apparatus for synchronizing both sides of a transformer circuit for full duplex communication comprising: a transformer isolation barrier having a primary side and a secondary side; a first circuit coupled to said primary side of said transformer, said first circuit configured to communicate a transmit bit stream at a clock frequency from said primary side to said secondary side; and a second circuit coupled to said secondary side of said transformer configured to receive said transmit bit stream, wherein said second circuit comprises an automatically configurable clock recovery circuit configured to determine said clock frequency, said transmit bit stream comprising a preamble sequence during said recovery of said clock frequency; said clock recovery circuit comprising: a phase lock loop having a variable gain voltage controlled oscillator, wherein said phase lock loop has a reference frequency input and said clock frequency as output; and a circuit configured to determine said gain of said voltage controlled oscillator by counting transition edges in said transmit bit stream comprising: a bandgap circuit generating a reference voltage and a reference current; a capacitor circuit coupled to said reference current and to ground; a comparator circuit coupled to said reference voltage in one input terminal and to said capacitor in a second input terminal; and a counter having an output equivalent to said gain, said counter coupled to an output of said comparator circuit and to said transmit bit stream, wherein said counter counts edges in said transmit bit stream until assertion of said output of said comparator circuit.