Patent ID: 8334183

Claim:
A method of forming a semiconductor device, the method comprising: providing a substrate containing an interface layer thereon; depositing a first high-k film on the interface layer, the first high-k film comprising hafnium oxide, zirconium oxide, hafnium silicate, or zirconium silicate, or a combination thereof; depositing a metal-containing oxide threshold voltage adjustment layer on the first high-k film, wherein the metal-containing oxide threshold voltage adjustment layer comprises one or more elements selected from Group II, Group III, Group XIII, and rare earth metals of the Periodic Table of the Elements, or selected from a combination of two or more thereof; depositing a second high-k film on the metal-containing oxide threshold voltage adjustment layer such that the metal-containing oxide threshold voltage adjustment layer is interposed between the first and second high-k films, the second high-k film comprising hafnium oxide, hafnium silicate, zirconium oxide, or zirconium silicate, or a combination of two or more thereof; and performing a heat-treating process following deposition of the metal-containing oxide threshold voltage adjustment layer, following deposition of the second high-k film, following deposition of a gate electrode, or following formation of a gate stack, the performing the heat-treating process including performing the heat-treating process to diffuse elements of the metal-containing oxide threshold voltage adjustment layer into the first high-k film on the interface layer.