Patent ID: 7187192

Claim:
A semiconductor test device comprising a clock recovery circuit having: a time interpolator which receives output data from an LSI device under test and which acquires the output data by timings of a plurality of strobes having constant timing intervals to produce time-series level data and which outputs position data indicating an edge timing of the level data, wherein a clock signal generated by the LSI device under test is superposed on the output data; a selector which receives the time-series level data from the time interpolator and selectively provides the time-series level data to a comparator of the semiconductor test device; and a digital filter which receives the position data from the time interpolator and produces a recovery clock indicating a correct timing of the clock signal from the LSI device under test created based on the position data for retrieving the output data wherein the recovery clock is supplied to the selector as a selection signal for selecting the time-series level data.