Patent ID: 7867836

Claim:
A method for manufacturing a junction semiconductor device, comprising: forming a high-resistance layer of a first conductive type on one surface of a semiconductor substrate of the first conductive type, forming a low-resistance layer of a first conductive type that acts as a source region on said high-resistance layer of a first conductive type, forming a gate region of a second conductive type at a periphery of said source region, forming a recombination-inhibiting semiconductor layer of a second conductive type in the vicinity of the surface of the high-resistance layer between said gate region and said source region, forming a recombination-inhibiting film on the semiconductor crystal surface between said gate region and said source region, joining a source electrode on said source region and a gate electrode on said gate region, and a drain electrode on the other surface of said semiconductor substrate, and forming an upper layer electrode above the source electrode and the gate electrode.