Patent ID: 8778772

Claim:
A method of forming a transistor, comprising: forming a silicon dioxide isolation structure in a semiconducting substrate, said silicon dioxide isolation structure defining an active region in said substrate; performing an ion implantation process using an electrically neutral material on an entire upper surface of said silicon dioxide isolation structure to create a damaged region in said silicon dioxide isolation structure, wherein said damaged region of said silicon dioxide isolation structure etches at a faster rate than an undamaged region of said silicon dioxide isolation structure; after performing said ion implantation process, performing an etching process to remove at least a portion of said damaged region to thereby define a recess in said silicon dioxide isolation structure, wherein a portion of said recess extends below an upper surface of said semiconducting substrate and exposes a sidewall of said active region; forming a gate insulation layer above said active region, wherein a portion of said gate insulation layer extends into said recess; and forming a gate electrode above said gate insulation layer, wherein a portion of said gate electrode extends into said recess.