Patent ID: 7616022

Claim:
A circuit for detecting skew of transistors, the circuit comprising: a linear voltage generating unit including the transistors under test for outputting a linear voltage by using a first supply voltage; a first attenuation unit for reducing voltage level variation of the linear voltage according to the performance of the transistors; a saturation voltage generating unit for outputting a saturation voltage by using a second supply voltage whose level is higher than that of the first supply voltage; a voltage adjusting unit for adjusting an output of the first attenuation unit to a certain voltage level so as to easily compare said output with the saturation voltage; and a comparison unit for comparing an output of the voltage adjusting unit and the saturation voltage, wherein the first attenuation unit is an operational amplifier whose inverting input node is coupled with the linear voltage and non-inverting input node receives the ground voltage, and which employs a resistor having a resistance between and the inverting input node.