Patent ID: 7509460

Claim:
A memory controller for a node in a multi-node computer system, the memory controller comprising: logic configured to determine if an address corresponding to a request received by the memory controller on an intranode interconnect is a remote address mapped to remote memory in another node of the multi-node computer system or a local address mapped to a memory in the node that includes the memory controller, wherein a first portion of the memory in the node is allocated to store copies of remote data and a remaining portion stores local data; a control unit coupled to the logic, wherein the control unit is configured to write writeback data to a location in the first portion, wherein the writeback data corresponds to a writeback request from the intranode interconnect that has an associated remote address detected by the logic, wherein the control unit is configured to determine the location responsive to the associated remote address and one or more indicators that identify the first portion in the memory, and wherein the writeback request is generated by a cache in the node in response to evicting the writeback data from the cache; and a mask register for storing a mask, and wherein the logic is configured to use the mask to mask off one or more portions of an address that do not distinguish remote addresses from local addresses.