Patent ID: 6904577

Claim:
A hardware debugging system for debugging a fabricated integrated circuit containing an electronic circuit design, the hardware debugging system comprising: an instrumentor comprising computer readable code that is stored on a computer readable medium, the computer readable code comprising instruction to perform a method when executed, the method comprising: receiving a high level HDL description of the electronic circuit design, at least a portion of the high level HDL description being written in a language selected from the group consisting of: VHDL, Verilog HDL, C or C++, and, SystemC; determining aspects of the electronic circuit design to be examined or modified during debugging, determining additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and producing a modified high level HDL description of the electronic circuit design by incorporating an HDL description of the additional circuitry into the high level HDL description of the electronic circuit design; a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the modified high level HDL description or the high level HDL description; and, a HDL-based hardware debugger comprising computer readable code that is stored on a computer readable medium, the computer readable code comprising instruction to perform a second method when executed, the second method comprising: debugging the fabricated integrated circuit fabricated in accordance with the modified high level HDL description by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the modified high level HDL description or the high level HDL description.