Patent ID: 7492196

Claim:
A circuit comprising: a first circuit portion comprising transistors of a first conductivity type; a second circuit portion comprising transistors of a second conductivity type, said first and second circuit portions being interconnected by an output, said first circuit portion driving said output in response to a first pulse signal and a first DC bias signal, said second circuit portion driving the output in response to a second pulse signal and a second DC bias signal; a first two-terminal discrete capacitor for controlling a start time and stop time for driving said output by said first circuit portion, said first capacitor having a first terminal for receiving a complementary signal of said first pulse signal and a second terminal interconnected to said first circuit portion; and a second two-terminal discrete capacitor for controlling a start time and stop time for driving said output by said second circuit portion, said second capacitor having a first terminal for receiving a complementary signal of said second pulse signal and a second terminal interconnected to said second circuit portion.