Patent ID: 7078885

Claim:
A DC—DC CMOS converter comprising: a power transistor with a source connected to a supply rail, a drain connected to a load cell and a gate connected to an output of a gate driver; an excess-current protection circuit that includes a reference current source in series with a reference resistor between the supply rail and ground to provide a reference current, a current sense transistor with a source connected to the supply rail, a gate connected to the gate of the power transistor and a drain, a differential amplifier comparing the voltage levels at the drain of the power transistor and at the drain of the current sense transistor, and having an output that delivers a current limit control signal, a programmable current mirror arrangement that amplifies the reference current to a sense current through said current sense transistor, a soft-start circuit with a current source and a capacitor connected in series between the supply rail and ground, and a control transistor connected between the reference current source and the reference resistor and having a gate connected to the interconnection node of the current source and capacitor, and a soft-stop circuit that acts to reduce the voltage level at the gate of the control transistor in the soft-start circuit in response to a reduction of the sense current through said current sense transistor due to the supply voltage at the supply rail dropping below a normal operating level of the converter.