Patent ID: 6856944

Claim:
A system, comprising: a host bus to transfer at least one of information and instructions; a peripheral interface bus to interface to at least one peripheral; a processor arrangement coupled to the host bus, the processor arrangement including an execution unit to execute instructions; a main memory coupled to the host bus to store the instructions; a read-only-memory coupled to the host bus to store information for use by the processor arrangement; a bridge device to communicate information between the host bus and the peripheral interface bus, the bridge device including a multi-mode measurement arrangement to measure at least one of a metric and a performance parameter of the system, wherein the system is operable to perform the following steps: (a) providing one of a reference parameter and a next reference parameter; (b) receiving starting event information corresponding to a logic event, ending event information corresponding to the logic event, and at least one identification parameter information associated with the logic event; (c) determining an actual parameter corresponding to at least one of a duration parameter and a capacity parameter corresponding to the logic event; (d) comparing the actual parameter to the reference parameter and providing a comparison result; and (e) if the comparison result at least indicates that the actual parameter is no less than the reference parameter, performing at least one of replacing the reference parameter with the actual parameter to provide the next reference parameter and providing the at least one identification parameter.