Patent ID: 7755599

Claim:
An electrophoretic display device, comprising: a first substrate; a second substrate; an electrophoretic material interposed between the first substrate and the second substrate, the electrophoretic material including a positively charged particle; a common electrode provided on the second substrate; a plurality of signal lines provided on the first substrate; a plurality of scan lines provided on the first substrate; a plurality of storage capacitor lines provided so as to correspond to the plurality of scan lines; and a plurality of pixels, each of the plurality of pixels being provided at an intersection of the signal line and the scan line, each of the plurality of pixels including: a pixel electrode; a storage capacitor having a first electrode and a second electrode, the second electrode of the storage capacitor being coupled to the storage capacitor line; and a thin film transistor (TFT), a source electrode of the TFT being coupled to a first electrode of the storage capacitor and the pixel electrode, a drain electrode of the TFT being coupled to the signal line, and a gate electrode of the TFT being coupled to the scan line, wherein each of the plurality of storage capacitor lines is driven independently of each other, and is driven independently of the plurality of scan lines, wherein a capacitor line high select signal VSH, a capacitor line non-select signal VSC or a capacitor line low select signal VSL is supplied to each of the plurality of storage capacitor lines, the capacitor line high select signal VSH has a higher electric potential than an electric potential of the capacitor line non-select signal VSC, and the electric potential of the capacitor line non-select signal VSC is higher than an electric potential of the capacitor line low select signal VSL, and wherein a common electrode low level signal Vcom-L or a common electrode central level signal Vcom-C having a higher electric potential than an electric potential of the common electrode low level signal Vcom-L is supplied to the common electrode, wherein the capacitor line low select signal VSL is supplied to the storage capacitor line at the time of a positively charged particle reset in which the positively charged particle is drawn to the second substrate side, and the capacitor line high select signal VSH is supplied to the storage capacitor line during a period in which an image signal is introduced into each pixel.