Patent ID: 8478834

Claim:
A method for low latency, high bandwidth data transfers between compute nodes in a parallel computer, the method comprising: receiving, by an origin direct memory access (‘DMA’) engine on an origin compute node, a buffer identifier for a buffer containing data for transfer to a target compute node; sending, by the origin DMA engine to a target DMA engine on the target compute node, a request to send (‘RTS’) message; transferring, by the origin DMA engine, a portion of the data to the target compute node using a memory FIFO operation, the memory FIFO operation specifying one end of the buffer from which to begin transferring the portion of the data; receiving, by the origin DMA engine, an acknowledgement of the RTS message from the target compute node; and transferring, concurrently with the transfer of the portion of the data to the target compute node using the memory FIFO operation, by the origin DMA engine in response to receiving the acknowledgement of the RTS message, any remaining portion of the data to the target compute node using a direct put operation, including initiating the direct put operation without invoking an origin processing core on the origin compute node, the direct put operation specifying the other end of the buffer from which to begin transferring the remaining portion of the data.