Patent ID: 7713782

Claim:
A method for electrically connecting I/O bond-pads on a chip to corresponding I/O bond-pads on a substrate, the method comprising: forming an under bump metallization layer (UBM) having a thickness of 0.1 to 5.0 micrometers over the I/O bond-pads on the chip; forming a fusible layer having a thickness of 0.5 to 50 micrometers over the UBM, the UBM and fusible layer being formed with the same mask; forming respective stud-bumps made of non-fusible material on the I/O bond-pads on the substrate by, (a) heating a first end of a wire to form a sphere, (b) pressing the sphere against the I/O bond-pads on the substrate to form a ball bond having a height of 30-75 micrometers, (c) cutting a second end of the wire, and (d) applying mechanical pressure to the second end of the wire to form a flat surface of uniform height of 30 to 60 micrometers for each of the stud-bumps; flipping the chip and placing the flipped chip on the stud-bumps such that the I/O bond-pads on the chip are registered with corresponding stud-bumps on the substrate; and attaching the I/O bond-pads on the chip to the respective stud-bumps by reflowing the fusible layer or applying thermal compression bonding to electrically connect the non-fusible material of the respective stud-bumps to the I/O bond-pads on the chip.