Patent ID: 8324026

Claim:
A method for manufacturing a semiconductor component, comprising: providing one or more electrical interconnect structures embedded in a mold compound, the one or more electrical interconnect structures having first and second major surfaces and a plurality of edges coupling the first major surface to the second major surface; forming a dimple in a first portion of at least one of the one or more electrical interconnect structures; exposing a portion of a first edge of the plurality of edges of at least one of the one or more electrical interconnect structures; forming a first material over the exposed portion of the first edge; separating the mold compound into at least two portions, and wherein providing the one or more electrical interconnect structures embedded in the mold compound further includes: providing a leadframe having a tie bar with first and second leadframe leads extending from opposing sides of the tie bar; and forming the dimple in the first portion of at least one of the one or more electrical interconnect structures includes forming the dimple on a first edge portion of the tie bar and exposing a portion of the first edge.