Patent ID: 8780635

Claim:
A method of operating a memory system including a memory circuit having an array of non-volatile formed according to a NAND type of architecture, the method comprising: storing each of a first plurality of data patterns along one of a corresponding first plurality of NAND strings of the memory array; storing a first bloom filter corresponding to first plurality of data patterns on the memory circuit; storing an ECC protected copy of each of the first plurality of data patterns on the memory circuit; and subsequently performing a search operation, the search operation including: receiving a search pattern; performing a comparison of the search pattern against the first bloom filter; in response to a positive result from the comparison of the search pattern against the first bloom filter, performing a determination of which of the first plurality of NAND strings conduct in response to the memory cells thereof being biased according to the search pattern; and in response to a negative result from the determination, searching the copies of the first plurality of data patterns for a match with the search pattern.