Patent ID: 8089219

Claim:
An SMPS (Switching Mode Power Supply) circuit for PDP (Plasma Display Panel), comprising: first and second transformers inducing voltages supplied to primary sides to secondary sides; a plurality of DC/DC converters connected to the secondary sides of the first and second transformers and supplying voltages of different sizes; a clamp circuit connected to the secondary side of the first transformer and outputting an address voltage of a predetermined size by receiving a voltage supplied from the first transformer; and a linear regulator unit connected to the DC/DC converter for supplying a low voltage among the DC/DC converters connected to the secondary side of the first transformer and outputting a gate voltage of a predetermined size by receiving the low voltage supplied from the DC/DC converter, wherein the clamp circuit for supplying the address voltage includes: first and second resistors dividing a sustain voltage among the voltages supplied from the DC/DC converters; a first switching means provided with a gate connected to contacts of the first and second resistors and a drain connected to a second rectification unit connected to the second winding of the secondary side of the first transformer to output the address voltage through a source; a third resistor provided with one end connected to the gate of the first switching means; a first Zener diode provided with a cathode connected to the other end of the third resistor and an anode connected to the ground; a second Zener diode provided with a cathode connected to the one end of the third resistor and an anode connected to the source of the first switching means; fourth and fifth resistors dividing the address voltage; a capacitor provided with one end connected to contacts of the fourth and fifth resistors and the other end connected to the cathode of the first Zener diode; and a second switching means provided with a cathode connected to the other end of the capacitor, an anode connected to the ground, and a gate connected to the contacts of the fourth and fifth resistors.