Patent ID: 7847625

Claim:
A switched capacitor circuit with reduced leakage current, comprising: first and second MOS transistors complementarily connected and configured to output an input voltage received from a first node to a second node in response to a first signal; a sampling capacitor a first end of which is connected to the second node; a third MOS transistor configured to connect a second end of the sampling capacitor to a first ground terminal in response to the first signal; a fourth MOS transistor connected between the second node and a third node and configured to connect the first end of the sampling capacitor to a second ground terminal in response to a second signal; an operational amplifier having a feedback capacitor; a fifth MOS transistor configured to connect the second end of the sampling capacitor to the operational amplifier in response to the second signal; and a leakage current reduction circuit with a first end connected to a voltage input end, a second end connected to the first node, and a third end connected to the third node, the leakage current reduction circuit configured to equalize voltages at two or more nodes among the first node, the second node and the third node, whereby preventing leakage current.