Patent ID: 8866175

Claim:
An optoelectronic semiconductor chip, comprising: a semiconductor layer sequence having a first semiconductor region of a first conduction type, a second semiconductor region of a second conduction type and an active zone arranged between the first and the second semiconductor regions; a carrier substrate, wherein the semiconductor layer sequence has a first main area facing the carrier substrate and a second main area lying opposite the first main area; a first electrical contact layer and a second electrical contact layer, which are arranged at least in regions between the carrier substrate and the first main area of the semiconductor layer sequence, wherein the second electrical contact layer is led through a breakthrough in the first semiconductor region and the active zone into the second semiconductor region; an electrically insulating layer that electrically insulates the first electrical contact layer and the second electrical contact layer from one another; and a mirror layer arranged between the semiconductor layer sequence and the carrier substrate; wherein the mirror layer adjoins partial regions of the first electrical contact layer and partial regions of the electrically insulating layer, wherein a predominant part of an interface of the mirror layer that faces the carrier substrate is covered by the first electrical contact layer; wherein the partial regions of the electrically insulating layer that adjoin the mirror layer are covered by the second electrical contact layer in such a way that at no point do they adjoin a surrounding medium of the optoelectronic semiconductor chip; and wherein the semiconductor layer sequence has a cut-out, in which the first electrical contact layer is uncovered in order to form a connection contact.