Patent ID: 7932186

Claim:
A method for fabricating an electronic device, comprising: providing a substrate; entirely forming a first self-assembled monolayer on the substrate; forming a patterned photoresist layer on a portion of the first self-assembled monolayer; removing the first self-assembled monolayer not covered by the patterned photoresist layer until a portion of the substrate is exposed; forming a patterned second self-assembled monolayer on the exposed substrate; removing the patterned photoresist layer to form a patterned first self-assembled monolayer and an adjacent patterned second self-assembled monolayer on the substrate, wherein the patterned first self-assembled monolayer has a higher affinity then that of the patterned second self-assembled monolayer; coating a solution on the substrate, wherein the solution is formed by dissolving or suspending a conductive, semiconductor or insulating material in a solvent; removing the solvent in the solution to selectively form a patterned conductive, semiconductor or insulating layer on the patterned first self-assembled monolayer.