Patent ID: 7277511

Claim:
A two-stage non-linear filter for analog signal gain control (ASGC) in an orthogonal frequency division multiplexing (OFDM) receiver comprising: a discrete-step amplitude detector that receives a digital input signal from an inverse scaling circuit and outputs a digital representation of a magnitude of the digital input signal; and a fast attack filter circuit and a slow decay filter circuit connected in series to provide a response to changes in amplitude of the digital representation of the digital input signal, to control a gain control setting of a digital variable gain amplifier (DVGA) for matching a dynamic range of an analog-to-digital converter that receives an output of the DVGA, wherein the fast attack filter circuit detects an increase in the digital representation of the magnitude of the digital input signal, and provides an output signal for rapidly changing a gain signal output to the DVGA, while the slow decay filter circuit ensures a slow decay of the gain signal when the digital representation of the magnitude of the digital input signal decreases, and the slow decay filter continues to decay the output signal as long as an increasing input signal magnitude is less than a magnitude of the decayed gain control signal.