Patent ID: 6909305

Claim:
A digitally controlled impedance driver circuit in comprising the following: a first voltage supply that is configured to carry a first voltage during operation; an input/output node upon which the digital controlled impedance driver circuit is to apply a signal during operation; a first finger comprising a first field effect transistor unit having a first ideal effective length-to-width ratio and having a source terminal coupled to the first voltage supply, and further comprising a first resistor coupled in series between a drain terminal of the first field effect transistor unit and the input/output node, the first resistor having a first ideal resistance; a second finger comprising a second field effect transistor unit having a second ideal effective length-to-width ratio and having a source terminal coupled to the first voltage supply, wherein the second ideal effective length-to-width ratio is smaller than the first ideal effective length-to-width ratio, the second finger further including a second resistor coupled in series between a drain terminal of the second field effect transistor unit and the input/output node, the second resistor having a second ideal resistance that is smaller than the first ideal resistance, wherein the ratio of the second ideal effective length-to-width ratio to the first ideal effective length-to-width ratio is between forty percent and sixty percent; and a third finger comprising a third field effect transistor unit having a third ideal effective length-to-width ratio and having a source terminal coupled to the first voltage supply, wherein the third ideal effective length-to-width ratio is ninety to one hundred and ten percent of the second ideal effective length-to-width ratio, wherein the third finger further includes a third resistor coupled in series between a drain terminal of the third field effect transistor unit and the input/output node, the third resistor having a third ideal resistance that is ninety to one hundred and ten percent of the second ideal resistance.