Patent ID: 8222113

Claim:
A method for forming a metal-oxide-semiconductor (MOS) device, comprising: providing a substrate having at least an isolation structure; forming a gate structure on the substrate; forming a pair of first spacers on both sidewalls of the gate structure; forming a pair of trenches in the substrate at both sides of the gate structure; performing a selective epitaxy growth process to form a silicon germanium (SiGe) layer filling the trenches; performing a selective growth process to form an amorphous silicon layer on the silicon germanium layer without a pre-amorphization implantation process; removing the first spacers after the amorphous silicon layer is formed; forming a pair of second spacers on both sidewalls of the gate structure after the first spacers are removed; forming a pair of source/drain regions by performing an ion implantation process with the gate structure and the pair of second spacers as a mask; and forming a metal silicide layer on the gate structure and the amorphous silicon layer in the source/drain regions.