Patent ID: 8878510

Claim:
A voltage regulator to generate a regulated output voltage at an output node, said voltage regulator comprising: an amplifier to generate an error voltage between a reference voltage and a voltage at said output node; a first buffer coupled to receive said error voltage and, in response, to drive a first pass transistor, wherein said first buffer includes a non-linear resistance element, wherein a resistance of said non-linear resistance element varies non-linearly with a load current drawn from said output node; and a second buffer coupled to receive said error voltage, and in response, to drive a second pass transistor, wherein said second buffer includes a linear resistance element, wherein a resistance of said linear element is a constant; wherein when a first load current value drawn from said output node is less than a first threshold, said non-linear resistance element has a resistance value such that a current path from a first reference potential to a second reference potential via said first buffer is cut-off, wherein all of said first load current is passed through said second pass transistor; and, when a second load current value drawn from said output node is greater than said first threshold, said non-linear resistance element has a resistance value such that said current path is provided through said first buffer, wherein said second load current is the sum of the currents passed through said first pass transistor and said second pass transistor.