Patent ID: 6887781

Claim:
A method for making multilayer electronic component integrated circuit devices wherein interconnects in the devices have excellent step coverage, uniformity, low resistance and adhesion to CVD-copper comprising the steps of: forming a multilayer electronic component layer by layer with dielectric layers having openings therein with metallization formed in the openings to provide electrical connections between the layers; forming a diffusion barrier layer in the openings in the dielectric layer which diffusion barrier layer is a refractory material containing replaceable silicon atoms; forming a metal rich surface on top of the diffusion barrier layer by reacting the barrier layer with a metal containing reactant and replacing at least part of the replaceable atoms of the diffusion barrier layer with the metal of the metal containing reactant; and filling the openings in the dielectric layer with copper to provide a conductor which contacts the metallization in the dielectric layer to metallization in another layer.