Patent ID: 8362844

Claim:
A delay circuit comprising: a delay unit including a first and a second power supply terminals, a pair of differential signal input terminals, and a pair of differential signal output terminals; said delay unit causing signals entered from said pair of differential signal input terminals to be delayed and output in this delayed state at said pair of differential signal output terminals; a current controller including a current control terminal and exercising control to cause a source current controlled by said current control terminal to flow through said first power supply terminal and said second power supply terminal of said delay unit; and a voltage controller that exercises control to provide for a constant potential difference between said first power supply terminal and said second power supply terminal, wherein said voltage controller exercises control so that a potential difference between said first power supply terminal and said second power supply terminal will be increased or decreased in dependence upon a current value controlled by said current controller and so that said potential difference will be constant without dependency upon voltage levels of signals entered from said differential signal input terminals.