Patent ID: 8462891

Claim:
A circuit to be coupled to a plurality of links including M links, the circuit comprising a receive circuit, wherein the receive circuit includes: M input nodes to receive M input signals from the M links during a time interval, wherein the M input signals represent a set of M symbols associated with a codeword; at least M difference-generating circuits to generate a set of difference signals based on the M input signals, wherein a given difference-generating circuit is coupled to a given pair of the input nodes; a decoder, coupled to the at least M difference-generating circuits, to determine the set of M symbols based on the set of set of difference signals, and to decode the codeword associated with the set of M symbols to a corresponding set of N decoded symbols; a detector to detect a difference in a number of instances of a first value in the set of M symbols and a number of instances of a second value in the set of M symbols, and to assert an error condition in response to the difference being detected; control logic, coupled to the detector, to perform remedial action if the error condition is asserted; register circuitry; and wherein the remedial action includes storing information about one or more links that are associated with the error condition in the register circuitry.