Patent ID: 7745256

Claim:
A computer-readable medium storing computer instructions, which when executed, enables a computer system to determine an arrangement of interconnects that connect a semiconductor chip to a semiconductor chip package substrate, the computer instructions comprising: obtaining a plurality of rectangular-shaped controlled collapse chip connection (C 4 ) contacts; and determining an arrangement of the plurality of rectangular-shaped C 4 contacts along a surface of the semiconductor chip, wherein the arrangement includes locating the plurality of rectangular-shaped C 4 contacts along the surface of the semiconductor chip in an orientation that extends radially from a center of the surface of the semiconductor chip wherein the determining of the arrangement of the plurality of rectangular-shaped C 4 contacts comprises instructions for determining a center point that the plurality of rectangular-shaped C 4 contacts extend radially therefrom, wherein the center point has a position along the surface of the semiconductor chip described as: r>r (1+^CTE( T− 25° C.)), wherein r is the absolute design location of the center point; ^CTE=CTEsubstrate- CTEchip, wherein CTEsubstrate is the CTE of the semiconductor chip package substrate and CTEchip is the CTE of the semiconductor chip; and T is the temperature in Celsius in which the semiconductor chip package substrate is assembled with the semiconductor chip.