Patent ID: 7391083

Claim:
A semiconductor integrated circuit device comprising, over one and same substrate: a first MISFET of a first breakdown voltage; and a second MISFET of a second breakdown voltage lower than the first breakdown voltage, wherein the first MISFET has, over the semiconductor substrate, a first semiconductor region where a first gate electrode constituted by a first conductive film, a first gate insulating film, a source and a drain are formed, wherein the second MISFET has, over the semiconductor substrate, a second gate electrode constituted by a second conductive film, wherein an element isolation region is formed in the semiconductor substrate at a position under a side wall of the first gate electrode, and wherein the width of the element isolation region in a first direction orthogonal to the extending direction of the first gate electrode is larger than the thickness of the second conductive film in a planar region not overlapping the first gate electrode.