Patent ID: 7989794

Claim:
A resistance change memory device comprising a substrate; first wiring lines formed above the substrate; second wiring lines formed above the substrate to cross the first wiring lines and being electrically insulated therefrom; and memory cells disposed at respective crossing points of the first wiring lines and the second wiring lines, one ends thereof being connected to the first wiring lines and the other ends being connected to the second wiring lines, wherein the memory cell includes, a variable resistance element to store as information a resistance value; and a diode connected in series to the variable resistance element, the variable resistance element includes, a recording layer formed of a composite compound containing at least one transition element and a cavity site to house a cation ion; and electrodes formed on the opposite sides of the recording layer, one of the electrodes serving as a cation source in a write or erase mode to supply a cation to the recording layer to be housed in the cavity site therein, and the device further comprises: selector circuits to fix the first wiring lines to a state lower in potential than the second wiring lines when nonselected and to selectively supply positive and negative logic pulses to the first and second wiring lines respectively during data reading or writing.