Patent ID: 7889565

Claim:
A nonvolatile semiconductor memory device comprising: a plurality of electrically reprogrammable memory cells; a read/program circuit, said read/program circuit programming desired data to said plurality of memory cells by supplying a program voltage and a program verification voltage, supplying a first program verification voltage to said plurality of memory cells when programming said data, and supplying a second program verification voltage which has a different voltage level to said first program verification voltage to said plurality of memory cells; and a read/program control circuit which determines memory cells which reach a first data program state and memory cells which do not reach said first data program state when said first program verification voltage is supplied, and which determines memory cells which reach a second data program state and memory cells which do not reach said second data program state when said second program verification voltage is supplied, and changes a programming operation state of each memory cell of said plurality of memory cells based on a result of each determination.