Patent ID: 7203149

Claim:
A PLL circuit comprising: (a) a phase comparator detecting a phase difference (b) a charge pump converting the phase difference into a voltage (c) a loop filter smoothing the voltage, (d) a voltage-controlled oscillator receiving the smoothed voltage as a control voltage, and wherein said phase comparator compares phase of an output signal from said voltage-controlled oscillator, or phase of an output signal obtained by frequency-dividing the output of said voltage-controlled oscillator by a frequency divider to an input signal; wherein an output signal from said voltage-controlled oscillator, or frequency-divided output signal of the frequency divider, is fed back and input to said phase comparator to have its phase compared with that of said input signal; wherein said voltage-controlled oscillator has a non-inverting input terminal and an inverting input terminal, and a difference voltage between terminal voltages impressed upon respective ones of said non-inverting and inverting input terminals is input to said voltage-controlled oscillator as a control voltage so that said voltage-controlled oscillator will oscillate at a frequency in accordance with this control voltage; and wherein said charge pump controls enlarging or reducing the difference voltage between both variable terminal voltages of non-inverting and inverting input terminals of said voltage-controlled oscillator in accordance with an output from said phase comparator representing the result of the phase comparison, said PLL circuit further comprising first and second loop filters connected at output terminals thereof to the non-inverting and inverting input terminals, respectively, of said voltage-controlled oscillator; wherein said charge pump performs the following control that (i) in accordance with an output from said phase comparator representing the result of the phase comparison, a first capacitor a terminal voltage whereof provides an output terminal voltage of said first loop filter is charged to thereby raise the terminal voltage of the non-inverting input terminal of said voltage-controlled oscillator, and a second capacitor a terminal voltage whereof provides an output terminal voltage of said second loop filter is discharged to thereby lower the terminal voltage of the inverting input terminal of said voltage-controlled oscillator, whereby the difference voltage is enlarged at the time of an operation for raising the oscillation frequency of said voltage-controlled oscillator; and in accordance with the output from said phase comparator representing the result of the phase comparison, said first capacitor is discharged to thereby lower the terminal voltage of the non-inverting input terminal of said voltage-controlled oscillator, and said second capacitor is charged to thereby raise the terminal voltage of the inverting input terminal of said voltage-controlled oscillator, whereby said difference voltage is reduced at the time of an operation to lower the oscillation frequency of said voltage-controlled oscillator.