Patent ID: 8738859

Claim:
An apparatus, comprising: a processor; and a memory coupled to the processor, wherein the memory comprises instructions which, when executed by the processor, cause the processor to: determine a measure of a characteristic of a data object, wherein the characteristic is indicative of an access pattern associated with the data object; select one caching structure, from a plurality of caching structures, in which to store the data object based on the measure of the characteristic, wherein each individual caching structure in the plurality of caching structures stores data objects having a similar measure of the characteristic with regard to each of the other data objects in that individual caching structure; store the data object in the selected caching structure; expand a reference to the data object to reference the selected caching structure; and perform at least one processing operation on the data object stored in the selected caching structure, wherein the plurality of caching structures comprises at least one operand buffer cache that is configured to store representations of data objects having a relatively high spatial locality with regard to one another and is configured to store representations of data objects having a relatively high temporal locality with regard to one another, at least one structure cache that is configured to store structured objects accessed according to one or more common properties of the objects, wherein the structured objects are objects that store information about data objects, and a software cache that is configured to store representations of data objects that have neither a relatively high spatial or temporal locality with regard to other data objects.