Patent ID: 8823165

Claim:
A microelectronic package, comprising: a substrate having first and second opposed surfaces; at least two pairs of microelectronic elements, each pair of microelectronic elements including an upper microelectronic element and a lower microelectronic element, the pairs of microelectronic elements being fully spaced apart from one another in a horizontal direction parallel to the first surface of the substrate, each lower microelectronic element having a front surface facing the first surface of the substrate and a plurality of contacts at the front surface, the front surfaces of the lower microelectronic elements being arranged in a single plane parallel to the first surface, a surface of each of the upper microelectronic elements at least partially overlying a rear surface of the lower microelectronic element in its pair, the microelectronic elements together configured to predominantly provide memory storage array function; a plurality of terminals exposed at the second surface, the terminals configured for connecting the microelectronic package to at least one component external to the microelectronic package; and electrical connections extending from at least some of the contacts of each lower microelectronic element to at least some of the terminals, wherein at least some of the plurality of contacts of the lower microelectronic element of first and second ones of the pairs of microelectronic elements is arranged in a respective column of contacts defining respective first and second axes, the first and second axes being transverse to one another.