Patent ID: 8724511

Claim:
A switch comprising: a memory storing computer program instructions; a processor communicatively coupled to the memory, the processor configured to execute the computer program instructions, which, when executed on the processor, cause the processor to perform operations comprising: receiving, at the switch via a network signaling protocol, a setup message identifying a path of a circuit as a specified sequence of links; determining whether sufficient bandwidth is available for the circuit on a specified link associated with the switch; if sufficient bandwidth for the circuit is not available on the specified link, substituting a parallel link for the specified link in the path of the circuit and allocating resources for the parallel link, the substituting comprising: allocating bandwidth on the parallel link for the circuit; updating the setup message to replace the specified link with the parallel link in the specified sequence of links, wherein updating the setup message generates an updated setup message; and transmitting a de-allocation message to a source switch, the de-allocation message traversing the path of the circuit and de-allocating resources allocated based on the setup message, based on whether sufficient bandwidth for the circuit is available on the parallel link.