Patent ID: 7643602

Claim:
A method for estimating a frequency difference between a transmitter clock in a transmitting device and a receiver clock in a receiving device, comprising: receiving a signal from the transmitting device at the receiving device, the received signal having a transmitter frequency; generating a local signal at the receiving device, the local signal having a starting frequency; comparing a received signal phase and a local signal phase to determine an adjusted error signal representing a phase difference between the received signal and the local signal; adjusting a current frequency of the local signal from the starting frequency to the transmitting frequency over a time period; filtering the adjusted error signal using a non-integrating filter to generate a proportional path signal; integrating the adjusted error signal over the time period to generate an integrated error signal; summing the proportional path signal and the integrated error signal to generate a filtered error signal, filtering the integrated error signal to generate a frequency difference estimate indicative of the frequency difference between the transmitter frequency and the starting frequency; storing a frequency offset value in a memory element, the frequency offset value being updated based on the frequency difference estimate; and generating an agile clock signal based on a receiver clock signal, the frequency offset value, and the filtered error signal, wherein the local signal is generated in response to the agile clock signal.