Patent ID: 7321502

Claim:
An apparatus, comprising: a) a capacitor comprising dielectric material, said capacitor being one capacitor amongst an array of capacitors architecturally arranged into rows and columns; b) circuitry to provide a first voltage to said capacitor, said first voltage being large enough to cause said dielectric material to suffer dielectric breakdown; c) a current source to drive current through said capacitor during said dielectric breakdown to write data into said capacitor; d) a circuit to read said data when said circuitry provides a second voltage to said capacitor after said dielectric breakdown, said second voltage inducing a smaller voltage drop across said capacitor than a voltage drop across said capacitor induced by said first voltage; e) a node, said node coupled between: i) said capacitor, and, ii) said current source and said circuit; f) protection circuitry coupled between said node and said capacitor, said protection circuitry to protect said circuit and said current source from a maximum permissible source-drain voltage induced by said circuitry when it provides said first voltage, said protection circuitry also having an enable input to control whether said protection circuitry permits an electrically conductive path between said node and said capacitor; g) row select logic circuitry coupled to said enable input, said row select logic circuitry to establish, through said enable input, an electrically conductive path between said node and said capacitor when one of said capacitor's row or column within said array is selected.