Patent ID: 7977966

Claim:
An internal voltage generating circuit of a semiconductor device, comprising: a standby internal voltage generating unit configured to drive an internal voltage to a first voltage level; an internal voltage controlling unit configured to generate an active signal in response to an internal control signal and a test operation signal, the test operation signal being activated in a test operation of the semiconductor device; and an active internal voltage generating unit configured to selectively drive the internal voltage in response to the active signal and stop driving the internal voltage after detecting that the internal voltage reached a second voltage level different from the first voltage level during a normal operation of the semiconductor device and drive the internal voltage regardless of the active signal during the test operation, wherein the internal voltage controlling unit includes: a first internal voltage controlling unit configured to output a control signal in response to the internal control signal; and a second internal voltage controlling unit configured to output the active signal in response to the control signal and the test operation signal.