Patent ID: 8686573

Claim:
A semiconductor device comprising: (a) a semiconductor chip having a surface on which a first pad and a second pad adjacent to the first pad are arranged; (b) a wiring member having an upper surface on which the semiconductor chip is mounted, a first external terminal electrically connected to the first pad of the semiconductor chip, and a second external terminal electrically connected to the second pad of the semiconductor chip; (c) a first metal wire electrically connecting the first pad of the semiconductor chip and the first external terminal of the wiring member to each other; (d) a second metal wire electrically connecting the second pad of the semiconductor chip and the second external terminal of the wiring member to each other; and (e) a sealing body for sealing the semiconductor chip, a portion of the wiring member, the first metal wire, and the second metal wire, wherein the first metal wire is electrically connected to the first pad via a first metal ball, and a first trench is formed in a portion of a surface of the first pad sandwiched between the first metal ball and the second pad in a plan view.