Patent ID: 8269468

Claim:
A charging circuit comprising: a current mirror block configured to charge a load in response to a control voltage applied thereto; and a charge controller configured to generate the control voltage in response to comparison result values obtained by comparing a current sensing value and a voltage sensing value of the current mirror block with respective reference values, wherein the comparison result values are applied to the gates of MOS transistors connected in series, and wherein the charge controller is configured to switch a charge mode from a constant current charge mode to a constant voltage charge mode when a charge state of the load reaches a predetermined state; wherein the MOS transistors include first, second, and third MOS transistors, a bias voltage is connected to a gate of the first MOS transistor, each of the comparison result values is applied to a gate of a corresponding one of the second and third MOS transistors, and the control voltage is obtained from a node between the first MOS transistor and the second and third MOS transistors.