Patent ID: 7467272

Claim:
A method for write protection of subroutine return addresses, the method comprising: calling a subroutine, including storing in a stack memory address a subroutine return address; locking, by a computer processor, the stack memory address against write access, including storing the stack memory address in a protected memory lockword, wherein the protected memory lockword comprises a portion of a protected content addressable memory; receiving in the computer processor an instruction to write data to the locked stack memory address, further comprising: receiving an instruction to write data to a memory address; and determining, in dependence upon protected memory lockwords, that the instruction to write data to a memory address is an instruction to write data to the locked stack memory, including placing the memory address on the input lines of the content addressable memory and identifying that the content addressable memory output line is set to ‘true’; and suspending execution of a current instruction stream in response to the instruction to write data to the locked stack memory address.