Patent ID: 7807578

Claim:
A method for fabricating a semiconductor mask, comprising: providing a semiconductor stack having a sacrificial mask comprised of a series of lines, each line of said series of lines having sidewalls and ends; depositing a spacer layer above said semiconductor stack and conformal with said sacrificial mask; etching said spacer layer, the etching to provide a spacer mask having spacer lines adjacent to the sidewalls of each line of said series of lines of said sacrificial mask and portions of said spacer mask wrapping around the ends of each line of said series of lines, and to expose a top surface of said sacrificial mask, wherein the spacer lines adjacent to the sidewalls of each line of the series of lines of said sacrificial mask are discontinuous from the spacer lines adjacent to the sidewalls of all of the other lines of the series of lines of said sacrificial mask; depositing and patterning a photoresist layer above said spacer mask and said sacrificial mask to form exposed portions of said spacer mask wrapping around the ends of each line of said series of lines; etching the exposed portions of said spacer mask to crop said spacer mask by removing the portions of said spacer mask wrapping around the ends of each line of said series of lines; and, subsequent to etching said spacer mask, removing said sacrificial mask to provide a cropped spacer mask.