Patent ID: 7557624

Claim:
A phase locked loop providing an output frequency that bears a fractional relationship to a frequency of an input signal, comprising: a controlled oscillator for generating the output frequency; a feedback loop coupled to the output of the controlled oscillator and generating a feedback signal; and a phase detector for comparing the input signal with the feedback signal to generate a phase signal for controlling the controlled oscillator, said phase detector comprising a modulo N counter and a modulo M counter, where N and M are integers, one of said counters receiving the input signal and the other of said counters receiving the feedback signal, and wherein the outputs of said counters are applied to respective first and second scaling units, the first scaling unit applying an M/N scaling factor, and the outputs of said scaling units being applied to a subtractor to provide the phase signal, whereby said phase detector includes a scaling stage for scaling said phase information in the amplitude domain to produce the desired output frequency.