Patent ID: 8227864

Claim:
A semiconductor device comprising: a plurality of first transistors formed in a first region in a semiconductor layer in a multilayer substrate having, on a semiconductor substrate, an insulating layer and the semiconductor layer in order from the semiconductor substrate; a plurality of second transistors formed in a second region in the semiconductor layer; a first impurity layer formed in a region opposed to the first region in the semiconductor substrate; a second impurity layer formed in a region opposed to the second region in the semiconductor substrate; a first isolation part that isolates the first and second regions from each other and electrically isolates the first and second impurity layers from each other to a degree that at least current flowing between the first and second impurity layers is interrupted; a second isolation part which is formed between first transistors adjacent to each other among the plurality of first transistors, penetrates the semiconductor layer, and does not penetrate the first impurity layer; and a third isolation part which is formed between second transistors adjacent to each other among the plurality of second transistors, penetrates the semiconductor layer, and does not penetrate the second impurity layer, wherein the second isolation part has a first through hole penetrating in a layer stack direction, and a first conduction part formed at least in the first through hole and electrically connected to the first impurity layer, and the third isolation part has a second through hole penetrating in the layer stack direction, and a second conduction part formed at least in the second through hole and electrically connected to the second impurity layer.