Patent ID: 7932156

Claim:
A method of manufacturing a semiconductor device with a substrate and a semiconductor body of silicon which is provided with a bipolar transistor with an emitter region, a base region and a collector region of a first conductivity type, a second conductivity type opposite to the first conductivity type and said first conductivity type, respectively, the method comprising: forming a first semiconductor region including the collector region or the emitter region in the semiconductor body, forming, on top of the first semiconductor region, a second semiconductor region including the base region, forming, on top of the second semiconductor region, a third semiconductor region including the other of said collector region and said emitter region, providing said semiconductor body with a constriction at the location of the transition between the first and the second semiconductor region, forming said constriction by means of a buried electrically insulating region that is formed in the semiconductor body, characterized in that a part of the semiconductor body that is present above the buried electrically insulating region is formed in such a manner that it is monocrystalline, and forming a region of a mixed crystal of silicon and germanium at the location of the buried electrically insulating region that is to be formed, selectively etching the region, and filling a cavity formed by the selective etching with an electrically insulating material.