Patent ID: 8575584

Claim:
A resistive memory device comprising: a semiconductor substrate having a first type conductivity; a plurality of vertical selection transistors formed on said semiconductor substrate in an array, each of said plurality of vertical selection transistors including: a semiconductor pillar protruded from said semiconductor substrate, top region of said semiconductor pillar having a second type conductivity opposite to the first type conductivity provided in said semiconductor substrate; and a gate electrode surrounding said semiconductor pillar with a gate dielectric layer interposed therebetween, said gate electrode being lower in height than said semiconductor pillar; a plurality of contact studs with each contact stud being self-aligned to the top region one of the semiconductor pillars and providing Ohmic contact for one of said vertical selection transistors; a plurality of resistive memory elements with each resistive memory element disposed on top of one of said contact studs, said plurality of resistive memory elements being arranged in a square array with a pitch of 2F, where F is a minimum lithography feature size for the resistive memory device; a plurality of parallel word lines with each word line connecting a row of gate electrodes of said vertical selection transistors, said parallel word lines extending along a first direction and being monolithic with said row of gate electrodes; a plurality of parallel bit lines respectively connecting rows of said resistive memory elements, said parallel bit lines extending along a second direction different from the first direction provided in said parallel word lines; and a plurality of parallel source lines with the second type conductivity formed in top regions of said semiconductor substrate with each source line being disposed parallel to and in between word lines connecting adjacent rows of said vertical selection transistors, wherein a pair of said source lines function as common source for adjacent rows of said vertical selection transistors.