Patent ID: 7120551

Claim:
A method for estimating electromagnetic interference (EMI) of a semiconductor integrated circuit which includes first and second supply lines electrically connected to first and second external terminals and a plurality of cells which are connected between the first and second supply lines and have a transistor and a decoupling capacitor, the method comprising: first step of calculating a first resistance value, which is a resistance value of the first and second supply lines, from mask layout information of the semiconductor integrated circuit; second step of calculating a second resistance value, which is a resistance value of the decoupling capacitor of the plurality of cells, from the mask layout information; third step of calculating a third resistance value, which is a resistance value of the transistor of the plurality of cells, from the mask layout information; fourth step of calculating a resistance value between the first and second external terminals from the first to third resistance values respectively obtained by the first to third steps; and fifth step of estimating EMI of the semiconductor integrated circuit based on the resistance value between the first and second external terminals obtained in the fourth step.