Patent ID: 8455993

Claim:
A method of manufacture of an integrated circuit packaging system comprising: forming a first lead adjacent and staggered to a second lead, the first lead having a first external connection portion with a first external conductive layer and a first internal connection portion, the first external connection portion oriented laterally outwards from the first internal connection portion, and the second lead having a second external connection portion with a second external conductive layer and a second internal connection portion; forming a third lead adjacent to the first internal connection portion and the second internal connection portion along adjacent sides of the third lead; connecting an integrated circuit device with the first internal connection portion, with the third lead, and with the second internal connection portion; forming an encapsulation over the integrated circuit device with the first lead, the second lead, the third lead, the first external connection portion, and the second external connection portion exposed; and forming a solder mask on the encapsulation, on the first lead, and on the second lead with the first external conductive layer and the second external conductive layer exposed from the solder mask.