Patent ID: 7336526

Claim:
A semiconductor device comprising: a power supply terminal; a plurality of word lines extending in a first direction; a plurality of bit lines extending in a second direction and intersecting with said plurality of word lines; a memory array including a plurality of memory cells disposed at the intersections of said plurality of word lines and said plurality of bit lines; a plurality of word drivers connected to each of said plurality of word lines; a plurality of read circuits and write circuits connected to said plurality of bit lines; and a power supply circuit that converts a power fed to said power supply terminal and supplies said power to internal circuits; and a detect circuit which detects variations in power supply potential, wherein each of said plurality of memory cells has a selection element and a storage element alternately connected in series to corresponding one line of said plurality of bit lines, wherein the control electrode of said selection element is connected to corresponding one line of said plurality of word lines, wherein said storage element stores data according to the changes in resistance and allows rewriting the information by flowing electric current, and wherein said selection element is unselected by said word lines, when said detect circuit detects variations in power supply potential.