Patent ID: 8013677

Claim:
An apparatus comprising: an integrator that is configured to receive first and second analog signals and to output a first amplified signal and a second amplified signal based at least in part on the first and second analog signals wherein the integrator includes a reference changer that determines whether a first amplitude is higher than a second amplitude based at least in part on the first and second analog signals, and wherein the reference changer selectively applies a first resistance between a reference node and a first output node that receives the first amplified signal and selectively applies a second resistance between the reference node and a second output node that receives the second amplified signal when the first amplitude is higher than the second amplitude, and wherein the reference changer selectively applies the second resistance between the reference node and the first output node and selectively applies the first resistance between the reference node and the second output node when the second amplitude is higher than the first amplitude; and first and second comparators coupled to the integrator to receive the first and second amplified signals, wherein the first and second comparators compare the first and second amplified signals to a reference signal and output first and second pulse width modulated (PWM) signals having respective first and second pulse widths based at least in part on the comparisons between the first and second amplified signals and the reference signal.