Patent ID: 7214598

Claim:
A method of forming a lattice-tuning semiconductor substrate, comprising: (a) epitaxially growing on a Si surface a first graded SiGe layer having a Ge composition ratio which increases across the layer from a minimum value to a first level; (b) epitaxially growing on top of the first graded SiGe layer a first uniform SiGe layer having a Ge composition ratio at said first level which is substantially constant across the layer; (c) annealing at least the first graded SiGe layer at an elevated temperature in order to substantially fully relieve the strain in the SiGe layers; and (d) after annealing step (c), epitaxially growing on top of the first uniform SiGe layer a second graded SiGe layer having a Ge composition ratio which increases across the layer from said first level to a second level greater than said first level.