Patent ID: 7544573

Claim:
A method of manufacturing a semiconductor device, comprising: forming a first gate electrode on a first impurity doped region of a second conductivity type formed in a semiconductor substrate of a first conductivity type; forming a second gate electrode on a second impurity doped region of the first conductivity type formed in the semiconductor substrate of the first conductivity type; forming a first gate insulation film on the first impurity doped region; forming a first gate electrode on the first gate insulation film; forming a second gate insulation film on the second impurity doped region; forming a second gate electrode on the second gate insulation film; forming a first sidewall insulation film on either side of the first gate electrode, the first sidewall insulation film having a bottom which contacts the semiconductor substrate, and having a thickness of approximately 12 nm; forming a second sidewall insulation film on either side of the second gate electrode, the second sidewall insulation film having a bottom which contacts the semiconductor substrate, and having a thickness of approximately 6 nm to 10 nm; forming a third sidewall insulation film on the first sidewall insulation film on the side of the first gate electrode; and forming a fourth sidewall insulation film on the second sidewall insulation film on the side of the second gate electrode.