Patent ID: 8078658

Claim:
An algorithmic method to perform branchless constant-time ASCII string integer to decimal binary format conversion on vector processors, regardless of the size of the ASCII string integer, said ASCII string integer comprising a sign, one or more digits, and a string terminator and said method comprising: execution of the conversion, using code comprising a fixed sequence of a constant number of instructions stored in the processor; further comprising the steps of: breaking the ASCII string integer up into two or more sections and loading each section into one or more fixed sized vector registers, the number and lengths of said registers designed to accommodate the largest string length expected; simultaneously detecting, shifting and masking wherein the ASCII string integer'sign, and string terminator are detected, the sign is stripped and stored, and the remaining digits of the integer contained in all the sections are shifted into a right justified aligned position in a single vector processor register while masking all unused leading character positions of the vector processor register as zeros; simultaneously subtracting binary forty eight from each character of the ASCII integer string performing a conversion of all characters of the string into corresponding binary values; simultaneously multiplying each of the binary values by a power of 10 corresponding to where the decimal binary values are placed relative to each other; and aggregation of results of the multiplications and scalar multiplication of the aggregation by the stored sign into a final signed decimal binary result.