Patent ID: 8325117

Claim:
Image display screen suitable for displaying image frames, comprising: light emitters distributed as rows of emitters and columns of emitters to form an array of emitters, the emitters of the array being able to be supplied with a current during a screen display mode; an emitter addressing circuit, associated with each emitter of the array, the said circuit comprising: a current modulator able to supply current to said emitter, during said display mode, said modulator comprising a gate electrode and two current flow electrodes, a charge capacitance able to store, at each image frame, an addressing voltage representative of an image datum during said display mode, said voltage being applied to the gate electrode of the current modulator; a control system able to apply a bias voltage to the gate electrode of the current modulator, during a screen standby mode, said bias voltage having a bias inverse to the bias of the addressing voltage applied to said charge capacitance during the screen display mode, wherein the control system comprises addressing control means able to apply on the one hand said addressing voltage to the gate electrode of the current modulator during the screen display mode and, on the other hand said bias voltage during the screen standby mode, the duration of application of said bias voltage having a bias inverse to the bias of the addressing voltage is greater than the duration of an image frame, and the value of said bias voltage lies between −8 volts and −25 volts.