Patent ID: 7646654

Claim:
A method of operating a system including a memory device having a standard DRAM pinout, the method comprising: requesting the system to enter read mode; inputting a single address to the memory device having a pinout consisting of a /RAS input pin, a /CAS input pin, a /WE input pin, eight or more address input pins, two or more data output pins, and a /OE input pin: inputting a control signal to the memory device; and sequentially outputting two or more bytes from the memory device based on the single address input and two or more corresponding transitions of the control signal, wherein sequentially outputting two or more bytes from the memory device, comprises: operating two or more output drivers in the memory device to drive a byte from the memory device onto data output pins coupled to the output drivers; and continuing operation of the drivers to drive the byte onto the data output pins without tri-stating the data output pins during predetermined intervals of a strobe signal on at least one of an /RAS input pin and an /CAS input pin in the memory device.