Patent ID: 8759953

Claim:
An electronic component comprising: a core substrate having a first main surface and a second main surface opposite to the first main surface, the first main surface having at least one active chip element disposed thereon, the second main surface having at least one passive chip element disposed thereon; first and second resin layers respectively disposed directly on the first main surface and the second main surface of the core substrate such that the at least one active chip element and the at least one passive chip element are respectively enclosed within the first and second resin layers; a shielding metal film disposed directly on and extending over substantially an entire upper surface of the first resin layer; and an external-terminal electrode disposed on a lower surface of the second resin layer; wherein the first resin layer includes a first via-hole conductor which connects the shielding metal film with a circuit pattern provided on the first main surface of the core substrate; the second resin layer includes a second via-hole conductor which connects the external-terminal electrode with another circuit pattern provided on the second main surface of the core substrate; and no passive chip element is disposed on the first main surface and no active chip element is disposed on the second main surface.