Patent ID: 7346082

Claim:
A bit stream multiplexer that couples a communication Application Specific Integrated Circuit (ASIC) to a high-speed bit stream media, the bit stream multiplexer comprising: a first transmit data multiplexing integrated circuit having an input that receives a first plurality of transmit bit streams at a first bit rate from the communication ASIC and an output that produces an interface plurality of transmit bit streams at an interface bit rate; a second transmit data multiplexing integrated circuit having an input that receives the interface plurality of transmit bit streams at the interface bit rate and an output that produces a single bit stream output at a line bit rate; a loss of lock signal that the second transmit data multiplexing integrated circuit asserts to the first transmit data multiplexing integrated circuit when the second transmit data multiplexing integrated circuit loses lock of the interface plurality of transmit bit streams; a media interface that receives the single bit stream output at the line bit rate and couples the single bit stream output at the line bit rate to the high-speed bit stream media; wherein the interface plurality of transmit bit streams includes fewer transmit bit streams than the first plurality of transmit bit streams includes; and wherein the interface plurality of transmit bit streams includes more than one bit stream.