Patent ID: 8311776

Claim:
A data throughput testing system, comprising: a memory; and a processor disposed in communication with the memory, and configured to issue a plurality of processing instructions stored in the memory, wherein the processor issues instructions to: obtain one or more generation parameters; perform a test run, including; generate, based on the generation parameters, one or more input streams of electronic data; provide the input streams to a data system under test; obtain one or more output streams of electronic data from the data system under test; compare the input streams with the output streams; and determine one or more performance parameters based on the comparison of the input streams with the output streams; obtain one or more benchmark parameters; compare the performance parameters against the benchmark parameters; determine if another test run needs to be performed based on the comparison of the performance parameters against the benchmark parameters; generate updated generation parameters based on the performance parameters if it is determined that the test run needs to be performed again; iteratively perform the test run, compare the performance parameters against one or more benchmarks, determine if another test run needs to be performed, and generate updated generation parameters until it is determined that the test run need not be performed again; and store one or more of the performance parameters if it is determined that the test run need not be performed again.