Patent ID: 6842131

Claim:
A Delta-Sigma modulator, comprising: a Delta adder, receiving a digital input signal and a feedback signal for performing an addition operation to provide a pre-stage addition signal; a Sigma adder, coupled to the Delta adder for receiving the pre-stage addition signal and a pre-stage data signal, thereby performing a accumulation to provide a accumulative signal; a first latch, coupled to the Sigma adder and receiving a clock signal and the accumulative signal respectively, thereby latching the accumulative signal or outputting the pre-stage data signal based on the clock signal; a feedback generator, coupled to the first latch for receiving the pre-stage data signal and providing the feedback signal based on an adjustment signal; and a second latch, coupled to the first latch and receiving the clock signal and the pre-stage data signal, thereby latching the pre-stage data signal or outputting a digital output signal based on the clock signal.