Patent ID: 8136005

Claim:
A storage system comprising: a linear block encoder configured to encode data to generate encoded data; a write circuit configured to write the encoded data to a storage medium; a read circuit configured to read the encoded data from the storage medium; a channel decoder configured to, during a first decoding iteration, decode the encoded data to generate first decoded data; a soft linear block code decoder configured to, during the first decoding iteration, decode the first decoded data to generate second decoded data, wherein during a second decoding iteration, the channel decoder is configured to decode the encoded data i) subsequent to the soft linear block code decoder decoding the first decoded data and ii) based on the second decoded data; and a threshold check circuit configured to select: a first output of the soft linear block code decoder if a number of parity check violations has a first relationship with respect to a threshold, or a second output of the channel decoder if the number of parity check violations has a second relationship with respect to the threshold, wherein if the first output includes a parity-check violation, the threshold check circuit is configured to select, based on the second decoded data, one of the first output and the second output.