Patent ID: 7812439

Claim:
A semiconductor apparatus, comprising: a semiconductor chip including a plurality of electrode pads in a central area of one surface; a wired board facing one surface of the semiconductor chip, the wired board including a plurality of connection pads in a central part of the facing surface and that are respectively aligned with the plurality of electrode pads in the central area of the semiconductor chip; a plurality of bump electrodes between surfaces of the semiconductor chip and the wired board facing each other, and which electrically connect respective ones of the electrode pads and the connection pads; a plurality of external terminals which correspond to a plurality of the bump electrodes, and which are mounted on the wired board spaced laterally from the central part on a surface opposite the facing surface remote from the plurality of connection pads; and insulating material between the semiconductor chip and the wired board, wherein the wired board includes a plurality of first wirings that each runs in a straight line through the wired board from a respective one of the connection pads directly to the opposite surface of the wired board, and a plurality of second wirings that each runs across the opposite surface of the wired board and connects a respective one of the first wirings to a respective one of the external terminals so that each of the electrode pads is connected to a respective one of the external terminals.