Patent ID: 7164899

Claim:
A phase generation circuit, comprising: a decoder operable to: receive a plurality of input bits; and generate a plurality of phase signals in response to receiving the input bits; a phase register coupled to the decoder operable to: store a binary number; increment the binary number by a predetermined amount; and output the binary number to the decoder in response to a triggering signal, wherein the input bits of the decoder are based at least in part on the binary number output by the phase register; and a voltage controlled oscillator operable to generate a voltage signal at a frequency, wherein the triggering signal for the phase register is generated at least in part based on the frequency of the voltage controlled oscillators; wherein: the predetermined amount is determined at least in part based upon a comparison of a first frequency range of the voltage controlled oscillator and a second frequency range comprising a signal of interest; the first frequency range comprises 1698 MHz to 3396 MHz; and the second frequency range comprises one of four bands in a radio frequency range, the bands comprising: 57 MHz to 106.125 MHz; 106.125 MHz to 212.250 MHz; 212.250 MHz to 424.5 MHz; and 424.5 MHz to 849 MHz.