Patent ID: 7809086

Claim:
An apparatus for demodulating a signal modulated according to any one or more of a pi/4DQPSK modulation scheme, a pi/2DBPSK modulation scheme, a GMSK modulation scheme, and a GFSK modulation scheme comprising: a hard limiter stage for receiving an analogue input signal modulated with one or more symbols and for converting the input signal to a two level signal; a digital down converter and low pass filter stage for receiving an output signal from the hard limiter stage and converting the signal to a base band signal; a symbol synchronization stage for receiving an output signal from the digital down converter and low pass filter stage and for extracting symbol timing therefrom, the one or more symbols associated with the input signal each having an associated phase; an instantaneous phase detector stage for receiving an output signal from the symbol synchronization stage and for calculating the instantaneous phase of the one or more symbols; a differential detector for receiving an output signal from the instantaneous phase detector stage and for determining a difference in the phase between adjacent symbols; a coarse frequency offset compensation stage for receiving an output signal from the differential detector stage and for applying a compensation signal to the output signal of the differential detector stage to compensate for the effects of frequency offset between a transmitter of the input signal and a receiver receiving the input signal applied to the apparatus; a frequency offset estimation stage for receiving an output signal from the coarse frequency offset compensation stage and for estimating a residual frequency offset after application of the compensation signal, the frequency offset estimation stage being arranged to apply the estimated residual frequency offset to the coarse frequency offset compensation stage to update the frequency offset compensation signal; and a demapper stage for demodulating the output signal of the differential detector stage after compensation by the frequency offset compensation stage to generate a demodulated output signal.