Patent ID: 7673102

Claim:
A method for replacing one of a plurality of set ways of a cache set in the event of a cache tag miss, comprising the steps of: selecting a victim way as the cache way that is to be replaced according to the position of said cache way on a FIFO listing of cache ways for use in the operation of a digital signal processor; placing at the end of said cache set FIFO listing subsequent cache tag misses to said cache set reusing a victim way on a next cache tag miss; preventing reuse of a victim way until initial allocation of said victim way avoids incoherency between the cache tag and said cache set; preventing reuse of a victim way until initial allocation of said victim way completes by stalling response to a reuse request until such initial allocation of said victim way completes; preventing reuse of a victim way until initial allocation of said victim way completes by replaying a reuse request until such initial allocation of said victim way completes.