Patent ID: 8812826

Claim:
A system comprising: a computer readable storage medium storing instructions for generating an instruction set for a processor; a processor, according to the instructions, operable to: randomly generate a first plurality of branch instructions for a first portion of an instruction set, each branch instruction in the first portion branching to a respective instruction in a second portion of the instruction set, the branching of the first portion branch instructions to the respective instructions being arranged in a sequential manner; randomly generate a second plurality of branch instructions for the second portion of the instruction set, each branch instruction in the second portion branching to a respective instruction in the first portion of the instruction set, the branching of the second portion branch instructions to the respective instructions being arranged in a sequential manner; generate a plurality of instructions to increment a counter, the counter instructions incrementing the counter when each branch instruction is encountered in the instruction set during execution of the set; and write the instructions to the computer readable storage medium.