Patent ID: 8735258

Claim:
A method of fabricating a semiconductor device, the method comprising: providing a substrate including a transistor device region and an isolation region; forming a dummy gate over the transistor device region and a resistor over the isolation region; forming a photoresist layer over the transistor region and the isolation region to cover and laterally surround the dummy gate and expose the resistor by an aperture; implanting the resistor with a dopant; wet etching the dummy gate to remove the dummy gate; forming a metal gate over the transistor device region to replace the dummy gate; forming a first interlayer dielectric (ILD) layer over the implanted resistor and the metal gate; forming a first contact through the first ILD layer over the metal gate and a second contact through the first ILD layer over the resistor; forming a second interlayer dielectric (ILD) layer over the first ILD layer, the first contact, and the second contact; and forming a third contact through the second ILD layer over the second contact.