Patent ID: 8415740

Claim:
A semiconductor device comprising: a semiconductor layer; and first and second striped-patterned trenches formed in the semiconductor layer, the first and second striped-patterned trenches extending in a first direction in parallel with each other, wherein each of the first and second striped-patterned trenches comprises: a gate electrode housed in the striped-patterned trench with a gate insulating film intervening between the gate electrode and the semiconductor layer, a top face of the gate electrode being lower than a top face of the semiconductor layer; and a buried insulating inter layer covering the gate electrode and housed in the striped-patterned trench, wherein the semiconductor layer comprises: a drain region of a first conductive type, each bottom part of the first and second striped-patterned trenches being formed in an upper part of the drain region; a base region of a second conductive type formed on the drain region and between the first and second striped-patterned trenches, a bottom face of the base region having a downwardly curved profile; and a source region of the first conductive type formed on the base region and between the first and second striped-patterned trenches, the source region having a substantially uniform thickness in a second direction from the first striped-patterned trench to the second striped-patterned trench, and wherein a thickness of the base region at a center between the first and second striped-patterned trenches is thicker than that of each edge portion of the base region adjacent to the first and second striped-patterned trenches.