Patent ID: 8661191

Claim:
A memory system comprising: a nonvolatile semiconductor memory including a plurality of physical blocks, each one of the plurality of physical blocks being a unit of data erasing; and a controller configured to manage data stored in the nonvolatile memory with a first management table and a second management table, wherein the first management table includes a correspondence relation between a logical block and at least one part of the plurality of physical blocks, and the second management table includes a correspondence relation between a logical address provided from a host apparatus and the logical block; the controller further including, a first control unit configured to perform, when a first event related to a change in the correspondence relation between at least one part of the plurality of physical blocks and the logical block occurs, processing corresponding to the first event based on the first management table and updates the first management table, and a second control unit configured to perform, when a second event related to a change in the correspondence relation between the logical address and the logical block occurs, processing corresponding to the second event based on the second management table and updates the second management table.