Patent ID: 7246278

Claim:
A testing apparatus for testing a memory module said memory module having a circuit board with a connector and at least two semiconductor memory chips applied on the circuit board, the operating state of each semiconductor memory chip being stored on the respective semiconductor memory chip, the memory module during normal operation, exchanging electrical signals between said semiconductor memory chips and a chip set on a circuit board arrangement via a signal bus, said circuit board arrangement including a connection for receiving said connector on such circuit board and having a processor-based data processing device, which comprises a processor, a memory device, a clock generator, said signal bus and said chip set, the testing apparatus comprising: a device suitable for detecting the operating state of at least one of said semiconductor memory chip on said memory module, wherein the device comprises a first set of signal lines; a microcontroller with a memory device for storing the operating state, said microcontroller being electrically connected to the first set of signal lines; another clock generator suitable for generating an operating clock, said another clock generator being electrically connected to the microcontroller; and a signal connection suitable for communicating a signal for controlling access to the memory module between the circuit board arrangement and the microcontroller and for communicating to the microcontroller a signal for initiating a process of detecting the operating state.