Patent ID: 7417575

Claim:
A pipelined analog to digital converter, comprising: a first stage that receives an input voltage, that generates a first sampled digital value and a first residue voltage, and that includes a first amplifier that amplifies said first residue voltage and generates a first amplified residue voltage; and a second stage that receives said first amplified residue voltage, that generates a second sampled digital value and a second residue voltage, and that includes a second amplifier that amplifies said second residue voltage; wherein at least one of said first amplifier and said second amplifier comprises: a first transistor having a control terminal, a first terminal, and a second terminal; a transimpedance amplifier having an input that communicates with said first terminal of said first transistor, and an output; and an output amplifier having an input that communicates with said output of said transimpedance amplifier, and an output, and wherein said transimpedance amplifier comprises a nested transimpedance amplifier.