Patent ID: 8785242

Claim:
A method for manufacturing a semiconductor device, comprising the steps of: forming a source electrode layer and a drain electrode layer over a substrate; forming a buffer layer having n-type conductivity over the source electrode layer and the drain electrode layer; forming a semiconductor layer over the buffer layer; forming a gate insulating layer over the semiconductor layer; and forming a gate electrode layer over the gate insulating layer, wherein the semiconductor layer and the buffer layer are formed using oxide semiconductor layers, wherein a carrier concentration of the semiconductor layer is lower than 1×10 17 atoms/cm 3 , and a carrier concentration of the buffer layer is 1×10 18 atoms/cm 3 or higher, and wherein each of the source electrode layer and the drain electrode layer is electrically connected to the semiconductor layer with the buffer layer interposed between the source electrode layer or the drain electrode layer and the semiconductor layer.