Patent ID: 6952761

Claim:
Apparatus for processing data, said apparatus comprising: (i) a data processing circuit operable to generate a data access request to a first address: (ii) a translation circuit for storing a plurality of page table entries and for reading a page table entry associated with said first address as part of translating said first address to a second address, said page table entry including at least one attribute value associated with said first address: and (iii) a bus switching circuit operable in response to said at least one atribute value to direct said data access request to said second address via one of a first data access bus and a second data access bus, wherein said at least one attribute value comprises a device attribute indicating that said first address is associated with one of a memory having normal data storage operation and a device having other than normal data srorage operation, wherein said at least one attribute value comprises a shareable attribute indicating that said first address is associated with one of a shareable storage location and a non-sharcable storage location and said bus switching circuit is operable to: (i) direct said data access request to said first bus when said first address is asssociated with a memory having one of a normal storage operation and a shareable storage location; and (ii) direct said data access request to said second bus when said first address is associated with a device having other than a normal storage operation and a non-shareable storage location.