Patent ID: 7110448

Claim:
A receiver for delivering a data sequence (a k ) at a data rate 1/T from a received sequence (r n ) sampled at a clock rate 1/Ts, asynchronous to the data rate 1/T, the receiver comprising: an adaptive equalizer (EQ) for delivering an equalized sequence (y n ) from said received sequence (r n ), said equalizer operating at the clock rate 1/Ts and having an equalizer coefficient vector ( W n ) controlled by a control vector sequence ( s n ) via a control loop, a sampling rate converter (SRC) for converting said equalized sequence (y n ) to an equivalent input sequence (x k ) to be provided to an error generator ( 21 ) at the data rate 1/T, an error generator ( 21 ) for delivering the data sequence (a k ) from said input sequence (x k ) and an error sequence (e k ) to be used in the control loop, wherein said control loop comprises: control information production means ( 22 , 42 , 72 , 21 ) for deriving a synchronous control vector sequence ( Z k ) at the data rate 1/T from the error sequence (e k ) and the data sequence (a k ), and temporal interpolation means (TI) for deriving the control vector sequence ( S n ) from said synchronous control vector sequence ( Z k ).