Patent ID: 8181091

Claim:
A low density parity check decoding method which is applicable to arbitrary degree nodes and does not require modification of a bipartite graph, said method comprising the steps of: determining bit log-likelihood ratios; initialization by performing log domain to probabilistic domain conversion; and 1) a first half-iteration performed by a first optical circuit comprising a pair of probability multipliers providing an input to a 2×1 coupler; 2) a second half-iteration performed by a second optical circuit comprising a probability multiplier, an upper output of which is amplified by a first optical amplifier having a gain defined by 1/[P a P b +(1−P a )(1−P b ]; 3) a variable node update performed by a third optical circuit comprising a pair of probability multipliers applied in cascade the output of each one is amplified by an optical amplifier having a gain defined by 1/[P a P b +(1−P a )(1−P b )]; and 4) repeating steps 1-3 above until the estimated code word satisfies a parity check equation or a pre-determined number of iterations has been reached; and determining the code word; wherein the method is applicable to arbitrary check-node and variable-node degrees.