Patent ID: 8076698

Claim:
A transistor comprising: a Si substrate; an underlying layer provided on the Si substrate; a first semiconductor layer provided on the underlying layer and having a smaller band gap than the underlying layer, and containing a channel region; a second semiconductor layer provided on or above the channel region and having a larger band gap than the channel region; a control region provided inside, on, or above the second semiconductor layer and having a p-type conductivity; a gate electrode provided in contact with a portion of the control region; and a source electrode and a drain electrode provided beside both sides of the control region, respectively, wherein the gate electrode is forward biased with respect to the source electrode to inject holes into the channel region, thereby controlling a current flowing between the source electrode and the drain electrode, the underlying layer, the first semiconductor layer, the second semiconductor layer, and the control region are each made of a semiconductor compound containing nitrogen, and a total impurity concentration of the control region is larger than a concentration of two dimensional electron gas, with no bias voltage applied to the gate electrode, generated in the heterojunction interface between the first semiconductor layer and the second semiconductor layer.