Patent ID: 7160788

Claim:
A method of forming an integrated circuit comprising a field effect transistor having a gate, comprising: forming a trench isolation mask over a semiconductor substrate, the trench isolation mask defining an active area region and a trench isolation region; ion implanting into semiconductive material of the substrate to form a buried region within active area of the semiconductor substrate, the buried region having a first edge received proximate an edge of the trench isolation region, the gate being formed prior to forming the trench isolation mask and the trench isolation mask being formed over the gate; using the trench isolation mask, etching into semiconductive material of the semiconductor substrate to form an isolation trench; and after the ion implanting and after forming the isolation trench, forming insulative material within the buried region and depositing insulative material to within the isolation trench, the insulative material received within the isolation trench joining with the insulative material formed within the buried region.