Patent ID: 8072824

Claim:
An operation guarantee system comprising: a signal processing circuit that processes a signal; a first storage circuit that is operated based on first and second operating conditions and stores a data signal output from said signal processing circuit at the time of signal processing in said signal processing circuit; an auxiliary circuit that outputs a clock signal to said first storage circuit and perfoims processing for writing and reading said data signal between said signal processing circuit and said first storage circuit; an adjustment circuit that adjusts the second operating condition of said first storage circuit to different values; a detection circuit that detects the presence or absence of an output error in said signal processing circuit; a determiner that determines a range of variation of a value of said second operating condition in a state where said output error is not detected from said detection circuit as a first allowed range of variation, and determines whether or not said first allowed range of variation is a first threshold value or more; and a second storage circuit that stores the values of said second operating condition, wherein said determiner determines said first allowed range of variation in said first operating condition as an allowed margin when said first allowed range of variation is determined to be the first threshold value or more, and stores, in said second storage circuit, at least one value out of the values of said second operating condition in the state where said output error is not detected, said first storage circuit outputs, to said auxiliary circuit, the data signal and a first reference signal as a reference of an acquisition timing of the data signal in said auxiliary circuit, said first operating condition includes a frequency of said clock signal, and said second operating condition includes a first delay amount between said data signal input to said auxiliary circuit and said first reference signal.