Patent ID: 8452947

Claim:
A method, in a data processing system, for performing a wake-and-go operation, the method comprising: examining, by a hardware wake-and-go engine, an instruction stream being pre-fetched for a thread to detect a programming idiom that indicates the thread will be waiting for an event that modifies a data value at a target address, wherein the hardware wake-and-go engine comprises hardware logic associated with a bus and a content addressable memory and wherein examining the instruction stream is performed prior to execution of the instruction stream; in response to the hardware wake-and-go engine detecting the programming idiom in the instruction stream, storing an entry in the content addressable memory with the target address; responsive to the hardware wake-and-go engine detecting the programming idiom in the instruction stream, storing thread state information for the thread and placing the thread in a sleep state; snooping, by the hardware wake-and-go engine, the bus; responsive to the hardware wake-and-go engine detecting a transaction on the bus associated with the target address, determining whether the transaction corresponds to the event that modifies the data value at the target address; and responsive to determining the transaction corresponds to the event that modifies the target address, placing the thread in a non-sleep state.