Patent ID: 7208935

Claim:
A test substrate for receiving an electrical component for testing, said electrical component having a plurality of leads extending therefrom, said test substrate comprising: an insulative base layer; a conductive layer formed on at least a portion of a surface of said insulative base layer for use in measuring parasitic capacitance of the electrical component during the testing thereof; at least one cavity extending through said conductive layer to expose said insulative base layer, said at least one cavity located on said conductive layer at a location corresponding to a position of one lead of said plurality of leads extending from said electrical component when said electrical component is disposed on said test substrate, said at least one cavity configured so as to prevent contact between said one lead of said plurality of leads and any surface of said test substrate; and at least one isolated pad formed in said conductive layer and surrounded on all sides by said conductive layer at a location corresponding to a position of another lead of said plurality of leads extending from said electrical component.