Patent ID: 6876815

Claim:
A signal processor comprising: a data compression encoder which operates to compression encode source data into compression encoded data having a variable compressed data rate, said data compression encoder generating said compression encoded data in accordance with a compression encoding algorithm, the compression encoding algorithm including quantising the encoded data to produce the compression encoded data, and the compressed data rate being varied by said compression encoding algorithm in dependence upon an estimated comparison of said source data and a version of said source data produced by de-compressing said compression encoded data, a multiplexer coupled to said data compression encoder and arranged in operation to concatenate said compressed data and descriptive metadata into a concatenated data stream, the metadata describing the content of the source data, and a control processor coupled to said multiplexer and arranged in operation to control said multiplexer to the effect that a combined data rate of said concatenated data stream is less than or equal to a pre-determined maximum, wherein said control processor is coupled to said compression encoder and arranged in operation to influence said compression encoding algorithm to an effect of controlling said compressed data rate produced by said compression encoder to achieve a predetermined minimum, the influence of said compression encoding algorithm being affected by controlling said quantisation of said encoded data to provide the predetermined minimum data rate, a data rate provided for said metadata being determined in accordance with a difference between said pre-determined minimum data rate and said pre-determined maximum data rate.