Patent ID: 8875068

Claim:
A non-transitory computer readable medium storing software code, when executed by a computer, for customizing an existing processor design having an existing processor instruction set architecture (ISA) with instruction extensions to supplement the existing processor ISA, the computer readable rnedium storing: code for receiving an instruction extension description for a new instruction from a user, via a user interface (UI), to supplement the existing processor ISA, the instruction extension description defining an operand to be used by the new instruction; the UI providing for selecting processor functionality including: reconfiguration of compiler and regeneration of assembler, disassembler and instruction set simulator (ISS); preparation of processor synthesis, placement and routing; and estimation of processor area, power consumption, cycle time, application performance and code size for further iteration and enhancement of the processor configuration; and code for synthesizing and adding additional circuitry to the existing processor design to support the new instruction based on the received instruction extension description for configurable processor hardware.