Patent ID: 7406644

Claim:
A method of monitoring a thermal processing system using a Built-In Self Test (BIST) table, the method comprising: positioning a plurality of wafers in a thermal processing chamber, wherein the thermal processing chamber is divided into different zones and one or more of the wafers are positioned in each zone; performing a first self test process using a first set of process parameters, wherein the first set of process parameters is established by a first BIST rule created for the thermal processing system and stored in the BIST table; determining in real-time a transient error using a difference between a measured transient response and a baseline transient response determined by the first BIST rule for the first self test process; comparing the transient error to operational limits established by the first BIST rule for the first self test process; continuing the first self test process when the transient error is within the operational limits; and comparing the transient error to warning limits established by the first BIST rule for the first self test process when the transient error is not within at least one of the operational limits, and either sending a warning message identifying a first transient error problem and continuing the first self test process when the transient error is within the warning limits, or sending a fault message identifying a second transient error problem when the transient error is not within at least one of the warning limits.