Patent ID: 8252648

Claim:
A method for manufacturing a power MOSFET device comprises the following steps: Forming an epitaxial layer lightly doped with dopants of first conductivity on a bottom substrate heavily doped with dopants of the first conductivity; Implanting dopants of second conductivity into the epitaxial layer to form a body region; Forming a trench gate in the epitaxial layer; Implanting dopants of first conductivity in an upper part of the epitaxial layer to form a heavily doped source region; Forming a dielectric layer on top of the epitaxial layer; Etching a contact trench through the dielectric layer and the source region into the body region in the epitaxial layer; Forming sidewall spacers along the sidewalls and bottom corners of the contact trench; Depositing a first conductive material at a central portion of the bottom of the contact trench not covered by the spacer; Depositing a contact metal layer filling the contact trench and overlaying the dielectric layer.