Patent ID: 8891291

Claim:
A method of using magnetoresistive logic cell (MRLC) having first and second magnetic tunnel junctions (MTJs) in series that include a nonswitchable reference layer with a fixed magnetization direction, a switchable reference layer with a switchable magnetization direction and a free layer common to first and second MTJs switchable magnetization direction and wherein the first MTJ has a substantially higher resistance-area product and effective capacitance than the second MTJ, the method comprising: writing a first data bit value in the switchable reference layer by first setting a first or second magnetization direction of the free layer in relation to fixed magnetization direction nonswitchable reference layer by applying a first voltage pulse to the MRLC, the first voltage pulse having a first set of characteristics including a first duration selected to switch the magnetization direction of the free layer in relation to the fixed magnetization direction of the nonswitchable reference layer with a positive voltage pulse switching the magnetization direction of the free layer in the first magnetization direction and a negative voltage pulse switching the magnetization direction of the free layer in the second magnetization direction and then applying a second voltage pulse to the MRLC to set the magnetization direction of the switchable reference layer, the second voltage pulse having a second set of characteristics including a second duration longer than the first duration selected to switch the magnetization direction of the switchable reference layer in relation to the magnetization direction of the free layer with a voltage pulse of a first amplitude switching the magnetization direction of the switchable reference layer to parallel to the magnetization direction of the free layer and a voltage pulse of a second amplitude switching the magnetization direction of the switchable reference layer to antiparallel the magnetization direction of the free layer; writing a second data bit value in the free layer by setting a first or second magnetization direction of the free layer in relation to fixed magnetization direction nonswitchable reference layer by applying a third voltage pulse to the MRLC, the third voltage pulse having the first set of characteristics including a first duration and first shape with a positive voltage pulse switching the magnetization direction of the free layer in the first magnetization direction and a negative voltage pulse switching the magnetization direction of the free layer in the second magnetization direction; and reading a high or low resistance of the MRLC as a result of a logical operation using first and second data bit values, where the high resistance indicates that the magnetization direction of the free layer and the switchable reference layer are antiparallel and the low resistance indicates that the magnetization direction of the free layer and the switchable reference layer are parallel.