Patent ID: 7410818

Claim:
A method of manufacturing a thin film transistor comprising the steps of: forming a gate electrode on an insulating substrate; forming a semiconductor film and a conductive film on said insulating substrate and on said gate electrode with interposing a gate insulating film between both said insulating substrate and said gate electrode, and said semiconductor film; forming a photo-resist film above said semiconductor film and above said conductive film; patterning said conductive film and said semiconductor film by use of said photo-resist film as a mask and thereby forming a conductive film and a semiconductor film in island shapes; forming a source electrode and a drain electrode isolated from each other by patterning said conductive film; and subjecting said semiconductor film between said source electrode and said drain electrode to channel etching, wherein irregularities are formed on both edges of said semiconductor film provided along extending direction and in a direction orthogonal to the extending direction, and a concave portion of the irregularities is located outside a region sandwiched by a pair of virtual straight lines linking both ends of opposite edges of said source electrode and said drain electrode.