Patent ID: 7584322

Claim:
An integrated circuit for securing data stored in a data carrier comprising: a memory comprising a plurality of memory cells; a first logic circuit configured for determining a current state of the memory, wherein the current state of the memory is selected from the group consisting of an active state and a quiet state and wherein in the active state the data of the carrier is accessible and wherein in the quiet state the data of the carrier is inaccessible; a feed-logic circuit, wherein the feed-logic circuit is configured for: receiving state information indicative of a current state of a memory cell, wherein the current state of the memory cell is selected from the group consisting of a programmed state and an unprogrammed state; and if the current state of the memory is the active state and if the current state of the memory cell is the unprogrammed state, then selecting the memory cell; and issuing a programming command to a programming unit to program the selected memory cell to change the state of the memory cell to the programmed state, wherein the memory cell assumes an irreversible memory state as a result of the programming and wherein the memory enters the quiet state; means for returning the memory back to the active state and then resetting the memory to the quiet state by changing the state of a next memory cell of the plurality of memory cells to the programmed state, wherein said next memory cell assumes an irreversible memory state as a result of the programming.