Patent ID: 8381215

Claim:
A system comprising: a plurality of processors each having a processing state; a plurality of dispatch queues associated with the plurality of processors, wherein each of the plurality of dispatch queues is configured to queue a plurality of threads in an execution order to be executed by an associated one of the plurality of processors; a dispatcher operatively connected to the plurality of processors and configured to: receive a first thread to dispatch; select a first processor of the plurality of processors to dispatch the first thread to based on the processing state of each of the plurality of processors and a power management policy to obtain a first selected processor, wherein the power management policy specifies how to increase processing performance of at least one of the plurality of processors when utilization data indicates over utilization; dispatch the first thread to a first dispatch queue of the plurality of dispatch queues, wherein the first dispatch queue is uniquely associated with the first selected processor; receive a second thread to dispatch; select a second processor of the plurality of processors to dispatch the second thread to based on the processing state of each of the plurality of processors and the power management policy to obtain a second selected processor; dispatch the second thread to a second dispatch queue of the plurality of dispatch queues, wherein the second dispatch queue is uniquely associated with the second selected processor; and migrate the first tread from the first dispatch queue to the second dispatch queue in response to a change in the utilization data; modify the processing state of at least one of the plurality of processors based on the utilization data and the power management policy; and a hardware monitor configured to monitor utilization of at least the first selected of processor to obtain the utilization data.