Patent ID: 7332780

Claim:
An inverter having a structure that a first p-channel MOS transistor and a first n-channel MOS transistor are connected in this order in series with respect to the line of a source or drain and from the node connected on the side of the first power supply to the node connected on the side of the second power supply, wherein: said first p-channel MOS transistor constitutes a dual structure by being connected with a second p-channel MOS transistor in series with respect to the line of a source or drain at the node on the side of the second power supply, and their gates being connected to each other, and said first n-channel MOS transistor constitutes a dual structure by being connected with a third p-channel MOS transistor in series with respect to the line of a source or drain at the node on the side of the first power supply, and the gate of the third p-channel MOS transistor being connected in common to the node of said n-channel MOS transistor on the side of the first power supply and the node of said first p-channel MOS transistor on the side of the second power supply, wherein the connection of the gates defines an input.