Patent ID: 8278197

Claim:
A method of fabricating a prompt-shift semiconductor device comprising: providing at least one field effect transistor within a memory area of a semiconductor substrate, said at least one field effect transistor including a patterned gate region and an extension dielectric spacer located on sidewalls of said patterned gate region; performing an extension ion implant into said semiconductor substrate and on at least one side of the patterned gate region, said extension ion implant uses an ion dosage that is less than about 5E14 atoms/cm 2 , wherein said extension ion implant forms an extension region on the at least one side of the patterned gate region, said extension region has a terminal point that is located beneath said extension dielectric spacer and not aligned to an edge of said extension dielectric spacer or an edge of said patterned gate region; performing a halo ion implant into said semiconductor substrate and on said at least one side of the patterned gate region, said halo ion implant uses an ion dosage of greater than about 1E13 atoms/cm 2 , said halo ion implant forms a halo implant region on the at least one side of the patterned gate region, said halo implant region has a terminal point located directly beneath said extension dielectric spacer and not aligned to an edge of said extension dielectric spacer or an edge of said patterned gate region; forming a source/drain dielectric spacer onto exposed surfaces of said extension dielectric spacer; and forming source and drain regions on both sides of said patterned gate region using said source/drain dielectric spacer as an implant mask, wherein said source and drain regions have a terminal point that is located beneath said source/drain dielectric spacer and not aligned to any edge of the source/drain dielectric spacer.