Patent ID: 8194812

Claim:
An apparatus, comprising: a data sampling circuit comprising: a first inverter receiving a data signal, and inverting the data signal to produce a trigger signal, a first flip-flop receiving the trigger signal, and outputting an output signal, a second flip-flop and a third-flop flop each receiving the output signal from the first flip-flop, the second flip-flop further receiving a strobe signal, and a second inverter inverting the strobe signal, and outputting the inverted strobe signal to the third flip-flop; wherein an output of the second flip-flop indicates a value of the output signal output from the first flip-flop when the strobe signal is of a first state; wherein an output of the third flip-flop indicates a value of the out signal output from the first flip-flop when the strobe signal is of a second state; wherein the data sampling circuit samples the data signal in a manner independent of a hold time of the data signal.