Patent ID: 7876296

Claim:
A driving circuit of an OLED including a scan line driving circuit configured to apply sequentially a selecting signal or an unselecting signal to a plurality of scan lines; a data line driving circuit configured to apply a voltage corresponding to image information to a plurality of data lines; and a pixel circuit arranged in each point where the scan lines and the data lines are intersected, wherein the pixel circuit comprises: a first transistor of which a gate terminal is connected to a [N−1] th scan line X N−1 , and a drain terminal is connected to a power supply voltage V DD ; a second transistor of which a drain terminal is connected to the source terminal of the first transistor, and a gate terminal is connected to a N th scan line X N ; a third transistor of which a drain terminal is connected to the source terminal of the second transistor, and a gate terminal is connected to the source terminal of the first transistor and the drain terminal of the second transistor, a fourth transistor of which a gate terminal is connected to a N th scan line X N , a drain terminal is connected to the data line Y M , and a source terminal is connected to the source terminal of the third transistor; a fifth transistor of which a drain terminal is directly connected without any intervening terminals to the source terminals of the third and fourth transistor, and a gate terminal is directly connected without any intervening terminals to a [N−1] th scan line X N+1 ; a sixth transistor of which a drain terminal is directly connected without any intervening terminals to the power supply voltage V DD , a gate terminal is directly, connected without any intervening terminals to the source terminal of the first transistor, the drain terminal of the second transistor, and the gate terminal of the third transistor, and a source terminal is directly connected without any intervening terminals to the source terminal of the fifth transistor; a capacitor of which one terminal is connected to the drain terminal of the sixth transistor and the power supply voltage V DD , and the other terminal is connected to the source terminal of the first transistor, the drain terminal of the second transistor, the gate terminal of the third transistor and the gate terminal of the sixth transistor; and an OLED of which an anode terminal is connected to the sources of the fifth and sixth transistor.