Patent ID: 6924556

Claim:
In a stack package having CSP packages stacked on each other, in which the CSP packages comprise a substrate for mounting a semiconductor chip, in which the substrate has first solder balls for inputting/outputting a signal from the semiconductor chip, and a mold for protecting the semiconductor chip, the improvement comprising: panels having an area for mounting the respective CSP packages, in which the panels comprise circuit patterns for electrical connection to the CSP packages, which are formed at portions of the panels corresponding to the CSP packages to be mounted, and the panels have first openings for electrical connection to the circuit patterns, which are formed at both sides of the circuit patterns; and bi-directional male connectors, each having a connector body and an array of pins extending on opposite sides from said connector body, which are inserted through the first openings of the panels which are stacked in at least two layers in such a manner that the first openings of one panel correspond to the first openings of the other panels, so that the connectors are electrically connected to the circuit patterns of the stacked panels via said array of pins on said opposite sides of each said connector body of said male connectors.