Patent ID: 8091056

Claim:
A method of automatically generating timing constraints for an input interface, comprising: retrieving user-specified timing parameters associated with the input interface; wherein the timing parameters specify an interface type that is one of system synchronous or source synchronous, a rate type that is one of single data rate or double data rate, and a transition type that specifies an alignment of a transition of a clock signal relative to a data valid period; determining a first amount of time relative to a transition of the clock signal that a data signal first becomes available for capture in response to the user-specified interface type, rate type, and transition type; determining a second amount of time relative to the transition of the clock signal that the data signal remains valid in response to the user-specified interface type, rate type, and transition type; generating, by a processor, timing constraint code segments that specify timing constraints relative to the input interface in response to the determined first and second amounts of time and timing parameters; and graphically illustrating the generated timing constraints.