Patent ID: 8907407

Claim:
A semiconductor device comprising: a semiconductor substrate having a front surface and a back surface; a vertical field-effect transistor including a source region, a drain region, and a gate electrode; a first electrode covering more than 70% of the front surface of the semiconductor substrate and coupled to the source region; a second electrode covering a portion of the front surface of the semiconductor substrate and spaced apart from the first electrode, wherein the second electrode is coupled to the gate electrode; and a third electrode covering more than 90% of the back surface of the semiconductor substrate and coupled to the drain region, wherein each of the first electrode and the second electrode has a first set of electrode layers including a first electrode layer; the third electrode has a second set of electrode layers that has a composition that is different from the first set of electrode layers, wherein the third electrode includes a second electrode layer; and the first electrode layer and the second electrode layer have the same amount of thermal expansion and the thicknesses of the first electrode layer and the second electrode layer are sufficient to prevent warping of the semiconductor device.