Patent ID: 7266742

Claim:
An apparatus for providing a local scan enable signal to a circuitry on a portion of a die comprising: circuitry that receives a global scan enable signal; circuitry that receives a clock signal; circuitry that receives a test mode signal that indicates said portion of said die is to be tested; circuitry that generates said local scan enable signal responsive to reception of said global scan enable signal and said clock signal comprising: a flip-flop that receives said clock signal and said global enable signal and generates said local scan enable signal, an inverter that receives said clock signal and applies said clock signal to said flip-flop, or-gate circuitry that receives said global enable signal and an inverted output from said flip-flop and applies an output to said flip-flop, an inverter connected to an output of said flip-flop and to an input of said or-gate circuitry to provide said inverted output of said flip-flop, and and-gate circuitry having a first input connected to said output of said flip-flop to receive said intermediate local scan enable signal, a second input for receiving for receiving said global enable signal, and an output connected to an input of said flip-flop; and circuitry that applies said local scan enable signal to said portion.