Patent ID: 7521749

Claim:
A nonvolatile semiconductor memory device comprising: a plurality of element isolation insulating films formed in a semiconductor substrate, each of the element isolation insulating films being arranged in a predetermined interval and in a first direction, wherein the semiconductor substrate is divided into a plurality of element regions by the element isolation insulating films; first and second control gates being arranged in a predetermined interval and in a second direction perpendicular to the first direction, each of the first and second control gates being intersected by the element isolation insulating films; a floating gate formed on a gate insulating film formed on the element region between the first and second control gates; and an inter-gate insulating film which insulates the first and second control gates from the floating gate; wherein the first and second control gates are formed above the element isolation insulating films, and wherein a height of an upper surface of the element isolation insulating films on which the first and second control gates are formed is lower than a height of an upper surface of the element isolation insulating films on which the first and second control gates are not formed.