Patent ID: 8178915

Claim:
An integrated circuit formed at a semiconductor surface of a body, including an electrically programmable capacitor structure for an analog semiconductor integrated circuit, the integrated circuit comprising: a first polysilicon electrode having an n-type doped portion and a p-type doped portion, the n-type doped portion abutting the p-type doped portion; silicide-block silicon dioxide disposed over the first polysilicon electrode, the silicide-block silicon dioxide having an opening overlying a junction location of the first polysilicon at which the n-type doped portion abuts the p-type doped portion; a capacitor dielectric film disposed over the silicide-block silicon dioxide over the first polysilicon electrode; a plurality of active regions of a semiconductor surface, the n-type doped portion of the first polysilicon electrode extending over a first one of the plurality of active regions, and the p-type doped portion of the first polysilicon electrode extending over a second one of the plurality of active regions; a first conductive plate, comprising a metal and formed in a conductor level, the first conductive plate disposed over a portion of the first polysilicon electrode with the capacitor dielectric film therebetween; gate dielectric film disposed over the first and second active regions of the semiconductor surface underlying the first polysilicon electrode; and metal silicide disposed at the surface of the first polysilicon electrode at the opening in the silicide-block silicon dioxide.