Patent ID: 7890829

Claim:
An integrated circuit comprising: A. plural TAP domains, each domain having a TDI input terminal, a TDO output terminal, a TCK input terminal, a TMS input terminal, and a RCK output terminal; and B. a TAP domain selection circuit, the selection circuit having a separate set of outputs and at least one input for each TAP domain, each set including a TDI output connected to a TDI input terminal, a TDO input connected to a TDO output terminal, a TCK output connected to a TCK input terminal, a TMS output connected to a TMS input terminal, and a RCK input connected to a RCK output terminal, the selection circuit including an interface select circuit including: i. an instruction control bus input; ii. a TDI output lead coupled to the TDI input of each set; iii. an AUX I/O 1 or TDI lead; iv. a TDI/TDO or TDO lead; v. a first buffer having an input connected to the AUX I/O 1 or TDI lead and an output; vi. an I/O circuit having an input connected to the TDI/TDO or TDO lead and an output; and vii. a multiplexer having an input connected to the output of the first buffer, another input connected to the output of the I/O circuit, a control input connected to the instruction control bus input, and an output connected to the TDI output lead.