Patent ID: 7446372

Claim:
A pair of vertical, ultra-thin body transistors comprising: a substrate having a first source region doped to a first conductivity and a second drain region doped to a second conductivity; a pillar formed over and substantially between the first source region and the second drain region; first and second ultra-thin silicon bodies formed along sidewalls of the pillar; a first drain region formed over the pillar and at an opposing end of the first silicon body from the first source region wherein the first drain region is doped to an opposite conductivity from the first source region; a second source region formed over the pillar and at an opposing end of the second silicon body from the second drain region wherein the second source region is doped to an opposite conductivity from the second drain region, the first drain region and the second source region coupled at the top of the pillar; and a gate formed over each silicon body.