Patent ID: 7193475

Claim:
A single-ended input to differential output LNA with a cascode topology, wherein said LNA needs to supply an operating bias for each transistor, said LNA comprising: a first metal-oxide-semiconductor field effect transistor (MOSFET) and a second MOSFET, for amplifying a signal, the signal being input by and output from a gate terminal, a drain terminal and a source terminal of each said MOSFET; a first capacitive impedance, for serving as a low impedance at high frequencies, wherein one terminal thereof is electrically connected to the drain terminal of said first MOSFET, and another terminal thereof is electrically connected to the gate terminal of said second MOSFET; a first inductive impedance, for serving as a high impedance at high frequencies, wherein one terminal thereof is electrically connected to the drain terminal of said first MOSFET and another terminal thereof is electrically connected to the source terminal of said second MOSFET; a second inductive impedance, for serving as a high impedance at high frequencies, wherein one terminal thereof is electrically connected to the drain terminal of said second MOSFET and another terminal thereof is electrically connected to a first voltage source; a second capacitive impedance, for serving as a low impedance at high frequencies, wherein one terminal thereof is electrically connected to the source terminal of said second MOSFET and another terminal thereof is electrically connected to the ground; and a third inductive impedance, for part of impedance matching at high frequencies, wherein one terminal thereof is electrically connected to the source terminal of said first MOSFET and another terminal thereof is electrically connected to a second voltage source; whereby a high frequency signal is input into the gate terminal of said first MOSFET and then an amplified differential signal is output from the drain terminal of said first MOSFET and said second MOSFET.