Patent ID: 8618870

Claim:
A voltage characteristic regulating method for regulating voltage characteristics of a latch circuit, the latch circuit comprising two nodes for retaining data of the latch circuit and a plurality of gate type transistors that are formed in a semiconductor substrate, the voltage characteristic regulating method comprising: applying a preset low voltage to a power-supply voltage applied node that a power-supply voltage is applied thereto in normal operation of the latch circuit; and then applying a voltage that is higher than the power-supply voltage in the normal operation of the latch circuit and is able to nonvolatilely raise a threshold voltage of at least one of the gate type transistors to the power-supply voltage applied node, the preset low voltage being lower than the power-supply voltage in the normal operation of the latch circuit and the preset low voltage being such that each level of the two nodes is fixed and not able to be inverted.