Patent ID: 6854036

Claim:
A method of transferring data in a processing system comprising a shared memory for storing data blocks, a plurality of processors, at least one of the processors having a cache memory for the data blocks, a plurality of data buses to each one at least one processor is connected, cross-bar means for selectively connecting the data buses and the shared memory therebetween, the method comprising the steps of: a) requesting the reading of a data block from the shared memory by a requesting processor, b) if the requested data block is present in modified form in the cache memory of an intervening processor, requesting an access to the corresponding data bus by the intervening processor, c) granting the access to the intervening processor, d) granting an access to any other data bus available to the cross-bar means and logically connecting the data bus corresponding to the intervening processor with the other data buses available, at least one of said other data bus corresponds to another processor which has not requested the modified data block and e) sending the modified data block onto the data bus corresponding to the intervening processor and then onto the other data buses available.