Patent ID: 7265626

Claim:
A circuit, comprising: a plurality of gain-controllable amplifiers, wherein each amplifier can be digitally and independently switched between a plurality of gains stepped between a minimum and a maximum gain, and providing for a corresponding plurality of discrete gain states; a gain control logic connected to select between the respective gains of the gain-controllable amplifiers, and providing for a single such gain-controllable amplifier to be adjusted in a single time period; a multi-level voltage comparator for sampling the strength of an input signal, and connected to provide the gain control logic with digitized signal amplitude data obtained by comparing a plurality of voltage reference thresholds divided from a peak reference voltage; a peak detector connected to sample said input signal and to generate there from said peak reference voltage; and a clock generator for pacing the gain control logic to issue updates of said plurality of gains at one gain-controllable amplifier per clock.