Patent ID: 7701375

Claim:
An encoder for encoding comparator outputs of a bank of 2**N−1 comparators into an N bit binary code, each comparator having a threshold for comparing to an analog input and a comparator output, the threshold of each comparator selected so that if comparator output Cw, wherein w ranges from 1 to 2**N−1, is a binary zero, then each comparator output numbered Cx wherein x is greater than w, is binary zero, and the threshold of each comparator selected so that if comparator output Cy, wherein y ranges from 1 to 2**N−1, is binary one, then each comparator output numbered Cz wherein z is less than y, is binary one, the encoder comprising: N circuits, each of the N circuits for encoding an Mth bit, wherein M ranges from 1 to N, of the N bit binary code, the circuit for the Mth bit comprising: N−M+1 levels of current steering switches; wherein an Lth level of the 1 to N−M+1 levels has 2**(L−1) current steering switches each connected to a current steering switch in an (L−1)th level, except when the Lth level is 1; wherein the comparator outputs of the bank of 2**N−1 comparators are connected to the current steering switches.