Patent ID: 8659458

Claim:
A current switching digital-to-analog converter (DAC), comprising: an analog output which provides said DAC's analog output voltage; a digital input which receives a plurality of digital bits representative of a desired analog output voltage; a first clock signal CK1 having an associated frequency f CK1 ; a plurality of current sources having respective output currents which are selectively directed to respective intermediate nodes in response to respective control signals, the states of said control signals varying with said digital bits and changing states in synchronization with CK1; a plurality of multiple return-to-zero (MRZ) current switch circuits connected between respective intermediate nodes and said analog output, said MRZ current switch circuits driven with a second clock signal CK2, such that said output currents applied to said intermediate nodes are connected to said analog output when CK2 is low and disconnected from said analog output and connected to a fixed voltage when CK2 is high, each of said MRZ current switch circuits arranged to connect a respective one of said intermediate nodes to said fixed voltage multiple times during every switching cycle of CK1 such that switching noise that arises when CK1 is asserted is prevented from appearing on said analog output.