Patent ID: 7350006

Claim:
A method of handling interrupts in a system of multiple processors comprising: storing a designation value at each processor identifying whether the processor is the designated processor, wherein the designated processor handles interrupts to the system; the designated processor selecting which one of the other processors should be designated next; when the designated processor selects a processor different than itself, the designated processor changing the designation value of itself and the designation value of the selected processor to indicate that the selected processor is the designated processor; wherein the step of selecting occurs when the designated processor is switching to a new task, wherein a priority memory location is provided for storing a value identifying the processor having the lowest priority task and the priority value of such task, and wherein the step of selecting comprises comparing the priority value of the new task with the priority value stored in the priority memory location, and selecting either the designated processor or the processor identified in the priority memory location based on the result of such comparison.