Patent ID: 7714600

Claim:
A load fluctuation correction circuit which corrects a source voltage supplied to a logic circuit comprising: a delay circuit which is designed such that upon said source voltage which is to be supplied to said logic circuit being applied to said delay circuit as a power supply, said delay circuit receives a cycle signal and outputs a delayed cycle signal delayed by a predetermined period of time, and which operates with said source voltage supplied to said logic circuit as the power supply; a current consumption circuit provided such that it shares the power supply with said logic circuit and consumes current received from the power supply; and a phase comparison circuit which receives said cycle signal input to said delay circuit and said delayed cycle signal output from said delay circuit, compares a phase difference between said cycle signal and said delayed cycle signal, outputs a signal representing the comparison result to said current consumption circuit, instructs said current consumption circuit to consume or not to consume the current based on the comparison result, and controls the current amount consumed by said current consumption circuit such that the phase difference between said cycle signal said delayed cycle signal matches said predetermined period of time, wherein power input terminals of said logic circuit, said delay circuit, and said current consumption circuit are connected to the power supply.