Patent ID: 8335970

Claim:
A decoder comprises: a hardware interface operably coupled to receive one or more packets including first data, redundant data of the first data, second data, redundant data of the second data, and combined redundant data, wherein the combined redundant data is generated based on the redundant data of the first data and the redundant data of the second data; and a processing module operably coupled to: decode the first data based on the redundant data of the first data to produce a first decoded packet; decode the second data based on the redundant data of the second data to produce a second decoded packet; verify the decoding of the first and second data; when the first data is decoded successfully and the second data is not decoded successfully: encode the first data to produce second redundant data of the first data; determine second redundant data of the second data based on the combined redundant data and the second redundant data of the first data; decode the second data based on the second redundant data of the second data to produce redundant second decoded data; and verify the decoding of the second data based on the second redundant data of the second data.