Patent ID: 7840731

Claim:
A network router, comprising: a symmetric multiprocessor (SMP) system that includes a plurality of processors for processing threads to route data packets, each of said processors having a cache memory; a plurality of separate and adjustable interface sets that each includes a plurality of interfaces configured to receive and transmit said data packets, each of said interface sets being assigned to a particular one of said processors such that each of said processors has only one interface set assigned thereto, said plurality of interface sets comprising a first interface set assigned to a first one of said processors and a second interface set assigned to a second one of said processors, said first interface set including at least a first of said interfaces and a second of said interfaces, and said second interface set including at least a third of said interfaces, a fourth of said interfaces, and a fifth of said interfaces, wherein said interface sets are configured to be adjusted such that one of said third, fourth, and fifth interfaces is transferred from said second interface set to said first interface set to balance a load on at least one of said first and second processors; and an operating system that includes a scheduler which assigns said threads to particular processors, said scheduler assigning each of said threads for the routing of at least one of said data packets from a particular interface to a particular processor to which a particular interface set which includes that particular interface is assigned.