Patent ID: 7286428

Claim:
A method of applying a voltage to a resistive memory element comprising: controlling a current applied to said resistive memory element using a transistor during a measuring time period, said transistor having a source connected to a first power trace at a first potential voltage, a gate switchingly connected to an output of a differential amplifier, and a drain connected to a column line, said column line connected to one terminal of said resistive memory element and switchingly connected to an inverting signal input of said differential amplifier; supplying a reference voltage to a non-inverting signal input of said differential amplifier; during a first-time period, isolating said output of said differential amplifier from said gate of said transistor; during said first-time period, connecting said output of said differential amplifier to a non-inverting calibration input of said differential amplifier, and to a first terminal of a first compensation capacitor; during said first-time period, connecting an inverting calibration input of said differential amplifier to a first terminal of a second compensation capacitor, to the inverting signal input of said differential amplifier, to the non-inverting signal input of said differential amplifier, and to a source of said reference voltage; allowing said first and second capacitors to charge to first and second voltages respectively; and during said measuring time period connecting said output of said differential amplifier to said gate of said transistor and applying said first and second voltages to said inverting and non-inverting calibration inputs of said differential amplifier respectively.