Patent ID: 8732435

Claim:
A method for optimizing memory usage for frame-based data processing within a computing device, comprising: defining a dynamic addressing scheme, wherein the dynamic addressing scheme includes determining a current increment for a memory buffer based on an analysis of a pattern associated with a plurality of data samples of a frame stored within the memory buffer, wherein memory addresses of the plurality of data samples from a same channel of the frame are incremented from a starting address of a first data sample by multiples of the current increment, for each channel of a plurality of channels; determining a memory address for each data sample within the memory buffer using the current increment; reading a data sample from a corresponding memory address within the memory buffer based on the dynamic addressing scheme; writing a subsequent data sample from an input data stream into the corresponding memory address within the memory buffer; and storing the current increment of the dynamic addressing scheme in the memory buffer for dynamically redefining the dynamic addressing scheme for subsequent processing.