Patent ID: 7908107

Claim:
A method of calibrating a port of a vector network analyzer comprising the steps of: (a) determining a magnitude of an expected reflection for a reference open standard; (b) estimating a plurality of load inductance values for a load; (c) calculating a magnitude of an estimated reflection for each of said plurality of estimated load inductance values; (d) determining a difference between said magnitude of said expected reflection for said reference open standard and said magnitude of said estimated reflection for each of said estimated load inductance values; and (e) selecting one estimated load inductance value that minimizes a sum of said difference between said magnitude of said expected reflection for said reference open standard and said magnitude of said estimated reflection for said estimated load inductance for a plurality of frequencies; and (f) calibrating a port of said vector network analyzer to correct a measurement at said port for an effect of said one estimated load inductance value.