Patent ID: 7045901

Claim:
A method of forming a chip package for semiconductor chips including the steps as follows: forming a printed circuit board (PCB 6 ) with an open window hole (W) therethrough, the printed circuit board (PCB 6 ) having a length and a width and a top surface and a bottom surface and the open window hole (W) having a greater length than width, forming semiconductor chips including a primary chip (CH 5 ) and a secondary chip (CH 6 ), the primary chip (CH 5 ) and the secondary chip (CH 6 ) each having a length greater than the width of the open window hole (W), forming bonded connections (SB) between the top surface of the printed circuit board (PCB 6 ) and the primary chip (CH 5 ), with the primary chip (CH 5 ) overlying the open window hole (W) and with the primary chip (CH 5 ) extending transversely across the width of the open window hole (W), and locating the secondary chip (CH 6 ) suspended within the open window hole (W) and forming bonded connections (SB) between the secondary semiconductor chip (CH 6 ) and the primary chip (CH 5 ) in a chip-on-chip connection.