Patent ID: 7050125

Claim:
An active matrix substrate comprising: a substrate; a first wiring formed on said substrate; an interlayer insulating layer formed over said substrate having said first wiring formed thereon; a second wiring formed on said interlayer insulating layer; a driving circuit including at least one active element formed above said interlayer insulating layer with an adhesion layer interposed therebetween, said at least one active element comprising a semiconductor layer, a source electrode and a drain electrode both connected to said semiconductor layer, and a gate electrode formed on said semiconductor layer with a gate insulating layer interposed therebetween; one of said first wiring and said second wiring connected to said gate electrode of said at least one active element by a first connecting electrode; the other of said first wiring and said second wiring connected to said source electrode of said at least one active element by a second connecting electrode; and a pixel electrode connected to said drain electrode of said at least one active element, wherein said interlayer insulating layer is formed of one material selected from the group consisting of silicon oxide added with additive and a resin.