Patent ID: 7732290

Claim:
A method of making a transistor device comprising: providing a template having a top surface and a bottom surface, opposite of the top surface; forming vertical openings in the substrate, wherein the openings extends from the top surface of the template, through the template, to the bottom surface of the template; providing carbon nanotubes in the openings, wherein the carbon nanotubes extend from the top surface to the bottom surface of the template; forming a first electrode region on the top surface of the template to electrically couple to first ends of the carbon nanotubes; forming a second electrode region on the bottom surface of the template to electrically couple to second ends of the carbon nanotubes; forming a first gate region in the template, wherein the first gate region has a first surface extending parallel to a portion of a first carbon nanotube between first and second ends of the first carbon nanotube; and forming a second gate region in the template, wherein the second gate region has a second surface extending parallel to a portion of a second carbon nanotube between first and second ends of the second carbon nanotube, and the first carbon nanotube is positioned between the second carbon nanotube and the first gate region.