Patent ID: 8493954

Claim:
A method for reducing Digital-to-Analog Conversion (DAC) bits at a transmitter of a Frequency Division Multiple Access (FDMA) system, the method comprising: (a) generating a digital signal gain control value and an analog signal gain control value using subcarrier allocation information, a required Signal to Noise Ratio (SNR), and a Peak to Average Power Ratio (PAPR), the analog signal gain control value being inversely related to the digital signal gain control value; (b) controlling a gain of a signal input to a digital-to-analog converter by the digital signal gain control value generated in (a) to reduce a number of DAC bits; (c) converting a digital signal of the controlled gain in (b) into an analog signal by the digital-to-analog converter; and (d) restoring an original signal level by controlling a gain of a signal output from the digital-to-analog converter using the analog signal gain control value from (a), wherein the digital signal gain control value is a function of a ratio of Nalloc to Nmin, where Nalloc denotes a number of the subcarriers currently allocated, and Nmin denotes a minimum number of allocated subcarriers comprising a minimum allocation subcarrier unit.