Patent ID: 7247570

Claim:
A method of forming pillars in a substrate for integrated circuits comprising: forming a lower hard mask on a substrate; forming an upper hard mask over the lower hard mask; forming a first resist mask over the upper hard mask to form first exposed portions of the upper hard mask and the lower hard mask; removing the first exposed portions of the upper hard mask and the lower hard mask; forming a second resist mask over the upper hard mask to form second exposed portions of the upper hard mask after removing the first resist mask; removing the second exposed portions of the upper hard mask to form a third exposed portion of the lower hard mask; etching the substrate selectively to the upper hard mask and the third exposed portions of the lower hard mask after removing the second exposed portions of the upper hard mask; removing the third exposed portions of the lower hard mask after etching the substrate; and etching the substrate using the upper hard mask to form a plurality of active areas and trenches after removing the third exposed portion of the lower hard mask.