Patent ID: 7425484

Claim:
A method of manufacturing a semiconductor device, comprising: forming on a semiconductor substrate, a plurality of multi-layered structures each including a first semiconductor layer and a second semiconductor layer that is deposited over the first semiconductor layer and has an etching rate smaller than the etching rate of the first semiconductor layer; forming a first trench through the first semiconductor layer and the second semiconductor layer, the first trench exposing the semiconductor substrate; forming a support body on sidewalls of the first semiconductor layer and the second semiconductor layer in the first trench, the support body supporting the second semiconductor layer over the semiconductor substrate; forming a second trench that exposes through the second semiconductor layer, at least part of the first semiconductor layer of which sidewall has the support body thereon; etching the first semiconductor layer via the second trench selectively, to form under the second semiconductor layer, a cavity resulting from removal of the first semiconductor layer; forming a buried insulating layer that is buried in the cavity; exposing a side surface of the deposited second semiconductor layer through the insulating layer; forming a gate insulating film on the exposed side surface of the second semiconductor layer; forming a gate electrode over the side surface of the second semiconductor layer with intermediary of the gate insulating film therebetween; implementing first ion-implantation through the top surface of the second semiconductor layer, to form in the second semiconductor layer at a lower layer level, first source and drain layers on respective sides of the gate electrode; and implementing second ion-implantation through the top surface of the second semiconductor layer, to form in the second semiconductor layer at an upper layer level, second source and drain layers on respective sides of the gate electrode.