Patent ID: 7313026

Claim:
A semiconductor device equipped with a nonvolatile memory cell, comprising: a second conductivity type semiconductor substrate; a second conductivity type first well and a second conductivity type second well, each formed in the semiconductor substrate; a first conductivity type third well formed in the semiconductor substrate and separating the first well and the second well; a first gate electrode extending over the first well and the second well via a first gate insulating film; a data writing MISFET and a data reading MISFET, each formed in the first well and using the first gate electrode as a gate electrode; and a capacitive element formed in the second well and using the first gate electrode as a capacitive electrode, wherein a first conductivity type semiconductor isolation layer is formed in the semiconductor substrate, wherein the first, second and third wells are formed in the semiconductor isolation layer, wherein a first voltage in a forward direction is applied to the second well when writing of data to the nonvolatile memory cell is carried out, and wherein the first voltage in a reverse direction is applied to the second well when erasing of data from the nonvolatile memory cell is carried out.