Patent ID: 8399884

Claim:
A semiconductor device comprising: a pixel portion comprising: a first wiring comprising a first conductive layer over a substrate; a first gate electrode electrically connected to the first wiring, the first gate electrode comprising a second conductive layer over the substrate; a second gate electrode electrically connected to the first wiring, the second gate electrode comprising a third conductive layer over the substrate; a second wiring comprising a fourth conductive layer over the substrate, the second wiring being electrically connected to one of a source and a drain of a first transistor; and a third wiring comprising a fifth conductive layer over the substrate, the third wiring being electrically connected to one of a source and a drain of a second transistor; and a terminal portion comprising a fourth wiring comprising a sixth conductive layer, wherein a first channel formation region of the first transistor and the second conductive layer overlap with each other, wherein a second channel formation region of the second transistor and the third conductive layer overlap with each other, wherein the second conductive layer is in direct contact with the first conductive layer through a first contact hole, wherein the third conductive layer is in direct contact with the first conductive layer through a second contact hole, wherein the first conductive layer is over and overlapping the fourth conductive layer and the fifth conductive layer, and wherein the sixth conductive layer and the first conductive layer comprise a same material.