Patent ID: 8629516

Claim:
A semiconductor device, comprising: a substrate; an insulator layer over the substrate, the insulator layer including two portions surrounding a cavity, at least one of the portions including a first signaling component; and a bulk silicon layer over the insulator layer, the bulk silicon layer including three portions, wherein two of the three portions of the bulk silicon layer are over the two portions of the insulator layer, wherein one of the two portions of the bulk silicon layer includes a second signaling component to engage with the first signaling component, and wherein the third portion of the bulk silicon layer is separate from the other two portions and is disposed within the cavity; a first dimple on the third portion of the bulk silicon layer and extending into the cavity; a second dimple on the third portion of the bulk silicon layer and extending away from the cavity; and a first layer over the two portions of the bulk silicon layer, but not over the third portion; and a second layer over first layer and extending over, but not in contact with, the third portion of the bulk silicon layer.