Patent ID: 8614462

Claim:
A method of fabricating an array substrate for an organic electroluminescent device, the method comprising: forming a semiconductor layer of polysilicon in an element region where a thin film transistor is formed, and forming a semiconductor pattern of polysilicon in a storage region on a substrate, wherein the element region and the storage region are in a pixel region defined by a gate line and a data line crossing each other; forming a gate insulating layer on the semiconductor layer and the semiconductor pattern; forming a multiple-layered gate electrode over a center portion of the semiconductor layer and forming a first storage electrode over the semiconductor pattern on the gate insulating layer; performing an impurity-doping to make a portion of the semiconductor layer not covered by the gate electrode into an ohmic contact layer and to make the semiconductor pattern into a second storage electrode; forming an inter-layered insulating film that is on the gate electrode and the first storage electrode and exposes the ohmic contact layer; forming source and drain electrodes spaced apart from each other and each contacting the ohmic contact layer and forming a third storage electrode over the first storage electrode on the inter-layered insulating film; forming a passivation layer that is on the source and drain electrodes and the third storage electrode and exposes the drain electrode; forming a first electrode contacting the drain electrode and forming a fourth storage electrode over the third storage electrode on the passivation layer; and forming a bank along a boundary of the pixel region and forming a spacer selectively along the boundary of the pixel region, wherein the spacer has a height more than the height of the bank.