Patent ID: 6858535

Claim:
A method for patterning a platinum layer in the fabrication of integrated circuits, the method comprising: providing a substrate assembly including a surface; forming a patterned metal-containing adhesion layer on the surface, resulting in at least one exposed surface region of the substrate assembly; forming platinum on the patterned metal-containing adhesion layer and the at least one exposed surface region of the substrate assembly; annealing the substrate assembly including the patterned metal-containing adhesion layer and the platinum thereon, causing islands of non-adhered platinum to form on the at least one exposed surface region of the substrate assembly, while portions of the platinum on the patterned metal-containing adhesion layer adhere in a configuration substantially the same as that of the adhesion layer; and removing the islands of non-adhered platinum from the at least one exposed surface region of the substrate assembly resulting in a patterned platinum layer.