Patent ID: 8124968

Claim:
A non-volatile memory device comprising: at least one first electrode; at least one second electrode crossing the at least one first electrode; at least one data storing layer interposed between the at least one first electrode and the at least one second electrode, at a region in which the at least one first electrode crosses the at least one second electrode; at least one metal silicide layer interposed between the at least one first electrode and the at least one second electrode, at a region in which the at least one first electrode crosses the at least one second electrode; and at least one junction layer interposed between the at least one first electrode and the at least one metal silicide layer, and the at least one first electrode comprises a first semiconductor having a first conductivity, and the at least one junction layer comprises a second semiconductor having a second conductivity which is opposite to the first conductivity, wherein the at least one junction layer is recessed in a sidewall of the at least one first electrode.