Patent ID: 6907488

Claim:
A passive component for a bus system, comprising: a bus interface to connect to a bus; a serial interface to serially read out and read in data; a data memory with an output area to store data read in via the bus interface and to be read out via the serial interface; an input area to store data read in via the serial interface and to be read out via the bus interface; a control device to control the transmission and storage of data; a detection device to detect the status of the output area and of the input area and provide corresponding status information, which status information is used as the basis for reading data into the output area and reading data out of the input area via the bus interface when the bus system is connected; and a comparative device to periodically compare the status information with corresponding status information of an active component of a connected bus system, the control device controlling the reading in and reading out of data on the basis of the periodic comparison.