Patent ID: 8643524

Claim:
A delta-sigma modulator circuit, comprising: a loop filter comprising a plurality of cascaded single op-amp switched-capacitor integrator stages, wherein at least one of the switched-capacitor integrator stages has a switched capacitor input network coupled to an input terminal of the loop filter and to the input of the amplifier and operated according to a clock, a capacitive feedback network connected from an output of an amplifier of the at least one switched-capacitor integrator stage to an input of the amplifier, wherein the capacitive feedback network includes at least two capacitors coupled in series at a common terminal, wherein the common terminal is coupled to a reference voltage source by a switched-capacitor shunt network operated according to the clock; and a quantizer having an input coupled to the output of the loop filter and an output coupled to an input of the loop filter, wherein the delta-sigma modulator noise-shapes a signal provided to a second input of the loop filter as represented in an average value of the output of the quantizer.