Patent ID: 7817758

Claim:
A method for clock synchronization, the method comprising: obtaining a pair of dividing coefficients a 1 and a 2 related to a ratio of a theoretical frequency fs 1 of a first source clock signal to a theoretical frequency fs_local of a desired local clock signal; getting a common multiple T_c of a theoretical period T 1 of the first source clock signal and a theoretical period T 2 of a second source clock signal; calculating a relative error k between the first and second source clock signals in a period of T_c; dividing the first source clock signal into a first local clock signal with a period being T 1 *a 1 and a second local clock signal with a period being T 1 *a 2 according to the dividing coefficients a 1 and a 2 , respectively; calculating a clock number m of the first local clock signal and a clock number n of the second local clock signal in the period of T_c according to the relative error k and the dividing coefficients a 1 and a 2 ; and mixing the m clocks of the first local clock signal with the n clocks of the second local clock signal, resulting in m+n clocks in the desired local clock signal with a period equal to T_c.