Patent ID: 7198191

Claim:
A signal processing apparatus comprising: a microprocessor; memory control means for writing data in a memory device; and memory access means for transferring the data to said memory control means in accordance with an instruction from said microprocessor, wherein in writing the data having a first size in the memory device, said memory access means transfers the data to said memory control means until the write of the data having the first size is ended, wherein said memory control means checks that a state of the memory device is a predetermined state every time the write of the data having a second size smaller than the first size in the memory device is ended, and outputs an interrupt request signal to said microprocessor in accordance with an end of the write of the data having the first size in the memory device, and wherein said memory control means does not output the interrupt request signal to said microprocessor before the write of the data having the first size in the memory device is ended.