Patent ID: 7390721

Claim:
A method of forming a high-performance heterojunction bipolar transistor comprising the steps of: forming a base region atop a Si substrate having trench isolation regions and a collector located therein, said base region including a monocrystalline region atop the Si substrate and a polycrystalline region atop the trench isolation regions; forming an oxide layer atop the base region; forming an emitter pedestal region atop the oxide layer located atop the monocrystalline region; forming a raised extrinsic base adjacent to said emitter pedestal region; forming a silicide layer atop the raised extrinsic base; and forming an emitter in said emitter pedestal region, said emitter is spaced apart and isolated from the raised extrinsic base and the suicide layer, wherein said silicide layer atop the raised extrinsic base extends to the emitter in a self-aligned manner.