Patent ID: 7808218

Claim:
A power regulator system comprising: an error amplifier that provides an error voltage based on a comparison of a reference voltage and a feedback voltage associated with an output voltage of the power regulator system; a pulse-width modulation (PWM) comparator configured to generate a switching signal that controls activation and deactivation of at least one power switch, the PWM comparator defining a duty-cycle of the switching signal based on the error voltage and a PWM voltage; and a current limit circuit configured to clamp the error voltage upon the error voltage exceeding a voltage limit having a magnitude that varies as a function of the duty-cycle to provide a predetermined current limit that is substantially fixed independent of the duty-cycle; further comprising an envelope detector that receives a ramp waveform having a general sawtooth shape with peak values that vary in conjunction with time varying changes in the output of the PWM comparator and generates an envelope voltage that is associated with the voltage limit based on the peak values of the ramp waveform.