Patent ID: 8669808

Claim:
A bias circuit for generating an output bias current, comprising: a first transistor, having a first node coupled to a first reference voltage, a second node, and a control node; a passive component, coupled between the first reference voltage and the control node of the first transistor; a second transistor, having a first node coupled to the control node of the first transistor, a control node coupled to the second node of the first transistor, and a second node for providing the output bias current according to a current passing through the passive component; and a bias current generator, coupled to the second node of the first transistor, for providing the first transistor with a bias current; wherein a gate-source voltage of the first transistor is substantially temperature independent; a ratio of the output bias current to the bias current is not fixed when a current passing through the first transistor is not equal to the bias current; and the current passing through the first transistor is arranged to be forced to substantially equal the bias current.