Patent ID: RE44025

Claim:
A method of reducing power usage in an integrated circuit comprising: establishing separate power islands in said integrated circuit ; , said power islands separating functional regions in a logic core of said integrated circuit to allow for separated power management of said separate functional regions ; , said integrated circuit being of a type comprising an I/O ring surrounding said logic core; and establishing one or more power control transistors in said I/O ring of said integrated circuit , ; using said wherein said one or more power control transistors in said I/O ring are configured to control passage of power to one or more of said power-islands such that said power islands in said logic core; , thereby performing a multiplex function in said I/O ring, said multiplex function making available a plurality of different voltage levels for said islands ; and , wherein said power islands are selectively disconnected from a power source by said power control transistors in said I/O ring , and wherein control for said multiplex function originates from a processor .