Patent ID: 7970976

Claim:
A data processing apparatus, comprising: a host on a first integrated circuit, a first data processor on said first integrated circuit coupled to said host, and a memory on said first integrated circuit; a client on a second integrated circuit, and a second data processor on said second integrated circuit coupled to said client, said client connectable to said host for cooperation therewith to interface between said first and second data processors, wherein said host is configured to provide an interrupt to said first data processor in response to input from said client; a host on said second integrated circuit coupled to said second data processor, and a client on said first integrated circuit coupled to said memory; and a connection structure configured to permit a connection between said client on said first integrated circuit and said host on said second integrated circuit to provide a data path between said second data processor and said memory, said connection structure coupled to said first data processor for permitting said connection in response to a signal produced by said first data processor in response to said interrupt.