Patent ID: 7812394

Claim:
A system comprising: a semiconductor microprocessor electronically and physically coupled to a printed circuit board, the microprocessor comprising a transistor, the transistor comprising: a substrate; a device on the substrate comprising: a first junction region in a single crystal silicon substrate adjacent to a gate electrode; a different second junction region in the substrate adjacent to the gate electrode; and a gate dielectric layer over a top surface of the silicon substrate between the first junction region and the second junction region; wherein a first facet of the first junction region adjacent the gate electrode defines an angle of between 52 degrees and 57 degrees with respect to a bottom surface of the gate dielectric, and a second facet of the second junction region adjacent the gate electrode defines an angle of between 52 degrees and 57 degrees with respect to the bottom surface, wherein the first junction region and the second junction region define a depth below the top surface; and further comprising a material disposed within the first junction region and the second junction region, the material having a surface superior to the top surface by a distance of between ten and fifty percent of the depth.