Patent ID: 8035581

Claim:
A scan driver, configured to receive a clock signal and a start pulse, the start pulse having a duration of at least two cycles of the clock signal, and configured, in response to the clock signal and the start pulse, to generate only one emission control pulse for each of a plurality of emission control lines of a display, and to generate only one scan pulse for each of a plurality of scan lines of the display, wherein the scan driver comprises: a shift register configured to sequentially shift the start pulse in response to receiving the start pulse and the clock signal; a plurality of first logic gates, each configured to generate the only one emission control pulse for one of the emission control lines in response to the shifted start pulse, wherein the emission control signal has a duration of two or more clock signal periods; and a plurality of second logic gates, each configured to generate the only one scan pulse for one of the scan lines in response to the shifted start pulse, wherein the only one scan pulse has a duration of substantially no more than one clock signal period.