Patent ID: 7781843

Claim:
A method of making low-voltage CMOS devices and high-voltage CMOS devices formed in a common substrate, the method comprising steps of: a) defining first and second active device areas and forming a sacrificial film over at least the first and second active device areas, b) within the first active device areas, lithographically patterning device active regions of at least high-voltage CMOS devices, c) forming and patterning field isolation oxide, d) implanting dopants selectively through the sacrificial film into the lithographically defined active device regions of at least high-voltage CMOS devices to form drift regions, e) diffusing the implanted dopants at a first predetermined temperature to form high-voltage CMOS drift regions, f) removing the sacrificial film, g) subsequent to removing the sacrificial film, forming low-voltage CMOS devices in the second active device areas at temperatures below the first predetermined temperature, and h) subsequent to removing the sacrificial film, forming a layer of base oxide over areas of high-voltage gate oxide of the high-voltage CMOS devices and areas of low-voltage gate oxide of the low-voltage CMOS devices; and i) selectively removing said base oxide from said areas of low-voltage gate oxide of the low-voltage CMOS devices such that a portion of said base oxide remaining on said areas of high-voltage gate oxide is thicker than a portion of said base oxide remaining on said areas of low-voltage gate oxide; in which said forming low-voltage CMOS devices comprises using a salicide process to form self-aligned gates of the low-voltage CMOS devices said high-voltage CMOS devices comprising gates that are not self-aligned.