Patent ID: 8009504

Claim:
A semiconductor memory input/output device, comprising: first and second selection pads used to input and output signals for a plurality of operation modes and having multiple functions corresponding to a selected operation mode; a control signal generator for outputting first and second setting signals and a mask control signal by an extended mode register set signal having information about the multiple functions and an operation mode signal having information on the plurality of operation modes; a lower input/output unit including a lower output buffer for outputting a read data strobe signal to the first selection pad and a lower input buffer for receiving a lower data mask signal from the selection pad, and selecting one operation of the lower output buffer and the lower input buffer by the first setting signal; and an upper input/output unit including an upper output buffer for outputting an inverted read data strobe signal to the second selection pad and an upper input buffer for receiving an upper data mask signal from the second selection pad, and selecting one operation of the upper output buffer and the upper input buffer by the second setting signal and the mask control signal.