Patent ID: 7589566

Claim:
A semiconductor device comprising: a first well of a first conductivity type formed on a surface of a semiconductor substrate and receiving a first voltage; a second well of a second conductivity type formed on the surface of said semiconductor substrate and receiving a second voltage; a logic circuit including a first transistor of the second conductivity type formed on a surface of said first well and receiving an input signal at its gate and a second transistor of the first conductivity type formed on a surface of said second well and having its gate connected to the gate of said first transistor; a first diode formed on the surface of said first well and connected between the gates of said first and second transistors and said first well; a second diode formed on the surface of said second well and connected between said second well and the gates of said first and second transistors; and a switching element connected between said first and second wells and rendered conductive in response to a voltage between said first and second wells exceeding a predetermined voltage, wherein said switching element includes: a third transistor of the second conductivity type formed on the surface of said first well, having its gate and first electrode connected to said first well, and having its second electrode connected to said second well, and a third diode formed on the surface of said first well and interposed between said first well and the first electrode of said third transistor.