Patent ID: 8299543

Claim:
A semiconductor device, comprising: a substrate; an element isolating film formed in the substrate; a first element formation region isolated by the element isolating film; a second element formation region positioned adjacent to the first element formation region and isolated by the element isolating film; a first well of a second conductive type formed in a whole area of the first element formation region; a first transistor of a first conductive type formed on the first element formation region; a second transistor of the first conductive type which is formed on the first element formation region and whose threshold voltage is the same as a threshold voltage of the first transistor; a second well of the second conductive type formed in a whole area of the second element formation region; and a third transistor of the first conductive type formed on the second element formation region, wherein the second transistor is positioned between the first transistor and the third transistor; wherein a channel region of the first transistor and a channel region of the second transistor have a shape which is line-symmetrical with respect to a reference line extending between the channel regions of the first and second transistors; and wherein the first well has a shape which is line-symmetrical with respect to the reference line; and wherein the first well and the second well are linked together at a linking portion, and the linking portion has a region in which a concentration of an impurity of the second conductive type is higher than that in other portions of the first well and the second well.