Patent ID: 7235459

Claim:
A method of forming trench isolation in the fabrication of integrated circuitry, comprising: forming first and second isolation trenches into semiconductive material of a semiconductor substrate, the first isolation trench having a narrowest cross sectional dimension which is less than that of the second isolation trench; depositing a first insulative material to within the first and second isolation trenches effective to fill remaining volume of the first isolation trench within the semiconductive material but not that of the second isolation trench within the semiconductive material; depositing an intermediate insulative material lining over the first insulative material within the second isolation trench within the semiconductive material, but not within the first isolation trench within the semiconductive material; the intermediate insulative material lining comprising opposing sidewalls that face one another within the semiconductive material and a base surface extending from and between the opposing and facing sidewalls within the semiconductive material; and after the depositing of the intermediate insulative material lining, depositing a second insulative material over the opposing and facing sidewalls, and over the base surface, effective to fill remaining volume of the second isolation trench within the semiconductive material, the intermediate insulative material lining being different from that of the first and second insulative materials.