Patent ID: 7723750

Claim:
A semiconducting device comprising: a gate region positioned on a channel portion of a substrate that comprises a first semiconductor material, wherein said channel portion of said substrate is positioned atop a first conductivity type retrograded dopant island having a dopant of said first conductivity type at a first dopant concentration and vertically abutting said first semiconductor material, wherein said first conductivity type retrograded dopant island comprises Si; and a pair of Si-containing material portions, each comprising a second semiconductor material having a different lattice dimension than said first semiconductor material and including a first conductivity type doped portion, said Si-containing material portions comprise one of epitaxial Si:C and epitaxial SiGe, and said Si-containing material portions comprise at least one semiconductor material not included in said first conductivity type retrograded dopant island, wherein each of said first conductivity type doped portion has a dopant of said first conductivity type at a second dopant concentration lower than said first dopant concentration, wherein sidewalls of said first conductivity type retrograded dopant island laterally abut each of said first conductivity type doped portions and are vertically aligned to sidewalls of said gate region.