Patent ID: 8669659

Claim:
A semiconductor device, comprising: a semiconductor substrate; an active first wiring formed over the semiconductor substrate; a first dummy wiring formed on the same level as the first wiring; a first insulating film formed over the first wiring and the dummy wiring; a pad formed over the first insulating film; a second insulating film formed over the pad, the second insulating film having an opening portion; and a bump formed over the pad and the second insulating film, the bump being connected to the pad via the opening portion, wherein the first dummy wiring is in a floating state, wherein, in a plan view, the first wiring is formed under the pad and is formed under the bump, wherein, in a plan view, the first dummy wiring is not formed under the pad and is arranged in a vicinity of an outer periphery of the pad, wherein a flat area of the bump is larger than a flat area of the pad, and wherein the bump extends to the vicinity of the outer periphery of the pad in a plan view.