Patent ID: 8660190

Claim:
An image processing apparatus, comprising integrally: a first block including: a front-end decoder which decodes a first coded data sequence read from a hard disk; a first frame memory for temporarily storing decoded data; and a first display circuit which generates an image video signal for forward reproduction from data inputted from the first frame memory in succession; a second block including: an image input circuit which converts the image video signal, outputted from said first block, to a video data sequence; a second frame memory for storing the video data sequence temporarily; and an encoder which codes the video data sequence inputted from the second frame memory in succession into a second coded data sequence and outputs the second coded data to a predetermined storage area in the hard disk; and a third block including: a back-end decoder which decodes the second coded data sequence outputted from the storage area in a reverse time-series manner; a third frame memory for storing decoded data temporarily; and a second display circuit which generates an image video signal for reverse reproduction from data inputted from the third frame memory in succession, wherein the second block generates the second coded data sequence and outputs the second coded data sequence to the storage area in the storage device during forward reproduction.