Patent ID: 7689757

Claim:
Circuitry comprising an ASIC device, said ASIC device comprising: a packet router contained entirely within said ASIC device, said packet router having multiple reader interfaces configured as packet sources and multiple writer interfaces configured as packet destinations and being configured to determine a packet destination for a given data packet from a routing code contained in a header of said given data packet; a first function or module coupled to a first reader interface and a first writer interface of said packet router, said first function or module being contained entirely within said ASIC device; and a second function or module coupled to a second reader interface and a second writer interface of said packet router, said second function or module being contained entirely within said ASIC device; wherein said packet router is further configured to transfer data packets between said first function or module of said ASIC device and said second function or module of said ASIC device by: receiving first data packets at said first reader interface of said packet router from said first function or module, determining a first destination of each of said received first data packets from a routing code contained within a header of each of said received first data packets, and transmitting said received first data packets from said second writer interface of said packet router to said second function or module based on said first destination determined from said routing code, and receiving second data packets at said second reader interface of said packet router from said second function or module, determining a second destination of each of said received second data packets from a routing code contained within a header of each of said received first data packets, and transmitting said received second data packets from said first writer interface of said packet router to said first function or module based on said second destination determined from said routing code.