Patent ID: 7109782

Claim:
An apparatus comprising: a first transistor formed at a first well region, the first transistor comprising a first current electrode, a second current electrode coupled to the first well region, and a control node, wherein the first well region is of a first conductivity type; a second transistor formed at a second well region that is different than the first well region, the second transistor comprising a first current electrode, a second current electrode coupled to the second current electrode of the first transistor, and a control node coupled to the control node of the first transistor, wherein the second well region is of the first conductivity type; a current mirror comprising a first node coupled to the first current electrode of the first transistor and a second node coupled to the first current electrode of the second transistor, wherein a first current is to be provided by the current mirror at the first node and a second current is to be provided by the current mirror at the second node such that a ratio of the first current to the second current is predetermined; and a voltage generator comprising an input coupled to the first current electrode of the second transistor and an output coupled to the second well region to provide a well bias voltage based upon a signal value at the input.