Patent ID: 8629709

Claim:
A switch circuit device, comprising: a switch circuitry switching an electrical connection between first and second terminals between an on-state and an off-state in response to a set of control signals; and a driver circuitry generating said set of control signals, wherein said driver circuitry includes: an N-latch circuit outputting lower one of two input voltages as one of said set of control signals; and a leakage current suppression circuit, which includes a low pass filter circuit disposed between said switch circuitry and said N-latch circuit to suppress an incoming of a signal from said switch circuitry to said N-latch circuit, wherein said switch circuitry includes: a set of transistors disposed between said first and second terminals, wherein said set of transistors each receive said set of control signals on a gate and a back-gate thereof and are switched between an on-state and an off-state in response to said set of control signals, wherein said set of control signals include: a gate control signal fed to said gates of said set of MOS transistors; and a back-gate control signal fed to said back-gates of said set of MOS transistors, wherein said driver circuitry further includes an inverter circuit outputting selected one of first and second input voltages as said gate control signal, and wherein said N-latch circuit is connected to an output of said inverter circuit and outputs lower one of said gate control signal or a ground voltage as said back-gate control signal, and includes: a first transistor receiving said gate control signal on one of a source or drain thereof and receiving said ground voltage on a gate thereof; and a second transistor receiving said ground voltage on one of a source or drain thereof and receiving said gate-control signal on a gate thereof, the other of the source or drain of said second transistor being connected to said switch circuitry, wherein said low pass filter circuit includes: a plurality of transistors serially connected between the other of the source or drain of said first transistor of said N-latch circuit and said switch circuitry and each having a gate connected to said gate of said first transistor of said N-latch circuit, wherein each transistor of said plurality of transistors has a drain and a source, and wherein the drain and source may be exchanged in each of said first transistor, said second transistor, and said plurality of transistors.