Patent ID: 8462556

Claim:
A Method for operating a high density multi-level cell non-volatile flash memory possesses the following operating steps: (a) erasing a localized trapping memory cell with an initial threshold voltage of about 2-3V to a new initial threshold voltage level of about −2 to −1 V, wherein, after the erasing, stored bits at each side of the cell have a same threshold level, and a uniform charge distribution in a nitride layer along the channel is obtained; (b) performing an MLC programming operation on the localized trapping memory cell with the state of the negative threshold voltage of about −2 to −1 V as the new initial threshold voltage level, wherein a channel hot electron CHE injection programming method is used with a positive substrate bias to suppress a secondary electron injection; and (c) changing a gate or a drain voltage or a programming time such that more than eight programming states are achieved i.e. more than eight threshold voltage levels are achieved.