Patent ID: 7725860

Claim:
A method for mapping contacts of a programmable logic device (PLD) to contacts of an electronic component in a signal routing device having one or more layers, the method comprising: providing a contact pattern for the programmable logic device (PLD); determining a first pattern of electrically conductive traces routed from respective contacts of the electronic component via one or more channels formed at one or more layers of the signal routing device; determining a first contact assignment pattern for one or more contacts of the PLD based at least in part on the first pattern of electrically conductive traces; refining the first pattern of electrically conductive traces based at least in part on the first contact assignment pattern to generate a second pattern of electrically conductive traces routed from the respective contacts of the electronic component via one or more channels formed at one or more layers of the signal routing device; and assigning a set of one or more contacts of the PLD to one or more respective contacts of the electronic component based at least in part on the second pattern of electrically conductive traces routed from the respective contacts of the electronic component via one or more channels formed at one or more layers of the signal routing device; wherein the one or more channels are formed by arranging vias for contacts of at least the electronic component in the signal routing device.