Patent ID: 7427531

Claim:
A method of fabricating a phase change memory device, comprising: forming a plurality of parallel word lines and a word line isolation layer filling a gap region between the word lines on a semiconductor substrate of a first conductivity type, the word lines being formed to have a second conductivity type different from the first conductivity type; forming an upper molding layer on the word lines and the word line isolation layer; patterning the upper molding layer to form a plurality of upper openings exposing predetermined regions of the word lines; sequentially forming first semiconductor patterns and second semiconductor patterns in the upper openings, the first semiconductor patterns being formed to have the first conductivity type or the second conductivity type, and the second semiconductor patterns being formed to have the first conductivity type; and forming a plurality of phase change material patterns over the second semiconductor patterns respectively, the phase change material patterns being each electrically connected to the second semiconductor patterns.