Patent ID: 7935986

Claim:
A transistor comprising: a substrate; a trench isolation structure in said substrate and positioned laterally adjacent to a collector region; an emitter cap layer on said substrate above said collector region without extending laterally over said trench isolation structure; an extrinsic base comprising a polycrystalline semiconductor layer adjacent to said emitter cap layer and extending laterally over said trench isolation structure, said polycrystalline semiconductor layer having an upper surface; a first dielectric layer above and abutting said upper surface of said polycrystalline semiconductor layer; a first opening, having a first sidewall, extending vertically through said first dielectric layer to said upper surface of said polycrystalline semiconductor layer; a second opening aligned below said first opening, said second opening having a second sidewall and extending vertically through said polycrystalline semiconductor layer to said emitter cap layer, said first opening being wider than said second opening; a first dielectric spacer within said first opening positioned laterally adjacent to said first sidewall, said first dielectric spacer being above and abutting said upper surface of said polycrystalline semiconductor layer; an emitter having a lower section and an upper section, said lower section extending through said first opening and said second opening such that a bottom surface of said lower section contacts said emitter cap layer; and said upper section being on said lower section and extending laterally over said first dielectric spacer and over a top surface of said first dielectric layer; a second dielectric layer comprising an L-shaped dielectric layer, said L shaped dielectric layer comprising: a horizontal portion in said second opening above and abutting said emitter cap layer, said horizontal portion having a first end adjacent to said lower section of said emitter and a second end opposite said first end adjacent to said second sidewall of said second opening; and a vertical portion that extends from said second end of said horizontal portion adjacent to said second sidewall of said second opening through said first opening to said upper section of said emitter such that within said first opening said vertical portion is positioned laterally immediately adjacent to said first dielectric spacer; and a second dielectric spacer on said horizontal portion and positioned laterally between said vertical portion and said lower section of said emitter.