Patent ID: 7259071

Claim:
A method for making a semiconductor device having a first active region and a second active region, the first active region using a first operational voltage and the second active region using a second operational voltage that is different from the first voltage, the method comprising: providing first and second isolation structures defining the first active region on a substrate; forming a first insulation layer overlying the first and second active regions; forming a second insulation layer overlying the first insulation layer; removing a first portion of the second insulation layer overlying the first active region to expose a first portion of the first insulation layer; removing the exposed first portion of the first insulation layer using a wet etch method while leaving a second portion of the first insulation layer that is overlying the second active region intact; forming a first gate oxide having a first thickness on the first active region, the first gate oxide having a first edge facing the first isolation structure and a second edge facing the second isolation structure, the first edge being separated from the first isolation structure by a first distance and the second edge being separated from the second isolation structure by a second distance; and forming a second gate oxide having a second thickness on the second active region, the second thickness being different than the first thickness.