Patent ID: 8860152

Claim:
A integrated circuit die comprising: a semiconductor substrate; a plurality of transistors formed in the semiconductor substrate; a dielectric layer on the semiconductor substrate; metal interconnections in the dielectric layer; a first passivation layer on the dielectric layer; a first electrode on the first passivation layer; a second passivation layer over the first electrode and the first passivation layer; a first opening in the second passivation layer exposing a portion of the first electrode; a chemical reactant coating on the exposed portion of the first electrode, the reactant configured to react with a selected chemical in an environment surrounding the integrated circuit die, the reactant and the first electrode configured to generate an analog signal indicative of a concentration of the selected chemical in the environment surrounding the integrated circuit die; and a second electrode formed on the first passivation layer, a portion of the second electrode being coated in the chemical reactant and exposed to the surrounding environment by the first opening, wherein the analog signal is a current flowing between the first and the second electrode through the chemical reactant.