Patent ID: 8228710

Claim:
A resistance change memory device comprising: memory cells each comprising two transistors connected in parallel between a first node and a connecting node and a variable resistance element comprising a first end connected to the connecting node and at least two states different in resistance, the memory cells being in a matrix comprising a first axis and a second axis; and bit lines, wherein the first node of each memory cell of the memory cells and a second node which is an second end of the variable resistance element of the memory cell are connected to different bit lines among the bit lines, the first node of a first memory cell of the memory cells and the first node of a second memory cell next to the first memory cell on a first side along the second axis are connected to the same bit line, and the second node of the first memory cell and the second node of a third memory cell next to the first memory cell on a second side along the second axis are connected to the same bit line.