Patent ID: 8370675

Claim:
A method for clock synchronization, comprising: computing an offset value between a local clock time of a real-time clock circuit and a reference clock time; loading the offset value into a register that is associated with the real-time clock circuit; and summing the local clock time with the value in the register so as to give an adjusted value of the local clock time that is synchronized with the reference clock, wherein the local clock time is maintained by incrementing a counter at intervals determined by a clock source, and wherein summing the local clock time comprises adding the value in the register to the local clock time at one of the intervals, and wherein the real-time clock circuit comprises an adder providing a summed output to the counter, and having a first adder input coupled to receive a clock output from the counter, and a second adder input coupled to a multiplexed output from a multiplexer, which has a first multiplexer input coupled to receive a default increment amount and a second multiplexer input coupled to receive the offset value from the register.