Patent ID: 8704296

Claim:
A semiconductor device, comprising: a gate having a first trench portion disposed within a first trench of a junction field-effect transistor device, a second trench portion disposed within a second trench of the junction field-effect transistor device, and a top portion coupled to both the first trench portion and to the second trench portion; a mesa region disposed between the first trench and the second trench, and including a single PN junction defined by an interface between a substrate dopant region having a first dopant type and a channel dopant region having a second dopant type; a first conductive member disposed within at least one of the first trench or the second trench of the junction field-effect transistor, the first conductive member being capacitively coupled with the gate; and a second conductive member disposed within at least one of the first trench or the second trench, the second conductive member being physically isolated from the first conductive member by an oxide.