Patent ID: 7779179

Claim:
An interface controller connected to a host apparatus and a memory, and receiving multiple responses to one request, the interface controller comprising: a packet generation unit which adds header data to a request issued by the host apparatus to generate a request packet and outputs the request packet to the memory; a receive buffer which stores a response packet with respect to the request packet; a protocol generation unit which generates a response according to a prescribed protocol based on the response packet stored in the receive buffer, and outputs the response to the host apparatus; a maximum division number calculation unit which calculates a maximum division number of the request issued by the host apparatus; and a request issue control unit which gives a request issue permission to the host apparatus based on the maximum division number calculated by the maximum division number calculation unit, a maximum division number of processed request and a maximum division number of processed response, wherein the request issue control unit determines whether or not the receive buffer has overflowed, based on a magnitude relation between: a first value being a sum of the maximum division number calculated by the maximum division number calculation unit and a summation of the maximum division number of the processed request; and a second value being a sum of the maximum division number of the processed response and a header area size of the receive buffer.