Patent ID: 8390032

Claim:
A field effect transistor, comprising: a well region of first conductivity type formed in an isolated region of a semiconductor substrate; a gate structure formed over the well region and including a gate dielectric and a gate electrode formed over the gate dielectric; the gate electrode being formed in a square pattern having a central opening; a drain region of second conductivity type formed in the well region adjacent the gate electrode, within the central opening of the square pattern of the gate electrode; source regions of the second conductivity type formed in the well region adjacent the gate electrode at centers of sides of the square pattern of the gate electrode; back gate contact regions of the first conductivity type formed in the well region adjacent the gate electrode at corners of the square pattern of the gate electrode; one or more transistor channel regions being defined in the well region below the gate electrode, between the source regions and the drain region, and further including additional drain regions of the second conductivity type formed in the well region adjacent the gate electrode, within additional openings along diagonals of the square pattern of the gate electrode.