Patent ID: 7583129

Claim:
An integrated circuit comprising: at least two cascade-connected multiplexers each having: a plurality of data inputs; a data output, wherein each data input and each data output has two terminals for the application of a dual-rail signal wherein the data output of a multiplexer of the at least two cascade-connected multiplexers is connected to one of the data inputs of the multiplexer connected downstream, as a result of which a data path leading through the cascade is formed; a control input, wherein a signal present at the control input defines which of the data inputs is connected to the data output; at least one precharge unit, which is driven with a precharge unit control signal, wherein the at least one precharge unit is connected to the data output or at least one of the data inputs of one of the multiplexers to thereby bring the data outputs and/or data inputs of the multiplexers into a precharge state before execution of a shift operation, and the at least one precharge unit is connected between a supply potential terminal or a reference potential terminal and the data path of the integrated circuit; and a holding circuit coupled to the data path, wherein when a dual-rail signal is present at the data output of one of the multiplexers, the holding circuit connects the respective signal value to the supply potential terminal or the reference potential terminal, wherein a precharge signal is applied to the data inputs and data outputs in the data path of the multiplexer cascade before the execution of the shift operation.