Patent ID: 7199745

Claim:
A successive approximation A/D converter, comprising: a sample-hold amplifier circuit configured to sample and hold an input analog voltage to produce at an output node an internal analog voltage proportional to the input analog voltage with a voltage gain being smaller than 1; a switched capacitor D/A converter coupled to the output node of said sample-hold amplifier circuit and including a plurality of capacitors for storing electric charge responsive to the internal analog voltage, each of the plurality of capacitors having one end thereof connected to the output node of the sample-hold amplifier circuit at a time of storing the electric charge so that said one end receives the internal analog voltage having the voltage gain smaller than 1, and said switched capacitor D/A converter configured to switch couplings of the capacitors in response to a control signal to produce at an output node a comparison analog voltage responsive to the internal analog voltage and the control signal; a comparator coupled to the output node of said switched capacitor D/A converter to produce at an output node a comparison result signal responsive to the comparison analog voltage; and a control circuit coupled to the output node of said comparator to supply the control signal responsive to the comparison result signal to said switched capacitor D/A converter.