Patent ID: 8806392

Claim:
A method of making an integrated circuit (“IC”) design layout in a way to distinguish a plurality of similar patterns contained therein, each of the patterns comprising a plurality of dummy features, the method comprising: identifying an anchor group of anchor dummy features as a subset of the plurality of dummy features in each of the patterns, the anchor group being present in each of the patterns and having identical configuration, size, and location thereof; identifying at least one tunable dummy feature as a subset of the plurality of dummy features in each of the patterns, the at least one tunable dummy feature having a fixed spatial relationship with the anchor group of the respective pattern; determining tuning parameters to be varied for having the at least one tunable dummy feature deviated; determining, for each tuning parameter, deviation values by which the tuning parameter can be varied; and using a computer, varying the at least one tunable dummy feature in each of the patterns by at least one of the deviation values in such a way that different patterns become distinguishable from one another through the tunable dummy features so varied.