Patent ID: 6990665

Claim:
A computer-readable medium having computer-executable instructions for performing the following steps for a CPU running a non-real-time operating system: a. defining a time slot for which a first real-time thread will be guaranteed said CPU resources for at least a first portion of said time slot; b. treating the non-real-time operating system as a second real-time thread; c. allocating, to the second real-time thread, a second portion of the time slot during which the second real-time thread will be guaranteed said CPU resources; d. executing the first real-time thread during said first portion of the time slot; e. executing the second real-time thread during said second portion of the time slot; f. allocating, to one or more other real-time threads, respective one or more other portions of said time slot for which said one or more other real-time threads are guaranteed said CPU resources; and g. executing said one or more other real-time threads for their said respective one or more other portions of said time slot, wherein the time slot is defined by an APIC, which issues an interrupt, a performance counter issues a performance-counter interrupt in order to switch allocation of said CPU resources between said real-time threads, and the performance-counter interrupt is non-maskable.