Patent ID: 8635257

Claim:
A computer program product for executing a machine instruction in a central processing unit, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction for performing a shift function, the computer program product comprising: a non-transitory computer readable medium readable by a processor and storing instructions for execution by the processor for performing a method comprising: obtaining a densely packed decimal (DPD) floating point operand, the DPD floating point operand comprising a sign bit, a DPD trailing significand portion and a combination portion, the combination portion comprising an encoded leftmost digit (LMD) of a decimal floating point (DFP) significand value and an encoded biased exponent value, the DPD trailing significand portion being a DPD encoded value of digits of the DFP significand value; extracting the LMD of the DFP significand value from the combination portion; extracting the digits of the DFP significand value from the DPD trailing significand portion; shifting the DFP significand value a number of digits specified in the instruction in one direction, the shifting producing a result DFP significand value, the result DFP significand value comprising a result leftmost digit and a result plurality of rightmost digits; encoding the result leftmost digit into a result combination portion; encoding the result plurality of rightmost digits into a result DFP significand portion; and storing the result combination portion and the result DFP significand portion.