Patent ID: 7759739

Claim:
A chip, comprising: an active semiconductor region; a field effect transistor (“FET”) having a channel region, a source region and a drain region all disposed within said active semiconductor region, said FET having a longitudinal direction in a direction of a length of said channel region, and a transverse direction in a direction of a width of said channel region, wherein said longitudinal and transverse directions are horizontal directions of said FET, and a vertical direction of said FET is transverse to said horizontal directions; and a dielectric stressor element having a horizontally extending upper surface underlying a portion of said active semiconductor region, said upper surface extending to an edge surface shared with said active semiconductor region, said edge surface extending in a vertically downward direction abruptly away from said upper surface, wherein said FET is an n-type FET (“NFET”) and said dielectric stressor element applies a tensile stress to said channel region of said NFET.