Patent ID: 8124977

Claim:
A semiconductor structure, comprising: a crystalline semiconductor substrate having a substantially planar surface with a first bonding region and a second bonding region, wherein the substantially planar surface at the second bonding region includes a native oxide and the substantially planar surface at the first bonding region does not include native oxide, wherein the native oxide forms on exposed semiconductor areas when the exposed semiconductor areas are exposed to air, water or peroxide; and a compressed semiconductor layer bonded to the substantially planar surface of the crystalline substrate, wherein a first portion of the compressed semiconductor layer is in direct physical contact with the first bonding region, a second portion of the compressed semiconductor layer is separated from the second bonding region of the crystalline substrate by the native oxide, a third portion of the compressed semiconductor layer extends from the first portion to the second portion, and the third portion is bonded to the substantially planar surface of the crystalline substrate.