Patent ID: 7242225

Claim:
A frequency synthesiser according to a direct digital synthesis method comprising a phase accumulator for cyclical incrementation of a phase signal by a phase increment present at an input of the phase accumulator, with a memory unit containing a table of sine-function values stored in memory cells of the memory unit for determination of sine-function values corresponding to phase values of the phase signal, with a digital-to-analog converter for conversion of the time-discrete sine-function values into a quasi- analog sinusoidal time function and with an anti-aliasing low-pass filter for smoothing the quasi- analog sinusoidal time function, and with a frequency divider, wherein a non-periodic signal is superimposed over the time-discrete sinusoidal function values in an adder, which is connected between the memory unit and the digital-to-analog converters wherein a noise signal bandpass-filtered by a bandpass filter in a low-frequency range is generated by a noise generator, which is controlled with a frequency-divided reference clock pulse obtained from dividing a common reference clock pulse by the frequency divider, and wherein the common reference clock pulse is provided by a common reference clock generator with a common reference frequency.