Patent ID: 8314460

Claim:
A semiconductor apparatus, comprising: a first semiconductor layer of a first conductive type; a low concentration base region of a second conductive type formed on the first semiconductor layer; a gate electrode formed in a trench with an insulating film formed on an inner surface of the trench that is formed to reach the first semiconductor layer from a surface of the low concentration base region; a source region of the first conductive type formed on the low concentration base region; a first high concentration base region of the second conductive type formed on the low concentration base region so that the source region and the first high concentration base region are formed in a first direction; a second high concentration base region of the second conductive type formed to be included inside the low concentration base region, provided below and separated from the first high concentration base region and having a first portion of the low concentration base region formed between the second high concentration base region and the first high concentration base region; and a third high concentration base region of the second conductive type configured to be included inside the low concentration base region, provided below and separated from the second high concentration base region and having a second portion of the low concentration base region formed between the third high concentration base region and the second high concentration base region, wherein the first high concentration base region, the second high concentration base region, and the third high concentration base region are formed in a second direction perpendicular to the first direction.