Patent ID: 7366882

Claim:
In an object-oriented language processor that generates a microinstruction for an opcode, an address calculation unit (ACU) comprising: an input for receiving selection data from the microinstruction; differentiation circuitry receiving the selection data for determining if the address calculation unit will operate on this microinstruction; one or more inputs for receiving a local variable pointer, stack pointer, or base address; a selecting circuit receiving one of the local variable pointer, stack pointer, and base address, for identifying the location of a specific object structure in memory; one or more inputs for receiving a local variable number, the local variable number being indicative of a specific element in the object structure; a scaling portion for scaling the local variable number; and a generating portion for generating a memory address for the element contained in the object structure by using the scaled local variable number, the generating portion operating responsive to the differentiation circuitry; wherein the generating portion generates the memory addresses in a single processor clock-cycle.