Patent ID: 7994493

Claim:
A semiconductor device, comprising: a semiconductor substrate including a first portion of a first conductivity type; a word line at the first portion of the semiconductor substrate, the word line having a second conductivity type, the second conductivity type being different from the first conductivity type; a molding layer on the word line, the molding layer having an opening that exposes a predetermined portion of the word line; a first semiconductor pattern in the opening of the molding layer, the first semiconductor pattern having the first conductivity type; an insulating layer on the molding layer; a lower electrode at an opening of the insulating layer electrically connected with the first semiconductor pattern; a phase change material pattern on the lower electrode; and an upper electrode on the phase change material pattern, wherein the word line comprises a first portion extending under and between each of a plurality of phase change memory cell of the semiconductor device, the plurality of phase change memory cells including a first phase change memory cell comprising the lower electrode, the phase change material pattern and the upper electrode, and wherein a cross sectional profile, taken along a length direction of the first portion of the word line, of the first portion of the word line has an entire top surface that is flat.