Patent ID: 8566603

Claim:
An apparatus comprising: an interface connectable to a data bus; a primary master boot record (MBR); an alternate master boot record (MBR) that includes instructions for unlocking the apparatus; a control circuit configured to: selectively implement a first security protocol between the interface and a device connected to the data bus; receive an unlock command and check a password against one or more passwords stored in the alternate MBR to selectively unlock one or more portions of the data storage device protected by the first security protocol; selectively implement a second security protocol between the interface and the device connected to the data bus; the first security protocol and the second security protocol manage the device's access to the apparatus; redirecting a read of the primary MBR to read the alternate MBR when the apparatus is locked and a host attempts to read the primary MBR from the apparatus; and when the apparatus is unlocked, deactivate the alternate MBR and implement the primary MBR.