Patent ID: 8502565

Claim:
A buffer configured to generate a digital signal with reduced phase noise from an input sinusoidal wave provided by a crystal oscillator, said buffer comprising: a current source comprising a transistor operatively connected to a power supply; a differential amplifier having differential inputs, a pair of serially connected transistors, and differential outputs interposed between the pair of serially connected transistors, each of said serially connected transistor pairs comprising an inverting transistor coupled to the current source transistor and a load transistor serially connected between the inverting transistor and ground, wherein the differential inputs couple to the inverting transistors, and wherein a gate of each load transistor is coupled to a non-zero fixed bias voltage, said differential amplifier configured to convert the input sinusoidal wave applied to the differential inputs to an output square wave comprising alternating high and low states connected by square wave state transition periods having a finite slope; a first feed forward transistor connected to the differential amplifier between a positive differential output and the ground; and a second feed forward transistor connected to the differential amplifier between a negative differential output and the ground; wherein the first and second feed forward transistors comprise a different transistor type than the inverting transistors; and wherein the first and second feed forward transistors are configured to shape the output square wave by increasing the finite slope of the output square wave during sinusoidal state transition periods between peaks and valleys of the input sinusoidal wave.