Patent ID: 8587370

Claim:
A semiconductor device comprising: a first transistor having a control electrode coupled to an input node, a first conductive electrode coupled to an output node and a first power supply line, and a second conductive electrode coupled to a second power supply line; and second to fourth transistors each having a control electrode coupled to said input node, a first conductive electrode coupled to said output node and said first power supply line, a second conductive electrode coupled to said second power supply line, and a well corresponding to a back gate and having a changeable potential, said second to fourth transistors being substantially equal in size to said first transistor, wherein said first power supply line and said second power supply line are arranged while being spaced away from each other, said first transistor and said second transistor are arranged side by side between said first power supply line and said second power supply line in an extending direction of said first power supply line and said second power supply line, and said third transistor and said fourth transistor are arranged side by side in the extending direction of said first power supply line and said second power supply line on a side opposite to said first transistor and said second transistor with respect to said first power supply line.