Patent ID: 7569465

Claim:
A method of making a non-volatile memory, comprising: forming an array of charge storage elements on a surface of a semiconductor substrate with a first layer of dielectric between the charge storage elements and the surface of the semiconductor substrate, forming control gates elongated in a first direction over the charge storage elements with a second layer of dielectric between the control gates and the charge storage elements, the control gates being separated in a second direction across the array, the first and second directions being orthogonal with each other, forming a third dielectric layer over the control gates, wherein the charge storage elements, the second dielectric layer, the control gates and the third dielectric layer form layered structures with opposing sidewalls in the second direction that form spaces between the layered structures having widths in the second direction that are less than one-fifth of thicknesses of the layered structures, and further wherein the charge storage elements are positioned at bottom portions of the layered structures, and thereafter forming a dielectric in the spaces between the layered structure sidewalls that close tops of the spaces while leaving voids in bottom portions of the spaces between the charge storage elements in the layered structures whose opposing sidewalls formed the spaces.