Patent ID: 8804393

Claim:
A semiconductor device comprising: a substrate; and a plurality of nonvolatile semiconductor memories mounted on the substrate, wherein the substrate includes: a first wiring layer in which a first wiring pattern is formed, the first wiring pattern structure to mount the nonvolatile semiconductor memories on a surface layer side of the substrate; a second wiring layer in which a second wiring pattern is formed on a rear surface layer side of the substrate; a plurality of third wiring layers formed as an inner layer; and an insulating layer provided between the first wiring layer and the second wiring layer, and between the second wiring layer and the third wiring layers, wherein a wiring density of the entire third wiring layers and the second wiring layer that are formed on a rear surface layer side with respect to a center line of a layer structure of the substrate, is equal to or greater than a wiring density of the entire third wiring layers and the first wiring layer that are formed on a surface layer side with respect to the center line of the layer structure of the substrate, a difference between the wiring density of the entire third wiring layers and the second wiring layer and the wiring density of the entire third wiring layers and the first wiring layer being 7.5% or less, and at least one of the third wiring layers is a shield layer configured to prevent leakage of noise.