Patent ID: 8310645

Claim:
A wiring board comprising: a substrate; pads; and connection wires connected to the pads, respectively, the pads being disposed in a plurality of rows, the pads disposed in the plurality of rows including: first row pads each being connected to a respective one of the connection wires that is long in length; and second row pads each being connected to a respective one of the connection wires that is shorter in length than that of the connection wires connected to the first row pad, each of the connection wires connected to the first row pads being provided not in a region between respective adjacent ones of the second row pads but in a lower layer region of the second row pads, in such a manner that at least an insulating layer is sandwiched between the second row pads and the connection wires connected to the first row pads, and 0.8≦W 1 /W 2 ≦1, where W 1 is a line width of the connection wires connected to the first row pads in the lower layer region of the second row pads, and W 2 is a width of the second row pads.