Patent ID: 7773324

Claim:
A phase-acquisition loop for a read channel operable to receive a read signal, the phase-acquisition loop comprising: a zero-phase restart circuit operable to generate a reference phase-correction value corresponding to an error between a phase of a sample clock and a phase of initial data carried by a read signal; an accumulator operable to hold an acquired phase-correction value and to provide the acquired phase-correction value to a circuit coupled the accumulator operable to adjust samples of the data in response to the acquired phase-correction value, wherein the acquired phase-correction value corresponds to a difference between the phase of the sample and a phase of adjusted data carried by the read signal; a comparator coupled to the accumulator, operable to receive the reference phase-correction value and the acquired-phase correction value, and operable to generate an error signal that is related to a difference between the reference phase-correction value and acquired phase-correction value; and a filter coupled to the comparator and to the accumulator and operable to cause the acquired phase-correction value to have a predetermined relationship to the reference phase-correction value.