Patent ID: 8022524

Claim:
A semiconductor device comprising: a first wiring board having plural stacked insulating layers, an internal connection pad which is disposed on a side of an upper face of the plural stacked insulating layers, a semiconductor element mounting pad which is disposed on the side of the upper face of the plural stacked insulating layers, a test pad which is disposed on a side of a lower face of the plural stacked insulating layers, said test pad being only used for electrical inspection of the semiconductor device, and an external connection pad which is disposed on the side of the lower face of the plural stacked insulating layers; an external connection terminal, said external connection terminal being provided only on the external connection pad; a first wiring pattern which is disposed in the plural stacked insulating layers, and which electrically connects the internal connection pad with the test pad, and a second wiring pattern which electrically connects the semiconductor element mounting pad with the external connection pad; a second wiring board which is placed above the first wiring board, which is mounted on the internal connection pad, and which is electrically connected with the first wiring board; a semiconductor element which is mounted on the semiconductor element mounting pad; a mounting board, wherein said external connection terminal electrically connects the external connection pad to the mounting board; wherein the test pad is spaced a distance from the mounting board so as to permit access to the test pad disposed on the lower face of the plural stacked insulating layers, and such that said test pad is not electrically connected to said mounting board; and, wherein the external connection pad is placed on an inner side of the test pad.