Patent ID: 7830454

Claim:
A TV signal processor comprising: a plurality of reserve pins arranged in a manner to meet a specification, including a pin A 11 and a pin B 11 serving as SVHS input signal pins, a pin A 47 serving as a CVBS input signal pin, a pin A 61 and a pin B 56 serving as Audio input signal pins, and a pin B 49 and a pin B 50 serving as Audio output signal pins; at least one signal receiver, said at least one signal receiver being for receiving a respective TV signal; a signal amplifier electrically connected to said at least one signal receiver and adapted to receive and optimize said TV signal that is received by said at least one signal receiver; a signal processor electrically connected to said signal amplifier and adapted to receive and demodulate said TV signal that is received by said associating signal receiver; a decoder electrically connected to said signal processor and adapted to receive and decode said TV signal that is demodulated by said signal processor; a MINI-PCI interface electrically connected to said decoder and adapted to transmit said TV signal decoded by said decoder to a host for output.