Patent ID: 7817130

Claim:
A shift register circuit comprising a first shift register, a second shift register, and a third shift register, each of the three shift registers having an input end and an output end, each of the three shift registers comprising: a signal generating circuit comprising: a first switch for generating a first output signal according to a clock signal when the first switch is turned on; and a second switch coupled to the output end of the shift register, for generating a second output signal according to a clock signal when the second switch is turned on, and for transmitting the second output signal to the output end of the shift register; a drive circuit coupled to the first switch and the second switch of the signal generating circuit, for controlling the first switch and the second switch of the signal generating circuit according to an input signal received by the input end of the shift register; a reset circuit coupled to the signal generating circuit, for turning off the first switch and the second switch of the signal generating circuit and for resetting an output signal outputted by the output end; and a control switch coupled to the output end of the shift register, for resetting the output signal outputted by the output end.