Patent ID: 7928497

Claim:
A nonvolatile semiconductor memory comprising: at least one memory cell and one peripheral transistor disposed on a semiconductor substrate, the memory cell having: a first gate insulating film provided on a first element area of the semiconductor substrate, the first element area being defined by a first isolation insulating layer provided on the semiconductor substrate; a floating gate electrode provided on the first gate insulating film; a first intergate insulating film having a multilayer structure and provided on the floating gate electrode and the isolation insulating layer; and a control gate electrode provided on the first intergate insulating film, the peripheral transistor having: a second gate insulating film provided on a second element area of the semiconductor substrate, the second element area being defined by a second isolation insulating layer provided on the semiconductor substrate; a first gate electrode provided on the second gate insulating film; a second intergate insulating film having a multilayer structure and provided on the first gate electrode and the second isolation insulating layer; and a second gate electrode provided on the second intergate insulating film, wherein the first and the second intergate insulating films have the same multilayer structure, and a first insulating film serving as a lowermost layer of the first intergate insulating film contacting the first isolation insulating layer is thinner than a second insulating film serving as a lowermost layer of the second intergate insulating film contacting the second isolation insulating layer, and a thickness of the first intergate insulating film excluding the first insulating film is the same as a thickness of the second intergate insulating film excluding the second insulating film.