Patent ID: 7047332

Claim:
A data transfer control device for data transfer through a bus, comprising: a conversion circuit which converts K-bit width data transferred at a first frequency through a bus into data having an L-bit width (L>K) by rearranging; and a processing circuit which receives the L-bit width data from the conversion circuit and carries out a K-bit based process on an L-bit basis at a second frequency which is lower than the first frequency, the conversion circuit including: a data holding circuit which receives data having the K-bit width inputted at the first frequency and holds the data; a judging circuit which judges whether or not the data held in the data holding circuit is valid, by unit of a data cell configured of a plurality of bits; and a circuit which receives data of a data cell from the data holding circuit and outputs the data of a data cell that has been judged to be valid at the second frequency which is lower than the first frequency.