Patent ID: 8703616

Claim:
A method for semiconductor processing, comprising: a) selecting a desired mandrel critical dimension; b) selecting a desired degree of pitch multiplication n, wherein n≧4; c) forming a plurality of mandrels over a substrate; d) measuring a pitch of the mandrels, wherein an average pitch of the mandrels differs from the desired mandrel critical dimension by ΔC; e) selecting a first critical dimension of a first set of spacers based on the measured pitch of the mandrels, wherein the spacers have an average critical dimension of about t c1 , wherein t c1 is given by the formula: t c1 =F/n−ΔC wherein the first critical dimension of the first set of spacers adjusts a desired critical dimension of the first set of spacers to position centers of the first set of spacers substantially at a desired first pitch; f) forming the first set of spacers on sidewalls of the mandrels; g) removing the mandrels; h) selecting a second critical dimension of a second set of spacers based upon the first critical dimension, wherein the second critical dimension of the second set of spacers adjusts a desired critical dimension of the second set of spacers to position centers of the second set of spacers substantially at a desired second pitch; i) forming the second set of spacers on sidewalls of the first set of spacers; and j) removing the first set of spacers; wherein F is one-half the average pitch of the mandrels and wherein n is less than or equal to the maximum degree of pitch multiplication that can be obtained by repeating steps i) and j).