Patent ID: 8279572

Claim:
An electro-static discharge protection device fabricated on an integrated circuit, comprising: a first dielectric layer with more than one electrode formed therein; a second dielectric layer with more than one electrode formed therein located above the first dielectric layer; at least one via connects the more than one electrode in the first dielectric layer with the more than one electrode in the second dielectric layer; a gap formed through the first dielectric layer and the second dielectric layer, wherein the gap extends between two adjacent electrodes in both the first dielectric layer and the second dielectric layer, and wherein the gap comprises a main gap portion and a top gap portion thereover, the top gap portion being offset from the main gap portion; a hard mask dielectric layer located in the top gap portion near a top portion of the second dielectric layer, wherein the hard mask dielectric layer is disposed entirely within the gap; and a third dielectric layer disposed over the second dielectric layer, wherein the third dielectric layer hermetically seals the gap to provide electro-static discharge protection on the integrated circuit.