Patent ID: 7080128

Claim:
An information-processing apparatus comprising: two or more CPUs each used for issuing I/O instructions; a plurality of disk apparatus for storing data; a disk cache for storing a copy of at least a part of data stored in said disk apparatus, which is connected to said plurality of disk apparatus and said CPUs; an I/O processor for receiving the I/O instructions and controlling said disk apparatus and said disk cache, which is connected to said CPUs; said CPUs each having a function for issuing a request to said I/O processor to allocate a partial area of said disk cache; said I/O processor having a function to allocate a partial area of said disk cache as a communication buffer upon reception of a request to allocate said partial area; and a communication means used by any particular one of said CPUs to write data into said communication buffer and by any of said CPUs other than said particular CPU to fetch said data; wherein said communication mean comprises; a sub-means for forming a judgment as to whether or not data to be transferred has been stored in said communication buffer; a sub-means for letting any of said CPUs store data being transferred in said communication buffer if no data to be transferred has been stored in said communication buffer; a sub-means for letting any of said CPUs fetch data being transferred from said communication buffer if said data being transferred has been stored in said communication buffer; and a sub-means for clearing said communication buffer; wherein said communication buffer is a message queue comprising a plurality of slots; said slots are used sequentially in a round-robin manner, starting from the first one of said slots; and by storing the position of one of said slots, which has been just used, the position of the following one of said slots, which is to be subjected to next-availability verification, is determined univocally at a communication time.