Patent ID: 8417760

Claim:
A device for calculating a result of a multiplication addition operation between a first operand, a second operand, a third operand and a fourth operand, comprising: a calculator configured to calculate results of a plurality of Mult-Mod-Div- (MMD-) operations using the second operand, using portions of the first operand and using the fourth operand as a modulus to obtain the result of the multiplication addition operation, wherein each Mult-Mod-Div-operation of the plurality of Mult-Mod-Div-operations is configured: to receive, as an input, the fourth operand, a corresponding portion of the first operand and the second operand, to output, as a first result, a result of an integer division of a product of the corresponding portion of the first operand and the second operand by the fourth operand, and to output, as a second result, a result of a modular reduction of the product of the corresponding portion of the first operand and the second operand, where the fourth operand is a modulus of the modular reduction, and wherein the first and third operands are longer than the second operand or the fourth operand, and wherein the portions of the first operand are equal to or shorter than the fourth operand, and wherein the calculator comprises a hardware implementation.