Patent ID: 7600097

Claim:
A method for processing memory-access instructions in an object-addressed memory hierarchy, comprising: receiving at least one store instruction to be executed, wherein the store instruction specifies an object identifier (OID) and an offset; creating an entry in a store queue for the store instruction, wherein the entry includes a valid flag for the offset and a separate valid flag for the OID; when the offset for the store instruction becomes available, storing the offset into the entry and setting the valid flag for the offset; when the OID for the store instruction becomes available, storing the OID for the store instruction into the entry and setting the valid flag for the OID; and when a data value for the store instruction becomes available, storing the data value into a data field of the entry; receiving a load instruction to be executed, wherein the load instruction loads a data item from an object, and wherein the load instruction specifies an OID for the object and an offset for the data item within the object; comparing the OID and the offset for the load instruction against OIDs and offsets for outstanding store instructions in the store queue; and if the offset for the load instruction does not match any of the offsets for the outstanding store instructions in the store queue, and hence no read-after-write (RAW) hazard exists, performing a cache access to retrieve the data item for the load instruction.