Patent ID: 8354309

Claim:
A method of forming a semiconductor structure comprising: forming a high dielectric constant (high-k) gate dielectric layer comprising a dielectric material having a dielectric constant greater than 4.0 on a semiconductor substrate; forming a metal gate layer directly on a first portion of said high-k gate dielectric layer; patterning said metal gate layer; depositing at least one metal layer over a remaining portion of said metal gate layer and a second portion of said high-k gate dielectric layer; forming at least one dielectric metal oxide layer directly on said second portion of said high-k dielectric layer through oxidation of a portion of said at least one metal layer that is in direct contact with said second portion of said high-k dielectric layer, while not oxidizing another portion of said at least one metal layer overlying remaining portion of said metal gate layer; and forming a conductive gate material layer above said at least one metal layer and said at least one dielectric metal oxide layer.