Patent ID: 7804368

Claim:
A current-limited oscillator, comprising: a delay section that includes a plurality of series-connected inverters to delay an output pulse on the basis of an output of a constant-current generating circuit; at least one P-channel transistor that limits a first current between said inverters and a high potential power supply; and at least one N-channel transistor that limits a second current between said inverters and a low potential power supply, wherein at least one of said plurality of inverters is configured as a first inverter that is connected with said P-channel transistor and is not connected with said N-channel transistor, and at least another of said plurality of inverters is configured as a second inverter that is not connected with said P-channel transistor and is connected with said N-channel transistor, and said constant-current generating circuit generates a P-channel transistor current limiting level indication signal supplied to said P-channel transistor and an N-channel transistor current limiting level indication signal supplied to said N-channel transistor.