Patent ID: 7425498

Claim:
A method of fabricating a semiconductor device, comprising the step of: (a) providing an isolating insulation film deposited on a surface of a semiconductor substrate and extending in a first direction; (b) providing an active region extending in said first direction sectioned by said isolating insulation film; (c) providing a gate electrode such that a plurality thereof extend in parallel in a second direction across said active region, and also providing a dummy electrode at an end of said gate electrode; (d) providing a source region and a drain region in an exposed region of said active region; (e) providing said gate electrode and said dummy electrode on their respective side walls with first and second side wall insulation films, respectively, to fill a gap between said gate and dummy electrodes with said first and second side wall insulation films; (f) providing an interlayer insulation film to cover said surface of said semiconductor substrate including said gate and dummy electrodes; and (g) etching a region that is located between said gate electrode and another such gate electrode and extends in said second direction along said gate electrode to said dummy electrode, and filling an electrically conductive film therein to provide a first contact portion.