Patent ID: 8885406

Claim:
A memory device comprising: a plurality of nonvolatile memory sections each comprising a plurality of memory cells connected to word lines; and a control section configured to perform control of writing and reading data to and from the plurality of nonvolatile memory sections, wherein each of the plurality of memory cells is configured to record data of a plural number of bits, wherein each word line includes a group of pages having a number of pages equal to the plural number of bits, each page comprising memory cells connected to a same word line, and wherein for the plurality of nonvolatile memory sections, in a case where data is written into one of the nonvolatile memory sections, the data is written for each group of pages in sequence from a low-order page to a high-order page, and when the data is written into the low-order page, control is performed such that the data to be written into the low-order page is written into any area of the other of the nonvolatile memory sections at a same time.