Patent ID: 8901632

Claim:
A method of making a semiconductor structure using a substrate having a non-volatile memory (NVM) portion and a logic portion, comprising: forming a select gate over the substrate in the NVM portion and a first protection layer over the logic portion; forming a control gate and a charge storage layer over the substrate in the NVM portion, wherein a top surface of the control gate is lower than a top surface of the select gate and the charge storage layer is under the control gate, along adjacent sidewalls of the select gate and control gate, is partially over the top surface of the select gate; forming a second protection layer over the NVM portion and the logic portion; removing the second protection layer and the first protection layer from the logic portion leaving a portion of the second protection layer over the control gate and the select gate; forming a sacrificial gate stack over the logic portion comprising a gate dielectric of high k material and a sacrificial gate over the gate dielectric; forming a dielectric around the sacrificial gate; removing the sacrificial gate to leave an opening in the dielectric layer; forming a work function metal over the gate dielectric in the opening; and forming a metal gate over the work function metal in the opening.