Patent ID: 7880512

Claim:
An output driver circuit comprising: a driver circuit that includes: a first transistor connected to a first power supply, a second transistor connected to a second power supply, a third and a fourth transistor, and a fifth and a sixth transistor respectively connected in series between the first transistor and the second transistor, wherein differential input signals from a circuit in a preceding stage are input to gates of the third and sixth transistors and gates of the fourth and fifth transistors, respectively, and a node between the third and fourth transistors and a node between the fifth and sixth transistors form output terminals from which differential output signals are output; a replica circuit that includes: seventh and eighth transistors corresponding to the first and second transistors, respectively, ninth and tenth transistors corresponding to the third or fifth, and the fourth or sixth transistors, respectively, and a resistor corresponding to a termination resistor to be connected between the output terminals, wherein the seventh and ninth transistors, the resistor, and the tenth and eighth transistors are connected between the first and second power supplies, in that order, and the first power supply is input to gates of the ninth and tenth transistors; and wherein the output driver circuit further comprises: an operational amplifier that receives a first reference voltage and a voltage directly from a terminal of the ninth transistor which is directly connected to the resistor, and outputs a control signal to gates of the first and seventh transistors, wherein a second reference voltage is input to gates of the second and eighth transistors so as to form a current mirror circuit.