Patent ID: 7404251

Claim:
A process of copper plating a through-hole in a printed circuit board, the process comprising: providing a printed circuit board with at least two copper interconnect lines separated by an insulator in a vertical direction, and an external insulating layer covers an external surface of the at least two copper interconnect lines; providing a through-hole in the printed circuit board in the vertical direction such that the copper interconnect lines provide a copper land in the through-hole; applying a seed layer to an interior surface of the through-hole; removing an outermost portion of the seed layer from the interior surface of the through-hole with a laser; applying copper on the seed layer; and removing a portion of the external insulating layer about a circumferential region of the through-hole with a high power laser to the copper land prior to the applying of the seed layer, wherein a portion of an external surface of the at least two copper internal lines is exposed and the diameter of the removed portion of the external insulating layer is larger than the diameter of the through hole.