Patent ID: 8148230

Claim:
A method of making a non-volatile memory device, comprising: providing an insulating layer containing a plurality of openings in a device area; forming a first conductivity type semiconductor layer in the plurality of openings; forming a second conductivity type semiconductor layer, such that the second conductivity type semiconductor layer is formed in a peripheral area and over the first conductivity type semiconductor layer in the plurality of openings in the device area; masking the second conductivity type semiconductor layer in the peripheral area such that the second conductivity type semiconductor layer remains exposed in the device area; selectively etching the exposed second conductivity type semiconductor layer in the device area using an upper surface of the first conductivity type semiconductor layer as a stop to form a recess in the plurality of openings; forming a storage material layer, such that the storage material layer is located over the second conductivity type semiconductor layer in the peripheral area and over the first conductivity type semiconductor layer in the recessed plurality of openings; and planarizing the storage material layer to remove the storage material layer in the peripheral area, such that the storage material layer remains in the recessed plurality of openings to form storage elements of the non-volatile memory device.