Patent ID: 8659016

Claim:
A flat panel display device, comprising: a first substrate having disposed thereon: first and second conductive lines, the first conductive lines disposed to cross the second conductive lines, a plurality of pixels, each of the plurality of pixels having a first electrode and being defined by the first and second conductive lines, and a plurality of thin film transistors electrically coupled to the first electrodes to control signals supplied to the pixels, respectively; a second substrate having a second electrode formed thereon; and a liquid crystal layer disposed in a sealed space between the first and second electrodes, wherein each of the thin film transistors comprises: source and drain electrodes formed on the first substrate, one of the source and drain electrodes electrically coupled to one of the first and second conductive lines, and the other of the source and drain electrodes electrically coupled to the first electrode, an active layer formed of an oxide semiconductor and formed to at least partially overlap both the source and drain electrodes, a gate insulating layer formed on the first substrate to cover the active layer and the source and drain electrodes, a gate electrode formed on the gate insulating layer and insulated from the active layer by the gate insulating layer, the gate electrode electrically connected to the other of the first and second conductive lines, and an interfacial stability layer formed on at least one of top and bottom surfaces of the active layer, the interfacial stability layer being formed of an oxide having a band gap of 3.0 to 8.0 eV, wherein a portion of the interfacial stability layer is disposed between the source and drain electrodes and the active layer.