Patent ID: 8829996

Claim:
A differential input stage, comprising: a first input circuit, comprising: a first transistor having a first current terminal coupled to a first source node, having a second current terminal coupled to a first output node, and having a control terminal coupled to a first input node; and a second transistor having a first current terminal coupled to said first source node, having a second current terminal coupled to an intermediate node, and having a control terminal coupled to said first input node; a second input circuit, comprising: a third transistor having a first current terminal coupled to a second source node, having a second current terminal coupled to a second output node, and having a control terminal coupled to a second input node; and a fourth transistor having a first current terminal coupled to said second source node, having a second current terminal coupled to said intermediate node, and having a control terminal coupled to said second input node; a load circuit coupled between said first and second output nodes and a first supply node; and a bias circuit coupled to said first supply node and a second supply node that develops a first bias current at said first source node and that develops a second bias current to said second source node.