Patent ID: 7932551

Claim:
A nonvolatile memory device comprising: a semiconductor substrate of a first conductivity type including first and second fins; a buried insulating layer filled between the first and second fins; a common bit line electrode connecting one end of the first fin to one end of the second fin; a plurality of control gate electrodes covering the first and second fins and expanding across a top surface of each of the first and second fins; a first string selection gate electrode, between the common bit line electrode and the plurality of control gate electrodes, covering the first and second fins and expanding across the top surface of each of the first and second fins; and a second string selection gate electrode, between the first string selection gate electrode and the plurality of control gate electrodes, covering the first and second fins and expanding across the top surface of each of the first and second fins, wherein a portion of the first fin under the first string selection gate electrode and a portion of the second fin under the second string selection gate electrode have a second conductivity type opposite to the first conductivity type.