Patent ID: 7479693

Claim:
A power semiconductor device, comprising: a first substrate having a first circuit pattern formed thereon with a first center line extending along a predetermined transverse direction; a second substrate having a second circuit pattern formed thereon, the second circuit pattern opposing the first circuit pattern of said first substrate; at least one power semiconductor chip mounted on the first circuit pattern of said first substrate, the power semiconductor chip having at least one chip electrode opposing the second circuit pattern of said second substrate; and a plurality of first conductive connectors in contact with the first circuit pattern of said first substrate and the second circuit pattern of said second substrate for electrically connecting the first circuit pattern and the second circuit pattern to each other; wherein said first conductive connectors are arranged symmetrically relative to the first center line of said first substrate, and wherein at least one of said first conductive connectors is arranged on the first circuit pattern on which said power semiconductor chip is mounted, so that substantial heat generated from said power semiconductor chip is dissipated to the second circuit via the first circuit pattern and said at least one of said first conductive connectors.