Patent ID: 7313140

Claim:
A method for assembling received data segments into full packets in an initial processing stage in a processor, the method comprising: receiving a plurality of data segments from a packet; determining a first storage location for each of the plurality of data segments; storing each of the plurality of data segments in its determined first storage location; determining a second storage location for each of the plurality of data segments, said second storage locations being logically ordered to represent the order the data segments originally occurred in the packet, said determining a second storage location operation comprising: obtaining a processing thread from a thread freelist; indicating that the obtained processing thread is unavailable; associating the processing thread with a status unique to the data segment; sending the associated processing thread and unique status to request the second storage location; and receiving the second storage location for the data segment; storing each of the plurality of data segments in its determined second storage location to reassemble the packet such that the data segments from the packet are stored in the order in which they were in the packet; releasing the first storage location associated with each data segment after storing the data segment in its determined second storage location; and upon storing an end of packet data segment from the packet in its determined second storage location, passing control of the plurality of related data segments to a next processing stage in the processor.