Patent ID: 8324954

Claim:
A circuit comprising: an input circuit including a pair of input field effect transistors (FETs) of a first polarity, said input circuit receiving a differential input signal and connected between a first supply voltage and a pair of output nodes, said differential input signal varying between an input high level and an input low level, said varying dependent upon a bias voltage; and a reference voltage generator for receiving said bias voltage and generating a variable reference voltage; a load chain circuit including a pair of cross-coupled load chain FETs of a second polarity, respective gates of said pair of cross-coupled load chain FETs connected to respective nodes of said pair of output nodes, said load chain circuit receiving said variable reference voltage and including a pair of regulated current sources, said pair of regulated current sources regulated by said variable reference voltage thereby coordinating a strength of said current sources with a strength of said input circuit, a pair of feedback elements, each feedback element of said pair of feedback elements associated with a respective one of said pair of cross-coupled load chain FETs, said each feedback element configured to: produce a feedback signal indicative of a state of a respective one of said pair of output nodes; and provide said feedback signal to a respective one of said pair of regulated current sources; and said load chain circuit connected directly between a second supply voltage and said pair of output nodes such that an output signal at said output nodes varies between an output high level and an output low level.