Patent ID: 6930354

Claim:
A semiconductor device comprising: a MISFET formed in a chip region of a semiconductor substrate and having a gate portion comprised of a first conductor, a source portion and a drain portion; a gate electrode which is electrically connected with said gate portion and is comprised of a second conductor having a resistivity lower than said first conductor; a source electrode which is electrically connected with said source portion and is comprised of said second conductor; and bump electrodes formed over said gate electrode and said source electrode, respectively, wherein said gate electrode and said source electrode are formed in a same layer; said source electrode has plural regions; said gate electrode has a first portion and a second portion connected with said first portion; said first portion of the gate electrode is formed along a periphery of said chip region; said second portion of the gate electrode is formed in an area which is surrounded by said first portion of the gate electrode; said second portion of the gate electrode is formed between said plural regions of source electrode; and said bump electrodes are formed over each region of said source electrode.