Patent ID: 8664969

Claim:
An apparatus for implementing electrical connectivity for testing of a semiconductor device, comprising: a probe head which comprises an upper guide plate and a lower guide plate, wherein the upper guide plate defines a plurality of first apertures, and the lower guide plate defines a plurality of second apertures; and a plurality of probes, wherein each of the plurality of probes passes through one of the plurality of first apertures on the upper guide plate and one of the plurality of second apertures on the lower guide plate, and at least one of the plurality of probes defines a buckled form after the at least one of the plurality of probes is finally assembled in the apparatus; and wherein a portion of at least one of the plurality of probes is fixedly or rotatably secured to the upper guide plate to allow the at least one of the plurality of probes to exhibit vertical movement, deflection, or motion when the at least one of the plurality of probes is driven to make contact with a corresponding bond pad on the semiconductor device without exhibiting lateral motion or movement so that a tip of the at least one of the plurality of probes scrubs against the corresponding bond pad.