Patent ID: 7333559

Claim:
A digital predistortion apparatus for predistorting an input digital signal to compensate for memoryless and memory non-linearities of a wideband power amplifier, comprising: a first predistorter for receiving the digital signal, the first predistorter being connected to the power amplifier through a digital to analog converter (DAC) and a frequency upconverter and including a first memoryless non-linearity part comprising a first look-up table (LUT) for compensating for the memoryless non-linearity and a first memory non-linearity part comprising a first finite impulse response (FIR) filter for compensating for the memory non-linearity; and a second predistorter for receiving an feedback signal from the power amplifier through a frequency downconverter and an analog to digital converter (ADC), the second predistorter including a second memoryless non-linearity part comprising a second LUT having the same values as the first LUT for compensating for the memoryless non-linearity and a second memory non-linearity part comprising a second FIR filter comprising the same filtering coefficients as the first FIR filter for compensating for the memory non-linearity, wherein the first predistorter directly updates the first LUT and the second predistorter indirectly updates the first FIR filter using the second FIR filter.