Patent ID: 8335115

Claim:
A semiconductor memory module comprising: a memory module board comprising at least one semiconductor memory device, wherein the at least one semiconductor memory device comprises: a data input buffer for receiving data via a first input terminal and receiving a first reference voltage via a second input terminal; a command/address input buffer for receiving a command/address signal via a first input terminal and receiving a second reference voltage via a second input terminal; and a first termination resistor unit connected to the first input terminal of the data input buffer; an advanced memory buffer (AMB) for receiving the data and the command/address signal from a host and providing the data and the command/address signal to the at least one semiconductor memory device; and a second termination resistor unit located on the memory module board and electrically connected to the AMB, wherein the first termination resistor unit comprises a first resistor connected between a first voltage source and the first input terminal of the data input buffer, the first termination resistor unit for applying a first voltage from the first voltage source to the first input terminal of the data input buffer, and the second termination resistor unit comprises a second resistor connected between a second voltage source and the first input terminal of the command/address input buffer, and a third resistor connected between a third voltage source and the first input terminal of the command/address input buffer, the second voltage source supplying a second voltage and the third voltage source supplying a third voltage.