Patent ID: 7163866

Claim:
A method for fabricating a thin film silicon-on-insulator semiconductor device which comprises: providing a structure having a layer of semiconductor material, a buried insulation layer located above the layer of semiconductor material, a semiconductor SOI layer of a first conductivity type above the buried insulating layer, gate insulating layer located above selected portions of the semiconductor SOI layer, a gate conductor located above the gate insulating layer, shallow source and drain extensions of a second conductivity type opposite from the conductivity type of the semiconductor SOI layer; implanting indium ions at a dosage of about 5E13 to about 1.5E14 at an energy level of about 60 to about 125 Kev and an angle α of about 0° to about 45°, and then annealing the structure at a temperature of about 900° C. to about 1025° C. for about 6 to about 25 seconds to provide a pocket halo implant of indium beneath the gate and in a channel region of the semiconductor SOI layer; and providing source and drain regions of the second conductivity type.