Patent ID: 6844590

Claim:
A semiconductor device comprising: a semiconductor substrate having a major surface including first and second regions and a boundary area formed between the first and second regions in contact therewith; a first gate insulating film formed on the major surface in the first region; a first gate electrode formed on the first gate insulating film; a pair of first diffusion layers formed in the major surface to sandwich the first gate electrode; a second gate insulating film formed on the major surface in the second region, the second gate insulating film having a film material or a film thickness different from that of the first gate insulating film; a second gate electrode formed on the second gate insulating film; a pair of second diffusion layers formed in the major surface to sandwich the second gate electrode; and a device isolation region formed in the boundary area, the device isolation region including a trench formed in the major surface and an insulating layer having a portion buried in the trench and a portion projecting upward from the major surface, and a bottom of the trench having depths different with portions, wherein said first and second gate insulating films each have a film thickness difference of 5 to 50 nm, and the bottom of the trench has a height difference of 5 to 50 nm between end portions on sides of the first and second regions.