Patent ID: 6922665

Claim:
A computer-implemented method for simulating a circuit design for a programmable logic device (PLD), the PLD including two or more types of configurable elements, comprising: (a) reading a configuration bitstream; (b) constructing objects in a computer memory, each object corresponding to a configurable element of the PLD as configured in the configuration bitstream, and each object having associated therewith an output signal state and one or more input signal states; (c) generating events in response to signal values in the configuration bitstream, each event including an object identifier, an input signal identifier, and an input signal state; (d) for each event, updating the output signal state and an input signal state of a corresponding object in response to the input signal state of the event and type of configurable element; (e) performing steps (f)-(g) if processing an event changes the output signal state of an object; (f) finding the configurable elements that are connected to the output signal; and (g) generating events for the objects corresponding to the configurable elements from step (f).