Patent ID: 8751555

Claim:
A method for performing a decimal floating-point division operation using a decimal floating-point divider circuit, the method comprising: receiving, by the decimal floating-point divider circuit, a decimal floating-point dividend and a decimal floating-point divisor; obtaining, by the decimal floating-point divider circuit, a preliminary quotient having a first precision level and calculated from the decimal floating-point dividend and the decimal-floating point divisor by: obtaining an estimated reciprocal of the decimal floating-point divisor, wherein the estimated reciprocal has a second precision level; and obtaining a reciprocal of the decimal floating-point divisor by performing a number of Newton-Raphson iterations on the estimated reciprocal, wherein the reciprocal has a third precision level that is greater than or equal to the first precision level, and wherein the third precision level depends on the second precision level and the number of Newton-Raphson iterations; receiving, by the decimal floating-point divider circuit, a rounding mode; selecting a rounding action based on the preliminary quotient and the rounding mode; and obtaining a rounded quotient having a fourth precision level by rounding the preliminary quotient according to the rounding action, wherein the first precision level is at least one digit greater than the fourth precision level.