Patent ID: 7697571

Claim:
A system for performing a data synchronization procedure, comprising: a demultiplexer that recovers elementary bitstreams, and separately extracts decode timestamps and output timestamps from said elementary bitstreams, said elementary bitstreams being stored into an input buffer; one or more decoders that decode said elementary bitstreams to produce decoded frames that are stored into an output buffer; an input controller that synchronizes said one or more decoders to said decode timestamps to read said elementary bitstreams from said input buffer without varying from said decode timestamps; one or more output modules that process said decoded frames to produce processed frames; and an output controller that controls said one or more output modules to read said decoded frames from said output buffer in an output timing resynchronization procedure that resynchronizes output frame timings of said processed frames to a new series of said output timestamps that are generated after a data change in said elementary bitstreams.