Patent ID: 8159379

Claim:
A switched capacitor array circuitry for fast waveform digitizing, comprising: a number of channels each having a number n of sampling cells; a domino wave circuit connected to said sampling cells and generating a domino wave as a write signal for said sampling cells, said domino wave circuit having a series of n double inverters for generating the write signal for each of said sampling cells, each of said sampling cells receiving and storing a snapshot of a waveform when a respective one of said sampling cells is in turn according to a respective write signal; a stop circuit for receiving one of an external trigger signal and an internal trigger signal to disempower the domino wave after one of an external delay and an internal delay for a predetermined amount of time and to generate a stop position pulse; a register being preset with a position of the domino wave at the stop position pulse and being read out in one of a serial way and a parallel way for reading a stop position when the domino wave was disempowered; a readout circuit for consecutively reading out a sampled signal in a predetermined number of said sampling cells, thereby starting a readout at said sampling cell corresponding to the stop position; said series of double inverters including: an NMOS transistor operating as a voltage controlled resistor; a first inverter being an AND gate having an input receiving a disenable signal; and a second inverter, said first inverter is connected via said NMOS transistor to said second inverter, thereby forming with a parasitic capacitance of said second inverter a RC-circuit.