Patent ID: 7796060

Claim:
An interpolation circuit comprising: a first voltage-current converter circuit including a first transistor and a second transistor that each have an electrode that is configured to receive an input signal; a second voltage-current converter circuit including a third transistor and a fourth transistor that each have an electrode configured to receive the input signal; a reference circuit; a first error correction circuit that is coupled to the reference circuit and to the first voltage-current converter, wherein the first error correction circuit has a first impedance that sets a first current to operate the first voltage-converter circuit in a nominal linear operating mode so as to reduce a first integral nonlinearity error; and a second error correction circuit that is coupled to the reference circuit and to the second voltage-current converter, wherein the second error correction circuit has a second impedance that sets a second current to operate the second voltage-converter circuit in the nominal linear operating mode so as to reduce a second integral nonlinearity error.