Patent ID: 8164094

Claim:
A fabricating method of a pixel structure, comprising: providing a substrate, having a plurality of pixel areas arranged in an array; forming a scan line and a gate electrode in each of the pixel areas; forming a gate insulation layer, covering the scan line and the gate electrode; forming a semiconductor layer on the gate insulation layer above the gate electrode; forming a data line, a source, and a drain in each of the pixel areas, the source and the drain being formed on two sides of the semiconductor layer; forming a first passivation layer on the substrate, the first passivation layer covering the data line, the source, and the drain; forming a common line on the first passivation layer, the common line overlapping with at least a portion of the data line; forming a common electrode on the common line, the common electrode being electrically connected with the common line; forming a second passivation layer, covering the common electrode and the common line; forming a contact window in the second passivation layer above the drain, the contact window exposing the drain; and forming a pixel electrode in each of the pixel areas, the pixel electrode being electrically connected with the drain through the contact window.