Patent ID: 8539405

Claim:
A computer-implemented method for implementing a design, comprising: using at least one processor to perform a process, the process comprising: performing a top-down implementation of a design which implements the design at a higher level of abstraction that comprises at least one block representing at least a part of the design at a lower level of abstraction and is capable of being refined into a detailed design; refining the design implemented at the higher level into lower levels of abstraction, wherein a higher abstraction version of the design is refined with corresponding detailed design encodings at a lower abstraction version of the design, and the at least one block is implemented at the higher level to include no actual design details at the lower level but captures all possible behavior manifest of the actual design details at the lower level; and verifying one or more properties at some or all of different abstraction levels of the design, wherein a property verified at first abstraction level of the design will remain true at a second abstraction level of the design.