Patent ID: 7276758

Claim:
A non-volatile memory comprising: a silicon substrate having a drain, a source and a device separation film; a floating gate formed on the silicon substrate; a pair of opposing tunnel oxide films interposed between the silicon substrate and opposing lateral ends of the floating gate, one tunnel oxide film interposed between the drain and only one lateral end of the floating gate, the other tunnel oxide film Interposed between the source and the other lateral end of the floating gate; a ferroelectric substance interposed between the silicon substrate and the floating gate and between the tunnel oxide films; a diffusion barrier film encasing completely around the ferroelectric substance; a control gate formed on the substrate including the floating gate; a gate oxide film formed below the control gate; spacers formed on both lateral walls of the laminated floating gate and control gate including the tunnel oxide film and gate oxide film, respectively; and the source/drain formed within the substrate surfaces on both sides of the control gate including the spacers, respectively.