Patent ID: 7227205

Claim:
A semiconducting device comprising: a substrate comprising a strained semiconducting layer atop a strain inducing layer, wherein said strain inducing layer produces a biaxial tensile strain in said strained semiconducting layer; at least one gate region including a gate conductor atop a device channel portion of said strained semiconducting layer, said device channel portion separating source and drain regions adjacent said at least one gate conductor; and a strain inducing liner positioned on said at least one gate region, wherein said strain inducing liner produces a uniaxial compressive strain to a device channel portion of said strained semiconducting layer underlying said at least one gate region, wherein the device channel portion of said strained semiconducting layer has an uniaxial compressive strain in a direction parallel to the length of said device channel portion, which is produced by the compressive strain inducing liner in conjunction with the biaxial tensile strained semiconducting layer and which ranges from about 100 MPa to about 2000 MPa.