Patent ID: 8077069

Claim:
An apparatus comprising: a first track and hold stage configured to track and store an input voltage for a sample of an analog input signal; a first coarse reference ladder including a plurality of first unit resistors and a plurality of first taps to provide a plurality of coarse references; a second coarse reference ladder including a plurality of second unit resistors and a plurality of second taps to provide the plurality of coarse references, wherein the plurality of first unit resistors are of a higher impedance than the plurality of second unit resistors; a coarse analog-to-digital converter (ADC) configured to receive the input voltage from the first track and hold stage and the plurality of coarse references, the coarse ADC configured to perform a first comparison of the input voltage and the plurality of coarse references and output a coarse output based on the first comparison; a switch matrix including a plurality of switches, the switch matrix configured to close a switch based on the coarse output, the switch corresponding to a coarse reference; a second track and hold stage configured to track and store the input voltage; a fine reference ladder configured to receive the coarse reference and provide a plurality of fine references determined based on the coarse reference; a fine ADC configured to receive the input voltage from the second track and hold stage and the plurality of fine references, wherein the fine ADC is configured perform a second comparison of the input voltage and the plurality of fine references and output a fine output based on the second comparison; and logic configured to output a output for the sample of the analog input signal based on the coarse output and the fine output.