Patent ID: 8390323

Claim:
A hybrid-nanoscale/microscale device comprising: a microscale layer that includes microscale and/or submicroscale circuit components and that provides an array of microscale or submicroscale pins across an interface surface; and at least two nanoscale-layer sub-layers within a nanoscale layer that interfaces to the microscale layer, each nanoscale-layer sub-layer containing regularly spaced, parallel nanowires, each nanowire of the at least two nanoscale-layer sub-layers in electrical contact with at most one pin provided by the microscale layer, the parallel nanowires of successive nanoscale-layer sub-layers having different directions, with the nanowires of successive nanoscale-layer sub-layers intersecting to form programmable crosspoints; wherein a programmable crosspoint of the nanoscale layer persistently stores one of two Boolean values corresponding to two different resistance states of the programmable crosspoint; and wherein signals applied to the submicroscale pins by microscale or submicroscale circuitry within the microscale layer control computational operations carried out on programmable crosspoints within the nanoscale layer.