Patent ID: 7366300

Claim:
A DES cryptography engine for performing cryptographic operations on a data block, the cryptography engine comprising: a key scheduler configured to provide keys for cryptographic operations; eight bit-slice modules, each bit-slice module including: first circuitry configured to perform an exclusive OR (XOR) on a first bit sequence and a portion of a key provided by the key scheduler to generate a second bit sequence; a DES substitution box (SBox) configured to transform the second bit sequence into a third bit sequence; second circuitry configured to perform an exclusive OR (XOR) on the third bit sequence and a left portion of an input bit sequence for the current cryptographic round to generate a fourth bit sequence, wherein the fourth bit sequence is a right portion of an output bit sequence and a right portion of the input bit sequence is a left portion of the output bit sequence of a current DES round for the bit slice module; permutation logic configured to receive the fourth bit sequence from each of the eight bit-slice modules and to perform a permutation on the received fourth bit sequences; and expansion logic configured to generate a set of first bit sequences by expanding received bit sequences and to provide a first bit sequence to each bit slice module.