Patent ID: 7480025

Claim:
An array substrate for a liquid crystal display device, the array substrate comprising: a gate line; common lines parallel to the gate line, the gate line disposed between the common lines; a data line crossing the gate line and the common lines to define a pixel region, the pixel region divided into first and second regions by the gate line; a thin film transistor at a crossing portion of the gate and data lines, the thin film transistor comprising: a gate electrode formed along a portion of the gate line and defined by an expanded area having a width greater than a width of the gate line; a semiconductor layer on the gate electrode; and source and drain electrodes on the semiconductor layer, the drain electrode crossing the entire expanded area of the gate electrode such that an area of overlap between the drain electrode and the expanded area remains constant for a predetermined change in placement of the drain electrode relative to the gate electrode; a pixel electrode in each of the first and second regions, the pixel electrodes connected to the drain electrode; and a common electrode in each of the first and second regions, the common electrode connected to the common line in each of the first and second regions, wherein the common electrode includes patterns parallel to the data line, and the pixel electrode includes patterns parallel to the data line, wherein the patterns of the common electrode alternate with the patterns of the pixel electrode, wherein the source and drain electrodes extend in the same direction.