Patent ID: 7737524

Claim:
A lateral thin-film Silicon-On-Insulator (SOI) device comprising a semiconductor substrate, a buried insulating layer on said substrate, and a lateral MOS transistor device in an SOI layer on said buried insulating layer and having a source region of a first type conductivity formed in a body region of a second type conductivity, a lateral drift region of a second type conductivity adjacent said body region, a drain region of said first type conductivity and laterally spaced apart from said body region, a gate electrode insulated from said body region and drift region by an insulation region, an insulation layer on and laterally adjacent to the gate electrode, and a field plate on the insulation layer and separated from the gate electrode and the drain extension region by the insulation layer, the field plate being connected either to said source region or said gate electrode and extending substantially over said lateral drift region, wherein said field plate comprises a first layer of plural metallic regions which are isolated laterally and spaced apart from one another, and wherein the lateral drift region includes dopants arranged with a lateral doping gradient.