Patent ID: 7833854

Claim:
A method of fabricating a semiconductor structure comprising: providing a substrate comprising an upper semiconductor material of a first crystallographic orientation and a lower semiconductor material of a second crystallographic orientation separated by a buried insulating layer, said first crystallographic orientation is different from said second crystallographic orientation; protecting a portion of said substrate to define a first semiconductor region, while leaving another portion of the substrate unprotected and defining a second semiconductor region; first etching said unprotected portion of the substrate to expose a surface of said buried insulating layer utilizing a first mask that defines an active area within the second semiconductor region; second etching said exposed surface of said buried insulating layer to expose said lower semiconductor material utilizing a second mask that has at least one opening that provides a window that is smaller in size than the active area; and growing a semiconductor material within said second semiconductor region on said exposed lower semiconductor material, said regrown semiconductor material having said second crystallographic orientation, wherein during initial stages of said growing process a counter-doped region is formed within said at least one opening.