Patent ID: 7368062

Claim:
A method for making an active-passive butt-joint structure for reduced parasitic capacitance comprising: providing a III-V semiconductor compound substrate; growing an active structure comprised of an active region and two separate confinement heterostructure layers over said substrate; applying a mask to protect a portion of said active structure; etching away an unprotected portion of said active structure and an underlying portion of said III-V semiconductor compound substrate to produce an exposed surface on said II-V semiconductor compound substrate; growing a first undoped III-V semiconductor compound layer over an unprotected portion of said III-V semiconductor compound substrate; growing a passive waveguide core having a quaternary composition over said first undoped III-V semiconductor compound layer; growing a second undoped III-V semiconductor compound layer over said passive waveguide core; and forming a III-V semiconductor compound cladding layer over said active structure and said second undoped III-V semiconductor compound layer.