Patent ID: 7944745

Claim:
A method of programming a single bit in a memory cell of a flash memory array, the method comprising: providing a flash memory array comprising a plurality of memory cells organized in a matrix of rows and columns, each of the memory cells comprising: a floating gate memory transistor; a program terminal electrically connected to the memory transistor; a coupling capacitor electrically connected to the memory transistor; and a capacitor terminal electrically connected to the coupling capacitor; wherein a plurality of word lines are each electrically connected to the coupling capacitor in each of the memory cells in a respective row, and a first set of bit lines are each electrically connected to the memory transistor in each of the memory cells in a respective column; wherein a plurality of high voltage access transistors are each electrically connected to a bit line in the first set of bit lines, and a control terminal is electrically connected to each access transistor; wherein a second set of bit lines are each electrically connected to the program terminal in each of the memory cells in a respective column; applying a first voltage to the capacitor terminal of the memory cell to be programmed; grounding the program terminal of the memory cell to be programmed; grounding the control terminal of the access transistor connected to a bit line, in the first set of bit lines, connected to the memory transistor of the memory cell to be programmed; applying a second voltage to program terminals not connected to the memory cell to be programmed, the second voltage being less than the first voltage; and grounding capacitor terminals not connected to the memory cell to be programmed.