Patent ID: 7543130

Claim:
A digital signal processor comprising: a data storage for temporarily storing audio data sampled at a first frequency, wherein the data storage is divided into a plurality of sub-areas that are respectively designated by addresses in access operations on the data storage; a program memory for storing a program including a plurality of instructions, at least one of the plurality of instructions including an address required for accessing the data storage; a program counter, responsive to a program counter clock having a second frequency, for sequentially providing addresses to the program memory to sequentially address the plurality of instructions in the program memory at a rate defined by the program counter clock, the second frequency being a multiple of the first frequency; an operation circuit for performing calculations on the audio data that are read from the data storage, in accordance with the addressed instructions of the program memory; a write circuit; and a non-access detector coupled to the program memory for making a determination as to whether the addressed instruction includes an address required for accessing the data storage, and upon determining that the addressed instruction does not include an address required for accessing the data storage, providing a non-access signal to the write circuit to cause the write circuit to compulsorily write a logic “0” into one of the plurality of sub-areas, the non-access detector making the determination upon the occurrence of each program counter clock.