Patent ID: 7564273

Claim:
A network for performing an analog circuit function comprising: a first switched-capacitor network having an input terminal to receive an input voltage and a plurality of switches, each switch having a respective threshold voltage and in communication with one of a high-limit voltage, a low-limit voltage, and electrical ground; a comparator having a comparator output terminal, a first comparator input terminal, and a second comparator input terminal, the first comparator input terminal in communication with the first switched-capacitor network and configured to receive a node voltage therefrom during a first phase for sampling of the input voltage, the second comparator input terminal configured to receive one of the high-limit voltage and the low-limit voltage, the comparator providing a first voltage or a second voltage at the comparator output terminal according to whether a voltage at the first comparator input terminal exceeds a voltage at the second comparator input terminal; a voltage-offset network in communication with the first comparator input terminal, the voltage-offset network providing a voltage shift at the first comparator input terminal setting an input reference level at a mid-level voltage with respect to the high-limit and low-limit voltages; a first controllable current source coupled to a network output terminal and having a control terminal coupled to the comparator output terminal, the first controllable current source supplying a current during a second phase to sweep a network output voltage toward one of the high-limit and low-limit voltages; a second switched-capacitor network coupled at one end to the first comparator input terminal and at another end to the network output terminal; a reset circuit coupled to the network output terminal and charging the second switched-capacitor network to the other one of the high-limit voltage and the low-limit voltage between the first phase and the second phase; and a second controllable current source having a control terminal in communication with the network output terminal and supplying a current to compensate for a voltage error generated by a finite delay in a response of the comparator.