Patent ID: 7838885

Claim:
A thin film transistor, comprising: a substrate; a semiconductor layer disposed on the substrate, the semiconductor layer including a channel region and source and drain regions, and the semiconductor layer being crystallized using a crystallization-inducing metal; a gate electrode disposed to correspond to a predetermined region of the semiconductor layer; a gate insulating layer disposed between the gate electrode and the semiconductor layer to insulate the semiconductor layer from the gate electrode; source and drain electrodes respectively electrically connected to the source and drain regions of the semiconductor layer a metal other than the crystallization-inducing metal or a silicide of a metal other than the crystallization-inducing metal disposed at a predetermined depth from a surface of the semiconductor layer in a region spaced apart from the channel region in the semiconductor layer, and a length and a width of the channel region of the semiconductor layer and a leakage current of the semiconductor layer satisfy the following equation: I off/ W =(3.4E-15)* L 2 +(2.4E-12)* L+c, wherein Ioff (A) is the leakage current of the semiconductor layer, W (mm) is the width of the channel region, L (μm) is the length of the channel region, and “c” is a constant ranging from 2.5E-13 to 6.8E-13.