Patent ID: 7343254

Claim:
A resolver digital converter comprising: an excitation signal generation pan for generating an excitation signal; a resolver for receiving the excitation signal generated in the excitation signal generation part and generating resolver signals; a resolver digital conversion pan for receiving the resolver signals outputted from the resolver, and detecting a failure of the resolver or the resolver digital conversion part; and a microcomputer having an A/D converter for converting the resolver signals outputted from the resolver into a digital value; wherein, based on the digital value outputted from the A/D converter, the microcomputer approximates a locus in which amplitude of a sine component signal among the resolver signals outputted from the resolver is plotted as the ordinate axis and amplitude of a cosine component signal is plotted as the abscissa axis by a regular n-sided polygon, wherein n is multiples of 4, and detects the failure of the resolver or the resolver digital conversion part such that when said locus matches with sides of the approximated regular n-sided polygon, it is determined that the resolver or the resolver digital conversion part is in a normal state and when the locus does not match, it is determined that the resolver or the resolver digital conversion part is in a failure state.