Patent ID: 7381597

Claim:
A method for fabricating a thin film transistor, comprising: forming four thin films on a substrate successively, the four thin films comprise a first conductive layer, a first insulation layer, a semiconductor layer, and a metal-containing sacrificial layer from bottom to top; performing an etching process to pattern the four thin films simultaneously so as to form a gate electrode through the first conductive layer; forming a second insulation layer on the surfaces of the substrate and the metal-containing sacrificial layer; performing a lift-off process to the metal-containing sacrificial layer to remove the metal-containing sacrificial layer and a portion of the second insulation layer positioned above the metal-containing sacrificial layer simultaneously; forming a second conductive layer on the surface of the substrate, the second conductive layer covering the semiconductor layer; and patterning the second conductive layer so as to form a source and a drain on the semiconductor layer.