Patent ID: 7923978

Claim:
A regulator circuit, comprising: a first MOS transistor, whose source is connected to a first power supply line, whose drain is connected to an output terminal; a second MOS transistor of a conductivity type identical to the first MOS transistor, whose source and gate are respectively connected to the source and gate of the first MOS transistor; first and second resistor elements connected in series between the output terminal and a second power supply line; a third resistor element connected between a drain of the second MOS transistor and the second power supply line; an amplifier which controls the first and the second MOS transistors based on a difference between potential of the connection point of the first and the second resistor elements and a reference potential, so that output potential of the output terminal is constant; and a first comparator which compares a first potential difference between two ends of the third resistor element and a second potential difference between a connection point of the first and the second resistor elements and the second power supply line, and in cases in which an absolute value of the first potential difference is larger than an absolute value of the second potential difference, controls the first MOS transistor so as to limit a value of a load current, wherein the first comparator is configured such that a MOS transistor at a differential amplifier input stage is of a conductivity type opposite to the first MOS transistor, and the outputs of the amplifier and first comparator are connected together.