Patent ID: 7716539

Claim:
A serial communication control system comprising: a first microcomputer; and a second microcomputer connected to the first microcomputer through a serial line, wherein the second microcomputer includes an R/B signal sending section to send one of a READY signal indicative of a data-receivable state and a BUSY signal indicative of a data-non-receivable state to the first microcomputer, the first microcomputer includes an R/B signal receiving section to receive the READY signal or the BUSY signal sent from the R/B signal sending section, and a first sending section to send first serial data to the second microcomputer when the R/B signal receiving section receives the READY signal, the second microcomputer includes a first receiving section to receive the first serial data sent from the first sending section, and a second sending section to send second serial data to the first microcomputer after the receiving operation of the first serial data by the first receiving section is completed and the R/B signal sending section thereafter sends the BUSY signal to the first microcomputer, the first microcomputer includes a second receiving section to receive the second serial data sent from the second sending section, and a reset signal sending section to send a reset signal to the second microcomputer, the second microcomputer includes a reset signal receiving section to receive the reset signal sent from the reset signal sending section, the R/B signal sending section sends the READY signal to the first microcomputer when the second microcomputer is brought into the data-receivable state after the reset signal receiving section receives the reset signal, the first microcomputer includes a first error detecting section to detect a communication error based on whether the R/B signal receiving section receives the BUSY signal within a preset first time period after the sending operation of the first serial data by the first sending section is completed, and a second error detecting section to detect a communication error based on whether the second receiving section receives the second serial data from the second microcomputer within a preset second time period after the R/B signal receiving section receives the BUSY signal, the second microcomputer includes a communication error detecting section to detect a communication error based on a transmission rate of serial data sent from the first microcomputer and/or a parity added to the serial data sent from the first microcomputer, the R/B signal sending section sends the BUSY signal to the first microcomputer during a preset third time period when the communication error detecting section detects a communication error, and the first microcomputer includes a determining section to determine that a communication error is generated when a time length of the BUSY signal sent from the R/B signal sending section to the R/B signal receiving section is equal to the preset third time period.