Patent ID: 6914833

Claim:
An electronic circuit for self-repair of a random access memory array, comprising: a write selector circuit associated with each slice array, wherein the random access memory is organized into a plurality of slice arrays, wherein each slice array comprises at least one memory storage cell, and wherein at least one of the slice arrays is redundant; a read selector circuit associated with each slice array; a remap selector circuit associated with each slice array; and a remap register associated with each slice array, wherein when power is applied to the circuit, the circuit automatically performs a self-test, wherein when the self-test detects a defect, the remap register of the slice array having the defect is set to indicate the presence of the defect resulting in the associated remap selector circuit instructing the associated write selector circuit to redirect data intended for storage in that slice array to an adjacent slice array and instructing the associated read selector circuit to redirect data read from the adjacent slice array to the output of the defective slice array, wherein the remap selector circuit associated with each slice array comprises an OR-gate, wherein the OR-gate has a first OR-gate input, a second OR-gate input, and an OR-gate output, wherein the first OR-gate input is connected to the OR-gate output associated with the adjacent higher-numbered slice array, wherein the second OR-gate input is connected to the output of the remap register, and wherein the OR-gate output is connected to the input of the write selector circuit and the read selector circuit.