Patent ID: 8325252

Claim:
A solid-state imaging device comprising: a pixel array unit formed by two-dimensionally disposing a plurality of pixels each having a photoelectric conversion portion; one or more SRAMs; a memory control section controlling writing of pixel data sequentially output from the pixel array unit into the SRAM and controlling readout of the pixel data from the SRAM; a correction process section performing a process of correcting the pixel data read from the SRAM by the memory control section; a defect detecting section detecting a defective address in the SRAM; and a defect relieving section holding pixel data to be written in the defective address of the SRAM by the memory control section and outputting the pixel data held therein to the correction process section instead of the pixel data which has been written in the defective address of the SRAM, wherein the defect detecting section includes a pixel data holding portion used for detecting a defect which temporarily holds the pixel data to be written in the SRAM, and a detector detecting the defective address of the SRAM when the pixel data read from the SRAM and the pixel data read from the pixel data holding portion for detecting a defect do not agree with each other.