Patent ID: 6988189

Claim:
In a data processing system having a processor and an associative memory unit for storing instructions, a method of processing multi-way branch selector instructions, the method comprising: (a) generating a branch decision key comprising a plurality of comparison fields; (b) comparing a first comparand to a second comparand to generate a comparison result; (c) generating a modified branch decision key that includes a third comparand and a comparison result; (d) removing the first comparand and the second comparand from the branch decision key; (e) concatenating remaining bits of the branch decision key with the comparison result, the comparison result having fewer bits that combination of the first comparand and the second comparand such that the modified branch decision key has fewer bits than the branch decision key; (f) retrieving an instruction reference from the associative memory unit in response to the modified branch decision key; and (g) providing the instruction reference to the processor for execution at a subsequent instruction cycle.