Patent ID: 7631114

Claim:
A serial communication device, comprising: a central processing unit to execute a program; a serial communication interface coupled to receive data from outside the serial communication device and to provide a transfer request signal and a timeout interrupt signal, the timeout interrupt signal being provided to the central processing unit when the data from outside the serial communication device is not received by the serial communication interface for a predetermined time; a RAM including: a buffer area to store the data, and a work area for the program; and a direct memory access controller coupled to receive the transfer request signal and to transfer the data from the serial communication interface to the buffer area, the direct memory access controller having set therein a first number as a number of transfers, the first number being greater than a second number corresponding to a number of data received at a time by the serial communication interface, wherein the direct memory access controller provides a data transfer end interrupt signal to the central processing unit when a transfer number of data received by the serial communication interface reaches the first number, and wherein any data stored in the buffer area is transferred to the work area by the direct memory access controller when the central processing unit receives the data transfer end interrupt signal or the timeout interrupt signal.