Patent ID: 6961919

Claim:
A method for designing an integrated circuit, the method comprising: determining logic requirements for an intended set of applications for the integrated circuit; determining at least one common logic function for the intended set of applications for the integrated circuit; identifying an approximate number of configurable logic blocks and at least one fixed logic circuit that, when combined to operate cooperatively, meet a substantial portion of the logic requirements for the intended set of applications for the integrated circuit; designing the integrated circuit to include the approximate number of configurable logic blocks formed as a fabric and arranged to surround an opening in the fabric; designing the integrated circuit to include the at least one fixed logic circuit in the opening in the fabric; and designing the integrated circuit to include interconnecting logic that interfaces the at least one fixed logic circuit to the fabric; selecting a process for manufacturing of the integrated circuit, wherein the process involves a minimum dimension size for the integrated circuit; and selecting a die size for the integrated circuit considering the process, the approximate number of configurable logic blocks and the at least one fixed logic circuit.