Patent ID: 7936687

Claim:
A packet processing system comprising: a receive side packet bus to receive a plurality of packets for processing by the packet processing system, wherein a population of network traffic undergoing packet processing by the packet processing system is represented by the plurality of packets; statistical sampling logic to generate a statistically accurate representation of the population of network traffic undergoing processing by the packet processing system based on sampling a statistically significant subset of the plurality of packets received by the packet processing system, in which the sampled statistically significant subset of the plurality of packets corresponds to less than a whole of the population of network traffic; a Linear Feedback Shift Register (LFSR) to identify the sampling of the statistically significant subset of the plurality of packets received based on an LFSR threshold, wherein the LFSR threshold corresponds to a percentage of the plurality of packets to be sampled in a pseudo-random fashion via the LFSR based on an expected variance among the plurality of packets, the LFSR threshold corresponding to a relatively higher percentage when the expected variance among the plurality of packets is expected to be substantial and the LFSR threshold corresponding to a relatively lower percentage when the expected variance among the plurality of packets is expected to not vary substantially; and statistics compiling logic to maintain statistics of the plurality of packets received by the packet processing system based on the generated statistically accurate representation of the population of network traffic derived from the subset.