Patent ID: 7629646

Claim:
A trench metal oxide semiconductor field effect transistor (MOSFET) with a terraced gate, comprising: a substrate; an epitaxial layer disposed on the substrate; a plurality of trenches each defined by at least a sidewall and a bottom formed on top of the epitaxial layer; a gate oxide layer formed on the sidewall and the bottom of each trench; a polysilicon layer disposed in the trenches, wherein the polysilicon layer protrudes out from each of the trenches and at least a portion of the polysilicon layer is positioned higher than the sidewall of each of the trenches; a plurality of source regions and body regions formed in the epitaxial layer such that the polysilicon layer that is disposed in the trenches surrounded by the source regions is configured to conduct current of the MOSFET; an insulating layer deposited on the epitaxial layer, a plurality of metal contact holes formed in the insulating layer and extending through the insulating layer, the source regions and into the body regions vertically relative to a surface of the epitaxial layer for contacting respective source and body regions for source metal connection; a plurality of metal contact holes formed in the insulating layer and extending through the insulating layer and into the polysilicon layer in the trenches for gate metal connection; and metal plugs disposed in the metal contact holes to form the source metal connection and the gate metal connections for the MOSFET.