Patent ID: 7366966

Claim:
A system for providing at least one test signal having a controllable timing and duration, the system comprising: a test signal generator operable to generate at least one test signal; a phase interpolator coupled to receive a periodic signal, the phase interpolator being operable to phase shift the periodic signal by a magnitude corresponding to a phase value to generate a phase-shifted signal; a first clock distribution tree having an input coupled to receive the phase-shifted signal from the phase interpolator, the first clock distribution tree distributing the phase-shifted signal through a plurality of branches of the tree to generate at an output of each branch a respective first delayed clock signal; a second clock distribution tree having an input coupled to receive the phase-shifted signal from the phase interpolator, the second clock distribution tree distributing the phase-shifted signal through a plurality of branches of the tree to generate at an output of each branch a respective second delayed clock signal; a delay line in each branch of the second clock distribution tree, the delay line delaying the phase-shifted signal being coupled through the second clock distribution tree by a delay value so that the second delay clock signal is delayed relative to the periodic signal by a delay equal to the sum of the delay of the phase interpolator and the delay of the delay line; at least one signal routing device having a first input coupled to receive at least one respective test signal from the test signal generator and having a second input, the at least one signal routing device being operable responsive to receiving a first mode signal to couple the at least one respective test signal to an output and to couple a signal applied to the second input to the output responsive to receiving a second mode signal; at least one transmitter having a first data input coupled to receive a respective test signal from the test signal generator and a second data input coupled to the output of a respective signal routing device, the at least one transmitter having first and second clock inputs coupled to receive the first and second delayed clock signals from the first and second clock distribution trees, respectively, the at least one transmitter being operable to couple the first data input to an output responsive to a transition of the first delayed clock signal applied to the first clock input, the at least one transmitter further being operable to couple the second data input to the output responsive to a transition of the second delayed clock signal applied to the second clock input; and a control circuit coupled to the delay line, the phase interpolator, and the at least one signal routing device, the control unit being operable to apply the phase value to the phase interpolator and the delay value to the delay line to adjust the timing and duration of each test signal coupled to the output of the respective at least one transmitter.