Patent ID: 7970956

Claim:
A graphics-processing system comprising: a central processing unit (CPU) issuing commands and data, and further issuing a first write request to a first memory address; a plurality of graphics devices operating in parallel to render computer graphics based on the commands and data issued by the CPU, a first one of the graphics devices issuing, in response to the commands and data issued by the CPU, a second write request to a second memory address; and a controller, in communication with the plurality of graphics devices and the CPU, receiving the first write request from the CPU and the second write request from the first one of the graphics devices, the controller broadcasting the first write request received from the CPU to the plurality of graphics devices when the first memory address of the first write request is within a particular range of broadcast addresses, and broadcasting the second write request received from the first one of the graphics devices to the other graphics devices of the plurality of graphics devices when the second memory address of the second write request is within the particular range of broadcast addresses.