Patent ID: 8716863

Claim:
An integrated circuit (IC) structure, comprising: a substrate having an IC device formed therein; a first dielectric material layer disposed over the substrate and having a first trench formed therein; a first composite interconnect feature disposed in the first trench and electrically coupled with the IC device, wherein the first composite interconnect feature includes a first barrier layer disposed on sidewalls of the first trench; a first metal layer disposed on the first barrier layer; and a first graphene layer disposed on the first metal layer; a second dielectric material layer interposed between the first dielectric material layer and the substrate, having a second trench formed in the second dielectric material layer; and a second composite interconnect feature formed in the second trench and contacted with the first composite interconnect feature, wherein the second composite interconnect feature includes a second barrier layer disposed on sidewalls of the second trench; at least one carbon nanotube disposed in the second trench; and a metal material filled in the second trench and surrounded by the second barrier layer such that the at least one carbon nanotube is embedded in the metal material.