Patent ID: 7117283

Claim:
A method for communicating across a serial data bus including two or more master mode devices coupled to the serial data bus, comprising the steps of: sending a designated recipient device address from one of the two or more master mode devices onto the bus to a designated recipient device, each of the two or more master mode devices including a timer for controlling a wait cycle for each of the two or more master mode devices, the designated receipt device being a slave mode device; and sending an acknowledge from the designated recipient device; sending identification information for the one of the two or more master mode devices, wherein the two or more master mode devices are capable of communicating with each other via the serial data bus and the timer within each of the two or more master mode devices places one of the two or more master mode devices into a wait cycle if the slave mode device fails to send an acknowledge and the bus is unavailable, upon termination of the wait cycle the one of the two or more master mode devices placed into a wait cycle resends its designated recipient device address to the designated recipient device.