Patent ID: 7992063

Claim:
A control circuit for use in a liquid crystal display (LCD), comprising: a plurality of shift register stages electrically connected to each other in series, each shift register stage receiving a first clock signal and a second clock signal and outputting an output signal respectively according to the first and the second clock signals, the output signal being used as a driving signal of a next shift register stage, each shift register stage comprising: a first transistor (T 1 ) for receiving a driving signal from a preceding shift register stage; a second transistor (T 2 ) for outputting the driving signal of the next shift register stage according to the first clock signal when the first transistor is turned on; and a third transistor (T 3 ) for receiving a clear signal (CLR) to release the residual charges of the second transistor by connecting the second transistor to a low voltage level through the third transistor when the clear signal is in a high voltage level; wherein the clear signal is a driving signal outputted from another shift register stage which is apart from the shift register stage by a predetermined interval, the clear signal is used to releasing the residual charges of the second transistor during a period when the LCD inputs a frame signal, and wherein each shift register comprises an N+1th stage output signal pull-down circuit for releasing the residual charges of the second transistor by connecting the second transistor to the low voltage level through the N+1th stage output signal pull-down circuit when an N+1th stage output signal is in the high voltage level.