Patent ID: 8159873

Claim:
A semiconductor integrated circuit, comprising: a state detection enhancement circuit which includes an input terminal and an output terminal and has a function of generating an electric potential of a magnitude capable of performing nonvolatile memory writing into a nonvolatile memory circuit based on an electric potential input to the input terminal and outputting the electric potential of the magnitude to the output terminal, wherein the state detection enhancement circuit is a logical state detection enhancement circuit which comprises a control signal terminal and a switch circuit which is turned on or off by a control signal applied to the control signal terminal, and has a function of either applying an output potential of a logical state of an input potential applied to the input terminal to the output terminal or completely breaking off a correlation between the input potential and the output potential when the switch circuit is in an OFF state, and applying an output potential which has a logical state of the input potential and has a larger highest-lowest potential range including a possible highest-lowest potential range of the input potential to the output terminal when the switch circuit is in an ON state; and the nonvolatile memory circuit which has a nonvolatile memory function and is connected to the output of the state detection enhancement circuit via an input terminal of the nonvolatile memory circuit.