Patent ID: 7080298

Claim:
A circuit for testing an electronic circuit, which weights a plurality of pseudo-random data patterns and inputs signals of the weighted pseudo-random data patterns to an electronic circuit to be tested, comprising: at least one input logic gate configured to receive at least one signal of a pseudo-random data pattern; at least one input multiplexer configured to receive a signal that is the same as the signal of the pseudo-random data pattern inputted to the input logic gate and a signal outputted from the input logic gate, and to select and output one of the signals; at least one control circuit configured to input a selection signal to the input multiplexer, the selection signal being used for selecting the signal outputted from the input multiplexer; a first multiplexer configured to receive a signal that is the same as the signal of the pseudo-random data pattern inputted to the input logic gate and a signal outputted from the input multiplexer, and to select and output one of the signals; an output logic gate configured to receive a signal outputted from the first multiplexer to one input of the output logic gate; an output multiplexer configured to receive the signal outputted from the output logic gate and a signal inputted from an external input, and to select and input one of the signals to the electronic circuit; and a weight channel circuit configured to input a weight selection signal to the first multiplexer from a selection output of the weight channel circuit, the weight selection signal being used for selecting one of the signals outputted from the first multiplexer, to input another weight selection signal to the output multiplexer from an additional output of the weight channel circuit, the weight selection signal being used for selecting one of the signals outputted from the output multiplexer, the weight channel circuit having another output connected to another input of the output logic gate.