Patent ID: 7000058

Claim:
An improved ISDN-data transmission method for transmitting digital data divided up into HDLC data frames of variable lengths from a first data bus to a second data bus operated asynchronously with respect to the first data bus and controlled by a microprocessor, the improvement which comprises: writing the digital data of a given HDLC-data frame from the first data bus to a memory having a settable size, said memory being arranged directly between said first data bus and said second data bus; informing the microprocessor, in a form of an interrupt signal generated by a memory control unit, if the memory is full or if the memory contains an entry indicating an end of a respective HDLC-data frame; determining via the microprocessor from the memory control unit a quantity of the digital data to be read from the memory; reading via the microprocessor the digital data from the memory; setting dynamically via the microprocessor a size of the memory for a current reading/writing procedure of said memory; storing in a register, for a following writing procedure, a present size of memory, the register having a content selectively modifiable with each read cycle of the microprocessor; and transmitting from the microprocessor to the memory control unit an acknowledgment of a reception of the data being read out from the memory.