Patent ID: 7404165

Claim:
A method for planning a layout for an LSI pattern, the LSI pattern including a plurality of circuit patterns, the method comprising the steps of: designing the circuit patterns; making an initial placement for the circuit patterns designed; performing optical proximity corrections on at least two of the circuit patterns that have been initially placed to be adjacent to or cross each other, thereby forming optical proximity corrected patterns out of the adjacent or crossing circuit patterns; evaluating effectiveness of the proximity corrections; if the effectiveness of the corrections is negated, changing a design rule defining the circuit patterns to make the corrections effective; making a re-placement for the initially placed circuit patterns in accordance with the design rule changed; defining the design rule such that the circuit patterns are laid out to make the corrections effective; setting specifications of the corrected patterns to be made; defining a rule of placing the corrected patterns such that the proximity corrections are performed effectively using the corrected patterns; and forming the corrected patterns according to the specifications of the corrected patterns to be made and on the rule of placing the corrected patterns, thereby defining the design rule, wherein the step of making the initial placement or the step of making the re-placement includes the step of placing the circuit patterns in accordance with the design rule.