Patent ID: 7482276

Claim:
A method of manufacturing a semiconductor device, comprising: forming a lower insulating layer on a semiconductor substrate; forming a metal interconnection in the lower insulating layer; forming an intermetallic insulating layer on the lower insulating layer including the metal interconnection; selectively etching a portion of the intermetallic insulating layer until a surface of the metal interconnection is exposed to form a via hole; selectively etching an upper portion of the intermetallic insulating layer to form a trench, wherein the via hole connects the trench to the metal interconnection; implanting carbon into the intermetallic insulating layer having the via hole and the trench to form a carbon implantation layer on inner walls of the via hole and the trench; depositing a barrier metal layer on the intermetallic insulating layer including the carbon implantation layer; and forming a conductive layer on the barrier metal layer such that the via hole and the trench are filled.