Patent ID: 7365009

Claim:
A method for making a metal interconnect comprising: providing a substrate and at least a first electric conductor; forming a first dielectric layer over the first electric conductor on the substrate; forming a first patterned hard mask on the first dielectric layer to define at least a first opening; using the first patterned hard mask as an etching mask to etch the first dielectric layer to form the first opening in the first dielectric layer; forming a first metal layer to fill the first opening and covering the first patterned hard mask; using the first patterned hard mask as a polishing stop layer and performing a polishing process on the first metal layer to form a second electric conductor in the first opening and electrically connecting the second electric conductor to the first electric conductor; forming a second dielectric layer over the first patterned hard mask and the second electric conductor; forming a second patterned hard mask on the second dielectric layer to define at least a second opening; using the second patterned hard mask as an etching mask and using the first patterned hard mask and the second electric conductor as an etch stop layer to etch the second dielectric layer to form the second opening in the second dielectric layer; and forming a third electric conductor in the second opening and electrically connecting the third electric conductor to the second electric conductor.