Patent ID: 7378747

Claim:
A semiconductor device chip, comprising: a plurality of channel blocks each of which includes a plurality of channels, each of the channels including a plurality of unit devices placed in a substrate and a plurality of well regions arranged in the substrate; a plurality of first metal interconnection lines connected to the unit devices comprising the channels to receive and transfer data signals from and to the external side; a plurality of normal bumps for transferring the data signals received by the first metal interconnection lines through a plurality of first external interconnection lines to be connected to the external side; a plurality of second metal interconnection lines placed between the channel blocks, each of the second metal interconnection lines being connected to one of the substrate and a corresponding well region; and a plurality of first heat transfer bumps placed over the second metal interconnection lines to receive the heat generated during driving the channel blocks through the second metal interconnection lines and transfer the received heat to a plurality of second external interconnection lines to be connected to the external side.