Patent ID: 7206712

Claim:
A test apparatus for testing a semiconductor component, the test apparatus comprising: a loadboard comprising an evaluation apparatus, a function generator and connections that connect to the semiconductor component to be tested; and a tester that controls the evaluation apparatus, the function generator and the semiconductor component to be tested; wherein: an input of the evaluation apparatus is connected to a connector that connects to an output of the semiconductor component to be tested, and an output of the function generator is connected to an input of the evaluation apparatus, to a connector that connects to an input of the integrated semiconductor component to be tested or to an internal node of the semiconductor component; and the function generator comprises a first adding block that includes a sine input, a cosine input and an output, the first adding block being configured to calculate the cosine value x i+1 for the following time (i+1)*h, where h is a stipulated step size and i is a natural number, and a second adding block that includes a sine input, a cosine input and an output, the second adding block being configured to calculate the sine value y i+1 for the following time (i+1)*h, the sine inputs of the first and second adding blocks have the sine value y i for the present time i*h applied to them, the cosine inputs of the first and second adding blocks have the cosine value x i for the present time i*h applied to them, and the number of periods to be output and the step size h are set by input signals provided to the function generator.