Patent ID: 8107214

Claim:
A multilayer capacitor array comprising: a laminate in which a plurality of dielectric layers are laminated together; internal electrodes formed in a plurality of layers in the laminate; and a plurality of terminal conductors and a plurality of external electrodes formed on side faces of the laminate and electrically isolated from each other, the multilayer capacitor array comprising an array of a plurality of capacitor element portions in which the internal electrodes are opposed to each other with the dielectric layer in between, wherein each of said capacitor element portions has: an ESR control section in which a first internal electrode connected to a first polarity and a second internal electrode connected to a second polarity are opposed to each other with at least one dielectric layer in between; and a capacitance section in which a third internal electrode connected to the first polarity and a fourth internal electrode connected to the second polarity are opposed to each other with at least one dielectric layer in between, wherein in said ESR control section, the first internal electrode is connected through a lead conductor to a first terminal conductor and to a first external electrode, and the second internal electrode is connected through a lead conductor to a second terminal conductor and to a second external electrode, and wherein in the capacitance section, the fourth internal electrode is connected through a lead conductor to the second terminal conductor only, and the third internal electrode is connected through a lead conductor to the first terminal conductor only, is formed in the same layer as the fourth internal electrode in the capacitance section of an adjacent capacitor element portion, and extends as far as a predetermined boundary between the capacitor element portions, and wherein the capacitance section is formed by laminating a plurality of complex layers together, and each of the complex layers comprises the dielectric layer, and the third internal electrode and the fourth internal electrode on the dielectric layer, the complex layers are laminated together so that the third internal electrode and the fourth internal electrode are alternately arranged, and ends of the third internal electrodes are aligned in the laminate direction of the dielectric layers in the adjacent complex layers.