Patent ID: 7492569

Claim:
A semiconductor device comprising: a capacitor cell formed on said semiconductor substrate, including at least one capacitor element; one interconnection layer positioned over said capacitor cell; at least one other interconnection layer different from said one interconnection layer, on which a power supply line is provided; at least one power supply line disposed on said one interconnection layer at an area corresponding to the area at which said capacitor cell is placed, said power supply line being electrically connected to corresponding said power supply line on said other interconnection layer through at least one connecting via; and a cell disposed in the vicinity of said capacitor cell having a circuit including at least one active element; wherein said capacitor cell constitutes a decoupling capacitor of said cell disposed in the vicinity of said capacitor cell; wherein said power supply line provided on said one interconnection layer at an area corresponding to the area where said capacitor cell is disposed constitutes a power supply path to said cell; and wherein said capacitor cell is placed on one or both sides of adjacent column on which said cell is disposed on the same row as the row on which said cell is disposed.