Patent ID: 7913120

Claim:
Apparatus for processing data, said apparatus comprising: a memory addressable with a memory address having a value within a memory address space, said memory address space having a plurality of domains, a domain comprising a set of memory addresses as defined by programmable domain specifying data; data processing circuitry, responsive to program instructions fetched from memory addresses within said memory address space, configured to perform data processing operations; diagnostic circuitry responsive to one or more signals within said apparatus, configured to perform diagnostic operations generating diagnostic data; diagnostic function control circuitry, responsive to a determination of in which of said plurality of domains a memory address of a program instruction currently being executed is located, configured to selectively disable at least some diagnostic functions of said diagnostic circuitry; and memory management circuitry, responsive to memory page table data, configured to define properties of pages of memory addresses within said memory address space, said memory address space containing a plurality of contiguous pages of memory addresses, and wherein said programmable domain specifying data is part of said memory page table data.