Patent ID: 8742830

Claim:
A circuit comprising: a sense input terminal; a sense output terminal; first and second capacitors that are configured to charge and discharge based on the sense input terminal, wherein the first and second capacitors are further configured to discharge current to a fuse unit cell, and the sense output terminal is configured to indicate a fuse state of the fuse unit cell based on the discharging of the first and second capacitors; a first pass-gate circuit having a first pass-gate input terminal and a first pass-gate output terminal; and a second pass-gate circuit having a second pass-gate input terminal and a second pass-gate output terminal, wherein the first pass-gate output terminal is coupled to a reference resistor of the fuse unit cell during a sensing period of the fuse unit cell, and the second pass-gate output terminal is coupled to a fuse of the fuse unit cell during the sensing period.