Patent ID: 7279940

Claim:
A switched-capacitor circuit for sampling a pair of differential input signals, the switched-capacitor circuit comprising a pair of sampling capacitors coupled to sample the differential input signals based on a first clock signal and transfer charge associated with the sampled differential input signals to respective first and second input terminals of an amplifier, the switched-capacitor circuit further comprising: a first bootstrapped switch and a first non-boosted switch connected in parallel between a first output terminal of the amplifier and a first feedback node of the switched-capacitor circuit to form a first feedback signal path, the first bootstrapped switch and the first non-boosted switch each has a first switch position being open and a second switch position being closed, the first non-boosted switch being controlled by a second clock signal and the first bootstrapped switch being controlled by a third clock signal, wherein the first and second clock signals are non-overlapping clock signals and the third clock signal is the second clock signal delayed by a predetermined amount, the second and third clock signals being partially overlapping clock signals; and a second bootstrapped switch and a second non-boosted switch connected in parallel between a second output terminal of the amplifier and a second feedback node of the switched-capacitor circuit to form a second feedback signal path, the second bootstrapped switch and the second non-boosted switch each has a first switch position being open and a second switch position being closed, the second non-boosted switch being controlled by the second clock signal and the second bootstrapped switch being controlled by the third clock signal.