Patent ID: 8635487

Claim:
A method for calibrating parameters of a memory device, the method comprising: (a) setting a write latency associated with the memory device to a first value, the write latency is a period of time between transmitting a write command and transmitting data associated with the write command to the memory device; (b) changing a burst length such that a data sequence transmitted to the memory device is greater than the amount of data that can be captured during a read window of the memory device; (c) after changing the burst length, performing a write operation using the write latency, wherein the data sequence is transmitted to the memory device; (d) performing a read operation to retrieve a data portion written during the write operation of step (c), wherein the retrieved data portion is a subset of the data sequence transmitted at step (c); and, (e) upon determining that the retrieved data portion is different from an expected data portion of the data sequence transmitted to the memory device at step (c), adjusting the write latency by at least one clock cycle to alter the retrieved data portion read from the memory device at step (d); (f) repeating steps (c)-(e) until the retrieved data portion is equal to the expected data portion of the data sequence; and (g) upon determining that the retrieved data portion is equal to the expected data portion, performing normal operation of the memory device using the adjusted write latency and changing the burst length such that subsequent data sequences transmitted to the memory device are equal to or less than the read window.