Patent ID: 7408219

Claim:
A nonvolatile semiconductor memory device, comprising: a cell doping region and source/drain regions in a semiconductor substrate, the cell doping region being doped as a first conductive type; a channel region disposed between the source/drain regions in the semiconductor substrate; a tunnel doping region of the first conductive type formed in a predetermined region of an upper portion of the cell doping region, the tunnel doping region being doped in a higher concentration than that of the cell doping region, a width of the tunnel doping region being smaller than a width of the cell doping region; a tunnel insulating layer formed on a surface of the semiconductor substrate on the tunnel doping region, a width of the tunnel insulating layer being smaller than the width of the tunnel doping region; a gate insulating layer surrounding the tunnel insulating layer and covering the channel region and the cell doping region exposed beyond the tunnel doping region; and a gate electrode covering the tunnel insulating layer and on the gate insulating layer.