Patent ID: 6969656

Claim:
A method for multiplying a first signal and a second signal, comprising: providing a substrate and a semiconductor structure over the substrate, the semiconductor structure having a first sidewall, a second sidewall, and a top surface; depositing at least one substantially conformal layer over the substrate, wherein the at least one substantially conformal layer comprises at least a layer of gate material, wherein the at least one substantially conformal layer has a top surface at a height over the semiconductor structure; forming a substantially planar layer over the substrate below the height of the top surface of the at least one substantially conformal layer over the semiconductor structure; non-abrasively etching through the layer of gate material over the top surface of the semiconductor structure; patterning the at least one substantially conformal layer to form a gate structure prior to the forming the substantially planar layer over the substrate, wherein the non-abrasive etching through the layer of gate material over the top surface of the semiconductor structure further includes etching through the layer of gate material of the gate structure over the top surface of the semiconductor structure to form a first gate portion and a second gate portion that are electrically isolated; forming symmetrical source and drain regions relative to the first and second gate portions such that a channel region will be formed under the first and second gates during operation of the semiconductor structure, wherein there exists a plane parallel to the substrate, and wherein a portion of each of the source region, the drain region and the channel region are within the plane; applying the first signal to the first gate portion, wherein the first signal is time-varying; and applying the second signal to the second gate portion, wherein the second signal is time-varying.