Patent ID: 8149906

Claim:
A method of transferring data in a multi-chip semiconductor device which comprises two or more semiconductor chips, and a plurality of inter-chip wires for transferring data between the semiconductor chips in synchronization with a clock signal, said method comprising: conducting a test to determine whether or not each inter-chip wire is capable of normally transferring data, on circuits arranged on chips between which said inter-chip wire is connected; when there exists an inter-chip wire which is incapable of normally transferring data, increasing the data transfer speed of a buffer circuit on a chip on a transmission side that is connected to an inter-chip wire which is capable of normally transferring data; and at said buffer circuit, transferring data to be transferred through the inter-chip wire which is incapable of normally transferring data, together with data to be transferred by said buffer circuit itself, at the increased data transfer speed to a chip on a reception side through the inter-chip wire which is connected to said buffer circuit.