Patent ID: 7996795

Claim:
A method of modeling an integrated circuit undergoing manufacture, the method for use by a computer system having a processor and memory, the method comprising: the computer system performing a stress model of the integrated circuit undergoing manufacture, the stress model transforming a representation of a material conversion of a first material in the integrated circuit to a second material in the integrated circuit, wherein prior to the material conversion the first material occupies a first space having a first boundary, wherein after the material conversion the first material and the second material together occupy a second space having a second boundary, wherein the first space and the second space are different, and the stress model performed by the computer system transforms the representation of the material conversion of the first material to the second material into: i) the first material occupying the first space having the first boundary, and ii) a strain displacement condition of the first material, the strain displacement condition being determined by a spatial change from the first boundary to the second boundary.