Patent ID: 8450623

Claim:
A circuit board comprising: a circuit substrate having a first surface and at least a first circuit; a dielectric layer disposed on the circuit substrate and covering the first surface and the at least a first circuit, the dielectric layer having a second surface, at least a blind via extending from the second surface to the at least a first circuit, a first intaglio pattern, and a second intaglio pattern; and a patterned circuit structure comprising: at least a second circuit formed by a single conductive layer and disposed in the first intaglio pattern; and a plurality of third circuits disposed in the second intaglio pattern and the at least a blind via, each of the third circuits having a first conductive layer, a second conductive layer, and a barrier layer, the first intaglio pattern is filled with the first conductive layer, and the first conductive layer being disposed on an inner wall of the second intaglio pattern and an inner wall of the at least a blind via, the first conductive layer being located between the barrier layer and the second intaglio pattern and between the barrier layer and the at least a blind via, the second conductive layer covering the barrier layer, wherein a material of the first conductive layer is substantially equal to a material of the at least a second circuit, a line width of the at least a second circuit is smaller than a line width of each of the third circuits, and at least one of the third circuits is electrically connected to the at least a first circuit of the circuit substrate.