Patent ID: 7212724

Claim:
A jitter correcting apparatus for correcting jitter of an input video signal in a video signal reproduction system including a digital video decoder for demodulating a luminance signal of the video signal in response to a first clock signal having a variable frequency and for demodulating a chrominance signal of the video signal in response to a second clock signal of a fixed frequency, the jitter correcting apparatus comprising: a luminance signal address generator for generating a luminance signal write address for writing the luminance signal in response to the first clock signal, for generating a luminance signal read address for reading the luminance signal in response to the second clock signal, for comparing the luminance signal write address with the luminance signal read address, and for correcting the luminance signal read and write addresses based on a result of the comparison; a first dual port memory device for storing the luminance signal at a location corresponding to the luminance signal write address in response to the first clock signal and for outputting the luminance signal stored at a location corresponding to the luminance signal read address in response to the second clock signal; a chrominance signal address generator for generating a chrominance signal write address for writing the chrominance signal and a chrominance signal read address for reading the chrominance signal, in response to the second clock signal, for comparing the chrominance signal write address with the chrominance signal read address, and for correcting the chrominance signal read and write addresses based on a result of the comparison; and a second dual port memory device for storing the chrominance signal at a location corresponding to the chrominance signal write address and for outputting the chrominance signal stored at a location corresponding to the chrominance signal read address, in response to the second clock signal.