Patent ID: 8552775

Claim:
A digital phase-locked loop apparatus using Frequency Shift Keying (FSK), comprising: a Phase-Frequency Detector (PFD) for detecting phase differences between a reference clock and a frequency-divided signal; a pulse generator for generating first and second pulses based on results of the detection of the phase differences of the PFD; a Time to Digital Converter (TDC) for converting time differences between the first and second pulses into first digital codes by comparing rising edges of the first and second pulses of the pulse generator with each other; a first Sigma-Delta Modulator (SDM) for modulating external data into second digital codes; a first adder for generating first digital control codes by adding the first digital codes, the second digital codes, and channel frequency codes including channel information to each other; a digital filter for correcting errors of the first digital control codes generated by the first adder and then generating second digital control codes; a Digitally Controlled Oscillator (DCO) for varying an oscillating frequency in accordance with a digital tuning word based on the second digital control codes of the digital filter; and a dual modulus division unit for dividing the oscillating frequency, varied by the DCO, into a frequency-divided signal.