Patent ID: 7848402

Claim:
Circuitry operative to produce a pre-emphasis signal or an equalization signal from a first signal, the circuitry comprising: first and second delay elements operative to produce, from the first signal, second and third signals corresponding to the first signal and delayed by one and two time steps, respectively; and circuitry operative to apply variable multiplicative coefficients to the first, second and third signals to form a linear combination of the first, second and third signals, such that the first and third signals have equal multiplicative coefficients in the linear combination, to produce an output signal corresponding to the linear combination, the circuitry operative to apply variable multiplicative coefficients comprising: first, second and third current sources producing currents with amplitudes related to the multiplicative coefficients in the linear combination, and first, second and third switches operative to selectively combine the currents produced by the first, second and third current sources to produce the output signal, the first, second and third switches being controlled by signals related to the first, second and third signals respectively.