Patent ID: 7615827

Claim:
A semiconductor device, comprising: a first FET of a first polarity, said first FET comprising a first source and a first drain in a first well in a semiconductor substrate and on opposite sides of a first gate electrode, a first gate dielectric consisting of a first region of a first thickness of a single layer of thermal oxide, said first region between said first well and said first gate electrode, and first sidewall spacers formed on opposite sides of said first gate electrode; a second FET of a second and different polarity, said second FET comprising a second source and a second drain in a second well in said semiconductor substrate and on opposite sides of a second gate electrode, a second gate dielectric consisting of a second region of a second thickness of said single layer of thermal oxide, said second region between said second well and said second gate electrode, and second sidewall spacers formed on opposite sides of said gate electrode; and said first FET electrically connected to said second FET in a same circuit, said first thickness different from said second thickness.