Patent ID: 7262506

Claim:
A stacked multiple-semiconductor die device, comprising: a substrate having a surface; at least one conductive bond area on the surface of the substrate; a plurality of semiconductor dice having similar dimensions, each semiconductor die having a active surface including at least four edges, and a backside, the plurality of semiconductor dice including: a lower semiconductor die having a field of bond pads positioned thereon for attachment to conductive wires with loops; an upper semiconductor die overhanging said field of bond pads by a first height; and an intervening semiconductor die having an upper surface bonded to said upper semiconductor die with an adhesive layer and a lower surface bonded to said lower semiconductor die with an adhesive layer, said intervening semiconductor die offset from said lower and upper semiconductor dice, a height of overhang between said lower semiconductor die and upper semiconductor die being substantially equal to a thickness of said intervening semiconductor die and two of said adhesive layers and said height of overhang exceeding a height of bond wire loops attached to said bond pads of the lower semiconductor die, the intervening semiconductor die comprising one of a piece of silicon and an inoperative semiconductor die and an operative semiconductor die; a field of conductive bond pads disposed on the active surface of each semiconductor die, the field of conductive pads positioned along less than three edges of the active surface of a semiconductor die, the backside of a lower semiconductor die being attached to the surface of the substrate adjacent the at least one conductive bond area of said surface of the substrate and the backside of an upper semiconductor die is attached to the active surface of the lower semiconductor die in an offset position having the field of conductive bond pads of the first semiconductor die exposed; conductors connecting bond pads of the lower semiconductor die to conductive bond areas of the substrate; and conductors connecting bond pads of the upper semiconductor die to one of the conductive bond areas of the substrate and conductive bond pads of the lower semiconductor die.