Patent ID: 8592902

Claim:
A semiconductor structure comprising: an isolation region; a source that touches the isolation region and a channel region of a first conductivity type, the source having a second conductivity type and including a first source region, a second source region that touches the first source region, and a third source region that touches the first and second source regions, the first source region having substantially a first dopant concentration, the second source region having substantially a second dopant concentration that is greater than the first dopant concentration, the third source region having substantially a third dopant concentration that is greater than the first dopant concentration and less than the second dopant concentration; a drain that touches the isolation region and the channel region and lies spaced apart from the source, the drain having the second conductivity type and including a first drain region, a second drain region that touches the first drain region, and a third drain region that touches the first and second drain regions, the first drain region having substantially the first dopant concentration, the second drain region having substantially the second dopant concentration, the third drain region having substantially the third dopant concentration; a gate insulation structure that touches and lies above the channel region; and a gate that touches the isolation region and the gate insulation structure, the gate lying above the channel region.