Patent ID: 8378752

Claim:
An oscillator circuit comprising: a filter capacitor that generates an oscillating frequency control voltage according to a charge amount accumulated based on an oscillating frequency setting current; an oscillator that changes a frequency of an oscillation signal to be output according to the voltage; a control circuit configured to generate a timing control signal, a logic level of the timing control signal being switched based on a period of the oscillation signal; a frequency detection circuit, having an output terminal, that generates a frequency detection voltage based on the timing control signal, a voltage level of the frequency detection voltage being changed according to a length of the period of the oscillation signal; and a differential amplifier, having an output terminal, that continuously changes the oscillating frequency setting current according to a voltage difference between the frequency detection voltage and a reference voltage, and outputs the resultant oscillating frequency setting current to the filter capacitor, wherein the timing control signal includes a charge reset signal, a ramp control signal, and a hold control signal, all of which are supplied to the frequency detection circuit, and wherein the control circuit is configured to: in a charge reset period, resets a charge of a frequency setting capacitor by switching the charge reset signal to an enabled state, the frequency setting capacitor connected to the output terminal of the frequency detection circuit; in a ramp period, supplies the charge/discharge current to the frequency setting capacitor by switching the ramp control signal to an enabled state; and in a hold period, brings the output terminal of the frequency detection circuit to a high-impedance state by switching the hold control signal to an enabled state.