Patent ID: 8492824

Claim:
A semiconductor memory device, comprising: a stacked body including a plurality of electrode films stacked alternately with a plurality of insulating films, a configuration of an end portion of the stacked body being a stairstep configuration including a terrace formed for each of the electrode films; contacts, each of the contacts having a lower end connected to a portion of the electrode film forming the terrace; a semiconductor member provided inside a portion of the stacked body other than the end portion to extend in a stacking direction of the insulating films and the electrode films; and a charge storage layer provided between the electrode film and the semiconductor member, an upper end portion of one of the contacts connected to one of the electrode films being thicker than an upper end portion of one other of the contacts connected to one other of the electrode films positioned higher than the one of the electrode films, the one of the contacts being finer downward in stages, and the one of the contacts becoming discontinuously finer at a level of the electrode film.