Patent ID: 7049195

Claim:
A method of fabricating a non-volatile memory device, the method comprising: forming a sacrificial oxide film on a semiconductor substrate and selectively etching the sacrificial oxide film to expose the semiconductor substrate with a predetermined width; injecting first conductive type impurity ions into the exposed semiconductor substrate to form a first semiconductor region; forming an additional oxide and nitride film on the entire upper surface of the semiconductor substrate in order; etching the nitride film, the additional oxide, and the sacrificial oxide film selectively to form a gate window which exposes the semiconductor substrate with a predetermined width; forming a gate oxide film over the entire upper surface of the semiconductor substrate; forming polysilicon layer on the gate oxide film to fill in the gata window; carrying out a CMP (Chemical Mechanical Polishing) process until the sacrificial oxide film is exposed; removing the sacrificial oxide film, and the gate oxide film film, the nitride film, and the additional oxide formed on the side wall of the polysilicon layer; and injecting second conductive type impurity ions into portions of the semiconductor substrate, which corresponds to the outer part of the polysilicon layer, to form source and drain regions.