Patent ID: 8890316

Claim:
A structure for implementing decoupling capacitors within a DRAM TSV stack comprising: a first semiconductor chip; a second semiconductor chip; said first and second semiconductor chips including a DRAM formed with a plurality of TSVs extending through the DRAM and filled with a conducting material; a first glass layer providing an insulator disposed on a top of the DRAM and a second glass layer providing an insulator disposed on a bottom of the DRAM; a first metal layer providing a conductor disposed on said first glass layer; a second metal layer providing a conductor disposed on said second glass layer; a respective solder ball disposed on respective ones of said TSVs and extending through an opening in said first and second metal layers and said first and second glass layers to connect said first and second semiconductor chips in the DRAM TSV stack; a dielectric disposed between said first and second metal layers in the DRAM TSV stack; and said first and second metal layers being connected to at least one TSV by one said respective solder ball and being connected to a voltage source to complete the decoupling capacitor.