Patent ID: 8421126

Claim:
A semiconductor structure, comprising: one or more first devices of a first substrate, said first substrate comprising a first oxide layer, a first silicon layer on said first oxide layer and a first lowermost dielectric layer on said first silicon layer; one or more second devices of a second substrate, said second substrate comprising a second oxide layer, a second silicon layer on said second oxide layer and a second lowermost dielectric layer on said second silicon layer; a top surface of said first oxide layer in direct physical contact with and bonded to a top surface of said second oxide layer; electrically conductive first contacts to said second devices, said first contacts extending from a top surface of said second lowermost dielectric layer through said second lowermost dielectric layer to said first devices; electrically conductive second contacts to said first devices, said second contacts extending from said top surface of said second lowermost dielectric layer through said second lowermost dielectric layer, through said first and second oxide layers to those portions of said second devices formed in said second silicon layer; and one or more second wiring levels over said second lowermost dielectric layer, each wiring level of said second wiring levels comprising electrically conductive wires in a corresponding dielectric layer, one or more wires of a lowermost wiring level of said second wiring levels in physical and electrical contact with said first and second contacts.