Patent ID: 7249309

Claim:
A computer-implemented method for encoding a m-bit chain wherein the errors do not spread on more than n bits, n being lesser or equal to m, said method comprising: choosing an irreducible generator polynomial of degree p, p being greater or equal to n and such that m is lesser or equal to p(2 p −1); building a matrix using 2 p elements of the galois field (GF), generated by the generator polynomial, comprising the 2 p −1 elements of the multiplicative group α 0 , α 1 , α 2 . . . α p−1 and Ø, a null element for the addition and, using p×p blocks wherein the first line is one first element and the other lines are the other elements of the GF multiplicative group obtained by a circular permutation of the first line, in the following way: defining a first set of p columns comprising a succession of 2 p +2 blocks wherein the first lines are respectively Ø, Ø and 2p times α 0 ; defining a second set of p columns comprising a succession of 2 p +2 blocks wherein the first lines are successively Ø, α 0 , Ø, α 0 , α 1 , α 2 . . . α p−1 ; and defining a third set of p columns comprising a succession of 2 p +2 blocks wherein the first lines are successively α 0 , Ø, Ø, α 0 , α 0 , (α p−1 ) −1 , (α p−2 ) −1 . . . (α 1 ) −1 ; and computing a bit chain code for the m-bit chain by performing a matrix multiplication of a bit chain wherein the m MSB bits are the m-bit chain and the remaining LSB bits are all-zero, by the previously built matrix and appending to the m-bit chain the bit chain code as new LSB bits.