Patent ID: 8654506

Claim:
A laminate semiconductor ceramic capacitor with a varistor function comprising: a laminated sintered body of alternately stacked and fired plurality of semiconductor ceramic layers of a SrTiO 3 based grain boundary insulated semiconductor ceramic and a plurality of internal electrode layers; and external electrodes on ends of the laminated sintered body, the external electrodes being electrically connected to the internal electrode layers, wherein the semiconductor ceramic has a compounding molar ratio m between the Sr site and the Ti site of 0.990≦m<1.000, has a donor element present as a solid solution in crystal grains, has an acceptor element present in a grain boundary layer in the range of 0.5 mol or less (excluding 0 mol) with respect to 100 mol of the Ti element, and has crystal grains with an average grain size of 1.5 μm or less, and there is no acceptor element in solid solution in the crystal grains.