Patent ID: 6880022

Claim:
A method for performing an input/output (I/O) operation in a computer between an I/O-initiating subsystem and a device through a hardware memory, in which: the memory is arranged into portions that are separately addressable using first identifiers that are represented using a first number of address bits; for the I/O operation, the device accesses a first space of the memory using a second number of address bits; the subsystem addresses I/O requests to a second space of the memory using second identifiers; the method comprising the following steps: initially mapping the second identifiers to respective first identifiers that identify portions of the memory in the second memory space; and for any I/O request that meets a remapping criterion, remapping the corresponding second identifier to one of the first identifiers that identifies a portion of the memory in the first space of the memory; in which the second space is different from the first space and the second number of address bits is less than the first number of address bits.