Patent ID: 7010065

Claim:
Apparatus for word synchronization with large coding distance and fault tolerance for a partial-response maximum-likelihood (PRML) data channel in a direct access storage device (DASD) comprising: a Viterbi detector for receiving equalized PR4 samples including a predefined word synchronization pattern; said Viterbi detector being optimized for said predefined word synchronization pattern; said Viterbi detector including a two-state Viterbi trellis; a word synchronization detector for said two-state Viterbi trellis; said word synchronization detector implements a difference metric for said two-state Viterbi trellis and includes a three-way multiplexer; said three-way multiplexer includes an input of added incoming samples, said added incoming samples represented by (Y K-2 +Y K-3 ) and said two-state Viterbi trellis and said word synchronization detector are operated on a 2T basis, where 1/T is the sample rate.