Patent ID: 7793241

Claim:
A method of analyzing a design of an integrated circuit device comprising a plurality of power wires and a plurality of power pads, the method comprising: starting from a first power pad, automatically identifying, from among the plurality of power wires, a first set of power wires that are electrically connected to one another while eliminating from the first set any power wire in said design unconnected to said first power pad; starting from a second power pad not visited during said automatically identifying, automatically identifying, from among the plurality of power wires, a second set of power wires that are electrically connected to one another, while eliminating from the second set any power wire in said design unconnected to said second power pad; using at least one computer to automatically segment every power wire in each set, at least at a location of a via in the design; automatically determining a value of at least one attribute of each wire segment identified by said using of said at least one computer; and outputting at least said value.