Patent ID: 8907459

Claim:
A three-dimensional semiconductor integrated circuit device comprising: (a) a base; (b) a first semiconductor chip stacked on the base, wherein the first semiconductor chip includes a first solid-state circuit and is smaller than the base; (c) a first filling material formed on the base to bury the first semiconductor chip, wherein the first filling material is formed to have approximately the same outside shape as the base; (d) first buried electrodes formed in the first semiconductor chip, wherein the first buried electrodes penetrate through the first semiconductor chip partially or entirely along a thickness direction of the first semiconductor chip; (e) a first circuit layer stacked on the base, wherein the first circuit layer comprises the first semiconductor chip and the first filling material; (f) a second semiconductor chip stacked on the first semiconductor chip to be superposed thereon, wherein the second semiconductor chip includes a second solid-state circuit and is smaller than the base; (g) a second filling material formed on the first circuit layer to bury the second semiconductor chip, wherein the second filling material is formed to have approximately the same outside shape as the base; (h) second buried electrodes formed in the second semiconductor chip, wherein the second buried electrodes penetrate through the second semiconductor chip partially or entirely along a thickness direction of the second semiconductor chip; and (i) a second circuit layer stacked on the first circuit layer, wherein the second circuit layer comprises the second semiconductor chip and the second filling material; wherein the first filling material has a processibility required for forming the first buried electrodes equivalent to that of the first semiconductor chip and a thermal expansion coefficient equivalent to that of the first semiconductor chip; and wherein the second filling material has a processibility required for forming the second buried electrodes equivalent to that of the second semiconductor chip and a thermal expansion coefficient equivalent to that of the second semiconductor chip.