Patent ID: 8476128

Claim:
A method of fabricating a semiconductor device, comprising: forming an N well layer and a P well layer in a surface region of a semiconductor substrate; forming a first gate insulating film on the N well layer and the P well layer; forming a first hafnium layer on the first gate insulating layer; etching the first gate insulating film and the first hafnium layer formed on the P well layer selectively; forming a second gate insulating film on the exposed P well layer; depositing a hafnium layer on the second gate insulating film and the first hafnium layer to form a second hafnium layer on the second gate insulating film so that a surface density of the first hafnium layer is higher than a surface density of the second hafnium layer; depositing a gate electrode material on the first and the second hafnium layers; and etching the gate electrode material, the first hafnium layer and the first gate insulating film which are formed on the N well layer so as to pattern the first gate insulating film, the first hafnium layer and a first gate electrode which are stacked on the N well layer, and etching the gate electrode material, the second hafnium layer and the second gate insulating film which are stacked on the P well layer so as to pattern the second gate insulating film, the second hafnium layer and a second gate electrode which are stacked on the P well layer.