Patent ID: 6911353

Claim:
A method of manufacturing a semiconductor device, comprising: forming a metal lead frame including an array of mounting portions interconnected by joint bars, each of the mounting portions having an island for mounting a semiconductor chip thereon and having a plurality of lead terminals extending from the island, the metal lead frame further including a bottom plate having a lower surface contiguous to and lying flush with lower surfaces of the islands and the lead terminals; mounting a semiconductor chip on a surface of the island of each of the mounting portions; electrically connecting the semiconductor chip on the island of each mounting portion to an external connection terminal portion of each of the lead terminals of at least one of the mounting portions; forming a resin layer so as to cover the semiconductor chip, the surface of the island, and surfaces of the lead terminals of each of the mounting portions; removing the bottom plate so as to expose a lower surface of the island and the lead terminals of each of the mounting portions of the lead frame so that the island of each of the mounting portions forms an external connection electrode portion; depositing plated layers of a soldering material on the lower surface of the island and the lead terminals of each of the mounting portions; and separating the metal lead frame so as to form a plurality of packages, said separating comprising severing each of the joint bars and severing each of the lead terminals so as to separate the external connection terminal portion of each of the lead terminals from the corresponding island of each of the mounting portions, whereby each package includes one of the islands, a region surrounding the one of the islands, and the external connection terminal portion of the lead terminals electrically connected to the semiconductor chip mounted on the one of the islands.