Patent ID: 7638373

Claim:
A method of manufacturing a thin-film transistor (TFT) substrate, comprising: sequentially forming a gate insulation layer, a semiconductor layer, an ohmic contact layer, and a data metal layer on a substrate having a gate wire formed thereon; forming a photoresist pattern in a source electrode area and a drain electrode area, the photoresist pattern including a binder having a degree of dispersion of about 1.5 to about 2; etching the data metal layer using the photoresist pattern as a first etch-stop layer to form a data wire including a source electrode and a drain electrode; reflowing the photoresist pattern to cover a channel region between the source electrode and the drain electrode; etching the ohmic contact layer and the semiconductor layer using the reflowed photoresist pattern as a second etch-stop layer to form an active pattern including an ohmic contact pattern and a semiconductor pattern; etching-back the reflowed photoresist pattern to expose a portion of the ohmic contact pattern in the channel region; and etching the ohmic contact pattern using the etched-back photoresist pattern as a third etch-stop layer, completing the TFT having a channel.