Patent ID: 8780598

Claim:
An inverter circuit comprising: a full-bridge circuit comprising: a first half-bridge circuit comprising: a first high-side transistor; and a first low-side transistor; and a second half-bridge circuit comprising: a second high-side transistor; and a second low-side transistor; and a pulse width modulation circuit comprising: a first circuit configured to control the first high-side transistor and the first low-side transistor in accordance with a first signal, the first circuit comprising: a first AND gate configured to generate the first signal in accordance with a first output signal and a first control signal; a first comparator configured to generate the first output signal in accordance with a sine wave and a first sawtooth wave; and a first digital sawtooth wave signal generator circuit configured to generate the first control signal in accordance with higher-order bits of a first digital signal and lower-order bits of the first digital signal; and a second circuit configured to control the second high-side transistor and the second low-side transistor in accordance with a second signal, the second circuit comprising: a second AND gate configured to generate the second signal in accordance with a second output signal and an inverted signal of a second control signal; a second comparator configured to generate the second output signal in accordance with the sine wave and a second sawtooth wave; and a second digital sawtooth wave signal generator circuit configured to generate the second control signal in accordance with higher-order bits of a second digital signal and lower-order bits of the second digital signal, wherein the second sawtooth wave is out of phase with the first sawtooth wave by half a cycle.