Patent ID: 7193320

Claim:
A semiconductor device comprising: a first wiring board formed on a substrate and having an opening through which a surface of the substrate is exposed; a semiconductor element located in the opening and having a back surface opposite to a circuit formation surface, the back surface being bonded to said substrate; bonding wires which connect electrodes formed on said first wiring board to first electrodes arranged in a peripheral part of the circuit formation surface of said semiconductor element; a second wiring board facing the circuit formation surface of said semiconductor element and having connection members which are connected to second electrodes arranged in a center part of said circuit formation surface; first wirings located in said first wiring board; second wirings located in said second wiring board; a resin located between said first and second wiring boards; first external connection terminals formed on said second wiring board and electrically connected to said second electrodes of said semiconductor element through said second wirings in said second wiring board and said connection members; second external connection terminals formed on said first wiring board electrically connected to said first electrodes of said semiconductor element through wirings in said first wiring board and said bonding wires; wherein said second wirings are free of contact with said resin; wherein the first external connection terminals on the second wiring board and the second electrodes on the semiconductor element align respectively, and the second wirings directly connect the first external connection terminals and the connection members by extending in a vertical direction.