Patent ID: 8361861

Claim:
A method of manufacturing a semiconductor device, comprising: forming an impurity diffusion region in a surface layer of a semiconductor substrate; forming an insulating film on the semiconductor substrate; forming a hole in the insulating film above the impurity diffusion region; forming a conductive film for plug on an upper surface of the insulating film and in the hole; forming the conductive film for plug in the hole into a conductive plug which is electrically connected to the impurity diffusion region, and an upper surface of the plug is lower than that of the insulating film; forming an underlying conductive film on the insulating film and the conductive plug; polishing the underlying conductive film to planarize an upper surface of the underlying conductive film; forming a crystalline conductive film on the underlying conductive film; and forming a capacitor in which a lower electrode, a capacitor dielectric film made of a ferroelectric material, and an upper electrode are laminated in this order on the crystalline conductive film.