Patent ID: 6864538

Claim:
A protective device against electrostatic discharges, for an integrated circuit positioned in a semiconductor substrate, comprising: a transistor diode positioned in a surface area vertically with respect to a surface of the semiconductor substrate and having a base-emitter structure that is introduced on the surface and a collector configured as a buried layer; a connector structure configured to contact the buried layer and positioned in the surface area laterally offset with respect to the transistor diode so that when the transistor diode is polarized in a reverse direction, one of a depletion-layer contact and a “punch-through” occurs at the connector structure before a breakdown can occur between the surface area and the base-emitter structure; and a first area in the surface area arranged between the base-emitter structure and the connector structure, the first area having a doping type selected to be opposite to a doping type of the surface area, the first area being connected in a low-resistance configuration to the base-emitter structure so that a semiconductor transition between the first area and a part of the surface area surrounding the first area forms a lateral diode for activation of the transistor diode, wherein at least one of: a dopant concentration in the first area is configured to be higher than in a base area of the base-emitter structure, and the first area is configured to be more planar than the base area.