Patent ID: 8153531

Claim:
A method of manufacturing an insulation layer of a semiconductor device including double insulation layers, a formation of the double insulation layers comprising: coating a first insulation layer on an entire surface of a substrate; coating a second insulation layer directly on the first coated insulation layer for an entire surface of the substrate, the second insulation layer including a photosensitive material and being formed of a material differing from that of the first insulation layer; patterning the second insulation layer to form a first region, a second region, and a third region, wherein, in the first region, the second insulation layer is formed to have a first pattern of a first thickness, wherein, in the second region, the second insulation layer is formed to have a second pattern of a second thickness less than the first thickness, and wherein, in the third region, the second insulation layer is removed to expose the first insulation layer formed at a lower portion of the second insulation layer; etching the first insulation layer of the third region; removing the second pattern of the second insulation layer such that the first insulation layer remains in the second region on at least substantially an entire length of a wiring that extends substantially from one end of the substrate to another end of the substrate; and ashing the first pattern of the second insulation layer such that the first pattern of the second insulation layer remains as one of the double insulation layers in at least the first region of the semiconductor device.