Patent ID: 7119011

Claim:
A manufacturing method of a semiconductor device having a groove interconnecting element of damascene structure, comprising the steps of: forming a first insulation film on a substrate to be processed; forming an organic film on the first insulation film; forming a second insulation film on the organic film; forming a via-hole penetrating the first insulation film, the organic film and the second insulation film; forming a sacrifice film consisting of inorganic material on the second insulation film so as to embed the sacrifice film in the via-hole; forming a resist film having a designated pattern on the sacrifice film; forming a trench reaching a top surface of the organic film in accordance with the designated pattern of the resist film; and removing both the resist film and an exposed part of the organic film to the trench, from the substrate to be processed, simultaneously by ashing, wherein a bottom surface of the trench is smoothed, and the sacrifice film serves as a protection against the ashing process for the second insulation film.