Patent ID: 7869289

Claim:
A semiconductor device comprising a transmission control circuit, said transmission control circuit comprising: a signal transmission circuit for receiving a predetermined signal in synchronization with a first control signal, transmitting said predetermined signal through a signal bus, and outputting said predetermined signal in synchronization with a second control signal; an output control circuit for supplying said second control signal to said signal transmission circuit and controlling an output timing at which said predetermined signal is outputted from said signal bus; a replica circuit for transmitting and outputting a replica signal through a replica signal bus having same transmission characteristics as said signal bus, said replica signal being shifted in level in response to an input timing of said predetermined signal based on said first control signal; and a detection circuit for detecting shifting between high and low levels of said replica signal outputted from said replica circuit, and supplying a feedback signal indicating a detection result to said output control circuit, wherein the output timing of said output control circuit is controlled in accordance with a timing at which the shifting of said replica signal is detected in said feedback signal.