Patent ID: 6950951

Claim:
Apparatus for processing data, said apparatus comprising: data processing circuits operable to perform data processing operations and powered by a power supply signal; a power controller operable to control said power supply signal supplied to said data processing circuits; wherein said power controller is operable to generate a power control signal to trigger generation of said power supply signal with a level operable to power said data processing circuits; said data processing circuits are responsive to an active signal to adopt a predetermined reset state independent of any preceding state; and said power controller is operable following generation of said power control signal to de-assert said active signal to said data processing circuits to force said data processing circuits to adopt said predetermined reset state until said power supply signal has said level operable to power said data processing circuits, whereupon said active signal is asserted such that said data processing circuits may commence data processing operation, wherein said data processing circuits form a first power domain and further data processing circuits form a least one further power domain, wherein inter-domain signals being passed between power domains are gated so as to be clamped at predetermined levels when an active signal is being asserted upon a power domain that is one of generating said inter-domain signals and receiving said inter-domain signals.