Patent ID: 7962732

Claim:
A instruction processing apparatus, comprising: a thread execution processing section that executes threads each including a plurality of instructions; a register file of a plurality of register files that includes a register window including a plurality of registers and is provided individually for each thread; a current window pointer that is provided individually for the thread and indicates a position of the register where the register window is possible to be inputted and outputted; a current register that is provided individually for the thread and reads out data held by the register window designated by the current window pointer from the register file to hold the data; a replacement buffer of a plurality of replacement buffers that is provided individually for each thread and holds data which is transferred from the register file to the current register; a first transfer path that transfers data in a register file selected from the plurality of register files to one of the plurality of replacement buffers; a second data transfer path that transfers data in a replacement buffer selected form the plurality of the replacement buffers to one of the plurality of current registers; a calculation section that is provided individually for the thread and executes a switching instruction of the register window; a control section that controls, if the calculation section executes the switching instruction included in the one of the plurality of threads, the first data transfer path and the second data transfer path, corresponding to the thread including the switching instruction; a decode section that decodes the instruction; and an execution section that executes an instruction other than the switching instruction which the calculation section executes, of the instructions decoded in the decode section and is capable of executing a plurality of instructions simultaneously, wherein the calculation section transfers, if the switching instruction is decoded by the decode section, the data to the replacement buffer, and transfers, if all the instructions to be completed before the switching instruction is completed are completed, the data to the current register.