Patent ID: 7018921

Claim:
A method of forming a metal line in a semiconductor device, comprising: (a) sequentially forming a first interlayer insulation film, an etch-stopping layer, and a second interlayer insulation film on a semiconductor substrate having a predetermined semiconductor structural layer; (b) forming a contact hole which partially exposes the semiconductor structural layer by performing an etching process using an etching mask for the contact hole; (c) forming a metal plug to bury the contact hole; (d) sequentially forming an anti-diffusion film and a third interlayer insulation film on the semiconductor device including the metal plug; (e) performing an etching process using an etching mask for a trench to form the trench in such a way that the second interlayer insulation film is over-etched by using the etch-stopping layer as an etching barrier; and (f) forming a metal line to bury the trench.