Patent ID: 7385870

Claim:
A semiconductor integrated circuit formed on a single chip semiconductor, comprising: a central processing unit; and an internal memory, wherein said central processing unit is operable to access said internal memory, wherein said internal memory includes a memory mat, an input/output unit, a control unit, a first power control unit, and a second power control unit, wherein said central processing unit is operable to access to said memory mat, wherein said input/output unit couples to said memory mat, wherein said control unit controls said internal memory, wherein said first power control unit couples to said input/output unit, and controls to provide a power supply voltage to said input/output unit, wherein said first power control unit controls to turn off a first switch which couples between said input/output unit and a reference potential, for stopping said power supply voltage to said input/output unit when said memory mat is un-selected, wherein said second power control unit couples to said control unit and said first power control unit, and controls to provide said power supply voltage to said control unit and said first power control unit, and wherein said second power control unit controls to turn off a second switch which couples between said control unit and said reference potential, and a third switch which couples between said first power control unit and said reference potential, for stopping said power supply voltage to said control unit and said first power control unit, after inputting a standby signal from said central processing unit.