Patent ID: 7851853

Claim:
A semiconductor device comprising: an element isolation region; an active region separated by the element isolation region; and a high-withstand voltage MOSFET formed in a high-withstand voltage active region of at least one section of the active region on a semiconductor substrate, wherein the high-withstand voltage MOSFET comprises a trench portion formed at the high-withstand voltage active region of a first conductivity type, two polysilicon layers formed on the high-withstand voltage active region on both sides of the trench portion by implanting an impurity of a second conductivity type opposite to the first conductivity type, two impurity diffusion drift layers positioned on the both sides of the trench portion and formed by implanting an impurity of the second conductivity in a surface of the high-withstand voltage active region under the polysilicon layers, and a gate electrode formed through a gate oxide film on bottom and side surfaces of the trench portion and an end surface facing the trench portion and an upper surface of an adjacent region of each of the polysilicon layers, the adjacent region being a part of the polysilicon layer close to the trench portion, and a source region and a drain region are formed in parts of the two polysilicon layers not covered with the gate electrode other than the adjacent regions.