Patent ID: 7791206

Claim:
A semiconductor device comprising: a wiring board; and at least one semiconductor element buried in the wiring board in a semiconductor element mount region, wherein the wiring board has an insulating base material having an upper and a lower surface with a direction extending from the upper surface to the lower surface being a thickness direction; an inner-side portion of a first protective film is formed on the lower surface of the insulating base material; a via hole is formed in a region around the semiconductor element to pierce the insulating base material and the inner-side portion of said first protective film in the thickness direction; the via hole is filled with a conductor; first and second conductor layers are formed on the inner-side portion of the first protective film and on the upper surface of the insulating base material, respectively, the first and second conductor layers are respectively connected to one end and another end of the conductor in the via hole, the first and second conductor layers have required pattern shapes and the first conductor layer is separated, in the thickness direction, from the lower surface of the insulating base material by the inner-side portion of the first protective film; an outer-side portion of the first protective film is formed for covering the inner-side portion of the first protective film and for covering the first conductor layer so as to sandwich, in the thickness direction, the first conductor layer between the outer-side portion and the inner-side portion of the first protective film, the outer-side portion of the first protective film is formed with a first pad portion exposed, the first pad portion being delimited in a portion of the first conductor layer which corresponds to the conductor in the via hole; a second protective film is formed for covering the insulating base material and the second conductor layer, the second protective film is formed with a second pad portion exposed, the second pad portion being delimited in a portion of the second conductor layer which corresponds to the conductor in the via hole; and the first conductor layer extends within the semiconductor element mount region, and the semiconductor element is placed with flip-chip technology with at least some of electrode terminals of the semiconductor element electrically connected to the first conductor layer at the portion of the first conductor layer extending within the semiconductor element mount region.