Patent ID: 7768041

Claim:
A field effect transistor (“FET”), comprising: a continuous active semiconductor region including only one channel region, a first source-drain region and a second source-drain region separated from said first source-drain region by said channel region, said channel region including mutually exclusive first and second portions being laterally adjacent to each other, and each said portion extending a part of a width of said channel region; an isolation region isolating the active semiconductor region from at least one other semiconductor device; a single gate conductor extending over said first and second portions of said channel region; a first liner overlying said first portion of said channel region, such that said first portion of said channel region has a first stress; and a second liner overlying said second portion of said channel region such that said second portion of said channel region has a second stress, wherein said first and second stresses are each selected from high tensile stress, high compressive stress and neutral stress, said first stress being different from said second stress.