Patent ID: 8205057

Claim:
A method for write hazard handling, the method comprising: pre-computing at least one memory management unit policy for at least one write request using at least one address that is at least one clock cycle before data; registering the at least one pre-computed memory management unit policy; using the at least one pre-computed memory management unit policy to control a pipeline stall of a pipeline to ensure that a non-bufferable write is pipeline-protected, so that no non-bufferable location is bypassed from within the pipeline, and so that a subsequent non-bufferable read will get data from a final destination; bypassing a read request only after a corresponding write request is updated in at least one write pending buffer; decoding the at least one write request with the at least one write request aligned to data; registering the at least one write request in the at least one write pending buffer; allowing arbitration logic in an arbiter to force the pipeline stall for a region that will have a write conflict; and stalling read requests to protect against write hazards.