Patent ID: 8097963

Claim:
An integrated circuit (IC) package, comprising: a semiconductor die including one or more contacts; a z-axis interconnect including a matrix of electrical conducting elements extending from a top surface of the z-axis interconnect to a bottom surface of the z-axis interconnect, wherein each electrical conducting element is internally insulated from other electrical connecting elements of the matrix, and wherein the one or more semiconductor die contacts are electrically coupled respectively to one or more sets of electrical conducting elements of the matrix by way of one or more electrical connections to the top surface of the z-axis interconnect; one or more external contacts electrically coupled respectively to the one or more sets of electrical conducting elements of the matrix by way of one or more electrical connections to the bottom surface of the z-axis interconnect; and an electrical insulating layer including one or more openings disposed over the top surface of the z-axis interconnect, wherein the one or more semiconductor die contacts are electrically coupled respectively to the one or more sets of electrical conducting elements of the matrix through the one or more openings in the first electrical insulating layer.