Patent ID: 7298650

Claim:
A page buffer for an electrically programmable memory that includes a plurality of memory cells forming a plurality of memory pages, the page buffer comprising: a register for at least temporarily storing data read from or to be written to the memory cells of a selected one of the memory pages, the register comprising: a plurality of latches, each of the latches being coupled to at least two signal lines for transferring a data bit that is stored in the latch, the at least two signal lines including a bitline that is coupled to a plurality of the memory cells and a data line that is coupled to an output interface of the memory; and a plurality of buffer elements, each of the buffer elements decoupling an output of a corresponding one of the latches from the signal lines, the buffer element including an input that is coupled to the output of the corresponding latch, and an output that is selectively coupled to both the bitline and the data line so as to selectively drive the bitline or the data line according to the data bit that is stored in the corresponding latch.