Patent ID: 8722518

Claim:
A method for forming a monolithic three dimensional memory array, the method comprising: a) forming a first memory level above a substrate by a method comprising: i) forming a plurality of first substantially parallel conductors extending in a first direction; ii) forming first pillars above the first conductors, each first pillar comprising a first conductive layer or layerstack above a vertically oriented diode, the first pillars formed in a single photolithography step; iii) depositing a first dielectric layer above the first pillars; iv) etching a plurality of substantially parallel first trenches in the first dielectric layer, the first trenches extending in a second direction, wherein, after the etching step, a lowest point in the trenches is above a lowest point of the first conductive layer or layerstack, wherein the first conductive layer or layerstack does not comprise a resistivity-switching metal oxide or nitride; and b) monolithically forming a second memory level above the first memory level.