Patent ID: 7652522

Claim:
A system, comprising: at least one basic stage, each of the at least one basic stage including a first section and a second section, the first section including at least a first pumping node, at least one pumping capacitor coupled with the at least first pumping node, at least one N-type device coupled with the at least one pumping node, and at least a first auxiliary capacitor and a second auxiliary capacitor and a second auxiliary capacitor for providing an overshoot for the at least one N-type device for at least one value of a plurality of clock signals, the first section including the at least first auxiliary capacitor and the at least one pumping capacitor receiving a first portion of the plurality of clock signals, the second section coupled with the first section and including at least a second pumping node, the plurality of clock signals including a second portion provided to the second section and a third portion provided to a bi-directional stage, the first section and the second section being configured to alternately charge and fully discharge based on the plurality of clock signals, the bi-directional stage including at least one pair of boosting capacitors, at least one pair of N-type devices, and an interface, the bi-directional stage allowing the system to operate in a positive configuration or a negative configuration, the interface being coupled with a first of the at least one basic stage, the interface being connected with an input voltage in the negative configuration and to an output voltage in the positive configuration, and wherein the first section further includes a first section initialization input, a first N-type device coupled to the first auxiliary capacitor and the at least one pumping node, a second N-type device coupled between the at least one pumping node and an output of the system, and a third N-type device coupled between the second auxiliary capacitor and the first section initialization input.