Patent ID: 8367501

Claim:
A method for making an insulator termination semiconductor device, comprising: a) applying a trench mask to a semiconductor substrate; b) etching the semiconductor substrate through the trench mask to form trenches TR 1 , TR 2 and TR 3 with three widths W 1 , W 2 and W 3 , respectively, wherein TR 3 is the narrowest trench, wherein the trench TR 1 surrounds the trenches TR 3 ; c) forming a conductive material in the trenches TR 3 to form gate electrodes and forming a conductive material in the trench TR 2 to form a gate runner; d) filling the trench TR 1 with an insulator material to form an insulator isolation trench that surrounds the gate electrodes; e) forming a body layer in a top portion of the entire substrate; f) forming a source layer in a top portion of the entire body layer; g) applying a insulator layer on top of the semiconductor substrate; h) applying a contact mask on top of the insulator layer; i) forming contact openings to the source layer and to the gate runner through the insulator layer; and j) forming source and gate metal regions on the insulator layer in electrical contact with the source and gate runner contacts respectively.