Patent ID: 7848167

Claim:
A circuit for flash memory voltage regulation, comprising: a resistor ladder that is arranged to provide a plurality of resistor ladder output voltages; a first multiplexer that is arranged to provide a coarse reference voltage by selecting one of the plurality of resistor ladder output voltages based on a coarse adjustment signal; a first fine series regulator controller that is arranged to control regulation an output voltage employing the coarse reference voltage as a reference voltage for the regulation of the output voltage, such that a value of the regulated output voltage is based in part on the coarse reference voltage, and further based in part on a fine adjustment signal, wherein the fine series regulator controller includes an error amplifier having at least a first input that is arranged to receive the coarse reference voltage, and a second input; a first resistor circuit that is coupled between the output node and the second input of the error amplifier; and a first current source that is arranged to provide a first current to the first resistor circuit, such that the first current is proportional to the fine adjustment signal.