Patent ID: 8656231

Claim:
A memory device comprising: a memory; and a memory controller comprising an encoder configured to (i) insert an indicator in data to be written to the memory, and (ii) subsequent to inserting the indicator in the data to be written to the memory, encode the data to be written into the memory, wherein the indicator is configured to indicate whether the data to be written to the memory is valid data, and subsequent to the data being encoded by the encoder, the memory controller is configured to write the encoded data to the memory, and a decoder configured to (i) read the encoded data from the memory, (ii) evaluate the indicator to determine if the encoded data that is read from the memory is valid data by counting a number of 1's in the encoded data read from the memory, and if the number of 1's counted is greater than a threshold, determine that the encoded data is valid data, wherein the encoded data has code values comprising a number of data bits N, and the threshold is equal to N/2, and (iii) if the encoded data that is read from the memory is valid data, generate read data from the encoded data that is read from the memory.