Patent ID: 8457853

Claim:
A circuit configuration for serial communication, comprising: a first half of the circuit configuration operatively configured to receive and emit at least one of sensing and actuating signals; a second half of the circuit configuration operatively configured to receive and emit the at least one of sensing and actuating signals; a two wire connecting line bi-directionally coupling the first half of the circuit configuration and the second half of the circuit configuration; and a wake-up switching device operatively configured to wake-up the first half of the circuit configuration and the second half of the circuit configuration from a standby mode without quiescent current, wherein the first half of the circuit configuration comprises: a first switching device for supplying a supply voltage of the first half of the circuit configuration; a first signal shaping device coupled to the first switching device, the first signal shaping device being operatively configured to shape a data signal on a data receiving line of the first half of the circuit configuration; a first transistor coupled to the first switching device, the first transistor being operatively configured to control a data communication on a data transmission line of the first half of the circuit configuration; a first low pass filter device operatively disposed in the data transmission line of the first half of the circuit configuration, wherein the second half of the circuit configuration comprises: a second switching device for switching a supply voltage of the second half of the circuit configuration; a second signal shaping device coupled to the second switching device, the second signal shaping device being operatively configured to shape a data signal on a data receiving line of the second half of the circuit configuration; a second transistor device coupled to the second switching device, the second transistor device being operatively configured to control a data communication on a data transmission line of the second half of the circuit configuration; and a second low pass filter device disposed in the data transmission line of the second half of the circuit configuration, wherein the wake-up switching device is operatively arranged in the first half of the circuit configuration and is operatively configured to shift the first switching device into a closing state, and upon shifting the first switching device into the closing state, the first transistor device is supplied with an operating voltage and an output of the first low pass filter attains a level such that the second switching device is shifted into a closing state.