Patent ID: 8586471

Claim:
A method for depositing two or more PVD seed layers for metallic interconnects over a substrate, the substrate includes a patterned insulating layer which comprises at least one opening surrounded by a field, said at least one opening has sidewalls, bottom, and top corners, and the method comprising: depositing a continuous PVD seed layer in a single step over the sidewalls and bottom of the at least one opening, using a first set of deposition parameters; and then depositing another PVD seed layer directly on the continuous PVD seed layer using a second set of deposition parameters, wherein: (i) the second set of deposition parameters includes at least one deposition parameter whose value is different in the first and second sets of deposition parameters; (ii) said at least one deposition parameter is selected from a group of deposition parameters consisting of substrate bias voltage, duration of deposition, background pressure, plasma power density, sputtering gas pressure, sputtering gas flow rate, cathodic voltage, and cathodic power; (iii) the continuous seed layer has a thickness in a range from about 20 Å to not more than 250 Å over the field; (iv) the combined seed layers leave sufficient room for electroplating inside the at least one opening and (v) at least one of the seed layers comprises a material selected from a group consisting of Cu, Ag, and alloys comprising at least one of these metals.