Patent ID: 7849260

Claim:
A storage system for controlling the input and output of data to and from a plurality of logical units between a plurality of host computers, and a storage apparatus that provides the logical units configured from physical storage devices for reading and writing data from and in the host computers, the storage system comprising: a first controller that includes a first cache memory and a first local memory for retaining a first command given from the host computers, wherein the first controller is configured to control the input and output of data to and from corresponding logical units based on the first command retained in the first local memory; a second controller that includes a second cache memory and a second local memory for retaining a second command given from the host computers, wherein the second controller is configured to control the input and output of data to and from corresponding logical units based on the second command; and an inter-controller connection path for connecting the first and second controllers in a communicable state; wherein each of the local memories stores association information representing a correspondence of the logical units and the first and second controllers; wherein each of the local memories stores address information of the first or second local memory as a self-system or another-system; and wherein the first controller is configured: to determine, upon receiving a third command sent from one host computer of the host computers, whether a target logical unit of the third command is associated with the first controller or the second controller based on the association information stored in the first local memory; to transfer, when the target logical unit is associated with the second controller, the third command to the second controller; and to store the third command in the second local memory based on the address information; wherein the second controller is configured: to monitor the second local memory; and to generate, upon recognizing that the third command is stored in the second local memory, a Direct Memory Access (DMA) list based on the third command; and to store the DMA list in the second local memory; to set a register in a host communication protocol chip in the first controller to boot the host communication protocol chip; to send a command to the first controller to perform data transfer according to the DMA list; wherein the first controller is further configured: to read the DMA list from the second local memory; to receive write data from the one host computer of the host computers; to store the write data in the first cache memory based on the DMA list; and to store the write data in the second cache memory.