Patent ID: 7386707

Claim:
A processor for sequentially executing a plurality of programs using a plurality of register value groups stored in a memory that correspond one-to-one with the programs, the programs stored in a main memory comprising: a plurality of register groups; a select/switch unit selecting one of the plurality of register groups as an execution target register group on which a program execution is based, and to switch the selection target every time a first predetermined period elapses; a restoring unit restoring, every time the switching is performed, one of the register value groups into one of the register groups that is not selected as the execution target register group; a saving unit saving, prior to the restoring, register values in the register group targeted for restoring, by overwriting a register value group in the memory that corresponds to the register values; and a program execution unit executing, every time the switching is performed, a program corresponding to a register value group in the execution target register group, wherein the first predetermined period is specified, based on table information in which a plurality of count values are arranged in an order, every time the selection is performed, using the count values in the order, wherein there exists a plurality of candidate register value groups that are candidates for the restoring, a unique priority level is corresponded to each candidate register value group, and the restoring unit determines, based on the priority levels, the restore target from the plurality of candidate register value groups, and performs the restoring, and wherein each candidate register value group is included in one of a plurality of restore groups, a unique estimated execution period is corresponded to each restore group, the restoring unit determines, for each restore group, a candidate register value group included in the restore group as the restore target, and the select/switch unit principally sets, as a time interval from an mth to an m+1 th performing of the switching, an estimated execution period of a restore group that includes a register value group in the execution target register group by the select/switch unit in the mth switching, where m is a natural number.