Patent ID: 7921550

Claim:
A process of fabricating a circuit structure, comprising: providing a first composite-layer structure, having: a first carrier substrate; a first circuit pattern, disposed on the first carrier substrate and having at least one first via pad; a first dielectric layer, disposed over the first carrier substrate and the first circuit pattern, and the first circuit pattern is embedded in the first dielectric layer; at least one first conductive via, passing through the first dielectric layer and connected to the first via pad; and at least one independent via pad, located at one end of the first conductive via away from the first via pad, and the first conductive via connects the independent via pad and the first via pad; providing a second composite-layer structure, having: a second carrier substrate; and a second circuit pattern, disposed on the second carrier substrate; pressing the first composite-layer structure, a second dielectric layer and the second composite-layer structure so that the second circuit pattern and the independent via pad are embedded in the second dielectric layer and the second dielectric layer is connected to the first dielectric layer; removing the first carrier substrate and the second carrier substrate to expose the first circuit pattern and the second circuit pattern; forming at least one first opening that passes through the second dielectric layer and exposes the independent via pad; and filling the first opening with conductive material to form a second conductive via that connects the independent via pad and the second via pad.