Patent ID: 7279747

Claim:
A semiconductor device comprising: a first conductivity type semiconductor substrate; a first conductivity type drift layer formed on a surface of said first conductivity type semiconductor substrate; a second conductivity type base region produced in said first conductivity type drift layer, said second conductivity type base region having a trench formed in a surface thereof; a trench-stuffed layer formed by stuffing said trench with an insulating material, so that substantially an entirety of said trench is stuffed with said insulating material; a second conductivity type column region formed in said first conductivity type drift layer and sited entirely beneath a bottom surface of said trench-stuffed layer, a center of said second conductivity type column region being axially aligned with a center of said trench-stuffed layer; a first conductivity type source region produced in said second conductivity type base region; and both a gate insulating layer and a gate electrode layer produced so as to be associated with said first conductivity type source region and said first conductivity type drift layer such that an inversion region is defined in said second conductivity type base region in the vicinity of both the gate insulating layer and the gate electrode layer.