Patent ID: 7476601

Claim:
A method of manufacturing a semiconductor structure, comprising the steps of: providing a substrate comprising a displaying region and a circuit driving region, wherein the display region has a first area and a second area spaced apart by a gap, and a third area located between the first area and the second area; forming a first patterned amorphous silicon layer on the first area and the second area of the substrate; forming an insulating layer covering the first patterned amorphous silicon layer and the substrate, wherein the portion of the insulating layer above the first and second areas is higher than the portion of the insulating layer above the third area; forming a second amorphous silicon layer on the insulating layer; and performing an annealing treatment by a laser forming a first patterned polysilicon layer on the first area and the second area, and a second patterned polysilicon layer on the third area, wherein a direction of a grain boundary of the second patterned polysilicon layer intersects a direction of the gap at an angle in a range from 5 degree to 85 degree.