Patent ID: 7698481

Claim:
A circuit coupled to a port of a storage network having a loop architecture, said circuit comprising: a read/write pointer controller configured to provide a FIFO level indicator to track a total number of transmission words stored in a FIFO array; a dynamic threshold controller, responsive to said FIFO level indicator and to transmission word insert and delete commands, configured to track transmission word insertions and deletions in said FIFO array for a predetermined time period and provide a transmission word threshold level adjustment signal based on said tracked transmission word insertions and deletions for said predetermined time period and a transmission word threshold level; and a FIFO threshold adjuster, responsive to the FIFO level indicator and the transmission word threshold level adjustment signal, to provide the transmission word insert and delete commands based on both a data transmission rate difference between received input data and transmitted output data and the FIFO level indicator and to adjust the transmission word threshold level based on the transmission word threshold level adjustment signal, wherein the transmission words are maintained to account for the data transmission rate difference between received input data and transmitted output data.