Patent ID: 7610436

Claim:
A semiconductor device, comprising: a flash memory having a plurality of blocks; a controller configured to be accessible to said flash memory; and a data length table configured to store an identifier that corresponds to a kind of data from a plurality of data, and a data length of said kind of data from the plurality of data, wherein a specific block from said plurality of blocks stores said plurality of data and the identifier that corresponds to the kind of data from the plurality of data, wherein the specific block comprises a plurality of sections, wherein, if a latest data of a specific kind should be read out, said controller sequentially traces said plurality of sections while holding or updating an address of an identifier that corresponds to a traced section as a target address, wherein said plurality of sections are continuous, wherein each of said plurality of sections stores said kind of data from the plurality of data and the identifier that corresponds to said kind of data from the plurality of data, wherein in each of said plurality of sections, said identifier that corresponds to said kind of data from the plurality of data is stored in a head address and said kind of data from the plurality of data is stored in a subsequent address region to said head address, wherein said controller finds out a free area in said specific block by sequentially tracing said identifier that corresponds to said kind of data from the plurality of data in each of said plurality of sections while referring to said data length table, and wherein the controller sequentially traces the plurality of sections if said identifier that corresponds to the traced section is coincident with an identifier for the specific kind, and reads out said latest data from the held or updated target address.