Patent ID: 7244671

Claim:
A method of metallizing an integrated circuit chip including a substrate, a conductive pad on the substrate, and an insulating layer on the substrate wherein the insulating layer has a via hole therein exposing a portion of the conductive pad, the method comprising: forming a conductive structure on the insulating layer and on the exposed portion of the conductive pad, the conductive structure including a base layer comprising titanium-tungsten (TiW) and a conduction layer comprising at least one of aluminum and/or copper, wherein the base layer of the conductive structure is between the conduction layer and the insulating layer wherein a portion of the conductive pad is exposed between the insulating layer and the conductive structure wherein forming the conductive structure on the insulating layer comprises, forming a layer of titanium-tungsten on the insulating layer and on the exposed portions of the conductive pad, forming the conduction layer comprising at least one of aluminum and/or copper on the layer of titanium-tungsten so that portions of the layer of titanium-tungsten layer are exposed, and after forming the conduction layer comprising at least one of aluminum and/or copper, removing portions of the layer of titanium-tungsten exposed by the conduction layer comprising at least one of aluminum and/or copper.