Patent ID: 7764214

Claim:
An analog-to-digital (A-D) converter, which converts an analog signal into a digital signal from a higher-order bit toward a lower-order bit through a plurality of times of conversion processings, the A-D converter comprising: a sub-A-D converter circuit which converts a sampled analog signal into a digital signal of a predetermined number of bits; and a D-A converter circuit which converts the digital signal converted by said sub-A-D converter circuit into an analog signal to generate a residual signal to be processed by a subsequent conversion processing, wherein the analog signal generated by the D-A converter is to be removed from the analog signal to be converted by said sub-A-D converter circuit wherein said D-A converter circuit is of a capacitor array type, and wherein the capacitor array includes a plurality of capacitors, wherein a reference voltage top level or a reference voltage bottom level corresponding to the digital signal converted by said sub-A-D converter circuit is supplied to capacitors excluding at least one capacitor, and an offset compensation voltage used to compensate for at least part of an offset voltage added to analog signal sampled by said sub-A-D converter circuit is supplied to said at least one capacitor.