Patent ID: 8832046

Claim:
An apparatus, comprising: a memory; and a processor device operatively coupled to the memory and configured to: decompose data into one or more blocks, each block containing at least one data record; encode the at least one data record within a given one of the one or more blocks with a first encoding process selected from one or more encoding processes; associate the first encoding process with the given block; evaluate whether or not to implement an encoding change for the given block containing a given data record when updating the given data record, wherein updating the given data record comprises at least one of inserting data into, updating data in, and deleting data from the given data record; re-encode the given block containing the given data record with a second encoding process responsive to said evaluating step; update the association of the given block responsive to said re-encoding step; and form a map to convert the given data record encoded with the first encoding process to the second encoding process; wherein the given data record encoded with the first encoding process has one or more comparative relationships with one or more other data records encoded with the first encoding process; and wherein the map is formed so as to preserve, for the given data record encoded with the second encoding process, the one or more comparative relationships of the given data record encoded with the first encoding process.