Patent ID: 8738971

Claim:
A data processing apparatus for processing data, said data processing apparatus being configured to operate in a voltage and frequency operating region that is located beyond a safe region where errors do not arise, but within operating region limits such that said errors are rare, said data processing apparatus comprising: error detection circuitry and error recovery circuitry; said error detection circuitry being configured to determine if a signal sampled in said processing apparatus changes within a time window occurring after said signal to has been sampled and during a same clock cycle as said sampling and to signal an error if said signal does change; said data processing apparatus comprising performance control circuitry configured to determine when said data processing apparatus is operating close to said operating region limits where an error rate is raised and in response to determining operation close to said operating region limits to modify a behaviour of said data processing apparatus by at least one of: limiting speculative processing, and selecting timing insensitive processing paths and circuitry.