Patent ID: 7042105

Claim:
A wafer stack defining a plurality of die assemblies, said wafer stack comprising: a first wafer including a first component; a second wafer arranged in an overlying relationship with said first wafer, said second wafer being bonded to said first wafer, said first component being arranged adjacent to said second wafer; and a third wafer, the second wafer being arranged at least partially between the first wafer and the third wafer; said first wafer and said second wafer defining a gap therebetween, said gap being arranged in an overlying relationship with said first component, said gap being configured to enable a partial through-cut of said second wafer in a vicinity of said gap such that said first component is not damaged during formation of the partial through-cut; wherein a first die assembly of the plurality of die assemblies is defined by at least a portion of said first wafer and at least a portion of said second wafer; wherein said second wafer has a second component, said third wafer defining a recessed portion arranged in an overlying relationship with said second component, said recessed portion of said third wafer being configured to enable a partial through-cut of said third wafer in a vicinity of said recessed portion of said third wafer such that said second component is not damaged during formation of the partial through-cut of said third wafer.