Patent ID: 7239023

Claim:
A package assembly for an electronic device having edges, comprising: a substrate having a first surface with a first plurality of contact pads and a second plurality of contact pads, a second surface with a plurality of connection pads, and a plurality of via holes connecting said first plurality of contact pads and said plurality of connection pads; and a buffer layer between said substrate and said electronic device, and a surface of said electronic device having electrodes being opposite to said first surface of said substrate, said buffer layer having an opening to expose said first plurality of contact pads, wherein said buffer layer has a first part with a first density and a second part with a second density, said first density greater than said second density, wherein said second part of said buffer layer seals said edges of said electronic device and said first part of said buffer layer is configured with said electronic device such that said buffer layer functions as a self-planarization buffer between said electronic device and said substrate for increasing the hermeticity thereof.