Patent ID: 8470662

Claim:
A method for manufacturing a semiconductor device, comprising: providing a semiconductor substrate having an NMOS region and a PMOS region; forming a first gate stack in the NMOS region on the semiconductor substrate, and forming a second gate stack in the PMOS region on the semiconductor substrate, wherein the formation of the first gate stack comprises forming a first high-k gate dielectric layer and a first metal gate electrode thereon, and the formation of the second gate stack comprises forming a second high-k dielectric layer and a second metal gate electrode thereon; forming a buffer layer on sidewalls of both of the first gate stack and the second gate stack, wherein the buffer layer is formed of a low-k dielectric material; removing the buffer layer on sidewalls of the first gate stack, and only keeping the buffer layer on sidewalls of the second gate stack; forming a first sidewall spacer on sidewalls of the first gate stack, and forming a second sidewall spacer on sidewalls of the buffer layer; forming a source region and a drain region for each of the NMOS region and PMOS region in the semiconductor substrate; and annealing the device in an oxygen environment, such that oxygen in the oxygen environment being diffused into the second high-k gate dielectric layer of the second gate stack through the buffer layer.