Patent ID: 7358132

Claim:
A method of fabricating a semiconductor device, the method comprising: forming a silicon layer and a collector contact on a buried collector layer; forming an oxide dummy pattern on the silicon layer, the oxide dummy pattern defining an extrinsic base and an intrinsic base; forming a polycide layer on the resultant structure having the dummy pattern, the polycide layer being used as the extrinsic base; selectively removing the polycide layer such that the dummy pattern is exposed; completely removing the exposed dummy pattern such that the silicon layer is exposed; growing an epitaxial layer on both the exposed silicon layer and the polycide layer, the epitaxial layer being used as the intrinsic base; removing the epitaxial layer from a top of the polycide layer; conformally depositing an oxide layer and a nitride layer in sequence on both the extrinsic base and the intrinsic base; blanket-etching the nitride layer to form spacers defining an emitter; forming a photoresist pattern to mostly cover the oxide layer and partly expose the oxide layer between the spacers over the intrinsic base; etching the oxide layer by using the photoresist pattern and the spacers as an etch mask; and forming the emitter connected to the intrinsic base.