Patent ID: 7968915

Claim:
A method of fabricating a semiconductor structure, comprising: providing a semiconductor substrate; forming at least one p-type field effect transistor (PFET) and at least one n-type field effect transistor (NFET) on said semiconductor substrate; forming a stress-transmitting dielectric layer directly on said at least one PFET and said at least one NFET; forming a tensile stress generating film directly on said stress-transmitting dielectric layer in an area overlying said at least one NFET; forming a compressive stress generating film directly on said stress-transmitting dielectric layer and only overlying said at least one PFET, wherein said compressive stress generating film applies a compressive stress having magnitude from about 5 GPa to about 20 GPa to a structure underneath; and forming an encapsulating dielectric film directly on said compressive stress generating film and said tensile stress generating film.