Patent ID: 7501854

Claim:
A True/Complement circuit, comprising: a True/Complement generator that outputs True and Complement signals; a pulse generator that provides a clock signal to the True/Complement generator; a latch coupled to receive a data input signal and output a latched data signal to said True/Complement generator; a bypass data path that provides a bypass data signal to said True/Complement generator; and a select input coupled to the True/Complement generator that provides a select signal to said True/Complement generator to cause the True/Complement generator to select among the bypass data signal and latched data signal as a data input signal for which the True/Complement generator generates the True and Complement signals; wherein the True/Complement generator includes: a self-resetting dynamic output stage that generates the True and Complement signals in response to receipt of a fire signal; and an input stage that generates the fire signal, wherein the input stage generates the fire signal utilizing a plurality of logic gates that provide reciprocal gating between the data input signal and a derivative clock signal derived from the clock signal.