Patent ID: 7232693

Claim:
A method for manufacturing a ferroelectric memory, comprising: preparing a semiconductor substrate formed with a MOSFET; depositing a first interlayer insulating film on the semiconductor substrate; forming a conductive plug in the first interlayer insulating film, the conductive plug being in electrical contact with the MOSFET; sequentially laminating a first conductor layer, a ferroelectric layer and a second conductor layer over the first interlayer insulating film to form a capacitor forming laminated film; processing the second conductor layer to form an upper electrode and sequentially processing the ferroelectric layer and the first conductor layer to form a ferroelectric thin film and a lower electrode respectively, thereby forming a ferroelectric capacitor from the capacitor forming laminated film; forming a second interlayer insulating film on a first structure provided with the semiconductor substrate, the first interlayer insulating film and the ferroelectric capacitor so as to embed the ferroelectric capacitor therein; forming, in the second interlayer insulating film, openings that expose the conductive plug and the ferroelectric capacitor for electrical connection with an external circuit of the ferroelectric memory, to form a second structure; forming a metal wiring on the second interlayer insulating film of the second structure and in the openings to form a third structure, the metal wiring electrically connecting the conductive plug, the ferroelectric capacitor and the external circuit; and thermally treating the third structure in an oxygen atmosphere from over 350° C. to under 450° C.