Patent ID: 7626881

Claim:
A semiconductor memory device to which an external power supply voltage is applied, comprising: a first internal power supply generation circuit that boosts the external power supply voltage to generate a first internal power supply; a memory core to which the first internal power supply is supplied; an antifuse memory in which predetermined information is written; and a write voltage generation circuit that boosts the first internal power supply to generate an antifuse write voltage, wherein writing to an antifuse of the antifuse memory is performed by applying the antifuse write voltage thereto, wherein the first internal power supply generation circuit boosts the first internal power supply to a first potential when the memory is in an active state, and wherein the semiconductor memory device includes an antifuse write control circuit for controlling the first internal power supply generation circuit so that the first internal power supply boosts to a second potential that is higher than the first potential during antifuse writing.