Patent ID: 7477105

Claim:
An amplifier arrangement, comprising: a control logic circuit; a first branch, comprising: a first transistor comprising a control terminal coupled to the control logic circuit, and configured to receive a first signal at the control terminal, and comprising a first terminal coupled to a reference-potential terminal, and a second terminal; and a first cascode transistor comprising a control terminal, a first terminal coupled to the second terminal of the first transistor, and a second terminal; a second branch, comprising: a second transistor comprising a control terminal coupled to the control logic circuit, and configured to receive a second signal at the control terminal, and comprising a first terminal coupled to the reference-potential terminal, and a second terminal; and a second cascode transistor comprising a control terminal, a first terminal coupled to the second terminal of the second transistor, and a second terminal; and a current combiner coupled to the second terminal of the first cascode transistor and the second terminal of the second cascode transistor, and configured to combine the currents associated with the first and second cascode transistors, and provide the combined current at an output terminal of the amplifier arrangement, wherein the control logic circuit is configured to provide the first and the second signal as digital signals, and wherein the second signal has a phase difference of approximately 180 degrees with respect to the first signal.