Patent ID: 7451337

Claim:
A system for synchronizing clock signals, the system comprising: a clock unit, wherein the clock unit is coupled to receive a reference clock signal and to output a plurality of domain clock signals, wherein each of the domain clock signals has a different frequency with respect to the other domain clock signals, the clock unit including a plurality of domain clock units each configured to provide a corresponding one of the domain clock signals; a synchronization unit, wherein the synchronization unit is configured to receive the reference clock signal, wherein the synchronization unit is configured to assert and provide, to each of the plurality of domain clock units of the clock unit, a synchronization pulse at a rate equivalent to a beat frequency of the plurality of domain clock signals, the beat frequency being a frequency in which a given cyclic pattern of the plurality of domain clock signals repeats itself with respect to the reference clock signal, and wherein the clock unit is configured to align with each other clock signal edges of the plurality of domain clock signals and the reference clock signal responsive to receiving the synchronization pulse.