Patent ID: 7319062

Claim:
A trench isolation method comprising: forming a trench in a semiconductor substrate using a mask pattern defining an active area; sequentially stacking an oxide layer and a nitride pad layer on the sidewall of the trench and forming an insulation layer in the trench; removing the mask pattern down to the upper surface of the semiconductor substrate of the active area; and forming a capping layer of an insulating material, the capping layer filling a recess at the upper edge of the trench, the recess generated by etching the nitride pad layer formed on the sidewalls of the trench during removing the mask pattern, wherein the capping layer is formed by forming an insulating material by self epitaxial growth (SEG), and then removing the insulating material layer down to the upper surface of the semiconductor substrate of the active area so that only the insulating material layer filled in the recess is exposed.