Patent ID: 8767107

Claim:
A solid-state imaging device comprising: a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion; a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit; a regulator supplying a driving voltage to the logic unit; a first chip; a second chip; and a stacked structure in which both the first chip and the second chip are bonded, wherein the first chip has the pixel array unit disposed therein, wherein the second chip has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation unit generating a reference voltage, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage of the plurality of output stage transistors, wherein an output of operational amplifier is connected to a gate of the plurality of output stage transistors, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier, wherein the power source side terminal of the plurality of output transistors is connected respectively to the power supply terminal to be supplied with an external power voltage, and wherein the operational amplifier controls the gate voltage of the plurality of output stage transistors by comparing the reference voltage and the commonized output voltage at the node of the plurality of output stage transistors.