Patent ID: 8086761

Claim:
A serial peripheral interface (SPI) control device, the SPI control device in communication with a processor and a plurality of SPI slave devices, the SPI control device comprising: an SPI communication interface operable to connect the SPI control device with the plurality of SPI slave device; a command word register operable to determine an SPI slave device to be operated, and set an operation type of the determined SPI slave device, the operation type comprising a read operation and a write operation; a control word register operable to set a clock rate, a clock phase, and a clock polarity of the determined SPI slave device; a clock generator operable to generate a clock signal according to the clock rate, the clock phase, and the clock polarity of the determined SPI slave device; and a logic control unit operable to perform the read operation or the write operation on the determined SPI slave device according to the clock signal through the SPI communication interface.