Patent ID: 8796788

Claim:
A device, comprising: a semiconductor substrate; a gate structure over the semiconductor substrate; spacers overlying opposite sidewalls of the gate structure; lightly doped source/drain (LDD) regions in the semiconductor substrate, interposed by the gate structure; source/drain (S/D) regions in the semiconductor substrate, adjacent to the LDD regions and partially under the spacers, wherein each of the S/D regions comprises: a first portion adjacent to a top surface of the semiconductor substrate; a second portion surrounding the first portion; and a third portion between the second portion and the semiconductor substrate, wherein the second portion has a composition different from the first and third portions; and contact features over the S/D regions, wherein the first, second, and third portions are formed in a trench of the semiconductor substrate, the trench comprises: a first sidewall section extending obliquely downward from the top surface of the semiconductor substrate and away from a center of the trench, a second sidewall section further extending obliquely downward from the first sidewall section and toward the center of the trench, and a bottom connected to the second sidewall section, and the third portion includes: an upper part included in a tip portion of the trench, the tip portion defined by the first and second sidewall sections, and a lower part on the bottom of the trench, the lower part physically discontinuous from the upper part.