Patent ID: 7620109

Claim:
In a computer system, a computer-implemented method performed by a video decoder comprising: receiving encoded video data in a bitstream for a video sequence; and decoding a video frame of the video sequence using the encoded video data, wherein the decoding includes: buffering a reference video frame; and performing motion compensation for at least part of a current video frame relative to the reference video frame, which is buffered in memory, including computing a final value at a particular sub-sample position using multiple stages of interpolation based at least in part upon one or more intermediate values at one or more proximate sub-sample positions, wherein the final value has a final dynamic range of x bits, wherein the one or more intermediate values have an intermediate dynamic range of y bits after being bit shifted by at least one bit by a processor, wherein y is greater than x, wherein the computing includes deferring a portion of bit shifting from an earlier stage of the multiple stages of interpolation to a later stage of the multiple stages of interpolation, and wherein the bit shifting performed in the earlier stage and the deferred portion of bit shifting vary in amount for different degrees of sub-sample shift, the amount of bit shifting performed in the earlier stage and the amount of bit shifting deferred enabling an available bit depth of a desired target architecture to be fully utilized but not exceeded during the later stage of the multiple stages of interpolation.