Patent ID: 8680820

Claim:
A power factor correction booster circuit comprising: a first AC input node for connection to an AC power source; a second AC input node for connection to the AC power source; a first power transistor having a first node in connection with the first AC input node; an inductor having a first node in connection with a second node of the first power transistor; a second power transistor having a first node in connection with a second node of the inductor and a second node in connection with the second AC input node; a first semiconductor diode having an anode in connection with the second node of the inductor; a first output capacitor having a first node in connection with a cathode of the first semiconductor diode and a second node in connection with the second AC input node; and a control circuit that controls the first and second power transistors such that, in a first forward mode, the second power transistor conducts current to store energy from the AC power source in the inductor and, in a first flyback mode, the second power transistor blocks current to transfer the stored energy from the inductor to the first output capacitor through the first semiconductor diode.