Patent ID: 7705455

Claim:
A semiconductor device composing a desired semiconductor circuit is configured by laminating a plurality of substrates and electrically connecting semiconductor circuit units formed on the respective substrates together, wherein an upper substrate of the plurality of substrates having: a main surface and an undersurface that are oppositely positioned along a thickness direction of the upper substrate; an element that is formed on the main surface of the upper substrate and configures the semiconductor circuit unit; a through interconnect portion penetrating from the main surface to the undersurface of the upper substrate and electrically connecting the semiconductor circuit units on the plurality of substrates together; and a through isolation portion that is provided at a position on the main surface of the upper substrate away from the through interconnect portion so as to surround the through interconnect portion and penetrates from the main surface through the undersurface of the upper substrate, a lower substrate of the plurality of substrates having: a main surface and an undersurface that are oppositely positioned along a thickness direction of the lower substrate; an element that is formed on the main surface of the lower substrate and configures the semiconductor circuit unit; and a bump that is formed on the main surface of the lower substrate and is electrically connected to the semiconductor circuit unit, the semiconductor circuit unit of the upper substrate and the semiconductor circuit unit of the lower substrate are electrically connected to each other by jointing the through interconnect portion exposed from the undersurface of the upper substrate to the bump on the main surface of the lower substrate, with the through interconnect portion and the bump being in contact with each other.