Patent ID: 8872575

Claim:
A semiconductor device comprising a restoring circuit for a PMOS transistor, comprising, a restoring loop comprising, an NMOS transistor, having a gate, a source connected to a gate of the PMOS transistor, and a drain connected to a pre-determined NMOS drain voltage; wherein the NMOS drain voltage is higher than the PMOS source voltage; a first resistor with one end connected to the NMOS gate and another end connecting to the PMOS gate; and; a bi-level input voltage signal to the NMOS gate, wherein the low level input signal keeps the PMOS gate at a low voltage, wherein the high level input signal turns on the NMOS transistor and increases the PMOS gate voltage above the PMOS source voltage to enable the PMOS to restore; and wherein when the input voltage signal is at said high level, the voltage at the gate of the PMOS is higher than the input signal voltage.