Patent ID: 7320916

Claim:
A manufacturing method of a semiconductor device, comprising: providing a semiconductor substrate; performing a first ion implantation into the substrate to form a p-type impurity diffusion region; performing a second ion implantation into the substrate to form an n-type impurity diffusion region; forming an interlayer insulating film on the p-type impurity diffusion region and the n-type impurity diffusion region after the first and second ion implantations; forming a contact hole in the interlayer insulating film to expose at least part of n-type impurity diffusion region and part of the p-type impurity diffusion region; performing a third ion implantation into the exposed p-type impurity diffusion region and the exposed n-type impurity diffusion region through the contact hole of the interlayer insulating film, the third ion implantation being of a p-type impurity; and depositing a high melting point metal layer on the interlayer insulating film so that the high melting point metal layer is connected with at least the p-type impurity diffusion region through the contact hole of the interlayer insulating film.