Patent ID: 6881618

Claim:
A method of manufacturing a semiconductor device having an NMOS and a PMOS, comprising: forming a gate insulating film on a semiconductor substrate; forming a semiconductor film on said gate insulating film; forming a mask for covering an area where said PMOS is formed, introducing phosphorus onto a corresponding portion of said semiconductor film to an area where said NMOS is formed, and performing an ion implantation of arsenic or antimony at such an energy as a projection range into the middle of said semiconductor film to said area where said NMOS is formed; removing said mask and introducing boron onto the corresponding portion of said semiconductor film to the area where said NMOS is formed, and the corresponding portion of said semiconductor film to the area where said PMOS is formed; forming a metallic nitride film on said semiconductor film on the areas where said NMOS and said PMOS are formed; working a stacked film containing said semiconductor film and said metallic nitride film to form each gate electrode of said NMOS and said PMOS; and performing an annealing in a nitrogen atmosphere or in a hydrogen atmosphere with water vapor added thereto.