Patent ID: 7569854

Claim:
A semiconductor device comprising: a pixel TFT provided over a substrate and comprising a channel formation region, an n type impurity region having a first concentration, disposed in contact with the channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having a second concentration and disposed outside the n type impurity region having the first concentration; a p channel type TFT of a driving circuit provided over the substrate and comprising a channel formation region and a p type impurity region having a third concentration, for forming a source region or a drain region; an n channel type TFT of the driving circuit provided over the substrate and comprising a channel formation region, an n type impurity region having the first concentration, disposed in contact with the channel formation region and forming an LDD region, and an n type impurity region for forming a source region or a drain region, having the second concentration and disposed outside the n type impurity region having the first concentration; a protective insulation film provided over a gate electrode of the pixel TFT; an inter-layer insulation film provided over the protective insulation film and comprising an organic resin to provide a level surface over the pixel TFT; and a pixel electrode having a light reflecting surface and provided over the inter-layer insulation film and connected to the pixel TFT through a first hole bored in at least the protective insulation film and the inter-layer insulation film, wherein the p channel type TFT of the driving circuit has an offset region formed between the channel formation region and the p type impurity region having the third concentration, for forming the source region or the drain region, and wherein a columnar spacer is formed over a second hole bored in at least the protective insulation film and the inter-layer insulation film in the driving circuit.