Patent ID: 7417281

Claim:
A semiconductor device comprising: a semiconductor substrate; a plurality of first diffusion regions arranged apart from one another substantially in line on the semiconductor substrate; a plurality of memory cell gate electrodes insulatively formed on the semiconductor substrate between the first diffusion regions disposed adjacent to each other; a second diffusion region formed adjacent to and apart from an end of the plurality of first diffusion regions formed substantially in line on the semiconductor substrate; a selection gate electrode insulatively formed on the semiconductor substrate between the end of the first diffusion regions and the second diffusion region; a peripheral gate electrode insulatively formed on the semiconductor substrate apart from the plurality of memory cell gate electrodes and the selection gate electrode; a first insulation film free from nitrogen, filled between adjacent ones of the plurality of memory cell gate electrodes and between an end of the plurality of memory cell gate electrodes and the selection gate electrode, and formed on a side surface of the peripheral gate electrode; and a second insulation film including nitrogen, formed on the side surface of the peripheral gate electrode via the first insulation film and on regions other than between the adjacent ones of the plurality of memory cell gate electrodes and between the end of the plurality of memory cell gate electrodes and the selection gate electrode, and formed on a side surface of the selection gate electrode, which is in contact with the second diffusion region, without interposing the first insulation film.