Patent ID: 7720632

Claim:
A dimension measuring apparatus used for measuring a dimension of a semiconductor device having a first pattern of repeated structure and a second pattern that is linear and formed on the first pattern to extend over the repeated structure, comprising: a shape information acquisition means, which acquires information on a shape of the first pattern; a width value acquisition means, which acquires a width value of each portion of the second pattern on a basis of an observation result of the second pattern by a microscope; an analytic area setting means, which sets a plurality of analytic areas on the second pattern such that the analytic areas are adapted for the first pattern's shape acquired by the shape information acquisition means; and a dimension determining means, which extracts, for each of the set analytic areas, width values of portions included in the analytic area in question out of width values acquired by the width value acquisition means, and uses the extracted width values to determine a dimension of the second pattern at portions overlapping the first pattern.