Patent ID: 7098709

Claim:
A clock generator comprising: a charge pump for inputting/outputting charges depending on oscillation frequency difference of a reference clock signal and an output clock signal; a loop filter including a first capacitance section which charges/discharges charge inputted/outputted from the charge pump, the loop filter outputting smoothed phase balanced voltage; an oscillator section for outputting the output clock signal of which oscillation frequency depends on the phase balanced voltage; and a modulator circuit for modulating the phase balanced voltage within a dead band region of the charge pump by changing a capacitance value of the loop filter including the first capacitance section; the modulator circuit comprising: at least one second capacitance section; a charge/discharge route for being established when the second capacitance section is charged/discharged at predetermined voltage for being separated from the first capacitance section; and a charge distribution route for being established when the charge charged/distributed in the second capacitance section via the charge/discharge route is distributed with the first capacitance section.