Patent ID: 8288660

Claim:
A multi-layer circuit board, comprising: a first conductive layer having a substantially continuous region; a second conductive layer spaced from the first conductive layer with a dielectric material between the first and second conductive layers, the second conductive layer having a periodically patterned region including a plurality of spaced-apart conductive patches interconnected by conductive branches, the substantially continuous region of the first layer spanning at least the periodically patterned region of the second layer; and a third conductive layer spaced from the second conductive layer in a direction away from the first conductive layer with a dielectric material between the second and third conductive layers, the third conductive layer having a slotted region including slots aligned with spaces between the patches in the periodically patterned region, wherein the first and third conductive layers are the nearest conductive layers on either side of the second conductive layer.