Patent ID: 8266408

Claim:
A method of handling memory access requests in a digital memory system, said digital memory system comprising a plurality of memory banks wherein each of said plurality of memory banks may operate concurrently and independent of each other, said method comprising: receiving a first memory access request, said first memory access request identifying a first virtualized memory address in a virtualized memory address space; using said virtualized memory address as an index into a changeable memory mapping table to obtain a first memory bank identifier that identifies a first memory bank of said plurality of memory banks currently storing data associated with said first virtualized memory address, said digital memory system having a physical address space larger than said virtualized memory address space; handling said first memory access request by accessing said first memory bank using a first physical memory address, said first physical memory address comprising said first memory bank identifier and a subset of said first virtualized memory address; simultaneously receiving a second memory access request along with said first memory access request, said second memory access request comprising a write operation, said second memory access request identifying a second virtualized memory address in said virtualized memory address space; writing data from said second memory access request to a new second physical memory address in a second memory bank if a second physical address currently associated with said second virtualized memory address is located within said first memory bank being used to service said first memory access request; and updating said changeable memory mapping table to associate said new second physical memory address with said second virtualized memory address.