Patent ID: 8249209

Claim:
A method of transmitting data using a device that comprises one or more processors, one or more memories coupled to at least one of the processors, and one or more transmitters coupled to at least one of the processors, the method comprising: storing first data in at least one of the memories; and at least one of the processors executing instructions to cause one or more of the transmitters to emit information representing a bit stream, the bit stream comprising a distinct start sequence, first data segment, and end sequence; wherein: the first data segment comprises the first data encoded using the clock period; a second data segment consists of the start sequence and the end sequence; the second data segment comprises synchronization data and data related to the clock period; the first data segment immediately follows the start sequence; the end sequence immediately follows the first data segment; the clock period is encoded into a pulse width of bits in the start sequence and the end sequence; each bit of the bit stream is assigned a set clock period, the duration of the clock periods being identical for all bits in the bit stream; the first data segment comprises at least one escape sequence; the end sequence comprises a contiguous sequence of bits that is permitted to be transmitted only in the end sequence; and encoding comprises inserting the at least one escape sequence into the first data segment in place of a pattern of bits in the first data the comprises the contiguous sequence of bits.