Patent ID: 8681500

Claim:
An integrated circuit chip arrangement comprising: a substrate having a thickness and extending laterally perpendicular to the thickness, the substrate having a topmost surface and a bottom surface, the bottom surface having a conductive pad; a first circuit disposed on the topmost surface of the substrate; a support layer of carbon nanotube material in the substrate and below the topmost surface, the support layer configured and arranged to structurally support the substrate and the first circuit, the carbon nanotube material embedded in an epoxy resin, wherein the support layer includes a top portion having a first set of carbon nanotubes elongated in a first direction, a bottom portion having a second set of carbon nanotubes elongated in the first direction, and a middle portion extending from the top portion to the bottom portion and having a third set of carbon nanotubes elongated in a second direction that is substantially perpendicular to the first direction, wherein the first set of carbon nanotubes are disposed closer to the topmost surface of the substrate and arranged for supporting the first circuit than the second and third sets of carbon nanotubes, wherein at least one carbon nanotube from the third set of carbon nanotubes physically contacts at least one carbon nanotube from the first set of carbon nanotubes and wherein the at least one carbon nanotube from the third set of carbon nanotubes physically contacts at least one carbon nanotube from the second set of carbon nanotubes.