Patent ID: 7466590

Claim:
A method for programming a memory system, said system comprising strings of charge storage transistors for storing different charge states, each of said strings including two select transistors, each of said strings connected between one of a plurality of bit lines and a source line, said strings controlled by a common set of word lines, wherein a first charge storage transistor is in a first string of the strings and adjacent to one of the two select transistors in the first string, said method comprising: applying a program voltage level through one of the word lines to a control gate that is capacitively coupled with a second charge storage transistor in a second string of the strings different from the first string to program the second transistor, said second transistor separated from the source line by three or more charge storage transistors in said second string when charge storage transistors closer to the source line than the bit line connected to the second string are programmed or separated from the bit line that is connected to the second string by three or more charge storage transistors in said second string when charge storage transistors closer to such bit line than the source line are programmed, said control gate controlling also to a third charge storage transistor in the first string; coupling first voltage(s) to the first transistor and to one or more additional charge storage transistors that is or are different from the select transistors in the first string and adjacent to the first transistor; turning off at least a fourth charge storage transistor in the first string between the source line and the third transistor, in order to electrically isolate the third transistor from transistors in the first string between the source line and the fourth transistor; and boosting, through some of the word lines, electrical potential(s) of channel regions of the first string of transistors by coupling boosting second voltage(s) to at least some of the remaining transistors in the first string, the second voltage(s) being higher than the first voltage(s), to boost said electrical potential(s) of channel regions of the first string of transistors to a value or values closer to the program voltage, thereby reducing program disturb.