Patent ID: 7343387

Claim:
A method operable on a clocking system that includes a plurality of tiers of clock dividers that successively divide a reference frequency derived from a master clock frequency for producing a plurality of clock signals having desired frequencies, comprising: (A) determining a least common multiple (LCM) of the desired frequencies and the master clock frequency; (B) selecting divider values for one of the plurality of tiers of dividers subject to a requirement that input frequencies to that tier of dividers fall within a predetermined range and that they add a minimum number of few new factors to the LCM; (C) multiplying the LCM by any new factors needed to realize the dividers of the selected tier of dividers to yield a LumpLCM; (D) repeating steps B and C for all except the last tier of dividers, including updating the LumpLCM for each repetition to include any new factors needed to realize the dividers for the respective tier; (E) computing values for the last tier of dividers responsive to LumpLCM and the reference frequency; and (F) producing the plurality of clock signals responsive to at least one of the divider values.