Patent ID: 7214985

Claim:
An integrated circuit formed on a semiconductor substrate, comprising: a transistor having a gate voltage limit and further referenced to one of a voltage selected from the group consisting of an input voltage and a bias voltage of said integrated circuit, said voltage being greater than said gate voltage limit, said transistor including: a gate located over a channel region located in said semiconductor substrate, a source/drain region formed by lightly doped region located adjacent said channel region and a heavily doped region located adjacent said lightly doped region, an oppositely doped well with respect to said lightly and heavily doped regions and located under said channel region, and a doped region of like type to said lightly and heavily doped regions, and further located between said heavily doped region and said oppositely doped well, said doped region having a doping concentration less than a doping concentration of said heavily doped region; and a driver switch of a driver formed on said semiconductor substrate and configured to provide a drive signal to said transistor within said gate voltage limit thereof.