Patent ID: 6885094

Claim:
A multi-chip package type semiconductor device having a first semiconductor chip, which has a first internal circuit and a plurality of first internal terminal pads for transmitting signals to or from the first internal circuit, and a second semiconductor chip, which has a second internal circuit and a plurality of second internal terminal pads for transmitting signals to or from the second internal circuit for transmitting signals, and each second internal terminal pad being connected to one of the first internal terminal pads electrically, comprising: a test circuit, responsive to a voltage level of a test mode signal, selecting one from between operations for prohibiting signal transmission between the first internal circuit and the first internal terminal pads and for allowing signal transmission between the first internal circuit and the first internal terminal pads, and for selecting one from between operations for prohibiting signal transmission between the second internal circuit and the second internal terminal pads and for allowing signal transmission between the second internal circuit and the second internal terminal pads, the test circuit including a detection circuit wherein the detection circuit receives a signal outputted from each of the first or second internal terminal pads, detects whether a voltage level of the signal is identical to a predetermined voltage level, and outputs a result of the detection.