Patent ID: 7994853

Claim:
A class-D amplifier with dual feedback loop scheme comprising: two differential output terminals; a gain adjusting circuit; two comparators; an oscillator providing an oscillation signal; a logic circuit connected to the two comparators and producing four asynchronous PWM signals X+, X−, Y+ and Y−,; an output driver connected to the logic circuit, receiving the four asynchronous PWM signals X+, X−, Y+ and Y− and comprising a first half bridge circuit comprising a first sub-half bridge circuit including multiple high side switches and low side switches; and a second sub-half bridge circuit including multiple high side switches and low side switches, wherein a number of the high side switches and low side switches of the first sub-half bridge circuit of the first half bridge circuit is more than that of the second sub-half bridge; a second half bridge circuit comprising a first sub-half bridge circuit including multiple high side switches and low side switches; and a second sub-half bridge circuit including multiple high side switches and low side switches, wherein a number of the high side switches and low side switches of the first sub-half bridge of the second half bridge circuit is more than that of the second sub-half bridge; wherein the first half bridge circuit and the second half bridge circuit are respectively connected to the two differential output terminals; and a second-order integrator comprising: a first differential amplifier having a non-inverting input, an inverting input, a non-inverting output and an inverting output, wherein the non-inverting input and the inverting input are connected to the gain adjusting circuit; two first RC circuits cooperating with the first differential amplifier to form two first-order integrating circuits, wherein one of the first RC circuits is connected between one of the differential output terminals and the non-inverting input of the first differential amplifier, and the other first RC circuit is connected between the other differential output terminal and the inverting input of the first differential amplifier; a second differential amplifier having a non-inverting input, an inverting input, a non-inverting output and an inverting output, wherein the non-inverting input of the second differential amplifier is connected to the non-inverting output of the first differential amplifier, and the inverting input of the second differential amplifier is connected to the inverting output of the first differential amplifier; and two second RC circuits cooperating with the second differential amplifier to form two second-order integrating circuits, wherein one of the second RC circuits is connected between one of the differential output terminals and the non-inverting input of the second differential amplifier, and the other second RC circuit is connected between the other differential output terminal and the inverting input of the second differential amplifier.