Patent ID: 7646412

Claim:
A clamp circuit for holding a dc level of a clamp portion in an electric signal to be a prescribed value, comprising: an A/D converting section for dc level comparison having a lower bit resolution than an A/D converting section for A/D signal processing of said electric signal; and a feedback section for obtaining, by comparing a dc level of a sampling interval in said electric signal with a predetermined reference value, a difference between said dc level and said reference value and for feeding back a clamp signal to said electric signal so that said obtained difference between said dc level and said reference value becomes approximately zero, wherein said feedback section includes: a first feedback section having relatively low bit resolution of said clamp signal to be fed back to said electric signal; a second feedback section having a bit resolution higher than said bit resolution of the clamp signal in said first feedback section; and a mode switching section for switching to operate said first feedback section until said difference between said obtained dc level and said reference value becomes within a predetermined range, and to operate said second feedback section after said difference between said obtained dc level and said reference value becomes within a predetermined range.