Patent ID: 7410866

Claim:
A method for forming a semiconductor device, the method comprising: forming an inter-layer insulation layer over a substrate, wherein the inter-layer insulation layer comprises a first oxide-based layer; etching the inter-layer insulation layer to form a plurality of first contact holes; forming a first insulation layer on sidewalls of the first contact holes, the first insulation layer including a plurality of spacers and the spacers formed by using a material having a first etch rate, wherein the first insulation layer comprises a second oxide-based layer; forming a plurality of storage-node contact plugs that are filled into the first contact holes; forming a second insulation layer over the storage-node contact plugs, the second insulation layer formed by using a nitride-based material having a second etch rate that is different from the first etch rate; forming a third insulation layer over the second insulation layer, wherein the third insulation layer comprises a third oxide-based layer; etching the third insulation layer using the second insulation layer as an etch stop layer; etching the second insulation layer to form a plurality of second contact holes, wherein the second contact holes expose the storage node contact plugs; and forming a storage node on each of the second contact holes.