Patent ID: 8659926

Claim:
A binary content addressable memory (BCAM) cell, comprising: a) a first programmable metallization cell (PMC) coupled to a first access transistor and a bit node, wherein the first access transistor is coupled to a true bit line; b) a second PMC coupled to a second access transistor and the bit node, wherein the second access transistor is coupled to a complement bit line, the first and second access transistors being controlled by a word line; c) a program enable transistor coupled to the bit node, and configured to couple a program control voltage to the bit node when enabled, wherein during a single step write, one of the first and second PMCs is configured to be programmed while another of the first and second PMCs is configured to be erased, wherein the true bit line and the complement bit line differ by at least a program threshold voltage during the single step write; and d) a match indication transistor configured to discharge a match line in response to states of the true and complement bit lines relative to resistances of the first and second PMCs.