Patent ID: 8314476

Claim:
A semiconductor wafer comprising: at least one chip formed on a substrate; and a scribe line region surrounding the chip, wherein the chip comprises a device formation region, and a chip boundary region surrounding the device formation region and formed between the device formation region and the scribe line region, the chip boundary region comprises a guard ring structure unit which physically separates the device formation region from the scribe line region, and the guard ring structure unit comprises a signal transfer element which transfers an electric signal between the device formation region and the scribe line region, wherein the guard ring structure unit comprises: a first guard ring structure configured to physically separate the device formation region from the scribe line region, and transfer an electric signal to/from the device formation region; a second guard ring structure configured to physically separate the scribe line region from the device formation region, and transfer an electric signal to/from the scribe line region; and a mutually coupling element disposed between the first guard ring structure and the second guard ring structure and configured to transfer an electric signal between the device formation region and the scribe line region.