Patent ID: 7768492

Claim:
A liquid crystal controller driver on a semiconductor chip, comprising: data terminals to which data is to be supplied; a first terminal to which a vertical synchronization signal is to be supplied; a second terminal to which a horizontal synchronization signal is to be supplied; a third terminal to which a dotclock is to be supplied; a clock generation circuit for generating an internal operation clock signal; an external display interface which is coupled to the data terminals and the first to third terminals; a system interface which is coupled to the data terminals; a memory which stores picture data to be displayed to a display panel to be coupled to the liquid crystal controller driver; a display drive circuit which is coupled to the memory and which provides display data to the display panel in accordance with the picture data read from the memory; a first register having: a first state where the memory is enabled to be read in synchronization with the internal clock signal, and a second state where the memory is enabled to be read in synchronization with the vertical synchronization signal, the horizontal synchronization signal and the dotclock; and a second register having: a first state in which the memory is enabled to write the data provided to the system interface via the data terminals, and a second state in which the memory is enabled to write the data provided to the external display interface via the data terminals.