Patent ID: 7123110

Claim:
An oscillator circuit comprising: A comparator circuit adapted to assert a timing signal when a voltage at a first node exceeds a first reference voltage; a pulse generator provided to output a pulse responsive to receipt of the asserted timing signal; a charge/discharge circuit provided to discharge the first node when the pulse is received and charging the first node when the pulse is not received; and a control circuit capable of asserting an interrupt to the comparator circuit when the voltage of the first node does not exceed a second reference voltage lower than the first reference voltage, wherein the control circuit comprises: a second node for outputting a first control signal used for operating the comparator circuit; a first charging circuit coupled to the second node for charging the second node when the voltage of the first node is lower than the second reference voltage and when the pulse is received from the pulse generator; and a first discharge circuit coupled to the second node for discharging the second node when the voltage of the first node exceeds the second reference voltage.