Patent ID: 7839180

Claim:
A noise filter circuit comprising a latch circuit that receives an input signal, the latch circuit including a first logic circuit and a second logic circuit; each of the first logic circuit and the second logic circuit including a first transistor of a first conductivity type, a first transistor of a second conductivity type, a second transistor of the first conductivity type, and a second transistor of the second conductivity type; the first transistor of the first conductivity type and the first transistor of the second conductivity type of either of the first logic circuit and the second logic circuit receiving a set signal and outputting a first output level; the first transistor of the first conductivity type and the first transistor of the second conductivity type of the other of the first logic circuit and the second logic circuit receiving a reset signal and outputting a second output level; the second transistor of the first conductivity type and the second transistor of the second conductivity type of either of the first logic circuit or the second logic circuit receiving the second output level; the second transistor of the first conductivity type and the second transistor of the second conductivity type of the other of the first logic circuit and the second logic circuit receiving the first output level; each of the first logic circuit and the second logic circuit being configured so that: the first transistor of either of the first conductivity type and the second conductivity type is connected in parallel to the second transistor of either of the first conductivity type and the second conductivity type; the first transistor of the other of the first conductivity type and the second conductivity type is connected in series to the second transistor of the other of the first conductivity type and the second conductivity type; and the capability of the first transistor of either of the first conductivity type and the second conductivity type is lower than the capability of the first transistor of the other of the first conductivity type and the second conductivity type and the capability of the second transistor of the other of the first conductivity type and the second conductivity type combined; and the latch circuit outputting the first output level or the second output level as an output signal.