Patent ID: 7941107

Claim:
A method comprising: producing a test signal for a power amplifier of a transmitter section of a communications transceiver that is constructed on an integrated circuit chip; for each of a plurality of power amplifier settings: applying a respective first bias voltage to a gate of a metal oxide silicon transistor of a cascode stage of the power amplifier and applying a respective second bias voltage to a base of a parasitic bipolar transistor formed in parallel with the metal oxide silicon transistor; applying the test signal to the power amplifier to produce an output signal from the power amplifier; coupling within the integrated circuit chip a portion of the output signal to a receiver section of the communications transceiver; and producing a characterization of the output signal from the portion of the output signal when coupled back through the receiver section; determining a power amplifier operational setting to correct for non-linearity in operating the power amplifier, based upon a plurality of characterizations of the output signal and the plurality of power amplifier settings; and applying the power amplifier operational setting to the power amplifier.