Patent ID: 8390973

Claim:
A circuit breaker system comprising: a first circuit breaker having a first trip unit, said first trip unit having a first processor, a first current sensor electrically coupled to said first processor and a first data communications device coupled to transmit a signal from said first processor, wherein said first processor is responsive to executable computer instructions for transmitting said signal through said first data communications device in response to detecting a first fault condition with said first current sensor, said first processor being further responsive to executable computer instructions for transmitting said signal through said first data communications device in response to detecting a second fault condition with said first current sensor; a second circuit breaker having a second trip unit, said second trip unit having a second processor, a second current sensor electrically coupled to said second processor and a second data communications device operably coupled to receive said signal from said first data communications device and transmit said signal to said second processor, wherein said second processor is responsive to executable computer instructions for changing a tripping response of said second circuit breaker to a first interlock sequence if said signal is due to said first fault condition and to a second interlock sequence if said signal is due to said second fault condition.