Patent ID: 7711065

Claim:
A circuit for canceling direct current (DC) offset in a communication system, comprising: a digital-to-analog (D/A) converter assembly, for converting digital DC offset regulation signals to analog DC offset regulation signals; a summing circuit, for summing up the DC offset regulation signals and corresponding vectors of a received base band signal; an inphase-to-quadrature (I/Q) modulator, for receiving the summed base band signal, and converting the summed base band signal to a radio frequency (RF) signal; a detecting module, for detecting an energy variation due to DC offset contained in the radio frequency (RF) signal; a microcontroller, for regulating the DC offset regulation signals output from the D/A converter assembly to minimize the energy variation detected by the detecting module; and a multiplexer connected between the D/A converter assembly and the microcontroller.