Patent ID: 7903428

Claim:
An intra-connection layout of array, comprising: a device array comprising a plurality of devices, disposed on a substrate; and at least an alterable area, disposed on the substrate and between the devices, comprising: a plurality of first conductive wires, disposed over the substrate and within the alterable area along a first direction selectively connecting electrical paths in the first direction between the devices; a plurality of second conductive wires, disposed within the alterable area along a second direction and located between the first conductive wires and the substrate selectively connecting electrical paths in the second direction between the devices, wherein the first conductive wires and the second conductive wires are straight wires; and an insulation layer, disposed within the alterable area and between the first conductive wires and the second conductive wires, wherein when one of the first conductive wires and one of the second conductive wires are electrically connected to each other, the insulation layer comprising an opening at a corresponding position so as to electrically connect the one of the first conductive wires with the one of the second conductive wires.