Patent ID: 8923291

Claim:
A communication apparatus comprising: a plurality of interface circuits each including a plurality of ports and a first memory configured to store group information for each of a plurality of groups in association with information identifying the ports associated with the plurality of groups; a switch circuit including: a second memory configured to store the group information and information identifying an interface circuit associated with a port associated with a group; a bridge circuit configured to transmit data to the plurality of interface circuits, wherein each of the plurality of interface circuits includes a first processor configured to: add, to data received via a port, source information including identification of an interface circuit corresponding with the port that received the data, and group information, acquired from the first memory, of a group associated with the port which received the data, and transmit the data added with the source information to the switch circuit, wherein the switch circuit includes at least a second processor configured to: acquire, from the second memory, information of an interface circuit corresponding with the group information indicated by the source information added with the data received, copy the received data including the source information and transmit a copy of the received data including the source information to a port of each interface circuit of an acquired information, and wherein the first processor is further configured to: determine whether the identification of the interface circuit in the source information of the received data matches identification of an interface circuit which received the copy of the received data, wherein when a match is determined, deter further transmission of the copy of the received data, and generate data including the copy of the received data and transmit the generated data to a destination port when determining no match between the identification of the interface circuit identified in the source information and the identification of an interface circuit which received the copy of the received data.