Patent ID: 7119442

Claim:
A semiconductor device comprising: a semiconductor substrate; a first insulating layer formed above the semiconductor substrate, and comprising a first insulating material, a second insulating material, a first hole, a first insulating film which comprises a second hole or groove disposed to be distant from the first hole, and a second insulating film formed in the second hole or groove; a second insulating layer formed on the first insulating layer, the second insulating layer having a groove connected to the first hole; a barrier metal layer formed on a surface of the first hole and the groove; and an electrically conducting layer comprising Cu formed on the barrier metal layer, wherein a composite linear expansivity α is expressed by the following formula: α = ∑ i = 1 ⁢ ⁢ v i ⁢ α i where v i is a volume ratio of an i-th insulating material, and α i is a linear expansivity of the i-th insulating material, and the composite linear expansivity α of the first insulating layer within 6 μm from the first hole is 30×10 −6 °C. −1 or less, wherein a relative dielectric constant of the first insulating material is 3 or less, a Young's modulus of the first insulating material being 10 GPa or less, a linear expansivity of the first insulating material is greater than 30×10 −6 °C. −1 and a linear expansivity of the second insulating material is 30×10 −6 °C. −1 or less, and wherein the relative dielectric constant of the first insulating film is 3 or less, the Young's modulus of the first insulating film is 10 GPa or less, the linear expansivity of the first insulating film is greater than 30×10 −6 °C. −1 , and the linear expansivity of the second insulating film is 30×10 −6 °C. −1 or less.