Patent ID: 7667303

Claim:
A multi-chip package, comprising: a carrier having a region thereof; a first chip disposed on the carrier and electrically connected to the carrier through at least one first wire, the first chip comprising at least two contacts thereon; a second chip disposed on the first chip and electrically connected to the first chip through at least one second wire, the second chip comprising at least two contacts thereon; and a first conductive layer disposed on the second chip and electrically connected to at least two contacts on the second chip through at least two third wires, wherein the two third wires connect two contacts of the second chip to the first conductive layer so as to allow the two contacts on the second chip to be electrically connected; wherein at least one fourth wire connects the first conductive layer and the region of the carrier, one end of the fourth wire in contact with the first conductive layer and the other end of the fourth wire in contact with the region of the carrier layer, so as to allow the two contacts on the second chip, the first conductive layer and the region of the carrier are electrically connected.