Patent ID: 8390498

Claim:
A comparing circuit comprising: an input terminal configured to receive an input signal; a first resistor series configured to divide a predetermined voltage range to generate a plurality of first reference voltages; a first switch controlling circuit configured to select one of the first reference voltages; a second resistor series configured to divide the predetermined voltage range at intervals larger than intervals of the first reference voltages to generate a plurality of second reference voltages; a second switch controlling circuit configured to select one of the second reference voltages; and a comparing unit including a first transistor that generates a current based on the first reference voltage selected by the first switch controlling circuit, a second transistor with a smaller aspect ratio than that of the first transistor that generates a current based on the second reference voltage selected by the second switch controlling circuit, and a third transistor that generates a current based on the input signal, and configured to generate a logical signal representing a logical value by comparing the current from the third transistor with a combined current from the first and second transistors, wherein the first switch controlling circuit specifies two adjacent first reference voltages where the logical value is inverted by sequentially selecting the first reference voltages in a state in which any one of the second reference voltages is selected by the second switch controlling circuit, and determines to select one of the two adjacent first reference voltages, and the second switch controlling circuit specifies two adjacent second reference voltages where the logical value is inverted by sequentially selecting the second reference voltages in a state in which the first reference voltage by the first switch controlling circuit is selected, and determines to select one of the two adjacent second reference voltages.