Patent ID: 7999783

Claim:
A shift register comprising: a plurality of shift register units connected one by one, each of the shift register units comprising: a signal input terminal; an output terminal outputting an output voltage; a first switch unit coupled to a first clock, input terminal and the signal input terminal; a second switch unit coupled to the first clock input terminal and a first voltage input terminal; a third switch unit coupled between the second switch unit and a second voltage input terminal, the third switch unit directly coupled to the second voltage input terminal; a fourth switch unit coupled between a second clock input terminal and the output terminal of the shift register unit; and a fifth switch unit coupled between the output terminal and the second voltage input terminal terminal, wherein the signal input terminal of each shift register unit is coupled to the output terminal of a rear-stage shift register unit, the first clock input terminal receives a first clock signal to turn on/off the first and second switch units, the third switch unit receives a second clock signal, the fourth switch unit pulls up the output voltage of the output terminal according to a first controlling signal from the first switch unit, the fifth switch unit pulls down the output voltage of the output terminal according to second and third controlling signals from the second and third switch units, and wherein in each of the shift register units, after the output terminal of the shift register unit outputs a high voltage signal, the first and second clock input terminals control the second and third switch units to be turned on and turned off alternately, and the first and second voltage input terminals control the fifth switch unit to be turned on and turned off alternately via the second and third switch units, respectively, such that the output terminal non-continuously receives a voltage of the second voltage input terminal via the fifth switch unit.