Patent ID: 8420486

Claim:
A method for manufacturing a semiconductor device that has on a semiconductor substrate a first transistor group and a second transistor group whose operating voltage is lower than an operating voltage of the first transistor group, the first transistor group having a first gate electrode formed over the semiconductor substrate with intermediary of a first gate insulating film and a silicide layer formed on the first gate electrode, the second transistor group having a second gate electrode formed with intermediary of a second gate insulating film in a gate forming trench that is formed by removing a dummy gate part formed over the semiconductor substrate, the method comprising the steps of: forming the first gate electrode out of an electrode forming film comprising polysilicon; forming a dummy gate electrode out of the same electrode forming film; removing an upper part of the polysilicon to set a height of the first gate electrode to be smaller than a height of the dummy gate electrode in the dummy gate part in which a thickness of the first gate electrode derived from the electrode forming film comprising polysilicon is smaller than a thickness of a portion of the electrode forming film corresponding to the dummy gate electrode; forming the silicide layer on the first gate electrode of the first transistor group after setting the height of the first gate electrode to be smaller than the height of the dummy gate electrode formed in the dummy gate part; and forming the gate forming trench by removing the dummy gate part after forming an interlayer insulating film that covers the silicide layer and planarizing a surface of the interlayer insulating film.