Patent ID: 7380194

Claim:
A data processing method, comprising the steps: configuring digital data into information data blocks of (M×N ) bytes in M rows×N columns, so that data is arranged in data transmission order from a 0-th column to the (N−1)-th column for each row while data is arranged in the data transmission order from a 0-th row to an (M−1)-th row; constructing a first matrix block of ((K/2)×M) rows×N columns, which is constituted of (K/2) information data blocks composed of information data blocks from a 0-th information data block to a ((K/2)−1)-th information data block which continue in the data transmission order; constructing a second matrix block of ((K/2)×M) rows×N columns, which is constituted of other (K/2) information data blocks which continue in the data transmission order; constructing a first error-correcting word creation block of (K×(M/2)) rows×N columns by aggregating even-numbered rows of an even-numbered information data block and odd-numbered rows of an odd-numbered information data block to create PO-a in a interleaved manner; constructing a second error-correcting word creation block of (K×(M/2)) rows×N columns by aggregating odd-numbered rows of the even-numbered information data block and even-numbered rows of the odd-numbered information data block to create PO-b in an interleaved manner; creating a first error correction word PO-a of ((K/2)×Q) bytes on each column of a first error-correcting word creation block, where Q is an integer of 1; creating a second error correction word PO-b of ((K-2)×Q) bytes on each column of a second error-correcting word creation block; scattering and arranging the first and second error correction words PO-a and PO-b into K information data blocks constituted of (M×N) bytes of M rows and N columns in each of said first and second matrix blocks so that each column of N columns is formed as two sets of Reed-Solomon codes PO of (K/2)×((mi+mj)+Q) bytes and (K/2)×((mi+mj)+Q) bytes, where M=mi (the number of even-numbered rows)+mj (the number of odd-numbered rows); and adding a third error-correction word of P bytes for each row of N bytes; whereby overall error-correcting product code blocks are realized which constitute a (K×(M+Q))×(N+P)) bytes Reed-Solomon code having K information data blocks of (M×N) bytes each as an information portion.