Patent ID: 6879313

Claim:
A shift register circuit, comprising: a plurality of latch circuits connected in series to sequentially transfer a pulse signal from one to another; a clock signal line transmitting a clock signal; and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits, wherein potentials at nodes of the plurality of latch circuits vary in accordance with the pulse signal transferred; the plurality of switching circuits each connect or disconnect corresponding latch circuits to or from the clock signal line in accordance with the potentials at the nodes of the corresponding latch circuits; in at least a part of the period in which the pulse signal is transferred from a first latch circuit through a last latch circuit, the clock signal has a frequency which is lower than in a normal operation period and which gradually increases; and upon power-on, at least one of the switching circuits electrically disconnects at least one corresponding latch circuit from the clock signal line.