Patent ID: 8409904

Claim:
A method of forming a semiconductor structure comprising: forming a photodiode in a semiconductor layer; forming a transistor on said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode; forming an interconnect level dielectric layer embedding a metal line on said semiconductor layer; forming a dielectric layer directly on said interconnect level dielectric layer; applying self-assembling block copolymers directly on said dielectric layer; separating said self-assembling block copolymers into portions including a first polymeric block component and portions including a second polymeric block component; removing said portions including said second polymeric block component selective to said portions including said first polymeric block component; and forming an array of protuberances including a protuberance-containing dielectric portion directly on said interconnect level dielectric layer by etching exposed portions of said dielectric layer employing said portions of said first polymeric block component as an etch mask, wherein an etched portion of said dielectric layer comprises said array of protuberances.