Patent ID: 6927126

Claim:
A method of manufacturing a semiconductor device, the method comprising: forming a first insulating layer having a contact pad formed therein; forming a second insulating layer overlying the first insulating layer; forming a plurality of stacks each including a bit line and a bit line mask on the second insulating layer; forming a third insulating layer overlying the second insulating layer to fill gaps between the plurality of stacks; forming a hard mask layer on the third insulating layer; forming a photoresist pattern on the hard mask layer, the photoresist pattern having an opening region that intersects the plurality of stacks; sequentially etching the hard mask layer and the third insulating layer, using the photoresist pattern as an etching mask, thereby forming a hard mask and forming a recess in the third insulating layer, the recess exposing a portion of upper sidewalls of the bit line mask; and forming spacers on the exposed upper sidewalls of the bit line mask.