Patent ID: 7856610

Claim:
A method for forming a semiconductor integrated circuit, comprising: a first step of defining a coordinate of a main trunk wiring, using a main trunk wiring computing unit, which passes on an output pin or adjacent to the output pin, according to weighted coordinates of both the output pin and a plurality of input pins, the input pins being assigned a first weighting, the output pin being assigned a second weighting that is larger than the first weighting; a second step of grouping the plurality of the input pins, using an input pin computing unit, into a plurality of groups, referring to coordinates of the main trunk wiring as a standard point; a third step of defining sub-trunk wirings, using a sub-trunk wiring computing unit, connecting the input pins with each other that belong to a same group; and a fourth step of defining first lead-in wirings, using a lead in wire computing unit, connecting at least the main trunk wiring and the sub-trunk wirings.