Patent ID: 8519731

Claim:
A method of electrically characterizing an integrated circuit (IC), comprising: identifying a data line in conductive interconnect of the IC that is failing; milling first and second vertical trenches in the IC along the data line to expose respective first and second cross-sections of the conductive interconnect having the data line; placing first and second probes in contact with the data line in the first and second vertical trenches, respectively; determining whether the data line is open or shorted between the first and second vertical trenches using an electrical measurement device coupled to the first and second probes; in response to the data line determined to be open between the first and second vertical trenches, milling a third vertical trench in the IC to expose a respective third cross-section of the conductive interconnect having the data line, the third vertical trench being between the first and second vertical trenches; moving the first probe to contact the data line in the third vertical trench; and determining whether the data line is open or shorted between the third and second vertical trenches using the electrical measurement device coupled to the first and second vertical probes.