Patent ID: 8034704

Claim:
A method for manufacturing a semiconductor device comprising the steps of: providing an element forming layer on a first surface of a semiconductor substrate; and providing an external connection terminal on a second surface of the semiconductor substrate opposite to the first surface so that the external connection terminal is electrically connected to the element forming layer through a via hole; wherein, the via hole is formed through the steps of forming a buried conductor layer on the first surface so as to electrically insulate the buried conductor layer from the semiconductor substrate, forming a communication hole on the second surface so as to communicate it with the buried conductor layer, and electrically connecting the buried conductor layer and the communication hole, the step of electrically connecting the buried conductor layer and the communication hole includes the steps of insulating the inner surface of the communication hole, removing the insulating film covering the bottom of the buried conductor layer, and forming a conductor film simultaneously covering the inner surface of the communication hole and the bottom of the buried conductor layer, and the step of removing the insulating film includes forming the communication hole with a width larger than the width of the buried conductor layer, forming an insulating protective film so that the deposit at the bottom of the communication hole is larger than that at the bottom of the buried conductor layer, etching out the protective film formed at the bottom of the buried conductor layer, and selectively etching out the insulating film exposed in the communication hole.