Patent ID: 7276730

Claim:
A semiconductor device having a pixel matrix circuit that includes a pixel TFT and a storage capacitor: wherein the pixel TFT has a channel formation region formed over a first wiring line with a first insulating layer interposed therebetween, and has a low concentration impurity region that is in contact with the channel formation region and overlaps the first wiring line; wherein a gate electrode is formed over the channel formation region with a second insulating layer interposed therebetween; wherein the gate electrode does not overlap the low concentration impurity region; wherein the storage capacitor is formed: from a capacitor wiring line, from a semiconductor region that has the same composition as the channel formation region or the low concentration impurity region, and from a part of the first insulating layer; wherein the first wiring line and the capacitor wiring line are formed on the same layer, and wherein the shortest distance between the channel formation region and the first wiring line is longer than the shortest distance between the capacitor wiring line and the semiconductor region.