Patent ID: 8355901

Claim:
A CPU emulation system, comprising: an information processing device comprising; a plurality of virtual CPUs each operating on a different physical CPU; a unit time management section for storing a given time length as a unit of time; an optimization processing time management section for storing a time length required for the optimization processing for each optimization level, the optimization processing time management section storing the processing time length according to a size of the instruction sequence for the each optimization level; an instruction sequence selecting section for selecting an instruction sequence to be optimized from among a translated instruction sequence; a virtual CPU selecting section for selecting one of the plurality of virtual CPUs to perform optimization processing of the selected instruction sequence, based on lowest usage rates of the plurality of virtual CPUs; a time calculation section for calculating an allowable time length to perform the optimization processing based on the lowest usage rate of the one of the plurality of virtual CPUs selected by the virtual CPU selecting section, and the unit time stored in the unit time management section, and calculating, for each optimization level, a time length to be required for the optimization processing of the instruction sequence, using the time length stored by the optimization processing time management section; and an optimization level selecting section for determining an optimization level of the optimization processing and giving command to the selected one of the plurality of virtual CPUs using the determined optimization level, the optimization level selecting section determining a highest optimization level from among the optimization levels for which the processing can be completed within the calculated allowable time length, based on the required time length calculated for each optimization level.