Patent ID: 7259594

Claim:
An electronic circuit, comprising: a chain of at least three processing elements each processing element comprising a logic circuit and a storage element for storing data output by the logic circuit the storage elements of all except a final processing element in the chain having one or more outputs coupled to the logic circuit of a next processing element in the chain, a timing circuit arranged to control respective loading time points at which the storage elements load data from the logic circuits in respective ones of the processing elements so that data is loaded progressively later in processing elements that successively precede one another in the chain, a time interval between successive loading time points of the final processing element including loading time points of loading all processing elements other than the final processing element, wherein the timing circuit further comprises an asynchronous circuit arranged to enable loading by the storage element of a respective one of the processing elements each time in response to a signal that a succeeding one of the processing elements that succeeds the respective one of the processing elements in the chain has loaded data, except for loading by the storage element of the final processing element, which the asynchronous circuit enables to load data each time in response to a signal that an initial one of the proessing elements has loaded data.