Patent ID: 7970042

Claim:
A clock interoperability circuit, comprising: (a) an input circuit for receiving a first spread spectrum clock signal from an external device, said input circuit having a converter circuit that converts said first spread spectrum clock signal to a second demodulated signal; (b) a memory circuit that stores a predetermined mask, in which said mask comprises at least one data attribute that is to be used for inspecting said second demodulated signal; and (c) a compare logic circuit for: (i) reading said at least one data attribute of said predetermined mask, and using said at least one data attribute to define a set of boundary conditions; (ii) reading said second demodulated signal from said input circuit, and determining a wave shape of a modulation profile of said second demodulated signal; and (iii) comparing the wave shape of said second demodulated signal's modulation profile to said set of boundary conditions, and determining whether the wave shape of said second demodulated signal's modulation profile is statistically within said set of boundary conditions.