Patent ID: 8921894

Claim:
A field effect transistor comprising: a substrate; a buffer layer; a channel layer; a barrier layer; a spacer layer; a gate insulating film; a gate electrode; a source electrode; and a drain electrode, wherein the buffer layer is formed of lattice-relaxed Al x Ga 1-x N (0<x<1), the channel layer is formed of Al y Ga l-y N (0<y <x) with an Al composition ratio less than the buffer layer, the barrier layer is formed of Al y Ga 1-y N (x<z≦1) with an Al composition ratio greater than the buffer layer, the spacer layer is formed of Al u Ga 1-u N (0≦u<x) with an Al composition ratio less than the buffer layer, each of the upper surfaces of the buffer layer, the channel layer, the barrier layer, and the spacer layer is a Ga plane or an Al plane that is perpendicular to a (0001) crystal axis, the buffer layer, the channel layer, the barrier layer, and the space layer are laminated on the substrate in this order, the gate insulating film is arranged on the spacer layer, the gate electrode is arranged on the gate insulating film, and the source electrode and the drain electrode are electrically connected to the channel layer directly or via another component.