Patent ID: 7176519

Claim:
A memory cell, comprising a substrate of charge carriers of a first conduction type; a first source/drain region in a first surface region of the substrate; a second source/drain region in a second surface region of the substrate; a channel region in the substrate between the first and the second source/drain region; a charge storage region above the channel region; a control gate above the charge storage region, the control gate being is electrically insulated from the charge storage region; and a trench structure formed in the substrate, the trench structure having charge carrier supplying material with charge carriers of a second conduction type and an insulation region between the substrate and at least one part of the charge carrier supplying material, the trench structure being at least partially provided with a shallow trench sidewall isolation, where the first conduction type is different from the second conduction type, to form a diode junction between the substrate and the charge carrier supplying material of the trench structure, and the memory being configured so that by an application of predeterminable electrical potentials to the memory cell, electrical charge carriers can be introduced from the charge carrier supplying material of the trench structure into the charge storage region.