Patent ID: 7772619

Claim:
A semiconductor device, comprising: a silicon on insulator (SOI) substrate, comprising an insulation layer formed on semiconductor material; a fin structure formed of semiconductor material and extending from the SOI substrate, comprising: a source region doped with a first type of impurities; a drain region doped with the first type of impurities, the drain region spaced apart from the source region; a channel region doped with the first type of impurities and operable to conduct current between the drain region and the source region when the semiconductor device is operating in an on state; and a gate region doped with a second type of impurities, the gate region abutting the channel region along at least one boundary; and a polysilicon region formed, at least in part, on the SOI substrate, wherein the polysilicon region abuts the gate region on multiple boundaries of the gate region and forms an ohmic connection to the gate region.