Patent ID: 8898439

Claim:
An address transmission method of a serial flash memory, wherein the serial flash memory selectively addresses a first memory space according to a first address length or addresses a second memory space according to a second address length longer than the first address length, and a first memory address is completely received within an address time duration if the first memory space is addressed according to the first address length, so that data corresponding to the first memory address is initially outputted from a starting clock, wherein a waiting time duration exists between the address time duration and the starting clock, the address transmission method comprising the steps of: receiving one portion of a second memory address within the address time duration if the second memory space is addressed according to the second address length, wherein address lengths of the first memory address and the second memory address are respectively equal to the first address length and the second address length; and receiving the other portion of the second memory address within a the waiting time duration so that data corresponding to the second memory address is initially outputted from the starting clock.