Patent ID: 7412613

Claim:
An integrated circuit device, comprising: a power supply voltage generator configured to respond to an operating mode control signal by generating first and second power supply voltages at equivalent voltage levels when the operating mode control signal designates a normal mode of operation within the integrated circuit device and reducing the first power supply voltage to a positive voltage less than the second power supply voltage, which remains constant, when the operating mode control signal designates a power saving mode of operation within the integrated circuit device; a first operating circuit powered by the first power supply voltage during the normal and power saving modes of operation; and a second operating circuit powered by the second power supply voltage during the normal and power saving modes of operation and responsive to the operating mode control signal, said second operating circuit configured to support a power saving mode of operation by replacing a first internal data path therein with a second internal data path when the operating mode control signal switches from designating the normal mode of operation to designating the power saving mode of operation; and wherein said second operating circuit is further configured to utilize an additional timing margin resulting from a higher frequency of operation of the second operating circuit relative to the first operating circuit during the power saving mode of operation, when performing a backup access to the first internal data path in response to detecting a read data failure associated with the second internal data path.