Patent ID: 7492004

Claim:
A semiconductor device comprising: at least two channel-portion holes disposed in a semiconductor substrate; line patterns filling the channel-portion holes and disposed in parallel to be spaced apart from each other on a main surface of the semiconductor substrate, wherein each line pattern includes a gate electrode; and a channel region disposed in the semiconductor substrate directly under a portion of the line patterns that are within the channel-portion holes, wherein the channel region is disposed between the channel-portion holes and wherein lower portions of at least two of the channel-portion holes cover the same channel region; a source region disposed in the main surface of the semiconductor substrate and overlapped by one sidewall of one of the line patterns; and a drain region disposed in the main surface of the semiconductor substrate and overlapped by another sidewall of the one of the line patterns, wherein the source region and the drain region are laterally spaced apart from each other by the channel region.