Patent ID: 7649932

Claim:
A segmented equalizer comprising: a plurality of feedforward equalizer segments, each feedforward equalizer segment responsive to delayed samples of an input signal {v n }, wherein n is an index of samples, and including a filter block for filtering the delayed samples by using coefficients which are updated based on a step size generated for each equalizer segment, each feedforward equalizer segment including a shift block coupled to receive input from the filter block and an exponent control block coupled to a coefficient update block and a step size control block for generating a step size, a different step size being generated for each segment; a first feedforward summer associated with the last equalizer segment; a decision block; and a second summer, the decision block coupled to receive the output of the first feedforward summer and operative to generate an equalizer output {d n }, the second summer operative to subtract the output of the first feedforward summer from the equalizer output {d n } to generate the error {e n }, wherein each of the feedforward equalizer segments is a block floating point feedforward equalizer segment including a delay line block for generating the delayed sample input by receiving sample inputs from a previous feedforward equalizer segment except a first feedforward equalizer segment, which receives input signal {v n } and provides the delayed samples to the filter block.