Patent ID: 8003475

Claim:
A method for fabricating a transistor structure comprising at least a first and a second bipolar transistor having different collector widths, the method comprising: A) providing a semiconductor substrate, and B) producing at least a first collector region of the first bipolar transistor having a first collector width and a second collector region of the second bipolar transistor having a second collector width, where the first and second collector widths are in a vertical direction, the second collector width of the second collector region being greater than the first collector width of the first collector region, wherein a) at least a first zone of a first buried layer of a first conductivity type of the first bipolar transistor and a second buried layer of a first or a second conductivity type of the second bipolar transistor are introduced into the semiconductor substrate, b) at least a first collector zone of the first bipolar transistor and a first collector zone of the second bipolar transistor are produced, the first collector zone of the first bipolar transistor adjoining the first zone and the first collector zone of the second bipolar transistor adjoining the second buried layer, c) the first collector zone is formed as the first conductivity type, d) a second collector zone is produced on the first collector zone of the second bipolar transistor and a second collector zone is produced on the first collector zone of the first bipolar transistor, and e) at least one insulation region is produced, which isolates at least the collector zones from one another.