Patent ID: 7368933

Claim:
A method for testing standby current of a semiconductor package, the method comprising: (a) testing semiconductor chips formed on a wafer, collecting measured values of standby current of the semiconductor chips, and storing the measured values of standby current in a database, by using a wafer tester, the semiconductor chips having a predetermined wafer run number; (b) packaging one or more of the semiconductor chips from the wafer in respective semiconductor packages, wherein the wafer run number of the semiconductor chips of each of the semiconductor packages to be tested is recognized; (c) downloading measured values of standby current of semiconductor chips corresponding to the recognized wafer run number from the database to a semiconductor package tester; (d) extracting a boundary value defining predetermined upper-limit values of the downloaded measured values of standby current; (e) automatically setting the boundary value as a standby current limit of a program for testing the semiconductor packages by use of the semiconductor package tester; and (f) testing the semiconductor packages based on the standby current limit.