Patent ID: 7808815

Claim:
A variable resistance memory device comprising: a silicon substrate; a plurality of active lines which are formed on the silicon substrate, are uniformly separated, and extend in a first direction; a plurality of switching devices which are formed on the active lines and are separated from one another; a plurality of variable resistance devices which are respectively formed on and connected to the switching devices; a plurality of local bit lines which are formed on the variable resistance devices, are uniformly separated, extend in a second direction, and are connected to the variable resistance devices; a plurality of local word lines which are formed on the local bit lines, are uniformly separated, and extend in the first direction; a plurality of global bit lines which are formed on the local word lines, are uniformly separated, and extend in the second direction; and a plurality of global word lines which are formed on the global bit lines, are uniformly separated, and extend in the first direction.