Patent ID: 8030715

Claim:
A semiconductor device comprising: a semiconductor substrate having recess parts defined in gate forming areas thereof, the recess parts including first grooves which have a bulbous-shaped profile and second grooves that extend downward from the first grooves; an isolation layer formed in the semiconductor substrate in that exposes front and rear surfaces of the gate forming areas in which the recess parts are defined; a gate insulation layer formed on surfaces of the recess parts and on the exposed front and rear surfaces of the gate forming areas and the gate insulation layer having a thickness which is greater in the first grooves of the recess parts than the other portions of the recess parts; and gates formed in the recess parts in which the gate insulation layer is formed and on the exposed front and rear surfaces of the gate forming areas, wherein the isolation layer formed in the semiconductor substrate that exposes the front and rear surfaces of the gate forming areas in which the recess parts are formed to define Saddle fin shaped channels.