Patent ID: 8604482

Claim:
A microelectronic device, comprising: a plurality of disconnected semiconducting portions with approximately similar dimensions L SC , W SC and similar shapes, electrically isolated from each other and forming a semiconductor layer, each of the semiconductor portions being at a spacing from adjacent semiconductor portions by an approximately constant distance E SCH , E SCV and having an elongated shape of which the largest dimension L SC is approximately parallel to the largest dimensions L SC of the other semiconductor portions; and at least two electrodes arranged in contact with the semiconductor layer such that a maximum distance L channel separating the two electrodes is less than the largest dimension L SC of one of the semiconductor portions, wherein the shape and dimensions L SC , W SC of the semiconductor portions, the spacing E SCH , E SCV between the semiconductor portions, the shape and dimensions L SD , W SD of the electrodes and the layout of the electrodes relative to the semiconductor portions are such that at least one of the semiconductor portions electrically connects the two electrodes to each other, the largest dimensions L SC of the semiconductor portions are approximately perpendicular to the largest dimension W SD of the electrodes, the electrodes having similar shapes and dimensions W SD , L SD , the semiconductor portions are arranged in a plane parallel to a principal face of the semiconductor layer in contact with which the electrodes are arranged, following a regular pattern of parallel lines, spaces E SCH between the semiconductor portions on a single line are offset relative to the spaces between the semiconductor portions of an adjacent line and along a direction parallel to the lines, by a distance D equal to about the largest dimension L SC of the semiconductor portions divided by n, where n is a real number between 10 and 20, and the largest dimension L SC of the semiconductor portions is approximately equal to n times the maximum distance L channel separating the two electrodes and/or the largest dimension W SD of the electrodes is greater than about n times the smallest dimension W SC of the semiconductor portions.