Patent ID: 8525944

Claim:
A method of manufacturing method of an array substrate for an in-plane switching mode liquid crystal display device, comprising: forming a gate line and a gate electrode on a substrate through a first mask process; forming a gate insulating layer, an intrinsic silicon layer, an impurity-doped silicon layer, and a conductive material layer on the substrate including the gate line and the gate electrode; forming a first semiconductor layer, a source electrode, a drain electrode, a data line, and a second semiconductor layer by patterning the conductive material layer, the impurity-doped silicon layer, and the intrinsic silicon layer through a second mask process, wherein the patterning comprises partially exposing the second semiconductor layer at both sides of the data line; forming a passivation layer having a first contact hole and a second contact hole through a third mask process, the first contact hole exposing the drain electrode, the second contact hole exposing the data line; and forming pixel electrodes, common electrodes and a first blocking pattern through a fourth mask process, wherein the pixel electrodes contact the drain electrode through the first contact hole and alternate with the common electrodes, and the first blocking pattern contacts the data line and overlies the second semiconductor layer.