Patent ID: 8476732

Claim:
A semiconductor device, comprising: a semiconductor element region exposed at one surface of a semiconductor substrate, a semiconductor element is formed within the semiconductor element region; a peripheral termination region exposed at the one surface of the semiconductor substrate, formed around the semiconductor element region, and formed of a single conductive type semiconductor; a peripheral electrode formed on a surface of the peripheral termination region and along a circumference of the semiconductor substrate, and electrically connected with the peripheral termination region; an insulating film formed on the surface of the peripheral termination region and between the peripheral electrode and the semiconductor element region; a plurality of intermediate electrodes formed on the insulating film and disposed at an interval along a direction from the semiconductor element region to the peripheral electrode, wherein a width of a first intermediate electrode in the direction, the first intermediate electrode being one of the intermediate electrodes closest to the semiconductor element region, is smaller than a width of a second intermediate electrode in the direction, the second intermediate electrode being one of the intermediate electrodes adjacent to the first intermediate electrode, and wherein a thickness of the insulating film under at least one intermediate electrode is smaller at a side of the peripheral electrode than at a side of the semiconductor element region.