Patent ID: 8242594

Claim:
A chip package structure, comprising: a circuit substrate having a bonding surface and at least one pad disposed on the bonding surface; a chip disposed on the bonding surface of the circuit substrate, the chip having an active surface away from the circuit substrate and at least one contact pad disposed on the active surface; at least one bonding wire connects the at least one contact pad and the at least one pad, such that the chip is electrically connected to the circuit substrate through the at least one bonding wire, wherein the at least one bonding wire comprises a copper layer, a nickel layer covering the copper layer, and a gold layer covering the nickel layer; and an adhesive layer disposed between the at least one pad and the at least one bonding wire and between the at least one contact pad and the at least one bonding wire, the adhesive layer covering two terminals of the at least one bonding wire, wherein a material of the adhesive layer comprises metal or metal resin, and the metal resin comprises gold paste or tin paste.