Patent ID: 8172980

Claim:
An apparatus for reducing capacitances between semiconductor devices for a dielectric layer over which a sacrificial layer has been placed, comprising: a plasma processing chamber, comprising: a chamber wall forming a plasma processing chamber enclosure; a substrate support for supporting a substrate within the plasma processing chamber enclosure; a pressure regulator for regulating the pressure in the plasma processing chamber enclosure; at least one electrode for providing power to the plasma processing chamber enclosure for sustaining a plasma; a gas inlet for providing gas into the plasma processing chamber enclosure; and a gas outlet for exhausting gas from the plasma processing chamber enclosure; a gas source in fluid connection with the gas inlet, comprising; a sacrificial layer etchant source; a dielectric layer etchant source; a shrink deposition gas source; and a shrink profile shaping gas source; a controller controllably connected to the gas source and the at least one electrode, comprising: at least one processor; and non-transitory computer readable media comprising: computer readable code for etching features into the sacrificial layer and dielectric layer, wherein the features are subsequently filled with a filler material; computer readable code for removing the sacrificial layer, so that parts of the filler material remain exposed above a surface of the dielectric layer, wherein spaces are between the exposed parts of the filler material; computer readable code for shrinking widths of the spaces between parts of the filler material with a shrink providing a sidewall deposition comprising at least one cycle, wherein each cycle comprises: computer readable code for providing a shrink deposition gas from the shrink deposition gas source; computer readable code for generating a plasma from the shrink deposition gas; computer readable code for stopping the shrink deposition gas from the shrink deposition gas source; computer readable code for providing a shrink profile shaping gas from the shrink profile shaping gas source; computer readable code for generating a plasma from the shrink profile shaping gas; and computer readable code for stopping the shrink profile shaping gas from the shrink profile shaping gas source; computer readable code for etching gaps into the etch layer between contact structures through the sidewall deposition; and computer readable code for closing the gaps to form pockets in the gaps.