Patent ID: 8907492

Claim:
A semiconductor device comprising: a power supply active region extending in a first direction; an active region located at one side of the power supply active region in a second direction perpendicular to the first direction and serving as a source or a drain of a transistor; a gate interconnect located at the side of the power supply active region, at which the active region is located, in the second direction, and serving as a gate of the transistor; a power supply metal interconnect located above the power supply active region; a circuit metal interconnect located above the active region and the gate interconnect; a plurality of power supply plugs coupling the power supply active region to the power supply metal interconnect; and a plurality of interconnect plugs coupling the active region or the gate interconnect to the circuit metal interconnect, wherein: the plurality of power supply plugs include: a plurality of first plugs arranged at first pitches of a predetermined length, and a second plug spaced apart from closest one of the plurality of first plugs by a center-to-center distance which is different from an integral multiple of the predetermined length, the plurality of interconnect plugs include a third plug closest to the power supply active region and the power supply metal interconnect, and among the plurality of power supply plugs, the second plug is closest to the third plug.