Patent ID: 7355450

Claim:
A differential input buffer having first and second input terminals coupled to receive a differential signal and an output terminal, the differential input buffer comprising: a first differential amplifier having a first enhancement mode MOS input transistor with a gate terminal coupled to the first input terminal and a second enhancement mode MOS input transistor with a gate terminal coupled to the second input terminal, the first differential amplifier further having an output terminal coupled to the output terminal of the differential input buffer; a second differential amplifier having a first native MOS input transistor with a gate terminal coupled to the first input terminal and a second native MOS input transistor with a gate terminal coupled to the second input terminal, the second differential amplifier further having an output terminal coupled to the output terminal of the differential input buffer; and a native pair shut-off circuit coupled to the second differential amplifier and configured to turn off the second differential amplifier in response to the differential input signal.