Patent ID: 8917657

Claim:
An automatic repeat request (ARQ) receiver comprising: a receiver configured to receive one or more of a plurality of ARQ blocks transmitted to the receiver; and a processor configured to generate a feedback message configured to provide status of the plurality of ARQ blocks, the feedback message comprising: an acknowledgement sequence number (ACK_SN) field, and a first flag field, wherein the processor is configured to provide a first value in the first flag field as an indicator that the feedback message contains only the ACK_SN field and the first flag field, wherein the processor is configured to provide a second value in the first flag field as an indicator that the feedback message contains a first set of N number of 1-bit fields in addition to the ACK_SN field and the first flag field, each of the N number of 1-bit fields in the first set indicating a receipt status of one of the ARQ blocks, wherein when the first flag field has the second value, the feedback message includes a second flag field following the first set of N number of 1-bit fields, and when the second flag field has the second value, the feedback message includes a second set of N 1-bit fields directly after the second flag field and at least a third flag field directly after the second set of N 1-bit fields.