Patent ID: 8772796

Claim:
A panel, comprising: a substrate defined with a pixel region and a wiring region on at least one side of the pixel region; a first patterned conductive layer disposed on the substrate, wherein the first patterned conductive layer comprises at least one first electrode line, at least one first electrode, and at least one wiring trace, the first electrode and the first electrode line are connected to each other and both disposed in the pixel region, and the wiring trace is disposed in the wiring region; a first insulation layer disposed to cover the pixel region, the wiring region, and the first patterned conductive layer; a second patterned conductive layer disposed on the first insulation layer, the second patterned conductive layer comprising at least one second electrode disposed on the first insulation layer in the pixel region; a second insulation layer disposed to cover the second electrode in the pixel region, the wiring region, and the first insulation layer above the wiring trace; a patterned semiconductor layer disposed on the second insulation layer, the patterned semiconductor layer comprising at least one first portion corresponding to the first electrode and at least one second portion corresponding to the wiring trace; a third patterned conductive layer disposed on the second insulation layer, the third patterned conductive layer comprising at least one second electrode line, at least one third electrode connected to the second electrode line, and at least one fourth electrode, wherein the third electrode, the second electrode line, and the fourth electrode are disposed in the pixel region, the first electrode, the first portion of the patterned semiconductor layer, and the third electrode are disposed to form a transistor, and the fourth electrode and the second electrode are correspondingly disposed to form a storage capacitor; a protection layer disposed to cover the third patterned conductive layer and the second insulation layer in the pixel region; and a patterned conductive film disposed on the protection layer in the pixel region, the patterned conductive film comprising at least one pixel electrode connected to the transistor and the storage capacitor.