Patent ID: 8884669

Claim:
An electronic device, comprising: a plurality of functional blocks; a power control module for causing selected functional blocks to operate in a low power mode with power supply reduced or cut-off and subsequently to be restored to a full power mode, while leaving other functional blocks supplied continuously with power; and a power mode control distribution network including a plurality of serially connected chains of buffers for distributing power mode control signals received at a common input end to respective output ends that are connected to respective functional blocks; wherein in said low power mode said power control module causes power to be supplied continuously to at least output buffers at said output ends of said chains while causing power supplied to other buffers closer to said input end of said chains to be reduced or cut-off, wherein said output buffers include feedback paths for causing the states of said output buffers prior to said low power mode to latch during said low power mode, and wherein said buffers of said chains include respective high active inverters for providing a high active signal at an inverter output and respective low active inverters for providing a low active signal at an inverter output, the inverters of each buffer being connected in series, wherein in said low power mode said power control module causes power to be supplied continuously to continuously powered inverters of said output buffers while causing power supplied to other inverters of said output buffers to be reduced or cut-off.