Patent ID: 8200152

Claim:
A semiconductor integrated circuit comprising: a power supply circuit constructed to generate a DC voltage by rectifying and smoothing an AC signal supplied from an antenna; a charge pump circuit which is operated by the DC voltage generated by the power supply circuit; a clock generation circuit which generates a clock signal; and a voltage detector constructed to output a control voltage according to a difference between an output voltage of the charge pump circuit and a predetermined voltage, wherein the charge pump circuit includes a plurality of charge/discharge circuits successively connected to each other by respective output terminals of said plurality of charge/discharge circuits in preceding stages being connected with respective input terminals thereof in succeeding stages, wherein the charge pump circuit is constructed to repeat a voltage generation action using the clock signal fed from the clock generation circuit, wherein each said charge/discharge circuit has a capacitor and is configured to charge and discharge the capacitor, wherein each charge/discharge circuit comprises an inverter and a MOS transistor connected in series between power supply terminals of the power supply circuit, the capacitor being coupled between an output terminal of the inverter and an output terminal of the charge/discharge circuit, and a unidirectional element connected between an input terminal of the charge/discharge circuit and the output terminal thereof, wherein the control voltage is input to a gate terminal of the MOS transistor, wherein a charge current flowing to the capacitor is controlled according to the control voltage, wherein, as the clock signal is fed to the charge pump circuit, the control voltage is increased until a predetermined voltage level so as to continuously decrease the charge current flowing to the capacitor through the MOS transistor, and wherein the charge pump circuit is configured to check a charge output from an output voltage terminal of the charge pump circuit, and is further configured to maintain the output voltage of the charge pump circuit at the predetermined voltage by maintaining without interruption, at the charge pump circuit, the clock signal fed from the clock generation circuit when repeating the voltage generation action.