Patent ID: 8242021

Claim:
A method for manufacturing a semiconductor device, the method comprising: forming an underlying layer and a first hard mask layer over a semiconductor substrate; forming a second hard mask pattern, having a line type pattern, over the first hard mask layer; forming parallel spacers along the second hard mask line pattern by forming a first sidewall spacer along one sidewall of the line pattern and forming a second sidewall spacer along an opposing sidewall of the line pattern; removing the second hard mask pattern so that the parallel spacers remain; forming a first photoresist pattern overlapping one of the first sidewall spacer or second sidewall spacer; removing the exposed sidewall spacer with the first photoresist pattern as a mask to form a spacer pattern; forming a second photoresist pattern, the second photoresist pattern having a pad pattern over the first hard mask layer and overlapping a part of the spacer pattern; etching the first hard mask layer, with the second photoresist pattern and the spacer pattern as a mask, to form a first hard mask pattern; and, etching the underlying layer with the first hard mask pattern as a mask, to form an underlying pattern.