Patent ID: 7496917

Claim:
A computer-implemented method for using a processor as a virtual device, said method comprising: loading data from a first processor to a first location in a common memory in a computer system; loading software code that processes the data in a second location in the common memory; writing an instruction block from the first processor to a third location in the common memory, wherein the instruction block includes the addresses of the first and second locations; sending a message from the first processor to a second processor that includes the address of the third location, the second processor included in a plurality of processors included in the computer system, wherein the plurality of processors share the common memory, wherein each of the processors have a local memory, and wherein at least two of the processors are dislike and heterogeneous; in response to receiving the message, retrieving, by the second processor, the instruction block from the third location; in response to retrieving the instruction block from the third location, copying, by the second processor, the data from the first location in the common memory to the second processor's local memory; in response to retrieving the instruction block from the third location, copying, by the second processor, the software code from the second location in the common memory to the second processor's local memory; and processing the data by the second processor using the software code stored in the second processor's local memory.