Patent ID: 8453092

Claim:
A circuit, comprising: a first inductor comprising a first end and a second end; wherein the first end of the first inductor forms an input node of the circuit; a second inductor comprising a first end and a second end; wherein the second end of the first inductor is coupled to the first end of the second inductor forming an output node of the circuit; a resistor coupled to the second end of the second inductor; and an electrostatic discharge structure coupled to the output node and configured to provide an amount of electrostatic discharge protection; wherein the amount of electrostatic discharge protection is based on a parasitic bridge capacitance and a load capacitance metric; and wherein the parasitic bridge capacitance is calculated as a function of quantities comprising a parasitic capacitance of the resistor within a T-coil network denoted as C TM , a parasitic capacitance of an input/output pad coupled to an input of the T-coil network denoted as C PD , and an inter-winding capacitance of the first and second inductors denoted as C BI .