Patent ID: 8762320

Claim:
A state machine that supports out-of-order processing of events, comprising: a memory to store information directed to transitions that are supported by the state machine; logic in communication with the memory, the logic to (i) determine if an incoming event is a transition associated with a current state, (ii) determine if the transition is out-of-order from a predetermined order of transitions supported by the state machine, (iii) determine if the out-of-order transition is to a reachable state that is either a state prior to the current state of the state machine or a future state from the current state of the state machine, (iv) allow the transition to be undertaken if the transition is to the reachable state, and (v) perform a plurality of transitions associated with operations (i)-(iv) concurrently, wherein upon determining if the out-of-order transition is to the reachable state being a state prior to the current state, the logic alters an executing state of the state machine as the prior state, performs one or more actions for entry into the prior state, performs one or more actions while executing within the prior state, and exits the prior state to revert back to the current state.