Patent ID: 7026214

Claim:
A method for fabricating a semiconductor device comprising: forming a second semiconductor region having a first conductivity type and a resistance higher than a first semiconductor region on the first semiconductor region having the first conductivity type; forming a gate insulating film on the second semiconductor region; forming a gate electrode on the gate insulating film; implanting an impurity having a second conductivity type into the second semiconductor region using the gate electrode as a mask to form a third semiconductor region having the second conductivity type in a surface of the second semiconductor region; forming an insulating film on the second semiconductor region to cover the gate electrode; removing a partial region of the insulating film on the gate electrode; patterning the gate electrode using the insulating film as a mask to form an opening portion reaching the gate insulating film in a partial region of the gate electrode; implanting the impurity having the second conductivity type from the opening portion into the second semiconductor region to form the fourth semiconductor region having the second conductivity type in the surface of the second semiconductor region, the fourth semiconductor region being separated from the third semiconductor region; removing the second and fourth semiconductor regions immediately under the opening portion using the insulating film and gate electrode as a mask to form a trench extending to the first semiconductor region through the second and fourth semiconductor regions; and filling the trench with a conductive member.