Patent ID: 7212431

Claim:
A nonvolatile ferroelectric memory device comprising: a memory cell array comprises a plurality of unit cell arrays arranged in row and column directions each including a plurality of serially connected unit memory cells whose switching operations are selectively dependent upon a voltage applied to a selected one of a plurality of word lines and a selected one of a plurality of bottom word lines; a sense amplifier unit adapted and configured to sense and amplify data applied from the memory cell array to store the amplified data; a column decoding unit adapted and configured to decode a column selecting signal for selecting a memory cell; and a column switching unit whose switching operation is controlled in response to an output signal from the column decoding unit, and adapted and configured to selectively connect a data bus to the sense amplifier unit, wherein each of the plurality of unit memory cells comprises a ferroelectric layer and is adapted and configured to read and write data by inducing different channel resistance to a channel region dependent upon a polarity state of the ferroelectric layer.