Patent ID: 8546929

Claim:
A method of manufacturing an embedded integrated circuit package-on-package system comprising: forming a first integrated circuit package including: providing a first structure having a first terminal pad, forming a vertical laminated structure including at least a first integrated circuit die on the first structure and a second integrated circuit die on the first integrated circuit die, connecting the first integrated circuit die to the first terminal pad and an external interconnect through a conductive pattern and a first vias wherein the conductive pattern and the first vias are formed from the same material, molding a substrate forming encapsulation on the first structure and the vertical laminated structure for forming a substrate, and mounting a wire bond integrated circuit die to a top surface of the substrate; forming a second integrated circuit package including: providing an embedded structure having traces and contacts, connecting an embedded integrated circuit die to the traces with respective second vias wherein the traces and the respective second vias are formed from the same material, and forming an embedded substrate by molding the substrate forming encapsulation on the embedded structure and the embedded integrated circuit die embedded in the embedded substrate and leaving the contacts exposed; and mounting the second integrated circuit package over the first integrated circuit package by attaching top interconnects between the first terminal pad and the contacts.