Patent ID: 7200690

Claim:
A method of transferring a large volume of data from a source memory to a destination at a desired throughput rate, said method being implemented in a memory access system, said memory access system containing a plurality of sub-systems, each of said plurality of sub-systems providing a corresponding one of a plurality of worst-case delays, said method comprising: determining a worst case throughput rate as being inversely proportionate to a sum of said plurality of worst-case delays; determining a maximization factor as equaling a desired throughput rate divided by said worst case throughput rate; providing a direct memory access (DMA) engine coupled to retrieve said large volume of data in the form of a plurality of bursts; and providing a number of store and forward bridges (SFB) equaling one less than said maximization factor, wherein said SFBs receive said plurality of bursts and forward said plurality of bursts to said destination.