Patent ID: 7767526

Claim:
A method for forming vertical gate and gate contact for a trench MOSFET device, comprising: a) forming a hard mask layer on a surface of a semiconductor substrate having an active cell area; b) applying a trench mask on the hard mask layer, wherein the trench mask defines a body contact trench and a gate trench at the active cell area; c) simultaneously etching the body contact trench and the gate trench into the semiconductor substrate to a first predetermined depth; d) applying a first gate trench mask on top of the hard mask layer, the gate trench mask having openings at the gate trench but not the body contract trench, wherein the openings are wider than the corresponding trenches; e) etching the gate trench but not the body contact trench deeper into the semiconductor substrate to a second predetermined depth; and f) forming conductive material in the gate trench to form a gate.