Patent ID: 8547266

Claim:
A sigma-delta converter comprising: an input node; a switched capacitor input stage configured to integrate a difference signal between an input signal from said input node and a feedback signal representing an output signal; a switched capacitor adder coupled downstream from said switched capacitor input stage and configured to generate a sum signal based upon the input signal and a signal generated by said switched capacitor input stage; a switched capacitor output stage configured to amplify the sum signal and to generate an analog amplified signal; a quantization stage coupled in cascade to said switched capacitor output stage and configured to generate the output signal as a digital replica of the analog amplified signal; and a circuit configured to generate the feedback signal as an analog replica of the output signal; said switched capacitor adder comprising a first plurality of switches configured to be in phase-opposition and to be driven by first and second control signals, and a first capacitor alternately coupled through said first plurality of switches between a reference voltage and an input of said switched capacitor output stage, and between an output of said switched capacitor input stage and the reference voltage.