Patent ID: 7986002

Claim:
A semiconductor device, comprising: a substrate, and a semiconductor region formed in a predetermined area of the substrate, said semiconductor region having a predetermined concentration of an impurity and a principal surface, wherein: in the semiconductor device, a first transistor having a semiconductor FIN structure and a second transistor having a planar structure are integrated in the semiconductor region, the first transistor includes: a trench region formed in the semiconductor region so as to have a concave shape with a bottom surface located at a lower position than the principal surface of the semiconductor region, said trench region having first side surfaces, source/drain regions each of which is formed so as to be buried in the trench region, said source/drain regions containing an impurity, a semiconductor FIN structure formed in the trench region so as to be buried in the trench region, and located between the source/drain regions, said semiconductor FIN having a convex shape with an upper surface and second side surfaces, an isolation insulating film formed in the trench region so as to be buried between the source/drain regions and the first side surfaces of the trench region, and between the semiconductor FIN structure and the first side surfaces of the trench region, a gate insulating film disposed on the upper surface and both side surfaces of the semiconductor FIN structure, and, a gate electrode disposed on the second side surfaces and the upper surface of the semiconductor FIN structure with the gate insulating film interposed therebetween, and between the second side surfaces of the semiconductor FIN structure and the isolation insulating film, the second transistor is formed on a part of the principal surface of the semiconductor region outside said trench region, and the upper surface of the FIN structure of the first transistor does not protrude from the principal surface of the semiconductor region.