Patent ID: 8866206

Claim:
An integrated circuit device comprising: a plurality of fins formed on an upper surface of a semiconductor substrate and extending in a first direction; a wide fin formed on the upper surface of the semiconductor substrate, extending in the first direction, and having a wider width than widths of the fins; a device isolation insulating film placed between the fins and the wide fin; a gate electrode extending in a second direction crossing the first direction and provided on the device isolation insulating film; a first insulating film located between upper surfaces of the fins and the gate electrode; and a second insulating film located between side surfaces of the fins and the gate electrode, in a first region where a part of the fins are consecutively arranged, an upper surface of the device isolation insulating film being located at a first position below upper ends of the fins, and in a second region located in the second direction as viewed from the first region, the upper surface of the device isolation insulating film being located at a second position above the upper ends of the fins, in the second region, an other part of the fins being provided, the device isolation insulating film covering entirely the side surfaces of the other part of the fins, and the wide fin being placed at a boundary between the first region and the second region.