Patent ID: 6979627

Claim:
A method of forming an isolation trench in a semiconductor structure comprising: providing a wafer with a semiconductor material; forming a trench into the semiconductor material, wherein the trench includes a sidewall of the semiconductor material; depositing a first dielectric material overlying a bottom portion of the trench to a first depth, with no substantial deposition of the first dielectric material on the sidewall in a region above the first depth; depositing a second dielectric material overlying the first dielectric material in the trench to a second depth, with no substantial deposition of the second dielectric material on the sidewall in a region above the second depth, wherein the second dielectric material is different from the first dielectric material, wherein the first dielectric material has a first thickness and the second dielectric material has a second thickness less than the first thickness; forming a trench sidewall liner on a portion of the semiconductor material within the trench, wherein the second dielectric material prevents formation of the trench sidewall liner below a level of the second dielectric material within the trench; and depositing a dielectric trench fill material over the second dielectric material in the trench, wherein the dielectric trench fill material is selectively etchable with respect to the second dielectric material.