Patent ID: 7541644

Claim:
A semiconductor device, comprising: a first insulating film; a silicon layer formed on said first insulating film and in which a semiconductor element is built; a second insulating film formed on said silicon layer and said semiconductor element; a first wiring formed on said second insulating film and connected to ground; a first plug connecting a source of a MOS transistor of said silicon layer with said first wiring; a predetermined back metal film formed under said first insulating film; a second plug connecting said first wiring with said back metal film; and a support substrate composed of a material of higher resistance than that of said back metal film in a predetermined position between said first insulating film and said back metal film, wherein said first and second plugs, said wiring and said back metal film have a higher thermal conductivity than that of said first insulating film; said semiconductor element is the MOS transistor; only said second plug that is connected with the source of said MOS transistor is connected with said back metal film; said semiconductor device is formed with a first semiconductor chip and a second semiconductor chip; said first semiconductor chip and said second semiconductor chip are different from each other in power consumption; said back metal film of said first semiconductor chip is connected with a protruding pad of said second semiconductor chip; and there is an interspace between said first semiconductor chip and said second semiconductor chip.