Patent ID: 8901737

Claim:
A circuit arrangement, including a substrate containing a semiconductor material and a dielectric layer, the circuit arrangement comprising: at least one wiring indentation which is arranged in the dielectric layer and containing a material through which a current flows during operation of the circuit arrangement, wherein an interconnect is disposed above the at least one wiring indentation; at least one auxiliary indentation which is arranged in the dielectric layer and containing an electrically conductive material through which an electric current does not flow during operation of the circuit arrangement or which does not influence a function of the circuit arrangement, wherein the at least one auxiliary indentation has a depth that is larger than a depth of the at least one wiring indentation in the dielectric layer; and at least one other metal structure through which an electric current does not flow during operation of the circuit arrangement or does not influence the function of the circuit arrangement, the at least one other metal structure disposed adjacent to and above the dielectric layer and located substantially adjacent to the edge of the auxiliary indentation, wherein the at least one other metal structure is not electrically connected to the electrically conductive material of the at least one auxiliary indentation.