Patent ID: 8476092

Claim:
A fabricating method for a thin film transistor substrate for a liquid crystal display device to minimizing defects due to static electricity comprising: providing a thin film transistor substrate divided into a display area displaying the image and a non-display area besides the display area; forming a gate wire in the display area, a common voltage line for a MPS (mass production system) test in the non-display area, and a grounding line for the MPS test in the non-display area by patterning a metal layer; forming a gate insulating layer covering the gate wire and a first insulating layer covering the common voltage line for the MPS test and the grounding line for the MPS test with same material at the same time; forming a data wire crossing the gate wire and defining a pixel area in the display area; and forming a pixel electrode in the pixel area, a first electrode layer on the first insulating layer corresponding to the common voltage line for the MPS test and, a second electrode layer on the first insulating layer corresponding to the grounding line for the MPS test by patterning a transparent conductive material layer, wherein the common voltage line for the MPS test and the grounding line for the MPS test are formed in parallel in the non-display area at the edge of the thin film transistor substrate.