Patent ID: 7655520

Claim:
A method for manufacturing a non-volatile memory comprising the steps of: providing a silicon substrate having a device separation film; forming a first diffusion barrier film, a ferroelectric substance, and a second diffusion barrier film successively on the entire substrate; patterning the second diffusion barrier film, the ferroelectric substance, and the first diffusion barrier film into a size smaller than that of a desired floating gate; forming a third diffusion barrier film on the entire substrate including the patterned laminated films; etching the third diffusion barrier film to remove a part formed on the substrate; oxidizing the resulting substrate to selectively grow a silicon oxide film only on the substrate surface; forming a first polysilicon film for a floating gate on the silicon oxide film; patterning the first polysilicon film and the silicon oxide film into the shape of lines extending along a direction; forming an oxide film for a control gate, a second polysilicon film for a control gate, a tungsten silicide film, and a hard mask film successively on the entire substrate including the patterned first polysilicon film; etching the hard mask film, the tungsten silicide film, the second polysilicon film, and the oxide film to form a control gate in the shape of a line extending perpendicularly to the direction and a gate oxide film positioned below the control gate; etching the first polysilicon film and the silicon oxide film to form a floating gate made of the first polysilicon film and a tunnel oxide film positioned below both ends of the floating gate; forming spacers on both lateral walls of the laminated floating gate and control gate, respectively; and forming source/drain regions within the substrate surfaces on both sides of the control gate including the spacers, respectively.