Patent ID: 8824623

Claim:
A timer device comprising: a first external terminal; a second external terminal; a delay circuit that delays a signal input to the first external terminal; a counting circuit that counts a given set value, and when counting of the set value is completed, outputs a measurement completion signal via the second external terminal, and an input time determination circuit that determines the time length relationship between an input time of the signal input and a given determination time based on a signal obtained by delaying the signal input by the delay circuit, wherein, when the input signal is input to the first external terminal after an output of the measurement completion signal, the counting circuit completes the output of the measurement completion signal based on a signal obtained by delaying the signal input by the delay circuit, the counting circuit newly counts the give set value every time counting of the give set value is completed; and the counting circuit selects whether or not a count value is to be initialized according to the determination result of the input time determination circuit.