Patent ID: 7234412

Claim:
A semiconductor substrate deposition processor chamber liner apparatus comprising: a plurality of pieces which when assembled within a selected semiconductor substrate deposition processor chamber are configured to at least partially restrict at least a majority portion of all internal wall surfaces which define said semiconductor substrate deposition processor chamber from exposure to deposition material within the chamber, all of the pieces of the liner apparatus when assembled being received entirely within the semiconductor substrate deposition processor chamber, at least some of the pieces being sized for passing completely through a substrate passageway to the chamber through which semiconductor substrates pass into and out of the chamber for deposition processing, the liner apparatus when assembled within the semiconductor substrate deposition processor chamber comprising an assembled liner apparatus which is of an assembled size which does not enable passing of the assembled liner apparatus through said substrate passageway; and the assembled liner apparatus forming an internal subchamber and a liner apparatus substrate passageway through which semiconductor substrates pass into and out of the internal subchamber for deposition processing, said at least some of the pieces comprising a first set of pieces which interlock in a stack to form sidewalls of the liner apparatus substrate passageway, and said at least some of the pieces comprising a second set of pieces which interlock in a stack below the stack of the first set of pieces.