Patent ID: 7876250

Claim:
An electronic circuit, comprising: an analog to digital conversion circuit having an analog input and a digital output; a first digital noise cancellation filter coupled between the analog input and the digital output, to cancel noise from an analog to digital converted signal; a second digital noise cancellation filter configured to be at least temporarily coupled between an input of the first digital noise cancellation filter and a further digital output; a control circuit configured to perform a calibration of noise cancellation by programming respective sets of at least one filter coefficient into the first and second digital noise cancellation filters, with a difference between the sets of at least one filter coefficient, computing a difference between averaged size indications of signal values at the digital output and the further digital output obtained using a same input signal and the sets of at least one filter coefficients and to select a set of at least one filter coefficients for normal operation dependent on the difference between the averaged size indications, wherein the control circuit is configured to perform repeated cycles, each cycle comprising programming respective pairs of sets of filter coefficients into the first and second digital noise cancellation filters, with a difference between the sets of each pair and computing a difference between averaged size indications of signal values, the control circuit being configured to adapt sets of filter coefficients in successive cycles for a predetermined period of time and thereupon switching operation with a last or before last determined set of filter coefficients using operational input signals.