Patent ID: 8719494

Claim:
A method for movement of partial data segments within a computing storage environment having lower and higher levels of cache by a processor, comprising: determining if one of the partial data segments should be cached on the lower level of cache by considering an Input/Ouput Performance (IOP) metric, a bandwidth metric, and a garbage collection metric; and promoting a whole data segment containing the one of the partial data segments to both the lower and higher levels of cache, wherein: requested data of the whole data segment is split and positioned at a Most Recently Used (MRU) portion of a demotion queue of the higher level of cache, unrequested data of the whole data segment is split and positioned at a Least Recently Used (LRU) portion of the demotion queue of the higher level of cache, and the unrequested data is pinned in place until a write of the whole data segment to the lower level of cache completes.