Patent ID: 8742401

Claim:
A field effect transistor (FET), comprising: a gated trench disposed in a semiconductor region of a first conductivity type; a non-gated trench disposed in the semiconductor region; a body region of a second conductivity type disposed in the semiconductor region and adjacent the non-gated trench; a first shield electrode disposed in a bottom portion of the gated trench; a second shield electrode disposed in a bottom portion of the non-gated trench; a dielectric layer disposed in the non-gated trench; and a conductive material of the second conductivity type disposed in the non-gated trench such that the dielectric layer is disposed between the second shield electrode disposed in the non-gated trench and the conductive material, the conductive material contacting the body region adjacent the non-gated trench and contacting a sidewall of the non-gated trench.