Patent ID: 6967408

Claim:
A gate stack structure situated over a semiconductor material layer, said gate stack structure comprising: a gate oxide layer on said semiconductor material layer; a gate layer, comprising a first conductive material, on said gate oxide layer; a layer of refractory metal silicide on said gate layer; an undoped silicon dioxide cap on and in contact with said layer of refractory metal silicide; a spacer over a lateral side of the gate layer and in contact with said semiconductor material layer, said spacer comprising a nonconductive material, wherein the lateral side of the gate layer is oriented perpendicular to said base semiconductor material layer; a contact plug having a base in contact with said semiconductor material layer, said contact plug comprising a second conductive material and being situated adjacent to the gate layer, over said spacer, and over a portion of said undoped silicon dioxide cap, said contact plug having a top and a lateral wall extending from said top to said base, wherein said lateral wall is not vertical along its entire height from said top to said base, wherein the second conductive material physically contacts the semiconductor material layer; and a layer of doped silicon dioxide over and in contact with said spacer, over and in contact with said undoped silicon dioxide cap, and adjacent to and in contact with said contact plug, wherein a conductive layer is disposed along said lateral wall along the second conductive material and with said second conductive material comprises a part of said contact plug, said conductive layer having said second conductive material of said contact plug on one of its two opposite sides and having said spacer and said layer of doped silicon dioxide on the other of said sides, such that said conductive layer is only one of a refractory metal silicide or a refractory metal in physical contact with the doped silicon dioxide, with the spacer, and with the second conductive material.