Patent ID: 6864178

Claim:
A method of making a MOS transistor, the method comprising: providing a semiconductor substrate comprising a polysilicon gate electrode with a silicide layer thereon, a spacer which is formed on both lateral walls of said polysilicon gate electrode, and source and drain regions with lightly doped drain regions which are formed at both sides of said polysilicon gate electrode; forming an insulating layer on the area of said substrate including said polysilicon gate electrode; polishing said insulating layer so that the top of said polysilicon gate electrode is exposed; etching some part of said insulating layer and said spacer so that both lateral walls of said polysilicon gate electrode are exposed; forming a metal layer on said substrate resulted from the preceding step so that said polysilicon gate electrode is covered with said metal layer; and transforming completely said polysilicon gate electrode into a metal silicide gate electrode by performing a thermal treatment process for said substrate coated with said metal layer.