Patent ID: 7350023

Claim:
A memory device connectable with a host apparatus and adapted to operate with power and clocks supplied from the host apparatus, comprising: external terminals for connecting with the host apparatus; a flash memory chip adapted to store data; an IC chip adapted to process data; and a controller chip connected with the external terminals, the flash memory chip and the IC chip, wherein: the flash memory chip, the IC chip and the controller chip are discrete chips, responsive to a command from the host apparatus, the controller chip writes data inputted from the host apparatus into the flash memory chip via the external terminals, and, responsive to a command from the host apparatus, the controller chip transfers data read from the flash memory chip to the host apparatus via the external terminals, responsive to a command from the host apparatus, the controller chip transfers data inputted from the host apparatus to the IC chip via the external terminals, and responsive to a command from the host apparatus, the controller chip transfers data inputted from the IC chip to the host apparatus via the external terminals, and a power terminal, a clock terminal and a data terminal of the external terminals are connected with the controller chip and a clock terminal of the IC chip is connected with the controller chip.