Patent ID: 8541267

Claim:
A method for fabricating a FinFET on a substrate, comprising: providing a substrate with an active semiconductor layer on an insulator layer; and concurrently fabricating a) trench isolation regions in the active semiconductor layer for electrically isolating different active regions in the active semiconductor layer from each other, and b) trench gate-isolation regions in the active semiconductor layer for electrically isolating at least one gate region of the FinFET in the active semiconductor layer from a fin-shaped channel region of the FinFET in the active semiconductor layer; wherein concurrently fabricating the trench isolation regions and the trench gate-isolation regions comprises: fabricating first trenches in the active semiconductor layer for the trench isolation regions and second trenches in the active semiconductor layer for the trench gate-isolation regions; and filling the first trenches and the second trenches with an insulating material, thus providing the trench isolation regions and the trench gate-isolation regions.