Patent ID: 7915723

Claim:
A transistor array formed on a single insulating substrate comprising: a plurality of layers which are contacted and laminated directly to one another on an insulating layer for semiconductor layer formation provided on an entire surface of the substrate, said plurality of layers including a plurality of semiconductor layers, a plurality of conductor layers, and a plurality of insulating layers; wherein the plurality of semiconductor layers include a first semiconductor layer which is composed of polysilicon, and a second semiconductor layer which is composed of amorphous silicon and which is formed above the first semiconductor layer such that the first semiconductor layer is between the substrate and the second semiconductor layer; a driver circuit which comprises polysilicon thin-film transistors using the first semiconductor layer and amorphous silicon thin-film transistors using the second semiconductor layer; and a pixel array including a plurality of pixels arrayed two-dimensionally on the substrate; wherein the driver circuit operates each pixel by a preferred drive state; wherein the driver circuit comprises an output circuit section which generates and outputs a drive control signal having a predetermined signal level to the pixels; and wherein the output circuit section has a circuit section portion which generates the drive control signal and which includes only the amorphous silicon thin-film transistors as transistors.