Patent ID: 7989876

Claim:
A nonvolatile semiconductor memory device comprising: a plurality of memory cells capable of electrically writing, erasing, and reading information, each of the memory cells including: source/drain diffusion layers which are separately formed on a semiconductor substrate; a first insulating film formed on a channel provided between the source/drain diffusion layers; an electric charge accumulation layer formed on the first insulating film, the electric charge accumulation layer being made of nitride or oxynitride containing at least one selected from Si, Ge, Ga, and Al; a donor layer formed on the electric charge accumulation layer, the donor layer being made of nitride or oxynitride containing at least one selected from Si, Ge, Ga, and Al, and containing n-type dopant impurity, wherein an electron affinity of the donor layer is equal to or smaller than an electron affinity of the electric charge accumulation layer, and a film thickness of the donor layer is smaller than a film thickness of the electric charge accumulation layer; a second insulating film formed on the donor layer, wherein an electron affinity of the second insulating film is smaller than the electron affinity of the donor layer; and a control gate electrode formed on the second insulating film.