Patent ID: 7191085

Claim:
A method for testing an electric circuit, comprising: a) applying a first data signal to a first electric circuit, the first electric circuit produced by a first process sequence; b) generating a signal indicative if said first electric circuit is defective by comparing a second data signal with a data signal generated by said first electric circuit in response to said first data signal; c) producing a second electric circuit by a predetermined second process sequence which includes incorporating intentionally at least one predetermined defect structure into said second electric circuit; d) applying the first data signal to said second electric circuit and comparing the second data signal with a data signal generated by said second electric circuit in response to said first data signal; e) repeatedly modifying the first data signal and applying said modified first data signal to said second electric circuit until said comparison indicates a defect of said second electric circuit; and f) storing information about the modified first data signal which results in said indication about the defect of said second electric circuit.