Patent ID: 7421383

Claim:
A method for simulating a semiconductor device having a semiconductor junction to improve semiconductor device design, comprising: measuring a plurality of semiconductor devices to produce empirical current versus voltage characterization data for each semiconductor device; extrapolating the empirical current versus voltage characterization data for each semiconductor device to produce extrapolated current versus voltage characterization data in an exponentially increasing region of said current versus voltage characterization data; determining a series resistance value for each semiconductor device as a function of the difference between said empirical current versus voltage characterization data and said extrapolated current versus voltage characterization data at a selected current value, each semiconductor device having said series resistance value determined at a different selected current value; deriving a function characterizing said determined series resistance values as a function of said selected current values; wherein said function is a sigmoidal function having the form R OD ( 1 + I D × R OD 2 × kT q ) m + R OM ⁢ ⁢ wherein k is a predetermined constant, T is the semiconductor device temperature, q is a predetermined constant, m is a fitting parameter, I D is the semiconductor device current, R OD is an active region resistance limit for the semiconductor device current as the semiconductor device current approaches zero, and R OM is the semiconductor device resistance limit as the semiconductor device current approaches infinity; employing said function to determine a modeling series resistance value corresponding to a modeling current value; inputting said modeling series resistance value into a semiconductor device performance model; and, simulating the performance of said semiconductor device with said determined series resistance value input into said semiconductor device performance model.