Patent ID: 8470675

Claim:
A process of forming an integrated circuit, comprising steps: providing a substrate; forming a dummy oxide layer on a top surface of said substrate, so that said dummy oxide layer covers a symmetric metal oxide semiconductor (MOS) transistor area and a drain extended metal oxide semiconductor (DEMOS)/laterally diffused metal oxide semiconductor (LDMOS) transistor area; forming a MOS ion implantation photoresist pattern on said dummy oxide layer, so that said MOS ion implantation photoresist pattern covers said DEMOS/LDMOS transistor area and exposes said symmetric MOS transistor area; performing an MOS ion implantation process so that MOS dopants are implanted into said symmetric MOS transistor area; removing said dummy oxide layer in said symmetric MOS transistor area in a manner such that said dummy oxide layer under said MOS ion implantation photoresist pattern in said DEMOS/LDMOS transistor area is not removed; removing said MOS ion implantation photoresist pattern; forming a lower voltage MOS gate dielectric layer on exposed portions of said substrate, so that said symmetric MOS transistor area is covered by said lower voltage MOS gate dielectric layer, and so that a thickness of said lower voltage MOS gate dielectric layer is less than a thickness of said dummy oxide layer in said DEMOS/LDMOS transistor area after said lower voltage MOS gate dielectric layer is formed; forming a symmetric MOS gate on said lower voltage MOS gate dielectric layer in said symmetric MOS transistor area; forming a DEMOS/LDMOS gate on said dummy oxide layer in said DEMOS/LDMOS transistor area; forming symmetric MOS source and drain regions in said substrate in said symmetric NMOS transistor area adjacent to said symmetric MOS gate; forming a DEMOS/LDMOS source region in said substrate in said DEMOS/LDMOS transistor area adjacent to and on one side of said DEMOS/LDMOS gate; and forming a DEMOS/LDMOS drain region in said substrate in said DEMOS/LDMOS transistor area adjacent to said DEMOS/LDMOS gate opposite from said DEMOS/LDMOS source region.