Patent ID: 7287207

Claim:
An apparatus for computing a parity character for a codeword of a cyclic code, the parity character having intermediate locations between a first block and a second block of the codeword, the first block or the second block comprising a plurality of message sections and each message section comprising at least one message character, the apparatus comprising: an adder unit; a first adder coupled to the adder unit, for successively generating a sum of an output value from the adder unit and a respective message character of a first message section adjacent to the parity characters within the first block; a first multiplier coupled to the first adder, for successively multiplying a respective sum from the first adder by a corresponding coefficient of a generator polynomial to generate a first product; and a plurality of second multipliers for generating a plurality of second products, the second multipliers being coupled to the adder unit, for successively multiplying a respective message character of every message section other than the first message section by a coefficient of a corresponding shift polynomial to generate the second products; wherein the adder unit successively sums corresponding products obtained from the first multiplier and from the second multipliers.