Patent ID: 7599014

Claim:
A method for fabricating a pixel array substrate, comprising: forming a transparent conductive layer and a first conductive layer in sequence on a substrate, conducting a first optical mask process to pattern the first conductive layer and the transparent conductive layer so as to form a plurality of gate electrodes, a plurality of scan lines electrically connected with the gate electrodes, a plurality of data line patterns and a plurality of pixel electrode patterns; forming a dielectric layer and a semiconductor layer over the substrate in sequence; conducting a second optical mask process to pattern the dielectric layer and the semiconductor layer so as to form a channel over each of the gate electrodes and a plurality of contact window openings exposing the data line patterns, and removing the first conductive layer of the pixel electrode patterns so as to form a plurality of pixel electrodes; forming a second conductive layer over the substrate, wherein the second conductive layer fills into the contact window openings so as to form a plurality of contact windows electrically connected with the data line patterns; and conducting a third optical mask process to pattern the second conductive layer to form a plurality of contacting portions which are electrically connected with the contact windows, a plurality of source electrodes which are electrically connected with the data line patterns, and a plurality of drain electrodes which are electrically connected with the pixel electrodes, and removing the second conductive layer on each of the pixel electrodes, wherein the data line patterns at each column are electrically connecting with each other via the contacting portions and the contact windows so as to form a data line.