Patent ID: 7224753

Claim:
An M-ary-modulation-capable equalizing processing apparatus comprising: a signal divider that divides a received signal that has a plurality of information amounts a (a is a natural number) per symbol and that is converted into a digital baseband signal into a first signal to 2 a−1 th signal each having information of one bit per symbol; first phase rotator to 2 a−1 th phase rotator which respectively rotate phases of the first signal to 2 a−1 th signal by (π/2 a +(S(S=1˜2 a−1 )−1)π/2 a−1 ); first equalizing processor to 2 a−1 th equalizing processor which perform equalizing processing based on the Viterbi equalizing algorithm based on phase-rotated first signal to 2 a−1 th signal and a channel impulse response signal, and output a first provisional soft decision value to 2 a−1 th provisional soft decision value, respectively; and a soft-decision value determiner that makes a soft decision on whether each of the first provisional soft decision value to 2 a−1 th provisional soft decision value belongs to a symbol in a range of S−2 to S−2+2 a−1 −1.