Patent ID: 7921346

Claim:
A method for testing DFT/DFD structures surrounding a custom microcode array, comprising: scanning an Array Built-In Self-Test (ABIST) test pattern into a microcode array test circuitry; conducting conventional Level-Sensitive Scan Design (LSSD) Flush and Scan tests; upon successful completion of the LSSD Flush and Scan tests, invoking a test generator performing the steps of: generating LSSD deterministic test patterns, and applying the LSSD deterministic test patterns at a Design-For-Testability/Design-For-Diagnostics (DFT/DFD) test circuit; targeting logic associated with direct current (DC) and alternating current (AC) faults for array ABIST Design-For-Testability/Design-For-Diagnostics (DFT/DFD) functions surrounding the microcode array; and terminating further array ABIST tests upon resulting failure of the conducted LSSD Flush and Scan tests.