Patent ID: 7106728

Claim:
A switching system for routing input signals-comprising: a plurality of dilated routing nodes arranged in a plurality of stages, each of the dilated routing nodes being generated by enlarging a conventional routing node by a predetermined factor, each of the dilated routing nodes having a 0-input group and a 1-input group, and a 0-output group and a 1-output group, each group sized according to the predetermined factor, and each of the dilated nodes including means, responsive to the input signals which include 0-bound or 1-bound signals with respect to each of the dilated routing nodes, for statistically routing the 0-bound input signals to the 0-output group and 1-bound input signals to the 1-output group and routing a number of the 0-bound input signals exceeding a size of the 0-output group to the 1-output group, and routing a number of the 1-bound input signals exceeding a size of the 1-output group to the 0-output group, and line bundles interconnecting each output group of each of the dilated routing nodes in a given one of the stages to a predetermined input group of a pre-selected one of the dilated routing nodes in the next succeeding one of the stages, wherein the dilated routing nodes are interconnected as a divide-and-conquer interconnection network.