Patent ID: 7871891

Claim:
A method of forming a semiconductor memory device, the method comprising: forming a mold oxide layer on a semiconductor substrate including a cell region and a peripheral region outside the cell region; forming a support pad layer on the mold oxide layer so that the mold oxide layer is between the support pad layer and the semiconductor substrate; patterning the support pad layer and the mold oxide layer to provide an array of holes in the support pad layer and the mold oxide layer on the cell region of the semiconductor substrate, wherein the array of holes are arranged in a plurality of parallel lines with each of the lines defined by a plurality of the holes; forming a plurality of first capacitor electrodes wherein each of the first capacitor electrodes is formed along sidewalls of a respective one of the holes so that the first capacitor electrodes are arranged in a plurality of parallel lines with each of the lines including a plurality of the first capacitor electrodes, wherein forming the plurality of first capacitor electrodes comprises, depositing a conductive layer on the support pad layer and on sidewalls of the holes through the support pad layer and the mold oxide layer, forming an insulating layer on the conductive layer, and removing portions of the insulating layer and the conductive layer from surface portions of the support pad layer so that the surface portions of the support pad layer are exposed while maintaining portions of the conductive layer on the sidewalls of the holes; selectively removing portions of the support pad layer to define a plurality of capacitor support pads wherein each capacitor support pad is connected to first capacitor electrodes of at least two adjacent parallel lines of the first capacitor electrodes, and wherein adjacent capacitor support pads are spaced apart; and removing at least portions of the mold oxide layer from sidewalls of the first capacitor electrodes while maintaining the capacitor support pads, wherein the holes are arranged in a zigzag pattern so that the holes of adjacent ones of the parallel lines are offset in a direction perpendicular with respect to the parallel lines.