Patent ID: 8907481

Claim:
A structure, comprising: a stack of at least a first semiconductor structure on a second semiconductor structure; wherein each of the first and second semiconductor structures comprises: a semiconductor bulk covered with an insulating layer comprising metal interconnection levels; and a first surface comprising at least one conductive area forming a last one of the metal interconnection levels, wherein the first surfaces of the first and second semiconductor structures face each other, and the last metal interconnection level of the first semiconductor structure is electrically connected to the last metal interconnection level of the second semiconductor structure; a first interconnection pillar connected to said conductive area of the first semiconductor structure and protruding from the first surface of the first semiconductor structure; a housing passing through an entire thickness of the second semiconductor structure which receives all or part of the first interconnection pillar, said first interconnection pillar extending substantially into the semiconductor bulk of the second semiconductor structure; and a second interconnection pillar protruding from a second surface of the second semiconductor structure, said second surface opposite to the first surface, the second interconnection pillar in electric contact with said first interconnection pillar.