Patent ID: 7046083

Claim:
A power amplifier capable of operating in a high power mode, a low power mode, and an intermediate power mode between the high power mode and the low power mode, the power amplifier comprising: a first amplifier output stage configured to receive a radio frequency (RF) input signal, wherein the first amplifier output stage is enabled during the high power mode, the low power mode and the intermediate power mode, and wherein the first amplifier output stage comprises: a first set of transistors, each having a control electrode coupled to receive the RF input signal; a first set of distributed bias circuits, wherein the control electrode of each of the transistors in the first set of transistors is coupled to a corresponding distributed bias circuit in the first set of distributed bias circuits; and a first common bias reference circuit coupled to each of the distributed bias circuits in the first set of distributed bias circuits; a second amplifier output stage configured to receive the RF input signal; a control circuit coupled to the second amplifier output stage, wherein the control circuit is configured to enable the second amplifier output stage during the high power mode and the intermediate power mode, and wherein the control circuit is configured to disable the second amplifier output stage during the low power mode; a third amplifier output stage configured to receive the RF input signal; and a second control circuit coupled to the third amplifier output stage, wherein the second control circuit is configured to enable the third amplifier output stage during the high power mode, and wherein the second control circuit is configured to disable the third amplifier output stage during the intermediate power mode and the low power mode.