Patent ID: 7512394

Claim:
A up-conversion mixer comprising: a first hybrid coupler adapted to receive an input intermediate frequency (IF) signal and to produce a first IF signal (IF 1 ) and a second IF (IF 2 ) signal, the second IF signal being 180 degree off-phase compared to the first IF signal; a first traveling-wave single-ended mixer adapted to mix the first IF signal (IF 1 ) and a first local oscillator (LO 1 ) signal to produce a first radio frequency signal (RF 1 ); a second traveling-wave single-ended mixer adapted to mix the second IF signal (IF 2 ) and a second local oscillator signal (LO 2 ) to produce a second RF signal (RF 2 ); and a second hybrid coupler adapted to combine the first RF signal and the second RF signal to produce an output RF signal; such that the first traveling-wave single-ended mixer further comprises: a least two switching devices each switching device having a first current terminal, a second current terminal, and a gate terminal, and said switching devices connected in parallel; wherein each switching device provides a first parasitic capacitance between its first current terminal and its gate terminal and a second parasitic capacitance between its first current terminal and its second terminal; a gate matching circuit including a plurality of gate inductors, serially connected to each other, each gate inductor connected to at least one gate terminal such that inductance of said gate inductors electrically combine with the first parasitic capacitance to present a first input impedance; and a drain matching circuit including a plurality of drain inductors, serially connected to each other, each drain inductor connected to at least one second current terminal such that inductance of said drain inductors electrically combine with the second parasitic capacitance to present a second input impedance; such that the second traveling-wave single-ended mixer further comprises: a least two switching devices each switching device having a first current terminal, a second current terminal, and a gate terminal, and said switching devices connected in parallel; wherein each switching device provides a first parasitic capacitance between its first current terminal and its gate terminal and a second parasitic capacitance between its first current terminal and its second terminal; a gate matching circuit including a plurality of gate inductors, serially connected to each other, each gate inductor connected to at least one gate terminal such that inductance of said gate inductors electrically combine with the first parasitic capacitance to present a first input impedance; and a drain matching circuit including a plurality of drain inductors, serially connected to each other, each drain inductor connected to at least one second current terminal such that inductance of said drain inductors electrically combine with the second parasitic capacitance to present a second input impedance.