Patent ID: 8856491

Claim:
A computing device, comprising: a memory module having a memory implemented as at least one hardware circuit, the memory module using a dual-ported memory configuration; a sweep engine that includes a stack pointer, the sweep engine configured to send a garbage collection signal if the stack pointer falls below a specified level, the sweep engine in communication with the memory module to reclaim memory; a root snapshot engine configured to take a snapshot of roots from at least one mutator if the garbage collection signal is received from the sweep engine; a trace engine that receives roots from the root snapshot engine, the trace engine in communication with the memory module to receive data; and wherein the root snapshot engine includes a shadow register and a mutator register, wherein a value of the mutator register is copied into the shadow register, the root snapshot engine further including a mutator stack and a multiplexer, wherein both the shadow register and the mutator stack are sent through the multiplexer.