Patent ID: 8803859

Claim:
A display driving circuit, comprising: a first buffer, which includes a terminal of a first voltage VDD having a highest voltage, a terminal of a second voltage VSS having a lowest voltage, and a terminal of a half voltage H-VDD, which is driven within a range between the first voltage VDD and the half voltage H-VDD; a second buffer, which includes the terminal of the first voltage VDD, the terminal of the second voltage VSS, and the terminal of the half voltage H-VDD, which is driven within a range between the half voltage H-VDD and the second voltage VSS; and a half voltage power supply circuit, which supplies the half voltage power to the first buffer and the second buffer, wherein the first voltage VDD and the second voltage VSS are supplied from a power supply circuit on an outside of the display driving circuit, and the half voltage H-VDD is supplied from the half voltage power supply circuit on an inside of the display driving circuit.