Patent ID: 8378411

Claim:
A semiconductor power device comprising: a source region of a first conductivity type; a body region of a second conductivity type encompassing said source region; a first drain region of said first conductivity type disposed outside of edge termination; a gate separated by an insulating layer from channel region of said body region; a source metal layer connected to said source regions and said body regions; a first gate metal connected to said gate; a first drain metal connected to said first drain region; said source region, said body region, said gate and said first drain region formed in a top side of semiconductor chip; a gate-drain clamp diode connected between a second gate metal on the gate-drain clamp diode and said first drain metal, composed of multiple back-to-back polysilicon Zener diodes disposed outside of edge termination area without having said polysilicon Zener diode or said second gate metal cross over said edge termination; a second drain region formed on a bottom side of said semiconductor chip; a second drain metal layer connected to said second drain region; and said first and second gate metals connected together at a gate lead frame through at least one bonding wire.