Patent ID: 7994013

Claim:
A method of fabricating a semiconductor device, comprising: forming a first impurity region by implanting first conductive impurities having a first conductivity type into a semiconductor substrate at a first energy; forming a second impurity region by implanting second conductive impurities having a second conductivity type into the semiconductor substrate at a second energy; forming a third impurity region by implanting third conductive impurities having the first conductivity type into the semiconductor substrate at a third energy; forming a drift region by diffusing the first, second, and third impurity regions; forming a gate electrode on the semiconductor substrate; forming source and drain regions by heavily implanting fourth conductive impurities having the first conductivity type into the drift region; and forming a shallow trench isolation region by selectively etching a portion of the drift region between the gate electrode and the source region or the drain region and filling the etched portion with an insulation material.