Patent ID: 7910439

Claim:
A method of fabricating a trench transistor, comprising, in any order, the actions of: (a) fabricating a gate trench from a first surface down toward a first-conductivity-type semiconductor drift layer, said gate trench penetrating through a second-conductivity-type body layer which overlies said drift layer; (b) patterning a sacrificial layer to form openings above said respective gate trenches, forming respective pillars above said gate trenches, and removing said sacrificial layer; (c) forming sidewall spacers on said pillar; (d) fabricating a body-contact trench from said first surface into said body layer, in locations where said body layer is not covered by said sidewall spacers nor by said pillars; and (e) introducing an additional dopant concentration of said second-conductivity type, in addition to the doping of said body layer, into the region surrounding the bottom of said body-contact trench; whereby said steps (a) and (b) form said gate trench and said body-contact trench in a mutually self-aligned spatial relationship.