Patent ID: 7853430

Claim:
A semiconductor device comprising: a CDR (Clock Data Recovery) circuit configured to execute a clock data recovery on a serial data inputted synchronously with a spread spectrum clock; and a frequency tracking control circuit configured to control a bandwidth of frequency which can be tracked by said CDR circuit, a serializer configured to convert a first parallel data into said serial data and output said serial data synchronously with said spread spectrum clock; a deserializer configured to convert said serial data into a second parallel data and output said second parallel data synchronously with a synchronous clock recovered from said serial data by said CDR circuit; a pattern comparator configured to compare said first parallel data with said second parallel data and output a comparison result; a tester configured to judge one of presence and absence of an abnormality of a spread spectrum clock generator which generate said spread spectrum clock, based on said comparison result by said pattern comparator, wherein said pattern comparator outputs a first result signal indicating a pass as said comparison result when said first parallel data coincides with said second parallel data, and outputs a second result signal indicating a fault as said comparison result when said first parallel data does not coincide with said second parallel data, said frequency tracking control circuit controls said bandwidth of frequency such that said second result signal is outputted when said spread spectrum clock is modulated at a desired frequency, and said tester holds an input period of said second result signal in a case that said spread spectrum clock is modulated at a desired frequency, and judges that said spread spectrum clock generator is abnormal when said second result signal is inputted at a period different from said input period.