Patent ID: 6873184

Claim:
An apparatus comprising: a buffer comprising a plurality of entries, the plurality of entries logically divided into a plurality of groups, each of the plurality of entries belonging to one of the plurality of groups; an insert pointer indicative of which of the plurality of entries is next in the buffer to receive data; a delete pointer indicative of which of the plurality of entries is storing oldest data in the buffer; a plurality of first control circuits coupled to the buffer, wherein each of the plurality of first control circuits corresponds to a respective group of the plurality of groups and is configured to select an entry from the respective group for potential reading from the buffer, and wherein each of the plurality of first control circuits is configured, in the event that the delete pointer indicates a first entry in the respective group and the insert pointer wraps around the buffer and indicates a second entry in the respective group, to select the first entry if the first entry is eligible for selection; and a second control circuit coupled to the buffer, the second control circuit configured to select a first group of the plurality of groups, wherein the entry selected from the first group by the plurality of first control circuits is the entry read from the buffer.