Patent ID: 8476766

Claim:
A semiconductor memory device comprising: a multilayer body with a plurality of first insulating films and first electrode films alternately stacked, the multilayer body including a first through hole extending in stacking direction of the first insulating films and the first electrode films; a second electrode film provided on the multilayer body and including a second through hole, the second through hole extending in the stacking direction and being coupled with the first through hole; a second insulating film provided on the second electrode film and including a third through hole, the third through hole extending in the stacking direction and being coupled with the second through hole; a semiconductor film provided on inner surfaces of the first to third through hole; a memory film provided between the first electrode films and the semiconductor film; and a gate insulating film provided between the second electrode film and the semiconductor film, at boundary between the inner surface of the second through hole and the inner surface of the third through hole, a step difference being formed so that the third through hole is thicker than the second through hole in a lateral direction perpendicular to the stacking direction.