Patent ID: 7737485

Claim:
A non-volatile memory device comprising: a semiconductor fin protruding from a semiconductor substrate wherein the semiconductor fin is directly on the semiconductor substrate; a tunnel insulating layer on portions of the semiconductor fin; a floating gate on the tunnel insulting layer, so that the tunnel insulating layer is between the floating gate and the semiconductor fin; a dielectric layer on the floating gate, so that the floating gate is between the dielectric layer and the semiconductor fin; a control gate electrode on the dielectric layer, so that the dielectric layer is between the control gate electrode and the floating gate an insulating layer on the semiconductor substrate adjacent the semiconductor fin, wherein portions of the semiconductor fin extend beyond the insulating layer, and wherein the insulating layer is between portions of the control gate electrode and the semiconductor substrate; and a sidewall oxide layer between the insulating layer and the semiconductor substrate and between the insulating layer and the semiconductor fin.