Patent ID: 7047317

Claim:
A high performance network address processor comprising: a longest prefix match lookup table for receiving a network address request having a designated network destination address, the longest prefix match lookup table having multiple pipelined lookup tables, a first pipelined lookup table having a single row of a first set of data pairs, the first set of data pairs including a key value and a mask value, the mask value indicating a number of least significant bits that are ignored within the key value, the first set of pairs being ordered according to corresponding mask values, a second pipelined lookup table having a plurality of rows of a second set of data pairs, the second set of data pairs including a key value and a mask value, the mask value of the second set indicating a number of least significant bits that are ignored within the key value; and an associated data engine coupled to the longest prefix match lookup table that is capable of receiving a key and an output address pointer from the longest prefix match lookup table and that is capable of providing a network address processor data output corresponding to the designated network address pointer.