Patent ID: 7332939

Claim:
A comparator system for comparing a level of an input signal with a level of a reference signal, comprising: a first comparator configured to input the input signal to one of input terminals thereof and the reference signal to the other of input terminals thereof; a second comparator configured to input the reference signal to one of input terminals thereof and the input signal to the other of input terminals thereof; and a control circuit configured to input an output of the first comparator and an output of the second comparator, wherein a non-inverting terminal of said first comparator is connected to an inverting terminal of said second comparator and an inverting terminal of said first comparator is connected to a non-inverting terminal of said second comparator, and wherein said control circuit includes a first flip-flop for normalizing the output of said first comparator, a second flip-flop for normalizing the output of said second comparator, and an output timing selection control unit configured to select one of the normalized outputs of said first and second flip-flops that is quicker in level change timing than the other, whereby an output of said control circuit changes logic state in response to a signal level change of either the output of said first comparator or the output of said second comparator, whichever occurs first after a crossing of said input signal above or below said reference signal.