Patent ID: 7991045

Claim:
A device for testing signal-receiving sensitivity of an electronic subassembly, the device comprising: a control board connected to the electronic subassembly; and a computer connected to the control board and also connected to the electronic subassembly, wherein signals sent by the computer are compared with signals received by the computer for adjusting predetermined parameters associated with the signal-receiving sensitivity, wherein the control board comprises: a coding circuit for converting random signals output from the computer to parallel signals; a parallel-to-serial circuit connected to the coding circuit for converting parallel signals to serial signals; an output buffer connected to the parallel-to-serial circuit for converting the serial signals to high-speed simulating signals; a mixer connected between the output buffer and the electronic subassembly for mixing the high-speed simulating signals and a jitter level and then generating analog signals to the electronic subassembly, the electronic subassembly thereby generating high-speed analog signals; a jitter generator connected to the mixer for generating the jitter level; an input buffer connected to the electronic subassembly for receiving high-speed analog signals and then outputting serial signals; a serial-to-parallel circuit for converting the serial signals output from the input buffer to parallel signals; and a decoding circuit for converting the parallel signals output from the serial-to-parallel circuit to digital signals and then the digital signals being input to the computer, wherein the digital signals are compared with the random signals.