Patent ID: 6947320

Claim:
A non-volatile memory device comprising: a plurality of memory cells through each of which a pass current when data is read flows at a value different according to a level of data written according to an applied data write current; a plurality of write select lines provided correspondingly to predetermined units of said plurality of memory cells; a first wire connected electrically to one end sides of said plurality of write select lines; a second wire, connected electrically to a first voltage, and connected electrically to at least one of the other end sides of said plurality of write select lines in data writing; a current supply circuit, in said data writing, activated to connect said first wire electrically to a second voltage and to thereby supply said data write current to said first wire; and a voltage setting circuit for, when said current supply circuit is in an inactive state, connecting said first wire electrically to a third voltage different from said second voltage, wherein a difference between said first and third voltages is smaller than a difference between said first and second voltages.