Patent ID: 7646220

Claim:
A differential amplifier, comprising: a voltage shifter for shifting the voltage level of each of a first and second differential input signal to produce a first and second shifted differential input signal; a first differential pair comprising a first transistor having a control terminal for receiving the first shifted differential input signal and comprising a second transistor having a control terminal for receiving the second shifted differential input signal, wherein the first and second transistors of the first differential pair each have a first non-control terminal that is respectively coupled to a first and second common output node; a second differential pair comprising a first transistor having a control terminal for receiving the first differential input signal and comprising a second transistor having a control terminal for receiving the second differential input signal, wherein the first and second transistors of the second differential pair each have a first non-control terminal that is respectively coupled to the first and second common output node; and a clamp circuit that adjusts the gain of the first differential pair responsive to a common mode voltage of the first and second differential input signals (Vcm), wherein the clamp circuit includes a capacitor and a resistor divider to produce an integrated signal that is responsive to the common mode voltage of the first and second differential input signals, wherein the integrated signal is used to reduce a tail current of a first differential pair common tail as the Vcm approaches 0V.