Patent ID: 8099722

Claim:
A programmable gate array comprising: a hardware implementation in the programmable gate array of a two-phase lexical analyzer module “LAM”, the two-phase LAM comprising: a single transition module having a first table, wherein the first table describes one or more single character transitions using records of type ET_onecat; a range transition module having a second table, wherein the second table is an ordered series of records of type ET_catrange; and a combination logic for combining the output of the single transition module and the range transition module, wherein when either the range transition module or the single transition module completes its processing and the other module is still processing characters from the incoming text stream, the combination logic allows the other module to complete its processing; wherein one or more LAMs implemented into the programmable gate array operate on an incoming text stream in parallel to output a series of language tokens for use by external hardware or external software applications.