Patent ID: 6970046

Claim:
A digital phase-locked loop comprising: a digitally controlled oscillator for generating an output clock signal; a phase detector device for detecting an analog phase difference between a dependent clock, which is digitally dependent on the output clock signal, and a reference clock, the phase detector device converting the detected analog phase difference into a corresponding digital control value for the digitally controlled oscillator, the phase detector device having: a phase detector generating a first pulse signal and a second pulse signal dependent on the analog phase difference, a pulse of the first pulse signal being generated if the dependent clock is slower than the reference clock, and a pulse of the second pulse signal being generated if the dependent clock is faster than the reference clock; and a quantizing device for converting the information contained in the pulses of the first and second pulse signals for the phase difference into the corresponding digital control value; the quantizing device having a first circuit section for sampling the first and second pulse signals and for subtracting the samples of the first and second pulse signals to generate a corresponding digital difference value, and a counter whose counter reading is altered in a manner dependent on the respectively generated digital difference value of the first circuit section, the counter reading serving as a basis for the digital control value; and a digital loop filter through which the digital control value of the phase detector device connects to the digitally controlled oscillator to set the output clock signal.