Patent ID: 7804694

Claim:
A method for increasing differential impedance in a circuit, comprising: providing a dielectric layer including a plurality of traces; providing a first reference layer on a first side of the dielectric layer; providing a second reference layer on a second side of the dielectric layer; forming a first plurality of openings in the first reference layer, the first plurality of openings having at least a first subset disposed in a breakout region and a second subset disposed in another region, the diameter of the first subset of the first plurality of openings in the breakout region being smaller than the diameter of the second subset of first plurality of openings in the another region; and forming a second plurality of openings in the second reference layer, the first plurality of openings arranged in a substantially alternating manner with respect to the second plurality of openings, the first and second plurality of openings adapted, based at least in part on a predetermined width and a predetermined spacing of the pair of traces, to contribute in achieving substantially a particular differential impedance.