Patent ID: 7122467

Claim:
A method for fabricating a semiconductor device, including the steps of: forming a plurality of a first conductive patterns having a stack pattern of a first conductive layer and a first hard mask on a substrate; forming a first inter-layer insulation layer of a good gap-fill property with a height between the first conductive layer and the first hard mask on the substrate; forming a second inter-layer insulation layer that tolerates a cleaning solution; forming a second conductive layer in contact with a surface of the substrate between the plurality of the first conductive patterns and passing through the first and the second inter-layer insulation layers; forming a third inter-layer insulation layer that tolerates the cleaning solution; forming a plurality of second conductive patterns on the third inter-layer insulation layer; forming a fourth inter-layer insulation layer on the second conductive patterns, wherein the fourth inter-layer insulation layer tolerates the cleaning solution; and forming a third conductive layer in contact with the second conductive layer as passing through the third inter-layer insulation layer and the fourth inter-layer insulation layer between the plurality of second conductive patterns.