Patent ID: 8279007

Claim:
A switch circuit, comprising: a first transistor having a source terminal to accept an input signal, a drain terminal to provide an output signal, and a gate; a power supply providing a first gate voltage; and a circuit to couple a switch signal to the gate, wherein the circuit turns the first transistor ‘off’ for all values of the input signal when the switch signal is ‘low’ and wherein the circuit to couple the switch signal to the gate comprises: a second transistor coupling the first gate voltage to the gate of the first transistor; third and fourth transistors coupled to an input node and an output node, wherein: the input node is coupled to the source terminal of the first transistor and a drain of the third transistor; a gate and a source of the third transistor and a source of the fourth transistor are coupled to the output node; a gate of the fourth transistor is coupled to the input node; and a drain of the fourth transistor is coupled to ground; a fifth transistor coupling the gate of the first transistor to the output node; and a first inverter coupled to a gate of the second transistor and to a gate of the fifth transistor, the switch signal being provided through the first inverter.