Patent ID: 8742559

Claim:
A manufacturing method of a semiconductor device, comprising the steps of: (a) providing a first member including a first upper surface, and a first lower surface opposite to the first upper surface; (b) mounting a semiconductor chip including a front surface, a plurality of electrode pads formed on the front surface, and a back surface opposite to the front surface, over the first upper surface of the first member; (c) electrically connecting the electrode pads of the semiconductor chip with a plurality of terminals arranged around the semiconductor chip via a plurality of wires; (d) after the step (c), arranging a second member including a second upper surface, a second lower surface opposite to the second upper surface, and a space formation portion formed on the second lower surface side, over the first upper surface of the first member, and bonding the first upper surface of the first member to an adhesive surface provided outside the space formation portion of the second member via a sealing material, and forming a space so as to house the semiconductor chip and the wires in between the first member and the second member; and (e) after the step (d), sealing a joint part between the first member and the second member with resin such that essentially an entirety of the second upper surface of the second member and essentially an entirety of the first lower surface of the first member are respectively exposed, wherein the space is not filled with the resin.