Patent ID: 8912631

Claim:
A heterojunction bipolar transistor, comprising a substrate; a collector region having a total thickness falling in a range of about 800 nm to about 2200 nm, the collector region including, a sub-collector formed of a first material and having a first impurity concentration, a first collector layer formed of the first material having a second impurity concentration formed on the sub-collector, a second collector layer formed of the first material and having a third impurity concentration, and a third collector layer formed of the first material and having a fourth impurity concentration; a base region having at least one layer formed of said first material; an emitter region having at least one layer formed of a second material; and a contact region having at least one layer formed of a third material; wherein the first impurity concentration is greater than the second impurity concentration and the second impurity concentration is greater than or equal to the third impurity concentration, and wherein, when a voltage is applied across the heterojunction bipolar transistor, the impurity concentrations of the first and second collector layers reduce a resulting electric field in the collector region to increase an on-state breakdown voltage (V CE ) of the heterojunction bipolar transistor.