Patent ID: 7627946

Claim:
A method for fabricating a metal protecting layer on an electrically connecting pad of a circuit board, the method comprising the steps of: providing a circuit board having a chip-disposed side and a ball-disposed side; forming in the circuit board at least one through hole penetrating the circuit board from the chip-disposed side to the ball-disposed side; forming a metal layer on the chip-disposed side, the ball-disposed side, and a surface defining the through hole of the circuit board; forming at least one conductive structure on the surface defining the through hole; forming a first and a second circuit layers on the metal layer on the chip-disposed side and the ball-disposed side of the circuit board, respectively, by a circuit patterning process, wherein the first and the second circuit layers each having a plurality of electrically connecting pads are electrically connected to each other by the conductive structure; forming on the first circuit layer a conductive layer electrically connected to the electrically connecting pads of the first and the second circuit layers; forming a first and a second resistive layers on the conductive layer and the second circuit layer respectively; forming a plurality of openings in the first and the second resistive layers respectively for exposure of the electrically connecting pads of the first and the second circuit layers; removing the conductive layer in the openings of the first resistive layer on the first circuit layer; forming a third resistive layer on the first resistive layer on the first circuit layer; forming in the third resistive layer a plurality of openings corresponding in position to the electrically connecting pads of the first circuit layer, so as to cover the conductive layer remained in the openings of the first resistive layer with the third resistive layer; electroplating the metal protecting layer on the electrically connecting pads of the first and the second circuit layers through the conductive layer; removing the first, the second and the third resistive layers, for exposing the first and the second circuit layers and the metal protecting layer formed on the electrically connecting pads; forming an insulated protection layer on the first and the second circuit layers and the chip-disposed and the ball-disposed sides of the circuit board; and forming a plurality of openings in the insulated protection layer, for exposing the metal protecting layer formed on the electrically connecting pads.