Patent ID: 7646367

Claim:
A semiconductor device comprising: a first transistor including a gate terminal, a source terminal and a drain terminal; a second transistor including a gate terminal, a source terminal and a drain terminal; a third transistor including a gate terminal, a source terminal and a drain terminal; and a capacitor including a first electrode and a second electrode, wherein the gate terminal of the first transistor is connected to a first scan line; wherein one of the source terminal or the drain terminal of the second transistor is connected to a power supply line; wherein one of the source terminal or the drain terminal of the third transistor is connected to a second scan line; wherein the first electrode of the capacitor is connected to the gate terminal of the second transistor and the gate terminal of the third transistor and the second electrode is connected to a signal line, wherein the other of the source terminal or the drain terminal of the second transistor and the other of the source terminal or the drain terminal of the third transistor are connected to a pixel electrode; wherein one of the source terminal or the drain terminal of the first transistor is connected to the other of the source terminal or the drain terminal of the second transistor and the other of the source terminal or the drain terminal of the third transistor; and wherein the other of the source terminal or the drain terminal of the first transistor is connected to the gate terminal of the second transistor and the gate terminal of the third transistor.