Patent ID: 7940503

Claim:
A power semiconductor arrangement comprising: a controllable power semiconductor switch comprising a load path with a first contact and with a second contact, and a control input for controlling the load path; a driver unit for controlling the controllable power semiconductor switch, wherein the driver unit comprises an output electrically coupled to the control input of the controllable power semiconductor switch; a controllable switch comprising a control input, electrically coupled to the output of the driver unit or another signaling circuitry, wherein the controllable switch is configured to be switched off if the output of the driver unit or another signaling circuitry provides a signal to remain the load path of the controllable power semiconductor switch in an electrically blocking OFF-state, and wherein the controllable switch is configured to be switched on if the output of the driver unit or another signaling circuitry provides a signal for switching the load path of the controllable power semiconductor switch from an electrically conductive ON-state to an electrically blocking OFF-state; and an active clamping (AC) unit coupled in series with the controllable switch between the control input of the controllable power semiconductor switch and either the first or the second contact of the load path of the controllable power semiconductor switch.