Patent ID: 7894292

Claim:
A semiconductor device including a normal mode and a standby mode as an operational mode, the semiconductor device comprising: a power supply unit generating a first internal power supply voltage and a second internal power supply voltage; a memory cell array including a plurality of memory cells provided in rows and columns and driven by said first internal power supply voltage, and a plurality of word lines provided to correspond to the rows of said plurality of memory cells, respectively; a plurality of word line drivers provided to correspond to said plurality of word lines, respectively, and each driven by said second internal power supply voltage for bringing a corresponding one of the word lines into an active state; a plurality of first switches provided to correspond to said plurality of word lines, respectively, and each connected between a corresponding one of the word lines and a reference node providing a reference voltage; a second switch provided at a power supply line serving for supplying said second internal power supply voltage to said plurality of word line drivers; and a control circuit, wherein when said operational mode is switched from said normal mode to said standby mode, said control circuit brings said plurality of first switches into a conduction state and brings said second switch into a non-conduction state, and subsequently halts supply of said second internal power supply voltage, and when said operational mode is switched from said standby mode to said normal mode, said control circuit starts the supply of said second internal power supply voltage, and subsequently brings said plurality of first switches into the non-conduction state and brings said second switch into the conduction state.