Patent ID: 7977173

Claim:
A method for forming self-aligned silicon thin film transistors comprising: providing a generally flexible substrate; depositing a barrier material on at least a portion of the flexible substrate; forming at least one silicon assembly on at least a portion of the barrier material, each silicon assembly comprising silicon; cleaning the at least one silicon assembly using a cleaning technique including UV/O 2 , UV/O2/F2, wet clean, and combinations thereof, thereby forming a SiO 2 interface on at least a portion of the at least one silicon assembly; depositing a dielectric material on a least a portion of the SiO 2 interface to form a gate dielectric, wherein the dielectric material can be deposited by utilizing a low temperature technique including chemical vapor deposition (CVD), plasma-enhanced CVD (PECVD), sputter deposition, DC sputter deposition, pulsed DC sputter deposition, RF sputter deposition, electron beam evaporation, liquid phase deposition, printing and combinations thereof; depositing a gate electrode material on at least a portion of the gate dielectric; selectively patterning the gate electrode material and the dielectric material to form at least one transistor assembly; selectively doping areas of the at least one transistor assembly thereby forming a source and a drain by: introducing a doping material to the at least one transistor assembly, laser annealing pre-selected portions of the silicon assembly such that at least some doping material is transferred into the silicon, and removing any excess doping material not transferred into the silicon to form a self-aligned silicon thin film transistor.