Patent ID: 7534685

Claim:
A monolithically integrated circuit comprising an SOI substrate capacitor, comprising: a layer of an insulating material, a doped monocrystalline layer region of silicon on top of said layer of insulating material, a trench filled with insulating material, which surrounds said monocrystalline layer region of silicon and is in contact with said layer of insulating material, a layer region of an insulating material on top of a portion of said monocrystalline layer region of silicon, a layer region of doped silicon on top of said layer region of insulating material, and an outside sidewall spacer of an insulating material on top of said monocrystalline layer region of silicon, where said outside sidewall spacer surrounds said layer region of doped silicon to provide an isolation between said layer region of doped silicon and exposed portions of said monocrystalline layer region of silicon, wherein said region of said monocrystalline layer of silicon, said layer region of an insulating material, and said layer region of doped silicon constitute a lower electrode, a dielectric, and an upper electrode of said monolithically integrated SOI substrate capacitor.