Patent ID: 6904583

Claim:
A method of disposing a resistor pattern layout of serially connected resistors, comprising: preparing a resistor pattern area having a center portion, a first edge portion, and a second edge portion; forming a first resistor pattern at the center portion by a photolithographic method, the first resistor pattern having a first end at the center portion and a second end at the first edge portion; forming a second resistor pattern by the photolithographic method, the second resistor pattern having a third end at the center portion and a fourth end at the second edge portion, wherein the second resistor pattern is electrically insulated from the first resistor pattern; and electrically coupling the second end of the first resistor pattern with the fourth end of the second resistor pattern so that the first and second resistor patterns constitute serially connected resistors electrically connecting from the first end of the first resistor pattern to the third end of the second resistor pattern, and wherein the first resistor pattern and the second resistor pattern comprise a plurality of parallel lines connected in functional series by perpendicular segments disposed at alternating ends of adjacent pairs of the parallel lines.