Patent ID: 8471388

Claim:
An IC chip comprising: a semiconductor substrate; a transistor having a portion in said semiconductor substrate; a first dielectric layer over said semiconductor substrate; a first patterned metal layer over said first dielectric layer; a second patterned metal layer over said first dielectric layer and said first patterned metal layer; a second dielectric layer between said first and second patterned metal layers; a third dielectric layer over said second dielectric layer and said second patterned metal layer, wherein said third dielectric layer comprises a first nitride layer, wherein a first opening in said third dielectric layer is over a first contact point of said second patterned metal layer, and said first contact point is at a bottom of said first opening; a third patterned metal layer over a top surface of said third dielectric layer and on said first contact point, wherein said third patterned metal layer is connected to said first contact point through said first opening, wherein said third patterned metal layer comprises a first adhesion layer and a first electroplated copper layer over said first adhesion layer, wherein said first electroplated copper layer has a sidewall not covered by said first adhesion layer; a second nitride layer over a top surface of said third patterned metal layer and said top surface of said third dielectric layer; a first polymer layer over said second nitride layer, wherein a second opening through said first polymer layer and said second nitride layer is over a second contact point of said third patterned metal layer, and said second contact point is at a bottom of said second opening, wherein said second contact point is connected to said first contact point through said first opening; and a fourth patterned metal layer over said semiconductor substrate, wherein said fourth patterned metal layer is connected to said second contact point through said second opening, wherein said fourth patterned metal layer comprises a second adhesion layer and a second electroplated copper layer over said second adhesion layer, wherein said second electroplated copper layer has a sidewall not covered by said second adhesion layer.