Patent ID: 8847233

Claim:
A semiconductor device comprising: an insulating layer including a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the insulating layer including a trench including a side surface and a bottom surface, the bottom surface being overlapped with the second region; an oxide semiconductor film which includes a source region, a drain region, and a channel formation region and which is provided in contact with the bottom surface and the side surface of the trench and a top surface of the first region; a source electrode layer and a drain electrode layer which are electrically connected to the source region and the drain region; a gate insulating layer provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided over the gate insulating layer, the gate electrode layer overlapping with the trench, wherein the channel formation region is provided in contact with the side surface and the bottom surface of the trench, the channel formation region including a crystal, and wherein the source region and the drain region have higher impurity concentrations than the channel formation region.