Patent ID: 7822890

Claim:
An apparatus for bidirectionally coupling a plurality of serial data transceivers, wherein the an input/output (I/O) terminal of each data transceiver creates a logic LOW voltage output by coupling the I/O terminal to ground through a transistor in an ON state, and creates a logic HIGH voltage output by turning off the transistor and allowing the I/O terminal to be pulled up by a passive pull-up resistor on a bus to a voltage source substantially equal to the desired logic HIGH level voltage, comprising: a first inverting comparator, having an input coupled to a first I/O terminal, an output, and further having a comparison threshold voltage between the data low and data high voltage levels of data present at said first I/O terminal; a first transistor having a gate coupled to the output of said first inverting comparator, a source, and a drain coupled to a second I/O terminal; a second inverting comparator having an inverting input coupled to said second I/O terminal, a non-inverting input, and an output; a second transistor having a source coupled to ground, a gate coupled to the output of said second inverting comparator, and a drain coupled to said first I/O terminal; a source of voltage Vp, higher than ground but less than the mid-voltage between logic LOW and logic HIGH, coupled to the source of the first transistor; and a source of voltage Vt, lower than Vp but higher than logic LOW, coupled to the non-inverting input of the second inverting comparator.