Patent ID: 8755000

Claim:
A display panel, comprising: a first substrate having a display region and a peripheral circuit region adjacent to the display region, the first substrate comprising: a pixel array disposed in the display region; a common trace, disposed in the peripheral circuit and being a continuous conductor; a first trace, disposed in the peripheral circuit and connected with a first end of the common trace to form a first type test shorting bar; a plurality of first signal source connection wires, wherein one of the plurality of first signal source connection wires is connected with the first end of the common trace through a contact window, and a material of the one of the first signal source connection wires is different from that of the common trace; and a plurality of pixel array connection wires, wherein one of the plurality of pixel array connection wires is connected with a second end of the common trace such that the one of the first signal connection wires, the one of the pixel array connection wires and the common trace together form one of a plurality of wires disposed in the peripheral region and the wires are respectively electrically connected with the pixel array; a second substrate disposed opposite to the first substrate; and a liquid crystal layer disposed between the first substrate and the second substrate.