Patent ID: 8581392

Claim:
A chip package with an integrated cooling structure comprising: a silicon-based substrate; an integrated cooling structure coupled with the silicon-based substrate, said integrated cooling structure comprising: a silicon carrier for a chip stack in a prefabricated shape disposed above the substrate, the silicon carrier comprising: a first array of small, highly thermally conductive metallic balls from 2.0 to 20 microns in diameter between the silicon carrier and the substrate; a plurality of chip stacks; a plurality of through silicon vias providing electrical interconnections through the silicon carrier to the chip stacks; a first set of liquid microchannels cooling the chip stacks; a liquid coolant flowing through the first set of liquid microchannels; and a second array of small, highly thermally conductive metallic connections attaching the plurality of chip stacks to the silicon carrier; and a cooling lid disposed above the plurality of chip stacks, said cooling lid comprising: a temporary seal attaching the cooling lid to the silicon carrier; and a second set of liquid microchannels for cooling, said second set aligned with the first set at each end of the cooling lid such that liquid is able to flow between said cooling lid and the silicon carrier without impedance when said cooling lid is attached.