Patent ID: 6890783

Claim:
A method of manufacturing an active matrix substrate plate formed on a transparent insulating substrate plate having an array of pixel regions, wherein each pixel region contains a scanning line and a signal line and is surrounded by the scanning line and the signal line crossing each other at right angles, and in each pixel region is formed an inverted staggered structure thin film transistor comprised by a gate electrode, an island-shaped semiconductor layer opposing the gate electrode across a gate insulation layer, a pair of drain electrode and source electrode separated by a channel gap formed above the semiconductor layer, such that a pixel electrode is formed in a window section surrounded by the scanning line and the signal line for transmitting light, and the gate electrode is connected to the scanning line, the drain electrode is connected to the signal line, and the source electrode is connected to the pixel electrode, said method comprising: in a first step, forming a conductor layer on the transparent insulation substrate plate, and excepting the scanning line, a scanning line terminal section formed in a scanning line start end, and in each pixel region, the gate electrode extending from the scanning line to the thin film transistor section or sharing a portion of the scanning line, removing the conductor layer by etching; in a second step, laminating successively on the transparent insulation substrate plate, a gate insulation layer and a semiconductor layer comprised by an amorphous silicon layer and an n + amorphous silicon layer, and excepting the thin film transistor section, removing the semiconductor layer by etching; in a third step, laminating successively on the transparent insulation substrate plate, a transparent conductive layer and a metallic layer, and excepting the signal line, a signal line terminal section formed in the signal line start end section, and in each pixel region, the drain electrode extending from the signal line to the thin film transistor section, the pixel electrode, and the source electrode extending from the pixel electrode to the thin film transistor section disposed opposite to the drain electrode across a channel gap, removing the metallic layer and the transparent conductive layer by etching, and then removing by etching the n + amorphous silicon layer where exposed; and in a fourth step, forming a protective insulation layer on the transparent insulation substrate plate, and after removing the protective insulation layer above the pixel electrode and the signal line terminal section, and the protective insulation layer and the gate insulation layer above the scanning line by etching, removing the metallic layer above the pixel electrode and the signal line terminal section by etching, to expose the pixel electrode and the signal line terminal section comprised by the transparent conductive layer and the scanning line comprised by the conductor layer.