Patent ID: 7480348

Claim:
An I/Q demodulation circuit comprising: an I/Q demodulator for producing an analog I/Q signal by multiplying an input signal by a local oscillation signal; an analog-to-digital converter for converting the analog I/Q signal into a digital I/Q signal; a reference sinusoidal-wave signal generator for producing a predetermined reference sinusoidal-wave signal; a selector for selecting and feeding to the I/Q demodulator one of an external input signal and the reference sinusoidal-wave signal; an offset amount detection circuit for detecting a DC offset amount and a phase offset amount of the digital I/Q signal obtained when the reference sinusoidal-wave signal is selected; a storage circuit for storing a result of detection by the offset amount detection circuit or a correction value with which to correct for the result; and an offset correction circuit for correcting for, based on data stored in the storage circuit, a DC offset and a phase offset of the digital I/Q signal obtained when the external input signal is selected, wherein the offset amount detection circuit includes: a delay circuit for producing a delayed inverted signal by delaying, of two versions of the digital I/Q signal differentially fed thereto, an inverted digital I/Q signal by a half period; and a subtraction circuit for determining the DC offset amount by subtracting the delayed inverted signal from a non-inverted digital I/Q signal.