Patent ID: 7122841

Claim:
A semiconductor device, comprising: a) a substrate having a first major surface; b) a semiconductor device structure over the first major surface of the substrate, the device structure comprising a nitride-based n-type semiconductor layer, and a nitride-based p-type semiconductor layer over the n-type semiconductor layer; c) a p-side electrode having a first and a second surface, wherein the first surface is in electrical contact with the p-type semiconductor layer; and d) a p-side bonding pad that is in contact with the second surface of the p-side electrode, and that includes: i) a top gold layer having a first and a second surface, wherein the first surface is the top surface of the p-side bonding pad; and ii) a single or multiple layers of a p-side diffusion barrier in contact with the second surface of the top gold layer, wherein the p-side diffusion barrier is a single or multiple layers of tungsten, tantalum, molybdenum, chromium, titanium or a mixture thereof, wherein the p-side bonding pad further comprises one or more metal layers under the p-side diffusion barrier, at least one of said metal layers being in contact with the second surface of the p-side electrode and wherein each of the metal layers under the p-side diffusion barrier is independently selected from the group consisting of gold, palladium, aluminum and a mixture thereof.