Patent ID: 8743733

Claim:
A switching chassis, comprising a plurality of cascade units and a plurality of switching units, wherein: each of the plurality of cascade units has a plurality of cascade interfaces connecting to a plurality of line processing chassis, wherein the switching chassis and the line processing chassis are physically separate; each line processing chassis has a plurality of optical interfaces; each optical interface of each line processing chassis connects to only one cascade interface of one cascade unit and each cascade interface of each cascade unit connects to only one optical interface of one line processing chassis; each of the plurality of switching units has a plurality of switching ports connecting to the plurality of the cascade interfaces; and each cascade interface of each cascade unit connects to one switching port of each of the plurality of the switching units, wherein each switching port is only connected to one cascade interface, wherein the number of the plurality of cascade units is M, which equals 2j, where j is an integer greater than 0, and wherein each of the plurality of switching units has M×N switching ports, where N equals 2i and i is an integer greater than 0.