Patent ID: 7501674

Claim:
A semiconductor device, comprising: a fin active region formed on a fin region of a semiconductor substrate, the fin active region protruding upward from the semiconductor substrate and comprising an upper surface and lower sidewalls; a planar active region formed on a planar region of the semiconductor substrate, the planar active region protruding upward from the semiconductor substrate and comprising sidewalls and an upper surface, wherein the upper surface of the planar active region is disposed lower than the upper surface of the fin active region; a fin device isolation layer covering the lower sidewalls of the fin active region and extending a first depth into the semiconductor substrate; a planar device isolation layer completely covering sidewalls of the planar active region and extending a second depth into the semiconductor substrate, wherein the second depth extends deeper into the semiconductor substrate than the first depth; a fin gate electrode formed across the fin active region; and, a planar gate electrode formed across the planar active region.