Patent ID: 7606961

Claim:
A computer system comprising multiple processing elements and a global memory, wherein: the multiple processing elements include a running multiple processing element and an idling multiple processing element; the multiple processing elements each have a processor core, local memory, a DMA module and a memory management unit; at least one of the local memories of the multiple processing elements stores data stored in the global memory and used by the processor core of the running multiple processing element, before the data is used by the processor core of the running multiple processing element, and the DMA module of the running multiple processing element reads the data from the local memory of the running multiple processing element when the data is stored in the local memory of the running multiple processing element and reads the data from the local memory of the idling multiple processing element via the DMA module of the idling multiple processing element when the data is stored in the local memory of the idling multiple processing element, and transfers the data to the processor core of the running multiple processing element using a physical address for the data stored in the memory management unit; and the physical address for the data stored in the memory management unit of running multiple processing element is updated to indicate the data stored in the local memory of the idling multiple processing element when the data is stored in the local memory of the idling multiple processing element.