Patent ID: 8741711

Claim:
A method of manufacturing a semiconductor device comprising: forming a first gate pattern and a second gate pattern adjacent to the first gate pattern over a semiconductor substrate; forming a first sidewall spacer on a sidewall of the first gate pattern and a second sidewall spacer on a sidewall of the second gate pattern; implanting a first impurity into the semiconductor substrate using the first gate pattern, the first sidewall spacer, the second gate pattern, and the second sidewall spacer as a mask; forming a first insulating film covering the first gate pattern, the first sidewall spacer, the second gate pattern, and the second sidewall spacer; etching the first insulating film to expose the semiconductor substrate and to form a third sidewall spacer on a side surface of the first sidewall spacer and a fourth sidewall spacer on a side surface of the second sidewall spacer in such a manner that the third sidewall spacer is in contact with the fourth sidewall spacer between the first gate pattern and second gate pattern; implanting a second impurity into the semiconductor substrate using the first gate pattern, the first sidewall spacer, the third sidewall spacer, the second gate pattern, the second sidewall spacer, and the fourth sidewall spacer as a mask to form a first region being deeper than a second region provided under a contact portion between the third sidewall spacer and the fourth sidewall spacer; and after the implantation of the second impurity, removing the third sidewall spacer and the fourth sidewall spacer.