Patent ID: 8907426

Claim:
A semiconductor device, comprising: a substrate having a first region and having a second region having a higher pattern density than the first region, the substrate extending in a horizontal direction of extension; a first active region defined in the first region; a first gate electrode on the first active region; a first trench in the first active region and offset-aligned to the first gate electrode; a first strain-inducing pattern in the first trench; a second active region defined in the second region; a second gate electrode on the second active region; a second trench in the second active region and offset-aligned to the second gate electrode; and a second strain-inducing pattern in the second trench, wherein the first active region has a first Σ-shaped configuration bordered in part by the first trench, and the second active region has a second Σ-shaped configuration bordered in part by the second trench, and wherein a vertical line that is perpendicular to the horizontal direction of extension of the substrate and intersects a side surface of the first gate electrode is defined as a first vertical line, wherein a vertical line that is perpendicular to the horizontal direction of extension of the substrate and intersects a side surface of the second gate electrode is defined as a second vertical line, wherein a shortest distance between the first vertical line and the first trench is defined as a first horizontal distance, wherein a shortest distance between the second vertical line and the second trench is defined as a second horizontal distance, and wherein a difference between the first horizontal distance and the second horizontal distance is equal to or less than 1 nm.