Patent ID: 7242206

Claim:
A reliability evaluation test method using a reliability evaluation test apparatus which tests a reliability of a semiconductor wafer on the basis of a test signal from a measurement section, comprising a measurement section, a storage section which stores a semiconductor wafer that is in electrical contact with a contactor, and transmits/receives a test signal to/from the measurement section, and a housing for accommodating the storage section and the measurement section, wherein the storage section is configured to be inserted into and extracted from the housing and comprises a pressure mechanism which presses the contactor, a table which has a heat insulating structure and on which the semiconductor wafer is placed, a connection ring which surrounds the table and comes into electrical contact with the contactor, and a wiring board which comes into electrical contact with the connection ring and transmits/receives the test signal to/from the measurement section, executes a reliability test of a semiconductor wafer on the basis of a test signal from a measurement section, the method comprising: aligning a contactor and a semiconductor wafer; integrating the aligned contactor, semiconductor wafer, and a wafer holder to form a shell; arranging the shell on a table of a storage section which has been extracted from a housing; pressing the contactor against the semiconductor wafer by a pressure mechanism; heating the semiconductor wafer brought into contact with the contactor to a predetermined temperature by a heating mechanism; and evaluating reliability of a multilayered interconnection and an insulating film, which are formed on the semiconductor wafer, under an accelerated condition.