Patent ID: 8401180

Claim:
A non-linear data converter including a CPU and comprising: a first converter that performs a first process on an input bit string to output a first output bit string, the first process equivalent to performing: a mask process using a first mask, a non-linear conversion predetermined for performing an encoding or a decoding, and a mask process using a second mask; a second converter that performs a second process on the input bit string to output a second output bit string, the second process equivalent to performing: the mask process using the first mask, the non-linear conversion, and a mask process using an inverted second mask; a third converter that performs a third process on the input bit string to output a third output bit string, the third process equivalent to performing: a mask process using an inverted first mask, the non-linear conversion, and the mask process using the second mask; a fourth converter that performs a fourth process on the input bit string to output a fourth output bit string, the fourth process equivalent to performing: the mask process using the inverted first mask, the non-linear conversion, and the mask process using the inverted second mask; a generator that generates a random number bit string; and a selector that selects any one of the first to fourth output bit strings based on the random number bit string.