Patent ID: 7506286

Claim:
A hardware debugging system for debugging a fabricated integrated circuit containing an electronic circuit design, wherein the fabricated integrated circuit is configured to operate in its target environment and to run at its target speed during debugging of the fabricated integrated circuit, the hardware debugging system comprising: an instrumentor comprising a first computer-readable medium including data that, when executed by a first computer, cause the first computer to perform operations, comprising: receiving a high level HDL description of the electronic circuit design, at least a portion of the high level HDL description being written in a language selected from the group consisting of VHDL, Verilog HDL, C, C++, and SystemC; determining aspects of the electronic circuit design to be examined or modified during debugging; determining additional circuitry to be incorporated into the electronic circuit design to facilitate debugging; and producing a modified high level HDL description of the electronic circuit design by incorporating an HDL description of the additional circuitry into the high level HDL description of the electronic circuit design; a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the modified high level HDL description or the high level HDL description; and an HDL-based hardware debugger comprising a second computer-readable medium including data that, when executed by a second computer, cause the second computer to perform operations, comprising: debugging the fabricated integrated circuit fabricated in accordance with the modified high level HDL description, the debugging comprising: interacting with the electronic circuit design using the additional circuitry; and presenting debug information with respect to the modified high level HDL description or the high level HDL description, wherein the second computer-readable medium further includes data that cause the second computer to perform operations comprising computing additional values of the aspects of the electronic circuit design to be examined to broaden design visibility of the electronic circuit design.