Patent ID: 8136737

Claim:
A system, comprising: a chip that includes circuitry and a mounting surface ( 83 ) with first and second contacts as inputs for the circuitry; and a substrate with a surface which includes a first contact pad, a second contact pad, and an electrically conductive pad connected to the first contact pad by a low-resistive connection; wherein the chip being attached to the substrate with the mounting surface facing toward the surface of the substrate so that the mounting surface is spaced apart from the first contact pad and the electrically conductive pad, the mounting surface partly overlapping the first contact pad with a first overlapping area and the electrically conductive pad with a second overlapping area so that the overlapped part of the first contact pad forms a first stray capacitor and the overlapped part of the electrically conductive pad forms a second stray capacitor with the mounting surface, and the first contact pad and the electrically conductive pad are arranged on the surface of the substrate such that, if the chip is misaligned laterally in respect to the surface of the substrate, then the first overlapping area increases while the second overlapping area decreases or the first overlapping area decreases while the second overlapping area increases.