Patent ID: 7873788

Claim:
A method for using a cache, the cache adapted for use with a processor, the method comprising: repopulating from a tag archive area at least a subset of a plurality of tag entries, the cache comprising a plurality of data entries and the tag entries, the tag entries in a one-to-one correspondence with the data entries, each of the data entries enabled to store a line of data, and each of the tag entries enabled to store a tag usable, at least in part, to identify any line of data stored in the corresponding data entry; re-fetching into at least some of the data entries having correspondence with the subset of the tag entries; and wherein the cache and the processor are implemented within one or more integrated circuits; and wherein an order of the repopulating is determined based, at least in part, on a respective likely-to-be-used soon indicator of each of the particular tags, determined based on loading of the data entries in response to misses in the cache due to accesses of the processor within a time interval after the repopulating.