Patent ID: 8120114

Claim:
An apparatus comprising: a metal gate of a transistor, wherein the metal gate comprises a metal layer consisting of one or more metals; an etch stop layer selectively formed over the metal gate, wherein the etch stop layer comprises a metal compound, and wherein lateral encroachment of the etch stop layer from over the metal gate beyond a sidewall of the metal gate is not more than 30 nanometers, wherein the metal compound of the etch stop layer comprises a first metal that is different than a second metal of a top surface of the metal gate, wherein the metal compound comprises an oxide of the first metal, a nitride of the first metal, a carbide of the first metal, a boride of the first metal, or a combination thereof, wherein a thickness of the etch stop layer ranges from 5 nanometers to 30 nanometers, wherein the etch stop layer has a bottom surface that is aligned with a top surface of a sidewall spacer alongside the metal gate, and wherein the etch stop layer has a top surface that extends above the top surface of the sidewall spacer; an insulating layer over the etch stop layer; and a conductive structure through the insulating layer to provide electrical connection to the metal gate.