Patent ID: 7925936

Claim:
A method for storing data in a memory that includes a plurality of analog memory cells, the method comprising: defining a set of programming levels that represent respective combinations of at least first and second bits and are represented by respective nominal storage values to be programmed in the memory by a processor; storing the data in the memory using the processor by mapping the data to storage values selected from among the nominal storage values and writing the storage values to the memory cells; defining a condition over two or more bit-specific error rates applicable respectively to at least the first and second bits, wherein the bit-specific error rates comprise a first bit-specific error rate computed over the data stored by the first bits in the memory cells and a second bit-specific error rate computed, separately from the first bit-specific error rate, over the data stored by the second bits in the memory cells; and setting the nominal storage values used by the processor based on the bit-specific error rates so as to meet the condition.