Patent ID: 8823691

Claim:
A display device comprising: a plurality of pixel groups each including pixel circuits; a plurality of scanning lines that are each disposed to correspond to any one of the plurality of pixel groups and that are connected to the pixel circuits included in the corresponding pixel group; a clock signal supply circuit that supplies a clock signal including a pulse signal as a potential scanning the corresponding pixel group in a period in which each of the plurality of pixel groups is scanned; a shift register circuit that selectively transmits the pulse signal to the plurality of scanning lines in a predetermined order; and data signal lines that are connected to the pixel circuits included in the plurality of pixel groups and that supply a data signal to the pixel circuits included in the pixel group to be scanned; wherein the clock signal supply circuit supplies the clock signal so that a period of the pulse signal supplied to some of the plurality of scanning lines is longer than a period of the pulse signal supplied to the other scanning lines; wherein the shift register circuit includes a plurality of elementary circuits that transmit the pulse signal from the clock signal supply circuit to any of the plurality of scanning lines; wherein each elementary circuit includes: a first transistor that is disposed between the clock signal line and the corresponding scanning line; and a second transistor that is diode-connected and that supplies the pulse signal to be output to the scanning line in a predetermined number before the corresponding scanning line to a gate electrode of the first transistor; and wherein a width of a source electrode and a drain electrode of the second transistor included in an elementary circuit in which the period in which the supplied pulse signal serves as a scanning potential is long is smaller than a width of a source electrode and a drain electrode of the second transistor included in an other elementary circuit.