Patent ID: 8174441

Claim:
A configurable calculating circuit, comprising: a multiplexer, for receiving a plurality of input signals including at least a first input signal and a second input signal, and selectively outputting at least one of the input signals; a mixer, coupled to the multiplexer, for mixing a selected input signal outputted from the multiplexer with a local oscillation signal to generate a mixed signal; and an accumulator, coupled to the mixer, for accumulating the mixed signal to generate an accumulated signal; wherein when the configurable calculating circuit is operated under a first mode, the multiplexer selects the first input signal, and the accumulator performs a first accumulating operation upon the mixed signal; and when the configurable calculating circuit is operated under a second mode, the multiplexer selects the second input signal, and the accumulator performs a second accumulating operation, different from the first accumulating operation, upon the mixed signal.