Patent ID: 8222675

Claim:
A semiconductor device comprising: a nitride semiconductor layer; a nitride semiconductor lower layer composed of nitride based compound; a gate insulating film covering a surface of the nitride semiconductor layer; a gate electrode disposed on a surface of the gate insulating film; a first electrode disposed on a part of the surface of the nitride semiconductor layer; and a second electrode disposed on another part of the surface of the nitride semiconductor layer, the second electrode being apart from the first electrode, wherein the gate insulating film includes a portion composed of aluminum nitride and a portion composed of insulating material that contains at least one of oxygen and silicon, the nitride semiconductor layer including a first region facing the gate electrode and being positioned directly below the gate electrode, and a second region facing the gate electrode and the portion of the gate insulating film composed of aluminum nitride, the second region being positioned directly below the portion composed of aluminum nitride, wherein the first region includes the second region and the second region is smaller in width than the first region, a surface of the second region making contact with the gate insulating film and an area within the second region in the vicinity of the surface of the second region are i-type or p-type, a surface of the nitride semiconductor layer except for the second region making contact with the gate insulating film and an area within the nitride semiconductor layer other than the second region are n-type, wherein the nitride semiconductor layer and the nitride semiconductor lower layer are interfaced with a heterojunction, a band gap of the nitride based compound of the nitride semiconductor layer is different from a band gap of the nitride based compound of the nitride semiconductor lower layer, wherein the gate insulating film covers the surface of a portion of the nitride semiconductor layer located in the interval between the first and second electrodes, the nitride semiconductor layer includes a third region facing the gate insulating film between the first and second electrodes, and the third region includes the first region, and wherein the portion composed of aluminum nitride is formed with a thickness not reaching the gate electrode.