Patent ID: 6839875

Claim:
A method of operating a multistate memory cell, the cell having one of 4 states, the method comprising: reading the cell to generate a voltage signal indicative of the state of the cell, the voltage signal being between approximately 0 percent and 24 percent of X volts, or between approximately 25 percent and 49 percent of X volts, or between approximately 50 percent and 74 percent of X volts, or between approximately 75 percent and 100 percent of X volts, wherein X volts comprises a selected voltage defined from a minimum voltage; encoding the voltage signal into one of a sequence of encoded signals E 1 , E 2 , E 3 , and E 4 , each of the encoded signals representing a unique ordered set of binary bits; and performing error detection and correction on the encoded signal to detect errors in the encoded signal and to correct correctable errors in the encoded signal.