Patent ID: 7719887

Claim:
A circuit, comprising: an output of a first inverter directly connected to a first charge storage node, to a first source/drain of a first FET and through a second resistor to an input of a second inverter; an output of said second inverter directly connected to a second charge storage node, to a first source/drain of a second FET and through a first resistor to an input of said first inverter; a second source/drain of said first FET connected to a first bit line and a second source/drain of said second FET connected to a second bit line; gates of said first and second FETs connected to a wordline; said first and second resistors independently comprising a material having an amorphous state and a crystalline state, said amorphous state having a higher resistance than said crystalline state, said material reversibly convertible between said amorphous state and said crystalline state by application of heat; and means for applying sufficient heat to said first and second resistors to (i) change said amorphous state of said first and second resistors to said crystalline state and to (ii) change said crystalline state of said first and second resistors to said amorphous state.