Patent ID: 7277356

Claim:
A method of controlling a memory module including a plurality of integrated circuit memory devices coupled to a memory controller over a same command/address bus, the method comprising: providing a mode register set command from the memory controller to each of the integrated circuit memory devices over the command/address bus during a mode register set operation; providing a disable signal from the memory controller to a first one of the integrated circuit memory devices over a signal line between the memory controller and the first integrated circuit memory device to thereby disable implementation of the mode register set command for the first integrated circuit memory device during the mode register set operation; and providing an enable signal from the memory controller to a second one of the integrated circuit memory devices over a signal line between the memory controller and the second integrated circuit memory device to thereby enable implementation of the mode register set command for the second integrated circuit memory device during the mode register set operation, wherein the disable signal is not provided to the second integrated circuit memory device during the mode register set operation and wherein the enable signal is not provided to the first integrated circuit memory device during the mode register set operation.