Patent ID: 8386228

Claim:
A microcomputer simulator for simulating a microcomputer including therein a first CPU and a peripheral circuit of the first CPU, the microcomputer simulator comprising: a mother board including a second CPU for executing application software to be processed by the first CPU, a first PCI communication portion connected to second CPU via a first internal bus in the mother board, a first bus bridge portion connected to the first PCI communication portion via a first PCI bus, and a memory storing the application software; and an IO board including a simulation peripheral circuit for simulating processing of the peripheral circuit provided in the microcomputer and a hardware processing portion for executing IO processing executed by the first CPU, a second PCI communication portion connected to the hardware processing portion via a second internal bus on the IO board, and a second bus bridge portion connected to the second PCI communication portion via a second PCI bus and connected to the first bus bridge portion, wherein: the hardware processing portion of the IO board comprises: a common memory portion; the microcomputer simulator causes data to be exchanged between the second CPU provided in the mother board and the hardware processing portion of the IO board by updating data stored in the common memory portion through: (1) the first PCI bus connecting the first PCI communication portion in the mother board and (2) the second PCI bus connecting the second PCI communication portion in the IO board; the first and second bus bridge portions carry out exchange of unique data dependent on configurations of the first CPU and peripheral resources, which are both incorporated in the microcomputer in a form of communication processing converted to be independent of the configuration of the peripheral resources' hardware that is incorporated in the microcomputer, the unique data being exchanged between the application software executed in the mother board and the IO processing executed in the IO board via the second PCI bus; a storing area for an imaginary register that simulates an internal register used by the first CPU to control the peripheral resources is provided in the memory on the mother board; and a memory driver is stored in the memory: for reading data from the common memory portion, writing the data to the imaginary register, forwarding the data to the application software through the imaginary register, reading the data forwarded from the application software to the imaginary register, and writing the data to the common memory portion.