Patent ID: 8375392

Claim:
A system for data-aware scheduling of applications on a discrete heterogeneous platform having at least one central processing unit (CPU) and at least one accelerator having at least one graphics processing unit (GPU), comprising: a function call handling module configured to intercept, analyze, and schedule library calls on a processing element, comprising: a function call interception module configured to intercept function calls to predefined library kernels having one or more CPU library implementation and one or more accelerators library implementation; a function call analysis module configured to analyze argument size and location of requested data used by a predefined library kernel; and a function call redirection module configured to schedule library calls and data transfers; and a memory unification module, configured to keep data coherent between different memories associated with the at least one CPU and the at least one accelerator based on the output of the function call redirection module by synchronizing CPU memory and accelerator memory; and in response to the analyzed argument size and the location of requested data, the function call analysis module configured to determine whether the CPU or one of the accelerators would most efficiently execute the predefined library kernel, and if the data is not located at a fastest processor for executing the predefined library kernel; the function call analysis module configured to compare a time needed to transfer data having the analyzed argument size to a threshold; if the time needed to transfer data having the analyzed argument size is greater than the threshold, scheduling the predefined library kernel at a first processing element currently storing the requested data; if the time needed to transfer data is below the threshold, transferring the requested data to a more efficient processing element and assigning the predefined library kernel at the more efficient processing element at a second location.