Patent ID: 7263564

Claim:
An inquiring apparatus, provided in an electronic apparatus having a central processor unit (CPU), the electronic apparatus comprising a clock controller, and a main bus, the inquiring apparatus comprising: a multiplexer for selectively coupling a first bus or a second bus with the main bus, peripheral device associated with an address; wherein when the CPU needs to wait for the peripheral device coupled to the main bus to come to an expected state, the CPU activates the inquiring apparatus to inform an awakening unit of the address of the peripheral device and to make the multiplexer couple the second bus with the main bus so that the awakening unit, instead of the CPU, repeatedly inquires the current state of the peripheral device associated with the address to determine whether the current state of the peripheral device agrees with the expected state and so that the CPU is placed into a power-saving state in which the clock controller stops outputting a clock to the CPU.