Patent ID: 7376916

Claim:
A method for performing a constrained optimization to determine circuit parameters, comprising: selecting two types of circuit parameters associated with a circuit path, wherein the optimization is to be performed on the first circuit parameter while a limitation on second circuit parameter functions as a constraint on the optimization of the first circuit parameter; generating objective functions which model the first circuit parameter and the second circuit parameter in terms of logical effort, wherein logical effort is used to characterize one or more gates in the circuit path by computing each gate's driving capability relative to that of a reference inverter; generating a constraint expression from the objective functions, wherein the constraint expression mathematically relates the optimization of the first circuit parameter to the constraint on the second circuit parameter; computing and plotting a trade-off curve by solving the constraint expression, wherein the constraint expression is ∇A(x)=−λ∇B(x), for all λ>0, and where λ is a Lagrangian multiplier, A(x) is an expression for the first parameter of the circuit path, and B(x) is an expression for the second parameter of the circuit path; and computing transistor sizes for the circuit path based on a selected point from the trade-off curve.