Patent ID: 8338281

Claim:
A method for fabricating a semiconductor device, comprising: forming a photoresist pattern having a first opening over a substrate; forming a first impurity region inside the substrate exposed through the first opening, by ion implantation process of a first conductive type impurity; partially etching the photoresist pattern by a plasma ashing process using oxygen (O 2 ) gas to form a second opening having a width broader than that of the first opening; forming a second impurity region inside the substrate exposed through the second opening, by ion implantation process of a second conductive type impurity; and forming a gate electrode over the substrate; wherein the second conductive type impurity is different from the first conductive type impurity, and the second impurity region is formed to surround a bottom surface and a sidewall of the first impurity region and to be deeper than the first impurity region, wherein the gate electrode is formed to be partially overlapped with the first impurity region.