Patent ID: 7741981

Claim:
A dual-use analog-digital converter comprising: a charge-sharing line; a plurality of switches controlled by a digital value; an array of capacitors having weighted capacitance values, wherein array capacitors in the array connect to the charge-sharing line and to the plurality of switches; an analog input having an analog input voltage, a fixed voltage; wherein the digital value controls the plurality of switches to selectively connect array capacitors to the analog input voltage and to the fixed voltage; a terminal capacitor connected to the charge-sharing line, wherein charge is shared between the array capacitors and the terminal capacitor to generate a first compare voltage; a re-configurable comparator stage that receives the first compare voltage and compares the first compare voltage to a second comparator input to generate a compare output and to generate a feedback output; a feedback switch that connects the feedback output to the second comparator input during a digital-to-analog converter (DAC) mode, and isolates the feedback output from the second comparator input during an Analog-to-Digital Converter (ADC) mode; an ADC switch that connects the second comparator input to a second compare voltage during the ADC mode, and isolates the second comparator input from the second compare voltage during the DAC mode; control logic for adjusting the digital value to the plurality of switches during a sequence of compare operations, and for examining the compare output from the re-configurable comparator stage during the sequence of compare operations to determine a final digital value that represents the analog input voltage; wherein the first compare voltage generated by the array of capacitors on the charge-sharing line is compared to the second compare voltage by the re-configurable comparator stage during the ADC mode to generate the compare output when determining the final digital value that represents the analog input voltage; and a digital input receiving a digital input value, wherein the control logic applies the digital input value to the plurality of switches as the digital value during the DAC mode, wherein the re-configurable comparator stage generates an analog output represented by the digital input value during the DAC mode, whereby the re-configurable comparator stage and the array of capacitors are used both for analog-to-digital conversion and for digital-to-analog conversion.