Patent ID: 7844053

Claim:
A microprocessor apparatus, for performing a cryptographic operation, the apparatus comprising: an x86-compatible microprocessor, comprising: fetch logic, configured to fetch an application program from memory for execution by said x86-compatible microprocessor, said application program comprising: an atomic instruction, configured to direct said x86-compatible microprocessor to perform the cryptographic operation, wherein said atomic instruction comprises: an opcode field, configured to prescribe that said x86-compatible microprocessor accomplish the cryptographic operation as further specified within a control word stored in said memory; and a repeat prefix field, coupled to said opcode field, configured to indicate that the cryptographic operation prescribed by the atomic instruction is to be accomplished on a plurality of blocks of input data; a cryptography unit, configured to execute a plurality of cryptographic rounds on each of a plurality of input text blocks to generate a corresponding each of a plurality of output text blocks, wherein said plurality of cryptographic rounds are prescribed by said control word, wherein said cryptography unit executes a first plurality of micro instructions generated by translation of said cryptographic instruction; and an x86 integer unit, an x86 floating point unit, an x86 MMX unit, and an x86 SSE unit, wherein said cryptography unit operates in parallel with said x86 integer unit, said x86 floating point unit, said x86 MMX unit, and said x86 SSE unit, to accomplish the cryptographic operation, wherein said x86 integer unit executes a second plurality of micro instructions generated by said translation unit to test a bit in a flags register, to update text pointer registers, and to process interrupts during execution of said plurality of cryptographic rounds.