Patent ID: 7233875

Claim:
A test set for testing an integrated circuit, the test set comprising: a protocol encoder for formatting a plurality of test data in accordance with a channel protocol to create formatted data; a channel encoder, operably coupled to the protocol encoder, for channel coding the formatted data in accordance with at least one analog channel parameter and at least one analog perturbation parameter to form a link signal; a first link interface, operably coupled to the channel encoder and the integrated circuit, for producing a channel signal that is coupled to the integrated circuit; a second link interface, operably coupled to the integrated circuit, for producing a received signal that is based on the channel signal; a processor, operably coupled to the second link interface, for processing a received signal from the second link interface to produce at least one analog second link parameter and for generating a plurality of result data; and a results analyzer, operably coupled to the processor, for correlating the plurality of result data to the plurality of test data.