Patent ID: 8024690

Claim:
A method of determining routing of data paths in interconnect circuitry for an integrated circuit, the interconnect circuitry on a first side of said circuit providing a narrow interface for connection to a first device and on a second side of said circuit providing a wide interface for connection to a distributed plurality of further devices, each data path being associated with one of said further devices and providing a connection through the interconnect circuitry, between that associated, further device and the first device, the method comprising the steps of: (i) defining a plurality of cells to be provided along the wide interface, each of the further devices being associated with at least one of said cells; (ii) defining the interconnect circuitry as an array of blocks formed in rows and columns, each cell abutting one of said columns; (iii) providing a predetermined set of tiles, each tile providing a predetermined wiring layout; and (iv) for each block, applying predetermined rules to determine one of said tiles to be used to implement that block, the predetermined rules taking into account the location of the block in the array, and the association between the plurality of further devices and the plurality of cells, and ensuring that each data path provided by the interconnect circuitry has the same propagation delay, said method steps are implemented on a computer system.