Patent ID: 7576521

Claim:
A switching regulator, comprising: first and second switching regulator units, each of which has a coil connected to an input power source voltage, a first switching element (LMOS) provided between the coil and a grounded power source, and a second switching element (HMOS) provided between an output terminal and a connection point between the coil and the first switching element, the output terminal being commonly connected, the first switching element (LMOS) being subjected to non-conduction control at a first timing (T 1 ) after starting conduction of the first switching element (LMOS), thereafter the second switching element (HMOS) being subjected to non-conduction control at a second timing (T 3 ) at which current of the coil becomes zero, after starting conduction of the second switching element (HMOS), and thereafter the first switching element (LMOS) being subjected to conduction control at a third timing (T 4 ); and first and second PLL circuit units that are provided in the first and second switching regulator units respectively, input first and second control pulse signals (PIN 1 , PIN 2 ) respectively, phases of which are shifted from each other, and control the first timing (T 1 ) of performing non-conduction control on the first switching element (LMOS) such that the third timing (T 4 ) synchronizes with the phases of the control pulse signals, wherein the first and second control pulse signals each is controlled to have a frequency corresponding to a voltage-boosted level of the output terminal.