Patent ID: 7358609

Claim:
A semiconductor device comprising: a first interconnection layer; a second interconnection layer arranged on the first interconnection layer; a plurality of first conductive interconnections disposed in the first interconnection layer, each of the first conductive interconnections being electrically connected to at least one of a circuit device and an external connection of the semiconductor device; a plurality of second conductive interconnections disposed in the second interconnection layer, each of the second conductive interconnections being electrically connected to at least one of a circuit device and an external connection of the semiconductor device; a plurality of first dummy interconnections disposed in the first interconnection layer, each said first dummy interconnection being disposed entirely within the first interconnection layer except for an upper surface thereof, each said first dummy interconnection being not connected to other said first dummy interconnections in the first interconnection layer and not connected to any of the first conductive interconnections; and a plurality of second dummy interconnections disposed in the second interconnection layer, each said second dummy interconnection being disposed entirely within the second interconnection layer except for an upper surface thereof, each said second dummy interconnection being not connected to other said second dummy interconnections in the second interconnection layer and not connected to any of the second conductive interconnections; wherein each of the first and second dummy interconnections and the first and second conductive interconnections has a thickness measured as a distance that a given said interconnection extends into said layer in which the given interconnection is disposed; wherein the upper surface of each of the first and second dummy interconnections has length and width dimensions, the length being at least as great as the width; wherein a maximum width of each of the first dummy interconnections is less than a minimum width of each of the second dummy interconnections; and wherein a thickness of each of the first conductive interconnections is less than a thickness of each of the second conductive interconnections.