Patent ID: 8363027

Claim:
A stackup of a plurality of display pixels, the stackup comprising: first, second, third and fourth, and fifth regions each having a plurality of display pixels, the plurality of display pixels having circuit elements, the first, second, third and fourth, and fifth regions arranged in order along a first direction; and wherein: circuit elements of the display pixels in the first region being electrically connected together; circuit elements of the display pixels in the fifth region being electrically connected together; the second region disposed between the first and third regions and comprising a grounding region; the fourth region disposed between the third and fifth regions and comprising a grounding region; wherein at least one conductive pathway connects circuit elements of the first region to circuit elements of the fifth region wherein the at least one conductive pathway is disposed across the display pixels of the second, third and fourth regions without electrically connecting to the circuit elements of the second, third or fourth regions.