Patent ID: 7363430

Claim:
A method to determine one of M cache entries, each of the M cache entries associated with data storage and address storage, the method comprising: receiving an indication that data is read from or written to a first one of the M cache entries; controlling a first decision cell of a first decision cell layer to indicate a second one of the M cache entries, the first decision cell of the first decision cell layer associated with the first one of the M cache entries and the second one of the M cache entries; controlling a first decision cell of a second decision cell layer to indicate a second decision cell of the first decision layer, the first decision cell of the second decision cell layer associated with the first decision cell of the first decision layer and the second decision cell of the first decision layer; controlling a root decision cell to indicate a second decision cell of the second decision layer, the root decision cell associated with the first decision cell of the second decision layer and the second decision cell of the second decision layer, wherein the root decision cell comprises a four input multiplexer, a two input multiplexer, a D flip flop, a first AND gate, a second AND gate, and a NOT gate, wherein the two input multiplexer receives an output of the four input multiplexer, and an output of the NOT gate, wherein the D flip flop receives an output of the two input multiplexer, wherein the not gate receives an output of the D flip flop, wherein the first AND gate receives the output of the NOT gate and receives a signal from an enable line, wherein the second AND gate receives the output of the D flip flop and receives the signal from the enable line, and wherein the four input multiplexer receives the output of the D flip flop, the output of the NOT gate, a first hit signal, and a second hit signal; determining a third decision cell of the first decision layer that is indicated by the second decision cell of the second decision layer; and determining a third one of the M cache entries that is indicated by the third decision cell of the first decision layer.