Patent ID: 8619979

Claim:
An electronic device having selectable transistor pairs configured to generate a response to a challenge, the electronic device comprising: a plurality of transistors, each of the plurality of transistors having a threshold voltage substantially equal to an intended threshold voltage; a challenge input configured to receive the challenge, wherein the challenge input includes one or more bits that are used to individually select a first transistor of the plurality of transistors and a second transistor of the plurality of transistors; a comparator configured to: receive a first output voltage from the first transistor; receive a second output voltage from the second transistor; receive an offset voltage; generate a first response indicating which of the first transistor and the second transistor has a higher output voltage based on a comparison of the first output voltage and the second output voltage, wherein the first output voltage and the second output voltage vary as a result of a variation in the threshold voltages of the first transistor and the second transistor; and generate a second response, wherein the second response differs from the first response when a sum of the offset voltage and a lower voltage of the first output voltage and the second output voltage is greater than or equal to a higher voltage of the first output voltage and the second output voltage and wherein the second response is the same as the first response when the sum is less than the higher voltage; a reference voltage source configured to: supply a reference voltage that is substantially equal to the intended threshold voltage to a first gate of the first transistor, and supply the reference voltage to a second gate of the second transistor; wherein the first output voltage results from a current flowing from a common drain voltage source across a first resistor having a common resistance value when the reference voltage is applied to the first gate; and wherein the second output voltage results from the current flowing from the common drain voltage source across a second resistor having the common resistance value when the reference voltage is applied to the second gate.