Patent ID: 8288825

Claim:
A semiconductor device comprising: a substrate comprising a first semiconductor material having first and second active regions, wherein the first and second active regions comprise first and second transistor gate structures of first and second transistors, the substrate having a top substrate surface; recesses in the second active region adjacent to the second transistor gate structure, wherein a fill layer is disposed in the recesses, the fill layer comprises a second semiconductor material having a top surface disposed above the top substrate surface; first source/drain (s/d) layers disposed in the first active region adjacent to the first gate structure and second s/d layers disposed over the fill layer in the second active region, wherein the first s/d layers and the second s/d layers comprise a s/d semiconductor material, the first and second s/d layers have different thicknesses, wherein a top surface of the first s/d layers is substantially co-planar with a top surface of the second s/d layers.