Patent ID: 7687339

Claim:
A method for fabricating a semiconductor structure, the method comprising the steps of: forming a hard mask layer on a gate-forming material layer having a first portion and a second portion; fabricating a plurality of mandrels on the hard mask layer and overlying the first portion and the second portion of the gate-forming material layer; depositing a sidewall spacer material layer overlying the plurality of mandrels; partially etching the sidewall spacer material layer overlying the first portion of the gate-forming material layer, the first portion being less than the entire gate-forming material layer; fabricating sidewall spacers from the sidewall spacer material layer, the sidewall spacers adjacent sidewalls of the plurality of mandrels; removing the plurality of mandrels; etching the hard mask layer using the sidewall spacers as an etch mask; and etching the gate-forming material layer using the etched hard mask layer as an etch mask.