Patent ID: 7409664

Claim:
An integrated circuit, comprising: a first region comprising: a first plurality of cells located along a first dimension and a second dimension, wherein the first region has a first span along the first dimension and a second span along the second dimension; a plurality of switches; and a first plurality of conductors located within the first region, wherein each conductor of the first plurality of conductors to selectively couple to inputs and outputs of cells of the first plurality of cells and conductors of the first plurality of conductors through the plurality of switches and wherein the first plurality of conductors span cells of the first plurality of cells along the first dimension and the second dimension, wherein the first plurality of conductors comprises: a first conductor having a first span along the first dimension; a second conductor having a second span along the first dimension; a third conductor having a third span along the second dimension; and a fourth conductor having a fourth span along the second dimension; wherein the first span of the first region is greater than the first span of the first conductor and the first span of the first conductor is greater than the second span of the second conductor, wherein the second span of the first region is greater than the third span of the third conductor and the third span of the third conductor is greater than the fourth span of the fourth conductor; a second region located within the first region, having a span along the first dimension, comprising: a subgroup of cells of the first plurality of cells located in the second region, wherein the span of the second region is less than the second span of the second conductor; a fifth conductor of the first plurality of conductors located within the second region having a fifth span equal to the span of the second region along the first dimension; and a first cell of the first plurality of cells; a second cell of the first plurality of cells; and two independently program controlled switches comprising a first switch and a second switch, wherein the first cell is configured to selectively couple to drive the fifth conductor through at least the first switch and wherein the second cell is configured to selectively couple to drive the fifth conductor through at least the second switch.