Patent ID: 7804892

Claim:
Circuitry comprising: a first equalization circuit that applies a gain to bit transitions in a data input signal; a first current source that produces a first current; a first switch that selectively couples the first current source and the first equalization circuit to adjust a bit in the data signal being output by the first equalization circuit; a second equalization circuit that applies a gain to bit transitions in the data signal being output by the first equalization circuit; a second current source that produces a second current; and a second-stage switch that selectively couples the second current source and the second equalization circuit to adjust a bit in the data signal being output by the second equalization circuit, wherein a first preceding bit in the data signal being output by the second equalization circuit determines how the first switch selectively couples the first current source and the first equalization circuit, and a second preceding bit in the data signal being output by the second equalization circuit determines how the second-stage switch selectively couples the second current source and the second equalization circuit.