Patent ID: 8565038

Claim:
A multilevel memory sensing system for detecting a voltage level stored in a multilevel memory cell, comprising: a memory sensing circuit connected to the multilevel memory cell and having a power terminal for receiving a power supply current, wherein the power supply current is subject to a variation; and a current compensation circuit connected to the power terminal of the memory sensing circuit, and configured to supply a compensation current to the power terminal so as to compensate for the variation of the power supply current; wherein the memory sensing circuit further comprises a metal-oxide semiconductor (MOS) transistor having an input terminal connected to the power terminal so as to receive the power supply current, and a gate terminal connected to the current compensation circuit; and wherein the current compensation circuit further comprises: a current source configured to transmit a first current; and a current mirror circuit connected to the gate terminal and the power terminal, and configured to divert from the first current an amount of current substantially equal to the power supply current, so as to form the compensation current.