Patent ID: 7557406

Claim:
An apparatus comprising: a plurality of transistor segments arranged on a die, each transistor segment having a racetrack shape with a length elongated in a first lateral direction and a width in a second lateral direction, each transistor segment including: a pillar of a semiconductor material, the pillar including an extended drain region that extends in a vertical direction through the die; a first and second dielectric regions disposed on opposite sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions; wherein the transistor segments are arranged into a plurality of sections, a first section comprising a first row of transistor segments arranged in a side-by-side relationship in the second lateral direction, and a second section comprising a second row of transistor segments arranged in the side-by-side relationship in the second lateral direction, the second dielectric region of each transistor segment of the first section being merged with the second dielectric region of each transistor segment of the second section.