Patent ID: 7288813

Claim:
A direct-tunneling semiconductor memory device, comprising: a semiconductor substrate; a device isolation structure formed on said semiconductor substrate, including a device isolation trench formed in said semiconductor substrate and a device isolation insulation film filling said device isolation trench, said device isolation structure defining a device region on a semiconductor substrate surface; a tunneling insulation film formed on said semiconductor substrate surface in correspondence to said device region; a floating gate electrode formed on said tunneling insulation film; a dielectric film covering both sidewall surfaces and a top surface of said floating gate electrode; a conductive part provided on said sidewall surfaces of said floating gate electrode via said dielectric film, said conductor part constituting a part of a control gate electrode; and first and second diffusion regions formed in said device region at respective lateral sides of said floating gate electrode, said first and second diffusion regions being formed in said device region on a surface of said device isolation groove with offset from a region right underneath said floating gate electrode, said conductive part being formed in said device region with offset from said device isolation trench.