Patent ID: 7172971

Claim:
A method of fabricating a semiconductor device comprising: forming a lower dielectric layer on a semiconductor substrate; forming an upper dielectric layer on the lower dielectric layer; anisotropically etching the upper dielectric layer and the lower dielectric layer to form a trench therein, the trench passing through the upper dielectric layer and having a depth less than a combined thickness of the upper dielectric layer and the lower dielectric layer; and isotropically etching the lower dielectric layer exposed by the trench to form a contact window, wherein a width of a lower region of the contact window is wider than a width of an upper region of the contact window, wherein forming the lower dielectric layer comprises: forming a first dielectric layer on the semiconductor substrate; and forming a second dielectric layer on the first dielectric layer, wherein the second dielectric layer has a lower etch rate than the first dielectric layer during the isotropic etching.