Patent ID: 7512028

Claim:
An integrated circuit (IC) comprising: (a) two or more feature blocks adapted to be independently enabled or disabled to provide any one of a plurality of feature sets for the IC; (b) two or more one-time-programmable (OTP) memory cells, one for each feature block, each OTP memory cell storing a value; and (c) two or more feature control modules, one for each feature block, each feature control module adapted to enable or disable the corresponding feature block based on the value stored in the corresponding OTP memory cell, wherein: each of the two or more feature control modules comprises digital logic circuitry having (i) a first input based on the value stored in the corresponding OTP memory cell, and (ii) a second input; and each of the two or more feature control modules is adapted to output to the corresponding feature block (i) a first substantially constant value to disable the feature block if the first input has a feature-disable value, and (ii) a signal corresponding to the second input to enable the feature block if the first input has a feature-enable value, wherein the second input is a clock signal.