Patent ID: 6864566

Claim:
A dual die package comprising: a first semiconductor chip having a plurality of first electrode pads located at a center portion of its active surface; a first lead frame having a plurality of first leads, the first leads comprising: first contact portions disposed above the active surface of said first chip; first connection portions stepwise connected to the first contact portions; and connection pads, each protruding from a side surface of a corresponding first connection portion; first bonding wires that electrically connect the first electrode pads to the first contact portions; a second semiconductor chip having a plurality of second electrode pads located at a center portion of its active surface, wherein a back surface of the second semiconductor chip is attached to a back surface of the first semiconductor chip; a second lead frame having a plurality of second leads, the second leads comprising: second contact portions disposed above the active surface of said second chip; and second connection portions stepwise connected to the second contact portions; second bonding wires that electrically connect the second electrode pads to the second contact portions; third bonding wires that electrically connect the connection pads of the first leads to the second connection portions of the second leads; and a package body that encapsulates the first chip, the second chip, the first bonding wires, the second bonding wires, the third bonding wires, the first connection portions of the first leads and the second connection portions of the second leads.