Patent ID: 8552899

Claim:
A circuit comprising: a first analog mixer configured to mix a first received analog signal with a first oscillator signal having a first frequency, the first oscillator signal received from a control device; a second analog mixer configured to mix a second received analog signal with a second oscillator signal having a second frequency, the second oscillator signal received from the control device; an analog-digital converter (ADC) configured to: convert a sum signal to a digital signal, the sum signal based on a first output of the first analog mixer and a second output of the second analog mixer; and output the digital signal to a digital multiplier; the control device configured to: output to the digital multiplier a first digital value of a first function having the first frequency and timed by a clock signal; and output to the digital multiplier a second digital value of a second function having the second frequency and timed by the clock signal, wherein the output of the first value and the second value are offset by a period of time; a first register configured to receive a first control signal from the control device, the first control signal based on the first digital value and a digital signal output from the digital multiplier; and a second register configured to receive a second control signal from the control device, the second control signal based on the second digital value and the digital signal output from the digital multiplier.