Patent ID: 6934941

Claim:
A compiler for processing computer program source code, to generate object code to be executed by a RISC (Reduced Instruction Set Computer) type of CPU (central processing unit) of a computer, said object code including code for an instruction for judging the value of a bit variable and an instruction for assigning a value to a bit variable, said bit variables being held in a memory of said computer, said source code including a bit operational expression that expresses a result value for a bit variable in accordance with a combination of respective values of a plurality of bit variables, comprising: a convertor, responsive to input source code, to generate object code, a right-side portion of said bit operational expression in said source code being expressed in the object code as a condition judgement expression that is in accordance with Boolean logic, said condition judgement expression providing a result that is “true” when said combination of respective values has a predetermined first Boolean logic relationship and a result that is “false” when said combination of respective values has a predetermined second Boolean logic relationship, and being expressed as instructions in the object code that selectively assign a predetermined first binary value and a predetermined second binary value that is the inverse of said first binary value to a bit variable which holds a result of said bit operational expression, in accordance with whether a “true” or a “false” decision is obtained from said condition judgement expression.