Patent ID: 7774162

Claim:
A system LSI comprising: a semiconductor chip which receives power from a power supply; an electronic timer which measures a time from an interruption of power supplying to the semiconductor chip to a resumption of power supplying to the semiconductor chip, the timer including a parallel unit comprised of a plurality of aging devices connected in parallel and having input and output terminals, each of the aging devices being configured to be turned from on to off, or, from off to on without the power supply for a predetermined time defined with amounts of stored electric charge and formed of a transistor which includes a floating gate; a current detecting unit configured to detect a sum current of currents flowing in the aging devices of the parallel unit when a voltage is applied between the input and output terminals of the parallel unit; and a time measuring unit configured to measure a time from immediately after the interruption of power supplying to the resumption of power supplying from the sum current, the time measuring unit including an elapse-time table which stores an elapse-time change characteristic; a memory which stores the sum current detected at the resumption of power supplying; and an elapse-time measuring circuit which measures the time from immediately after the interruption of power supplying to the resumption of power supplying, from the sum current stored in the memory and the elapse-time change characteristic stored in the table.