Patent ID: 7915882

Claim:
A current reference circuit comprising: a current mirror first leg including: a first MOS transistor, having a gate connected to a drain, and having a source coupled to a first reference voltage; and a first bipolar transistor, having a collector coupled to the drain and gate of the first MOS transistor, having a base, and having an emitter connected to a second reference voltage; a current mirror second leg including: a second MOS transistor, having a gate coupled to the gate and drain of the first MOS transistor, having a source coupled to the first reference voltage, and having a drain; a second bipolar transistor having a collector coupled to the drain of the second MOS transistor, having a base, and having an emitter coupled to the second reference voltage; and a first resistor connected between the base of the second bipolar transistor and the second reference voltage, wherein the base of the first bipolar transistor is connected to the collector of the second bipolar transistor; a current mirror third leg including: a third MOS transistor, having a gate coupled to the gate and drain of the first MOS transistor, having a source coupled to the first reference voltage, and having a drain; a third bipolar transistor, having a collector and a base connected together and coupled to the drain of the third MOS transistor, and having an emitter coupled to the second reference voltage; and a second resistor coupling the drain of the third MOS transistor to the collector of the third bipolar transistor, wherein the base of the second bipolar transistor is coupled to the collector and base of the third bipolar transistor via the second resistor; and a startup leg including: a fourth bipolar transistor, having a collector coupled to the first reference voltage, having an emitter, and having a base coupled to the drain of the first MOS transistor; and a third resistor, coupling the emitter of the fourth bipolar transistor to the second reference voltage.