Patent ID: 8546234

Claim:
A semiconductor process, comprising: forming a plurality of conductive patterns in a substrate; after forming the conductive patterns, forming a mask layer on the substrate, wherein the mask layer has a first opening exposing a portion of the substrate; by using the mask layer as a mask, performing a dry etching process on the substrate to form a second opening between the conductive patterns in the substrate, wherein the second opening has a bottom portion and a side wall extending upwards and outwards from the bottom portion, the bottom portion is exposed by the first opening of the mask layer, and the side wall is-covered by the mask layer; by using the mask layer as a mask, performing a vertical ion implantation process on the bottom portion of the second opening through the first opening; and performing a conversion process on the substrate, so as to form converting layers on the side wall and the bottom portion of the second opening, wherein a thickness of the converting layer on the side wall is larger than a thickness of the converting layer on the bottom portion.