Patent ID: 8610860

Claim:
An array substrate, comprising: a base substrate, comprising a pixel region and a peripheral region; data lines and gate lines formed to transversely and longitudinally cross each other on the base substrate to form a plurality of pixel units in the pixel region, wherein each of the pixel units comprises a switching element, a pixel electrode and a common electrode above the pixel electrode, and the common electrode has slits in each pixel unit and is a plate-shaped electrode in the pixel region, and when powered on, the common electrode forms a horizontal electric field together with the pixel electrode of each pixel unit; and a common electrode line formed in the pixel region and connected with the common electrode, wherein the common electrode line comprises a first common electrode line and a second common electrode line, the first common electrode line is disposed at the same layer as the data lines and parallel with the data lines, the second common electrode line is disposed at the same layer to the gate lines and parallel with the gate lines, and the first common electrode line and the second common electrode line are respectively connected with the common electrode through contact via holes.