Patent ID: 8916440

Claim:
A method for manufacturing a high-voltage metal-oxide-semiconductor field-effect transistor comprising: forming a field-effect transistor (FET) on a substrate in a FET region; forming a high-voltage FET (HVFET) on a dielectric stack over a lightly-doped diffusion (LDD) drain in the substrate in a HVFET region; and forming an NPN transistor on the substrate in an NPN region, wherein: the dielectric stack comprises a plurality of stacked dielectric layers; the forming the FET comprises forming a first gate structure in the FET region; the forming the HVFET comprises: forming the dielectric stack in the HVFET region; and forming a raised, second gate structure on the dielectric stack; and the forming the dielectric stack comprises: forming a first insulator layer on the substrate, the first insulator layer also forming an insulator layer in the first gate structure; and forming a first mask layer on the first insulator layer, the first mask layer also forming sidewalls of the first gate structure.