Patent ID: 7450417

Claim:
A nonvolatile semiconductor memory device having a memory cell array arranged with a plurality of memory cells capable of storing information as a result of a change in an electrical attribute and of erasing and programming information by electrically changing the electrical attribute, wherein each memory cell in the plurality of memory cells can store one data value to be selected from the same number of data values as a plurality of distribution ranges for programming which are not mutually overlapping, in accordance with that the electrical attribute belongs to one of the distribution ranges for programming, the nonvolatile semiconductor memory device comprising: an erasure device to erase one or more memory cells from among the plurality of memory cells so that the electrical attributes of the one or more memory cells selected as targets of erasing belong to a distribution range for erasing; and a programming device to program one or more memory cells from among the plurality of memory cells so that the electrical attributes of the one or more memory cells selected as targets of programming belong to any one of the distribution ranges for programming, wherein the nonvolatile semiconductor memory device is configured so that either the upper limit of the distribution range for erasing is lower than the upper limit of the lowest distribution range, only by variation in a threshold voltage to be given to an adjacent memory cell when programming to an erased memory cell the data value corresponding to the lowest distribution range among the distribution ranges for programming, or the lower limit of the distribution range for erasing is higher than the lower limit of the highest distribution range, only by variation in a threshold voltage to be given to an adjacent memory cell when programming to an erased memory cell a data value corresponding to the highest distribution range among the distribution ranges for programming.