Patent ID: 7190060

Claim:
A three-dimensional stacked semiconductor package device, comprising: a first semiconductor package device, comprising: a first insulative housing with a first top surface, a first bottom surface, and a first peripheral side surface between the first top and bottom surfaces; a first semiconductor chip within the first insulative housing, wherein the first chip includes a first upper surface and a first lower surface, and the first upper surface includes a first conductive pad; and a first lead that protrudes laterally from and extends through the first peripheral side surface and is electrically connected to the first pad, wherein the first lead outside the first insulative housing is bent downwardly; a second semiconductor package device, comprising: a second insulative housing with a second top surface, a second bottom surface, and a second peripheral side surface between the second top and bottom surfaces; a second semiconductor chip within the second insulative housing, wherein the second chip includes a second upper surface and a second lower surface, and the second upper surface includes a second conductive pad; and a second lead that protrudes laterally from and extends through the second peripheral side surface and is electrically connected to the second pad, wherein the second lead outside the second insulative housing is flat; and a conductive bond outside the insulative housings that extends laterally beyond any insulative material of the stacked device, extends downwardly beyond a surface of the first chip and contacts and electrically connects the leads; wherein the second insulative housing overlaps the first insulative housing, the second lead overlaps the first lead outside the insulative housings, the top surfaces face upwardly, the bottom surfaces face downwardly, and the first top surface faces towards the second bottom surface.