Patent ID: 7563648

Claim:
A semiconductor device package ( 50 , 102 , 110 ) comprising: a molding compound ( 54 ) forming at least a portion of a first package face ( 56 ); a semiconductor device ( 14 ) at least partially covered by the molding compound ( 54 ), the semiconductor device ( 14 ) including a plurality of I/O pads ( 80 ); and a lead frame ( 52 , 100 , 112 ) of electrically conductive material at least partially covered by the molding compound ( 54 ), the lead frame ( 52 , 100 , 112 ) including a plurality of leads ( 60 ), each of the leads ( 60 ) including: an interposer ( 64 ) having opposing first and second ends ( 66 , 68 ), the interposer ( 64 ) being spaced apart from the first package face ( 56 ) by a distance, a board connecting post ( 70 ) extending from the interposer ( 64 ) proximate the first end ( 66 ) and terminating at the first package face ( 56 ), a support post ( 74 ) spaced apart from the board connecting post ( 70 ), the support post ( 74 ) extending from the interposer ( 64 ) proximate the second end ( 68 ) and terminating at the first package face ( 56 ), and a bond site ( 78 ) formed on a surface of the interposer ( 64 ) opposite the support post ( 74 ), at least one of the I/O pads ( 80 ) being electrically connected to the interposer ( 64 ) at the bond site ( 78 ), wherein the interposer ( 64 ) has a recess ( 126 ) formed therein adjacent the second end ( 66 ), and a corner between a side surface ( 124 ) of the board connecting post ( 70 ) and an end surface ( 72 ) of the board connecting post ( 70 ) is removed to form a relief ( 128 ), the relief ( 128 ) having a height less than said distance.