Patent ID: 8823083

Claim:
A semiconductor device comprising a vertical semiconductor element, the vertical semiconductor element including: a semiconductor substrate defining a first surface and a second surface, the semiconductor substrate having one of a first conductivity-type and a second conductivity-type; a first conductivity-type drift layer disposed on the first surface of the semiconductor substrate; and a plurality of second conductivity-type regions each having a stripe shape defining a longitudinal direction in one direction, wherein the second conductivity-type regions are disposed in the drift layer, and the first conductivity-type drift layer defines first conductivity-type regions between the second conductivity-type regions, the first conductivity-type regions and the second conductivity-type regions are arranged alternately and repetitively at a predetermined column pitch, thereby to provide a super junction structure, the vertical semiconductor element allows an electric current to flow between a first electrode disposed adjacent to the first surface of the semiconductor substrate and a second electrode disposed adjacent to the second surface of the semiconductor substrate, and when a surplus concentration that is a value obtained by dividing a difference between an electrical charge in the second conductivity-type region and an electrical charge in the first conductivity-type region by the column pitch is referred to as i, a depth of the super junction structure is referred to as z, a surplus concentration gradient as a change of the surplus concentration i per unit depth is referred to as di/dz, and a central withstand voltage in which a margin is added to a desired withstand voltage is referred to as V max the super junction structure is configured such that the surplus concentration gradient di/dz satisfies a relationship of 0 > ⅆ i ⅆ z > - ( 7.97 × 10 11 V max ) 2 · 1 10000 .