Patent ID: 7498520

Claim:
A semiconductor multilayer wiring board having a semiconductor multilayer wiring, said semiconductor multilayer wiring board comprising: a lower wiring layer formed on a semiconductor substrate; a silica-based interlayer insulating layer having a low dielectric constant and made of a spin-on-glass (SOG) material, said silica-based interlayer insulating layer having a wiring-layer-forming space formed therein by a dual damascene process; a silane-based monomolecular layer film on an inner surface of said wiring-layer-forming space in said silica-based interlayer insulating layer; a plated film on a surface of said monomolecular layer film; an upper wiring layer formed on said lower wiring layer via said silica-based interlayer insulating layer; and a copper wiring layer on said plated film such that said lower wiring layer and said upper wiring layer are connected to each other by said copper wiring layer vertically penetrating through said silica-based interlayer insulating layer.