Patent ID: 8728894

Claim:
A method for fabricating an NMOS transistor, comprising: providing a substrate; forming a gate dielectric layer on the substrate; forming a gate electrode on the gate dielectric layer; after the gate electrode is formed, performing a fluorine ion implantation to the substrate at least below the gate dielectric layer; and performing an annealing process in the substrate after the fluorine ion implantation in an atmosphere comprising hydrogen or hydrogen plasma, such that fluorine ions and hydrogen ions are introduced to at least a channel region under the gate electrode; forming a dielectric layer covering the gate electrode; forming one or more contact holes in the dielectric layer; forming a stop layer on a bottom surface and sidewalls of the one or more contact holes; filling the one or more contact holes with a metal layer; planarizing the metal layer until a surface of the metal layer is flushed with a surface of the dielectric layer; and performing an annealing process after forming the stop layer.