Patent ID: 8410854

Claim:
A semiconductor integrated circuit device comprising: a first transistor and a second transistor connected in series, a drain of the first transistor and a drain of the second transistor being commonly connected to a first point; a first load and a second load connected in series between a first input terminal and a first output terminal, a common connection point of the first load and the second load being connected to a gate of the first transistor and a gate of the second transistor, and the first output terminal being connected to the first point; a third transistor and a fourth transistor connected in series, a drain of the third transistor and a drain of the fourth transistor being commonly connected to a second point, and a source of the first transistor and a source of the third transistor being commonly connected to a third point; a third load and a fourth load connected in series between a second input terminal and a second output terminal, a common connection point of the third load and the fourth load being connected to a gate of the third transistor and a gate of the fourth transistor, and the second output terminal being connected to the second point; a fifth transistor connected between the third point and a first power supply; a sixth transistor and a seventh transistor connected in series between the first power supply and a first current source, a source of the sixth transistor being connected to the first power supply, a drain of the seventh transistor and the first current source being commonly connected to a fourth point, and the fourth point being connected to a gate of the sixth transistor and a gate of the fifth transistor; and an eighth transistor, a ninth transistor and a tenth transistor, a source of the eighth transistor being connected to the first power supply, the fourth point being connected to a gate of the eighth transistor, a drain of the ninth transistor and a drain of the tenth transistor being commonly connected to a fifth point, and the fifth point being connected to a gate of the seventh transistor, a gate of the ninth transistor and a gate of the tenth transistor.