Patent ID: 7259609

Claim:
A clamping circuit ensuring that a voltage level at a node is within a specified range, said clamping circuit comprising: a first transistor designed to be turned on when said voltage level is outside of said specified range; a current amplifier drawing a current from said node when said first transistor is turned on, which causes said voltage level at said node to be pulled to within said specified range; a biasing circuit generating a bias signal to a gate terminal of said first transistor, wherein a voltage level of said bias signal is determined by an upper limit or a lower limit of said specified range; and wherein said current amplifier includes: a second transistor and a third transistor, wherein a gate terminal of said third transistor is connected to a drain terminal of said second transistor, a gate terminal of said second transistor receiving a second bias voltage, a source terminal of each said second transistor and said third transistor is connected to ground, said drain terminal of said second transistor is connected to a drain terminal of said first transistor, and a drain terminal of said third transistor is connected to said source terminal of said first transistor.