Patent ID: 7551013

Claim:
A phase interpolation circuit configured to output a phase interpolation signal having a phase between phases of at least two input signals, comprising: an interpolation unit configured to discharge an output node by a first interpolation control signal in case a first input signal of two input signals having different phases is inputted to the interpolation unit when the output node has been precharged to a power supply voltage level, the interpolation unit additionally discharging the output node by a second interpolation control signal in case of input of a second input signal of the two input signals; a comparison unit for comparing a reference voltage level and a voltage level of the output node of the interpolation unit to output a signal corresponding to the comparison; and a short pulse generation unit for generating a short pulse in response to an output signal of the comparison unit if the voltage level of the output signal is not higher than the reference voltage level, wherein the interpolation unit comprises a precharge unit for precharging the output node to a power supply voltage level VDD in case the first input signal or the second input signal is not applied, a first current source unit driven by a first interpolation control signal to discharge the output node when the first input signal is applied, and a second current source unit driven by a second interpolation control signal to discharge the output node when the second input signal is applied, and wherein a sum of a current amount of the first current source and a current amount of the second current source is a uniform amount.