Patent ID: 7202557

Claim:
A semiconductor package, comprising: an electrically conductive pad having a top surface and a bottom surface; a first diode having a first anode and a first cathode opposite of the first anode, the first cathode being mounted and electrically connected to the top surface of the conductive pad; a second diode having a second cathode and a second anode opposite of the second cathode, the second anode being mounted and electrically connected to the top surface of the conductive pad, whereby the first diode and the second diode are electrically connected in series through the conductive pad; a first lead electrically connected to the first anode; a second lead electrically connected to the second cathode; another conductive pad; an insulating body sandwiched between the electrically conductive pad and the another conductive pad; and a MOS-gated switch disposed on the another conductive pad and electrically connected to at least one of the diodes.