Patent ID: 8642459

Claim:
A method for manufacturing a semiconductor device, comprising: providing a semiconductor substrate having a trench with a sidewall isolation, the trench having an upper portion and a lower portion, wherein a field electrode is arranged in the lower portion of the trench; removing the sidewall isolation in the upper portion of the trench above the field electrode; forming a gate dielectric on the laid open sidewall in the upper portion of the trench above the field electrode and the sidewall isolation; forming a gate electrode adjacent to the gate dielectric in the upper portion of the trench above the field electrode and the sidewall isolation, an upper surface of the gate electrode being located at a depth d 1 below the surface of the semiconductor substrate such that the gate dielectric is exposed in the upper portion of the trench, wherein the gate electrode comprises doped polysilicon; performing an implantation after the formation of the gate electrode to provide the upper surface of the gate electrode with a higher doping concentration; removing, subsequent to forming the gate electrode and subsequent to performing the implantation, the gate dielectric above the gate electrode including the exposed portion of the gate dielectric in the upper portion of the trench; and forming, subsequent to removing the gate dielectric, an isolation simultaneously on the gate electrode and the semiconductor substrate such that an absolute value of height difference d 2 between the isolation over the gate electrode and the isolation over the semiconductor substrate is smaller than the depth d 1 .