Patent ID: 7410894

Claim:
A method of forming a semiconductor substrate, comprising: providing a substrate having at least one metal wiring level within the substrate; depositing a first insulative layer on a surface of the substrate; forming a wire bond pad within the first insulative layer; depositing a second insulative layer on the first insulative layer and the wire bond pad; and forming an inductor within the second insulative layer using a patterned plate process, wherein the inductor is formed substantially co-planar with at least a portion of the wire bond pad, wherein forming the inductor further comprises: depositing a liner on the surface of the substrate and on a surface within an at least one opening within the second insulative layer; depositing a seed layer on a surface of the liner; removing a portion of the seed layer from the surface of the substrate, leaving the seed layer within the at least one opening within the second insulative layer; depositing a conductive material within the at least one opening within the second insulative layer, such that the conductive material extends above the surface of the substrate; and planarizing the surface of the substrate to remove excess conductive material extending above the surface of the substrate.