Patent ID: 7420250

Claim:
An electrostatic discharge (ESD) protection device, comprising: a Zener diode region located in a substrate, comprising: a first doped region and a second doped region formed in the substrate, wherein the first doped region and the second doped region are physically connected to a common I/O pad; a first gate disposed between the first doped region and the second doped region, the first gate having a floating potential; and a first and a second light doped drain (LDD) feature formed in the substrate, wherein the first LDD feature is disposed between the first doped region and the first gate and the second LDD feature is disposed between the second doped region and the first gate; and an N-type metal oxide semiconductor (NMOS) device located in the substrate adjacent to the Zener diode region, wherein the Zener diode region and the NMOS device are adapted to protect at least one core device, and wherein the NMOS device comprises: a source and a drain formed in the substrate, wherein one of the source and the drain is coupled to a first voltage source and the other of the source and the drain is coupled to the pad; and a second gate disposed between the source and the drain, wherein the second gate is coupled to the first voltage source.