Patent ID: 8269342

Claim:
A semiconductor package, comprising: at least one semiconductor chip mounted on a substrate; a molding layer adapted to mold the at least one semiconductor chip; a heat slug, on the molding layer, having a structure in which a dielectric is provided between conductors; and a through mold via electrically connecting the heat slug to the substrate, wherein the through mold via includes a first via electrically connecting one of the conductors to the substrate and a second via electrically connecting another one of the conductors to the substrate, wherein the heat slug includes first and second openings, wherein the first opening provides a first space through which the first via is connected to the one of the conductors, but insulated from the another one of the conductors, the first opening penetrating the dielectric and the another one of the conductors, and wherein the second opening provides a second space through which the second via is connected to the another one of the conductors, but insulated from the one of the conductors, the second opening penetrating the dielectric and the one of the conductors.