Patent ID: 6844223

Claim:
A method for fabricating a SOI semiconductor device comprising: forming a surface silicon layer on a semiconductor substrate of a first conductivity type by inserting an insulating layer on the semiconductor substrate; sequentially forming an etch stopper layer and an oxide layer on the surface silicon layer; selectively etching the oxide layer and the etch stopper layer to expose a predetermined portion of the surface silicon layer to be used for an element separating region; forming a trench using the etched oxide layer as a mask to sequentially etch a predetermined thickness of surface silicon layer, insulating layer and semiconductor substrate; sequentially forming an insulating layer to fill the trench and a STI formed in the trench by performing a CMP treatment such that the etch stopper layer is at a predetermined thickness; removing the remaining etch stopper layer; doping a predetermined portion of an inner part of the surface silicon layer by selectively ion-implanting a second-conductivity-type impurity to form a first transistor and simultaneously form a second-conductivity-type well in the semiconductor substrate thereunder; forming a gate electrode by forming a gate insulating layer on the surface silicon layer at the top of the second-conductivity-type well; forming spacers at both lateral walls of the gate electrode; forming first and second grooves by selectively etching the surface silicon layer and insulating layer to expose the surface of the second-conductivity-type well at one side of the gate electrode and that of the semiconductor substrate, both of which are positioned apart at a predetermined distance with the STI being formed therebetween; forming a source/drain region in the surface silicon layer at both edges of the gate electrode by selectively ion-implanting a high density of the first-conductivity-type impurity where a first transistor is formed, the bottom portion of said source/drain region contacting the insulating layer, and forming a first diode diffusion region in the second-conductivity-type well under the first groove; and forming a second diode diffusion region in the semiconductor substrate under the second groove by selectively ion-implanting a high density of the second-conductivity-type impurity into a part to form a second transistor.