Patent ID: 7516366

Claim:
A computer-implemented method for executing nested atomic blocks using split hardware transactions, comprising: initiating execution of an atomic block of code comprising one or more child code sequences nested within a parent code sequence; wherein each of the parent code sequence and the one or more child code sequences comprises code to implement one or more memory accesses targeted to a shared memory space; executing a segment of the parent code sequence using a hardware transaction; pausing execution of the parent code sequence, wherein said pausing comprises terminating the hardware transaction for the parent code sequence; for each of the one or more child code sequences, executing the child code sequence as a respective hardware transaction for the child code sequence; in response to a failure of a hardware transaction for one of the one or more child code sequences, retrying the one of the one or more child code sequences without retrying the parent code sequence, wherein said retrying the one of the one or more child code sequences comprises re-executing the failed hardware transaction for the one of the one or more child code sequences; in response to successful execution of the one or more hardware transactions for the one or more child code sequences, resuming execution of the parent code sequence, wherein said resuming comprises executing another segment of the parent code sequence using another hardware transaction; determining if all values read by the atomic block are consistent with a current state of the shared memory space; and in response to determining that all values read by the atomic block are consistent with the current state of the shared memory space, atomically committing results of execution of the atomic block in the shared memory space.