Patent ID: 7526010

Claim:
A matched filter comprising a first stage and a second stage, the first stage comprising: a first plurality of delay elements arranged in series with one another; N filter taps of which each is disposed immediately preceding or following a delay element of the first plurality of delay elements, each of said N filter taps to remove one of N elements of a first constituent code from an input to the first stage; and a first despread adder having parallel inputs coupled to outputs of each of the N filter taps; the second stage comprising a second plurality of delay elements comprising single-unit delay elements and multi-unit delay elements interspersed among the single-unit delay elements, arranged in series with one another; M filter taps of which each is disposed immediately preceding or following a delay element of the second plurality of delay elements, each of said M filter taps to remove one of M elements of a second constituent code from an input to the second stage; X filter taps each disposed immediately preceding or following a delay element of the second plurality of delay elements, each of said X filter taps to remove one of X elements of a second-level doping code from an input to the second stage; and a second despread adder having parallel inputs coupled to outputs of each of the M filter taps; wherein the input to the first stage is coupled to an output of the second despread adder, and N, M, and X are each integers greater than one.