Patent ID: 7288459

Claim:
A process comprising: in a first region of a board laminate: forming upper and lower first capacitor-access recesses (CARs), the board laminate including a dielectric center film with upper and lower sides; and upper and lower plates on the upper and lower sides, respectively; forming upper and lower films over the respective upper and lower plates; forming a deep upper via in the upper first CAR, a deep lower via in the lower first CAR, wherein the deep upper via exposes the lower plate from the first side and the deep lower via exposes the upper plate from the second side; forming a deep upper contact in the deep upper via and a deep lower contact in the deep lower via; forming an upper first terminal at the deep upper contact and a lower first terminal at the deep lower contact; and in a second region of the board laminate: forming at least one of a power and a signal via.