Patent ID: 7761821

Claim:
A method, performed on a computer system, for migrating an integrated circuit (IC) design layout from a source technology without radical design restrictions (RDR) to a target technology with RDR, the method comprising the steps of: using the computer system to perform the following: legalizing the design layout to meet an RDR grid constraint and fix any ground rule violation in a first direction, wherein the legalizing includes computing a target on-pitch position for each of a plurality of critical shapes with minimum layout perturbation while satisfying the RDR grid constraint, wherein the computing includes generating an edge-weighted graph that models the plurality of critical shapes and a neighborhood relationship thereof, wherein the edge-weighted graph includes nodes that represent critical shapes, and arcs that represent the adjacency between two critical shapes and are weighted with one of a minimum and preferred grid spacing between them, and determining target grid positions of the plurality of critical shapes in a first direction using the edge-weighted graph by placing critical shapes with less slack first, and legalizing the design layout as a linear programming problem by treating the target on-pitch positions of the critical shapes as a set of ground rule space constraints between the plurality of critical shapes and a design layout boundary; inserting required dummy shapes after legalizing the design layout to provide a uniform proximity environment that is accordance with RDR; and running a minimum perturbation analysis in order to address an edge coverage requirement of at least one critical shape and at least one inserted dummy shape and fix any ground rule violation in a second direction.