Patent ID: 8831085

Claim:
An apparatus comprising: a first sigma-delta modulator (SDM) that is configured to receive an in-phase (I) signal; a second SDM that is configured to receive a quadrature (Q) signal; a first pulse width modulator (PWM) that is coupled to the first SDM; a second PWM that is coupled to the second SDM; an interleaver that is coupled to the first and second PWMs that is configured to combine outputs from the first and second PWMs; and a power amplifier (PA) that is coupled to the interleaver, wherein the interleaver further comprises: a first mixer that is configured to receive a first interleaving signal and that is coupled to the first PWM; a second mixer that is configured to receive the a second interleaving signal and that is coupled to the second PWM; and a combiner that is coupled to the first mixer, the second mixer, and the PA wherein the first and second interleaving signals are 90° out-of-phase, wherein the apparatus further comprises: a first repeater that is coupled between the first PWM and the first mixer; and a second repeater that is coupled between the second PWM and the second mixer, wherein the first and second SDMs are configured to receive a first clock signal, and wherein the first and second PWMs are configured to receive a second clock signal, and wherein the first and second repeaters are configured to receive a third clock signal, and wherein the first, second, and third clock signals have first, second, and third frequencies, and wherein the second frequency is twice the first frequency, and wherein the third frequency is twice the second frequency.