Patent ID: 8004311

Claim:
An input/output circuit, comprising: an I/O node connected to a pull up and pull down circuit comprising a pull up transistor and a pull down transistor configured to receive a data input from an I/O pad and to send a data output to the I/O pad; a level shifter configured to provide various voltages including a supply voltage and a high voltage that is at a higher voltage than the supply voltage; and a signal control circuit configured to control a voltage level applied to the pull up and pull down circuit, wherein during a data input mode, data is received at the I/O node from the I/O pad and the pull up transistor is biased at the high voltage and during a data output mode, data is output at the I/O node and the pull down transistor is activated to pull down the I/O node to ground when the output data is low, and the pull up transistor is activated when the output data is high, wherein the signal control circuit is configured to apply a delay when the data input mode is switched to the data output mode to delay a voltage swing at the I/O node from a high level to a low level.