Patent ID: 7085898

Claim:
A method for maintaining cache coherency in a symmetrical multiprocessing environment, comprising: providing a plurality of nodes each being able to communicate with each other via a ring based topology comprising one or more communication paths between each of said plurality of nodes, each of said plurality of nodes comprising a plurality of processors, cache memory, a plurality of I/O adapters, a plurality of local and remote controllers to perform cache coherent actions, and a main memory accessible from each of said plurality of nodes; establishing and maintaining Intervention Master (IM) and Memory Master (MM) system level coherency points that permit memory and caches within each of said plurality of nodes to act as a single cohesive system image; establishing an Intervention Master (IM) cache ownership state and a Multi-Copy (MC) cache ownership state for data within said symmetrical multiprocessing environment; using said Intervention Master (IM) cache ownership state and said Multi-Copy (MC) cache ownership state with other cache states, such as, Exclusive, Read-Only and Invalid to maintain coherency in the symmetrical multiprocessing environment; determining a location on one of said plurality of nodes to source data therefrom, said location being based on said system level coherency points coupled with local cache states of at least one of said plurality of nodes; and receiving an incoming message via said ring based topology and merging an incoming message response with an outgoing message response to provide a merged response.