Patent ID: 7416969

Claim:
A process for the production of a void-free semiconductor wafer for the electronics industry through a rotatably indexed sequence of isolated, pressure controlled chambers in a wafer processing apparatus cycling between a vacuum and a controlled ambient pressure, comprising the steps of: applying a solder paste through a photoresist film mask to a semiconductor wafer which is to be processed by said apparatus placing said wafer in a chamber and purging said chamber with nitrogen and applying a vacuum to said chamber; heating said wafer in a reflow furnace to a temperature below the melting point of solder under a vacuum in a successive chamber of said apparatus; heating said wafer in a reflow furnace with a controlled formic acid vapor ambient for a second reflow to remove surface oxides from said wafer and to form said solder into final metal solder bumps in a final chamber; and cooling said wafer in a further chamber to harden said solder.