Patent ID: 7256647

Claim:
A method of testing an electronic assembly having an amplifier on an integrated circuit chip of the assembly, the method comprising the steps of: a) applying a predetermined test voltage to a path of the electronic assembly, wherein circuitry of the amplifier is operable to produce a voltage on an output node of the amplifier and a self-bias voltage on a self-bias node of the amplifier responsive to voltages applied to differential input nodes of the amplifier, and wherein the applied test voltage is for testing conduction of the path, including conduction to one of the differential input nodes; and b) forcing an initializing voltage on the self-bias node by preset circuitry, wherein if the amplifier tends to produce an equilibrium voltage on the self-bias node responsive to the applied test voltage, the initializing voltage overrides the equilibrium voltage, so that the amplifier produces an initial voltage on the output node in response to the initializing voltage on the self-bias node and independently of the applied test voltage.