Patent ID: 8681567

Claim:
A device comprising: an amplifier including a first input terminal supplied with a reference voltage, a second input terminal supplied with a feed back voltage, and an output terminal; first and second power supply lines, the first power supply being higher than the second power supply line; an internal node; a first transistor including a source-drain path coupled between the first power supply line and the internal node and including a gate terminal supplied with a bias voltage; a second transistor including a source-drain path coupled between the internal node and the second power supply line and including a gate terminal coupled to the output terminal of the amplifier; an output node; a third transistor including a source-drain path coupled between the first power supply line and the output node and including a gate terminal coupled to the internal node; a divider coupled between the output node and the second power supply line and configured to produce a first discharge path from the output node to the second power supply line to establish the feed back voltage; and a first switch circuit supplied with a first signal and coupled between the output node and the internal node.