Patent ID: 8525226

Claim:
A field effect transistor comprising: a channel; a gate to the channel; and a barrier located between the gate and the channel, wherein the barrier is configured to decrease a gate-to-channel capacitance of the transistor as an operating frequency of the transistor increases such that a corresponding threshold voltage of the transistor increases as the operating frequency of the transistor increases, and wherein the barrier includes: a first barrier layer formed of a nitride material having a first resistance and a first capacitance, wherein the first barrier layer is located directly on the channel; and a second barrier layer comprising a layer of non-dielectric conducting material, the second barrier layer having a second resistance and a second capacitance, wherein the second barrier layer is located on the first barrier layer and the gate is located directly on the second barrier layer, wherein, at an operating frequency above a minimal operating frequency, the first resistance is at least ten times larger than the second resistance, wherein, at an operating frequency above the minimal operating frequency, the first capacitance is at least two times larger than the second capacitance, and wherein a product of the second resistance and the second capacitance is larger than an inverse of an operating frequency of the transistor above the minimal operating frequency.