Patent ID: 8743599

Claim:
A method of fabricating a memory device with different programming performance and retention characteristics on a single wafer, the method comprising: depositing a first bounded area of phase change material on the wafer; depositing a second bounded area of phase change material on the wafer; modifying the chemical composition of a switching volume of the first bounded area of phase change material, the switching volume of phase change material is a volume of phase change material configured to change between amorphous and crystalline phases during operation of the memory device; and forming a first memory cell in the first bounded area of phase change material with a modified switching volume of phase change material and a second memory cell in the second bounded area of phase change material with an unmodified switching volume of phase change material such that the first memory cell has a first retention property and a first write speed and the second memory cell has a second retention property and a second write speed, wherein the first retention property is different from the second retention property and the first write speed is different from the second write speed; and wherein modifying the chemical composition of the switching volume includes etching side walls of the first bounded area of phase change material and side walls of the second bounded area of phase change material.