Patent ID: 7655980

Claim:
A device for an ESD protection circuit, comprising at least one LDMOS device, wherein the LDMOS device comprises: a substrate of a first conductivity type, comprising a first area and a second area; a deep well region of a second conductivity type, disposed in the first area and the second area of the substrate; a gate electrode, disposed on the substrate between the first area and the second area; an implanted region of the first conductivity type, disposed in the first area of the substrate; a grade region of the second conductivity type, disposed in the deep well region of the first area; a first doped region of the second conductivity type, disposed in the grade region; a body region of the first conductivity type, disposed in the deep well region of the second area; a second doped region of the second conductivity type, disposed in the body region; and a doped region of the first conductivity type, disposed in the body region and adjacent to the second doped region.