Patent ID: 7825693

Claim:
A semiconductor chip comprising: a reference circuit comprising: a first p-channel field effect transistor (PFET); a first n-channel field effect transistor (NFET); a body control node connected to a drain of the first PFET, a drain of the first NFET, a body of the first PFET and a body of the first NFET; and a reference voltage connected to a gate of the first PFET and to a gate of the first NFET; and a target circuit comprising: a second PFET comprising a body connected to the body control node; a second NFET comprising a body connected to the body control node; an input connected to a gate of the second PFET and to a gate of the second NFET; and an output connected to a drain of the second PFET and to a drain of the second NFET.