Patent ID: 7811922

Claim:
A method for manufacturing a semiconductor device, comprising: preparing a wiring board having a base substrate and wiring on the base substrate, the wiring being plated on surface with a plating metal; pressing a bump formed on an active side of a semiconductor chip against an end part of the wiring of the wiring board so as to exfoliate a region around a portion of the wiring pressed by the bump while having end of the wiring kept bonded with the base substrate; melting the plating metal that is located on the end part of the wiring so as to form an alloy of the plating metal and the bump so as to bond the bump and the wiring, and infiltrating the plating metal into a space between the wiring and the base substrate; and judging that the bump and the wiring are well bonded if the plating metal that has infiltrated into the space between the wiring and the base substrate has an area, a width or a length of infiltration that satisfies or surpasses a reference level.