Patent ID: 8072070

Claim:
A chip comprising: a silicon substrate; a dielectric layer over said silicon substrate; an aluminum pad over said dielectric layer; a topmost insulating layer of said chip over said dielectric layer, wherein an opening in said topmost insulating layer of said chip is over said aluminum pad, wherein said topmost insulating layer of said chip is a polymer layer; and a metal bump on said aluminum pad and on a first top surface of said topmost insulating layer of said chip, wherein said metal bump comprises a metal layer on said aluminum pad, in said opening and on said first top surface, a copper pillar on said metal layer, over said aluminum pad and over said first top surface, and a solder over said copper pillar, over said opening and over said first top surface, wherein said solder is connected to said copper pillar, wherein said copper pillar has a thickness between 10 and 100 micrometers, wherein said copper pillar has a second top surface higher than said first top surface and has a sidewall with a portion not covered by said solder.