Patent ID: 7136985

Claim:
A method of accessing misaligned memory cells contained within two memory locations in a memory array, the method comprising the steps of: (a) receiving address and control information; (b) determining an offset between the misaligned memory cells based on the received address and control information; (c) enabling a first subset of the misaligned memory cells based on the received address information and the offset, the first subset of the misaligned memory cells contained within a first memory location; (d) enabling a second subset of the misaligned memory cells based on the received address information and the offset, the second subset of the misaligned memory cells contained within a second memory location; (e) reading a first data portion from the first subset of the misaligned memory cells and reading a second data portion from the second subset of the misaligned memory cells; (f) storing the first data portion and the second data portion in a buffer; and (g) circularly shifting the first data portion and the second data portion in the buffer to align data in the misaligned data cells; wherein the steps (a) to (g) are performed in a single memory access cycle.