Patent ID: 8492836

Claim:
A power semiconductor device, comprising: a semiconductor substrate of a first conductivity type; a drift layer of the first conductivity type formed on a first main surface side of said semiconductor substrate; a cell region formed in a part of a surface layer of said drift layer and comprising a plurality of unit cells; a gate insulating film formed on said cell region; a well region of a second conductivity type different from the first conductivity type formed apart from said cell region on an outside of said cell region; a field oxide film formed on said well region; a gate electrode formed over said well region and over said cell region, wherein said field oxide is thicker than said gate insulating film under an entire portion of said gate electrode which is over said well region; a source pad, which electrically connects said cell region and said well region through a source contact hole formed on said cell region, and a well contact hole formed on said well region; and a drain electrode provided on a second main surface side opposite to said first main surface of said semiconductor substrate.