Patent ID: 7538708

Claim:
A method of testing signals with a PTIC (parallel, time-interleaved converter) that includes M ADCs (analog-to-digital converters) each clocked at a rate F S and time-interleaved to provide an overall sampling rate of MF S , the method comprising: (A) stimulating a UUT (unit under test) to produce an SUT (signal under test) having at least one test requirement; (B) applying the SUT to a PTIC; (C) acquiring a series of samples of the SUT by each of the M ADCs of the PTIC; (D) performing a DFT (Discrete Fourier Transform) on each series of samples to yield M DFTs; (E) sorting the DFT elements from the M DFTs into a plurality of groups according to bin number, wherein each group of the plurality of groups includes M DFT elements each corresponding to the same bin number, (F) for each group of the plurality of groups, (F1) determining whether correction for that group is desired; (F2) if it is, processing each group with a collection of correction factors to produce M corrected DFT terms; (F3) if it is not, generating M uncorrected DFT terms; (G) placing corrected and uncorrected DFT elements together to form a reconstructed spectrum of the SUT; (H) analyzing the reconstructed spectrum to determine whether the UUT meets the at least one test requirement; and (I) passing, failing, or grading the UUT responsive to the determination of Step H.