Patent ID: 7977246

Claim:
A method of fabricating an integrated circuit on a semiconductor wafer, comprising: forming a thin film device structure on the wafer including semiconductor elements; covering said thin film device structure with a doped glass layer comprising silicon, oxygen and at least one of boron or phosphorus; forming openings through said doped glass layer to expose a surface of each of said semiconductor elements; performing an etch step by generating a plasma from a process gas comprising fluorine species and hydrogen species and exposing said wafer to by-products of said plasma; preventing exposure of said wafer to water vapor or moisture-containing atmosphere while performing the following: (a) heating said wafer to a sufficiently high temperature for a sufficient duration of time to thermally diffuse boron and/or phosphorus materials separated from silicon near the surface of said doped glass layer into the bulk of said doped glass layer; and (b) cooling said wafer to a sufficiently low temperature to fix the distribution of the boron and/or phosphorus materials in bulk of said doped glass layer.