Patent ID: 6839055

Claim:
A computer system with an all-digital display system, the display system having on-board testing of digital display data, comprising: a system processor; a system memory operably coupled to the system processor; a video controller; a digital display system; a data interface, operable to couple the video controller directly to the digital display system, the data interface including a first link for delivering digital display data to the digital display system and a second link that substantially conforms to the Display Data Channel standard; wherein the digital display system has at least: a receiver for receiving the digital display data directly from the video controller via the first link; a display for displaying images as per the digital display data received via the first link; an error detection circuit for receiving the digital display data directly intercepted from a data path from the receiver to the display, and for generating a checksum from the digital display data, thereby providing an error indication of the digital display data; and an interface circuit for providing the error indication to the video controller via the second link.