Patent ID: 8174074

Claim:
A method for fabricating a semiconductor device, the method comprising: forming a gate stack on an active region of a silicon-on-insulator substrate; forming a gate spacer over the gate stack; forming a first trench in a first portion of a semiconductor layer comprising the active region extending away from a first side of the gate spacer and a second trench in a second portion of the semiconductor layer extending away from a second side of the gate spacer; epitaxially growing silicon germanium within the first trench and the second trench; performing, after epitaxially growing the silicon germanium, a vertical implantation process, wherein performing the vertical implantation process defines a source region in the silicon germanium grown in the first trench, a drain region in the silicon germanium grown in the second trench, and a device channel; and asymmetrically implanting an amorphizing species within the silicon germanium grown in the first trench comprising the source region relative to the silicon germanium grown in the second trench comprising the drain region, wherein the asymmetrically implanting forms an implantation region in the source region that extends into the silicon germanium and which is asymmetrical relative to the drain region, and wherein the asymmetrically implanting further comprises: forming the angled implantation region of the source region at least partially under the gate spacer and without contacting the device channel.