Patent ID: 8536907

Claim:
A power on reset signal generating apparatus, comprising: a trigger capacitor, one end of the trigger capacitor coupled to a ground voltage, the other end of the trigger capacitor coupled to a signal generating end, a power on reset signal is generated at the signal generating end; a reference current supplying circuit, coupled to the signal generating end, and the reference current applying circuit supplying a reference current to the signal generating end, wherein the reference current supplying circuit comprises: a current source, comprises at least a transistor; a first current mirror, an input terminal of the first current mirror coupled to the current source, and the first current mirror mirroring the current supplied by the current source to generate a first current at the end of an output terminal of the current mirror; and a second current mirror, coupled to the first current mirror, and the second current mirror receiving and mirroring the first current to generate the reference current, wherein, the drain end of the transistor and the source end of the transistor are connected to a power voltage and the first current mirror respectively, and the gate end of the transistor is coupled to the ground voltage; and a current regulator, coupled to the signal generating end, and a splitting current flowing from the signal generating end into the current regulator for adjusting the value of the current received by the trigger capacitor.