Patent ID: 7902082

Claim:
A method of forming an integrated circuit device, comprising: forming a field effect transistor on a semiconductor substrate, said forming a field effect transistor comprising: forming a gate electrode on the semiconductor substrate; forming oxide spacers on opposing sidewalls of the gate electrode; forming an adhesive oxide film on the oxide spacers, wherein the adhesive oxide film directly contacts a surface of the semiconductor substrate; forming sacrificial nitride spacers on the adhesive oxide film, said sacrificial nitride spacers extending opposite the opposing sidewalls of the gate electrode; and forming source/drain regions, which are self-aligned to the sacrificial nitride spacers, in the semiconductor substrate; forming a blocking oxide film on the sacrificial nitride spacers; and selectively etching the blocking oxide film using a diluted hydrofluoric acid solution having a nitride-to-oxide etching selectivity less than one; selectively removing the sacrificial nitride spacers using a diluted hydrofluoric acid solution having a nitride-to-oxide etching selectivity in excess of one, to thereby expose the adhesive oxide film; forming a stress-inducing electrically insulating layer that is configured to induce a net tensile or compressive stress in a channel region of the field effect transistor, on the opposing sidewalls of the gate electrode; and selectively removing a portion of the stress-inducing electrically insulating layer using a diluted hydrofluoric acid solution having a nitride-to-oxide etching selectivity in excess of one.