Patent ID: 8595443

Claim:
A method of data processing in a processor, said method comprising: the processor maintaining, in each of a plurality of stream registers, information describing attributes of an associated one of a plurality of sequential data streams, wherein the information in each of the plurality of stream registers includes: a stride indicating a monotonically changing address sequence employed to generate target addresses of data prefetch requests in the associated one of the plurality of sequential data streams; a usage history indicating, for the associated one of the plurality of sequential data streams, demand usage of prefetched data in the associated one of the plurality of sequential data streams that was retrieved into cache memory; the processor sequentially generating a plurality of data prefetch requests in a particular sequential data stream among the plurality of data streams, wherein the generating includes: determining target addresses of the plurality of data prefetch requests by reference to the stride of a particular stream register among the plurality of stream registers that is associated with the particular sequential data stream; the processor selecting a respective non-zero amount of data to be prefetched by each of the plurality of data prefetch requests based upon the usage history of the particular sequential data stream, wherein the selecting includes selecting, for a data prefetch request among the plurality of data prefetch requests, a greater first amount of data from a target cache line of the data prefetch request in response to the usage history of the particular sequential data stream indicating a pattern of demand usage of more than a given amount of data in one or more other cache lines prefetched by one or more of the plurality of data prefetch requests preceding the data prefetch request and otherwise selecting a lesser second amount of data from the target cache line; and the processor transmitting the plurality of data prefetch requests to a memory hierarchy to prefetch the selected amount of data from each target cache line into cache memory.