Patent ID: 7434100

Claim:
A host system, comprising: a processor of a host system; memory of the host system coupled to the processor of the host system; means for establishing a connection between the memory of the host system and memory of a target computer; means for running an operating system that enables and uses a paged memory management; means for locating physical memory data of the host system, which are conventionally used by a kernel of the target computer for debugging, wherein the kernel adds a map of a page for debugging; means for transferring address data from memory of the target computer to the memory of the host system; means for replicating virtual memory addresses from the address data in the memory of the host system; means for validating address data, wherein the address data is valid, perform a translation; means for translating address data from memory of the host system, wherein the address data have been locked; and wherein the virtual memory data in the host system are identical to virtual memory data of the target computer.