Patent ID: 8583971

Claim:
A device comprising: a first in, first out (FIFO) queue comprising a plurality of storage locations to store data, each of the plurality of storage locations including a first portion to store a corresponding entry of the FIFO queue and a second portion to store a signature value used for error detection, a write operation to the FIFO queue causing the signature value, of a first plurality of signature values, to be stored in the second portion of one of the storage locations, the first plurality of signature values being derived from a pointer signal associated with the write operation to the FIFO queue; a first register coupled to the plurality of storage locations and storing a second plurality of signature values, read operations to the FIFO queue causing a value corresponding to the signature value, stored in the second portion of a second one of the storage locations, to be written to the first register; and a comparator to compare the first plurality of signature values to the second plurality of signature values, and to output an error signal when the first plurality of signature values do not match the second plurality of signature values.