Patent ID: 7442626

Claim:
A method for fabricating a fuse element for a semiconductor device, comprising the steps of: providing a substrate having at least one dielectric layer formed thereon; forming a polysilicon layer on said dielectric layer; forming a contact layer on said polysilicon layer, said contact layer defining one or more contacts on said polysilicon layer; and forming a first metal line and a second metal line from at least one metal layer on said contact layer, said first metal line contacting a first portion of at least one of said contacts to form a first interface, said second metal line contacting a second portion of said one of said contacts to form a second interface, wherein an area of at least one of said first and said second interfaces is sufficiently small so that said one interface has a fuse current lower than a fuse current of any other portion of said fuse element, and wherein an area of said first interface is smaller than an area of said second interface.