Patent ID: 8156287

Claim:
A method of operating a data processing system having a processor, a unit that includes a first level cache and additional n levels of cache, a prefetch system and a memory, n being an integer greater than or equal to 0, the unit being operable to store lines of data in the first level cache, the first level cache being operable to store an integer w lines of data, the memory being operable to store an integer z lines of data, the unit being operable to store lines of data in the additional n levels of cache, each of additional 1:n levels of cache being operable to store integer x 1:n lines of data, respectively, w<x 1 < . . . <x x-1 <x n <z, the processor being operable to access a line of data in the first level cache within a time t f , the processor being operable to access a line of data in each of the additional 1:n levels of cache within time t 1:n , respectively, t 0 <t 1 < . . . <t n-1 <t n , the processor being operable to access a line of data in the memory within a time t m , t f <t 1 < . . . <t n-1 <t n <t m , the prefetch system being operable to retrieve up to y n lines of data from the memory and to store the up to y n lines of data in the n level cache, the prefetch system being operable to retrieve up to y f lines of data from one of the memory and 1:n levels of cache and to store the up to y f lines of data in the first level cache, said method comprising: running the data processing system in a first mode; determining whether a second mode is required; and running the data processing system in the second mode, wherein in the first mode, the prefetch system is enabled to: retrieve y f lines of data from one of the memory and the 1:n level caches and to store the y f lines of data in the first level cache, retrieve y n lines of data from the memory and store the y n lines of data in the n level cache, and enable store prefetching via stream filtering, wherein the second mode is at least one of a low-power mode or a medium-power mode, wherein in the low-power mode the prefetch system is enabled to: retrieve b lines of data from one of the memory and the 1:n level caches and store the b lines of data in the first level cache, wherein b<y f , retrieve a lines of data from the memory and store the a lines of data in the n level cache, wherein a<y n , and disable store prefetching via stream filtering thereby reducing power consumption by the data processing system, and wherein in the medium-power mode the prefetch system is enabled to: disable prefetching into the first level cache, retrieve the a lines of data from the memory and store the a lines of data in the n level cache, wherein a<y n , and disable store prefetching via stream filtering thereby reducing power consumption by the data processing system.