Patent ID: 8835894

Claim:
A resistive memory structure comprising: a plurality of memory cells each including: a first coplanar structure comprising a lower electrode extending in a first direction having a first lower sub-electrode and a second lower sub-electrode, the first and second lower sub-electrodes being electrically separated from each other in a second direction orthogonal to said first direction, each of said first and second lower sub-electrodes being parallel and electrically disconnected by first and second dielectric components at opposite ends respectively and wherein said first and second dielectric components are arranged diagonally with respect to each other; a second coplanar structure comprising an upper electrode extending in said second direction having a first upper sub-electrode and a second upper sub-electrode, said first and second upper sub-electrodes being electrically separated from each other in said first direction, each of said first and second upper sub-electrodes being parallel and electrically disconnected by third and fourth dielectric components at opposite ends respectively and wherein said third and fourth dielectric components are arranged diagonally with respect to each other; a coplanar resistive layer formed between said first and second coplanar structures to enable intersections of said first and second upper sub-electrodes and said first and second lower sub-electrodes to function as four sub-memory cells.