Patent ID: 7763528

Claim:
A method for manufacturing a semiconductor device, comprising: forming conductive traces and posts on a plurality of chip areas of a semiconductor wafer having the plurality of chip areas and boundary regions formed among the chip areas, the chip areas and the boundary regions both being provided in a surface of the semiconductor wafer; forming a surface-side protective member so as to cover the surface of the semiconductor wafer and upper and side surfaces of the conductive traces and posts; removing the semiconductor wafer corresponding to the boundary regions and forming trenches which expose the surface-side protective member; forming a back-side protective member with which the trenches are filled and which covers a back of the semiconductor wafer; solidifying the back-side protective member by cooling while the surface-side protective member covers the surface of the semiconductor wafer and the upper and side surfaces of the conductive traces and posts; and dividing the semiconductor wafer by cutting at the boundary regions, the cuts having width thinner than a width of the trenches so that the surface-side protective member and the back-side protective member charged into the trenches are left at cut sections of the semiconductor wafer.