Patent ID: 7199626

Claim:
A method for simplifying a delay-locked loop device comprising following steps: (a) reversing phases outputted from delay units of a voltage control delay circuit in the delay-locked loop device; (b) transmitting the reversed phases in step (a) to shift registers in a first shift register set corresponding to the delay units of the voltage control delay circuit to generate a first sequence of comparison signals according to a first divided phase and inverse phases of phases outputted from the delay units of the voltage control delay circuit; (c) removing a plurality of shift registers in the first shift register set corresponding to a plurality of delay units of initial stages of the voltage control delay circuit according to a default requirement; and (d) removing shift registers in a second shift register set corresponding to the removed shift registers in the first shift register set to generate a second sequence of comparison signals according to a second divided phase and the first sequence of the comparison signals.