Patent ID: 6946399

Claim:
A method for manufacturing an integrated circuit comprising: selecting a wafer having an active surface and a backside surface; subjecting said active surface of said wafer to at least one of a plurality of processes selected from a group including thermal oxidation, deposition, patterning, doping, planarization, and etching processes; cleaning said wafer before said at least one of a plurality of processes, further comprising: placing said wafer on an approximately horizontal, rotatable support; rotating said wafer; applying a vapor phase to said active surface at a first temperature; while applying said vapor phase, applying a liquid to said backside surface at a second temperature lower than said first temperature, such that said vapor phase condenses on said active surface forming a condensate layer; placing a portion of an elongated member, said elongated member having a distal end and a proximal end, in contact with said condensate layer, said portion of said elongated member being approximately parallel to said active surface but not touching said active surface, such that said distal end is placed over said active surface and said proximal end is placed outside a rotating perimeter of said wafer; introducing vibration into said proximal end to aid removal of particles from said active surface, wherein said vibration is transmitted through said elongated member to said condensate layer.