Patent ID: 8796733

Claim:
A tunnel field-effect transistor comprising: a p-n tunnel junction comprising: a source-layer comprising a source-tunneling-region; a drain-layer comprising a drain-tunneling-region and underneath the drain-layer an air-bridge that substantially restricts electrical conduction between the drain-layer and the source-layer through the drain-tunneling-region and the source-tunneling-region; and a depletion region formed at the interface of the source-tunneling-region and drain-tunneling-region in which the depletion region exhibits an internal electric field that substantially points between the source-tunneling-region and drain-tunneling-region when no external electric field is imposed; a gate-dielectric interfaced onto the drain-tunneling-region such that the drain-tunneling-region is immediately between the source-tunneling-region and the gate-dielectric; a gate interfaced onto the gate-dielectric wherein the gate is configured to impose an external electric field which is oriented substantially in parallel to the internal electric field of the depletion region; a source-contact coupled to the source-layer; and a drain-contact coupled to the drain-layer.