Patent ID: 8778768

Claim:
A method of forming a semiconductor structure comprising: forming an alternating stack of a first semiconductor material and a second semiconductor material on a substrate; patterning said alternating stack to form a patterned stack including a nanowire-including region, a first pad region adjoining said nanowire-including region, and a second pad region adjoining said nanowire-including region and spaced from said first pad region, wherein said first pad region comprises first semiconductor material pad portions; removing said second semiconductor material selective to said first semiconductor material, wherein said nanowire-including region includes semiconductor nanowires containing said first semiconductor material and suspended between said first pad region and said second pad region, and does not include said second semiconductor material, and said first and second pad regions include second semiconductor material pad portions having sidewalls that are laterally recessed from sidewalls of said first semiconductor material pad portions; forming a gate electrode structure straddling said semiconductor nanowires; forming a gate spacer around said gate electrode structure; removing portions of said first and second semiconductor material by an etch process employing a combination of said gate spacer and said gate electrode structure as an etch mask; and forming a source region and a drain region by depositing a semiconductor material on physically exposed end surfaces of remaining portions of said semiconductor nanowire.