Patent ID: 6989572

Claim:
A high frequency integrated circuit structure comprising: a body of semiconductor material having a plurality of isolated active regions, and comprising a first conductivity type; internal circuitry formed in a first active region; a second active region comprising a buried layer of a second conductivity type formed over the body of semiconductor material and a first semiconductor layer of the second conductivity type formed over the buried layer, wherein the first semiconductor layer has a lower dopant concentration than the buried layer; a first silicon controlled rectifier device formed in the second active region, the first silicon controlled rectifier device comprising a first well region of the first conductivity type formed in the first semiconductor layer, a first doped region of the first conductivity type formed in the first well region, the buried layer, a second well region of the first conductivity type formed in the first semiconductor layer and spaced apart from the first well region, and a second doped region of the second conductivity type formed in the second well region; and a second silicon controlled rectifier device comprising the second well region, a third doped region of the first conductivity type formed in the second well region, the buried layer, the first well region, and a fourth doped region of the second conductivity type formed in the first well region, wherein the first and second silicon controlled rectifier devices are coupled to the internal circuitry and form an ESD structure for protecting the internal circuitry against positive and negative ESD stresses.