Patent ID: 7151295

Claim:
A non-volatile semiconductor memory device, comprising: a semiconductor substrate having device formation regions defined by device isolation trenches; a first gate insulator film formed over said device formation regions; a floating gate formed on said first gate insulator film; a first device-isolation insulator film formed in said device isolation trenches and having recesses thereon; a second device-isolation insulator film formed in said recesses; a second gate insulator film formed over a surface of said floating gate and said first and second device-isolation insulator films; and a control gate formed above said floating gate and said first and second device-isolation insulator films via said second gate insulator film, wherein the uppermost portions at both ends of said first device-isolation insulator film are located higher than the uppermost portions at both ends of said second device-isolation insulator film, wherein said second device-isolation insulator film is higher in etching rate than said first device-isolation insulator film under a certain etching condition.