Patent ID: 8417896

Claim:
A semiconductor memory system, comprising: a flash memory including a plurality of memory chips each including a plurality of blocks that can be deleted on a block basis and a plurality of pages obtained by dividing each block into a plurality of areas to store data; and a memory controller configured to: control a write request to the plurality of memory chips on a page basis on the basis of a first logical address included in the write request; manage snapshot information indicating whether a non-latest data is to be saved; store data into a second page in response to receiving a write request to the first logical address when a first physical address of a first page is related to the first logical address; manage the data stored in the first page that is to be deleted in a deletion process, when the snapshot information indicates that the non-latest data is not to be saved; and manage the data stored in the first page that is to be copied to a third page before the deletion process, when the snapshot information indicates that the non-latest data is to be saved.