Patent ID: 7378321

Claim:
A method for patterning a semiconductor component, comprising the steps of: providing at least one gate stack on a semiconductor component; applying a first cover layer to a first region and a second region of the semiconductor component being arranged in a semiconductor substrate; said first region being adjacent to one side of said gate stack and said second region being adjacent to an opposite side of said gate stack; patterning said first cover layer using a photolithographic mask so that said first region is uncovered and said second region remains covered by said first cover layer; implanting a dopant material at a first angle into the semiconductor component in said uncovered first region; applying a second cover layer to said uncovered first region; removing said first cover layer by means of a selective etching process so that said second region is uncovered; and implanting a dopant material at a second angle into the semiconductor component in said uncovered second region, the first angle and the second angle being different.