Patent ID: 7378344

Claim:
A method of manufacturing a semiconductor device comprising: forming a silicide layer having an NiSi phase on source and drain regions in a semiconductor substrate, where the junction depth of the source and drain regions is from 20 nm to 60 nm below the lower surface of the silicide layer; and after the formation of the silicide layer having the NiSi phase, performing manufacturing steps at a temperature not exceeding a critical temperature Tc, which meets the following expression: Tc = a × Dj + b , ⁢ where a = 6.11 ⁢ ( 20 < Dj ≤ 26 ) = 1.60 ⁢ ( 26 < Dj ≤ 60 ) , ⁢ b = 290.74 ⁢ ( 20 < Dj ≤ 26 ) = 408 ⁢ ( 26 < Dj ≤ 60 ) , Dj is a junction depth (nm) measured from the lower surface of the silicide layer, and Tc is a critical temperature (° C.) during a heat treatment.