Patent ID: 7704877

Claim:
A method of manufacturing a semiconductor device comprising: forming a recess, which serves as an interconnect trench or a via hole, in an insulating film to be processed formed over a semiconductor substrate by stacking an anti-reflective film and an upper resist film in this order over said insulating film to be processed, and forming an opening in said upper resist film by lithographic exposure through a mask having a predetermined pattern and development, etching said anti-reflective film through said upper resist film used as a mask, using a first etching gas containing a fluorine-base gas, and transferring a pattern formed in said anti-reflective film to said insulating film to be processed; and repeating said forming the recess to a plurality of said insulating films, so as to form recesses of different patterns respectively to said plurality of said insulating films, to thereby form a multi-layer structure; wherein in said etching said anti-reflective film in each of said forming the recess, a value of one etching condition correlative to a dimensional shift Δ(L 2 −L 1 ), where L 1 is a width of said opening in said upper resist film obtained in said forming the opening in said upper resist film and L 2 is a width of a recess formed in said insulating film in said transferring the pattern, is varied with respect to the aperture ratio of an opening formed in said upper resist film so as to reduce said dimensional shift Δ(L 2 −L 1 ) as said aperture ratio of said opening increases.