Patent ID: 7836386

Claim:
A method of adjusting a first phase shift between a data signal and a clock signal at a sending device, the method comprising: a) transmitting a first test signal representing first test data from the sending device to a receiving device via a first data line and transmitting second test signals representing second test data from the sending device to the receiving device via second data lines, wherein the first phase shift exists between the first test signal and the clock signal, and wherein second phase shifts exists between the second test signals and the clock signal; b) receiving the first test signal and the second test signals at the receiving device; c) detecting first received data from the first received signal and second received data from the second received signals using a clock signal; d) calculating an error detection code from one of the first received data and the first and second received data, and transmitting the error detection code from the receiving device to the sending device; e) calculating estimated first received data from the error detection code, wherein the estimated first received data are calculated under the assumption that the second received data are identical to the second test data; and f) adjusting the first phase shift on the basis of a comparison of the estimated first received data and the first test data.