Patent ID: 8078842

Claim:
An electronic device, comprising: a processor configured to directly execute at least some bytecodes in an instruction set of the processor, the processor comprising: decode logic; a vector table comprising a plurality of entries, wherein each entry of the plurality of entries corresponds to a bytecode in the instruction set and each entry comprises: a first field for indicating whether a micro-sequence is to be executed instead of the corresponding bytecode; and a second field for storing a reference to the micro-sequence; and an instruction memory configured to store micro-sequences referenced by the entries in the vector table; and a memory externally coupled to the processor, wherein the memory is configured to store a group of instructions that is to be executed instead of a bytecode, wherein the decode logic is configured to: use a bytecode to locate an entry of the vector table corresponding to the bytecode; and cause a micro-sequence referenced in the second field of the entry to be executed when the first field of the entry indicates that a micro-sequence is to be executed instead of the bytecode, wherein, when executed, the micro-sequence causes the processor to execute the group of instructions.