Patent ID: 7141869

Claim:
A semiconductor device package comprising: (a) at least one semiconductor die, said semiconductor die having a front side defining a sealing area, said semiconductor die having a first solder sealing ring pad formed on said front side; (b) a substrate coupled to said semiconductor die, said substrate having a front surface opposing said front side of said semiconductor die, said substrate having a second solder sealing ring pad formed on said front surface; and, (c) a solder sealing ring structure sandwiched between said first and second solder sealing pads of said substrate and semiconductor die, said solder sealing ring structure extending peripherally about a substantial portion of said sealing area to substantially enclose thereat a cavity captured between said semiconductor die and said substrate, said cavity directly interfacing said semiconductor die, said solder sealing ring structure including at least one venting portion defining an air vent against at least one of said substrate and semiconductor die, said air vent being in open communication with said cavity.