Patent ID: 7558108

Claim:
A method of operating an array of nitride read-only-memory (NROM) cells, comprising: storing a first charge in a first charge trapping region of a first NROM cell; selecting the first charge such that a threshold voltage associated with the first charge trapping region of the first NROM cell exhibits one of three predetermined threshold voltages; storing a second charge in a second charge trapping region of the first NROM cell; selecting the second charge such that a threshold voltage associated with the second charge trapping region of the second NROM cell exhibits one of three predetermined threshold voltages; identifying the threshold voltage associated with the first charge trapping region of the first NROM cell; identifying the threshold voltage associated with the first charge trapping region of the second NROM cell; decoding the identified threshold voltages associated with the first charge trapping regions of the first and second NROM cells to create three bits of binary data; storing a third charge in a second charge trapping region of the first NROM cell; selecting the third charge such that a threshold voltage associated with the second charge trapping region of the first NROM cell exhibits one of three predetermined threshold voltages; storing a fourth charge in a second charge trapping region of the second NROM cell; selecting the fourth charge such that a threshold voltage associated with the second charge trapping region of the second NROM cell exhibits one of three predetermined threshold voltages; identifying the threshold voltage associated with the second charge trapping region of the first NROM cell; identifying the threshold voltage associated with the second charge trapping region of the second NROM cell; and decoding the identified threshold voltages associated with the second charge trapping regions of the first and second NROM cells to create three bits of binary data.