Patent ID: 8470664

Claim:
A method of forming a dual polysilicon gate, the method comprising: forming a polysilicon layer doped with impurities of a first conductivity type on a substrate having a first region and a second region; forming a mask pattern that covers the polysilicon layer in the first region and leaves the polysilicon layer in the second region exposed; injecting impurities of a second conductivity type into the polysilicon layer in the second region left exposed by the mask pattern; removing the mask pattern; patterning the polysilicon layer to form a first polysilicon pattern in the first region and a second polysilicon pattern in the second region, the second polysilicon pattern being formed to have protrusions that laterally protrude from sidewalls thereof; and injecting impurities of the second conductivity type into the substrate in the second region to form lightly doped regions and into the protrusions of the second polysilicon pattern to dope the protrusions with the impurities of the second conductivity type.