Patent ID: 7245520

Claim:
A memory cell, comprising a first and second nanotube switching elements, each nanotube switching element including an output node; a nanotube channel element having at least one electrically conductive nanotube and a channel electrode; a control structure having a set electrode and a release electrode disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said channel electrode and said output node, wherein said channel at least includes said nanotube channel element; and an electronic memory having cross-coupled first and second inverters wherein an input node of the first inverter is coupled to an output node of the second inverter and an input node of the second inverter is coupled to an output node of the first inverter; wherein the input node of the first inverter is coupled to the set electrode of the first nanotube switching element and to the output node of the second nanotube switching element; and wherein the input node of the second inverter is coupled to the set electrode of the second nanotube switching element and to the output node of the first nanotube switching element; and wherein the channel electrodes are coupled to a channel voltage line.