Patent ID: 8584075

Claim:
A method for computer modeling electrical characteristics of integrated circuit cells having given circuit elements, comprising: determining a relationship between a proximity context of a reference circuit element and an electrical characteristic of the reference circuit element; generating, for at least one of the cells, a plurality of cell proximity context models, based on a given model of the cell, the electrical characteristic, and the determined relationship; generating a cell layout having at least one instance of the at least one cell; characterizing at least one instance of the at least one cell in said cell layout, based on a value of a given structural parameter of said at least one cell, as one of a plurality of cell proximity context models associated with said cell; and generating a characterized discrete electrical characteristic model of the cell layout by substituting said instance of the least one cell by a value of an electrical characteristic of a cell proximity context model obtained as a result of the characterizing as characterizing, wherein at least one of said determining a relationship, said generating a plurality of cell proximity context models, said generating a cell layout, said characterizing at least one instance of the at least one instance of the cell, and said generating a characterized discrete electrical characteristic model of the cell layout is performed by a processor in accordance with instructions stored in a computer-readable storage medium coupled to the processor.