Patent ID: 8841941

Claim:
A semiconductor device comprising: a shift register; a first latch circuit operationally connected to the shift register; a second latch circuit operationally connected to the first latch circuit; a D/A converter circuit operationally connected to the second latch circuit; and an amplifier circuit having an input terminal and an output terminal, wherein the input terminal is electrically connected to the D/A converter circuit, wherein the amplifier circuit comprises a first transistor, a second transistor, a first capacitor, and a second capacitor, wherein the first capacitor is electrically connected to the input terminal, wherein a gate of the first transistor is electrically connected to one terminal of the first capacitor, wherein a gate of the second transistor is electrically connected to one terminal of the second capacitor, wherein one of a source and a drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to the output terminal, wherein the one of the source and the drain of the first transistor is electrically connected to the other terminal of the first capacitor, wherein the other of the source and the drain of the second transistor is electrically connected to the other terminal of the second capacitor, and wherein the output terminal is electrically connected to a pixel portion.