Patent ID: 7898066

Claim:
A semiconductor device comprising: a substrate having a plurality of metal layers; a die coupled to a first surface of the substrate; a plurality of metal shielding wires, wherein both ends of each of the metal shielding wires are directly attached to at least one metal layer formed on the first surface of the substrate to form a loop, a first set of the metal shielding wires positioned around an outer perimeter of the substrate, wherein both ends of at least two of the metal shielding wires are directly attached to one metal layer formed on the first surface of the substrate to form a loop; a mold compound having approximately planer top and side surfaces for encapsulating the die, a first surface of the substrate, and the plurality of metal shielding wires wherein a portion of the loop of the first set of metal shielding wires is exposed through the top surface of the mold compound; and a conductive coating applied to the top surface of the mold compound and to the exposed loop portion of the first set of metal shielding wires.