Patent ID: 8782478

Claim:
A method for determining an imminent failure of a non-volatile memory array, the method comprising: performing a first array integrity read operation of the non-volatile memory array until an error is detected; determining that the error is not error correction code (ECC) correctable, wherein a first word line voltage associated with the error is characterized as being a first threshold voltage; performing a second array integrity read operation of the non-volatile memory array, the second array integrity read operation comprising reading the array with a word line read voltage that is offset from the first threshold voltage and based on a predetermined width offset reference value; performing a check sum on the non-volatile memory array subsequent to the second array integrity read operation to provide a check sum value; and checking the check sum value to determine whether an imminent failure of the non-volatile memory is or is not indicated, wherein when the check sum value is equal to a predetermined check sum value an imminent failure in the non-volatile memory array is not indicated, and wherein when the check sum value is not equal to the predetermined check sum value an imminent failure in the non-volatile memory array is indicated.