Patent ID: 7224188

Claim:
A bus communication system comprising: a pair of communication conductors ( 14 a,b ); a driver ( 12 ), comprising a delay line ( 120 a–f ), a plurality of pairs of controlled current source circuits ( 124 a–c , 126 a–c ), each pair comprising current source circuits ( 124 a–c , 126 a–c , 20 a–c , 22 a–c ) of a first and second, mutually opposite polarity, and a control circuit ( 121 , 122 a,b ) for matching currents drawn by the current source circuits ( 124 ac , 126 a–c , 20 a–c , 22 a–c ) in each pair, the delay line ( 120 a–f ) having taps coupled to control inputs of the current source circuits ( 124 a–c , 126 a–c , 20 a–c , 22 a–c ) of the first and second polarity in the plurality of pairs, so that the current source circuits ( 124 a–c , 126 a–c , 20 a–c , 22 a–c ) are switched on with mutual delays between successive pairs determined by the delay line ( 120 a–f ), the current source circuits ( 124 a–c , 20 a–c ) of the first polarity having outputs coupled to a first one of the communication conductors ( 14 a ), the current source circuits of the second polarity ( 126 a–c , 22 a–c ) having outputs coupled to a second one of the communication conductors ( 14 b ).