Patent ID: 7462291

Claim:
A method of fabricating an array substrate for a liquid crystal display device, comprising steps of: forming an amorphous silicon pattern on a substrate; forming a catalyst metal pattern on the amorphous silicon pattern; annealing the amorphous silicon pattern to be converted into a polycrystalline silicon pattern using the catalyst metal pattern as a catalyst; forming a gate insulating layer on the polycrystalline silicon pattern; forming a gate electrode on the gate insulation layer at a position corresponding to the polycrystalline silicon pattern; doping the polycrystalline silicon pattern with impurities using the gate electrode as a doping mask to form an ohmic contact layer and an active layer; forming an interlayer insulating layer having first and second contact holes on the gate electrode, the first and second contact holes exposing portions of the ohmic contact layer; and forming a source electrode and a drain electrode on the interlayer insulating layer, the source electrode and the drain electrode connected to the ohmic contact layer respectively through the first and second contact holes, wherein the step of forming the catalyst metal pattern includes forming a photoresist pattern on the amorphous silicon pattern, the photoresist pattern having at least two openings exposing the amorphous silicon pattern, forming a catalyst metal layer on the photoresist pattern, and removing the photoresist pattern and the catalyst metal layer on the photoresist pattern so that the catalyst metal pattern remains on the amorphous silicon pattern.