Patent ID: 8058718

Claim:
A package substrate embedded with a semiconductor component, comprising: a substrate having at least one opening; a semiconductor chip secured in the opening of the substrate having an active face with a plurality of electrode pads and a passivation layer disposed thereon and an inactive face opposite to the active face, wherein the passivation layer includes a first passivation layer with openings for exposing the electrode pads and a second passivation layer disposed on the first passivation layer and the electrode pads exposed from the openings; a first dielectric layer provided on the substrate and the passivation layer; a plurality of vias penetrating the first dielectric layer and the second passivation layer, and being within the openings to expose the electrode pads; a first circuit layer provided on the first dielectric layer; and a plurality of first conductive vias formed in the vias for electrically connecting the electrode pads and the first circuit layer.