Patent ID: 7827681

Claim:
A method of manufacturing an electronic component integrated substrate, comprising: a first step of mounting, on a first substrate, an electronic component and connecting the electronic component to a wiring formed on the first substrate; a second step of providing an underfill resin between the electronic component and the first substrate; a third step of forming at least one hole in a second substrate, in a region which is opposed to the electronic component, the second substrate provided with a wiring; a fourth step of providing an electrode on one of the second substrate and the first substrate; a fifth step of bonding the electrode to the wiring of the other of the first substrate and the second substrate, thereby bonding the first substrate to the second substrate so as to include the electronic component in a space formed between the first substrate and the second substrate; and a sixth step of filling a resin in the space formed between the first substrate and the second substrate so as to apply, to the electronic component and the first substrate, a filling pressure capable of correcting a warpage generated on the electronic component and the first substrate while discharging air from the hole formed in the second substrate.