Patent ID: 7872535

Claim:
A phase locked loop (PLL) within a front-end circuitry of an integrated circuit radio transceiver, the phase locked loop comprising: a charge pump having a single current source operable to provide a required loop filter current; a capacitive loop filter operably disposed to receive the loop filter current, the capacitive loop filter further including: first and second parallel coupled capacitive blocks; a selectable first switch operable to create a discharging signal path, the selectable first switch operably disposed across the first parallel coupled capacitive block and circuit common; and a selectable second switch operably disposed between an input node of the selectable first switch and an input of the second parallel coupled capacitive block; a voltage controlled oscillator (VCO) operably disposed to receive a capacitive loop filter voltage produced by the capacitive loop filter; and three-stage switching logic operable to define a VCO signal level by charging and discharging the first and second parallel coupled capacitive blocks, wherein the three-stage switching logic is operable to open and close a connection between the first and second parallel coupled capacitor blocks to share a charge between the first and second parallel coupled capacitor blocks to adjust the VCO signal level.