Patent ID: 7247945

Claim:
A semiconductor apparatus comprising: a printed circuit board; a peripheral type first semiconductor package which has a first group of ball electrodes arranged in a peripheral type first arrangement area, a first group of additional ball electrodes arranged in part of an area inside said first arrangement area, and a first semiconductor device electrically connected to the first group of ball electrodes and which is arranged on a first surface of said printed circuit board; and a peripheral type second semiconductor package which has a second group of ball electrodes arranged in a peripheral type second arrangement area, a second group of additional ball electrodes arranged in part of an area inside said second arrangement area, and a second semiconductor device electrically connected to the second group of ball electrodes and which is arranged on a second surface of said printed circuit board, wherein a ball electrode located at at least one corner of said first group of ball electrodes is arranged at a position to oppose said second group of additional ball electrodes through said printed circuit board so as to mitigate stress generated at least on the one corner of said first group of ball electrodes, and a ball electrode located at at least one corner of said second group of ball electrodes is arranged at a position to oppose said first group of additional ball electrodes through said printed circuit board so as to mitigate stress generated at least on the one corner of said first group of ball electrodes.