Patent ID: 7805535

Claim:
A data link layer processor comprising: one or more media access controllers (MACs), wherein each MAC is operatively coupled to a physical layer interface, each of said one or more MACs includes a MAC preprocessor and a MAC postprocessor, said MAC preprocessor including a traffic policer, said traffic policer adapted to execute an ingress traffic policy and frame discard, said traffic policer utilizing a three color marker algorithm to identify frames for discard, wherein the MAC postprocessor includes a traffic shaper adapted to perform bandwidth-based flow control for the egress traffic received by at least one of said MACs, wherein the traffic shaper regulates output bandwidth of the MAC postprocessor using a token bucket algorithm in conjunction with one or more buckets each associated with a respective one of a plurality of flow classes, and wherein tokens allotted to each bucket and tracked using a first counter represent a capacity for each one of said flow classes; and a statistics acquisition module, operatively coupled to the one or more MACs, for compiling statistics on each of the plurality of MACs.