Patent ID: 7655997

Claim:
A wafer-level electro-optical semiconductor manufacture mechanism comprises: a wafer which has a top surface and a back surface, wherein the top surface has a first preservation position and a second preservation position, the back surface has a first soldering portion and a second soldering portion a conductive circuit disposed inside the wafer and including an over-voltage protection with two over-voltage protection diodes, wherein the first preservation position and second preservation position are each respectively electrically connected to the first soldering portion and the second soldering portion by only the over-voltage protection; electro-optical crystal grains having a first crystal joint and a second crystal joint, wherein the first crystal joint and the second crystal joint are electrically contacted to the first preservation position and the second preservation position respectively without outer wire bonding; and a plurality of conductive materials located at the top surface of the wafer for electrically connecting the electro-optical crystal grain and the wafer.