Patent ID: 7710190

Claim:
An apparatus comprising: an output circuit; a bias generator having: a first current source; a second current source coupled to the first current source; a first switch coupled to the output circuit and coupled to the node between the first and the second current sources, wherein the first switch is actuated by an inverse of a control signal; a first current mirror having a second switch that deactivates the first current mirror when actuated, wherein the second switch is actuated by the control signal; a switch network that is coupled to at least a portion of the first current mirror and that is coupled to the first switch; a second current mirror having: a third switch that deactivates the second current mirror when actuated; a first FET that is diode-connected and that is coupled to switch network at its drain; and a second FET that is coupled to the switch network at its drain, that is coupled to the source of the first FET at its source, and that is coupled to the gate of the first FET at its gate, wherein the third switch is coupled to the nodes between the gates of the first and the second FETs and to the node between the sources of the first and second FETs; a third FET that is coupled to the sources of the first and second FETs at its source and that is coupled to the gates of the first and second FETs at its gate; a third current source that is coupled to the drain of the third FET; a fourth FET that is coupled to the node between the third current source and the third FET at its gate; and a fourth current source that is coupled between the drain of the fourth FET and the sources of the first and second FETs.