Patent ID: 6890799

Claim:
A method for sealing multi-chip modules, said multi-chip modules comprising a circuit substrate having a plurality of semiconductor devices mounted thereon, and a frame, said frame fixed to said circuit substrate and formed from a material having a thermal expansion coefficient consistent with a thermal expansion coefficient of said circuit substrate, said method comprising: forming onto a first surface of a sealing top plate a cooling flow path having openings through which cooling fluid may flow; bonding a second surface of said sealing top plate to a back surface of said semiconductor devices; joining an edge of said sealing plate to said frame to form a first seal; covering said cooling flow path with a cooling flow path cover; interposing a sealing material between said edge of said sealing top plate and said cooling flow path cover to form a second seal; and tightening together said cooling flow path cover, said sealing material, said sealing top plate and said frame.