Patent ID: 8492173

Claim:
A method for manufacturing a semiconductor integrated circuit device, comprising the following steps of: (a) supplying a plurality chips divided in individual chip regions while being arranged substantially in their original two-dimensional layout upon a wafer, to a chip treating apparatus with their back surfaces fixed to an adhesive tape; and (b) vacuum-chucking a surface of a first chip out of the chips with a chucking collet and peeling the adhesive tape from the back surface of the first chip in a state in which the adhesive tape over the back surface of the first chip is vacuum-chucked to an upper surface of a lower base, the step (b) further comprising the following sub-steps of: (b1) monitoring a bent state of the first chip before complete separation of the first chip from the adhesive tape by measuring the flow rate of a vacuum chucking system in the chucking collet; (b2) causing a slide plate constituting a principal portion of the lower base to slide so as to decrease an overlap thereof with the first chip until the bent state of the first chip exceeds an allowable range; and (b3) determining an optimum sliding speed of the slide plate on the basis of the monitor information obtained in the sub-step (b1), the method further comprising a following step of: (c) after the step (b), vacuum-chucking a surface of a second chip out of the chips with the chucking collet and causing the slide plate to slide at the optimum sliding speed so as to decrease an overlap thereof with the second chip in a state in which the adhesive tape over the back surface of the second chip is vacuum-chucked to the upper surface of the lower base, thereby peeling the adhesive tape from the back surface of the second chip.