Patent ID: 6955970

Claim:
The process of manufacture of a MOSgated device comprising: forming a gate oxide layer atop a silicon surface of one conductivity type; forming a layer of polysilicon atop said gate oxide layer; etching said polysilicon layer and said underlying gate oxide layer into a plurality of stripes of oxide and polysilicon spaced 1 to 4 microns and overlying said silicon surface; implanting and diffusing a plurality of spaced first base diffusion stripes of the other conductivity type into said silicon surface, using said stripes of oxide and polysilicon as a mask; implanting and diffusing a plurality of source diffusions into said first base diffusion stripes, using said stripes of oxide and polysilicon as a mask, and leaving invertible channel regions along the outer edges of said first base diffusion stripes; implanting and diffusing second base diffusion stripes into said silicon surface using said stripes of oxide and polysilicon as a mask, to a depth below that of said source diffusions and extending to between the opposite edges of adjacent pairs of said polysilicon stripes; wherein said stripes of oxide and polysilicon do not include sidewall spacers during implanting and diffusing of said first base diffusion stripes, said source diffusions, and said second base diffusions.