Patent ID: 7729388

Claim:
A processor comprising: at least a portion of a first split transmit and receive media access controller; the split transmit and receive media access controller having a transmit unit and a receive unit physically separated from one another; wherein the processor comprises an interface for directing signals between the transmit unit and the receive unit of the first split transmit and receive media access controller, the interface being configured to multiplex the signals with signals directed between a transmit unit and a receive unit of at least a second split transmit and receive media access controller; wherein the first and second split transmit and receive media access controllers have respective distinct addresses encoded by particular values of information bits sent over the interface and the processor decodes said information bits so as to distinguish a first signal sent between the transmit and receive units of the first split transmit and receive media access controller from a second signal sent between the transmit and receive units of the second split transmit and receive media access controller.