Patent ID: 7419852

Claim:
A method of fabricating a semiconductor device comprising: providing a semiconductor substrate comprising at least one semiconductor die having a back surface and an active surface bearing at least one semiconductor device thereon; optionally depositing a first dielectric layer on the back surface; forming at least one via extending from the back surface to a bond pad on the active surface; depositing a second dielectric layer to cover the first dielectric layer and an inner region of the at least one via; removing a portion of the second dielectric layer to expose a bottom portion of the bond pad; depositing an electrically conductive material within the at least one via; depositing a layer of conductive redistribution line precursor material on the second dielectric layer and on the electrically conductive material; forming at least one redistribution line from the layer of conductive redistribution line precursor material, the at least one redistribution line in electrical communication with the electrically conductive material; and depositing a third dielectric layer over the at least one redistribution line and a portion of the second dielectric layer; forming at least one aperture through the third dielectric layer to expose a portion of the at least one redistribution line through the third dielectric layer; and wherein depositing each of the first dielectric layer, the second dielectric layer, the third dielectric layer, the electrically conductive material and the layer of conductive redistribution line precursor material is effected below a temperature sufficient to cause operational or physical damage to the at least one semiconductor device.