Patent ID: 7359376

Claim:
A serial compressed bus interface for interfacing with a bus having a single serial data line and at least one control line, comprising: a serial-to-parallel converter having a data input coupled to said single serial data line and adapted to receive time-division multiplexed serial data from a plurality of data sources, said serial-to-parallel converter having a plurality of parallel output lines for providing thereon packets of said time-division multiplexed serial data in parallel form to a plurality of devices associated with data applications; enable logic having an input coupled to said at least one control line for receiving a data valid signal that identifies which of said plurality of devices is associated with a particular packet of the time-division multiplexed serial data, said enable logic deriving a signal from said data valid signal to enable said identified device to receive said particular packet in parallel form, as provided by said serial-to-parallel converter; and a request control circuit adapted to output a request signal that requests said time-division multiplexed serial data for more than one but less than all of said plurality of devices.