Patent ID: 7679953

Claim:
A memory system, comprising: phase change memory cells; and a control module configured to apply a reset pulse to one of the phase change memory cells, the reset pulse heating the one of the phase change memory cells above a pre-determined temperature and permitting the one of the phase change memory cells to quickly cool, cause the one of the phase change memory cells to be written using a write parameter, cause a resistance value of the one of the phase change memory cells to be read back, adjust the write parameter, and cause the writing, reading and adjusting to be repeated until the resistance value is within a predetermined range of a target resistance value, wherein adjusting the write parameter includes varying a temperature applied to the one of the phase change memory cells, wherein an amplitude and a duration of a write current pulse controls the temperature applied to the one of the phase change memory cells, and varying a crystallization time of the one of the phase change memory cells.