Patent ID: 7633330

Claim:
A reference voltage generation circuit comprising: a first transistor comprising: a first gate, a first source, and a first drain; a second transistor comprising: a second gate connected to the first gate, a second source connected to the first source, and a second drain; a first diode connected between a ground level and a V− node; a first resistor connected between the V− node and the first drain; a second diode connected between the ground level and a Vdio node; a second resistor connected between the Vdio node and a V+ node; a third resistor connected between the V+ node and the first drain; a first operational amplifier comprising: a first plus input port connected to the V+ node, a first minus input port connected to the V− node, and a first output port connected to the first gate and the second gate; a fourth resistor connected between the ground level and the second drain; an output terminal disposed between the second drain and the fourth resistor; a third transistor comprising: a third gate, a third source, and a third drain connected to the output terminal; a second operational amplifier comprising: a second plus input port connected to the output terminal, a second minus input port connected to a power supply voltage via a variable resistor that is disposed between the power supply voltage and the ground level, and a second output port connected to the third gate.