Patent ID: 7608500

Claim:
A method of forming a semiconductor device, the method comprising: preparing a substrate including a cell region and a low voltage region; forming a tunnel insulating layer on the cell and low voltage regions; forming a first charge storage gate pattern and a second charge storage gate pattern on portions of the tunnel insulating layer on the cell and low voltage regions, respectively; forming a blocking insulating layer and a control gate conductive layer on each of the first and second charge storage gate patterns; removing a portion of the control gate conductive layer and a portion of the blocking insulating layer on the second charge storage gate pattern and removing the second charge storage gate pattern and the portion of the tunnel insulating layer on the low voltage region, thereby exposing a portion of the low voltage region; forming a low-voltage gate insulating layer on the exposed portion of the low voltage region; and forming a low-voltage gate conductive pattern on the low-voltage gate insulating layer.