Patent ID: 7521764

Claim:
A one-time programmable, dual-bit memory device, comprising: one MOS storage transistor that includes first and second memory cells storing first and second bits, respectively, the MOS storage transistor having: a semiconductor substrate, first and second active regions formed under a surface of the substrate and being separated by a part of the substrate forming a channel region, a gate formed on the surface of the substrate in line with the channel region, the gate having respective distal ends aligned with a part of the first active region and with a part of the second active region, respectively, which gate is permanently held at ground potential, and a gate oxide layer running between the gate and the surface of the substrate, the first memory cell including a first portion of the gate oxide layer, the first portion having an intact or a broken down state between the gate and the first active region that determines a stored value of the first bit, and the memory cell including a second portion of the gate oxide layer, the second portion having an intact or a broken down state between the gate and the second active region that determines a stored value of the second bit; a first MOS access transistor for access to the first bit, the first MOS access transistor being connected between a bit line and the first active region, being formed on the substrate surfaces, being structured to cause breakdown of the first portion of the gate oxide layer when the first access transistor is turned on and a write voltage is applied to the bit line, and including: a gate connected to a first word line, a first active region connected to the bit line, and a second active region connected to the first active region of the MOS storage transistor; and a second MOS access transistor for access to the second bit, formed on the substrate surface and including: a gate connected to a second word line, a first active region connected to a bit line, and a second active region connected to the second active region of the MOS storage transistor.