Patent ID: 8717094

Claim:
A signal processing device comprising a first discrete time analog signal filter section, said first section comprising: an input for accepting a time series of input signal values; an output for providing a time series of output signal values; an analog signal storage section comprising a plurality of capacitors; switching circuit elements configurable to (a) charge successive subsets of capacitors of a first plurality of subsets of the plurality of capacitors according to successive values of the input signal values, (b) couple successive subsets of two or more capacitors of a second plurality of subsets of the plurality of capacitors to form successive values of a time series of intermediate signal values, and (c) charge successive subsets of capacitors of a third plurality of subsets of the plurality of capacitors according to successive values of the intermediate signal values; circuitry for forming each output signal value of the time series of output signal values from a corresponding intermediate signal value of the time series of intermediate signal values; control logic for controlling configuration of the switching circuit elements in successive phases of a clock signal to form the time series of output signal values as an application of a desired infinite impulse response filter to the time series of input signal values.