Patent ID: 8513766

Claim:
A semiconductor device comprising: a semiconductor layer; a source region provided in a surface of the semiconductor layer; a drain region provided in a surface layer portion of the semiconductor layer in spaced relation from the source region, the drain region including a well disposed in the surface layer portion, an upper most portion of the well being spaced apart from said surface of the semiconductor layer; a gate insulation film provided in contact with a portion of said surface of the semiconductor layer present between the source region and the drain region; a gate electrode provided on the gate insulation film; and a drain-gate isolation portion, in a form of a trench isolation structure, provided between the drain region and the gate insulation film for isolating the drain region and the gate insulation film from each other so that the drain region and the gate insulation film do not touch each other, wherein no such isolation portion is provided between the source region and the gate insulation film, wherein the gate insulation film touches the drain-gate isolation portion and is spaced apart from the drain region so that the gate insulation film does not touch the drain region, the well extends toward the source region beyond the drain-gate isolation portion, and the semiconductor layer has a semiconductor region disposed between the source region and the well, the semiconductor region extending between the gate insulation film and the upper most portion of the well so as to touch the drain-gate isolation portion.