Patent ID: 7599390

Claim:
A data transmission circuit, comprising: a plurality of parallel data preparation circuits, each data preparation circuit including: a digital to analog converter configured to receive a respective subset of a data stream and to convert the respective subset of the data stream into a respective unmodulated analog signal, wherein the respective subset of the data stream has a respective data rate substantially less than a data rate of the data stream; and a multiplier for multiplying the respective analog signal by a respective vector to produce a respective sub-channel signal, wherein the respective vector corresponds to a sequence of N elements and the respective vector used by the multiplier in each of the plurality of data preparation circuits is substantially orthogonal to respective vectors used by multipliers in each of the other data preparation circuits, and wherein the respective vectors are substantially orthogonal during a finite time interval corresponding to each sequence of N elements; and a combiner for combining respective sub-channel signals prior to transmission; wherein each respective sub-channel signal corresponds to a group of frequency bands at least one of which substantially overlaps a frequency band for at least one other respective sub-channel signal.