Patent ID: 7495277

Claim:
Memory circuitry comprising: memory array comprising a plurality of memory cell capacitors, individual of the capacitors comprising a storage node electrode, a capacitor dielectric region, and a cell electrode; the cell electrode being commonly shared among at least some of the plurality of memory cell capacitors within the memory array, the storage node electrodes of said at least some of the memory cell capacitors comprising a container shape having internal container surfaces; and cell electrode within the memory array comprising a conductor metal layer comprising at least one of elemental tungsten, a tungsten alloy, tungsten silicide and tungsten nitride; polysilicon being received over the conductor metal layer; the conductor metal layer and the polysilicon being received over all of the internal container surfaces of individual of the storage node electrodes of said at least some of the plurality of memory cell capacitors, the polysilicon not comprising a conductive part of the cell electrode.