Patent ID: 7151022

Claim:
A method for forming a shallow trench isolation structure, the method comprising: depositing pad oxide over a silicon substrate; implanting ions into the silicon substrate; removing a portion of the pad oxide using an STI pattern to expose a portion of the silicon subtrate; depositing a polysilicon layer over the pad oxide and the portion of the silicon substrate exposed from removing the portion of the pad oxide; implanting ions in the polysilicon layer to make N+ polysilicon; depositing a bottom anti-reflection coat (BARC) over the polysilicon layer; forming a gate pattern over the BARC; etching the polysilicon layer to make a gate and form a shallow trench isolation (STI area, wherein etching the polysilicon layer further forms a device isolation area by etching the portion of the silicon substrate exposed from removing the portion of the pad oxide resulting in forming the STI area according to the STI pattern; depositing a nitride layer over the silicon substrate; etching the nitride layer; filling the device isolation area with photoresist; forming silicide over a portion of the silicon substrate; and depositing an oxide layer over the silicon substrate and performing a planarization process.