Patent ID: 8649203

Claim:
A reversible resistive memory, comprising: a plurality of reversible resistive cells, each of the reversible resistive cells including a reversible resistive film and a diode, the diode serves as a program selector and is constructed from a polysilicon structure having a first terminal from a first region with a first type of dopant and a second terminal from a second region with a second type of dopant, the first terminal of the diode coupled to a first terminal of the reversible resistive film, the reversible resistive film being programmable reversibly by conducting a current flowing through the reversible resistive film, wherein the current is high or short duration for programming one state and low or long duration for programming another state; a plurality of local wordlines, each coupled to a plurality of the reversible resistive cells via the second terminal of the diodes and having a first resistivity; a plurality of global wordlines, each coupled to at least one of the local wordlines and having a second resistivity; and a plurality of bitlines, each coupled to a plurality of the reversible resistive cells via the second terminal of reversible resistive film, wherein at least one of the bitlines is coupled to a first supply voltage line and at least one of the global wordlines is coupled to a second supply voltage line during program or read, and wherein the voltage between the first and second supply voltage lines has a larger magnitude or longer duration for program than for read.