Patent ID: 8530973

Claim:
A semiconductor device comprising: a substrate; a semiconductor element over the substrate, the semiconductor element comprising a first semiconductor layer, a first insulating layer and a first electrode; wherein the first semiconductor layer comprises a first channel formation region and a first high concentration impurity region, wherein the first electrode is provided over the first semiconductor layer, wherein the first insulating layer is interposed between the first semiconductor layer and the first electrode, a second insulating film over the semiconductor element; a second electrode over the second insulating film, wherein the second electrode is connected to the first high concentration impurity region; a third insulating film over the second electrode; and a thin film transistor over the third insulating film, wherein the thin film transistor comprises a second semiconductor layer, a fourth insulating layer and a third electrode, wherein the second semiconductor layer comprises a second channel formation region and a second high concentration impurity region, wherein the second high concentration impurity region comprises an impurity element which imparts n-type conductivity, wherein the third electrode is provided over the second semiconductor layer, and wherein the fourth insulating layer is interposed between the second semiconductor layer and the third electrode, a fifth insulating film over the thin film transistor; and a fourth electrode over the fifth insulating film, wherein the fourth electrode is connected to the second high concentration impurity region and is electrically connected to the second electrode, wherein the first high concentration impurity region partly overlaps with the second high concentration impurity region.