Patent ID: 7292479

Claim:
Memory device for storing binary data signals, having: a) a memory cell array having at least one memory cell which can be addressed via word lines and bit lines, it being possible to store the binary data signals in the form of electrical charges; b) at least one sense amplifier, by means of which the stored binary data signals can be read out from the at least one memory cell, the binary data signals read out subsequently being amplified and evaluated by means of the sense amplifier and also being able to be written back to the corresponding memory cell; c) an output unit for outputting the amplified and evaluated binary data signals, wherein d) the memory device for storing binary data signals further has a coupling device connected between the memory cell array and the sense amplifier, which coupling device comprises: d1) at least one preamplifier unit for preamplifying the data signals read out from the at least one memory cell of the memory cell array and for outputting the preamplified data signals to the sense amplifier; and d2) a bridging unit for bridging the preamplifier unit in order to provide a writing-back of the binary data signals to the corresponding memory cells of the memory cell array, wherein the bridging unit has at least one multiplexing unit, which can be activated with a write signal and which is provided separately for each data line.