Patent ID: 7895418

Claim:
A floating point unit associated with a buffer and a plurality of floating point processing units, the buffer operable to store operands and the floating point processing units operable to execute floating point instructions that write operands to and read operands from an associated memory, the floating point unit comprising: an operand queue, the operand queue operable to (i) virtually commit a first operand by writing the first operand from the operand queue to the buffer, and (ii) supply the first operand to a floating point read instruction; and an input aligner operable to receive a second operand comprising a plurality of groups of bytes and to write an aligned second operand to the operand queue, wherein the second operand is misaligned with respect to a boundary between a first byte group and a second byte group and the input aligner is further operable to align the second operand to generate the aligned second operand by: circularly rotating bytes in the first byte group and writing a subset of the rotated first byte group to the operand queue; and circularly rotating bytes in the second byte group and writing a subset of the rotated second byte group to the operand queue; wherein the floating point unit is further configured to write a third operand directly to the buffer bypassing the operand queue in response to a slot where the third operand was to be stored in the operand queue being virtually committed.