Patent ID: 6951017

Claim:
A process of generating a software tool that causes a computer to create computer files that define integrated circuits as a plurality of second computer-readable directories in a second directory structure based on a second version of an ASIC design system, the process comprising steps of: a) providing a plurality of first computer-readable directories arranged in a first directory structure based on a first version of an ASIC design system different from the second version; b) comparing the first and second computer-readable directories to identify differences between the first and second directory structures; c) generating a computer-readable map file containing a plurality of items, each referencing a difference between the first and second computer-readable directory structures by an associated source name; d) sorting the items of the mapping file into an ordered list based on the source names; e) for each source name, generating a computer-readable code representing a difference between the first and second computer-readable directory structures associated with the respective source name; and f) generating the software tool based on the computer-readable codes, the software tool being executable by a computer to cause the computer to respond to computer files that define the integrated circuit in the first directory structure to generate the computer files that define the integrated circuit in the second directory structure.