Patent ID: 8357986

Claim:
A metal-oxide-semiconductor field-effect transistor (MOSFET) semiconductor switching device comprising: a substrate; an n-well layer on the substrate; a p-well layer on the n-well layer; an n-drift region proximate the p-well; a shallow trench isolation (STI) oxide proximate the n-drift region, between a source and a drain; wherein the n-drift region is on the p-well layer and below the STI; an orthogonal gate proximate the STI, an orthogonal gate electrode having a cross-section as viewed through layers of the transistor, direction of the view taken perpendicular to direction connecting the source and the drain, the orthogonal gate electrode cross-section having a vertical first segment contiguous with a horizontal second segment, the horizontal second segment being perpendicular to the vertical first segment and extending past the vertical first segment in a first direction and not extending past the vertical first segment in a second direction opposite the first direction, wherein the horizontal second gate electrode segment is disposed above the p-well layer in the first direction and the vertical first gate electrode segment is incorporated into an end of the STI; and a gate oxidation film vertically disposed only between the p-well layer and adjacent side of the vertical first segment of the orthogonal gate electrode and disposed horizontally between bottom of the vertical first segment of the orthogonal gate electrode and the n-drift region; and disposed horizontally between the horizontal second segment of the orthogonal gate electrode and the p-well layer; wherein the n-drift region extends horizontally in the first direction to and not beyond a vertical face of the p-well layer adjacent to the proximate gate oxidation film vertical face of the vertical first segment of the orthogonal gate electrode, whereby gate-drain capacitance (C GD ) is reduced thereby increasing peak diode recovery.