Patent ID: 7522690

Claim:
A method for measuring jitter comprising: receiving a first reference signal at a first phase-locked loop (PLL) circuit; generating at an output of the first phase-locked loop circuit an output signal based at least in part on the first reference signal, the output signal including a jitter component to be measured; during a first time period comparing a first signal corresponding to the output signal and a second signal corresponding to the first reference signal in a phase detector of a second phase-locked loop circuit; storing a first value corresponding to the comparison that includes information indicative of the jitter component; wherein the first value includes the jitter component and a noise component that is associated with an analog to digital converter of the second phase-locked loop circuit and wherein the method further comprises: during a second time period supplying a third and fourth signal to a first and a second input of the phase detector of the second phase-locked loop circuit, the third and fourth signal being the same signal; during the second time period comparing the third and fourth signals in the phase detector of the second phase-locked loop circuit; and storing a second value corresponding to the comparison of the third and fourth signals as an indication of a noise component associated with the analog to digital converter in the second phase-locked loop circuit.