Patent ID: 6859092

Claim:
A low voltage, complementary metal oxide semiconductor (CMOS) circuit for generating voltage and current references comprising: a voltage reference generating circuit providing a first voltage reference, said voltage reference generating circuit being formed by a resistor and a pair of series connected silicon-on-insulator (SOI) field effect transistors (FETs) connected to said resistor; and a third SOI field effect transistor (FET); said pair of series connected silicon-on-insulator (SOI) field effect transistors (FETs), said resistor, and said third SOI field effect transistor (FET) are connected in series between a low voltage power supply and ground; an operational amplifier including a differential pair of CMOS transistors and a plurality of current reference transistors; said first voltage reference applied to an input of said differential pair of transistors and an output of said differential pair of transistors providing a second voltage reference; a first voltage generating circuit generating a first voltage; a second voltage generating circuit generating a second voltage; said first and second voltage generating circuit being formed by a plurality of CMOS transistors; and said first and second voltages being applied to said voltage reference generating circuit and at least a pair of said current reference transistors.