Patent ID: 8269269

Claim:
A nonvolatile semiconductor memory device comprising: a gate electrode of a memory transistor including a first insulating layer that is formed on a semiconductor substrate, a charge storage layer that is formed on the first insulating layer, a second insulating layer that is formed on the charge storage layer, and a gate electrode that is formed on the second insulating layer; and a gate electrode of a select gate transistor that is formed adjacent to the gate electrode of the memory cell transistor, the gate electrode of the select gate transistor including a gate insulating film that is formed on the semiconductor substrate, a lower gate electrode that is formed on the gate insulating film and that has a tapered portion in a tapered shape at a first side surface on a side of the gate electrode of the select gate transistor, and the first side surface has a tapered angle side on the memory cell transistor side, and a second side surface, which is disposed on an opposite side of the first side surface, has a larger angle than that of the first side surface, a first oxide film that is formed on the tapered portion of the lower gate electrode, a silicon nitride film that is formed on the first oxide film, a second oxide film that is formed on the silicon nitride film, a conductive film that is formed on the second oxide film, and an upper gate electrode that is connected to the conductive film and the lower gate electrode.