Patent ID: 8923153

Claim:
An apparatus comprising: a processor circuit for a wireless device; a receive module arranged for execution by the processor circuit to receive a packet via a communication channel, the packet having one or more pilot signals assigned to one or more of a plurality of subcarrier frequencies, the one or more pilot signals arranged to sweep through at least a portion of the plurality of subcarrier frequencies during receipt of the packet at time duration N, where time duration N equals a first time duration before a given pilot signal at a given subcarrier frequency shifts to another given subcarrier frequency; an optimizer module arranged for execution by the processor circuit to determine time duration M, where time duration M equals a second time duration over which the one or more pilot signals are received by the receive module during receipt of at least a portion of the packet; and a channel estimator module arranged for execution by the processor circuit to determine an initial channel estimation for the communication channel based on information included in a preamble of the packet, the channel estimator also arranged to update the initial channel estimation based on at least a portion of the one or more pilot signals received over time duration M.