Patent ID: 8138542

Claim:
A semiconductor device comprising: a first conductivity type semiconductor substrate; a second conductivity type channel region; and a junction layer provided between the first conductivity type semiconductor substrate and the second conductivity type channel region, the junction layer having a plurality of first conductivity type semiconductor regions and a plurality of second conductivity type semiconductor regions alternately arranged in a direction running parallel with the principal surface of the first conductivity type semiconductor substrate, the second conductivity type semiconductor region having a higher average impurity concentration than the first conductivity type semiconductor region, the first conductivity type semiconductor region having an impurity concentration whose average value (N 1-semiconductor ) satisfies the following expression (1): N 1 - semiconductor ≥ ɛ semiconductor × E critical 2 4 × q × V BD ( 1 ) where V BD is the maximum preventable voltage of the semiconductor device, ε semiconductor is the permittivity of the semiconductor device, E critical is a critical electric field strength and q is the elementary charge; the second conductivity type channel region having a plurality of trenches formed from the surface thereof so as to reach the junction layer, each of the trenches having an insulator film formed on the inside face and being filled with an electrode with the insulator film inbetween the trench and the electrode, and an electric field strength in the vicinity of the trench being lower than an electric field strength in the junction layer.