Patent ID: 8338908

Claim:
A semiconductor device comprising: a substrate in which, on a semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type and a semiconductor layer of the second conductivity type having concentration of impurities of the second conductivity type lower than that of the buried layer and having predetermined thickness are stacked; a trench that is formed in the substrate deeper than a forming position of the buried layer and define an element forming region in the substrate; an element isolation insulation film including sidewall oxide films formed along inner walls of the trench and a buried film that fills the trench covered by the sidewall oxide films; and a semiconductor element formed in the element forming region defined by the element isolation insulation film, wherein the trench includes a first trench formed from a surface of the substrate to predetermined boundary depth and a second trench formed from the boundary depth to a bottom and having an opening diameter smaller than that of the first trench, first diffusion layers connected to the buried layer are formed only around sidewalls of the second trench, and the semiconductor element includes: a source region including an impurity diffusion layer of a predetermined conductivity type formed on a surface of the element forming region; a drain region formed on the surface of the element forming region to be away from the source region and including an impurity diffusion layer of the predetermined conductivity type; a gate electrode formed via a gate insulation film on the element forming region between the source region and the drain region; a source electrode connected to the source region; and a drain electrode connected to the drain region.