Patent ID: 7005705

Claim:
A semiconductor device comprising: an MOS transistor provided on an SOI layer of an SOI substrate in which a semiconductor substrate, a buried insulating film and said SOI layer are sequentially provided; and a body contact portion provided in a surface of said SOI layer and capable of fixing an electric potential from an outside, a gate electrode of said MOS transistor having a shape seen on a plane such that at least one of ends in a direction of a gate width is enlarged in a direction of a gate length to constitute a gate contact pad, said body contact portion being provided in said surface of said SOI layer on an outside of said end in said direction of said gate width of said gate contact pad and being electrically connected to a channel formation region provided under said gate electrode through said SOI layer, a gate insulating film of said MOS transistor including a first portion having a first thickness and a second portion having a second thickness in said direction of said gate width, said second thickness being greater than said first thickness, wherein said second portion of said gate insulating film is provided at least under said gate contact pad, and said first portion and said second portion of said gate insulating film are integrally formed, an insulating film having said second thickness is provided on said SOI layer to be a connecting portion of said body contact portion and said channel formation region, and a length in said direction of said gate length of said SOI layer to be said connecting portion of said body contact portion and said channel formation region is smaller than a length obtained by adding a gate length of said gate electrode and a double of a width of a side wall insulating film provided on a side surface of said gate electrode.