Patent ID: 7482647

Claim:
A semiconductor device, comprising: a semiconductor layer, the semiconductor layer including a first semiconductor element and a second semiconductor element; a light shielding wall formed around the first semiconductor element and the second semiconductor element, the light shielding wall including a opening; a first wiring layer which is electrically connected to at least the first semiconductor element through the opening, the first wiring layer including a first portion which is formed in an inside of the light shielding wall and a second portion which is formed in an outside of the light shielding wall, a first width of the first portion of the first wiring layer being larger than a second width of the second portion of the first wiring layer in a planar view; and a second wiring layer which is electrically connected to at least the second semiconductor element through the opening, the second wiring layer including a third portion which is formed in the inside of the light shielding wall and a fourth portion which is formed in the outside of the light shielding wall, a third width of the third portion of the second wiring layer being larger than a fourth width of the fourth portion of the second wiring layer in the planar view.