Patent ID: 7279258

Claim:
A method for controlling focus parameters of an exposure tool in a lithographic process for patterning a substrate of a semiconductor wafer, comprising: providing a bare semiconductor wafer substrate or a substrate formed by depositing a film onto the surface of a semiconductor wafer; providing a pattern having a first edge and a second edge, the first edge and the second edge being substantially parallel and limiting the pattern, the pattern including a plurality of structural elements, each of the structural elements having a characteristic feature size; selecting a first structural element and a second structural element, the first structural element having a first distance to the first edge and the second structural element having a second distance to the first edge; selecting the characteristic feature size of the first structural element larger than the characteristic feature size of the second structural elements when the first distance is larger than the second distance; selecting the characteristic feature size of the first structural element substantially equal to the characteristic feature size of the second structural elements when the first distance is substantially equal to the second distance; disposing the pattern on a photo mask; depositing a photoresist film layer on a surface of the substrate; projecting the pattern onto the photoresist film layer using the photo mask in the exposure tool having a characteristic focus parameter; developing the photoresist film layer to form a three-dimensional resist pattern on the surface of the substrate by removing a first part of the photoresist film layer being exposed with a first exposure dose, the resist pattern corresponding to the pattern and having a corresponding first edge and a corresponding second edge; determining a first dimension of the resist pattern between the corresponding first edge and the corresponding second edge; and determining the characteristic focus parameter of the exposure tool as a function of the first dimension of the resist structure.