Patent ID: 7271046

Claim:
A method for manufacturing a semiconductor device in which a bipolar transistor and a metal silicide layer are formed on a semiconductor substrate, comprising the steps of: forming a collector region on said semiconductor substrate, forming a first insulating layer on the surface of said semiconductor substrate, forming a first opening in said collector region of said first insulating layer, forming a base semiconductor layer which is contacted to said collector region through said first opening and extends onto said first insulating layer, forming a second insulating layer on said first insulating layer and said base semiconductor layer, forming a second opening in a portion of said second insulating layer where an emitter region is formed on said base semiconductor layer, forming an emitter semiconductor layer which is contacted to said base semiconductor layer through said second opening and extends onto said second insulating layer, forming a third opening on a base take-out region of said second insulating layer, with a portion which covers the edge of said base semiconductor layer remaining intact, and forming a metal silicide layer on the surface of said emitter region and on the surface of said base semiconductor layer exposed through said third opening.