Patent ID: 7408234

Claim:
A semiconductor device that is a MOS transistor, said semiconductor device comprising: a semiconductor substrate; a semiconductor layer of a first conductivity type formed above said semiconductor substrate; and a gate electrode formed above said semiconductor layer such that a gate insulating film is placed between said gate electrode and said semiconductor layer, wherein said semiconductor layer has: a body region of the first conductivity type; a source region of a second conductivity type formed in said body region to be exposed at a surface of said semiconductor layer; a drain offset region of the second conductivity type; a drain contact region of the second conductivity type formed in said drain offset region to be exposed at the surface of said semiconductor layer; and a drain buffer region of the second conductivity type formed between said drain offset region and said body region to adjoin said drain offset region and said body region, wherein said gate insulating film includes: a thin film part positioned at a side of said source region; and a thick film part positioned at a side of said drain contact region and having an end connected to said thin film part, and wherein said drain buffer region is in contact with said end of said thick film part and has a depth that is less than a depth of said drain offset region; and wherein said semiconductor layer further has an impurity region of the first conductivity type that is formed immediately under said drain buffer region.