Patent ID: 8546221

Claim:
A method for forming a semiconductor device, the method comprising: providing a single semiconductor substrate; forming a low side transistor over the single semiconductor substrate, wherein the low side transistor comprises a low side transistor source region, a low side transistor drain region, and a low side transistor gate; forming a high side transistor over the single semiconductor substrate from the same dopant implants and/or layers as the low side transistor, wherein the high side transistor comprises a high side transistor source region, a high side transistor drain region, and a high side transistor gate; forming a doped buried layer extending through the low side transistor and the high side transistor; forming at least one conductive structure; forming an isolating material that is located within the at least one conductive structure and along at least one sidewall of the at least one conductive structure; electrically coupling the low side transistor drain region with the semiconductor substrate via one or more of the at least one conductive structures; and electrically coupling the high side transistor source region with the semiconductor substrate via one or more of the at least one conductive structures.