Patent ID: 7970981

Claim:
A method of writing data in a flash memory system including a single-level cell (SLC) block and a multi-level cell (MLC) block, the flash memory system forming an address mapping pattern according to a log block mapping scheme, the method comprising: determining a writing pattern of data to be written in a log block; and selectively allocating one of the SLC block and the MLC block to the log block in accordance with the writing pattern of the data, wherein the writing pattern includes a sequential-writing pattern in which data are sequentially written into the log block in a unit of a page, and a random-writing pattern in which data are written into the log block out of sequence in a unit of a page, and wherein the MLC block is allocated to the log block when the writing pattern of the data is the sequential-writing pattern, and the SLC block is allocated to the log block when the writing pattern of the data is the random-writing pattern.