Patent ID: 6943121

Claim:
A method to make a microelectronic structure comprising: forming a first ILD layer having a first matrix and a first porogen, and a first thickness on a second ILD layer, the second ILD layer having a second thickness and a dielectric constant K higher than the first ILD layer where the second thickness is equal to or greater than the first thickness; forming an opening in a first ILD layer and in a second ILD layer, the opening having a line portion in the first ILD layer and a via portion in the second ILD layer; forming a conductive layer in the line portion in the first ILD layer and in the via portion in the second ILD layer; after forming the conductive layer, decomposing at least a portion of the first porogen of the first ILD layer leaving the second ILD layer structurally intact and forming a first porogen decomposition of the first ILD layer; and removing the first porogen decomposition of the first ILD layer from the first matrix to leave voids in the first ILD layer leaving the second ILD layer structurally intact.