Patent ID: 7868883

Claim:
An electro-optical device comprising: a substrate; a plurality of data lines and a plurality of scan lines disposed on the substrate to intersect each other; a plurality of pixels corresponding to intersections of the data lines and the scan lines; a sampling circuit including a plurality of sampling switches which apply image signals through the data lines to the plurality of pixels according to a sampling signal; a data line driver circuit which applies the sampling signal to the sampling circuit, the data line driver circuit includes: a shift register sequentially outputting transmission signals from a plurality of stages based on a clock signal having a predetermined period; a phase difference compensation circuit compensating for a phase difference between the clock signal having the predetermined period and an inverted clock signal having an inverted phase with respect to the clock signal; and a logic circuit implementing logical operation between the transmission signals and an enable signal; a first pair of terminals disposed on the substrate; a first pair of power supply lines electrically connecting between the first pair of terminals and one of the shift register, the phase difference compensation circuit, and the logic circuit, the first pair of power supply lines supplying a first constant voltage for driving the one of the shift register, the phase difference compensation circuit, and the logic circuit; a second pair of terminals disposed on the substrate different from the first pair of terminals; and a second pair of power supply lines different from the first pair of power supply lines, the second pair of power supply lines electrically connecting between the second pair of terminals and one other of the shift register, the phase difference compensation circuit, and the logic circuit, the second pair of power supply lines supplying a second constant voltage for driving the one other of the shift register, the phase difference compensation circuit, and the logic circuit, the first and second constant voltages being substantially a same potential, and wherein the first pair of power supply lines and the second pair of power supply lines each includes a high potential power supply line and a low potential power supply line.