Patent ID: 8294158

Claim:
A thin film transistor (TFT) comprising: a substrate; a semiconductor layer disposed on the substrate and including source and drain regions, each having a first metal catalyst crystallization region and a second metal catalyst crystallization region, wherein the first metal catalyst crystallization region is disposed under the second metal catalyst crystallization region, wherein a grain size and structure of crystal grains of the first metal catalyst crystallization region differs from a grain size and structure of crystal grains of the second metal catalyst crystallization region, and a channel region having the second metal catalyst crystallization region; a gate electrode disposed in a position corresponding to the channel region of the semiconductor layer; a gate insulating layer interposed between the semiconductor layer and the gate electrode to electrically insulate the semiconductor layer from the gate electrode; and source and drain electrodes electrically insulated from the gate electrode and electrically connected to the source and drain regions, respectively, wherein the second metal catalyst crystallization region directly covers a top surface, a first side surface, and a second side surface of the first metal catalyst crystallization region in the source and drain regions.