Patent ID: 7642651

Claim:
An integrated circuit comprising: a conductive plug having an upper surface, the conductive plug formed in a lower insulating layer and having a first width; a first conductive line having a lower portion, the first conductive line formed over the conductive plug; and a second conductive line separated from the first conductive line by a length of separation of less than about 110 nm, wherein the first width of the conductive plug is greater than the length of separation between the first conductive line and the second conductive line; and an isolation layer formed between the conductive plug and the first and second conductive lines, the isolation layer comprising an opening through which the lower portion of the first conductive line extends to make electrical contact with the upper surface of the conductive plug, the opening having a second width smaller than the first width of the conductive plug, wherein the isolation layer extends over an upper surface of the lower insulating layer between the conductive plug and adjacent conductive plugs in the lower insulating layer and electrically isolates one or more outer regions of the upper surface of the conductive plug from other nearby conductive lines.