Patent ID: 7924635

Claim:
A solid-state memory system comprising: a volatile memory for writing and reading data; a non-volatile memory for writing and reading data; a memory controller for communicating with the volatile memory and non-volatile memory to write and read data therein, the memory controller being configured a) to receive the data read from the non-volatile memory in response to a data read request, b) to provide the received data to the volatile memory to be written thereinto in response to a data write request, c) to perform both a) and b) in response to a data transfer request where the data transfer request is in response to a determination result whether the volatile memory has an available space, and d) to transfer, upon determination of insufficient space in the volatile memory, at least a portion of data stored in the volatile memory to the non-volatile memory where the portion of data transferred is most stale; and a bus for coupling the memory controller to the volatile memory and the non-volatile memory.