Patent ID: 7352826

Claim:
An analog delay circuit to impart a group delay in an analog input signal, the analog delay circuit comprising: an input stage to receive the analog input signal; an output stage to provide the analog output signal substantially comprising a version of the analog input signal delayed according to the group delay; and an intermediate stage comprising: a capacitor to impart at least a portion of the group delay to the analog output signal; and a buffer circuit coupled between the capacitor and the input stage to substantially remove at least a portion of a capacitive load at an input to the intermediate stage; a first capacitor coupled to the first differential input terminal through a first buffer circuit; a second capacitor coupled to the second differential input terminal through a second buffer circuit; and a differential amplifier to provide a differential output signal to the output stage in response to a differential input signal applied to the first and second differential input terminals; wherein the differential amplifier comprises a first DC current source and wherein the first and second buffer circuits each comprises a second DC current source having a magnitude exceeding a magnitude of first DC current source.