Patent ID: 7226807

Claim:
A method of production of a circuit board utilizing electroplating comprising the steps of: forming through holes in an insulating board clad on its surface with a metal foil, forming a first electroless plating layer on said metal foil and at the inside walls of said through holes, forming first plating resist patterns on said first electroless plating layer so as to expose only first predetermined locations, using said first electroless plating layer as a power feed layer for electroplating to form a first electroplating layer on the first electroless plating layer exposed at said first predetermined locations to form circuit patterns, removing said first plating resist patterns to expose the underlying first electroless plating layer, removing said exposed first electroless plating layer and the underlying metal foil to expose the surface of said insulating board, forming a second electroless plating layer on the surface of said exposed insulating board and on said circuit patterns including the insides of said through holes, forming second plating resist patterns so as to expose only second predetermined locations of said second electroless plating layer and said circuit patterns, removing said second electroless plating layer exposed at said second predetermined locations, using said second electroless plating layer under said second plating resist pattern as a power feed layer for electroplating to form a second electroplating layer on said circuit patterns exposed at said second predetermined locations, removing said second plating resist patterns to expose the underlying second electroless plating layer, and removing said exposed second electroless plating layer.