Patent ID: 7275148

Claim:
A data processing system comprising: a memory for storing operands; at least one general purpose register, wherein the memory does not include the at least one general purpose register; and processor circuitry for executing one or more instructions, at least one of the one or more instructions for transferring data elements between the memory and the at least one general purpose register wherein one of the one or more instructions specifies: (a) a first offset between data elements within a first portion of successive data elements in the memory; (b) a first number of data elements to be transferred between the memory and the at least one GPR; and (c) a second offset between the first portion and a second portion of data elements in the memory, wherein the data processing system further comprises a first general purpose register and a second general purpose register wherein the one of the one or more instructions transfers data elements between the memory and both the first general purpose register and the second general purpose registers in response to executing one of the one or more instructions, and wherein the one of the one or more instructions further specifies a total number of data elements to be transferred between the memory and both the first general purpose register and the second general purpose register.