Patent ID: 8502268

Claim:
A Laterally Diffused Metal Oxide Semiconductor (LDMOS) structure, comprising a gate, a source, a drain and a bulk, wherein the gate comprises a polycrystalline silicon layer, the source comprises a P-implanted layer, and the drain comprises the P-implanted layer, a P-well layer, and a deep P-well layer, wherein the P-implanted layer is located within the P-well layer, and the P-well layer is located within the deep P-well layer, wherein a bulk terminal is connected through the P-implanted layer, the P-well layer, the deep P-well layer, and a P-type buried layer to the bulk, wherein the drain has a plurality of drain regions, the source has a plurality of source regions, the gate has a plurality of gate regions, wherein each source region is surrounded by four drain regions, each drain region is surrounded by four source regions, and each gate region is located between a source region and a drain region.