Patent ID: 8347172

Claim:
A method for defining a plurality of check nodes and variable nodes from a parity check matrix and performing a decoding process based on the nodes, comprising: comparing arrangement reference values of variable-check messages transmitted from the variable node to the check node, selecting the variable-check message with the greatest arrangement reference value, and transmitting the selected variable-check message to the first variable node from the first check node; updating a check-variable message transmitted from the first check node to the second variable node, regarding the second variable nodes connected to the first check node; and generating an arrangement reference value of the variable-check message transmitted from the second variable node to the second check node based on the updated check-variable message, regarding the second check nodes connected to the second variable node, wherein the variable-check messages are schedules in a descending order of a difference between arrangement reference values before and after updating the variable-check messages message transmitted from the variable node to the check node.