Patent ID: 8273631

Claim:
A method of fabricating an n-channel metal-oxide-semiconductor transistor, comprising: providing a silicon substrate; forming a gate structure on the silicon substrate, the gate structure comprising: a gate insulation layer on the silicon substrate, a conductive layer on the gate insulation layer, and a spacer on a sidewall of the conductive layer; forming a source/drain region at each of two sides of the gate structure in the silicon substrate by introducing a dopant thereinto using the gate structure as a mask; performing an annealing process on the silicon substrate; performing an epitaxial process to form an epitaxial silicon layer covering the source/drain region and not covering the silicon substrate masked by the spacer; performing a plasma surface treatment on the epitaxial silicon layer to allow the epitaxial silicon layer to absorb a layer of fluorine ions on a surface thereof; forming a nickel layer covering the layer of fluorine ions and the epitaxial silicon layer; and performing a rapid thermal process to allow the nickel layer to react with the epitaxial silicon layer and the silicon substrate under the epitaxial silicon layer to form a nickel silicide layer.