Patent ID: 7821291

Claim:
A calibration circuit comprising: a driver circuit having a plurality of calibration transistors configured to receive a plurality of adjustment signals, the driver circuit operable to generate a first output signal having a value corresponding to the plurality of adjustment signals; a comparator circuit coupled to the driver circuit to receive the first output signal, the comparator circuit operable to generate a first control signal determined by the difference between the value of the first output signal and a predetermined value, and the comparator circuit further operable to generate a second control signal determined by whether the first output signal is greater than the predetermined value; and a binary searcher coupled to receive the first and second control signals, and operable to select either a relatively larger binary step count or a relatively smaller binary step count in response to the first control signal and determine the upwards or downwards direction of the selected binary step count in response to the second control signal, the binary searcher further operable to adjust the plurality of calibration transistors in accordance with the selected binary step count and in the selected direction of the count.