Patent ID: 7216284

Claim:
A content addressable memory (CAM) including an array of a plurality of memory cells arranged in a plurality of words, said CAM comprising: a data portion of a CAM array, said data portion including a plurality of data words, each of said data words including a plurality of CAM cells connected to a word match line; an error correction portion of said CAM array, said error correction portion including a plurality of error correction cells, each of data words having at least one corresponding error correction cell in said error correction portion identified for storage of an error correction bit, each of said error correction cells identified for one of said data words and being connected to an error correction match line, an error correction match line being included for each said word match line; and a word match line precharge precharging each said word match line responsive to a corresponging said error correction match line, whereby one said word match line is precharged high responsive to said corresponding said error correction match line being high at a selected time.