Patent ID: 7573285

Claim:
A method for testing a semiconductor wafer using a multi-point probing process, the method comprising: providing a semiconductor wafer, including one more patterns thereon; applying an operating voltage on a gate of a test pattern device on the semiconductor wafer using one or more probing devices; measuring a first leakage current associated with the operating voltage; determining if the measured first current is higher than a first predetermined amount, categorizing the device as an initial failure if the measured first current is higher than the first predetermined amount; storing a first indication associated with the initial failure if the device has been categorized as the initial failure; applying a second voltage to the gate of the test pattern device of the semiconductor wafer if the measured first current is below the first predetermined amount; measuring a second leakage current associated with the second voltage using one or more probing devices; categorizing the device as an extrinsic failure if the second measured leakage current is higher than a second predetermined amount; storing a second indication associated with the extrinsic failure if the device has been categorized as the extrinsic failure; categorizing the device as a good device if the second measured leakage current is below the second predetermined amount; and storing a third indication associated with the good device, if the device has been categorized as the good device.