Patent ID: 7763517

Claim:
A method of forming a non-volatile memory cell, comprising: providing a substrate; forming a stacking structure on the substrate, the stacking structure at least comprising an oxide-nitride-oxide layer (ONO layer), a polysilicon layer thereon and a stopping layer on the polysilicon layer, wherein the stopping layer comprises super silicon rich oxide (SSRO); patterning the stacking structure to form a plurality of separated stacking units, each two stacking units having an aperture therebetween; forming a source region and a drain region buried in the substrate at two sides of the each stacking unit; forming an oxide layer in the aperture and over the stacking units; and performing a chemical mechanical polishing (CMP) process until the stopping layer is exposed to remove the oxide layer over the stacking units and outside the aperture, wherein the thickness of the stopping layer is less than 300 angstroms.