Patent ID: 7986621

Claim:
A signaling speed module for setting the signaling rate for (N) data storage devices, comprising: an EEPROM memory device encoded with a pre-determined signaling rate; (N) power failure warning logic modules; wherein the (n)th power failure warning logic module comprises a plurality of device control code bits for the (n)th data storage device, wherein said plurality of device control code bits indicate the signaling rate for the (n)th data storage device, and wherein (n) is greater than or equal to 0 and less than or equal to (N−1); wherein: device control code bits “111” indicate use of a 1 Gb/second signaling rate; device control code bits “110” indicate use of a 2 Gb/second signaling rate; device control code bits “101” indicate use of a 4 Gb/second signaling rate; device control code bits “100” indicate use of an 8 Gb/second signaling rate.