Patent ID: 8312405

Claim:
A method of placing input/output blocks in an integrated circuit device, the method comprising: receiving a circuit design having a plurality of input/output blocks to be placed at input/output sites of the integrated circuit device; modifying, for each input/output block of the circuit design, an input/output standard for the input/output block to include bus information; defining input/output buses, wherein each input/output bus comprises input/output blocks having a common bus identification; identifying an input/output block which is associated with a predetermined location, wherein the input/output block which is associated with a predetermined location is assigned a new input/output standard; defining new input/output buses based upon the new input/output standard; assigning, for each input/output block of the circuit design, an input/output site for the input/output block based upon the new input/output buses; and generating, using a computer, an input/output placement for the input/output blocks of the circuit design.