Patent ID: 7725810

Claim:
A block decoder, comprising: a first input and at least a second input for respectively receiving a first data stream to be decoded and a second data stream to be decoded distinct from said first data stream; an input memory with storage elements configured to store at least one block of data from to first data stream and at least one block of data from the second data stream; a block decoding unit configured to process, from the input memory, the blocks of data from the first and second data streams to be decoded; and a control unit to multiplex the blocks of data from the first data stream and the blocks of data from the second data stream as input into the block decoding unit, by saving and reading said blocks in the storage elements of the input memory, wherein a sum of respective maximum bit rates for each of the first and second data streams is less than M, where M indicates a maximum input bit rate for the block decoding unit; and the input memory includes at least four storage elements, each configured to store a block of data to be decoded, and used by order of priority or in circular manner to store the data to be decoded from the first data stream and the data to be decoded from the second data stream.