Patent ID: 8730412

Claim:
A display apparatus, comprising: a housing; a display panel, disposed upside down in the housing and configured for receiving a video data stream comprising a plurality of video data sub-streams of an image, a first video data sub-stream of the video data sub-streams being configured for forming a top portion of the image, an m-th video data sub-stream of the video data sub-streams being configured for forming a bottom portion of the image, m being an positive integer, the display panel comprising: a plurality of data lines; a plurality of scan lines, comprising a first scan line and an m-th scan line; and a timing controller, disposed at a side apart from the first scan line, when the image is displayed, the timing controller controls scanning the m-th scan line first to display the m-th video data sub-stream, and scanning the first scan line last to display the first video data sub-stream, the timing controller further performs a left-right mirroring process for the image; and a control system, disposed in the housing, for transmitting the video data stream to the display panel and accessing the video data sub-streams to perform an up-down inversing process for the image; wherein the control system comprises: a storage unit for receiving the video data stream, wherein each of the video data sub-streams of the video data stream corresponds to one row of the pixel units of the pixel array respectively, such that the video data sub-streams are stored into the storage unit in sequence according to a sequence of the rows of the pixel array; and a control unit, coupled to the storage unit for outputting the video data sub-streams in an inverse sequence according to a sequence of the video data sub-streams corresponding to the rows of the pixel array to complete the up-down inversing process for the image; wherein the timing controller has a line register coupled to the control system, the line register is configured for receiving the video data sub-streams outputted from the control unit, and each of the video data sub-streams has a plurality of video data corresponding to the pixel units of a corresponding row of the pixel array respectively, the timing controller outputs the video data in each of the video data sub-streams in a sequence opposite to the sequence of the columns of the pixel units corresponding to the each of the video data in each of the video data sub-streams to complete the left-right mirroring process for the image.