Patent ID: 7383485

Claim:
A min*− (min-star-minus) circuit, the circuit comprising: a subtraction block that is operable to calculate a difference between a first input value and a second input value such that the difference comprises a first plurality of LSBs (Least Significant Bits) of the difference, a second plurality of LSBs of the difference, and an MSB (Most Significant Bit); a first log correction factor block that is operable to determine a first log correction factor based on the first plurality of LSBs of the difference; a second log correction factor block that is operable to determine a second log correction factor based on the first plurality of LSBs of the difference; a log correction factor MUX (Multiplexor) that is operable to receive the first log correction factor and the second log correction factor as inputs and whose selection is governed by the MSB of the difference; an input value selection MUX that is operable to receive the first input value and the second input value as inputs and whose selection is governed by the MSB of the difference; wherein an output of the input value selection MUX is a minimum input value selected from among the first input value and the second input value; wherein an output of the log correction factor MUX is a final log correction factor; and wherein a final min*− resultant, that is based on the first input value and the second input value, comprises the minimum input value and the final log correction factor.