Patent ID: 7113030

Claim:
A class-D power amplifier comprising: a summing circuit, which outputs an error signal by summing an input signal with one of a first negative feedback signal and a second negative feedback signal; an integral control circuit, which outputs an integral signal by integrating the error signal; a feedback control circuit, which generates and outputs a switching control signal whose logic state changes according to the logic state of an abnormal state detecting signal generated in response to a monitoring signal; a switching circuit, which switches the integral signal to one of a sub-loop and a steady-state loop in response to the switching control signal; a sub-negative feedback circuit, which receives and processes the integral signal and generates and outputs a sub-negative feedback signal as the first negative feedback signal; a controlled circuit, which receives and modulates the integral signal into a pulse width modulation (PWM) signal and generates an output signal, wherein the monitoring signal is the output signal or a modulated version of the output signal; and a steady-state negative feedback circuit, which receives and processes the output signal from the controlled circuit and generates and outputs a steady-state negative feedback signal as the second negative feedback signal.