Patent ID: 8723185

Claim:
A method, comprising: providing a wafer having opposite first and second sides, wherein the wafer has a silicon surface; forming a layer over the first side of the wafer, the layer having a coefficient-of-thermal-expansion (CTE) that is higher than that of the wafer; forming a buffer layer having a first buffer side and a second buffer side, the first buffer side disposed on the second side of the wafer; forming a III-V family layer on the second buffer side, the III-V family layer having a CTE that is higher than that of the wafer; forming a further III-V family layer over the III-V family layer, the further III-V family layer having a different material composition than the III-V family layer, and forming a source/drain component of a transistor in the further III-V family layer, wherein the source/drain component extends partially into the III-V family layer.