Patent ID: 7763531

Claim:
A method of fabricating an integrated circuit structure, said method comprising: forming a polysilicon layer above a semiconductor layer; performing an implant process in order to form at least one of an oxidation-enhancing portion and an oxidation-inhibiting portion of said polysilicon layer; forming a plurality of mandrels in said polysilicon layer, said mandrels being approximately equal in size and comprising at least a first mandrel in said one of said oxidation-enhancing portion and said oxidation-inhibiting portion and a second mandrel not in said one of said oxidation-enhancing portion and said oxidation-inhibiting portion; performing an oxidation process to form first oxide sidewalls on said first mandrel and second oxide sidewalls on said second mandrel, said first oxide sidewalls having a first width and being separated by a first distance and said second oxide sidewalls having a second width and being separated by a second distance, wherein as a result of said implant process and said oxidation process, said first width is different from said second width and said first distance is different from said second distance; and transferring, into said semiconductor layer, images of said first oxide sidewalls and said second oxide sidewalls to form a pair of first semiconductor fins and a pair of second semiconductor fins, respectively, each of said first semiconductor fins in said pair of first semiconductor fins having said first width and being separated by said first distance and each of said second semiconductor fins in said pair of second semiconductor fins having said second width and being separated by said second distance.