Patent ID: 7394870

Claim:
A receiver for receiving a signal including digital data formed of packets transmitted from a transmitter, and for aligning a phase of a receiver clock with a phase of a transmitter clock, the receiver comprising: a radio frequency (RF) receiver section for receiving the transmitted digital data as in-phase (I) and quadrature (Q) components of a baseband signal; a sampling device for digitizing each of the in-phase (I) and quadrature (Q) components; a clock recovery section configured to: correlate the in-phase (I) and quadrature (Q) components with information contained in each of the packets and for generating a first signal to align the phase of the receiver clock with the phase of the transmitter clock based on the correlation of the in-phase (I) and quadrature (Q) components with the information contained in each of the packets; and generate a second signal after the phase of the receiver clock is aligned with the phase of the transmitter clock, the second signal for controlling the sampling device such that the in-phase (I) and quadrature (Q) components are sampled at a symbol rate; and a multiplexer (MUX) having inputs for receiving a system clock signal and a symbol clock signal, an output electrically coupled to the sampling device, and a select line, the multiplexer (MUX) configured to multiplex a system clock signal and a symbol clock signal to the output of the multiplexer (MUX); wherein the sampling device comprises a pair of analog-to-digital converters (ADC), each for sampling one of the in-phase (I) and quadrature (Q) components, the pair of analog-to-digital converters adapted to be clocked by the output of the multiplexer (MUX), and wherein the second signal controls the sampling device by controlling the select line of the multiplexer (MUX) to select the symbol clock signal to be provided at the output of the multiplexer (MUX) such that the analog-to-digital converters (ADC) sample the in-phase (I) and quadrature (Q) components at the symbol rate.