Patent ID: 7507603

Claim:
A method of fabricating a semiconductor package, comprising the steps of: a) providing a leadframe strip having a plurality of leadframes formed therein, each of the leadframes including: a die pad having opposed top and bottom surfaces, and a peripheral edge; and a plurality of leads disposed in spaced relation to the die pad, each of the leads having opposed top and bottom surfaces and an inner end; b) applying plating layers to the bottom surface of the die pad and the bottom surfaces of the leads in each of the leadframes such that the plating layers serve as an etch mask; c) attaching semiconductor dies to respective ones of the die pads; d) electrically connecting the semiconductor dies to the leads of respective ones of the leadframes; e) forming a plurality of package bodies on the leadframe strip to at least partially encapsulate the leadframes and the semiconductor dies; and f) etching away portions of the leadframe strip which extend between the leadframes and are not covered by the plating layers and the package bodies to separate the leadframes from each other.