Patent ID: 8509368

Claim:
Receive path circuitry, comprising: bandpass sampling receiver circuitry configured to receive a sampling clock and to sample a combined radio frequency (RF) signal using the sampling clock to produce a digital output signal, the combined RF signal including a RF input signal and an injected calibration tone, the calibration tone having known characteristics, and the sampling clock including associated source clock jitter phase modulation Θ(t) that induces a first jitter phase modulation M 1 Θ(t) on the calibration tone and a second jitter phase modulation M 2 Θ(t) on the RF input signal of the digital output signal from the bandpass sampling receiver circuitry such that received signals of all frequencies have the same induced second jitter phase modulation M 2 Θ(t) within a common Nyquist zone; and processing circuitry coupled to receive and process the digital output signal from the bandpass sampling receiver circuitry by using the known characteristics of the calibration tone to estimate the induced first jitter phase modulation M 1 Θ(t) on the calibration tone and to identify and compensate for the source clock jitter phase modulation Θ(t) in the digital output signal from the bandpass sampling receiver circuitry based on the estimated induced first jitter phase modulation M 1 Θ(t); where the induced first jitter phase modulation is M 1 Θ(t) having a first integer modulation scale factor M 1 , and where the induced second jitter phase modulation is M 2 Θ(t) having a second integer modulation scale factor M 2 .