Patent ID: 8756401

Claim:
A method for controlling a non-volatile semiconductor memory system including a non-volatile semiconductor memory having a first group of physical blocks and a second group of physical blocks, comprising: writing a first address translation table by entering a plurality of entries for a first zone on a random access memory in the non-volatile semiconductor memory system, the first address translation table indicating a relationship between a first group of logical blocks and the first group of physical blocks; checking whether a logical block address corresponds to the first zone, the logical block address being received from a host system requesting an access to the non-volatile semiconductor memory system; and if the logical block address does not correspond to the first zone, writing a second address translation table by entering a plurality of entries for a second zone on the random access memory, the second address translation table indicating a relationship between a second group of logical blocks and the second group of physical blocks, wherein the second group of physical blocks does not overlap with the first group of physical blocks, wherein when the second address translation table is written on the random access memory, at least one part of the first address translation table is deleted from the random access memory.