Patent ID: 7485569

Claim:
A method of fabricating a printed circuit board having embedded chips, comprising the steps of: preparing a circuit layer having a circuit pattern on at least one of an upper surface and a lower surface thereof; forming an first insulating layer having a via hole filled with conductive ink; preparing a copper clad laminate having a hollow portion to receive a chip; preparing a material layer having an second insulating layer and a copper foil layer; pre-laminating the circuit layer, the chip, the copper clad laminate, and the material layer on the insulating layer; and compressing the pre-laminated layers to connect the chip to the circuit pattern of the circuit layer and the copper foil layer of the material layer; wherein the step of forming the first insulating layer comprises the steps of: preparing a substrate having a cured resin layer, non-cured resin layers applied on both an upper and a lower surface of the cured resin layer, and protective films applied on the non-cured resin layers; forming a via hole at the predetermined position on the substrate; filling the via hole with conductive ink; and removing the protective films.