Patent ID: 7683458

Claim:
A wafer comprising: an electrically conductive interconnect extending from a frontside surface of the wafer to a backside surface of the wafer, wherein at least the frontside surface is substantially flat, and wherein the electrically conductive interconnect comprises a hole formed through a bond pad in the wafer, the hole extending from the frontside surface of the wafer to the backside surface of the wafer; a dielectric disposed on a sidewall of the hole; a first conductive material disposed on the dielectric, wherein the first conductive material contacts the bond pad; and a second conductive material filling the hole, wherein the second conductive material extends from the frontside surface to the backside surface and is electrically coupled to the bond pad via the first conductive material, and wherein the second conductive material is co-planar or recessed with respect to the frontside surface and surrounded by a dielectric passivation material at the frontside surface.