Patent ID: 7955930

Claim:
A manufacturing method of a semiconductor device comprising: forming a trench in a main surface of a semiconductor substrate; forming a first insulation layer to cover an inner wall of the trench and the main surface of the semiconductor substrate; forming a conductive layer on said main surface so as to fill said trench; forming a potential fixing electrode filling said trench and having an expanding part expanding on said main surface so that a width thereof is larger than that of said trench, and forming a gate electrode in another trench on said main surface by patterning said conductive layer; forming at least two contact holes in the first insulation layer respectively on two opposite sides of the trench, each contact hole exposing the main surface of the substrate; forming a second insulation layer so as to cover said gate electrode and expose a whole upper surface of said expanding part of said potential fixing electrode between the contact holes; and forming a main electrode so as to be electrically insulated from said gate electrode and in physical contact with the whole upper surface of said expanding part of said potential fixing electrode.