Patent ID: 6859849

Claim:
An architecture capable of adaptively accessing data and instructions having a plurality of predefined data transfer levels in which a current data transfer level is used for accessing data and instructions, comprising: a first module capable of effecting a burst transfer for continuously sending or receiving a data string having a fixed burst length for access; a second module for storing data and instructions wherein each data transfer level corresponds to a length of a continuous data transfer via an interface between the first and the second modules; and an adaptive controller for dynamically adjusting the current data transfer level based on continuous data transfers actually occurred as the first module accesses data and instructions, wherein, in the data transfer levels corresponding to the actually occurred continuous data transfers, if a number of actually occurred data transfer levels higher than the current data transfer level is more than that of actually occurred current data transfer levels by a first threshold, the data transfer level is incremented; otherwise, if a number of actually occurred data transfer levels lower than the current data transfer level is more than that of actually occurred current data transfer levels by the first threshold, the data transfer level is decremented.