Patent ID: 8115111

Claim:
A multilayer printed wiring board comprising: a multilayered structure comprising a plurality of conductor circuit layers and a plurality of interlaminar insulative layers, the interlaminar insulative layers including an outermost interlaminar insulative layer formed as an outermost layer of the interlaminar insulative layers, the conductor circuit layers including an outermost conductor circuit layer formed over the outermost interlaminar insulative; a filled-viahole formed in the outermost interlaminar insulative layer and comprising at least one metal plating filling and completely closing a hole formed through the outermost interlaminar insulative layer such that the metal plating of the filled-viahole extends out of the hole and forms a substantially flat surface; and a plurality of solder bumps including a first solder bump formed on the substantially flat surface of the filled-viahole and a second solder bump formed on a surface portion in the outermost conductor circuit layer, wherein the substantially flat surface of the filled-viahole is leveled substantially at the same height as the surface portion of the outermost conductor circuit layer.