Patent ID: 7829415

Claim:
A method of fabricating a semiconductor device, comprising: forming a plurality of pillar patterns on a substrate; filling a gap between the pillar patterns with a first conductive layer; forming a first hard mask layer pattern over the pillar patterns adjacent in a first direction, wherein the first hard mask extends in the first direction as a line type mask pattern for forming a bit line; forming a trench by etching the first conductive layer using the first hard mask layer pattern as an etch barrier; removing the first mask layer pattern; filling the trench with an insulation layer; forming a second hard mask pattern over the pillar pattern adjacent in a second direction that crosses the first direction, the second mask layer pattern extending in the second direction and crossing the removed first mask layer pattern; and forming a gate electrode surrounding the pillar patterns by etching the remaining first conductive layer using the second hard mask layer pattern as an etch barrier.