Patent ID: 7705662

Claim:
A temperature-compensated reference-voltage generator comprising: a first stage that generates a complementary-to-absolute-temperature current that increases as temperature decreases; a second stage that generates a proportional-to-absolute-temperature current that increases as temperature increases; a summing resistor that receives both the complementary-to-absolute-temperature current from the first stage and the proportional-to-absolute-temperature current from the second stage, the summing resistor generating a summing voltage that is less dependent on temperature than either the complementary-to-absolute-temperature current or the proportional-to-absolute-temperature current; a final voltage divider, in the second stage, that generates a reference voltage that includes the summing voltage; an output transistor, coupled to the final voltage divider, for driving current to an output node, the output node being a node between the output transistor and the final voltage divider, the output node being driven by the output transistor to maintain the reference voltage on the output node; and a final op amp having an output that drives a gate of the output transistor, the final op amp having a first input connected to a first sensing node in the second stage, and a second input connected to a second sensing node in the second stage; wherein the first stage further comprises: a first reference transistor that generates a first reference voltage that is complementary-to-absolute-temperature; a first voltage divider coupled to the first reference voltage and generating a first compare voltage; a first op amp that receives the first compare voltage and generates a bias voltage; and a ctat current mirror transistor that receives the bias voltage from the first op amp, and generates the complementary-to-absolute-temperature current applied to the summing resistor, wherein the ctat current minor transistor is connected to the summing resistor; a first current minor transistor that receives the bias voltage from the first op amp and generates a first current; wherein the first current minor transistor is coupled to the first reference transistor and to the first voltage divider; a second current minor transistor that receives the bias voltage from the first op amp and generates a second current; a compare resistor that receives the second current and generates a second compare voltage that is applied to the first op amp, the first op amp comparing the first compare voltage to the second compare voltage to generate the bias voltage; wherein the first reference transistor is a bipolar transistor having a base and a collector tied together and an emitter connected to the first reference transistor and to the first voltage divider; wherein an emitter voltage of the first reference transistor is a voltage that falls with increasing absolute temperature, whereby the reference voltage includes the summing voltage that sums the complementary-to-absolute-temperature and proportional-to-absolute-temperature currents.