Patent ID: 7791850

Claim:
A ground fault circuit interrupter (GFCI) control circuit giving an indicator or tripping at the end of life, comprising: main input lines that pass through a core around which an inductor is wound; a first capacitor and a second capacitor connected in series with each other, the first and second capacitors connected in parallel with the inductor; a common node between the first capacitor and the second capacitor, the common node connected to a negative end of a power supply via a first resistor; one end of the inductor connected to a first pin of a Single-Chip Microcomputer (SCM) via a third capacitor and a second resistor connected in series, and the other end of the inductor connected to a second pin of the SCM for detecting electric leakage; a third pin of the SCM connected to a third resistor, the third resistor connected to ground via a fourth capacitor for driving a first silicon controlled rectifier, the first silicon controlled rectifier connected in series with first, second, third and fourth diodes and a tripping relay; a power pin of the SCM connected to a cathode of a first Zener diode via a fourth resistor, an anode of the first Zener diode connected in series to an anode of a fifth diode; a cathode of the fifth diode connected to ground via an anode of a first light-emitting diode; the power pin of the SCM further connected to a cathode of a second Zener diode, an anode of the second Zener diode connected in series with a fifth resistor by an end of the fifth resistor, another end of the fifth resistor connected to a base of a transistor, the transistor having an emitter connected to the negative end of the power supply and a collector connected to the anode of the first light-emitting diode via a sixth resistor; and a reset circuit connected to the main power supply and connected in series with a switch via a fifth capacitor and a seventh resistor connected in parallel, another end of the switch connected to a control pin of a second silicon controlled rectifier, the control pin of the second silicon controlled rectifier connected in parallel with an eighth resistor and a sixth capacitor to form an instant trigger circuit, wherein the second silicon controlled rectifier is connected to a self-holding relay.