Patent ID: 6943453

Claim:
A semiconductor device comprising: a semiconductor substrate; a plurality of element regions formed in the semiconductor substrate and defined by an element separation region; a plurality of conductor plugs which are embedded in an interlayer insulation film that covers the semiconductor substrate having the element regions formed therein, the plurality of conductor plugs being connected to said respective element regions or conductor layers connected to said respective element regions; and a plurality of wiring layers which are formed on the interlayer insulation film and connected to said respective conductor plugs, wherein the conductor plugs are arranged on a straight line orthogonal to a longitudinal direction of the wiring layer in the same pitch as the wiring layers in such a manner that the straight line and upper surfaces of the conductor plugs are superposed each other, and when the conductor plugs are viewed in a cross section parallel to a main surface of the semiconductor substrate and a distance which is between those two edge points of each of the conductor plugs where a split line which passes through a center of each of the conductor plugs passes is defined as a contact diameter, the contact diameter has three or more maximum values and three or more minimum values while the split line is rotated in the cross section by 360 degrees.