Patent ID: 7822590

Claim:
A computer implemented method for implementing, controlling, or interfacing with circuit simulators, comprising: using a processor configured for: executing a circuit simulation of an electronic circuit by executing a generically defined independent parameterized measurement block reusable for simulating a plurality of circuit designs, in which the generically defined independent parameterized measurement block is independent from an interference of at least a second generically defined independent parameterized measurement block; generating a result set from the circuit simulation; and associating a display attribute with the result set, in which the display attribute comprises information describing how data from the result set is to be displayed, and the display attribute is carried, by an output of the generically defined independent parameterized measurement block, with the result set to allow reproducing a display of the result set, and re-determining a characteristic of the electronic circuit design within a second context of at least one of the plurality of circuit designs, after closing the circuit simulation without re-executing the circuit simulation, in which the characteristic was previously determined within a first context of the at least one of the plurality of circuit designs, and the first context or the second context comprises a level of compression, and the characteristic comprises a compression point on a power transfer curve of the electronic circuit design at one or more levels of compression.