Patent ID: 7589027

Claim:
A method of manufacturing a semiconductor device, method: forming a first gate oxide layer on a semiconductor substrate in which a core region and an input/output region are defined; selectively removing the first gate oxide layer of the core region; forming a second gate oxide layer under the first gate oxide layer of the input/output region and on the semiconductor substrate of the core region, wherein the second gate oxide layer is formed with a thickness almost to a target thickness; performing nitrogen annealing to form a nitrogen-rich oxide layer under the second gate oxide layer; performing an additional thermal process to diffuse nitrogen segregated on an interface between the first gate oxide layer and the second gate oxide layer of the input/output region to a surface of the semiconductor substrate, wherein any difference between the thickness of the second gate oxide layer and the target thickness is compensated for during performing the additional thermal process; and discharging impurities generated during the additional thermal process to an outside, wherein discharging impurities generated during the additional thermal process to the outside comprises performing a rapid thermal process under an inert atmosphere.