Patent ID: 7495781

Claim:
A method of examining a patterned structure formed on a semiconductor wafer using an optical metrology model, the method comprising: a) creating an optical metrology model for the patterned structure, the optical metrology model having profile parameters, material refraction parameters, and metrology device parameters; b) defining ranges of values for the profile parameters, material refraction parameters, and metrology device parameters; c) obtaining one or more measured diffraction signals of the patterned structure; d) optimizing the optical metrology model to obtain an optimized optical metrology model using the ranges of values defined in b) and the one or more measured diffraction signals of the patterned structure obtained in c); e) for at least one parameter from amongst the material refraction parameters and the metrology device parameters, setting the at least one parameter to a fixed value within the range of values for the at least one parameter; and f) determining at least one profile parameter of the patterned structure using the optimized optical metrology model and the fixed value for the at least one parameter.