Patent ID: 8902205

Claim:
An apparatus, comprising: a plurality of MEMS devices arranged in an array; and a control matrix comprising only n-type or only p-type transistors coupled to the plurality of MEMS devices to communicate data and drive voltages to the MEMS devices, wherein the control matrix, for each MEMS device, comprises: a latch configured to maintain a difference in voltage levels on a first output terminal and a second output terminal, the latch comprising: a first pre-charge transistor and a first output terminal discharge transistor coupled to the first output terminal; a second pre-charge transistor and a second output terminal discharge transistor coupled to the second output terminal; and a pixel discharge transistor coupled to the first output terminal discharge transistor and the second output terminal discharge transistor; wherein the latch is configured such that a state of the first output terminal discharge transistor is controlled based on a voltage level of the second output terminal applied to a gate of the first output terminal discharge transistor.