Patent ID: 8761609

Claim:
A receiver comprising: an analog front end performing analog-to-digital conversion on a plurality of serial data streams received over an optical fiber to generate a digital signal vector, the analog front end sampling the plurality of serial data streams based on a sampling clock; a bulk chromatic dispersion equalizer applying a frequency domain equalization and producing a first equalized signal vector; a fast equalizer further equalizing the first equalized signal vector by applying a second filter, the fast equalizer producing a second filtered signal vector; a carrier recovery module demodulating the second filtered signal vector to generate a baseband signal vector; and a timing recovery circuit configured to: receive samples of the first equalized signal vector; generate a timing recovery phase error signal based on the samples, the timing recovery phase error signal representing a difference frequency between a local sampling clock and a transmit clock; measure a period of a timing recovery phase error; initialize a frequency register of a loop filter with an initial estimate of a frequency error based on the measured period, the initial estimate having a positive sign; determine whether the frequency error increases or decreases; and responsive to the frequency error increasing, re-initialize the frequency register with a second estimate of the frequency error, the second estimate having a negative sign; and generate the sampling clock based on a value in the frequency register.