Patent ID: 6973523

Claim:
A modem interface for transferring data between a high data rate interface and a wireless interface, the modem interface comprising: a plurality of parallel data highways having frames, each with sixteen time slots for transferring data, the plurality of parallel data highways outputting data to the high data rate interface and the wireless interface in selected time slots, each parallel data highway being at least partially dedicated to a separate function, wherein: a first parallel data highway using all sixteen of its time slots for transferring data to and from an external parallel data highway; a second parallel data highway using eight of its time slots to transfer data to and from a digital signal processor (DSP) and using eight of its time slots to interface with telephone interface components; and a third parallel data highway using nine of its time slots for high-level data link controlling (HDLC) controllers, using three of its time slots to transfer data to and from a second processor, and using four of its time slots for carrying data received and for transmission over the wireless interface, said transmission data being transmitted over four traffic channels; the second processor for controlling data transfer between the plurality of parallel data highways and sending data using a sub-plurality of the parallel data highways; the DSP processor sending data using a single one of the parallel data highways; one of the DSP and second processors slaved to the other of the DSP and second processors; and said two processors using said parallel data highways at the high data rate interface and thereby communicating at a high data rate using said parallel data highways.