Patent ID: 8493309

Claim:
A shift register circuit comprising: an input terminal, an output terminal, a first clock terminal, and a reset terminal, a first transistor for supplying a first clock signal inputted to the first clock terminal to the output terminal; a drive circuit for driving the first transistor by charging a control electrode of the first transistor based on a signal inputted to the input terminal, and discharging the control electrode of the first transistor based on a signal inputted to the reset terminal; a switching circuit for making the control electrode of the first transistor and the output terminal conductive based on the first clock signal in a state when the control electrode of the first transistor is discharged; an inverter having a node to which the control electrode of the first transistor is connected as an input node and activated by a second clock signal having a phase different from that of the first clock signal; and a second transistor for discharging the control electrode of the first transistor based on the output of the inverter.