Patent ID: 8389391

Claim:
A method for making a semiconductor device, comprising: providing a substrate of semiconductor material; forming an isolating oxide dielectric layer over the substrate; forming a form layer on the isolating oxide dielectric layer; forming trenches through the form layer and the isolating oxide dielectric layer, exposing portions of the surface of the substrate semiconductor material, wherein the trenches do not further expose the semiconductor material at any sidewall of the trenches; forming a stressor layer as vertical sidewalls along the one or more trenches; filling the trenches by epitaxial growth from the exposed portions to define active areas of the semiconductor material isolated by remaining portions of the isolating oxide layer; removing the form layer, thereby exposing portions of the active areas in elevated positions above a surface of the isolating oxide dielectric layer forming a gate dielectric over the exposed portions of the active areas; forming a gate electrode over the gate dielectric; and implanting dopant into source/drain portions of the active areas, wherein remaining portions of the isolating oxide dielectric layer are isolation structures between various active areas.