Patent ID: 7244641

Claim:
A method of forming a thin gate insulator layer for a dual gate insulator, metal oxide semiconductor field effect transistor (MOSFET) device, on a semiconductor substrate, comprising the steps of: providing a portion of said semiconductor substrate surrounded by insulator filled, shallow trench isolation (STI) regions, to be used as an active device region; forming a first insulator layer on said active device region; forming a patterned photoresist layer over said first insulator layer and at least a portion of said STI regions; etching said first insulator layer through said patterned photoresist layer to expose a portion of said active device region, wherein said photoresist layer substantially protects said STI regions during said etching step; performing a procedure to form a thin gate insulator layer on said exposed portion of said active device region, with said procedure converting said first insulator layer located on a remaining portion of said active device region to a thicker second insulator layer; and performing a definition procedure to form a conductive gate structure overlying a first portion of said thin gate insulator layer while a second portion of said thin gate insulator layer not covered by said conductive gate structure is removed, and with said second insulator layer protecting said remaining portion of said active device region.