Patent ID: 8266567

Claim:
A method of modifying a semiconductor layout, the layout comprising objects of semiconductor material with corners and edges, the method comprising steps of: receiving at an input data representative of a set of proximities, triggers and design rules, the proximities indicating relations between neighboring edges and/or corners, the triggers defining boundaries for the modification within which boundaries the proximities are valid, a valid proximity indicating relations between edges or corners that are still direct neighbors, the design rules describing physical requirements for the semiconductor layout, generating with a computer, from the input data, a set of constraints, based on the received set of proximities, triggers and design rules, each constraint in the set of constraints defining a limit within which the semiconductor layout may be modified without changing the proximities, solving with the computer the set of constraints to obtain a modified semiconductor layout, and moving objects in the semiconductor layout based on the modified semiconductor layout obtained by the computer solving the set of constraints.