Patent ID: 7893763

Claim:
A power added efficiency optimizer apparatus comprising: a first coupling device for receiving an input signal from an external source, said first coupling including a first main path and a first coupling branch, said first main path carrying a large percentage of the input signal relative to the first coupling branch; a second coupling device for receiving an amplified input signal, said second coupling device including a second main path and a second coupling branch, said second main path carrying a large percentage of the amplified input signal relative to the second coupling branch; a variable load impedance for generating an impedance matched signal based on the amplified input signal; a difference forming apparatus for generating a difference signal based on the input signal from the first coupling branch and the impedance matched signal; and an efficiency tuner for processing said output difference signal, and determining an optimum tuning command for said variable load impedance; wherein said error forming apparatus provides feedback to said power added efficiency optimizing apparatus through said coupling devices and said power detection devices, and wherein maximum transfer efficiency is achieved for the amplified input signal.