Patent ID: 8401272

Claim:
A system for inspecting semiconductor devices comprising: a region system operating on a computer for selecting a plurality of regions from a semiconductor wafer carrying a plurality of semiconductor dies, each region comprising a plurality of semiconductor dies; a region golden template system operating on the computer for generating a region golden template for each region within the plurality of regions, each region golden template defining a single benchmark image generated based upon a plurality of images corresponding to the plurality of semiconductor dies within a region; a group golden template system for generating a plurality of group golden templates each group golden template defining a single benchmark image generated based upon at least one of the region golden templates; a primary golden template system for generating a primary golden template from at least one of the group golden templates, the primary golden template defining a single benchmark image; and an inspection system for inspecting a semiconductor die, wherein the primary golden template is used to inspect the semiconductor die first, and the plurality of group golden templates are used to inspect the semiconductor die if the inspection with the primary golden template fails, and wherein the semiconductor die passes inspection if one or more inspection with the group golden template passes.