Patent ID: 8598579

Claim:
A semiconductor device, comprising: a first interconnect chain structure formed in a first device level and a second device level, said first interconnect chain structure comprising a first plurality of lower conductive regions formed in said first device level and a first plurality of upper conductive regions formed in said second device level and a first plurality of inter-level connections connecting said first plurality of lower conductive regions with said first plurality of upper conductive regions forming at least two parallel chain branches; a second interconnect chain structure formed in said first and second device levels and comprising a second plurality of lower conductive regions formed in said first device level, a second plurality of upper conductive regions formed in said second device level and a second plurality of inter-level connections connecting said second plurality of lower conductive regions with said second plurality of upper conductive regions; and a conductive comb structure formed between said first and second device levels and comprising a plurality of conductive lines crossing said first and second interconnect chain structures, wherein at least one of the at least two parallel chain branches of said first interconnect chain structure crosses a portion of the second interconnect chain structure.