Patent ID: 7964502

Claim:
A method for forming a through substrate via (TSV) in a semiconductor substrate having an interlevel dielectric layer overlying a top surface of the semiconductor substrate, the method comprising: forming a via opening within the interlevel dielectric layer and the semiconductor substrate, the via opening having a depth less than a thickness of the semiconductor substrate; forming an adhesion layer within the via opening, wherein the adhesion layer comprises titanium (Ti); forming a nucleation layer over the adhesion layer, wherein the nucleation layer comprises titanium nitride (TiN); depositing a first tungsten (W) layer over the nucleation layer, the first tungsten layer having a thickness less than or equal to a critical film thickness sufficient to provide for film integrity and adhesion stability; forming a stress relief layer over the first tungsten layer, wherein the stress relief layer comprises titanium nitride (TiN); depositing a subsequent tungsten layer over the stress relief layer, the subsequent tungsten layer having a thickness less than or equal to the critical film thickness sufficient to provide for film integrity and adhesion stability, wherein a portion of the subsequent tungsten layer, the stress relief layer, the first tungsten layer, the nucleation layer, and the adhesion layer which overlie the interlevel dielectric collectively comprise an overlying composite layer; planarizing to remove the overlying composite layer and to expose the interlevel dielectric layer and a top of the TSV; and backgrinding a bottom surface of the semiconductor substrate sufficient to expose a bottom of the TSV.