Patent ID: 8441279

Claim:
A scan flip-flop circuit comprising: an input unit configured to select one of a data input signal and a scan input signal depending on an operation mode and configured to generate an intermediate signal based on the selected signal; and an output unit configured to generate an output signal based on the intermediate signal and configured to select one of a data output terminal and a scan output terminal depending on the operation mode to provide the output signal through the selected output terminal, the selected output terminal configured to output a voltage level bidirectionally transitioning between a first voltage level and a second voltage level, a non-selected output terminal configured to output a voltage level unidirectionally transitioning between the first voltage level and the second voltage level, wherein the output unit includes, a latch unit configured to latch the intermediate signal, a data output unit configured to generate a data output signal of the output signal based on the intermediate signal and a first control signal to provide the data output signal through the data output terminal in a first operation mode and configured to prevent a voltage level at the data output terminal from toggling based on the first control signal in a second operation mode, a scan output unit configured to generate a scan output signal of the output signal based on the intermediate signal and a second control signal to provide the scan output signal through the scan output terminal in the second operation mode and configured to prevent a voltage level at the scan output terminal from toggling based on the second control signal in the first operation mode, and a data output enhancement unit coupled between the data output terminal and the scan output terminal configured to modify the data output signal based on a third control signal in the first operation mode.