Patent ID: 8405454

Claim:
An output circuit of semiconductor apparatus, comprising: a first pad and a second pad configured to provide a power supply voltage and a ground voltage, respectively; a main output unit configured to be supplied with the power supply voltage and the ground voltage from the first pad and the second pad, respectively; and a decoupling capacitor region, one end of the decoupling capacitor region is coupled to the first pad and another end of the decoupling capacitor region is coupled to the second pad, wherein the decoupling capacitor region comprises: a first decoupling capacitor region spaced away from a portion of the main output unit at a first distance; and a second decoupling capacitor region spaced away from the main output unit at a second distance such that the second distance is greater than the first distance, wherein one or more MOS capacitors are disposed in the first decoupling capacitor region, and one or more electrolytic capacitors are disposed in the second decoupling capacitor region.