Patent ID: 8195096

Claim:
A method for enhancing DC offset correction speed of a receiver having a signal processing unit comprising a filtering stage receiving a baseband signal with a feedforward configuration and a DC offset correction unit, comprising the steps of: disabling, by a controller, a low noise amplifier (LNA); adjusting, by the controller, a bandwidth of the filtering stage to be wider than a normal operational bandwidth of the filtering stage, in response to the baseband signal, by disconnecting a terminal of a first capacitor in the filtering stage from a first node that is in the filtering stage, and connecting the terminal of the first capacitor to a second node having a first preset voltage level while the LNA is disabled; applying a DC offset correction process for mitigating a DC offset of an output signal of the signal processing unit; and adjusting the bandwidth of the filtering stage back to the normal operational bandwidth by connecting the terminal of the first capacitor back to the first node, wherein as soon as the filtering stage is a differential low pass filter, the step of adjusting a bandwidth of the filter to be wider than a normal operational bandwidth of the filtering stage further comprises a step of: disconnecting a terminal of a second capacitor in the filtering stage from a third node that is in the filtering stage, and connecting the terminal of the second capacitor to a fourth node having a second preset voltage level.