Patent ID: 8618546

Claim:
A backplane for a flat panel display apparatus, the backplane comprising: a substrate; a pixel electrode that comprises a transparent conductive material on the substrate; a capacitor first electrode formed on the same layer as the pixel electrode; a first protection layer covering the capacitor first electrode and an upper edge of the pixel electrode; a gate electrode of a thin film transistor (TFT) formed on the first protection layer, a capacitor second electrode formed on the same layer as the gate electrode using the same material used to form the gate electrode; a first insulating layer that covers the gate electrode and the capacitor second electrode; a semiconductor layer that is formed on the first insulating layer and comprises a transparent conductive material; a second insulating layer covering the semiconductor layer; source and drain electrodes of the TFT formed on the second insulating layer, wherein the source and drain electrodes are connected to the semiconductor layer through the second insulating layer, and at least one of the source and drain electrodes is connected to the pixel electrode; and a third insulating layer that covers the source and drain electrodes and exposes the pixel electrode.