Patent ID: 7782670

Claim:
A method of operating a non-volatile semiconductor memory, the non-volatile semiconductor memory including a memory cell, the memory cell capable of storing n bits of data (n is a natural number equal to or larger than two), the method comprising: receiving a first bit of data from an outside of the non-volatile semiconductor memory; making a threshold voltage of the memory cell higher than a first level according to the first bit of data; receiving a second bit of data from the outside of the non-volatile semiconductor memory: making the threshold voltage of the memory cell, that has been made higher than the first level, higher than a second level, according to the second bit of data, the second level being higher than the first level; and making the threshold voltage of the memory cell, that has been made higher than the first level, higher than a third level, according to the second bit of data, the third level being higher than the second level, wherein the step of making the threshold voltage of the memory cell higher than the first level comprises: applying a first program voltage to the memory cell to alter the threshold voltage of the memory cell; determining whether the threshold voltage of the memory cell is lower than the first level; and applying a second program voltage to the memory cell to alter the threshold voltage of the memory cell if it has been determined that the threshold voltage of the memory cell is lower than the first level, the second program voltage being higher than the first program voltage by a first amount, and wherein the step of making the threshold voltage of the memory cell higher than the second level comprises: applying a third program voltage to the memory cell to alter the threshold voltage of the memory cell; determining whether the threshold voltage of the memory cell Is lower than the second level; and applying a fourth program voltage to the memory cell to alter the threshold voltage of the memory cell if it has been determined that the threshold voltage of the memory cell is lower than the second level, the fourth program voltage being higher than the third program voltage by a second amount.