Patent ID: 8683404

Claim:
A semiconductor verification apparatus for verifying circuits using a semiconductor device wherein memory elements contained therein are distinguished from one another by a first number and a second number; the apparatus comprising: read means that is implemented within said semiconductor device, and is controlled based on the value of said first number and read means control information to output the values of first memory elements associated with said first number to the outside of said semiconductor device; a first memory that is connected with an input terminal of said read means, and stores initial value information which are values to be output to said read means at each clock cycle based on said read means control information; a second memory that is connected with an output terminal of said read means, and stores the value at the output terminal of said read means at each clock cycle, the value including the values of said first memory elements associated with said first number; initial value calculation means that calculates first position information indicative of the position of said first number within said first memory and second position information of said second number within said second memory based on said read means control information; first number rewrite means that writes said first number alone in said first memory based on said first position information; and retrieval means that determines locations in said second memory at which the values of said memory elements are stored, based on said second number and said second position information, and retrieves the values of memory elements associated with said second number with one retrieval operation, wherein the initial value information stored in said first memory is supplied to said read means, and values of said first memory element output from said read means are stored in said second memory.