Patent ID: 8405246

Claim:
A power supply circuit for providing power and detecting input voltages of a plurality of loads on a motherboard, comprising: a pulse width modulation (PWM) controller capable of outputting PWM control signals; the PWM controller comprises a first drive terminal, a phase terminal, a second drive terminal and a feedback terminal; a voltage output circuit capable of receiving the PWM control signals and outputting working voltage to the plurality of loads according to the received PWM control signals; the voltage output circuit comprises a first MOSFET and a second MOSFET; the first and second drive terminals are electrically connected to grids of the first and second MOSFETs; a first MOSFET drain is capable of receiving a first voltage; a second MOSFET source is grounded; a first MOSFET source and a second MOSFET drain are electrically connected to output working voltages; and the phase terminal is electrically connected to the first MOSFET source and the second MOSFET drain; the plurality of loads comprises a first load and a second load; the first MOSFET source and the second MOSFET drain are electrically connected to each other and grounded by the first load; and the first MOSFET source and the second MOSFET drain are electrically connected and grounded through a switch and the second load that are connected in series; and a voltage feedback circuit electrically connected to the PWM controller and the plurality of loads; wherein the voltage feedback circuit is capable of detecting the input voltages of a plurality of loads and outputting feedback signals to the PWM controller according to the detected input voltages; and the PWM controller is capable of adjusting its PWM control signal outputs, according to the received feedback signals, and adjusting working voltages to the plurality of loads; the voltage feedback circuit comprises a transistor, a third MOSFET and a fourth MOSFET; a transistor base is capable of receiving a power-good signal; a transistor source is grounded; a transistor collector is capable of receiving a second voltage through a first resistor; the transistor collector is electrically connected to a third MOSFET grid; a third MOSFET source is grounded; a third MOSFET drain is capable of receiving the second voltage through a second resistor; the third MOSFET drain is electrically connected to a fourth MOSFET grid; a fourth MOSFET source is grounded by the second load; a fourth MOSFET drain is grounded by the first load; and the fourth MOSFET drain is electrically connected to the feedback terminal.