Patent ID: 8466716

Claim:
A synthesizer, comprising: a comparator for receiving a reference oscillation signal from a reference oscillator; an oscillator for outputting an oscillation signal based on a comparison signal from the comparator; a frequency divider for dividing a frequency of the oscillation signal from the oscillator responsive to a controller, to form a frequency divided signal, the frequency divider including an accumulator for generating a cumulative addition value during a frequency division ratio based on a frequency division number from the controller; and a frequency error detector for detecting an error between a preset frequency and the frequency based on the reference oscillation signal, wherein the comparator compares the frequency divided signal from the frequency divider with the reference oscillation signal from the reference oscillator, and outputs the comparison signal showing a comparison result to the oscillator, and the controller changes the frequency division ratio of the frequency divider from a first ratio to a second ratio via the accumulator based on the detected error from the frequency error detector, such that a last cumulative addition value of the first ratio is used as an initial addition value of the accumulator for the second ratio.