Patent ID: 6970375

Claim:
An apparatus comprising: a first layer of conductive array lines, the conductive array lines being arranged so that they do not come into direct contact with each other; a second layer of conductive array lines, the conductive array lines being arranged so that they do not come into direct contact with either each other or any of the conductive array lines of the first layer; a plurality of memory plugs located at the intersections of the first layer of conductive array lines and the second layer of conductive array lines, each memory plug being in electrical contact with one of the conductive array lines from the first layer and one of the conductive array lines from the second layer such that each memory plug is associated with a unique pair of conductive array lines; and circuitry in electrical contact with the conductive array lines that provides a reference voltage to the conductive array lines when activated; wherein a single memory plug can be selected by selecting a unique pair of conductive array lines that is associated with the single memory plug, the unique pair consisting of a first layer conductive array line and a second layer conductive array line; applying a first select voltage to the first layer conductive array line; and applying a second select voltage to the second layer conductive array line.