Patent ID: 8631256

Claim:
A microprocessor, comprising: pins, configured for coupling the microprocessor to a voltage identifier (VID) input of a voltage regulator module (VRM) that supplies a voltage to power the microprocessor based on a value of the VID input; and a plurality of dies, each die comprising a plurality of cores; wherein each core is configured to generate a first VID value that indicates the desired VID of the core and to receive the first VID value from the other cores of its die and to generate a second VID value which is the largest of the first VID values of all the cores of the die; wherein each core is configured to provide the second VID value to at least one core of each of the other dies of the microprocessor and to receive the second VID value from at least one core of each of the other dies of the microprocessor and to generate a third VID value which is the largest of all the second VID values of the microprocessor; wherein each core is configured to provide the third VID value to the pins if the core is a master core of the microprocessor.