Patent ID: 7573137

Claim:
A semiconductor device comprising: a first semiconductor chip having a size and an active and a passive surface, the active surface including an interior first set and a peripheral second set of contact pads at pad locations; a deformed sphere of non-reflow metal placed on the contact pads of the first and second sets; at least one additional deformed sphere placed on the spheres of the first set pads, forming column-shaped spacers having a height; a substrate having a first surface with an attachment location and a third set of contact pads near the location; the passive surface of the first chip attached to the substrate attachment location; low-profile bond wires span between the pads of the third set and the second set to electrically connect the substrate and the first chip, the profile being lower than the height of the spacers; a second semiconductor chip having a second size and a fourth set of contact pads at locations matching the first set; the second chip placed over the first chip and the fourth set pads aligned with the spacers on the matching first set pads; and a reflow metal on the fourth set pads bonding to the spacers, connecting the second and first chips, at least one edge of the second chip overhanging the sphere on at least one pad of the second set.