Patent ID: 7352306

Claim:
An analog-to-digital converter (ADC) for converting an analog input value to an output digital code, the ADC comprising: a first ADC configured to receive the analog input value and to convert the analog input value to a first digital code; a first digital-to-analog converter (DAC) configured to convert the first digital code to a first analog value; a first linearization module configured to receive the first digital code and to produce a first linear-correction code; a second ADC configured to receive a remainder portion of the analog input value and to convert the remainder portion to a second digital code, wherein the remainder portion comprises a difference between the analog input value and the first analog value, and wherein the second ADC has a full-scale range that is greater than the remainder portion; a second linearization module configured to receive the second digital code and to produce a second linear-correction code; and an accumulator configured to combine the first linear-correction code and the second linear-correction code to produce the output digital code, wherein the remainder portion includes a quantization error contributed from the first ADC and non-linearity errors contributed from the first ADC, from the first DAC, and from a subtractor that computes the remainder portion, the first linear-correction code directly compensating for non-linearity errors contributed from the first DAC and the subtractor.