Patent ID: 8227298

Claim:
A method for fabricating a semiconductor device comprising the steps of: forming through-holes in a flat tape having a first and a second surface; forming a seed layer of a first metal on the first tape surface; depositing a first layer of photoresist on the seed layer; exposing and developing the photoresist to create a pattern of openings exposing portions of the seed layer, wherein the openings have sidewalls normal to the flat tape; electrolytically plating additional first metal on the exposed seed layer portions, until the plated first metal reaches a first height, thereby creating the traces of a rectangular cross section; depositing a second layer of photoresist to mask a portion of the traces and to expose a portion of the traces; electrolytically plating a layer of a second metal on top of the exposed portion of the traces; removing both the first and the second photoresist layers, thereby exposing and oxidizing the first metal of the trace sidewalls; etching the portions of the first metal seed layer not covered by the plated first metal, thereby undercutting the first metal at the tape interface; and attaching a semiconductor chip with terminals to the substrate by connecting the terminals to the layer of the second metal.