Patent ID: 7435652

Claim:
A method of manufacturing a semiconductor structure comprising: forming a first stack of a first gate dielectric layer and a first polysilicon layer directly on a first portion of a semiconductor substrate; forming a second stack of a second gate dielectric, a metal gate layer, and a silicon-containing layer directly on said first stack and on a second portion of a semiconductor substrate; forming a second polysilicon layer directly on first polysilicon layer and directly on said silicon-containing layer; forming a gate cap dielectric layer on said second polysilicon layer; forming a patterning in said first polysilicon layer over said first portion and in said silicon-containing layer over said second portion; masking said first portion with a photoresist; transferring said pattern into said second gate dielectric layer over said second portion; removing said photoresist from over said first portion; and transferring said pattern into said first gate dielectric layer from over said first portion.