Patent ID: 8143675

Claim:
A semiconductor device comprising: a silicon substrate having a first device region and a second device region; an n-channel transistor including first source/drain regions formed in the first device region with a first channel region sandwiched therebetween, and a first gate electrode formed over the first channel region with a first gate insulating film formed therebetween; a first sidewall insulating film formed on a side wall of the first gate electrode and having a Young's modulus smaller than a Young's modulus of silicon; a p-channel transistor including second source/drain regions formed in the second device region with a second channel region formed therebetween, and a second gate electrode formed over the second channel region with a second gate insulating film formed therebetween; a second sidewall insulating film formed on a side wall of the second gate electrode and having as a whole a Young's modulus larger than the Young's modulus of silicon, the second sidewall insulating film including a first insulating film having a Young's modulus smaller than the Young's modulus of silicon and a second insulating film having a Young's modulus larger than the Young's modulus of silicon; a tensile stressor film formed covering the n-channel transistor and applying to the first channel region a compressive stress perpendicular to a channel plane and a tensile stress in a channel length direction; and a compressive stressor film formed covering the p-channel transistor and applying to the second channel region a tensile stress perpendicular to a channel plane and a compressive stress in a channel length direction.