Patent ID: 8008704

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate; a first memory transistor including a floating electrode and a control electrode, the floating electrode being provided on the semiconductor substrate via a first gate insulating film, the control electrode being provided on the floating electrode via a second gate insulating film, the first memory transistor having a diffusion layer; a second memory transistor including the floating electrode and the control electrode and arranged adjacent to the first memory transistor, the floating electrode being provided on the semiconductor substrate via the first gate insulating film, the control electrode being provided on the floating electrode via the second gate insulating film, the second memory transistor having the diffusion layer shared with the first memory cell transistor; a first insulating film formed above the diffusion layer; and a second insulating film provided on the first insulating film and on mutually-opposed sides respectively of gates of the first and second memory transistors, wherein a void part is formed between the mutually-opposed sides respectively of the gates of the first and second memory transistors, a bottom and two sides of the void part being shielded by the second insulating film, and a top of the void part being shielded by a third insulating film, and extending to a shunt region.