Patent ID: 8593819

Claim:
A circuit module including a low-loss electrical interconnect structure for connecting at least one semiconductor die to an associated at least one microelectronic component, comprising: at least one microelectronic component; a metallization layer including an electrical ground plane and at least one contact pad, each of the at least one contact pads being electrically connected to an associated microelectronic component; a base dielectric layer adjacent the metallization layer and having at least one via to accommodate the electrical connection between the at least one contact pad and at least one microelectronic component, the at least one microelectronic component disposed at a surface of the base dielectric layer opposite the metallization layer; a composite ceramic dielectric body comprised of at least two layers of host dielectric material having a relative dielectric permittivity≦4.5 and further comprising crystalline dielectric inclusions each having a maximum grain size of less than 50 nanometers and selected from the group consisting of inclusions having relative a permittivity ∈ R ≧10 and inclusions having a relative permeability μ R ≠1 embedded in at least one of the two layers of dielectric material, the composite ceramic dielectric body having a first surface and a second surface; at least one transmission line embedded within the composite ceramic dielectric body; a first conductive connector means electrically connecting one of the contact pads to an associated one of the at least one transmission lines through the first surface of the composite ceramic dielectric body; an interconnect metallization layer disposed at the second surface of the composite dielectric body and including a ground plane and a second conductive connector means through which a semiconductor die can be electrically connected to the associated one of the at least one transmission lines.