Patent ID: 7873858

Claim:
A clock signal generator comprising: a control circuit configured to count the cycles of a clock signal during each period between two sync signals successively inputted, and to generate a frequency control signal based upon each count value; and a clock generator configured to generate the clock signal having a frequency corresponding to the frequency control signal: wherein the frequency control signal comprises a plurality of bits; wherein the clock generator comprises: a current controller configured to generate a current corresponding to the frequency control signal; and an oscillator generating the clock signal having a frequency corresponding to the current; wherein the current controller comprises: a plurality of resistors each corresponding to the respective bits of the frequency control signal, each of the resistors having a first terminal commonly connected to a power voltage; and a plurality of switches each connected to a corresponding one of the resistors and controlled respectively by the corresponding bits of the frequency control signal, each of the switches having a first terminal connected to a second terminal of the corresponding resistor and a second terminal connected to a first node. wherein the amount of current flowing through each of the respective resistors to the first node are different from each other.