Patent ID: 7030515

Claim:
A switch for switching radio-frequency electromagnetic signal between a common port and first and second individual ports, said switch comprising: a first FET arrangement including a signal path extending from a source terminal to a drain terminal, and also including a gate terminal, the conduction of said signal path being under control of a gate-to-path control voltage; a second FET arrangement including a signal path extending from a source terminal to a drain terminal, and also including a gate terminal, the conduction of said signal path being under control of a gate-to-path control voltage; means coupled to said common port, to a first terminal of said signal path of said first FET arrangement, and to a first terminal of said signal path of said second FET arrangement, for coupling alternating current between said common port and said first terminals of said signal paths of said first and second FET arrangements, but for not coupling direct current between said first terminals of said first and second FET arrangements; means coupled to a second terminal of said signal path of said first FET arrangement and to said first individual port, for coupling alternating signal between said second signal terminal of said first FET arrangement and said first individual port; means coupled to said second terminal of said signal path of said second FET arrangement and to said second individual port, for coupling alternating signal between said second signal terminal of said second FET arrangement and said second individual port; and at least one controllable source of said control voltage defining first and second control voltage terminals at which control voltage is produced, said controllable source being coupled to said first and second FET arrangements to bias said first FET arrangement for conduction when said second FET arrangement is biased for nonconduction, and to bias said second FET arrangement for conduction when said first FET arrangement is biased for nonconduction, said at least one controllable source comprising: first conductive means coupled to said first control voltage terminal of said controllable source and to said gate terminal of said first FET arrangement; second conductive means coupled to said first control voltage terminal of said controllable source and to one of said source and drain terminals of said second FET arrangement; third conductive means coupled to said second control voltage terminal of said controllable source and to said gate terminal of said second FET arrangement; and fourth conductive means coupled to said second control voltage terminal of said controllable source and to one of said source and drain terminals of said first FET arrangement.