Patent ID: 8664535

Claim:
A wired circuit board comprising: a first insulating layer; a plurality of first wires formed on the first insulating layer, the plurality of first wires being composed of copper, each of the plurality of first wires having a length, a width, and a thickness, and the plurality of first wires comprising at least one of a read wire or a write wire; a second insulating layer formed on the first insulating layer so as to cover at least a portion of the plurality of first wires; and a plurality of second wires formed directly on a surface of the second insulating layer which faces opposite to a surface of the second insulating layer which contacts the plurality of first wires, each of the plurality of second wires having a length, a width, and a thickness, at least a portion of each of the plurality of second wires being positioned directly above at least a portion of a corresponding one of the plurality of first wires in a thickness direction, the plurality of second wires being composed of copper, each of the plurality of second wires being formed in a smaller width than that of each of the plurality of first wires, and the plurality of second wires comprising at least one of a read wire or a write wire, wherein the second insulating layer includes a base-side flat portion formed on the first insulating layer at a position located between adjacent ones of the plurality of first wires, a protruding portion protruding upwardly in the thickness direction relative to the base-side flat portion and covering an upper surface and side surfaces of each of the plurality of first wires, wherein the protruding portion includes first stepped shoulder portions formed on both widthwise sides of each of the plurality of first wires, and a wire-side flat portion formed on the upper surface of each of the plurality of first wires, with each of the first stepped shoulder portions being formed such that an upper surface thereof is curved downward from a corresponding end portion of the wire-side flat portion until reaching the base-side flat portion, wherein a corresponding one of the plurality of second wires is formed on the wire-side flat portion that is formed on the upper surface of each of the plurality of first wires, wherein margin portions are provided at both widthwise end portions of an upper surface of the wire-side flat portion, which surface is devoid of the second wires, wherein a width of each of the margin portions is in a range of 5 μm to 50 μm, wherein a width of each of the second wires is in a range of 10 μm to 50 μm, and wherein the read wire is configured to carry a read signal and the write wire is configured to carry a write signal.