Patent ID: 7356568

Claim:
A method of processor communication in a multiprocessor system containing a plurality of processors, the method comprising: providing each of the plurality of processors a respective one of a plurality of internal processor communication registers (PCRs) that provides its processor continuous read access to the information stored therein, each PCR having multiple sectors each allocated for store access exclusively by a respective one of the plurality of processors other than the processor containing the PCR; coordinating processing of a plurality of data sets among said plurality of processors by reference to the plurality of internal PCRs, wherein each data set has a respective associated identifier, said coordinating including: each of multiple processors storing an identifier of a data set into its allocated sector in multiple PCRs in the plurality of processors; and each of the plurality of processors retrieving at least one identifier of a data set from its internal PCR and, in response thereto, scheduling its processing of one of the plurality of data sets.