Patent ID: 7061788

Claim:
A semiconductor storage device comprising: a first word line and a second word line extending in a first direction; a first bit line and a second bit line extending in a second direction intersecting with the first direction; a first memory cell connected to the first word line and the first bit line; a second memory cell connected to the second word line and the second bit line; a sense amplifier connected between the first bit line and the second bit line; a first capacitor having a first storage electrode and a first plate electrode, the first storage electrode being connected to the first bit line; a second capacitor having a second storage electrode and a second plate electrode, the second storage electrode being connected to the second bit line; a first wire connected to the first plate electrode of the first capacitor; and a second wire connected to the second plate electrode of the second capacitor, wherein the first bit line and the second bit line are in a complementary relation, and when “0” is read to the first bit line, the first capacitor has an operation to increase a potential of the first plate electrode through the first wire before the sense amplifier operates.