Patent ID: 8472910

Claim:
A first radio frequency (RF) impedance translation circuit comprising: a first plurality of inductive elements cascaded in series without any series switching elements between an input and an output using at least a first of a plurality of connection nodes; a second plurality of inductive elements cascaded in series using the plurality of connection nodes; a first plurality of switching elements, such that: a first of the first plurality of switching elements is coupled between a second of the plurality of connection nodes and one selected from the group consisting of the input, the output, and the first of the plurality of connection nodes; a second of the first plurality of switching elements is coupled between a third of the plurality of connection nodes and another selected from the group consisting of the input, the output, and the first of the plurality of connection nodes; and each of the first plurality of switching elements has one of an OFF state and an ON state based on a switch control signal; at least one variable shunt capacitance circuit, such that each variable shunt capacitance circuit: is coupled between a common reference and a corresponding one selected from the group consisting of the input, the output, and the plurality of connection nodes; and has a capacitance based on a capacitance control signal; and control circuitry adapted to provide each capacitance control signal to a corresponding each variable shunt capacitance circuit and each switch control signal to a corresponding each of the first plurality of switching elements, wherein a first impedance presented to the output is translated into a second impedance presented at the input; and further comprising a common power amplifier comprising a plurality of segmented output stages coupled in parallel, such that: when at least one of the segmented output stages is in a DISABLED state, the common power amplifier has a first output power level and a first output impedance; and when the at least one of the segmented output stages is in an ENABLED state, the common power amplifier has a second output power level and a second output impedance, wherein the second output power level is greater than the first output power level and the second output impedance is less than the first output impedance.