Patent ID: 8288854

Claim:
A semiconductor package, comprising: a silicon substrate unit, having a top surface, a bottom surface, a cavity, a plurality of vias and at least one air vent hole, wherein the cavity opens at the top surface, and the vias penetrate the silicon substrate unit and are disposed around the cavity, one end of the air vent hole opens at the bottom of the cavity, and the other end of the air vent hole opens at the bottom surface of the silicon substrate unit; a bridge chip, having an active surface, a back surface and a plurality of non-contact pads, wherein the non-contact pads are disposed adjacent to the active surface, the back surface of the bridge chip is attached to the cavity of the silicon substrate unit, the active surface of the bridge chip faces upward; and at least one active chip, disposed above the bridge chip, each active chip has an active surface, a back surface, a plurality of non-contact pads and a plurality of conducting elements, wherein the non-contact pads and conducting elements are disposed adjacent to the active surface, the conducting elements of the active chip contact the vias of the silicon substrate unit, the non-contact pads of the active chip face but are not in physical contact with the non-contact pads of the bridge chip, so as to provide inductive or capacitive proximity communication between the active chip and the bridge chip.