Patent ID: 8324113

Claim:
A silicon processing method comprising: forming a mask pattern on a principal plane of a single-crystal silicon substrate, the principal plane including one of a (100) surface and a crystal surface equivalent thereto and a (110) surface and a crystal surface equivalent thereto; and applying crystal anisotropic etching to the principal surface to form a structure including a (111) surface and a crystal surface equivalent thereto and including etched portions having a length L 1 and an unetched portion between the etched portions having a distance W 1 , wherein determining sections for determining the distance W 1 and the length L 1 of the structure are formed in the mask pattern, and wherein when a distance of the determining sections for determining the distance W 1 is a distance W 2 , a length of the mask pattern for determining the length L 1 is a length L 2 , a maximum length of the mask pattern in a direction of the length L 2 from one of the determining sections is Xmax, a width of the mask pattern in the direction of the distance W 2 in a portion of the Xmax is Wmax, and a maximum tolerance of an angle of alignment error between L 1 and L 2 is 0 *, Wmax is set to satisfy an expression: W max= W 2+2 · X max · tanθ*.