Patent ID: 8421939

Claim:
A method for manufacturing a display control substrate in which a gate of a transistor element is connected to a gate electrode wiring and a source electrode wiring is connected to a pixel electrode via the transistor element, the method comprising: a wiring forming step including forming the gate electrode wiring and the source electrode wiring so as to intersect each other while one of the gate electrode wiring and the source electrode wiring is cutoff at cut portions such that the other passes between the cut portions; an insulation forming step including forming an interlayer insulation film on a substrate after the wiring forming step and forming contact holes in the interlayer insulation film so as to reach the respective cut portions; and at the time of forming the pixel electrode by processing a pixel electrode material deposited on the substrate after the contact hole forming step, forming a connecting portion to connect the cut portions via the respective contact holes; wherein the wiring forming step includes forming the gate electrode wiring and a compensation capacitance wiring parallel or substantially parallel to the gate electrode wiring, such that the gate electrode wiring and the compensation capacitance wiring intersect the source electrode wiring, and the pair of the gate electrode wiring and the compensation capacitance wiring or the source electrode wiring is cutoff at cut portions such that the other passes between the cut portions.