Patent ID: 8131967

Claim:
An interface system comprising: a buffer that receives data from a source in a first clock domain and stores the data to be read by a destination in a second clock domain, and wherein the buffer functions in both the first clock domain and the second clock domain; a write pointer that points to data written by the source; a read pointer that points to data read by the destination, wherein the write pointer and the read pointer are utilized to enable the data to be transmitted from the first clock domain to the second clock domain asynchronously; a hold unit that delays an acknowledgment that either a copy of the write pointer or a copy of the read pointer has been received; and a synchronization unit coupled to the hold unit that comprises the write pointer and the copy of the write pointer, wherein the synchronization unit comprises a first determination unit that determines whether the buffer is full by comparing the write pointer to the copy of the read pointer, and updates the copy of the write pointer responsive to determining that the copy of the write pointer is not equal to the write pointer.