Patent ID: 7714415

Claim:
A semiconductor package, comprising: an arrangement of conductive leadframe pins, at least some of said leadframe pins electrically isolated from other of said leadframe pins and at least some of said leadframe pins having portions thereof defining a support surface for a semiconductor die; a semiconductor die having at least four substantially linear sides, each side formed substantially orthogonal relative to an adjacent side, a first set of said sides defined by two substantially parallel spaced-apart sides and a second set of said sides defined by two other substantially parallel spaced-apart sides, a first axis defined at a position midway between said sides defining said first set and a second axis, orthogonal to said first axis, defined at a position midway between said sides defining said second set, said seimiconductor die having a plurality of conductive pads for effecting an electrical connection with circuitry on or within said semiconductor die, said semiconductor die having at least one mounting surface, said mounting surface of said semiconductor die mounted on or attached to said support surface defined by said leadframe pin portions; bonding wires connecting selected ones of said conductive pads to at least a corresponding selected one of said leadframe pins; and a molding compound surrounding said semiconductor die and at least said portions of said leadframe pins defining said support surface; at least some of said portions of some of said leadframe pins defining said support surface extending across one of said first and second orthogonal axes and at least some of said portions of other of said leadframe pins defining said support surface extending across the other of said first and second orthogonal axes to reduce or restrain thermally induced growth of the package consequent to thermal expansion of the molding compound relative to at least the semiconductor die.