Patent ID: 8048759

Claim:
A method of manufacturing a semiconductor device to an SOI substrate in which an insulating layer and a silicon layer are laminated over a silicon substrate, comprising: a FIN type first active element in which a first control electrode coils around a body region formed in the silicon layer; and a planar type second active element which is separated using partial isolation and full isolation together to element isolation, and is formed in the silicon layer; and comprising the steps of: doing element isolation formation which forms in a predetermined position of the silicon layer a full isolation film which reaches in the insulating layer, and a partial isolation film which does not reach in the insulating layer; removing the full isolation film in a predetermined position where the first active element is formed; and doing control electrode formation which forms a second control electrode of the second active element at the same time of forming the first control electrode in a position where the full isolation film is removed in the removing step.