Patent ID: 8332854

Claim:
A computing system comprising: a processor having a plurality of hardware threads that share hardware resources of the processor; and a scheduler configured to schedule execution of virtualized source code comprising a plurality of virtualized runtime threads, comprising: a decoder configured to catalogue one or more hardware resource parameters used by one or more virtualized runtime threads of the plurality of virtualized runtime threads and provide virtualized destination code including the plurality of virtualized runtime threads each having a plurality of instruction blocks organized based on the one or more hardware resource parameters used by the instruction blocks of each of the one or more virtualized runtime threads; and a virtualization engine configured to receive the virtualized destination code from the decoder and schedule execution of each of the plurality of virtualized runtime threads onto one or more selected hardware threads of the plurality of hardware threads based on the one or more hardware resource parameters and a hardware-specific profile of the computing system that defines performance characteristics of the processor and identifies the hardware resources that are shared between one or more of the plurality of hardware threads; wherein the decoder is configured to create summaries of catalogued hardware resource parameters for each of the instruction blocks, and to group the instruction blocks of each virtualized runtime thread into execution groups of instruction blocks that have corresponding summaries of the catalogued hardware resource parameters; and wherein the one or more hardware resource parameters corresponds to one or more of a floating point unit, an integer unit, a vector unit, and a branch unit.