Patent ID: 8399916

Claim:
A semiconductor device comprising: a plurality of memory cells having a plurality of capacitors, the plurality of capacitors being divided into a first group and a second group, each of the capacitors being located at an intersection of a corresponding one of first parallel lines and a corresponding one of second parallel lines, and the plurality of capacitors including a plurality of lower electrodes; and a support film formed to hold the plurality of lower electrodes, and to include a plurality of openings, wherein each of the capacitors belonging to the first group contacts an entire circumference of an outer side face of the lower electrode thereof to the support film, and wherein each of the capacitors belonging to the second group does not contact an entire circumference of an outer side face of the lower electrode thereof to the support film so that the support film uncovers the entire circumference of the outer side face of the lower electrode of each of the capacitors belonging to the second group by a corresponding one of the plurality of openings of the support film.