Patent ID: 7759981

Claim:
An amplifying circuit of a semiconductor integrated circuit, the amplifying circuit comprising: a data amplifier configured to output an up-signal and a down-signal amplified according to a comparison result between an up-data signal and a down-data signal in response to a control signal, and repeat an operation of amplifying the up-signal and the down-signal according to a comparison result between the up-signal and the down-signal that are fed back as input to the data amplifier, wherein the data amplifier includes: an up-signal amplifying unit that amplifies the up-signal according to the comparison result between the up-data signal and the down-data signal in response to the control signal and amplifies the up-signal according to the comparison result between the up-signal and the down-signal fed back to the data amplifier, and a down-signal amplifying unit that amplifies the down-signal according to the comparison result between the up-data signal and the down-data signal in response to the control signal and further amplifies the down-signal according to the comparison result between the up-signal and the down-signal fed back to the data amplifier, wherein the control signal includes a first control signal and a second control signal having activation intervals that are different from each other, wherein the up-signal amplifying unit includes a first comparing portion that is driven in accordance with the first control signal, and has a current that varies according to the comparison result between the up-data signal and the down-data signal, a second comparing portion that is driven in accordance with the second control signal, and has a current that varies according to the comparison result between the up-signal and the down-signal fed back to the data amplifier, and a first current mirror portion that applies a same current to first and second nodes to which the first comparing portion and the second comparing portion are connected respectively.