Patent ID: 7725761

Claim:
A computer system comprising: a CPU; a memory; a bus; an IO bridge which connects an IO device to the bus; and a pseudo-IO bus bridge, wherein the pseudo-IO bus bridge is disconnected from the bus during a redundant configuration in which a second computer system is connected to the bus, wherein the second computer system comprises: a second CPU; a second memory; and a second IO bridge; wherein the pseudo-IO bus bridge holds a setting information of the IO bridge to emulate the second IO bridge during a stand-alone configuration in which the second computer system is disconnected from the bus, and wherein the computer system is configured such that a total amount of memory space assigned to the IO bridge, the second IO bridge, and the pseudo-IO bus bridge when the second computer system is connected to the bus is substantially the same as a total amount of memory space assigned to the IO bridge, the second IO bridge, and the pseudo-IO bus bridge when the second computer system is disconnected from the bus.