Patent ID: 7408883

Claim:
An apparatus for loopback testing of digital communication systems, comprising: a digital transceiver configured to receive at least a first packet of a digital communication from a source and to transmit at least one packet in response to the receipt of said first packet to a destination, each of said packets having a structure including at least one level 2 source address portion and at least one level 2 destination address portion, and each of said packets further having a structure including at least one level 3 source address portion and at least one level 3 destination address portion; and a loopback test module in communication with said digital transceiver, said loopback test module configured to modify said first packet of said digital communication by the exchange of a selected one of said at least one level 2 source address portion thereof with a selected one of said at least one level 2 destination address portion thereof, and further configured to modify said first packet of said digital communication by the exchange of a selected one of said at least one level 3 source address portion thereof with a selected one of said at least one level 3 destination address portion thereof, thereby generating a second packet; whereby said second packet is configured to be transmitted by said digital transceiver to said source from which said first packet was received, thereby to conduct a loopback test.