Patent ID: 7800183

Claim:
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a base region of a second conductivity type, which is formed on the front surface of the semiconductor substrate; a source region of the first conductivity type, which is formed on the front surface of the base region; a collector region of the second conductivity type, which is formed on the back surface of the semiconductor substrate; a trench gate, which is formed in a trench via a gate insulation film, the trench being formed through the source region and the base region; an electrically conductive layer, which is formed within a contact trench that is formed through the source region; a source electrode, which is in contact with the electrically conductive layer and the source region; and a latch-up suppression region of the second conductivity type, which is formed within the base region, in contact with the electrically conductive layer, and higher in impurity concentration than the base region; wherein the distance between the gate insulation film and the latch-up suppression region is not less than the maximum width of a depletion layer that is formed in the base region by the trench gate.