Patent ID: 7601998

Claim:
A semiconductor device, comprising: a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region; a first string select line, a first ground select line, and first word lines on the semiconductor substrate in the first region, the first word lines being disposed between the first string select line and the first ground select line; peripheral circuit transistors on the semiconductor substrate in the second region; a first protective layer covering the first string select line, the first ground select line, the first word lines, and the peripheral transistors; a first insulation layer on the first protective layer; a semiconductor pattern on the first insulation layer in the first region; second word lines on the semiconductor pattern; a second protective layer covering the second word lines; a second insulation layer disposed on the second protective layer and the first insulation layer in the second region; a first contact plug that penetrates the second insulation layer and the second protective layer to contact a second word line; and a second contact plug that penetrates the second insulation layer, the second protective layer, the first insulation layer, and the first protective layer to contact a peripheral circuit transistor.