Patent ID: 7759203

Claim:
A method of fabricating a semiconductor device comprising: forming an isolation region in which an isolation layer will be formed by etching a portion of a substrate, using a first mask that defines the isolation region of said substrate; reducing a width of said first mask by a predetermined amount, using an etch process, to form a second mask from said first mask; filling said isolation region with a filling layer, and removing an upper portion of said filling layer so as to expose an upper surface of said substrate; etching said substrate to a predetermined depth, using said second mask and said filling layer as etch masks, to form a protruding portion; performing an ion implantation process upon at least one side surface of said protruding portion, thereby forming a channel region; and removing said second mask, and forming a gate insulating layer and a gate electrode that covers the upper surface and the at least one side surface of said protruding portion.