Patent ID: 8138608

Claim:
A flip chip integrated circuit package, comprising: a substrate having opposing first and second surfaces; a solder mask layer that covers at least a portion of the first surface of the substrate; and an opening in the solder mask layer; wherein the first surface of the substrate has a first electrically conductive feature, a second electrically conductive feature, and a mounting region for a flip chip oriented integrated circuit die; wherein the opening overlaps the first electrically conductive feature and the second electrically conductive feature; wherein the first electrically conductive feature is a portion of a first electrical signal net of the substrate, and the second electrically conductive feature is a portion of a second electrical signal net of the substrate; and wherein the first electrically conductive feature is proximate to the second electrically conductive feature, the first and second electrically conductive features each having an at least partially round shape, and the first and second electrically conductive features are configured to be selectively electrically coupled together by application of an electrically conductive material.