Patent ID: 8788277

Claim:
A digital signal processor comprising: an input configured to receive signal comprising a plurality of subbands and envelope information of the plurality of subbands, wherein the envelope information indicates a dynamic range of at least one of the plurality of subbands; a plurality of subband processors, coupled to the input, wherein each of the plurality of subband processors is configured to process a respective one of the plurality of subbands to provide a processed subband signal based on the envelope information of the one of the plurality of subbands to account for the dynamic range of the one of the plurality of subbands, wherein the one of the subband processors comprises a fixed-point signal processor configured to process the one of the plurality of subbands based on an internal state, the internal state computed based on previous values of the one of the plurality of subbands in accordance with a state-space model; and an output collector configured to provide an output signal based on the processed subband signal from each of the plurality of subband processors.