Patent ID: 6952124

Claim:
A phase-locked loop (PLL) circuit, comprising: a voltage-controlled oscillator (VCO) having a first input to receive a control voltage, one or more second inputs to receive one or more tuning range signals, and an output to provide an oscillation output signal; a phase detector having inputs to receive the oscillation output signal and a reference signal, and having an output; a charge pump having an input coupled to the output of the phase detector and having an output to generate the control voltage; a loop filter having an input to receive the control voltage and having a control terminal; and a control circuit having inputs to receive the control voltage, a high reference voltage, a low reference voltage, and one or more mode signals, and having a first output connected to the control terminal of the loop filter and second outputs to generate the tuning range signals, wherein the control circuit is configured to automatically generate the tuning range signals when the mode signals are set to a first state.