Patent ID: 8417508

Claim:
A method of simulating a multi-processor system by running system code that simulates the system on a host processor, in which: (a) a SPECULATE and a COMMIT instruction in the system code is used to mark an area of memory, shared across several simulated processors, and (b) the system code is translated at run time to a form required by the host processor; wherein: (i) all instructions are mapped to a native instruction set of the host using two different code dictionaries, a first code dictionary and a second code dictionary; and (ii) all instructions outside a SPECULATE/COMMIT region are mapped to a native instruction set of the host using the first code dictionary; and (iii) instructions within a SPECULATE/COMMIT region are mapped to the native instruction set of the host using the second code dictionary which uses a model that more accurately represents a multi-level memory of a final hardware implementation of the multi-processor system.