Patent ID: 8559698

Claim:
A method of inspecting chip defects, comprising steps of: (a) acquiring a raw image of a chip; processing the raw image through edge detection to obtain a raw edge image; after obtaining said raw edge image, determining a plurality of locations of edge points of possible boundaries and a plurality of locations of edge points of possible corners through chip boundaries derivation and chip corners derivation; deriving equations and parameters of affine transformation of a plurality of coordinates of the raw image and coordinates of the determined edge points to obtain coordinates of a chip image; and, according to the coordinate systems of said raw image and said chip image and according to said equations and parameters of affine transformation, an image region of said chip is acquired and segmented through chip image segmentation based on said raw image and said raw edge image to obtain said chip image and a chip edge image; and (b) inspecting defects of said chip, wherein, for various defect modes and various potential defect regions, a corresponding size of a defect mode scan window is set and the corresponding scan window is used to process various inspections on said chip edge image in a way of region by region; statistics of edge pixels at two inter-perpendicular directions are gathered; and, according to numbers of pixels obtained from said statistics of edge pixels, said inspections are processed, said inspections for various defect modes comprising an inspection of crack defects, an inspection of chipping defects and an inspection of residual-glue defects.