Patent ID: 7180135

Claim:
An SOI MOSFET inverter comprising: a) a multitude of terminals including: i) an input terminal; ii) an output terminal; iii) a supply voltage terminal; and iv) a ground terminal; b) an SDG load structure including: i) a first SDG junction having an n+ area connected to said supply voltage terminal; ii) a second SDG junction having an n+ area connected to said output terminal; iii) a first SDG gate having an n+ polysilicon area connected to said output terminal; and iv) a second SDG gate having an n+ polysilicon area connected to said output terminal; and c) an ADG load structure including: i) a first ADG junction having an n+ area connected to said ground terminal; ii) a second ADG junction having an n+ area connected to said output terminal; iii) a first ADG gate having an n+ polysilicon area connected to said input terminal; and iv) a second ADG gate having an p+ polysilicon area connected to said input terminal.