Patent ID: 7710192

Claim:
An IC-circuit construction, comprising: a circuit partitioned into multiple power consuming sub-circuits, the sub-circuits including a first and a second power supply terminal to receive supply voltage, the sub-circuits connected in series, a first sub-circuit receiving a first input voltage level at its first power supply terminal, and a second voltage level output at the second power supply terminal of the first sub-circuit being used as input voltage level in a second sub-circuit; and a control-circuit configured to balance voltage drops across the power consuming sub-circuits to maintain constant voltage-drops over the power consuming sub-circuits, the control-circuit including a first buffer capacitor coupled in parallel over the first power supply terminal and the second power supply terminal of the first sub-circuit, a second buffer capacitor coupled in parallel over the first power supply terminal and the second power supply terminal of the second sub-circuit, and at least one bucket capacitor alternately coupled in parallel over the first and the second buffer capacitor through a switching system controlled by a toggling signal.