Patent ID: 6876045

Claim:
A process for manufacturing a semiconductor device, comprising the steps of: forming a lower gate electrode film on a semiconductor substrate via a gate insulating film; forming an upper gate electrode film on the lower gate electrode film, the upper gate electrode film being made of a material having a lower oxidation rate than that of the lower gate electrode film; forming a gate electrode by patterning the upper gate electrode film and the lower gate electrode film, the gate electrode comprising a lower gate electrode element and an upper gate electrode element; forming source and drain regions by introducing an impurity into the semiconductor substrate; and forming oxide film sidewalls by oxidizing the side faces of the lower gate electrode element and the upper gate electrode element, the thickness of the oxide film sidewalls in the gate length direction being larger at the sides of the lower gate electrode element than at the sides of the upper gate electrode element, wherein the lower gate electrode film is formed of a Group IV semiconductor, wherein the lower gate electrode film contains SiGe, and wherein the upper gate electrode film is formed of a Group IV semiconductor containing SiGe, and wherein the upper gate electrode film has a lower Ge composition ratio than that of the lower gate electrode film.