Patent ID: 8031101

Claim:
A system comprising: an analog-to-digital converter (ADC); a spur cancellation engine coupled to the ADC; wherein, in operation: the ADC digitizes an analog waveform to produce a digital signal, wherein the digital signal includes signal-dependent spurs; the spur cancellation engine combines the digital signal with a spur cancellation signal to produce a spur-compensated digital signal; a signal combiner in the spur cancellation engine; wherein, in operation, the digital signal and a spur cancellation signal are combined at the signal combiner to produce the spur-compensated digital signal; a spur cancellation signal computation engine coupled to the signal combiner; wherein, in operation, the spur cancellation signal computation engine combines a coefficient B, where B[n] are adaptive spur cancellation amplitudes and phases at time n, with a value exp(j2πfn), where f is a frequency of a spur, to obtain the spur cancellation signal with a value B[n]exp(j2πfn).