Patent ID: 8638159

Claim:
A unit cell for a sub-circuit of a digitally tunable capacitor (DTC), the sub-circuit being adapted to be coupled between a first RF terminal and a second RF terminal, the unit cell comprising: a plurality of 2N switches coupled in series with M capacitors, the switches proceeding from a first switch closest the first RF terminal and farthest from the second RF terminal to a 2N-th switch farthest from the first RF terminal and closest to the second RF terminal; a first compensation capacitor stack, comprising (2N−1) stacked compensation capacitors, the (2N−1) stacked compensation capacitors being referred to as a first stacked compensation capacitor, a second stacked compensation capacitor, . . . , an i-th stacked compensation capacitor, . . . , to a (2N−1)-th stacked compensation capacitor, proceeding in a direction from the first RF terminal to the second RF terminal, wherein N and M represent integers greater than or equal to one, the M capacitors are placed between the N-th switch and the (N+1)-th switch in a manner such that a first stack of N switches from among the plurality of 2N switches is connected in series between the first RF terminal and the M capacitors, the M capacitors are connected in series between the first stack of N switches and a second stack of N switches from among the plurality of 2N switches, and the second stack of N switches is connected in series between the M capacitors and the second RF terminal, the i-th stacked compensation capacitor is connected in parallel with the first switch and an i-th switch and all switches in between, i being 1, 2, . . . , (2N−1), and the first compensation capacitor stack is configured to reduce the effect of parasitic capacitances of the plurality of 2N switches on the voltage across each switch when the plurality of 2N switches is off.