Patent ID: 8105938

Claim:
A method of manufacturing a semiconductor substrate, the method comprising: (a) forming a first wiring pattern on a substrate; (b) covering the first wiring pattern with an insulating resin, thereby forming a first insulating layer; (c) forming a second insulating layer on the first insulating layer; (d) forming a plurality of grooves through only a top surface of the second insulating layer to expose a top surface of the first insulating layer; (e) forming at least one via hole through the first and second insulating layers by irradiating at least a portion of the plurality of grooves with a laser beam while another portion of the plurality of grooves extend only through the top surface of the second insulating layer to the top surface of the first insulating layer; (f) forming a seed metal layer on an inner surface of the at least one via hole, inner surfaces of the grooves, and a surface of the second insulating layer; and (g) forming a plating layer in the at least one via hole to form a through via and the grooves to form a second wiring layer, by an electrolytic plating using the seed metal layer as a power feeding layer, wherein the second wiring layer contacts the surface of the first insulating layer; and (h) polishing the plating layer until the seed metal layer on the surface of the second insulating layer is removed, wherein after step (h), surfaces of the through via and the second wiring layer are flush with the surface of the second insulating layer, and wherein a diameter of a portion of the at least one via hole in the second insulating layer is the same as a diameter of a portion of the at least one via hole in the first insulating layer.