Patent ID: 7783869

Claim:
A data processing apparatus comprising: a processor for processing a stream of decoded instructions; a prefetch unit for fetching instructions within a stream of instructions from a memory prior to sending said stream of instructions to said processor; branch prediction logic configured to predict a behavior of a branch instruction; a branch target cache for storing predetermined information about branch operations executed by said processor, said predetermined information comprising: identification data for an instruction specifying a branch operation and data relating to whether said branch is taken or not; wherein said data processing apparatus is configured to access said branch target cache and to determine if there is data corresponding to instructions within said stream of instructions stored within said branch target cache and, if there is, to output said data, wherein said branch prediction logic is configured to predict from said data output by said branch target cache whether said instruction specifies a branch operation that will be taken and will cause a change in instruction flow, and, if so, output a target address from which a following instruction should be fetched; a data store for storing data indicative of a behavior of said branch instruction, wherein said data store comprises two portions, and for each instruction for which an access is made to said branch target cache, data relating to said instruction is stored in a first portion, and for instructions that said branch prediction logic predict to be branch instructions further data including said target address are stored in a second portion, a flag is set in said first portion to indicate storage of said further data; and said data processing apparatus, over a period of time, is configured to access predetermined information corresponding to more instructions within said branch target cache than instructions it prefetches from said memory such that said accesses to said branch target cache develop an advance in said instruction stream with respect to accesses to said memory; and said prefetch unit is configured to access said data store and to determine if there is data corresponding to an instruction within said data store that indicates that said instruction specifies a branch operation that will be taken and will cause a change in instruction flow.