Patent ID: 7022576

Claim:
A method of manufacturing a semiconductor device, comprising: forming a gate electrode on a semiconductor substrate; forming an oxide and nitride layers as a first sidewall layer on both sides of the gate electrode by CVD to cover the gate electrode; depositing an undoped layer composed of any one of SiO 2 , Si 3 N 4 , and SiON on the semiconductor substrate to cover the oxide layer and the gate electrode; forming a doped layer by ion-implanting impurities using the undoped layer as a target; selectively etching the oxide and doped layers in such a way that the first sidewall and doped layers are left only on both sides of the gate electrode; forming an LDD region on the semiconductor substrate by out-diffusing the impurities contained in the doped layer; removing the doped layer; forming a spacer on both sides of the first sidewall layer; and forming a source/drain region on other part of the active region by implanting the impurities thereto using the spacer as an ion implantation mask.