Patent ID: 7161396

Claim:
A power-on reset circuit to generate a reset signal, comprising: a pull-up resistor connected between a supply voltage and a tracking node; a pull-down transistor connected between the tracking node and ground potential, the tracking node generating a voltage indicative of the reset signal; and a voltage divider circuit connected between the supply voltage and ground potential, the voltage divider circuit having a first ratioed voltage node coupled to the gate of the pull-down transistor, wherein the voltage divider circuit comprises: a first resistor connected between the voltage supply and the first ratioed voltage node; a second resistor connected between the first ratioed voltage node and a second ratioed voltage node; a third resistor connected between the second ratioed voltage node and ground potential; and a shunt transistor connected between the second ratioed voltage node and ground potential, and having a gate responsive to the reset signal.