Patent ID: 6904115

Claim:
A current register unit comprising: a first transistor of a first type, having a gate coupled to a control signal and a first source/drain coupled to an output terminal; a second transistor of a second type, having a gate coupled to the control signal and a first source/drain coupled to an image current signal; a third transistor of the second type, having a gate coupled to the control signal and a first source/drain coupled to a second source/drain of the second transistor; a fourth transistor of the second type, having a gate coupled to a second source/drain of the third transistor and a first source/drain coupled to a first voltage level; a fifth transistor of the second type, having a gate and a first source/drain both coupled to a second source/drain of the fourth transistor and a second source/drain coupled to a second voltage level; a sixth transistor of the second type, having a gate coupled to the gate of the fifth transistor, a first source/drain coupled to a second source/drain of the first transistor, and a second source/drain coupled to the second voltage level; a first capacitor, having a first terminal coupled to the first voltage level and a second terminal coupled to the gate of the fourth transistor; and a second capacitor, having a first terminal coupled to the gate of the fifth transistor and a second terminal coupled to the second voltage level; wherein, the current register unit stores the image current signal when the control signal is at a first logic level and outputs the stored image current signal when the control signal is at a second logic.