Patent ID: 6990010

Claim:
A deglitching circuit for a radiation tolerant static random access memory (SRAM) comprising: a configuration memory having a plurality of configuration bits; read and write circuitry coupled to said configuration memory to configure said plurality of configuration bits; a radiation hard latch coupled to and controlling a programmable element, wherein said radiation hard latch comprises a plurality of inverters, the output of a first inverter of said plurality of inverters is coupled to the input of a second inverter of said plurality of inverters and the input of a first inverter is coupled to the output of a second inverter of said plurality of inverters, said plurality of inverters of said radiation hardened latch each comprises a pair of MOS transistors; and an interface coupling at least one of said plurality of configuration bits to said radiation hard latch when said write circuitry writes to said at least one of said plurality of configuration bits.