Patent ID: 7719375

Claim:
A method of automatically calibrating frequency features of a phase locked loop that has a plurality of banks by using a phase difference between a frequency division oscillation signal and a reference oscillation signal, the method comprising: finding an optimum bank among the plurality of banks by performing binary search including first through n-th binary searches; and selecting the optimum bank between a first bank selected by the (n−1)-th binary search and a second bank selected by the n-th binary search, wherein finding the optimum bank among the plurality of banks by performing binary search includes: charging a first capacitor and a second capacitor with a reference voltage; generating an up-signal and a down-signal responding to a phase difference between the frequency division oscillation signal and the reference oscillation signal; discharging the first capacitor and the second capacitor responding to the up-signal and the down-signal; comparing a voltage of the first capacitor with a voltage of the second capacitor after discharging the first and second capacitors; and selecting a bank based on the comparison result according to a regulation of binary search.