Patent ID: 8067724

Claim:
An all-optical clock, comprising: a substrate having a surface; a waveguide structure having a gate waveguide and at least one signal waveguide having an input port and an output port, said waveguide structure disposed adjacent said surface of said substrate; said gate waveguide of said waveguide structure configured to receive a gate signal; said input port of said at least one signal waveguide configured to receive an input optical signal; said output port of said at least one signal waveguide configured to provide as output an output signal; a signal splitter having an input port and at least two output ports, said signal splitter configured to receive as an input signal said output signal from said output port of said at least one signal waveguide, and configured to provide as an output at each of said at least two output ports a respective portion of said received input signal, one of said at least two output ports configured to deliver said respective portion of said received input signal to a user-selected output for later use; and a delay line having an input port configured to receive a signal from one of said at least two output ports of said signal splitter, and an output port configured to deliver said signal received from said splitter to said gate waveguide as said gate signal, said delay line configured to provide said gate signal with a selected delay between a time that said signal is received at said input port of said delay line and said signal is delivered to said gate waveguide.