Patent ID: 8753937

Claim:
A manufacturing method of a power transistor device with a super junction, comprising: providing a semiconductor substrate of a first conductivity type; forming at least one trench in said semiconductor substrate; filling a dopant source layer into said trench, wherein said dopant source layer comprises a plurality of dopants of a second conductivity type different from said first conductivity type; performing a first thermal drive-in process to diffuse said dopants into said semiconductor substrate, so as to form two doped diffusion regions in said semiconductor substrate at both sides of said trench, wherein the doping concentration of each said doped diffusion region close to the sidewall of said trench is different from the doping concentration of each said doped diffusion region far from the sidewall of said trench; removing said dopant source layer; and performing a tilt-angle ion implantation process and a second thermal drive-in process to adjust the doping concentration of each said doped diffusion region close to the sidewall of said trench.