Patent ID: 7251182

Claim:
A semiconductor integrated circuit, comprising: a central processing unit; and a memory unit, wherein said central processing unit is operable to access said memory unit, wherein said memory unit includes a memory mat, a first control circuit, a second control circuit, a first power controller, and a second power controller, wherein said memory mat is operable to store data from said central processing unit, wherein said first control circuit controls said memory mat based on an address from said central processing unit, wherein said second control circuit is operable to output said data from said memory mat to said central processing unit, wherein said first power controller is operable to control a power supply for said first control circuit, wherein said second power controller is operable to control a power supply for said first power controller, wherein said first power controller provides said power supply to said first control circuit and said second control circuit when said memory unit is accessed from said central processing unit, and wherein said first power controller stops said power supply for said first control circuit when said memory mat is un-selected.