Patent ID: 8143122

Claim:
A method of manufacturing a nonvolatile semiconductor memory comprising: forming a pattern of a floating gate electrode; forming an interelectrode insulating film covering a surface of the floating gate electrode; forming a conductive film on the interelectrode insulating film; forming an underlayer on the conductive film, the underlayer having a bulging portion above the floating gate electrode; forming a first mask layer on the underlayer; flattening the bulging portion, and forming a pattern of the first mask layer in a self-alignment manner, the pattern of the first mask layer having a first opening above the floating gate electrode; forming a second opening by etching the underlayer, with the first mask layer used as a mask, until the conductive film is exposed; forming a second mask layer on the conductive film exposed in the second opening; forming a pattern of the second mask layer in the second opening in a self-alignment manner, by etching the second mask layer; and forming a control gate electrode by etching the underlayer and the conductive film, with the second mask layer used as a mask.