Patent ID: 8030170

Claim:
A method of forming a plurality of isolation structures, comprising: forming a patterned mask over a semiconductor material; the mask defining a plurality of openings; extending the openings into the semiconductor material, each of the openings having a periphery along the semiconductor material; providing a polysilazane within the openings, there being no silicon nitride-containing material between the polysilazane and the semiconductor material along the peripheries of the openings; exposing the polysilazane to steam while not permitting a temperature of the polysilazane to exceed about 500° C.; the exposure to the steam converting all of the polysilazane to silicon oxide; and annealing the silicon oxide under an inert atmosphere; the annealing comprising exposure of the silicon oxide to a temperature gradient having only temperature changes of less than or equal to about 10° C./minute to ramp a temperature of the silicon oxide up to a maximum annealing temperature and down from the maximum annealing temperature; the maximum annealing temperature being at least about 700° C.