Patent ID: 6861312

Claim:
A method for fabricating a trench structure for a semiconductor circuit configuration, which comprises: forming in a semiconductor substrate at least one trench extending at least in part substantially vertically with respect to the semiconductor substrate, the trench having a wall, and first, second and third trench sections; and forming an insulation region at least one of: in a region of the wall, and as part of the wall by: forming the first trench section in the semiconductor substrate, the first trench section having a first wall region of the wall and a first temporary base region; forming a protective region on regions of the first trench section not to be widened; subsequently forming a widened region as the second trench section in at least one of a region of the first temporary base region and below the region of the first temporary base region, the second trench section having a second wall region of the wall and a secondary base temporary region; subsequently forming the insulation region in at least one of a region of the second wall region and as part of the second wall region from a substantially electrically insulating material; subsequently forming the third trench section adjoining the second trench section in at least one of a region of the second temporary base region and below the region of the second temporary base region.