Patent ID: 8670243

Claim:
A semiconductor memory device configured to operate in a first mode and a second mode which is higher in speed than the first mode, comprising: a substrate including a plurality of wiring layers, a first mounting pad, and a second mounting pad; a controller mounted on a first surface of the substrate, a distance between the first mounting pad and the controller is greater than a distance between the second mounting pad and the controller; a semiconductor memory mounted on the first surface of the substrate and on an opposite side of the controller from the first and second mounting pads, the semiconductor memory being coupled with the controller; and a connector including a first terminal and a second terminal, the first terminal being connected to the first mounting pad and dedicated to data transfer in the first mode, the second terminal being connected to the second mounting pad and dedicated to data transfer in the second mode, wherein the second mounting pad is connected to the controller through one of the plurality of wiring layers which is formed on the first surface of the substrate.