Patent ID: 7107166

Claim:
Test equipment for an LSI as a device under test, which compares an output signal output from the LSI to be measured as data to be measured with predetermined expectation value data to judge whether or not the LSI to be measured is failure, the test equipment comprising: a first LSI tester which inputs a first signal output from the LSI to be measured and which acquires the first signal by a plurality of strobes having a certain timing interval to output level data in a time series, the first LSI tester having a first time interpolator which is comprised of: a sequential circuit which inputs the first signal output from the LSI to be measured; a delay circuit which successively inputs a strobe delayed at a certain timing interval into the sequential circuit to output the level data of the time series from the sequential circuit; and an encoder which inputs the level data of the time series output from the sequential circuit and which encodes the level data into timing data indicating an edge timing of the clock of the LSI to be measured to output the data; a second LSI tester which inputs a second signal output from the LSI to be measured and which acquires the second signal by a plurality of strobes having a certain timing interval to output level data in a time series, the second LSI tester having a second time interpolator which is comprised of: a sequential circuit which inputs the second signal output from the LSI to be measured; and a delay circuit which successively inputs the strobe delayed at a certain timing interval into the sequential circuit and which allows the sequential circuit to output the level data of the time series; and a selection circuit which is disposed in at least one of the first and second LSI testers and which inputs the level data of the time series output from the first and second LSI testers to select the second signal input into the second LSI tester at a timing of the first signal input into the first LSI tester and which outputs the second signal as the data to be measured of the LSI to be measured, the selection circuit comprising a selector which selects one data from the level data of the time series input from the second time interpolator using the level data of the time series coded by the first time interpolator as a selection signal to output data to be measured of the LSI to be measured.