Patent ID: 7977178

Claim:
A method of forming asymmetric p/n junctions in a field effect transistor (FET) device, comprising: performing an angled dopant implant for the FET device, the FET device having a buried insulator layer formed on a bulk substrate, a first type semiconductor material formed on the buried insulator layer, and corresponding to a body region of the FET device, a second type of semiconductor material formed over the buried insulator layer, adjacent opposing sides of the body region, and corresponding to source and drain regions of the FET device, the second type of semiconductor material having a different bandgap than the first type of semiconductor material; wherein a source side p/n junction of the FET device is located substantially within whichever of the first and the second type of semiconductor material having a lower bandgap, and a drain side p/n junction of the FET device is located substantially entirely within whichever of the first and the second type of semiconductor material having a higher bandgap.