Patent ID: 8576155

Claim:
A source line driver circuit of an active matrix type display device comprising: a video signal line to which a video signal is input; a shift register comprising a flip-flop, which generates and outputs a plurality of sampling pulses, in which a start pulse signal and a clock signal are input, a writing starting period is synchronized with the start pulse signal, and writing finishing periods are delayed sequentially in accordance with the clock signal; and a plurality of switches to which the source lines are connected and by which the source lines and the video signal line conduct between each other in accordance with the sampling pulses, wherein the flip-flop comprises: a p-type transistor and a first n-type transistor, where a gate of the p-type transistor and a gate of the first n-type transistor are connected to an input of the flip-flop and the p-type transistor and the first n-type transistor are connected in series; a second n-type transistor connected to the first n-type transistor in series, where the clock signal is input to a gate of the second n-type transistor; and an inverter, where an input of the inverter is connected to a drain of the p-type transistor and a drain of the first n-type transistor and an output of the inverter is connected to an output of the flip-flop.