Patent ID: 8659073

Claim:
A semiconductor device, comprising: a gate insulating film formed on a surface of a p-type semiconductor region; a gate electrode disposed on the gate insulating film; LOCOS oxide films disposed on portions of the surface of the p-type semiconductor region, the portions being located at both ends of the gate electrode; a p-type channel stop diffusion layer disposed below one of the LOCOS oxide films; a p-type high concentration diffusion layer disposed on the p-type semiconductor region so as to contact the p-type channel stop diffusion layer; a first n-type high concentration diffusion layer disposed on the p-type semiconductor region so as to contact the p-type high concentration diffusion layer, wherein the first n-type high concentration diffusion layer is surrounded by the p-type high concentration diffusion layer in a planar manner; an n-type channel stop diffusion layer disposed below another one of the LOCOS oxide films; and a second n-type high concentration diffusion layer disposed to be in contact with the n-type channel stop diffusion layer.