Patent ID: 7884459

Claim:
A semiconductor device comprising: a substrate that has first and second surfaces; an integrated circuit unit, an electrode pad, and a select terminal that are formed on the first surface; a lead-out unit that has one end electrically connected to the bottom surface of the electrode pad and the other end exposed to the second surface of the substrate, the electrode pad being electrically extended to the second surface of the substrate, the lead-out unit being formed in a hole that is in the form of a concavity extending from the second surface of the substrate and penetrating the substrate, the bottom surface of the electrode pad being exposed through the bottom of the hole; and a plurality of side-surface electrode pads that are formed on a side surface of the substrate, one of said plurality of side-surface electrode pads being electrically connected to the select terminal, wherein said substrate carries, on said first surface thereof, a wiring pattern connecting said one of said plurality of side-surface electrode pads to said select terminal.