Patent ID: 7660838

Claim:
A computer-implemented method for converting from decimal to binary using a hardware counter tree, the method comprising: receiving a binary coded decimal (BCD) number made up of one or more sets of three digits into a hardware input latch; setting a running sum in a hardware running sum latch and a running carry in a hardware running carry latch to zero; repeating for each set of three digits in the BCD number in order from the set of three digits containing the three most significant digits of the BCD number to the set of three digits containing the three least significant digits of the BCD number: creating six partial products based on the set of three digits, the running sum and the running carry, the creating performed by a hardware partial product generator; combining the six partial products into two partial products, the combining performed by a 6:2 hardware counter tree, the 6:2 hardware counter tree connected to the hardware partial product generator; and storing the two partial products in the hardware running sum latch and the hardware running carry latch, the hardware input latch, the hardware running sum latch and the hardware running carry latch connected to the hardware partial product generator; combining the running sum and the running carry in a hardware adder to generate a final binary result, the final binary result having a value equivalent to the BCD number, wherein the BCD number converted is for a financial calculation; and storing the final binary result in a hardware result latch.