Patent ID: 7888177

Claim:
A method of manufacturing a semiconductor device, comprising: forming a wiring, on or above a wafer, such that the wiring is electrically connected to a first electrode disposed on a first surface of the wafer; forming a first resin layer on or above the wafer such that the wiring is disposed between the wafer and the first resin layer; forming an opening in the first resin layer such that the opening overlaps the wiring; forming a conductive member in the opening such that the conductive member is electrically connected to the wiring; forming a second electrode on the conductive member such that the second electrode is electrically connected to the wiring via the conductive member, a material of the second electrode being different from a material of the conductive member; and separating the wafer into individual elements after the forming of the first resin layer, wherein the wiring is formed to have a portion between the first electrode and the second electrode, the portion having a first portion and a second portion, the first portion extending along a first direction in a plane parallel to the first surface of the semiconductor chip, the second portion extending along a second direction in the plane, the second direction being different from the first direction.