Patent ID: 7569428

Claim:
A method for manufacturing a semiconductor device which comprises a substrate, a semiconductor chip and a plurality of terminals, the semiconductor chip comprising a principal surface and being mounted on the substrate, the plurality of terminals comprising a plurality of signal terminals, a plurality of power terminals related to the plurality of signal terminals and a plurality of ground terminals related to the plurality of signal terminals, the method comprising the steps of; preparing the substrate comprising an insulator which is formed with a plurality of signal lines, a plurality of power lines related to the plurality of signal lines and a plurality of ground lines related to the plurality of signal lines on the insulator in accordance with a predetermined layout; disposing a line of pads on the principal surface of the semiconductor chip in accordance with a pad layout defined by the predetermined layout, wherein the line of pads comprises a plurality of signal pads, a plurality of power pads related to the plurality of signal pads, a plurality of ground pads related to the plurality of signal pads; connecting the plurality of signal lines, the plurality of power lines and the plurality of ground lines with the plurality of signal pads, the plurality of power pads and the plurality of ground pads respectively; and connecting the signal terminals, the power terminals and the ground terminals with the plurality of signal lines, the plurality of power lines and the plurality of ground lines respectively; wherein: the insulator comprises a first region and a second region; the line of pads is arranged between the first region and the second region; the predetermined layout comprises a plurality of line groups, ones of which are arranged in the first region, while remaining line groups are arranged in the second region; each of the plurality of line groups comprises one of the power lines, one of the ground lines and one of the signal lines arranged between the one of the power lines and the one of the ground lines; and each of the plurality of line groups shares any one of the power line and the ground line with a neighboring line group of the plurality of line groups.