Patent ID: 8097542

Claim:
A method, comprising: forming a first dielectric layer above first and second transistors of a semiconductor device; forming an etch stop layer on said first dielectric layer at least above said first transistor by exposing said first dielectric layer to an oxidizing plasma ambient so as to oxidize a surface of said first dielectric layer; prior to forming said first dielectric layer, forming a third dielectric layer above said first and second transistors, forming a patterned mask layer above said semiconductor device to cover said first transistor and to expose at least a first portion of said third dielectric layer formed above said second transistor, and exposing said semiconductor device to a further oxidizing plasma ambient so as to oxidize at least a surface portion of said at least said first portion; removing portions of said first dielectric layer positioned above said second transistor; forming a second dielectric layer above said second transistor and on said etch stop layer; and selectively removing said second dielectric layer from above said first transistor by using said etch stop layer as an etch stop.