Patent ID: 8717827

Claim:
A method of programming data bits in cells of a flash memory, which comprises: providing a flash memory divided into a multiplicity of separately erasable physical blocks, the physical blocks in turn being split into individual physical pages to which the data bits can be written; holding the data bits in multilevel cells that can be used to store one lower bit and one upper bit per cell, the cell having four states that are distinguished by three voltage threshold values, and the lower states are associated with the lower bit and the upper states are associated with the upper bit, and wherein the pages are distinguished by lower pages allocated to the lower bits, and upper pages allocated to the upper bits, and wherein lower pages and upper pages containing the same cells are combined by way of a pairing table to form paired pages; and programming paired pages with the same data bits and listing the paired pages as reliable paired pages in management data for the flash memory to thereby assure reliable storage of data bits.