Patent ID: 7406550

Claim:
A microcontroller comprising: a central processor unit; a context manager comprising hardware circuitry operable to selectively determine one of a plurality of contexts of operation of said microcontroller; a plurality of sets of hardware registers, each set of registers being usable to store context information for a predetermined corresponding one of said plurality of contexts, said context manager operating to select a set of hardware registers from said plurality of sets of hardware registers corresponding to the determined one context of said plurality of context, said central processor unit utilizing said selected set of hardware registers; and a programmable input/output controller coupled to said central processor unit to transfer data between said central processor unit and a peripheral unit, said programmable controller being selectively programmed and operable in accordance with a selected predetermined interface for use by said peripheral unit said, programmable controller comprising: a program memory, said program memory being programmably arranged into a plurality of program thread sections, said memory being allocated for said program thread sections based upon the number or said program thread sections, each of said program thread sections being programmably selectable in size; the number of said plurality of sections and the size of said sections being programmed in accordance with at least one selected predetermined communication protocol for said peripheral unit; and a micro sequencer operable in accordance with each of said program thread sections to provide program control of said configurable controller.