Patent ID: 8626460

Claim:
A chip diagnostics client comprising: a diagnostic manager that: associates observed device failures detected when testing an integrated circuit device with physical locations within a die layout for the integrated circuit device using physical layout data for the integrated circuit device and scan instance information associated with the device failures, for a plurality of the observed device failures, generates a failure location occurrence relationship between physical locations and a device failure frequency associated with respective device failures, and for a particular observed device failure selected using the failure location occurrence relationship, (i) obtains gate identifying information associated with one or more logical defect candidates associated with that particular observed device failure, and (ii) obtains candidate physical location information associated with a candidate defect location within the die layout using the gate identifying information; and a diagnostic manager viewer that displays the candidate physical location information for that particular observed device failure together with a graphical representation of at least a portion of the die layout, the portion of the die layout that is displayed being correlated with a selected access privilege.