Patent ID: 8665024

Claim:
An amplifier comprising: an output stage ( 1 ) having two first power supply terminals ( 15 , 17 ) capable of receiving a first voltage defined by first positive (+V 2 ) and negative (−V 2 ) variable potentials with respect to a reference potential; and a circuit ( 2 ) for controlling the current in transistors of the output stage with a reference value, wherein: the output stage comprises a first and a second MOS transistors (MNh, MNl; MPh, MNl) in series between the first two terminals, the junction point of this series association defining an output terminal (OUT) of the amplifier; the control circuit comprises two measurement MOS transistors (N 21 , N 22 ; N 21 , P 22 ) having their respective sources and gates coupled to the respective sources and gates of the first and second transistors of the output stage; at least one control branch ( 23 , 24 ; 23 ′), comprising transistors in series between two terminals of application of a second voltage, defines nodes ( 11 , 13 ) connected to the gates of the output transistors, said second voltage being greater than the first one; and the first voltage is capable of reaching a value smaller than the threshold voltage of a MOS transistor.