Patent ID: 8578136

Claim:
Apparatus for processing data, comprising: a set of physical registers for storing data; processing circuitry for executing instructions of an instruction set, the processing circuitry requiring access to said data when executing said instructions; register renaming circuitry for mapping from architectural registers of a set of architectural registers to physical registers of said set of physical registers, said set of architectural registers being registers as specified by said instructions and said set of physical registers being physical registers for use when executing said instructions; available register identifying circuitry, responsive to a current state of said apparatus, for identifying which physical registers of said set of physical registers form a pool of physical registers available to be mapped by said register renaming circuitry to an architectural register specified by an instruction to be executed; and configuration storage for storing configuration data whose value is modified during operation of the processing circuitry, such that when said configuration data has a first value, the configuration data identifies at least one architectural register of said set of architectural registers which does not require mapping to a physical register by the register renaming circuitry; the available register identifying circuitry being arranged to reference said configuration storage, such that when said configuration data has said first value, the number of physical registers in said pool is increased due to the reduction in the number of architectural registers which require mapping to physical registers; software executing on the processing circuitry consists of a plurality of hierarchical the processing circuitry modifies the configuration data in the configuration storage depending on the hierarchical level of software currently being executed; at least one predetermined architectural register used by a first hierarchical level of software stores a value which is redundant when the processing circuitry is executing software at a second hierarchical level of software; the processing circuitry is arranged to set the configuration data to said first value when executing software at said second hierarchical level, so as to identify said at least one predetermined architectural register as not requiring mapping to a physical register by the register renaming circuitry; and the processing circuitry is further arranged to modify the configuration data to a value other than said first value when executing software at said first hierarchical level.