Patent ID: 7327214

Claim:
A chip resistor fabrication process comprising the steps of: preparing a resistor bar including a first principal surface, a second principal surface opposite to the first principal surface, and two side surfaces extending between the first and second principal surfaces; forming a plurality of first insulating films spaced from each other on the first principal surface, while also forming a plurality of second insulating films spaced from each other on the second principal surface; forming a third insulating film on each of the two side surfaces, the third insulating film partially covering the first and second insulating films; forming a first conductive layer on areas of the first principal surface where the first insulating films are not formed, while also forming a second conductive layer on areas of the second principal surface where the second insulating films are not formed, the first conductive layer being greater in thickness than the first insulating films, the second conductive layer being greater in thickness than the second insulating films; and dividing the resistor bar into a plurality of resistor chips; wherein the division of the resistor bar is performed in a manner such that each of the resistor chips is made to have electrodes originating from the first and second conductive layers.