Patent ID: 8499443

Claim:
A method for producing electronics packages, comprising: (a) defining a plurality of first substrates on a first wafer and a plurality of second substrates on a second wafer; (b) forming at least one non-penetrating electrode hole in a respective at least some of the first substrates, wherein the at least one non-penetrating electrode hole is substantially frustoconical with diameters being smaller towards a bottom of the diameter and press-formed with at least one frustoconical projection pressed into the first wafer under heat; (c) inserting one end portion of a conductive pillar in a respective at least some of the non-penetrating electrode holes, wherein the one end portion of the conductive pillar is of a substantially frustoconical shape similar to but slightly smaller than an inner periphery of the non-penetrating electrode hole so as for there to be a gap between the inserted conductive pillar and the inner periphery of the non-penetrating electrode hole; (d) heating the first wafer and pressing the conductive pillar into the respective at least some of the non-penetrating electrode holes under heat to close the gap; (e) removing one surface of a respective at least some of the first substrates in a depth sufficient to expose one end of each of the conductive pillars from the removed one surfaces; (f) layering the first and second wafers such that at least some of the first substrates substantially coincide respectively with at least some of the corresponding second substrates to form respective pairs, with a cavity being formed between at least some of the coinciding first and second substrates; and (g) cutting off a respective at least some of the layered pairs of the coinciding first and second substrates from the first and second wafers.