Patent ID: 7749839

Claim:
A method of fabricating a semiconductor device, comprising: forming a first insulating film on a semiconductor substrate; forming a first charge storage layer on the first insulating film; forming a mask material on the first charge storage layer; etching the first charge storage layer, the first insulating film and the semiconductor substrate using the mask material as a mask so as to form a trench; forming a second insulating film in the trench so that a first upper surface of second insulating film is flush with a second upper surface of the mask material; removing the mask material so as to expose a third upper surface of the first charge storage layer; forming a third insulating film on the third upper surface of the first charge storage layer and on an inner side surface of the second insulating film so as to expose a center of the third upper surface of the first charge storage layer; forming a second charge storage layer on the exposed center of the third upper surface of the first charge storage layer, a fourth upper surface of the second charge storage layer being flush with the first upper surface of the second insulating film, a width of the second charge storage layer being smaller than a width of the first charge storage layer; etching the second and the third insulating films so that a side surface of the second charge storage layer is exposed, a fifth upper surface of the etched second and third insulating films is located between a level of the third upper surface of the first charge storage layer and a level of a fourth upper surface of the second charge storage layer; forming a fourth insulating film on the second charge storage layer; and forming a control gate electrode on the fourth insulating film.