Patent ID: 7467175

Claim:
An integrated circuit comprising: a plurality of configurable logic blocks; a programmable interconnect for programmably interconnecting the configurable logic blocks; and a plurality of digital signal processing (DSP) slices, wherein a first DSP slice of the plurality of DSP slices is connected to a second DSP slice of the plurality of DSP slices, the first DSP slice including: a first operand input port for programmably connecting to the programmable interconnect and including a first operand input; a second operand input port including a second operand input; a product generator having a multiplier port, a multiplicand port, and a product port; a first operand input circuit connected between the first operand input port and the multiplier port, the first operand input circuit including: a multiplexer having a first multiplexer input port connected to the first operand input port, a second multiplexer input port, a third multiplexer input port, and a multiplexer output port connected to the multiplier port; a first storage element connected between the first operand input port and the second multiplexer input port; and a second storage element connected between the second multiplexer input port and the third multiplexer input port.