Patent ID: 7388804

Claim:
A semiconductor memory device for driving a word line, comprising: a control signal generator for generating a block information signal by logically combining first and second addresses containing mat information, and outputting a normal word line control signal activated during an active operation by logically combining the block information signal and a normal word line enable signal; a driving control signal generator for generating a word line control signal by logically combining the block information signal, a first active control signal, and a redundant enable signal; a driving enable signal generator for generating a main word line driving enable signal and a sub word line driving enable signal by logically combining the normal word line control signal and a second active control signal which does not contain redundancy information; and a main/sub word line driving controller for generating a main word line driving signal by combining the main word line driving enable signal and addresses for driving the main word lines, and generating a sub word line driving signal by combining the sub word line driving enable signal and addresses for driving the sub word lines, when the word line control signal is activated.