Patent ID: 7802108

Claim:
A system to securely store a program code of an embedded system, the system comprising: a configurable integrated circuit, the configurable integrated circuit comprising: a memory to store a digitation file, the digitation file comprising a tightly coupled interdigitated stream comprising configuration information and data to be processed, wherein the memory includes an adaptive silicon foundation, and wherein the digitation file, when applied to the adaptive silicon foundation, provides a hardware designation and software application for the adaptive silicon foundation, a plurality of computational elements, and an interconnection network, the interconnection network adapted to configure the plurality of computational elements in response to the configuration information to perform any one of a plurality of algorithms in response to the configuration information; and computer readable medium storage external to the configurable integrated circuit for receiving a plurality of segmented encrypted digitation files from the configurable integrated circuit, each of the plurality of segmented encrypted digitation files including one or more of the algorithms, wherein the configurable integrated circuit is further adapted to: encrypt each of the digitation files and hash each of the digitation files to form hash data, separate each of the encrypted digitation files into a set of data blocks, wherein a size of the data blocks is based on the functions and subroutines included in the encrypted digitation file and is further based on module types associated with the modules included in the configurable integrated circuit, transfer each data block in the set of data blocks to the computer readable medium storage, retain an encryption key and the hash data in on-chip memory, retrieve a selected one of the segmented digitation files from the computer readable medium storage, decrypt on-chip the retrieved segmented encrypted digitation file and hash the decrypted digitation file, and when the hash data of the decrypted digitation file matches the retained hash data, separate the decrypted digitation file into a set of data blocks, wherein the size of the data blocks is based on the functions and subroutines included in the decrypted digitation file and is further based on module types associated with the modules included in the configurable integrated circuit, and provide the configuration information of the retrieved segmented digitation file to the interconnection network to configure the plurality of computational elements into one of a plurality of modes of operation to process the coupled data of the retrieved digitation file according to an algorithm in the retrieved segmented digitation file.