Patent ID: 7700436

Claim:
A method for forming microelectronic structures in a substrate, comprising: disposing a conductive material on the substrate, the conductive material including a first conductive portion positioned in an aperture of the substrate, and a second conductive portion projecting beyond a substrate material plane bounding the substrate, wherein the aperture extends into the substrate from the substrate material plane; disposing a generally non-conductive material on the substrate and in the aperture, the non-conductive material including a first non-conductive portion in the aperture proximate to the first conductive portion and a second non-conductive portion projecting from the aperture and extending beyond the substrate material plane; polishing the substrate to remove at least a part of the second non-conductive portion external to the aperture so that the remaining second non-conductive portion is generally flush with the second conductive portion; recessing the remaining second non-conductive portion inwardly toward the substrate material plane from the second conductive portion by a recess distance via selective etching with the recessed second portion still projecting beyond the substrate material plane; thereafter, removing the second conductive portion of the conductive material via electrochemical-mechanical polishing while the recessed second non-conductive portion projects beyond the substrate material plane; and removing the recess second non-conductive portion projecting beyond the substrate material plane.