Patent ID: 8004306

Claim:
A semiconductor device, comprising: a ring oscillating circuit including 2n+1 logic circuits connected in series, where n is an integer of 1 or greater; and an error detecting circuit receiving output signals of at least two of the logic circuits and outputting an error detection signal if a phase difference between the output signals is not within a predetermined phase difference range, the error detecting circuit including a monitor circuit which outputs to a determination circuit, and the determination circuit outputs to a control circuit, the monitor circuit including a plurality of phase comparators, wherein the at least 2n+1 logic circuits includes at least one of a second to a 2n logic circuit that are connected by the error detecting circuit to a last logic gate of the 2n+1 logic circuits so that each of the plurality of the phase comparators is configured to receive output waveforms of two inverter circuits of the 2n+1 logic circuits such that the determination circuit determines that if a phase difference between output waveforms of the two inverter circuits is within a predetermined range a Low level signal is output to the control circuit or otherwise a High level signal is output to the control circuit, and the control circuit outputs an output of the last circuit of the ring oscillator circuit to OUT if the signal is LOW.