Patent ID: 8296549

Claim:
An overlapping command submitting method of dynamic cycle pipeline, for a chip having a pipeline including a plurality of stages, comprising the following steps: (a) reading a new command from a command buffer and storing it in a command register; (b) decoding the new command; (c) preparing initial operators of each stage of the pipeline, and storing them into an initialization register of the pipeline; (d) judging whether the pipeline is not full, if it is not full, directly inserting the new command; otherwise, waiting for an exiting signal provided by the pipeline, the exiting signal being sent during a pipeline period immediately before a last cycle of an old command exiting the pipeline; (e) after receiving the exiting signal, judging whether there is command relevance between the new command to be inserted and the old command to exit, if yes, then inserting the new command after the old command exits; otherwise, performing a next step; (f) when the old command is in its last cycle, inserting the new command into the pipeline, wherein the new command is inserted into the pipeline at a pipeline stage that is the same as the old command during the last cycle of the old command; wherein the new command and the old command each contain a field, wherein step (e) includes determining whether there is any field conflict between the new command and the old command, wherein if there is any field conflict between the new command and the old command, then a field branch is created, the field branch including a major current register for storing the field of the new command and a branch current register for storing the field of the old command, the field of the new command being added into the pipeline when submitting, and the field of the old command being entered into the branch current register and maintained in the field branch until the old command uses the field for the last time, wherein the major current register and the branch current register are connected to a hardware processing module through a multi-route switch, wherein if the new command is processed by the hardware processing module, the hardware processing module receives an input of the major current register in which the field of the new command is stored, and if the old command is processed by the hardware processing module, the hardware processing module receives an input from the branch current register in which the field of the old command is stored, and wherein if there is no field conflict, a field switch is conducted in a corresponding pipeline segment after submitting.