Patent ID: 8259759

Claim:
A method of performing frame synchronization, comprising: receiving a binary stream comprising a plurality of N-bit frames; and starting at an initial location μ in the binary stream, detecting a preamble of length L in the binary stream by calculating a decision metric S(μ), the decision metric computed over the bit positions within the interval μ and μ+L−1 and consisting of a plurality of terms, including a first term indicative of the difference between the signal levels of the received detected bits and the corresponding bit signal levels expected if the preamble were present at position μ, a second term indicative of the difference between the signal levels of the received detected bits and the corresponding bit signal levels expected for the received detected bits, wherein the first and second terms are dependent on noise variances associated with the expected signal levels, wherein said receiving and detecting are performed on one or more digital logic devices.