Patent ID: 8541782

Claim:
A method for manufacturing a semiconductor device, comprising steps of: forming a MOS capacitor having a transistor including an oxide semiconductor layer over a substrate; obtaining a C-V characteristic by plotting a relationship between a gate voltage V g and a capacitance C of the MOS capacitor; obtaining a graph by plotting a relationship between the gate voltage V g and (1/C) 2 with the use of the C-V characteristic; calculating a carrier density N d by obtaining a differential value of (1/C) 2 in a weak inversion region in the graph and substituting the differential value into a mathematical formula: N d = - ( 2 e ⁢ ⁢ ɛ 0 ⁢ ɛ ) / ⅆ ( 1 / C ) 2 ⅆ V where e is an electron charge ε 0 is a vacuum permittivity, and ε is a relative permittivity of the oxide semiconductor layer; and performing heat treatment of the transistor when the carrier density is determined to be 1×10 18 cm −3 or more.