Patent ID: 8803609

Claim:
An amplifier circuit comprising: a first input node configured to receive a first input voltage signal; a first output node configured to output a first output voltage signal; a voltage converter circuit including one or more voltage converter components configured to convert the first input voltage signal to a first current signal; and a first current converter circuit coupled to the voltage converter circuit at a first internal node, the first current converter circuit including one or more first current converter components that include a first transistor coupled between the first internal node and the first output node and an amplifier coupled between the first internal node and a gate of the first transistor, wherein the first current converter circuit is configured to convert the first current signal to the first output voltage signal and to buffer the first current signal from the voltage converter circuit so that a first internal node Resistance-Capacitance (RC) time constant at the first internal node, due to one or more of the one or more voltage converter components or the one or more of the first current converter components, is smaller than a first output node RC time constant at the first output node due to a load coupled to the first output node or one or more of the first current converter components, such that an increase in a gain of the voltage converter circuit does not appreciably affect a bandwidth of the amplifier circuit.