Patent ID: RE40887

Claim:
A method of I/O pad relocation that provides a universal I/O pad interface allowing use of a standardized package for packaging of semiconductor devices, the relocated I/O pads being created on the surface of a thick, soft dielectric material such as polyimide, whereby the relocated I/O pads are wide metal pads, comprising the steps of: providing a semiconductor surface whereby said semiconductor surface has been provided with points of electrical contact therein; creating a base layer of SiO 2 over said semiconductor surface; depositing a first layer of conductive material over said semiconductor surface; patterning and etching said first layer of conductive material, creating conductive pads that align with said points of electrical contact provided in said semiconductor surface, providing a conductive interface between said points of electrical contact provided in said semiconductor surface and said patterned and etched second layer of conductive material; patterning and etching said base layer of SiO 2 as an extension of said patterning and etching said first layer of conductive material, using a pattern for this patterning of said base layer that is identical to a pattern used for etching said first layer of conductive material thereby removing said base layer from said semiconductor surface except where said base layer underlies said patterned first layer of conductive material; attaching at least one bond wire to said conductive pads for further interconnects; depositing a layer of passivation over said semiconductor surface, including said points of electrical contact; patterning and etching said layer of passivation, creating openings in said layer of passivation to said points of electrical contact provided in said semiconductor surface; depositing a first layer of dielectric comprising polyimide or photosensitive polyimide deposited to a thickness between about 5,000 and 10,000 Angstrom over said layer of passivation, including said openings created in said layer of passivation; patterning and etching said first layer of dielectric, creating openings in said first layer of dielectric that align with said openings in said layer of passivation; depositing a second layer of conductive material over the surface of said first layer of dielectric, including said openings in said first layer of dielectric; patterning and etching said second layer of conductive material, creating a pattern of conductive material that is wide and that serves as a bond pad; and providing a wire bond connection to said bond pad for further interconnect.