Patent ID: 7519751

Claim:
A method comprising: receiving, at a first circuit of a memory device, a logic configuration signal generated at a second circuit of the memory device, the logic configuration signal configured to indicate a selection of a serial communication protocol from a plurality of serial communication protocols; receiving, at the first circuit, a logic selection signal from a first pin of the memory device, the logic selection signal configured to indicate a selection of a parallel communication protocol; receiving, at the first circuit, a first start signal from a second pin of the memory device, the first start signal configured to indicate a start of a selected communication protocol; receiving, at the first circuit, a second start signal generated at a third circuit of the memory device, the second start signal configured to indicate receipt of a start cycle of a selected serial communication protocol; generating, at the first circuit, an enable signal based at least in part on the logic configuration signal, the logic selection signal, the first start signal, and the second start signal; and providing the enable signal to a memory core of the memory device to enable a transfer operation.