Patent ID: 7141943

Claim:
A Brushless DC (BLDC) motor system comprising: a power supplying means for supplying a DC voltage and a DC current; a BLDC motor including a rotator and a stator having a plurality of coils, wherein a position change of the rotator generates a counter-electromotive force, and currents having different phases are applied to the coils; an inverter for receiving the DC current and providing the currents having the different phases to the coils, wherein the inverter includes a plurality of switching means driven with different switching pulses during a commutation interval to rotate the rotator; a DC current sensing means for sensing the DC current when the currents having the different phases are applied from the switching means to the coils; a position detecting means for detecting a position of the rotator; and a controlling means for receiving a reference current from outside and calculating a magnitude of the counter-electromotive force based on the detected position, generating a compensation voltage based on the counter-electromotive force, and controlling the switching means based on the compensation voltage during the commutation interval, wherein the controlling means controls a duty ratio of the switching pulses based on differences between the currents applied to the coils and the reference current, and wherein the controlling means comprises: a first adder for outputting difference values between the currents applied to the coils and the reference current value; a first multiplier for multiplying the difference values by a first constant; a second multiplier for multiplying the magnitude of the counter-electromotive force by a second constant; a second adder for adding the outputs from the first multiplier and the output from the second multiplier; a voltage compensator for outputting the compensation voltage based on the magnitude of the counter-electromotive force; a voltage compensation switching unit for switching the compensation voltage; a third adder for adding the output from the voltage compensation switching unit to each of the outputs from the second adder; a pulse width modulator for modulating a width of a carrier wave based on the outputs from the third adder; a gate driver for generating the switching pulses to the switching means based on the output from the pulse width modulator; and a commutation detector for detecting levels of the currents during the commutation interval and controlling the voltage compensation switching unit based on the switching pulses.