Patent ID: 7180370

Claim:
A CMOS amplifier circuit, comprising: a differential input circuit including: first and second differential input nodes; a first MOS input transistor having gate, drain, and source terminals, the gate terminal of the first MOS input transistor coupled to the first differential input node; and a second MOS input transistor having gate, drain, and source terminals, the gate terminal of the second MOS input transistor coupled to the second differential input node; a load circuit coupled to the differential input circuit; at least one signal output coupled to the differential input circuit; and a first compensating capacitor coupled between the signal output and one of the first and second differential input nodes, wherein the first and second MOS input transistors are approximately matched MOS transistors each having a gate-to-drain capacitance approximately equal to a first capacitance, and the first compensating capacitor has a capacitance approximately equal to the first capacitance.