Patent ID: 8169033

Claim:
A semiconductor device comprising: a positive channel metal oxide semiconductor (PMOS) transistor formed in a first region of a workpiece, the PMOS transistor including a first gate dielectric disposed over the workpiece and a first gate electrode disposed over the first gate dielectric, the first gate electrode comprising a first layer of conductive material and a first layer of semiconductive material disposed over the first layer of conductive material, wherein a first work function of the first gate electrode of the PMOS transistor is established by the first layer of semiconductive material, wherein the first gate dielectric comprises a midgap metal; and a negative channel metal oxide semiconductor (NMOS) transistor formed in a second region of the workpiece proximate the first region of the workpiece, the NMOS transistor including a second gate dielectric disposed over the workpiece and a second gate electrode disposed over the first gate dielectric, the second gate electrode comprising a second layer of conductive material and a second layer of semiconductive material disposed over the second layer of conductive material, wherein a second work function of the second gate electrode of the NMOS transistor is established by the second layer of semiconductive material.