Patent ID: 8775685

Claim:
A network packet processor, comprising: a plurality of processing pipelines, each processing pipeline configured and arranged to process packets having sizes less than or equal to an associated processing size; wherein the respective processing size associated with one of the processing pipelines is different from the processing size associated with at least one other of the processing pipelines; wherein each processing size is a largest size packet that the associated processing pipeline is capable of processing; and a scheduling circuit coupled to the plurality of processing pipelines, the scheduling circuit configured and arranged to: determine respective packet sizes of one or more packets input in parallel to the network packet processor from a bus; and assign each packet of the one or more packets for processing by one of the processing pipelines as a function of the respective packet size of the packet and the processing size associated with the one of the processing pipelines, wherein the respective packet size of the packet is less than or equal to the processing size associated with the one of the processing pipelines.