Patent ID: 8624303

Claim:
A field effect transistor comprising: a substrate; an active layer formed on said substrate; and a source wiring, a drain wiring and a gate wiring formed above said active layer, said source wiring being formed in a comb shape having a source wiring base and a plurality of source wiring fingers protruding from said source wiring base, said drain wiring being formed in a comb shape having a drain wiring base and a plurality of drain wiring fingers protruding from said drain wiring base, said source wiring and said drain wiring being arranged to oppose each other such that said source wiring fingers and said drain wiring fingers interdigitate, said gate wiring having a gate wiring base, a plurality of gate wiring fingers protruding from said gate wiring base, and a connection connecting tips of adjacent said gate wiring fingers, said gate wiring finger being arranged between said source wiring finger and said drain wiring finger, and said gate wiring base being arranged between said source wiring base and said drain wiring fingers and intersecting with said source wiring fingers, with an insulating film interposed between said gate wiring base and said source wiring fingers, wherein adjacent said gate wiring fingers and said connection connecting said gate wiring fingers make up a first wiring, a section of said gate wiring base between two points where adjacent said gate wiring fingers connected by said connection are connected to said gate wiring base, respectively, makes up a second wiring which is electrically parallel with said first wiring, and said first wiring has an electrical resistance not less than an electrical resistance of said second wiring.