Patent ID: 8007629

Claim:
A method of manufacturing a multi-layer circuit board in which a core circuit board having a circuit pattern thereon and a prepreg sheet having a through-hole filled with conductive paste are laminated, the method comprising: forming a laminated structure from (i) a laminated member including the core circuit board and the prepreg sheet and (ii) a pair of lamination plates, the laminated member being sandwiched between the pair of lamination plates; applying heat and pressure to the laminated structures; measuring the thermal expansion coefficient of the core circuit board; and selecting the pair of lamination plates such that the thermal expansion coefficient of the pair of lamination plates is equivalent to the measured thermal expansion coefficient of the core circuit board, wherein a thermal expansion coefficient of the core circuit board is in a range of 10×10 −6 /° C. to 12×10 −6 /° C., wherein the laminated member further includes a layer of metal foil on both surfaces thereof that are sandwiched between the pair of lamination plates, such that each layer of metal foil is sandwiched between the pair of lamination plates, wherein the metal foil is made of copper, and the thermal expansion coefficient of the pair of lamination plates is smaller than a thermal expansion coefficient of the metal foil.