Patent ID: 8716036

Claim:
A method for the collective fabrication of 3D electronic modules, comprising: fabricating a stack of N reconstructed wafers, where N≧1, being KGRWs, each comprising only identical patterns validated after an electrical test, one pattern comprising at least one active and/or passive silicon component, at least one reconstructed wafer comprising active components, this stack including a redistribution layer with a maximum of 4 interconnection levels; fabricating a panel of identical passive printed circuits comprising only passive printed circuits comprising at least 6 interconnection levels and validated after a test, which comprises: fabrication of a panel of identical printed circuits, electrical testing of each printed circuit, fitting of the validated printed circuits after this test to an adhesive substrate, moulding of the mounted circuits in an electrically insulating resin of the epoxy type, called coating resin and polymerization of the resin, and removal of the adhesive substrate, a panel comprising only validated printed circuits, being a panel of KGRPs, being thus obtained after this step; bonding the panel of KGRPs with a stack of KGRWs, in order to form a stack of KGRWs-KGRP panel assembly; and cutting the stack of KGRWs-KGRP panel assembly along cutting lines for the purpose of obtaining the 3D electronic modules.