Patent ID: 8193047

Claim:
A method of manufacturing a semiconductor device comprising: doping an N type impurity into a substrate doped with P type impurity to divide the substrate into a P type impurity region and an N type impurity region; first forming at least three active patterns in the P type and N type impurity regions, the at least three active patterns being parallel to one another and arranged in a first direction, the at least three active patterns extending longitudinally in a second direction, the second direction being perpendicular to the first direction; and second forming at least three gate patterns, each of the at least three gate patterns on at least one of the at least three active patterns, the at least three gate patterns being parallel to one another and arranged in the second direction, each of the at least three gate patterns extending longitudinally in the first direction, the at least, three gate patterns having a uniform first pitch between adjacent ones of the at least: three gate patterns in the second direction; and wherein the at least three active patterns have a uniform second pitch between adjacent ones of the at least three active patterns in the first direction.