Patent ID: 6842346

Claim:
A semiconductor device, comprising; a first power supply terminal supplying a first power supply potential; a second power supply terminal supplying a second power supply potential lower than said first power supply potential; an output terminal connected in series between said first power supply terminal and said second power supply terminal; a first field effect transistor in which a source-drain path is connected in series between said first power supply terminal and the output terminal; and a second field effect transistor in which a source-drain path is connected in series between said output terminal and said second power supply terminal, wherein said first field effect transistor comprises: a semiconductor substrate having a first main surface and a second main surface opposite to said first main surface; a gate insulating film formed on said first main surface of said semiconductor substrate; a gate electrode formed on said gate insulating film; and a first and a second semiconductor regions for a source and a drain formed on said first main surface and on both end portions of said gate electrode, and wherein said second field effect transistor comprises: a semiconductor substrate having a first main surface and a second main surface opposite to said first main surface; a gate insulating film formed on said first main surface; a gate electrode formed on said gate insulating film; a first semiconductor region for a source formed on said first main surface and formed adjacent to said gate electrode; and a second semiconductor region for a drain formed on said second main surface.