Patent ID: 8884602

Claim:
A reference voltage circuit, comprising: a first depletion transistor including: a drain to which a voltage based on a voltage of a power supply terminal is input; and a gate and a source which are electrically connected to each other; a second depletion transistor including: a drain to which the voltage based on the voltage of the power supply terminal is input; a gate connected to a first terminal to which a predetermined voltage is input; and a source connected to a second terminal; a third depletion transistor including: a drain to which the voltage based on the voltage of the power supply terminal is input; and a gate and a source which are electrically connected to each other; a fourth depletion transistor including: a drain to which the voltage based on the voltage of the power supply terminal is input; a gate connected to a third terminal to which a predetermined voltage is input; and a source connected to a fourth terminal, wherein the first terminal and the third terminal are configured to input a desired voltage so that a current based on a current flowing through the first depletion transistor flows through the second depletion transistor, wherein a total current of the current based on the current flowing through the first depletion transistor and a current based on a current flowing through the third depletion transistor flows through the fourth depletion transistor, wherein the first depletion transistor and the second depletion transistor have the same threshold, and the third depletion transistor and the fourth depletion transistor have the same threshold, and wherein the first depletion transistor and the third depletion transistor have different thresholds; and a multiplier unit that generates a reference voltage by multiplying a voltage difference between a voltage generated between the first terminal and the second terminal and a voltage generated between the third terminal and the fourth terminal by a predetermined factor.