Patent ID: 8154933

Claim:
A mode-register reading controller, comprising: a switching signal generator configured to generate a switching signal in an activated state when a reset command during a mode-register reading operation is input; a first transmitter, in response to the switching signal, is configured to buffer and transfer a mode-register read signal in an activated state after a first delay period from an input of a mode-register read command; a second transmitter, in a predetermined delay time in response to the switching signal, is configured to delay and transfer an enable signal in an activated state after a second delay period from an input of the mode-register read command; and a control signal generator configured to receive a signal from one of the first and second transmitters, to generate a first control signal for loading data into an input/output line from a mode register, and to generate a second control signal for transferring the data into a data output buffer from the input/output line.