Patent ID: 8812288

Claim:
A speed converting apparatus with a load controlling function interposed between an emulation device on which a target to be verified is emulated and an arithmetic unit connected to said emulation device to verify said target to be verified, on the basis of an operation of said emulation device in response to a request to said emulation device, to absorb a difference in operation speed between said emulation device and said arithmetic unit, said speed converting apparatus comprising: a first interface unit which operates for said emulation device according to a system clock of said emulation device to function as an interface with said emulation device; a second interface unit which operates for said arithmetic unit according to a system clock of said arithmetic unit to function as an interface with said arithmetic unit; and a load controlling unit interposed between said first interface unit and said second interface unit to control at least either a load on said emulation device caused by a request outputted to said emulation device through said first interface unit or a load on said arithmetic unit caused by a request outputted to said arithmetic unit through said second interface unit, wherein said load controlling unit comprises a generating unit which generates the request to be outputted to said emulation device or said arithmetic unit.