Patent ID: 8204926

Claim:
A computer executable method embodied in an arithmetic functional hardware unit of a modal interval processor for performing a modal interval arithmetic operation utilizing representations of first and second modal interval operands such that each modal interval operand of the modal interval operands is delimited by first and second marks of a digital scale, each mark of the marks comprising a bit-pattern, the method comprising: a. constructing a bit-mask based upon each bit-pattern of the marks of the modal interval operands wherein a presence or absence of an exceptional arithmetic condition is represented by a bit of bits of said bit mask, and a presence or absence of an indefinite operand or division by zero is represented by another bit of bits of said bit mask; b. detecting a presence of an exceptional arithmetic condition, or an indefinite arithmetic operation associated with the constructed bit-mask; and thereafter, c. separately and selectively addressing the detected exceptional arithmetic condition, or indefinite operand or division by zero of said modal interval operation.