Patent ID: 8576630

Claim:
A method of programming a first plurality of reference cells in a memory device having an array of non-volatile memory cells and a second plurality of comparators comprising: (i) programming one of said first plurality of reference cells; (ii) programming a third plurality of non-volatile memory cells, wherein said third plurality is associated with one of said second plurality of comparators; (iii) reading said third plurality of non-volatile memory cells using one of said second plurality of comparators and a reference voltage; (iv) continuing the programming of said third plurality of non-volatile memory cells based upon said reading; (v) measuring the read signals of the third plurality of non-volatile memory cells; (vi) calculating the median value of the signals from the measured signals of the third non-volatile memory cells; and (vii) continuing the programming of said one of said first plurality of reference cells based upon said calculation.