Patent ID: 7551508

Claim:
A storage circuit, comprising: a plurality of storage elements comprising groups of storage cells; control logic for providing read and write access between the storage cells and a storage interface; a plurality of voltage selection circuits, each having an output coupled to a power supply input of a corresponding one of the plurality of storage array elements and at least two power supply inputs, each coupled to a plurality of power supply voltage sources having differing non-zero voltages, wherein the voltage selection circuits each provide a selected one of the plurality of differing non-zero voltages in response to a corresponding one of a plurality of digital control values; and a control value storage coupled to each of the voltage selection circuits for supplying the digital control values to the voltage selection circuits, whereby a minimum performance level of a first set of the plurality of the storage elements having a lower performance is assured by selecting a higher one of the differing non-zero voltages for application to the first set, and whereby lower power consumption is provided by selecting a lower one of the differing non-zero power supply voltages for application to a second set of the plurality of storage elements that have a higher performance.