Patent ID: 8163608

Claim:
A method of fabricating a nonvolatile memory device, the method comprising: forming a trench mask pattern on a semiconductor substrate including a first region and a second region; forming substrate trenches defining active regions in the semiconductor substrate in the first region and the second region using the trench mask pattern as a mask; forming device isolation layer patterns on the semiconductor substrate including the trench mask pattern and substrate trenches, the device isolation patterns filling the substrate trenches in the first region and in the second region; forming first and second openings exposing top surfaces of the corresponding active regions in the first and second regions by removing the trench mask pattern, the second opening having a greater width than the first opening; forming a first lower conductive pattern in the first opening and having a bottom portion in a lower region of the first opening and an extended portion extending from the bottom portion to an upper region of the first opening, wherein the extended portion has a smaller width than the bottom portion; and forming a second lower conductive pattern filling the second opening, wherein the forming the first lower conductive pattern and forming the second lower conductive pattern comprise: forming a first conductive layer having a thickness less than half of the width of the first opening on the semiconductor substrate in the first and second region; forming a second conductive layer on the first conductive layer in the second region and filling the second opening; and patterning the first and second conductive layers to form the first lower conductive pattern from the patterned first conductive layer and to form the second lower conductive pattern from the patterned first and second conductive layers.