Patent ID: 8412967

Claim:
A method of power saving in an integrated circuit device including an analog circuit receiving an external reference frequency signal, and at least one internal clock generating circuit configured to receive a root clock signal from the analog circuit, the integrated circuit device comprising differently powered islands of functional circuits commanded by an external controller, the method comprising: defining an off-switchable analog circuit island including the at least one internal clock generating circuit; at power-on of the integrated circuit device, supplying to clocked digital circuits of the integrated circuit device an auxiliary clock signal from the external controller, the auxiliary clock signal having a frequency of orders of magnitude lower than the root clock signal, and supplying external asynchronous reset commands to the integrated circuit device until reaching an active functioning condition of the integrated circuit device; and interrupting the supply of the auxiliary clock signal and enabling supply of the root clock signal to the clocked digital circuits when the active functioning condition of the integrated circuit device is reached.