Patent ID: 7078971

Claim:
A CMOS amplifier having a class AB output stage, the output stage comprising: two complementary transistors having source-drain paths coupled in series between two voltage supply rails and providing an output from a junction therebetween; a level-shifting transistor and a further transistor having source-drain paths coupled in series between the two voltage supply rails for supplying a signal from a junction therebetween to one of said complementary transistors; and a signal input to the other of said complementary transistors and to the level-shifting transistor; the amplifier further comprising a bias circuit for producing a variable bias voltage for said further transistor, the bias circuit comprising: a replica of the level-shifting transistor and a replica of said further transistor coupled in series between the two voltage supply rails in a similar manner to the level-shifting transistor and said further transistor, the replica of said further transistor also being responsive to said variable bias voltage; and a circuit responsive to a voltage at a junction between the replica of the level-shifting transistor and the replica of said further transistor for producing said variable bias voltage in a manner to reduce variations of a quiescent current of the output stage.