Patent ID: 7551422

Claim:
A multilayer capacitor comprising: a dielectric body formed by stacking a plurality of dielectric layers having an approximately rectangular parallelepiped shape; an internal layer portion in which a first internal conductor layer and a second internal conductor layer are stacked alternately in said dielectric body via said dielectric layer as mutually overlapping in stacking direction to form an internal electrode circuit of a capacitor; an external layer portion in which pluralities of first external conductor layers and second external conductor layers, which are not overlapping in stacking direction, are stacked in said dielectric body via said dielectric layer, the external layer portions being adjacent to at least any of both end faces of said internal layer portion in stacking direction; a first terminal electrode connected with said first internal conductor layer and said first external conductor layer, formed at least on a first side face of side faces of said dielectric body, the first side face being parallel to stacking direction; and a second terminal electrode connected with said second internal conductor layer and said second external conductor layer, formed at least on a second side face opposed to said first side face of said dielectric body, wherein; said dielectric layer positioned at said external layer portion comprises, in an area of overlapping a pair of said first external conductor layers or a pair of said second external conductor layers adjacent to said dielectric layer, a plurality of pin hole conducting portions connecting a pair of said first external conductor layers or a pair of said second external conductor layers to each other adjacent to said dielectric layer, in stacking direction.