Patent ID: 8477278

Claim:
A liquid crystal display panel comprising: a pixel array substrate comprising: a first substrate; a plurality of gate lines disposed on the first substrate; a plurality of data lines disposed on the first substrate; a plurality of thin film transistors, each of the thin film transistors having a first end, a second end, and a third end, the first end being coupled to one of the gate lines, the second end being coupled to one of the data lines; a first insulation layer covering the gate lines, the data lines, and the thin film transistors; a transparent conductive layer disposed on the first insulation layer to provide a common voltage, the transparent conductive layer at least covering most portion of each data line and exposing the thin film transistors; a second insulation layer covering the transparent conductive layer and the first insulation layer, wherein a plurality of contact holes penetrate the first and second insulation layers, and expose the third ends of the thin film transistors; and a plurality of pixel electrodes located on the second insulation layer and coupled to the thin film transistors through the contact holes, wherein the second insulation layer is located between the transparent conductive layer and the pixel electrodes and isolates the transparent conductive layer from the pixel electrodes, and the transparent conductive layer, the second insulation layer, and the pixel electrodes constitute a storage capacitor; an opposite substrate opposite to the pixel array substrate, the opposite substrate comprising a second substrate and a common electrode layer disposed on the second substrate; and a twisted nematic liquid crystal layer located between the pixel array substrate and the opposite substrate, wherein a phase retardation value of the twisted nematic liquid crystal layer ranges from 250 nm to 480 nm, and a dielectric anisotropy Δ∈ of the twisted nematic liquid crystal layer ranges from 3 to 10.