Patent ID: 7634641

Claim:
A method for performing simultaneous speculative threading, comprising: executing instructions in a normal execution mode using a first thread; upon encountering a data-dependent stall condition during an instruction, generating an architectural checkpoint and commencing execution of instructions in execute-ahead mode, wherein the first thread executes instructions that can be executed and defers instructions that cannot be executed into a deferred queue, wherein the deferred queue is a first-in-first-out (FIFO) buffer, and wherein deferring the instructions involves storing the instruction that encountered the data-dependent stall condition and subsequent dependent instructions in program order in the deferred queue; when the data dependent stall condition has been resolved, generating a speculative checkpoint and continuing execution in execute-ahead mode with the first thread, and, at the same time, commencing execution in a deferred mode using a second thread, wherein the second thread executes instructions from the deferred queue, and wherein the speculative checkpoint and the architectural checkpoint exist simultaneously; wherein if the second thread encounters an exception while executing in deferred mode, the first thread restores the architectural checkpoint and resumes execution in normal-execution mode and the second thread commences operation in a wait mode; whereby the second thread can execute deferred instructions in deferred mode while the first thread continues to speculatively execute instructions in execute-ahead mode.