Patent ID: 6969910

Claim:
A semiconductor device, comprising: a wiring board that includes an insulating substrate and a wiring provided on the insulating substrate; a semiconductor chip that is mounted on said wiring board; an opening that is formed at a predetermined position in said insulating substrate, one end of said opening being shut by said wiring to form the bottom of said opening; a thin film conductor that is formed on the surface of said wiring and at the bottom of said opening; an embedded conductor layer that is provided in said opening while contacting said thin film conductor formed at the bottom of said opening; and an external connection terminal that is disposed at the other end of said opening to electrically connect with said wiring through said embedded conductor layer and said thin film conductor provided in said opening; wherein said embedded conductor layer is formed between said thin film conductor and said external connection terminal, said thin film conductor includes a gold plating layer formed on the surface, said external connection terminal is of tin or an alloy including tin, and said embedded conductor layer is of a conductor that has a rate of solution to tin or an alloy including tin lower than that of gold.