Patent ID: 8438328

Claim:
An abstracted memory apparatus for emulation of memory comprising: at least one memory system interface; and at least one abstracted memory module, wherein each of the at least one abstracted memory modules comprises a first abstracted DRAM and a second abstracted DRAM; wherein the first abstracted DRAM has a first address space disposed electrically behind a first intelligent buffer, and the second abstracted DRAM has a second address space disposed electrically behind a second intelligent buffer; wherein the first intelligent buffer is operable to present to the memory system interface the first abstracted DRAM with a first emulated address space that is different from the first address space; wherein the first intelligent buffer is operable to change dynamically one or more characteristics of the first emulated address space; wherein the second intelligent buffer is operable to present to the memory system interface the second abstracted DRAM with a second emulated address space that is different from the second address space; and wherein the first and second intelligent buffers emulate the respective abstracted DRAM so that protocol requirements and limitations required by the memory system interface based on the presented emulated address spaces are satisfied by the intelligent buffers.