Patent ID: 7681004

Claim:
A memory module; comprising: a first memory comprising a volatile memory; a second memory comprising two or more Flash memory devices; and a controller coupled to the first memory and the second memory, the controller comprising: a command interpreter; a plurality of bus interface controller blocks coupled to the command interpreter, each of the plurality of bus interface controller blocks further coupled to a unique corresponding one of a plurality of bus interfaces; a first memory controller block, coupled to the command interpreter, for communicating with the first memory; a second memory controller block, coupled to the command interpreter, for communicating with the second memory such that a first one of the two or more Flash memory devices is coupled to a first channel interface of the second memory controller block and a second one of the two or more Flash memory devices is coupled to a second channel interface of the second memory controller block; and at least one configuration register, the at least one configuration register coupled to the command interpreter; wherein the memory module is an add-in memory module and is adapted to physically and electrically couple to a computer system having a main memory, receive and store data from the computer system, and retrieve and transmit data to the computer system; wherein neither the first memory or the second memory form part of the main memory; wherein the command interpreter receives commands from the computer system; wherein the controller is operable to receive and store memory partition configuration information of the memory module; wherein the second memory controller block includes at least one alignment buffer to receive and store read data from each of the first and the second Flash memory devices, which read data arrives at the alignment buffer responsive to simultaneous read requests from the second memory controller block; and wherein the read data from each of the first and the second Flash memory devices arrives at a different time.