Patent ID: 7631248

Claim:
A cycle-stealing decoding apparatus comprising: a decoder to perform a variable number of iterative decoding operations on a codeword associated with a data block selected from a plurality of data blocks; at least one decoder buffer to store an intermediate decoder state corresponding to an incompletely decoded data block after expiration of a block-decode period; and a control module to configure the decoder for decoding a next codeword associated with an undecoded data block selected from the plurality and the intermediate decoder state, wherein the intermediate decoder state comprises the incompletely decoded data block and a number of iterations performed on the incompletely decoded data block, and wherein the control module is further configured to restore a previously-buffered decoder state and instruct the decoder to perform additional decoding iterations on the incompletely decoded data block during a period when the decoder is idle to allow decoder cycles to be used to decode the incompletely decoded data block stored in the decoder buffer.