Patent ID: 8446188

Claim:
An integrated circuit configured for producing a predetermined output in a sequential circuit during power on, comprising: a power supply node; a first capacitor coupled to a first internal node and a second capacitor coupled to a second internal node, wherein the capacitors charge the internal nodes if a voltage at the power supply node ramps up to a set voltage at or faster than a period of time; a first transistor coupled to the power supply node, wherein the first transistor operates in a sub-threshold region and produces leakage current that charges the internal nodes when the voltage on the power supply node ramps up to the set voltage no faster than the period of time; an output node, wherein an output logical value on the output node is based on a logical value on the charged internal nodes when an input signal to the sequential circuit is not active and the voltage on the power supply node is at the set voltage; and two cross coupled inverters coupled to the first internal node and the second internal node, wherein the inverters maintain a first logical value on the first internal node and an opposite logical value on the second internal node.