Patent ID: 8343815

Claim:
A method for forming a tunnel field effect transistor (TFET) comprising a nanowire source, the method comprising: forming a nanowire and first and second silicon pads in a silicon layer of a silicon-on-insulator (SOI) substrate, wherein the nanowire is located between the first and second silicon pads; forming a gate comprising a dielectric layer and a gate polysilicon region around a first portion of the nanowire, wherein the dielectric layer is formed adjacent to and surrounding the first portion of the nanowire and a first portion of the second silicon pad, and the gate polysilicon region is formed over the dielectric layer, wherein the gate is located on top of the first portion of the second silicon pad, and is not located on top of any portion of the first silicon pad; implanting a second portion of the second silicon pad that is not located underneath the gate to form a drain region; and implanting the first silicon pad and a second portion of the nanowire to form the nanowire source.