Patent ID: 7194600

Claim:
A method for processing data within a programmable gate array, the method comprises: configuring at least a portion of the programmable gate array as a dedicated processor implemented in programmable logic to perform a fixed logic routine; detecting, by a first fixed logic processor embedded within the programmable gate array, a custom operational code; providing, by the first fixed logic processor, an indication of the custom operational code to the dedicated processor by way of a first auxiliary processing interface in response to detecting the custom operational code; performing the fixed logic routine using the portion of the programmable gate array configured as a dedicated processor in response to receiving the indication of the custom operational code from the first fixed logic processor, wherein processed data is returned to the first fixed logic processor by way of the first auxiliary processing interface; detecting, by a second fixed logic processor embedded within the programmable gate array, the custom operational code; providing, by the second fixed logic processor, an indication of the custom operational code to the dedicated processor by way of a second auxiliary processing interface in response to detecting the custom operational code; and performing the fixed logic routine using the portion of the programmable gate array configured as a dedicated processor in response to receiving the indication of the custom operational code from the second fixed logic processor, wherein processed data is returned to the second fixed logic processor by way of the second auxiliary processing interface.