Patent ID: 6961889

Claim:
A method of encoding at least one input bit set of N ordered bits with permutation position integers I(k), where k=1 to N comprising the steps of: a. encoding said input bit set using a first encoder having a multi-state register to provide a first output; b. selectively reordering the input bit set using a hybrid S-random interleaver to provide a reordered input bit set, whereby said interleaver reorders said integers I(k) such that once reordered, the value |I(k) −I(k−nL)| is not evenly divisible by L, where L=2 m −1, n is a positive integer defined as k−nL ≧0 and nL≦S, and S is an arbitrary predetermined value; and c. encoding said reordered input bit set using a second encoder having a multi-state register to provide a second output; whereby the value of said second encoder register is the same as the value of said first encoder register upon completion of step c.