Patent ID: 7221298

Claim:
Circuitry comprising: a multiplexer to output first data and second data in response to a clock signal, the clock signal having rising and falling clock edges, the multiplexer outputting first data at a rising clock edge and outputting second data at a falling clock edge; a digital-to-analog converter (DAC) to receive the first data and the second data and to generate, therefrom, complementary first and second signals; filters to filter the complementary first signals and second signals and thereby produce first and second filtered signals; a voltmeter to measure a difference between the first and second filtered signals; wherein the first data initially has a first value and the second data initially has a second value resulting in the voltmeter measuring a first difference between the first and second filtered signals, and wherein the first data subsequently has the second value and the second data subsequently has the first value resulting in the voltmeter measuring a second difference between the first and second filtered signals; and a controller to adjust a duty cycle of the clock signal based on a difference between the first difference and the second difference.