Patent ID: 8022314

Claim:
A printed wiring board comprising: a wiring substrate provided with a conductor circuit; a solder resist layer provided on a surface of the wiring substrate; a plurality of conductor pads configured to mount electronic parts and formed from a part of the conductor circuit exposed from an opening formed in the solder resist layer, and a solder bump formed on the conductor pad, wherein: the conductor pad being aligned at a pitch of 200 μm or less, a ratio (W/D) of a diameter W of the solder bump to an opening diameter D of the opening formed in the solder resist layer is 1.05 to 1.7, and the opening of the solder resist layer is formed in a tapered fashion such that an opening diameter D 1 at the top surface thereof is larger than an opening diameter D 2 at the bottom surface thereof, further comprising a flattened surface formed on the surface of the solder resist layer by conducting a flattening treatment in at least a region for mounting the electronic parts, and the flattened surface of the solder resist layer includes a roughened surface formed by conducting a roughening treatment, wherein the flattened surface of the solder resist layer has a maximum surface roughness of 0.8 μm to 3.0 μm, and roughness of the roughened surface of the solder resist layer is smaller than the maximum surface roughness of the flattened surface, and has an arithmetic mean roughness (Ra) of 0.2 μm to 0.5 μm.