Patent ID: 8392733

Claim:
An apparatus comprising: a plurality of input units; a plurality of output units; a switching unit to output data input from an input unit to an output unit relating to a destination apparatus to which the data is to be output; and an input control unit, wherein input units included in a same group among the plurality of input units each have: an input buffer; an adjustment buffer to store data received from another apparatus; a multiplexer connected to the input buffer thereof and to the input buffer in another input unit in a same group, and selectively outputting data input from the input buffer thereof and from the input buffer in the other input unit in the same group; and an input data processing portion connected to the multiplexer, the input data processing portion performing specific input data processing on data input from the multiplexer and outputting data after the specific input data processing to the switching unit, wherein the input control unit controls a data output selection of the multiplexer and controls supply of power or supply of a clock signal to the multiplexer and the input data processing portion.