Patent ID: 7471109

Claim:
An output impedance circuit comprising: an output stage supplying a current to an output terminal corresponding to a DC bias voltage, wherein the output stage includes a resistance component, a first terminal of the resistance component is connected to the output terminal; and a first MOS transistor, a first terminal of the first MOS transistor is connected to a second terminal of the resistance component, a second terminal of the first MOS transistor is connected to a first voltage source, and a gate of the first MOS transistor is supplied with the DC bias voltage; and an impedance control stage configured to control current flowing through the output stage in response to an output signal at the output terminal such that a constant impedance is maintained at the output terminal if a voltage level of the output signal changes, wherein the impedance control stage includes a second MOS transistor, a first terminal of the second MOS transistor is connected to a common node of the resistance component and the first MOS transistor, a second terminal of the second MOS transistor is connected to the first voltage source, and a gate of the second MOS transistor is supplied with the output signal.