Patent ID: 7419865

Claim:
A method of forming memory circuitry comprising: providing a semiconductor substrate comprising a pair of word lines having a bit node formed within semiconductive material of the substrate between the word lines, and comprising insulative sidewall spacers over opposing sidewalls of the word lines facing the bit node; depositing insulative material over the pair of word lines, the bit node and the insulative sidewall spacers; forming a bit node contact opening within the insulative material over the bit node; forming sacrificial plugging material within the bit node contact opening between the pair of word lines, the forming of sacrificial plugging material comprising oxidizing the semiconductive material between the wordlines to form an insulative oxide; from the bit node contact opening, removing sacrificial plugging material which is received between and at some common elevation with conductive portions of the pair of word lines, and replacing it with conductive material that is in electrical connection with the bit node and which is received over the insulative material; and after the replacing, forming the conductive material into a bit line.