Patent ID: 7197417

Claim:
A method for developing a test program for a semiconductor test system, the test system including at least one test module for applying at least one test to a device-under-test according to the test program, comprising: describing a test plan file in a test program language (TPL), wherein the test plan file describes at least one test of the test program; describing a test class file in a system program language (SPL) and a corresponding pre-header file of the test class file in the TPL, wherein the test class file describes an implementation of the at least one test of the test program; compiling the test plan file by a TPL compiler to form a derived test plan file described in the SPL; compiling the pre-header file by the TPL compiler to form a header file described in the SPL; and generating the test program using the derived test plan file, the test class file and the header file.