Patent ID: 8549328

Claim:
A memory controller comprising: a first interface unit configured to exchange data with an external device; a processor configured to determine, in response to data received through the first interface unit, whether to randomize or state-convert the received data in response to a size of the received data; a randomization unit configured to randomize first data received through the first interface unit to generate randomized first data in response to the processor and to generate randomization information in response to the randomization operation; a state conversion unit configured to state-convert second data received through the first interface unit to generate state-converted second data in response to the processor and to generate conversion information in response to the state conversion operation; and a second interface unit configured to receive the randomized first data and the randomization information from the randomization unit, to receive the state-converted second data and the conversion information from the state conversion unit, and to exchange at least one of the randomized first data, the randomization information, the state-converted second data and the conversion information with a memory; wherein the processor is configured to determine to state-convert the second data in response to the size of the second data being less than a unit of a write operation of the memory and/or in response to the size of the second data being less than a storage capacity of one page of the memory.