Patent ID: 7888213

Claim:
A method of making a semiconductor to make reverse engineering difficult comprising: forming on the semiconductor a first electrically conductive doped channel having a first doping type between at least two first active regions having the first doping type; forming a mask layer over a region between a first portion of said first electrically conductive doped channel and a second portion of said first electrically conductive doped channel; disposing a first conductive layer over the first portion of said first electrically conductive doped channel; disposing a second conductive layer over the second portion of said first electrically conductive doped channel wherein said first conductive layer and said second conductive layer are spaced apart from one another; forming on the semiconductor a second electrically conductive doped channel having a second doping type between at least two second active regions having the first doping type; forming the mask layer over a second region between a first portion of said second electrically conductive doped channel and a second portion of said second electrically conductive doped channel; disposing a third conductive layer over the first portion of said second electrically conductive doped channel; and disposing a fourth conductive layer over the second portion of said second electrically conductive doped channel wherein said third conductive layer and said fourth conductive layer are spaced apart from one another; wherein edges of the first and second conductive layers are in a same relative location as edges of the third and fourth conductive layers.