Patent ID: 7860152

Claim:
A process of generating synchronization code signals comprising: A. providing a primary synchronization code of a generalized hierarchical Golay sequence in a first pattern of 256 bits, the first pattern being formed of 8-bit values A, B, −A and −B, in which the value A represents a pattern of real values A={1, 1, 1, 1, 1, 1, −1, −1}, the value B represents a pattern of real values B={1, −1, 1, −1, 1, −1, −1, 1}, and the first pattern of the primary synchronization code being {A, B, A, B, A, B, −A, −B, −A, −B, A, B, −A, −B, −A, −B, A, B, A, B, A, B, −A, −B, A, B, −A, −B, A, B, A, B}; B. generating a primary synchronization code signal from the primary synchronization code; C. providing a secondary synchronization code of 256 bits by exclusive OR combining a second pattern of bits and a third pattern of bits separate from the first pattern of bits, the first pattern of bits, the second pattern of bits and the third pattern of bits being different from one another, i. the providing a secondary synchronization code including selecting a subset of a set of Hadamard codes to be the second pattern, deriving the set of Hadamard codes by combining sequences of Walsh codes, selecting for the subset the Hadamard codes that are orthogonal with one another, and selecting the subset to be every Nth code of the set of Hadamard codes, and ii. the providing a secondary synchronization code including selecting values of bits from the first pattern to be the third pattern; and D. generating a secondary synchronization code signal from the secondary synchronization code.