Patent ID: 7030490

Claim:
A structure of multi-tier wire bonding for high frequency integrated circuit, comprising: a first electronic device, comprising: a wire-bonding surface; a first carrier surface, arranged on the opposite side of the wire-bonding surface; at least a signal bonding pad, located at the border of the wire-bonding surface; and at least a coplanar boding pad, located at the wire-bonding surface and surrounding the signal bonding pad; and a second electronic device, comprising: a second carrier surface, abutted to the first carrier surface, having a border portion of the second carrier surface not covered by the first carrier surface and surrounding the first carrier surface; a plurality of leads, being arranged at the border portion of the second carrier surface and being positioned in correspondence to the signal bonding pad and the coplanar bonding pad; and a plurality of metal wires, including at least a signal wire and a plurality of ground wires, wherein the signal wire is electrically connected between the signal bonding pad and the lead corresponding to the signal bonding pad, the ground wires are electrically connected between the coplanar bonding pad and a linear bonding pad which is the border portion of the second carrier surface surrounding the first carrier surface.