Patent ID: 8779593

Claim:
A semiconductor integrated circuit device comprising: (a) a semiconductor substrate having a first main surface; (b) a plurality of MISFETs arranged over the first main surface of the semiconductor substrate; (c) an embedded type multilayer wiring layer arranged over the first main surface of the semiconductor substrate and over the MISFETs; (d) a non-embedded type aluminum-based pad metal layer arranged over the embedded type multilayer wiring layer, wherein the non-embedded type aluminum-based pad metal layer does not have a power supply ring wiring; (e) a plurality of metal bonding pads arranged as parts of the non-embedded type aluminum-based pad metal layer; (f) a final passivation film formed at a layer above the non-embedded type aluminum-based pad metal layer; (g) a pad opening arranged in the final passivation film over each of the metal bonding pads; and (h) a power supply ring wiring arranged as a part of an embedded type uppermost-layer wiring layer of the embedded type multilayer wiring layer.