Patent ID: 7557429

Claim:
A semiconductor device comprising: a first well formed in a surface layer of a semiconductor substrate, the surface layer being of a first conductivity type, the first well being of a second conductivity type opposite to the first conductivity type; a pair of current input/output ports connected to the first well, the pair of current input/output ports being used for flowing current through the first well along a direction parallel to a substrate surface from one of the pair of current input/output ports to the other; a second well of the first conductivity type disposed between the pair of current input/output ports, the second well being shallower than the first well; an element isolation insulating film buried in a trench formed in a surface layer of the semiconductor substrate and defining a dummy active region between the pair of current input/output ports, the dummy active region being surrounded by the element isolation insulating film; and an electric circuit formed in the semiconductor substrate, the electric circuit comprising the first well as an electric resistance; wherein the second well reaches a position deeper than a bottom of the element isolation insulating film, and wherein the dummy active region is not conductively connected to any electric circuit formed in the semiconductor substrate.