Patent ID: 6943367

Claim:
A thin film transistor array panel for a liquid crystal display, comprising: an insulating substrate; a gate line assembly of an aluminum-based conductive layer formed on the insulating substrate, wherein the gate line assembly comprises gate lines, gate pads, and gate electrodes connected to the gate lines; a gate insulating layer over the insulating substrate and the gate line assembly; a semiconductor layer on the gate insulating layer; a data line assembly of a double-layered conductive film with a first layer and a second layer overlying the first layer, wherein the data line assembly comprising data lines crossing over the gate lines, data pads, source electrodes connected to the data lines, and drain electrodes separated from the source electrodes while interposing the gate electrodes; a protective layer having first contact holes over the drain electrodes; and pixel electrodes on the protective layer such that the pixel electrodes are connected to the drain electrodes through the first contact holes, wherein the first layer of the conductive film is patterned through dry etch.