Patent ID: 7743203

Claim:
A system that facilitates management and lifetime optimization of a memory, comprising: the memory comprising a plurality of memory regions; a processor; a computer readable storage medium operationally coupled to the processor and storing computer executable instructions, the computer executable instructions, when executed by the processor, implement components comprising: a cycle interval management component that compiles a history of usage and operating conditions of a memory region of the plurality of memory regions and, based at least on the history of usage and operating conditions, identifies an additional period of time for which the memory region should be rested following an erase cycle, wherein the additional period of time the memory should be rested is in addition to a period of time the memory region rests after an erase cycle on the memory region is performed, and a memory management component that determines if an operation is to be performed on the memory region based in part on the additional period of time for which the memory region should be rested.