Patent ID: 8874843

Claim:
A programmable heterogeneous memory controller, the programmable heterogeneous memory controller comprising: a processor interface to couple to a processor; and one or more memory channel controllers coupled to the processor interface and to one or more respective memory channels of a main memory, each of the one or more memory channel controllers including a memory channel interface to couple to a memory channel bus; a common memory module controller coupled to the memory channel interface and the processor interface, the common memory module controller to generate common control signals on the memory channel bus for a plurality of differing memory modules coupled into a respective plurality of memory module sockets; and a plurality of memory module controllers coupled to the memory channel interface and the processor interface, the plurality of memory module controllers to generate differing control signals on the memory channel bus for each of the plurality of differing memory modules coupled into the respective plurality of memory module sockets, each of the plurality of memory module controllers being programmable by a memory module software driver in response to the type of memory module coupled into the respective memory module socket.