Patent ID: 8358530

Claim:
A semiconductor device comprising: a memory cell including a first transistor, a second transistor, and a capacitor, wherein a first gate terminal of the first transistor is electrically connected to the capacitor, a first source terminal of the first transistor is electrically connected to a bit line, and the first transistor includes a semiconductor substrate, wherein a second gate terminal of the second transistor is electrically connected to a word line for an oxide semiconductor, a second source terminal of the second transistor is electrically connected to a bit line for an oxide semiconductor, a second drain terminal of the second transistor is electrically connected to the first gate terminal of the first transistor, and the second transistor includes an oxide semiconductor layer; a resistor comprising a dual-gate transistor including a third source terminal, a third drain terminal, a third gate terminal, and a fourth gate terminal, wherein the third source terminal and the third gate terminal are electrically connected to a terminal to which power supply voltage is input, and the third drain terminal is electrically connected to the bit line; a reference potential circuit configured to output a reference potential; a potential comparison circuit electrically connected to the reference potential circuit and the bit line, the potential comparison circuit configured to compare the reference potential output by the reference potential circuit with a potential of the bit line; and a control circuit electrically connected to the potential comparison circuit, wherein an output potential of the potential comparison circuit is supplied to a power supply control circuit portion and a state change circuit portion, wherein the state change circuit portion is electrically connected to an input portion of the power supply control circuit portion and the fourth gate terminal of the resistor, and is configured to supply a potential to the fourth gate terminal, and wherein the power supply control circuit portion is electrically connected to the bit line for the oxide semiconductor, and is configured to supply a potential to the bit line for the oxide semiconductor.