Patent ID: 7313421

Claim:
A GPS receiver, comprising: an RF front end including an IF stage and an analog-to-digital converter; a digital baseband processor coupled to receive a digital baseband signal from the analog-to-digital converter of the RF front end; and control circuitry coupled to the RF front end and the digital baseband processor, wherein a frequency of the IF stage is operable to be increased or decreased responsive to the control circuitry, a sample rate of the analog-to-digital converter is operable to be increased or decreased responsive to the control circuitry, and a bandwidth of the RF front end is operable to be increased or decreased responsive to the control circuitry, and wherein during a signal acquisition mode the control circuitry sets the RF front end bandwidth to approximately 2 MHz, the intermediate frequency to approximately 3 MHz, and the ADC sample rate to greater than 10 MHz; during an ephemeris download mode the control circuitry sets the RF front end bandwidth to approximately 2 MHz, the intermediate frequency to approximately 8 MHz, and the ADC sample rate to approximately 2 MHz.