Patent ID: 7873886

Claim:
An integrated circuit haying interface circuitry comprising: A. an addressed interface having leads receiving addresses from external circuitry and for exchanging data associated with those addresses with the external circuitry, B. a scan-chain interface having registers, a scan-chain data output, and a scan-chain data input, and C. a memory having a plurality of memory elements, i. the memory containing a plurality of addressable locations, each including one or more of the memory elements and each addressable location corresponding to its own one of address values receivable by the addressed interface, the addressed interface being connected to transfer data between an addressable location in the memory and the external circuitry when the addressed interface receives the address corresponding to that location, ii. the memory also having a plurality of register copy locations, each including one or more of the memory elements, and the scan-chain interface is connected to receive data from the scan-chain data input and store it in register copy locations respective to the registers of the scan-chain and to output data from the register copy locations to the scan-chain data output to the respective registers of the scan-chain, and iii. at least some of the addressable locations have at least one memory element that is included in a register copy location.