Patent ID: 8198915

Claim:
A semiconductor device comprising: M (being an integer of two or more) pieces of drivers; N (being an integer of three or more) pieces of through silicon vias that include M pieces of normal silicon vias and a first auxiliary through silicon via, the M pieces of normal silicon vias including first and second normal through silicon vias; and a signal path formation circuit coupled between the M pieces of drivers and the N pieces of through silicon vias to form M pieces of signal paths, each of the M pieces of signal paths being formed between an associated one of the M pieces of drivers and an associated one of M pieces of through silicon vias, the M pieces of through silicon vias excluding in a first state the first auxiliary silicon via and including in a second state the first auxiliary through silicon via that replaces one of the M pieces of normal through silicon vias, the signal path formation circuit comprising a plurality of tri-state inverters each driving, when activated, an output node thereof in response to a signal supplied to an input node thereof and disconnecting, when deactivated, the output node from the input node, the tri-state inverters including: a first tri-state inverter connected at the output node exclusively to the first normal through silicon vias; second and third tri-state inverters connected at the output nodes thereof in common to the second normal through silicon via; and a fourth tri-state inverter connected at the output node exclusively to the first auxiliary through silicon via, each of the M pieces of signal paths including therein an associated one of activated tri-state inverters of the first to fourth inverters in either of the first and second states.