Patent ID: 8642364

Claim:
A method of manufacturing a thin film transistor structure, comprising the steps of: forming a first electrode and a first wiring connected to the first electrode; forming second and third electrodes apart from each other and second and third wirings connected to the second and third electrodes, respectively, in a hierarchical level different from that of the first electrode and the first wiring; forming an interlayer insulating film so as to cover the first electrode and the first wiring; forming a main stack body disposed so as to be opposed to the first electrode, on the interlayer insulating layer, and the main stack body being disposed between the first electrode and the second electrode, and between the first electrode and third electrode; and forming a sub stack body including an insulating layer and a semiconductor layer by forming a film by using a solution containing an insulating material and a semiconductor material, on the interlayer insulating layer between the first and second wirings in a position where the first and second wirings overlap and/or between the first and third wirings in a position where the first and third wirings overlap, and making phase separation occur in the film.