Patent ID: 6980258

Claim:
A contour emphasizing circuit comprising a synchronizing means, composed of a 1-dot delay circuit and a 1-line delay circuit, for synchronizing the timings of an objective pixel and adjacent pixels in horizontal, vertical, rightward-rising and leftward-rising directions represented by digital video signals, a contour direction detecting stage 24 for detecting the direction of the pixel whose absolute value of the difference in the luminance is largest among the differences in luminance of horizontal, vertical, rightward-rising and leftward-rising pixels which have been synchronized by the synchronizing means, a contour detecting stage 18 composed of an inclined contour luminance optimizing circuit 25 designed so that weighted contour emphasizing values of the luminances of the pixels in the directions detected in the contour direction detecting stage 24 and the luminance of said objective pixel can be determined, so that new objective pixels are picked out consecutively as the pixel next to the present objective pixel, and so that when the signs of two consecutive contour emphasizing values are the same, the contour emphasizing values preceding and following these two consecutive contour emphasizing values are adopted as they are, and when the signs of the two consecutive contour emphasizing values differ, the contour emphasizing values preceding and following these two consecutive contour emphasizing values are set to 0, and an adding circuit 22 for adding the contour emphasizing values, which have undergone inclined pixel optimizing processing in the contour detecting stage 18 , to the corresponding objective pixels respectively.