Patent ID: 7805592

Claim:
A processor comprising a plurality of parallel pipelines which perform a series of operations on instructions from an instruction packet passing through the plurality of parallel pipelines, wherein each of said plurality of pipelines comprises a plurality of stages including an instruction fetch stage, a decode stage after said instruction fetch stage and at least one execute stage after said decode stage, and a first one of said plurality of parallel pipelines comprises a pre-decoder arranged in a stage of the first pipeline before said decode stage of the first pipeline and before a stage of said first pipeline corresponding to the instruction fetch stage of a second one of said plurality of parallel pipelines to at least partially decode an instruction in the first pipeline before a subsequent instruction from said instruction packet is fetched by said instruction fetch stage of said second one of said plurality of parallel pipelines, the pre-decoder being arranged to determine whether the instruction is a sequence-altering instruction which, if executed, may cause a sequence of subsequent instructions to be different from that if the instruction was not executed, the pre-decoder partially decoding the instruction in the first pipeline to determine whether the instruction is one of a number of predetermined control transfer instructions, the processor further comprising stall control circuitry connected operatively with said pre-decoder, and when said pre-decoder determines that the instruction is such a sequence-altering instruction, the stall control circuitry causes the sequence-altering instruction to progress through the first pipeline to reach the execute stage thereof, whilst stalling the progress of subsequent instructions of the instruction packet until the sequence-altering instruction has been resolved, whereby in the event that the sequence-altering instruction is executed, instructions belonging to subsequent instruction packet(s) do not need to be removed from the plurality of parallel pipelines.