Patent ID: 7142991

Claim:
A method of determining an extreme value of a voltage dependent parameter of an integrated circuit design, the integrated circuit design having a plurality of power bus nodes, the method comprising: (a) determining a plurality of current waveforms, each of said plurality of waveforms corresponding to one of a plurality of aggressor objects in the design of the integrated circuit; (b) applying each of said plurality of current waveforms to a subset of the plurality of power bus nodes, said subset of the plurality of power bus nodes being designed to supply power to a corresponding one of said plurality of aggressor objects; (c) determining a plurality of voltage waveforms, each of said plurality of voltage waveforms being at one of said plurality of power bus nodes and corresponding to one of said plurality of current waveforms; (d) determining a logical expression to specify at least one subset of said plurality of current waveforms that can occur together; and (e) using said plurality of voltage waveforms and said logical expression to determine the extreme value.