Patent ID: 7088618

Claim:
A method of evaluating characteristics of a semiconductor memory element, said semiconductor memory element having a gate electrode formed over a semiconductor layer via a gate insulating film; a channel region disposed just below said gate electrode via said gate insulating film; two diffusion regions formed on both sides of said channel region; a memory function element having a charge retaining function, formed on one side or both sides of said gate electrode; and an offset region positioned below said memory function element and isolating said channel region and said diffusion region from each other, said diffusion region formed on the side where said memory function element exists and said channel region being isolated from each other by said offset region, and a resistance value of said offset region changing according to an amount of charges or polarization state of charges accumulated in said memory function element, wherein said method comprises steps of obtaining each of a resistance value between said two diffusion regions inclusive of said semiconductor memory element, a resistance value of said channel region, and a resistance value of said diffusion regions; and calculating the resistance value of said offset region on the basis of a result of subtracting the resistance value of said channel region and the resistance value of said diffusion regions from the resistance value between said two diffusion regions inclusive.