Patent ID: 7888728

Claim:
A non-volatile semiconductor memory device comprising: a plurality of memory cell units each including at least one memory cell formed of a charge storing layer and a control gate layer stacked above a semiconductor substrate; a plurality of select transistors each connected to a corresponding one of the memory cell units; a first transistor having a first gate insulating film and a second transistor having a second gate insulating film with a different thickness from the first gate insulating film; and a resistive element with a double-layer gate structure, the resistive element including the charge storing layer, contact plugs and conductive layers, the conductive layers contacting with the charge storing layer and disposed between the charge storing layer and the contact plugs, and the charge storing layer being used as a resistor; wherein a gate insulating film of the memory cell, a gate insulating film of the select transistor and the first gate insulating film are formed of substantially a same film.