Patent ID: 8435802

Claim:
A semiconductor device having reduced residual stresses to reduce stress migration induced void formation, said semiconductor device comprising: at least two components; a conductor line connecting said at least two components and including opposed parallel lateral edges; insulator material substantially surrounding said conductor line; an inward extending notch disposed on a first lateral edge of said opposed parallel lateral edges at a first lengthwise location along a length of said conductor line, an outward extending notch disposed on said first lateral edge at a second lengthwise location along said conductor line and spaced from said first lengthwise location, and at least one further notch disposed on an adjacent non-parallel edge of said conductor line; and a first via disposed inwardly adjacent said inward extending notch at said first lengthwise location and a second via disposed inwardly adjacent said outward extending notch at said second lengthwise location, wherein said at least one further notch includes a second inward extending notch disposed on a second lateral edge of said conductor line and adjacent to said first inward extending notch, and a second outward extending notch disposed on a third lateral edge of said conductor line and adjacent to said first outward extending notch.