Patent ID: 8106438

Claim:
An array of capacitor structures for a semiconductor device, the array comprising: a substrate; a plurality of electrode studs that extend outward from the substrate, wherein each electrode stud comprises an outer container having opposing sidewalls and a base wall formed of a first material and an inner plug formed of a second material, which is different from the first material, wherein the opposing sidewalls and the base wall are joined together to form a lower electrode and to define an interior recess adapted for receiving the inner plug, wherein each electrode stud further comprises an electrode cap layer positioned on the outer container so as to completely enclose the inner plug, wherein the electrode cap layer lies over the opposing sidewalls of the outer container in a manner such that the electrode cap layer is in direct contact with the inner plug and extends over an upper surface of the opposing sidewalls so as to overlie the outer container, wherein a width of the electrode cap layer approximates a width of the lower electrode such that the electrode cap layer is coextensive with the lower electrode and does not extend beyond the opposing sidewalls; a dielectric layer positioned over at least a portion of the plurality of electrode studs, and wherein a bottom surface of the dielectric layer is coplanar with a bottom surface of the base wall of the each electrode stud; and a top electrode positioned over at least a portion of the dielectric layer, wherein the top electrode is common to the array of capacitor structures.