Patent ID: 8034707

Claim:
A method for fabricating a semiconductor device, the method comprising steps of: forming a plurality of lower interconnections including a first lower interconnection and a second lower interconnection adjacent to the first lower interconnection, at intervals in a first insulating film; removing a portion of the first insulating film located between the lower interconnections, thereby forming an interconnection-to-interconnection gap; burying a low-dielectric-constant film in the interconnection-to-interconnection gap; forming a second insulating film over the first insulating film in which the lower interconnections and the low-dielectric-constant film are buried; and forming, in the second insulating film, a connection portion connected to the first lower interconnection, and an upper interconnection connected to the connection portion, wherein: in the forming of the interconnection-to-interconnection gap, no first insulating film is removed in a space between the first lower interconnection and the second lower interconnection, in a cross sectional view, along a direction perpendicular to the first and second lower interconnections, including the first lower interconnection, the second lower interconnection and the connection portion.