Patent ID: 8704580

Claim:
A circuit structure of a circuit sharing time delay integrator, comprising: an operational amplifier circuit being a feedback amplifying circuit, having a first input end, a second input end, and an output end, and effectuating feedback by electrical connection of the second input end and the output end; a first control block comprising a transfer gate and a first switch that are connected in series to the first input end, the first control block further comprising a second switch, one end of the second switch is electrically connected between the transfer gate and the first switch, and the other end of the second switch is electrically connected to a reset voltage source; a plurality of second control blocks each comprising a transfer gate and a first switch that are connected in series to the first input end, the second control blocks each further comprising a second switch, one end of the second switch is electrically connected between the transfer gate and the first switch and the other end of the second switch is electrically connected to the second input end; and clock signals for triggering an ON state in the first control block and the second control blocks in sequence.