Patent ID: 8138040

Claim:
A method of manufacturing a semiconductor device comprising a first MOS transistor with a channel of a first type and a resistor element that are formed on a semiconductor substrate, the method comprising: forming a first element isolation film isolating a first region of the semiconductor substrate on which the first MOS transistor is formed from other portions of the semiconductor substrate; performing a first ion implantation to form a first channel stopper layer in the first region and to form at least preliminarily a resistor layer of the resistor element in a second region of the semiconductor substrate, the first channel stopper layer preventing a channel formation under the first element isolation film; wherein, the first channel stopper layer and the preliminary resistor layer are formed simultaneously during the first ion implantation; and performing a second ion implantation to form a first punch-through prevention layer in the first region and to add impurities to the resistor layer, the first punch-through prevention layer preventing a punch-through of the first MOS transistor; wherein, the first punch-through prevention layer and the impurity-added resistor layer are formed simultaneously during the second ion implantation.