Patent ID: 7102241

Claim:
A leadless semiconductor package disposed on a substrate, comprising: a plurality of leads, each lead having a recess with a metal layer formed thereon, wherein the leads are disposed on the substrate; a solder material connecting the leads and the substrate; a chip electrically connected to the leads by a plurality of wires; a first encapsulation filled only in the recess of each lead and disposed on the metal layer, wherein the first encapsulation covers the end of the wire that electrically connects the lead and the chip at the end of the wire that contacts the lead; and a second encapsulation encapsulating the chip and disposed on the first encapsulation, wherein the first encapsulation has a first modulus relative to shape ability and the second encapsulation has a second modulus relative to shape ability, and the first modulus of the first encapsulation is less than the second modulus of the second encapsulation.