Patent ID: 7305524

Claim:
A method of maintaining coherency of data accessed by a remote device, comprising: maintaining, on the remote device: a remote cache directory indicative of memory locations residing in a processor cache on a processor which shares access to some portion of a memory device, wherein maintaining the remote cache directory comprises: receiving, by the remote device, a bus transaction initiated by the processor containing cache coherency information indicating a change to a processor cache directory residing on the processor; and updating the remote cache directory, based on the cache coherency information, to reflect the change to the processor cache directory; a castout buffer indicating cache lines that have been castout from the processor cache, wherein maintaining the castout buffer comprises: copying an entry from the remote cache directory to the castout buffer if the cache coherency information indicates an aging castout is to occur at the processor; and copying an entry from an outstanding transaction buffer to the castout buffer in response to detecting a match between an address of a cache line being castout and the entry; routing a memory request issued at the remote device to the processor cache if an address targeted by the memory request matches an entry in the remote cache directory; and creating an entry in the outstanding transaction buffer residing on the remote device, the entry containing the address targeted by the memory request routed to the processor cache.