Patent ID: 7502987

Claim:
A method for encoding a block Low Density Parity Check (LDPC) code having a variable coding rate, the method comprising the steps of: receiving an information word; and determining one of the first parity check matrix and the second parity check matrix according to the variable coding rate; generating a first signal by multiplying the information word by a first partial matrix of the determined parity check matrix; generating a second signal by multiplying the information word by a second partial matrix of the determined parity check matrix; generating a third signal by multiplying the first signal by a matrix multiplication of a third partial matrix and an inverse matrix of a fourth partial matrix of the determined parity check matix; generating a fourth signal by adding the second signal to the third signal; generating a fifth signal by multiplying the fourth signal by a fifth partial matrix of the determined parity check matrix; generating a sixth signal by adding the second signal to the fifth signal; generating a seventh signal by multiplying the sixth signal by the inverse matrix of the fourth matrix of the determined parity check matrix; and multiplexing the information word, the fourth signal defined as a first parity word, and the seventh signal defined as a second parity word, such that the information word, the first parity word and the second parity word are mapped to the block LDPC code, wherein each of the first parity check matrix and the second parity check matrix includes a plurality of partial blocks, the first parity check matrix includes an information part mapped to an information word and a parity part mapped to a parity word, a first number of partial blocks among the plurality of partial blocks in the first parity check matrix are mapped to the information part, and a second number of partial blocks, excluding the first number of partial blocks, among the plurality of partial blocks in the first parity check matrix are mapped to the parity part, and the second parity check matrix is obtained by shortening a predetermined number of partial blocks among the first number of partial blocks in the first parity check matrix.