Patent ID: 7378340

Claim:
A method of manufacturing a semiconductor device having an insulating film that includes a low dielectric constant (low-k) material film having a dielectric constant smaller than a dielectric constant of silicon dioxide, the method comprising the steps of: (a) sequentially forming a first insulating film and a second insulating film over a substrate that includes a conductive layer pattern in a region including a front surface of the substrate, the first insulating film serving as an interlayer insulating film between interconnect layers and being composed of a low-k material, the second insulating film serving as an insulating film among interconnects and being composed of a low-k material different from the material of the first insulating film; (b) sequentially forming a first-mask forming layer, a second-mask forming layer, a third-mask forming layer, and a fourth-mask forming layer over said second insulating film, the first-mask forming layer being composed of a low-k material different from the material of the second insulating film, the second-mask forming layer being composed of an insulating material different from the material of the first-mask forming layer, the third-mask forming layer being composed of an insulating material different from the material of the second-mask forming layer, the fourth-mask forming layer being composed of an insulating material different from the third-mask forming layer; (c) patterning said fourth-mask forming layer to thereby form a fourth mask having an interconnect trench pattern; (d) forming a resist mask having a via hole pattern on said fourth mask and said third-mask forming layer; (e) with use of said resist mask as an etching mask, etching said fourth mask, said third-mask forming layer, said second-mask forming layer, and said first-mask forming layer and etching said second insulating film, to thereby open a via hole; (f) with use of said fourth mask as an etching mask, etching said third-mask forming layer to thereby form a third mask having the interconnect trench pattern, and etching said first insulating film to an intermediate thickness of said first insulating film to thereby extend said via hole downward; (g) with use of said fourth mask and said third mask as an etching mask, etching said second-mask forming layer to thereby form a second mask having the interconnect trench pattern, and etching said first insulating film that remains under the bottom of said via hole to thereby extend said via hole downward so that said via hole reaches said substrate, said fourth mask being removed as a result of the etching of said second-mask forming layer; (h) etching said first-mask forming layer with use of said third mask as an etching mask, to thereby form a first mask having the interconnect trench pattern; (i) after removal of said third mask, forming an interconnect trench in said second insulating film with use of said second mask as an etching mask; and (j) removing said second mask after the forming of the interconnect trench.