Patent ID: 7015984

Claim:
An array substrate for use in a liquid crystal display device, comprising: a substrate; a gate line and a gate electrode on the substrate, the gate line arranged in a first direction, the gate electrode extending from the gate line; a gate insulation layer on the substrate and covering the gate line and the gate electrode; an active line and an active layer on the gate insulation layer, the active line arranged in a longitudinal direction perpendicular to the gate line and the active layer extending from the active line over the gate electrode; an ohmic contact layer on the active line and on the active layer; a data line arranged in a second direction to overlap the active line, the data line defining a pixel region with the gate line; a source electrode on the ohmic contact layer, the source electrode extending from the data line; a drain electrode on the ohmic contact layer, the drain electrode spaced apart from the source electrode; a capacitor electrode over the gate line, the capacitor electrode having an island shape; an extension protruding from the capacitor electrode into the pixel region; a passivation layer on the gate insulation layer covering the data line, the source electrode, the drain electrode, the capacitor electrode and the extension, wherein the passivation layer has a drain contact hole to the drain electrode and a storage contact hole to the extension of the capacitor electrode, and wherein the storage contact hole is disposed in the pixel region; a pixel electrode formed in the pixel region, the pixel electrode contacting the drain electrode and the extension through the drain contact hole and through the storage contact hole, respectively; and a silicon island pattern interposed between the gate insulation layer and the capacitor electrode.