Patent ID: 8878567

Claim:
An integrated circuit (IC) comprising: a plurality of logic elements arranged in an array, each of the logic elements including: an input-port component receiving a plurality of inputs, a programmable logic function component including a first look-up table and a second look-up table sharing the plurality of inputs, a fixed logic function component configured to perform an arithmetic function and coupled to at least one of the plurality of inputs, wherein the fixed logic component contains one or both of a binary adder function and a ternary adder function, a register function component, and means for programming the logic element to multiple different functional configurations using multiple different configurations of the input ports to generate multiple results at output ports of the logic element, wherein: the logic element can be further configured to connect one or both of (i) outputs of the programmable logic portion to inputs of the adder function; and (ii) outputs of the programmable logic portion, along with signals taken from adjacent logic elements in the array, to the ternary adder function to perform ternary addition.