Patent ID: 8040195

Claim:
A current source device comprising: a first series circuit comprising a first FET and a resistor connected in series with the first FET, said first series circuit having ends respectively connected to a source voltage and ground; a second series circuit comprising a second FET and a third FET connected in series with the second FET, said second series circuit including a connecting point between the second and third FETs and a gate of the third FET connected to each other, and including ends respectively connected to the source voltage and ground; a drive circuit which supplies a common drive voltage to gates of the first and second FETs; and first and second current source circuits operated in response to first and second drive voltages, wherein gate voltages of the second and third FETs are the first and second drive voltages, wherein said first and second current source circuits respectively include first and second current source FETs respectively operated responsive to the first and second drive voltages as gate voltages, and respective first and second start-up circuits which change the first and second drive voltages forcedly when the first and second current source FETs are brought into conduction, wherein output currents are supplied from sources or drains of the first and second current source FETs, wherein the first and second start-up circuits have enable signal input terminals for allowing input of enable signals supplied from outside, the first and second drive voltages rise or drop in response to the enable signals in such a manner that the first and second current source FETs are respectively brought into conduction, and wherein the first start-up circuit includes a first drive voltage start-up FET connected to a gate of the first current source FET, a first current control FET series-connected to the first drive voltage start-up FET to control ON/OFF of a current flowing through the first drive voltage start-up FET in response to the enable signal, a first gate potential fixing FET which fixes a gate voltage of the first drive voltage start-up FET to a predetermined potential in response to the enable signal, and a first gate control FET turned ON and OFF in response to the gate voltage of the first current source FET to control the gate voltage of the first drive voltage start-up FET, and the second start-up circuit includes a second drive voltage start-up FET connected to a gate of the second current source FET, a second current control FET series-connected to the second drive voltage start-up FET to control ON/OFF of a current flowing through the second drive voltage start-up FET in response to the enable signal, a second gate potential fixing FET which fixes a gate voltage of the second drive voltage start-up FET to a predetermined potential in response to the enable signal, and a second gate control FET turned ON and OFF in response to the gate voltage of the second current source FET to control the gate voltage of the second drive voltage start-up FET.