Patent ID: 8786367

Claim:
A voltage controlling circuit, comprising: a gain amplifying module for generating an amplifying signal according to an input signal; a voltage clamping module coupled to the gain amplifying module for clamping a voltage level of the amplifying signal within a predetermined range so as to generate a voltage clamping signal; and a gain controlling module coupled to the voltage clamping module for generating an output signal according to a selection signal and the voltage clamping signal; wherein the voltage clamping module comprises: a capacitor having a first terminal coupled to the gain amplifying module for receiving the amplifying signal; and an upper bound voltage clamping module having a terminal coupled to a second terminal of the capacitor for limiting the voltage level of the amplifying signal within an upper bound voltage level, wherein the upper bound voltage clamping module comprises a P-type metal-oxide semiconductor field effect transistor (MOSFET) having a gate coupled to a voltage source and having a source coupled to the second terminal of the capacitor, wherein the voltage source is configured to provide the upper bound voltage level.