Patent ID: 7592228

Claim:
A fabrication process for a semiconductor device, the process comprising: (a.) forming a plurality of trenches in a substrate of a first conductivity type; (b.) depositing oxide on bottoms of the trenches; (c.) forming a gate oxide layer on sidewalls of the trenches, wherein the gate oxide is thinner than the oxide on the bottoms of the trenches; (d.) filling the trenches with a conductive material that extends to a first depth; (e.) forming body regions of a second conductivity in the substrate in areas corresponding to one or more mesas that are between the trenches, wherein the body regions have a second depth; (f.) forming clamp regions of the second conductivity in areas corresponding to one or more mesas that are between the trenches, wherein the clamp regions have a third depth that is deeper than the first depth and deeper than the second depth but shallower than the trenches, and wherein forming the clamp regions comprises performing a plurality of implants respectively having different doses and different depths in the substrate, the dose of a deepest of the implants being higher than the doses of the implants that are shallower; (g.) forming active regions of the first conductivity type above the body regions; and (h.) providing electrical connections to the conductive material, the active regions, and the substrate.