Patent ID: 7388294

Claim:
A semiconductor component comprising: a base die comprising a plurality of integrated circuits; a secondary die flip chip mounted to the base die having a circuit side and a backside; a plurality of contacts on the base die having a pattern; an encapsulant on the base die encapsulating the contacts and partially encapsulating the secondary die with the backside of the secondary die and an outside surface of the encapsulant forming a planar surface; a plurality of conductors on the planar surface in electrical communication with the contacts having a plurality of pads in an area array on the backside of the secondary die and on the encapsulant, the conductors and the pads comprising a patterned redistribution layer on the planar surface; and a plurality of terminal contacts for the component on the pads, the conductors configured to customize a configuration of the terminal contacts from the pattern of the contacts to the area array.