Patent ID: 7504300

Claim:
A method for fabricating a semiconductor memory device, comprising: forming a plurality of storage node plugs on a substrate; forming an insulation layer with a plurality of openings exposing surfaces of the plurality of storage node plugs on the substrate; forming a plurality of cylinder-type storage nodes inside the plurality of openings, wherein each of the cylinder type storage nodes includes a bottom layer, a middle layer, and a top layer; selectively removing the insulation layer; forming a dielectric layer on the plurality of cylinder type storage nodes; and forming a plate electrode on the dielectric layer, wherein forming the plurality of cylinder type storage nodes includes: forming the middle layer on the bottom layer using a material different from a material used for forming the bottom layer; forming a passivation layer filling the plurality of openings over the middle layer; selectively removing the passivation layer such that the passivation layer remains only inside the plurality of openings; performing a blanket etch-back process to remove a portion of the middle layer until a height of the middle layer is lower than that of the remaining passivation layer; and removing the remaining passivation layer.