Patent ID: 8841673

Claim:
A thin-film transistor device comprising: a gate electrode above a substrate; a gate insulating film above the gate electrode; a crystalline silicon thin film above the gate insulating film; a first semiconductor film above the crystalline silicon thin film; a pair of second semiconductor films above the first semiconductor film; a source electrode over one of the second semiconductor films; and a drain electrode over an other one of the second semiconductor films, wherein the first semiconductor film is provided on the crystalline silicon thin film, E CP <E C1 where E CP denotes an energy level at a lower end of a conduction band of the crystalline silicon thin film and E C1 denotes an energy level at a lower end of a conduction band of the first semiconductor film, and the energy level E CP at the lower end of the conduction band of the crystalline silicon thin film and the energy level E C1 at the lower end of the conduction band of the first semiconductor film are adjusted to suppress a spike at a junction between the crystalline silicon thin film and the first semiconductor film.