Patent ID: 7282375

Claim:
A method comprising: providing a semiconductor wafer having a plurality of integrated circuit dice formed therein, the integrated circuit dice including a plurality of electrically conductive contact pads and solder-wettable electrically conductive trim pads exposed on an active surface of the wafer, wherein the trim pads are not covered by a passivation layer; forming contact bumps on a plurality of the contact pads, wherein the solder-wettable electrically conductive trim pads are exposed on the active surface of the wafer during the forming of the contact bumps; probing the wafer after the contact bumps have been formed, wherein the wafer probing includes, a trimming operation that includes directly probing solder-wettable portions of the plurality of exposed solder-wettable electrically conductive trim pads and trimming selected circuits associated with selected trims pads, and a testing operation that involves probing at least some of the plurality of contact bumps to test selected functionalities of the integrated circuits; and applying an electrically insulating undercoating to the active surface of the wafer that directly contacts and covers the solder-wettable trim pads while leaving at least portions of the contact bumps exposed, the undercoating being applied after the wafer probing, whereby the wafer may be trimmed and tested at substantially the same stage of wafer processing.