Patent ID: 6909309

Claim:
A circuitry fabricated on a silicon substrate, the circuitry comprising: a deserializer, implemented using current-controlled complementary metal-oxide semiconductor (C 3 MOS) logic with inductive broadbanding, that receives an input signal having a first frequency and generates a first plurality of signals there from such that each signal of the first plurality of signals has a second frequency that is lower than the first frequency; core circuitry, implemented using conventional complementary metal-oxide-semiconductor (CMOS) logic, that is communicatively coupled to the deserializer and that processes each signal of the first plurality of signals having the second frequency thereby generating a second plurality of signals such that each signal of the second plurality of signals also has the second frequency; and a serializer, implemented using C 3 MOS logic with inductive broadbanding, that is communicatively coupled to the core circuitry and that receives each signal of the second plurality of signals and that generates an output signal there from that has the first frequency.