Patent ID: 8173522

Claim:
Process for the production of a wafer ( 1 , 2 ; 1 b , 2 ; 1 c , 2 ) exhibiting a front side and a rear side, with a carrier layer ( 4 ) and an interlayer ( 3 ) arranged between the carrier layer ( 4 ) and the wafer ( 1 , 2 ; 1 b , 2 ; 1 c , 2 ), said process comprising the steps: a) supplying a wafer ( 1 , 2 ; 1 b , 2 ; 1 c , 2 ), b) provision of the wafer ( 1 , 2 ; 1 b , 2 ; 1 c , 2 ) with a plasmapolymeric interlayer ( 3 ) so that this adheres to the wafer ( 1 , 2 ; 1 b , 2 ; 1 c , 2 ), c) application of a carrier layer ( 4 ) to the interlayer ( 3 ) so that the interlayer ( 3 ) adheres more firmly to the carrier layer ( 4 ) than to the wafer ( 1 , 2 ; 1 b , 2 ; 1 c , 2 ).