Patent ID: 7024536

Claim:
A fully-associative translation look-aside buffer (TLB) which converts a virtual address into a physical address, the TLB comprising: a first TLB having a plurality of banks; a second TLB having a plurality of entries, each of which having one virtual page number and 2 N physical page numbers, wherein N is a natural number; and a selection circuit for outputting an output signal of the first TLB to the second TLB in response to a selection signal, wherein each bank of the first TLB has a plurality of entries, each of the plurality of entries has one virtual page number and one physical page number and if each of (2 N -1) physical page numbers among the 2 N physical page number is sent from the first TLB to the second TLB, the (2 N -1) physical page numbers are nullified in the respective entries of the first TLB.