Patent ID: 7157321

Claim:
A method for manufacturing a semiconductor device comprising the steps of: forming a semiconductor layer having a source region, a drain region, and a LDD region; a gate insulating film; and a first gate electrode; forming an interlayer insulating film over the first gate electrode and the gate insulating film; forming a first opening portion in the interlayer insulating film so as to be located over each of the source region and the drain region; and a second opening portion in the interlayer insulating film so as to be located over the LDD region and the first gate electrode; forming a second gate electrode by a conductive film in the second opening portion so as to contact the first gate electrode and cover the LDD region; and a pixel electrode by the conductive film over the interlayer insulating film; removing the gate insulating film in the first opening portion; and forming a wiring connected to each of the source region and the drain region in the first opening portion and over the interlayer insulating film.