Patent ID: 7479914

Claim:
An A-D converter outputting a digital output signal which is a digitalized analog input signal, comprising: a plurality of comparators, each of which compares the analog input signal to analog threshold values; an upper field determination section which, during an upper determination phase, supplies in parallel to each of the plurality of comparators the plurality of analog threshold values expressing boundaries of ranges corresponding to each data value acquired from an upper field of a number of bits previously designated in the digital output signal, detects whether the analog input signal is associated with one of the ranges based on comparison results by the plurality of comparators, and narrows down the data values of the upper field to data values corresponding to a range between a largest of the analog threshold values less than or equal to the analog input signal and a smallest of the analog threshold values greater than or equal to the analog input signal; a bit selection section which, during a lower determination phase, selects conversion target bits sequentially from a highest bit to a lowest bit within a lower field, while ignoring the upper field in the digital output signal; a threshold control section which, during the lower determination phase, determines threshold data values expressing boundary values of zero and one of the conversion target bits based on a predetermined value of a bit higher than the conversion target bits; a D-A conversion section which, during the lower determination phase, supplies to each of the plurality of comparators the analog threshold values which are the D-A converted threshold data; and a lower field determination section which, during the lower determination phase, determines values of the conversion target bits based on a plurality of comparison results of the plurality of comparators.