Patent ID: 7295557

Claim:
A transmit scheduler for use in scheduling transmission of message packets by a source device over a network, each message packet being associated with one of a plurality of virtual circuits, the transmit scheduler comprising: A. a virtual circuit task list configured to identify virtual circuits for which message packets are to be transmitted; and B. a transmit task control configured to sequence through the virtual circuit task list to identify successive virtual circuits for which message packets are to be transmitted and, for each identified virtual circuit, to enable data to be obtained for transmission by said transmitter in a respective message packet, thereby to facilitate transmission of message packets by the transmitter so that messages are transmitted in a round-robin manner as among ones of the virtual circuits for which the device is the source device; wherein said virtual circuit task list is configured to include a plurality of prioritized task lists, the transmit task control being configured to select among said prioritized task lists and, for each prioritized task list so selected, identify a virtual circuit for which message packets are to be transmitted; and wherein each virtual circuit is identified by a virtual circuit identifier, the virtual circuit identifiers each having a value within a range of virtual circuit identifier values, each of said prioritized task lists comprising a bit map including a bit associated with each virtual circuit identifier value in said range, transmit task control being configured to, for each virtual circuit for which a message packet is to be transmitted at the respective priority level, set the bit in the bit map of the respective prioritized task list associated with the virtual circuit's virtual circuit identifier value, the transmit task control using the set bits to identify virtual circuits for which message packets are to be transmitted.