Patent ID: 7875931

Claim:
A semiconductor device comprising: a semiconductor layer including an element isolation region and an element region, over an insulating surface, wherein the element region includes a source region, a drain region, a channel formation region and a gate electrode over the channel formation region with a gate insulating film interposed therebetween, wherein the element isolation region and the element region are in contact with each other, wherein the element isolation region has a stacked structure of a second element isolation region and a first element isolation region over the second element isolation region; wherein the first element isolation region includes a first impurity element; wherein the second element isolation region includes a second impurity element; wherein the first impurity element is at least one or more kinds of oxygen, nitrogen, and carbon, wherein the second impurity element is an impurity element that imparts an opposite conductivity type to that of the source region and the drain region to the element isolation region, wherein crystallinity of the element isolation region is lower than that of the channel formation region; wherein the gate insulating film is in contact with the element isolation region and the source region, the drain region, and the channel formation region of the element region, and wherein the element isolation region is formed using a semiconductor layer.