Patent ID: 7782692

Claim:
A read module for register files, comprising: at least one local I/O module coupled to a memory cell for outputting a value stored in the memory cell; and at least one global bit line driver having an input terminal coupled to the local I/O module, and an output terminal coupled to a global bit line for selectively pre-charging the global bit line at a default voltage in response to a local pre-charge signal, and outputting the value stored in the memory cell to the global bit line when the local pre-charge signal is not asserted, wherein the global bit line driver comprises: a first NMOS transistor having a source coupled to ground, a drain coupled to the global bit line, and a gate coupled to the local I/O module; and a first PMOS transistor having a drain coupled to the drain of the first NMOS transistor, and a gate controlled by a select signal.