Patent ID: 7933949

Claim:
A data processing apparatus comprising: receiving means for receiving data blocks in which an audio data item and a video data item are multiplexed; separating means for separating said received data into said audio data item and said video data item; first storing means for storing said audio data item; second storing means for storing said video data item; first processing means for decoding said audio data item; second processing means for decoding said video data item; generating means for generating first and second clocks of respective clock frequencies for use by said first and said second processing means; first controlling means for raising the clock frequency of said first clock if said audio data item stored in said first storing means is of a data size larger than a first reference value, said first controlling means lowering the clock frequency of said first clock if said audio data item stored in said first storing means is of a data size less than a second reference value; and second controlling means for raising the clock frequency of said second clock if said video data item stored in said second storing means is of a data size larger than a third reference value, said second controlling means lowering the clock frequency of said second clock if said video data item stored in said second storing means is of a data size less than a fourth reference value; wherein said first or second controlling means impart delay compensation to said audio or video data item to synchronize said data items if there is a difference in total processing time between transmission processing of the audio and video data items and reception processing of the audio and video data items.