Patent ID: 6841828

Claim:
A semiconductor device comprising: a semiconductor substrate having a first insulator, and a semiconductor channel region formed on said first insulator, wherein said semiconductor channel region comprising: at least two first semiconductor regions both having a first conductivity type, a second semiconductor region having a conductivity type opposite to said first conductivity type, said second semiconductor region being provided between said two first two semiconductor regions, a second insulator formed on said second semiconductor region, a gate electrode formed on said second insulator, a third semiconductor region having the same conductivity type as that of said second semiconductor region, said third semiconductor region contacting and being electrically conductive to said second semiconductor region, a third insulator formed on said third semiconductor region, said third insulator having a width narrower than the widths of an isolation region for isolating a second and a third semiconductor region combined with a fourth semiconductor region, and wherein the fourth semiconductor region having the same conductivity type as that of said third semiconductor region, said fourth semiconductor region contacting and being electrically conductive to said third semiconductor region.