Patent ID: 8330501

Claim:
A system for voltage buffering within an integrated circuit (IC), the system comprising: a first buffer comprising an input and an output, wherein the first buffer is configured to buffer a received maximum input voltage approximately equal to a positive voltage supply powering the system; a second buffer comprising an input and an output, wherein the input of the first buffer is coupled to the input of the second buffer, wherein the output of the first buffer is coupled to the output of the second buffer, and wherein the second buffer is configured to buffer a received minimum input voltage approximately equal to a negative voltage supply powering the system; a controller configured to selectively enable only the first buffer or the second buffer at any given time; a bias generator configured to generate a first bias voltage and a second bias voltage; a first switch configured to enable the first buffer by selectively coupling the first bias voltage to the first buffer responsive to a first control signal from the controller; and a second switch configured to enable the second buffer by selectively coupling the second bias voltage to the second buffer responsive to a second control signal from the controller.