Patent ID: 7915168

Claim:
A semiconductor processing method, comprising: forming a monocrystalline silicon-containing semiconductor substrate to comprise at least one bond pad supporting layer along a front side of the substrate, and to comprise a silicon nitride passivation layer over the at least one bond pad supporting layer; the semiconductor substrate comprising a back side in opposing relation to the front side; the back side having an exposed surface, and the front side having an exposed surface comprising a surface of the silicon nitride passivation layer; utilizing plasma-enhanced atomic layer deposition to simultaneously deposit insulative material across the front side exposed surface and across the back side exposed surface; the plasma-enhanced atomic layer deposition being conducted at a temperature of from at least about 300° C. to less than or equal to about 500° C. to activate hydrogen in the silicon nitride passivation layer during the deposition; etching a pattern of openings extending through the insulative material and through the silicon nitride passivation layer to expose regions of the at least one bond pad supporting layer; and dipping the substrate in a plating bath to form conductive material within the openings, the conductive material within the openings being contacts to the semiconductor substrate front side.