Patent ID: 8558626

Claim:
An integrated circuit comprising: oscillator circuitry arranged to generate a clock signal for a functional logic module of the integrated circuit, wherein the clock signal comprises an output clock signal, the oscillator circuitry comprises a plurality of propagation paths, OR logic, AND logic and multiplexer logic, wherein outputs of the plurality of propagation paths are operably coupled to both of inputs of the OR logic and inputs of the AND logic, outputs of the OR logic and the AND logic are operably coupled to inputs of the multiplexer logic, and an output of the multiplexer logic being arranged to provide the output clock signal, and the oscillator circuitry is further configured to apply a transition signal to inputs of the plurality of propagation paths, said multiplexer logic arranged to receive as a control signal, the transition signal, and cause the output clock signal to transition based on a propagation of the transition signal through a determined set of the propagation paths.