Patent ID: 6838351

Claim:
A manufacturing method of a circuit board comprising a plurality of elements each having a resistor layer formed on an insulative surface of the substrate and a pair of electrodes formed on said resistor layer at a predetermined interval, comprising: (a) a step of sequentially laminating a resistor material layer for forming said resistor layer and an electrode material layer for forming said electrodes in this order on the insulative surface of said substrate; (b) a step of forming a resist layer (I) having a pattern for separating said elements from each other on said electrode material layer; (c) a step of patterning said resistor material layer and said electrode material layer by dry etching on the basis of the pattern of said resist layer (I) and forming a laminated structure in which said electrode material layer has been laminated on said resistor layer; (d) a step of removing the resist layer (I) on said laminated structure; (e) a step of forming a resist layer (II) having a pattern for forming said interval; (f) a step of patterning said electrode material layer by wet etching on the basis of the pattern of said resist layer (II), forming said interval, and forming said elements; and (g) a step of processing a surface portion of said electrode material layer so that an etching speed of the surface portion is made higher than that of the material forming said electrode material layer at least before said step (e).