Patent ID: 7319265

Claim:
A semiconductor chip assembly, comprising: a semiconductor chip that includes first and second opposing surfaces, wherein the first surface of the chip includes a conductive pad; a conductive trace that includes a routing line and a metal pillar, wherein the metal pillar is a single-piece metal and includes first and second opposing surfaces and tapered sidewalls therebetween, the first surface of the metal pillar faces in a first direction and contacts and is non-integral with the routing line, the second surface of the metal pillar faces in a second direction opposite the first direction and is spaced from the routing line, the tapered sidewalls include first and second sidewall portions that are adjacent to one another at a spike in the metal pillar, the first sidewall portion is a concave arc that is adjacent to the first surface of the metal pillar, is spaced from the second surface of the metal pillar, slants inwardly towards the second surface of the metal pillar and extends vertically beyond the second sidewall portion in the first direction, the second sidewall portion is a concave arc that is adjacent to the second surface of the metal pillar, is spaced from the first surface of the metal pillar, slants inwardly towards the second surface of the metal pillar and extends vertically beyond the first sidewall portion in the second direction, and the spike protrudes laterally from the metal pillar and is spaced from the first and second surfaces of the metal pillar; a connection joint that electrically connects the routing line and the pad; and an encapsulant, wherein the chip is embedded in the encapsulant, the routing line extends laterally beyond the metal pillar, and the metal pillar extends vertically beyond the routing line in the second direction, does not cover the routing line in the second direction and is not covered in the second direction by the encapsulant or any other insulative material of the assembly.