Patent ID: 7319354

Claim:
A signal processing apparatus comprising: (a) a signal treating unit receiving an input signal at an input locus; said signal treating unit effecting a plurality of signal treating functions related to said input signal to present a treated signal at an output locus; (b) an internal clock signal generating unit receiving an external clock signal at a clock signal input locus; said internal clock signal generating unit using said external clock signal for presenting an internal system clock signal at an internal clock signal locus; said internal clock signal locus being coupled with said signal treating unit; said internal system clock signal being used by said signal treating unit while effecting at least one selected treating function of said plurality of signal treating functions; (c) a clock signal simulating unit effecting occasional coupling with at least one of said clock signal input locus and said internal clock signal generating unit to receive at least one of said external clock signal and said internal system clock signal; said clock signal simulating unit providing a simulated internal clock signal generally similar to said internal system clock signal at said internal clock signal locus when either of said external clock signal or said internal system clock signal is interrupted or is decoupled from said internal clock signal locus; and (d) a control unit coupled with said signal treating unit, coupled with at least one of said clock signal input locus and said internal clock signal generating unit and coupled with said internal clock signal locus; said control unit operating said internal clock signal locus to selectively couple one of said internal clock signal and said simulated internal clock signal for use by said signal treating unit.