Patent ID: 8265902

Claim:
A circuit for measuring a time interval between a first event and a second event, comprising: at least one activity input for receiving a respective signal, wherein the respective signal has a first transition that indicates the first event, a second transition that indicates the second event, and no transitions between the first and second transitions; a respective high-speed serial receiver coupled to each activity input, the respective high-speed serial receiver including a sampling circuit and a deserializer, the sampling circuit configured to generate a plurality of sample bits from sampling the respective signal at active edges of a clock signal occurring between the first and second transitions of the respective signal, and the deserializer configured to convert the sample bits into a sequence of parallel data words, wherein the sample bits undergo a first change in response to the first transition and subsequent ones of the sample bits undergo a second change in response to the second transition; and an arithmetic circuit coupled to receive the sequence of parallel data words from the respective high-speed serial receiver, wherein the arithmetic circuit is configured to determine a number of the sample bits between the first and second changes in the sequence of parallel data words, and the number measures the time interval between the first and second events.