Patent ID: 7068542

Claim:
A non-volatile semiconductor memory device, comprising: a plurality of non-volatile memory cells each of which has a storage structure and an electrically alterable parameter representing data of at least two bits, wherein the electrically alterable parameters of the plurality of non-volatile memory cells are shiftable to at least three mutually different first, second and third program states from an erase state; reference value generating circuitry generating first, second and third programming reference values for programming the first, second and third program states, and generating first, second and third read reference values, which are different from the first, second and third programming reference values, for reading the first, second and third program states; and sensing/program-verifying circuitry receiving the parameter of one non-volatile memory cell, the first, second and third read reference values and the first, second and third read programming reference values; wherein the first read reference value is allocated between the first program state and the second program state, the second read reference value is allocated between the second program state and the third program state, and the third read reference value is allocated between the third program state and the erase state, wherein the second read reference value is allocated substantially at a midpoint between the second program state and the third program state, and the third read reference value is shifted toward the second program state from a midpoint between the third program state and the erase state, wherein the sensing/program-verifying circuitry generates data of at least two bits represented by the electrically alterable parameter, verifies whether the electrically alterable parameter is shifted to the parameter indicating a selected one state of the first, second and third program states, and programs the electrically alterable parameter until it has been verified that the electrically alterable parameter has been shifted to the selected one state, wherein the first, second and third programming reference values are used for verifying whether the electrically alterable parameter is shifted to the first, second or third program state, and the first, second and third read reference values are used for detecting whether the electrically alterable parameter is near to the first, second or third program state, and wherein the reference value generating circuitry generates the first, second and third programming reference values and the first, second and third read reference values such that one of the first, second and third programming reference values and the first, second and third read reference values is shifted from and dependent upon the other.