Patent ID: 7882278

Claim:
A communications mechanism supporting communication between multiple components of a digital data device, comprising: a communications medium comprising a central interconnect module coupled to a plurality of components of said digital device by respective communications links, each said communications link supporting transmission of one or more bits of data sequenced by a common clock and supporting transmission of data from at most one bus transaction in any given cycle of said common clock, said communications medium forming a plurality of communications paths, each path running between a respective pair of said plurality of components, each path traversing said central interconnect module and containing a single respective said communications link connecting a first component of the respective pair to said central interconnect module and a single respective said communications link connecting a second component of the respective pair to said central interconnect module, each path having a respective disjoint set of channels containing a respective plurality of channels forming subdivisions of the data capacity of the path, said communications medium employing a multi-channel protocol wherein each of a plurality of bus transactions transmitted on said at least one communications medium is assigned a respective channel of the respective set of channels of the path along which the bus transaction is transmitted by a respective component transmitting the bus transaction; a flow control mechanism controlling said communications medium, said flow control mechanism providing independent flow control for each of said plurality of channels, said flow control mechanism enforcing an ordering algorithm among channels according to a plurality of channel attributes; at least one buffer in said central interconnect module for buffering transactions on said communications medium, wherein each said channel is allocated a respective discrete subset of said at least one buffer for use as a respective first-in-first-out (FIFO) queue controlled by said flow control mechanism, each respective FIFO queue holding a respective plurality of bus transactions transmissible on said communications medium; wherein at least some bus transactions pass other respective bus transactions assigned to a different channel of the same communications path; and wherein at least some of said plurality of channel attributes are programmable to alter the conditions under which a first bus transaction passes a second bus transaction assigned to a different channel of the same communications path.