Patent ID: 8749220

Claim:
A low noise current buffer circuit for reducing impact of noise of a system voltage on an output voltage in a current-to-voltage converter, comprising: a first current mirror, comprising: a first transistor, comprising a gate, a drain and a source, the gate coupled to the drain, and the drain receiving an input current; and a second transistor, comprising a gate, a drain and a source, the gate coupled to the gate of the first transistor, for draining a first current from the drain according to the input current received by the first transistor; a second current mirror, comprising: a third transistor, comprising a gate, a drain and a source, the gate coupled to the drain, and the drain coupled to the drain of the second transistor, for outputting the first current; and a fourth transistor, comprising a gate, a drain and a source, the gate coupled to the gate of the third transistor, for outputting a second current to an output resistor according to the first current outputted by the third transistor, to generate the output voltage; and a feedback capacitor, comprising a terminal coupled between the drain of the second transistor and the drain of the third transistor, another terminal coupled between the drain of the fourth transistor and the output resistor, for forming a negative feedback loop, to eliminate the impacts of the noise of the input current or system voltage on the output voltage.