Patent ID: 7657933

Claim:
A cryptographic processor comprising: N group queues, each group queue to store a specified type of data packets; N defined groups of security processing resources, each of the N defined groups configured to process the specified type of data packets from each of the N group queues; a group queue scheduler to identify the type of data packets provided to the cryptographic processor and to forward packet processing request entries (“request entries”) identifying the data packets to one of the N group queues, based on the identified type of data packets, wherein N≧2; an input memory for storing data packets identified by the processing request entries prior to processing by the security processing resources; an output memory for storing processed data packets produced by the security processing resources; a monitor module to monitor load on each of the N defined groups of security processing resources; and a resource allocation module to reallocate security processing resources from a first group of the N defined groups to a second group of the N defined groups in response to the monitor module detecting that the load on the second group of the N defined groups is above a specified threshold value, wherein the resource allocation module reallocates security processing resources comprising execution cores from the first group to the second group only if the load on the first group is below a specified threshold value and upon reallocating security processing resources, the resource allocation module loads new microcode on the execution cores reallocated from the first group to the second group.