Patent ID: 7662698

Claim:
A method for forming a transistor device having a field plate, comprising: forming structure having a source electrode, a drain electrode, and a Tee gate on a semiconductor body, such Tee-gate having a vertically extending post portion with a horizontal top portion, such horizontal top portion having distal ends extending laterally outwardly from the vertically extending post portion; forming a dielectric layer on the structure; forming a photo-resist layer on the dielectric layer; forming an opening in the photo-resist layer over only one of the two distal ends of the horizontal top portion of the gate, such opening being formed only over the one of the two distal ends disposed closer to the drain electrode than the source electrode; depositing a metal over the photo-resist layer with portions of the metal being disposed on the photo-resist layer and with other portions of the metal passing through the opening onto portions of the dielectric layer exposed by the opening and with said one of the two distal ends preventing such metal from being deposited onto portions of the dielectric layer disposed under such one of the two distal ends, said one of the two distal ends masking the underlying portion of the dielectric layer from the metal with an air-gap being formed between the post portion and an edge of the metal; and lifting off the photo-resist layer removing the portions of the metal that was deposited on the photo-resist layer while leaving portions of the metal on regions of the dielectric layer exposed by the opening to form the field plate.