Patent ID: 7649238

Claim:
A semiconductor device comprising a MOS transistor arranged on a SOI layer having a first conductivity type of a SOI substrate, wherein said MOS transistor includes: a gate electrode having a first predetermined length in a first direction and a second predetermined width in a second direction, arranged over said SOI layer through a gate insulating film; first and second semiconductor regions having a second conductivity type which is opposite to said first conductivity type, arranged in a surface of said SOI layer at both sides of said gate electrode along said first direction, a body region having said first conductive type arranged between said first and second semiconductor regions; a first insulating film extending in said first direction across a channel forming region formed in the surface of said SOI layer under said gate electrode thereby to divide said first semiconductor region into a plurality of divisions in said second direction; a third semiconductor region having said first conductivity type arranged adjacent to said first insulating film at opposite to said gate electrode in said first direction; and a fourth semiconductor region having said first conductivity type under said first insulating film, and said fourth semiconductor region electrically connected to said SOI layer and said third semiconductor region.