Patent ID: 8159247

Claim:
An apparatus for testing substrates in multiple configurations, said apparatus comprising: a set of N interposers, wherein every i-th interposer among said set of N interposers electrically connects a first selected chip located in a first area of a first substrate to a second selected chip in a second area of a second substrate for each integer i from 1 to N one at a time, said second area corresponds to an area that is rotated from said first area by an angle of (i−1)/N×2π about a center axis of said first substrate, and N is an integer greater than 1; and a tester configured to hold an assembly of said first substrate, said second substrate, and any one of said set of N interposers one at a time and to test a functionality of a combination of said first selected chip and said second selected chip for each of said set of N interposers.