Patent ID: 7471166

Claim:
A balanced-to-unbalanced transformer embedded with a filter, the balanced-to-unbalanced transformer being disposed in a multi-layered substrate and comprising: an unbalanced single-ended I/O port, disposed in one layer of the multi-layered substrate and comprising a single-ended terminal so as to be coupled to external unbalanced elements; a first transmission line and a second transmission line, coupled and disposed in the same layer as the unbalanced single-ended I/O port; a balanced I/O port, disposed in another layer of the multi-layered substrate and comprising two differential transmission terminals so as to be coupled to external balanced elements; a third transmission line and a fourth transmission line, coupled and disposed in the same layer as the balanced I/O port so as to be coupled to the two differential transmission terminals respectively, and vertically coupled to the first transmission line and the second transmission line respectively; a fifth transmission line, disposed in the same layer as the first transmission line and the second transmission line and coupled to the first transmission line or the second transmission line; and a serial capacitor, disposed in the same layer as the fifth transmission line so as to be coupled to the fifth transmission line at one terminal and coupled to the single-ended terminal of the unbalanced single-ended I/O port at the other terminal.