Patent ID: 8558321

Claim:
A semiconductor device, comprising: a first metal insulator semiconductor (MIS) transistor of a first conductivity type having a first active region as a region of a semiconductor substrate surrounded by an element isolation region formed in an upper portion of the semiconductor substrate, a first gate insulating film having a first high dielectric film formed on the first active region, and a first gate electrode formed on the first gate insulating film; and a resistance element having a second high dielectric film formed on the element isolation region and a resistance layer made of a first silicon film formed on the second high dielectric film, wherein the first high dielectric film and the second high dielectric film include a same high dielectric material, and the first high dielectric film includes a first adjustment metal, but the second high dielectric film does not include the first adjustment metal, the semiconductor device further includes a second MIS transistor of a second conductivity type having a second active region as a region of the semiconductor substrate surrounded by the element isolation region formed in an upper portion of the semiconductor substrate, a second gate insulating film having a third high dielectric film formed on the second active region, and a second gate electrode formed on the second gate insulating film, the third high dielectric film includes the same high dielectric material as the first high dielectric film and the second high dielectric film, and includes a second adjustment metal, but does not include the first adjustment metal, and the second gate insulating film includes a second underlying insulating film formed on the second active region, the third high dielectric film formed on the second underlying insulating film, and a second adjustment metal-containing film containing the second adjustment metal formed on the third high dielectric film.