Patent ID: 7932144

Claim:
A method of forming a semiconductor device, said method comprising: providing a single crystalline silicon layer having a top surface and a bottom surface opposite said top surface; forming a trench isolation region in said single crystalline silicon layer; forming a gate stack on said top surface of said single crystalline silicon layer so as to designate a channel region in said single crystalline silicon layer; performing multiple implantation processes so as to form a first implant region, a second implant region, and a third implant region in said single crystalline silicon layer between said channel region and said trench isolation region, said multiple implantation processes being performed such that said first implant region extends into said single crystalline silicon layer from a first point on said top surface, such that said first implant region is defined by a first edge that curves from said first point to said trench isolation region and such that said first implant region contains an amorphizing species from said top surface to said first edge, said multiple implantation processes further being performed such that said second implant region extends into said single crystalline silicon substrate from a second point on said top surface between said first point and said trench isolation region, such that said second implant region is defined by a second edge that curves from said second point to said trench isolation region and that is between said top surface and said first edge so that said second implant region is contained entirely within said first implant region and such that said second implant region contains carbon from said top surface to said second edge, and said multiple implantation processes further being performed such that said third implant region has a first portion adjacent to said channel region and a second portion, deeper than said first portion, between said first portion and said trench isolation region, such that third implant region extends into said single crystalline silicon layer from a third point on said top surface between said channel region and said first point, such that said third implant region is defined by a third edge that, for said first portion, curves from said third point into said first implant region and into said second implant region and that, for said second portion, curves from within said first implant region and said second implant region to below said first edge and to said trench isolation region, and such that said third implant region contains a dopant, having a specific conductivity type, from said top surface to said third edge; and performing an anneal process so as to recrystallize said first implant region and said second implant region such that said carbon present in said second implant region causes said second implant region to impart a predetermined stress on said channel region upon recrystallization.