Patent ID: 7643964

Claim:
An idle value measurement apparatus for measuring an idle value of a Central Processing Unit (CPU) in an embedded system, the apparatus comprising: a memory coupled to the CPU, the memory including instructions for configuring the CPU; a hardware counter coupled to the CPU for continuously incrementing in accordance with a CPU clock; an idle counter coupled to the CPU; and a trigger coupled to the CPU and having an output coupled to the idle counter, wherein the instructions configure the CPU to: generate an enable signal to place the idle counter in an enable state in which it is continuously incremented during a predetermined period of time; generate a disable signal to place the idle counter in a disable state in which the incrementing is paused; and calculate the idle value as a ratio of total increments of the idle counter to total increments of the hardware counter during the predetermined period of time and the trigger is configured to: receive the enable signal from the CPU and place the idle counter in the enable state and receive the disable signal from the CPU and place the idle counter in the disable state.