Patent ID: 7445141

Claim:
A method for assembling an electronic module comprising: attaching a chip to a first surface of a substrate using a first solder interconnection array; attaching a board to a second surface of said substrate using a second solder interconnection array such that a space is defined between said board and said substrate having a gap height ranging from about 300 microns to about 900 microns, said second solder interconnection array residing entirely within said space; and providing an underfill material within said space after said board has been attached to said substrate but prior to applying compressive forces to said electronic module, said underfill material having a filler material with a particle size ranging from about 32 microns to about 300 microns present in an amount ranging from about 60 to 64 weight percent, said underfill material being in direct contact with both said board and said substrate to maintain said space and optimize integrity of said second solder interconnection array during application of said compressive forces.