Patent ID: 7170777

Claim:
A phase change memory device comprising: a plurality of unit cells arranged in a matrix composed of rows and columns on a semiconductor substrate, each of the unit cells comprising a phase change resistor and an exothermal resistor used to heat the phase change resistor; a plurality of program bit lines connected to first ends of the exothermal resistors of the unit cells along rows, each of the program bit lines comprising a first row selection transistor at one end; a plurality of program word lines connected to the other ends of the exothermal resistors of the unit cells along columns, each of the program word lines comprising a first column selection transistor at one end; a plurality of read bit lines connected to first ends of the phase change resistors of the unit cells along rows, each of the read bit lines comprising a second row selection transistor at one end; and a plurality of read word lines connected to the other ends of the phase change resistors of the unit cells along columns, each of the read word lines comprising a second column selection transistor at one end.