Patent ID: 7552353

Claim:
A controlling circuit for automatically adjusting clock frequency of a central processing unit (CPU), the controlling circuit comprising: a current sensing circuit for converting a current signal of the CPU to a voltage signal; a voltage amplifying circuit for amplifying the voltage signal, and comprising an output to output an amplified voltage signal; a multi-stage switching circuit for converting the amplified voltage signal to switched signals, the multi-stage switching circuit comprising plurality of switching circuits from a first-stage switching circuit to an Nth-stage switching circuit subsequently, the N symbolizing a natural number no less than two; each of the plurality of switching circuits comprising a resistor and a switching element, the switching element comprising a first terminal connected to a voltage input, a second terminal connected to ground via the resistor, and a control terminal for controlling on and off of the switching element wherein the control terminal of the first-stage switching circuit is connected to the ouput of the voltage amplifying circuit to receive amplified voltage signal, the control terminal of the subsequent-stage switching circuit receives a divided voltaae of the voltage received by the control terminal of the previous-stage switching circuit; the second tenninals output the switched signals; and a priority decoding circuit for decoding the switched signals, the decoded switched signals being input to a clock generator of the CPU, and thereby adjusting the clock frequency of the CPU.