Patent ID: 8055961

Claim:
A semiconductor device test circuit which tests a semiconductor device, comprising: a data producing unit that produces first test data and expected value data, the first test data to be fed into the semiconductor device, the expected value data represents expected normal output data supplied from the semiconductor device according to the first test data; a first data retaining unit that retains the first test data produced by the data producing unit and to feed the first test data into the semiconductor device; a second data retaining unit that retains the expected value data produced by the data producing unit; a comparison unit that compares the first test data fed through the semiconductor device and the expected value data outputted from the second data retaining unit to supply comparison result data indicating comparison result between the first data and the expected value data; a switching unit operable that switches the data to be fed into the comparison unit through the second data retaining unit between the expected value data fed from the data producing unit and the first test data fed through the semiconductor device; and a scan chain that includes the first data retaining unit and the second data retaining unit, wherein the scan chain is fed with second test data that is external to the semiconductor device test circuit.