Patent ID: 8227300

Claim:
A method of forming a semiconductor structure comprising: forming first and second semiconductor portions, each including at least one dopant atom, on an insulator layer; forming a first dielectric material layer directly on said first semiconductor portion and a second dielectric material layer directly on said second semiconductor portion, wherein said insulator layer and said first dielectric material layer encapsulate said first semiconductor portion, and wherein said insulator layer and said second dielectric material layer encapsulate said second semiconductor portion; depositing a conductive material layer directly on said first and second dielectric material layers; planarizing said conductive material layer employing a top surface of said first dielectric material layer and a top surface of said second dielectric material layer as a stopping layer; forming a conductive material portion directly on a portion of said first dielectric material layer and a portion of said second dielectric material layer, wherein said first and second dielectric material layers have a thickness less than 2 nm to enable quantum tunneling of electrical current into or from said conductive material portion; and forming a gate conductor of unitary construction directly on a top surface of said first dielectric material layer, a top surface of said second dielectric material layer, and a top surface of said insulator layer.