Patent ID: 8129222

Claim:
A method of assembling an integrated circuit package, comprising: a) providing: a leadframe having a first face and a second face opposite to said first face, wherein said leadframe comprises: an outer frame portion, a die pad portion substantially centrally disposed within said outer frame portion, a plurality of tie bars connecting said die pad portion to said outer frame portion, and a plurality of protuberances extending substantially radially inward from said outer frame portion, each of said plurality of protuberances comprising an inner lead portion, an outer lead portion, and a post portion connecting said inner lead portion from said outer lead portion, an integrated circuit chip having a first face and a second face opposite to said first face, a first plurality of wires each having a first end and a second end, and a second plurality of wires each having a first end and a second end; b) disposing an adhesive layer on said first face of said leadframe, whereby said adhesive layer covers said die pad portion, and part of said inner lead portion of each of said plurality of protuberances, wherein part of each of said inner lead portions remains free of adhesive; c) severing said outer lead portion from said inner lead portion by cutting said post portion; d) mounting said integrated circuit chip on said leadframe, whereby said second face of said integrated circuit chip is connected to a first face of said die pad portion through said adhesive layer, and whereby said second face of said integrated circuit is further connected to said inner lead portions through said adhesive layer; e) electrically conductively joining said first end of said first plurality of wires to a first face of one of said plurality of inner lead portions; f) electrically conductively joining said second end of each of said first plurality of wires to said first face of said integrated circuit chip; g) electrically conductively joining said first end of each of said second plurality of wires to a first face of one of said outer lead portions, and h) electrically conductively joining said second end of said second plurality of wires to said first face of said integrated circuit chip.