Patent ID: 8018036

Claim:
An ultra-thin Quad Flat No-Lead (QFN) semiconductor chip package, comprising: a leadframe having a top surface, and a bottom surface opposite to the top surface, wherein the leadframe has a plurality of leads so configured as to have lead terminals formed by recesses from both the top and bottom surfaces, and contact areas formed on either the top or bottom surfaces, wherein the recesses from both the top and bottom surfaces comprise a recess from the top surface disposed directly above a recess from the bottom surface, wherein the contact areas of the top surface are substantially aligned with the contact areas of the bottom surface, a die electrically connected to the plurality of lead terminals; and a molding compound encapsulating the leadframe and die together so as to form the ultra-thin QFN package, thereby the substantially aligned contact areas are exposed on both the top and bottom surfaces of the package.