Patent ID: 8405122

Claim:
An insulated gate semiconductor device having an IGBT element comprising: a first conductivity type semiconductor substrate having a first surface; a plurality of second conductivity type channel regions on the first surface side of the substrate; a plurality of second conductivity type floating regions on the first surface side of the substrate, each floating region having a predetermined depth from the first surface of the semiconductor substrate; a first conductivity type emitter region in a surface portion of each channel region; a second conductivity type body region in the surface portion of each channel region, the body region being deeper than the emitter region; a first conductivity type hole stopper layer in each floating region to divide the floating region into a first region and a second region in a direction of the depth of the floating region, the first region located on the first surface side of the substrate, the second region located on a bottom side of the floating region; and an emitter electrode located on the first surface of the substrate and electrically connected to each of the emitter region and the first region, wherein the plurality of channel regions and the plurality of floating regions are repeatedly arranged in a predetermined pattern in a direction parallel to the first surface of the substrate in such a manner that at least one floating region is located between adjacent channel regions, and a peak depth of the hole stopper layer from the first surface of the substrate is equal to or less than fifty percent of the depth of the floating region.