Patent ID: 8402226

Claim:
A computer-implemented method of cache writeback in a data storage system, the data storage system including a cache memory, a storage array, and a data processor coupled to the cache memory and coupled to the storage array for modifying pages of data in the cache memory so that a number of the pages in the cache memory become dirty, and writing the dirty pages from the cache memory to the storage array so that the dirty pages become clean, the method comprising the data processor executing computer instructions stored on a non-transitory computer-readable storage medium to perform the steps of: (a) obtaining a count of the number of dirty pages in the cache memory; and (b) based on the count of the number of dirt pages in the cache memory obtained in step (a), writing the dirt pages from the cache memory to the storage array at a rate having a component proportional to a rate of change in the number of dirty pages in the cache memory; wherein step (b) includes: computing a first term proportional to the rate of change in the dirty pages in the cache memory, and adding the first term to a second term to compute a desired rate for writing the dirty pages are written from the cache memory to the storage array; and writing the dirty pages from the cache memory to the storage array at the desired rate.