Patent ID: 7678698

Claim:
A method, comprising: forming a control terminal of a transistor over a substrate; forming a first tensile stressor layer over the substrate and overlying the control terminal after the forming the control terminal, wherein the first tensile stressor layer includes silicon nitride; forming a second tensile stressor layer over and in direct contact with the first tensile stressor layer and overlying the control terminal, wherein the second tensile stressor layer includes silicon nitride; forming a third tensile stressor layer over and in direct contact with the second tensile stressor layer and overlying the control terminal, wherein the third tensile stressor layer includes silicon nitride; forming a fourth tensile stressor layer over and in direct contact with the third tensile stressor layer and overlying the control terminal, wherein the fourth tensile stressor layer includes silicon nitride; and curing with UV radiation the first tensile stressor layer, the second tensile stressor layer, the third tensile stressor layer and the fourth tensile stressor layer, wherein the first tensile stressor layer exerts a first tensile stress, the second tensile stressor layer exerts a second tensile stress, the third tensile stressor layer exerts a third tensile stress, the fourth tensile stressor layer exerts a fourth tensile stress, wherein after the curing, the first tensile stress is lower than the second tensile stress, and the third tensile stress is lower than the fourth tensile stress, the first tensile stress layer and the second tensile stress layer forming a first pair and the third tensile stress layer and the fourth tensile stress layer forming a second pair, wherein a top layer of each pair has a greater stress characteristic than a lower layer of that pair.