Patent ID: 7387939

Claim:
A method of forming a semiconductor structure, comprising: providing a construction comprising a memory array region, a region other than the memory array region and a location between the memory array region and said other region; the construction comprising a first material extending across the memory array region, across said other region, and across the location between the memory array region and said other region; the construction comprising a second material over at least a portion of the first material that is across the memory array region and over an entirety of the first material that is across said other region; the construction comprising a trench within the first material and over the location between the memory array region and said other region; forming a liner within the trench to narrow the trench; forming a third material within the narrowed trench and over an entirety of the second material that is over said other region; after forming the third material, exposing some of the first material to an etch while the first material over said other region is protected from the etch by at least the third material within the trench and over said other region; and after exposing the first material to the etch, removing the third material.