Patent ID: 7763479

Claim:
A method of fabricating a pixel structure, comprising: providing a substrate having a transistor region and a capacitor region; forming a patterned semiconductor layer on the transistor region and the capacitor region of the substrate; forming a gate dielectric layer on the patterned semiconductor layer; forming a conductive layer, a dielectric layer, and an electrode layer sequentially on the substrate; forming a patterned photoresist layer on the electrode layer of the transistor region and the capacitor region; performing an isotropic etching process by using the patterned photoresist layer as mask to remove a portion of the electrode layer in both vertical and horizontal direction; performing a first etching process by using the patterned photoresist layer as a mask to remove a portion of the dielectric layer and the conductive layer; performing a first ion implantation process by using the patterned photoresist layer as mask to form a source/drain region in the patterned semiconductor layer; removing the patterned photoresist layer of the transistor region; performing a second etching process by using the electrode layer as mask to remove a portion of the dielectric layer and the conductive layer; performing a second ion implantation process by using the patterned photoresist layer as mask to form a lightly doped drain region in the patterned semiconductor layer; performing a third etching process by using the patterned photoresist layer of the capacitor region as mask to remove the electrode layer disposed in the transistor region; removing the patterned photoresist layer disposed in the capacitor region; forming a first dielectric layer on the substrate and forming a plurality of first via holes in the first dielectric layer; forming a patterned metal layer on the first dielectric layer and into the first via holes for forming a plurality of first wires; forming a second dielectric layer on the first wires including a first opening in the second dielectric layer; and forming a patterned transparent conductive layer on the second dielectric layer and into the first opening for forming a pixel electrode.