Patent ID: 8378939

Claim:
A semiconductor device comprising: a pixel portion including a first pixel, a second pixel and a third pixel; a first line electrically connected to the first pixel; a second line electrically connected to the second pixel; a third line electrically connected to the third pixel; a first circuit configured to output a first voltage signal corresponding to a first display level, a second voltage signal corresponding to a second display level, and a third voltage signal corresponding to a third display level; a fourth line electrically connected to an output terminal of the first circuit; a first current source circuit configured to output a first current signal having a first level that corresponds to the first display level; a second current source circuit configured to output a second current signal having a second level that corresponds to the second display level; a third current source circuit configured to output a third current signal having a third level that corresponds to the third display level; a first switch, wherein the first line and the fourth line are electrically connectable with each other through the first switch; a second switch, wherein the first current source circuit and the first line are electrically connectable with each other through the second switch; a third switch, wherein the second line and the fourth line are electrically connectable with each other through the third switch; a fourth switch, wherein the second current source circuit and the second line are electrically connectable with each other through the fourth switch; a fifth switch, wherein the third line and the fourth line are electrically connectable with each other through the fifth switch; a sixth switch, wherein the third current source circuit and the third line are electrically connectable with each other through the sixth switch; and a second circuit configured to select the first, third and fifth switches sequentially, wherein, in a single horizontal display period, the second, fourth and sixth switches are selected concurrently after the first, third and fifth switches are selected sequentially.