Patent ID: 8299545

Claim:
A transistor structure comprising: a substrate comprising a top surface; a channel region within said substrate adjacent said top surface, said channel region comprising a first-type impurity within said substrate; a gate stack on said top surface of said substrate, said gate stack being positioned above said channel region; source and drain regions within said substrate adjacent said top surface, said channel region being positioned between said source and drain regions, said source and drain regions comprising a second-type impurity within said substrate, said second-type impurity having an opposite polarity with respect to said first-type impurity; a primary body doping region within said substrate below, relative to said top surface, said channel region, said primary body doping region being positioned between said source and drain regions within each said transistor structure, and said primary body doping region comprising a greater concentration of said first-type impurity relative to a concentration of said first-type impurity within said channel region; and secondary body doping regions within said substrate below, relative to said top surface, said source and drain regions, said secondary body doping regions comprising a greater concentration of said first type impurity relative to a concentration of said first-type impurity within said channel region, said secondary body doping regions being positioned at a greater depth below said top surface of said substrate than said primary body doping region.