Patent ID: 7560965

Claim:
A circuit comprising: a master latch having an input for receiving an input data signal, and an output; a slave latch having a first input coupled to the output of the master latch, and an output for providing an output data signal, the slave latch comprising a pair of cross-coupled inverters coupled between a first storage node and a second storage node, wherein the first and second storage nodes provide complementary output data signals; a non-volatile storage element for storing a predetermined value, the non-volatile storage element having an output coupled to the first input of the slave latch, wherein the output data signal corresponds to one of either the input data signal or the predetermined value stored by the non-volatile storage element in response to a control signal; a first pass gate coupled between the first storage node and the output of the non-volatile storage element; and a second pass gate coupled between the second storage node and a reference element.