Patent ID: 8832334

Claim:
A computer comprising: a memory; and a processor being operable to manage a plurality of path groups, each of which includes a plurality of logical paths associated with a host computer, wherein each logical path of the plurality of logical paths connects the host computer to a logical volume of one or more logical volumes in one or more storage systems; wherein the processor is operable to manage a priority of each path group of the plurality of path groups, and to use a logical path of a first path group instead of a logical path of a second path group for I/O (input/output) usage between the host computer and the one or more storage systems, representing a migration of I/O usage from the second path group to the first path group, based on at least the priorities of the first and second path groups; wherein each path group has a present threshold; and wherein the processor is operable, when a traffic amount of one path group exceeds the preset threshold for the one path group, to migrate I/O usage from one or more logical paths in the path group to one or more logical paths in another path group, which has a lower priority than the one path group and which has a traffic amount that does not exceed the preset threshold for said another path group.