Patent ID: 7564638

Claim:
An amplifier circuit, comprising: a first differential amplifier circuit, the first differential amplifier circuit being asymmetric with respect to transistor type and having a first pair of inputs and a first pair of outputs; a second differential amplifier circuit, having a second pair of inputs and a second pair of outputs, the second pair of outputs coupled to the first pair of outputs of the first differential amplifier circuit, the second differential amplifier circuit being asymmetric with respect to transistor type; wherein: the first differential amplifier circuit comprises a first transistor of a MOS transistor type and a second transistor of a bipolar transistor type, the first and second transistors having control terminals coupled to first and second inputs, respectively; and the second differential amplifier circuit comprises a third transistor of the MOS transistor type and a fourth transistor of the bipolar transistor type, the third and fourth transistors having control terminals coupled to the second and first inputs, respectively, a first bias circuit coupled to the first differential amplifier circuit, for setting an operating condition of the first differential amplifier circuit; and a second bias circuit coupled to the second differential amplifier circuit, for setting an operating condition of the second differential amplifier circuit, wherein the first bias circuit comprises a first bias transistor connected in a current mirror configuration with the first transistor, and the second bias circuit comprises a second bias transistor connected in a current mirror configuration with the third transistor.