Patent ID: 8854290

Claim:
A timing controller for a liquid crystal panel, connected to a level shift circuit connected with a plurality of gate lines, the timing controller comprising: a timing control unit, used for generating a system state transition voltage (STV) signal and a base STY signal according to an input signal, and providing a base trigger signal and a switch trigger signal having asynchronous frame rates; a compare unit, used for comparing frequencies of the system STV signal and the base STV signal, so as to generate a frame rate select information; a select unit, used for acquiring the base trigger signal, the switch trigger signal, and the frame rate select information, and selecting and outputting one from the base trigger signal and the switch trigger signal to the level shift circuit according to the frame rate select information; and a signal-time control unit, used for controlling an output time of the base trigger signal, and controlling an output time of the switch trigger signal, so that a liquid crystal unit connected to each gate line has an equal charge time.