Patent ID: 8680610

Claim:
A trench semiconductor power MOSFET comprising a plurality of transistor cells with each cell composed of a first type trenched gate surrounded by a source region of a first conductivity type in an active area encompassed in a body region of a second conductivity type above a drain region disposed on a bottom surface of a low-resistivity substrate of said first conductivity type, wherein said first type trenched gate is composed of a doped poly-silicon layer padded by a first insulation layer as a gate oxide and said transistor cells are formed in an epitaxial layer of said first conductivity type over said low-resistivity substrate wherein said epitaxial layer has a lower doping concentration than said low-resistivity substrate, each of said transistor cells further comprising: at least one second type trenched gate composed of said doped poly-silicon layer padded by said first insulation layer, extending to said first type trenched gate for gate connection; a second insulation layer functioning as a contact interlayer; a trenched source-body contact penetrating through said second insulation layer and said source region, and extending into said body region to contact both said source region and said body region in each of said transistor cells, wherein said source region has a lower doping concentration and a shallower junction depth along a channel region than along an adjacent edge of the trenched source-body contact at a same distance from a top surface of said epitaxial layer, and said source region has a doping profile of a Gaussian-distribution along the top surface of said epitaxial layer from the adjacent edge of said trenched source-body contact to said channel region; at least one trenched gate contact penetrating through said second insulation layer and extending into said doped poly-silicon layer in said second type trenched gate; a body contact region heavily doped with said second conductivity type underneath said source region and within said body region, surrounding at least bottom of said trenched source-body contact; at least one floating dummy cell formed between an edge trench and said first type trenched gate, having said body region but without having said source region and said trenched source-body contact, wherein said body region in said floating dummy cell has a floating voltage; said trench semiconductor power MOSFET further comprising: a plurality of third type trenched gates as multiple trenched floating gates in a termination area, composed of said doped poly-silicon layer padded by said first insulation layer, surrounded by said body region without said source region between two adjacent said third type trenched gates in said termination area, wherein each trench depth of said third type trenched gates is equal to or deeper than junction depth of said body region; a source metal connected to said source region and said body region in each of said transistor cells; and a gate metal connected to said second type trenched gate.