Patent ID: 8422297

Claim:
A method of operating a memory device, the method comprising: programming a first memory cell at a first programming rate to adjust a threshold voltage of the first memory cell to a first desired threshold voltage; and programming a second memory cell at a second programming rate to adjust a threshold voltage of the second memory cell to a second desired threshold voltage wherein the second programming rate is different than the first programming rate; wherein at least the first programming rate is regulated exclusively by capacitive coupling a channel potential to a channel region of the first memory cell; wherein programming the first memory cell at the first programming rate and programming the second memory cell at the second programming rate comprises applying a particular potential to a gate of the first memory cell and a gate of the second memory cell while maintaining a channel region of the first memory cell and a channel region of the second memory cell at different channel potentials; and wherein the channel region of the first memory cell is isolated from a bit line associated with the channel region of the first memory cell while programming the first memory cell at the first programming rate.