Patent ID: 7511327

Claim:
A semiconductor device having a memory cell, said memory cell comprising: a memory cell selecting MISFET, which comprises a gate insulating film formed on a semiconductor substrate, a gate electrode formed on said gate insulating film, and a pair of semiconductor regions formed in said semiconductor substrate at both sides of said gate electrode; and a data-storing capacitor element, which comprises a first electrode electrically connected to one of said pair of semiconductor regions, a capacitor dielectric film formed on said first electrode and a second electrode formed on said capacitor dielectric film; wherein said capacitor dielectric film comprises a first layer made of a composition of tantalum pentoxide and niobium pentoxide, and a second layer made of a composition of tantalum pentoxide and niobium pentoxide and formed on said first layer, wherein said first layer is provided on a first electrode side, and said second layer is provided on a second electrode side, and wherein a ratio of Nb/Ta of said first layer is larger than that of said second layer.