Patent ID: 6998680

Claim:
A semiconductor device comprising: a semiconductor region of a first conductivity type; a source region of a second conductivity type in one side of the semiconductor region; a drain region of the second conductivity type in the one side of the semiconductor region and spaced apart from the source region; trenches in the one side of the semiconductor region, between the source region and the drain region, and spaced apart laterally from the source region; an insulator filling each of the trenches; a drain drift region of the second conductivity type in the semiconductor region, the drain drift region being connected to the drain region, the drain drift region extending along side and bottom walls of the trenches, the drain drift region being spaced apart from the source region; a gate insulation film on the surface of the semiconductor region between the source region and the drain drift region; a gate electrode on the gate insulation film; a source electrode connected electrically to the source region; a drain electrode connected electrically to the drain region; and a first triple layer structure formed of the drain drift region, the semiconductor region, and the drain drift region, the triple layer structure being between the adjacent trenches such that the drain drift region is between the adjacent trenches, wherein the trenches are aligned in the width direction of the channels formed beneath the gate insulation film.