Patent ID: 7019366

Claim:
A semiconductor structure comprising: a pad area; an electrostatic discharge protective device disposed directly below said pad area, said electrostatic discharge protective device comprising a transistor and a resistance, wherein said pad area comprises: a substrate; a first layer of metal disposed above said substrate wherein said electrostatic discharge protective device is disposed below said first layer of metal; and a second layer of metal disposed above said first layer of metal; a layer of dielectric disposed between said first metal layer and said second metal layer; and a via disposed within said dielectric layer wherein said via electrically couples said first and said second metal layer, wherein said via comprises a plurality of individual vias, wherein said resistance comprises a portion of said plurality of individual vias, wherein said individual vias comprising said portion are arranged electrically in parallel one to another and wherein a resistive value of said resistance is configured during a process for fabricating said semiconductor structure, wherein said resistive value of said resistance is fixed therein with setting a particular number for said portion of said plurality of individual vias in parallel and wherein said setting tunes said electrostatic discharge protective device for performing an electrostatic discharge protective function.