Patent ID: 7825410

Claim:
A semiconductor device, comprising: a package substrate having a first surface and a second surface opposite to said first surface; and a semiconductor element installed in said first surface of said package substrate, wherein said package substrate includes a plurality of first land pads disposed in said first surface, second land pads disposed in said second surface and a second testing-dedicated pad disposed in said second surface, said semiconductor element is electrically coupled to said first land pads, an inter-pad distance for said second land pads is larger than an inter-pad distance for said first land pads, a second land pad is provided with an external coupling terminal, no external coupling terminal is provided in said second testing-dedicated pad, said package substrate internally has a wiring, a first land pad contains a first testing-dedicated pad electrically coupled to said semiconductor element, said first testing-dedicated pad and said second testing-dedicated pad each comprises a dedicated terminal, which is essential for applying a specified electrical signal from an LSI tester, when an LSI testing is conducted for a semiconductor wafer, and said first testing-dedicated pad is electrically coupled to only said second testing-dedicated pad through said wiring.