Patent ID: 7504689

Claim:
A semiconductor device, comprising: a semiconductor substrate; a first metal insulator semiconductor field effect transistor formed over the semiconductor substrate; a second metal insulator semiconductor field effect transistor formed over the semiconductor substrate and having a second gate electrode formed with an insulating film inserted between the second gate electrode and a first gate electrode of the first metal insulator semiconductor field effect transistor; an isolation field oxide film; a first diffusion layer electrode; a first channel region, corresponding to the first gate electrode, of the first metal insulator semiconductor field effect transistor; a second channel region, corresponding to the second gate electrode, of the second metal insulator semiconductor field effect transistor; and a second diffusion layer electrode opposite to the first diffusion layer electrode, with the first channel region and second channel region sandwiched therebetween, the first diffusion layer electrode, the first channel region, the second channel region, and the second diffusion layer being in a direction crossing with the respective gate electrodes of the first and second metal insulator semiconductor field effect transistors, wherein: a gate insulating film of the second metal insulator semiconductor field effect transistor has a charge retaining function; a current flowing between the first diffusion layer electrode and the second diffusion layer electrode is controlled by a change in voltage characteristics caused by the second gate electrode; the second channel region has a semiconductor region which is convex shaped in a cross-section perpendicular to a channel direction connecting the first diffusion layer electrode and the second diffusion layer electrode; the second channel region of the second metal insulator semiconductor field effect transistor is formed over a side wall of the convex shaped semiconductor region; the first and second gate electrodes are disposed on the isolation field oxide film, and a height of the isolation field oxide film under the second gate electrode is less than a height of the isolation field oxide film under the first gate electrode; and the second gate electrode is a sidewall gate electrode, and a width of the second gate electrode over the isolation field oxide film is wider than a width between the first diffusion layer electrode and the second diffusion layer electrode.