Patent ID: 7155617

Claim:
A method for dynamically managing the power consumption of a digital system comprising the steps of: accepting clock configuration data comprising a plurality of frequency values for a clock of a processor of the digital system; accepting voltage configuration data comprising a plurality of voltage points of a voltage regulator and an associated maximum frequency for each voltage point of the plurality of voltage points; determining a plurality of setpoints for the processor from the clock configuration data and the voltage configuration data wherein the number of setpoints corresponds to the number of frequency values in the plurality of frequency values and each setpoint comprises a frequency value of the plurality of frequency values and a minimum voltage point required for the frequency value; accepting a request from an entity of the digital system to change a current setpoint of the processor to a new setpoint; calling a prologue function specified by the entity upon accepting a request from the entity to change a current setpoint if the entity requests that the prologue function be called to modify a peripheral of the digital system prior to changing the current setpoint; and changing the current setpoint of the processor to the new setpoint wherein a current frequency of the clock is changed to the frequency value of the setpoint and a voltage of the voltage regulator is changed to the voltage point of the setpoint.