Patent ID: 8667227

Claim:
A method to access a data block in a cache with a domain based cache coherence protocol, the method comprising: evaluating a request to access the data block by a first processor in a first tile in a first domain, the first tile includes the first processor effective to process instructions using data in a cache, the first domain includes the first tile and at least a second tile; determining whether the data block is cached in the first domain; when the data block is determined to be cached in the second tile in the first domain, sending the data block from a cache in the second tile to the first tile; and when the data block is determined to be cached outside of the first domain: sending the request to a third tile in a second domain, the third tile including a third processor and a directory, the directory including an indication of the data block and an indication of a data domain different from the first domain and different from the second domain, the data domain being where the data block is cached, the data domain includes at least two tiles, each tile in the data domain includes a respective processor and cache; evaluating the directory with the third processor to determine the data domain associated with the cached location of the data block; sending the request to the data domain by the third processor; receiving the request from the third processor with a fourth processor in a fourth tile in the data domain; and sending the data block from a cache in the fourth tile to a cache in the first tile in response to the request received by the fourth processor.