Patent ID: 6919628

Claim:
A stack chip package structure, comprising: a carrier with a carrier surface and a plurality of bonding pads, wherein the bonding pads are set up on the carrier surface; a die with an active surface and a back surface, wherein the back surface of the die is in contact with the carrier surface of the carrier and the active surface of the die has a plurality of metal pads thereon; an adhesive layer on the active surface of the die; a thermal conductive block with a bonding surface for attaching to the active surface of the die through the adhesive layer, wherein the bonding surface includes a central surface and a plurality of peripheral surfaces surrounding the central surface, wherein the adhesive layer between at least one of the peripheral surfaces and the active surface of the die is thicker than the adhesive layer between the central surface and the active surface, wherein the peripheral surfaces are multi-step ladder, curved or sloped surfaces; a plurality of conductive wires electrically connecting each metal pad to a corresponding bonding pad; and a molding compound enclosing the die, the thermal conductive block and the conductive wires.