Patent ID: 8018972

Claim:
A method of providing clock synchronization in a packet switching network between a first network element having a first clock and a second network element having a second clock, the method comprising: receiving, at the second network element, asymmetry characteristics between a forward path and a reverse path, the forward path from the first network element to the second network element, and the reverse path from the second network element to the first network element, wherein the asymmetric characteristics comprise average residence time per node in the forward path and the reverse path; calculating, at the second network element, an asymmetry factor; receiving, at the second network element at a first receive time, a synchronization packet containing a first transmit time from the first network element; transmitting, from the second network element to the first network element at a second transmit time, a delay request packet; receiving, at the second network element, a delay response packet containing a second receive time, from the first network element; calculating, at the second network element, a clock offset using the asymmetry factor, the first and second transmit times, and the first and second receive times; and synchronizing, at the second network element, the second clock with the first clock using the clock offset.