Patent ID: 8085522

Claim:
A capacitor, comprising: a substrate; a first electrode layer formed on the substrate; conductive first convex sections layered on a surface of said first electrode layer; a first dielectric layer formed on a surface of said first convex sections and a surface of said first electrode layer; and a second electrode layer formed by a wet plating method so as to be superimposed on said first convex sections and said first electrode layer via said first dielectric layer, wherein the first convex sections have a pectinate form with spacing regions between adjacent first convex sections; the first convex sections are separate from the first electrode layer; the second layer includes (a) a layered portion formed above the first convex sections such that the first convex sections are sandwiched between the layered portion and the substrate, and (b) portions filling the regions between adjacent first convex sections; each of the first convex sections has a tapered shape decreasing in width upwardly from the first electrode layer; and each of the portions filling regions between adjacent first convex sections has a tapered shape decreasing in width downwardly toward the first electrode layer.