Patent ID: 7598522

Claim:
A semiconductor substrate, comprising: a wafer; a first stepped structure comprising plural stepped parts formed on a surface of said wafer with a first area occupation ratio; a second stepped structure comprising plural stepped parts formed on said surface of said wafer with a second, different area occupation ratio; and an interlayer insulation film formed on said surface so as to cover said first and second stepped structures, said interlayer insulation film having a planarized top surface, wherein at least first and second film-thickness monitoring patterns for monitoring film thickness on said surface are provided in a manner covered by said interlayer insulation film, a first pattern group including plural patterns is formed on said surface so as to surround said first film-thickness monitoring pattern, a second pattern group including plural patterns is formed on said surface so as to surround said second film-thickness monitoring pattern, said first film-thickness monitoring pattern and said first pattern group having a third area occupation ratio on said surface, while said second film-thickness monitoring pattern and said second pattern group having a fourth area occupation ratio on said surface, wherein said third area occupation ratio is different from said fourth area occupation ratio, wherein said third area occupation ratio is set substantially equal to said first area occupation ratio, and wherein said fourth area occupation ratio is set substantially equal to said second area occupation ratio.