Patent ID: 7565594

Claim:
A method for detecting an error in a block of decoded bits at a turbo decoder, the method comprising: comparing, on a bit-by-bit basis, a first set of decoded systematic bit values for a first constituent code with a corresponding second set of decoded systematic bit values for a second constituent code, each of the first and second sets of decoded systematic bit values being generated during a first iteration of a turbo decoding iteration cycle, and each decoded systematic bit value in the first and second sets of decoded systematic bit values being represented by a sign of a log likelihood ratio, wherein the comparing step includes, comparing signs of the log likelihood ratios for corresponding bits of the first and second sets of decoded systematic bit values; and determining, from the results of the bit-by-bit comparisons of the signs of the log likelihood ratios, whether or not there is an error in the decoded systematic bit values in the block of decoded bits determined at the end of the first turbo decoding cycle.