Patent ID: 7813015

Claim:
An image processor connectable to an imaging unit, the image processor comprising: an image processing circuit configured to receive image data from the imaging unit and perform a predetermined image process on the image data to generate processed data; a one-dimensional compression circuit configured to receive the processed data from the image processing circuit, perform a one-dimensional compression process on the processed data to generate one-dimension compression data; an output circuit configured to receive the one-dimension compression data from the one-dimensional compression circuit and output the one-dimension compression data to an image memory via a base band LSI connected to the image processor; a one-dimensional decompression circuit configured to receive the one-dimension compression data from the image memory via the base band LSI, perform a one-dimensional decompression process corresponding to the one-dimensional compression process on the received one-dimension compression data to generate one-dimension decompression data, and output the one-dimension decompression data to the image memory via the base band LSI; and a two-dimensional compression circuit configured to receive the one-dimension decompression data from the image memory via the base band LSI, perform a two-dimensional compression process on the one-dimension decompression data input from the image memory via the base band LSI to generate two-dimension compression data, and output the two-dimension compression data to the image memory via the base band LSI.