Patent ID: 7471748

Claim:
A communication semiconductor integrated circuit comprising a demodulating circuit for demodulating I signals which are components in phase with a fundamental wave and Q signals which are components orthogonal with the fundamental wave thereto by synthesizing two types of orthogonal signals and reception signals differing in phase by 90 degrees from each other, a gain-controllable first amplifier circuit for amplifying to a desired level the I signals demodulated by the demodulating circuit, and a gain-controllable second amplifier circuit for amplifying to a desired level the Q signals demodulated by said demodulating circuit, wherein each of said first and second amplifier circuits includes: a plurality of low-pass filters and a plurality of variable gain amplifiers alternately connected to each other in multiple stages, wherein the variable gain amplifiers at a prior stage are enabled by the supply of offset cancellation values to execute D.C. offset correction, and the variable gain amplifiers at a later stage are enabled to detect D.C. offsets and to execute D.C. offset correction, and wherein said variable gain amplifiers include a plurality of fixed gain amplifiers differing in gain from one another and switching means for selecting one out of these fixed gain amplifiers and supplying I signals or Q signals to be amplified.