Patent ID: 8473822

Claim:
An apparatus, comprising: a metric generator that is operative to process a plurality of symbols of a signal having information bits encoded therein thereby generating a plurality of symbol metrics; a symbol metric decomposition module that is operative to decompose the plurality of symbol metrics to a plurality of bit metrics, such that each symbol metric of the plurality of symbol metrics is decomposed into a corresponding plurality of bit metrics; a decoder module that is operative to process, on a bit level basis, the corresponding plurality of bit metrics thereby generating a corresponding plurality of extrinsic values, such that each extrinsic value of the plurality of extrinsic values corresponds to one respective bit metric of the plurality of bit metrics; and a bit metric update module that is operative to update each bit metric of the plurality of bit metrics using a corresponding extrinsic value of the plurality of extrinsic values thereby generating a corresponding, updated plurality of bit metrics, such that each respective bit metric and corresponding extrinsic value corresponds to one respective bit of a plurality of bits within one respective symbol of the plurality of symbols; and wherein: the decoder module is operative to process, on a bit level basis, the corresponding, updated plurality of bit metrics thereby generating a corresponding, updated plurality of extrinsic values for use in making estimates of the information bits.