Patent ID: 8009077

Claim:
An analog-to-digital converter circuit, comprising: an integrator for receiving an input signal to be converted to a digital representation of the input signal; a reference switched-capacitor circuit including a first switch for selectively coupling a first terminal of a reference capacitor to a summing node input of the integrator and a second switch for selectively coupling a second terminal of the reference capacitor to at least one reference voltage source, wherein the first switch and the second switch are operated by a switching clock; a quantizer for generating a digital representation of the magnitude of the voltage of the output of the integrator; and a control circuit for controlling switching of the reference switched-capacitor circuit such that the first switch selectively couples the first terminal of the reference capacitor and the summing node input of the integrator depending on a first state of an output of the quantizer, whereby injection of thermal noise is reduced by leaving the first terminal of the reference capacitor coupled to the summing node input of the integrator during an entire quantization period of the quantizer.