Patent ID: 7674681

Claim:
A method for manufacturing a semiconductor device, the method comprising the steps of: doping a semiconductor substrate with first conductive-type ions to form first and second well areas; forming a collector area by implanting further first conductive-type ions into the second well area; forming a third well area by implanting second conductive-type ions into the first well area, and forming a base area by implanting further second conductive-type ions into the third well area at a high density; exposing the third well area by patterning the semiconductor substrate; forming a spacer along a sidewall of the patterned, exposed semiconductor substrate; forming a conductive layer doped with first-conductive type ions in contact with the third well area and separated from the base area by the spacer; patterning the conductive layer to form an emitter electrode; heating the semiconductor substrate to diffuse the first conductive-type ions from the emitter electrode to form an emitter area in the third well, wherein the emitter area is separated from the base area by a predetermined distance; forming a dielectric layer over the semiconductor substrate; forming contact holes in the dielectric layer exposing the emitter electrode, and the base and collector areas of the semiconductor substrate; forming first, second, and third contact plugs in contact with the emitter electrode, the base area of the semiconductor substrate, and the collector area of the semiconductor substrate, respectively.