Patent ID: 7074645

Claim:
A fabrication method of a semiconductor package with a heat sink, comprising the steps of: preparing a chip carrier module plate formed of a plurality of chip carriers each having an upper surface and an opposite lower surface; mounting at least one chip on the upper surface of each of the chip carriers and electrically connecting the chip to the corresponding chip carrier; preparing a heat sink module plate formed of a plurality of heat sinks and having a first surface and an opposite second surface, attaching the first surface of the heat sink module plate to the chips, and forming an interface layer over the second surface of the heat sink module plate, wherein the interface layer is made of a material having adhesion with a molding compound smaller than adhesion between the heat sinks and the molding compound; forming an encapsulant by the molding compound for encapsulating the chip, the heat sink module plate, and the chip carrier module plate; implanting a plurality of solder balls on the lower surface of the chip carrier module plate; performing a singulation process to cut through the interface layer, the heat sink module plate, the encapsulant, and the chip carrier module plate to separate apart the plurality of heat sinks and chip carriers so as to form a plurality of the semiconductor packages; and removing the molding compound left on the interface layer by heating due to the relatively smaller adhesion between the interface layer and the molding compound and a difference in thermal expansion coefficient between the interface layer and the molding compound, so as to make the semiconductor packages free of flash of the molding compound.