Patent ID: 8176388

Claim:
A method for using a data processing system comprising a memory, a first functional block and a second functional block, the memory comprising a plurality of addressable storage spaces, a first data port in communication with the first functional block, and a second data port in communication with the second functional block, the method comprising: sending a first read request for a first address of the memory for a logic operation performed by the first functional block; sending a second read request for a second address of the memory for soft error scrubbing performed by the second functional block; comparing the first address and the second address; outputting first data stored in the first address and second data stored in second address to the first functional block and the second functional block, respectively, via the first port and the second port, respectively, when the first address and the second address are different; performing the soft error scrubbing on the second data by operating the second functional block; and sending a third read request for a third address of the memory for the soft error scrubbing when the second address is identical to the first address.