Patent ID: 6885326

Claim:
An adaptive sigma delta modulator comprising: a) an input stage that produces a difference signal representing the difference between an analog input signal x(n) and an analog feedback signal z(n), the amplitude of the analog input signal x(n) within a first range [−a, +a]; b) an accumulator stage that produces an accumulated signal that is a function of an accumulation of the difference signal, the accumulator stage transforming the accumulation of the difference signal so as to increase average magnitude while ensuring instantaneous magnitude does not exceed a predetermined value; c) a quantization stage that produces a quantized digital signal y 0 (n) representing the accumulated signal; d) an adaptation stage, that based on the quantized digital signal y 0 (n) produces a digital output signal z 0 (n); and e) a digital-to-analog converter stage that converts the digital output signal z 0 (n) to the analog feedback signal z(n).