Patent ID: 7173683

Claim:
A thin film transistor (TFT) panel, comprising; an insulating substrate; a gate wire formed on the substrate and comprising a gate line, a gate electrode and a gate pad; a supplementary gate wire formed on the substrate sequentially with and corresponding substantially to the gate wire; a gate insulating layer covering the gate wire and the supplemental gate wire; a semiconductor layer formed on said gate insulating layer; a data wire formed on the semiconductor layer and comprising a data line, a source electrode and a drain electrode; a supplementary data wire formed on the substrate sequentially with and corresponding substantially to the data wire; a passivation layer formed on the data wire, the supplementary data wire, the supplementary gate wire and the gate wire and having a first contact hole extended to the gate pad and a second contact hole extended to the drain electrode; and, a transparent conductive layer formed on the passivation layer and connected to the gate pad through the first contact hole and the data wire through the second contact hole, wherein at least one of the gate wire and the data wire comprises a metal layer and a metal nitride layer, the metal of the metal nitride layer being the same as that of the metal layer and substantially inert to an etchant used for etching the transparent layer so as to prevent the at least one gate pad and data wire from being eroded by the etchant, and the transparent conductive layer directly contacts an upper surface of the metal nitride layer in the first and the second holes.