Patent ID: 7183838

Claim:
A semiconductor device comprising: a reference voltage generation circuit which includes a negative feedback circuit, and generates a reference voltage controlled by an output signal from the negative feedback circuit; an amplifier circuit which amplifies the output signal from the negative feedback circuit during at least one of a leading edge of an external power supply voltage and input time of an external signal; and a voltage dropping circuit which drops the external power supply voltage in accordance with the reference voltage output from the reference voltage generation circuit to generate an internal power supply voltage, wherein the reference voltage generation circuit includes a current mirror circuit, and the negative feedback circuit includes a first differential amplifier circuit where an output from the current mirror circuit is supplied to an input terminal, wherein the amplifier circuit includes a second differential amplifier circuit whose input terminal is connected to the input terminal of the first differential amplifier circuit in parallel, and the second differential amplifier circuit operates only for a predetermined time during at least one of the leading edge of the external power supply voltage and the input time of the external signal, and does not operate after the predetermined time, and wherein an output from the second differential amplifier circuit is supplied to an output from the first differential amplifier circuit via a MOS transistor.