Patent ID: 8115233

Claim:
A method for manufacture of a compound field effect transistor comprising the steps of: providing first and second semiconductor layers each semiconductor layer having an electrically conducting layer therein; providing an ohmic contact layer on each of the semiconductor layers; providing a source and a drain on each ohmic contact layer; providing a mask on the ohmic contact layers; providing a pattern on the mask, the pattern comprising a first via extending through the mask to the ohmic contact layer between the source and the drain of a first transistor and a second via extending through the mask to the ohmic contact layer between the source and drain of a second transistor; etching through the ohmic contact layer to the semiconductor layer; depositing first and second gates on the ohmic contact layers through the vias, the vias being arranged such that the first and second gates have different gate lengths; and etching recesses of the same depth in the semiconductor layers through the first and second vias prior to depositing the gates through the vias.