Patent ID: 7858443

Claim:
A method of manufacturing a leadless integrated circuit (IC) package, comprising: removing portions of a leadframe strip to form recesses defining areas for a die attach pad and a plurality of electrical contacts; mounting an IC chip in the die attach pad area; forming electrical connections between the electrical contact areas and the IC chip; covering the IC chip, the die attach pad area, and the electrical contact areas, and the electrical connections with a molding layer, the molding layer filling the recesses; forming an etch-resist layer over the electrical contact areas on a bottom surface of the leadframe strip; selectively etching the bottom surface of the leadframe strip using the etch-resist layer as an etching mask, thereby forming the electrical contacts and the die attach pad as separate components; wherein the selective etching of the bottom surface of the leadframe strip removes at least a portion of the die attach pad such that a bottom portion of the die attach pad extends away from a bottom surface of the molding layer by a smaller distance compared with bottom portions of one or more of the electrical contacts.