Patent ID: 7539801

Claim:
A method of operating a computing device comprising a peripheral bus having at least 2n data lines; a first expansion slot for receiving peripheral cards comprising 2n data line interconnects, and operable in a first mode using n of said 2n data lines, and in a second mode using 2n of said 2n data lines, said first expansion slot comprising a first set of n connectors, interconnected with n of said 2n data lines; and a second set of n connectors; a second expansion slot for receiving peripheral cards comprising 2n data line interconnects, and operable in a first mode using n of said 2n data lines, and in a second mode using 2n of said 2n data lines, said second expansion slot comprising a first set of n connectors, interconnected with n further ones of said 2n data lines; and a second set of n connectors, wherein each of the second set of n connectors of the first expansion slot is interconnected with one of the second set of n connectors of said second expansion slot; said method comprising: disconnecting said second set of n connectors of said first expansion slot from said second set of n connectors of said second expansion slot; and initializing peripheral cards in said first and second expansion slots, to each operate in its first mode to use n of said 2n data lines.