Patent ID: 7170158

Claim:
A circuit board having wiring patterns, comprising: a first surface including: a first package area having a first chip mounting area to which a first chip is attached, and a first bonding area to which the first chip is electrically connected; and a first peripheral area having a runner area along which a molding compound is injected, and a first gate hole connected to the runner area, and a second surface including: a second package area having a second chip mounting area to which a second chip is attached, and a second bonding area to which the second chip is electrically connected; and a second peripheral area having external connection patterns electrically connected to the bonding areas through the wiring patterns, and a second gate hole, wherein the first gate hole and the second gate hole are through holes and co-located to form the same hole, the first gate hole and the second gate hole providing a path for a molding compound, used to form a package body within the first and second package areas, respectively, and the first gate hole and the second gate hole are formed only within a first and a second molding area.