Patent ID: 7910466

Claim:
A method of manufacturing a high-voltage semiconductor device, the high-voltage semiconductor device being formed together with a low-voltage semiconductor device in a single wafer, the method comprising the steps of: preparing a semiconductor substrate; forming device isolation layers in the semiconductor substrate; forming a well region of the high-voltage semiconductor device by performing a first ion implantation process on the semiconductor substrate using an optical mask having both a first pattern for forming a well region of the low-voltage semiconductor device and a second pattern for forming the well region of the high-voltage semiconductor device; forming drift regions in the well regions by performing a second ion implantation process on the semiconductor substrate, the second ion implantation process comprising a primary ion implantation process of implanting N-type dopants at high energy, and a secondary ion implantation process of implanting N-type dopants at intermediate energy; and annealing the semiconductor substrate.