Patent ID: 7647567

Claim:
A method for scheduling a plurality of Term Rewriting System (TRS) rules in a hardware design system, comprising: providing a preference order for a set of three or more conflicting TRS rules of the plurality of TRS rules, wherein the preference order indicates an order for the scheduling of each rule in the set of three or more conflicting TRS rules such that a preferred rule in the set of three or more conflicting TRS rules is scheduled to execute when in conflict with a less-preferred rule in the set of three or more conflicting TRS rules scheduling for execution on a state of the hardware design system, multiple TRS rules from the set of three or more conflicting TRS rules, such that a most preferred rule in the preference order is scheduled to execute before other less-preferred TRS rules in the set of three or more conflicting TRS rules; and wherein each of the less-preferred TRS rules in the set are scheduled to execute in decreasing preference until each conflicting rule has been scheduled.