Patent ID: 8112468

Claim:
An electronic device comprising: a memory device for storing configuration data; and an integrated circuit (“IC”), the IC comprising: a reconfigurable logic circuit; a signal generator for generating first and second selection signals based on a value of a particular number of bits of a multiplier of a multiplication operation; a set of configurable circuits for supplying a plurality of inputs to the reconfigurable logic circuit; first and second sets of configuration storage cells for storing first and second configuration data sets, wherein the first configuration data set is for configuring the reconfigurable logic circuit to perform an addition operation and the second configuration data set is for configuring the reconfigurable logic circuit to perform a subtraction operation; third, fourth and fifth sets of configuration storage cells for storing third, fourth and fifth configuration data sets, wherein the third, fourth and fifth configuration data sets are for configuring the set of configurable circuits to supply to the reconfigurable logic circuit either a value of a multiplicand, twice the value of the multiplicand, or a value of 0; a first selection circuit for supplying one of the first and second configuration data sets to the reconfigurable logic circuit based on the first selection signal, wherein, based on the configuration data set supplied to the reconfigurable logic circuit, the reconfigurable logic circuit performs either the addition operation or the subtraction operation in order to generate a partial result of the multiplication operation; and a second selection circuit for selecting, based on the second selection signal, one of the third, fourth and fifth configuration data sets for the set of configurable circuits.