Patent ID: 7353157

Claim:
A computer-implemented method, comprising: creating one or more data structures that together store characteristics of a plurality of active branches B active that make up a graph of nodes and branches that form a circuit, wherein B active consists of a set B L of zero or more inductive branches, each having a non-zero inductive component but neither a capacitive component nor a variable switch state; a set B C of zero or more capacitive branches, each having a non-zero capacitive component but neither an inductive component nor a variable switch state; and a set B A of additional branches, each having neither an inductive component, nor a capacitive component; partitioning B active into a first branch set B tree active and a second branch set B link active , where the branches in B tree active form a spanning tree over B active , giving priority in said partitioning to branches not in B L over branches in B L ; sub-partitioning B link active into a third branch set B link L and a fourth branch set B link CA , where B link L =B link active ∩B L ; identifying a fifth branch set B CA as the union of B link CA , B C ∩B tree active , and those branches in B tree active that form a closed graph when combined with B link CA ; partitioning B CA into a sixth branch set {tilde over (B)} tree CA and a seventh branch set {tilde over (B)} link CA , where the branches in {tilde over (B)} tree CA form a spanning tree over B CA , giving priority in said partitioning to branches in B C over branches not in B C ; identifying an eight branch set B tree C ={tilde over (B)} tree CA ∩B C ; selecting a set of state variables comprising: for each branch of B link L , either the inductor current or inductor flux, and for each branch of B tree C , either the capacitor voltage or capacitor charge; and simulating a plurality of states of the circuit using the set of state variables.