Patent ID: 8193563

Claim:
A structure, comprising: a dielectric isolation in a semiconductor substrate, said dielectric isolation extending in a direction perpendicular to a top surface of said substrate into said substrate a first distance, said dielectric isolation surrounding a first region and a second region of said substrate, a top surface of said dielectric isolation coplanar with said top surface of said substrate; a dielectric region in said second region of said substrate; said dielectric region extending in said perpendicular direction into said substrate a second distance, said first distance greater than said second distance; a first device in said first region and a second device in said second region, said first device different from said second device, said dielectric region isolating a first element of said second device from a second element of said second device; a field effect transistor, bipolar transistor or heterojunction bipolar transistor in said first region; and a lateral double diffused metal-oxide-silicon (LDMOS) device in said second region, said dielectric region extending from a drain of said LDMOS device to under a gate of said LDMOS device.