Patent ID: 6859380

Claim:
A ferroelectric memory including at least one memory cell for storing data, the memory cell having a ferroelectric capacitor and a selection transistor, the ferroelectric memory also including a bit line, a word line, and a plate line, the ferroelectric capacitor having a first electrode and a second electrode, the second electrode being connected to the plate line, the selection transistor having a control electrode connected to the word line, a first main electrode connected to the first electrode of the ferroelectric capacitor, and a second main electrode connected to the bit line, the ferroelectric memory also including: a sense amplifier having a first terminal and a second terminal, the first terminal being connected to the bit line; a plate line driver having an output terminal connected to the plate line, for selectively supplying a ground potential, a first voltage differing from the ground potential, and a second voltage higher than the first voltage to the plate line; a switch connected to the bit line; a first pre-charge circuit connected to the switch, for selectively supplying the ground potential and the first voltage through the switch to the bit line; and a second pre-charge circuit connected to the second terminal of the sense amplifier, for supplying the first voltage to the sense amplifier; wherein to read data stored in the memory cell, the plate line driver supplies the first voltage, then the second voltage, then the ground potential, then the first potential to the plate line, and the sense amplifier compares a resulting potential on the bit line with the first voltage.