Patent ID: 8014295

Claim:
An apparatus for processing received packets, comprising: a plurality of packet processors a session active checker to distribute received packets among the plurality of packet processors a plurality of first-in first-out (FIFO) queues to store packets sent from the session active checker to a corresponding one of the plurality of packet processors, each FIFO queue having a predetermined number of slots to store packets wherein the session active checker comprises: a session active memory adapted to store a plurality of session identifiers corresponding to the slots in the plurality of FIFO queues logic that extracts a session identifier from a received packet to identify a session associated with the received packet a comparator that compares the session identifier extracted from the received packet with the session identifiers stored in the session active memory to determine if any other packet belonging to the identified session is currently stored in any of the plurality of FIFO queues logic that sends the received packet to a selected packet processor of the plurality of packet processors in the case that no other packets belonging to the identified session are currently stored in the plurality of FIFO queues, wherein in the case that the session active checker determines that another packet belonging to the identified session is currently stored in the plurality of FIFO queues, the session active checker waits until the processing of the other packet is complete before sending the received packet to the selected packet processor.