Patent ID: 7528544

Claim:
A flat panel display comprising: a display region formed on a substrate, the display region comprising a plurality of sub-pixels, each sub-pixel including at least one thin film transistor having a gate electrode, a source electrode and a drain electrode and a self-emission device including a first electrode and a second electrode, and displaying a predetermined image; a covering member to cover at least the display region; a sealing member comprising a sealing material coated outside and around at least the display region, by which edges of the covering member are bonded to the substrate to seal at least the display region; a terminal region installed on the substrate outside the sealing member; a plurality of VDD lines traversing the display region, each VDD line being connected to at least one of the thin film transistors; and a driving power supply line to supply a driving potential power and/or a source current to the plurality of VDD lines, the driving power supply line comprising at least two conductive layers and being arranged so that at least a part of each of the at least two conductive layers of the driving power supply line is positioned between the sealing member and the substrate.