Patent ID: 8659933

Claim:
Method for operating a memory comprising: applying a read voltage to the memory, wherein the memory comprising a plurality of cells including at least a first cell, a second cell, a third cell, and a fourth cell, wherein the first cell and the second cell are coupled to a first top electrode, wherein the third cell and the fourth cell are coupled to a second top electrode, wherein the first cell and the third cell are coupled to a first bottom electrode, wherein the second cell and the fourth cell are coupled to a second bottom electrode, wherein each cell of the plurality of cells comprises a resistive switching material stack comprising a first resistive switching material overlying a second resistive switching material, wherein the first resistive switching material is characterized by a first voltage associated with switching from a first resistance state to a second resistance state, wherein the second resistive switching material is characterized by a second voltage associated with switching from a third resistance state to a fourth resistance state, wherein a second voltage is less than the first voltage, wherein the read voltage exceeds the second voltage, and wherein applying the read voltage to the memory comprises applying the read voltage to the first top electrode while grounding the first bottom electrode to thereby cause the second resistive switching material of the first cell to be in the fourth resistance; and detecting a read current across the first cell in response to the read voltage.