Patent ID: 7721023

Claim:
A method, in a data processing system, for ordering execution of input/output (I/O) operations, comprising: receiving an I/O operation request via an I/O interface identifying a current I/O operation to be executed; retrieving, from an address translation data structure, a first ordering identifier associated with a page of memory targeted by the I/O operation request, wherein the first ordering identifier identifies a relaxed ordering attribute and wherein the relaxed ordering attribute is a one bit value that is set to at least one of a 0 for a default ordering or a 1 for a relaxed ordering; determining an ordering of execution of the current I/O operation based on the first ordering identifier, wherein determining an ordering of execution of the I/O operation based on the first ordering identifier and the second ordering identifier includes selecting a weaker of the first ordering identifier and the second ordering identifier; and executing the current I/O operation based on the determined ordering of execution of the current I/O operation, wherein the I/O operation request includes a second ordering identifier, wherein the second ordering identifier identifies storage ordering bits, wherein the storage ordering bits are at least a two bit value, and wherein determining an ordering of execution of the current I/O operation includes determining the ordering of the execution of the current I/O based on both the first ordering identifier and the second ordering identifier.