Patent ID: 7901951

Claim:
A method for fabricating a thin film transistor (TFT) array substrate, the method comprising: providing an insulating substrate; forming a common electrode on the insulating substrate and a repair structure on the insulating substrate by a first photolithograph process, the repair structure having a plurality of gaps; forming a common line, a gate line, and a gate electrode on the insulating substrate by a second photolithograph process, the gate electrode being connected to the gate line; forming a gate insulating layer and a semiconductor layer on the gate insulating layer by a third photolithograph process, the semiconductor layer being above the gate electrode; and forming a data line and source/drain electrodes on the gate insulating layer by a fourth photolithograph process, the data line being above the repair structure and intersecting with the gate line and the common line, wherein the gaps of the repair structure each correspond to an overlap of the gate line and the repair line, or an overlap of the common line and repair line.