Patent ID: 7271031

Claim:
A method of manufacturing an integrated circuit package, comprising: producing a plurality of electrically-conductive paths in concentric patterns on a first surface of a substrate, at least one of the plurality of electrically-conductive paths substantially covering a width of the first surface of the substrate, the process steps to produce the plurality of electrically-conductive paths including: (i) depositing a conductive metal onto the substrate; (ii) patterning and etching the conductive metal to produce the plurality of electrically-conductive paths; (iii) depositing a passivation layer over the plurality of electrically-conductive paths and any exposed areas of the first surface of the substrate; producing a first plurality of bonding pads electrically coupled to each of the electrically-conductive paths, the first plurality of bonding pads coupled to one of the electrically-conductive paths being electrically isolated from bonding pads located on any other electrically-conductive path, the process steps to produce the first plurality of bonding pads including: (iv) coating the passivation layer with photoresist; (v) exposing, developing, and etching the photoresist in a pattern to locate the first plurality of bonding pads; (vi) etching the exposed passivation layer to expose a portion of the conductive metal, thereby forming bonding pads; mounting the substrate into a leadframe package, the leadframe package having a plurality of metal leads, the plurality of metal leads each having a first end and a second end; and coupling the first end of at least a portion of the plurality of the metal leads to be in electrical communication with at least a portion of the bonding pads.