Patent ID: 8338248

Claim:
A semiconductor element comprising: a semiconductor region of first conductivity type; a light-receiving surface buried region of second conductivity type buried in an upper portion of the semiconductor region, implementing a photodiode together with the semiconductor region; a charge accumulation region of second conductivity type buried in an upper portion of the semiconductor region, continuously to the light-receiving surface buried region, establishing a deeper potential well depth than the light-receiving surface buried region, defining depth direction of potential as a field direction along which charges generated in the photodiode are transported; a charge read-out region configured to read out the charges accumulated in the charge accumulation region; an exhaust-drain region buried in an upper portion of the semiconductor region, configured to extract the charges from the light-receiving surface buried region; a first potential control means configured to modulate: extraction of the charges from the light-receiving surface buried region toward a direction to the exhaust-drain region direction; and transferring of the charges from the light-receiving surface buried region to the charge accumulation region direction, only by controlling a potential of a channel formed in an upper portion of the semiconductor region between the light-receiving surface buried region and the exhaust-drain region; and a second potential control means configured to control a potential of a channel formed in an upper portion of the semiconductor region between the charge accumulation region and the charge read-out region, transferring the charges from the charge accumulation region to the charge read-out region.