Patent ID: 7982581

Claim:
An integrated circuit, comprising: first and second input terminals; a wiper terminal; a first array of resistors connected in series, the first array of resistors having an output; a plurality of first switching devices connecting the first input terminal to selected tap points of the first array of resistors; a second array of resistors connected in series, the second array of resistors having an output; a plurality of second switching devices connecting the second input terminal to selected tap points of the second array of resistors; a third array of resistors connected in series, the third array being connected in series with the first array of resistors, the third array of resistors having an input and output; a plurality of third switching devices connecting selected tap points of the third array of resistors to the wiper terminal; a fourth array of resistors connected in series, the fourth array being connected in series with the second array of resistors, the fourth array of resistors having an input and output; a plurality of fourth switching devices connecting selected tap points of the fourth array of resistors to the wiper terminal; wherein the third array of resistors is connected to the fourth array of resistors only at the outputs of the third and fourth arrays of resistors, the outputs of the third and fourth arrays of resistors being connected to the wiper terminal.