Patent ID: 7670952

Claim:
A method of manufacturing a semiconductor device, comprising: forming a metal silicide gate electrode on a semiconductor substrate surface while a sacrificial layer covers source and drain regions of said semiconductor device; removing said sacrificial layer, wherein an oxide layer is formed on said metal silicide gate electrode and said source and drains regions as a byproduct of said removing; exposing said metal silicide gate electrode and said substrate surface to a cleaning process to remove said oxide layer, including: a dry plasma etch using an anhydrous fluoride-containing feed gas; and a thermal sublimation configured to leave said metal silicide gate electrode substantially unaltered; depositing a metal layer on source and drain regions of said substrate surface; and annealing said metal layer and said source and drain regions of said substrate surface to form metal silicide source and drain contacts; said feed gas further including a sublimable base in the form of an anion that is complexed with at least one reaction product of the dry plasma etch, and then sublimed in the thermal sublimation prior to depositing the metal layer on the source and drain regions; wherein said feed gas further includes a sublimable base of pyridine or a mixture of ammonia and pyridine.