Patent ID: 7211862

Claim:
A semiconductor device including a trench gate type MISFET, the device comprising; a semiconductor substrate; a drain electrode of the trench gate type MISFET formed on a back surface of the semiconductor substrate; a first semiconductor layer formed over a main surface of the semiconductor substrate; a plurality of channel layers of the trench gate type MISFET, each formed over the first semiconductor layer; a plurality of source regions of the trench gate type MISFET formed over the channel layers, respectively; a plurality of gate trenches of the trench gate type MISFET formed between coplanar, adjacent source regions respectively and reaching the first semiconductor layer; a plurality of gate insulating films of the trench gate type MISFET formed in the gate trenches respectively; a plurality of gate electrodes of the trench gate type MISFET formed on the gate insulating films, respectively; a first insulating film formed over the source regions and gate electrodes; a plurality of contact grooves each formed in the first insulating film between coplanar, adjacent gate electrodes and in contact with the channel layer; a plurality of semiconductive regions formed under bottoms of the contact grooves respectively, and in contact with the bottom of the contact grooves; a source electrode formed in the contact grooves and electrically connected with the semiconductive regions, wherein the semiconductor substrate, first semiconductor layer and source regions have a first conduction type; wherein the channel layer and semiconductive regions have a second conduction type opposite to the first conduction type; wherein the semiconductive regions have an impurity concentration higher than the channel layer; wherein bottoms of the semiconductive regions are closer to the drain electrode, compared with a bottom of the channel layer.