Patent ID: 8232180

Claim:
A manufacturing method of a semiconductor device in which first and second active regions are divided by an element isolation structure formed in an element isolation region on a semiconductor substrate, and first and second conductivity type elements are formed in said first and second active regions, respectively, said element isolation region comprising a first element isolation region including regions adjacent to a pair of opposed ends of said second active region, and a second element isolation region other than said first element isolation region, said method comprising: forming a first trench in said second element isolation region on said semiconductor substrate, and filling up said first trench with a first insulating material that gives a tensile stress to each of said first and second active regions; and forming a second trench in said first element isolation region on said semiconductor substrate, and filling up said second trench with a second insulating material that gives a compressive stress to said second active region, wherein said first insulating material is a different material from said second insulating material, wherein said second insulating material is provided only in said second trench, wherein, in said first active region, at least three of four sides are surrounded by said second element isolation region, and wherein, in said second active region, a pair of opposed sides is surrounded by said first element isolation region and the other pair of opposed sides is surrounded by said second element isolation region.