Patent ID: 7064060

Claim:
A method of manufacturing a semiconductor device comprising: applying an insulating film composition containing an insulating film precursor and a pore-generating material onto a semiconductor substrate; first heat treating said insulating film composition at a first temperature, not exceeding 350° C., in an inert-gas ambient to polymerize said insulating film precursor and form a non-porous film; forming a chemical mechanical polishing (CMP) stopper film on said non-porous insulating film; forming a resist pattern on said CMP stopper film; dry etching said CMP stopper film and said non-porous insulating film using said resist pattern as a mask to form a trench in said non-porous insulating film; removing said resist pattern by ashing; cleaning said semiconductor substrate after the ashing; after the cleaning, second heat treating said non-porous insulating film at a second temperature that is no higher than the first temperature in an oxidizing-gas ambient, removing said pore-generating material from said non-porous insulating film, thereby forming a porous insulating film; forming a barrier metal film on said CMP stopper film and on inner surfaces of said trench; forming a copper layer on said barrier metal film, filling said trench; and polishing said copper layer and said barrier metal film by CMP, thereby forming a copper wiring.