Patent ID: 7288962

Claim:
A level shifting multiplexing circuit for connecting a two conductor full duplex bus referenced to a first voltage supply to a single conductor bidirectional half duplex bus referenced to a second voltage supply, the circuit comprising: a first switching circuit configured to connect between a reception conductor of a two conductor full duplex bus and a single conductor bidirectional bus and having a first switching voltage threshold resulting in a low logic level at the reception conductor when a voltage at a first gate connected to the single conductor bus exceeds the first switching voltage threshold; a second switching circuit configured to connect between a transmission conductor of the two conductor full duplex bus and the single conductor bidirectional bus, the second switching circuit configured to present at the first gate: a high voltage exceeding the first switching voltage threshold of the first switching circuit when a transmission conductor voltage on the transmission conductor is less than a second switching voltage threshold of the second switching circuit, unless a low logic signal is received on the single conductor bus; and a low voltage less than the switching voltage threshold of the first switching circuit when the transmission conductor voltage is greater than the second switching voltage threshold, unless a high logic signal is received on the single conductor bus.