Patent ID: 6972483

Claim:
A semiconductor package comprising: a substrate formed at a center thereof with a window, and formed on one side thereof with a first wiring including a first bond finger and a first ball land and a second wiring including a second bond finger and a second ball land; a semiconductor chip attached to an other side of the substrate in a face-down type through an adhesive tape, and provided at a center thereof with a plurality of bonding pads; a heat-emission metal pattern formed at a surface of the semiconductor chip, in which the bonding pads are formed, such that the bonding pads are exposed, and formed such that a predetermined portion of the bonding pad adjacent to the heat-emission metal pattern is exposed through a window of the substrate; a first metal wire extending by passing through the window of the substrate in order to electrically connect the bonding pad of the semiconductor chip to a first bond finger of the first wiring of the substrate; a second metal wire extending by passing through the window of the substrate in order to electrically connect the heat-emission metal pattern to a second bond finger of the second wiring; a sealing member for sealing the other side of the substrate including the semiconductor chip and the window of the substrate including the first and second metal wires; a first solder ball attached to a first ball land of the first wiring of the substrate in order to allow the semiconductor chip to be mounted on a PCB; and a second solder ball attached to an upper surface of the second ball land of the second wiring of the substrate in order to emit heat.