Patent ID: 7704882

Claim:
A method of forming fine patterns of a semiconductor device, the method comprising: forming a first insulating layer on a substrate; removing a portion of the first insulating layer so as to form a first insulating layer pattern and an opening portion; forming a spacer pattern on the sides of the first insulating layer pattern on the substrate; forming a second insulating layer covering the first insulating layer pattern and the spacer pattern and filling the opening portion; removing a portion of the second insulating layer so as to expose a top surface of the first insulating layer pattern and a top surface of the spacer pattern so as to form a second insulating layer pattern, the first and the second insulating layer patterns having approximately equal thickness; exposing sides of the spacer pattern by removing a portion of the first and the second insulating layer patterns so as to form a pair of recesses; and filling the pair of recesses with a conductive material.