Patent ID: 7974131

Claim:
A nonvolatile memory comprising: a plurality of memory cell groups each of which is arranged for a word representing an unit data amount processed through either one of writing once and reading once, includes a plurality of memory cells for storing the word of data, and is assigned with an address; a plurality of dummy cell groups each of which is arranged for each of the plurality of memory cell groups, group by group, includes a plurality of dummy cells having respective ranks of rewriting lifetimes, the respective ranks being different from each other, and is assigned with the same address as that of a corresponding memory cell group of the plurality of memory cell groups; a writing circuit which, when writing data into a memory cell included in a memory cell group having a given address of the plurality of memory cell groups, concurrently writes the data into a dummy cell included in a dummy cell grow having the same address as the given address; and a lifetime recognizing circuit which recognizes an estimated number of past writing times to a memory cell group of the plurality of memory cell groups arranged for a corresponding dummy cell group of the plurality of dummy cell groups by determining whether each of the plurality of dummy cells included in the corresponding dummy cell group can be successfully accessed.