Patent ID: 7218666

Claim:
A method comprising: providing at least one spread sequence portion; providing a cyclic redundancy; and forming a transmitted sequence based on an arrangement of the spread sequence portion and the cyclic redundancy, wherein the spread sequence portion comprises a baseband chip-level sequence computed according to: s ⁡ [ i , b ] = ∑ u = 1 U ⁢ A u ⁢ ∑ k = 0 K - 1 ⁢ d u ⁡ [ k , b ] ⁢ c ⁡ [ i , b ] ⁢ W u ⁡ [ i - Nk ] , ⁢ 0 ≤ i ≤ NK - 1 wherein i is an integer indicating the chip number, b is an integer indicating the data block, d u [k,b] is the k th data symbol on channelization code channel u for the b th data block, c[i,b] is the value of the long/scrambling code sequence on chip i of data block b, W u [i] is the length N channelization sequence for the u th channelization code channel, U denotes the number of active channelization code channels, K denotes the number of successive channelization-code intervals, and the factor A u denotes the power control gain factor for the u th channelization code channel.