Patent ID: 7836328

Claim:
A method of handling an error in a split transaction issued over a host bus of a computer system, the method comprising: at an input/output device of a computer system: assigning a first operation identifier to a first input/output operation, wherein the first operation identifier is one of a limited number of multiple reusable operation identifiers used to identify input/output operations; and issuing the first input/output operation across an interface link coupling the input/output device to host bus logic coupled to the host bus; at the host bus logic: issuing a plurality of split transactions over the host bus to accomplish the input/output operation; detecting an error occurring during one of the split transactions; and notifying the input/output device of the error; and at the input/output device, preventing reuse of the first operation identifier; wherein said reusable operation identifiers are used only to identify: (i) read operations for which the host bus logic is configured to issue split read transactions; and (ii) write operations for which the host bus logic is configured to issue split non-posted write transactions.