Patent ID: 7224756

Claim:
A method for providing and operating a codec with a clock signal at a desired operational rate, comprising: determining whether an available clock signal within a circuit environment of a codec has a desired clock rate; in response to the available clock signal having the desired clock rate, supplying and operating the codec with the available clock signal; and in response tothe available clock signal not having the desired clock rate, generating from the available clock signal, by a phase-locked loop circuit, a desired clock signal having the desired clock rate and supplying and operating the codec with the desired clock signal wherein the available clock signal is a signal from one of various clock sources; utilizing combinatorial values of a clock-present signal, an identification signal, and another identification signal to determine which one of the various clock sources provides the available clock signal; setting the clock-present signal to a high value when a clock generator oscillator source signal or an external clock source signal is detected during a reset period of the codec; and otherwise setting the clock-present signal to a low value.