Patent ID: 7859934

Claim:
A method of providing memory redundancy across a plurality of voltage domains in an integrated control circuit, the method comprising: providing a plurality of memories with redundancy memory elements; storing memory configuration information in a fuse cell for controlling switching of memory elements in the plurality of memory elements; retaining the configuration information of a corresponding memory from the fuse cell in a shift register; controlling operations of the shift register, wherein the shift register includes a shift portion which receives data of the configuration information and transfers the data to another shift register, and a latch portion which retains the data inputted to the shift portion, and the control circuit controls whether or not the data inputted to the shift portion of the shift register is to be retained in the latch portion; directing power to be supplied from an independent power source for a plurality of independent voltage domains; and controlling whether or not the configuration data inputted to the shift portion of the shift register in a corresponding module is to be retained in the latch portion in response to turning on and off of one of the plurality of independent voltage domains.