Patent ID: 7439801

Claim:
An amplifier circuit for outputting an output signal with a predetermined DC level of HVCC comprising: an input stage with a terminal for receiving a first power supply and two input terminals of a non-inverting terminal and an inverting terminal, said inverting terminal being connected to a feedback network; an amplifying stage which amplifies the signal from the input stage; an output stage connected to said amplifying stage and having a terminal for receiving a second power supply which is different from the first power supply; a feedback network comprising a first resistor with a resistance value of R 1 and which is connected between an output terminal of the output stage and the inverting terminal of the input stage and a second resistor with a resistance value of R 2 which is connected between a terminal of an input signal with a DC level of HVDD and the inverting terminal of the input stage; and an input bias generator circuit outputting a DC voltage of VA to the non inverting terminal of the input stage, wherein VA=HVDD+(HVCC−HVDD)(R 2 /(R 1 +R 2 )).