Patent ID: 8374883

Claim:
A coding apparatus comprising: a monaural signal generator that synthesizes a first channel signal and a second channel signal in a stereo signal, to generate a monaural signal, and generates a side signal, the side signal being a difference between the first channel signal and the second channel signal; a side residual signal acquirer that acquires a side residual signal, the side residual signal being a linear prediction residual signal for the side signal; a monaural residual signal acquirer that acquires a monaural residual signal, the monaural residual signal being a linear prediction residual signal for the monaural signal; a first spectrum divider that divides the side residual signal into a low band part being a lower band than a predetermined frequency and a middle band part being a higher band than the predetermined frequency; a second spectrum divider that divides the monaural residual signal into a low band part being a lower band than a predetermined frequency and a middle band part being a higher band than the predetermined frequency; a selector that selects an optimal signal as a reference signal from reference signal candidates by checking relationships between each reference signal candidate and a target signal, the reference signal candidates being frequency coefficients for the low band part of the side residual signal, frequency coefficients for the middle band part of the monaural residual signal, and frequency coefficients for the low band part of the monaural residual signal, and the target signal being frequency coefficients for the middle band part of the side residual signal; an inter channel prediction analyzer that performs an inter-channel prediction analysis between the reference signal and the target signal, to acquire inter-channel prediction coefficients; and an inter channel parameter quantizer that quantizes the inner-channel prediction coefficients, wherein at least one of said generator, said acquirers, said dividers, said selector, said analyzer and said quantizer is configured as a circuit or as a processor.