Patent ID: 8164132

Claim:
An integrated circuit device, comprising: a semiconductor construction which includes a first material over a semiconductor substrate; the semiconductor substrate having defined array, intermediate, and peripheral regions; the intermediate region being between the array and peripheral regions; a second material formed over the first material; the second material being across at least a portion of the array region and across an entirety of the peripheral region wherein the first and second material define an edge of the trench formed in the intermediate region; wherein the array region has a plurality of container capacitors, the capacitors having an outer metal electrode defining the container, wherein the outer metal electrode has a layer of insulating material that covers both the inner and outer surfaces of the container capacitor, but does not fill the interior of the container capacitor defined by the outer metal electrode, the remaining interior portion of the container capacitor being filled by a second metal electrode; wherein the outer metal electrode extends above the surface of the first material; wherein the second material in the array region forms a single homogenous retaining structure that is interposed between at least a portion of the outer surfaces of neighboring container capacitors.