Patent ID: 8536702

Claim:
A stacked system of microelectronic die packages, comprising: a first microelectronic die package including a first dielectric casing having a first bottom side and first metal leads attached to the first bottom side; a second microelectronic die package attached to the first die package, the second microelectronic die package comprising— a second dielectric casing having a lateral side; a second bottom side; a redistribution structure at the second bottom side; and second metal leads coupled to the second bottom side, wherein individual second leads include a lateral portion that projects away from the lateral side, a bend, and an angled portion that projects from the bend towards a corresponding individual first lead; metal solder connectors attached to the individual first leads and a surface of individual angled portions of the second leads; a support substrate proximate to the second bottom side, the support substrate having multiple substrate bond-sites; and multiple substrate connectors coupled to the redistribution structure and corresponding substrate bond-sites.