Patent ID: 7364938

Claim:
Process for making a semiconductor device comprising the following steps: a doped region ( 44 . 1 ) with a first type of conductivity is made on a first principal face ( 40 . 2 ) of a semiconductor substrate ( 40 ), and at least one window ( 45 ) is made delimiting said region, a first metallisation area ( 46 ) is deposited on the doped region ( 44 . 1 ) with the first type of conductivity, a dielectric layer ( 47 ) is deposited on at least the window ( 45 ) and the first metallisation area ( 46 ), at least a first opening ( 48 ) is etched in the dielectric layer ( 47 ) at the window ( 45 ) exposing the substrate ( 40 ) that will accommodate a doped region ( 50 ) with a second type of conductivity while arranging an undoped portion ( 40 . 1 ) of the semiconductor substrate laterally between the doped region ( 50 ) with the second type of conductivity and the doped region ( 44 . 1 ) with the first type of conductivity, the substrate ( 40 ) is doped to create the doped region ( 50 ) with the second type of conductivity, a second metallisation area ( 50 ) is deposited covering the dielectric layer ( 47 ) and coming into contact with the doped region ( 50 ) with the second type of conductivity.