Patent ID: 7314825

Claim:
A method for forming a plurality of contact plugs of a semiconductor device, the method comprising: forming a plurality of conductive patterns having a plurality of hard masks on a substrate; forming an etch stop layer over the plurality of conductive patterns, the etch stop layer conforming to a profile of the plurality of conductive patterns; forming an inter-layer insulation layer on the etch stop layer; planarizing the inter-layer insulation layer until the inter-layer insulation layer has a thickness of no more than 500 Å on a portion of the etch stop layer that is provided at an upper portion of the conductive patterns; forming a polysilicon layer on the inter-layer insulation layer; forming a plurality of contact holes exposing the etch stop layer between the plurality of conductive patterns by using the polysilicon layer as an etch mask; removing the polysilicon etch mask and the etch stop layer in lower portions of the plurality of contact holes; forming a conductive layer for forming a plurality of plugs to fill the plurality of contact holes; and forming a plurality of isolated plugs by performing a planarizing process using an etch back process to expose the plurality of hard masks.