Patent ID: 7312577

Claim:
A plasma display panel, comprising: a first and a second substrates facing each other; a plurality of address electrodes arranged on the second substrate; a partition wall arranged between the first and the second substrates to form a plurality of discharge cells between the first and the second substrates, the partition wall separating adjacent discharge cells; a phosphor layer arranged within each discharge cell; a plurality of discharge sustain electrodes arranged on the first substrate, wherein the phosphor layer has plane shape including a pair of sides having an arc-shape that corresponds to a diffusion shape of a plasma discharge generated within the discharge cell and; a dielectric layer formed on a portion of the second substrate and covering the plurality of address electrodes, wherein the partition wall is formed on the dielectric layer, and the plasma display panel comprises discharge cells each defined by the partition wall comprising a pair of long portions, a pair of short portions, and connecting portions arranged between the long portions and the short portions, wherein the phosphor layer is arranged on the long, short and connecting portions of the partition wall and on a top surface of the dielectric layer, wherein the phosphor layer comprises a bottom portion contacting a top surface of the dielectric layer, and a wall portion contacting the long, short and connecting portions of the partition wall, wherein the wall portion of the phosphor layer is structured to satisfy the following condition: 1.5≦ B/A≦ 3.2 where A indicates an average thickness of a middle sub-portion of the wall portion contacting the long portions of the partition walls, and B indicates an average thickness of a middle sub-portion of the wall portion contacting the connecting portions of the partition walls.