Patent ID: 7185429

Claim:
A manufacture method of a flexible multilayer wiring board having a plurality of circuit wirings stacked in layers via an insulating layer therebetween, said circuit wirings of the respective layers being interlayer-connected by via portions, said manufacture method including: a first forming of a resist pattern on a conductive substrate, and depositing a conductive material on said conductive substrate through electrolytic plating using said resist pattern as a mask, thereby to form a first layer circuit wiring; laminating metal foil over said conductive substrate via an insulating layer therebetween so as to cover said first layer circuit wiring, and pattern-etching said metal foil to form a second layer circuit wiring; a second forming of a resist layer over said conductive substrate so as to cover said second layer circuit wiring, and applying a laser beam to said resist layer at portions corresponding to predetermined positions where said first layer circuit wiring and said second layer circuit wiring are overlapped with each other via the insulating layer therebetween, thereby to form interlayer via holes so as to expose said first layer circuit wiring through the resist layer, the second layer circuit wiring and the insulating layer; a third forming of via portions by filling a conductive material in said interlayer via holes through electrolytic plating using said conductive substrate as a power feeding layer, thereby to establish interlayer connection between said first layer circuit wiring and said second layer circuit wiring; removing said resist layer, forming an insulating layer over said conductive substrate so as to cover said second layer circuit wiring, forming insulating layer hole portions at predetermined portions of said insulating layer so as to expose said second layer circuit wiring, and filling a conductive material in said insulating layer hole portions by electrolytic plating using said conductive substrate as a power feeding layer, thereby to form external connection terminals; and exposing said first layer circuit wiring by removing said conductive substrate or removing said conductive substrate such that part of said conductive substrate remains.