Patent ID: 7936040

Claim:
A semiconductor transistor device, comprising: a) one or more conductive base regions connected to a first electrical terminal; b) a first semiconductor barrier region in contact with the one or more conductive base regions, wherein a first Schottky barrier junction is formed at the interface of the first semiconductor barrier region and the one or more conductive base regions; c) a second semiconductor barrier region in contact with the one or more conductive base regions, wherein a second Schottky barrier junction is formed at the interface of the second semiconductor barrier region and the one or more conductive base regions; d) a conductive emitter region in contact with the first semiconductor barrier region, wherein a third Schottky barrier junction is formed at the interface of the conductive emitter region and the first semiconductor barrier region, wherein the conductive emitter region is connected to a second electrical terminal; and e) a conductive collector region in contact with the second semiconductor barrier region, wherein a fourth Schottky barrier junction is formed at the interface of the conductive collector region and the second semiconductor barrier region, wherein the conductive collector region is connected to a third electrical terminal, wherein at least one of the first semiconductor barrier region or the second semiconductor barrier region comprises a dimension smaller than 100 Å.