Patent ID: 7515456

Claim:
A memory circuit, comprising: a memory controller having an input/output circuit connected to a memory array having a plurality of memory cells; an address circuit configured to select at least one of the memory cells for a reading or a writing operation; a reading circuit and a writing circuit connected with the input/output circuit, wherein the writing circuit stores digital data in the selected at least one memory cell and the reading circuit reads digital data from the selected at least one memory cell; a digital-to-analog (D/A) converter connected with the input/output circuit and with the writing circuit, wherein the D/A converter converts a digital data with at least two digital bits received from the input/output circuit to one analog value and forwards the analog value to the writing circuit, wherein the digital data is at least a part of a floating point number, and wherein the writing circuit writes the analog value in the selected at least one memory cell; and an analog-to-digital (A/D) converter connected with the reading circuit and with the input/output circuit, wherein the reading circuit reads an analog value from the selected at least one memory cell and forwards the analog value to the A/D converter, wherein the A/D converter converts the analog value to digital data, and wherein the A/D converter forwards the digital data to the input/output circuit.