Patent ID: 8642415

Claim:
A method of creating a semiconductor integrated circuit, comprising: forming a first field effect transistor (FET) device and a second FET device on a semiconductor substrate; epitaxially growing raised source/drain (RSD) structures for the first FET device at a first height; epitaxially growing raised source/drain (RSD) structures for the second FET device at a second height, wherein the second height is greater than the first height such that a threshold voltage of the second FET device is greater than a threshold voltage of the first FET device; forming the gate structures of the first and second FET devices on at least one gate dielectric layer of an extremely thin silicon-on-insulator (ETSOI) substrate that is part of the semiconductor substrate, wherein a gate length of the second FET device is the same as a gate length of the first FET device; and implanting ions within the ETSOI layer, wherein the gate structures act as a mask as ions are implanted such that an effective channel length of the second FET device is longer than an effective channel length of the first FET device, and such that extension structures of the first FET device extend further beneath the gate structure thereof in a lateral direction with respect to extension structures of the second FET device.