Patent ID: 8049280

Claim:
A semiconductor device, comprising: a gate electrode formed on a semiconductor substrate via a gate insulating film; Si:C layers formed on the semiconductor substrate on sides of the gate electrode; p-type source/drain regions formed on sides of the gate electrode in the semiconductor substrate, and a part of the p-type source/drain regions being formed in the Si:C layers; silicide layers formed on the Si:C layers; an elevated layer formed in a region on the semiconductor substrate under the Si:C layers, an upper surface of the elevated layer being located higher than an interface between the semiconductor substrate and the gate insulating film; and a crystal layer formed on sides of the gate electrode in the semiconductor substrate and comprising a crystal having a lattice constant larger than that of a Si crystal, wherein the elevated layer is formed in a region on the crystal layer under the Si:C layers, and wherein the p-type source/drain regions are formed in the semiconductor substrate, the crystal layer, the elevated layer and the Si:C layers.