Patent ID: 8037440

Claim:
A method for designing a read-only memory (ROM) that stores a dataset that may be represented as an M×P table, the method comprising: partitioning the dataset into N sub-datasets capable of respectively being represented by tables T 1 to T N , wherein N>1, and for every i from 1 to N, each table T i is of the form M×B i each B i <P; at least partially row collapsing at least one of the N sub-datasets represented by a table T r so that at least a first redundant entry in the table T r is removed and an address of the removed entry is mapped to second entry; designing N logic arrays L 1 to L N that respectively encode the N sub-datasets using W 1 to W N word lines, respectively, and B 1 to B N bit lines, respectively; designing N decoders D 1 to D N that respectively drive the N logic arrays L 1 to L N according to an input address and any respective mapping information from at least partially row collapsing the respective sub-dataset so that a decoder D r for a logic array L r that encodes the at least partially row collapsed sub-dataset represented by the table T r maps the address of the removed entry to a word line corresponding to an address of the second entry; and utilizing output of the bit lines for an output of the ROM.