Patent ID: 8618848

Claim:
A clock generator, comprising: an oscillator capacitor which develops a charge voltage; a first sample capacitor which develops a first sample voltage; a first sample switch coupled between said oscillator capacitor and said first sample capacitor; a charge circuit configured to charge said oscillator capacitor towards a first voltage level and a discharge circuit configured to discharge said oscillator capacitor towards a second voltage level; a first comparator configured to compare said charge voltage with a first error voltage and to provide a first compare signal indicative thereof; a sample and discharge control network configured to control said first sample switch to cause said charge voltage to be sampled by said first sample capacitor as said first sample voltage in response to said first compare signal, and which is configured to then control said discharge circuit to discharge said oscillator capacitor; and a first amplifier configured to provide said first error voltage based on a difference between said first sample voltage and a predetermined first reference voltage, wherein said first reference voltage corresponds with a target level of said first voltage level.