Patent ID: 7784055

Claim:
A computer apparatus, comprising: one or more processors; one or more electronic digital memory devices that are communicatively coupled to the one or more processors; one or more sequences of computer program instructions stored in the memory devices, which instructions, when executed by the one or more processors, cause the one or more processors to perform: receiving a first packet of a client request at the apparatus, wherein the apparatus comprises a load-balancing node in a network; selecting a load-balanced server among a plurality of load-balanced servers in the network; storing information identifying a packet flow associated with the first packet; receiving a label value; storing the label value in a load-balancing mapping at a load-balancing node in a network, wherein the load-balancing mapping associates the label value with the packet flow and with interface identifying information; wherein interface identifying information includes an identifier of an interface of that node on which the first packet arrived, and an outgoing interface identifier; and forwarding subsequent packets of the flow to the selected load-balanced server, wherein the forwarding is on a route to the selected load-balanced server that is defined by the load-balancing mapping and is performed using a fast label switching mechanism without hop-by-hop routing decisions, wherein forwarding of subsequent packets of the flow to the selected load-balanced server is performed without additionally selecting another load-balanced server; wherein the apparatus is communicatively coupled through the network to the client and the selected load-balanced server among a plurality of servers in the network, which comprises a plurality of load-balancing nodes.