Patent ID: 7821584

Claim:
A display device comprising: a substrate; a plurality of pixels which are arranged in a matrix in a display region and have a storage capacity in each pixel; a plurality of gate lines which are arranged in the display region; a plurality of data lines which are arranged in the display region and cross the plurality of gate lines; and a plurality of storage lines which are arranged in the display region and supply electricity to the storage capacity, wherein the substrate includes a first side which has a plurality of connection terminals connected to an external circuit, and second and third sides which are adjacent to the first side and are opposite to each other while sandwiching the display region therebetween, the plurality of gate lines include a first gate line, a second gate line which is arranged at a position closer to the first side than the first gate line, a third gate line which is arranged at a position closer to the first side than the second gate line, a fourth gate line which is arranged at a position closer to the first side than the third gate line, the first and second gate lines are respectively pulled around toward the first side by first and second gate-line pull-around lines which are provided at the second side, the third and fourth gate lines are respectively pulled around toward the first side by third and fourth gate-line pull-around lines which are provided at the third side, the plurality of storage lines include a first storage line which is arranged between the first gate line and the second gate line, a second storage line which is arranged between the third gate line and the fourth gate line, the first storage line is pulled around toward the first side by a first common line which is provided at the third side, the second storage line is pulled around toward the first side by a second common line which is provided at the second side, the third and fourth gate-line pull-around lines are arranged between the display region and the first common line, and the second common line is arranged between the display region and the second gate-line pull-around line.