Patent ID: 8239440

Claim:
A system for implementing an unfused multiply-add instruction within a fused multiply-add pipeline, comprising: an aligner having an input for receiving an addition term, wherein the aligner is configured to produce an aligned addition term; a multiplier tree having two inputs for receiving a first value and a second value for multiplication, wherein the multiplier tree is configured to produce a first partial product and a second partial product; a first carry save adder (CSA), wherein the first CSA is configured to receive the first partial product, the second partial product, and the aligned addition term, wherein the first CSA is configured to produce first and second CSA terms; a leading zero anticipator (LZA), wherein the LZA is configured to receive the aligned addition term and the first and second CSA terms and to determine the number of leading zeroes or ones within the sum of the terms; and a fused/unfused multiply add (FUMA) block configured to receive the first partial product, the second partial product, and the aligned addition term, wherein the first partial product and the second partial product are not truncated, wherein the FUMA block is configured to perform an unfused multiply add operation and a fused multiply add operation using the first partial product, the second partial product, and the aligned addition term to produce a multiply add intermediate result, and wherein the FUMA block comprises: a second CSA, wherein the second CSA is configured to receive the first partial product, the second partial product, and the aligned addition term and produce third and fourth CSA terms; a half adder configured to receive the third and fourth CSA terms and produce first and second half-adder terms; a first carry propagate adder (CPA) configured to receive the first and second half-adder terms and provide a first CPA sum; and a second CPA configured to receive the third and fourth CSA terms and provide a second CPA sum.