Patent ID: 7949829

Claim:
A cache comprising: a data memory comprising a plurality of data entries, each data entry having capacity to store a cache block of data; a tag memory comprising a plurality of tag entries, each tag entry configured to store a tag corresponding to a cacheable cache block stored in the data memory; and a cache control unit coupled to the data memory and the tag memory, wherein the cache control unit is configured to allocate a first data entry in the data memory in response to a first transaction, and wherein the first data entry is allocated to store data corresponding to the first transaction, and wherein the first transaction has a cacheability attribute, and wherein the cache control unit is configured to update a first tag entry in the tag memory to indicate valid responsive to the cacheability attribute indicating cacheable, and wherein the cache control unit is configured to update the first tag entry to indicate invalid responsive to the cacheability attribute indicating non-cacheable even though the first data entry is allocated to store the non-cacheable data.