Patent ID: 7679405

Claim:
A latch-based sense amplifier, the latch-based sense amplifier comprising: an input stage; and a latch stage, wherein the latch stage is electrically coupled to the input stage, wherein the latch stage includes: a third P-type transistor and a fourth P-type transistor; a fourth N-type transistor, a fifth N-type transistor, a sixth N-type transistor, a seventh N-type transistor, an eighth N-type transistor, and a ninth N-type transistor; and wherein the gate of the fourth N-type transistor is electrically coupled to the second intermediary signal; the gate of the fifth N-type transistor is electrically coupled to the first intermediary signal; the source of the fourth N-type transistor, the source of the fifth N-type transistor, the source of the sixth N-type transistor and the source of the seventh N-type transistor are electrically coupled to the lower voltage potential; the drain of fourth N-type transistor and the drain of the seventh N-type transistor are electrically coupled to the source of the ninth N-type transistor; the drain of fifth N-type transistor and the drain of the sixth N-type transistor are electrically coupled to the source of the eighth N-type transistor; the gate of the sixth N-type transistor is electrically coupled to the drain of the ninth N-type transistor, and the gate of the seventh N-type transistor is electrically coupled to the drain of the eighth N-type transistor; the gate of the eighth N-type transistor and the gate of the ninth N-type transistor are electrically coupled to the clock signal; the drain of the eighth N-type transistor is electrically coupled to the drain of the third P-type transistor, and the drain of the ninth N-type transistor is electrically coupled to the drain of the fourth P-type transistor; the gate of the third P-type transistor is electrically coupled to the drain of the fourth P-type transistor, and the gate of the fourth P-type transistor is electrically coupled to the drain of the third P-type transistor; and the source of the third P-type transistor and the source of the fourth P-type transistor are electrically coupled to the upper voltage potential.