Patent ID: 8847632

Claim:
A semiconductor device comprising: a first power node; a second power node, a power supply voltage being applied between the first power node and the second power node; and an output circuit which has a normal mode and an idling mode, wherein the output circuit comprises: a first output node; a second output node; a first termination resistor coupled between the first power node and the first output node; a second termination resistor coupled between the first power node and the second output node; and a drive circuit operable to flow a constant current between the first power node and the second power node via at least one of the first termination resistor and the second termination resistor, wherein, in the normal mode, when the drive circuit flows the constant current through one of the first termination resistor and the second termination resistor in response to a differential input signal, the output circuit outputs a differential signal corresponding to an input signal from the first output node and the second output node, wherein, in the idling mode, when the drive circuit flows the constant current through both of the first termination resistor and the second termination resistor, the output circuit outputs an idling voltage from the first output node and the second output node, and wherein the output circuit adjusts one of the value of the current flowing through the first termination resistor and the second termination resistor and the value of resistance of the first termination resistor and the second termination resistor, so as to make substantially equal the idling voltage outputted in the idling mode and a common voltage of the differential signal outputted in the normal mode.