Patent ID: 7217629

Claim:
A method of fabricating a semiconductor structure comprising: providing a structure comprising a bottom semiconductor layer, a continuous buried insulating layer on said bottom semiconductor layer, a top semiconductor layer of a first crystal orientation on a portion of said continuous buried insulating layer and a pad stack located on said patterned top semiconductor layer, wherein said structure includes at least one semiconductor region in an opening provided in said pad stack and said top semiconductor layer that is in contact with a portion of said continuous buried insulating layer; bonding said structure to a second substrate having a second crystal orientation that differs from said first crystal orientation and including a damaged region, wherein said pad stack and said at least one semiconductor region contact a surface of said second substrate; removing a portion of said second substrate at said damaged region; recrystallizing said at least one semiconductor region into a recrystallized semiconductor having said second crystal orientation; and removing said remaining second substrate and said pad stack to provide a hybrid substrate having said top semiconductor layer that includes separate planar semiconductor regions of different crystal orientation on said continuous buried insulating layer.