Patent ID: 7518247

Claim:
A semiconductor device comprising: an insulating film ( 10 ); an interlayer dielectric film ( 12 ) on the insulating film; a trench ( 11 ) within the dielectric film; a first etching stopper layer ( 16 ) covering the dielectric film; and an interconnection, comprising, a metal layer ( 39 ) filling the trench, a barrier metal layer ( 13 ) coating a bottom and sides of the trench, the barrier metal layer located intermediate the metal layer and the dielectric film with the barrier metal layer separating the metal layer from the dielectric film, particles of metal ( 15 ) on a lower horizontal surface of the barrier metal layer, and carbon nanotubes ( 14 ) formed on the metal particles and mixed in the metal layer, wherein, each of i) the trench ( 11 ), ii) the interconnection, iii) the metal layer ( 39 ), iv) the barrier metal layer ( 13 ), and the carbon nanotubes ( 14 ) extend through the first etching stopper layer.