Patent ID: 8703600

Claim:
A forming method of bumps that is connected to either one of an interconnection substrate and other electronic component via a conductive bump, the manufacturing method comprising: forming a metal layer on a principle face of the electronic component on which have been formed a first pad, a second pad and a passivation film, the first pad being made of a conductive material and being two-dimensionally arranged in center region of the principle face, the second pad being made of a conductive material and being linearly arranged at peripheral border region of the principle face, the passivation film covering the principle face except a formation position of the pad; applying a resist on the metal layer and forming, by lithography technique, an opening corresponding to the formation position of the first and second pad; forming, by plating technique, a bump metal layer on the metal layer inside the opening; removing the resist; removing, by etching technique, the metal layer using the bump metal layer as a mask; and forming a bump by subjecting the bump metal layer to reflow treatment, wherein the forming the opening comprises forming the opening at the peripheral border region with radius that is smaller than radius of at least some of the openings at the center region, the forming the bump metal comprises forming the bump metal layer that has thickness smaller than radius of the opening, and in the forming of the bump, the reflow treatment is performed so that a difference in height between the bumps in the center region and the bumps in the peripheral border region becomes small.