Patent ID: 7741168

Claim:
A method comprising: providing a semiconductor structure having an N-type metal-oxide (NMOS) region and a P-type metal-oxide (PMOS) region; depositing a tensile silicon nitride layer over the NMOS and PMOS regions; depositing a tensile silicon oxide layer over the tensile silicon nitride layer; forming a first photoresist over a first portion of the tensile silicon oxide layer above the NMOS region; removing a second portion of the tensile silicon oxide layer above the PMOS region and a first portion of the tensile silicon nitride layer above the PMOS region; depositing a compressive silicon nitride layer over the PMOS region and the first portion of the tensile silicon oxide layer above the NMOS region; depositing a compressive silicon oxide layer over the compressive silicon nitride layer; forming a second photoresist over a first portion of the compressive silicon oxide layer above the PMOS region; and removing a second portion of the compressive silicon oxide layer above the NMOS region and removing the a first portion of the compressive silicon nitride layer above the NMOS region.