Patent ID: 7649971

Claim:
A shift register comprising a plurality of stages for sequentially outputting output pulses and supplying them to gates lines in a display region, each of the stages comprising: a first node controller disposed at one side of the display region, the first node controller controlling a signal state of a first node; at least one pull-up switching device disposed at the one side of the display region, the pull-up switching device outputting an output pulse according to the signal state of the corresponding first node and supplying it to a corresponding gate line; a second node controller disposed at the other side of the display region, the second node controller controlling a signal state of a second node; a first pull-down switching device disposed at the other side of the display region, the first pull-down switching device outputting a discharging voltage according to the signal state of the second node and supplying it to the other side of the corresponding gate line: a third node controller disposed at the other side of the display region, the third node controller controlling a signal state of a third node; and a second pull-down switching device for outputting the discharging voltage according to the signal state of the third node and supplying it to the other side of the corresponding gate line.