Patent ID: 8154492

Claim:
A liquid crystal display (LCD) panel, comprising: an active device array substrate, comprising a plurality of pixel units, wherein each of the pixel unit comprises: a first active device, comprising a first gate, a first source, and a first drain; a second active device, comprising a second gate, a second source, and a second drain, wherein the first gate is connected to the second gate, and the first source is connected to the second source; a first pixel electrode, connected to the first drain; a second pixel electrode, connected to the second drain; a first common line, connected to a first signal source; a second common line, connected to a second signal source, wherein the first signal source is different from the second signal source; and an opposite substrate, comprising a common electrode connected to the first signal source; and a liquid crystal layer, disposed between the active device array substrate and the opposite substrate, wherein the first signal source is adapted to provide a first voltage ΔVcom1, such that a coupling voltage ΔV1 of the first pixel electrode is equal to Δ ⁢ ⁢ V ⁢ ⁢ 1 = Δ ⁢ ⁢ V ⁢ ⁢ com ⁢ ⁢ 1 · Clc + Cst Cgs + Clc + Cst , wherein Cst is a storage capacitance formed by the first common line and the first drain, Cgs is a parasitic capacitance formed by the first gate and the first source, Clc is a liquid crystal capacitance formed by the first pixel electrode and the common electrode, and the second signal source is adapted to provide a second voltage ΔVcom2, such that a coupling voltage ΔV2 of the second pixel electrode is equal to Δ ⁢ ⁢ V ⁢ ⁢ 2 = Δ ⁢ ⁢ Vcom ⁢ ⁢ 1 · Clc Cgs + Clc + Cst + Δ ⁢ ⁢ Vcom ⁢ ⁢ 2 · Cst Cgs + Clc + Cst , wherein Cst is a storage capacitance formed by the second common line and the second drain, Cgs is a parasitic capacitance formed by the second gate and the second source, Clc is a liquid crystal capacitance formed by the second pixel electrode and the common electrode.