Patent ID: 7710481

Claim:
A circuit for use in an image sensor, the circuit comprising: a memory device having a non-volatile memory cell, a control gate, a drain and a source; a photosensitive semiconductor device positioned for exposure to electromagnetic radiation from an image; a pixel control circuit connected to direct said memory device and said photosensitive semiconductor device to a plurality of controlled modes; wherein said photosensitive semiconductor device is a photodiode having an anode and a cathode; said pixel control circuit comprises a transistor switch connected between said anode and cathode of said photodiode, said transistor switch having a control terminal for controlling the conductive state of said transistor switch, and a diode connected to drain at least a portion of a charge from said non-volatile memory cell of said memory device in response to an erase signal; said controlled modes including: an erase mode in which at least a portion of an electric charge is removed from said non-volatile memory cell to place said memory device in an initialized state, an exposure mode in which said non-volatile memory cell is charged at least partially in response to a voltage at a terminal of said photosensitive semiconductor device, said voltage at said terminal corresponding to exposure of said photosensitive semiconductor device to said electromagnetic radiation from said image, a read mode in which current flow between said source and drain of said memory device is detected as an indicator of the charge on said non-volatile memory cell.