Patent ID: 8228126

Claim:
A gated voltage-controlled oscillator, comprising: a first multiplexer comprising a first input terminal, a second input terminal and an output terminal outputting a second clock signal, wherein the output terminal outputs signal from the first input terminal or signal from the second input terminal based on a data signal; a second multiplexer comprising a first input terminal, a second input terminal and an output terminal, wherein the output terminal outputs signal from the first input terminal or signal from the second input terminal based on the data signal; a third multiplexer comprising a first input terminal inverted coupled to the first input terminal of the second multiplexer, a second input terminal coupled to the inverted second input terminal of the second multiplexer and an output terminal, wherein the output terminal outputs signal from the first input terminal or signal from the second input terminal based on the data signal; a fourth multiplexer comprising a first input terminal receiving the output signal of the first multiplexer, a second input terminal grounded and an output terminal; a fifth multiplexer comprising a first input terminal coupled to the output terminal of the third multiplexer, a second input terminal coupled to the output terminal of the fourth multiplexer, and an output terminal coupled to the second input terminal of the third multiplexer; and a sixth multiplexer comprising a first input terminal coupled to the output terminal of the fourth multiplexer, a second input terminal coupled to the output terminal of the second multiplexer, and an output terminal coupled to the first input terminal of the second multiplexer.