Patent ID: 7119588

Claim:
A circuit arrangement for multiplying signals comprising: a first multiplier, having an output, having a first input for receiving a first input signal, and having a second input for receiving a second input signal; a first envelope detector having an output and having an input for receiving the first input signal; a second envelope detector having an output and having an input for receiving the second input signal; a second multiplier, having a first input, a second input, and an output, wherein the output of said first envelope detector is coupled to the first input of said second multiplier, and the output of said second envelope detector is coupled to the second input of said second multiplier; a third multiplier, having a first input, a second input, and an output, wherein the output of said second multiplier is coupled to a first input of said third multiplier, and the second input of said third multiplier is configured to receive a third input signal, the third input signal at a frequency which is a difference between a frequency of the first input signal and a frequency of the second input signal; and a subtracter for providing an output signal, whereby a signal from the output of said third multiplier device is subtracted from the output of said first multiplier.