Patent ID: 7698497

Claim:
A method of controlling a semiconductor memory device, comprising: writing data, which is transferred from a first data cache and stored in a first page buffer, to a first memory area, the first memory area including a plurality of blocks, each of the blocks including a plurality of pages; writing data, which is transferred from a second data cache and stored in a second page buffer, to a second memory area, the second memory area including a plurality of blocks, each of the blocks including a plurality of pages; when new data is input, judging whether the number of empty blocks in the first memory area, in which the new data is to be written, reaches a first lower-limit value; when a number of empty blocks in the first memory area reaches the first lower-limit value, judging whether a number of empty blocks in the second memory area reaches a second lower-limit value; and when the number of empty blocks in the second memory area does not reach the second lower-limit value, selecting an empty block in the second memory area and writing new data in the second data cache.