Patent ID: 8798207

Claim:
A computer-implemented method for synchronizing a plurality of receiver channels, the method comprising: calibrating the plurality of receiver channels, wherein said calibrating synchronizes the plurality of receiver channels, wherein one of the receiver channels is designated as a master channel, wherein the one or more remaining receiver channels are designated as slave channels, wherein each of the receiver channels includes a signal path that is configured to: down-convert a respective input signal to obtain a respective IF (intermediate frequency) signal, digitize the respective IF signal based on a respective sample clock to obtain a respective IF sample sequence, digitally down-convert the respective IF sample sequence to obtain a respective baseband sample sequence; wherein said calibrating the plurality of receiver channels includes, for each of the slave channels: computing a relative frequency response between the slave channel and the master channel, wherein the relative frequency response is based on the respective baseband sample sequence of the slave channel and the respective baseband sample sequence of the master channel; computing a digital filter for the slave channel based on the relative frequency response, wherein the digital filter is configured to compensate for non-uniformity in amplitude of the relative frequency response and for a deviation of phase of the relative frequency response from a linear approximation of the phase of the relative frequency response; programming a digital circuit of the slave channel to implement the digital filter, wherein, after said programming, the digital circuit of the slave channel applies the digital filter to the respective IF sample sequence prior to said digital down-converting of the respective IF sample sequence.