Patent ID: 8476696

Claim:
A nonvolatile semiconductor memory device, comprising: a semiconductor substrate; element isolation insulating films being along a first direction in the semiconductor substrate with a certain spacing therebetween and reached to a certain depth from a surface of the semiconductor substrate; and element regions sandwiched by the element isolation insulating films, with MONOS type memory cells disposed on an upper surface thereof, each of the MONOS type memory cells comprising: a tunnel insulating film disposed on one of the element regions; a charge storage film disposed continuously on the element regions and the element isolation insulating films; a block insulating film disposed on the charge storage film; and a control gate electrode disposed on the block insulating film, the charge storage film comprising: a charge film disposed on the one of the element regions and having a certain charge trapping characteristic; and a degraded charge film disposed on one of the element isolation insulating films and having a charge trapping characteristic inferior to that of the charge film, and the degraded charge film having a length of an upper surface thereof set shorter than a length of a lower surface thereof in a cross-section along the first direction.