Patent ID: 7979607

Claim:
A method of operating a First In First Out (FIFO) buffer, the method comprising: receiving a first data element at an input of a FIFO buffer, the FIFO buffer comprising a plurality of buffer slices including an output buffer slice wherein each of the plurality of buffer slices comprise a data register and a control bit register; identifying whether a first buffer slice is indicated for storing the first data element based on a control bit register for the first buffer slice and a control bit register of an adjacent buffer slice on an output side; and storing the first data element in the first buffer slice when the first buffer slice is indicated while bypassing any non-indicated buffer slices; wherein storing the first data element in the first buffer slice further comprises bypassing either the first buffer slice or at least one intermediate buffer slice, wherein the at least one intermediate buffer slice is positioned between the input of the FIFO buffer and the output buffer slice.