Patent ID: 7934045

Claim:
An apparatus to control an I/O enclosure, the apparatus comprising: an I/O enclosure; a bus module that receives two or more peripheral component interconnect express (“PCIe”) sideband signals via one or more PCIe cables, the one or more PCIe cables connected between one or more hosts and the I/O enclosure, an asserted value of each PCIe sideband signal specifying a preliminary command for controlling the I/O enclosure; a decode module that determines the asserted value of each of the two or more PCIe sideband signals and combines the PCIe sideband signal asserted values to form a bus value by mapping each PCIe sideband signal to a bit in the bus value, each PCIe sideband signal and the specified preliminary command representing a bit in the formed bus value and the formed bus value comprising at least two bits, wherein the formed bus value is compared with a list of valid bus values, wherein each valid bus value corresponds to a final command for controlling the I/O enclosure and all formed bus values not on the list of valid bus values are invalid and are discarded by the decode module, wherein the bus module sends an alert signal to the one or more hosts when the decode module discards an invalid bus value; and an execution module that executes by way of a processor the final command corresponding to the valid bus value associated with a valid formed bus value to perform control actions on the I/O enclosure.