Patent ID: 7608895

Claim:
An isolated NMOS structure formed in a semiconductor substrate, said substrate being doped with P-type impurity and not comprising an epitaxial layer, said isolated NMOS structure comprising an NMOS transistor and an isolation structure; said NMOS transistor comprising: a P well having a relatively deep central portion and relatively shallow side portions, said relatively shallow side portions of said P well underlying a field oxide layer, said relatively deep central portion of said P well underlying an opening in said field oxide layer; a gate overlying a channel region of said P well and separated from said substrate by a gate oxide layer; an N-type source region located at the surface of said substrate on one side of said gate; an N-type drain region located at the surface of said substrate on an opposite side of said gate from said N-type source region, said N-type drain region having a breakdown voltage relative to said P well; and electrical contacts to said gate, N-type source region, N-type drain region and P well of said NMOS; wherein said P well comprises an implanted P layer, said P layer comprising a deep section in said central portion of said P well, shallow sections in said side portions of said P well, and transition sections connecting said deep section and said shallow sections of said P layer, each vertical cross-section of said P layer comprising a location of peak doping concentration; said locations of peak doping concentration being relatively deep in said substrate in said deep section of said P layer and being at a shallower level in said substrate in said shallow sections of said P layer, the doping concentration of said P well at said surface of said substrate in said side sections of said P well being higher than the doping concentration of said P well at said surface of said substrate in said central portion of said P well; said isolation structure comprising: an N well extending downward from the surface of said substrate and laterally surrounding said P well; an N-type isolation layer located in said substrate and underlying said P well, said N-type isolation layer extending laterally beyond said P well a sufficient distance and said N well being sufficiently deep in said substrate such that said N-type isolation layer overlaps said N well so as to isolate said P well from said P-type substrate; and an electrical contact to said N well.