Patent ID: 7525864

Claim:
A method for conserving power in a device, comprising the steps of: (A) receiving a plurality of data items in a normal condition; (B) storing said data items as received in a plurality of bit cells in said device in a first pass operation, wherein reading one of said bit cells having a first logic state consumes less power than reading one of said bit cells having a second logic state; (C) generating a polarity signal internal to said device by analyzing said data items during a second pass operation through said bit cells, said polarity signal indicating that a majority of bits of said data items are stored in one of (i) said first logic state and (ii) said second logic state; (D) reading-inverting-writing said bits during a third pass operation through said bit cells in response to said majority of said bits having said second state; and (E) driving at least one of said data items onto an external interface of said device in said normal condition during a read operation based on said polarity signal.