Patent ID: 7495506

Claim:
A circuit for operation with a low supply voltage, comprising: a p-type depletion transistor having at least a gate, a drain, a source, and a bulk, wherein the source of the p-type depletion transistor is coupled to a power supply node; a charge pump circuit having at least an input and an output, wherein the input of the charge pump circuit is coupled to the power supply node; a first switch circuit that is coupled between the bulk of the p-type transistor and the power supply node; a second switch circuit that is coupled between the bulk of the p-type transistor and the output of the charge pump circuit; and an error amplifier that is coupled to the gate of the p-type depletion transistor, wherein the circuit is a low-dropout regulator circuit, and wherein the p-type depletion transistor operates as a pass transistor.