Patent ID: 8778746

Claim:
A thin-film transistor device manufacturing method comprising: providing a substrate; forming a plurality of gate electrodes above the substrate; forming a silicon nitride layer on the plurality of gate electrodes; forming a silicon oxide layer on the silicon nitride layer; forming an amorphous silicon layer on the silicon oxide layer; crystallizing the amorphous silicon layer using laser light emitted from a predetermined laser of at least 473 nm and at most 561 nm in wavelength while moving the predetermined laser in a direction relative to the substrate, to produce a crystalline silicon layer; and forming a source electrode and a drain electrode on the crystalline silicon layer in a region that corresponds to each of the plurality of gate electrodes, wherein a film thickness of the silicon oxide layer, a film thickness of the silicon nitride layer, and a film thickness of the amorphous silicon layer define a value X and a value Y, the value X is obtained by dividing an optical film thickness of the amorphous silicon layer by a wavelength of the laser light, the optical film thickness of the amorphous silicon layer being a product of multiplying the film thickness of the amorphous silicon layer and a refractive index of the amorphous silicon layer, the value Y is obtained by dividing a silicon oxide layer converted optical film thickness by the wavelength of the laser light, the silicon oxide layer converted optical film thickness being obtained by dividing a sum of an optical film thickness of the silicon oxide layer and an optical film thickness of the silicon nitride layer by a refractive index of the silicon oxide layer, the optical film thickness of the silicon oxide layer being a product of multiplying the film thickness of the silicon oxide layer by the refractive index of the silicon oxide layer, the optical film thickness of the silicon nitride layer being a product of multiplying the film thickness of the silicon nitride layer by a refractive index of the silicon nitride layer, and the value X and the value Y satisfy: Y≦− 0.198 X +(0.343−10.83 ΔA ′); Y≧− 0.236 X +(0.481−8.83 ΔA ′); X≧ 0.346 +C 3 where C 3=−36 ΔA′+ 0.0007 when 0 >AA′>− 0.0011 and C 3=−18.636 ΔA′+ 0.0198 when −0.0011 ≧ΔA′; Y> 0.435 +C 4 where C 4=52 AA′− 0.0033 when 0 >AA′>− 0.00104 and C 4=14.582 ΔA′− 0.0422 when −0.00104 ≧ΔA′; and Y ≧(0.00053/(−Δ A ′)^1.18)×( X− 0.346)+0.291 where 0 >ΔA′, ΔA′ is calculated according to an expression of: ( A G /d G )×(ρ Si ×c Si )/(ρ G ×c G ), where ρ Si is a density of the amorphous silicon layer, c Si is a specific heat of the amorphous silicon layer, d G is a film thickness of the gate electrode, ρ G is a density of the gate electrode, c G is a specific heat of the gate electrode, and A G is a maximum absorptance of the gate electrode when a first part of the amorphous silicon layer above the gate electrode and a second part of the amorphous silicon layer not above the gate electrode have an equal light absorptance for the laser light.