Patent ID: 7652612

Claim:
An apparatus comprising: a first module including a capacitor network configured to receive a sample of an analog input signal, and an amplifier configured to couple to the capacitor network in a plurality of arrangements to successively generate a plurality of residue signals at an amplifier output node of the amplifier without resetting the amplifier between generation of least two of the plurality of residue signals, the amplifier including a first amplifier input node, a second amplifier input node, and an amplifier output node, the capacitor network including: a first capacitor configured to couple to the first amplifier input node via a first path, to couple to the second amplifier input node via a second path, to couple to the amplifier output node via at least one of a third path and a fourth path, to couple to a selected one of a first reference node and a second reference node via a fifth path, and to couple to an input node via a sixth path; and a second capacitor configured to couple to the first amplifier input node via the first path, to couple to the second amplifier input node via the second path, to couple to the amplifier output node via at least one of a seventh path and an eighth path, to couple to the selected one of the first reference node and the second reference node via a ninth path, and to couple to the input node via a tenth path; and a second module configured to generate a digital signal based on a plurality of intermediate codes generated from the sample and the plurality of residue signals, the digital signal including a digital value of the sample.