Patent ID: 8288283

Claim:
A process of forming an integrated circuit, comprising: forming a layer of palladium over an existing top surface of said integrated circuit; performing a palladium chemical mechanical polish (CMP) operation on said integrated circuit, by a process including: forming a palladium CMP slurry, said palladium CMP slurry including an abrasive powder in an aqueous solution and 25 to 125 parts per million (ppm) aluminum, referenced to said abrasive powder, such that a pH of said palladium CMP slurry is between 2.0 and 3.0; applying said slurry to a top surface of said palladium layer; adjusting a CMP polish pad to provide a pressure of less than 9 pounds per square inch (psi) and a surface speed between 1.9 and 2.2 meters per second, so that palladium is removed at a rate of at least 80 nanometers per minute.