Patent ID: 7764348

Claim:
A liquid crystal panel comprising: an array substrate including a plurality of pixel electrodes corresponding to a plurality of pixels and a common electrode; an opposing substrate placed opposing the array substrate; and liquid crystal held between the array substrate and the opposing substrate, an alignment of which is controlled by an electric field between each of the plurality of pixel electrodes and the common electrode, wherein the array substrate further includes: a pixel selecting circuit which sequentially selects pixels among the plurality of pixels; a line group of pixel selecting circuit connected to input terminals of the pixel selecting circuit; a potential applying circuit which applies a potential to the pixel electrode of a selected pixel; a line group of potential applying circuit connected to input terminals of the potential applying circuit; and a common electrode line connected to the common electrode and extending in a region between the pixel selecting circuit and the potential applying circuit and in a region between the line group for pixel selecting circuit and the line group for potential applying circuit, wherein the common electrode and the plurality of pixel electrodes are layered with an interlayer insulating film there between; and the common electrode is configured as a conductive film positioned closest to the liquid crystal in the display region of the array substrate; wherein the array substrate further includes an array substrate-side extension line extending from the common electrode; and the opposing substrate includes: a conductive light-shielding film configured as a conductive film positioned closest to the liquid crystal in the display region of the opposing substrate; and an opposing substrate-side extension line extending from the conductive light-shielding film; wherein the liquid crystal panel further comprises a conductive member located between the array substrate and the opposing substrate and connecting electrically the array substrate-side extension line and the opposing substrate-side extension line; and the array substrate-side extension line extends in such a manner so as not to cross the pixel selecting circuit, the line group for pixel selecting circuit, the potential applying circuit, and the line group for potential applying circuit.