Patent ID: 7256118

Claim:
A method of manufacturing a semiconductor device comprising steps of: (a) forming a semiconductor element on a surface of a semiconductor substrate; (b) forming a first insulating film made of insulating material directly on the surface of the semiconductor substrate by a vapor deposition method, the first insulating film covering the semiconductor element; (b1) planarizing a surface of the first insulating film; (c) forming a second insulating film over the first insulating film by a coating method, the second insulating film being made of insulating material having a lower dielectric constant than the first insulating film; (d) forming a via hole through the second insulating film and the first insulating film; (e) burying a conductive plug in the via hole: (f) forming a first wiring pattern over the second insulating film, the first wiring pattern being connected to the conductive plug; and (g) forming multilevel wiring patterns over the first wiring pattern, wherein the first wiring pattern and the multilevel wiring patterns are made of metal, and the first wiring pattern is disposed in a lowest level among wiring patterns made of metal.