Patent ID: 8586454

Claim:
A method of fabricating a non-planar semiconductor device comprising: forming at least one semiconductor nanowire above an insulator layer of a semiconductor-on-insulator substrate, wherein an end segment of said at least one semiconductor nanowire is attached to a first semiconductor-on-insulator pad region and another end segment of said at least one semiconductor nanowire is attached to a second semiconductor-on-insulator pad region, said pad regions are both located atop said insulator layer; performing a first hydrogen anneal on said at least one semiconductor nanowire with at least a bottommost surface of said at least one semiconductor nanowire in direct contact with an uppermost surface of said insulator layer; removing a portion of said insulator layer located beneath said at least one semiconductor nanowire to suspend said at least one semiconductor nanowire above a remaining portion of said insulator layer; and performing a second hydrogen anneal on said at least one semiconductor nanowire that is suspended above the remaining portion of said insulator layer.