Patent ID: 7811844

Claim:
A method for fabricating integrated circuits, said method comprising: providing a substrate having an epi layer, an oxide layer, and a nitride layer sequentially formed thereon; patterning and etching said epi layer, said oxide layer and said nitride layer to form a plurality of pre-slabs on said substrate; selectively forming a waveguide resist (WGR) mask on one of said pre-slabs to assist a formation of a modulator; etching said epi layer further to form a plurality of slabs, wherein said etching is performed by using said WGR mask on said one pre-slab and by using said nitride layer on said remaining pre-slabs as a hard mask; removing said WGR mask from said substrate, wherein said nitride layer is located directly above said modulator having a thickness that is greater than the thickness of said nitride layer on remaining slabs; growing an oxide layer on sidewalls of said slabs; and fabricating an electronic device on a first one of said slabs and a photonic device on a second one of said slabs, such that said electronic and photonic devices are formed on said substrate.