Patent ID: 6858939

Claim:
An integrated circuit comprising: at least one metal layer comprising a plurality of regions, wherein a first contiguous region comprises an area of said metal layer of at least 100 square microns and comprises a plurality of conductors to interconnect components on said integrated circuit, said conductors comprising a plurality of preferred diagonal direction conductors and at least one zag conductor, and wherein a second contiguous region comprises a plurality of conductors such that at least fifty (50) percent of said conductors of the second contiguous region are arranged in a preferred direction other than said preferred diagonal direction; said preferred diagonal direction conductors comprising at least fifty (50) percent of said conductors in said first region and being deposed in a preferred diagonal direction that forms a Euclidean angle relative to the boundaries of the integrated circuit, and said at least one zag conductor being deposed in a Manhattan direction and being coupled to one of said preferred diagonal direction conductors so as to interconnect components on said integrated circuit using at least one zag conductor and at least one preferred diagonal direction conductor.