Patent ID: 7062596

Claim:
A datalink for operatively linking one or more computers to one or more computer peripheral devices and monitors remotely located from said one or more computers, the datalink comprising: a plurality of master state devices, each including a master transceiver for operatively linking one of said computers to the datalink, and each constructed and adapted to receive a stream of computer data packets from a computer connected thereto, to sample the computer data packets into a stream of consecutive computer samples, and to load the consecutive computer samples, sample-by-sample, into a stream of master frames, one sample per master frame; one or more slave state devices, each including a slave transceiver for operatively linking one or more peripheral devices to the datalink, and each constructed and adapted to receive one or more streams of peripheral data packets from peripheral devices connected thereto, to sample the peripheral data packets into one or more streams of consecutive peripheral samples, and to load said peripheral samples into a stream of slave frames; and a matrix switch including: cross-point connection circuitry providing switchable paths between selected master state devices and selected one or more slave state devices; and a processor, out of the switchable paths, controlling the establishment of said switchable paths, wherein each said master state device is further constructed and adapted to send as a downstream transmission a master frame in its stream of master frames to a slave transceiver connected thereto via a datalink path, to be decoded at the slave transceiver connected thereto into a stream of computer data packets and, wherein each slave state device is further constructed and adapted to send as an upstream transmission a slave frame in its stream of slave frames to a master transceiver connected thereto via a path in the datalink, said one of the slave frames to be decoded at the master transceiver connected thereto into streams of peripheral data packets, said selected master state devices self-synchronizing communications with said selected one or more slave state devices independently of each other's downstream transmissions of available computer data bits and awaiting receipt of upstream transmissions of corresponding available peripheral data bits.