Patent ID: 7219215

Claim:
A data processing apparatus, comprising: a register data store having a plurality of registers operable to hold data elements, the number of data elements held in each register dependent on a data type of the data elements; a processor operable to perform in parallel a data processing operation on multiple of said data elements occupying different lanes of parallel processing in at least one register of said registers; access logic operable in response to a single access instruction to move a plurality of said data elements between specified registers of said plurality of registers and a continuous block of memory in which a plurality of said data elements are held as an array of structures having a structure format, the structure format having a plurality of components; the single access instruction including data type information identifying the data type associated with the plurality of said data elements to be moved, and identifying the number of said plurality of components in the structure format; and the access logic being operable to rearrange the plurality of said data elements as they are moved such that each of said specified registers holds data elements amongst said plurality of data elements forming one component of said plurality of components, whilst in said memory the plurality of said data elements are held as said array of structures, the rearrangement performed by the access logic being dependent on the data type.