Patent ID: 8179161

Claim:
An apparatus comprising: an input/output pad; a programmable output circuit coupled to the input/output pad, the programmable output circuit to drive an output signal from a processing system to the input/output pad at a plurality of voltages generated by the processing system, wherein the programmable output circuit comprises a programmable output buffer configured to receive a first programmable reference voltage signal as an output high level reference, wherein the first programmable reference voltage signal is a user-selectable voltage generated by the processing system; a programmable input circuit coupled to the input/output pad, the programmable input circuit to detect an input signal to the processing system from the input/output pad at a plurality of voltages generated by the processing system, wherein the programmable input circuit comprises a programmable input comparator configured to receive a second programmable reference voltage signal at an input, wherein the second programmable reference voltage signal is a user-selectable voltage generated by the processing system; an input buffer coupled to the input/output pad, the input buffer to detect the input signal from the input/output pad; and an input selection circuit coupled to the input buffer and the programmable input comparator, the input selection circuit to select an input signal from an output of the input buffer and an output of the programmable input comparator.