Patent ID: 7129558

Claim:
A semiconductor device package comprising: a semiconductor die having a first major surface; a schottky barrier structure connected to a portion of said first major surface; a first electrode electrically connected to said schottky barrier structure; a second electrode electrically connected to said first major surface of said semiconductor die, but spaced from said first electrode; a plurality of solder bumps at least one of which is connected to one said first electrode and said second electrode; and a guard ring formed in said semiconductor die in a region at least partly between said first electrode and said second electrodes wherein said first electrode surrounds said second electrode, and wherein said semiconductor die includes a first lightly doped portion and a second highly doped portion, said first lightly doped portion being disposed over said second highly doped portion, and further comprising a sinker extending from a major surface of said first lightly doped portion to said second highly doped portion, wherein said second electrode is electrically connected to said sinker.