Patent ID: 7335561

Claim:
A method of manufacturing a semiconductor integrated circuit device comprising the steps of: (a) forming a first insulation film over a surface of a semiconductor substrate in a first region and a second region different from said first region of said semiconductor substrate; (b) selectively removing said first insulation film in said second region, with said first insulation film being left in said first region; (c) forming a second insulation film over said semiconductor substrate of said second region; (d) forming a third insulation film over said first insulation film in said first region and over said second insulation film in said second region; (e) forming a first conductive layer over said third insulation film; and (f) forming a first conductive piece in said first region and a second conductive piece in said second region by patterning said first conductive layer, wherein the thickness of said first insulation film is larger than the thickness of said second insulation film; said first insulation film includes silicon and at least one of oxygen and nitrogen; said second insulation film includes silicon and at least one of oxygen and nitrogen; said third insulation film has a greater dielectric constant than each of said first and second insulation films; and the thickness of said third insulation film is larger than the thickness of said first insulation film and said second insulation film.