Patent ID: 7831010

Claim:
A shift register composed of a plurality of stages, wherein each stage of said plurality of stages comprises: first to third shift register components each capable of operating as one-stage shift register; first to third output terminals for outputting first to third output signals serving as output signals of the first to third shift register components, respectively; and a first input terminal receiving said second output signal of a previous-stage, and a second input terminal receiving the third output signal of a subsequent-stage, said first shift register component activates said first output signal outputted from said first output terminal, in response to both of said second output signal of the previous-stage inputted to said first input terminal and said third output signal of the subsequent-stage inputted to said second input terminal, said second shift register component activates said second output signal outputted from said second output terminal, in response to only said second output signal of the previous-stage inputted to said first input terminal, and said third shift register component activates said third output signal outputted from said third output terminal, in response to only said third output signal of the subsequent-stage inputted to said second input terminal.