Patent ID: 7418344

Claim:
An add-on card for detachably coupling to a processing system comprising: an interface for communicating with said processing system while said add-on card is coupled with said processing system; a program storage memory storing at least one operating sequence; a mass storage memory including a portion for storing user data and a program memory portion storing at least two additional operating sequences; a processing unit coupled to said interface, said program storage memory, and said mass storage memory, whereby the processing unit can operate on user data transferred between the mass storage memory and the processing system through the interface according to an operating sequence selected by the processing system from said at least two additional operating sequences; a card bus to which the processing unit, the interface and the program storage memory are connected; and a mass storage interface by which the mass storage memory is connected to the card bus, wherein the mass storage interface is a non-linear interface; wherein the mass storage memory stores data in a non-linear structure, wherein the data is only accessible in a block that is too lame for the processing unit to utilize without first reading out and caching the block, and wherein the mass storage interface is operative to retrieve the data from the mass storage memory and store the data in a linear form usable by the processing unit.