Patent ID: 7915067

Claim:
A wafer level processing method for forming a plurality of image sensors each having a pixel array configured for backside illumination, the image sensors being formed utilizing an image sensor wafer, the image sensor wafer comprising a substrate, a buried oxide layer formed over the substrate, and a seed layer formed over the buried oxide layer, the method comprising: forming a sacrificial oxide layer over a frontside of the seed layer; depositing a photoresist over the sacrificial oxide layer; patterning the photoresist to expose only pixel array areas of the image sensor wafer, wherein each pixel array area defines an area where a pixel array for a respective one of the plurality of image sensors will be formed; implanting a dopant having an n conductivity type into the frontside of the seed layer in only the exposed pixel array areas to form a doped seed layer where the implanted dopant extends to an interface between a backside of the seed layer and the buried oxide layer; after implanting the dopant into the frontside of the seed layer in only the exposed pixel array areas, removing the photoresist and removing the sacrificial oxide layer; after removing the sacrificial oxide layer, forming an epitaxial layer having a p conductivity type over the frontside of the doped seed layer; and after the epitaxial layer is formed, further processing the image sensor wafer to form the plurality of image sensors, wherein the further processing includes forming the pixel arrays for the plurality of image sensors.