Patent ID: 8404593

Claim:
A method of forming a semiconductor device comprising: providing a first insulating layer on an underlying contact region of the semiconductor device, the first insulating layer having an upper surface; forming a first opening in the first insulating layer to expose the underlying contact region; providing a first conductive pattern in the first opening, an upper portion of the first conductive pattern being of a first width, an upper surface of the first conductive pattern being recessed relative to the upper surface of the first insulating layer so that the upper surface of the first conductive pattern has a height relative to the underlying contact region that is less than a height of the upper surface of the first insulating layer relative to the underlying contact region; providing a second insulating layer on the first insulating layer; providing a second conductive pattern contacting the upper surface of the first conductive pattern, wherein the second conductive pattern is in a second opening through the second insulating layer, a lower portion of the second conductive pattern being of a second width that is less than the first width; providing insulating line spacers between sidewalls of the second opening and sidewalls of the second conductive pattern, and providing a third conductive pattern on the first insulating layer that neighbors the second conductive pattern in a horizontal direction, relative to the underlying first conductive pattern, wherein providing the second conductive pattern comprises: forming a second opening in the second insulating layer to expose the upper surface of the first conductive pattern; and providing the second conductive pattern in the second opening in contact with the upper surface of the first conductive pattern, and wherein a leakage current path between the first conductive pattern and the third conductive pattern along an upper boundary of the first insulating layer has a length that is greater than a horizontal distance between the first conductive pattern and the third conductive pattern.