Patent ID: 6958252

Claim:
A method of manufacturing a flat panel display, comprising: forming a pixel electrode and a semiconductor layer, spaced apart from each other, on a substrate; forming a first insulating layer over a surface of the substrate to cover the pixel electrode and the semiconductor layer; forming a gate electrode on a portion of the first insulating layer corresponding to a location of the semiconductor layer; forming a second insulating layer over the surface of the substrate to cover the gate electrode; forming contact holes in the first and second insulating layers to expose a portion of the pixel electrode and portions of the semiconductor layer; forming source and drain electrodes on the second insulating layer electrically connecting the source electrode to the semiconductor layer through one of the contact holes, and electrically connecting the drain electrodes to the semiconductor layer and the pixel electrode through another one of the contact holes; forming a photoresist layer over the surface of the substrate exposing a portion of the second insulating layer over the pixel electrode; forming an opening portion by etching the first and second insulating layers to expose a portion of the pixel electrode, using the photoresist layer as a mask; forming an electroluminescence (EL) layer on the exposed portion of the pixel electrode; and forming a cathode over the EL layer and the photoresist layer.