Patent ID: 6953738

Claim:
A method for forming a silicon-on-insulator transistor comprising: providing an insulating layer; forming an active region overlying the insulating layer, a portion of the active region providing an intrinsic body region; forming a body tie access region within the active region and also overlying the insulating layer and laterally adjacent the intrinsic body region, the body tie access region making electrical contact to the intrinsic body region; forming a gate electrode overlying the intrinsic body region for providing electrical control of the intrinsic body region of the silicon-on-insulator transistor and extending over a portion of the body tie access region to minimize parasitic capacitance and gate electrode leakage; forming halo/extension implants of dopants into the intrinsic body region while substantially blocking the halo/extension implants of dopants from the body tie access region; forming a sidewall spacer dielectric material adjacent a substantially constant length of the gate electrode and overlying the body tie access region; forming first and second current electrodes adjacent opposite sides of the intrinsic body region; and forming a body tie diffusion within the active region end laterally offset from the body tie access region and electrically coupled to the body tie access region.