Patent ID: 8732400

Claim:
Interconnect circuitry for a data processing apparatus, said interconnect circuitry being configured to provide data routes via which at least one initiator device may access at least one recipient device, said interconnect circuitry comprising: at least one input configured to receive transaction requests from said at least one initiator device; at least one output configured to output said transaction requests to said at least one recipient device; a plurality of paths configured to transmit said transaction requests between said at least one input and said at least one output; wherein at least one of said transaction requests comprises a data store maintenance request requesting a data store maintenance operation to be performed on data stores within said data processing apparatus; and control circuitry configured to route said transaction requests along at least one of said plurality of paths from said at least one input to said at least one output; wherein said control circuitry is configured to respond to receipt of said data store maintenance request by transmitting said data store maintenance request along at least one of said plurality of paths followed by a barrier transaction request, said control circuitry configured to maintain an ordering of at least some of said transaction requests with respect to said barrier transaction request within a stream of said transaction requests passing along said at least one of said plurality of paths, such that said at least some transaction requests prior to said data store maintenance request in said stream of transaction requests are held in front of said data store maintenance request by said barrier transaction request and at least some of said transaction requests subsequent to said data store maintenance request in said stream of transaction requests are held behind said data store maintenance request by said barrier transaction request.