Patent ID: 8248974

Claim:
A method for controlling a timing for a multi-channel full-duplex transceiver, the method comprising the following steps: generating a first clock and a second clock using a controlled oscillator in accordance with a control code, where a frequency of the second clock corresponds to a frequency of the first clock; transmitting in parallel a plurality of outgoing signals onto a plurality of channels, respectively, in accordance with a timing defined by the first clock; receiving, sampling, and equalizing in parallel a plurality of incoming signals from said plurality of channels, respectively, in accordance with a timing defined by the second clock to generate in parallel a plurality of equalized signals, respectively; converting in parallel said plurality of equalized signals into a plurality of refined signals, respectively, in accordance with a timing defined by the first clock; and generating the control code, wherein in a first operation mode the control code is established by detecting a timing difference between an output clock of the controlled oscillator and a reference clock, and in a second operation mode the control code is established by detecting a timing embedded in one of said refined signals.