Patent ID: 8490184

Claim:
An apparatus comprising: at least one processor; a memory coupled to the at least one processor; a computer program residing in the memory, the computer program including a plurality of external call references to code external to the computer program; and a program verification mechanism residing in the memory and executed by the at least one processor before the at least one processor executes the computer program, the program verification mechanism, after the computer program has been loaded, selecting one of the plurality of external call references and analyzing the selected external call reference and determining an entry point in the computer program corresponding to the selected external call reference, the program verification mechanism determining whether the corresponding entry point is in a list of trusted entry points that specifies a trusted entry point for the selected external call reference, and if so, the program verification mechanism repeats the analysis for each of the plurality of external call references, and when all of the plurality of external call references have the corresponding entry point in the list of trusted entry points that specifies a trusted entry point, providing a first verification of the computer program, wherein, in response to the first verification of the computer program, the program verification mechanism determines whether a code portion that includes one of the plurality of external call references is in a list of allowed caller code for the corresponding entry point, and if so, the program verification mechanism provides a second verification of the computer program, wherein the at least one processor begins execution of the computer program after receiving the first verification of the computer program and the second verification of the computer program from the program verification mechanism.