Patent ID: 7723788

Claim:
A semiconductor device comprising: a thin film transistor comprising: a semiconductor layer formed on an insulating surface; a first impurity region and a second impurity region formed in the semiconductor layer; a channel region formed between the first impurity region and the second impurity region; a first metal silicide region formed on the first impurity region and a second metal silicide region formed on the second impurity region; a gate electrode formed over the semiconductor layer with a gate insulating film interposed therebetween; a first side wall and a second side wall adjacent to the gate electrode with a first insulating film interposed between the first side wall and the gate electrode; a second insulating film formed over the gate electrode, the first insulating film, the first side wall and the second side wall; and an electrode formed over the second insulating film and electrically connected to the first metal silicide region, wherein the first metal silicide region is isolated from the insulating surface by the first impurity region and the second metal silicide region is isolated from the insulating surface by the second impurity region, and wherein a maximum width of the first side wall in a channel direction is larger than a thickness of the first insulating film.