Patent ID: 7033864

Claim:
A method for fabricating a semiconductor assembly comprising the steps of: providing a semiconductor device having a plurality of metallic contact pads, said device outlined by sides; attaching a reflow bump to each of said contact pads; providing an electrically insulating substrate having a surface and a plurality of metallic terminal pads in locations matching the locations of said chip contact pads; forming in said substrate surface a plurality of grooves and humps distributed between said terminal pad locations; attaching said device to said substrate so that each of said reflow bumps attached to one of said chip contact pads is also attached to its matching substrate terminal pad, creating a gap spacing said device and said substrate apart; depositing a quantity of adherent, viscous polymer at one of said chip sides so that said polymer is pulled into said gap by capillary action; controlling said capillary action by said plurality of grooves and humps so that the capillary flow of said polymer progresses in a substantially linear front along through said gap; and controlling time and temperature during said capillary flow to maintain said about linear progression front until said gap is filled with polymer, substantially without voids.