Patent ID: 7616547

Claim:
A high-speed mixed analog/digital PRML data detection and clock recovery apparatus, comprising: a variable gain amplifier for amplifying a gain of an input analog RF signal; an analog equalizer for equalizing the amplified analog RF signal; an analog-to-digital (A/D) converter for sampling and converting into a digital RF signal the equalized analog RF signal; a DC offset remover for removing DC offset components out of the digital RF signal and outputting a DC offset removal signal; a level error detector for detecting from the DC offset removal signal a determination level of the DC offset removal signal to have any one value of reference levels required by a desired channel characteristics model, and calculating level error values being a difference between the determination level and an actual level of the DC offset removal signal; a Viterbi decoder for decoding the DC offset removal signal and recovering data; and an adaptive digital controller separately storing the level error values according to predetermined frequencies, calculating predetermined coefficient values for each frequency component based on the level error values, and applying the calculated predetermined coefficient values to D/A converters applying the D/A converted calculated predetermined coefficient values to the variable gain amplifier and the analog equalizer for the respective amplifying and equalizing, wherein the adaptive digital controller further comprises: a frequency detector for inputting a determination signal of the level error detector, from which the determination level is detected to have the one value of the reference levels, comparing a frequency of the determination signal to a predetermined threshold frequency, and calculating frequency components of the determination signal; a scheduler for storing the level error values in a first accumulator when the frequency components of the determination signal are high frequencies, and storing the level error values in a second accumulator when the frequency components of the determination signal are low frequencies, based on information on the calculated frequency components of the determination signal; and a coefficient calculator for calculating a first coefficient for controlling a gain of the analog equalizer based on level error values (e H ) stored in the first accumulator, and calculating a second coefficient for controlling a gain of the variable gain amplifier based on level error values (e L ) stored in the second accumulator.