Patent ID: 7948458

Claim:
An amplifier circuit comprising: a buffer amplifier which stabilizes an input signal and outputs a stabilized output signal; a first switch which is connected to an input terminal of the buffer amplifier and switches an input of an input signal to the input terminal of the buffer amplifier ON and OFF; a first capacitor having a first terminal connected to the input terminal of the buffer amplifier and a second terminal connected to an output terminal of the buffer amplifier via a second switch; and a third switch which is connected between the input side of the first switch and the second terminal of the first capacitor and switches supply of the input signal to the second terminal of the first capacitor ON and OFF, wherein in a state in which the second switch and the third switch are switched OFF, the first switch is switched ON, and the input terminal of the buffer amplifier is set to a voltage of the input signal, subsequently, in a state in which the first switch is switched ON and the third switch is switched OFF, the second switch is switched ON so that the first capacitor is charged with a potential difference between the input signal and the output signal, thereafter, in a state in which the third switch is switched OFF, the first switch is switched OFF after the second switch is switched OFF, and then, in a state in which the first switch and the second switch are switched OFF, the third switch is switched ON, and the input signal is supplied to the second terminal of the first capacitor so that a voltage derived by adding a difference between the input signal and the output signal to the input signal is supplied to the input terminal of the buffer amplifier; a fourth switch which switches connection of a connection point between the first switch and the first capacitor to a power supply; a fifth switch which switches connection of a connection point between the first capacitor and a second capacitor to the power supply, the fourth switch and the fifth switch being switched ON and OFF by an identical signal, the identical signal for switching the fourth switch and the fifth switch is also a signal for switching sixth switches comprising charge control TFTs, the input signal is an analog output obtained by charging a plurality of capacitors in accordance with a value of each bit of a digital signal and averaging charged voltages of the plurality of capacitors, wherein each of the plurality of capacitors has a capacitance weighted corresponding to each bit of the digital signal of a plurality of bits, and one of the charge control TFTs is provided for each of the plurality of capacitors and the charge control TFTs are switched ON and OFF for the charging of the plurality of capacitors.