Patent ID: 7867862

Claim:
A method for fabricating a high voltage device comprising: providing a substrate with a device region; forming a first trench isolation structure in the substrate within the device region, the first trench isolation structure comprising first and second opposing sidewalls and a bottom portion connecting the first and second sidewalls; forming a gate stack on a surface of the substrate in the device region with a channel beneath the gate stack, the gate stack having first and second opposing sides, the first side being adjacent to the first trench isolation structure; forming a first diffusion region in the substrate in the device region, the first diffusion region is separated from the channel by the first trench isolation structure; and forming a first drift region in the substrate coupling the first diffusion region to the channel, wherein the first drift region comprises a non-uniform depth conforming to the profile of the bottom portion and the first sidewall, and at least a portion of the profile of the second sidewall of the first trench isolation structure.