Patent ID: 8037387

Claim:
A conversion device for converting a test pattern which is given in advance for a logic circuit and which has a plurality of test vectors detecting a transition delay fault, before applying the test pattern to the logic circuit, into a new test pattern which detects the transition delay fault and which has a different bit constitution of logic values from that of the test pattern given in advance, comprising: the test pattern given in advance whose constitution elements being N (N≧2) test vectors scheduled to be applied successively to the logic circuit, the N (N≧2) test vectors constituting the constitution elements being test vectors where relations of bits between each test vector are not necessarily inversion relations and where bits in each test vector are not necessarily aligned alternately; logic value combination decision means for deciding a combination of logic values of bits which cannot be identified as don't care bits, the combination of logic values are in the test pattern given in advance which satisfies a condition for detection of a transition delay fault of the logic circuit which can be detected by applying the constitution elements, the condition for detection determined with an N-time-frame model (N≧2), the logic value combination decision means for deciding a combination of logic values in the test pattern given in advance which satisfies both of two conditions which are the conditions for detection of the transition delay fault and which consist of an initial condition which is needed before a signal value changes and a condition for checking the signal value after the signal value changes; and don't care identification means for identifying a logic value of a bit, which is included in the test pattern given in advance but is not included in the combination of logic values decided by the logic value combination decision means, as don't care, wherein the new test pattern comprises the combination of logic values decided by the logic value combination decision means and the don't care identified by the don't care identification means, and the test pattern given in advance is converted into the new test pattern with less deterministic logic values than those of the test pattern given in advance.