Patent ID: 7563721

Claim:
A method for fabricating a semiconductor device, the method comprising: forming an etch target layer over a cell region and a peripheral region of the semiconductor device; forming a hard mask layer over the etch target layer; forming an anti-reflective coating layer over the hard mask layer; forming a line-type photoresist pattern over the anti-reflective coating layer such that the photoresist pattern in the cell region has a width larger than that of a final pattern structure and the photoresist pattern in the peripheral region has a width that suppresses an incidence of pattern collapse; sequentially etching the anti-reflective coating layer and the hard mask layer by using the photoresist pattern as an etch mask until widths of a remaining anti-reflective layer and a remaining hard mask layer are smaller than the width of the photoresist pattern; removing the photoresist pattern; etching the etch target layer by using the remaining anti-reflective layer and the remaining hard mask layer as an etch mask; and removing the remaining anti-reflective layer.