Patent ID: 8399915

Claim:
A semiconductor device comprising: a p-type semiconductor substrate a crystal plane of a main surface of which is a (110) plane or an off-plane inclined at a predetermined off-angle with respect to the (110) plane; a semiconductor layer on the semiconductor substrate; an elongate trench in the semiconductor layer; a gate electrode inside the elongate trench with a gate dielectric film between the gate electrode and the elongate trench, wherein the gate dielectric film is formed on a base surface of the elongate trench and is formed on a side wall of the elongate trench along its longitudinal direction; an n-type channel region along a side wall of the elongate trench; and a p-type source region and a p-type drain region holding the channel region therebetween in a thickness direction of the semiconductor substrate, wherein a crystal plane of the base surface of the elongate trench and a crystal plane of the side wall of the elongate trench along its longitudinal direction are each a (110) plane, and wherein the gate dielectric film on the base surface and the gate dielectric film on the side wall along the longitudinal direction of the elongate trench have a same thickness.