Patent ID: 7538003

Claim:
A method for fabricating a metal oxide semiconductor (MOS) transistor, the method comprising: forming a source region of a first conductivity type and a drain region of the first conductivity type, which are separated from each other by a channel region, in upper regions of a semiconductor substrate; forming a gate stack over the channel region; feeding hydrogen only at junctions defined between the channel region and the source and drain regions by a tilt implantation method to neutralize dopants of the first conductivity type present within particular portions of the source and drain regions that are adjacent to the channel region, said feeding hydrogen comprising feeding the hydrogen by hydrogen annealing within a furnace; and controlling the particular portions of the source and drain regions and the amount of the dopants of the first conductivity type to be neutralized by varying the internal temperature of the furnace and the amount of the hydrogen fed by the hydrogen annealing.