Patent ID: 7159170

Claim:
A decoder that is operable to perform symbol decoding of an LDPC (Low Density Parity Check) coded modulation signal, the decoder comprising: a check node update functional block that calculates a plurality of forward metrics and a plurality of backward metrics that correspond to symbol of a plurality of symbols of the LDPC coded modulation signal; wherein the check node update functional block uses the plurality of forward metrics and the plurality of backward metrics that correspond to each symbol of the plurality of symbols of the LDPC coded modulation signal to update a plurality of edge messages that corresponds to a plurality of edges that communicatively couple a plurality of symbol nodes to a plurality of check nodes within an LDPC coded modulation bipartite graph that corresponds to an LDPC code; a symbol sequence estimate and symbol node update functional block that computes a plurality of possible soft symbol estimates for each symbol of the plurality of symbols of the LDPC coded modulation signal; wherein the symbol sequence estimate and symbol node update functional block updates the plurality of edges using the plurality of possible soft symbol estimates; wherein the check node update functional block and the symbol sequence estimate and symbol node update functional block cooperatively perform iterative decoding of the plurality of symbols of the LDPC coded modulation signal; and wherein, during a last iterative decoding iteration, the symbol sequence estimate and symbol node update functional block makes a best estimate for each symbol of the plurality of symbols of the LDPC coded modulation signal using that symbol's corresponding plurality of possible soft symbol estimates.