Patent ID: 6844252

Claim:
A semiconductor processing method of forming a conductive transistor gate over a substrate comprising: forming a dielectric layer on a substrate; forming a conductive gate structure over the dielectric layer, the gate structure comprising: a polysilicon material layer; a conductive reaction barrier layer over the polysilicon material layer; a metal layer over the conductive reaction barrier layer; and an insulative cap, the gate structure having sidewalls defining a lateral dimension of the gate structure, the sidewalls comprising a polysilicon material surface and a metal-comprising surface; forming a non-oxide material over the gate structure and the dielectric layer, the non-oxide material being formed directly against the sidewalls along the entirety of the polysilicon material surface to form a non-exposed polysilicon material surface and along the entirety of the metal-comprising surface to form a non-exposed metal-comprising surface; anisotropically etching the non-oxide material to form spacers on the sidewalls, the spacers laterally adjacent the gate structure and joining with the gate dielectric layer, the gate dielectric layer extending laterally outward from the gate structure and spacers; and while the spacers are on the sidewalls and joining with the gate dielectric layer, subjecting the substrate to oxidizing conditions effective to oxidize only that portion of the gate structure adjacent the spacers and the dielectric layer, the spacers protecting the metal-comprising surface and a first portion of the non-exposed polysilicon material surface from oxidation during the subjecting, a second portion of the non-exposed polysilicon material surface being oxidized during the subjecting.