Patent ID: 8872316

Claim:
A manufacturing method of a semiconductor device, the method comprising the steps of: (a) providing a lead frame including a plurality of die pads, an upper surface of which forms a rectangular shape in plan view, a plurality of support pins that support each of the die pads, a plurality of inner leads arranged around the die pads, a plurality of outer leads connected to each of the inner leads, and a tie bar that couples the outer leads to each other; (b) after step (a), mounting, over the upper surfaces of the die pads, a semiconductor chip including a main surface, a plurality of electrode pads formed in the main surface, and a back surface opposite to the main surface; (c) after step (b), electrically coupling, via a plurality of wires, the electrode pads of the semiconductor chip to the inner leads, respectively; and (d) after step (c), forming a sealing body that seals the support pins, the inner leads, the semiconductor chip, and the wires, wherein each of the die pads is arranged side by side, the support pins include a first support pin connected to the outer lead, a second support pin that is arranged between two of the inner leads and that is connected to the tie bar, and a third support pin connected to a side of the die pad different from sides to which the first support pin and the second support pin are connected, respectively, and wherein the first, the second, and the third support pins are integrally formed together with each of the die pads.