Patent ID: 8719580

Claim:
A method for verification of data of an electronic system comprising a trusted processor, a trusted cache memory and a mass storage memory, where the data are stored in the mass storage memory, the memories are divided into blocks, each block is identified by an address, the data are addressed via a verification tree, the verification tree is a tree structure comprising nodes where descendent nodes are attached to a root node and each node stores the address of the block containing each descendent node of the node and a digest value of each block storing such descendent node, the method, which maintains a current digest value, comprises access to searched data by: a) initialising a current node at the root node by initialising the current digest value as the value of a reference digest of the block containing the root node, b) loading the block containing the current node in the trusted cache memory, c) calculating a digest value of the loaded block, d) reporting corruption of data if the calculated digest is different from the current digest value and stopping access to the data searched, e) sending back the current node if the current node contains the searched data and stopping the step for access to the searched data, f) determining the child node from which a sub-tree containing the data is derived, g) assigning the value of the digest of the child node stored in the current node as the current digest, the child node becoming the current node, h) looping to the loading step b).