Patent ID: 7880296

Claim:
A chip carrier structure having a semiconductor chip embedded therein and a protective metal layer formed thereon, comprising: a chip carrier including a carrier board having a first surface, a second surface and at least one opening penetrating the first and second surfaces, the semiconductor chip having an active surface with electrode pads and an inactive surface provided in the opening of the carrier board, a circuit build up structure formed on the first surface of the carrier board and the active surface of the semiconductor chip, comprising at least one conductive via for electrically connecting to the electrode pads of the semiconductor chip, and having a plurality of electrically connecting pads on a surface of the circuit build up structure, and a solder mask layer formed on the circuit build up structure having openings to expose the electrically connecting pads; a conductive layer formed on a bottom surface and side surfaces of the chip carrier and the inactive surface of the semiconductor chip wherein part of the inactive surface of the semiconductor chip is exposed from the conductive layer; and an electroplating metal layer electroplated on the conductive layer, the electroplating metal layer formed above the bottom surface and side surfaces of the chip carrier and the inactive surface of the semiconductor chip, and the conductive layer and the electroplating metal layer not connecting to the active surface and the electrode pads of the semiconductor chip.