Patent ID: 8319316

Claim:
A semiconductor memory device comprising: a memory cell array including a memory cell transistor with a charge layer formed on a semiconductor layer with a gate insulating film interposed therebetween; and a peripheral circuit including at least a first transistor, wherein the first transistor includes: a first gate electrode disposed on a surface of the semiconductor layer with a first gate insulating film interposed therebetween; a first channel region of a first conductivity type formed in the surface of the semiconductor layer close to a region located immediately below the first gate electrode, the first channel region having a first impurity concentration; a first source region of the first conductivity type and a first drain region of the first conductivity type each formed in the surface of the semiconductor layer and each having a second impurity concentration higher than the first impurity concentration; a first overlapping region of the first conductivity type formed in the surface of the semiconductor layer immediately below the first gate electrode where the first channel region overlaps the first source region and the first drain region, the first overlapping region having a third impurity concentration higher than the second impurity concentration; a first contact region of the first conductivity type formed in at least a part of a surface of each of the first source region and the first drain region and having a fourth impurity concentration higher than the second impurity concentration; and a first impurity diffusion region of the first conductivity type formed in a partial region of at least one of the first source region and the first drain region and having a fifth impurity concentration higher than the second impurity concentration and lower than the fourth impurity concentration, and the first impurity diffusion region is formed in contact with the first contact region and away from the first overlapping region and positioned at least in a region between the first contact region and the first overlapping region.