Patent ID: 8749410

Claim:
A multi-lane analog-to-digital converter (ADC) for converting an analog input from an analog signal domain to a digital signal domain to provide a digital output, the multi-lane ADC comprising: a reference module configured to provide a reference signal that is substantially uncorrelated with the analog input; a summation module configured to superimpose the reference signal onto the analog input to provide a superimposed analog input; a first ADC module configured to convert the superimposed analog input in accordance with a first phase of a sampling clock to provide a first superimposed digital sample, the first superimposed digital sample including a first digital representation of the reference signal and a first digital representation of the analog input; a second ADC module configured to convert the superimposed analog input in accordance with a second phase of a sampling clock to provide a second superimposed digital sample, the second superimposed digital sample including a second digital representation of the reference signal and a second digital representation of the analog input; and a compensation module configured to compare the first and the second digital representations of the reference signal to estimate an unwanted phase offset between the first and the second phases of the sampling clock, to adjust phases of the first phase and the second phase to compensate for the unwanted phase offset, and to interleave the first and the second digital representations of the analog input to provide the digital output.