Patent ID: 7784014

Claim:
A processor-based method for generating a hardware description language (HDL) specification of a network packet processor, comprising: inputting a textual language specification of processing by the network packet processor of network packets; and generating and storing the HDL specification of the network packet processor in response to the textual language specification, the network packet processor including a look-ahead stage, an operation stage, an insert/remove stage, and an interleave stage, wherein the textual language specification includes: a respective identifier of a plurality of ports of the network packet processor, the ports including at least one input port for receiving a first plurality of network packets and at least one output port for transmitting a second plurality of network packets; a respective format for each of at least one type of the first and second pluralities of network packets, the respective format for the type including a format of a plurality of fields of the type; and a respective procedure for each of the at least one input port and for each type of the first plurality of network packets received at the input port, the respective procedure for processing each network packet of the type that is received at the input port, the respective procedure including at least one action for modifying a first one of the fields of the type as a function of at least one of state data stored by the network packet processor and at least a second one of the fields of the type.