Patent ID: 7028160

Claim:
An information processing system comprising: a main memory; a processing unit which executes a prefetch instruction included as one of a plurality of instructions of a program in said main memory; and two hierarchical level data caches connected to said processing unit and said main memory and arranged so that a primary cache close to said processing unit is a first level of a cache hierarchy and a secondary cache close to said main memory is a second level in said cache hierarchy, wherein said prefetch instruction, when executed, causes said processing unit to selectively perform, prior to executing a subsequent load instruction, one of a plurality of a prefetch operations including transferring a certain quantity of operand data to be used in the subsequent load instruction from said main memory to both said primary level cache and said secondary level cache, and transferring a certain quantity of operand data to be used in the subsequent load instruction from said main memory to said secondary level cache only, and wherein said prefetch instruction includes a plurality of indication bits for specifying cache levels to which said operand data is to be transferred and for specifying a quantity of said operand data to be transferred from said main memory.