Patent ID: 8823564

Claim:
A sampling circuit comprising: a continuous section that is a circuit transmitting a continuous signal; a sampling and holding section that is connected to the continuous section and that is a circuit transmitting a signal which is sampled but not quantized; and a digital section that is connected to the sampling and holding section and that is a circuit transmitting a signal which is sampled and quantized, wherein the sampling and holding section includes a plurality of capacitive elements for accumulating charge generated by an input signal, and a plurality of first switching elements that correspond to the plurality of capacitive elements, respectively, and wherein a plurality of first clock signals supplied to the plurality of first switching elements are signals having different operation timings, and the first switching elements perform an ON/OFF operation in response to the first clock signals, respectively, wherein the first switching elements hold the charge respectively accumulated in the plurality of capacitive elements, and wherein the continuous section includes a plurality of second switching elements for accumulating charge in the plurality of capacitive elements, respectively, wherein a plurality of second clock signals supplied to the plurality of second switching elements are signals having edges that are triggers for determining operation start times and are different from each other, and edges that are triggers for determining operation end times are identical to each other, and the first clock signals and the second clock signals have a reverse-phased and non-overlapping relationship, and wherein the second switching elements perform an ON/OFF operation in response to the second clock signals, respectively.