Patent ID: 6972475

Claim:
A semiconductor device comprising an N channel metal oxide semiconductor (MOS) transistor, the N channel MOS transistor including: a P type semiconductor substrate; an N type epitaxial region on the P type semiconductor substrate; a first P type buried layer isolating the N type epitaxial region from another element; an N well in the N type epitaxial region; a drain region in the N well; a P well surrounding the N well and not in physical contact with the N well; a source region in the P well; a gate on the drain region and the source region; a second P type buried layer between the N well and the P well and the P type semiconductor substrate, contiguous to the P well and not in physical contact with the P type semiconductor substrate and the first P type buried layer; an N type buried layer contiguous to the second P type buried layer and the P type semiconductor substrate and not in physical contact with the P well, the N well, and the first P type buried layer; and a first electrode electrically connected to the N type epitaxial region and a second electrode electrically connected to the P type semiconductor substrate through the first P type buried layer, the first and second electrodes being connected to ground potential.