Patent ID: 8841723

Claim:
A method for making an LDMOS device having an increased punch-through voltage, comprising: providing a substrate; forming a well of a first conductive type in the substrate; forming an isolation region in the substrate; forming a body region of a second conductive type in the well; forming a source in the body region; forming a drain in the well; forming a gate structure on the substrate, wherein the source and the drain are separated by a drift region, and the gate is formed on the drift region; and forming a first conductive type dopant region beneath the body region, for increasing a punch-through voltage, by implanting first conductive type impurities beneath the body region, and the implantation is performed according to parameters of: an acceleration energy from 40,000 electron volts to 400,000 electron volts; an implantation species containing phosphorous, arsenic, or antimony ions; and an implantation dosage from 1E12 to 3E15 ions per centimeter square; wherein the substrate is a semiconductor substrate of a second conductive type and having an epitaxial layer, and the first conductive type dopant region is a buried layer.