Patent ID: 7790554

Claim:
A method of manufacturing a semiconductor integrated circuit device having a first MISFET in a first MISFET forming region of a semiconductor substrate, comprising steps of: (a) forming grooves in the first MISFET forming region of the semiconductor substrate; (b) depositing a first insulating film over the first MISFET forming region of the semiconductor substrate; (c) polishing the first insulating film in order to embed the first insulating film into the grooves; (d) forming first semiconductor regions in the first MISFET forming region of the semiconductor substrate, wherein the first semiconductor regions serve as part of source and drain regions of the first MISFET; (e) forming a first gate insulating film of the first MISFET over the first MISFET forming region of the semiconductor substrate by a thermal oxidation method; (f) forming a second gate insulating film of the first MISFET over the first gate insulating film and the first insulating film by a CVD method; (g) forming a first gate electrode of the first MISFET over the second gate insulating film; and (h) forming second semiconductor regions in the first MISFET forming region of the semiconductor substrate, wherein the second semiconductor regions serve as part of source and drain regions of the first MISFET, wherein the first MISFET is used for a driver of a liquid crystal display, wherein an impurity concentration of the second semiconductor regions is higher than an impurity concentration of the first semiconductor regions, wherein the first semiconductor regions surround the second semiconductor regions and the grooves, wherein a thickness of the second gate insulating film is thicker than a thickness of the first gate insulating film, wherein ends of the second gate insulating film are formed over the first insulating film in a direction from the source region to the drain region, and wherein ends of the first gate electrode are formed over the first insulating film through the second insulating film in a direction from the source region to the drain region.