Patent ID: 8592323

Claim:
A method for enhancing the recognition of an integrated circuit, said method comprising: forming at least one semiconductor device-containing region comprising at least one semiconductor device formed on and/or within a portion of a semiconductor substrate; providing at least a stressor layer on an exposed surface of said at least one semiconductor device-containing region, wherein said stressor layer has a fracture toughness that is greater than that of said semiconductor substrate; applying a flexible handle layer on an exposed surface of said stressor layer; removing a material semiconductor layer from said semiconductor substrate by spalling, wherein said material semiconductor layer is attached to said at least one semiconductor device-containing region; removing a portion of said material semiconductor layer to provide a thinned material semiconductor layer, wherein said removing the portion of said material semiconductor layer comprises utilizing a p-well formed in said semiconductor substrate as an end-point detection means; and imaging the at least one semiconductor device-containing region including said at least one semiconductor device.