Patent ID: 7947555

Claim:
A method of making a silicon carbide semiconductor device having an accumulation mode MOSFET in which an accumulation mode channel formed in a channel layer by control of an application voltage to a gate electrode is controlled so that an electronic current flows between a source electrode and a drain electrode through a source region and a drift layer, the method comprising: preparing a substrate made of silicon carbide and having a first or second conductivity type; forming the drift layer on the substrate, the drift layer being made of silicon carbide and having the first conductivity type, an impurity concentration of the drift layer being lower than an impurity concentration of the substrate; forming a current scattering layer on the drift layer, the current scattering layer being made of silicon carbide and having the first conductivity type, an impurity concentration of the current scattering layer being higher than an impurity concentration of the drift layer; forming a base region on the current scattering layer, the base region being made of silicon carbide and having the second conductivity type; forming the source region on the base region, the source region being made of silicon carbide and having the first conductivity type, an impurity concentration of the source region being higher than the impurity concentration of the drift layer; forming a trench extending deeper than the source region and the base region to reach the current scattering layer or the drift layer, the source region and the base region being located on each side of the trench; forming the channel layer on a side wall of the trench, the channel layer being made of silicon carbide and having the first conductivity type; forming a gate insulating layer on a surface of the channel layer, the gate insulating layer being spaced from the base region by a predetermined distance; forming the gate electrode on the gate insulating layer inside the trench; forming the source electrode electrically connected to the source region and the base region; forming the drain electrode on a back side of the substrate; and forming a deep layer located under the base region and reaching the drift layer by penetrating the current scattering layer, the deep layer extending deeper than the trench and extending in a direction of the normal to the side wall of the trench, the deep layer having the second conductivity type, wherein the forming the deep layer includes forming a lower layer of the deep layer and an upper layer of the deep layer, the lower layer extending in one direction, the upper layer being located at a position corresponding to the lower layer and connected to the lower layer, the forming the lower layer includes placing a first mask on a surface of the drift layer and performing ion implantation using the first mask, and the forming the upper layer includes placing a second mask on a surface of the current scattering layer and performing ion implantation using the second mask.