Patent ID: 7523265

Claim:
An apparatus, comprising: a cache; a fill buffer associated with the cache, wherein the fill buffer comprises a first line to associate with a first request to receive a line of memory to store in the cache, wherein the fill buffer comprises status bits associated with the first line to indicate an ownership status of the first line; and a cache controller coupled with the fill buffer, configured to receive a request for exclusive ownership of the line of memory from a processor associated with the cache, to determine that the line of memory is not within the cache, to determine that the first request for the line of memory is associated with the first line of the fill buffer and is for shared ownership, in response to receiving the request for exclusive ownership, after issuing the first request and prior to writing the first line from the fill buffer into the cache, to transmit the request for exclusive ownership of the line of memory to another processor, wherein the request for exclusive ownership is associated with the first line of the fill buffer, after receiving the request for exclusive ownership from the processor, and to modify the ownership status of the line of memory received in response to the first request in the first line of the fill buffer upon receipt of a grant of the exclusive ownership for the line of memory responsive to the request for exclusive ownership and prior to writing the first line from the fill buffer into the cache.