Patent ID: 6847237

Claim:
A circuit to drive a high-voltage H-bridge using CMOS technology comprising: a control logic circuit having inputs and output, wherein a first input is a signal defining the direction of the current between the mid-points of the H-bridge and a second -input comprises control signals defining the behavior of said H-bridge and the output are control signals for high-side and low-side drivers of said H-bridge; a power management module having an input and outputs wherein the input is a battery voltage and a first output is a voltage to feed the low-side drivers and a second output feeds a charge pump to drive the high-side drivers of the H-bridge and to drive a module reverse supply protection, wherein said charge pump comprises a switching network controlled by a clocking scheme; said high-side drivers of the H-bridge each having inputs and an output, wherein a first input receives one of said output control signals from said control logic circuit and a second input is a voltage from said charge pump and the output is driving ione of the corresponding high-side transistors of said H-bridge via a resistor; a first voltage dividers, wherein a first resistor is coupled between the output of the first of said high-side drivers and a first midpoint of said H-bridge and a second resistor is coupled between said first midpoint and ground voltage, keeping the reference voltage of said first high-side drivers on the voltage levels of said first -midpoints of said H-bridge; a second voltage divider, wherein a first resistor is coupled between the output of the second of said high-side drivers and a second midpoint of said H-bridge and a second resistor is coupled between said second midpoint and ground voltage, keeping the reference voltage of said second high-side driver on the voltage level of said second midpoint of said H-bridge; said low-side drivers each having inputs and an output, wherein a first input receives one of said output control signals from said control logic circuit and a second input is the first output of said power management module and the output is driving one of the corresponding low-side transistors of said H-bridge; said two high-side transistors of said H-bridge being connected between the battery voltage and the midpoints of said H-bridge, the gates of each connected to the output of one of said corresponding high-side drivers; said two low-side transistors of said H-bridge being connected between the mid-points of said H-bridge and ground, the gate of each connected to the output of one of said corresponding low-side drivers; and a load between the midpoints of said H-bridge.