Patent ID: 8288227

Claim:
A manufacturing method of a semiconductor memory device, comprising steps of: (a) forming a gate insulating film on a semiconductor substrate and forming a resist having plural linear opening parts on said gate insulating film; (b) removing said gate insulating film in a linear pattern by an etching employing said resist as a mask; (c) forming a linear third insulating film in a region on an upper part of said semiconductor substrate that said gate insulating film is removed in said step (b); (d) forming plural linear word lines running at right angles to said third insulating film and having a first insulating film in its upper surface and a second insulating film in its side surface on said gate insulating film and said third insulating film; (e) forming an interlayer insulating film on said word lines; (f) forming a linear trench whose width is narrower than that of an insulating film on said diffusion bit line on an upper side of said third insulating film in said interlayer insulating film, removing said third insulating film between said word lines in said trench and exposing said semiconductor substrate; (g) forming a diffusion bit line in said semiconductor substrate by performing an ion implantation in said trench; and (h) forming a linear metal bit line in said trench by filling up said trench with a predetermined metal.