Patent ID: 8183102

Claim:
A method for manufacturing a semiconductor device, comprising the steps of: forming a gate electrode over a substrate having an insulating surface; forming a first insulating layer containing phosphorus over the gate electrode; exposing a surface of the first insulating layer to an atmosphere containing a phosphine gas; forming an n-type amorphous semiconductor layer over the first insulating layer; forming an amorphous semiconductor layer having larger film thickness than the n-type amorphous semiconductor layer over the n-type amorphous semiconductor layer; forming an n-type semiconductor layer containing phosphorus at higher concentration than the n-type amorphous semiconductor layer over the amorphous semiconductor layer; forming a source electrode and a drain electrode over the n-type semiconductor layer, forming a depressed portion in the amorphous semiconductor layer, and forming a second insulating layer over the depressed portion, and wherein the n-type semiconductor layer extends beyond edges of the source and drain electrodes.