Patent ID: 8356269

Claim:
A computer-readable, non-transitory medium storing a dummy-metal-layout evaluating program causing a computer to execute a process, the process comprising: separating a group of dummy metal blocks that are arranged in a pattern regularly staggered with respect to a direction in which a wire object extends into meshes so that each mesh has the same layout of dummy metal blocks, thereby generating dummy meshes; determining whether a dummy metal block within the generated dummy mesh overlaps with the wire object; calculating dummy information that includes a wire density, which is the percentage area of a chip taken up by wiring, and a peripheral wire length, after any dummy metal block that is determined to be overlapped with the wire object is removed; and evaluating whether dummy-fill wire density and peripheral wire length are uniform, the dummy-fill wire density and peripheral wire length being generated by integrating the dummy information with information about the wire object.