Patent ID: 7154719

Claim:
A circuit providing protection against electrostatic discharge (ESD) for internal elements of an Integrated Circuit (IC), the circuit being connected to a power rail and a ground rail and to an inverter of a clamp preamplifier, said circuit comprises: a PMOSFET resistor with a gate connected to said ground rail, a drain connected to an input node of said inverter, a source and a bulk connected to said power rail, an NMOSFET capacitor having a gate connected to said input node of said inverter, a drain, a source and a bulk of said NMOSFET capacitor being connected to said ground rail, and a PMOSFET capacitor having a gate connected to said input node of said inverter, a drain and a source of said PMOSFET capacitor being connected to said ground rail, and a bulk of said PMOSFET capacitor being connected to said power rail.