Patent ID: 7064044

Claim:
A method for forming contact holes using a multi-layer hard mask, comprising: providing a substrate with a device region and an alignment region having an opening therein to serve as an alignment mark; forming a dielectric layer overlying the substrate and filling the opening; successively forming a first polysilicon layer, a silicon oxide layer, and a second polysilicon layer overlying the dielectric layer to serve as the multi-layer hard mask; removing the second polysilicon layer over the opening on the alignment region to expose the underlying silicon oxide layer; patterning the multi-layer hard mask on the device region to form a plurality of holes therein and expose the underlying dielectric layer; and etching the exposed dielectric layer and the silicon oxide layer over the opening using the patterned multi-layer hard mask as an etch mask, to form the plurality of contact holes in the dielectric layer on the device region and expose the first polysilicon layer over the opening on the alignment region.