Patent ID: 8120162

Claim:
A package for electrically connecting an integrated circuit to a printed circuit board, the package comprising: a mount array that is adapted to be electrically connected to the integrated circuit, the mount array having a center and an outer periphery, the mount array including a plurality of positive terminal mounts, a plurality of negative terminal mounts, and a plurality of signal mounts, wherein at least one row of same-charged terminal mounts extends from the center to the outer periphery of the mount array; a substrate body that includes a first conductive layer, a second conductive layer, and an insulating layer that is positioned between the first conductive layer and the second conductive layer; the first conductive layer including a terminal portion that extends from adjacent the center of the mount array to adjacent the outer periphery of the mount array, the plurality of positive terminal mounts being connected to one of the terminal portion and the second conductive layer, and the plurality of negative terminal mounts being connected to the other of the terminal portion and the second conductive layer.