Patent ID: 7956390

Claim:
A semiconductor device comprising: a semiconductor substrate; a first impurity region including a first conductive impurity formed in the semiconductor substrate; a first transistor and a second transistor formed in the first impurity region; a first stress film having a first stress over the first transistor; a second stress film having the first stress over the second transistor; a third stress film having a second stress different from the first stress provided in the first impurity region between the first stress film and the second stress film; a second impurity region including a second conductive impurity opposite to the first conductive impurity formed in the semiconductor substrate; a third transistor and a fourth transistor formed in the second impurity region; a fourth stress film having a third stress over a third transistor; a fifth stress film having a the third stress over the fourth transistor; and a sixth stress film having a fourth stress different from the third stress provided between the fourth stress film and the fifth stress film in the second impurity region.