Patent ID: 7952630

Claim:
A data processor comprising: a reference signal generator generating a reference signal, which is used to convert a level of an analog processing signal into digital data, gradually varying to enhance an amplitude of the processing signal; a comparator comparing the processing signal with the reference signal generated by the reference signal generator; a count period controller determining to perform a real number count operation of performing a count process during a period from a time point when the reference signal has a predetermined initial value to a time point when the processing signal is equal to the reference signal or a complement number count operation of performing a count process during a period from a time point when the processing signal is equal to the reference signal to a time point when the reference signal reaches a predetermined final value, on the basis of the comparison result of the comparator; a counter performing a count process during the count period determined by the count period controller and storing a count value at the time of completion of the count process to acquire a predetermined level of digital data; and a corrector correcting the result of the complement number count operation to acquire the digital data as a value of a real number, wherein the count period controller independently controls the real number count operation and the complement number count operation of the counter on the basis of a predetermined criterion.