Patent ID: 8426980

Claim:
A chip-to-chip multi-signaling communication system with common conductive layer, comprising: a first chip having at least a first pad and a second pad; a second chip having at least a first pad and a second pad; and a common conductive layer which is to be a conductive material and is glued directly to the first chip and the second chip; wherein the first pad of the second chip is aligned with the first pad of the first chip for receiving the signal from the first pad of the first chip through the common conductive layer, wherein the signal is transmitted to the common conductive layer from the first and the second pads of the first chip, and the first and the second pads of the second chip receive the signal from the common conductive layer, wherein the magnitude of the signal received by the first pad of the second chip is expressed as: V D1 =α(ρ, w,s,t )· V U1 +β(ρ, w,s,t )· V U2 , wherein V D1 is the magnitude of the signal received by the first pad of the second chip, V U1 is the magnitude of the signal transmitted by the first pad of the first chip, V U2 is the magnitude of the signal transmitted by the second pad of the first chip, α and β are a ratio which is changed with different parameter designs, w is the dimension of the pads, s is the spacing between the pads located on the first or the second chip, t is the thickness of the common conductive layer, and ρ is the resistivity of the common conductive layer.