Patent ID: 6850434

Claim:
A nonvolatile memory apparatus comprising: a controller; a plurality of terminals including a clock terminal, a command terminal and an other terminal; a clock generator; and a plurality of nonvolatile memory cells, wherein said clock terminal is capable of receiving a first clock signal, wherein said command terminal is capable of receiving commands which include a read command and a program command, wherein said clock generator generates a second clock signal controlled by said controller, wherein in an operation in response to said read command received from said command terminal, said nonvolatile memory apparatus is capable of reading data from ones of said nonvolatile memory cells, and outputs data to outside of said nonvolatile memory apparatus in response to said first clock signal via said other terminal except said command terminal, wherein in an operation in response to said program command received from said command terminal, said, nonvolatile memory apparatus receives data from outside of said nonvolatile memory apparatus in response to said first clock signal via said other terminal except said command terminal and is capable of writing data to ones of said nonvolatile memory cells, and wherein said data writing to ones of said nonvolatile memory cells is performed using said second clock signal.