Patent ID: 7047351

Claim:
A memory module, comprising: a plurality of memory devices; and a memory hub, comprising: a link interface operable to receive memory requests for access to at least one of the memory devices; a memory device interface operable to couple memory requests to the plurality of memory devices; and a memory request processing system coupled to the link interface and the memory device interface, the memory request processing system being operable responsive to receiving a memory request to determine whether or not at least one other memory request is being serviced by the memory module, the memory request processing system being operable responsive to determining that the at least one other memory request is not being serviced to cause a portion of a memory request corresponding to the memory request received by the memory request processing system to be transferred to the memory device interface, the memory request processing system further being operable responsive to determining that the at least one other memory request is being serviced to schedule at least a portion of the memory request corresponding to the memory request received by the memory request processing system to be subsequently transferred to the memory device interface.