Patent ID: 7286071

Claim:
A digital-to-analog converter comprising: a first conversion stage selecting first and second voltages of a plurality of reference voltages according to m most significant bits of a k bit input signal; and a second conversion stage precharging an output load to the first voltage selected by the first conversion stage and converting n least significant bits of the k bit input signal to a voltage between the first and second voltages, wherein the second conversion stage comprises: first and second switching capacitor units connected in series, the first switching capacitor unit, according to a first bit of the n least significant bits, selectively charges a first capacitor to the first voltage or the second voltage and then the second switching capacitor unit performs a first charge sharing between the first capacitor and a second capacitor, and the first switching capacitor unit, according to a second bit of the n least significant bits, selectively charges the first capacitor to the first voltage or the second voltage again and then the second switching capacitor unit performs a second charge sharing between the first capacitor and the second capacitor.