Patent ID: 7237324

Claim:
A method of manufacturing a multiple chip resistor, comprising the steps of: forming first electrode layers on a first surface of a substrate; forming resistor elements in a plane which is situated on the first surface of the substrate, the resistor elements being electrically connected to the first electrode layers, respectively; forming slits in the substrate for separating the first electrode layers; forming edge electrodes on respective edges at the slits of the substrate, each of the edge electrodes being connected to the first electrode layers at the edges of the slits, respectively; dividing the substrate at the slits into strip substrates; removing portions of the edge electrodes for electrically isolating the resistor elements from each other and for forming gaps between remaining portions of the edge electrodes without removing a portion of the substrate; and dividing each of the strip substrates into chip substrates, each of the chip substrates having at least two resistor elements in a respective portion of said plane, the plane remaining on said chip substrates after said chip substrates are formed, while maintaining the gaps between the remaining portions of the edge electrodes.