Patent ID: 8415202

Claim:
A semiconductor device manufacturing method comprising: a first step of forming a first insulating layer on a main surface of a first semiconductor substrate, having, close to the main surface thereof, a plurality of semiconductor chips, each of which has a semiconductor integrated circuit; a second step of disposing semiconductor chips, each of which has a semiconductor integrated circuit on a main surface thereof, over the corresponding semiconductor chips of the first semiconductor substrate in such a manner that an opposite surface of each of the disposed semiconductor chips faces the first insulating layer while interposing the first insulating layer between the disposed semiconductor chips and the semiconductor chips of the first semiconductor substrate, the opposite surface being opposite to the main surface of the disposed semiconductor chip; a third step of forming, in each of the disposed semiconductor chips, a via hole from the main surface to the opposite surface of the disposed semiconductor chip to penetrate the disposed semiconductor chip; and a fourth step of forming a first connection part which enables the signal transmission between the disposed semiconductor chips and the corresponding semiconductor chips of the first semiconductor substrate via the via holes.