Patent ID: 7250655

Claim:
A MOS transistor, comprising: a T-shaped gate electrode on a semiconductor substrate, the T-shaped gate electrode having a wide portion and a narrow portion, the narrow portion between the wide portion and the semiconductor substrate, so as to have an undercut region adjacent to the narrow portion; an L-shaped lower spacer covering a top surface of the semiconductor substrate at both sides of the T-shaped gate electrode and covering sides of the wide portion of the T-shaped gate electrode, the L-shaped lower spacer having a first element substantially perpendicular to the semiconductor substrate, a second element, having substantially the same thickness as the first element, substantially parallel to the semiconductor substrate, the second element extending from the first element laterally away from the T-shaped gate electrode, and a third element substantially parallel to the semiconductor substrate extending from a bottom of the first element into the undercut region, wherein the first element and the second element intersect to define a substantially 90 degree angle in an outer surface of the L-shaped lower spacer; a low-concentration impurity region in the semiconductor substrate substantially under the first and third elements; a high-concentration impurity region in the semiconductor substrate next to the L-shaped lower spacer; and a mid-concentration impurity region between the high- and low-concentration impurity regions, substantially under the second element.