Patent ID: 8143152

Claim:
A method of manufacturing a semiconductor device, comprising steps of: forming a first gate comprising a polysilicon gate electrode and sidewalls on a silicon substrate; forming an organic film over the first gate and a surface of the silicon substrate; removing an upper portion of the organic film to expose an upper surface of the polysilicon gate electrode; removing an upper portion of the polysilicon gate electrode, thereby exposing a recessed surface of the polysilicon gate electrode between the sidewalls; removing the organic film to expose the surface of the silicon substrate; forming a silicide layer simultaneously on the exposed surface of the silicon substrate and the recessed surface of the polysilicon gate electrode; forming an insulator film over the silicon substrate and on the recessed surface of the polysilicon gate electrode; forming a first contact hole extending to the silicide layer on the silicon substrate and overlying an adjacent portion of the first gate; and forming a first self-aligned contact in the first contact hole, wherein the first self-aligned contact connects to the silicide layer on the silicon substrate, and wherein a remaining portion of the insulator film is disposed between the first self-aligned contact and the first gate.