Patent ID: 7777547

Claim:
A voltage level shifter, comprising: a reference voltage generator configured to generate a first reference voltage and a second reference voltage; an inverting buffer stage coupled to the reference voltage generator to receive the first reference voltage, and directly connected to a fifth contact point configured to receive a first signal switching within a first voltage range and to produce an inverted second signal switching within a second voltage range at a third contact point; a first transistor, wherein a source of the first transistor is coupled to the second reference voltage, a drain of the first transistor is electrically connected to a first contact point, and a gate of the first transistor is electrically connected to a second contact point; a second transistor, wherein a source of the second transistor is coupled to a ground, a drain of the second transistor is electrically connected to the first contact point, and a gate of the second transistor is electrically connected to the third contact point; a third transistor, wherein a source of the third transistor is coupled to the second reference voltage, a drain of the third transistor is electrically connected to the second contact point, and a gate of the third transistor is electrically connected to the first contact point; and a fourth transistor, wherein a source of the fourth transistor is electrically connected to the third contact point, a drain of the fourth transistor is electrically connected to the second contact point, and a gate of the fourth transistor is directly connected to the fifth contact point; wherein a third signal switching within a third voltage range is coupled to the first contact point.