Patent ID: 6894387

Claim:
A semiconductor arrangement comprising a bump electrode having a first protrusion and a second protrusion bonded to an IC electrode on a circuit forming surface of a semiconductor element, wherein said first and second protrusions are in contact with or close to an electrode on a circuit board when the semiconductor element is mounted on the circuit board, wherein said first protrusion has a formed portion formed by forming a melted portion of a wire with a capillary and solidifying the melted portion, and a wire material portion comprising a portion of the wire in a vicinity of the melted portion, said wire material portion extending from a vertex portion of said formed portion toward the semiconductor element and being bonded to said formed portion, wherein said wire material portion does not directly contact the IC electrode or the circuit forming surface, and wherein said bump electrode is approximately V-shaped, and a bottom portion of the ‘V’ faces towards the semiconductor element in a direction approximately perpendicular to the circuit forming surface.