Patent ID: 8918067

Claim:
A method comprising: enabling a unit element of a variable capacitor array by supplying to one or more transistors within the unit element a gate voltage that adjusts to compensate for variations in at least one of supply voltage and temperature, to maintain a substantially constant impedance of the unit element; comparing a reference resistance to a resistance of one or more replica devices corresponding to the one or more transistors, the reference resistance corresponding to a desired resistance value of the one or more replica devices and generating an indication of the comparison; wherein comparing the reference resistance to the resistance of the one or more replica devices includes, comparing a first voltage across the one or more replica devices to a second voltage across the reference resistance and generating the indication, the first voltage corresponding to the resistance of the one or more replica devices and the second voltage corresponding to the reference resistance; supplying from a current source a current to the one or more replica devices and to the reference resistance to generate the first voltage and the second voltage, the current being supplied to the one or more replica devices during a first time period to develop the first voltage and the current being supplied to the reference resistance during a second time period, the first and second time periods being non-overlapping; and adjusting the resistance of one or more replica devices to substantially maintain the desired resistance value by adjusting the gate voltage according to the indication.