Patent ID: 7271083

Claim:
A fabrication method of forming a semiconductor device, comprising: providing a substrate having a first region and a second region; forming a first dielectric layer overlying said substrate; forming a first trench and a second trench passing through said first dielectric layer and a portion of said substrate on said first region; forming a first trench isolation structure and a second trench isolation structure in said substrate on said first region, wherein said first trench passes through said first dielectric layer and a portion of said first trench isolation structure, and wherein said second trench passes through said first dielectric layer and a portion of said second trench isolation structure; forming a first metal layer along the sidewall and bottom of said first trench and said second trench respectively; forming at least one opening passing through said first dielectric layer to expose said substrate on said second region; forming a second dielectric layer overlying said first metal layer and the sidewall and bottom of said opening; and forming a second metal layer overlying said second dielectric layer to fill said first trench, said second french and said opening.