Patent ID: 8365123

Claim:
A non-transitory computer accessible storage medium storing a plurality of instructions which, when executed by one or more processors: parse one or more design files that describe at least a portion of an integrated circuit using a hardware description language; identify, in the one or more design files, pad descriptions of a plurality of pads, wherein the pads are provided to connect the integrated circuit to pins of an integrated circuit package that includes the integrated circuit, wherein the one or more design files describe custom input/output circuitry for receiving one or more input signals to the integrated circuit from one or more of the pads and driving one or more output signals from the integrated circuit to one or more of the pads; and generate corresponding pad descriptions for an implementation of the integrated circuit on a programmable logic device, wherein the programmable logic device includes preconfigured input/output circuitry, wherein the corresponding pad descriptions are configured to use the preconfigured input/output circuitry of the programmable logic device to receive the one or more input signals and drive the one or more output signals, wherein in said generating the corresponding pad descriptions, the plurality of instructions, when executed by the one or more processors, remove the custom input/output circuitry from the one or more design files.