Patent ID: 7519759

Claim:
A pipeline synchronization device for transferring data between clocked devices having different clock frequencies, comprising: a mousetrap buffer for exchanging data with one of the clocked devices, the mousetrap buffer including a signalling output for coordinating the data exchange with the clocked device, and a synchronizer that is configured to synchronize a change in the signalling output with a clock of the clocked device, wherein the synchronizer includes: a synchronizing latch includes: a synchronizing input for receiving the signalling output; a synchronizing output for outputting the received signalling output to the clocked device; and a control input for enabling the output of the received signalling output to the clocked device, and an EXNOR-gate having two inputs and one output, the inputs of the EXNOR-gate being connected to the synchronizing input and output of the synchronizing latch, and the synchronizer includes a wait-component having an input connected to the output of the EXNOR-gate, an input connected to the clock of the clocked device and an output connected to the control input of the synchronizing latch.