Patent ID: 6861865

Claim:
An apparatus comprising: a set of logic blocks configured to perform designated data processing functions; a set of redundant logic blocks also configured to perform the designated data processing functions; a logic block selector module to replace one or more of the set of logic blocks with one or more of the set of redundant logic blocks according to specified logic block replacement conditions, wherein, to replace the one or more of the logic blocks with one or more of the redundant logic blocks, the logic block selector module assigns an ID code to the redundant logic blocks which is equivalent to the ID code of the logic blocks to be replaced; a plurality of buses, wherein each bus of the plurality of buses is allocated to an individual logic block; and a multiplexer having an input and an output, wherein the plurality of buses utilized by the logic blocks are provided at the input of the multiplexer and wherein the output of the multiplexer is coupled to a bus input of one of the redundant logic blocks, and wherein responsive to a selection signal, the multiplexer communicatively couples one of the plurality of buses to the bus input of the redundant logic block.