Patent ID: 7078771

Claim:
A Silicon On Insulator (SOI) structure comprising: a silicon substrate; a buried oxide (BOX) layer disposed on an upper surface of the silicon substrate; a semiconductor layer disposed on an upper surface of the BOX layer, the semiconductor layer including an active area and a device isolation area, the device isolation area of the semiconductor layer consisting of a well having a lower surface in contact with the upper surface of the BOX layer, the well including additional impurity ions compared to the active area; a field oxide film disposed on an upper surface of the well; a first gate line disposed over a portion of the active area and a portion of the field oxide film, the active area disposed along two sides of the first gate line; an insulation layer disposed on an upper surface of the active area and an upper surface of the field oxide film; and a Local Inter-Connect (LIC) disposed in contact with the insulation layer, an upper part of a second gate line, and the active area, the LIC including a conductive material.