Patent ID: 7433226

Claim:
A method for programming a plurality of programmable resistive memory cells, comprising: (1) executing a first, set process to program input data in an input buffer, including setting up bias voltages on bit lines and word lines on each of the plurality of memory cells, wherein the first process comprises the following (1) (a) determining and (1) (b) programming steps: (a) determining if the input data for each memory cell corresponds to a first, set state so that the memory cell needs to be set; and (b) for each memory cell needing to be set, programming the memory cell to a lower resistance, set state; and (2) executing a second, reset process to program input data in an input buffer, including setting up bias voltages on bit lines and word lines on each of the plurality of memory cells, wherein the second process comprises the following (2) (c) determining and (2) (d) programming steps: (c) determining if the input data for each memory cell corresponds to a second, reset state so that the memory cell needs to be reset; and (d) for each memory cell needing to be reset, programming the memory cell to a higher resistance, reset state.