Patent ID: 7411283

Claim:
A computer system, comprising: one or more printed circuit boards, wherein one of the printed circuit boards comprises a power subsystem; an integrated circuit device comprising a die and a package, wherein the die is coupled to the package at a first level interconnect, and wherein the package is coupled to the one of the one or more printed circuit boards at a second level interconnect; and a power distribution bus connecting the power subsystem to the integrated circuit device; wherein at least one of the first or second level interconnects comprises a plurality of power supply voltage conductors and a plurality of ground conductors, wherein the plurality of power supply voltage conductors comprises one or more voltage groups, wherein the plurality of ground conductors comprises one or more ground groups, and wherein at least one of the voltage groups and an adjacent one of the ground groups are arranged so as to implement a low pass filter between the die and the power subsystem of the printed circuit board; and wherein the power supply voltage conductors of the at least one of the voltage groups and the ground conductors of the adjacent one of the ground groups are arranged in such a way as to create a higher series inductance at the at least one of the first or second level interconnects than an arrangement comprising an alternating pattern of power supply voltage conductors and ground conductors having equal spacing between each pair of adjacent power supply voltage and ground conductors.