Patent ID: 7309638

Claim:
A method of manufacturing a semiconductor component, the method comprising: providing a composite semiconductor substrate comprising: a substrate having a first conductivity type; a buried layer having a second conductivity type above the substrate; and a semiconductor epitaxial layer above the buried layer; forming a first semiconductor region having a conductivity type in the semiconductor epitaxial layer to define a second semiconductor region in the semiconductor epitaxial layer, the second semiconductor region circumscribed by the first semiconductor region and having a doping level less than a doping level of the first semiconductor region; forming an electrically insulating layer above the semiconductor epitaxial layer, a first portion of the semiconductor epitaxial layer covered by the electrically insulating layer, and a second portion and a third portion of the semiconductor epitaxial layer not covered by the electrically insulating layer; forming a third semiconductor region having a conductivity type different from the conductivity type of the first semiconductor region, located in the second portion of the semiconductor epitaxial layer and above the second semiconductor region, at least partially contiguous with the first semiconductor region, and having a doping level greater than a doping level of the first semiconductor region; forming a fourth semiconductor region having the conductivity type of the first semiconductor region located in the third portion of the semiconductor epitaxial layer and electrically shorted to the first semiconductor region; and forming a fifth semiconductor region having the second conductivity type, at least partially contiguous with the buried layer, and circumscribing the first semiconductor region, the second semiconductor region, the third semiconductor region, and the fourth semiconductor region, wherein: a junction between the third semiconductor region and the first semiconductor region forms a zener diode junction; and the zener diode junction is located only underneath the electrically insulating layer.