Patent ID: 7840783

Claim:
A method, comprising: operating hardware corresponding to a processor in at least two modes including a first mode for operating the hardware using a logical register of a first bit width and a second mode for operating the hardware using a logical register of a second bit width, wherein the processor operates on instructions based at least in part upon a mode indicator such that the instructions are operated on at a first precision when in the first mode and the same instructions are operated on at a second precision when in the second mode, and when executing a plurality of threads, a first thread operates in the first mode with the first precision based at least in part upon the mode indictor included for the first thread and a second thread operates in the second mode with the second precision based at least in part upon the mode indicator included for the second thread; and performing a register renaming operation based at least in part upon the mode indicator, wherein the register renaming operation depends on the operating mode of the hardware and the act of performing comprises renaming at least one logical register to at least one physical register of the first bit width when in the first mode for operating the hardware.