Patent ID: 8148827

Claim:
A quad flat no lead (QFN) package, comprising: a conductive circuit layer, having a die bonding area, an extension area, a plurality of first pads, a plurality of second pads, a plurality of traces and an insulating layer, wherein the extension area surrounds the die bonding area, the first pads are disposed outside the extension area, the second pads are disposed inside the die bonding area, each of the traces has a first end and a second end, the first ends of the traces are connected to the second pads, the second ends of the traces are terminated in the extension area, the insulating layer fills at least the die bonding area and the extension area and exposes top surfaces and bottom surfaces of the second pads; a chip, mounted at the die bonding area; a plurality of wires, electrically connecting the chip to the first pads and the second ends of the traces, respectively; and an encapsulation material, covering the conductive circuit layer, the chip and the wires.