Patent ID: 7651761

Claim:
A semiconductor wafer polishing pad whose polishing layer is resin foam of closed-cell type, wherein the number of closed cells in the polishing layer is 200 to 600 per mm 2 , and the average diameter of the closed cells is 30 to 60 μm, wherein a resin constituting the resin foam consists of a polyurethane resin produced by mixing a first component containing an isocyanate group-containing compound with a second component containing an active hydrogen group-containing compound followed by hardening the mixture by heating, said mixture containing a curing agent and a silicone-based surfactant, the resin foam has a hardness of 45 or more and less than 65 as measured using a D-type rubber hardness meter, and the closed cells solely contain gas selected from the group consisting of nitrogen, oxygen, a rare gas, dry air, and a mixed gas of the foregoing, wherein the polyurethane resin foam contains the silicone-based surfactant in amount of 0.05 to 4.5 wt % based on the total amount of the first and second component.