Patent ID: 7368349

Claim:
A method of manufacturing a semiconductor memory device comprising the steps of: forming a laminated body having a floating-gate-forming groove which is formed in an floating-gate-forming area of the laminated body, the laminated body including a semiconductor support layer, an impurity diffusion layer formed on the semiconductor support layer, an ion-implantation-damage protection film formed on the impurity diffusion layer, and an interlayer insulating film formed on the ion-implantation-damage protection film, in such a way that the semiconductor support layer is exposed to a bottom of the floating-gate-forming groove, and the impurity diffusion layer, the ion-implantation-damage protection film, and the interlayer insulating film are exposed to a side wall of the floating-gate-forming groove; forming a floating-gate-insulating film on an inner surface of the floating-gate-forming groove in such a way that the floating-gate-insulating film contacts with the semiconductor support layer at the bottom of the floating-gate-forming groove, the floating-gate-insulating film contacts with the impurity diffusion layer, the ion-implantation-damage protection film, and the interlayer insulating film at a side wall of the floating-gate-forming groove; forming a floating gate on the floating-gate-insulating film so as to be buried in the floating-gate-forming groove; forming a control-gate-insulating film on a surface area of the floating gate; and forming a control gate on the control-gate-insulating film above the floating gate.