Patent ID: 7600068

Claim:
A programmable interface device for controlling a slave circuit, wherein any control signal intended to control the slave circuit is previously decomposed into a succession of bits, the succession corresponding to a sampling of the signal with the aid of a sampling signal, a period of which is at most equal to the smallest duration between two changes of state of the control signal, said device comprising: a first memory for storing sampled commands of the sampled control signal; a first address counter for supplying addresses to said first memory; and a programmable state machine for driving the first memory and the first address counter, the state machine including: a state memory structured to store first address counter control bits for controlling the first address counter and first memory control bits for controlling the first memory; and a state memory controller structured to cause the state memory to output the first address counter control bits and first memory control bits, and thereby cause the first memory to be controlled in response to the first memory control bits and cause the first address counter to be controlled in response to the first address counter control bits.