Patent ID: 8044401

Claim:
A thin film transistor, comprising: a substrate; a semiconductor layer disposed on the substrate, including a channel region and source and drain regions, and crystallized using a metal catalyst; a gate electrode disposed to correspond to a predetermined region of the semiconductor layer; a gate insulating layer disposed between the gate electrode and the semiconductor layer to insulate the semiconductor layer from the gate electrode; and source and drain electrodes electrically connected to the source and drain regions of the semiconductor layer, wherein the metal catalyst is present in the channel region of the semiconductor layer at a concentration exceeding 0 and not exceeding 6.5×E 17 atoms per cm 3 within 150 Å in a vertical direction, wherein the vertical direction starts from a surface of the semiconductor layer that is on an opposite side of the substrate and extends towards the substrate, and wherein the metal catalyst is present in the channel region at a concentration exceeding 6.5×E 17 atoms per cm 3 , at a depth exceeding 150 Å in the vertical direction.