Patent ID: 7547937

Claim:
A memory cell structure, comprising: a first memory capacitor that is formed within a first local area, the first memory capacitor being comprised of a first lower electrode, a first upper electrode, and a first oxide dielectric film formed between the first lower electrode and the first upper electrode; a second memory capacitor that is separated from the first memory capacitor and formed within the first local area, the second memory capacitor being comprised of a second lower electrode, a second upper electrode, and a second oxide dielectric film formed between the second lower electrode and the second upper electrode; a first local interconnection layer that is electrically conductive and permeable to hydrogen and is formed only within the first local area, the first local interconnection layer being comprised of a first contact portion that has a contact with the first upper electrode and is separated from the first oxide dielectric film through the first upper electrode, a second contact portion that has a contact with the second upper electrode and is separated from the second oxide dielectric film through the second upper electrode, and a first non-contact portion that connects the first contact portion and the second contact portion and is separated from the first memory capacitor and the second memory capacitor; and a first hydrogen barrier layer that is electrically insulating and impermeable to hydrogen, the first hydrogen barrier layer covering at least the first contact portion and the second contact portion of the first local interconnection layer.