Patent ID: 8269704

Claim:
A liquid crystal display device comprising: a liquid crystal panel including liquid crystal pixels on regions defined by a plurality of gate lines and a plurality data lines; a gate voltage generator that generates a gate high voltage and a gate low voltage required to driving the gate lines; a gate driver that supplies gate scan signals to the gate lines, respectively, using the gate high and low voltages from the gate voltage generator, the gate scan signals enabled and shifted sequentially by a predetermined interval; and a gate voltage modulating unit that modulates the gate high voltage such that an impulse having a negative polarity is added every predetermined period to the gate high voltage to be supplied to the gate driver from the gate voltage generator, and controls a width of the impulse depending on the liquid crystal panel such that start points of predetermined edges of the gate scan signals are controlled, wherein the liquid crystal panel further includes a dummy gate line formed in parallel with the plurality of gate lines, the dummy gate line is formed next to the last gate line or above the first gate line or between arbitrary adjacent gate lines, wherein the gate voltage modulating unit comprises a modulator connected between the gate voltage generator and the gate driver to modulate a gate high voltage such that the impulse of the negative polarity is added to the gate high voltage and a time constant determiner connected between the gate voltage generator, the modulator, and the liquid crystal panel to change the width of the impulse having the negative polarity in response to at least one of resistance and capacitance of a portion of the liquid crystal panel, wherein the time constant determiner comprises a capacitor connected to an input terminal of the modulator and a resistor constituting a serial circuit connected between the gate voltage generator and the input terminal of the modulator in cooperation with the dummy gate line, wherein an one side of the dummy gate line is connected to the capacitor and the other side of the dummy gate line is connected to the resistor, wherein the dummy gate line, the capacitor and the resistor constitute the serial circuit, wherein a width of the impulse of the negative polarity generated at the modulator is determined by a series-sum of the resistance of the dummy gate line and the resistance of the resistor, and a series-sum of the capacitance of the dummy gate line and the capacitance of the capacitor, wherein an enable section of the modulated gate high voltage from the modulator is adaptively increased or decreased in proportion to the resistance and the capacitance of the dummy gate line.