Patent ID: 8386720

Claim:
A method of causing transitions among modes by a computing device for allowing exclusive access to shared data in order to allow stopping of a program including a code for execution in a critical section and an instruction to write a value into or read a value from a shared data area in a memory, the method comprising at least one of the steps of: causing a transition from a transaction mode to a quasi-transaction mode, the transition from the transaction mode to the quasi-transaction mode being caused in response to a number of transactions executed in parallel becoming smaller than a threshold value, or in response to a rate of cancelling the transactions becoming greater than a threshold value; causing a transition from the quasi-transaction mode to a lock mode; and causing a transition from the quasi-transaction mode to the transaction mode, wherein the lock mode is a mode for executing a critical section by using a lock, the transaction mode is a mode for executing a critical section by using a transactional memory scheme, and the quasi-transaction mode is a mode for executing a critical section by executing the steps of: acquiring, by an acquire lock module, a lock on the critical section before start of a first instruction in the critical section; writing, by a write data module, a value into a thread-local area in the memory in response to a write instruction to write the value into the shared data area in the critical section; writing, by the write data module, into the shared data area, the value written into the thread-local area, upon completion of a final instruction in the critical section; and releasing, by a release lock module, the lock on the critical section, thereby causing transitions among modes for allowing exclusive access to shared data in order to allow stopping of the program including the code for execution in the critical section and the instruction to write the value into or read the value from the shared data area in the memory.