Patent ID: 7551152

Claim:
A display including pixel circuits that are each formed at an intersection between a signal line and a scan line so that the pixel circuits are disposed in a matrix, each of the pixel circuits comprising: a first transistor of which gate is coupled to the scan line, one of a source and a drain of the first transistor being coupled to the signal line; a second transistor of which gate is supplied with a bias voltage, one of a source and a drain of the second transistor being coupled to a positive voltage supply; a third transistor of which gate is coupled to the other of the source and the drain of the first transistor, the third transistor being coupled to the other of the source and the drain of the second transistor; a capacitor of which one end is coupled to the other of the source and the drain of the first transistor, the other end of the capacitor being supplied with a ramp signal that increases and decreases with time; and an organic electro-luminescence thin film that is driven to emit light by the first, second and third transistors and the capacitor, wherein, the first, second and third transistors and the capacitor are formed by a MOS process, the first transistor conducts in response to a scan pulse supplied from the scan line, and a signal value from the signal line is written to the capacitor when the first transistor conducts, the bias voltage is set so that the second transistor operates as a constant current source during a period when the third transistor is in a conductive state, or during a period when the third transistor is in a non-conductive state, a constant current from the second transistor flows through the organic electro-luminescence thin film so that the organic electro-luminescence thin film emits light, the ramp signal is applied to the other end of the capacitor during a period when the first transistor is in a non-conductive state, as a signal that repeats increase and decrease with a cycle sufficiently shorter than the cycle of one frame, and during a period when the first transistor conducts, a certain reference voltage is applied to the other end of the capacitor.