Patent ID: 8710617

Claim:
A semiconductor device comprising: a semiconductor substrate having a main surface with a ground voltage applied to said semiconductor substrate; a first insulating film formed to cover said main surface of said semiconductor substrate; a semiconductor layer of a predetermined conductivity type formed to cover said first insulating film; a second insulating film formed to cover said semiconductor layer; and a first electrode formed to cover a predetermined region of said second insulating film with a predetermined voltage higher than said ground voltage applied to said first electrode, in a region located between said first electrode and said semiconductor substrate, there being located: a region where a hollow is formed between said semiconductor substrate and said first insulating film; and a region where no hollow is formed between said semiconductor substrate and said first insulating film, in a portion of said semiconductor layer that is located directly above said region where said hollow is formed, an element-formed region being formed which is electrically connected to said first electrode and in which a predetermined semiconductor element is formed, between said first electrode and a portion of said semiconductor substrate that is located in said region where no hollow is formed, an electric field alleviation region being formed, and in said electric field alleviation region, a plurality of capacitors being formed that are connected in series between said predetermined voltage applied to said first electrode and said ground voltage applied to said semiconductor substrate.