Patent ID: 8416117

Claim:
An apparatus comprising: a first capacitor system and a second capacitor system, each capacitor system comprising one or more capacitors, each capacitor system removably coupled to the same portion of an analog to digital converter (ADC) and the same sensing circuit, each capacitor system configured to store an amount of charge received through the sensing circuit when coupled to the sensing circuit, and provide the amount of charge received through the sensing circuit to the ADC for conversion into a digital value when coupled to the portion of the ADC; a timing circuit configured to generate one or more control signals; and a switching circuit configured to: receive the one or more control signals; when the one or more control signals are in a first state, couple the first capacitor system to the sensing circuit to receive charge through the sensing circuit and concurrently couple the second capacitor system to the portion of the ADC; and when the one or more control signals are in a second state, couple the second capacitor system to the sensing circuit to receive charge through the sensing circuit and concurrently couple the first capacitor system to the portion of the ADC.