Patent ID: 7793073

Claim:
A method of identifying duplicate values in a vector register, the method comprising: loading addressing values into elements of a first vector register, wherein each of the addressing values is added to a first base address of a first memory area to calculate a corresponding location within the first memory area; generating each respective address value for a sequence of addressed locations within a constrained memory area, wherein the constrained memory area includes 2 N consecutive addresses, wherein the addressed locations within the constrained memory area are addressed using an N-bit value derived from each respective addressing value of the first vector register, and wherein the constrained memory area is separate from and does not overlap the first memory area; storing, into a second vector register, identifying data values that can be used to identify elements in the second vector register; storing the identifying data values in the second vector register to the constrained memory area using the generated sequence of respective address values; reading data values from the constrained memory area using the generated sequence of respective address values; and comparing the identifying data values in the second vector register to the data values read from the constrained memory area to identify duplicate values.