Patent ID: 8258033

Claim:
A method of manufacturing a nonvolatile semiconductor memory device comprising: forming a stacked body by alternately stacking impurity-doped silicon layers and silicon layers without impurity on an upper surface of a substrate; forming a slit in the stacked body from an upper surface side of the stacked body to divide each of the impurity-doped silicon layers into a plurality of gate electrodes, the slit being extended in a first direction parallel to an upper surface of the substrate; burying an insulation material in the slit to form an insulation plate; forming a through-hole so as to pierce the stacked body, the through-hole being extended in an up-to-down direction perpendicular to the upper surface of the substrate; removing the silicon layers without impurity by performing wet etching via the through-hole; depositing a block insulation film on an interior surface of the through-hole and on an upper surface and a lower surface of the gate electrodes; depositing a charge storage film on the block insulation film; depositing a tunnel insulation film on the charge storage film; and burying a semiconductor material in the through-hole to form a semiconductor pillar extended in the up-to-down direction.