Patent ID: 7430128

Claim:
A capacitive/resistive device, comprising: (i) a first metallic foil; (ii) a second metallic foil; (iii) a capacitor dielectric layer disposed over the first metallic foil; (iv) a resistive layer disposed over the second metallic foil and adjacent to the capacitor dielectric layer; (v) a first capacitor electrode formed from the first metallic foil; (vi) a second capacitor electrode and a conductive trace formed from the second metallic foil; wherein the first capacitor electrode, the second capacitor electrode, and the capacitor dielectric layer form a capacitor; (vii) a resistor element formed from the resistive layer; wherein the resistor element extends between the conductive trace and the second capacitor electrode to form a terminated resistor in series with the capacitor; and wherein the first capacitor electrode, the second capacitor electrode, and the resistor element are formed by selective imaging and etching to form specific values of capacitance and resistance respectively to achieve a specific circuit impedance; wherein the capacitor dielectric layer has a dielectric constant of less than 4.0; and wherein the capacitor and the terminated resistor are embedded within at least two printed wiring board dielectric laminate layers.