Patent ID: 8035423

Claim:
An integrated structure comprising: a first well realized in a substrate; a second well realized within the first well, said first and second wells having respectively first and second conductivity types, opposite to each other; a switch realized in the second well; first and second trenches surrounding the second well and defining a sensitive pocket, wherein the first and second trenches define a first portion and a second portion of the substrate, the first portion being laterally isolated by the first and second trenches, and wherein the second well and the first portion are connected to a local ground line, the first well is connected to a local supply line, and the second portion is connected to a substrate terminal; an SOI isolation layer configured to vertically isolate the first portion; a driving circuit realized in the sensitive pocket and configured to drive said switch; and a bottom capacitor which is realized by the first well and by the substrate, separated by the SOI isolation layer and connected between the local supply line and the substrate terminal.