Patent ID: 8154110

Claim:
A dual-face package, comprising: a dual-face package structure including an LSI chip sealed with a mold resin, and electrodes for external connections on both of a front face and a back face of said dual-face package structure, wherein the LSI chip is bonded onto a die pad of a leadframe whose outer lead portions are exposed to define said electrodes at at least the back face, and the LSI chip and a plurality of inner lead portions of the leadframe are connected by wiring, said leadframe comprising a press worked metal sheet structure, at least a portion of said lead frame extending continuously and uninterrupted from said back face to said front face, at least one or more of the plurality of inner lead portions of said leadframe defining at least one or more of said electrodes on said front face, said at least one or more of said plurality of inner lead portions being integrally formed by drawing a portion of the leadframe, and bump electrodes being electrically connected to respective head faces of the electrodes on said front-face to define electrically conductive electrodes for electric connection to another substrate or element located outside of said dual-face package structure, the bump electrodes being arrayed at respective positions different from those where the head faces of the front-face electrodes are exposed, by means of rerouting wiring traces on the mold resin.