Patent ID: 8067931

Claim:
A voltage regulator comprising: a voltage divider including a first terminal coupled to a first supply voltage terminal, including a second terminal coupled to a ground terminal, and including a third terminal providing a voltage between the supply voltage and ground; a first transistor of a first type having a current bias including first and second terminals spaced apart with a channel therebetween, and including a gate for controlling current in said channel, said first terminal being coupled to the first terminal of the voltage divider, said second terminal being coupled to the third terminal of the voltage divider, said gate being coupled to said second terminal; a second transistor of the first type including first and second terminals spaced apart with a channel therebetween and including a gate for controlling current in said channel, said first terminal being coupled to the first terminal of the first transistor of the first type, said gate being coupled to the second terminal of the first transistor of the first type; a first transistor of a second type including first and second terminals spaced apart with a channel therebetween and including a gate for controlling current in said channel, said second terminal being coupled to the ground terminal, said first terminal being coupled to said gate and to the second terminal of the second transistor of the first type; a second transistor of the second type including first and second terminals spaced apart with a channel therebetween and including a gate for controlling current in said channel, said second terminal being coupled to the ground terminal, said gate being coupled to the first terminal of the first transistor of the second type; and a third transistor of the first type including first and second terminals spaced apart with a channel therebetween and including a gate for controlling current in said channel, said first terminal being coupled to a second supply voltage terminal, said second terminal being coupled to said gate and to the first terminal of the second transistor of the second type; a fourth transistor of the first type including first and second terminals spaced apart with a channel therebetween and including a gate for controlling current in said channel, said first terminal being coupled to the second supply voltage terminal, said gate being coupled to the second terminal of the third transistor of the first type; a first output transistor of the first type having a current that is a mirror of the current bias a first transistor of a first type, the first output transistor being coupled to an output node that is regulated by the first output transistor; a second output transistor coupled between the second supply voltage terminal and the output node; and a first capacitor including a first terminal coupled to the second supply voltage terminal and including a second terminal coupled to the second terminal of the fourth transistor of the first type.