Patent ID: 7876628

Claim:
An integrated circuit, comprising: a semiconductor chip including at least two output pads; and a data output circuit configured to receive first and second data of first and second output pads of the at least two output pads, and to provide a selected one of the first and second data to a terminal of a test equipment using test signals, wherein the data output circuit includes: a control unit configured to receive an output instruction signal, a standby instruction signal and a plurality of test mode signals, generate a first output instruction signal and a first standby instruction signal for selecting the first data, and generate a second output instruction signal and a second standby instruction signal for selecting the second data; a first output driver configured to output the first data and enter a standby state in response to the first output instruction signal and the first standby instruction signal; and a second output driver to output the second data and enter the standby state in response to the second output instruction signal and the second standby instruction signal.