Patent ID: 7259596

Claim:
A circuit arrangement for monitoring a voltage (UE 1 , UE 2 ), other than a power supply voltage (UV 1 , UV 2 ), through a derived voltage (UP 1 , UP 2 ) to be evaluated for said monitoring, wherein said voltage to be monitored is within a range higher or lower than said power supply voltage, said circuit arrangement comprising a voltage divider (ST 1 , ST 2 ) including two electronic components connected in series with each other between said voltage to be monitored (UE 1 , UE 2 ) and a reference potential, said voltage divider further including a voltage tap (N 1 ) for supplying said derived voltage (UP 1 , UP 2 ) to be evaluated, said circuit arrangement further comprising a switch (SM, T 1 ) connected in series in said voltage divider between said voltage tap (N 1 ) and one of said two electronic components, and a control unit (SE 1 , SE 2 ) having an output (AS 1 , AS 2 ) connected to said switch for controlling the operation of said voltage divider by closing said switch for said monitoring and for opening said switch for limiting power consumption, said circuit arrangement further comprising a signal evaluating unit (AE 1 , AE 2 ) having a first input (EA 1 , EA 3 ) connected to said voltage tap (N 1 ) for evaluating said derived voltage (UP 1 , UP 2 ) that is supplied to said tap (N 1 ) when said voltage divider (ST 1 , ST 2 ) is operating with said switch (SM 1 , T 1 ) being closed, said signal evaluating unit having a power supply input connected to said power supply voltage (UV 1 , UV 2 ), and wherein said voltage divider limits said derived voltage (UP 1 , UP 2 ) to a maximum within the range of said power supply voltage (UV 1 , UV 2 ).