Patent ID: 8054689

Claim:
A memory card comprising: a flash memory; a memory interface that outputs a first writing data signal to be written into the flash memory; a first multi-level converter that generates a first writing voltage signal based on the first writing data signal, and outputs the first writing voltage signal to be provided to the flash memory, wherein, to generate the first writing voltage signal, the first multi-level converter selects a voltage of the first writing voltage signal from a plurality of voltages in accordance with a plurality of bits of the first writing data signal; a host interface that outputs a second reading data signal to be transferred to a host; and a second multi-level converter that receives the second reading data signal, and generates a second reading voltage signal to be provided to the host based on the second reading data signal, wherein a voltage of the second reading voltage signal is selected from the plurality of voltages in accordance with a plurality of bits of the second reading data signal, and wherein the second multi-level converter receives a second writing voltage signal from the host, generates a second writing data signal in the unit of a plurality of bits based on the second writing voltage signal, and outputs the second writing data signal to be provided to the host interface.