Patent ID: 7348622

Claim:
An integrated circuit comprising: a semiconductor substrate comprising a trench therein; a memory charge storage node at least partially located in the trench; and a transistor comprising a first source/drain region in the semiconductor substrate, the first source/drain region being electrically coupled to the charge storage node, wherein in a planar vertical cross section the trench has a first side and a second side opposite to the first side, and the first source/drain region is present at the first side of the trench but not at the second side of the trench; wherein the charge storage node has a protrusion on its top surface at the first side of the trench, the protrusion being adjacent to the first source/drain region, and the charge storage node also has a top surface portion laterally adjacent to said protrusion and present at the second side of the trench; wherein in said cross section the trench sidewall has a substantially straight semiconductor sidewall portion on the second side of the trench, the semiconductor sidewall portion being part of the semiconductor substrate and comprising semiconductor material, and the semiconductor material in the semiconductor sidewall portion rises from below the top surface portion of the charge storage node to a position above the top surface portion of the charge storage node on the second side of the trench.