Patent ID: 8132254

Claim:
A data processing apparatus comprising: processing logic for executing software routines including a system control register setting routine; a plurality of system control registers for storing access control information for a plurality of system resources available to the processing logic when executing at least a subset of said software routines; at least one write control register containing one or more fields, each field being associated with one or more of the system control registers; and disable control logic for generating a disable signal, wherein when the disable signal is clear the system control register setting routine is configured to write access control information in said system control registers, and for each of said one or more fields contained in the at least one write control register, to selectively enter write restriction data in that field; wherein when the disable control logic sets the disable signal, the at least one write control register is only readable by any software routines of said subset, and for each field that has write restriction data therein, those associated one or more system control registers indicated by the write restriction data are only readable by any software routines of said subset.