Patent ID: 8575654

Claim:
A method of forming a strained semiconductor channel, comprising steps of: forming a relaxed SiGe layer on a semiconductor substrate, wherein an etch stop layer is formed in the forming the relaxed SiGe layer; forming a dielectric layer on the relaxed SiGe layer and forming a sacrificial gate on the dielectric layer, wherein the dielectric layer and the sacrificial gate form a sacrificial gate stack structure; depositing an interlayer dielectric layer, which is planarized to expose the sacrificial gate; etching to remove the sacrificial gate and the dielectric layer to form an opening; etching the relaxed SiGe layer through the opening and stopping on the etch stop layer; forming a semiconductor epitaxial layer by selective semiconductor epitaxial growth in the opening, wherein the semiconductor epitaxial layer is flush with the relaxed SiGe layer; depositing a high-K dielectric layer and a metal layer; and removing the high-K dielectric layer and metal layer covering the interlayer dielectric layer by planarizing the deposited metal layer and high-K dielectric layer to form a metal gate.