Patent ID: 7663517

Claim:
A power OK (POK) generator comprising: a precision reference source generating current at a precision reference voltage, the precision reference source having an op-amp operating in closed loop mode with active circuitry for temperature compensation; a plurality of voltage dividers, each of the voltage dividers generating a reference voltage from the precision reference voltage; a multiplexer receiving each of the reference voltages, the multiplexer selecting one of the reference voltages based on one or more select signals, the one or more select signals being derived from one or more bits of a digital-to-analog converter (DAC) code, the DAC code defining a selection code for picking a target core voltage, the multiplexer thereby providing a selected reference voltage; a comparator receiving the selected reference voltage from the multiplexer and a core voltage provided by a core voltage generator that is distinct from the multiplexer and the DAC code, the comparator outputting power fail input (PFI) signal that indicates whether the core voltage is greater than the selected reference voltage; and an output stage circuit receiving the PFI signal and generating a power OK (POK) signal, the POK signal being asserted after a predetermined delay from the time that the PFI signal changes from a low voltage to a high voltage so as to allow the PFI signal to stabilize and to ensure that the high voltage has been reached.