Patent ID: 7423572

Claim:
A converter for converting a digital signal having N bits (N is an integer of 3 or more) into an analog signal using a plurality of reference voltages different from each other, comprising: a selective voltage dividing circuit having a plurality of MOS transistors functioning as switches, and for selecting two reference voltages of the plurality of reference voltages via the same number of MOS transistors of the plurality of MOS transistors in accordance with upper (N−m) bits of the digital signal, and dividing a difference between the two selected reference voltages into M using combined ON-resistances of M MOS transistor groups connected in series to each other of the plurality of MOS transistors to obtain (M−1) intermediate voltages, wherein M is any one of integers from 2 m to 2 m−1 +1 where m is an integer of 1 or more; and an output circuit for selectively outputting one of the two selected reference voltages or one of the (M−1) intermediate voltages in accordance with lower m bits of the digital signal.