Patent ID: 8314348

Claim:
A multilayer printed wiring board, comprising: a first interlaminar resin insulating layer; a first conductor circuit formed on the first interlaminar resin insulating layer; a second interlaminar resin insulating layer formed on the first interlaminar resin insulating layer and the first conductor circuit and having an opening portion exposing a portion of the first conductor circuit; a second conductor circuit formed on the second interlaminar resin insulating layer and comprising an electroless plating film formed on a surface of the second interlaminar resin insulating layer and an electrolytic plating film formed on the electroless plating film; and a via conductor formed in the opening portion of the second interlaminar resin insulating layer and configured to electrically connect the first conductor circuit and the second conductor circuit, wherein the surface of the second interlaminar resin insulating layer is treated with a catalyst which facilitates formation of the electroless plating film, the opening portion of the second interlaminar resin insulating layer has an inner wall face treated with the catalyst, and the via conductor comprises the electroless plating film formed on the inner wall face of the opening portion of the second interlaminar resin insulating layer but not formed to cover the portion of the first conductor circuit exposed by the opening portion, and the electrolytic plating film formed on the electroless plating film and on the portion of the first conductor circuit exposed by the opening portion of the second interlaminar resin insulating layer such that the electrolytic plating film is connected to the portion of the first conductor circuit exposed by the opening portion of the second interlaminar resin insulating layer; wherein the portion of the first conductor circuit exposed by the opening portion of the second interlaminar resin insulating layer is another electrolytic plating film such that the electrolytic plated film of the second conductor circuit is directly connected to the another electrolytic plated film; wherein the first conductor circuit comprises an electroless plating film haying an electrolytic plated film formed thereon and including the another electrolytic plated film.