Patent ID: 8158980

Claim:
A semiconductor device comprising: a plurality of pixels which include a pixel TFT and a storage capacitor, wherein the pixel TFT comprises: a first wiring line; a first insulating layer over the first wiring line; a second insulating layer over the first insulating layer; a silicon oxide film over the second insulating layer; a channel formation region over the silicon oxide film, wherein the first insulating layer, the second insulating layer, and the silicon oxide film are interposed between the channel formation region and the first wiring line; and a low concentration impurity region over the silicon oxide film, wherein the low concentration impurity region is in contact with the channel formation region and overlaps the first wiring line; and a gate electrode over the channel formation region, and wherein the storage capacitor comprises: a capacitor wiring line; the first insulating layer over the capacitor wiring line; the silicon oxide film over the first insulating layer; a semiconductor region over the silicon oxide film, wherein a concentration of an impurity included in the semiconductor region is substantially the same as that of the low concentration impurity region, and wherein the first wiring line and the capacitor wiring line are on the same layer.