Patent ID: 8624242

Claim:
A semiconductor integrated circuit comprising: a semiconductor substrate comprising four edges and four corners, each of the four corners corresponding to an intersection of a neighboring pair of the edges; four L-shaped peripheral wirings, each of the four L-shaped peripheral wirings having a first end and a second end and disposed on a periphery of the semiconductor substrate around a corresponding one of the four corners; a power supply wiring that is of a closed-loop shape and disposed on a periphery of the semiconductor substrate, the power supply wiring being connected with the first end of each of the four peripheral wirings and being provided with a power supply voltage; four detection circuits disposed on the semiconductor substrate so as to be surrounded by the power supply wiring, each of the four detection circuits detecting breaking of a corresponding one of the four peripheral wirings in response to a voltage at the second end of the corresponding one of the four peripheral wirings and outputting a detection signal; and four output pads disposed on the semiconductor substrate or adjacent the semiconductor substrate, the detection signal of each of the four detection circuits being outputted through a corresponding one of the four output pads.