Patent ID: 7199648

Claim:
A semiconductor integrated circuit device comprising: a first main power supply line extending in a first direction; a plurality of first sub-power supply lines extending in a second direction perpendicular to the first direction; a plurality of first switching MOS transistors, each of which connects a corresponding one of the plurality of first sub-power supply lines to the first main power supply line; a plurality of first logic circuits provided along each of the plurality of the first sub-power supply lines and connected in parallel thereto so that the first logic circuits are arranged to extend in the second direction perpendicular to the first main power supply lines; and wherein each of the plurality of first switching MOS transistors is kept an Off state in an operation stop state of the first logic circuits, wherein each of the plurality of first switching MOS transistors is kept in an On state in an operable state of the first logic circuits, and wherein the plurality of first switching MOS transistors are controlled by a common control signal so that each of the plurality of first switching MOS transistors have the same state.