Patent ID: 6909274

Claim:
A method of testing the input/output pins of an integrated circuit for alternating current (AC) defects consisting of the steps of: selecting an integrated circuit having a plurality of functional circuits coupled to a first set of input/output pins and a plurality of clocked storage devices arranged in data storage chains coupled to a second set of input/output pins and a scan-based interface by which data can be shifted through said chains of said clocked storage devices and extracted sequentially therefrom; coupling a tester having a first set and a second set of tester contacts to said integrated circuit; coupling said first set of tester contacts to said functional circuits through said first set of input/output pins; coupling respective ones of said second set of tester contacts to respective chains of said clocked storage devices; scanning a series of clock pulses into each of said clocked storage devices; scanning a data stream comprised of data bits into a first one of said chains to drive the input/output pins connected to said first one of said chains to a low state and then to a high state by determining the amount of time it takes for the pin to shift from a low state to a high state and then back to the low state, after the clock pulse that causes the transition has been received.