Patent ID: 7355443

Claim:
An integrated circuit comprising: a plurality of substantially identical interconnected building blocks laid out in a regular grid, each building block comprising: a logic cell; first routing means coupled to the logic cell for data communication between the logic cell and a first further logic cell on the grid in a first direction; and second routing means coupled to the logic cell for data communication between the logic cell and a second further logic cell on the grid in a second direction, and switch means for coupling the first routing means to the second routing means; characterized in that: a first subset of the plurality of building blocks have their respective first routing means form a part of a routing network surrounding the grid; a second subset of the plurality of building have their second routing means form a further part of a routing network surrounding the grid; and the integrated circuit further comprises a plurality of routing cells being coupled to the part and the further part of the routing network for completing the routing network surrounding the grid, and a plurality of interconnect cells that inter-couple the building blocks from the first subset and the second subset.