Patent ID: 7808417

Claim:
An ADC pipeline unit for converting input analog values to N-bit digital representations, the ADC pipeline unit implemented as a single integrated circuit and comprising: M lookahead pipeline stages, each lookahead pipeline stage generating 1 raw bit for a total of M raw bits, with M>N, the stages including open-loop residue amplifiers, the M lookahead pipeline stages comprising an input sample-and-hold stage for receiving the input analog value, the input sample-and-hold stage including: an input node; a main capacitor coupled between a first node and ground; a buffer having an input; a first switch(es) coupled between the input node and the main capacitor, and between the input node and the input to the buffer; and a second switch coupled between the first node and the input to the buffer; the first switch(es) closed and the second switch open during a sample phase and the first switch(es) open and the second switch closed during a hold phase; and a calibration unit coupled to the lookahead pipeline stages to compensate for non-linearity in the open-loop residue amplifiers.