Patent ID: 8275927

Claim:
A solid state non-volatile storage sub-system of a computer, comprising: a write-once storage sub-system memory device; a write-many storage sub-system memory device, wherein the write-once storage sub-system memory device comprises a recoverable system configuration; and a control to control traffic between a CPU of the computer and the storage sub-system to prevent an updated file system structure from overwriting the recoverable system configuration, wherein the write-once storage sub-system memory device comprises a flag, wherein the write-once memory storage sub-system memory device prevents writing and erasing operations unless the flag is in a selected state; wherein the write-once storage sub-system memory device and the write-many storage sub-system memory device form a single storage sub-system memory device; and wherein the single storage sub-system memory device comprises a memory array comprising: a first set of significant file system structures of the computer; a second set of significant file system structures of the computer; and pointers to at least one of the first set of significant file system structures and the second set of significant file system structures, wherein the pointers enable recovery of the computer using the first set of significant file system structures.