Patent ID: 7045856

Claim:
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an epitaxial layer of the first conductivity type formed above said semiconductor substrate; a first diffusion region of a second conductivity type including a low resistance layer having a first impurity concentration formed at said epitaxial layer and a high resistance layer being formed adjacent to this low resistance layer and having a second impurity concentration lower than said first impurity concentration; a first electrode electrically connected to said first diffusion region; a base region of the first conductivity type formed in said epitaxial layer to be adjacent to said first diffusion region; a gate electrode formed through a dielectric film while being adjacent to said base region; a second diffusion region of the second conductivity type formed adjacent to said base region; a third electrode electrically connected to said second diffusion region and said base region; a contact region of the first conductivity type penetrating said epitaxial layer for electrical connection of said third electrode and said semiconductor substrate; and a second electrode connected to said semiconductor substrate at a back surface of said semiconductor substrate; wherein said epitaxial layer has a thickness less than or equal to a lateral width of said high resistance layer substantially the same as a thickness of said first diffusion region and second diffusion region.