Patent ID: 8464006

Claim:
An apparatus for performing data transmission between processors using memory remapping in a multiprocessor system including a plurality of processor elements, the apparatus comprising: a first local switch of a first processor element having a control input coupled to a switch manager to receive control instructions from the switch manager to selectively connect a virtual page of the first processor element to a shared memory page of a shared physical memory that is shared by the first processor element and a second processor element; a second local switch of the second processor element having a control input coupled to the switch manager to receive control instructions from the switch manager to selectively connect a virtual page of the second processor element to the shared memory page of the shared physical memory; a shared page switch having a control input coupled to the switch manager to receive control instructions from the switch manager to selectively connect the shared memory page of the shared physical memory to the first local switch or the second local switch; and the switch manager selectively transmitting control instructions to the control inputs of the first local switch, the second local switch, and the shared page switch to remap a certain shared memory page of the shared physical memory storing data of a task performed by the first processor element to the virtual page of the second processor element and to remap an idle shared memory page of the shared physical memory to the virtual page of the first processor element, when the task performed by the first processor element and a task performed by the second processor element are completed.