Patent ID: 7782988

Claim:
A frequency synthesizer circuit for synthesizing a waveform having an output frequency f 1 , the circuit comprising: phase-selection circuitry having a clock input for receiving an input frequency provided by one of the plurality of phase signals of a multi-phase oscillator with frequency f o , data inputs for receiving a first integer M and a second integer N, and a plurality of phase-selection outputs, wherein the phase-selection circuitry computes based on the first and second integers when to activate the phase-selection output that corresponds to one of the phase signals of the multi-phase oscillator to produce a transition in the waveform of the output frequency such that there are M cycles of the output frequency for N cycles of the input frequency and the ratio M/N is less than one; a retiming network having inputs that receive the plurality of phase signals of the multi-phase oscillator and the plurality of phase-selection outputs and outputs that carry re-timed signals, said retiming network re-timing each phase-selection output so that each re-timed output is synchronous with the oscillator phase signal corresponding to the phase-selection output; and clock construction circuitry that constructs the output frequency waveform based on the re-timed outputs of the retiming network.