Patent ID: 8709885

Claim:
A method of manufacturing a semiconductor device including a plurality of transistors in a first region and a Schottky device in a second region, the method comprising: forming a plurality of n-type doped wells and p-type doped wells in the first region and a plurality of n-type doped wells and p-type doped wells in the second region; depositing a protection layer on the exposed semiconductor of each well in the second region; forming a silicide on the transistor wells of the first region by depositing a silicidation metal over the surface, annealing to form a silicide of the silicidation metal and removing the silicidation metal leaving the silicide; removing the protection layer of each well in the second region; depositing a Schottky material over the surface including exposed semiconductor of each well in the second region; and etching away the Schottky material except in a contact region in the well or wells in the second region to form a Schottky contact between the Schottky material and the well or wells in the second region.