Patent ID: 7776662

Claim:
A method of manufacturing a TFT LCD array substrate, comprising the steps of: (a) forming stacked layers of a gate metal layer, a first insulating layer, a semiconductor layer, and an etching stop layer sequentially on a substrate and patterning the stacked layers by forming a photoresist pattern as an etching mask so as to form a gate line and a gate electrode; (b) performing an ashing process so as to remove a part of the photoresist pattern on both sides, etching the etching stop layer using the remaining photoresist pattern so as to expose a part of the semiconductor layer on both sides, and then removing the remaining photoresist pattern; (c) applying a polymer layer on the substrate to cover sidewalls of the gate line and the gate electrode, the first insulating layer, and the semiconductor layer, and removing the polymer layer above the semiconductor layer and the etching stop layer; (d) forming an ohmic contact layer and a source/drain metal layer sequentially and patterning the source/drain metal layer and ohmic contact layer to form a first and a second source/drain electrodes and a trench in the ohmic contact layer in a channel region; (e) forming a passivation layer and patterning the passivation layer to form a via hole over the second source/drain electrode, and (f) forming a pixel electrode layer and patterning the pixel electrode layer to form a pixel electrode, wherein the pixel electrode is connected with the second source/drain electrode through the via hole.