Patent ID: 8015519

Claim:
A non-transitory computer-readable recording medium storing therein a verification supporting program that causes a computer to execute: recording in a memory, a DIRW matrix in which, among four states including Declare, Initialize, Read, and Write, a state transition that has a possibility of occurring in a register included in a circuit to be verified and information concerning validity of a path corresponding to the state transition are set; acquiring implementation information of the circuit to be verified, a verification scenario that is representative of contents of verification for the circuit to be verified, and a register list that indicates attributes of registers included in specifications of the circuit to be verified; creating, from the implementation information and the register list acquired at the acquiring, a control data flow graph that includes a control flow graph having a flow of control for implementation of the circuit to be verified described therein and further having a data flow graph written therein, the data flow graph having a flow of data in the control flow graph described therein; extracting, from the control data flow graph created at the creating, a data flow graph that has described therein a register; extracting, from the data flow graph extracted at the extracting the data flow graph, a path indicating the flow of data concerning the register; identifying, based on the data flow graph, the state transition of the path extracted at the extracting the path; determining whether the state transition identified at the identifying is set in the DIRW matrix; calculating, if at the determining, the state transition of the path has been determined to be set in the DIRW matrix, a value that can be substituted as a parameter in the register connected to the path, the verification scenario acquired at the acquiring and the control data flow graph being used in the calculating; and creating a verification scenario having a parameter that is obtained by setting the value calculated at the calculating in the verification scenario.