Patent ID: 7051063

Claim:
A filter circuit in a packet communications system comprising: at least one transconductor-capacitor (gm-C) filter having an adjustable capacitance; a replica transconductor-capacitor (gm-C) filter having an adjustable capacitance similar to the at least one transconductor-capacitor (gm-C) filter; a clock device coupled to an input of the replica transconductor-capacitor (gm-C) filter; a phase detector coupled to an output of the replica transconductor-capacitor (gm-C) filter and configured to detect a phase shift in a signal output by the replica transconductor-capacitor (gm-C) filter; wherein an amount of phase shift detected by the phase detector is utilized to adjust the capacitance in the at least one transconductor-capacitor (gm-C) filter and the replica transconductor-capacitor (gm-C) filter, in order to tune a cut-off frequency of the filter circuit; and the filter circuit further comprises a hold circuit configured to hold the adjusted capacitance in the at least one transconductor-capacitor (gm-C) filter for only a duration of a packet being received, and then readjusts the at least one transconductor-capacitor (gm-C) filter upon receipt of a next packet.