Patent ID: 8084816

Claim:
A module, comprising: a first semiconductor chip having a first contact pad on a first main surface and a second contact pad on a second main surface; a first electrically conductive layer applied to the first main surface of the first semiconductor chip; a second electrically conductive layer applied to the second main surface of the first semiconductor chip; a first electrically insulating material covering a surface of the first electrically conductive layer facing away from the first semiconductor chip; and a second electrically insulating material arranged between the first electrically conductive layer and the second electrically conductive layer, wherein the first electrically conductive layer defines a boundary between the first electrically insulating material and the second electrically insulating material, wherein the first electrically insulating material is different from the second electrically insulating material, wherein a surface of the second electrically conductive layer forms an external contact pad and the second electrically conductive layer has a thickness of less than 200 μm, and wherein the second contact pad of the first semiconductor chip is a gate terminal.