Patent ID: 7821293

Claim:
An asynchronous interconnection system comprising a transmitter circuit and a receiver circuit inserted between respective first and second voltage references and having respective transmitter and receiver nodes coupled in a capacitive manner, said receiver circuit comprising: a recovery stage inserted between said first and second voltage references of said receiver circuit and connected to said receiver node; and a state control stage, in turn inserted between said first and second voltage references of said receiver circuit, connected to said recovery stage correspondence with a first feedback node providing a first control signal and having a second feedback node connected in a feedback manner to said recovery stage. said recovery stage comprising a first feedback loop connected to said first feedback node and acting in such a way to recover a received voltage signal and a second feedback loop connected to said second feedback node and acting in such a way to deactivate the recovery feedback on said receiver node and guarantee that said receiver node is set in a high impedance state.