Patent ID: 7860967

Claim:
An apparatus comprising: a first peripheral processor, wherein said first peripheral processor is configured to perform a first packet processing task, said first packet processing task is at least one packet processing task of a set of a packet processing tasks, and each packet processing task of said set of packet processing tasks is one of packet parsing, packet deconstruction, packet searching, and packet editing; a second peripheral processor, wherein said second peripheral processor is configured to perform a second packet processing task, said second packet processing task is one of a plurality of packet processing tasks, and said plurality of packet processing tasks comprises said each packet processing task of said set of packet processing tasks; and a central processor configured to receive a packet, wherein said packet comprises information, process said packet by virtue of being configured to cause said first peripheral processor to perform said first packet processing task, wherein said first packet processing task is performed using said information, determine said second packet processing task by virtue of being configured to evaluate a result of said first packet processing task, and cause said second peripheral processor to perform said second packet processing task.