Patent ID: 7937832

Claim:
A method of producing a wired circuit board, comprising: preparing an insulating layer; forming a conductive pattern on the insulating layer, wherein the conductive pattern includes exposed terminal portions; forming a metal plating layer on each of the exposed terminal portions of the conductive pattern, such that the metal plating layer is formed on each of the exposed terminal portions to entirely cover a longitudinal end surface, widthwise side surfaces, and an upper surface of each of the exposed terminal portions; and pressing a surface of the metal plating layer to embed a lower end portion of the longitudinal end surface and the widthwise side surfaces of the metal plating layer and a lower end portion of each of the terminal portions of the conductive pattern into the insulating layer, wherein each of the exposed terminal portions covered with the metal plating layer is thereby partially embedded in the insulating layer, such that an upper end portion of the longitudinal end surface and the widthwise side surfaces of the metal plating layer on each of the exposed terminal portions is not embedded in the insulating layer.