Patent ID: 7786763

Claim:
A system for determining whether a frequency of a second clock signal is a harmonic frequency of a frequency of a first clock signal, the system comprising: a first counter configured to generate a first divided clock signal by dividing the frequency of the first clock signal by a first divisor; a second counter configured to generate a second divided clock signal by dividing the frequency of the second clock signal by a second divisor; and a frequency comparator coupled to the first counter and the second counter, the frequency comparator configured to generate an output indicating whether a frequency of the second divided clock signal is at least twice a frequency of the first divided clock signal, the frequency comparator comprising: a first flip-flop comprising a clock input configured to receive the second divided clock signal, the first flip-flop further configured to generate an output signal based on the first divided clock signal and the second divided clock signal; and a second flip-flop comprising a clock input configured to receive the second divided clock signal, the second flip-flop further configured to generate the output based on the output signal and the second divided clock signal.