Patent ID: 8187957

Claim:
A method for fabricating complementary field-effect transistors, the method comprising: forming a metallic film on first regions and second regions of Si x Ge 1-x (0≦x<1) layer, the first regions being where a first channel region of an n-channel field-effect transistor is to be formed therebetween, the second regions being where a second channel region of a p-channel field-effect transistor is to be formed therebetween; after the forming of the metallic film, performing heat treatment to form source and drain regions of a compound in the first regions and in the second regions, respectively, the compound including at least one of silicon and germanium and including a metal of the metallic film; after the performing of the heat treatment, implanting first atoms which are phosphorus, arsenic, antimony, sulfur, selenium or tellurium in the source and drain regions formed in the first regions; and diffusing the first atoms to form first layers which include the first atoms at first junction interfaces between the first channel region and the source region formed in one of the first regions and between the first channel region and the drain region formed in another of the first regions.