Patent ID: 8539144

Claim:
A method of performing a programming of 1 st through N th page data in a nonvolatile memory, where N is an integer greater than 2, and where the nonvolatile memory comprises a memory cell array and page buffers, the memory cell area comprising a single level cell (SLC) area and a multi level cell (MLC) area, and the page buffers commonly used for both of the SLC area and the MLC area, the method comprising the operations of: (a) loading the 1 st page data to the page buffers; (b) programming the 1 st page data from the page buffers to the SLC area using an SLC programming operation after operation (a); (c) repeating operations (a) through (b) for 2 nd page data; (d) loading 3 rd page data to the page buffers after operation (c); (e) reading the 1 st page data and the 2 nd page data from the SLC area to the page buffers after operation (d); and then, (f) programming the 1 st page data, the 2 nd page data and the 3 rd page data from the page buffers to the MLC area using an MLC programming operation simultaneously.