Patent ID: 8319116

Claim:
A multi-layer printed circuit board (PCB) comprising: a plurality of conductive layers with dielectric material disposed therebetween, wherein the plurality of conductive layers include a plurality of signal layers and a plurality of ground layers; a plated through-hole that extends through the PCB, the plated-through hole including a conductive lining that forms a barrel; a via, spaced apart from the plated through-hole, electrically coupled to and in contact with each of the plurality of ground layers, wherein the plated through-hole is electrically coupled to the via, and wherein the plated through-hole is spaced apart from each of the plurality of ground layers; and an electrically-nonfunctional land formed in one of the plurality of conductive layers, the electrically-nonfunctional land being in contact with an outer wall of the barrel of the plated through-hole.