Patent ID: 7816205

Claim:
A method of forming a flash memory device on a substrate, the method comprising: (a) forming a silicon dioxide layer on a substrate; (b) forming a charge trapping silicon nitride layer on the silicon dioxide layer, the charge trapping silicon nitride layer comprising a compositional gradient in which a ratio of silicon to nitrogen varies through a thickness of the charge trapping silicon nitride layer, by: (i) placing the substrate in a process zone having a pair of electrodes; (ii) introducing a process gas into the process zone, the process gas comprising a silicon-containing component and nitrogen-containing component; (iii) applying energy at a first power level to the pair of electrodes about the process zone to generate a plasma of the process gas to deposit silicon nitride having a first ratio of silicon to nitrogen; (iv) applying energy at a second power level to the pair of electrodes about the process zone, wherein the first power level is higher than the second power level by at least 200 watts, to generate a plasma of the process gas to deposit silicon nitride having a second ratio of silicon to nitrogen, the second ratio being different from the first ratio; (c) depositing a dielectric material on the charge trapping silicon nitride layer; and (d) depositing a conductive gate on the dielectric material.