Patent ID: 8703578

Claim:
A method comprising: forming first and second high-k metal gate (HKMG) gate stacks on a substrate, each HKMG gate stack including a silicon dioxide (SiO 2 ) cap; forming extension regions at opposite sides of the first HKMG gate stack; forming a nitride liner followed by oxide spacers on each side of each of the first and second HKMG gate stacks subsequent to forming the extension regions at opposite sides of the first HKMG gate stack; forming a hardmask over the second HKMG gate stack subsequent to forming the nitride liner and oxide spacers; forming embedded silicon germanium (eSiGe) at opposite sides of the first HKMG gate stack subsequent to forming the hardmask; removing the hardmask subsequent to forming the eSiGe; forming a conformal liner and nitride spacers on the oxide spacers of each of the first and second HKMG gate stacks subsequent to removing the hardmask; and forming deep source/drain regions at opposite sides of the second HKMG gate stack subsequent to forming the conformal liner and nitride spacers.