Patent ID: 7449754

Claim:
A BiCMOS integrated circuit (IC) comprising: a substrate of a first conductivity type, the substrate having a first doping concentration; a first well region of a second conductivity type disposed in the substrate and having a second doping concentration; a first body region of the first conductivity type disposed in the first well region, the first body region having a third doping concentration that is at least five times higher than the second doping concentration; a gate dielectric disposed on the first body region; a control gate disposed on the gate dielectric; source and drain regions of the second conductivity type disposed in the first body region on opposite sides of the control gate, the source and drain regions having a fourth doping concentration that is higher than the third doping concentration; a second body region disposed in the first well region of the first conductivity type disposed and having the third doping concentration; and a plate portion disposed over the second body region and being connected to the control gate, wherein the plate portion and second body region form a coupling capacitor.