Patent ID: 6855575

Claim:
A method for manufacturing a semiconductor chip package, the method comprising: preparing a semiconductor chip having a plurality of center bonding pads formed on a surface of the semiconductor chip in a central area of the surface and a plurality of edge bonding pads formed along edges of the surface of the semiconductor chip; preparing a substrate comprising: a first window; a second window; a plurality of connection pads around the first and second windows on a top surface of the substrate; a plurality of external terminal pads on the top surface; and a wiring pattern that connects the connection pads to the external terminal pads; attaching the semiconductor chip on a bottom surface of the substrate such that the first window exposes the center bonding pads and the second window exposes the edge bonding pads; connecting the first and second bonding pads of the semiconductor chip to corresponding connection pads of the substrate; encapsulating side surfaces of the semiconductor chip, a portion of the bottom surface of the substrate, the bonding wires, and the connection pads; and forming external terminals on the external terminal pads of the substrate.