Patent ID: 7110441

Claim:
A spreading code generation circuit which outputs a spreading code used for despreading of spectrum spreading communication and to which there are input, from a control apparatus for detecting a synchronization timing change of a reception base band signal, in accordance with a change, advance/delay information showing advance or delay of phase; control amount information showing the number of continuous implement of phase control for a chip time as an output time basis of the spreading code; symbol offset information showing a symbol count value having a head position of a new slot; slot offset information showing a slot count value having a head position of a new frame; and phase copy information containing an instruction to synchronize with a copy origination frame timing signal, said spreading code generation circuit comprising a sample counter for counting for each sample time and adjusting the count value in accordance with the chip timing signal as the spreading code generation timing and the advance/delay information and the control amount information to perform phase control; a chip timing generator for outputting a chip timing signal when the sample count signal is a first count value; a chip counter for counting in synchronization with the chip timing signal and outputting the count value as a chip count signal; a symbol timing generator for outputting a symbol timing signal when the chip count signal is a second count value; a symbol counter for counting in synchronization with the symbol timing signal and outputting the count value as a symbol count signal; a slot timing generator using the symbol count value indicated by the symbol offset information as a third count value and outputting a slot timing signal when the symbol count signal is the third count value; a slot counter for counting in synchronization with the slot timing signal and outputting the count value as the slot count signal; a frame timing generator using the slot count value indicated by the slot offset information as a fourth count value and outputting a frame timing signal when the slot count signal is the fourth value; a spreading code generator for synchronizing the output timing of a spreading code with the initial phase in accordance with the frame timing signal and outputting the spreading code in synchronization with the chip timing signal; and a phase copy controller for outputting a clear signal for synchronizing the output timings of signals output from the sample counter, the chip counter, the symbol counter and the slot counter with the aforementioned copy origination frame timing signal.