Patent ID: 8612922

Claim:
A method of automating the validation of constraints associated with circuit design objects in a circuit design created using an electronic design automation tool, comprising: using a computer for providing a template type in a computer system; wherein the template type includes a selectable template type identifier in produced in a computer user interface display of the computer system to identify the template type; wherein template type includes template instance generation code stored in non-transitory computer readable storage media of the computer system to run a template instance generation process; wherein the template type includes template instance validation code stored in non-transitory computer readable storage media to run a template instance validation process; receiving by the computer system, a user selection of the template type identifier; in response to the received user selection of the template type identifier, invoking the template instance generation code to run the template instance generation process on the computer system, to produce a template instance; wherein the produced template instance identifies a constraint set that includes multiple constraints and that identifies associations between the multiple constraints in the constraint set and the one or more design objects to store the produced template instance in the memory device and to create an association in the memory device between the produced template instance and the template type; in response to receiving notification of an event that could cause the template instance to become invalid, invoking the validation process to validate the constraints associated with the template instance; receiving a success indicator from the validation process; and if the success indicator indicates that the constraints are not valid, invoking a recovery process.