Patent ID: 8446166

Claim:
An integrated circuit comprising: a state machine circuit; a first plurality of composite circuit elements and a second plurality of composite circuit elements adjacent to the first plurality of composite circuit elements, each composite circuit element of the first and second pluralities of composite circuit elements comprising an element interface and a circuit element of a plurality of circuit element types, a first composite circuit element of the first plurality of composite circuit elements configurable to perform a first function, a second composite circuit element of the first plurality of composite circuit elements configurable to perform a second function, a third composite circuit element of the second plurality of composite circuit elements configurable to perform the second function and to perform a third function; a plurality of queues to transfer a data word between the first plurality of composite circuit elements and the second plurality of composite circuit elements; and a first full interconnect bus coupling every output of the first plurality of composite circuit elements to every input of the first plurality of composite circuit elements and to the plurality of queues; wherein the first composite circuit element has a configurable first data link through the first full interconnect bus to the second composite circuit element for performance of a first data operation and a configurable second data link through a queue of the plurality of queues to the third composite circuit element for performance of a second data operation.