Patent ID: 7545020

Claim:
A device comprising: a semiconductor substrate having a trench, wherein the semiconductor substrate is doped with first conduction type impurities; impurity regions formed spaced apart and heavily doped with first conduction type impurities and formed in sidewalls of the trench; a first insulating layer formed on and contacting sidewalls of the impurity regions and also on and contacting a bottommost surface of the semiconductor substrate provided in the trench, wherein the bottommost surface of the semiconductor substrate provided in the trench is not heavily doped with the first conduction type impurities; conduction patterns formed spaced apart and doped with second conduction type impurities and formed at the sidewalls of the trench on a portion of the first insulating layer; and a second insulating layer filled in the trench, wherein the respective uppermost surfaces of the semiconductor substrate, the impurity regions, the first insulating layer and the second insulating layer are coplanar.