Patent ID: 8149015

Claim:
A transceiver system, comprising: a first semiconductor device having a first input/output (I/O) pad connected with an I/O channel, and including a first terminator/driver configured to terminate the first I/O pad with a first voltage when data is received, and maintain the first I/O pad and the I/O channel at the first voltage when data is transmitted; and a second semiconductor device having a second I/O pad connected with the I/O channel, and configured to terminate the second I/O pad with a second voltage higher than the first voltage when data is received, and maintain the second I/O pad and the I/O channel at the second voltage when data is transmitted, wherein the first semiconductor device includes a decoder/selector configured to output a control signal to the first terminator/driver in response to an externally input command signal during a read operation, and output the control signal to the first terminator/driver in response to an output signal of a memory cell array during a write operation.