Patent ID: 7943448

Claim:
A method comprising: sequentially forming an oxide layer and a nitride layer on an upper part of a semiconductor substrate; forming a lightly doped drain (LDD) in the semiconductor substrate through an ion implantation process using a first mask layer having a first hole pattern; forming a channel area in a center of the LDD having a width narrower than the first hole pattern using the nitride layer which is etched to remove the width narrower than a width of the first hole pattern; selectively removing the oxide layer of the channel area through an etching process using the etched nitride layer; forming a gate insulating layer in an area where the oxide layer was removed; and forming a gate over the gate insulating layer and within the etched nitride layer, wherein forming the channel area in the center of the LDD comprises: forming a second mask layer having a second hole pattern on an upper part of the nitride layer, the second hole pattern having a width narrower than the width of the first hole pattern; removing the second mask layer after selectively etching the nitride layer using the second mask layer; and implanting ions having a conductive type opposite of a conductive type of ions used to form the LDD using the etched nitride layer as a mask.