Patent ID: 7475182

Claim:
A method for mixing system on chip bus architectures, comprising the steps of: combining a CoreConnect system on chip architecture and an advanced microprocessor bus architecture (AMBA) system on-chip architecture into a single architecture; maintaining a single processor local bus; dividing an on-chip peripheral bus into a first on-chip peripheral bus and a second on-chip peripheral bus; interconnecting said first on-chip peripheral bus with said single processor local bus, and interconnecting said second on-chip peripheral bus with said single processor local bus; assigning a first DMA controller to said first on-chip peripheral bus; assigning a second DMA controller to said second on-chip peripheral bus; limiting communication of said second DMA controller to resources of said AMBA system on-chip architecture while allowing access of said first DMA controller to resources of said CoreConnect system; and performing a read access to an AMBA high-speed bus (AHB) slave by said second DMA controller across said second on-chip peripheral bus simultaneously with a processor access to an external bus controller, wherein no arbitration is required between said first and second on-chip peripheral bus with said read access by said second DMA controller.