Patent ID: 7253095

Claim:
A method for forming an air gap structure in an integrated circuit, the method comprising: forming a device layer; and forming at least a first dielectric layer on the device layer; and patterning said at least first dielectric layer to form first openings therein; and forming at least an aluminum based conductive layer on the at least first dielectric layer and so as to fill said first openings therein; and removing a part of said at least an aluminum based conductive layer to form an interconnect structure of aluminum based conductive lines; and forming a second opening between two adjacent aluminum based conductive lines in said interconnect structure; and wherein said second opening is characterized by a trench depth that can be varied by controlling an etch process; forming a second dielectric layer over said second opening to form at least one air gap between said two adjacent aluminum based conductive lines; wherein said second dielectric layer includes both a CVD layer, and an HDPCVD layer formed in sequence; further wherein said at least one air gap has a height that is controlled in part by said trench depth.