Patent ID: 8709936

Claim:
A method of forming an integrated circuit substrate connected to a conductor, the method comprising: providing a substrate having a first through silicon via and a second through silicon via within the substrate, wherein the substrate has a backside and the first through silicon via has a first height and the second through silicon via has a second height, the first height greater than the second height; exposing, through the backside of the substrate, an end of the first through silicon via and an end of the second through silicon via; forming an insulator over the backside of the substrate, the end of the first through silicon via and the end of the second through silicon via; forming a first opening and a second opening in the insulator, wherein the first opening exposes a bottom surface and a side of the first through silicon via and the second opening exposes a bottom surface of the second through silicon via; and forming a first conductor in the first opening and second conductor in the second opening, where in the first conductor contacts the bottom surface and the side of the first through silicon via and the second conductor contacts the bottom surface of the second through silicon via.