Patent ID: 7982487

Claim:
A test apparatus for determining layer-to-layer misregistration of a multiple layer printed circuit board having an electrical test pattern with at least one plated through-hole, the test pattern formed on at least one inner layer and an electrical test reference formed on at least one outer layer of the printed circuit board with the test reference electrically connected to the test pattern, the test apparatus comprising: a holder for a printed circuit board; an electrical input device configured to move into and out of electrical connection with the electrical test reference when the printed circuit board is received in the holder, the input device adapted to provide an electrical signal to the electrical test reference on the printed circuit board; and an electrical output probe configured to move into and out of electrical connection with the electrical test pattern when the printed circuit board is received in the holder, the output probe adapted to receive at least one electrical signal from the electrical test pattern when an electrical signal is provided to the electrical test reference, such that the electrical signal received by the output probe conveys layer-to-layer misregistration between the at least one inner layer and the at least one outer layer, the electrical signal further conveying a location of the at least one plated through-hole.