Patent ID: 8916481

Claim:
A method, comprising: forming a reconstituted wafer by embedding a first semiconductor die in a first molding compound layer, with a face of the first semiconductor die lying substantially in a first plane with a face of the first molding compound layer of the reconstituted wafer; positioning a first redistribution layer on a first surface of the reconstituted wafer, including forming a first plurality of electrically conductive traces with ones of the first plurality of electrically conductive traces in electrical contact with respective ones of a plurality of circuit contacts positioned on the face of the first semiconductor die; drilling a first plurality of apertures into the reconstituted wafer, each extending from a second surface of the reconstituted wafer at least as far as a respective one of the first plurality of electrically conductive traces of the first redistribution layer; drawing a vacuum around the reconstituted wafer; and filling each of the first plurality of apertures with solder by positioning solder on the second surface of the reconstituted wafer adjacent to an opening of each of the first plurality of apertures, melting the solder positioned on the second surface, and releasing the vacuum while the solder is molten so that the solder fills the apertures, the solder being placed in electrical contact with the respective one of the first plurality of electrically conductive traces.