Patent ID: 7567447

Claim:
An electrical switching device, comprising: a drive circuit generating a voltage signal; a first IGBT having a first gate terminal, a first collector terminal, and a first emitter terminal, the first gate terminal receiving the voltage signal from the drive circuit via a first resistor coupled between the drive circuit and the first gate terminal, the first collector terminal coupled to a voltage source; a second IGBT having a second gate terminal, a second collector terminal, and a second emitter terminal, the second emitter terminal coupled to the first emitter terminal, the second gate terminal receiving the voltage signal from the drive circuit via a second resistor coupled between the drive circuit and the second gate terminal, the second collector terminal coupled to the first collector terminal; a third resistor coupled between the first gate terminal of the first IGBT and a node; and a fourth resistor coupled between the second gate terminal of the second IGBT and the node, such that when the first and second gate terminals receive the voltage signal from the drive circuit via the first and second resistors, respectively, an amplitude of a first voltage between the first gate terminal and the first emitter terminal is substantially equal to a second voltage between the second gate terminal and the second emitter terminal, resulting in a first current flowing from the first emitter terminal of the first IGBT to a load to be substantially equal to a second current flowing from the second emitter terminal of the second IGBT to the load; a third IGBT having a third gate terminal, a third collector terminal, and a third emitter terminal, the third emitter terminal coupled to the second emitter terminal, the third gate terminal receiving the voltage signal from the drive circuit via a fifth resistor coupled between the drive circuit and third gate terminal, the third collector terminal coupled to the second collector terminal; and a sixth resistor coupled between the third gate terminal of the third IGBT and the node, such that when the first, second, and third gate terminals receive the voltage signal from the drive circuit via the first, second, and third resistors, respectively, an amplitude of the first voltage between the first gate terminal and the first emitter terminal is substantially equal to both the second voltage between the second gate terminal and the second emitter terminal and a third voltage between the third gate terminal and the third emitter terminal, resulting in the first current flowing from the first emitter terminal of the first IGBT to the load to be substantially equal to both the second current flowing from the second emitter terminal of the second IGBT to the load, and a third current flowing from the third emitter terminal of the third IGBT to the load.