Patent ID: 8541692

Claim:
A printed wiring board, comprising: a plurality of first conductive patterns arranged adjacently in a first direction and separated by first gaps; a plurality of conductive pattern rows comprising the plurality of first conductive patterns; a conductive pattern group comprising the plurality of conductive pattern rows arranged adjacently in a second direction that intersects the first direction and separated by third gaps; and a plurality of second conductive patterns which are smaller than the first conductive patterns, at least one of the second conductive patterns connecting one first conductive pattern located at one end of one conductive pattern row to one first conductive pattern adjacent thereto in the second direction, and further second conductive patterns connecting each of the other first conductive patterns which are in the same row as the one first conductive pattern to two other first conductive patterns adjacent thereto in the second direction, wherein the plurality of conductive pattern rows include a first row and a second row which are adjacent to each other, a first line that connects central points of each of the adjacent first conductive patterns which are included in the first row is not orthogonal to a second line that connects central points of each of the adjacent first conductive patterns which are included in the first row and the second row, each first conductive pattern includes a portion less than its whole that opposes an immediately adjacent first conductive pattern in the second direction, and when a conductive pattern row is located above another conductive pattern row, a leftmost position of the conductive pattern row is offset to the right of a leftmost position of a conductive pattern row that is located immediately beneath the offset conductive pattern row.