Patent ID: 7379452

Claim:
An integrated circuit synchronous read channel for receiving digitized read signals representing digitized samples of a read signal of a magnetic storage device and recovering digital data represented thereby, the integrated circuit comprising: a digital peak detector that operates to detect characteristics of the digitized read signals indicative of storage media transitions; timing recovery circuitry responsive to the digitized read signals and an output of the digital peak detector that operates to provide a timing control signal for controlling the timing of digitized samples of the read signal a sequence detector responsive to the digitized read signals that operates to receive a stream of the digitized read signals and determine a corresponding sequence of binary digital signals likely to be represented thereby; an RLL (d,k) decoder that operates to provide a run length limited decoded output by decoding the sequence of binary digital signals from the sequence detector, or to provide a run length limited decoded output by decoding a sequence of binary digital signals from the digital peak detector; digital pulse shaping filter circuitry that operates to modify the digitized read signals prior to receipt thereof by at least one of (i) the sequence detector, (ii) the digital peak detector and (iii) the timing recovery circuitry; and delay circuitry that operates to delay the coupling of the digitized read signals to the digital peak detector or the timing recovery circuitry to match the delay of the coupling of the digitized read signals to the timing recovery circuitry or the digital peak detector, respectively, imposed by the digital pulse shaping filter circuitry.