Patent ID: 8581328

Claim:
A semiconductor memory device, comprising: a nonvolatile memory cell having a first field effect transistor included in a first region of a main surface of a semiconductor substrate and a second field effect transistor included in a second region thereof and adjacent to the first field effect transistor; a first gate electrode of the first field effect transistor formed in the first region; a second gate electrode of the second field effect transistor formed in the second region; a gate insulating film formed between the semiconductor substrate and the first gate electrode; a charge storage layer formed between the semiconductor substrate and the second gate electrode and between the first gate electrode and the second gate electrode; a first insulating film formed between the semiconductor substrate and the charge storage layer and between the first gate electrode and the charge storage layer; and a second insulating film formed between the charge storage layer and the second gate electrode, wherein a thickness of the second insulating film between the second gate electrode and the first gate electrode is larger than a thickness of the second insulating film between the second gate electrode and the semiconductor substrate, and is 1.5 times or less the thickness of the second insulating film between the second gate electrode and the semiconductor substrate.