Patent ID: 7512858

Claim:
A method for synthesizing a plurality of digital clock signals to be applied to respective pins of an electronic device under test comprising a plurality of pins, said method comprising: generating a reference clock by a central clock generator; providing said reference clock from said central clock generator to a plurality of electronic circuits, each of said plurality of electronic circuits comprising a test signal processor, each of said test signal processors controlling at least one pin of said device under test for providing a stimulus in accordance with a predetermined signal pattern and for receiving a response to the stimulus; and on the basis of said reference clock, generating at the test signal processor a local digital clock signal, and providing said local digital clock signal to said pin of said device under test controlled by said test signal processor, wherein generating said local digital clock signal comprises modulating at the test signal processor the frequency, phase and/or amplitude of said local digital clock signal for said pin of said device under test controlled by said test signal processor according to digital data stored in a digital data source.