Patent ID: 7833858

Claim:
A method for forming a trench-type semiconductor device embodying a superjunction structure, comprising: forming interleaved regions by, in either order; forming first spaced-apart regions of a first semiconductor material having a first conductivity type and a first lattice constant, and forming second spaced-apart regions of a second semiconductor material interleaved with the first space-apart regions, and having a second different conductivity type and a second different lattice constant so that the second semiconductor material in the second regions is strained with respect to the first semiconductor material in the first regions and one or more PN junctions exists therebetween; providing a further region of substantially relaxed semiconductor material in contact with the first and second spaced-apart regions and having an outer surface; forming a trench having sidewalls in the further region extending from the outer surface substantially to the first and second spaced-apart regions; providing a strained semiconductor material on at least the sidewalls of the trench; forming a gate dielectric over the strained semiconductor material; providing a gate in contact with the gate dielectric, spaced apart thereby from the strained semiconductor material; and providing one or more source regions communicating with the strained semiconductor material and separated from the first and second spaced-apart regions by a portion of the strained semiconductor material.