Patent ID: 7955909

Claim:
A method of forming a semiconductor structure, the method comprising: forming a dummy gate in a semiconductor substrate; performing a SIMOX process to form a semiconductor-on-insulator (SOI) layer such that a first portion of said SOI layer under said dummy gate is substantially thinner than a second portion of said SOI layer, wherein said SOI layer is formed over a stair-shaped buried insulating (BOX) layer, said BOX layer having a first surface under said first portion of said SOI layer and a second surface under said second portion of said SOI layer, wherein said first surface and said second surface form a right angle step, wherein said BOX layer includes a thickness ranging from about 20.0 nm to about 500.0 nm and wherein said first portion of said SOI layer includes a thickness less than 50 nm; forming a source/drain extension in said SOI layer; and recessing said source/drain extension for forming a source/drain region; epitaxially growing said second portion of said SOI layer; forming an insulating layer over said epitaxial growth; removing said dummy gate for forming a gate opening; and filling said gate opening with a gate dielectric material and a gate conductor material, wherein said epitaxial growth is entirely below a bottom of said gate dielectric material.