Patent ID: 7900120

Claim:
A method of checking the integrity of data stored in a memory device, comprising: generating an error checking and correction (“ECC”) syndrome for each of a plurality of groups of data bits stored in the memory device; storing the respective ECC syndrome and a respective flag bit for each of the groups of data bits, the flag bit having a first value when the ECC syndrome is stored; changing the flag bit from the first value to a second value if any of the data bits in the respective group are modified; retrieving at least some of the data bits in a group and the respective flag bit; using the flag bit to determine if any of the data bits in the respective group have been modified; if the flag bit indicates any of the data bits in the respective group have been modified: generating a new ECC syndrome for the group containing the retrieved data bits; storing the new ECC syndrome; and changing the flag bit from the second value to the first value; and if the flag bit indicates none of the data bits in the respective group have not been modified, using the ECC syndrome to check the correctness of the retrieved data bits.