Patent ID: 6990543

Claim:
A memory module on which a plurality of memory devices are mounted, comprising: a plurality of tabs located on a front side and a rear side of the memory module for interfacing with a connector on a system board, wherein the plurality of tabs are grouped into corresponding sets of tabs on the front side and the rear side of the memory module, and wherein the sets of tabs comprise sets of data bus tabs and control/address bus tabs; a first memory device and a neighboring second memory device mounted on the front side of the memory module; a third memory device and a neighboring fourth memory device mounted on the rear side of the memory module; a first data bus extending from a first set of data bus tabs on the front side of the memory module to the first memory device, extending from the first memory device to the second memory device, extending from the second memory device to the third memory device through a first via, extending from the third memory device to the fourth memory device, and extending from the fourth memory device to a first set of data bus tabs on the rear side of the memory module; and a control/address bus extending from a first set of control/address bus tabs on the front side of the memory module to the first and the second memory devices, and commonly connecting to the first and the second memory devices, and extending from the front side of the memory module to the rear side of the memory module through a second via.