Patent ID: 8188568

Claim:
A semiconductor integrated circuit, comprising: a semiconductor substrate of a first conductivity type; a first diffusion layer of a second conductivity type formed on the semiconductor substrate or in an upper part of the semiconductor substrate; a second diffusion layer of the first conductivity type formed in an upper part of the first diffusion layer, and serving as a base; a third diffusion layer of the second conductivity type formed in an upper part of the second diffusion layer, and serving as an emitter; a fourth diffusion layer of the second conductivity type formed in the upper part of the first diffusion layer so as to be separated from the second diffusion layer, and serving as a collector contact; and a fifth diffusion layer of the first conductivity type formed at least below the third diffusion layer so as to be separated from the second diffusion layer in a depth direction, and so as to have a lower end located below a lower end of the first diffusion layer, wherein a sum of a shortest distance from the third diffusion layer to the fifth diffusion layer and a shorter one of a shortest distance from the fifth diffusion layer to the fourth diffusion layer and a shortest distance from the lower end of the first diffusion layer to the fourth diffusion layer is smaller than a shortest distance from the third diffusion layer to the fourth diffusion layer.