Patent ID: 7074658

Claim:
A fabrication method for an LDMOS transistor, comprising steps of: providing a semiconductor silicon substrate having a surface region of a first conductive type; forming a horseshoe-shaped gate layer on the semiconductor silicon substrate, in which the gate layer comprises a transverse-extending area, a first lengthwise-extending area connected to a left end of the transverse-extending area and a second lengthwise-extending area connected to a right end of the transverse-extending area; forming a first source region of the first conductive type in the surface region of the semiconductor silicon substrate and at the left periphery of the first lengthwise-extending area of the gate layer; forming a second source region of the first conductive type in the surface region of the semiconductor silicon substrate and at the right periphery of the second lengthwise-extending area of the gate layer; forming a first drain region of the first conductive type in the surface region of the semiconductor silicon substrate and between the first lengthwise-extending area and the second lengthwise-extending area of the gate layer; forming a first ion-diffusion body of a second conductive type in the surface region of the semiconductor silicon substrate to surround the sidewalls and bottom of the first source region; and forming a second ion-diffusion body of a second conductive type in the surface region of the semiconductor silicon substrate to surround the sidewalls and bottom of the second source region; wherein, the left periphery of the first lengthwise-extending area of the gate layer overlaps the periphery of the first ion-diffusion body to form a first overlapping portion, and the right periphery of the second lengthwise-extending area of the gate layer overlaps the periphery of the second ion-diffusion body to form a second overlapping portion.