Patent ID: 8803591

Claim:
A forward bulk biasing circuit for a p-channel metal-oxide semiconductor (PMOS) transistor, comprising: a PMOS transistor ( 102 ) having a source terminal for receiving a supply voltage and a gate terminal connected to an input terminal for receiving an input signal; a second transistor ( 104 ) having a source terminal connected to a bulk terminal of the PMOS transistor for forward bulk-biasing the bulk terminal, a drain terminal connected to a drain terminal of the PMOS transistor, and a gate terminal connected to the gate terminal of the PMOS transistor and the input terminal for receiving the input signal; a capacitor ( 110 ) having a first terminal connected to the source terminal of the second transistor and the bulk terminal of the first transistor, and a second terminal connected to the gate terminals of the PMOS transistor and the second transistor; and a third transistor ( 106 ) having a drain terminal connected to the first terminal of the capacitor, a source terminal connected to the input terminal and the gate terminal of the first transistor, and a gate terminal connected to the drain terminal of the PMOS transistor, wherein an output signal is generated at an output terminal connected to the drain terminal of the PMOS transistor.