Patent ID: 7079060

Claim:
A test circuit for evaluating a characteristic of an analog signal of a device, comprising: a comparator outputting a first signal when a potential of an analog signal of said device is within a predetermined range and outputting a second signal when the potential of the analog signal of said device is out of the predetermined range; a timing generator generating a timing signal constituted of a pulse signal train; a determination circuit operating in synchronization with said timing signal and determining whether an output signal of said comparator matches with predetermined expected value data; a clock generation circuit generating a clock signal; a logic circuit receiving the output signal of said comparator, passing and outputting the clock signal from said clock generation circuit in response to said first signal, and blocking the clock signal from said clock generation circuit in response to said second signal; an analog-digital converter operating in synchronization with an output signal of said logic circuit, converting the analog signal of said device to digital data, and outputting resultant digital data; and an analysis unit analyzing the digital data from said analog-digital converter; wherein said determination circuit conducts a function test to determine whether timing of a slope section of a waveform of said analog signal is within a predetermined range, and said analysis unit conducts a sloping waveform test to evaluate a sloping state of the waveform of said analog signal.