Patent ID: 7968945

Claim:
A microelectronic device comprising: a substrate; at least one first transistor including at least one source region, at least one drain region, at least one structure forming at least one channel connecting the source region and the drain region, and at least one gate; a piezoelectric layer including a piezoelectric material and supported on at least one portion of the at least one gate and above at least one portion of at least one of said source and/or drain regions, the piezoelectric layer at least partially contacting at least one flank of the at least one gate, and the piezoelectric layer inducing a mechanical strain or plural different types of mechanical strains on the at least one channel of the transistor; at least one first contact pad in contact with the source region and configured to be connected to a first bias source that applies a bias to the source region; and at least one second contact pad in contact with the at least one gate and configured to be connected to a second bias source that applies a bias to the at least one gate, the first contact pad and the second contact pad being in contact with the piezoelectric layer.