Patent ID: 7714589

Claim:
A method for testing a flat panel display comprising an active array matrix substrate, including a driver integrated circuit formed therein; the method comprising: coupling a first shorting bar to a first plurality of clock input terminals of N successive registers disposed in the driver integrated circuit; coupling a second shorting bar to a second plurality of clock input terminals of the N successive registers; applying an enabling signal to an enable/disable terminal of a first register; coupling an output terminal of the (i-1) register to an enable/disable terminal of the i register, wherein i is an integer varying from 2 to N; applying a first clock signal to said first shorting bar; applying a second clock signal to the second shorting bar, said second clock signal having 180 degrees phase shift with respect to the first clock signal; applying outputs of the N registers to pixels disposed on the array; and detecting differences between a resulting display pattern and an expected display pattern.