Patent ID: 6921950

Claim:
A semiconductor device, comprising: a first, a second and a third logic circuit each having a function of inverting a respective input and being directly or indirectly connected in a cascade arrangement; a signal input terminal for supplying a signal applied from outside to the first logic circuit; a power source line capable of supplying a positive power source voltage applied from outside through a power source terminal to the first, second and third logic circuits; an input protection circuit having a path capable of guiding electrostatic discharges, which are applied from outside to the signal input terminal, to the power source line; a ground line capable of supplying a ground voltage applied from outside through a ground terminal to the first, second and third logic circuits; and an internal protection circuit interposed on a connection between an output portion of the second logic circuit and an input portion of the third logic circuit and having a path capable of guiding electrostatic discharges, which are guided to the power source line by the input protection circuit and derived from the power source line through the second logic circuit to the connection, to the ground line, wherein the path of the internal protection circuit is formed by a breakdown of a transistor composing of the internal protection circuit or a parasitic transistor.