Patent ID: 7913218

Claim:
A computer program product for reducing subexpressions in structural design representations, said computer program product comprising: a computer-readable storage medium; and instructions on the computer-readable storage medium that, when executed by a computer, cause the computer to perform: receiving an initial design, wherein said initial design represents an electronic circuit containing an XOR gate; selecting a first simplification mode for said initial design from a set of multiple different simplification modes, wherein said first simplification mode is an XOR/XNOR simplification mode; simplifying said initial design according to said first simplification mode to generate a reduced design containing a reduced number of XOR gates; determining whether a size of said reduced design is less than a size of said initial design; in response to determining that said size of said reduced design is less than said size of said initial design, replacing said initial design with said reduced design; and achieving a final reduced design and storing the final reduced design in data storage of the computer.