Patent ID: 8624887

Claim:
A control circuit for use in a flat panel display, the flat panel display comprising a plurality of pixel units, and the control circuit comprising: a power supply unit including a voltage output pin; a data driver coupled to a plurality of data lines which are electrically connected to the plurality of pixel units, respectively; a first switch set including a plurality of switches, each of which is electrically connected to two of the plurality of data lines; a second switch set including a plurality of switches, which are electrically connected to the voltage output pin in parallel, and electrically connected to first selected ones of the plurality of data lines, respectively; and a timing controller in communication with the power supply unit, the first switch set and the second switch set, for outputting a first control signal to optionally switch on the switches in the first switch set in a first duration to re-allocate charges stored in the plurality of pixel units, and outputting a second control signal to optionally switch on the switches in the second switch set in a second duration to discharge charges stored in the plurality of pixel units via the voltage output pin; wherein the timing controller switches off the switches in the second switch set if an averaged gray level of an image is higher than a threshold.