Patent ID: 7434190

Claim:
An analysis method of designing transmission lines of an integrated circuit packaging board including an integrated circuit chip, a printed circuit board, and an interposer disposed between the integrated circuit chip and the printed circuit board, said analysis method comprising the steps of: preparing a reference data file having information for dividing a series of transmission lines, from the integrated circuit chip through the interposer to the printed circuit board, into sections wherein each section is classified into a connecting section or a continuous section, the connecting section electrically connecting different conductive layers to each other and the continuous section including a conductive layer having a uniform cross-section in a signal transmission direction; preparing a division model file having information on analysis models wherein each model corresponds to a division model including at least one of the connecting section and the continuous section; inputting connection information on positions of connecting section(s) in the series of transmission lines; extracting connecting section(s) from the series of transmission lines with reference to the input connection information; determining, with reference to the reference data file, boundary and/or boundaries for dividing the series of transmission lines into sections wherein each section is a connecting section or a continuous section; generating, with reference to the division model file, division models wherein each division model corresponds to one of the sections divided with the boundary and/or boundaries; synthesizing the division models to form a synthesized model of the series of transmission lines; and analyzing electrical characteristics of the series of transmission lines based on the synthesized model.