Patent ID: 8487439

Claim:
A laminated and sintered ceramic circuit board, which comprises: base material that comprises plural dielectric layers comprising ceramic, one or more first surface electrodes disposed to expose at a first principal surface that is one surface of two principal surfaces and comprising conductor, one or more second surface electrodes disposed to expose at a second principal surface that is the other surface of said two principal surfaces and comprising conductor, and an inner layer wiring embedded within said base material and comprising conductor; wherein said inner layer wiring electrically connects at least a portion of said first surface electrodes and at least a portion of said second surface electrodes, said inner layer wiring comprises a through conductor extending through at least one of said plural dielectric layers in a direction perpendicular to said principal surfaces and inplane conductors extending in plural planes parallel to said principal surfaces, at least a portion of said inplane conductors are configured as a fine-lined inplane wiring, where its cross-section surface perpendicular to its extending direction has dimension of 15 μm or less in a plane parallel to said principal surfaces, and the interval of said inplane conductors adjacent in a plane parallel to said principal surfaces is 15 μm or less, said dielectric layer(s) includes a region intervening two planes, where said two planes are parallel to said principal surfaces and include said inplane fine-lined conductor, said region does not include said inplane fine-lined conductor, and said region has dimension of more than 4 μm and 25 μm or less in a direction perpendicular to said principal surfaces.