Patent ID: 7898301

Claim:
A circuit comprising a comparator, the comparator comprising: a first field effect transistor (FET) having a voltage input at a first FET gate terminal, said first FET having a first current terminal to receive a supply voltage; a first offset voltage circuit connected to a second current terminal of said first FET in series, said first FET and said first offset voltage circuit forming a first circuit leg; a second offset voltage circuit having a connection for receiving said supply voltage; and a second FET having a first current terminal coupled to said second offset voltage circuit in series, the second FET and second offset voltage circuit forming a second circuit leg, said second circuit leg connected to said first circuit leg in parallel and forming a parallel circuit, said first FET and said second FET being approximately equal in size and forming a differential pair via said parallel circuit wherein the voltage input at the first FET gate terminal is uncoupled from a gate terminal of the second FET.