Patent ID: 8381158

Claim:
A non-transitory computer-readable recording medium storing therein a verification program that causes a computer to execute a process comprising: detecting from a model circuit concerning a field effect transistor: a first circuit that represents a junction of a source region and a substrate region and has a first junction resistance and a first junction capacitance, a second circuit that is parallel to the first circuit, represents a junction of a drain region and the substrate region, and has a second junction resistance equivalent to the first junction resistance and a second junction capacitance equivalent to the first junction capacitance, and a connection resistance that connects the first circuit, the second circuit, and a substrate electrode; calculating a first coefficient based on the first and the second junction resistances and the connection resistance, the first coefficient indicating impact of the first and the second junction resistances and the connection resistance on amplitude variation; calculating a second coefficient based on the first and the second junction capacitances and the connection resistance, the second coefficient indicating impact of the first and the second junction capacitances and the connection resistance on phase variation; correcting the first and the second junction capacitances using a sum of the first and the second coefficients; and outputting a result obtained by the correcting.