Patent ID: 7559629

Claim:
A chip for use in a printing device, comprising: a first heater array with a left side and a right side; a first ink via placed on the left side of the first heater array; a second heater array with a left side and a right side, wherein a right side of the first heater array faces the left side of the second heater array; a second ink via placed on the right side of the second heater array; and at least one logic array including a first and a second set of logic cells arranged in a non-contiguous hybrid arrangement, the at least one logic array is disposed substantially between the first heater array and the second heater array, wherein the first set of logic cells addresses and controls the first heater array and the second set of logic cells addresses and controls the second heater array, which allows the first ink via and second ink via to be simultaneously controlled by the at least one logic array, and wherein the at least on logic array is substantially parallel with the first heater array and second heater array.