Patent ID: 7843945

Claim:
An integrated electronic circuit comprising: a first circuit including: an input port for receiving data words, at least one input terminal for receiving an enable signal, at least one input buffer coupled to the input port and capable of temporarily storing a determined number of data words received via the input port in response to the activation of the enable signal, at least one output terminal for sending an item of extraction information when a data word is extracted from the input buffer; a second circuit including: an output port for sending data words, at least one output terminal for sending the enable signal, at least one input terminal for receiving the item of extraction information, at least one enable circuit configured to activate the enable signal according to an item of availability information representative of the memory space available in the input buffer, the said item of availability information being updated in response to the transmission of a data word and to the receipt of the item of extraction information wherein the enable circuit includes a counter that is incremented on receipt of the item of extraction information and that is decremented on activation of the enable signal, the item of availability information being linked to the current value of the counter; and a plurality of conductors coupling together the second circuit and the first circuit, and including a data bus coupling the input port of the first circuit to the output port of the second circuit, a connection coupling the input terminal of the first circuit to the output terminal of the second circuit, and a connection coupling the output terminal of the first circuit to the input terminal of the second circuit.