Patent ID: 8514947

Claim:
A semiconductor device comprising: a first processing unit configured to process an input signal based on a plurality of image compression standards; a signal generation unit configured to output a switching signal, which sets a calculation based on the plurality of image compression standards, to the first processing unit; a first calculation unit configured to perform an operation on the input signal in accordance with a first coefficient that is based on the switching signal; a second calculation unit configured to perform an operation on an output of the first calculation unit in accordance with a second coefficient that is based on the switching signal; a selection unit configured to select one of the output of the first calculation unit and an output of the second calculation unit based on the switching signal; and a third calculation unit configured to select one or both of the input signal and the output of the first calculation unit based on the switching signal and to perform a predetermined calculation on the selected signal based on the switching signal; wherein the first calculation unit includes one or more variable coefficient multipliers, wherein the second calculation unit includes one or more fixed coefficient multipliers, and wherein the third calculation unit includes one or more addition/subtraction-shifters.