Patent ID: 8493784

Claim:
A program method of a multi-bit memory device which includes memory cells each storing multi-bit data, the program method comprising: programming memory cells of a selected word line based on program data; and judging whether the memory cells of the selected word line are programmed to have target states, wherein judging whether the memory cells of the selected word line are programmed to have target states comprises a plurality of verification operations respectively corresponding to the target states, each verification operation comprising a verification period formed of a bit line pre-charge period, a first sense node develop period, a first latch period, a sense node pre-charge period, a second sense node develop period, and a second latch period; and wherein a first time of the first sense node develop period is different from a second time of the second sense node develop period, each verification voltage applied to the selected word line is maintained without a variation at each verification operation, and voltages applied to bit lines connected to memory cells of the selected word line are maintained as a pre-charged voltage level of the bit line pre-charged period during the first latch period and the second latch period at each verification operation.