Patent ID: 8918601

Claim:
A method of facilitating processing of a multiprocessor computer system, the method comprising: enhancing a storage key by providing a page initialize bit in the storage key for a data page in central storage of the multiprocessor computer system; deallocating the data page by executing, by a processor, an instruction comprising a register, the register being modified to comprise a page initialize bit, wherein the instruction is one of an invalidate page table entry instruction, or a set storage key extended instruction, wherein the executing comprises logically clearing, by the processor, the data page of the multiprocessor computer system by utilizing the page initialize bit in the instruction to set the page initialize bit in the storage key for the data page to a clear data value without physically clearing data from the data page in central storage; subsequent to executing the instruction, physically clearing data from the page in central storage responsive to a first access to the page with the page initialize bit set to the clear data value, thereby minimizing time required to clear and subsequently access cleared page data.