Patent ID: 7219185

Claim:
A digital data processing device, comprising: instruction logic which selects and decodes instructions for execution; execution logic which executes instructions; a first cache for temporarily storing data, said first cache comprising a plurality of banks, each bank containing at least one respective access port for accessing data in the bank; and wherein at least some said instructions, when executed by said execution logic, access said first cache to perform at least one of: (a) reading data from said first cache, and (b) writing data to said first cache, and wherein a respective bank predict value is associated with each of said at least some instructions accessing said first cache, each said bank predict value predicting a bank of said first cache to be accessed by said bank predict value's associated instruction; and wherein said instruction logic selects, from among a set of multiple instructions eligible to execute by said execution logic, a subset of multiple instructions for concurrent execution by said execution logic, said instruction logic using said bank predict values of said instructions to select multiple instructions which access said first cache for inclusion in said subset.