Patent ID: 7509602

Claim:
A processor, for evaluating circuit signal values of an electronic design, comprising operand inputting electronic devices and circuitry for reading four or more operands, instruction input electronic devices and circuitry for reading one or more processor instructions, and encoding electronic devices and circuitry for encoding four or more circuit signal values onto a plurality of output bits, the processor further comprising electronic devices and circuitry for reading an input vector OLD, electronic devices and circuitry for reading a plurality of scalars SHIFT, XOUT, executing electronic devices and circuitry for executing a wide variable shift instruction comprising electronic devices and circuitry for replicating the scalar XOUT to the width of the processor output vector OUT; electronic devices and circuitry for shifting the input vector OLD to the right according to the binary value SHIFT; electronic devices and circuitry for bit-wise OR operation of the shifted OLD vector with the replicated XOUT vector, electronic devices and circuitry for assigning the result of the vector OR operation to the processor output vector OUT further comprising electronic devices and circuitry for reading an input vector NEW, electronic devices and circuitry for reading a plurality of input scalars ENABLE, WIDTH, and storing electronic devices and circuitry for storing a variable RSHAMT, executing electronic devices and circuitry for executing a replace range instruction by shifting the input vector NEW to the left according to the decimal value SHIFT on the condition that bit 0 of ENABLE is true; electronic devices and circuitry for shifting the input vector NEW to the right according to the decimal value RSHAMT assigned to be 32 minus SHIFT; electronic devices and circuitry for replacing some part of OLD with lower “WIDTH” plus 1 vector members of shifted vector NEW, electronic devices and circuitry for translating a decimal value of WIDTH to a binary mask, electronic devices and circuitry for assigning a replacement mask from a left shifted mask on the condition that the 0 bit of ENABLE is true, assigning from a right shifted mask if the 1 bit of ENABLE is true and the right shift amount RSHAMT is non zero, and assigning all bits to be zero if otherwise, electronic devices and circuitry for replacing some part of OLD with lower “WIDTH” plus 1 vector members of NEW shifted left if 0th bit of enable is true or shifted right by 32 minus shift if 0th bit of enable is false and bit-wise OR'ing the resulting combination of OLD and NEW with the result of replicated XOUT.