Patent ID: 8324032

Claim:
A method of manufacturing a semiconductor device comprising the steps of: forming a conductive film over a first semiconductor and a second semiconductor with an insulating film therebetween; forming a rectangular shape first resist pattern on the conductive film over the first semiconductor, and forming a second resist pattern on the conductive film over the second semiconductor, wherein a thickness of an edge portion of the resist pattern is smaller than thickness of a middle portion of the resist pattern; forming a rectangular shape first gate electrode over the first semiconductor by a first dry etching using the first resist pattern, and forming a second gate electrode by the first dry etching using the second resist pattern over the second semiconductor, wherein a thickness of an edge portion of the second gate electrode is smaller than a thickness of a middle portion of the second gate electrode; introducing an impurity element into the first semiconductor with the first gate electrode as a mask to form a first impurity region in the first semiconductor, wherein the first impurity region is not overlapped with the first gate electrode, and introducing an impurity element into the second semiconductor with the second gate electrode as a mask to form a second and a third impurity regions in the second semiconductor, wherein the second impurity region is not overlapped with the second gate electrode and the third impurity region is overlapped with the edge portion of the second gate electrode; and making the edge portion of the second gate electrode recede by a second dry etching.