Patent ID: 8558275

Claim:
A vertical semiconductor power device formed in a semiconductor substrate comprising: a first electrode disposed on a top surface and a plurality of dopant regions near the top surface in an epitaxial layer wherein a bottom portion of the epitaxial layer below the dopant regions constituting a uniformly doped region extending continuously and horizontally over an entire length of the semiconductor substrate functioning as a top layer of a drift region and a second electrode disposed on a bottom surface of the semiconductor surface; and rows of multiple horizontal slices of continuous thin layers of alternating P-type and N-type doped layers disposed immediately below the uniformly doped region of the epitaxial layer extending continuously and horizontally over substantially an entire horizontal length of the semiconductor substrate across the drift region of the semiconductor substrate where each of the continuous thin layers having a doping and a layer thickness to enable a charge balance and a punch through in said alternating doped layers during a conduction mode in conducting a current in a vertical direction between the first electrode and the second electrode perpendicular to and cross over said horizontal slices of said P-doped and N-doped layers.