Patent ID: 7801144

Claim:
A network processor comprising: an input interface; an output interface; a switch having an input coupled to the input interface, an output coupled to the output interface, and a plurality of bidirectional ports; and a plurality of processing elements coupled to respective ones of the bidirectional ports and configured to perform different functions, the processing elements and the bidirectional ports being separate from the input interface and the output interface; wherein information associated with a given packet received via the input interface is sequentially processed through multiple ones of the processing elements in a serial processing order based on switching operations of the switch, wherein each of the multiple ones of the processing elements receives the information associated with the given packet via the switch; wherein the switch is configurable to provide controllable selection between at least first and second serial processing orders each involving different interconnections of respective sets of the processing elements, said first and second serial processing orders comprising different sequences of functions, said sets including at least first and second sets with at least one of the processing elements being common to both the first and second sets; wherein the switch is utilized to provide different serial processing orders through respective sets of the processing elements for different packets received via the input interface; wherein a given one of the different serial processing orders is provided by configuring each non-final processing element in the corresponding set of processing elements to identify a next processing element to which a given packet received via the switch is to be routed when processing is completed in that processing element and the given packet is returned by that processing element to the switch; and wherein one of the processing elements identifies the next processing element by associating a next address tag with the given packet before returning the given packet to the switch.