Patent ID: 7161703

Claim:
An image processing system comprising: an image processing section configured to execute image processing in an image processing mode that accords with input image data; a storage section configured to be used for the image processing by the image processing section; a first clock generating section configured to generate a plurality of clocks based on which the image processing section and the storage section operate in the image processing mode; a first switch control section configured to select clocks which accord with the image processing mode from the plurality of clocks and use selected clocks for the image processing section and the storage section, which operate on equal clocks; a second clock generating section configured to generate clocks which are faster than the clocks generated by the first clock generating section in accordance with an operation of the storage section; a direct access mode setting section configured to determine settings for a direct access mode in which direct access to the storage section is externally executed; a second switch control section configured to switch the clocks for operating the storage section from the clocks selected by the first switch control section to the clocks generated by the second clock generating section, when the direct access mode setting section sets the direct access mode; a buffer section configured to temporarily store data externally input in the direct access mode; a buffer switching section configured to switch the direct access between the buffer section and the storage section; and a buffer control section configured to switch the buffer switching section such that the data is written in the buffer section before the clocks supplied to the storage section stabilize and is written in the storage section after the clocks stabilize, and such that the data in the buffer section is written in the storage section after the data is written in the storage section.