Patent ID: 7368782

Claim:
A. dual-bit non-volatile memory ce 11 , comprising: a gate oxide layer on a surface of the substrate, the gate oxide layer having upwardly protruding segments and a bottom segment between the upwardly protruding segments, wherein the upwardly protruding segments and the bottom segment constitute a recess area of the gate oxide layer; a control gate inlaid into the recess area of the gate oxide layer; a composite dielectric layer being parallel to the surface of the substrate and being adjacent to the protruding segments of the gate oxide layer, the composite dielectric layer comprising a nitride segment, wherein the nitride segment is only in parallel the surface of the substrate and substantially does not extend upwardly along a sidewall of the control gate; an L-shaped liner layer having a vertical segment and a horizontal segment, the vertical segment directly bordering vertical sidewalls of the control gate, the horizontal segment of the L-shaped liner layer directly covering the nitride segment and the upwardly protruding segments of the gate oxide layer; and a split-gate on the L-shaped liner layer.