Patent ID: 6921690

Claim:
A process for making a semiconductor device comprising the steps of: performing a LOCOS operation on an epitaxial layer of a semiconductor substrate to define an active region having a predefined boundary; implanting a first dopant into the epitaxial layer within the active region to create a well of a first type of conductivity; implanting the first dopant into the well to create a first region and a second region separated from the first region, the first and second regions being implanted across the boundary of the active region and directly spaced apart from each other across the active region and spaced apart from the center of the active region; depositing a polysilicon layer over the active region; doping the polysilicon layer to create a semiconductor layer of a second type of conductivity; patterning the semiconductor layer to create a gate over the first and second regions and well; performing an ion implant of the second type conductivity between the LOCOS regions and the gate to create first and second lightly doped regions, the first and second lightly doped regions being separated by a channel region beneath the gate; depositing an oxide layer over the gate and active region; etching the oxide layer to create side spacers on each side of the gate; and implanting a heavy dose of the second type of dopant between the LOCOS regions and the side spacers to create source and drain regions, the source and drain regions being separated by the first and second lightly doped regions and the channel region.