Patent ID: 8416803

Claim:
A device for transmitting data over a wireless network, the device is configured to operate a low latency interconnect bus protocol of an interconnect bus, the protocol comprising: a wireless medium access control (WMAC) layer for constructing a WMAC frame from the data, wherein the WMAC frame comprises a header field and a data portion, wherein the data portion includes an aggregation of a plurality of medium access control service data units (MSDUs) being aggregated according to their transmission order, the MSDUs include transaction layer packets generated by any one of a first component and a second component of the interconnect bus, wherein the first component is coupled to the device, wherein the header field includes at least an indication of a buffer size of a receiver for enabling a flow control between the device transmitting the data and the receiver; and a wireless physical (WPHY) layer for constructing at least one WPHY frame from the WMAC frame, wherein content of the at least one WPHY frame is determined according to a communication state between the first and second components, and a number of the constructed WPHY frames is based on a number of WPHY frames that can be bi-directionally communicated between the first component and the second component of the interconnect bus during a single channel time allocation (CTA).