Patent ID: 7810058

Claim:
A method of simulating an operation of an integrated circuit (IC) having one or more types of programmable resources, the method comprising: estimating, in accordance with a simulation engine, an effective switched capacitance for the one or more types of programmable resources of a yet-to-be fabricated IC, wherein said yet-to-be fabricated IC has not been fabricated, wherein the estimating the effective switched capacitance for a selected type of programmable resource comprises: characterizing the selected type of programmable resource as embodied by one or more corresponding pre-layout netlists, wherein the characterizing comprises: deriving a switched capacitance of the selected type of programmable resource from a simulated power consumption; estimating a parasitic wire capacitance of the selected type of programmable resource by estimating the parasitic capacitance of one or more external signal lines coupled to the selected type of programmable resource and multiplying the switched capacitance of the selected type of programmable resource by a predetermined percentage to generate an estimated parasitic capacitance of internal signal lines of the selected type of programmable resource; and combining the switched capacitance of the selected type of programmable resource with the parasitic wire capacitance of the selected type of programmable resource; identifying a number of each of the one or more types of programmable resources that will be utilized to implement a user design in the yet-to-be fabricated IC; determining an average switching frequency for each of the one or more types of programmable resources; calculating an estimated power consumption of the user design based on the estimated effective switched capacitance, the identified number of each of the one or more types of programmable resources, and the determined average switching frequency; and outputting the estimated power consumption for review by a user.