Patent ID: 7692235

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate; a plurality of floating gate electrodes respectively formed above element regions of the semiconductor substrate with first insulating films disposed therebetween; and a control gate electrode formed above the plurality of floating gate electrodes with a second insulating film disposed therebetween, a portion of the control gate electrode being filled in between opposed ones of the plurality of floating gate electrodes, wherein each of the plurality of floating gate electrodes is formed to have a width of an upper portion thereof in a channel width direction which is smaller than a width of a lower portion thereof in the channel width direction and one of contact surfaces thereof on at least opposed sides which contact the second insulating film is formed to have one surface, the second insulating film has a maximum film thickness in a vertical direction, the maximum film thickness being set smaller than a distance from a lowest surface to a highest surface of the second insulating film in the vertical direction, and a distance from lowermost part of an interface between each of the floating gate electrodes and the second insulating film to an interface between the second insulating film and the control gate electrode in vertical direction is smaller than a distance between a level of the lowermost part of the interface between said each of the floating gates and the second insulating film and a level of uppermost part of the interface between the second insulating film and the control gate electrode.