Patent ID: 8604476

Claim:
A semiconductor device comprising a memory circuit, the memory circuit comprising: a first transistor; a second transistor; a first layer serving as a channel formation layer of the second transistor; a second layer formed using the same material and at the same time as the first layer, wherein the second layer is apart from the first layer and serves as a first gate of the first transistor; a first insulating layer over the first layer and the second layer; a first conductive layer overlapping with the first layer with the first insulating layer provided therebetween; a semiconductor layer overlapping with the second layer with the first insulating layer provided therebetween; a second conductive layer electrically connected to the semiconductor layer; a third conductive layer electrically connected to the first conductive layer and the semiconductor layer; a second insulating layer over the semiconductor layer, the second conductive layer, and the third conductive layer; and a fourth conductive layer overlapping with the semiconductor layer with the second insulating layer provided therebetween, the fourth conductive layer serving as a second gate of the first transistor, wherein the first conductive layer is provided between the first insulating layer and the third conductive layer.