Patent ID: 6928122

Claim:
A predistortion circuit, comprising: a first digital-to-analog converter (DAC) outputting a reference input signal in response to a digital input signal; a first filter outputting a filtered reference input signal in response to the reference input signal; an upconverter outputting a frequency-translated filtered reference input signal at a desired RF carrier frequency; a look-up table storing a plurality of complex gain coefficients, each of the complex gain coefficients being determined by forcing the error between the digital input signal and a scaled version of the system output signal towards zero, the look-up table outputting a complex gain coefficient corresponding to the the digital input signal; a complex multiplier multiplying each sample of the digital input signal by the complex gain coefficient to generate a complex predistorted drive signal; an error-vector calculator outputting complex error components corresponding to the complex predistorted drive signal, each of the error components being determined using a vector decomposition calculation; a magnitude scaling factor determined by the ratio of the peak magnitude of the digital input signal to the peak magnitude of the error components; a second DAC outputting an error-vector signal in response to the complex error components; a second filter outputting a filtered error-vector signal in response to the error-vector signal; and an upconverter outputting a frequency-translated filtered error-vector signal at a desired RF carrier frequency; a combiner for outputting a predistorted drive signal in response to the frequency-translated filtered reference input signal and the frequency-translated filtered error-vector signal.