Patent ID: 8063443

Claim:
A semiconductor device comprising: a) a semiconductor die having a horizontal region of a first conductivity type; b) a first region of a second conductivity type, opposite to said first conductivity type, formed in said horizontal region and extending to a top surface of said horizontal region; c) first and second gates positioned over corresponding first and second portions of said first region and separated from said first region by a gate oxide, said first and second portions being part of a common body; d) a conductive region formed in said first region and positioned between said first and second portions such that channel regions below both gates create a conductive path comprising induced channels of said first conductive type and said conductive region; e) a first contact for connecting said horizontal region representing a drain/collector; and f) a second contact for connecting to said first region; g) a well of said first conductivity type extending horizontally from said first and second portions; h) a third portion of said second conductivity type above said well; i) a silicide region above said third portion; j) a third contact to said silicide region; k) a field oxide adjacent said silicide region, said third portion and said well; l) a source/emitter positioned in said third portion and directly under said silicide region; wherein said first and second gates positioned between said drain/collector and source/emitter in a horizontal direction of the semiconductor device.