Patent ID: 7683717

Claim:
A fully differential amplifier circuit, comprising: a first section for generating first and second output signals on first and second outputs from first and second input signals; a first negative feedback loop coupled to the first section; a second negative feedback loop coupled to the first section; a second section for controlling the first negative feedback loop for adjusting the first output signal towards a common mode voltage level, and for reducing an offset voltage of the first output signal; a third section for controlling the second negative feedback loop for adjusting the second output signal towards the common mode voltage level, and for reducing an offset voltage of the second output signal, wherein the first section includes a first transistor being controlled by the first input signal and a second transistor being controlled by the third section via the second negative feedback loop; wherein the first section further includes a third transistor being controlled by the second input signal and a fourth transistor being controlled by the second section via the first negative feedback loop.