Patent ID: 7508730

Claim:
A semiconductor memory device comprising: a memory cell array; a command interface configured to receive a command from outside of the semiconductor memory device, to interpret the received command to determine if the received command is a continuous operation command, and to output a command signal corresponding to the command and at least one flag signal indicating a continuous operation section if the command is a continuous operation command, the command interface comprising: a command decoder configured to receive the command, to interpret the received command, and to output the command signal corresponding to the command to the control unit; and a flag signal generation unit configured to receive the command interpreted by the command decoder and to output to the control unit the at least one flag signal indicating whether the command is a continuous operation command and indicating a continuous operation section if the command is a continuous operation command; a control unit configured to receive the command signal and the at least one flag signal output from the command interface and to generate a pump control signal based on the received command signal and the at least one flag signal; and a charge pump configured to generate a voltage in response to the pump control signal for use in accessing the memory cell array to read, write, and/or erase data.