Patent ID: 8098509

Claim:
A nonvolatile semiconductor memory device comprising: a semiconductor substrate having a first cell array region in which a first memory cell transistor is disposed and a second cell array region in which a second memory cell transistor is disposed; a plurality of first element isolation insulating films formed on a surface of the semiconductor substrate corresponding to the first cell array region into a band shape; a plurality of second element isolation insulating films formed on a surface of the semiconductor substrate corresponding to the second cell array region into a band shape; a first gate electrode for the first memory cell transistor formed by dividing the semiconductor substrate corresponding to the first cell array region by the first element isolation insulating film, the first gate electrode having a first gate insulating film formed on a first active region divided by the first element isolation insulating film, a first charge storage layer formed on the first gate insulation film, a first interelectrode insulating film formed on the first charge storage layer and a first control electrode formed on the first interelectrode insulating film; and a second gate electrode for the second memory cell transistor formed by dividing the semiconductor substrate corresponding to the second cell array region by the second element isolation insulating film, the second gate electrode having a second gate insulating film formed on a second active region divided by the second element isolation insulating film, a second charge storage layer formed on the second gate insulation film, a second interelectrode insulating film formed on the second charge storage layer and a second control electrode formed on the second interelectrode insulating film, wherein each first element isolation insulating film has a height from a surface of the semiconductor substrate, the first charge storage layer has a height from the surface of the semiconductor substrate, and each second element isolation insulating film has a height from the surface of the semiconductor substrate, the height of each first element isolation insulating film being lower than the height of the first charge storage layer and higher than the height of each second element isolation insulating film.