Patent ID: 8071443

Claim:
A method of forming a memory array, comprising: forming a plurality of memory cells, wherein forming each memory cell includes: forming a pair of source/drain regions with a channel region therebetween; forming a first layer of one or more lutetium oxide monolayers over the channel region, wherein each lutetium oxide monolayer is formed by depositing a monolayer including lutetium and oxidizing the monolayer; forming a plurality of lanthanum aluminum oxide nanocrystals over the first layer, including: depositing at least one monolayer including lanthanum; depositing at least one monolayer including aluminum; processing the lanthanum and aluminum monolayers to form lanthanum aluminum oxide nanocrystals; forming a second layer over the lanthanum aluminum oxide nanocrystals, by depositing one or more lutetium oxide monolayers, wherein each lutetium oxide monolayer is formed by depositing a monolayer including lutetium and oxidizing the monolayer; and forming a control gate over the second layer.