Patent ID: 8225175

Claim:
An error correction method for a memory device, which comprises a first block having a first page and a second block having a second page, the method comprising steps: generating a first correction code and a second correction code according to a first data and a second data, wherein the first correction code and the first data are written to the first page, and the second correction code and the second data are written to the second page; wherein the first correction code comprises a first inner correction code and a first cross correction code, and the second correction code comprises a second inner correction code and a second cross correction code; using the first inner correction code for detecting and correcting errors of the first page when reading the data of the first page and using the second inner correction code for detecting and correcting errors of the second page when reading the data the second page; using the first cross correction code for detecting and correcting errors of odd bytes in both the first page and the second page; and using the second cross correction code for detecting and correcting errors of even bytes in both the first page and the second page.