Patent ID: 8089274

Claim:
A method for evaluating an SOI wafer in which a sheet resistance of a buried diffusion layer of an SOI wafer that has at least an SOI layer on an insulator layer and has a buried diffusion layer whose impurity concentration is higher than other region of the SOI layer in an interface area with the insulator layer of the SOI layer is evaluated, the method comprising the steps of: measuring a sheet resistance of the whole SOI layer or the whole SOI wafer; and estimating the sheet resistance of the buried diffusion layer by converting the measured result of the sheet resistance measurement on the basis of assuming respective layers that compose the SOI wafer to be resistors connected in parallel, wherein the step of measuring the sheet resistance of the whole SOI wafer comprises the steps of: radiating lines of magnetic force of an alternating current magnetic field to one surface of the SOI wafer to form eddy currents caused by the alternating current magnetic field on, the SOI wafer; measuring variation of the magnetic field according to eddy current loss generated by the eddy current formation, on a surface opposite to the surface to which the lines of magnetic force are radiated; and calculating the sheet resistance of the whole SOI wafer from the measured variation of the magnetic field.