Patent ID: 6914831

Claim:
A memory device, comprising: a memory array; a control circuit, coupled to said memory array; a input/output circuit, coupled to said memory array; and a power circuit for supplying an output current to at least one of said memory array, said control circuit, and said input/output circuit, said power circuit comprising: a first circuit comprising a first input node, a first output node, and a first current mirror; a second circuit comprising a second input node, a second output node, and a second current mirror; a third circuit, coupled to said first output node and said second output node, for producing said output current from an input current, said output current being approximately invariant over a range of temperature; wherein said first current mirror flows a first current as a first function of temperature and said second current mirror flows a second current as a second function of temperature, and said first and second functions are approximately inverse functions of temperature.