Patent ID: 7365391

Claim:
A semiconductor device comprising: a substrate to be processed, having a conductive layer of a first conductivity type; a base diffusion region of a second conductivity type formed on an inside surface of the conductive layer; and an active groove formed in a position where the base diffusion region is provided in the conductive layer and a bottom surface of the active groove is deeper than a bottom surface of the base diffusion region; wherein the active groove has a long and narrow main groove part and a sub groove part connected to a longitudinal side surface of the main groove part; a buried region of the second conductivity type whose upper part is lower than the base diffusion region, the buried region being arranged on a bottom surface of the main groove part; a gate groove is made of a portion of the main groove part above the buried region; a gate insulating film is provided on a side surface of the gate groove; a conductive gate electrode plug in contact with the gate insulating film and electrically insulated from the buried region, the conductive gate electrode plug being arranged in the gate groove; a source diffusion region of the first conductivity type is provided inside surface of the base diffusion region in a position where the source diffusion region is in contact with the gate insulating film and the source diffusion region is isolated from the conductive layer by the base diffusion region; and an active groove filling region of the second conductivity type having an upper part thereof in contact with the base diffusion region and a lower part thereof in contact with the buried region, the active groove filling region being disposed on the bottom surface of the sub groove part.