Patent ID: 7864575

Claim:
A memory device comprising: an array of memory cells; and control circuitry coupled to the array and configured to: initially program each of a number of cells to increase a respective threshold voltage (Vt) of each of the number of cells from a respective voltage that is not greater than zero volts to a respective voltage within a respective desired one of a number of voltage ranges; and subsequently program each of the number of cells to a respective desired one of a number of different data states, wherein each of the number of cells has a Vt that is not less than zero volts, wherein the number of voltage ranges comprises two voltage ranges and wherein the control circuitry is further configured to: after initially programming each of the number of cells and before subsequently programming each of the number of cells to a respective desired one of the number of different data states, program each of the number of cells from its respective voltage within its respective one of two voltage ranges to a respective voltage within a respective desired one of four voltage ranges; and after programming each of the number of cells to its respective voltage within its respective one of four voltage ranges and before subsequently programming each of the number of cells to a respective desired one of a number of different data states, program each of the number of cells from its respective voltage within its respective one of four voltage ranges to a respective voltage within a respective desired one of eight voltage ranges.