Patent ID: 7288443

Claim:
A method of forming a PMOSFET, comprising the steps of: providing an SOI wafer having a buried insulator layer and a SOI layer above said buried insulator layer; forming a layer of gate insulator over said SOI layer; forming a transistor gate over said SOI layer having a channel underneath said gate; forming insulator sidewalls on first and second sides of said gate; epitaxially forming a doped layer containing a dopant on said SOI layer and adjacent to said insulator sidewalls; diffusing said dopant into said SOI layer from said doped layer, thereby producing compressive stress in the horizontal direction parallel to an SOI surface and tensile stress in a vertical direction normal to said SOI surface in said channel; in which said step of diffusing continues until germanium reaches a bottom surface of said SOI layer; and completing said PMOSFET.