Patent ID: 8477862

Claim:
An apparatus, comprising: a processor; and memory including computer program code, said memory and said computer program code configured to, with said processor, cause said apparatus to perform at least the following: construct a trellis representing a transmitted signal formed from a plurality of symbols transmitted by a number of transmit antennas, each symbol having a constellation size, said trellis being formed of columns representing said number of transmit antennas and rows representing values of said plurality of symbols with nodes at intersections thereof; form a log likelihood ratio at said nodes of said trellis as a log-sum of a number of exponential terms including a priori information corresponding to a hypothesized transmitted bit value of 0 or 1 of said plurality of symbols, said number of exponential terms being limited by a function of a number of most likely paths of said trellis extending from each node of said trellis and said constellation size; and form a list at each node of said trellis of a size limited to said number of said most likely paths of said trellis extending from each node of said trellis.