Patent ID: 7904868

Claim:
A design structure used in a design process, the design structure comprising: a text file or a graphical representation of a semiconductor structure, wherein the text file or a graphical representation is embedded in a machine readable storage medium, wherein the semiconductor structure includes a substrate; a first semiconductor device on the substrate; N ILD (Inter-Level Dielectric) layers on the first semiconductor device such that N is an integer greater than one; and a first electrically conductive line electrically coupled to the first semiconductor device, wherein the first electrically conductive line is adapted to carry a lateral electric current in a lateral direction parallel to an interfacing surface between two consecutive ILD layers of the N ILD layers, wherein at least one ILD layer of the N ILD layers comprises two ILD sub-layers; wherein the first electrically conductive line is present in said two consecutive ILD layers of the N ILD layers, and wherein the first electrically conductive line does not comprise an electrically conductive via that is adapted to carry a vertical electric current in a vertical direction perpendicular to the interfacing surface.