Patent ID: 7561091

Claim:
An analog to digital converter with dynamically reconfigurable conversion resolution, the analog to digital converter comprising: a sample and hold circuit, wherein the sample and hold circuit holds an input analog signal to form a captured analog signal; a controller, wherein the controller determines a number of digital output bits required to generate digital output at a user defined conversion resolution, and wherein the controller iteratively processes an analog residue voltage through a one-bit converter stage to generate the number of digital output bits required to generate digital output at the user defined conversion resolution; and the one-bit converter stage, wherein the one-bit converter stage generates a first output bit in response to processing the captured analog signal, and wherein the one-bit converter stage iteratively processes the analog residue voltage a given number of times to form a given number of additional bits, wherein the first output bit and the given number of additional bits form a digital output with the user defined conversion resolution.