Patent ID: 8797007

Claim:
A DC-DC converter comprising: a smoothing capacitor connected between a first output terminal connected to a first end of a load and a second output terminal connected to a second end of the load, the smoothing capacitor smoothing an output voltage; a choke coil having a first end connected to a first end of a battery; and a semiconductor integrated circuit having a switch terminal connected to a second end of the choke coil, a first potential terminal connected to the first output terminal, and a second potential terminal connected to the second output terminal and a second end of the battery, the semiconductor integrated circuit comprising: a first MOS transistor of a first conductivity type, the first MOS transistor having a first end connected to the first potential terminal, a second end connected to the switch terminal, and a gate fed with a first control signal; a second MOS transistor of a second conductivity type, the second MOS transistor having a first end connected to the switch terminal and a second end connected to the second potential terminal; a third MOS transistor of the first conductivity type, the third MOS transistor having a first end connected to the first potential terminal and a second end connected to a gate of the second MOS transistor; a fourth MOS transistor of the second conductivity type, the fourth MOS transistor having a first end connected to the second end of the third MOS transistor and a second end connected to the second potential terminal; a fifth MOS transistor of the second conductivity type, the fifth MOS transistor having a first end connected to a gate of the fourth MOS transistor and a second end connected to the second potential terminal; a first inverter that is fed with a second control signal and has an output connected to the gate of the third MOS transistor; a second inverter that is fed with the second control signal and has an output connected to the gate of the fourth MOS transistor; a switching control circuit that controls operations of the first MOS transistor and the second MOS transistor by means of the first control signal and the second control signal; and a gate control circuit that is connected between the switch terminal and the second potential terminal to control an operation of the fifth MOS transistor.