Patent ID: 8606556

Claim:
A method, comprising: accepting at least one measured device parameter pertaining to at least one device, wherein said at least one device is comprised in a circuit instance, wherein said circuit instance is manufactured as part of a sub 70 nm gate-length-technology VLSI chip, wherein said circuit instance has properties, wherein a model is a computer executable device and circuit simulator, and said model comprises input parameters; adjusting at least one of said input parameters pertaining to said at least one device by using said at least one measured device parameter; executing by a computer said model using said at least one adjusted input parameter to generate at least one simulated value for at least one of said properties of said circuit instance; comparing said at least one simulated value with a respective measured value of at least one of said properties of said circuit instance; repeating said accepting, adjusting, executing, and comparing steps for a plurality of circuit instances; and using said comparing steps to quantitatively evaluate simulator capabilities of said model.