Patent ID: 8765595

Claim:
A method of fabricating a back-end-of-line wiring structure, the method comprising: forming a first wire and a second wire in a first dielectric layer; annealing the first wire and the second wire in an oxygen-free atmosphere; after annealing the first wire and the second wire, forming a third wire that is stacked with the first wire and a fourth wire that is stacked with the second wire; and forming a final passivation layer comprised of an organic material that covers an entirety of a sidewall of the third wire and of a sidewall of the fourth wire, wherein the first wire and the second wire each have a thickness ranging from 6 microns to 10 microns, the third wire and the fourth wire each have a thickness ranging from 4 microns to 6 microns, and the second wire is adjacent to the first wire and laterally separated from the first wire by a distance less than or equal to 15 microns.