Patent ID: 8592798

Claim:
A variable resistance non-volatile storage device comprising: a substrate; a first interlayer insulating layer formed on the substrate; a first line which is formed in a line trench in the first interlayer insulating layer, and includes a barrier metal layer and a main layer, the barrier metal layer covering bottom and side surfaces of the line trench, and the main layer comprising a metal and filling an inside of the line trench; a first electrode comprising a precious metal, formed and covering at least the main layer and the barrier metal layer at a top surface of the first line; a second interlayer insulating layer formed above the substrate, on and above the first line, and on the first electrode; memory cell holes formed in the second interlayer insulating layer on the first electrode; a variable resistance layer formed in the memory cell holes and connected to the first electrode; and second lines each covering the variable resistance layer and one of the memory cell holes, and formed on the second interlayer insulating layer, wherein the first line includes, along a length of the first line, a portion in a first area which is an enclosed area along connected outer edges of the memory cell holes, and a portion in a second area other than the first area, the first electrode is formed across the memory cell holes, in an arbitrary widthwise cross section of the first line in the first area, the first electrode is in contact with the barrier metal layer of the first line, and the barrier metal layer and the first electrode cover the main layer of the first line, and the first line in the first area is not in direct contact with the second interlayer insulating layer.