Patent ID: 8194467

Claim:
A nonvolatile semiconductor memory device comprising: a memory unit; and a control unit, the memory unit including: a multilayer structure including a plurality of electrode films and a plurality of interelectrode insulating films alternately stacked in a first direction; a first semiconductor pillar piercing the multilayer structure in the first direction; a first memory layer provided between each of the electrode films and the first semiconductor pillar; a first inner insulating film provided between the first memory layer and the first semiconductor pillar; a first outer insulating film provided between each of the electrode films and the first memory layer; and a first wiring electrically connected to one end of the first semiconductor pillar, the control unit performing: a first operation setting the first wiring at a first potential and setting the electrode film at a second potential lower than the first potential during a first period; and an operation including a second operation setting the first wiring at a third potential and setting the electrode film at a fourth potential lower than the third potential during a second period after the first operation, the operation including the second operation having at least one of: a length of the second period being shorter than a length of the first period; and a difference between the third potential and the fourth potential being smaller than a difference between the first potential and the second potential, the first operation and the operation including the second operation being performed in an operation for performing at least one of injection of holes into the first memory layer and extraction of electrons from the first memory layer.