Patent ID: 8116314

Claim:
A method for changing a clock frequency of a packet processing unit, comprising: detecting, by a hardware mechanism, a time interval of an input signal to the packet processing unit; calculating, by the hardware mechanism, a standard time interval as equal to a number of clock pulses needed for the packet processing unit to operate, divided by a nominal clock frequency of the packet processing unit; comparing, by the hardware mechanism, the time interval detected with the standard time interval calculated; and, setting the clock frequency of the packet processing unit as close as possible to zero to reduce power consumption by the packet processing unit, by: where the time interval detected is greater than the standard time interval calculated, calculating, by the hardware mechanism, a new clock frequency of the packet processing unit as the number of clock pulses divided by a current clock frequency of the packet processing unit; setting, by the hardware mechanism, the clock frequency of the packet processing unit to the new clock frequency calculated.