Patent ID: 7951622

Claim:
A method of making a semiconductor chip assembly, comprising: providing a thermal post, a signal post, a base, an adhesive and a conductive layer, wherein the thermal post is adjacent to the base, extends above the base in an upward direction, extends into a first opening in the adhesive and is aligned with a first aperture in the conductive layer, the signal post is adjacent to the base, extends above the base in the upward direction, extends into a second opening in the adhesive and is aligned with a second aperture in the conductive layer, the base extends below the posts in a downward direction opposite the upward direction and extends laterally from the posts in lateral directions orthogonal to the upward and downward directions, the adhesive is mounted on and extends above the base, is sandwiched between the base and the conductive layer and is non-solidified, and the conductive layer is mounted on and extends above the adhesive; then flowing the adhesive into and upward in a first gap located in the first aperture between the thermal post and the conductive layer and in a second gap located in the second aperture between the signal post and the conductive layer; solidifying the adhesive; then providing a conductive trace that includes a pad, a terminal, the signal post and a selected portion of the conductive layer; mounting a semiconductor device on a heat spreader that includes the thermal post and the base, wherein the semiconductor device overlaps the thermal post; electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal, wherein an electrically conductive path between the pad and the terminal includes the signal post; and thermally connecting the semiconductor device to the thermal post, thereby thermally connecting the semiconductor device to the base.