Patent ID: 7436731

Claim:
A semiconductor device comprising a power supply control circuit, and a memory cell, wherein the power supply control circuit comprises: a first word line; a second word line; a circuit comprising one output terminal, and two input terminals, one of which is electrically connected to the first word line and the other of which is electrically connected to the second word line, in which a HIGH level is outputted to the output terminal when a HIGH level is inputted to either one of the input terminals, and a LOW level is outputted to the output terminal when a LOW level is inputted to both of the input terminals; a first inverter circuit comprising an input terminal electrically connected to the output terminal of the circuit; and means for supplying a first voltage or a second voltage lower than the first voltage to the memory cell, the means being electrically connected to the circuit and the first inverter circuit, wherein the memory cell comprises a second inverter circuit, and is electrically connected to the first word line and the second word line.