Patent ID: 7038720

Claim:
An image digitizer comprising: (a) an image input; (b) an analog front end comprising (1) a correlated double sampler (CDS) coupled to said image input; (2) a programmable gain amplifier (PGA) coupled to an output of said correlated double sampler; (3) a multi-bit digital to analog converter coupled to an offset input of said CDS; (4) a multi-bit digital gain bus coupled to a gain input of said PGA; (c) a multi-bit gain/offset bus for providing multiple multi-bit gain and offset values in series; (d) a gain register and an offset register connected in parallel to said multi-bit gain/offset bus; and (e) a clocking circuit configured to clock data into said gain and offset registers at a higher clock rate than the clocking of image data through said image input.