Patent ID: 7315217

Claim:
A linear phase-locked loop (PLL) comprising: a voltage controlled oscillator (VCO) comprising first and second tuning elements, the VCO generating a VCO signal; a linear phase detector configured to determine the magnitude of the phase error between an input signal and the VCO signal; a first signal path between the linear phase detector and the first tuning element, the first signal path providing a first VCO tuning signal to the first tuning element, the first VCO tuning signal being proportional to the magnitude of the phase error between the input signal and the VCO signal; and a second signal path between the linear phase detector and the second tuning element, the second signal path providing a second VCO tuning signal to the second tuning element, the second VCO tuning signal being an integral function of the magnitude of the phase error between the input signal and the VCO signal; and wherein the VCO comprises an inductance-capacitance (LC)-type VCO with the first and second tuning elements comprising first and second varactors.