Patent ID: 8617984

Claim:
A method of forming a semiconductor structure comprising: forming a tungsten region within a middle-of-the-line (MOL) dielectric material, said tungsten region having a topmost surface that is coplanar with an upper surface of the MOL dielectric material; forming another dielectric material atop the MOL dielectric and the tungsten region; forming a first interconnect pattern into one portion of the another dielectric material and the MOL dielectric material, wherein upper sidewall portions of the tungsten region are exposed; performing a nitridation process providing a self-aligned tungsten nitride passivation layer within the topmost surface and upper sidewall portions of the tungsten region, and a nitrogen enriched dielectric surface within exposed surfaces of both the another dielectric material and the MOL dielectric material; forming a second interconnect pattern into another portion of the another dielectric material and the MOL dielectric material; and filling remaining portions of the first interconnect pattern and second interconnect pattern with at least a conductive material.