Patent ID: 8476536

Claim:
A wiring substrate comprising: an insulation layer; a pad including a plurality of metal layers, the pad disposed in the insulation layer; and a via connected to the pad, wherein the plurality of metal layers include a metal layer forming the lowermost layer of the pad exposed through the wiring substrate, a first metal layer which is interposed between the metal layer and the via and which prevents diffusion of metal included in the via into the metal layer, and a second metal layer which is less subject to oxidation than the first metal layer and which is provided between the via and the first metal layer, wherein the via is connected to the second metal layer, wherein an upper surface of the second metal layer at an interface with the via is a roughened surface that is rougher than an initial roughness of the upper surface so as to provide an improved electric contact and adhesion between the via and the second metal layer, an oxide film not being formed on the roughened surface of the second metal layer, and wherein the metal layer is made using any one of a Au layer, a Sn layer, and a SnAg layer.