Patent ID: 7969202

Claim:
A circuit comprising: A phase frequency detector, the phase frequency detector including: a first flip flop clocked by a reference signal for generating a first logic signal; a flip-flop train for generating a second and a third logical signals, the flip-flop train comprising at least a second flip-flop, a third flip-flop, and a fourth flip-flop for generating a first, a second, and a third intermediate signals, respectively, wherein each flip-flop of the flip-flop train is clocked either by one of a first feedback signal and a second feedback signal or by one of said intermediate signals, wherein the second logic signal and the third logic signals are chosen among said intermediate signals; and a first output to provide the first logical signal external to the phase frequency detector; a second output to provide the second logical signal external to the phase frequency detector; and a third output to provide the third logical signal external to the phase frequency detector, wherein the first output, the second output, and the third output are separate outputs from each other.