Patent ID: 7352030

Claim:
A semiconductor structure, comprising: a substrate comprising a silicon lower layer, a patterned buried oxide layer on a top surface of said silicon lower layer, said patterned buried oxide layer having openings, said openings extending through said patterned oxide layer, said openings filled with a single crystal group IV semiconductor material, wherein a width of said openings, a distance between said openings, or both said width of said openings and said distances between said openings independently have at least one spatial extent less than a photolithographic definable dimension, said at least one spatial extent extending parallel to a top surface of said substrate; a single crystal group IV semiconductor layer on top of said patterned and filled buried oxide layer; a gate dielectric on said top surface of said silicon substrate; a gate electrode on a top surface of said gate dielectric; and a source and a drain in said substrate and on opposite sides of said gate electrode.