Patent ID: 8051359

Claim:
A circuit for generating CRC code words associated with bytes of data to be transmitted over a communications channel, said communications channel capable of transmitting data up to w-bytes in width, said circuit comprising: a first plurality of serially coupled code-generation blocks each for generating a CRC value based on data input to said block, respective blocks of said first plurality of code-generation blocks configured for receiving data inputs having respective byte widths ranging from 2 N +M, 2 N−1 +M, . . . , 2 N−L +M where w=2 N +M, M is an offset value, and L is a whole number based on a maximum propagation delay criteria for processing CRC values in said first plurality; a second plurality of parallel coupled code-generation blocks each for generating a CRC value based on data input to said block, respective blocks of said second plurality of code-generation blocks configured for receiving data inputs having respective byte widths ranging from 2 N−L −1+M, 2 N−L −2+M, . . . , 2 0 ; a multiplexor means controllable for selecting particular CRC code generation blocks in said first and second pluralities to be included in a CRC calculation based on said data input; wherein by selectively including or bypassing CRC code generation blocks any number of data input bytes divisible by 2 N−L may be processed for corresponding CRC code generation.