Patent ID: 6963300

Claim:
An apparatus for producing digital output signals from an analog input signal in a pipelined converter, the apparatus comprising: a sample-and-hold amplifier (SHA) circuit that includes an SHA input terminal that is coupled to the analog input signal and an SHA output terminal, wherein the SHA circuit is arranged to provide a sampled voltage (V SHA ) that is responsive to the analog input signal; an evaluator circuit that includes an evaluation input terminal that is coupled to the analog input signal (V IN ) and a digital output terminal that is arranged to provide digital codes that are responsive to the analog input signal; a reference circuit that includes an adjustment input terminal that is coupled to the digital output terminal, and a reference output terminal, wherein the reference circuit is arranged to provide a reference voltage (V REF ) that is responsive to at least one of the digital codes; and a multiplying digital-to-analog converter (MDAC) circuit that includes an MDAC input terminal that is coupled to the SHA output terminal, an MDAC output terminal that is arranged to provide an output voltage (V OUT1 ), and a reference input terminal (V REFMD ) that is arranged receive the reference voltage (V REF ), wherein the MDAC circuit is arranged to sample the reference voltage (V REF ) and the sampled voltage (V SHA ) at substantially the same time.