Patent ID: 8767005

Claim:
A blend stage comprising: a first input configured to receive first pixel color values corresponding to a first layer of an image frame; a second input configured to receive second pixel color values corresponding to a second layer of the image frame; a set of inputs configured to receive Alpha values corresponding to the received first pixel values and received second pixel values; a blending block configured to perform a blend operation on the received first pixel values, the received second pixel values, and the received Alpha values, wherein the blend unit is further configured to carry multiplication results in fractional form as numerator and denominator throughout the blend operation for two or more multiplications performed during the blend operation, and produce a blended color value; a divide unit configured to divide the blended color value by a normalization value corresponding to the received Alpha values, to produce a final blended color value; wherein the blending block comprises one or more of: logic circuitry configured to perform part of or all of the blend operation; or a processing unit coupled to a non-transitory memory unit configured to store instructions executable by the processing unit to perform part of or all of the blend operation.