Patent ID: 7039901

Claim:
A software development method for debugging software on a target system having a plurality of processors configured with shared memory in which a software memory bus performs processing of shared memory access requests using a method for transparently writing to shared memory when debugging a multiple processor system, the method comprising the steps of: receiving user input to define a hardware configuration of the target system; creating a software memory map of how each of the plurality of processors may access memory including whether each of said plurality of processors may read from and write to a range of memory or may only read from said range of memory; loading drivers for each of the plurality of processors; activating a first debug session associated with a first processor of the plurality of processors; activating at least a second debug session associated with a second processor of the plurality of processors wherein each debug session is operable to transmit read requests and write requests to its associated processor; processing shared memory access requests via a software memory bus; detecting a write request to a shared memory location by the first debug session; and if the first processor associated with the first debug session has write access to the shared memory location then selecting the first processor to perform the write request; else performing the following steps a–c: a. searching the software memory map to determine if the second processor has write access to the shared memory location; b. selecting the second processor to perform the write request; and c. passing the write request initiated by the first debug session to the selected processor for execution.