Patent ID: 7781304

Claim:
A method of fabricating a semiconductor device, comprising: forming a first trench region and a second trench region in a substrate, the second trench region having a larger width than the first trench region; forming a lower material layer filling the first and second trench regions; forming a first preliminary lower material layer pattern in the first trench region and a second preliminary lower material layer pattern in the second trench region by etching the lower material layer using a first etching process, a top surface of the second preliminary lower material layer pattern being at a different height than the first preliminary lower material layer pattern; forming first and second lower material layer patterns by etching the first and second preliminary lower material layer patterns, respectively, using a second etching process, an upper surface of the first lower material layer pattern being at substantially the same height as an upper surface of the second lower material layer pattern; and forming first and second upper material layer patterns on the first and second lower material layer patterns, respectively.