Patent ID: 7770139

Claim:
A design structure embodied in a machine readable storage medium used in a design process for a method of controlling the performance of an integrated circuit path having a multi-mode circuit dynamically switchable among the following operating modes: a full-swing mode, a limited-swing mode, a full-swing to limited-swing converter mode, and a limited-swing to full-swing converter mode, the design structure of said method comprising: optimization circuitry configured for determining a desired performance level of the integrated circuit path; controller circuitry configured for dynamically switching the operating mode of the multi-mode circuit based on said desired performance level; a first signal input; a first signal output; one or more control bit inputs; and an adjustable bias voltage input; wherein the multi-mode circuit is dynamically switchable among the following operating modes: a full-swing mode, a limited-swing mode, a full-swing to limited-swing converter mode, and a limited-swing to full-swing converter mode.