Patent ID: 8173509

Claim:
A method for manufacturing a trench gate type semiconductor device with trench contact structure, comprising: forming a first semiconductor layer of a first conductivity type above a main surface of a semiconductor substrate; forming a second semiconductor layer of a second conductivity type on said first semiconductor layer; forming a third semiconductor layer of said first conductivity type on said second semiconductor layer; conducting etching treatment for said first semiconductor layer, said second semiconductor layer and said third semiconductor layer via a first mask to form a plurality of gate trenches so as to run into said first semiconductor layer through said second semiconductor layer and said third semiconductor layer; forming gate electrodes in said gate trenches via gate insulating films, respectively; conducting isotropic etching for said third semiconductor layer via a second mask to form contact trenches with respective longitudinal semielliptical cross sections at said third semiconductor layer in a thickness direction thereof between corresponding ones of said gate trenches; conducting ion implantation of impurity of said second conductivity type for bottoms of said contact trenches to form a plurality of impurity regions of said second conductivity type at regions below said bottoms of said contact trenches; forming first electrodes so as to embed said contact trenches and contacted with said impurity regions, respectively; and forming a second electrode on a rear surface of said semiconductor substrate.