Patent ID: 8400853

Claim:
A repair design method of a semiconductor chip by a repair design system including: a critical area calculated by a layout simulation which virtually drops a plurality of foreign objects to a design layout; a memory unit which memorizes product/TEG test result from design information of a logic unit and a RAM unit, RAM library information, and a product test result acquired from a product function specification; and a computing unit which makes an allocation to a mounted RAM and a repaired RAM group of the mounted RAM suitable using a result of the memory unit, wherein the computing unit carries out: a first step of calculating combinations of repaired RAM group candidates based on a number of groups set by a user; a second step of calculating combinations of repaired RAM candidates using the design information of RAM unit memorized in the memory unit; a third step of determining a design method of a group repair of mixed multiple repair methods which adopts a group repair selecting a repair method from a plurality of repair methods and grouping RAMs of the same repair method into one or more groups by using the critical area, the design information of the logic unit and the RAM unit, and the product test result.