Patent ID: 7546417

Claim:
A method of accessing data from a cache including cache lines of cache line data and cache line tags, comprising: designating a common subtag among cache line tags that share common bits of tags in a set of cache lines; designating remaining tag bits among cache line tags as remaining subtags; presenting an access to the cache; splitting an access address into constituent parts including an address tag, an index, and a line offset; splitting the address tag into an access address common subtag and an access address remaining tag; selecting a set of cache lines from the cache using the index of the access address; comparing the access address common subtag against the common subtag among the cache lines in the set of selected cache lines; comparing the access address remaining tag against the remaining subtags among the cache lines of the set of selected cache lines; selecting the common subtag corresponding to missed data when the access address common subtag does not match the common subtag among the cache lines in the set of selected cache lines; bringing the selected common subtag corresponding to missed data into the cache; evicting or writing back valid cache lines corresponding to the selected common tag; setting the selected common subtag as the access address common subtag; choosing one of the cache lines from the selected set of cache lines corresponding to the common subtag when the access address remaining tag does not match the remaining subtags for replacement; setting the remaining subtags of the chosen cache line corresponding to the common subtag to be the access address remaining tag; accessing a lower level of memory hierarchy and bringing the accessed data into the chosen cache line and marking the chosen cache line as valid; and supplying the accessed data back to a requester.