Patent ID: 8274079

Claim:
A semiconductor device comprising: a bottom-gate transistor including a gate electrode layer, an oxide semiconductor layer over the gate electrode layer, and a gate insulating layer interposed between the gate electrode layer and the oxide semiconductor layer, wherein each of the gate electrode layer, the oxide semiconductor layer, and the gate insulating layer is provided over a flexible substrate, wherein the oxide semiconductor layer comprises a channel formation region; an insulating layer over the bottom-gate transistor, the insulating layer being in contact with the gate insulating layer; and a conductive layer over the insulating layer, the conductive layer being in contact with the gate electrode layer, wherein the oxide semiconductor layer is interposed between the insulating layer and the gate insulating layer, wherein the oxide semiconductor layer is interposed between the conductive layer and the gate electrode layer, wherein the insulating layer is provided so as to cover the oxide semiconductor layer, wherein the conductive layer extends in a direction of a channel width of the oxide semiconductor layer from a first position to a second position, so as to intersect with the oxide semiconductor layer, wherein the conductive layer and the gate electrode layer are in contact with each other in the first position and in the second position, and wherein the conductive layer is provided so as to cover the channel formation region and an end portion of the insulating layer.