Patent ID: 8841180

Claim:
A method of forming a semiconductor device, the method comprising: forming a three-dimensional semiconductor structure above a substrate, the three-dimensional semiconductor structure comprising a first crystalline lattice of one or more species of charge-neutral lattice-forming atoms and having a first lattice constant; forming a gate dielectric layer around a portion of the three-dimensional semiconductor structure; forming a gate electrode around the gate dielectric layer; removing a portion of the three-dimensional semiconductor structure on either side of the gate dielectric layer and the gate electrode to provide a three-dimensional channel region; and forming a three-dimensional source region disposed laterally adjacent to a first end of the three-dimensional channel region and forming a three-dimensional drain region disposed laterally adjacent to a second end of the three-dimensional channel region, wherein the three-dimensional source and drain regions comprise a second crystalline lattice of one or more species of charge-neutral lattice-forming atoms and having a second lattice constant different from the first lattice constant, and wherein all species of charge-neutral lattice-forming atoms contained in the second crystalline lattice are contained in the first crystalline lattice.