Patent ID: 7031206

Claim:
An apparatus for delaying video line data between a sending device and a receiving device, the video line data including data corresponding to a previous video line and data corresponding to a present video line, the data corresponding to the previous video line including a first data portion and a second data portion, and the data corresponding to the present video line including a third data portion and a fourth data portion, the apparatus comprising: a single port random access memory (“RAM”) including a plurality of storage locations; and a processing arrangement including a first storage device coupled to the RAM and a second storage device coupled to the RAM, the processing arrangement configured to read the first data portion and the second data portion from one of the storage locations of the RAM, output the first data portion from the RAM to the receiving device, store the second data portion in the first storage device, store the third data portion from the sending device to the second storage device, write the third data portion from the second storage device and the fourth data portion from the sending device into the one of the storage locations of the RAM, and output the second data portion from the first storage device to the receiving device.