Patent ID: 6897838

Claim:
A memory-integrated display element, comprising: an optical modulation element provided in a pixel; a memory element, provided in the pixel, which stores binary data, which indicates a value inputted to the optical modulation element, wherein: said memory element is arranged by connecting at least an input inverter and an output inverter to each other in a loop manner, wherein an output of the input inverter is input into the output inverter, and wherein said output inverter is a complementary inverter, and an output of the output inverter which functions as an output end of the memory element, is directly connected to one end of the optical modulation element, wherein said complementary inverter includes: a p type transistor connected to a first power line; and an n type transistor connected to a second power line, and an anode of the optical modulation element is connected to an output end of the output inverter, and a cathode of the optical modulation element is connected to the second power line, and when a ratio of an OFF resistance value of the n type transistor with respect to an ON resistance value of the p type transistor is K, a ratio of an ON resistance value of the p type transistor with respect to an ON resistance value of the optical modulation element is set to be substantially (K+1) 1/2 /K.