Patent ID: 8760901

Claim:
A device comprising: a first controlled chip; and a control chip stacked with the first controlled chip and controlling the first controlled chip, wherein: the first controlled chip comprises: a first synchronization signal terminal supplied with a synchronization signal, a first delayed synchronization signal terminal supplied with a delayed synchronization signal, a first data terminal, and a first replica terminal; a first circuit outputting a data signal in response to the synchronization signal; an output circuit outputting the data signal to the first data terminal in synchronization with the delayed synchronization signal; a replica circuit replicating the output circuit and outputting a replica signal to the first replica terminal in synchronization with the delayed synchronization signal; and first to fourth through electrodes passing through the first controlled chip and connected, respectively to the first synchronization signal terminal, the first delayed synchronization signal terminal, the first data terminal and the first replica terminal; and the control chip comprises: a second synchronization signal terminal, a second delayed synchronization signal terminal, a second data terminal, and a second replica terminal which are connected respectively to the first to fourth through electrodes; a first control circuit generating the synchronization signal, and supplying the generated synchronization signal to at least the second synchronization signal terminal while receiving the data signal via the second data terminal; a delay circuit delaying the synchronization signal and supplying the same to the second delayed synchronization signal terminal as the delayed synchronization signal; a phase comparator circuit comparing the phase of the replica signal supplied via the second replica terminal with a phase of the synchronization signal; and a delay control circuit controlling the delay amount of the delay circuit based on a comparison result of the phase comparator circuit.