Patent ID: 8138530

Claim:
A CMOS image sensor comprising: an N type substrate having an active pixel sensor array region and a peripheral circuit region; a P type epitaxial layer formed on the N type substrate, the P type epitaxial layer having a first impurity concentration; a deep P well formed in the P type epitaxial layer and spaced apart from an upper surface of the N type substrate, the deep P well having a second impurity concentration; a first deep N well formed in a portion of the P type epitaxial layer in the active pixel sensor array region and formed through the deep P well to make contact with an operational voltage terminal, the first deep N well having the second impurity concentration; an isolation layer having a first portion in the active pixel sensor array region and a second portion in the peripheral circuit region, the first portion having a thickness different from a thickness of the second portion; a photodiode formed in the active pixel sensor array region and isolated by the first portion of the isolation layer; a second deep N well formed on the deep P well in the peripheral circuit region, the second deep N well having a third impurity concentration; shallow wells formed on the second deep N well and a portion of the active pixel sensor array region except for a portion where the photodiode is formed, the shallow wells having a fourth impurity concentration; and a CMOS element formed on the shallow wells.