Patent ID: 7160767

Claim:
A method for making a semiconductor device comprising: forming on a substrate a nitrided silicon dioxide layer that is between about 10 and about 30 angstroms thick; forming on the nitrided silicon dioxide layer a polysilicon containing layer that is between about 100 and about 2,000 angstroms thick; forming a first silicon nitride layer that is between about 100 and about 500 angstroms thick on the polysilicon containing layer; forming an etch stop layer that is between about 200 and about 1,200 angstroms thick on the first silicon nitride layer; etching the etch stop layer, the first silicon nitride layer, the polysilicon containing layer, and the nitrided silicon dioxide layer, to form a patterned etch stop layer, a patterned first silicon nitride layer, a patterned polysilicon containing layer, and a patterned nitrided silicon dioxide layer; depositing a second silicon nitride layer on the substrate, the patterned etch stop layer and on opposite sides of the patterned polysilicon containing layer; removing the second silicon nitride layer from part of the substrate and from the patterned etch stop layer to form first and second spacers on opposite sides of the patterned polysilicon containing layer; forming a dielectric layer on the patterned etch stop layer and on the substrate; removing the dielectric layer from the patterned etch stop layer; removing the patterned etch stop layer and the patterned first silicon nitride layer; removing the patterned polysilicon containing layer and the patterned nitrided silicon dioxide layer to generate the trench that is positioned between the first and second spacers; forming a high-k gate dielectric layer on the substrate at the bottom of the trench; and filling at least part of the trench with a metal layer that is formed on the high-k gate dielectric layer.