Patent ID: 8514625

Claim:
A method of programming a nonvolatile memory device including strings extending from intersections of first through nth bit lines (n being an integer of 1 or more) and first through mth string selection lines (m being an integer of 4 or more), each string including memory cells formed in a direction perpendicular to a substrate to have multiple layers of cells, wherein the perpendicular direction is a Y-direction, the string lines extend in a Z-direction and the bit lines extend in an X-direction, comprising: programming memory cells at each layer of an YZ plane with multi-bit data according to a shadow programming method, wherein, where memory cells at an Nth layer (N being an integer of 1 or more) of the YZ plane are programmed, remaining memory cells at an XZ plane corresponding to the Nth layer are programmed before memory cells at another layer of the YZ plane are programmed, wherein the programming comprises: sequentially performing a first programming operation on first memory cells at a first layer of the YZ plane and defined by a first string selection line and the first through nth bit lines, a second programming operation on second memory cells, defined by a second string selection line and the first through nth bit lines, from among remaining memory cells located at an XZ plane corresponding to the first layer of the YZ plane, a third programming operation on third memory cells, defined by a third string selection line and the first through nth bit lines, from among the remaining memory cells located at the XZ plane corresponding to the first layer of the YZ plane, and a fourth programming operation on fourth memory cells, defined by a fourth string selection line and the first through nth bit lines, from among the remaining memory cells located at the XZ plane corresponding to the first layer of the YZ plane, and after the first through mth programming operations, programming memory cells at a second layer of the YZ plane.