Patent ID: 7960779

Claim:
A nonvolatile semiconductor memory comprising: a memory cell array area provided in a semiconductor substrate; a memory cell forming area and select gate forming area provided in the memory cell array area; a plurality of memory cells provided in the memory cell forming area; and a plurality of select gate transistors provided in the select gate forming area; wherein each memory cell has two first diffusion layers provided in the semiconductor substrate in the memory cell forming area, a first gate insulating film provided on a surface of the semiconductor substrate between the first diffusion layers, a charge storage layer provided on the first gate insulating film, a first intermediate insulating film provided on the charge storage layer and acting as a block insulating film and a first gate electrode provided on the first intermediate insulating film; and each select gate transistor has two second diffusion layers provided in the semiconductor substrate in the select gate forming area, a second gate insulating film provided on the surface of the semiconductor substrate between the second diffusion layers, a second intermediate insulating film provided on and in direct contact with the second gate insulating film and having the same structure as the first intermediate insulating film, and a second gate electrode provided on the second intermediate insulating film.