Patent ID: 8195957

Claim:
A method for concealing information, comprising: performing by a computing device which is operatively coupled to a memory having first memory addresses and second memory addresses: for each first memory address, applying a first one-to-one address relationship to such first memory address for generating a first scrambled memory address and writing data into the memory at said first scrambled memory address; and reorganizing said memory, by: applying said first one-to-one address relationship a second time to read said data from said memory at said first scrambled memory address; and writing said data into the memory at said second memory addresses by applying a second one-to-one address relationship to each such second memory address for generating a second scrambled memory address and writing data into the memory at said second scrambled memory address; constructing an address scrambling table and a data scrambling table; generating an encrypted secret key and a decrypted secret key; obtaining data scrambling entries from said data scrambling table; applying a data scrambling function to said data, to said encrypted secret key and to said data scrambling entries in order to generate encrypted data and decrypted data and to obtain said encrypted secret key and said decrypted secret key for storage in said memory and retrieval from said memory respectively; distributing said encrypted secret key and said encrypted data in said memory at respective encrypted addresses; and accessing said memory at said encrypted addresses for respective storage and retrieval of said encrypted secret key and said encrypted data at said encrypted addresses, and retrieval of said decrypted data and said decrypted secret key.