Patent ID: 8339299

Claim:
A sigma-delta modulator comprising: a chopper voltage reference providing a reference signal having a clock dependent offset voltage, a single-bit or a multi-bit digital-to-analog converter (DAC); a plurality of capacitor pairs; a plurality of switches to couple any pair of capacitors from said plurality of capacitor pairs selectively to an input signal or the reference signal; and control means operable to control sampling through said switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal, and wherein an output value of the DAC and an offset state of said chopper voltage reference define a plurality of switching sequences wherein each switching sequence independently rotates said capacitor pairs and wherein at least one switching sequence is selected depending on a current output value of the DAC and a current offset state of the chopper voltage reference.