Patent ID: 7961532

Claim:
A memory controller having a communication path that is to be coupled to an external, wired electrical path, the memory controller comprising: a first interface circuit, electrically coupled to the communication path, to communicate with the external, wired electrical path using signals of a first format; a first signal connector electrically coupled to the first interface circuit; a second, alternative interface circuit, electrically coupled to the communication path, to communicate with the external, wired electrical path using signals of a second format; and a second signal connector electrically coupled to the second, alternative interface circuit; wherein the memory controller is adapted to selectively electrically couple only one of the first signal connector with the external, wired electrical path or the second signal connector to the external, wired electrical path, while the other of the first signal connector or the second signal connector is adapted to be left electrically uncoupled with the external, wired electrical path.