Patent ID: 8638135

Claim:
An integrated circuit comprising: a first transistor having a first current electrode, a second current electrode, and a control electrode; a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a second current electrode, and a control electrode; a switch for coupling the first and second transistors to receive a power supply voltage in response to an asserted bias control signal; a voltage regulator having an input coupled to receive an externally generated power supply voltage, the voltage regulator having output terminal for providing the power supply voltage; and a power-on reset circuit having a latch-up detection circuit coupled to receive the externally generated power supply voltage and to a control terminal of the switch, the latch-up detection circuit for detecting that the externally generated power supply voltage has dropped below a predetermined threshold voltage, and in response to detecting that the externally generated power supply voltage has dropped below the predetermined threshold voltage, deasserting the bias control signal to decouple the first and second transistors from the power supply voltage.