Patent ID: 8634966

Claim:
A power control unit comprising: a first terminal configured as a power input terminal to receive power at an input DC magnitude; a plurality of field effect transistors (“FETs”) configured to receive the power at the input DC magnitude and to operate the power control unit as a buck-boost power control unit; a first portion of memory configured to store data representing operational profiles for generating a power signal as a function of a parameter; a mode controller configured to select an operational profile from the operational profiles to establish a selected operational profile; a waveform control module configured to generate the power signal at an output DC magnitude in accordance with the selected operational profile; a second terminal configured as a power output terminal to transmit the power signal at the output DC magnitude; a second portion of memory configured to store data representing fault profiles that include thresholds for determining types of faults; and a fault detector configured to: detect a fault based on the fault profiles, and to determine whether the fault is associated with a subset of faults, and to perform a fault action.