Patent ID: 8250516

Claim:
A printed circuit board layout system, comprising: a first storage unit storing a plurality of function modules; and a processor unit executing the plurality of function modules; a second storage unit; wherein the plurality of function modules comprises: a PCB layout module configured to generate PCB files according to input wiring diagrams, and generate polygons and record profile attributes of each of the generated polygons; a polygon merging module, comprising: an obtaining sub-module configured to obtain profile attributes of selected polygons in one opened PCB file in response to user input and output the profile attributes to the second storage unit; a selecting sub-module configured to select two profile attributes each time from the second storage unit; and a computing sub-module configured to determine whether two polygons corresponding to the selected profile attributes are overlapping according to the selected profile attributes, and record a new profile attribute describing the shape of a new polygon of a combined shape of the two polygons excluding lines indicating the overlapping portion of the two polygons if the two polygons are overlapping.