Patent ID: 7356646

Claim:
A memory card connected to a host using a first interface mode in which the host commands NAND flash memories based on a first set of predetermined commands, including commands that are applied across at least two timing cycles, and addresses NAND flash memories based on first page and block sizes, the memory card comprising: a NAND flash memory using a second interface mode in which the NAND flash memory responds to commands based on a second set of predetermined commands, including commands that are applied across timing cycles different from the first set, and the NAND flash memory responds to addresses based on second page and block sizes different from the first page and block sizes; and a controller to convert the first interface mode to the second interface mode, the controller including: a command converting circuit to receive a command from such a host and convert the command to be used in the NAND flash memory, the command converting circuit being constructed and arranged to convert a command from the first set into a command from the second set; and an address converting circuit to receive the address from such a host and convert the address to be used in the NAND flash memory, the address converting circuit comprising a lookup table that maps the received address to the converted address.