Patent ID: 7812393

Claim:
An extended drain MOSFET formed in a semiconductor substrate, the MOSFET comprising: a field oxide layer formed at a surface of the-substrate, an opening being formed in the field oxide layer, the opening being bounded by edges of the field oxide layer; a conformal well of a first conductivity type formed in the substrate, the well comprising at least two dopant regions of the first conductivity type having different doping concentrations, respectively, the at least two dopant regions comprising a deeper dopant region and a shallower dopant region, the shallower dopant region being located directly above at least a portion of the deeper dopant region, the deeper dopant region having a peak doping concentration that is greater than a peak doping concentration of the shallower dopant region; a well contact region of the first conductivity type at the surface of the substrate, the well contact region abutting and being more highly doped than the shallower dopant region of the conformal well; a drain region of a second conductivity type bounded by the shallower dopant region of the conformal well and adjacent the surface of the substrate; a drift region of the second conductivity type bounded by the shallower dopant region of the conformal well and adjacent the surface of the substrate and the drain region, a doping concentration of the drift region being lower than a doping concentration of the drain region, the drift region having a substantially planar lower boundary; a layer of the second conductivity type located directly below the drain region and extending downward from the drain region into the shallower dopant region of the conformal well in the direction of the deeper dopant region, a lower boundary of the layer being located in the shallower dopant region of the conformal well at a level deeper than the planar lower boundary of the drift region; a source region of the second conductivity type bounded by the conformal well and adjacent the surface of the substrate, the source region being separated from the drift region by a channel region, the source region being shorted to the well contact region; a gate dielectric layer over the channel region; and a gate over the gate dielectric layer, wherein the drain region, the layer of second conductivity type and the deeper dopant region of the conformal well together form a diode, the diode being structured to experience avalanche breakdown so as to lower the source-drain breakdown voltage of the MOSFET.