Patent ID: 6977438

Claim:
An integrated circuit device comprising: a lower interlayer film; a lower groove formed in said lower interlayer film to a prescribed depth; a lower wiring embedded in said lower groove, said lower wiring having an upper surface; a barrier insulating film layered over said lower interlayer film; a first layer disposed over the upper surface of said barrier insulating film, said first layer having an upper surface; a second layer disposed directly over and in contact with the upper surface of said first layer, said second layer having an upper surface; an upper groove formed in said second layer, said upper groove extending from the upper surface of the second layer to a bottom portion disposed over a portion of the upper surface of said first layer; upper wiring embedded in said upper groove; a via hole formed through said first layer and said barrier insulating film, said via hole extending from the bottom portion of said upper groove adjacent to the upper surface of the first layer to the upper surface of said lower wiring; and an interconnect line embedded in said via hole; wherein one of said first layer and said second layer is a CH-based organic polymer layer and the other of said first layer and said second layer is a low-permittivity layer made of one of MSQ, HSQ, MHSQ, and a carbon-containing silicon oxide film, and wherein said upper groove is wider than said via hole.