Patent ID: 7126177

Claim:
A semiconductor memory device composed of a plurality of memory cells arranged therein, each memory cell consisting of a memory capacitor with a memory node electrode and a transistor, said semiconductor memory device comprising: a substrate having a plurality of trenches which are formed side by side and separated from each other by trench walls; a plate electrode which is formed to a prescribed depth from the surface of the inner wall of said trench; a capacitor insulating film which covers the surface of the inner wall of said trench; a memory node electrode which fills said trench, with said capacitor insulating film interposed between them; an interlayer insulating film which entirely covers said substrate and said memory node electrode; a semiconductor layer which is formed on said interlayer insulating film and which has said transistor formed therein; a memory node contact plug which is buried in a contact hole which is so made as to reach said memory node electrode from the surface of said semiconductor layer; a metallized region which is formed integrally with at least part of the surface of said semiconductor layer and at least part of the surface of said memory node contact plug in such a way that said semiconductor layer is electrically connected to said memory node contact plug; a cylindrical insulating film is formed on the surface of the side wall of said contact hole, said memory node contact plug being formed inside said cylindrical insulating film; and a conductive film is buried in the recess surrounded by said semiconductor layer, the side close to said cylindrical insulating film of said memory node contact plug, and the upper surface of said cylindrical insulating film, wherein, said metallized region is formed such that it gets over the upper part of said cylindrical insulating film and it is integral with at least part of the surface of said semiconductor layer and at least part of the surface of said memory node contact plug, an upper surface of said cylindrical insulating film is formed lower than an upper surface of said semiconductor layer and said memory node contact plug, and said metallized region is formed integrally with said conductive film, at least part of the surface of said semiconductor layer, and at least part of the surface of said memory node contact plug.