Patent ID: 7256079

Claim:
An evaluation method of a TFT comprising: a step of forming a TAG and the TFT over a same substrate, each having a gate electrode which is formed to have a first conductive film over a semiconductor film and a second conductive film over the first conductive film, the semiconductor film having a low concentration impurity region overlapping the gate electrode, a step of measuring resistance of the low concentration impurity region of the TEG, and estimating an impurity concentration of the low concentration impurity region of the TFT by the resistance, wherein etching is performed simultaneously on the gate electrode of the TEG and the gate electrode of the TFT, wherein an edge of the first conductive film extends beyond an edge of the second conductive film, and wherein a side edge portion of the semiconductor film is provided between the edge of the first conctuctive film and the edge of the second conductive film.