Patent ID: 8281062

Claim:
A storage device comprising: a non-volatile memory implemented as a plurality of memory units; a first connector to a host that is associated with a first data transfer rate; a plurality of first controllers, wherein each of the plurality of first controllers is functionally interposed between the first connector and a respective one or more of the plurality of memory units, and wherein each of the plurality of first controllers is enumerable by the host as a distinct storage device when the first connector is connected to the host; a second connector that is associated with a second data transfer rate, wherein the second data transfer rate differs from the first data transfer rate; and a second controller operative to segment a first file system into a first plurality of segments and to write the first plurality of segments to the plurality of memory units, wherein the plurality of first controllers is operative to: reassemble the first plurality of segments responsive to a data read request; receive from the host a second file system that is segmented into a second plurality of segments, each of the second plurality of segments being uniquely associated with a particular one of the plurality of first controllers; and write the second plurality of segments into the plurality of memory units by the plurality of first controllers, each of the plurality of first controllers writing the respective segment to the one or more of the plurality of memory units associated with that controller.