Patent ID: 7765515

Claim:
A computer-assisted method for applying optical proximity correction (OPC) to a circuit layout, comprising: a pre-OPC process comprising: storing polygon-shaped defect targets in a defect pattern library in a computer storage system, wherein each polygon-shaped defect target is stored with neighboring circuit features surrounding the polygon-shaped defect target, wherein the polygon-shaped defect targets are not correctable by OPC; using a computer processor to identify, in a first circuit layout, a first target that matches the shape of a polygon-shaped defect target in the defect pattern library; and modifying the identified polygon-shaped defect target in the first circuit layout to produce modified circuit features for correction by OPC; and an OPC process comprising: storing polygon-shaped OPC targets in an OPC pattern library in a computer storage system, wherein each polygon-shaped OPC target is stored with neighboring circuit features surrounding the polygon-shaped OPC target, wherein the polygon-shaped OPC targets stored in the OPC pattern library are not stored in the defect pattern library; storing post-OPC targets each in association with one of the polygon-shaped OPC targets in the OPC pattern library, wherein the post-OPC targets are configured to correct optical proximity effects of their respective polygon-shaped OPC targets; identifying, in the first circuit layout, a second target that has substantially the same shape as a polygon-shaped OPC target in the OPC pattern library, wherein the second target has neighboring circuit features matching the neighboring features of the polygon-shaped OPC target in the OPC pattern library; and applying OPC to the second target using the post-OPC target associated with the identified polygon-shaped OPC target in the OPC pattern library.