Patent ID: 7064425

Claim:
A semiconductor device comprising: leads, every one of the leads having a first electrode; a semiconductor chip which includes an integrated circuit, second electrodes, and bumps formed on the second electrodes; another semiconductor chip which includes an integrated circuit and third electrodes; first wires, every one of the first wires having one end electrically connected with the first electrode, and another end electrically connected with one of the bumps; and second wires, every one of the second wires having a first end electrically connected with one of the bumps in a state in which at least a part of the first end is superposed on one of the first wires, and a second end electrically connected with one of the third electrodes, wherein every one of the bumps on the second electrodes has its first and second portions with its center interposed therebetween, the center and the first and second portions of each of the bumps being aligned along an imaginary line defined by a corresponding one of the first wires, every one of the first wires passing above or contacting on the first portion and extending away from the second portion, every one of the second wires having the first end disposed on the second portion and avoiding superposition on the center of any the bumps.