Patent ID: 7786783

Claim:
A duty cycle correction circuit, comprising: a signal generating unit, including a first signal generating unit configured to output a complementary output signal of an output signal in response to a clock signal, and a second signal generating unit configured to output the output signal in response to a complementary clock signal of the clock signal; a variable resistor unit coupled between the first and second signal generating units, the variable resistor configured to vary an amount of current flowing into the signal generating unit according to a duty correction control signal, the duty correction control signal having a voltage level determined based on a voltage level of the output signal; a current source coupled between the variable resistor unit and a ground voltage terminal configured to supply current to the signal generating unit; a duty detector configured to output a duty detection signal by detecting voltage levels of the output signal and the complementary output signal; and a counter configured to receive the duty detection signal and output the duty correction control signal.