Patent ID: 8422326

Claim:
A semiconductor device comprising: a first well having a first conductivity type; a second well having the first conductivity type; a third well having a second conductivity type located between the first and second wells; a first element isolation region defining a border between the first and third wells; a second element isolation region defining a border between the second the third wells; a first driver transistor of the second conductivity type formed adjacent to the first element isolation region on the first well; a second driver transistor of the first conductivity type formed adjacent to the first element isolation region on the third well; first and second sense transistors of the second conductivity type formed on the first well, the first and second sense transistors being arranged farther than the first driver transistor with respect to the first element isolation region, the first and second sense transistors being cross-coupled to each other; third and fourth sense transistors of the first conductivity type formed on the third well, the third and fourth sense transistors being arranged farther than the second driver transistor with respect to the first element isolation region, the third and fourth sense transistors being cross-coupled to each other; a third driver transistor of the second conductivity type formed adjacent to the second element isolation region on the second well; a fourth driver transistor of the first conductivity type formed adjacent to the second element isolation region on the third well; fifth and sixth sense transistors of the second conductivity type formed on the second well, the fifth and sixth sense transistors being arranged farther than the third driver transistor with respect to the second element isolation region, the fifth and sixth sense transistors being cross-coupled to each other; and seventh and eighth sense transistors of the first conductivity type formed on the third well, the seventh and eighth sense transistors being arranged farther than the fourth driver transistor with respect to the second element isolation region, the seventh and eighth sense transistors being cross-coupled to each other, wherein the first to fourth sense transistors constitute a first sense amplifier powered by the first and second driver transistors, and the fifth to eighth sense transistors constitute a second sense amplifier powered by the third and fourth driver transistors.