Patent ID: 8575983

Claim:
A waveform generation circuit for an arbitrary waveform generator comprising: a clock generator for generating a sampling clock; a waveform memory for storing data of one or more signal components of an output waveform signal; a digital to analog converter for converting the data of the signal components from the waveform memory as the output waveform signal; a sequencer having a sequence memory for storing sequence control data representing one or more signal components and related dead times; an address counter receiving sequence control initial address data of a selected one of the signal components and providing the initial address to the waveform memory; a wait counter receiving sequence control wait time data for the dead time of a selected signal component and counting the sampling clock until a terminal count of the wait time data is reached during which the waveform memory outputs data associated with the initial address of the signal component and generating a signal to initiate incremental addresses from the address counter to the waveform memory for the selected signal component data; and a signal component length counter receiving sequence control signal component length data and the incremental address initiate signal for counting the sampling clock for the duration of the selected signal component and generating a signal representing the end of the selected signal component of the output waveform signal and terminating the generation of addresses from the address counter, wherein the signal representing the end of the selected signal component initiates one of repeating the selected signal component and selecting sequence control data representing another signal component and related dead time.