Patent ID: 7636394

Claim:
A compression encoder which compresses input first and second digital image signals having frame rates different from each other, based on a same encoding system, comprising: a dividing section which divides each inputted first and second digital image signals into plural macro blocks of orthogonal-transformation blocks for each frame thereof; a shuffling section which, for each of the first and second digital image signals, rearranges the macro blocks in each frame into groups and creates macro block units for every group; and a compression-encoding section which compression-encodes, based on the frame rate, each of the first and second digital image signals for every macro block unit consisting of plural macro blocks rearranged by the shuffling section, wherein the shuffling section rearranges the macro blocks of the first digital image signals such that an output order of the macro block units of the first digital image signals after compression-encoding at the first frame rate is equivalent to the output order of the macro block units of the second digital image signals after compression-encoding at the second frame rate.