Patent ID: 7129162

Claim:
A method of forming a metal conductor in an integrated circuit, comprising the steps of: forming an etch-stop layer over a conductor near a surface of a substrate; depositing a dielectric layer over the etch-stop layer; then depositing a dual cap layer comprised of a layer comprised of silicon carbide and a layer comprised of silicon nitride over the dielectric layer; patterning a masking layer over the dual cap layer to define the location of an opening through the dielectric layer; etching the dual cap layer and the interlevel dielectric layer at the defined location to form an opening, exposing a portion of the etch-stop layer, wherein said etching step erodes said masking layer leaving a masking layer residue; after said etching step, removing said masking layer residue; then, etching the exposed portion of the etch-stop layer; and depositing metal into the opening to electrically contact the conductor.