Patent ID: 7262078

Claim:
A method of forming a wear-resistant dielectric layer comprising: providing a substrate, the substrate comprising: a plurality of devices disposed in the substrate; a plurality of contact pads disposed on a surface of the substrate and electrically connected to the devices; and a surface dielectric layer positioned on the surface of the substrate, the surface dielectric layer exposing the contact pads; performing a surface treatment process, the surface treatment process comprising at least a plasma etching process; performing at least a plasma enhanced chemical vapor deposition (PECVD) process to form a dielectric layer on a surface dielectric layer, the PECVD process being performed in a high frequency/low frequency alternating manner, wherein the dielectric layer is composite dielectric layer including silicon nitride; forming a masking pattern on the dielectric layer, and performing an anisotropic etching process to form a plurality of openings corresponding to the contact pads in the dielectric layer, the openings exposing the contact pads, and each opening having an outwardly-inclined sidewall forming an under bump metallurgy layer (UMB) on the dielectric layer; forming a masking a pattern on the UMB layer, the masking pattern exposing the openings; forming a solder bumps by plating technique; and removing the masking pattern, and the UMB layer is not covered by solder bumps.