Patent ID: 8552414

Claim:
A memory array comprising: first and second electronically scannable multiplexing devices, wherein each scannable multiplexing device comprises: an electronically scannable multiplexing device that includes: a scanning region; wherein upon application of a potential to the scanning region, a depletion region is positioned within the scanning region to generate a conducting channel within the scanning region; and wherein a location of the conducting channel is selectively positioned within the scanning region by varying the potential; a first set of lines that are connected to the first multiplexing device and a second set of lines that are connected to the second multiplexing device; and a plurality of memory devices that are electrically connected between the first and second sets of lines, so that at least one of the memory devices is selected by selecting the location of the conducting channel of each scannable multiplexing device within the scanning region of each scannable multiplexing device.