Patent ID: 8817936

Claim:
A system for synchronizing IQ demodulators comprising: a plurality of IQ demodulators; a plurality of phase-controlling devices each associated with one of the plurality of IQ demodulators for outputting an output signal to its associated IQ demodulator having a phase controlled by the associated phase-controlling device; only one system clock in communication with the plurality of phase-controlling devices, the only one system clock configured to output to each of the plurality of phase-controlling devices a system signal; a reference signal comprising a reference phase; a phase detector in communication with the output signals for determining whether the phase of any of the output signals is out-of-phase with the reference phase of the reference signal; and a control-device comprising a processor in communication with the phase detector and with the plurality of phase-controlling devices programmed, internally or externally, to send a control signal to the associated phase-controlling device for any of the output signals which are out-of-phase with the reference phase of the reference signal so that the associated phase-controlling device synchronizes the phase of the output signal to being in-phase with the reference phase of the reference signal.