Patent ID: 7180330

Claim:
An output circuit comprising: an output node through which power is supplied to an external load circuit; a first power supply unit; an output MIS transistor, provided between the first power supply unit and the output node, for allowing or stopping the supply of the power to the output node; a reference node connected to the current supply unit; a current supply unit; a reference MIS transistor that is provided between the first power supply unit and the reference node, and that has a gate electrode to which a constant voltage is applied to allow the reference MIS transistor to function as a resistor, a comparator having one input section thereof connected to the reference node and the other input section thereof connected to the output node, and a logic circuit having an input section to which a control voltage applied to the gate electrode of the output MIS transistor and an output signal of the comparator are input and an output section to which the output signal of the comparator is transmitted when the output MIS transistor is ON.