Patent ID: 7944037

Claim:
A semiconductor device, comprising: a wiring board having a first surface provided with an element mounting section and connection pads, and a second surface on a side opposite to the first surface; a first element group including a plurality of first semiconductor elements with first electrode pads arranged along one outline side, the first semiconductor elements being stacked in a step-like shape on the element mounting section of the wiring board with the outline sides directed to the same direction and the first electrode pads exposed; a second element group including a plurality of second semiconductor elements with second electrode pads arranged along one outline side, the second semiconductor elements being stacked in a step-like shape on the first element group with the outline sides directed to the same direction and the second electrode pads exposed; first metallic wires electrically connecting the first electrode pads and the connection pads of the wiring board; second metallic wires electrically connecting the second electrode pads and the connection pads of the wiring board; and a sealing resin layer formed on the first surface of the wiring board to seal the first and second element groups together with the first and second metallic wires, wherein the lowermost semiconductor element among the second semiconductor elements has a thickness larger than those of the other semiconductor elements among the second semiconductor elements, and wherein the second electrode pads are arranged on opposite sides of the second semiconductor elements from the wiring board, and a hollow portion is arranged below the lowermost semiconductor element among the second semiconductor elements corresponding to the second electrode pads of the lowermost semiconductor element.