Patent ID: 7605448

Claim:
A semiconductor device, comprising a low dielectric constant film having a relative dielectric constant less than 3.5 and a seal ring which is a moisture blocking wall in closed loop form in a plan view, wherein said seal ring includes a seal ring protrusion portion in inward protruding form in a vicinity of a corner of a chip, wherein a sacrifice pattern which is a structure in wall-form for preventing progress of a crack is provided outside of said sealing protrusion portion from a center of a chip, wherein a passivation film covers said low dielectric constant film, said seal ring and said sacrifice pattern and includes a planar portion and a ridged portion, and wherein the planar portion of said passivation film is formed above said sacrifice pattern and the ridged portion of said passivation film covers a top of said seal ring and a part of a side wall of said seal ring.