Patent ID: 7233181

Claim:
A prescaler circuit, comprising: first to fourth D-type flip-flop (DFF) circuits; first and second AND circuits; and first and second OR circuits, wherein an output of the first AND circuit is connected to a data input of the first DFF circuit, a positive output of the first DFF circuit is connected to one input of the second AND circuit, an output of the second AND circuit is connected to a data input of the second DFF circuit, a positive output of the fourth DFF circuit and the positive output of the first DFF circuit are connected to inputs of the first OR circuit, an output of the first OR circuit is connected to one input of the second OR circuit, a positive output of the second DFF circuit is connected to the other input of the second OR circuit, an output of the second OR circuit is connected to a data input of the third DFF circuit, a negative output of the third DFF circuit is connected to a data input of the fourth DFF circuit, and the positive output of the fourth DFF circuit is connected to one input of the first AND circuit, and a modulus signal is input to the other input of the first AND circuit, another modulus signal different from the modulus signal input to the first AND circuit is input to the other input of the second AND circuit, and a frequency division number of the prescaler circuit is made variable by controlling the modulus signals input to the first AND circuit and the second AND circuit.