Patent ID: 7682909

Claim:
A method for fabricating a vertical trench gate transistor semiconductor device having a first portion functioning as a transistor and a second portion functioning as an electrical contact with a body region of the transistor and arranged adjacent to the first portion, comprising: a first step of forming a first drain region in the first portion and a second drain region in the second portion, and forming a first body region over the first drain region and a second body region over the second drain region; a second step of forming a trench in the first body region and the second body region; a third step of forming a first source region over the first body region; a fourth step of forming a second source region over the second body region; a fifth step of forming a gate within the trench so as to form a recessed part in an upper part of the trench after the second step; a sixth step of forming an insulating film for burying the recessed part after the fifth step; and a seventh step of removing an upper part of the insulating film and rounding an upper edge of a wall face of the recessed part, wherein the first source region and the second source region are formed so as to be electrically connected with each other.