Patent ID: 7396749

Claim:
A method of forming electrically connected contacting parts of a component integrated into a semiconductor substrate, the method comprising: providing a hard mask patterned over an insulating layer to define a contact hole; forming said contact hole in said insulating layer; filling the contact hole with an ARC layer that also overlies said patterned hard mask and the insulating layer; depositing and patterning a photoresist layer on said ARC layer; removing portions of the ARC layer and portions of the hard mask not covered by the photoresist layer to repattern said hard mask to define a conductive line trench; removing portions of the insulating layer to form said conductive line trench; removing the ARC layer from the contact hole; and filling the contact hole and said conductive line trench with contact material so that the filled contact hole and the conductive line trench are electrically connected.