Patent ID: 8409944

Claim:
A process of forming an electronic device including a nonvolatile memory cell comprising: forming a field isolation region within a substrate to define first, second, and third active regions, wherein the first, second, and third active regions are spaced apart from one another; forming a floating gate electrode over the substrate and a part of the field isolation region, wherein the floating gate includes: a first portion disposed over the first active region, wherein the first portion has a first conductivity type and the first active region has a second conductivity type opposite the first conductivity type; a second portion disposed over the second active region, wherein at least part of the second portion has the second conductivity type and the second active region has the second conductivity type; and a third portion disposed over the third active region, wherein the third portion has the first conductivity type and the third active region has the second conductivity type; and forming an access gate electrode over the third active region, wherein the access gate electrode and the floating gate electrode are spaced apart from each other.