Patent ID: 8097906

Claim:
A semiconductor device comprising: a main substrate; a plurality of source finger electrodes disposed on the main substrate in a predetermined direction; a plurality of drain finger electrodes, the drain finger electrodes and the source finger electrodes being alternately arranged in the predetermined direction; a plurality of gate finger electrodes, respective ones of the gate finger electrodes being disposed between a respective source finger electrode and a respective drain finger electrode, in the predetermined direction; a plurality of source pads disposed at only an output side of an array of the finger electrodes; a plurality of drain pads disposed between the plurality of source pads; a plurality of gate pads disposed at only an input side of the array of the plurality of finger electrodes; a source electrode wiring for connecting a predetermined number of the source finger electrodes to the plurality of source pads; a drain electrode wiring for connecting a predetermined number of the drain finger electrodes to the plurality of drain pads; and a gate electrode wiring for connecting a predetermined number of the gate finger electrodes to the plurality of gate pads.