Patent ID: 7490218

Claim:
A method for facilitating thread synchronization in a dataflow computing device having a plurality of dataflow processing elements, wherein the dataflow computing device does not use a program counter, each of said plurality of dataflow processing elements being autonomous and thus, capable of independently sequencing, issuing, and executing the instructions when the plurality of dataflow processing elements are employed for executing at least one thread, comprising the steps of: (a) dividing a control flow graph of a thread into a plurality of waves, wherein each wave comprises a connected, directed partially ordered portion of the control flow graph, with a single entrance; (b) providing wave number tags to be used in identifying each individual dynamic instance of data used when executing a thread, each memory operation being annotated with its location in each wave and in regard to its ordering relationship with other memory operations in the wave, to define a wave-ordered memory, the wave-ordered memory ensuring that the results of earlier memory operations are visible to later memory operations; and (c) including a memory fence instruction that, when executed, indicates a commitment to memory of prior load and prior store operations that have occurred during execution of a thread with which the memory fence instruction is employed.