Patent ID: 7944022

Claim:
A semiconductor device comprising: a supporting substrate; a semiconductor layer of a second conductivity type formed above a main surface of said supporting substrate; a base region of a second conductivity type formed in the surface of said semiconductor layer; a well region of a first conductivity type formed apart from said base region in the lateral direction; an emitter region of the first conductivity type formed from in the surface of said base region; a collector region of the second conductivity type formed in the surface of said well region; a base contact diffusion region of the second conductivity type formed in the surface of said base region; a gate insulating film formed on said base region at least from an end of said emitter region to an end of said base region; a gate electrode formed on said gate insulating film; wherein a length in a lateral direction from a point where an impurity concentration of the second conductivity type in said base region becomes maximum under said emitter region and at the end of said gate electrode, to a side portion of said base region is not smaller than a length in the vertical direction from said point to an underside portion of said base region, and according to a plan view of said collector region, said collector region having a corner portion and a straight portion and is surrounded by said gate electrode, and said emitter region is located at the periphery of said collector region and is formed corresponding to said straight portion.