Patent ID: 7719918

Claim:
A semiconductor memory device comprising a plurality of couples of banks and a plurality of couples of sense amplifiers that amplify data transferred from the couples of banks and output the amplified signals, the semiconductor memory device comprising: a controller configured to determine the output states of amplified signals outputted from each sense amplifier of a couple of sense amplifiers and to output driving signals corresponding to the output states of the amplified signals outputted from the sense amplifiers of the couple of sense amplifiers; and a driver configured to receive driving signals and to drive a global input/output line in response to the driving signals, wherein the couple of sense amplifiers share the driver, wherein the controller is configured to perform NAND operating on the amplified signals outputted from a first sense amplifier corresponding to a first bank of a couple of banks and the amplified signals outputted from a second sense amplifier corresponding to a second bank of a couple of banks so as to combine the amplified signals and output the combined signals as the driving signals.