Patent ID: 7956660

Claim:
A signal processing device comprising: a correction circuit to correct a distortion of a duty cycle in a data signal having different occurrence probabilities of 0 and 1, wherein the correction circuit includes: a phase detection circuit to detect a difference between a phase of the data signal and a phase of a clock signal as an advance or a delay with respect to the clock signal; an edge detection circuit to detect a rising edge and a falling edge of the data signal; a distortion detection circuit to detect the distortion of the duty cycle upon determination that a difference between the phase of the data signal and the phase of the clock signal on the rising edge of the data signal is opposite to a difference between the phase of the data signal and the phase of the clock signal on the falling edge of the clock signal; and a duty adjustment circuit to adjust the duty cycle on the basis of the result of the detection by the distortion detection circuit to correct the distortion of the duty cycle.