Patent ID: 8889539

Claim:
A method of forming a semiconductor device, comprising: forming a substrate and an active layer at a top portion of the substrate; forming a polysilicon layer on the active layer; forming a first insulation layer on the polysilicon layer; forming a plurality of masks by patterning the first insulating layer and the polysilicon layer; forming a plurality of trenches having trench walls in the substrate, each trench disposed between two adjacent masks and extending vertically from a bottom portion to an upper portion; forming a second insulating layer on the trench walls; forming a conductive layer on the second insulating layer; etching the conductive layer to form conductive layer patterns to fill the bottom portions of the trenches; depositing a buffer layer on the conductive layer patterns and the trench walls; filling the upper portions of the trenches with a capping layer; planarizing the capping layer, the buffer layer, and the hard masks to expose the active layer at the top portion of the substrate; forming an ILD layer on active layer, the buffer layer, and the capping layer; and etching the ILD layer above the active layer to form contact holes.