Patent ID: 7825705

Claim:
A reset signal generating circuit comprising: a power supply voltage detecting circuit for detecting a voltage of a power supply; a first capacitor connected between a first node and a reference potential; a charging circuit, connected to the first node, that charges the first capacitor with a constant current; a first switch element, connected to the first node, that discharges charges in the first capacitor when the power supply voltage detecting circuit detects a decrease in the voltage of the power supply; and a waveform generating circuit that determines a voltage level at the first node and outputting a reset signal when the voltage level at the first node is determined to be low, wherein the waveform generating circuit comprises: a second switch element having one end thereof connected to the first node and turning on when the voltage level at the first node is determined to be low; a second capacitor connected in parallel to the first capacitor via the second switch element; and a third switch element that discharges the second capacitor when the reset signal is not outputted.