Patent ID: 8836564

Claim:
An A/D conversion device comprising: a control clock generator, which, in operation, generates a control clock signal having a cycle that is an integral multiple of a cycle of a reference clock signal; a shift voltage generator, which, in operation, generates a different shift voltage every cycle of the reference clock signal while taking a cycle of the control clock signal as one cycle; an offset section, which, in operation, offsets an analog signal based on a shift voltage generated by the shift voltage generator; an A/D converter, which, in operation, converts the offset analog signal to a digital signal every cycle of the reference clock signal; an averaging section, which, in operation, averages outputs from the A/D converter every cycle of the control clock signal; a switch, which, in operation, opens and closes a channel between the A/D converter and the averaging section; and a switch controller, which, in operation, controls the switch in accordance with a result of a comparison between a value output from the A/D converter and a reference value, wherein the switch controller controls the switch so as to close the channel when the value output from the A/D converter falls within a determined error range with reference to the reference value, wherein the shift voltage varies every cycle of the reference clock signal, while taking a reference shift value as a criterion, such that a total of a value of minimum resolution of an output from the averaging section and a value of an offset between cycles of the reference clock signal of the shift voltage comes to a value of minimum resolution of the A/D converter.