Patent ID: 7486726

Claim:
An iterative signal processing arrangement having: one or more pairs of first and second signal processing components, the pairs of components being in iterative configuration, each of the first signal processing components having as input one or more received signals dependent upon one or more transmitted signals, wherein for each said signal processing component pair the output of said first signal processing component is an estimate of a characteristic of a selected transmitted signal based on the current and one or more previous input signals received by said first signal processing component, which is input to said corresponding second signal processing component that provides a further estimate of said selected transmitted signal to the output of said second signal processing component, the outputs of all said second signal processing components of respective pairs are input to each said first signal processing components of all said pairs in a succeeding iteration cycle, wherein said first signal processing components consists of: at least two linear iterative filters wherein a first of said linear iterative filters outputs an estimate of a selected characteristic of a selected one of said transmitted signals to said second signal processing component, and a second of said iterative filters having the same inputs as said first linear iterative filter provides an estimate of a characteristic of a selected of one or more transmitted signals and then delays by one iteration cycle said estimate and outputs said delayed estimate to an input of said first linear iterative filter.