Patent ID: 7199017

Claim:
A method of forming semiconductor circuitry, comprising: providing a bulk monocrystalline silicon wafer having an uppermost bulk monocrystalline silicon surface at a first height; forming a mask which covers a first portion of the wafer and leaves a second portion uncovered, the mask having an uppermost surface at a second height which is above the first height; forming a recess in the uncovered portion, the recess being formed within the monocrystalline silicon of the wafer and having a sidewall periphery; forming a dielectric material spacer along the sidewall periphery of the recess, the spacer having an uppermost surface which is at about the second height; filling the recess with a semiconductive material that comprises at least 1 atomic percent of an element other than silicon, the semiconductive material having an uppermost surface at about the second height; removing the mask; reducing the height of the spacer to about the first height while leaving the height of the semiconductor material at about the second height; forming a first semiconductor circuit component over the first portion of the wafer; and forming a second semiconductor circuit component over the semiconductive material that is at the second height.