Patent ID: 8416548

Claim:
A MOSFET power transistor in combination with a control device for controlling the power transistor; the power transistor comprising a gate, a source and a drain; the control device comprising: an amplification device ( 15 ) comprising a negative first input (NEG), a positive second input (POS) and an output; a first resistor (R 9 ) and a second resistor (R 18 ); the amplification device controlling the gate of the power transistor through an output control signal emitted by the output of the amplification device ( 15 ); the negative first input (NEG) connected to the drain of the power transistor through the first resistor (R 9 ) and forming a first connection; and the positive second input (POS) connected to the source of the power transistor by a second connection; a feedback loop between the output of the amplification device ( 15 ) and the negative first input (NEG) thereof, the feedback loop including the second resistor (R 18 ); a leakage protection device provided to prevent passage of a leakage current through the power transistor and the control device, the current being able to discharge a supply source connected to the power transistor and the control device; the leakage protection device comprising a first one-way semiconductor element (D 4 ), a second one-way semiconductor element (D 9 ) and a third one-way semiconductor element (D 3 ) inserted in series in the first connection, the feedback loop and the second connection of the amplification device ( 15 ), respectively; the direction of insertion of each of the one-way semiconductor elements (D 3 , D 4 , D 9 ) being determined such as to prevent the passage of the leakage current; the number of the one-way semiconductor elements (D 3 , D 4 ) inserted in the first and second connections being determined such as to have the same number N of semiconductor junctions between the first and second connections.