Patent ID: 7065667

Claim:
An integrated circuit device to be connected externally with a peripheral device operated by a first clock signal of a predetermined frequency, comprising: a CPU having information on the frequency of the first clock signal; a clock generator generating a second clock signal for operating the CPU and outputting a plurality of third clock signals obtained by dividing the frequency of the second clock signal; a clock halt portion receiving the third clock signals from the clock generator and selectively outputting only one of the third clock signals according to the information from the CPU; a timer activated only when receiving the one of the third clock signals from the clock halt portion and converting the frequency of the received clock signal for output; and a clock synchronization serial port receiving the clock signal outputted from the timer and one of the other third clock signal(s) from the clock generator, and supplying either one of the received clock signals to the peripheral device according to the information from the CPU.