Patent ID: 7123078

Claim:
A boosting voltage control circuit, comprising: a first charge pump coupled to an output node and operated in a read state of a memory device; a second charge pump coupled to the output node, the second charge pump being operated in a standby state and the read state of the memory device; a regulation circuit coupled to the output node; and a clock generator coupled to the regulation circuit, the first charge pump, and the second charge pump, wherein the first charge pump and the second charge pump are coupled in parallel between the clock generator and the output node, wherein the regulation circuit comprises: a first voltage divider coupled to the output node to divide a voltage of the output node; a reference voltage generator to generate a reference voltage and a control voltage based on an input voltage; an input voltage generator to generate the input voltage based on trim bits; a control signal generator to generate a control signal based on an output of the voltage divider, the control voltage, and the reference voltage, the control signal for controlling the clock generator.