Patent ID: 8589611

Claim:
An asynchronous logic circuit comprising: an asynchronous branching module outputting transfer data received according to a handshake protocol of performing data transfer by transmitting/receiving a data request signal and a data acknowledge signal in a predetermined procedure, to any of a plurality of branch destinations; an asynchronous arbitration module merging transfer paths of the transfer data and sequentially outputting the transfer data received from at least one of a plurality of merge sources, in a predetermined procedure without contradicting the procedure; a congestion detection module disposed corresponding to the asynchronous arbitration module, receiving an arbitration result signal indicating a merge source from which data is being transferred from the asynchronous arbitration module, and outputting congestion information indicative of presence or absence of congestion to the plurality of merge sources of the asynchronous arbitration module; and a congestion avoiding path calculation module disposed corresponding to the asynchronous branching module, and exclusively performing a process of receiving the congestion information from a congestion detection module corresponding to an asynchronous arbitration module existing in a branch destination of the asynchronous branching module and storing the congestion information on the plurality of branch destinations of the asynchronous branching module into a congestion information storage memory, and a process of making the asynchronous branching module preferentially select, as a transfer branch destination, a branch destination which does not generate congestion information indicative of the presence of congestion among branch destinations leading to a destination on the basis of the congestion information and destination information of the transfer data.