Patent ID: 8174636

Claim:
A thin film transistor (TFT) substrate assembly comprising: a substrate; a plurality of gate lines disposed on the substrate; a plurality of data lines orthogonal to the gate lines, the plurality of gate lines and the plurality of data lines defining a plurality of pixel regions; each pixel region comprising a first TFT, a second TFT, a first pixel electrode, and a second pixel electrode, a gate electrode of the first TFT and a gate electrode of the second TFT in one pixel region being electrically connected with a same corresponding gate line from the plurality of gate lines, wherein the first pixel electrode is electrically connected with a drain electrode of the first TFT, the second pixel electrode is electrically connected with a drain electrode of the second TFT, a source electrode of the first TFT is directly electrically connected with a corresponding data line from the plurality of data lines, a source electrode of the second TFT is electrically connected with the corresponding data line from the plurality of data lines via a voltage dividing element, and the voltage dividing element is a coupling capacitor.