Patent ID: 8878755

Claim:
An organic light emitting diode (OLED) display, comprising: a plurality of scan lines and a plurality of data lines crossing over the plurality of scan lines to define a plurality of pixels in a matrix form, each pixel electrically connected to a corresponding scan line and a corresponding data line and having an OLED; a scan driver electrically connected to the plurality of scan lines and configured to provide a plurality of scan signals, wherein each scan signal is characterized with a waveform having a compensation duration and a scan duration immediately following the compensation duration, wherein the waveform in the compensation duration has a first voltage level and a second voltage level periodically and alternate varied from one another defining a period, and the waveform in the scan duration has the first voltage level, wherein the period is equal to the scan duration that is shorter than the compensation duration; and a data driver electrically connected to the plurality of data lines and configured to provide a plurality of data signals associated with an image to be displayed; and wherein in operation, the scan driver sequentially applies the plurality of scan signals to the plurality of scan lines and the data driver simultaneously applies the plurality of data signals to the plurality of data lines, respectively, such that during the compensation duration of a scan signal, the pixels of a corresponding pixel row connected to the scan line to which the scan signal is applied are charged for compensation, while during the scan duration of the scan signal, the plurality of data signals is written into the pixels of the corresponding pixel row for driving the OLEDs thereof, wherein each pixel further comprises: a driving transistor having a gate, a source electrically coupled to the OLED, and a drain; a first transistor having a gate electrically connected to the corresponding scan line to the pixel, a source electrically coupled to the gate of the driving transistor, and a drain electrically coupled to the corresponding data line to the pixel; a second transistor having a gate, a source electrically coupled to the drain of the driving transistor, and a drain electrically coupled to a corresponding power line; a third transistor having a gate, a source electrically coupled to the source of the driving transistor, and a drain electrically coupled to a low voltage source; a storage capacitor electrically coupled between the gate of the driving transistor and the source of the driving transistor; and a compensation capacitor electrically coupled between the drain of the second transistor and the source of the driving transistor.