Patent ID: 7078968

Claim:
A step gain-variable CMOS amplifier comprising: a pair of input MOS transistors connected together at a common source node and having a first type of conductivity; a bias current generator connected between the common source node of said pair of input MOS transistors and a voltage reference; a pair of first load MOS transistors having the first type of conductivity, and each first load MOS transistor connected between a supply voltage node and a drain node of a respective input MOS transistor; a plurality of pairs of second load MOS transistors connectable in parallel to said pair of first load MOS transistors for incrementing an effective width of resultant transistors formed by said pairs of first and second load MOS transistors connected in parallel; and a plurality of pairs of path selection switches connected between the supply voltage node and said pairs of first and second load MOS transistors for connecting at least some of said pairs of first and second load MOS transistors in parallel by closing respective pairs of path selection switches.