Patent ID: 8767408

Claim:
A vertically stacked integrated array, comprising: a substrate having a first surface and a second surface, the second surface opposite the first surface; a first passive component coupled to the first surface; a support component coupled to the second surface and suitable for mechanical attachment to a host printed circuit board (PCB) such that the support component substantially supports the vertically stacked integrated array on the host PCB, wherein the support component comprises a first discrete terminal and a second discrete terminal, the first discrete terminal configured to electrically couple the support component to an external circuit arranged on the host PCB; edge plating disposed along a first edge and a second edge of the substrate, the edge plating electrically coupling the first passive component to the second discrete terminal; a second passive component encapsulated within the substrate, the second passive component disposed between the first edge and the second edge of the substrate; and an electrically conductive pathway disposed substantially within the substrate, the electrically conductive pathway electrically coupling the second passive component to the support component.