Patent ID: 7759214

Claim:
A method for manufacturing a semiconductor device including an STI, the method comprising: sequentially forming a pad oxide layer, a nitride layer, and a TEOS (tetra ethyl ortho silicate) layer on a substrate; forming photosensitive layer patterns on the TEOS layer for forming a device isolation region; sequentially dry-etching the TEOS layer, the nitride layer, and the pad oxide layer using the photosensitive layer patterns as a mask; removing the photosensitive layer patterns; dry-etching the substrate using the etched TEOS layer, the etched nitride layer, and the etched pad oxide layer as a mask to form a trench after removing the photosensitive layer pattern; pullback-etching a portion of the pad oxide layer by performing a post cleaning on an inside of the trench; pullback-etching a portion of the etched nitride layer by a first wet etching; pullback-etching a portion of the etched TEOS layer by a second wet etching, wherein the post cleaning on the inside of the trench, the first wet etching, and the second wet etching are performed in separate step; and dry-etching a portion of an upper corner of the trench of the substrate using the pullback-etched TEOS layer, the pullback-etched nitride layer, and the pullback-etched pad oxide layer as a mask.