Patent ID: 7879698

Claim:
A thin film transistor fabrication method, comprising: disposing a first substrate into a first processing chamber, the first substrate having a gate electrode disposed thereon; depositing a gate dielectric layer over the first substrate using a plasma enhanced chemical vapor deposition process; withdrawing the first substrate from the first processing chamber into a transfer chamber coupled thereto; disposing the first substrate into a second processing chamber coupled with the transfer chamber; depositing a semiconductor layer over the gate dielectric layer by a physical vapor deposition process, the physical vapor deposition process comprising reacting oxygen and nitrogen with one or more elements selected from the group consisting of zinc, tin, gallium, cadmium, and indium; withdrawing the first substrate from the second processing chamber into the transfer chamber; disposing the first substrate into a third processing chamber coupled with the transfer chamber; and depositing an etch stop layer on the semiconductor layer using a plasma enhanced chemical vapor deposition process.