Patent ID: 7042908

Claim:
A synchronizer for mapping an electrical digital signal of arbitrary transmission rate for transport over a network characterized by a set of allowable transmission rates, said arbitrary transmission rate not being restricted to said set of allowable transmission rates, said synchronizer comprising: a) an input for receiving the electrical digital signal; b) a data recovery unit coupled to said input, said data recovery unit operative to recover from the electrical digital signal a stream of data bits and a first data clock signal indicative of the arbitrary transmission rate; c) a clock generator unit coupled to said data recovery unit, said clock generator including a first input for receiving the first data clock signal and a second input for receiving a control signal, said clock generator unit being operative to multiply a frequency of the first data clock signal by a value indicated by the control signal for generating a second data clock signal, the second data clock signal being indicative of a line transmission rate that falls within the set of allowable transmission rates for the network; d) a mapping unit in communication with said dock generator unit for receiving the second data clock signal, said mapping unit being operative for mapping the stream of data bits into at least one frame at a line transmission rate indicated by the second data clock signal; and e) an output for releasing the at least one frame from said synchronizer for transmission over the network.