Patent ID: 8134200

Claim:
A nonvolatile semiconductor memory comprising: a memory cell including: an element region partitioned by an isolation region in a semiconductor substrate; a first gate insulating film contacting to the element region; a charge storage layer contacting to the first gate insulating film; a multilayer insulator contacting to the charge storage layer; and a control gate electrode contacting to the multilayer insulator, the first gate insulating film including: a first tunnel film; a first high-dielectric-constant film contacting to the first tunnel film and having a greater dielectric constant than the first tunnel film; and a second tunnel film contacting to the first high-dielectric-constant film and having the same configuration as that of the first tunnel film, the multilayer insulator including: a first insulating film; a second high-dielectric-constant film contacting to the first insulating film and having a greater dielectric constant than the first insulating film; and a second insulating film contacting to the second high-dielectric-constant film and having the same configuration as that of the first insulating film, wherein a dielectric constant of the second high-dielectric-constant film is greater than a dielectric constant of the first high-dielectric-constant film, wherein a thickness of the first tunnel film is smaller than a thickness of the first insulating film, a thickness of the second tunnel film is smaller than a thickness of the second insulating film, and a thickness of the first high-dielectric-constant film is smaller than a thickness of the second high-dielectric-constant film.