Patent ID: 8377774

Claim:
A method of manufacturing a split gate-type non-volatile semiconductor memory device which comprises a floating gate and a control gate, said method comprising: forming a polysilicon film for said floating gate over a substrate through a first insulating film; forming a second insulating film over said polysilicon film; forming a resist mask on said second insulating film; forming a first opening such that a lower portion of said first opening becomes narrower, by etching said second insulating film by using said resist mask; filling said first opening with a third insulating film; removing said second insulating film to form a second opening such that a lower portion of said second opening becomes wider; etching a portion of said polysilicon film exposed by said second opening to form an inclined portion; forming a fourth insulating film over said second opening and said third insulating film; etching back said fourth insulating film to form spacers with side walls inclined into a direction of a region where a source line is formed; removing said third insulating film to form a third opening; etching said polysilicon film in said third opening by using said spacers as a mask, to form said floating gate; exposing said substrate below said third opening; forming a fifth insulating film to cover said substrate, said floating gate and said side walls; and forming said control gate over said fifth insulating film.