Patent ID: 6892339

Claim:
A modem apparatus comprising: an analog interface for interfacing to a communication line; a digital signal processor coupled to the analog interface, the digital signal processor being coupled performs frequency domain equalization (FEQ) operations, time domain equalization (TEQ) operations, fast fourier transform (FFT) operations, inverse fast fourier transform (iFFT) operations, and encoding/decoding operations on a serial stream of data provided through the analog interface, the digital signal processor having an output; a data bus coupled to the output of the digital signal processor; and a host central processing unit (CPU) coupled to the data bus for receiving packets of data from the digital signal processor, the host CPU performing error correction operations on the data within the packets of data, wherein at least one operation performed by one of the digital signal processor and the host CPU can be dynamically reassigned to a different one of the digitial signal processor and the host CPU.