Patent ID: 8198187

Claim:
A manufacturing method of a semiconductor device, the semiconductor device having a plurality of insulation layers and a plurality of wiring layers alternately stacked on a semiconductor substrate and at least one via part, said plurality of insulation layers including at least a first insulation layer and a second insulation layer, the second insulation layer being located above the first insulation layer, said plurality of wiring layers including at least a first wiring layer and a second wiring layer, the first wiring layer being provided between the first and second insulation layers, the second wiring layer being provided on the second insulation layer, the first wiring layer having a wiring line, the at least one via part including a first via part providing electrical conduction between the first and second wiring layers, the manufacturing method comprising: preparing the semiconductor substrate; preparing a mask that has a weak exposure part and a strong exposure part; providing the first insulation layer; providing the first wiring layer on the first insulation layer; providing the second insulation layer on the first wiring layer such that an upper surface of the second insulation layer has at least one protuberance; placing the mask over the second insulation layer such that the weak exposure part is positioned above an arrangement position of the wiring line of the first wiring layer, and the strong exposure part is positioned above an arrangement position of the first via part; exposing the second insulation layer via the mask such that first portions of the second insulation layer are exposed through the weak exposure part of the mask and second portions of the second insulation layer are exposed through the strong exposure part of the mask; developing the second insulation layer to remove the at least one protuberance, thereby flattening the upper surface of the second insulation layer except for the second portions of the second insulation layer; providing the first via part; and forming the second wiring layer on the second insulation layer.