Patent ID: 7829381

Claim:
A method of manufacturing a semiconductor device comprising the steps of (1) applying an underfill composition to a surface of a silicon wafer on which surface solder bumps for flip chip bonding are provided and, then, bringing the underfill composition into a B-stage, (2) dicing the silicon wafer into chips, (3) positioning the chip with a site on a substrate where the chip is to be bonded, and (4) bonding the chip to the substrate by melting the solder bumps, characterized in that the underfill composition consists of a first underfill composition and a second underfill composition, the step (1) comprises the steps of (i) applying the first underfill composition on the surface of the silicon wafer and then bringing the applied first underfill composition into a B-stage to form a layer of the first underfill composition having a thickness ranging from 0.5 to 1.0 time the height of the solder bump, and (ii) applying the second underfill composition on the B-stage first underfill composition layer and bringing the applied second underfill composition into a B-stage to form a layer wherein a total thickness of the B-stage first underfill composition and the B-stage second underfill composition ranges from 1.0 to 1.3 times the height of the solder bump, and that the first underfill composition comprises an epoxy resin and a filler, the filler being in an amount of from 30 to 85 wt % of a solid content of the first underfill composition, and the second underfill composition comprises an epoxy resin, a flux and/or a curing agent functioning also as a flux.