Patent ID: 7776738

Claim:
A method for fabricating a storage electrode of a semiconductor device comprising: forming an interlayer dielectric film including a storage node contact over a semiconductor substrate; forming an etching blocking layer on the interlayer dielectric film, thereby covering the interlayer dielectric film and the storage node contact; forming a mold insulating layer on the etching blocking layer, the mold insulating layer comprising sequentially deposited phospho-silicate glass (PSG) and high density plasma (HDP) oxide; forming a hard mask layer on the mold insulating layer; forming an opening in the resulting structure, thereby exposing the surface of the storage node contact; etching the mold insulating layer exposed through the opening to form a variable-profile storage electrode pattern; and forming a storage electrode along the surface of the variable-profile storage electrode pattern; wherein the step of forming the mold insulating layer comprises: forming a first mold layer comprising phospho-silicate glass (PSG) having a first concentration of phosphorus (P); forming a second mold layer comprising high density plasma (HDP) oxide; forming a third mold layer comprising phospho-silicate glass (PSG) having a second concentration of phosphorus (P); and forming a fourth mold layer comprising high density plasma (HDP) oxide; wherein the first concentration of phosphorous (P) is higher than the second concentration of phosphorous (P).