Patent ID: 7381988

Claim:
An array substrate for a flat panel display, comprising: a substrate; a plurality of gate lines on the substrate, each of the gate lines including gate electrodes and gate extension lines; a plurality of data lines crossing the gate lines to form a plurality of pixel regions, wherein the pixel regions further include a first insulating layer, an a-Si layer, an ohmic contact layer, and second insulating layer; and a thin film transistor having the gate electrode, source and drain electrodes formed of the same material as the data lines, and a channel formed of the a-Si layer in each of the pixel regions; a pixel electrode electrically connected to the drain electrode of the thin film transistor in each of the pixel regions, wherein each of the pixel regions further includes first and second storage capacitor structures, and wherein the first storage capacitor structure includes the first insulating layer, the a-Si layer, the ohmic contact layer, and a metal layer formed of the same material as the data line between one of the gate lines and the pixel electrode, and the second storage capacitor structure includes the first insulating layer, the a-Si layer, and the second insulating layer between one of the gate extension lines and the pixel electrode.