Patent ID: 8198134

Claim:
A method of making an integrated transistor module comprising: providing a planar lead frame having first and second spaced pads, one or more common source-drain leads located between said pads and one or more drain leads located on the outside of said second pad; flip chip attaching first and second transistors respectively to said first and second pads, each transistor having source, gate and drain electrodes, wherein the source of said second transistor is electrically connected to said one or more common source-drain leads; attaching a first clip to the drain of said first transistor and electrically connecting said first clip to said one or more common source-drain leads, said first clip having a planar member; attaching a second clip to the drain of said second transistor and electrically connecting said second clip to said one or more drain leads located on the outside of said second pad, said second clip having a planar member; and partially encapsulating in molding material said planar lead frame, said transistors, and said clips with a portion of bottom surfaces of each of said first and second pads and said planar members of said clips being exposed to provide dual cooling of said integrated transistor module.