Patent ID: 7307888

Claim:
A method of operating a nonvolatile memory array storing data as charge storage states, the nonvolatile memory array including nonvolatile memory cells arranged in rows and columns, each of the nonvolatile memory cells including a first and a second current carrying node in a substrate region, and including a charge storage structure, and one or more dielectric structures at least partly between the charge storage structure and a source of gate voltage and at least partly between the substrate region and the charge storage structure, the method comprising: applying a read bias arrangement to determine a charge storage state stored in at least one particular nonvolatile memory cell of the nonvolatile memory array, including: applying a word line bias to a word line providing a gate voltage to nonvolatile memory cells in a row corresponding to the word line; and applying a bit line bias to a bit line electrically connected to the first current carrying nodes of nonvolatile memory cells in a first column adjacent to the bit line and electrically connected to the second current carrying nodes of nonvolatile memory cells in a second column adjacent to the bit line; and measuring current flowing between the substrate region and the bit line to determine the charge storage state, said current transiting said at least one particular nonvolatile memory cell without passing between the bit line and another bit line electrically connected to said at least one particular nonvolatile memory cell, said bit line and said another bit line each having controlled adjustable voltages.