Patent ID: 7870430

Claim:
A method, comprising: providing an integrated circuit having a plurality of debug resources usable exclusively for debug operations, wherein the debug operations comprise operations directed by debug software executed by the integrated circuit and operations directed by external debug hardware which is external to the integrated circuit; enabling availability of a first portion of the debug resources for use by the debug software, wherein a second portion of the plurality of debug resources are committed for exclusive use by the external debug hardware, and wherein the first portion is exclusive of the second portion; and performing operations directed by the debug software using at least one debug resource of the first portion of the debug resources and operations directed by the external debug hardware using at least one debug resource of the second portion of the debug resources, wherein: the step of providing is further characterized by the debug resources comprising fields of a plurality of debug registers and by the integrated circuit having a control register, wherein the control register identifies uses of the debug resources; the step of enabling is further characterized by loading the control register in response to the external debug hardware to identify the first portion and the second portion; and setting fields of a first debug register of the plurality of debug registers in response to the debug software based on the loading of the control register; and wherein the step of enabling is further characterized as masking a first set of fields of the first debug register in response to the control register so that the first set of fields is non-responsive to the debug software.