Patent ID: 8421829

Claim:
A device for controlling a display panel on which a plurality of data lines and a plurality of scanning lines are arranged in a matrix, the device comprising: a first generator for generating an original clock signal; a memory for storing display data received from an external device; a gradation processor to receive the display data from the memory; a first register for setting a division ratio of the original clock signal and a number of active lines of the display panel, all of which being received from the external device; a second register for setting a gradation palette data, and for reading the display data, to convert the display data into a PWM signal for each of red, green and blue data with the gradation processor; a second generator for dividing the original clock signal by the division ratio to generate a reference clock, to thereby generate a line pulse synchronized with the scanning period and a frame pulse synchronized with a frame period; and a data line driver for reading out the PWM signal from the gradation processor, for converting the PWM signal into a driving voltage to be provided to the display panel, wherein the gradation processor reads out the display data line by line from an address on the memory according to the line pulse, the address corresponding to a top line of the display panel, and repeats the readout of the display data by using the address corresponding to the top line of the display panel according to the frame pulse.