Patent ID: 7936064

Claim:
A semiconductor device, comprising: an electrode pad; a passivation layer overlapping with a first part of the electrode pad and having an opening which overlaps with a second part of the electrode pad, a first surface of the passivation layer facing a semiconductor layer, and a second surface of the passivation layer being opposite to the first surface of the passivation layer, the passivation layer having a level difference, the level difference being on the second surface of the passivation layer and corresponding to a shape of the electrode pad; the semiconductor layer having a first region and a second region, the first region being defined in a first range inward from a first line extending vertically downward from an edge of the electrode pad, and the second region having a width corresponding to a thickness of the passivation layer outward from the first line; a first inter layer dielectric positioned between the electrode pad and the semiconductor layer, a first surface of the first inter layer dielectric facing to the semiconductor layer, and a second surface of the first inter layer dielectric being opposite to the first surface of the first inter layer dielectric; a conductive layer positioned on the second surface of the first inter layer dielectric, the conductive layer having a first portion and a second portion, the second portion being connected with the first portion at a connection section, the connection section being positioned entirely outside of the second region, the first portion having a first width, and the second portion having a second width that is smaller than the first width; and a second inter layer dielectric positioned between the electrode pad and the conductive layer, the electrode pad being formed on a first surface of the second inter layer dielectric, the electrode pad having a rectangular shape when viewed from a direction perpendicular to the first surface of the second inter layer dielectric, the rectangular shape of the electrode pad having a short side and a long side, and the second region of the semiconductor layer being defined outward from a third line extending vertically downward from the short side of the electrode pad.