Patent ID: 8860469

Claim:
An integrated circuit comprising: a transmitter buffer circuit comprising a current source that drives current through a first node, a first transistor having a source coupled to the first node, a gate that receives a first single-ended clocked data signal of a differential data input, and a drain that is connected to a first differential output node, wherein the first transistor is turned off while in an output swing calibration mode due to the differential data input having a fixed data input value while in the output swing calibration mode, a second transistor having a source coupled to the first node, a gate that receives a second single-ended clocked data signal of the differential data input, and a drain that is connected to a second differential output node, wherein the second transistor is turned on while in the output swing calibration mode due to the differential data input having the fixed data input value while in the output swing calibration mode, a first resistor having a first end connected to a second node and a second end connected to the first differential output node, and a second resistor having a first end connected to the second node and a second end connected to the second differential output node; a first switch having first and second ends, wherein the first end of the first switch is connected to the first end of the second resistor, and the first switch is closed during the output swing calibration mode and open during the operating mode; a second switch having first and second ends, wherein the first end of the second switch is connected to the second end of the second resistor, and the second switch is closed during the output swing calibration mode and open during an operating mode; calibration logic and control circuitry that provides the fixed data input value to the transmitter buffer circuit and calibrates an output swing of the transmitter buffer circuit during the output swing calibration mode based on a measured voltage difference across the second resistor that is communicated by way of the first and second switches, wherein the output swing of the transmitter buffer circuit is adjusted by at least varying a current of the current source in the transmitter buffer circuit.