Patent ID: 6967381

Claim:
A semiconductor device, comprising: a first and a second logic circuit each having a function of inverting a respective input and being directly or indirectly connected in a cascade arrangement; a signal processing circuit having a gate input portion connected to the second logic circuit; a signal input terminal for supplying a signal applied from outside to the first logic circuit; a power source line capable of supplying a signal applied from outside to the first and second logic circuits and to the signal processing circuit; a ground line capable of supplying a signal applied from outside to the first and second logic circuits and to the signal processing circuit; a first input protection circuit guiding positive electrostatic discharges, which are applied from outside to the signal input terminal, to the power source line; a second input protection circuit guiding negative electrostatic discharges, which are applied from outside to the signal input terminal, to the ground line; and an internal protection circuit interposed on a connection between an output portion of the second logic circuit and the gate input portion of the signal processing circuit and having a path capable of guiding the positive electrostatic discharges, which are guided to the power source line by the first input protection circuit and derived from the power source line through the second logic circuit to the connection, to the ground line.