Patent ID: 7988803

Claim:
A method for joining substrates which is used for manufacturing a chip size package formed in a way that a semiconductor substrate with plural elements formed thereon and a sealing substrate for individually sealing said elements are joined together and diced into a plurality of said chip size packages having said individual sealed element, comprising steps of: (a) supplying a semiconductor substrate; (b) supplying a sealing substrate; (c) supplying an elastic transcribing sheet on which adhesive is coated; (d) pressurizing together a joint surface of said transcribing sheet coated with said adhesive and a joint surface of said sealing substrate; (e) peeling said transcribing sheet from one end of said sealing substrate with maintaining a constant curvature so as to form a layer of said adhesive on said sealing substrate; (f) adjusting parallelism of said joint surfaces of said semiconductor substrate and said sealing substrate; (g) adjusting positions of said semiconductor substrate and said sealing substrate; and (h) joining said semiconductor substrate and said sealing substrate which positions have been adjusted.