Patent ID: 7281009

Claim:
A data processing apparatus for simultaneously sorting a plurality of n input data words into a sorted list of m list entries comprising: a pre-sorting network receiving said n input data words and generating n outputs in a single clock cycle, said pre-sorting network including: a set of n(n−1)/2 comparators wherein n=2 or more, each comparator receiving a unique pair of said n input data words and generating a comparison output indicating which of said pair of input data words is greatest, said set of comparators together simultaneously comparing all unique pairs of said n input data words, a set of n multiplexers, each multiplexer having n inputs receiving said n input data words and an output of a selected one of said n input data words, and a decoder circuit receiving said comparison output of said n(n−1)/2 comparators and generating control signals to control said selected output of each multiplexer whereby said output of said multiplexers correspond to said n input data words sorted from greatest to least; a sorting network storing up to m list entries in said single clock cycle and receiving the sorted n input data words and storing respective input data words into said m list entries.