Patent ID: 7865679

Claim:
A memory subsystem for use in a system, the memory subsystem comprising volatile memory and nonvolatile memory, the memory subsystem further comprising: logic to interrupt a power down save operation of the memory subsystem upon detection of a restoration of system power, and to enable use of the memory subsystem by the system if sufficient nonvolatile memory capacity of the memory subsystem is available to backup an amount of the volatile memory capacity of the memory subsystem; logic to erase sufficient dirty nonvolatile memory to backup the amount of volatile memory capacity before enabling use of the memory subsystem by the system, and in the event that external system power fails before enabling use of the memory subsystem, to backup at least portions of the volatile memory having data corresponding to data erased from the nonvolatile memory; and the logic to backup at least portions of the volatile memory having data corresponding to data erased from the nonvolatile memory further comprises logic to burst refresh the volatile memory for a time at least equal to a worst-case nonvolatile page preparation time, to place the volatile memory into a lower than fully operational power state while a new nonvolatile memory page is prepared and written, and to restore the volatile memory to a fully operational power state after the new nonvolatile memory page is prepared and written.