Patent ID: 7714758

Claim:
An integrated circuit comprising: an operational amplifier having a first input terminal, a second input terminal, and an output terminal; a first capacitor having a first terminal and a second terminal, the second terminal of the first capacitor connected to the first input terminal of the operational amplifier; a plurality of second capacitors each having a first terminal and a second terminal, the second terminal of each of the second capacitors connected to the second input terminal of the operational amplifier; a switching circuit comprising a plurality of switches configured to switch in response to a plurality of switching signals; and a selection circuit configured to select at least two selection voltages from a plurality of divided voltages in response to a first digital signal and provide the selected voltages as at least two selection voltages, the selection circuit including at least two decoders such that each of the decoders is configured to receive a portion of the plurality of divided voltages and select at least one of the at least two selection voltages, wherein, the switching circuit is configured to transmit a reference voltage to the first terminal of the first capacitor and the first terminals of the second capacitors and connect the first input terminal of the operational amplifier to the output terminal of the operational amplifier during a first period, and the switching circuit is configured to isolate the first terminal of the first capacitor from the reference voltage, transmit a voltage selected from the at least two selection voltages to the first terminals of the second capacitors, and connect the first terminal of the first capacitor to the output terminal of the operational amplifier during a second period.