Patent ID: 8896086

Claim:
A system for generating a tamper detection signal indicating tampering with one or more circuits of an integrated circuit (IC), comprising: a tamper detection module for generating a plurality of serial bit-streams based on a predetermined algorithm; and a plurality of pairs of wires connected to the tamper detection module and placed at a predefined distance from the one or more circuits, wherein first terminals of first and second wires of a first pair of the plurality of pairs of wires are connected to first and second output terminals of the tamper detection module, respectively, for receiving first and second serial bit-streams of the plurality of bit-streams, respectively, wherein second terminals of the first and second wires are connected to first and second input terminals of the tamper detection module, respectively, for providing third and fourth serial bit-streams to the tamper detection module, and wherein the tamper detection module compares the first serial bit-stream with the third serial bit-stream and the second serial bit-stream with the fourth serial bit-stream and generates the tamper detection signal.