Patent ID: 8173517

Claim:
A method of forming a microelectronic structure, the method comprising: forming a dielectric over an oxide partially underlying segments of an insulative material; selectively removing the dielectric to form a plurality of spacers upon the oxide and in contact with exposed lateral portions of the insulative material segments; forming a plurality of isolation trenches extending below the oxide into an underlying semiconductor substrate, each isolation trench having edges at a top thereof adjacent to and below a pair of spacers; filling each isolation trench with an insulation film which extends over the plurality of spacers, the oxide, and the insulative material segments; removing portions of the insulation film overlying the segments of the insulative material, portions of the insulative material segments and spacers to form therefrom an upper surface co-planar with upper surfaces of adjacent insulative material segments; densifying the insulation film; removing the insulative material segments and portions of the oxide partially underlying the insulative material segments such that the insulation film and the pair of spacers form a microelectronic structure filling each said isolation trench, extending horizontally away from each said isolation trench upon remaining portions of the oxide, and sidewalls of the microelectronic structure initiate on an upper surface of the oxide and are substantially perpendicular to the upper surface of the microelectronic structure; and enhancing electron conductivity of an active area beneath horizontal portions of the microelectronic structure.