Patent ID: 7655522

Claim:
A method of fabricating a metal oxide semiconductor (MOS) transistor, comprising: forming an isolation layer in a semiconductor substrate to define an active region; forming a buffer layer pattern that exposes edge regions of the active region and covers a central region between the edge regions of the active region along a first side of the active region and a second side opposite to the first side when viewed from a plan view, a first direction defined as being parallel to the first and second sides; forming a mask pattern on the semiconductor substrate having the buffer layer pattern, the mask pattern having an opening that exposes a predetermined region of the buffer layer pattern on the active region and the edge regions of the active region on both sides of the predetermined region of the buffer layer pattern; and forming a channel recess in the active region by etching the buffer layer pattern and the active region using the mask pattern as an etch mask, the channel recess having a convex surface, which is a center portion of the channel recess, such that an apex of the convex surface is upwardly directed to the buffer layer pattern when viewed from a cross-sectional view taken along a second direction that is different from the first direction, wherein the convex surface protrudes from a bulk of the semiconductor substrate to a surface of the semiconductor substrate.