Patent ID: 7605019

Claim:
A method for manufacturing a semiconductor device with stacked chips, the method comprising: providing a first semiconductor wafer with a first upper side and a first bottom side opposite to the first upper side, the first semiconductor wafer including first contact pads on the first upper side; providing a second semiconductor wafer with a second upper side and a second bottom side opposite to the second upper side, the second semiconductor wafer including second contact pads on the second upper side and having a thickness; forming through-holes into the second semiconductor wafer extending from the second upper side in an area of the second contact pads to the second bottom side; arranging tower contact bumps on the first contact pads, the tower contact pads having a diameter less than a diameter of the through-holes; stacking the second semiconductor wafer on the first semiconductor wafer wherein the second bottom side and the first upper side are relatively moved to each other and wherein the tower contact bumps are inserted into the through-holes; and electrically connecting the tower contact bumps with the second contact pads; wherein the second bottom side is provided with an adhesive layer thereby bonding the second bottom side on the first upper side when stacking and the second upper side is covered with a photosensitive dielectric coating after stacking thereby filling the space between the tower contact bumps and the walls of the through-holes with the photosensitive dielectric coating.