Patent ID: 7010641

Claim:
A method for routing an integrated circuit signal bus, comprising: selecting a primary block from a plurality of blocks, each of the blocks having a plurality of ports to be connected to the signal bus, the remainder of the plurality of blocks being secondary blocks; positioning the plurality of ports of the primary block so that no two ports of the primary block reside with a single routing track running parallel to the portion of a primary bus route residing closest to the primary block; positioning the plurality of ports of each secondary block so that no two ports within each secondary block reside within a single routing track running perpendicular to the portion of the primary bus route residing closest to that secondary block; for each port of the primary block, placing a primary connection over that port parallel to the primary bus route, each primary connection running substantially the length of the primary bus route; and for each port of each secondary block, placing a secondary connection extending orthogonally from one of the primary connections to that port.