Patent ID: 7379327

Claim:
A magnetic memory comprising: a plurality of magnetic storage cells in an array, each of the plurality of magnetic storage cells including at least one magnetic element, the at least one magnetic element being programmable by at least one write current driven through the magnetic element, each of the at least one magnetic element having at least one free layer, a dominant spacer, and at least one pinned layer, the plurality of magnetic storage cells having a maximum high resistance state read current, a maximum low resistance state read current, a minimum high resistance state write current, and a minimum low resistance state write current, the plurality of magnetic storage cells being read by at least one read current, a plurality of bit lines corresponding to the plurality of magnetic storage cells; and a plurality of source lines corresponding to the plurality of magnetic storage cells; wherein the plurality of magnetic storage cells, the plurality of source lines and the plurality of bit lines are configured such that at least one of the at least one read current flows from the at least one free layer to the dominant spacer if the maximum low resistance state read current divided by the minimum high resistance state write current is greater than the maximum high resistance state read current divided by the minimum low resistance state write current and the at least one read current flows from the dominant spacer to the at least one free layer if the maximum low resistance state read current divided by the minimum high resistance state write current is less than the maximum high resistance state read current divided by the minimum low resistance state write current.