Patent ID: 7528067

Claim:
A method of fabricating a metal oxide semiconductor field effect transistor (MOSFET) structure comprising: providing at least one metal oxide semiconductor field effect transistor comprising at least a gate conductor having a gate edge on a surface of a Si-containing substrate, said gate edge including at least a Si 3 N 4 wide spacer; forming an outer silicide contact aligned to an outer edge of said Si 3 N 4 wide spacer, said forming said outer silicide contact comprises sputtering a metal capable of forming said outer silicide contact on an exposed surface of said Si-containing substrate adjacent to said Si 3 N 4 wide spacer, first annealing at a temperature from about 300° to about 600° C. to form said outer silicide contact, etching unreacted metal and second annealing at a temperature from about 600° to about 800° C., wherein said first anneal and said second anneal are performed in He, Ar, N 2 or a forming gas ambient; removing said Si 3 N 4 wide spacer to expose a portion of said Si-containing substrate adjacent to said at least one metal oxide semiconductor field effect transistor; and forming an inner silicide contact in said exposed portion of said Si-containing substrate adjacent to said at least one metal oxide semiconductor field effect transistor, said forming said inner silicide constant comprises sputtering a metal capable of forming said inner silicide contact on an exposed surface of said Si-containing substrate adjacent to said at least one metal oxide semiconductor field effect transistor, third annealing at a temperature from about 300° to about 600° C. to form said inner silicide contact, etching unreacted metal and fourth annealing at a temperature from about 600° to about 800° C., wherein said third anneal and said fourth anneal are performed in He, Ar, N 2 or a forming gas ambient and, wherein said inner suicide contact has an edge aligned to the gate edge, said outer silicide contact has a thickness from about 10 to about 40 nm which thickness is greater than the inner silicide contact, said outer silicide contact has a resistivity of about 20 ohm/square or less which resisitivty is lower than the resistivity of the inner silicide contact and said inner and said outer contacts are selected from a silicide of Ni, Co or Pt.