Patent ID: 8713231

Claim:
An interface circuit comprising: a first input terminal to which a single-ended signal and a differential signal are transmitted through an external first transmission path; a second input terminal to which a differential signal is transmitted through an external second transmission path; a single-ended signal receiver and a differential signal receiver which are connected to the first input terminal by wires, and to which the single-ended signal and the differential signal input from the first input terminal are supplied in parallel; a detection circuit that is connected to the second input terminal by wires and is operable to detect input of the differential signal thereto from the second input terminal; and a controller operable, when the detection circuit detects the input of the differential signal thereto from the second input terminal, to start constantly outputting an enable signal to the differential signal receiver, wherein when the detection circuit detects the input of the differential signal thereto from the second input terminal while the differential signal receiver is in an inactive state, the detection circuit activates the differential signal receiver, and the differential signal receiver remains in an active state while the enable signal is being input thereto.