Patent ID: 8391058

Claim:
A flash-RAM memory comprising: non-volatile random access memory (RAM) including an array of magnetic memory cells and organized into at least two stacks of magnetic memory cells, each stack separated from another stack by a dielectric layer, the non-volatile RAM formed on a monolithic die, each of the magnetic memory cells of the non-volatile RAM including a magnetic tunnel junction (MTJ) made of a pinning layer on top of which is formed a fixed layer, on top of which is formed a tunnel layer, on top of which is formed a free layer; a non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory being made of non-magnetic memory, the non-volatile page-mode memory and the non-volatile RAM residing on the same monolithic die, the non-volatile page-mode memory being operative to store data for reading; and a plurality of transistors, isolated in a silicon area of the monolithic die, that is shared by the non-volatile RAM and the non-volatile page-mode memory, a single transistor of the plurality of transistors used to access a magnetic memory cell of the flash-RAM and a single transistor of the plurality of transistors used to access a page of the non-volatile page-mode memory, the page being of variable size, wherein data is read, written and erased a page at a time to the non-volatile page-mode memory, with a page comprising a plurality of bits, whereas, the non-volatile page-mode memory is written to and read from one bit at a time.