Patent ID: 8105859

Claim:
A method for fabricating a phase change memory device including a plurality of in via phase change memory cells, the method comprising: depositing a conductive layer on an upper surface and a contact surface of a substrate corresponding to each of an array of conductive contacts to be connected to access circuitry; etching, using a photo resist layer, the conductive layer to form pillar heaters along the contact surface corresponding to each of the array of conductive contacts; forming a dielectric layer along exposed areas of the substrate surrounding the pillar heaters; forming a first cap layer on the dielectric layer; forming an interlevel dielectric (ILD) layer on the first cap layer; etching a via into the dielectric layer, each via corresponding to each of pillar heater such that an upper surface of each pillar heater is exposed within each via; recessing each pillar heater; depositing phase change material in each via on each recessed pillar heater; recessing the phase change material within each via; forming a top electrode within the via on the phase change material; forming a second cap layer on the top electrode; and etching the second cap layer to expose an upper surface of each top electrode and forming a top electrode connection layer over the exposed upper surface of each top electrode and the second cap layer.