Patent ID: 7579651

Claim:
A semiconductor device comprising: a semiconductor layer; a drain region and a source region, which are formed in the semiconductor layer; a channel region positioned between the drain region and the source region; a back gate region in which the channel region is positioned; a gate oxide film formed on the semiconductor layer; and a gate electrode formed on the gate oxide film, wherein the drain region is formed in the back gate region and an impurity concentration of the back gate region near an upper surface of the back gate region is lower than an impurity concentration of an area of the back gate region that is further from the upper surface, the drain region has a peak impurity concentration, wherein a peak impurity concentration region of the drain region is closer to the upper surface of the back gate region than a peak impurity concentration region of the back gate region, the drain region has a slope with respect to a surface of the semiconductor layer, and an angle formed by a tangent line of the slope and the surface of the semiconductor layer adjacent to the gate oxide film is less than 90 degrees and continuously gets smaller toward the surface of the semiconductor layer.