Patent ID: 8354283

Claim:
A method of making a semiconductor chip assembly, comprising: providing a bump, a ledge, a first adhesive and a first conductive layer, wherein the bump defines a cavity that faces in a first vertical direction, covers the cavity in a second vertical direction opposite the first vertical direction, is adjacent to and integral with the ledge, extends vertically from the ledge in the second vertical direction, extends into a first opening in the first adhesive and is aligned with a first aperture in the first conductive layer, the ledge extends laterally from the bump in lateral directions orthogonal to the vertical directions, the first adhesive is mounted on the ledge, is sandwiched between the ledge and the first conductive layer and is non-solidified, and the first conductive layer is mounted on the first adhesive; then flowing the first adhesive in the second vertical direction into a gap located in the first aperture between the bump and the first conductive layer; solidifying the first adhesive; then providing a heat spreader that includes the bump, a base and the ledge, wherein the bump is adjacent to the base and extends vertically from the base in the first vertical direction and the base covers the bump in the second vertical direction, extends laterally from the bump and includes a portion of the first conductive layer that is adjacent to the first aperture and spaced from the bump; then mounting a conductive trace and a second adhesive on the ledge, wherein the conductive trace includes a pad and a terminal and is located outside the cavity and beyond the ledge in the first vertical direction, the second adhesive is sandwiched between the conductive trace and the ledge and includes a second opening, the bump is aligned with and spaced from the second opening and the ledge is sandwiched between the adhesives and covers the conductive trace in the second vertical direction; then mounting a semiconductor device on the bump, wherein the semiconductor device extends into the cavity; electrically connecting the semiconductor device to the pad, thereby electrically connecting the semiconductor device to the terminal; and thermally connecting the semiconductor device to the bump, thereby thermally connecting the semiconductor device to the base.