Patent ID: 7375022

Claim:
A method of manufacturing a wiring board having a capacitor with a plurality of electrode layers, which layers oppose each other with a dielectric layer in between, one or more via wirings which pierce the electrode layers and a plurality of pattern wirings, which pattern wirings are connected to the corresponding via wirings, the method comprising the steps of: forming the electrode layers forming a through hole in the electrode layers such that, each layer has one or more through holes which the via wirings pierce, and the dielectric layer, and forming the capacitor; installing the capacitor such that the capacitor opposes the pattern wirings with an insulating layer in between; forming one or more via holes which reach the pattern wirings from the through holes; and forming the via wirings in the via holes; wherein the step of forming the via holes includes forming the via holes in the insulating layer with the electrode layers as a mask; and wherein the via holes are formed with a laser; and wherein the electrode layers consist of a first electrode layer and a second electrode layer, the formation steps of which are comprised of: forming in the first electrode layer a first of the through holes whose diameter is smaller than a processing diameter of the laser and a second of the through holes whose diameter is larger than the processing diameter; and forming in the second electrode layer a third of the through holes whose diameter is smaller than the processing diameter and a fourth of the through holes whose diameter is larger than the processing diameter; wherein the first through hole opposes the fourth through hole, and the second through hole opposes the third through hole.