Patent ID: 8779523

Claim:
A semiconductor device comprising: a semiconductor substrate with a conductivity of a p-type; a buried layer with a conductivity of an n-type provided on the semiconductor substrate; a back gate layer with a conductivity of a p-type provided on the buried layer; a drain layer with a conductivity of an n-type provided on the back gate layer; a source layer with a conductivity of an n-type provided on the back gate layer, the source layer being spaced from the drain layer; a gate electrode provided in a region immediately above a portion of the back gate layer between the drain layer and the source layer; and a drain electrode having a lower surface that is in contact with a part of an upper surface of the drain layer, a thickness of the drain layer in a region between the part of the upper surface of the drain layer and the back gate layer in a first direction orthogonal to a surface of the semiconductor substrate being half a combined thickness of the back gate layer and the drain layer between the part of the upper surface of the drain layer and an interface of the buried layer and the back gate layer in the first direction, and an impurity concentration profile of the buried layer having a maximum value at a position other than at the interface of the buried layer and the back gate layer.