Patent ID: 7977204

Claim:
A method of forming a pattern of a semiconductor device, the method comprising: forming a first hard mask layer on a substrate; forming a first mask pattern on the first hard mask layer, the first mask pattern comprising topographic features each having opposite sidewalls; forming a buffer layer over the first mask pattern so as to cover both sidewalls of each of the features of first mask pattern; forming a second mask pattern of topographic features in such a manner that each of the features of the second mask pattern is disposed between two adjacent ones of each respective pair of the features of the first mask pattern and segments of the buffer layer are interposed between the first and second mask patterns, respectively, wherein the first and second mask patterns and the buffer layer together constitute a masking layer to be trimmed; forming a photoresist pattern on a structure constituted by the features of the first and second mask patterns and the segments of the buffer layer, the photoresist pattern having openings disposed over selected portions of the structure; subsequently etching the structure to selectively remove the selected portions thereof, thereby trimming the structure and forming openings therethrough that expose the first hard mask layer; etching the first hard mask layer using the trimmed structure as an etch mask, to thereby form a first hard mask pattern that exposes portions of the substrate; etching the exposed portions of the substrate using the first hard mask pattern as an etch mask to thereby form trenches in the substrate; and forming in the trenches an isolation layer of a material that is different from that of the first hard mask pattern.