Patent ID: 8781043

Claim:
An apparatus comprising: at least one processor configured according to executable instructions to perform equalization on a received signal to obtain an equalized signal for a first set of code channels for one sector, to perform data detection on the equalized signal to obtain a detected signal for the first set of code channels, to perform reconstruction on the detected signal to obtain a reconstructed signal for the first set of code channels, to perform cancellation on the reconstructed signal for the first set of code channels from the received signal to obtain a modified received signal from the one sector, and to perform equalization, data detection, reconstruction, and cancellation for at least one additional set of code channels for another sector on the modified received signal from the one sector to obtain a modified received signal from the another sector and using the modified received signal from the another sector to determine a desired signal; and a memory configured to store the executable instructions and coupled to the at least one processor.