Patent ID: 7155540

Claim:
A data communication method in a shared memory multiprocessor system having a plurality of processors and a memory, comprising: providing a register for storing shared data in each of said processors; connecting said processors by a ring type network; setting one of said processors to being a main processor, and setting other processors to be subordinate processors; when a subordinate processor attempts to write data into the register thereof, transmitting by said subordinate processor a command for transferring data to the main processor through said ring type network in one direction without writing the data into the register of said subordinate processor; and changing by the main processor the transmitted command for transferring data into a command for writing, and transmitting by the main processor said command for writing to all subordinate processors through said ring type network in said one direction in order to write the data into the register in each processor, wherein each of said processors has a unique identification number; each of said processors performs data transfer through said ring type network by adding said identification number; and when said main processor performs data transfer for writing said data into said registers of all said processors through said ring type network, each of said processors performs said data transfer by adding a delay which depends on said identification number added upon said data transfer.