Patent ID: 7082062

Claim:
A voltage output control apparatus comprising: a buffer circuit that, when an output of a supply voltage is started by a power circuit, provides a predetermined rate of rise to the voltage and supplies the voltage to a load; a voltage detecting means that detects the voltage supplied to the load through the buffer circuit; and a controlling means that operates to control the rate of voltage rise based on a result of comparison of the voltage detected by the voltage detecting means with a reference voltage, wherein the controlling means compares the voltage detected by the voltage detecting means with reference voltages in a plurality of stages to control the rate of voltage rise until the voltage supplied to the load rises to a predetermined supply voltage, wherein the buffer circuit comprises a current mirror circuit in which one side of a mirror pair is connected to ground through a series resistor circuit and the other side of the mirror pair is connected to the load, and wherein the voltage detecting means includes a voltage divider circuit connected between the other side of the mirror pair and ground.