Patent ID: 7820509

Claim:
A method of manufacturing a semiconductor device including on a semiconductor substrate a first region where a first transistor including a first gate electrode of a stacked structure having a floating gate and a control gate is formed, a second region where a second transistor including a second gate electrode of a single-layer structure is formed, and a frame-shaped third region positioned in a boundary part between the first region and the second region, comprising: forming a first conductive film over the first region, the second region and the third region of the semiconductor substrate; patterning the first conductive film to remove the first conductive film in the second region and to form in the first region and the third region a pattern of the first conductive film having a frame-shaped pattern, the frame-shaped pattern being formed along an edge of the first region, an outer edge of the first conductive film being positioned in the third region; forming a first insulating film covering the first conductive film in the first region of the semiconductor substrate; forming a second conductive film over the first region, the second region and the third region of the semiconductor substrate; patterning the second conductive film to form in the first region the control gate formed of the second conductive film and extended to a region where the frame-shaped pattern is formed, while leaving the second conductive film so that the second conductive film covers the second region and is positioned in the third region having an inner edge positioned inner of said outer edge; patterning the first insulating film and the first conductive film in the first region to form the floating gate of the first conductive film; after forming the control gate and the floating gate, forming a photoresist film having a pattern of the second gate electrode over the semiconductor substrate; and patterning the second conductive film in the second region with the photoresist film as a mask to form the second gate electrode of the second conductive film in the second region.