Patent ID: 8302105

Claim:
A system, comprising: one or more processors; a memory coupled to the one or more processors and storing program instructions executable by the one or more processors to implement a thread configured to acquire a plurality of software locks in bulk, wherein: the thread is one of multiple program threads concurrently executing and accessing shared system memory locations; each of the software locks locks one of the shared system memory locations; the plurality of software locks are a concurrency control mechanism controlling concurrent access to the shared system memory locations by the multiple program threads; and said acquiring obtains the plurality of software locks in bulk via execution of a memory barrier operation, comprising: storing a value for the thread in each of the plurality of software locks; and executing the memory barrier operation to ensure that, before the thread executes any memory access operation on the shared system memory locations that is subsequent to the memory barrier operation in program order, the values for the thread that are stored in each of the plurality of software locks are each visible to the other threads of the multiple program threads concurrently executing in the system; wherein the memory barrier operation is sufficient to obtain the plurality of software locks in bulk without performing a separate memory barrier operation for each of the plurality of software locks.