Patent ID: 8228650

Claim:
An input-output interface circuit characterized in comprising: an input-output terminal for signal input and output; an input buffer that receives a signal inputted externally through the input-output terminal; an output buffer that has a first MOS transistor of a first conductivity type formed in a floating well region, and outputs a signal externally through the input-output terminal; an electrostatic protection circuit connected between the input-output terminal and a high level power supply potential; and a floating well potential adjusting circuit that adjusts the potential on the floating well region, wherein the electrostatic protection circuit has a first resistance having one end connected to the input-output terminal, and a diode connected between another end of the first resistance and the high level power supply potential, and the floating well potential adjusting circuit has a second resistance having one end connected to the input-output terminal, and a second MOS transistor of the first conductivity type having one end connected to another end of the second resistance, another end connected to the floating well region, and a gate connected to the high level power supply potential.