Patent ID: 7511531

Claim:
An output buffer, comprising: a pull-up circuit including a pull-up transistor for providing a pull-up output signal responsive to a pull-up input signal; a pull-down circuit including a pull-down transistor for providing a pull-down output signal responsive to a pull-down input signal; a first supplemental circuit in parallel with one of the pull-up transistor or the pull-down transistor, the first supplemental circuit configured to generate, in response to a first supplemental control signal, a first supplemental output signal, the pull-up output signal, the pull-down output signal and the first supplemental output signal coupled to form an output buffer output signal; and wherein the first supplemental output signal is variable with temperature variation as determined by a comparison of electrical changes in temperature sensitive elements, wherein the first supplemental circuit is in parallel with the first pull-up transistor and wherein the first supplemental output signal is a pull-up supplemental output signal configured to adjust a pull-up capability of the output buffer, and wherein the first supplemental circuit comprises a series-configured second pull-up transistor and a third pull-up transistor, the second and third pull-up transistors each controlled by one of the pull-up input signal and the first supplemental control signal.