Patent ID: 8923465

Claim:
A semiconductor device for sampling data in a serial data stream in an electronic device, comprising: sampling logic, comprising: input sample path selection logic arranged to enable at least one input sample path; sampler logic arranged to receive and sample an input data signal in a serial data stream in accordance with a phase of the at least one enabled input sample path; and transition detection logic arranged to detect transitions within the received input data signal; wherein the input sample path selection logic is further arranged, upon detection of a transition within the received input data signal, to determine if the phase of the at least one input sample path is a phase having a largest window between logic values; and if it is determined that the phase of the at least one input sample path is not the phase having a largest window between logic values to enable at least one further input sample path comprising a phase having a larger window between logic values, wherein, if it is determined that the phase of the at least one input sample path is optimally valid over a plurality of consecutive samples, the input sample path selection logic is arranged to disable all input sample paths apart from the optimally valid input sample path, wherein the input sample path selection logic is arranged to enable a subset of input sample paths, wherein the subset of input sample paths comprises a sampling input sample path, and at least two comparison input sample paths, one comparison input sample path comprising a clock phase ahead of the clock phase for the sampling input sample path, and one comparison input sample path comprising a clock phase behind the clock phase for the sampling input sample path, wherein the input sample path selection logic is arranged to determine that a phase of the input sample paths is not the phase having a largest window between logic values if a transition within the received input data signal is detected between a sampling point for the sampling input sample path and a sampling point for one of the comparison input sample paths.