Patent ID: 8247290

Claim:
A method of manufacturing a non-volatile semiconductor memory comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive film over the first insulating film; etching the first conductive film by exposing an etchant gas to form a plurality of floating gates and dummy gates arranged in a first direction, wherein the plurality of floating gates are between one of the dummy gates and another one of the dummy gates, wherein a first side surface of an outside of the one of the dummy gates adjacent to an edge of the plurality of the floating gates is exposed to the etchant gas in etching of the first conductive film, and a first interior angle between a bottom surface of the one of the dummy gates and the first side surface of the one of the dummy gates is smaller than a second interior angle between the bottom surface of the one of the dummy gates and a second side surface of an inside of the one of the dummy gates, and wherein a third interior angle between a bottom surface of one of the floating gate and a third side surface of the one of the floating gate and a forth interior angle between the bottom surface of the one of the floating gate and a forth side surface of an inside of the one of the floating gate are closer to 90 degrees than the first interior angle; forming a second insulation film over the plurality of the floating gates; forming a second conductive film over the second insulation film; and forming a control gate extended in the first direction by etching the second conductive film; forming a third insulating film over the control gate; forming sidewall insulation films on sidewall of the plurality of floating gates and the control gate by etching the third insulating film; after forming of the sidewall insulation films, forming a metal layer over the control gate, and after forming the metal layer, forming a metal silicide film over the control gate by performing a thermal treatment.