Patent ID: 8526545

Claim:
A baseband processor comprising: an analog to digital converter configured to convert a baseband signal from an analog format into a corresponding digital format, wherein the baseband signal comprises a data packet having i) a preamble portion, ii) a header portion, and iii) a payload portion, wherein the payload portion of the data packet is in accordance with either i) a first format or ii) a second format, and wherein the second format is associated with a higher data rate than the first format; a parallel demodulation pathway configured to receive the baseband signal in the corresponding digital format, wherein the parallel demodulation pathway includes a first demodulation pathway configured to recover i) the preamble portion of the data packet, ii) the header portion of the data packet, and iii) the payload portion of the data packet in response to the payload portion of the data packet being of the first format; and a second demodulation pathway configured to recover the payload portion of the data packet in response to the payload portion of the data packet being of the second format.