Patent ID: 8817149

Claim:
A solid-state imaging device comprising: a photoelectric conversion layer that is formed over a semiconductor substrate; and a MOS transistor circuit that reads out a signal corresponding to charges generated in the photoelectric conversion layer and then collected, and that is formed in the semiconductor substrate, the charges having a given polarity, wherein the MOS transistor circuit includes: a charge accumulation portion that is electrically connected with the photoelectric conversion layer; a reset transistor that resets a potential of the charge accumulation portion to a reset potential; an output transistor that outputs a signal corresponding to the potential of the charge accumulation portion, and a protective circuit that is electrically connected with the charge accumulation portion and prevent the potential of the charge accumulation potential from exceeding a predetermined voltage, the reset transistor and the output transistor have carriers whose polarity is opposite to the given polarity, wherein following formula (1) is satisfied: GND<Vs<GND+ΔV 2+( Vdd/ 5) (1) where GND denote a reference potential of all potentials, Vs denote the reset potential of the reset transistor, and ΔV 2 denote a difference between a first potential of the charge accumulation portion in a case where the reset transistor is in its ON state and a second potential of the charge accumulation portion immediately after the reset transistor has turned from its ON state into its OFF state and Vdd is a power source voltage of the solid-state imaging device.