Patent ID: 7355265

Claim:
A semiconductor integrated circuit comprising: a power supply wiring; a ground wiring; and a decoupling capacitor formed between said power supply wiring and said ground wiring, said decoupling capacitor comprising an upper electrode, a lower electrode, and an insulating material in between the electrodes, wherein at least one of the electrodes of said decoupling capacitor comprises a shield layer formed in a plane shape on a semiconductor substrate, and said shield layer is electrically connected directly to said semiconductor substrate via a diffusion layer, and extends from the diffusion layer to the decoupling capacitor in a plane parallel to the substrate, such that a plane shaped portion of said shield layer contacts said diffusion layer, said shield layer is fixed to a power supply potential or said ground potential, and said decoupling capacitor does not overlap said diffusion layer, and wherein the lower electrode comprises the shield layer.