Patent ID: 7427535

Claim:
A method of stacking a plurality of semiconductor die comprising: providing a first semiconductor die defining a first active surface; providing a second semiconductor die defining a second active surface; positioning an intermediate substrate between said first active surface of said first semiconductor die and said second active surface of said second semiconductor die such that a first surface of said intermediate substrate faces said first active surface and such that a second surface of said intermediate substrate faces said second active surface; electrically coupling said first semiconductor die to said intermediate substrate by at least one topographic contact extending from said first active surface to said first surface of said intermediate substrate such that said topographic contact defines a space between said first active surface and said first surface of said intermediate substrate; securing said second semiconductor die to said second surface of said intermediate substrate such that said second semiconductor die is positioned within a cavity defined in said second surface of said intermediate substrate; electrically coupling said second semiconductor die to said intermediate substrate by at least one conductive line extending from said second active surface, through said space defined between said first active surface and said first surface of said intermediate substrate, through said passage defined in said intermediate substrate, and to a conductive contact on said first surface of said intermediate substrate; and placing a capacitor between said intermediate substrate and one of said first and second semiconductor dies, said capacitor defining a thickness dimension that is no greater than a dimension defined by said first semiconductor die or said at least one topographic contact, said capacitor electrically coupled between high and low voltage inputs on at least one of said first and second semiconductor dies such that said capacitor functions as at least one of a power source filter and a surge suppressor.