Patent ID: 7808840

Claim:
A method of operating a non-volatile memory device having a plurality of cell strings and a plurality of page buffers, the cell strings connected between a common source line and a plurality of bit lines, the cell strings including a plurality of memory cells, each of the memory cells having a gate that is connected to a word line of a plurality of word lines, and each of the page buffers having a first latch and a second latch which are coupled to the bit lines through a sensing node, the method comprising: precharging the bit lines based on a program state of a selected memory cell by supplying a positive voltage to the common source line; storing data according to a voltage level of the sensing node in the first latch of a page buffer, wherein the voltage level of the sensing node is changed according to a level of the voltage of the bit line; and transferring the data stored in the first latch to the second latch through the sensing node.