Patent ID: 8073000

Claim:
A code division multiplex signal receiving apparatus for use in a code division multiplex transmitting and receiving system, for receiving a clocked code division multiplex signal generated by combining a code division multiplex signal with a clock signal having a frequency equal to a null frequency disposed in a void in a frequency spectrum of the code division multiplex signal, comprising: a bandpass filter that extracts a first frequency component of the clocked code division multiplex signal, the first frequency component including the frequency of the clock signal; a clock recovery device that recovers the clock signal from the first frequency component; a band elimination filter that eliminates a second frequency component including the frequency of the clock signal from the clocked code division multiplex signal to obtain a received code division multiplex signal; a received signal processor that processes the received code division multiplex signal in synchronization with the clock signal recovered by the clock recovery device; wherein the code division multiplex signal is organized into frames having a first length, and the received signal processor includes a gating unit operable in synchronization with the recovered clock signal to open and close a window having a second length greater than the first length and to pass the received code division multiplex signal only while the window is open, and the bandpass filter has a passband width substantially equal to a reciprocal of a difference between the first length and the second length.