Patent ID: 7262089

Claim:
A method of forming a semiconductor structure, comprising: providing a semiconductor substrate having a first doped semiconductor region and a second doped semiconductor region over the first doped semiconductor region, one of the first and second doped semiconductor regions being a p-type region and the other being an n-type region; forming a trench extending through the second doped semiconductor region and into the first doped semiconductor region, the trench having a sidewall comprising the first and second doped semiconductor regions; forming a first electrically insulative material within the trench to partially fill the trench, the partially-filled trench being filled to above an elevational level of an uppermost portion of the first doped semiconductor region along the sidewall; forming a metal-containing layer within the partially-filled trench and along the second doped semiconductor region of the sidewall; reacting at least some of the metal from the metal-containing layer with the second doped semiconductor region of the sidewall to form a silicide from the trench sidewall, the silicide being within the second doped semiconductor region and not within the first doped semiconductor region; and forming a second electrically insulative material within the trench to cover the silicide.