Patent ID: 7605035

Claim:
A method of fabricating a semiconductor device comprising: depositing an interlayer insulating layer on a semiconductor substrate; contacting the semiconductor substrate with contact plugs that penetrate the interlayer insulating layer; depositing an etch stop layer that covers the contact plugs and the interlayer insulating layer; depositing a molding layer that covers the etch stop layer; etching the molding layer and the etch stop layer to form first openings that expose an upper surface of the contact plugs and the interlayer insulating layer around the contact plugs; etching the interlayer insulating layer exposed by the first openings to form second openings that extend downward from the first opening and expose upper sidewalls of the contact plugs; depositing a contact prevention layer on surfaces of the first openings and the second openings; etching the contact prevention layer to form a contact prevention pattern that exposes the upper surface of the contact plugs; contacting the upper surface of the contact plugs with charge storage electrodes that fill the first openings and the second openings; and removing the molding layer and the contact prevention pattern to expose the charge storage electrodes.