Patent ID: 7084042

Claim:
A method of fabricating a metal-insulator-metal (MIM) capacitor structure in an integrated circuit, the method comprising: (a) fabricating first and second legs of MIM capacitor structure in an integrated circuit, the first and second legs extending generally parallel to one another and defining a channel therebetween, each leg including top and bottom electrodes, an insulator layer interposed between the top and bottom electrodes, and a sidewall that faces the channel; (b) fabricating a first sidewall spacer extending along the channel, the first sidewall spacer including a conductive layer and a dielectric layer interposed between the conductive layer and the sidewall of the first leg, wherein the conductive layer of the first sidewall spacer is physically separated from the top electrode of the first leg; (c) fabricating a second sidewall spacer extending along the channel, the second sidewall spacer including a conductive layer and a dielectric layer interposed between the conductive layer and the sidewall of the second leg, wherein the conductive layer of the second sidewall spacer is physically separated from the top electrode of the second leg; and (d) fabricating a dielectric material in the channel and interposed between the conductive layers of the first and second sidewall spacers.