Patent ID: 8227317

Claim:
A semiconductor device manufacturing method comprising the steps of: forming a transistor on a surface side of a silicon layer of a silicon-on-insulator substrate, said silicon-on-insulator substrate being formed by laminating a substrate, an insulating layer, and said silicon layer; forming a first insulating film covering said transistor and a wiring section including a part electrically connected to said transistor on said silicon-on-insulator substrate; measuring a threshold voltage of said transistor through said wiring section; forming a supporting substrate on a surface of said first insulating film with a second insulating film interposed between the supporting substrate and the first insulating film; removing at least a part of said substrate and said insulating layer on a back side of said silicon-on-insulator substrate; and adjusting the threshold voltage of said transistor on a basis of the measured threshold voltage; wherein the step of adjusting the threshold voltage of said transistor is performed by ion implantation of one of a group 13 element and a group 15 element into a channel section of said transistor from a back side of said silicon layer.