Patent ID: 7330221

Claim:
A thin film transistor array substrate, comprising: a substrate; a plurality of scan lines disposed over the substrate; a plurality of data lines disposed over the substrate, the data lines and the scan lines defining a plurality of pixel areas on the substrate; a plurality of common lines disposed over the substrate, a portion of each common line being arranged in one of the pixel areas; a plurality of pixels disposed over the substrate, each of the pixels being disposed in one of the pixel areas and driven by one of the scan lines and one of the data lines corresponding thereto, wherein each of the pixels comprising: a thin film transistor coupled to the scan line and the data line corresponding thereto; a pixel electrode disposed over the common line corresponding thereto, and coupled to the thin film transistor; a top electrode disposed between the pixel electrode and the common line corresponding thereto; and one or more conductive lines, a terminal of each conductive line being coupled to a side of the top electrode, and another terminal of each conductive line extending out of the common line and being coupled to the pixel electrode.