Patent ID: 7812636

Claim:
A method for generating k-bit parallel pseudo-random data by using “n” registers including a first register through an n-th register and “k” exclusive-OR gates including a first exclusive-OR gate through a k-th exclusive-OR gate, where “n” is an integer equal to or greater than 3 and “k” is an integer equal to or greater than 2, the method comprising: inputting an output of an m-th register to an (m+k)th register, where “m” is an integer between 1 and (n−k); inputting outputs of the first exclusive-OR gate through a (k−1)th exclusive-OR gate to a second exclusive-OR gate through the k-th exclusive-OR gate XR, respectively; inputting an output of the first register to the first exclusive-OR gate; inputting the outputs of the first exclusive-OR gate through the k-th exclusive-OR gate to a k-th register through the first register, respectively; and inputting outputs of “k” registers including an (n−k+1)th register through the n-th register to the k-th exclusive-OR gate through the first exclusive-OR gate, respectively, and also extracting the outputs of the “k” registers as the k-bit parallel pseudo-random data.