Patent ID: 7535258

Claim:
A programmable logic device having a buffer, the buffer comprising: at least one controlled current source; at least one input node adapted to receive at least one input signal; first and second output nodes adapted to present first and second output signals; a detector adapted to generate a sampled voltage corresponding to a common-mode voltage of the output nodes; a controlled voltage source adapted to generate a common-mode reference voltage; and, an amplifier adapted to adjust the at least one controlled current source in response to the sampled voltage and the common-mode reference voltage, wherein: the controlled voltage source is controlled independently of the at least one controlled current source; and the at least one controlled current source and the controlled voltage source are adapted to be programmably controlled and are each independently programmable; and wherein the programmably controlled voltage source comprises: a reference voltage source adapted to produce a reference voltage; a voltage divider, coupled to the reference voltage source, adapted to produce a plurality of output voltages; and a plurality of switches adapted to selectively couple one of the plurality of voltages from the voltage divider to an output node, wherein a signal on the output node is the common-mode reference voltage.