Patent ID: 6981183

Claim:
A bit error rate (BER) testing apparatus, comprising: a computer that commands a BER test through a BER test command, receives a BER value according to the BER test command, and displays the BER value; a roadside equipment that transmits a BER test message according to the BER test command; and an on-board equipment that compares the BER test message received from the roadside equipment with a previously stored BER test message to compute the BER value and transmits the BER value to the computer via the roadside equipment, wherein the BER test message comprises: one frame control message channel (FCMC) positioned at the front of the BER test message, the FCMC having system information and exclusively used for a backward link; and a plurality of message data channels (MDCs) comprising data to be transmitted between the roadside equipment and the on-board equipment, the plurality of MDCs set as a certain value conforming to a dedicated short range communication (DSRC) standard and used for the backward link and a forward link.