Patent ID: 7755131

Claim:
A NAND-type non-volatile semiconductor memory device, comprising: a semiconductor substrate; a plurality of element isolation insulating films which are formed in the shape of strips spaced apart at a predetermined distance from each other on the semiconductor substrate along a column direction; a first insulating film which is formed along the column direction in the shape of strips between the element isolation insulating films on the semiconductor substrate; a plurality of floating gates which are formed on the first insulating film spaced apart at a predetermined distance from each other; a plurality of second insulating films which are formed spaced apart at a predetermined distance from each other to span the element isolation insulating films on the floating gate along a row direction that is orthogonal to the column direction; a plurality of control gates which are formed on the second insulating films along the row direction in the shape of strips; and a contact plug which directly contacts the upper and side surfaces of the control gate, wherein the floating gate below the contact plug has a length in the column direction which is greater than that of the control gate in the column direction, and a lower surface of the contact plug directly contacts an upper surface of the floating gate.