Patent ID: 8912941

Claim:
An analog-to-digital conversion circuit which converts an analog input signal into a digital output signal, the analog-to-digital conversion circuit comprising: a clock generating circuit which generates a clock signal including a first initial period and plural normal periods following the first initial period, the first initial period being one of a high period and a low period and being a first period immediately after a reset release, each of the normal periods being one of a high period and a low period and shorter than the first initial period; and an analog-to-digital converter which is an incremental analog-to-digital converter that operates using the clock signal, wherein the analog-to-digital converter includes: an integrator which generates an integrated value according to a voltage of the analog input signal; a comparator which generates the digital output signal by comparing the integrated value and a predetermined reference voltage; and a digital-to-analog converter which generates an analog signal according to the digital output signal and provides the generated analog signal to the integrator.