Patent ID: 7795961

Claim:
An offset cancellation circuit provided in an operational amplifier, configured such that a first active load is connected to a first differential pair, the first differential pair comprises a first inversion input unit and a first non-inversion input unit, the first active load comprises a first and second transistors, and the first and second transistors each comprise a gate, comprising: an input unit for inputting an input voltage to the first non-inversion input unit; a first capacitance connected to the gate of the first transistor; a second capacitance connected to the gate of the second transistor; and a switch for setting a first time period and a second time period in connection states between the first and second transistors and the first and second capacitances, wherein during the first time period, the connection states between the first and second transistors and the first and second capacitances are set so that a gate voltage of the first transistor is supplied to the first capacitance, and a gate voltage of the second transistor is supplied to the second capacitance, during the second time period, the connection states between the first and second transistors and the first and second capacitances are set, so that the first and second capacitances can retain charges, and the second time period is an output time period of the operational amplifier.