Patent ID: 7442584

Claim:
A method for manufacturing an isolated vertical power device in a semiconductor substrate, the method comprising the steps of: forming, in a front surface of the substrate having a first conductivity type, one or more front isolation wall trenches, wherein the front isolation wall trenches surround a perimeter of a conduction region of the vertical power device; forming, in a back surface of the substrate, one or more back isolation wall trenches surrounding the perimeter of the conduction region of the vertical power device; depositing a film containing a dopant of a second conductivity type into the front and back isolation wall trenches; forming, in the conduction region on the back surface of the substrate, one or more conduction region trenches, wherein the conduction region trenches are located within a perimeter of the front and back isolation wall trenches; depositing a film containing a dopant of the first conductivity type into the conduction region trenches; and diffusing the dopants from the conduction region trenches and from the front and back isolation wall trenches into the substrate to form a conduction region structure of the first conductivity type and an isolation wall of the second conductivity type.