Patent ID: 7592271

Claim:
A method of fabricating a flash memory device, the method comprising: sequentially forming a pre-metal dielectric layer, a hard mask layer, and a first etch mask pattern over a semiconductor substrate; forming an auxiliary layer along a surface of the first etch mask pattern and the hard mask layer; forming an etch mask layer on the auxiliary layer to gap-fill a space between adjacent first etch mask pattern elements; etching the etch mask layer to form a second etch mask pattern on the auxiliary layer between adjacent first etch mask pattern elements; etching the auxiliary layer to remove a portion of the auxiliary layer between the first etch mask pattern and the second etch mask pattern; etching the hard mask layer between the first etch mask pattern and the second etch mask pattern to form a hard mask pattern; and etching the pre-metal dielectric layer using the hard mask pattern as a mask to form contact holes.