Patent ID: 8166221

Claim:
A low-power Universal-Serial-Bus (USB) device comprising: a transmit pair for sending data to a host; a receive pair for receiving data from the host; a low-power physical layer that comprises: a set of two pairs of differential serial buses, a first pair bus with a first pin carry+signal and a second pin carry−signal, and a second pair differential serial bus with a first pin carry+signal and a second pin carry−signal, wherein the set of two pairs of differential serial buses comprises the receive pair and the transmit pair; a driver for driving the transmit pair with a transmit data stream; a bit clock for clocking bits of the transmit data stream; a parallel-to-serial converter, clocked by the bit clock, for converting data bytes for transmission to serial data for transmission by the driver; a receiver for detecting signal transitions on the receive pair; a receive clock recovery circuit, coupled to the receiver, for generating a received bit clock from the signal transitions detected by the receiver; a sync pattern detector for detecting sync patterns received by the receiver; a serial-to-parallel converter, clocked by the received bit clock, for converting the extracted data stream to received data bytes; an elastic buffer for storing the received data bytes; a low-power link layer, coupled to the low-power physical layer, for generating and processing link control words for controlling link power and for link training; and a scaled-down protocol layer for pointing to headers and payloads in a memory buffer for transfer to the low-power link layer; a flash memory for storing data in non-volatile memory; and a RAM buffer coupled to the scaled-down protocol layer, for storing output parallel words read from the flash memory by a flash interface, and for storing input parallel words before writing to the flash memory by the flash interface; and a microcontroller coupled to receive addresses, commands, and data from the scaled-down protocol layer, for generating flash commands for accessing the flash memory, the microcontroller generating a not-yet signal that is transmitted to the host over the transmit pair when the RAM buffer does not yet contain requested data that is waiting to be read from the flash memory, whereby the not-yet signal is transmitted over the transmit pair when the requested data is waiting to be read from the flash memory.