Patent ID: 8187931

Claim:
A method for fabricating a semiconductor device, the method comprising: forming an isolation region in a substrate by filling a trench formed in the substrate with a dielectric layer; forming hard mask patterns over the substrate including an active region and the isolation region; etching the substrate using the hard mask patterns as an etch mask to form a protrusion having a higher surface than that of the substrate; forming a gate insulation layer over the substrate including the protrusion; forming a gate conductive layer and a gate hard mask layer over the gate insulation layer; and forming a gate pattern overlapping the protrusion by selectively etching the gate hard mask layer, the gate conductive layer, and the gate insulation layer, wherein the protrusion is formed on an upper surface of the active region corresponding to a boundary region between the active region and the isolation region, and five surfaces of the protrusion protruded from the surface of the substrate are surrounded by the gate conductive layer.