Patent ID: 7910992

Claim:
A vertical MOSFET comprising: a plurality of MOSFET cells, each having a source, drain and gate, and wherein each MOSFET cell includes: a semiconductor body having a substantially planar first surface defining a source and a substantially planar second surface defining a drain, said first surface and said second surface being substantially parallel and not co-planar, said semiconductor body being substantially mono-crystalline, said source connected directly to a source electrode lying on said first surface, said drain connected directly to a drain electrode lying on said second surface; a gate formed in said semiconductor body proximate said second surface; and a via formed within said semiconductor body at least partially between said first surface and said second surface and coupled to said gate, said via having an insulator layer connected to said semiconductor body and said via having a conductor connected to said insulator layer; wherein each source of the plurality of MOSFET cells is coupled to a common source conductor, each drain of the plurality of MOSFET cells is coupled to a common drain conductor and each gate of the plurality of MOSFET cells is coupled to a common gate conductor; and wherein each semiconductor body is formed within a single semiconductor die.