Patent ID: 6978397

Claim:
A method for controlling a transfer of data between a data processor and a data unit, the method comprising: providing a plurality of control units, each control unit having a capability to control the transfer of data between the data processor and the data unit, each control unit having a memory device and signal paths coupled to the memory device, the signal paths enabling access to the associated memory device; selecting one of the control units as a master control unit to control the transfer of data between the data processor and the data unit; designating a second one of the control units as a slave control unit; transferring the data between the data processor and the data unit by employing the memory device in the master control unit; and synchronizing the memory device in the master control unit with the memory device in the slave control unit, the synchronizing including: generating, in the master control unit, values for the signal paths associated with the master memory device to transfer data to the master memory device; transferring a subset of the generated signal paths to the signal paths associated with the slave memory device; and allowing the generated signals to perform the data transfer to the master memory device and the slave memory device.