Patent ID: 6986070

Claim:
A microcomputer comprising: a central processing unit (CPU) which operates depending on programs to output a stop command when it stops operation thereof; a main-clock generating means for generating a main-clock to operate the CPU; a sub-clock generating means for generating a sub-clock of the frequency which is lower than the main-clock; an intermittent operation control means which operates by receiving the sub-clock to control the intermittent operation of the CPU and stops, upon reception of the stop command, operation of the main-clock generating means and starts measurement of the predetermined setting time and starts again, after the setting time has passed, operation of the main-clock generating means to raise the CPU to the operating condition from the stop condition in view of realizing the intermittent operation of the CPU; and an intermittent time measuring means which operates to measure an intermittent time which is a substantial pause period of the CPU, wherein the CPU is configured to: read the intermittent time measured by the intermittent time measuring means; measure, using its own software process, an operation time in which the CPU is in the operating condition; and measure a total time from a start time of the intermittent operation of the CPU by accumulating the intermittent time and the operation time.