Patent ID: 7546636

Claim:
An electronic device including an authorization control circuit, comprising: a data storage including one or more data files, wherein each of the data files is a digital audio file, video file, or multimedia file; a digital signal processor operably coupled to the data storage, said digital signal processor operable (A) to provide digital data output, (B) to determine an authorization state by (a) receiving a data file selected by a user from the one or more data files, (b) hashing the data file to generate a fixed-length value or key representing the data file, and (c) comparing the fixed-length value or key to an expected fixed-length value or key for the data file, wherein the comparison determines if the data file has been changed or is an invalid copy, and (C) to generate a disable signal corresponding to the authorization state, wherein the disable signal is also capable of being generated when the electronic device satisfies one or more sleep conditions; a digital to analog converter operably coupled to the digital signal processor and operable to receive the digital data output, convert the digital data to corresponding analog data, and output the analog data; the digital to analog converter including a mode input pin operable to receive the disable signal from the digital signal processor, and the digital to analog converter operable to mute output of the analog data without adding noise artifacts in response to the disable signal; wherein the digital signal processor has at least three output pins comprising a clock output pin to provide a clock signal, a mode output pin to provide the disable signal, and a digital data output pin to provide the digital data for conversion into analog data; wherein the digital to analog converter further comprises a digital data input pin to receive the digital data for conversion, and a serial input pin to receive the clock signal to enable reception of the disable signal; and wherein the digital to analog converter reads the state of the disable signal at the rising edges of the clock signal.