Patent ID: 8203545

Claim:
A display driving circuit comprising: a plurality of gate circuits arranged to respectively control a plurality of display data in response to a blanking having a function to temporarily stop displaying the display data, said display data being supplied from a holding circuit; a plurality of driver circuits connected to said plurality of gate circuits respectively to receive respective output signals from said plurality of gate circuits and to respectively supply driving signals to drive a display device in response to the respective output signals from said plurality of gate circuits, the plurality of driver circuits receiving a plurality of switching currents respectively to operate; and a plurality of delay circuits provided between said gate circuits and said driver circuits respectively and arranged to delay said driving signals such that periods of delays of said driving signals are sequentially increased from one driving signal to the next, whereby timing of a peak current flowing to one of the driver circuits is shifted from timing of a peak current flowing to the next one of the driver circuits, and a minimum period of delay among said driving signals, which are caused by the plurality of delay circuits, is equal to or longer than a time period of the display data to pass through wiring from output of said holding circuit to output of any of said driver circuits.