Patent ID: 8832534

Claim:
A communication terminal comprising: a decoding circuit configured to decode data that has been encoded according to a coding scheme defining a parity check matrix, wherein the parity check matrix defines parity equations and edges between bit nodes and check nodes, the decoding circuit comprising: an input buffer configured to store channel soft information; a bit node processing (BNP) accumulation module communicatively coupled with the input buffer and configured to read the channel soft information from the input buffer, to access extrinsic information for edges, and to generate accumulated values for edges by summing the channel soft information and the extrinsic information for edges; an edge memory communicatively coupled with the BNP accumulation module and configured to receive and store the accumulated values for edges generated by the BNP accumulation module; a BNP calculation module communicatively coupled with the edge memory and configured to receive the accumulated value from the edge memory, to access extrinsic information for edges of a previous check node processing (CNP) iteration, and to generate extrinsic information inputs for edges of a new CNP iteration by subtracting the extrinsic information for edges of the previous CNP iteration from the accumulated values for edges received from the edge memory; a CNP processor module communicatively coupled with the BNP calculation module and the BNP accumulation module, and configured to receive the extrinsic information inputs for edges generated by the BNP calculation module and to generate output extrinsic information for edges from the extrinsic information inputs for edges received from the BNP calculation module, the output extrinsic information being provided to the BNP accumulation module; and an output buffer communicatively coupled with the BNP accumulation module and configured to store output data from the BNP accumulation module when a determination is made that all parity equations defined by the parity check matrix are satisfied.