Patent ID: 7295334

Claim:
An image processing apparatus comprising: at least two signal processor modules interconnected with each other in series, each of the signal processor modules having an input port through which data is input, a memory which stores data, a signal processor portion which carries out processing on input data according to a program and an output port through which data is output, wherein at least one of the signal processor modules outputs in parallel both unprocessed input data and processed data obtained by processing the input data, wherein said at least one of the signal processor modules stores within predetermined temporal periods in the memory unprocessed input data as input through the input port and propessed data obtained by reading out and processing unprocessed input data stored in the memory a predetermined number of cycles before and outputs within the predetermined temporal periods through the output port unprocessed data and processed data stored in the memory the predetermined number of cycles before, and wherein the other signal processor module(s) stores within predetermined temporal periods in the memory unprocessed input data as input through the input port and processed data obtained by reading out and processing unprocessed input data stored in the memory a predetermined number of cycles before and outputs within the predetermined temporal periods through the output port processed data stored in the memory the predetermined number of cycles before, or stores in the memory unprocessed input data as input through the input port and outputs through the output port unprocessed input data stored in the memory the predetermined number of cycles before.