Patent ID: 7487477

Claim:
A method of designing a semiconductor product, the method comprising: generating a design for the semiconductor product that includes a plurality of library elements selected from a library, wherein each library element among the plurality of library elements is associated in the library with a plurality of parametric design points to which such library element is designed; accessing the library to retrieve the parametric design points associated with each library element included in the semiconductor product design; generating based upon the retrieved parametric design points a parametric measurement element suitable for use in testing the retrieved parametric design points for the library elements included in the semiconductor product design; incorporating the generated parametric measurement element in the semiconductor product design; and generating based upon the retrieved parametric design points a plurality of parametric test limits to be used in testing a semiconductor die incorporating the semiconductor product design, wherein the parametric test limits are associated with tightest parametric design points among those associated with the library elements included in the semiconductor product design.