Patent ID: 8581361

Claim:
A semiconductor apparatus comprising: a semiconductor chip; a plurality of pads including an input pad and an output pad; a first circuit section; a second circuit section; a wiring for electrically connecting the first circuit section and the second circuit section; and a buffer, wherein: the first circuit section and the second circuit section are arranged in an inner area of the semiconductor chip with respect to the plurality of pads, the wiring is composed of a conductive member, at least a part of the conductive member is overlapped with at least one pad of the plurality of pads, the conductive member includes a first conductive member, a second conductive member, and a third conductive member, the first conductive member is overlapped in a planar view with the at least one pad, the second conductive member electrically connects the first conductive member and the first circuit section, the third conductive member electrically connects the first conductive member and the second circuit section, the first conductive member is arranged in a wiring layer different from the second conductive member and the third conductive member, and the buffer is arranged in an intermediate wiring layer between the first conductive member and the at least one pad and is arranged so as to be overlapped in a planar view with the first conductive member.