Patent ID: 8552524

Claim:
A semiconductor component with trench isolation for defining active regions in a semiconductor substrate, the trench isolation comprising: a deep isolation trench with a first covering insulation layer below a surface of the semiconductor substrate and a second covering insulation layer over the first covering insulation layer and above the surface of the semiconductor substrate, a gate oxide layer over a surface of the second covering insulation layer, a side wall insulation layer, an electrically conductive filling layer, which is electrically connected to a predetermined doping region of the semiconductor substrate in a bottom region of the deep isolation trench, and wherein the first covering insulation layer is over a top surface of the electrically conductive filling layer, and the sidewall insulation layer; and further comprising: a trench contact, which comprises: a deep contact trench with a side wall insulation layer and an electrically conductive filling layer which is electrically, contact-connected to the predetermined doping region of the semiconductor substrate in a bottom region of the contact trench; a trench contact insulation layer being only upon a surface of the electrically conductive filling layer; and a contact opening through the trench contact insulation layer and in contact with a top surface of the electrically conductive filling layer, and wherein a composition of the electrically conductive filling layer that is electrically, contact-connected to the predetermined doping region of the semiconductor substrate in a bottom region of the contact trench is the same as a composition of the electrically conductive filling layer having a top surface in contact with the contact opening.