Patent ID: 7003030

Claim:
A receiver for demodulating a data signal transmitted from a digital source at a network sampling rate that is synchronized with a network clock, comprising: a two-stage interpolator, responsive to digital samples of the data signal, that generates interpolated digital samples in response thereto, the digital samples having a first local sample rate that is synchronized with a local clock and the interpolated digital samples having a second local sample rate that is synchronized with the network clock, the two-stage interpolator comprising: a polyphase interpolator, responsive to the digital samples of the data signal, that generates first and second estimates for each of the digital samples of the data signal; and a linear interpolator, responsive to the first and second estimates, that generates the interpolated digital samples; an adaptive fractionally spaced decision feedback equalizer, responsive to the interpolated digital samples, that generates equalized digital samples at the network sampling rate in synchronization with the network clock; and a slicer, responsive to the equalized digital samples, that generates detected symbols therefrom corresponding to data from the data signal.