Patent ID: 7655536

Claim:
A method of forming a nonvolatile memory array on a substrate surface comprising: forming a plurality of shallow trench isolation structures on a substrate, individual ones of the plurality of shallow trench isolation structures extending in a first direction, ones of the plurality of shallow trench isolation structures spaced apart in a second direction; and subsequently forming a plurality individual continuous conductive regions, an individual continuous conductive region including first, second, third and fourth conductive portions, the first conductive portion extending in the second direction and overlying the plurality of shallow trench isolation structures, the second conductive portion extending in the second direction and overlying the plurality of shallow trench isolation structures, the first and second conductive portions spaced apart in the first direction, the third and fourth conductive portions extending in the first direction to physically connect the first and second conductive portions, the first conductive portion of each individual continuous conductive region forms a first control line, the second conductive portion of each individual continuous conductive region forms a second control line.