Patent ID: 7847793

Claim:
A control circuit of a display device comprising: first to third video data storage portions; a video data format conversion portion for writing a first video data in the first video data storage portion, writing a second video data in the second video data storage portion and writing a third video data in the third video data storage portion; a selection means for alternating between writing of the first video data in the first video data storage portion and writing of the second video data in the second video data storage portion every one frame period; and a display control portion for alternating between reading of the first video data from the first video data storage portion and reading of the second video data from the second video data storage portion every one frame period, wherein the writing of the first video data and the reading of the first video data are alternately carried out, wherein the writing of the second video data and the reading of the second video data are alternately carried out, wherein when the first video data is read from the first video data storage portion, the third video data is written into the third video data storage portion and the second video data is written into the second video data storage portion, wherein when the second video data is read from the second video data storage portion, the third video data is written into the third video data storage portion and the first video data is written into the first video data storage portion, and wherein the third video data is read from the third video data storage portion by the display control portion during a retrace period.