Patent ID: 7790601

Claim:
A method of forming interconnects with an air gap comprising the steps of: obtaining a semiconductor substrate having at least one metal wiring layer comprising wiring features embedded in an interlevel dielectric material; depositing a dielectric cap layer over the at least one metal wiring layer; depositing a sacrificial dielectric layer over the dielectric cap layer; depositing and patterning a photoresist layer to form an opening aligned over an area between two wiring features; etching the sacrificial dielectric layer and dielectric cap layer to form an opening in the sacrificial dielectric layer and the dielectric cap layer aligned over the area; etching the interlevel dielectric between the two wiring features to form an air gap; and depositing another interlevel dielectric to pinch off and seal the air gap wherein the sacrificial dielectric layer is removed prior to the step of depositing the interlevel dielectric to pinch off and seal the air gap.