Patent ID: 7687914

Claim:
A semiconductor device comprising: semiconductor elements formed in a semiconductor substrate; a first interlayer insulation film formed over the semiconductor elements; first wirings, second wirings and third wirings formed over the first interlayer insulation film, respectively; a second interlayer insulation film formed over the first, the second and the third wirings; and fourth wirings, fifth wirings and sixth wirings formed over the second interlayer insulation film, respectively, wherein the third and sixth wirings are electrically connected with the semiconductor elements, wherein the wirings of the first wirings have a same planar size and are arranged in a predetermined pattern, wherein the wirings of the second wirings have a same planar size and are arranged in a predetermined pattern, wherein the wrings of the fourth wirings have a same planar size and are arranged in a predetermined pattern, wherein the wirings of the fifth wirings have a same planar size and are arranged in a predetermined pattern, wherein the planar size of each of the first wirings is larger than the planar size of each of the second wirings, and wherein the planar size of each of the fourth wirings is larger than the planar size of each of the fifth wirings.