Patent ID: 8537524

Claim:
An on-chip capacitor comprising: a first layer comprising a first-layer first-polarity conducting strip and a first-layer second-polarity conducting strip, wherein the first-layer second-polarity conducting strip is arranged adjacent to and spaced apart from the first-layer first-polarity conducting strip, a second layer comprising a second-layer first-polarity conducting strip and a second-layer second-polarity conducting strip, wherein the second-layer second-polarity conducting strip is arranged adjacent to and spaced apart from the second-layer first-polarity conducting strip, wherein the second-layer second-polarity conducting strip is arranged overlying the first-layer second-polarity conducting strip, wherein the second-layer first-polarity conducting strip is arranged overlying the first-layer first-polarity conducting strip; wherein the first-layer first-polarity conducting strip electrically couples with the second-layer first-polarity conducting strip; and wherein the first-layer second-polarity conducting strip electrically couples with the second-layer second-polarity conducting strip.