Patent ID: 7994068

Claim:
A method for fabricating a 3-D monolithic memory device, comprising: patterning a first silicon-oxynitride layer in a layered structure to provide a first patterned silicon-oxynitride layer, the layered structure includes a first amorphous carbon layer below the first silicon-oxynitride layer, and a first polycrystalline layer below the first amorphous carbon layer; patterning the first amorphous carbon layer using the first patterned silicon-oxynitride layer to provide a first patterned amorphous carbon layer; patterning the first polycrystalline layer using the first patterned amorphous carbon layer to provide a first plurality of pillars which comprise diodes in a first level of the 3-D monolithic memory device; forming a second polycrystalline layer above the first plurality of pillars, a second amorphous carbon layer above the second polycrystalline layer, and a second silicon-oxynitride layer above the second amorphous carbon layer; patterning the second silicon-oxynitride layer to provide a second patterned silicon-oxynitride layer; patterning the second amorphous carbon layer using the second patterned silicon-oxynitride layer to provide a second patterned amorphous carbon layer; and patterning the second polycrystalline layer using the second patterned amorphous carbon layer to provide a second plurality of pillars which comprise diodes in a second level of the 3-D monolithic memory device.