Patent ID: 8799592

Claim:
A computer system, comprising: a processor; and a memory containing machine executable instructions for execution by the processor, wherein the memory comprises: a first guest operating system comprising a first portion of the memory; a second guest operating system comprising a second portion of the memory; an address exchange module for exchanging memory address handles between the first guest operating system and the second guest operating system, wherein the first guest operating system comprises a first address exchange module driver for exchanging the memory address handles using the address exchange module, wherein the second guest operating system comprises a second address exchange module driver for exchanging the memory address handles using the address exchange module; a data mover for moving data between the first portion of the memory and the second portion of the memory; an emulated input output memory management unit for controlling the data mover; and wherein execution of the instructions causes the processor to: register accessible memory chosen from the second portion of the memory with the emulated input output memory management unit; write address handles of the accessible memory to the address exchange module using the second address exchange module driver; read the address handles from the address exchange module using the first address exchange module driver; determine if a write address of a request to write the data to the second memory portion is within the accessible memory using the emulated input output memory management unit; and move the data into the second portion of the memory using the data mover if the write address is within the accessible memory.