Patent ID: 8716993

Claim:
A low dropout (LDO) regulator comprising: a voltage regulation loop for providing an output voltage to an output terminal by changing a conductivity of an output transistor in response to a difference between a feedback voltage and a reference voltage, the feedback voltage proportional to the output voltage, the voltage regulation loop including an amplifier having a current bias input for receiving a bias current; and a bias current control circuit for providing the bias current to the current bias input, wherein the bias current control circuit comprises: a first current source for providing a substantially constant current to a node; a second current source for providing a variable bias current proportional to an output current on the output terminal to the node; and a switched current source for providing an additional current to the node when the reference voltage is greater than the feedback voltage by more than an offset voltage, wherein the bias current control circuit provides the bias current to the current bias input in response to a total current into the node.