Patent ID: 7755182

Claim:
A semiconductor device including a first power amplifying system and a second power amplifying system, comprising: (a) a wiring substrate having a main surface and a back surface which is opposite to the main surface, the back surface having two pairs of sides in a plan view; (b) a semiconductor chip including a first transistor and a second transistor, mounted over the main surface of the wiring substrate, the first power amplifying system being comprised of the first transistor, the second power amplifying system being comprised of the second transistor; (c) a plurality of first electrode terminals disposed over the back surface of the wiring substrate, the plurality of first electrode terminals being arranged along each of the two pairs of sides, the plurality of the first electrode terminals including a first input terminal, a first output terminal, a second input terminal and a second output terminal, the first input terminal and the first output terminal being used for inputting and outputting of signals for the first power amplifying system, respectively, the second input terminal and the second output terminal being used for inputting and outputting of signals for the second power amplifying system, respectively; and (d) a plurality of second electrode terminals disposed over the back surface of the wiring substrate, the plurality of second electrode terminals being disposed inside the plurality of the first electrode terminals in a plan view, the plurality of the second electrode terminals being used for ground potential supply to the first and second power amplifying systems, an area of each of the first electrode terminals being smaller than that of each of the second electrode terminals.