Patent ID: 8395208

Claim:
A semiconductor device comprising: a planar semiconductor layer on a substrate, the planar semiconductor layer having a second-conductive-type semiconductor layer therein and a metal-semiconductor compound on the second-conductive-type semiconductor layer; a pillar-shaped first-conductive-type semiconductor layer in contact with the substrate and extending from the planar semiconductor layer, the pillar-shaped first-conductive-type semiconductor layer having a second-conductive-type semiconductor layer in an upper portion thereof and a metal-semiconductor compound on the second-conductive-type semiconductor layer; a gate dielectric film in contact with the pillar-shaped first-conductive-type semiconductor layer; a gate electrode surrounding the pillar-shaped first-conductive-type semiconductor layer and separated therefrom by the gate dielectric film, the gate electrode having a metal-semiconductor compound thereon; and a sidewall-shaped dielectric film on each of an upper region of a sidewall of the pillar-shaped first-conductive-type semiconductor layer and in contact with a top of the gate electrode, and a sidewall of the gate electrode.