Patent ID: 6891404

Claim:
A frequency adjustment system, comprising: an integrated circuit for generating a control signal, said integrated circuit being adapted to receive an ENABLE-signal, the integrated circuit being triggered by said ENABLE-signal to generate said control signal; and a frequency adjustment circuit that receives said control signal generated by said integrated circuit, said frequency adjustment circuit comprising: means for determining a value of a frequency of said control signal received by said frequency adjustment circuit and generating an adjustment signal representative of said determined frequency value, said means for determining a frequency value comprising: a counter that receives said control signal and a reference signal, and determines a maximum number of consecutive pulses of said reference signal that are contained within one pulse of said control signal; and a decoder that receives a counter signal from said counter representative of said maximum number of consecutive pulses and generates said adjustment signal based on said counter signal; and means for automatically fine-tuning said integrated circuit based on said adjustment signal, such that said integrated circuit is adjusted to generate said control signal at a modified frequency, the modified frequency being different from said determined frequency value.