Patent ID: 7981721

Claim:
A method of manufacturing a transistor including the steps of: (a) providing a substrate comprising single crystal diamond material having a growth surface on which further layers of diamond material can be deposited, the growth surface or a region thereof having a root-mean-square roughness of 3 nm or less or being free of steps or protrusions larger than 3 nm, wherein said growth surface or region having a root-mean-square roughness of 3 nm or less or being free of steps or protrusions larger than 3 nm comprises a source-gate-drain region of the transistor; (b) depositing a plurality of further diamond layers on the substrate growth surface including at least one boron delta-doped layer and at least one adjacent layer of device grade or intrinsic diamond, with sharply defined interfaces between the respective layers, wherein the height of any step or protrusion on the growth surface of one of the layers on which a further layer is deposited is less than 50% of the thickness of the thinnest adjacent layer, a step or protrusion being defined as the change in height of the surface over a distance, parallel to the surface, equal to the thickness of the thinnest adjacent layer; and (c) attaching appropriate contacts to the respective diamond layers, thereby defining a transistor structure.