Patent ID: 7441330

Claim:
A process for producing a circuit board, comprising the steps of: detachably stacking a three-layer metal laminate on a surface of a supporting substrate such that a first metal layer of the three-layer metal laminate is in contact with the surface of the supporting substrate, the three-layer metal laminate including the first metal layer, a second metal layer that is not etched by an etching solution for the first metal layer, and a third metal layer composed of the same metal material as that of the first metal layer laminated in that order; etching the third metal layer of the three-layer metal laminate by photolithography into a predetermined interconnection pattern; forming a laminate on the interconnection pattern by a buildup method, the laminate including interconnection patterns with insulating layers provided therebetween, the interconnection patterns being electrically connected to each other; separating the first metal layer from the supporting substrate to detach the laminate; removing the first metal layer of the three-layer metal laminate by etching using the second metal layer as a barrier layer; and removing the exposed second metal layer by etching.