Patent ID: 6867494

Claim:
A semiconductor module comprising: a supporting substrate having a first major surface and a conductive connecting section, the connecting section being formed on the first major surface; a first semiconductor chip including a first MIS transistor of a first conductivity type and provided on the supporting substrate, a source of the first MIS transistor being formed on a bottom of the first MIS transistor and connected to the connecting section; a second semiconductor chip including a second MIS transistor of the first conductivity type and provided on the supporting substrate, a drain of the second transistor being formed on a bottom of the second MIS transistor and connected to the connecting section, and the drain of the second MIS transistor being electrically connected to the source of the first MIS transistor through the connecting section; an IC chip provided on the first major surface of the supporting substrate, the IC chip being connected to both a gate of the first MIS transistor and a gate of the second MIS transistor; an insulative envelope which covers the supporting substrate, the first semiconductor chip, the second semiconductor chip, and the IC chip; and connecting terminals electrically connected to the connecting section, the first semiconductor chip, and the second semiconductor chip, connecting terminals being partly exposed from the envelope.