Patent ID: 8829612

Claim:
A structure, comprising: a silicon layer having a top surface; a gate stack comprising a gate dielectric layer on said top surface of said silicon layer and an electrically conductive gate electrode on a top surface of said gate dielectric layer; a first spacer on a first sidewall of said gate stack and a second spacer on a second and opposite sidewall of said gate stack, a first width of said first spacer measured from said first sidewall in a first direction perpendicular to said first sidewall is equal to a second width of said second spacer measured from said second sidewall in a second direction perpendicular to said second sidewall, said first and second spacers decreasing in width from a bottom surface of said gate stack to a top surface of said gate stack; a first source/drain extension in said silicon layer under said first spacer and a second source/drain extension in said silicon layer under said second spacer, said first and second source/drain extensions separated by a channel region in said layer under said gate stack; a first diffused-source/drain in said silicon layer abutting said first source/drain extension and extending away from said channel region and a second diffused-source/drain in said silicon layer abutting said second source/drain extension and extending away from said channel region; and a first hetero-source/drain in said silicon layer, abutting said first source/drain extension and extending away from said channel region and a second hetero-source/drain in said silicon layer separated from said second source/drain extension by said second diffused-source/drain and extending away from said channel region, said first hetero-source/drain and said second hetero-source/drain both comprising silicon-germanium or both comprising carbon-doped silicon.