Patent ID: 7271441

Claim:
A semiconductor device comprising: a first semiconductor region of a first conductivity type that is formed in a lower portion of a semiconductor substrate and a portion of which extends to a top face of said semiconductor substrate; a second semiconductor region of a second conductivity type formed on said first semiconductor region in said semiconductor substrate; a third semiconductor region of the first conductivity type formed on said second semiconductor region in said semiconductor substrate; a fourth semiconductor region of the second conductivity type formed on said second semiconductor region and adjacent to said third semiconductor region in said semiconductor substrate; a trench penetrating through said second semiconductor region and said third semiconductor region and reaching said first semiconductor region; a gate insulating film formed on an inner wall of said trench; a gate electrode formed on said gate insulating film within said trench; and a fifth semiconductor region of the second conductivity type formed on said second semiconductor region in a portion of said semiconductor substrate sandwiched between said fourth semiconductor region and a portion of said first semiconductor region positioned on a side of said fourth semiconductor region, wherein an upper face of the portion of said first semiconductor region extending to the top face of said semiconductor substrate, an upper face of said third semiconductor region, an upper face of said fourth semiconductor region and an upper face of said fifth semiconductor region correspond to the top face of said semiconductor substrate, and an impurity concentration in said fifth semiconductor region is higher than an impurity concentration in said second semiconductor region.