Patent ID: 7984408

Claim:
A hardware description language (HDL) design structure encoded on a non-transitory machine-readable storage medium, said HDL design structure comprising elements that when processed in a computer-aided design system generates a machine-executable representation of a metal-oxide-semiconductor field-effect transistor, the HDL design structure comprising: a semiconductor layer composed of a semiconductor material; a dielectric layer disposed between the semiconductor layer and a substrate, the dielectric layer including first and second gas-filled voids with a first dielectric constant and a dielectric region with a second dielectric constant greater than the first dielectric constant, and the dielectric region disposed laterally between the first gas-filled void and the second gas-filled void; a source region in the semiconductor layer, the source region aligned vertically with the first gas-filled void; and a drain region in the semiconductor layer, the drain region aligned vertically with the second gas-filled void.