Patent ID: 8772769

Claim:
A semiconductor device comprising: a source electrode layer and a drain electrode layer; an oxide semiconductor layer comprising a first impurity region in contact with a side surface of the source electrode layer, a second impurity region in contact with a side surface of the drain electrode layer, and a channel formation region between the first impurity region and the second impurity region; a gate insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; a first conductive sidewall layer in contact with one side surface of the gate electrode layer; and a second conductive sidewall layer in contact with the other side surface of the gate electrode layer, wherein a length of an upper surface of the oxide semiconductor layer is longer than a length of a lower surface of the oxide semiconductor layer, wherein at least part of the first conductive sidewall layer overlaps with the source electrode layer with the gate insulating layer therebetween, and wherein at least part of the second conductive sidewall layer overlaps with the drain electrode layer with the gate insulating layer therebetween.