Patent ID: 7130010

Claim:
A method of fabricating an array substrate for an in-plane switching liquid crystal display device, comprising: forming a semiconductor layer, a drain electrode, a first capacitor electrode and a pixel electrode on a substrate using polycrystalline silicon, the semiconductor layer including an active area and a source area; forming a gate insulating layer, a gate line, a second capacitor electrode, a common line and a common electrode, wherein forming a gate insulating layer, a gate line, a second capacitor electrode, a common line and a common electrode include forming a first insulating layer and a first metal layer on the substrate including the semiconductor layer, the drain electrode, the first capacitor electrode and the pixel electrode and wherein forming the common electrode includes forming the common electrode to be alternatively arranged with the pixel electrode; patterning the first insulating layer and the first metal layer, wherein the gate line overlaps the active area of the semiconductor layer, the second capacitor electrode covers the first capacitor electrode, and the common electrode extends from the common line; forming an inter insulating layer to cover the gate line, the second capacitor electrode, the common line, and the common electrode by forming a second insulating layer and patterning the second insulating layer, the inter insulating layer having a source contact hole to expose the source area; and forming a data line on the inter insulating layer, wherein forming a data line includes forming and patterning a second metal layer, the data line being connected to the source area through the source contact hole.