Patent ID: 7964911

Claim:
A semiconductor element comprising: a field effect transistor including: a semiconductor layer; a first source/drain region which is a first conductivity type and formed in said semiconductor layer so as to include an upper surface of said semiconductor layer; a second conductivity type region which is a second conductivity type and formed in said semiconductor layer so as to include the upper surface and said first source/drain region; a drift region which is a first conductivity type and formed in said semiconductor layer so as to include the upper surface and said second conductivity type region; a first source/drain electrode which is formed so as to contact at least the upper surface of said first source/drain region; a gate electrode which is formed so as to face at least the upper surface of said second conductivity type region with a gate insulating film provided between said gate electrode and said second conductivity type region; and a second source/drain electrode which is connected to said drift region in an ohmic manner; a schottky electrode which is disposed on the upper surface of said drift region so as to form a schottky junction with the upper surface of said drift region; an interlayer insulating film which covers the upper surface of said semiconductor layer, said first source/drain electrode, said gate electrode and said schottky electrode; and a plurality of bonding pads which are disposed on said interlayer insulating film and each of which is electrically connected to at least one of said first source/drain electrode, said gate electrode and said schottky electrode; wherein: said semiconductor layer is divided into a plurality of cells by a virtual border line in plan view; said drift region and said second source/drain electrode are formed so as to extend over the plurality of cells; the plurality of cells are constituted of transistor cells in each of which said field effect transistor is formed and diode cells in each of which said schottky electrode is formed; and a bonding pad of said plurality of bonding pads is located above said schottky electrode of a diode cell such that said interlayer insulating film is between said bonding pad and said schottky electrode.