Patent ID: 8503583

Claim:
A receiver comprising: receiving circuitry configured to receive an Orthogonal Frequency Division Multiplexing signal obtained by modulating a common packet sequence and data packet sequence, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; first sorting circuitry configured to sort the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; second sorting circuitry configured to sort the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and switching circuitry configured to switch an output to error correction circuitry for handling error correction from one sorting circuitry over to other sorting circuitry if, while the one sorting circuitry supplies its output to the error correction circuitry, the other sorting circuitry completes its input of a predetermined unit of information to be processed.