Patent ID: 7718514

Claim:
A method of forming a conductive via in contact with a bulk semiconductor region of a semiconductor-on-insulator (“SOI”) substrate, the bulk semiconductor region being separated from a SOI layer of the substrate by a buried dielectric layer, the method comprising: a) forming a first opening in a conformal layer overlying a trench isolation region, the trench isolation region sharing an edge with the SOI layer; b) depositing a dielectric layer over a top surface of the conformal layer and the trench isolation region; c) forming a second opening extending through the dielectric layer and the first opening in the conformal layer, such that portions of the bulk semiconductor region and the top surface of the conformal layer are exposed within the second opening; and d) filling the second opening with at least one of a metal or a semiconductor to form a conductive element contacting the exposed portions of the bulk semiconductor region and the top surface of the conformal layer.