Patent ID: 6943081

Claim:
A method of forming storage nodes, the method comprising the steps of: forming transistors on predetermined portions of a semiconductor substrate; forming source contact patterns and drain contact patterns connected to respective sources and drains of the transistors, respectively; forming an interlayer insulating layer on an entire surface of the substrate in which the source contact patterns and the drain contact patterns are formed wherein the interlayer insulating layer has contact holes; forming storage node plugs passing through the contact holes in the interlayer insulating layer and connected to the source contact patterns, wherein the formation of the storage node plugs comprises the steps of, conformally forming an insulating etch stop layer on an entire surface of the substrate in which the contact holes are formed and in the contact holes, forming a conductive layer on an entire surface of the substrate in which the insulating etch stop layer is formed, the conductive layer filling the contact holes, and etching the conductive layer to expose the insulating etch stop layer formed on the interlayer insulating layer and simultaneously form conductive layer patterns within the respective contact holes; forming a mold layer on an entire surface of the resulting structure in which the storage node plugs are formed; patterning the mold layer to form storage node holes exposing the storage node plugs; etching the storage node plugs using the mold layer with the storage node holes as an etching mask, wherein the etching of the storage node plugs comprises the steps of, completely removing the storage node plugs to expose the insulating etch stop layer disposed at sidewalls and bottom of the contact holes, and removing the insulating etch stop layer disposed at the bottom of the contact holes thereby exposing portions of the source contact patterns; forming storage nodes in the contact holes, the storage nodes covering sidewalls of the storage node holes and being electrically coupled with the source contact patterns; and removing the mold layer to expose outer walls of the storage nodes.