Patent ID: 8766734

Claim:
A method for fabricating a through silicon via-based oscillator wafer-level-package structure, comprising steps: providing a silicon base having an oscillator unit disposed thereon, wherein said silicon base is fabricated with a process including steps: providing a second silicon wafer, and forming in said second silicon wafer at least two vias penetrating said second silicon wafer; forming an oxide layer on an upper surface and a lower surface of said second silicon wafer and on inner surfaces of said vias; electroplating a first metal layer on said oxide layer, wherein said first metal layer is filled into said vias to form at least two metallic conductive pillars, and wherein said first metal layer is extended toward said lower surface of said second silicon wafer; and electroplating a second metal layer on said lower surface of said second silicon wafer, wherein said second metal layer is electrically connected with said first metal layer, and wherein said oscillator unit is electrically connected with said metallic conductive pillars to receive or output signals through said first metal layer and said second metal layer; forming on said silicon base at least one package ring surrounding said oscillator unit; and disposing a silicon cap on said package ring to envelop said oscillator unit.