Patent ID: 7415544

Claim:
Architecture for the centralised control of events occurring in correspondence with remote peripheral electronic devices, comprising: at least one electronic central device ( 111 ), said electronic central device including a processing unit or CPU ( 123 ), a transmitting unit ( 115 ), a receiving unit ( 117 ) and a power supply unit ( 114 ); at least a device ( 121 ) for generating a network timing signal; at least one electronic peripheral device ( 11 a, 11 b, . . . 11 n ), said peripheral device being provided with a processing unit or CPU ( 23 ), a storage unit ( 25 ), a transmitting unit ( 15 ), a receiving unit ( 17 ), a device ( 21 ) for generating a local timing signal, a battery ( 13 ) and means for periodically interrupting and activating the electronic power supply to this transmitting and/or receiving unit, wherein said at least one peripheral device ( 11 a, 11 b, . . . 11 n ) is programmable by means of a flow of data autonomously output from said central device and received by said at least one peripheral device; wherein said peripheral device ( 11 a, 11 b, . . . 11 n ) is configured to switch over said transmitting and receiving units according to the following machine states: “sleeping state,” wherein the transmitting and receiving units are not supplied with power; “passive state,” wherein the receiving unit is supplied with power and the transmitting unit is not supplied with power; “active state,” wherein both the transmitting and receiving units are supplied with power, and wherein said peripheral device comprises means for imposing to said peripheral device a “sync state” where a clock of said peripheral device synchronises by means of a synchronization protocol with said network timing device, when the peripheral device has not received confirmation of the correct reception of transmitted data to the central device, said lack of confirmation being an indication of lack of synchrony with the central device.