Patent ID: 6929995

Claim:
A method of forming a high voltage metal oxide semiconductor (HVMOS) transistor comprising: providing a substrate having a first conductive type well; forming a polysilicon layer on the substrate; forming a first patterned photoresist layer on the polysilicon layer, and utilizing the first patterned photoresist layer as a hard mask to remove a portion of the polysilicon layer not covered by the first patterned photoresist layer such that a gate structure is formed; forming a second patterned photoresist layer onto the first patterned photoresist layer and the substrate such that two openings are formed alongside the gate; utilizing the first patterned photoresist layer and the second patterned photoresist layer as a hard mask to perform at least an ion implantation process for forming a second conductive type double diffuse drain via the openings; and removing the first patterned photoresist layer and the second patterned photoresist layer.