Patent ID: 8234458

Claim:
A method for executing a processing operation using data stored in a memory, the method comprising: generating a snoop request to determine whether first data stored in a local memory associated with a first processor is coherent relative to second data stored in a data cache associated with a second processor, the snoop request including: destination information that identifies the data cache on a serial interface bus, and a cache line address identifying where in the data cache the second data is located; causing the snoop request to be transmitted over the serial interface bus to the second processor based on the destination information that identifies the data cache; extracting the cache line address from the snoop request; determining whether the second data stored in the data cache at the cache line address is coherent relative to the first data stored in the local memory; generating a complete (CPL) message that includes: destination information that identifies the local memory on the serial interface bus, and completion information indicating that the first data is coherent relative to the second data; causing the CPL message to be transmitted over the serial interface bus to the first processor based on the destination information that identifies the local memory; and causing the processing operation to be executed on the first processor using the first data stored in the local memory.