Patent ID: 7540427

Claim:
An IC tag which has a structure comprising a first adhesive layer laminated on a surface of a substrate sheet, an electronic circuit and an IC chip connecting both ends of a line of the electronic circuit, both the electronic circuit and the IC chip being formed on a surface of the first adhesive layer, and a second adhesive layer laminated for covering the electronic circuit and the IC chip, wherein a release agent layer is further formed at positions corresponding to both separated end sections of the electronic circuit and located at the interface between the substrate sheet and the first adhesive layer, but is not formed at positions corresponding to the center section of the electronic circuit, wherein the release agent layer is formed to cover a range of 20 to 90 percent of an area surrounded by an outside circumference of the electronic circuit throughout the first adhesive layer such that the electronic circuit is rendered electrically inoperable when the substrate is peeled off from the IC tag.