Patent ID: 7807564

Claim:
A method for forming a low K dielectric layer, the method comprising: providing a substrate; forming a layer of transistor elements overlying the substrate; forming a first interlayer dielectric layer overlying the layer of transistor elements; forming an etch stop layer overlying the first interlayer dielectric layer; patterning the first interlayer dielectric layer to form a contact structure; filling the contact structure with metallization; forming a thickness of sacrificial layer overlying the contact structure; forming a metal layer overlying the thickness of sacrificial layer, the metal layer being coupled to the contact structure; forming one or more other layers overlying the metal layer; selectively removing the thickness of sacrificial layer with a wet etching process while maintaining the metal layer and etch stop layer intact to form an air gap between a portion of the etch stop layer and the one or more other layers and maintaining a portion of the thickness of the sacrificial layer for mechanical support; forming a low K layer by providing low K material within a portion of the air gap; and forming a passivation layer overlying the metal layer.