Patent ID: 8559154

Claim:
A system, comprising: a line status circuit configured to receive a line voltage and output a line status output representative of a first zero crossing ZC 1 of the line voltage; a processor circuit configured to output at least one first relay control signal in response to a line status output; a relay coupled to first, second and third line voltage inputs and configured to switch in response to the at least one first relay control signal, thereby coupling or decoupling the second and third line voltage inputs relative to a second zero crossing ZC 2 of the line voltage; a relay status circuit configured to output a relay status output representative of a first switching of the relay in response to the at least one first relay control signal; and wherein the processor circuit is further configured to output at least one subsequent relay control signal, so as to trigger a subsequent switching of the relay, relative to at least one subsequent zero crossing ZC n of the line voltage, and wherein the subsequent switching occurs closer in time to the at least one zero crossing ZC n than the first switching occurs relative to the second zero crossing ZC 2 .