Patent ID: 8270196

Claim:
An integrated circuit (IC) including embedded non-FLASH non-volatile memory, comprising: a semiconductor substrate including circuitry fabricated on a logic plane of the semiconductor substrate, the circuitry including a control unit including FLASH emulation interface circuitry operative to electrically communicate with a plurality of signals configured for data operations to FLASH memory, the plurality of signals including an address signal and at least one data operation signal, an input/output (I/O) unit in electrical communication with the control unit and configured for electrical communication with an external system, the I/O unit operative to electrically communicate signals between the control unit and the external system, a data bus, an address bus, the data bus and the address bus are in electrical communication with the control unit and the I/O unit, and a logic block in electrical communication with the control unit and the I/O unit; a vertically configured memory plane in contact with and fabricated directly above the semiconductor substrate, the vertically configured memory plane is positioned over the logic plane; a non-volatile memory array embedded in the vertically configured memory plane and electrically coupled with the control unit, the non-volatile memory array configured for data storage use by the control unit, the non-volatile memory array including a plurality memory elements, each memory element (ME) having exactly two terminals comprised of a first terminal and a second terminal, each ME is operative to store at least one bit of data as a plurality of conductivity profiles that can be determined by applying a read voltage across the first and second terminals, the data is retained in the absence of electrical power, data is reversibly written by applying a write voltage across the first and second terminals, and a magnitude of the read voltage is less than a magnitude of the write voltage, wherein the FLASH emulation interface circuitry is operative to perform data operations on the non-volatile memory array in response to the plurality of signals and the data operations emulate FLASH memory data operations, and wherein the FLASH emulation interface circuitry is configured to perform a write operation to the non-volatile memory array without having to perform a FLASH erase operation prior to the write operation.