Patent ID: 7193472

Claim:
A power amplifier comprising: a divider circuit having an input end, a first branch, and a second branch for dividing an input signal received through the input end into a first input signal and a second input signal; a first amplifier circuit including a first transistor that has a first control terminal connected to the first branch of the divider circuit to receive the first input signal, a constant-potential terminal, and an output terminal through which a first output signal is issued, and a first output higher harmonic load control circuit connected to the output terminal of the first transistor, setting an even-numbered higher harmonic load of the first output signal at the output terminal of the first transistor to be a short-circuit, or a low impedance approximating a short-circuit, while setting an odd-numbered higher harmonic load of the output signal at the first output terminal to be an open-circuit, or at a high impedance approximating an open-circuit; a first impedance conversion circuit having an input end thereof connected to an output end of the first output higher harmonic load control circuit of the first amplifier circuit, and having an electrical length equivalent to one-quarter of the wavelength of an output signal from the first output higher harmonic load control circuit; a second impedance conversion circuit having an input end thereof connected to the second branch, and imparting a phase difference, which offsets a phase difference to be imparted by the first impedance conversion circuit, to the second input signal from the second branch; a second amplifier circuit including a second transistor that has a control terminal connected to an output end of the second impedance conversion circuit, a constant-potential terminal, and an output terminal through which a second output signal is issued, and a second output higher harmonic load control circuit connected to the output terminal of the second transistor, setting an even-numbered higher harmonic load of the second output signal at the output terminal of the second transistor to be an open-circuit, or a high impedance approximating an open-circuit, while setting an odd-numbered higher harmonic load of the second output signal at the output terminal of the second transistor to be a short-circuit, or at a low impedance approximating a short-circuit; and a combiner circuit having a third branch, a fourth branch, and an output end through which a third output signal is issued, the third branch being connected to an output end of the first impedance conversion circuit, and the fourth branch being connected to an output end of the second output higher harmonic load control circuit.