Patent ID: 8396105

Claim:
A receiver for receiving an analog input signal and recovering digitized, time discrete data signals for respective symbol periods of the analog input signal, the receiver comprising: an input for the analog signal; an adjustable equalizer, with an equalizer input coupled to the input for the analog signal, an equalizer output for an equalized signal and a setting input; a transition phase detector with an input coupled to the equalizer output, for detection of phase positions of transitions in the equalized signal; a digital post-processing circuit, comprising a spread detector with an input for receiving output of the transition phase detector, for evaluating a measure for spread of the detected phase positions of transitions accumulated over a plurality of the symbol periods, the digital post-processing circuit having an output coupled to the setting input of the adjustable equalizer, for adjusting a setting of the adjustable equalizer to a setting selected to minimize the detected spread; wherein the transition phase detector comprises: a clock generation circuit for generating or regenerating clock signals that indicate a plurality of respective phase positions in each symbol period; a sampling circuit with a timing control input coupled to the clock generation circuit, a signal input coupled to the equalizer output and a sample output; and a comparator circuit with input coupled to the sampling circuit for receiving pairs of sample values for successive phase positions and a comparator output coupled to the input of the spread detector.