Patent ID: 8183913

Claim:
An integrated circuit comprising: a first current source; a second current source electrically coupled with the first current source via a conductive line; a switch circuit coupled between the first current source and the second current source; a first circuit coupled between a first node and a second node, the first node being disposed between the first current source and the switch circuit, the second node being coupled with the first current source, wherein the first circuit is configured for substantially equalizing voltages on the first node and the second node; a second circuit coupled between a third node and a fourth node, the third node being disposed between the second current source and the switch circuit, the fourth node being coupled with the second current source, wherein the second circuit is configured for substantially equalizing voltages on the third node and the fourth node; a third current source; a comparator coupled between the second current source and the third current source; a controller coupled with an output end of the comparator; and an adjustable resistance circuit coupled with the controller, the adjustable resistance circuit being disposed between the first circuit and the second circuit.