Patent ID: 8664689

Claim:
A memory cell, comprising an access device comprising a multilayer stack comprising: a conductively doped strip of single-crystalline semiconductor extending in a first direction and having a first conductivity type, and a first doped semiconductor region having the first conductivity type in and more lightly doped than the conductively doped strip, the strip of single-crystalline semiconductor having a top surface in the first doped semiconductor region, the first doped semiconductor region being at the top surface of the strip, and having a depth less than the depth of the strip; an insulating layer over the strip including a via in the insulating layer over the first doped semiconductor region; and a doped semiconductor plug within the via and contacting the first doped semiconductor region on the top surface of the strip, the doped semiconductor plug having a second conductivity type opposite the first conductivity type, so that the first doped semiconductor region and the doped semiconductor plug define a pn junction at the top surface of the strip, wherein the doped semiconductor plug comprises a polycrystalline semiconductor, and the doping concentration of doped semiconductor plug is more than 10 times higher than the doping concentration of the first doped semiconductor region.