Patent ID: 7863686

Claim:
A nonvolatile memory device, comprising: a semiconductor substrate; a device isolation layer on the semiconductor substrate; a fin-shaped active region formed between portions of the device isolation layer; a select gate line and a word line that cross over the active region, each of the select gate line and the word line having a surface opposite to a sidewall of the active region; source and drain regions formed in the active region; a sidewall protection insulating layer formed on the sidewall of the active region in which the source and drain regions are formed, the sidewall protection insulating layer being formed on the device isolation layer; and an interlayer insulating layer that covers the active region and the sidewall protection insulating layer, wherein the sidewall protection insulating layer has an etch selectivity with respect to the interlayer insulating layer; wherein a top surface of the active region, in which the source and drain regions are formed, is in contact with the interlayer insulating layer; and wherein the sidewall of the active region is in contact with the sidewall protection insulating layer.