Patent ID: 8393077

Claim:
A method for fabrication of passive electronic components, the method comprising; depositing a sacrificial layer on a carrier; forming a curable resin layer on top of said sacrificial layer and patterning said curable resin to form a cured resin template, the cured resin template comprising a first pattern level and a second pattern level; depositing a metal material into said first pattern level to form a first structure; forming a dielectric material on exposed portions of said first structure; using a nonselective subtractive process to expose said sacrificial layer in a bottom of said second pattern level; and depositing a metal material into said second pattern level to form a second structure which includes a portion which crosses over said dielectric material; wherein a first terminal is connected to said first structure and a second terminal is connected to said second structure, said first structure and said second structure forming a passive electronic component between said first terminal and said second terminal.