Patent ID: 7414418

Claim:
An apparatus for interfacing test signals between a tester and an electronic device under test, said apparatus comprising: a structure; a plurality of channel terminals disposed on said structure and configured to connect electrically with communications channels from said tester; a plurality of probes disposed on said structure and configured to contact test features of said electronic device; a plurality of electrically conductive paths connecting ones of said channel terminals with ones of said probes; and a plurality of shunt resistors disposed on said structure, each said shunt resistor directly connected to one of said conductive paths, wherein: at least one of said conductive paths comprises a plurality of branches, each said branch is electrically connected to one of said channel terminals, each said branch terminates in a different one of said probes, each said branch comprises an isolation resistor disposed within the branch between said channel terminal and said probe in which said branch terminates, and each said branch is electrically connected from between said isolation resistor disposed within said branch and said probe in which said branch terminates, through one of said shunt resistors to a voltage potential.