Patent ID: 7732878

Claim:
A semiconductor structure comprising: a substrate; a gate stack on the substrate; a gate silicide region in a top portion of the gate stack; a source region adjacent the gate stack; a source silicide region on the source region; a drain region adjacent and on an opposite side of the gate stack from the source region; a drain silicide region on the drain region, wherein the source and drain silicide regions have a substantially different thickness or a substantially different composition from the gate silicide region; a protection layer on the source and drain silicide regions, wherein the protection layer comprises a source portion directly over the source region, and a drain portion directly over the drain region; a contact etch stop layer (CESL) over the protection layer and extending over the gate silicide region; and a contact plug extending from over the CESL into the CESL, wherein the contact plug is in physical contact with the CESL, and not in physical contact with the protection layer.