Patent ID: 7316972

Claim:
A method for forming a semiconductor device comprising: forming a first group of gate electrodes on a first region of a substrate so that the first group of gate electrodes are densely arranged; forming a second group of gate electrodes on a second region of the substrate so that the second group of gate electrodes are sparsely arranged; forming a first dielectric film as a single layer on the first region and the second region of the substrate on which the gate electrodes are formed so that the first dielectric film fills entire spaces between the gate electrodes; planarizing the first dielectric film; forming a second dielectric film on the first dielectric film, the second dielectric film having an etching rate different from an etching rate of the first dielectric film; and then forming contact holes to a uniform depth through the first dielectric film and the second dielectric film, wherein an entire surface of the first dielectric film is continuous and higher than a top surface of the gate electrodes just prior to planarizing the first dielectric film, and wherein planarizing the first dielectric film results in the first dielectric film having a uniform thickness at those portions through which said contact holes are formed.