Patent ID: 8017480

Claim:
A method for making a memory device, comprising: forming a first dielectric layer on a substrate; forming a first polysilicon layer over the dielectric layer; patterning and etching the first polysilicon layer to form a floating gate; forming a buried diffusion region in the substrate after formation of the floating gate; forming an inter-poly dielectric over the patterned first polysilicon layer and the buried diffusion region; patterning the inter-poly dielectric to define an area for buried diffusion oxide formation; forming a buried diffusion oxide that is self-aligned to the floating gate and in the buried diffusion region such that the buried diffusion oxide encroaches into the buried diffusion region and extends under an edge of the first dielectric layer; forming a second polysilicon layer directly on the inter-poly dielectric; and etching the second polysilicon layer to define a control gate for the device directly over the inter-poly dielectric and the floating gate, such that the control gate is not in contact with the floating gate.