Patent ID: 7727856

Claim:
A method of forming a semiconductor structure, comprising the steps of: providing a substrate; forming a trench within the substrate, the trench having opposing sidewalls; forming a stress layer over the opposing trench sidewalls, the stress layer having an inherent stress; the stress layer having stress layer sidewalls over the trench sidewalls; implanting ions into one or more portions of the stress layer to form ion-implanted relaxed portions; the portions of the stress layer that are not implanted are un-implanted portions; whereby the inherent stress of the one or more ion-implanted relaxed portions is relaxed; forming at least one P-metal-oxide semiconductor field effect transistor (P-MOSFET) proximate the trench, the at least one P-MOSFET including a channel region having a channel width that roughly parallels the one or more ion-implanted relaxed portions; and forming at least one N-metal-oxide semiconductor field effect transistor (N-MOSFET) proximate the trench, the at least one N-MOSFET including a channel region having a channel width that is roughly perpendicular to the one or more ion-implanted relaxed portions, the stress layer having an inherent tensile stress.