Patent ID: 7584369

Claim:
A method of controlling heat generation in a processor, the method comprising: receiving power by a processor that includes a plurality of processor cores on a common semiconductor die, each processor core being enabled or disabled; disabling first selected processor cores, by a core power controller, during a first power control time interval while other processor cores remain enabled, the first power control time interval exhibiting a predetermined period of time; disabling second selected processor cores, by the core power controller, during a second power control time interval following the first power control time interval, the second selected processor cores of the second power control time interval being different from the first selected processor cores of the first power control time interval; disabling other selected processor cores, by the core power controller, during successive power control time intervals that follow the second power control time interval to form a complete cycle wherein all processor cores have been disabled once; sensing, by a thermal sensor in each processor core, the temperature of each processor core; receiving, by the core power controller, temperature information from the temperature sensor of each processor core; and controlling the processor cores, by the core power controller, to disable those processor cores whose temperatures exceed a first predetermined temperature value.