Patent ID: 7449403

Claim:
A method for manufacturing a semiconductor device, the method comprising the steps of: forming a gate oxide film on a semiconductor substrate; successively depositing a first gate conductive layer, a second gate conductive layer and a hard mask layer on the gate oxide film; etching the second gate conductive layer and the hard mask layer over the whole thicknesses thereof and etching the first gate conductive layer over a partial thickness thereof to form first and second gate conducive layer patterns and a hard mask layer pattern, wherein a portion of the unetched first gate conductive layer is exposed; forming a first spacer of an oxide film on sidewalls of the etched first gate conductive layer, the second gate conductive layer patterns and the hard mask layer pattern, wherein a portion of the unetched first gate conductive layer is covered by the first spacer; etching a remaining portion of the first gate conductive layer not covered by the first spacer, such that a gate electrode consisting of the first and second gate conductive layer patterns is formed, wherein the remaining portion inclines downwardly; and forming a second spacer of a nitride film on sidewalls of the first spacer and the first gate conductive layer pattern.