Patent ID: 8572541

Claim:
A method of designing an integrated circuit in a computer implemented design system, the method comprising: performing a free physical placement of a system design comprising a plurality of power domains, wherein the power domains are not constrained to physical regions; assigning a physical region to each of the power domains based on the free placement of cells in the power domains; performing a soft cluster placement of the system design with each power domain and corresponding physical region defined as a soft cluster; refining at least one physical region based on the soft cluster placement; redefining cells in at least one power domain based on the soft cluster placement of the cells and the corresponding physical region; and performing a hard cluster placement of the system design with each power domain and corresponding physical region defined as a hard cluster to generate final power domains, wherein the performing a free placement, the assigning a physical region, the performing a soft cluster placement, the refining at least one physical power domain, and the performing a hard cluster placement are performed on the computer implemented design system.