Patent ID: 7266578

Claim:
A reciprocal square rooting circuit for computing a reciprocal square root S[n] for a radix of r by using a partial result S[j], a residual W[j], and a product P[j] of an operand X and the partial result S[j] after j iterations of calculation, comprising: as components of a circuit for performing one iteration of n iterations of calculation for j=0 to n−1 by using predetermined recurrence equations, a digit selection circuit which determines a reciprocal square root digit q j+1 from values of most significant several bits of rW[j] and P[j]; a first 1-digit multiplier which generates Xq j+1 by multiplying the operand X by an output from the digit selection circuit; a first carry-save adder which adds 2P[j] and an output from the first 1-digit multiplier; a second 1-digit multiplier which multiplies an output from the first carry save adder by an output from the digit selection circuit; a second carry save adder which calculates W[j+1] by adding rW[j] and an output from the second 1-digit multiplier; a third carry-save adder which adds P[j] and the output from the first 1-digit multiplier; and a converter which converts S[j] into S[j+1] in accordance with the output from the digit selection circuit.