Patent ID: 7494921

Claim:
A method of forming an aluminum line of a semiconductor device, the method comprising: sequentially applying a first A metal thin layer, a first aluminum layer, and a first B metal thin layer on an interlayer insulating layer including one of a contact and a via; applying photoresist and selectively etching the first A metal thin layer, the first aluminum layer, and the first B metal thin layer to form a first metal line pattern; applying a first intermetallic dielectric layer on the first metal line pattern; removing the first B metal thin layer by a chemical mechanical planarization process to form a first stage metal line; sequentially applying a second aluminum layer and second metal thin layer; applying photoresist and selectively etching the second aluminum layer and the second metal thin layer to form a second metal line pattern which is the same as the first metal line pattern; applying a second intermetallic dielectric layer on the second metal line pattern; and performing a chemical mechanical planarization process on the second intermetallic dielectric layer to form a second stage metal line.