Patent ID: 6986089

Claim:
A scannable flip-flop comprising: an input circuit including an AND gate having a first input receiving a scan enable signal, a second input receiving a data input signal and an output, and a NOR gate having a first input connected to said output of said AND gate, a second input receiving a scan data signal from a prior scannable flip-flop in a serial chain and an output forming an output of said input circuit; a latch circuit having an input connected to said output of said input circuit and an output, said latch circuit storing a state at said input and supplying said state to said output; and an output circuit including an inverter having an input connected to said output of said latch circuit and an output supplying a data output, and a NOR gate having a first input receiving said scan enable signal, a second input connected to said output of said latch circuit and an output supplying a scan data output connected to said scan data input of a next flip-flop in said serial chain.