Patent ID: 7157336

Claim:
A method of manufacturing a semiconductor device comprising: forming a gate electrode on a semiconductor substrate through a gate insulated film; forming source/drain regions to be adjacent to said gate electrode; forming an interlayer insulating film above the gate electrode, wherein the interlayer insulating film comprises: a first layer that serves as an etching stopper; and a second layer above the first layer; forming metallic wiring through an interlayer insulating film covering said gate electrode; covering a portion of the metallic wiring with a photoresist but providing an opening for impurities to access the substrate such that the metallic wiring is exposed at all side surfaces of the opening, wherein the opening penetrates the second layer and reaches the first layer; and implanting impurity ions into a surface of said semiconductor substrate using an exposed portion of said metallic wiring and the photoresist as a mask, wherein (i) writing information into each element constituting a mask ROM and constituting a switch which is connected to a pad, and (ii) changing an outputting manner at an output port, are carried out by said implanting impurity ions in a single implanting operation.