Patent ID: 8484597

Claim:
An integrated circuit manufacturing method comprising: calculating a period of signal propagation time of a path within a circuit in accordance with a signal propagation characteristic of circuit elements included in the circuit and a signal propagation characteristic of a transmission path which connects the circuit elements to each other; selecting, by a computer, a path, as a target path, of which the signal propagation time does not satisfy a predetermined standard; extracting a value of a parameter which characterizes at least a part of a shape of a design pattern of a transistor on the target path; calculating, by the computer, a threshold value of the transistor from the extracted parameter value according to a functional relation between the parameter and the threshold value of the transistor, which is determined based on a first empirical value or a first experimental value; calculating, by the computer, a difference between the calculated threshold value and a target threshold value; calculating, by the computer, a change quantity of a gate length corresponding to the difference between the calculated threshold value and the target threshold value according to the functional relation between the threshold value of the transistor and the gate length, which is determined based on a second empirical value or a second experimental value; and changing, by the change quantity, the gate length of the transistor on the target path; and manufacturing, by a manufacturing device, an integrated circuit based on design information of the circuit including the transistor of which the gate length is changed.