Patent ID: 7569901

Claim:
A P-channel MOS gated device which is resistant to single event radiation failure and having improved total dose radiation resistance; said device comprising: a P-type substrate having parallel upper and lower surfaces; a plurality of laterally spaced N-type body regions extending from said upper surface into said substrate; at least one respective P-type source region formed in each of said body regions in said upper surface of said substrate and defining a respective channel region in said upper surface in said N-type body region; a gate electrode comprised of polysilicon implanted with p-type dopants disposed atop and insulated from said channel region and operable to invert said channel region in response to application of a suitable gate voltage to said gate electrode said gate electrode being insulated from said channel region by a gate oxide layer comprising silicon dioxide, said gate oxide layer being comprised of radiation hardened silicon dioxide and less than 1000 Å thick; an interlayer oxide disposed over each gate electrode and having tapered profile portions each aligned with a respective P-type source region; and a source electrode disposed atop said upper surface and connected to said at least one P-type source region; wherein said gate oxide is capable of withstanding damage due to total radiation dose and capable of withstanding damage due to a single event effect that may cause a threshold voltage shift to −5 volts.