Patent ID: 7970987

Claim:
A method of operating a non-volatile memory system, comprising: providing a plurality of blocks of memory storage elements that are individually erasable as a unit and which are individually organized into a plurality of pages of memory storage elements that are individually programmable together, programming at least one page of data in one of the plurality of blocks; programming at least one page of new data in one of said one or another of the plurality of blocks, the at least one page of new data rendering the at least one page of data to become at least one page of superceded data identifying the at least one page of superceded data and the at least one page of new data by a common logical address, recording an indication of a relative time of programming the at least one page of new data and the at least one page of superceded data; and wherein the at least one page of superceded data is less than all the data contained in said one block.