Patent ID: 7817214

Claim:
A thin film transistor (TFT) array panel comprising: a substrate; a gate line comprising a gate electrode disposed on the substrate; a storage electrode line comprising a storage electrode disposed on the substrate; a gate insulating layer disposed on the gate line, the storage electrode line, and the substrate; a semiconductor layer disposed on the gate insulating layer; a data line and a drain electrode disposed on the gate insulating layer and the semiconductor layer; a storage conductor disposed as the same layer as the data line on the gate insulating layer and connected with the drain electrode; a passivation layer disposed on the data line, the drain electrode, and the storage conductor; and a pixel electrode disposed on the passivation layer, connected with the drain electrode, and comprising a plurality of cutout portions, wherein the storage electrode and the storage conductor comprise correspondingly shaped slant portions that overlap the cutout portions and overlap each other with the gate insulating layer interposed therebetween, and wherein the slant portion of the storage conductor and the slant portion of the storage electrode extend along each other.