Patent ID: 7565465

Claim:
A pushback FIFO comprising: a data input for receiving input data values; a data output for providing output data values; a standard FIFO structure having a FIFO input and a FIFO output, the FIFO input in communication with the data input of the pushback FIFO, the standard FIFO structure comprising a plurality of logically sequentially-linked storage locations adapted to store the input data values received via the FIFO input in a first-in-first-out fashion so that the input data values are unloaded from the standard FIFO structure, as unloaded data values, in a same sequence in which the input data values were loaded into the standard FIFO structure; and pushback logic having a pushback logic input and a pushback logic output, the pushback logic input in communication with the FIFO output and the pushback logic output in communication with the data output, the pushback logic configured to receive each unloaded data values from the standard FIFO structure, and further configured, for each unloaded data value, to store the unloaded data value in a storage element, to provide the unloaded data value to the data output, and, if a determination is made that the unloaded data value should not have been unloaded from the standard FIFO structure, to provide the unloaded data value from the storage element to the data output.