Patent ID: 7549105

Claim:
A computer implemented method for constructing a parity check matrix that corresponds to a GRS (Generalized Reed-Solomon)-based irregular LDPC (Low Density Parity Check) code, the method comprising: choosing a plurality of possible bit degree distributions for an LDPC code block; selecting a bit degree distribution from among the plurality of possible bit degree distributions, wherein the selected bit degree distribution has a best performance threshold among the plurality of possible bit degree distributions; decomposing a parity check matrix that corresponds to a GRS-based regular LDPC code into a plurality of partial-matrices based on the selected bit degree distribution, wherein each partial-matrix of the plurality of partial-matrices has a corresponding bit degree and each partial-matrix of the plurality of partial-matrices has a corresponding plurality of permutation matrices; and replacing at least one permutation matrix within at least one partial-matrix of the plurality of partial-matrices with a zero matrix thereby generating a parity check matrix that corresponds to a GRS-based irregular LDPC code; and decoding an LDPC coded signal, that has been encoded using the GRS-based irregular LDPC code, using the parity check matrix that corresponds to the GRS-based irregular LDPC code, thereby making a best estimate of at least one information bit encoded within the LDPC coded signal.