Patent ID: 8903881

Claim:
An arithmetic circuit for quantizing pre-quantized data, the arithmetic circuit comprising: a first input register to store first-format pre-quantized data that includes a mantissa of a floating-point number using a base-N numbering system (N: integer larger than or equal to 2), and includes an exponent for the mantissa; a second input register to store a quantization target exponent indicative of an exponent to be achieved for quantization of the pre-quantized data; an exponent-correction-value indicating unit to indicate an exponent correction value for the quantization target exponent; an exponent generating unit to generate a quantized exponent obtained by subtracting the exponent correction value from the quantization target exponent; a shift amount generating unit to generate a shift amount obtained by subtracting the exponent of the pre-quantized data and the exponent correction value from the quantization target exponent; a shift unit to generate a quantized mantissa obtained by shifting the mantissa of the pre-quantized data by the shift amount generated by the shift amount generating unit; and a first output register to store quantized data that includes the quantized exponent generated by the exponent generating unit and the quantized mantissa generated by the shift unit.