Patent ID: 8078836

Claim:
A computer implemented method of shuffling packed data elements comprising: decoding a single instruction specifying a single field of per-lane control bits, and indicating a source operand and a destination operand, the source and destination operands having corresponding pluralities of multi-bit lanes, each multi-bit lane having a plurality of data elements; and responsive to decoding the single instruction and the single field of per-lane control bits, for each of a plurality of data elements of a first lane of the destination operand, selecting and storing any one of a plurality of data elements of a first lane of the source operand with the single field of per-lane control bits, and for each of a plurality of data elements of a second lane of the destination operand, selecting and storing any one of a plurality of data elements of a second lane of the source operand with the single field of per-lane control bits, wherein same bits of the single field of per-lane control bits are used for data elements in corresponding positions of the first and second lanes of the destination operand.