Patent ID: 7219177

Claim:
A method for connecting buses with different clock frequencies, comprising: (a) receiving a request, wherein the request is transmitted from a master to a slave; (b) if the clock frequency of the master is lower than that of the slave such that the slave sees more requests than the master does, masking redundant signal cycles of the request to prevent the slave from repeatedly receiving the request; (c) transferring the request to the slave while clock signals of the master and the slave are synchronous, if the bus of the slave is in a busy state, setting the execution priority of the request to the lowest priority; and after the bus of the slave is in an idle state, transferring the request with the highest execution priority to the slave; (d) if the clock frequency of the master is higher than that of the slave such that the slave cannot receive the request in time, lengthening the request to synchronize the signal of the request and a clock signal of the slave; and (e) transferring output data responded from the slave to the master.