Patent ID: 8031531

Claim:
A memory system comprising: cells configured to store charge, wherein for each of the cells, a level of charge stored in the cell decays over time according to lifetime erase operations performed on the cell; a control module configured to increase charge levels of the cells to at least partially offset the charge level decay, wherein the control module is configured to increase the charge levels of the cells without first erasing the cells, and wherein the control module is configured to increase the charge levels of the cells in response to a read performed on the cells indicating that at least a predetermined amount of the charge level decay has occurred; and nonvolatile memory configured to store a count of lifetime erase operations performed on the cells, wherein the control module is configured to use the count to determine a charge level decay characteristic for at least one of the cells, and wherein the nonvolatile memory is configured to store respective counts for each of a plurality of groups of the cells.