Patent ID: 6845491

Claim:
A method for designing an integrated circuit (IC) and an interconnect system for conveying a signal between a circuit node inside the IC and a circuit node outside the IC, the method comprising the steps of: a. generating a first design describing a first portion of the interconnect system external to the IC, b. generating a second design of the IC including components of a second portion of the interconnect system internal to the IC; c. generating an impedance model of the interconnect system based on the first and second designs; d. processing the impedance model of the interconnect system to determine whether the interconnect system described by the first and second designs will fail to meet a constraint on a frequency response of the interconnect system; and e. upon determining at step d that the interconnect system will fail to meet the constraint, modifying at least one of the first and second designs to modify the interconnect system, and then repeating steps c and d until said first and second designs meet said constraint.