Patent ID: 7427544

Claim:
A semiconductor device comprising: a semiconductor substrate; a first element region which is provided in the semiconductor substrate; a second element region which is provided in the semiconductor substrate while being spaced part from the first element region; an element isolation insulating film which is provided in the semiconductor substrate between the first element region and the second element region; a gate electrode which runs over the element isolation insulating film, first element region, and second element region; a first stopper film which is formed on the gate electrode and first element region to cover the first element region and give a tensile stress; a second stopper film which is formed on the gate electrode and second element region to cover the second element region and give a compressive stress; and a contact which is connected to the gate electrode on the element isolation insulating film, wherein the first stopper film and second stopper film overlap each other at least partially on the element isolation insulating film, and a total thickness of the first stopper film and second stopper film on the gate electrode on the element isolation insulating film is smaller than a total thickness outside the gate electrode.