Patent ID: 7936071

Claim:
A semiconductor device comprising: a semiconductor substrate; a first source region formed in the semiconductor substrate; a drain region formed in the semiconductor substrate; a first insulation member formed above the semiconductor substrate; a first conductive member formed on a first surface of the first insulation member; a second conductive member formed on a second surface of the first insulation member, the second surface opposite the first surface, the second conducting member being electrically disconnected from the first conducting member; a passivation film having an opening formed above the second conductive member; a first external terminal formed on the passivation film, the first external terminal being electrically connected to the second conductive member through the opening; a second external terminal formed on the passivation film, wherein all portions of the first source region and all portions of the drain region are located under the first external terminal, the first conductive member and the second conductive member do not overlap each other under the first and second external terminals, and a portion of the second conductive member is located under the second external terminal; a third external terminal; a third conductive member that is connected to the second external terminal at a second connection point; and a fourth conductive member that is connected to the third external terminal at a third connection point, wherein the second conductive member is connected to the first external terminal at a first connection point, the first connection point, the second connection point, and the third connection point being aligned in a first direction.