Patent ID: 7134103

Claim:
A system for determining a voltage drop across an entire integrated circuit package, said system comprising: a geometric description of said entire integrated circuit package including a description of each layer included in said package; said system including a CPU executing code for subdividing each layer included in said description into a plurality of non-uniform areas; said CPU executing code for determining a resistive netlist of said entire integrated circuit package that represents said entire integrated circuit package as a whole utilizing said plurality of non-uniform areas; wherein said CPU executing code for subdividing said description into a plurality of non-uniform areas further comprises one of: said CPU executing code for recursively bisecting each share in said description using a bounding box and then shrinking said bounding box to fit said shape until for each resulting bounding box a minimum size occurs; and said CPU executing code for recursively bisecting each shape in said description using a bounding box and then shrinking said bounding box to fit said shape until for each resulting bounding box a percentage of said resulting bounding box is occupied by a solid shape that exceeds a preset threshold.