Patent ID: 8214575

Claim:
A module comprising: a substrate; a signal line that includes a first segment connected to a second segment via a first turn portion such that the first segment of the signal line and the second segment of the signal line are oriented in different directions, and wherein a data signal traverses the signal line starting at a first edge finger disposed on the substrate, then traverses the first segment of the signal line, then traverses the first turn portion, then traverses the second segment of the signal line, all before terminating at a first termination element; a clock line that includes a first segment connected to a second segment via a second turn portion such that the first and second segments of the clock line are oriented in different directions the clock line to provide a clock signal that traverses the clock line starting at a second edge finger, then traverses the first segment of the clock line, then traverses the second turn portion, then traverses the second segment of the clock line, all before terminating at a second termination element; and a plurality of memory devices disposed on the substrate, wherein each memory device of the plurality of memory devices is connected to the second segment of the signal line and second segment of the clock line such that the signal and clock signal traversing along the signal line and clock line, respectively, arrive at the plurality of memory devices in sequence.