Patent ID: 6959251

Claim:
A semiconductor inspection and review system comprising: an inspection system that compares at least two semiconductor device areas, determines differences between the device areas, and generates a set of data corresponding to the differences, wherein the set of data comprises a plurality of feature magnitudes and feature locations; an inspection system memory unit that stores the set of data corresponding to the differences as a native file; and a review station being communicatively linked to the inspection system such that the review station can read from and write to the set of data stored as the native file at the inspection system memory unit, categorize such differences within the set of data which cannot be classified on the inspection system, and optimize a recipe on the inspection station based on such categorized differences in order to enable the inspection station to more accurately distinguish between nuisances and defects; thereby allowing the review station to directly process the set of data stored at the inspection system memory unit without using an intermediate database for transferring the set of data from the inspection system to the review station.