Patent ID: 7741888

Claim:
A phase locked loop (PLL) circuit comprising: a loop filter, wherein the loop filter includes: a pull-up pumping unit configured to generate a first pumping voltage from an external power supply voltage when a pull-up control signal is enabled; a pull-down pumping unit configured to connect to the pull-up pumping unit at an output terminal, and generate a second pumping voltage from the first pumping voltage and supply the second pumping voltage to a ground terminal, when a pull-down control signal is enabled; a filtering unit configured to filter the first and the second pumping voltages from the pull-up and the pull-down pumping units, and to include a first resistor having a first end and a second end; and a compensator configured to connect the filtering unit and output a control voltage to compare a voltage of two signals, wherein one of the two signals is based upon a difference between the first pumping voltage and the second pumping voltage, and to compensate for the difference between the first pumping voltage and the second pumping voltage according to a comparison signal, wherein the compensator comprises: a comparator that compares potentials of both ends of the first resistor to output the comparison signal, and an equalizer that makes potentials of both ends of the first resistor in the filtering unit equal to each other in response to the comparison signal.