Patent ID: 7928760

Claim:
An input and/or output pad for an integrated circuit, said input and/or output pad comprising: a pad cell including a pad block connected to an input buffer and/or an output buffer and said pad block arranged to be connected between said input buffer and/or output buffer and one of input and/or output pins-of a core of said integrated circuit; a pad logic module including: a first boundary scan cell and/or a second boundary scan cell, connected to said pad block through said input buffer and/or output buffer and arranged to feed input signals to and/or deliver output signals from said pad block, and control means connected to said first and/or second boundary scan cell and adapted to receive control signals for controlling access to said first and/or second boundary scan cell and feeding said first boundary scan cell with said input signals and/or outputting said output signals delivered by said first boundary scan cell, wherein said access is controlled in dependence on said control signals; and characterized in that said control means is arranged to forbid the access of said input signals to said first boundary scan cell while allowing the power of said pad cell and pad logic module to be maintained, just before said core is powered down in order to isolate the core input to which said pad block is connected.