Patent ID: 8059422

Claim:
A thermally enhanced package structure, comprising: a substrate having an upper surface and a lower surface; a chip comprising an active surface and a back surface, and disposed on the upper surface and electrically connected to the substrate; a first prepreg having a first surface and a second surface, wherein the second surface of the first prepreg covers the chip and contacts the back surface of the chip; a heat dissipating metal layer disposed on the first surface of the first prepreg; a second prepreg disposed between the first prepreg and the substrate, the second prepreg having a third surface, a fourth surface, and at least an opening formed on the fourth surface, the third surface being connected to the second surface of the first prepreg, and the chip being disposed in the opening; and an electrically connecting component electrically connecting the active surface of the chip with the substrate, wherein the second prepreg is in contact with and covering the electrically connecting component.