Patent ID: 8737135

Claim:
A method of operating a memory device having a Flash memory cell array to provide data to an application in response to a read command, wherein the application has an address boundary, comprising: receiving a read command which includes a start address; configuring the memory device for the address boundary of the application; and performing a sequence of sense operations on the Flash memory cell array in response to the read command, the sequence comprising: a first sensing of the Flash memory cell array to acquire first data for output, the first sensing having a first position in the sequence and occurring over a first internal sense time; furnishing the first data as an output of the memory device; a second sensing of the Flash memory cell array to acquire second data for output, the second sensing having a second position in the sequence and occurring over a second internal sense time; and furnishing the second data as an output of the memory device; wherein the first internal sense time and the second internal sense time are variable for improved read performance depending on the address boundary of the application and a time budget for the first and second sensings.