Patent ID: 7704836

Claim:
A method of fabricating a MOSFET comprising: forming a trench at a first surface of a semiconductor substrate, said substrate comprising dopant of a first conductivity type; depositing a mask layer over said first surface, said mask layer lining the walls and floor of said trench; removing a portion of said mask layer adjacent the floor of said trench, remaining portions of said mask layer remaining attached to sidewalls of said trench; etching said substrate through said bottom of said trench with said remaining portions of said mask layer remaining attached to sidewalls of said trench so as to form a cavity in said substrate; heating said substrate with said remaining portions of said mask layer remaining attached to sidewalls of said trench so as to form a first dielectric layer in said cavity; removing said remaining portions of said mask layer; introducing a first layer of a conductive material into said cavity, said first layer of conductive material being electrically isolated from said substrate by said first dielectric layer; heating said substrate so as form a second dielectric layer at an exposed surface of said conductive material and a gate dielectric layer along walls of said trench; introducing a second layer of conductive material into said trench; forming a body region of a second conductivity type opposite to said first conductivity type in said substrate, said body region abutting said gate dielectric layer; forming a source region of said first conductivity type abutting said gate oxide layer and forming a junction with said body region; covering said second layer of conductive material in said trench with a third dielectric layer; depositing a metal layer over said substrate, said metal layer being in electrical contact with said source region and forming an electrical connection between said first layer of conductive material and said source region.