Patent ID: 7916062

Claim:
An analog front-end processing apparatus capable of sharing pins, for receiving all positive signals and one negative signal of a plurality of pairs of differential signals, the analog front-end processing apparatus comprising: a plurality of positive pins, respectively used for receiving the positive signals of the plurality of pairs of differential signals; a negative pin, for receiving the negative signal of a designated pair of the plurality of pairs of differential signals; a plurality of positive clamping circuits, respectively coupled to the plurality of positive pins, for having DC levels of the positive signals fixed at their corresponding target positive voltages; a negative clamping circuit, coupled to the negative pin, for having a DC level of the negative signal fixed at a first reference voltage; a plurality of sample and hold circuits, each sample and hold circuit having a positive input terminal and a negative input terminal, wherein a voltage difference between the two input terminals of each sample and hold circuit is substantially equal to a voltage difference between the corresponding target positive voltage and the first reference voltage during a sample period, and a voltage difference between the two input terminals of each sample and hold circuit is equal to a voltage difference between a corresponding target negative voltage and a second reference voltage during a hold period; and a plurality of adjusting circuits, respectively coupled to the plurality of sample and hold circuits, for respectively adjusting the plurality of sample and hold circuits to their corresponding target negative voltages.