Patent ID: 7802061

Claim:
A method, comprising: receiving a command for operation of a non-volatile memory device on a set of input/output lines, the command indicating a read operation or a write operation; receiving an address on the set of input/output lines subsequent to receiving the command, the address indicating a starting location of a data transfer operation; and receiving data on the set of input/output lines subsequent to receiving the address, the data to be transferred to or from a block of addresses in the non-volatile memory device starting with the received address; wherein: a single clock signal is used to latch the address and data; said receiving the command comprises interpreting signals on the input/output lines as a command for a first number of clock cycles; said receiving the address comprises interpreting signals on the input/output lines as an address for a second number of clock cycles; and said receiving the data comprises interpreting signals on the input/output lines as data for a third number of clock cycles; the third number of clock cycles is indicated in the command.