Patent ID: 7355127

Claim:
A semiconductor device comprising: a wiring board having a main surface, a plurality of wirings formed on the main surface, and an insulating layer formed over the main surface such that the insulating layer covers the plurality of wirings; a semiconductor chip mounted over the insulating layer; a plurality of wires electrically connecting the semiconductor chip with a part of each of the plurality of wirings respectively, wherein the part of each of the plurality of wirings is exposed from the insulating layer; and a sealing resin for sealing the semiconductor chip, and the plurality of wirings, wherein the sealing resin is formed over the main surface of the wiring board by connecting with the insulating layer, wherein the insulating layer is formed between adjacent wiring; and wherein an interface of the main surface of the wiring board and the insulating layer formed between adjacent wirings is formed at a position lower than an interface of the main surface of the wiring board and each of the plurality of wirings.