Patent ID: 8295478

Claim:
A cryptographic processing apparatus comprising: a processor; a memory storing instructions executable by the processor to: perform a Feistel-type common-key block-cipher process of repeating an SP-type F-function in a plurality of rounds, the SP-type F-function performing a data transformation process including a non-linear transformation process and a linear transformation process, and perform a cryptographic process to which an extended Feistel structure is applied, where the extended Feistel structure has a number of data lines d that are set to an integer satisfying d≧3, and selectively apply a plurality of different matrices to the linear transformation processes that are performed in the SP-type F-functions in the plurality of rounds, the plurality of different matrices being a plurality of different matrices satisfying a condition in which a minimum number of branches for all of the data lines is equal to or more than a predetermined value, the minimum number of branches for all of the data lines being selected from among minimum numbers of branches corresponding to the data lines, each of the minimum numbers of branches corresponding to the data lines being based on linear transformation matrices included in the SP-type F-functions that are input to a corresponding data line in the extended Feistel structure, and wherein the plurality of different matrices are repeatedly arranged in the SP-type F-functions that are input to the respective data lines in the extended Feistel structure.