Patent ID: 7821277

Claim:
A parallel test fixture for mixed signal integrated circuit, wherein said fixture having a multi-layer printed circuit board, and said fixture comprising: a test area, which is disposed on a central area of the multi-layer printed circuit board and includes several test regions for a plurality of mixed signal integrated circuits, and includes a first test region, a second test region, a third test region, and a fourth test region for mixed signal integrated circuits; an analog signal ground layer, which is operationally connected with a plurality of analog signals of said mixed signal integrated circuits in the test area, and includes a first analog signal ground region and a second analog signal ground region; and a digital signal ground layer, which is operationally connected with a plurality of digital signals of said mixed signal integrated circuits in the test area, and includes a first digital signal ground region and a second digital signal ground region; wherein an analog signal of said second test region and an analog signal of said fourth test region operationally connecting to said second analog signal ground region, and a digital signal of said second test region and a digital signal of said fourth test region operationally connecting to said second digital signal ground region.