Patent ID: 6873668

Claim:
A clock recovery circuit for recovering a clock signal, synchronized to data stored on a storage medium, from an analog signal that has been read out from the storage medium, the circuit comprising: amplifying means, which corrects the amplitude of the analog signal read out from the storage medium and then outputs an amplitude-corrected analog signal; an analog filter, which receives the amplitude-corrected analog signal from the amplifying means, equalizes the waveform of the amplitude-corrected analog signal and then outputs a waveform-equalized analog signal; sampling means, which samples the waveform-equalized analog signal output from the analog filter by reference to the clock signal, converts the sampled analog signal into a digital signal and then outputs the digital signal; waveform shaping means, which receives the digital signal from the sampling means, shapes the waveform of the digital signal by reference to the clock signal and then outputs a waveform-shaped digital signal; first phase difference detecting means, which receives the digital signal from the sampling means and/or the waveform-shaped digital signal from the waveform shaping means, detects a first phase difference between the digital signal received and the clock signal, and then outputs the first phase difference; second phase difference detecting means, which receives the output of a comparator included in the sampling means, detects a second phase difference between the output of the comparator and the clock signal and then outputs the second phase difference; control signal generating means, which generates and outputs a frequency control signal in accordance with the first and second phase differences; and oscillating means, which controls the frequency of the clock signal in accordance with the frequency control signal output from the control signal generating means and then outputs the clock signal with the controlled frequency, wherein the second phase difference detecting means has its gain controlled in response to a gain control signal.