Patent ID: 8355258

Claim:
A printed circuit board noise calculating method of calculating a power source noise of a printed circuit board mounting a semiconductor device and a decoupling capacitor by using CAD, comprising steps of: dividing the printed circuit board into a mesh shape; calculating an inductance matrix of all mesh positions on the printed circuit board through electromagnetic field analysis; calculating an inductance existing between an arrangement position of the semiconductor device and an arrangement allowable position of the decoupling capacitor by using the inductance matrix; forming an orthogonal array by using as parameters the inductance, a type of a capacitor component to be adopted as the decoupling capacitor, and the number of decoupling capacitors on the printed circuit board; calculating parameter sets including the inductance, type of the decoupling capacitor and the number of decoupling capacitors on the printed circuit board, from the formed orthogonal array; calculating a power source noise evaluation equation by using a power source noise of each parameter set as an index, through circuit analysis of the printed circuit board corresponding to each parameter set; and designating a change in at least one of the arrangement position of the decoupling capacitor, the type and the number of decoupling capacitors, wherein a power source noise corresponding to rearrangement of the decoupling capacitor caused by the change is calculated by using the calculated power source noise evaluation equation.