Patent ID: 8901938

Claim:
A measure initialization path for determining measure initialization for a delay line structure, the measure initialization path comprising: a forward path, comprising a plurality of delay stages coupled in series, each delay stage comprising at least a pair of parallel NAND gates; a first output path coupled to at least an output of a delay stage of the forward path, the first output path comprising a plurality of delay stages, wherein each delay stage of the first output path comprises a NAND gate and is coupled to a NAND gate of a corresponding delay stage of the forward path, where an output of at least one of the delay stages of the first output path is fed forward to the forward path; and a second output path coupled to at least an output of a delay stage of the forward path, the second output path comprising a plurality of delay stages, wherein each delay stage of the second output path comprises a NAND gate and is coupled to a NAND gate of a corresponding delay stage of the forward path, where an output of at least one of the delay stages is fed forward to the forward path; wherein when an input signal is propagated through the measure initialization path, the input signal successively propagates through a delay stage of the forward path, a delay stage of the first output path corresponding to the delay stage of the forward path, a next delay stage of the forward path and a delay stage of the second output path corresponding to the next delay stage of the forward path until the input signal is output by one of the first output path or the second output path for performing measure initialization.