Patent ID: 7181568

Claim:
A content addressable memory, comprising: at least one tag input; at least one random access memory; circuitry to: perform multiple read operations of the at least one random access memory for multiple, different ones of the read operations specifying an address based on different subsets of tag bits; and digital logic circuitry coupled to the at least one random access memory, the circuitry including digital logic gates to: determine whether a lookup tag matches one or more entries represented by data stored in the random access memory based on each of the different subsets of the tag bits; determine whether a portion of the lookup tag matches a portion of one or more entries represented by the data stored in the random access memory based on less than all of the different subsets of tag bits; and simultaneously outputting (1) at least one match signal based on whether the lookup tag matches one or more entries represented by the data stored in the random access memory based on each of the different subsets of the tag bits and (2) at least one match signal based on whether the portion of the lookup tag matches a portion of one or more entries represented by the data stored in the random access memory based on less than all of the different subsets of the tag bits.