Patent ID: 8842780

Claim:
An apparatus comprising: a peak detector that is configured to detect a peak voltage; a first comparator that is coupled to the peak detector and that receives a first threshold voltage; a threshold generator that is coupled to the peak detector, wherein the threshold generator is configured to generate a second threshold voltage that is proportional to the peak voltage; a delay circuit that is coupled to the first comparator; and a second comparator that is coupled to the delay circuit and that is coupled to the threshold generator so as to receive the second threshold voltage; wherein the peak detector further comprises: a capacitor that is coupled to the first comparator; and a current source that is coupled to the first comparator in parallel to the capacitor; wherein the delay circuit further comprises a delay line; and wherein the delay line further comprises a plurality of buffers coupled together in series with one another in a sequence, and wherein the capacitor and current source further comprise a first capacitor and a first current source, respectively, and wherein the delay circuit further comprises: an inverter having an input terminal, a first supply terminal, a second supply terminal, and an output terminal, wherein the input terminal of the inverter is coupled to the last buffer of the sequence, and wherein the output terminal of the inverter is coupled to the second comparator; a second current source that is coupled to the second supply terminal of the inverter; and a second capacitor that is coupled to the output terminal of the inverter.