Patent ID: 8208280

Claim:
A nonvolatile memory device, comprising: a unit cell comprising an antifuse; a detecting unit configured to detect data from the unit cell; and a read voltage varying unit configured to vary an input voltage and supply a varied read voltage to the unit cell, the read voltage varying unit comprising: a first current mirror configured to receive the input voltage and supply the varied read voltage to the unit cell; and a variable current supplying unit configured to supply a variable current to an input terminal of the first current mirror, the variable current supply unit comprising a second current mirror configured to receive an external bias and supply the variable current to the input terminal of the first current mirror, the second current mirror comprising: a first transistor connected between the input terminal of the first current mirror and a first ground voltage terminal and having a gate connected to a first node; and a plurality of second transistors connected in parallel between the first node and the first ground voltage terminal and having a gate connected to the gate of the first transistor.