Patent ID: 7927897

Claim:
A method of manufacturing an array substrate, comprising: forming a gate line and a gate electrode on a base substrate; forming a gate insulation layer, an active layer, and a data metal layer on the base substrate formed the gate line and the gate electrode; forming a photoresist film using a photoresist composition comprising a binder resin, a photo acid generator, an acryl resin represented by Chemical Formula 1, and a solvent, the photoresist film formed on the data metal layer; forming a first photoresist pattern by patterning the photoresist film, the first photoresist pattern comprising a source electrode/line portion having a first thickness, a drain electrode portion having the first thickness, and a channel forming portion having a second thickness; forming a data line and a channel portion by etching the data metal layer and the active layer using the first photoresist pattern as a mask; forming a second photoresist pattern by removing the channel forming portion of the first photoresist pattern, the second photoresist pattern exposing a portion of the data metal layer; forming a source electrode and a drain electrode by etching the data metal layer using the second photoresist pattern as a mask; and forming an ohmic contact pattern by etching the active layer using the second photoresist pattern as a mask, wherein R 1 , R 2 , R 3 , R 4 , and R 5 each represent a hydrogen atom or an alkyl group having 1-4 carbon atoms, and a, b, d, and e each represent a value in a range of about 0.01 to about 0.99, and the sum of a, b, d, and e is 1.