Patent ID: 7209111

Claim:
A display control driver on a semiconductor substrate, the display control driver comprising: a display memory which is capable of storing display data of one frame for a display panel to be coupled to the display control driver, the display data comprising a plurality of data, each of which includes three color data, the display memory being capable of reading out ones of the plurality of data corresponding to one line for the display panel, sequentially in each horizontal period; output terminals to be coupled to input terminals of the display panel, respectively; a circuit which is coupled between outputs of the display memory and the output terminals and which provides to the output terminals, respectively, a plurality of three color drive signals based on the three color data corresponding to the ones of the plurality of data read out from the display memory so that three color drive signals are provided to one output terminal in time-sharing manner; a timing controller which provides control signals each indicating an output period of the corresponding one of the three color drive signals, respectively, the timing controller including: a frequency division circuit coupled to receive a clock signal and dividing a frequency of the clock signal, and a counter coupled to receive the divided clock signal and counting the divided clock signal, and a control signal producing circuit coupled to the counter and coupled to the receive the divided clock signal and providing the control signals; a first register coupled to the frequency division circuit and capable of storing a value determining a division ratio for the frequency division circuit; a second register coupled to the counter and capable of storing a count value for the counter, the count value determining one horizontal period; a third register coupled to the control signal producing circuit and capable of storing a value determining a pulse width of the control signals; and a fourth register coupled to the control signal producing circuit and capable of storing a value determining a rising edge of the control signals, wherein the control signal producing circuit provides the control signals so that each control signal has a pulse width equivalent to a time which is calculated by dividing one horizontal period by three and by subtracting from the divided period a period of not providing the control signal.