Patent ID: 8484430

Claim:
A memory system comprising: a nonvolatile semiconductor memory; and a memory controller configured to receive a first logical address and first data from an outside host device, the first logical address belonging to memory space of the memory system, and a maximum value of logical addresses of the memory space is a first value, wherein physical addresses of the nonvolatile semiconductor memory are assigned to logical addresses of the memory space, the memory controller being configured to: convert the first logical address into a first physical address to write the first data to the nonvolatile semiconductor memory using the first physical address; receive a command which designates the logical address range from the host device; reassign physical addresses assigned to the logical addresses in the logical address range to logical addresses which are larger than the first value, wherein as a result of the reassigning, the logical addresses which have been assigned to the physical addresses before the controller reassigns are not assigned to any physical addresses of the nonvolatile semiconductor memory; increase the maximum value of logical addresses of the memory space from the first value to a second value according to a result of the reassignment of the physical addresses; receive a second logical address and second data from the host device after increasing the maximum value of logical addresses of the memory space to the second value, wherein the second logical address is larger than the first value but less than the second value; and convert the second logical address into a second physical address to write the second data to the nonvolatile semiconductor memory using the second physical address.