Patent ID: 8553481

Claim:
An apparatus, comprising: a sense amplifier latch including a latch input, a test data input, a latch output, and a latch enable signal, wherein the latch input is coupled to receive one or more data output signals from a sense amplifier, wherein during operation, in response to assertion of the latch enable signal, the sense amplifier latch opens to pass a value of the latch input to the latch output, and in response to deassertion of the latch enable signal, the sense amplifier latch closes to store the value of the latch input; and a multiplexer that, during operation, selects one of a bypass input or a scan data input to generate the test data input, wherein the test data input encodes both a data value and a control value that causes the data value to be selected, and wherein in response to an indication by the control value of the test data output, the sense amplifier latch during operation overrides a stored data value with the data value encoded by the test data output, such that the sense amplifier latch outputs the data value received from the multiplexer instead of the stored data value.