Patent ID: 8361859

Claim:
A method of fabricating a semiconductor structure comprising: forming at least one field effect transistor within an active device region of a semiconductor substrate, said at least one field effect transistor including a patterned gate stack, a source region and a drain region, and wherein said forming the at least one field effect transistor includes recessing the source region and the drain region, and filling the recessed source region and drain region with a sacrificial epitaxial semiconductor material; forming a dielectric material on exposed surfaces of said semiconductor substrate and surrounding the at least one field effect transistor, said dielectric material having at least one set of contact openings that exposes an upper surface of the source region and the drain region; completely removing said sacrificial epitaxial semiconductor material from said source region and drain region forming a trench in each of the source region and the drain region; and filling at least the trench in the source region and the drain region with a strained epitaxial semiconductor material.