Patent ID: 7522216

Claim:
An apparatus including a video synchronization signal detector for detecting occurrences of single and double frequency synchronization signal pulses present during a vertical synchronization interval, comprising: voltage generating circuitry responsive to a reset control signal by providing a generated voltage that alternately charges and discharges to first and second values during first and second states of said reset control signal, respectively; voltage detection circuitry coupled to said voltage generating circuitry and responsive to said generated voltage by providing a reference voltage corresponding to a maximum value of said first generated voltage value attained during one or more earlier ones of said first reset control signal state; and control circuitry coupled to said voltage detection circuitry and said voltage generating circuitry, and responsive to at least said generated voltage, said reference voltage and a horizontal synchronization signal with first and second signal states and one or both of single and double frequency synchronization signal pulses during a vertical synchronization interval, by providing said reset control signal in said first and second states in response to said first and second horizontal synchronization signal states, respectively, and one or more video mode signals indicative of said single frequency synchronization signal pulses in response to said value of said first generated voltage value attained during one or more later ones of said first reset control signal state being substantially equal to said maximum first generated voltage value, and said double frequency synchronization signal pulses in response to said value of said first generated voltage value attained during one or more later ones of said first reset control signal state being approximately half of said maximum first generated voltage value.