Patent ID: 8347252

Claim:
An automated method for estimating layout-induced variations in threshold voltage in an integrated circuit layout, comprising the steps of: selecting a diffusion area within the layout for analysis; identifying STI edges on the selected area; identifying channel areas in the selected area; and for each given channel area identified in the step of identifying: estimating threshold voltage variations due at least to Transient Enhanced Diffusion effects in the given channel area, in dependence upon distances between a point in the given channel area and the STI edges on the selected area; and using a computer, combining the threshold voltage variations estimated in the step of estimating estimating threshold voltage variations due at least to Transient Enhanced Diffusion effects in the given channel area, in dependence upon distances between a second point in the given channel area and the STI edges on the selected area; and including in the combined threshold voltage variation, the threshold voltage variations estimated in dependence upon distances between the second point in the given channel area and the STI edges on the selected area.