Patent ID: 8446941

Claim:
An equalizer comprising: a subtraction unit subtracting a feedback signal from an input signal to generate a subtraction signal; a timing signal generation unit generating a sampling timing signal; an equalization signal generation unit equalizing the subtraction signal according to the sampling timing signal to generate an equalization signal; and a feedback signal generation unit calculating a filter coefficient value by using the subtraction signal and the equalization signal, delaying the equalization signal, and weighting the delayed equalization signal according to the filter coefficient value to generate a feedback signal, wherein the feedback signal generation unit comprises: an adapter unit obtaining the filter coefficient value according to a sign regressor least mean square (LMS) algorithm by using the subtraction signal and the equalization signal; and a filter unit sequentially delaying equalization signals and weighting each of the delayed equalization signals by using the filter coefficient value, wherein the adapter unit comprises: an error extractor extracting an error value by using a load value and an equalization signal value of the equalization signal; and a tap coefficient calculator calculating the filter coefficient value by using the error value and the equalization signal, wherein the adapter unit further comprises a variance calculator calculating a statistical variance value of the error value, and the tap coefficient calculator compares a variance value calculated during a previous period and a variance value calculated during a current period, and when the variance value of the current period is smaller, the tap coefficient calculator calculates a filter coefficient value and updates it to the filter unit, whereas when the variance value of the current period is greater or equal, the tap coefficient calculator maintains the filter coefficient value of the previous period.