Patent ID: 8503247

Claim:
A semiconductor storage apparatus comprising: a word line coupled to a cell transistor; a first capacitor having a first end coupled to the word line; a boost driver coupled to a second end of the first capacitor; a voltage-drop circuit configured to generate a given voltage drop between a first voltage and a second voltage; and a boost-drive circuit, coupled to a second end of the first capacitor, configured to boost a voltage at the second end from the second voltage to the first voltage, wherein the boost-drive circuit is provided between a first voltage supply that supplies the first voltage and a second voltage supply that supplies the second voltage, and the voltage-drop circuit generates the given voltage drop at a node between the boost-drive circuit and the second voltage supply, wherein the voltage-drop circuit is disposed between the first supply voltage and the second supply voltage and includes a diode-coupled transistor, wherein the diode-coupled transistor generates a voltage drop, and wherein the voltage-drop circuit includes a second capacitor coupled to the diode-coupled transistor.